Add arm asm code for processing.

Licai Guo committed 12 years ago

Commit e7cc8c21 parent 248f32424 files · +4330 −4204Browse files

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codec/processing/src/adaptivequantization/AdaptiveQuantization.cpp +5 −0
codec/processing/src/adaptivequantization/AdaptiveQuantization.h +5 −0
codec/processing/src/arm/adaptive_quantization.S +21 −21
codec/processing/src/arm/down_sample_neon.S +69 −69
codec/processing/src/arm/pixel_sad_neon.S +7 −7
codec/processing/src/arm/vaa_calc_neon.S +280 −280
codec/processing/src/downsample/downsample.cpp +10 −0
codec/processing/src/downsample/downsample.h +13 −0
codec/processing/src/downsample/downsamplefuncs.cpp +10 −0
codec/processing/src/scenechangedetection/SceneChangeDetection.cpp +6 −0
codec/processing/src/scenechangedetection/SceneChangeDetectionCommon.h +6 −0
codec/processing/src/vaacalc/vaacalculation.cpp +9 −0
codec/processing/src/vaacalc/vaacalculation.h +10 −0

codec/processing/src/adaptivequantization/AdaptiveQuantization.cpp+5−0

@@ -231,6 +231,11 @@ void CAdaptiveQuantization::WelsInitVarFunc (PVarFunc& pfVar, int32_t iCpuFlag) · 230 unmodified lines
231	231	pfVar = SampleVariance16x16_sse2;
232	232	}
233	233	#endif
	234	+#ifdef HAVE_NEON
	235	+ if (iCpuFlag & WELS_CPU_NEON) {
	236	+ pfVar = SampleVariance16x16_neon;
	237	+ }
	238	+#endif
234	239	}
235	240
236	241	void SampleVariance16x16_c (uint8_t* pRefY, int32_t iRefStride, uint8_t* pSrcY, int32_t iSrcStride,

codec/processing/src/adaptivequantization/AdaptiveQuantization.h+5−0

@@ -62,6 +62,11 @@ VarFunc SampleVariance16x16_sse2; · 61 unmodified lines
62	62	WELSVP_EXTERN_C_END
63	63	#endif
64	64
	65	+#ifdef HAVE_NEON
	66	+WELSVP_EXTERN_C_BEGIN
	67	+VarFunc SampleVariance16x16_neon;
	68	+WELSVP_EXTERN_C_END
	69	+#endif
65	70
66	71	class CAdaptiveQuantization : public IStrategy {
67	72	public:

codec/processing/src/arm/adaptive_quantization.S+21−21

@@ -35,7 +35,7 @@ · 34 unmodified lines
35	35	#include "arm_arch_common_macro.S"
36	36
37	37	#ifdef APPLE_IOS
38		−.macro SQR_ADD_16BYTES
	38	+.macro SQR_ADD_16BYTES
39	39	vmull.u8 q3, $0, $0
40	40	vmull.u8 q8, $1, $1
41	41	vpadal.u16 $2, q3
@@ -51,23 +51,23 @@ · 9 unmodified lines
51	51	#endif
52	52
53	53
54		−WELS_ASM_FUNC_BEGIN pixel_var_16x16_neon
	54	+WELS_ASM_FUNC_BEGIN SampleVariance16x16_neon
55	55	stmdb sp!, {r4}
56	56
57	57	vld1.8 {q15}, [r0], r1 //save the ref data (16bytes)
58	58	vld1.8 {q14}, [r2], r3 //save the src data (16bytes)
59		−
60		−
61		− vabd.u8 q13, q14, q15
	59	+
	60	+
	61	+ vabd.u8 q13, q14, q15
62	62	vmull.u8 q12, d27, d27
63	63	vmull.u8 q11, d26, d26
64	64	vaddl.u16 q12, d24, d25
65	65	vpadal.u16 q12, q11 //sqr
66	66
67		− vaddl.u8 q13, d26, d27 //sum
68		−
	67	+ vaddl.u8 q13, d26, d27 //sum
	68	+
69	69	vaddl.u8 q10, d28, d29 //sum_cur
70		−
	70	+
71	71	vmull.u8 q9, d29, d29
72	72	vmull.u8 q8, d28, d28
73	73	vaddl.u16 q9, d18, d19 //sqr_cur
@@ -78,35 +78,35 @@ pixel_var_16x16_loop0: · 4 unmodified lines
78	78
79	79	vld1.8 {q0}, [r0], r1 //save the ref data (16bytes)
80	80	vld1.8 {q1}, [r2], r3 //save the src data (16bytes)
81		−
	81	+
82	82	vabd.u8 q2, q0, q1
83		−
	83	+
84	84	//q10 save sum_cur
85	85	vpadal.u8 q10, q1
86	86
87	87	//q12 save sqr
88	88	SQR_ADD_16BYTES d4, d5, q12
89		−
	89	+
90	90	//q13 save sum
91	91	vpadal.u8 q13, q2
92	92
93	93	subs r4, #1
94		−
95		− //q9 save sqr_cur
96		− SQR_ADD_16BYTES d2, d3, q9
97		−
98		− bne pixel_var_16x16_loop0
99		−
	94	+
	95	+ //q9 save sqr_cur
	96	+ SQR_ADD_16BYTES d2, d3, q9
	97	+
	98	+ bne pixel_var_16x16_loop0
	99	+
100	100	vadd.u16 d0, d26, d27 //sum
101		− vadd.u16 d1, d20, d21 //sum_cur
	101	+ vadd.u16 d1, d20, d21 //sum_cur
102	102	vpaddl.u16 q0, q0
103	103	vadd.u32 d2, d24, d25 //sqr
104	104	vadd.u32 d3, d18, d19 //sqr_cur
105	105	vpadd.u32 d0, d0, d1
106	106	vpadd.u32 d1, d2, d3
107		−
	107	+
108	108	ldr r4, [sp, #4]
109		−
	109	+
110	110	vshr.u32 q0, q0, #8
111	111	vmul.u32 d0, d0
112	112	vsub.u32 d0, d1, d0
@@ -117,4 +117,4 @@ pixel_var_16x16_loop0: · 4 unmodified lines
117	117
118	118	WELS_ASM_FUNC_END
119	119
120		−#endif
	120	+#endif

codec/processing/src/arm/down_sample_neon.S+69−69

@@ -35,29 +35,29 @@ · 34 unmodified lines
35	35	#include "arm_arch_common_macro.S"
36	36
37	37
38		−WELS_ASM_FUNC_BEGIN comp_ds_bilinear_neon
	38	+WELS_ASM_FUNC_BEGIN DyadicBilinearDownsampler_neon
39	39	stmdb sp!, {r4-r8, lr}
40		−
	40	+
41	41	//Get the width and height
42	42	ldr r4, [sp, #24] //src_width
43	43	ldr r5, [sp, #28] //src_height
44		−
	44	+
45	45	//Initialize the register
46	46	mov r6, r2
47	47	mov r8, r0
48	48	mov lr, #0
49		− lsr r5, #1
50		−
	49	+ lsr r5, #1
	50	+
51	51	//Save the tailer for the unasigned size
52	52	mla r7, r1, r5, r0
53	53	vld1.32 {q15}, [r7]
54		−
	54	+
55	55	add r7, r2, r3
56	56	//processing a colume data
57		−comp_ds_bilinear_loop0:
	57	+comp_ds_bilinear_loop0:
58	58
59	59	vld1.8 {q0,q1}, [r2]!
60		− vld1.8 {q2,q3}, [r7]!
	60	+ vld1.8 {q2,q3}, [r7]!
61	61	vpaddl.u8 q0, q0
62	62	vpaddl.u8 q1, q1
63	63	vpaddl.u8 q2, q2
@@ -70,9 +70,9 @@ comp_ds_bilinear_loop0: · 6 unmodified lines
70	70	vrhadd.u16 q1, q3
71	71	vmovn.u16 d0, q0
72	72	vmovn.u16 d1, q1
73		− vst1.32 {q0}, [r0]!
	73	+ vst1.32 {q0}, [r0]!
74	74	add lr, #32
75		−
	75	+
76	76	cmp lr, r4
77	77	movcs lr, #0
78	78	addcs r6, r3, lsl #1
@@ -82,10 +82,10 @@ comp_ds_bilinear_loop0: · 3 unmodified lines
82	82	movcs r0, r8
83	83	subscs r5, #1
84	84	bne comp_ds_bilinear_loop0
85		−
	85	+
86	86	//restore the tailer for the unasigned size
87	87	vst1.32 {q15}, [r0]
88		−
	88	+
89	89	ldmia sp!, {r4-r8,lr}
90	90	WELS_ASM_FUNC_END
91	91
@@ -96,29 +96,29 @@ WELS_ASM_FUNC_BEGIN comp_ds_bilinear_w_x8_neon · 4 unmodified lines
96	96	//Get the width and height
97	97	ldr r4, [sp, #20] //src_width
98	98	ldr r5, [sp, #24] //src_height
99		−
	99	+
100	100	//Get the difference
101		− sub lr, r3, r4
	101	+ sub lr, r3, r4
102	102	sub r1, r1, r4, lsr #1
103		−
	103	+
104	104	lsr r5, #1
105		−
	105	+
106	106	//processing a colume data
107		−comp_ds_bilinear_w_x8_loop0:
108		−
	107	+comp_ds_bilinear_w_x8_loop0:
	108	+
109	109	lsr r6, r4, #3
110	110	add r7, r2, r3
111	111	//processing a line data
112	112	comp_ds_bilinear_w_x8_loop1:
113		−
	113	+
114	114	vld1.8 {d0}, [r2]!
115		− vld1.8 {d1}, [r7]!
	115	+ vld1.8 {d1}, [r7]!
116	116	vpaddl.u8 q0, q0
117	117	vrshr.u16 q0, #1
118	118	vrhadd.u16 d0, d1
119		−
	119	+
120	120	vmovn.u16 d0, q0
121		− vst1.32 {d0[0]}, [r0]!
	121	+ vst1.32 {d0[0]}, [r0]!
122	122	subs r6, #1
123	123	bne comp_ds_bilinear_w_x8_loop1
124	124
@@ -126,7 +126,7 @@ comp_ds_bilinear_w_x8_loop1: · 1 unmodified line
126	126	add r0, r1
127	127	subs r5, #1
128	128	bne comp_ds_bilinear_w_x8_loop0
129		−
	129	+
130	130	ldmia sp!, {r4-r7,lr}
131	131	WELS_ASM_FUNC_END
132	132
@@ -137,31 +137,31 @@ WELS_ASM_FUNC_BEGIN comp_ds_bilinear_w_x16_neon · 4 unmodified lines
137	137	//Get the width and height
138	138	ldr r4, [sp, #20] //src_width
139	139	ldr r5, [sp, #24] //src_height
140		−
	140	+
141	141	//Get the difference
142		− sub lr, r3, r4
	142	+ sub lr, r3, r4
143	143	sub r1, r1, r4, lsr #1
144		−
	144	+
145	145	lsr r5, #1
146		−
	146	+
147	147	//processing a colume data
148		−comp_ds_bilinear_w_x16_loop0:
149		−
	148	+comp_ds_bilinear_w_x16_loop0:
	149	+
150	150	lsr r6, r4, #4
151	151	add r7, r2, r3
152	152	//processing a line data
153	153	comp_ds_bilinear_w_x16_loop1:
154		−
	154	+
155	155	vld1.8 {q0}, [r2]!
156		− vld1.8 {q1}, [r7]!
	156	+ vld1.8 {q1}, [r7]!
157	157	vpaddl.u8 q0, q0
158	158	vpaddl.u8 q1, q1
159	159	vrshr.u16 q0, #1
160	160	vrshr.u16 q1, #1
161	161	vrhadd.u16 q0, q1
162		−
	162	+
163	163	vmovn.u16 d0, q0
164		− vst1.32 {d0}, [r0]!
	164	+ vst1.32 {d0}, [r0]!
165	165	subs r6, #1
166	166	bne comp_ds_bilinear_w_x16_loop1
167	167
@@ -169,34 +169,34 @@ comp_ds_bilinear_w_x16_loop1: · 1 unmodified line
169	169	add r0, r1
170	170	subs r5, #1
171	171	bne comp_ds_bilinear_w_x16_loop0
172		−
	172	+
173	173	ldmia sp!, {r4-r7,lr}
174	174	WELS_ASM_FUNC_END
175	175
176	176
177		−WELS_ASM_FUNC_BEGIN comp_ds_bilinear_w_x32_neon
	177	+WELS_ASM_FUNC_BEGIN DyadicBilinearDownsamplerWidthx32_neon
178	178	stmdb sp!, {r4-r7, lr}
179	179
180	180	//Get the width and height
181	181	ldr r4, [sp, #20] //src_width
182	182	ldr r5, [sp, #24] //src_height
183		−
	183	+
184	184	//Get the difference
185		− sub lr, r3, r4
	185	+ sub lr, r3, r4
186	186	sub r1, r1, r4, lsr #1
187		−
	187	+
188	188	lsr r5, #1
189		−
	189	+
190	190	//processing a colume data
191		−comp_ds_bilinear_w_x32_loop0:
192		−
	191	+comp_ds_bilinear_w_x32_loop0:
	192	+
193	193	lsr r6, r4, #5
194	194	add r7, r2, r3
195	195	//processing a line data
196	196	comp_ds_bilinear_w_x32_loop1:
197		−
	197	+
198	198	vld1.8 {q0,q1}, [r2]!
199		− vld1.8 {q2,q3}, [r7]!
	199	+ vld1.8 {q2,q3}, [r7]!
200	200	vpaddl.u8 q0, q0
201	201	vpaddl.u8 q1, q1
202	202	vpaddl.u8 q2, q2
@@ -207,10 +207,10 @@ comp_ds_bilinear_w_x32_loop1: · 4 unmodified lines
207	207	vrshr.u16 q3, #1
208	208	vrhadd.u16 q0, q2
209	209	vrhadd.u16 q1, q3
210		−
	210	+
211	211	vmovn.u16 d0, q0
212	212	vmovn.u16 d1, q1
213		− vst1.32 {q0}, [r0]!
	213	+ vst1.32 {q0}, [r0]!
214	214	subs r6, #1
215	215	bne comp_ds_bilinear_w_x32_loop1
216	216
@@ -218,14 +218,14 @@ comp_ds_bilinear_w_x32_loop1: · 1 unmodified line
218	218	add r0, r1
219	219	subs r5, #1
220	220	bne comp_ds_bilinear_w_x32_loop0
221		−
	221	+
222	222	ldmia sp!, {r4-r7,lr}
223	223	WELS_ASM_FUNC_END
224	224
225	225
226		−WELS_ASM_FUNC_BEGIN general_ds_bilinear_accurate_neon
	226	+WELS_ASM_FUNC_BEGIN GeneralBilinearAccurateDownsampler_neon
227	227	stmdb sp!, {r4-r12, lr}
228		−
	228	+
229	229	//Get the data from stack
230	230	ldr r4, [sp, #40] //the addr of src
231	231	ldr r5, [sp, #44] //the value of src_stride
@@ -245,11 +245,11 @@ WELS_ASM_FUNC_BEGIN general_ds_bilinear_accurate_neon · 13 unmodified lines
245	245	and r9, r7, r10 // r9 vinc(scaleY mod 32767)
246	246	mov r11, #-1
247	247	mul r11, r9 // r11 -vinc
248		−
	248	+
249	249	vdup.s16 d2, r9
250	250	vdup.s16 d3, r11
251	251	vext.8 d5, d3, d2, #4 // vinc vinc -vinc -vinc
252		−
	252	+
253	253	mov r11, #0x40000000
254	254	mov r12, #0x4000
255	255	sub r12, #1
@@ -261,13 +261,13 @@ WELS_ASM_FUNC_BEGIN general_ds_bilinear_accurate_neon · 5 unmodified lines
261	261	sub r11, #1
262	262	vdup.s16 d9, r11
263	263	vext.8 d7, d9, d8, #4 //init v 16384 16384 16383 16383
264		−
265		− veor q14, q14
266		− sub r1, r2 // stride - width
	264	+
	265	+ veor q14, q14
	266	+ sub r1, r2 // stride - width
267	267	mov r8, #16384 // yInverse
268	268	sub r3, #1
269		−
270		−_HEIGHT:
	269	+
	270	+_HEIGHT:
271	271	ldr r4, [sp, #40] //the addr of src
272	272	mov r11, r8
273	273	lsr r11, #15
@@ -275,8 +275,8 @@ _HEIGHT: · 1 unmodified line
275	275	add r11, r4 // get current row address
276	276	mov r12, r11
277	277	add r12, r5
278		−
279		− mov r9, #16384 // xInverse
	278	+
	279	+ mov r9, #16384 // xInverse
280	280	sub r10, r2, #1
281	281	vmov.s16 d6, d1
282	282
@@ -288,21 +288,21 @@ _WIDTH: · 5 unmodified lines
288	288	add r4, r12,lr
289	289	vld2.8 {d28[4],d29[4]}, [r4] //q14: 000d000b000c000a;
290	290	vzip.32 d28, d29 //q14: 000d000c000b000a;
291		−
292		− vmull.u16 q13, d6, d7 //q13: init u * init v
	291	+
	292	+ vmull.u16 q13, d6, d7 //q13: init u * init v
293	293	vmull.u32 q12, d26,d28
294	294	vmlal.u32 q12, d27,d29
295	295	vqadd.u64 d24, d24,d25
296	296	vrshr.u64 d24, #30
297	297
298	298	vst1.8 {d24[0]}, [r0]!
299		− add r9, r6
	299	+ add r9, r6
300	300	vadd.u16 d6, d0 // inc u
301	301	vshl.u16 d6, #1
302	302	vshr.u16 d6, #1
303	303	subs r10, #1
304	304	bne _WIDTH
305		−
	305	+
306	306	WIDTH_END:
307	307	lsr r9, #15
308	308	add r4,r11,r9
@@ -317,26 +317,26 @@ WIDTH_END: · 8 unmodified lines
317	317	subs r3, #1
318	318	bne _HEIGHT
319	319
320		−LAST_ROW:
	320	+LAST_ROW:
321	321	ldr r4, [sp, #40] //the addr of src
322	322	lsr r8, #15
323	323	mul r8, r5
324		− add r4, r8 // get current row address
	324	+ add r4, r8 // get current row address
325	325	mov r9, #16384
326	326
327	327	_LAST_ROW_WIDTH:
328	328	mov r11, r9
329	329	lsr r11, #15
330		−
	330	+
331	331	add r3, r4,r11
332	332	vld1.8 {d0[0]}, [r3]
333		− vst1.8 {d0[0]}, [r0]
334		− add r0, #1
335		− add r9, r6
	333	+ vst1.8 {d0[0]}, [r0]
	334	+ add r0, #1
	335	+ add r9, r6
336	336	subs r2, #1
337	337	bne _LAST_ROW_WIDTH
338		−
	338	+
339	339	ldmia sp!, {r4-r12, lr}
340	340	WELS_ASM_FUNC_END
341	341
342		−#endif
	342	+#endif

codec/processing/src/arm/pixel_sad_neon.S+7−7

@@ -35,24 +35,24 @@ · 34 unmodified lines
35	35	#include "arm_arch_common_macro.S"
36	36
37	37
38		−WELS_ASM_FUNC_BEGIN pixel_sad_8x8_neon
	38	+WELS_ASM_FUNC_BEGIN WelsSampleSad8x8_neon
39	39	stmdb sp!, {lr}
40	40	//Loading a horizontal line data (8 bytes)
41		− vld1.8 {d0}, [r0], r1
	41	+ vld1.8 {d0}, [r0], r1
42	42	vld1.8 {d1}, [r2], r3
43		−
	43	+
44	44	//Do the SAD for 8 bytes
45	45	vabdl.u8 q1, d0, d1
46		−
	46	+
47	47	mov lr, #7
48	48	pixel_sad_8x8_loop0:
49	49
50	50	//Loading a horizontal line data (8 bytes)
51		− vld1.8 {d0}, [r0], r1
	51	+ vld1.8 {d0}, [r0], r1
52	52	vld1.8 {d1}, [r2], r3
53	53
54	54	subs lr, #1
55		−
	55	+
56	56	//Do the SAD for 8 bytes
57	57	vabal.u8 q1, d0, d1
58	58	bne pixel_sad_8x8_loop0
@@ -65,4 +65,4 @@ pixel_sad_8x8_loop0: · 6 unmodified lines
65	65	ldmia sp!, {lr}
66	66	WELS_ASM_FUNC_END
67	67
68		−#endif
	68	+#endif

codec/processing/src/arm/vaa_calc_neon.S+280−280

@@ -36,29 +36,29 @@ · 35 unmodified lines
36	36
37	37	#ifdef APPLE_IOS
38	38
39		−.macro ABS_SUB_SUM_16BYTES
	39	+.macro ABS_SUB_SUM_16BYTES
40	40	vld1.32 {q15}, [$0], $2
41	41	vld1.32 {q14}, [$1], $2
42	42	vabal.u8 $3, d30, d28
43	43	vabal.u8 $4, d31, d29
44	44	.endm
45	45
46		−.macro ABS_SUB_SUM_8x16BYTES
	46	+.macro ABS_SUB_SUM_8x16BYTES
47	47	vld1.32 {q15}, [$0], $2
48	48	vld1.32 {q14}, [$1], $2
49	49	vabdl.u8 $3, d30, d28
50	50	vabdl.u8 $4, d31, d29
51		−
	51	+
	52	+ ABS_SUB_SUM_16BYTES $0, $1, $2, $3, $4
52	53	ABS_SUB_SUM_16BYTES $0, $1, $2, $3, $4
53	54	ABS_SUB_SUM_16BYTES $0, $1, $2, $3, $4
54	55	ABS_SUB_SUM_16BYTES $0, $1, $2, $3, $4
55	56	ABS_SUB_SUM_16BYTES $0, $1, $2, $3, $4
56		− ABS_SUB_SUM_16BYTES $0, $1, $2, $3, $4
57	57	ABS_SUB_SUM_16BYTES $0, $1, $2, $3, $4
58	58	ABS_SUB_SUM_16BYTES $0, $1, $2, $3, $4
59	59	.endm
60	60
61		−.macro SAD_8X16BITS
	61	+.macro SAD_8X16BITS
62	62	vadd.u16 d31, $0, $1
63	63	vpaddl.u16 d31, d31
64	64	vpaddl.u32 $2, d31
@@ -73,17 +73,17 @@ · 8 unmodified lines
73	73	vabal.u8 \arg4, d31, d29
74	74	.endm
75	75
76		−.macro ABS_SUB_SUM_8x16BYTES arg0, arg1, arg2, arg3, arg4
	76	+.macro ABS_SUB_SUM_8x16BYTES arg0, arg1, arg2, arg3, arg4
77	77	vld1.32 {q15}, [\arg0], \arg2
78	78	vld1.32 {q14}, [\arg1], \arg2
79	79	vabdl.u8 \arg3, d30, d28
80	80	vabdl.u8 \arg4, d31, d29
81		−
	81	+
	82	+ ABS_SUB_SUM_16BYTES \arg0, \arg1, \arg2, \arg3, \arg4
82	83	ABS_SUB_SUM_16BYTES \arg0, \arg1, \arg2, \arg3, \arg4
83	84	ABS_SUB_SUM_16BYTES \arg0, \arg1, \arg2, \arg3, \arg4
84	85	ABS_SUB_SUM_16BYTES \arg0, \arg1, \arg2, \arg3, \arg4
85	86	ABS_SUB_SUM_16BYTES \arg0, \arg1, \arg2, \arg3, \arg4
86		− ABS_SUB_SUM_16BYTES \arg0, \arg1, \arg2, \arg3, \arg4
87	87	ABS_SUB_SUM_16BYTES \arg0, \arg1, \arg2, \arg3, \arg4
88	88	ABS_SUB_SUM_16BYTES \arg0, \arg1, \arg2, \arg3, \arg4
89	89	.endm
@@ -96,67 +96,67 @@ · 6 unmodified lines
96	96	#endif
97	97
98	98
99		−WELS_ASM_FUNC_BEGIN vaa_calc_sad_neon
	99	+WELS_ASM_FUNC_BEGIN VAACalcSad_neon
	100	+
	101	+ stmdb sp!, {r4-r8}
100	102
101		− stmdb sp!, {r4-r8}
102		−
103	103	ldr r4, [sp, #20] //load pic_stride
104	104	ldr r5, [sp, #28] //load psad8x8
105		−
	105	+
106	106	//Initial the Q4 register for save the "psadframe"
107	107	vmov.s64 q4, #0
108		−
	108	+
109	109	//Get the jump distance to use on loop codes
110	110	lsl r8, r4, #4
111	111	sub r7, r8, #16 //R7 keep the 16*pic_stride-16
112	112	sub r8, r2 //R8 keep the 16*pic_stride-pic_width
113		−
	113	+
114	114	vaa_calc_sad_loop0:
115	115
116	116	//R6 keep the pic_width
117	117	mov r6, r2
118		−
119		−vaa_calc_sad_loop1:
	118	+
	119	+vaa_calc_sad_loop1:
120	120
121	121	//Process the 16x16 bytes
122	122	ABS_SUB_SUM_8x16BYTES r0, r1, r4, q0, q1
123	123	ABS_SUB_SUM_8x16BYTES r0, r1, r4, q2, q3
124		−
	124	+
125	125	//Do the SAD
126	126	SAD_8X16BITS d0, d1, d0
127	127	SAD_8X16BITS d2, d3, d1
128	128	SAD_8X16BITS d4, d5, d2
129		− SAD_8X16BITS d6, d7, d3
130		−
	129	+ SAD_8X16BITS d6, d7, d3
	130	+
131	131	//Write to "psad8x8" buffer
132		− vst4.32 {d0[0],d1[0],d2[0],d3[0]}, [r5]!
133		−
	132	+ vst4.32 {d0[0],d1[0],d2[0],d3[0]}, [r5]!
	133	+
134	134
135	135	//Adjust the input address
136	136	sub r0, r7
137	137	sub r1, r7
138		−
	138	+
139	139	subs r6, #16
140		−
141		− //Save to calculate "psadframe"
	140	+
	141	+ //Save to calculate "psadframe"
142	142	vadd.u32 q0, q1
143	143	vadd.u32 q4, q0
144		−
	144	+
145	145	bne vaa_calc_sad_loop1
146		−
	146	+
147	147	//Adjust the input address
148	148	add r0, r8
149	149	add r1, r8
150		−
	150	+
151	151	subs r3, #16
152		− bne vaa_calc_sad_loop0
153		−
	152	+ bne vaa_calc_sad_loop0
	153	+
154	154	ldr r6, [sp, #24] //load psadframe
155	155	vadd.u32 d8, d9
156	156	vst1.32 {d8[0]}, [r6]
157		−
	157	+
158	158	ldmia sp!, {r4-r8}
159		−
	159	+
160	160	WELS_ASM_FUNC_END
161	161
162	162
@@ -164,12 +164,12 @@ WELS_ASM_FUNC_END · 1 unmodified line
164	164	.macro SAD_SD_MAD_16BYTES
165	165	vld1.32 {q0}, [$0], $2
166	166	vld1.32 {q1}, [$1], $2
167		−
	167	+
168	168	vpadal.u8 $3, q0
169	169	vpadal.u8 $4, q1
170		−
171		− vabd.u8 q0, q0, q1
172		− vmax.u8 $5, q0
	170	+
	171	+ vabd.u8 q0, q0, q1
	172	+ vmax.u8 $5, q0
173	173	vpadal.u8 $6, q0
174	174	.endm
175	175
@@ -177,13 +177,13 @@ WELS_ASM_FUNC_END · 1 unmodified line
177	177	vld1.32 {q0}, [$0], $2
178	178	vld1.32 {q1}, [$1], $2
179	179
180		− vpaddl.u8 q2, q0
	180	+ vpaddl.u8 q2, q0
181	181	vpaddl.u8 q3, q1
182		−
183		− vabd.u8 $3, q0, q1
	182	+
	183	+ vabd.u8 $3, q0, q1
184	184	vpaddl.u8 $4, $3 //abs_diff
185	185
186		−
	186	+
187	187	SAD_SD_MAD_16BYTES $0,$1,$2,q2,q3,$3,$4
188	188	SAD_SD_MAD_16BYTES $0,$1,$2,q2,q3,$3,$4
189	189	SAD_SD_MAD_16BYTES $0,$1,$2,q2,q3,$3,$4
@@ -191,7 +191,7 @@ WELS_ASM_FUNC_END · 1 unmodified line
191	191	SAD_SD_MAD_16BYTES $0,$1,$2,q2,q3,$3,$4
192	192	SAD_SD_MAD_16BYTES $0,$1,$2,q2,q3,$3,$4
193	193	SAD_SD_MAD_16BYTES $0,$1,$2,q2,q3,$3,$4
194		−
	194	+
195	195	vsub.u16 $5, q2, q3
196	196	.endm
197	197
@@ -203,18 +203,18 @@ WELS_ASM_FUNC_END · 5 unmodified lines
203	203	vpaddl.u16 $3, $3
204	204	vpaddl.u32 $3, $3
205	205	vpaddl.s16 $4, $4
206		− vpaddl.s32 $4, $4
	206	+ vpaddl.s32 $4, $4
207	207	.endm
208	208	#else
209		−.macro SAD_SD_MAD_16BYTES arg0, arg1, arg2, arg3, arg4, arg5, arg6
	209	+.macro SAD_SD_MAD_16BYTES arg0, arg1, arg2, arg3, arg4, arg5, arg6
210	210	vld1.32 {q0}, [\arg0], \arg2
211	211	vld1.32 {q1}, [\arg1], \arg2
212		−
	212	+
213	213	vpadal.u8 \arg3, q0
214	214	vpadal.u8 \arg4, q1
215		−
216		− vabd.u8 q0, q0, q1
217		− vmax.u8 \arg5, q0
	215	+
	216	+ vabd.u8 q0, q0, q1
	217	+ vmax.u8 \arg5, q0
218	218	vpadal.u8 \arg6, q0
219	219	.endm
220	220
@@ -222,13 +222,13 @@ WELS_ASM_FUNC_END · 1 unmodified line
222	222	vld1.32 {q0}, [\arg0], \arg2
223	223	vld1.32 {q1}, [\arg1], \arg2
224	224
225		− vpaddl.u8 q2, q0
	225	+ vpaddl.u8 q2, q0
226	226	vpaddl.u8 q3, q1
227		−
228		− vabd.u8 \arg3, q0, q1
	227	+
	228	+ vabd.u8 \arg3, q0, q1
229	229	vpaddl.u8 \arg4, \arg3 //abs_diff
230	230
231		−
	231	+
232	232	SAD_SD_MAD_16BYTES \arg0,\arg1,\arg2,q2,q3,\arg3,\arg4
233	233	SAD_SD_MAD_16BYTES \arg0,\arg1,\arg2,q2,q3,\arg3,\arg4
234	234	SAD_SD_MAD_16BYTES \arg0,\arg1,\arg2,q2,q3,\arg3,\arg4
@@ -236,7 +236,7 @@ WELS_ASM_FUNC_END · 1 unmodified line
236	236	SAD_SD_MAD_16BYTES \arg0,\arg1,\arg2,q2,q3,\arg3,\arg4
237	237	SAD_SD_MAD_16BYTES \arg0,\arg1,\arg2,q2,q3,\arg3,\arg4
238	238	SAD_SD_MAD_16BYTES \arg0,\arg1,\arg2,q2,q3,\arg3,\arg4
239		−
	239	+
240	240	vsub.u16 \arg5, q2, q3
241	241	.endm
242	242
@@ -248,69 +248,69 @@ WELS_ASM_FUNC_END · 5 unmodified lines
248	248	vpaddl.u16 \arg3, \arg3
249	249	vpaddl.u32 \arg3, \arg3
250	250	vpaddl.s16 \arg4, \arg4
251		− vpaddl.s32 \arg4, \arg4
	251	+ vpaddl.s32 \arg4, \arg4
252	252	.endm
253	253	#endif
254	254
255		−WELS_ASM_FUNC_BEGIN vaa_calc_sad_bgd_neon
	255	+WELS_ASM_FUNC_BEGIN VAACalcSadBgd_neon
256	256
257	257	stmdb sp!, {r4-r10}
258		−
	258	+
259	259	ldr r4, [sp, #28] //load pic_stride
260	260	ldr r5, [sp, #36] //load psad8x8
261	261	ldr r6, [sp, #40] //load psd8x8
262	262	ldr r7, [sp, #44] //load pmad8x8
263		−
	263	+
264	264	//Initial the Q4 register for save the "psadframe"
265	265	vmov.s64 q15, #0
266		−
	266	+
267	267	//Get the jump distance to use on loop codes
268	268	lsl r10, r4, #4
269	269	sub r9, r10, #16 //R9 keep the 16*pic_stride-16
270	270	sub r10, r2 //R10 keep the 16*pic_stride-pic_width
271		−
	271	+
272	272	vaa_calc_sad_bgd_loop0:
273	273
274	274	//R6 keep the pic_width
275	275	mov r8, r2
276		−
277		−vaa_calc_sad_bgd_loop1:
	276	+
	277	+vaa_calc_sad_bgd_loop1:
278	278
279	279	//Process the 16x16 bytes pmad psad psd
280	280	SAD_SD_MAD_8x16BYTES r0, r1, r4, q13, q11, q9
281	281	SAD_SD_MAD_8x16BYTES r0, r1, r4, q14, q12, q10
282		−
	282	+
283	283	SAD_SD_MAD_CALC d26, d27, d16, q11, q9
284		− SAD_SD_MAD_CALC d28, d29, d17, q12, q10
	284	+ SAD_SD_MAD_CALC d28, d29, d17, q12, q10
285	285
286	286	//Write to "psad8x8" buffer
287		− vst4.32 {d22[0],d23[0],d24[0],d25[0]}, [r5]!
	287	+ vst4.32 {d22[0],d23[0],d24[0],d25[0]}, [r5]!
288	288	//Adjust the input address
289	289	sub r0, r9
290	290	sub r1, r9
291	291	//Write to "psd8x8" buffer
292		− vst4.32 {d18[0],d19[0],d20[0],d21[0]}, [r6]!
	292	+ vst4.32 {d18[0],d19[0],d20[0],d21[0]}, [r6]!
293	293	subs r8, #16
294	294	//Write to "pmad8x8" buffer
295		− vst2.16 {d16[0],d17[0]}, [r7]!
296		− //Save to calculate "psadframe"
	295	+ vst2.16 {d16[0],d17[0]}, [r7]!
	296	+ //Save to calculate "psadframe"
297	297	vadd.u32 q11, q12
298	298	vadd.u32 q15, q11
299		−
	299	+
300	300	bne vaa_calc_sad_bgd_loop1
301		−
	301	+
302	302	//Adjust the input address
303	303	add r0, r10
304	304	add r1, r10
305		−
	305	+
306	306	subs r3, #16
307		− bne vaa_calc_sad_bgd_loop0
308		−
	307	+ bne vaa_calc_sad_bgd_loop0
	308	+
309	309	ldr r8, [sp, #32] //load psadframe
310	310	vadd.u32 d30, d31
311		− vst1.32 {d30[0]}, [r8]
	311	+ vst1.32 {d30[0]}, [r8]
312	312	ldmia sp!, {r4-r10}
313		−
	313	+
314	314	WELS_ASM_FUNC_END
315	315
316	316
@@ -318,7 +318,7 @@ WELS_ASM_FUNC_END · 1 unmodified line
318	318	.macro SSD_MUL_SUM_16BYTES_RESET
319	319	vmull.u8 $3, $0, $0
320	320	vpaddl.u16 $2, $3
321		−
	321	+
322	322	vmull.u8 $3, $1, $1
323	323	vpadal.u16 $2, $3
324	324	.endm
@@ -326,71 +326,71 @@ WELS_ASM_FUNC_END · 1 unmodified line
326	326	.macro SSD_MUL_SUM_16BYTES
327	327	vmull.u8 $3, $0, $0
328	328	vpadal.u16 $2, $3
329		−
	329	+
330	330	vmull.u8 $3, $1, $1
331	331	vpadal.u16 $2, $3
332	332	.endm
333	333
334	334	.macro SAD_SSD_BGD_16
335	335	vld1.8 {q0}, [$0], $2 //load cur_row
336		−
	336	+
337	337	vpadal.u8 q3, q0 //add cur_row together
338	338	vpadal.u8 q4, q1 //add ref_row together
339		−
	339	+
340	340	vabd.u8 q2, q0, q1 //abs_diff
341		−
	341	+
342	342	vmax.u8 q5, q2 //l_mad for 16 bytes reset for every 8x16
343		−
	343	+
344	344	vpadal.u8 $3, q2 //l_sad for 16 bytes reset for every 8x16
345		−
	345	+
346	346	SSD_MUL_SUM_16BYTES d4,d5, q8, q11 //q8 for l_sqiff reset for every 16x16
347		−
	347	+
348	348	vld1.8 {q1}, [$1], $2 //load ref_row
349	349	vpadal.u8 q9, q0 //q9 for l_sum reset for every 16x16
350		−
	350	+
351	351	SSD_MUL_SUM_16BYTES d0,d1, q10, q11 //q10 for lsqsum reset for every 16x16
352	352	.endm
353	353
354	354	//the last row of a 16x16 block
355	355	.macro SAD_SSD_BGD_16_end
356	356	vld1.8 {q0}, [$0], $1 //load cur_row
357		−
	357	+
358	358	vpadal.u8 q3, q0 //add cur_row together
359	359	vpadal.u8 q4, q1 //add ref_row together
360		−
	360	+
361	361	vabd.u8 q2, q0, q1 //abs_diff
362		−
	362	+
363	363	vmax.u8 q5, q2 //l_mad for 16 bytes reset for every 8x16
364		−
	364	+
365	365	vpadal.u8 $2, q2 //l_sad for 16 bytes reset for every 8x16
366		−
	366	+
367	367	SSD_MUL_SUM_16BYTES d4,d5, q8, q11 //q8 for l_sqiff reset for every 16x16
368		−
	368	+
369	369	vpadal.u8 q9, q0 //q9 for l_sum reset for every 16x16
370		−
	370	+
371	371	SSD_MUL_SUM_16BYTES d0,d1, q10, q11 //q10 for lsqsum reset for every 16x16
372	372	.endm
373	373
374	374	//for the begin of a 8x16 block, use some instructions to reset the register
375	375	.macro SAD_SSD_BGD_16_RESET_8x8
376	376	vld1.8 {q0}, [$0], $2 //load cur_row
377		−
	377	+
378	378	vpaddl.u8 q3, q0 //add cur_row together
379	379	vpaddl.u8 q4, q1 //add ref_row together
380		−
	380	+
381	381	vabd.u8 q2, q0, q1 //abs_diff
382		−
	382	+
383	383	vmov q5,q2 //calculate max and avoid reset to zero, l_mad for 16 bytes reset for every 8x16
384		−
	384	+
385	385	vpaddl.u8 $3, q2 //l_sad for 16 bytes reset for every 8x16
386		−
387		−
	386	+
	387	+
388	388	SSD_MUL_SUM_16BYTES d4,d5, q8, q11 //q8 for l_sqiff reset for every 16x16
389		−
	389	+
390	390	vld1.8 {q1}, [$1], $2 //load ref_row
391		−
	391	+
392	392	vpadal.u8 q9, q0 //q9 for l_sum reset for every 16x16
393		−
	393	+
394	394	SSD_MUL_SUM_16BYTES d0,d1, q10, q11 //q10 for lsqsum reset for every 16x16
395	395	.endm
396	396
@@ -398,18 +398,18 @@ WELS_ASM_FUNC_END · 1 unmodified line
398	398	.macro SAD_SSD_BGD_16_RESET_16x16
399	399	vld1.8 {q0}, [$0], $2 //load cur_row
400	400	vld1.8 {q1}, [$1], $2 //load ref_row
401		−
	401	+
402	402	vpaddl.u8 q3, q0 //add cur_row together
403	403	vpaddl.u8 q4, q1 //add ref_row together
404		−
	404	+
405	405	vabd.u8 q2, q0, q1 //abs_diff
406		−
	406	+
407	407	vmov q5,q2 //calculate max and avoid reset to zero, l_mad for 16 bytes reset for every 8x16
408		−
	408	+
409	409	vpaddl.u8 $3, q2 //l_sad for 16 bytes reset for every 8x16
410		−
	410	+
411	411	SSD_MUL_SUM_16BYTES_RESET d4,d5,q8, q11 //q8 for l_sqiff reset for every 16x16
412		−
	412	+
413	413	vld1.8 {q1}, [$1], $2 //load ref_row
414	414
415	415	vpaddl.u8 q9, q0 //q9 for l_sum reset for every 16x16
@@ -419,24 +419,24 @@ WELS_ASM_FUNC_END · 3 unmodified lines
419	419
420	420	//for each 8x16 block
421	421	.macro SAD_SSD_BGD_CALC_8x16
422		−
	422	+
423	423	vpmax.u8 d10, d10, d11 //4 numbers
424	424	vpmax.u8 d10, d10, d10 //2 numbers
425	425	vpmax.u8 d10, d10, d10 //1 number1
426		−
	426	+
427	427	vmov $0, d10 //d26 d27 keeps the l_mad
428		−
	428	+
429	429	//p_sd8x8 fix me
430		− vpaddl.u16 q3, q3
	430	+ vpaddl.u16 q3, q3
431	431	vpaddl.u16 q4, q4
432		−
	432	+
433	433	vsub.i32 $1, q3, q4
434	434	vpaddl.u32 $1, $1
435		−
	435	+
436	436	//psad8x8
437	437	vpaddl.u16 $2, $2
438	438	vpaddl.u32 $2, $2
439		−
	439	+
440	440	//psadframe
441	441	vadd.i32 q12, $2
442	442	.endm
@@ -451,9 +451,9 @@ WELS_ASM_FUNC_END · 8 unmodified lines
451	451	SAD_SSD_BGD_16 $0, $1, $2, q6
452	452	SAD_SSD_BGD_16 $0, $1, $2, q6
453	453	SAD_SSD_BGD_16 $0, $1, $2, q6
454		−
	454	+
455	455	SAD_SSD_BGD_CALC_8x16 d26, q14, q6
456		−
	456	+
457	457	//for another 8x16
458	458	SAD_SSD_BGD_16_RESET_8x8 $0, $1, $2, q7
459	459	SAD_SSD_BGD_16 $0, $1, $2, q7
@@ -463,20 +463,20 @@ WELS_ASM_FUNC_END · 3 unmodified lines
463	463	SAD_SSD_BGD_16 $0, $1, $2, q7
464	464	SAD_SSD_BGD_16 $0, $1, $2, q7
465	465	SAD_SSD_BGD_16_end $0, $2, q7
466		−
	466	+
467	467	SAD_SSD_BGD_CALC_8x16 d27, q15, q7
468	468	.endm
469	469
470		−.macro SSD_SAD_SD_MAD_PADDL
	470	+.macro SSD_SAD_SD_MAD_PADDL
471	471	vpaddl.s16 $0, $0
472		− vpaddl.s32 $0, $0
473		− vadd.i32 $1, $1, $2
	472	+ vpaddl.s32 $0, $0
	473	+ vadd.i32 $1, $1, $2
474	474	.endm
475	475	#else
476	476	.macro SSD_MUL_SUM_16BYTES_RESET arg0, arg1, arg2, arg3
477	477	vmull.u8 \arg3, \arg0, \arg0
478	478	vpaddl.u16 \arg2, \arg3
479		−
	479	+
480	480	vmull.u8 \arg3, \arg1, \arg1
481	481	vpadal.u16 \arg2, \arg3
482	482	.endm
@@ -484,71 +484,71 @@ WELS_ASM_FUNC_END · 1 unmodified line
484	484	.macro SSD_MUL_SUM_16BYTES arg0, arg1, arg2, arg3
485	485	vmull.u8 \arg3, \arg0, \arg0
486	486	vpadal.u16 \arg2, \arg3
487		−
	487	+
488	488	vmull.u8 \arg3, \arg1, \arg1
489	489	vpadal.u16 \arg2, \arg3
490	490	.endm
491	491
492	492	.macro SAD_SSD_BGD_16 arg0, arg1, arg2, arg3
493	493	vld1.8 {q0}, [\arg0], \arg2 //load cur_row
494		−
	494	+
495	495	vpadal.u8 q3, q0 //add cur_row together
496	496	vpadal.u8 q4, q1 //add ref_row together
497		−
	497	+
498	498	vabd.u8 q2, q0, q1 //abs_diff
499		−
	499	+
500	500	vmax.u8 q5, q2 //l_mad for 16 bytes reset for every 8x16
501		−
	501	+
502	502	vpadal.u8 \arg3, q2 //l_sad for 16 bytes reset for every 8x16
503		−
	503	+
504	504	SSD_MUL_SUM_16BYTES d4,d5, q8, q11 //q8 for l_sqiff reset for every 16x16
505		−
	505	+
506	506	vld1.8 {q1}, [\arg1], \arg2 //load ref_row
507	507	vpadal.u8 q9, q0 //q9 for l_sum reset for every 16x16
508		−
	508	+
509	509	SSD_MUL_SUM_16BYTES d0,d1, q10, q11 //q10 for lsqsum reset for every 16x16
510	510	.endm
511	511
512	512	//the last row of a 16x16 block
513	513	.macro SAD_SSD_BGD_16_end arg0, arg1, arg2
514	514	vld1.8 {q0}, [\arg0], \arg1 //load cur_row
515		−
	515	+
516	516	vpadal.u8 q3, q0 //add cur_row together
517	517	vpadal.u8 q4, q1 //add ref_row together
518		−
	518	+
519	519	vabd.u8 q2, q0, q1 //abs_diff
520		−
	520	+
521	521	vmax.u8 q5, q2 //l_mad for 16 bytes reset for every 8x16
522		−
	522	+
523	523	vpadal.u8 \arg2, q2 //l_sad for 16 bytes reset for every 8x16
524		−
	524	+
525	525	SSD_MUL_SUM_16BYTES d4,d5, q8, q11 //q8 for l_sqiff reset for every 16x16
526		−
	526	+
527	527	vpadal.u8 q9, q0 //q9 for l_sum reset for every 16x16
528		−
	528	+
529	529	SSD_MUL_SUM_16BYTES d0,d1, q10, q11 //q10 for lsqsum reset for every 16x16
530	530	.endm
531	531
532	532	//for the begin of a 8x16 block, use some instructions to reset the register
533	533	.macro SAD_SSD_BGD_16_RESET_8x8 arg0, arg1, arg2, arg3
534	534	vld1.8 {q0}, [\arg0], \arg2 //load cur_row
535		−
	535	+
536	536	vpaddl.u8 q3, q0 //add cur_row together
537	537	vpaddl.u8 q4, q1 //add ref_row together
538		−
	538	+
539	539	vabd.u8 q2, q0, q1 //abs_diff
540		−
	540	+
541	541	vmov q5,q2 //calculate max and avoid reset to zero, l_mad for 16 bytes reset for every 8x16
542		−
	542	+
543	543	vpaddl.u8 \arg3, q2 //l_sad for 16 bytes reset for every 8x16
544		−
545		−
	544	+
	545	+
546	546	SSD_MUL_SUM_16BYTES d4,d5, q8, q11 //q8 for l_sqiff reset for every 16x16
547		−
	547	+
548	548	vld1.8 {q1}, [\arg1], \arg2 //load ref_row
549		−
	549	+
550	550	vpadal.u8 q9, q0 //q9 for l_sum reset for every 16x16
551		−
	551	+
552	552	SSD_MUL_SUM_16BYTES d0,d1, q10, q11 //q10 for lsqsum reset for every 16x16
553	553	.endm
554	554
@@ -556,18 +556,18 @@ WELS_ASM_FUNC_END · 1 unmodified line
556	556	.macro SAD_SSD_BGD_16_RESET_16x16 arg0, arg1, arg2, arg3
557	557	vld1.8 {q0}, [\arg0], \arg2 //load cur_row
558	558	vld1.8 {q1}, [\arg1], \arg2 //load ref_row
559		−
	559	+
560	560	vpaddl.u8 q3, q0 //add cur_row together
561	561	vpaddl.u8 q4, q1 //add ref_row together
562		−
	562	+
563	563	vabd.u8 q2, q0, q1 //abs_diff
564		−
	564	+
565	565	vmov q5,q2 //calculate max and avoid reset to zero, l_mad for 16 bytes reset for every 8x16
566		−
	566	+
567	567	vpaddl.u8 \arg3, q2 //l_sad for 16 bytes reset for every 8x16
568		−
	568	+
569	569	SSD_MUL_SUM_16BYTES_RESET d4,d5,q8, q11 //q8 for l_sqiff reset for every 16x16
570		−
	570	+
571	571	vld1.8 {q1}, [\arg1], \arg2 //load ref_row
572	572
573	573	vpaddl.u8 q9, q0 //q9 for l_sum reset for every 16x16
@@ -577,24 +577,24 @@ WELS_ASM_FUNC_END · 3 unmodified lines
577	577
578	578	//for each 8x16 block
579	579	.macro SAD_SSD_BGD_CALC_8x16 arg0, arg1, arg2
580		−
	580	+
581	581	vpmax.u8 d10, d10, d11 //4 numbers
582	582	vpmax.u8 d10, d10, d10 //2 numbers
583	583	vpmax.u8 d10, d10, d10 //1 number1
584		−
	584	+
585	585	vmov \arg0, d10 //d26 d27 keeps the l_mad
586		−
	586	+
587	587	//p_sd8x8
588		− vpaddl.u16 q3, q3
	588	+ vpaddl.u16 q3, q3
589	589	vpaddl.u16 q4, q4
590		−
	590	+
591	591	vsub.i32 \arg1, q3, q4
592	592	vpaddl.u32 \arg1, \arg1
593		−
	593	+
594	594	//psad8x8
595	595	vpaddl.u16 \arg2, \arg2
596	596	vpaddl.u32 \arg2, \arg2
597		−
	597	+
598	598	//psadframe
599	599	vadd.i32 q12, \arg2
600	600	.endm
@@ -609,9 +609,9 @@ WELS_ASM_FUNC_END · 8 unmodified lines
609	609	SAD_SSD_BGD_16 \arg0, \arg1, \arg2, q6
610	610	SAD_SSD_BGD_16 \arg0, \arg1, \arg2, q6
611	611	SAD_SSD_BGD_16 \arg0, \arg1, \arg2, q6
612		−
	612	+
613	613	SAD_SSD_BGD_CALC_8x16 d26, q14, q6
614		−
	614	+
615	615	//for another 8x16
616	616	SAD_SSD_BGD_16_RESET_8x8 \arg0, \arg1, \arg2, q7
617	617	SAD_SSD_BGD_16 \arg0, \arg1, \arg2, q7
@@ -621,160 +621,160 @@ WELS_ASM_FUNC_END · 3 unmodified lines
621	621	SAD_SSD_BGD_16 \arg0, \arg1, \arg2, q7
622	622	SAD_SSD_BGD_16 \arg0, \arg1, \arg2, q7
623	623	SAD_SSD_BGD_16_end \arg0, \arg2, q7
624		−
	624	+
625	625	SAD_SSD_BGD_CALC_8x16 d27, q15, q7
626	626	.endm
627	627
628		−.macro SSD_SAD_SD_MAD_PADDL arg0, arg1, arg2
	628	+.macro SSD_SAD_SD_MAD_PADDL arg0, arg1, arg2
629	629	vpaddl.s16 \arg0, \arg0
630		− vpaddl.s32 \arg0, \arg0
631		− vadd.i32 \arg1, \arg1, \arg2
	630	+ vpaddl.s32 \arg0, \arg0
	631	+ vadd.i32 \arg1, \arg1, \arg2
632	632	.endm
633	633	#endif
634	634
635	635
636		−WELS_ASM_FUNC_BEGIN vaa_calc_sad_ssd_bgd_neon
	636	+WELS_ASM_FUNC_BEGIN VAACalcSadSsdBgd_neon
637	637	stmdb sp!, {r0-r12, r14}
638		−
	638	+
639	639	ldr r4, [sp, #56] //r4 keeps the pic_stride
640		−
	640	+
641	641	sub r5, r4, #1
642	642	lsl r5, r5, #4 //r5 keeps the little step
643		−
	643	+
644	644	lsl r6, r4, #4
645	645	sub r6, r2, r6 //r6 keeps the big step
646		−
647		−
	646	+
	647	+
648	648	ldr r8, [sp, #64]//psad8x8
649	649	ldr r9, [sp, #68]//psum16x16
650	650	ldr r10, [sp, #72]//psqsum16x16
651	651	ldr r11, [sp, #76]//psqdiff16x16
652	652	ldr r12, [sp, #80]//p_sd8x8
653	653	ldr r14, [sp, #84]//p_mad8x8
654		−
	654	+
655	655	vmov.i8 q12, #0
656		−
	656	+
657	657	vaa_calc_sad_ssd_bgd_height_loop:
658	658
659	659	mov r7, r2
660	660	vaa_calc_sad_ssd_bgd_width_loop:
661		−
	661	+
662	662	//l_sd q14&q15, l_mad q13, l_sad q6 & q7, l_sqdiff q8, l_sum q9, l_sqsum q10
663	663	SAD_SSD_BGD_16x16 r0,r1,r4
664		−
	664	+
665	665	//psad8x8
666	666	vst4.32 {d12[0], d13[0], d14[0], d15[0]}, [r8]!
667		−
	667	+
668	668	sub r0, r0, r5 //jump to next 16x16
669	669	sub r1, r1, r5 //jump to next 16x16
670		−
	670	+
671	671	//p_sd8x8
672	672	vst4.32 {d28[0], d29[0],d30[0], d31[0]}, [r12]!
673	673
674	674	//p_mad8x8
675	675	vst2.16 {d26[0], d27[0]}, [r14]!
676		−
	676	+
677	677	//psqdiff16x16
678		− vpaddl.s32 q8, q8
	678	+ vpaddl.s32 q8, q8
679	679	vadd.i32 d16, d16, d17
680		−
	680	+
681	681	vst1.32 {d16[0]}, [r11]! //psqdiff16x16
682		−
	682	+
683	683	//psum16x16
684	684	SSD_SAD_SD_MAD_PADDL q9, d18, d19
685	685	vst1.32 {d18[0]}, [r9]! //psum16x16
686	686
687	687	//psqsum16x16
688		− vpaddl.s32 q10, q10
689		− vadd.i32 d20, d20, d21
	688	+ vpaddl.s32 q10, q10
	689	+ vadd.i32 d20, d20, d21
690	690	vst1.32 {d20[0]}, [r10]! //psqsum16x16
691		−
	691	+
692	692	subs r7, #16
693		−
	693	+
694	694	bne vaa_calc_sad_ssd_bgd_width_loop
695		−
	695	+
696	696	sub r0, r0, r6 //jump to next 16 x width
697	697	sub r1, r1, r6 //jump to next 16 x width
698		−
	698	+
699	699	subs r3, #16
700	700	bne vaa_calc_sad_ssd_bgd_height_loop
701		−
	701	+
702	702	//psadframe
703	703	ldr r7, [sp, #60]//psadframe
704		−
	704	+
705	705	vadd.i32 d24, d24, d25
706	706	vst1.32 {d24[0]}, [r7]
707		−
	707	+
708	708	ldmia sp!, {r0-r12, r14}
709		−
	709	+
710	710	WELS_ASM_FUNC_END
711	711
712	712
713	713	#ifdef APPLE_IOS
714	714	.macro SAD_VAR_16
715	715	vld1.8 {q0}, [$0], $2 //load cur_row
716		−
	716	+
717	717	vpadal.u8 q3, q0 //add cur_row together
718	718	vpadal.u8 q4, q1 //add ref_row together
719		−
	719	+
720	720	vabd.u8 q2, q0, q1 //abs_diff
721		−
	721	+
722	722	vpadal.u8 $3, q2 //l_sad for 16 bytes reset for every 8x16
723		−
	723	+
724	724	vld1.8 {q1}, [$1], $2
725		−
	725	+
726	726	vpadal.u8 q9, q0 //q9 for l_sum reset for every 16x16
727		−
	727	+
728	728	SSD_MUL_SUM_16BYTES d0,d1, q10, q11 //q10 for lsqsum reset for every 16x16
729	729	.endm
730	730
731	731	.macro SAD_VAR_16_END
732	732	vld1.8 {q0}, [$0], $1 //load cur_row
733		−
	733	+
734	734	vpadal.u8 q3, q0 //add cur_row together
735	735	vpadal.u8 q4, q1 //add ref_row together
736		−
	736	+
737	737	vabd.u8 q2, q0, q1 //abs_diff
738		−
	738	+
739	739	vpadal.u8 $2, q2 //l_sad for 16 bytes reset for every 8x16
740		−
	740	+
741	741	vpadal.u8 q9, q0 //q9 for l_sum reset for every 16x16
742		−
	742	+
743	743	SSD_MUL_SUM_16BYTES d0,d1, q10, q11 //q10 for lsqsum reset for every 16x16
744	744	.endm
745	745
746	746	.macro SAD_VAR_16_RESET_16x16
747	747	vld1.8 {q0}, [$0], $2 //load cur_row
748	748	vld1.8 {q1}, [$1], $2
749		−
	749	+
750	750	vpaddl.u8 q3, q0 //add cur_row together
751	751	vpaddl.u8 q4, q1 //add ref_row together
752		−
	752	+
753	753	vabd.u8 q2, q0, q1 //abs_diff
754		−
	754	+
755	755	vpaddl.u8 $3, q2 //l_sad for 16 bytes reset for every 8x16
756		−
	756	+
757	757	vld1.8 {q1}, [$1], $2
758		−
	758	+
759	759	vpaddl.u8 q9, q0 //q9 for l_sum reset for every 16x16
760		−
	760	+
761	761	SSD_MUL_SUM_16BYTES_RESET d0,d1, q10, q11
762	762	.endm
763	763
764	764	.macro SAD_VAR_16_RESET_8x8
765	765	vld1.8 {q0}, [$0], $2 //load cur_row
766		−
	766	+
767	767	vpaddl.u8 q3, q0 //add cur_row together
768	768	vpaddl.u8 q4, q1 //add ref_row together
769		−
	769	+
770	770	vabd.u8 q2, q0, q1 //abs_diff
771		−
	771	+
772	772	vpaddl.u8 $3, q2 //l_sad for 16 bytes reset for every 8x16
773		−
	773	+
774	774	vld1.8 {q1}, [$1], $2
775		−
	775	+
776	776	vpadal.u8 q9, q0 //q9 for l_sum reset for every 16x16
777		−
	777	+
778	778	SSD_MUL_SUM_16BYTES d0,d1, q10, q11 //q10 for lsqsum reset for every 16x16
779	779	.endm
780	780
@@ -788,7 +788,7 @@ WELS_ASM_FUNC_END · 7 unmodified lines
788	788	SAD_VAR_16 $0, $1, $2, q6
789	789	SAD_VAR_16 $0, $1, $2, q6
790	790	SAD_VAR_16 $0, $1, $2, q6
791		−
	791	+
792	792	vpaddl.u16 q6, q6
793	793	vpaddl.u32 q6, q6
794	794	vadd.i32 q12, q6
@@ -802,42 +802,42 @@ WELS_ASM_FUNC_END · 7 unmodified lines
802	802	SAD_VAR_16 $0, $1, $2, q7
803	803	SAD_VAR_16 $0, $1, $2, q7
804	804	SAD_VAR_16_END $0, $2, q7
805		−
	805	+
806	806	vpaddl.u16 q7, q7
807	807	vpaddl.u32 q7, q7
808		−
	808	+
809	809	vadd.i32 q12, q7
810	810	.endm
811	811	#else
812	812	.macro SAD_VAR_16 arg0, arg1, arg2, arg3
813	813	vld1.8 {q0}, [\arg0], \arg2 //load cur_row
814		−
	814	+
815	815	vpadal.u8 q3, q0 //add cur_row together
816	816	vpadal.u8 q4, q1 //add ref_row together
817		−
	817	+
818	818	vabd.u8 q2, q0, q1 //abs_diff
819		−
	819	+
820	820	vpadal.u8 \arg3, q2 //l_sad for 16 bytes reset for every 8x16
821		−
	821	+
822	822	vld1.8 {q1}, [\arg1], \arg2
823		−
	823	+
824	824	vpadal.u8 q9, q0 //q9 for l_sum reset for every 16x16
825		−
	825	+
826	826	SSD_MUL_SUM_16BYTES d0,d1, q10, q11 //q10 for lsqsum reset for every 16x16
827	827	.endm
828	828
829	829	.macro SAD_VAR_16_END arg0, arg1, arg2
830	830	vld1.8 {q0}, [\arg0], \arg1 //load cur_row
831		−
	831	+
832	832	vpadal.u8 q3, q0 //add cur_row together
833	833	vpadal.u8 q4, q1 //add ref_row together
834		−
	834	+
835	835	vabd.u8 q2, q0, q1 //abs_diff
836		−
	836	+
837	837	vpadal.u8 \arg2, q2 //l_sad for 16 bytes reset for every 8x16
838		−
	838	+
839	839	vpadal.u8 q9, q0 //q9 for l_sum reset for every 16x16
840		−
	840	+
841	841	SSD_MUL_SUM_16BYTES d0,d1, q10, q11 //q10 for lsqsum reset for every 16x16
842	842	.endm
843	843
@@ -845,35 +845,35 @@ WELS_ASM_FUNC_END · 1 unmodified line
845	845	.macro SAD_VAR_16_RESET_16x16 arg0, arg1, arg2, arg3
846	846	vld1.8 {q0}, [\arg0], \arg2 //load cur_row
847	847	vld1.8 {q1}, [\arg1], \arg2
848		−
	848	+
849	849	vpaddl.u8 q3, q0 //add cur_row together
850	850	vpaddl.u8 q4, q1 //add ref_row together
851		−
	851	+
852	852	vabd.u8 q2, q0, q1 //abs_diff
853		−
	853	+
854	854	vpaddl.u8 \arg3, q2 //l_sad for 16 bytes reset for every 8x16
855		−
	855	+
856	856	vld1.8 {q1}, [\arg1], \arg2
857		−
	857	+
858	858	vpaddl.u8 q9, q0 //q9 for l_sum reset for every 16x16
859		−
	859	+
860	860	SSD_MUL_SUM_16BYTES_RESET d0,d1, q10, q11
861	861	.endm
862	862
863	863	.macro SAD_VAR_16_RESET_8x8 arg0, arg1, arg2, arg3
864	864	vld1.8 {q0}, [\arg0], \arg2 //load cur_row
865		−
	865	+
866	866	vpaddl.u8 q3, q0 //add cur_row together
867	867	vpaddl.u8 q4, q1 //add ref_row together
868		−
	868	+
869	869	vabd.u8 q2, q0, q1 //abs_diff
870		−
	870	+
871	871	vpaddl.u8 \arg3, q2 //l_sad for 16 bytes reset for every 8x16
872		−
	872	+
873	873	vld1.8 {q1}, [\arg1], \arg2
874		−
	874	+
875	875	vpadal.u8 q9, q0 //q9 for l_sum reset for every 16x16
876		−
	876	+
877	877	SSD_MUL_SUM_16BYTES d0,d1, q10, q11 //q10 for lsqsum reset for every 16x16
878	878	.endm
879	879
@@ -887,7 +887,7 @@ WELS_ASM_FUNC_END · 7 unmodified lines
887	887	SAD_VAR_16 \arg0, \arg1, \arg2, q6
888	888	SAD_VAR_16 \arg0, \arg1, \arg2, q6
889	889	SAD_VAR_16 \arg0, \arg1, \arg2, q6
890		−
	890	+
891	891	vpaddl.u16 q6, q6
892	892	vpaddl.u32 q6, q6
893	893	vadd.i32 q12, q6
@@ -901,26 +901,26 @@ WELS_ASM_FUNC_END · 7 unmodified lines
901	901	SAD_VAR_16 \arg0, \arg1, \arg2, q7
902	902	SAD_VAR_16 \arg0, \arg1, \arg2, q7
903	903	SAD_VAR_16_END \arg0, \arg2, q7
904		−
	904	+
905	905	vpaddl.u16 q7, q7
906	906	vpaddl.u32 q7, q7
907		−
	907	+
908	908	vadd.i32 q12, q7
909	909	.endm
910	910	#endif
911	911
912	912
913		−WELS_ASM_FUNC_BEGIN vaa_calc_sad_var_neon
	913	+WELS_ASM_FUNC_BEGIN VAACalcSadVar_neon
914	914	stmdb sp!, {r4-r11}
915		−
	915	+
916	916	ldr r4, [sp, #32] //r4 keeps the pic_stride
917		−
	917	+
918	918	sub r5, r4, #1
919	919	lsl r5, r5, #4 //r5 keeps the little step
920		−
	920	+
921	921	lsl r6, r4, #4
922	922	sub r6, r2, r6 //r6 keeps the big step
923		−
	923	+
924	924	ldr r7, [sp, #36] //psadframe
925	925	ldr r8, [sp, #40] //psad8x8
926	926	ldr r9, [sp, #44] //psum16x16
@@ -936,25 +936,25 @@ vaa_calc_sad_var_width_loop: · 9 unmodified lines
936	936	SAD_VAR_16x16 r0,r1,r4
937	937	//psad8x8
938	938	vst4.32 {d12[0], d13[0], d14[0], d15[0]}, [r8]!
939		−
	939	+
940	940	sub r0, r0, r5 //jump to next 16x16
941	941	sub r1, r1, r5 //jump to next 16x16
942		−
	942	+
943	943	//psum16x16
944	944	SSD_SAD_SD_MAD_PADDL q9, d18, d19
945	945	vst1.32 {d18[0]}, [r9]! //psum16x16
946		−
	946	+
947	947	//psqsum16x16
948		− vpaddl.s32 q10, q10
	948	+ vpaddl.s32 q10, q10
949	949	subs r11, #16
950		− vadd.i32 d20, d20, d21
	950	+ vadd.i32 d20, d20, d21
951	951	vst1.32 {d20[0]}, [r10]! //psqsum16x16
952		−
	952	+
953	953	bne vaa_calc_sad_var_width_loop
954		−
	954	+
955	955	sub r0, r0, r6 //jump to next 16 x width
956	956	sub r1, r1, r6 //jump to next 16 x width
957		−
	957	+
958	958	subs r3, #16
959	959	bne vaa_calc_sad_var_height_loop
960	960
@@ -968,25 +968,25 @@ WELS_ASM_FUNC_END · 7 unmodified lines
968	968	#ifdef APPLE_IOS
969	969	.macro SAD_SSD_16
970	970	SAD_VAR_16 $0, $1, $2, $3
971		−
	971	+
972	972	SSD_MUL_SUM_16BYTES d4,d5,q8, q11
973	973	.endm
974	974
975	975	.macro SAD_SSD_16_END
976	976	SAD_VAR_16_END $0, $1, $2, $3
977		−
	977	+
978	978	SSD_MUL_SUM_16BYTES d4,d5,q8, q11 //q8 for l_sqiff reset for every 16x16
979	979	.endm
980	980
981	981	.macro SAD_SSD_16_RESET_16x16
982	982	SAD_VAR_16_RESET_16x16 $0, $1, $2, $3
983		−
	983	+
984	984	SSD_MUL_SUM_16BYTES_RESET d4,d5,q8, q11 //q8 for l_sqiff reset for every 16x16
985	985	.endm
986	986
987	987	.macro SAD_SSD_16_RESET_8x8
988	988	SAD_VAR_16_RESET_8x8 $0, $1, $2, $3
989		−
	989	+
990	990	SSD_MUL_SUM_16BYTES d4,d5,q8, q11 //q8 for l_sqiff reset for every 16x16
991	991	.endm
992	992
@@ -1000,7 +1000,7 @@ WELS_ASM_FUNC_END · 7 unmodified lines
1000	1000	SAD_SSD_16 $0, $1, $2, q6
1001	1001	SAD_SSD_16 $0, $1, $2, q6
1002	1002	SAD_SSD_16 $0, $1, $2, q6
1003		−
	1003	+
1004	1004	vpaddl.u16 q6, q6
1005	1005	vpaddl.u32 q6, q6
1006	1006	vadd.i32 q12, q6
@@ -1014,34 +1014,34 @@ WELS_ASM_FUNC_END · 7 unmodified lines
1014	1014	SAD_SSD_16 $0, $1, $2, q7
1015	1015	SAD_SSD_16 $0, $1, $2, q7
1016	1016	SAD_SSD_16_END $0, $2, q7
1017		−
	1017	+
1018	1018	vpaddl.u16 q7, q7
1019	1019	vpaddl.u32 q7, q7
1020		−
	1020	+
1021	1021	vadd.i32 q12, q7
1022	1022	.endm
1023	1023	#else
1024	1024	.macro SAD_SSD_16 arg0, arg1, arg2, arg3
1025	1025	SAD_VAR_16 \arg0, \arg1, \arg2, \arg3
1026		−
	1026	+
1027	1027	SSD_MUL_SUM_16BYTES d4,d5,q8, q11
1028	1028	.endm
1029	1029
1030	1030	.macro SAD_SSD_16_END arg0, arg1, arg2, arg3
1031	1031	SAD_VAR_16_END \arg0, \arg1, \arg2, \arg3
1032		−
	1032	+
1033	1033	SSD_MUL_SUM_16BYTES d4,d5,q8, q11 //q8 for l_sqiff reset for every 16x16
1034	1034	.endm
1035	1035
1036	1036	.macro SAD_SSD_16_RESET_16x16 arg0, arg1, arg2, arg3
1037	1037	SAD_VAR_16_RESET_16x16 \arg0, \arg1, \arg2, \arg3
1038		−
	1038	+
1039	1039	SSD_MUL_SUM_16BYTES_RESET d4,d5,q8, q11 //q8 for l_sqiff reset for every 16x16
1040	1040	.endm
1041	1041
1042	1042	.macro SAD_SSD_16_RESET_8x8 arg0, arg1, arg2, arg3
1043	1043	SAD_VAR_16_RESET_8x8 \arg0, \arg1, \arg2, \arg3
1044		−
	1044	+
1045	1045	SSD_MUL_SUM_16BYTES d4,d5,q8, q11 //q8 for l_sqiff reset for every 16x16
1046	1046	.endm
1047	1047
@@ -1055,7 +1055,7 @@ WELS_ASM_FUNC_END · 7 unmodified lines
1055	1055	SAD_SSD_16 \arg0, \arg1, \arg2, q6
1056	1056	SAD_SSD_16 \arg0, \arg1, \arg2, q6
1057	1057	SAD_SSD_16 \arg0, \arg1, \arg2, q6
1058		−
	1058	+
1059	1059	vpaddl.u16 q6, q6
1060	1060	vpaddl.u32 q6, q6
1061	1061	vadd.i32 q12, q6
@@ -1069,26 +1069,26 @@ WELS_ASM_FUNC_END · 7 unmodified lines
1069	1069	SAD_SSD_16 \arg0, \arg1, \arg2, q7
1070	1070	SAD_SSD_16 \arg0, \arg1, \arg2, q7
1071	1071	SAD_SSD_16_END \arg0, \arg2, q7
1072		−
	1072	+
1073	1073	vpaddl.u16 q7, q7
1074	1074	vpaddl.u32 q7, q7
1075		−
	1075	+
1076	1076	vadd.i32 q12, q7
1077	1077	.endm
1078	1078	#endif
1079	1079
1080	1080
1081		−WELS_ASM_FUNC_BEGIN vaa_calc_sad_ssd_neon
	1081	+WELS_ASM_FUNC_BEGIN VAACalcSadSsd_neon
1082	1082	stmdb sp!, {r4-r12}
1083	1083
1084	1084	ldr r4, [sp, #36] //r4 keeps the pic_stride
1085		−
	1085	+
1086	1086	sub r5, r4, #1
1087	1087	lsl r5, r5, #4 //r5 keeps the little step
1088		−
	1088	+
1089	1089	lsl r6, r4, #4
1090	1090	sub r6, r2, r6 //r6 keeps the big step
1091		−
	1091	+
1092	1092	ldr r7, [sp, #40] //psadframe
1093	1093	ldr r8, [sp, #44] //psad8x8
1094	1094	ldr r9, [sp, #48] //psum16x16
@@ -1105,32 +1105,32 @@ vaa_calc_sad_ssd_width_loop: · 10 unmodified lines
1105	1105	SAD_SSD_16x16 r0,r1,r4
1106	1106	//psad8x8
1107	1107	vst4.32 {d12[0], d13[0], d14[0], d15[0]}, [r8]!
1108		−
	1108	+
1109	1109	sub r0, r0, r5 //jump to next 16x16
1110	1110	sub r1, r1, r5 //jump to next 16x16
1111		−
	1111	+
1112	1112	//psum16x16
1113	1113	vpaddl.s16 q9, q9
1114		− vpaddl.s32 q9, q9
	1114	+ vpaddl.s32 q9, q9
1115	1115	vadd.i32 d18, d18, d19
1116	1116	vst1.32 {d18[0]}, [r9]! //psum16x16
1117	1117
1118	1118	//psqsum16x16
1119		− vpaddl.s32 q10, q10
1120		− vadd.i32 d20, d20, d21
	1119	+ vpaddl.s32 q10, q10
	1120	+ vadd.i32 d20, d20, d21
1121	1121	vst1.32 {d20[0]}, [r10]! //psqsum16x16
1122		−
	1122	+
1123	1123	//psqdiff16x16
1124		− vpaddl.s32 q8, q8
	1124	+ vpaddl.s32 q8, q8
1125	1125	vadd.i32 d16, d16, d17
1126	1126	subs r12, #16
1127	1127	vst1.32 {d16[0]}, [r11]! //psqdiff16x16
1128		−
	1128	+
1129	1129	bne vaa_calc_sad_ssd_width_loop
1130		−
	1130	+
1131	1131	sub r0, r0, r6 //jump to next 16 x width
1132	1132	sub r1, r1, r6 //jump to next 16 x width
1133		−
	1133	+
1134	1134	subs r3, #16
1135	1135	bne vaa_calc_sad_ssd_height_loop
1136	1136
@@ -1140,4 +1140,4 @@ vaa_calc_sad_ssd_width_loop: · 3 unmodified lines
1140	1140	ldmia sp!, {r4-r12}
1141	1141	WELS_ASM_FUNC_END
1142	1142
1143		−#endif
	1143	+#endif

codec/processing/src/downsample/downsample.cpp+10−0

@@ -75,6 +75,16 @@ void CDownsampling::InitDownsampleFuncs (SDownsampleFuncs& sDownsampleFunc, int · 74 unmodified lines
75	75	}
76	76	#endif//X86_ASM
77	77
	78	+#if defined(HAVE_NEON)
	79	+ if (iCpuFlag & WELS_CPU_NEON) {
	80	+ sDownsampleFunc.pfHalfAverage[0] = DyadicBilinearDownsamplerWidthx32_neon;
	81	+ sDownsampleFunc.pfHalfAverage[1] = DyadicBilinearDownsampler_neon;
	82	+ sDownsampleFunc.pfHalfAverage[2] = DyadicBilinearDownsampler_neon;
	83	+ sDownsampleFunc.pfHalfAverage[3] = DyadicBilinearDownsampler_neon;
	84	+ sDownsampleFunc.pfGeneralRatioChroma = GeneralBilinearAccurateDownsamplerWrap_neon;
	85	+ sDownsampleFunc.pfGeneralRatioLuma = GeneralBilinearAccurateDownsamplerWrap_neon;
	86	+ }
	87	+#endif
78	88	}
79	89
80	90	EResult CDownsampling::Process (int32_t iType, SPixMap* pSrcPixMap, SPixMap* pDstPixMap) {

codec/processing/src/downsample/downsample.h+13−0

@@ -103,7 +103,20 @@ void GeneralBilinearAccurateDownsampler_sse2 (uint8_t* pDst, const int32_t kiDst · 102 unmodified lines
103	103	WELSVP_EXTERN_C_END
104	104	#endif
105	105
	106	+#ifdef HAVE_NEON
	107	+WELSVP_EXTERN_C_BEGIN
	108	+// iSrcWidth no limitation
	109	+HalveDownsampleFunc DyadicBilinearDownsampler_neon;
	110	+// iSrcWidth = x32 pixels
	111	+HalveDownsampleFunc DyadicBilinearDownsamplerWidthx32_neon;
	112	+
	113	+GeneralDownsampleFunc GeneralBilinearAccurateDownsamplerWrap_neon;
	114	+
	115	+void GeneralBilinearAccurateDownsampler_neon( uint8_t* pDst, const int32_t kiDstStride, const int32_t kiDstWidth, const int32_t kiDstHeight,
	116	+ uint8_t* pSrc, const int32_t kiSrcStride, const uint32_t kuiScaleX, const uint32_t kuiScaleY);
106	117
	118	+WELSVP_EXTERN_C_END
	119	+#endif
107	120
108	121
109	122	class CDownsampling : public IStrategy {

codec/processing/src/downsample/downsamplefuncs.cpp+10−0

@@ -229,4 +229,14 @@ void GeneralBilinearAccurateDownsampler_c (uint8_t* pDst, const int32_t kiDstStr · 228 unmodified lines
229	229	//}
230	230	#endif //X86_ASM
231	231
	232	+#ifdef HAVE_NEON
	233	+void GeneralBilinearAccurateDownsamplerWrap_neon(uint8_t* pDst, const int32_t kiDstStride, const int32_t kiDstWidth, const int32_t kiDstHeight,
	234	+ uint8_t* pSrc, const int32_t kiSrcStride, const int32_t kiSrcWidth, const int32_t kiSrcHeight) {
	235	+ const int32_t kiScaleBit = 15;
	236	+ const uint32_t kuiScale = (1 << kiScaleBit);
	237	+ uint32_t uiScalex = (uint32_t)((float)kiSrcWidth / (float)kiDstWidth * kuiScale);
	238	+ uint32_t uiScaley = (uint32_t)((float)kiSrcHeight / (float)kiDstHeight * kuiScale);
	239	+ GeneralBilinearAccurateDownsampler_neon(pDst, kiDstStride, kiDstWidth, kiDstHeight, pSrc, kiSrcStride, uiScalex, uiScaley);
	240	+}
	241	+#endif
232	242	WELSVP_NAMESPACE_END

codec/processing/src/scenechangedetection/SceneChangeDetection.cpp+6−0

@@ -130,6 +130,12 @@ void CSceneChangeDetection::InitSadFuncs (SadFuncPtr& pfSad, int32_t iCpuFlag) · 129 unmodified lines
130	130	pfSad = WelsSampleSad8x8_sse21;
131	131	}
132	132	#endif
	133	+
	134	+#ifdef HAVE_NEON
	135	+ if (iCpuFlag & WELS_CPU_NEON) {
	136	+ pfSad = WelsSampleSad8x8_neon;
	137	+ }
	138	+#endif
133	139	}
134	140
135	141

codec/processing/src/scenechangedetection/SceneChangeDetectionCommon.h+6−0

@@ -60,6 +60,12 @@ SadFunc WelsSampleSad8x8_sse21; · 59 unmodified lines
60	60	WELSVP_EXTERN_C_END
61	61	#endif
62	62
	63	+#ifdef HAVE_NEON
	64	+WELSVP_EXTERN_C_BEGIN
	65	+SadFunc WelsSampleSad8x8_neon;
	66	+WELSVP_EXTERN_C_END
	67	+#endif
	68	+
63	69	WELSVP_NAMESPACE_END
64	70
65	71	#endif

codec/processing/src/vaacalc/vaacalculation.cpp+9−0

@@ -65,6 +65,15 @@ void CVAACalculation::InitVaaFuncs (SVaaFuncs& sVaaFuncs, int32_t iCpuFlag) { · 64 unmodified lines
65	65	sVaaFuncs.pfVAACalcSadVar = VAACalcSadVar_sse2;
66	66	}
67	67	#endif//X86_ASM
	68	+#ifdef HAVE_NEON
	69	+ if ((iCpuFlag & WELS_CPU_NEON) == WELS_CPU_NEON) {
	70	+ sVaaFuncs.pfVAACalcSad = VAACalcSad_neon;
	71	+ sVaaFuncs.pfVAACalcSadBgd = VAACalcSadBgd_neon;
	72	+ sVaaFuncs.pfVAACalcSadSsd = VAACalcSadSsd_neon;
	73	+ sVaaFuncs.pfVAACalcSadSsdBgd = VAACalcSadSsdBgd_neon;
	74	+ sVaaFuncs.pfVAACalcSadVar = VAACalcSadVar_neon;
	75	+ }
	76	+#endif//X86_ASM
68	77	}
69	78
70	79	EResult CVAACalculation::Process (int32_t iType, SPixMap* pSrcPixMap, SPixMap* pRefPixMap) {

codec/processing/src/vaacalc/vaacalculation.h+10−0

@@ -103,6 +103,16 @@ VAACalcSadSsdFunc VAACalcSadSsd_sse2; · 102 unmodified lines
103	103	WELSVP_EXTERN_C_END
104	104	#endif
105	105
	106	+#ifdef HAVE_NEON
	107	+WELSVP_EXTERN_C_BEGIN
	108	+VAACalcSadBgdFunc VAACalcSadBgd_neon;
	109	+VAACalcSadSsdBgdFunc VAACalcSadSsdBgd_neon;
	110	+VAACalcSadFunc VAACalcSad_neon;
	111	+VAACalcSadVarFunc VAACalcSadVar_neon;
	112	+VAACalcSadSsdFunc VAACalcSadSsd_neon;
	113	+WELSVP_EXTERN_C_END
	114	+#endif
	115	+
106	116	class CVAACalculation : public IStrategy {
107	117	public:
108	118	CVAACalculation (int32_t iCpuFlag);

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