When rounding inbetween each step, the order of the additions matter. This fixes the testsuite when running on arm and arm64, after a56b927135a61c4363a21d6e779f611de6304932.
Showing the changes to codec/processing/src (2 of 2 files). Show all
Unified · Split
| @@ -57,10 +57,11 @@ comp_ds_bilinear_loop0: · 56 unmodified lines | ||
| 57 | 57 | |
| 58 | 58 | vld1.8 {q0,q1}, [r2]! |
| 59 | 59 | vld1.8 {q2,q3}, [r7]! |
| 60 | − vrhadd.u8 q0, q0, q2 | |
| 61 | − vrhadd.u8 q1, q1, q3 | |
| 62 | 60 | vuzp.8 q0, q1 |
| 61 | + vuzp.8 q2, q3 | |
| 63 | 62 | vrhadd.u8 q0, q0, q1 |
| 63 | + vrhadd.u8 q2, q2, q3 | |
| 64 | + vrhadd.u8 q0, q0, q2 | |
| 64 | 65 | vst1.32 {q0}, [r0]! |
| 65 | 66 | add lr, #32 |
| 66 | 67 | |
| @@ -188,10 +189,11 @@ comp_ds_bilinear_w_x32_loop1: · 121 unmodified lines | ||
| 188 | 189 | |
| 189 | 190 | vld1.8 {q0,q1}, [r2]! |
| 190 | 191 | vld1.8 {q2,q3}, [r7]! |
| 191 | − vrhadd.u8 q0, q0, q2 | |
| 192 | − vrhadd.u8 q1, q1, q3 | |
| 193 | 192 | vuzp.8 q0, q1 |
| 193 | + vuzp.8 q2, q3 | |
| 194 | 194 | vrhadd.u8 q0, q0, q1 |
| 195 | + vrhadd.u8 q2, q2, q3 | |
| 196 | + vrhadd.u8 q0, q0, q2 | |
| 195 | 197 | vst1.32 {q0}, [r0]! |
| 196 | 198 | subs r6, #1 |
| 197 | 199 | bne comp_ds_bilinear_w_x32_loop1 |
| @@ -51,11 +51,13 @@ comp_ds_bilinear_loop0: · 50 unmodified lines | ||
| 51 | 51 | |
| 52 | 52 | ld1 {v0.16b, v1.16b}, [x2], #32 |
| 53 | 53 | ld1 {v2.16b, v3.16b}, [x7], #32 |
| 54 | − urhadd v0.16b, v0.16b, v2.16b | |
| 55 | − urhadd v1.16b, v1.16b, v3.16b | |
| 56 | − uzp1 v2.16b, v0.16b, v1.16b | |
| 57 | − uzp2 v3.16b, v0.16b, v1.16b | |
| 58 | − urhadd v2.16b, v2.16b, v3.16b | |
| 54 | + uzp1 v4.16b, v0.16b, v1.16b | |
| 55 | + uzp2 v5.16b, v0.16b, v1.16b | |
| 56 | + uzp1 v6.16b, v2.16b, v3.16b | |
| 57 | + uzp2 v7.16b, v2.16b, v3.16b | |
| 58 | + urhadd v0.16b, v4.16b, v5.16b | |
| 59 | + urhadd v1.16b, v6.16b, v7.16b | |
| 60 | + urhadd v2.16b, v0.16b, v1.16b | |
| 59 | 61 | st1 {v2.16b}, [x0], #16 |
| 60 | 62 | add w9, w9, #32 |
| 61 | 63 | |
| @@ -92,11 +94,13 @@ comp_ds_bilinear_w_x32_loop1: · 30 unmodified lines | ||
| 92 | 94 | |
| 93 | 95 | ld1 {v0.16b, v1.16b}, [x2], #32 |
| 94 | 96 | ld1 {v2.16b, v3.16b}, [x7], #32 |
| 95 | − urhadd v0.16b, v0.16b, v2.16b | |
| 96 | − urhadd v1.16b, v1.16b, v3.16b | |
| 97 | − uzp1 v2.16b, v0.16b, v1.16b | |
| 98 | − uzp2 v3.16b, v0.16b, v1.16b | |
| 99 | − urhadd v2.16b, v2.16b, v3.16b | |
| 97 | + uzp1 v4.16b, v0.16b, v1.16b | |
| 98 | + uzp2 v5.16b, v0.16b, v1.16b | |
| 99 | + uzp1 v6.16b, v2.16b, v3.16b | |
| 100 | + uzp2 v7.16b, v2.16b, v3.16b | |
| 101 | + urhadd v0.16b, v4.16b, v5.16b | |
| 102 | + urhadd v1.16b, v6.16b, v7.16b | |
| 103 | + urhadd v2.16b, v0.16b, v1.16b | |
| 100 | 104 | st1 {v2.16b}, [x0], #16 |
| 101 | 105 | |
| 102 | 106 | sub w6, w6, #1 |