| @@ -35,2084 +35,35 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. · 34 unmodified lines |
| 35 | | 35 | |
| 36 | #pragma once | 36 | #pragma once |
| 37 | | 37 | |
| 38 | #define SOFTFLOAT_FAST_INT64 | 38 | typedef struct extFloat80M extFloat80_t; |
| 39 | #define LITTLEENDIAN | 39 | typedef float float32_t; |
| 40 | #define INLINE_LEVEL 0 | | |
| 41 | #define SOFTFLOAT_FAST_DIV64TO32 | | |
| 42 | #define SOFTFLOAT_FAST_DIV32TO16 | | |
| 43 | #define SOFTFLOAT_ROUND_ODD | | |
| 44 | #define INLINE inline | | |
| 45 | | | |
| 46 | #ifdef SOFTFLOAT_FAST_INT64 | | |
| 47 | | | |
| 48 | #ifdef LITTLEENDIAN | | |
| 49 | struct uint128 { u64int v0, v64; }; | | |
| 50 | struct uint64_extra { u64int extra, v; }; | | |
| 51 | struct uint128_extra { u64int extra; struct uint128 v; }; | | |
| 52 | #else | | |
| 53 | struct uint128 { u64int v64, v0; }; | | |
| 54 | struct uint64_extra { u64int v, extra; }; | | |
| 55 | struct uint128_extra { struct uint128 v; u64int extra; }; | | |
| 56 | #endif | | |
| 57 | | | |
| 58 | #endif | | |
| 59 | | | |
| 60 | /*---------------------------------------------------------------------------- | | |
| 61 | | These macros are used to isolate the differences in word order between big- | | |
| 62 | | endian and little-endian platforms. | | |
| 63 | *----------------------------------------------------------------------------*/ | | |
| 64 | #ifdef LITTLEENDIAN | | |
| 65 | #define wordIncr 1 | | |
| 66 | #define indexWord( total, n ) (n) | | |
| 67 | #define indexWordHi( total ) ((total) - 1) | | |
| 68 | #define indexWordLo( total ) 0 | | |
| 69 | #define indexMultiword( total, m, n ) (n) | | |
| 70 | #define indexMultiwordHi( total, n ) ((total) - (n)) | | |
| 71 | #define indexMultiwordLo( total, n ) 0 | | |
| 72 | #define indexMultiwordHiBut( total, n ) (n) | | |
| 73 | #define indexMultiwordLoBut( total, n ) 0 | | |
| 74 | #define INIT_UINTM4( v3, v2, v1, v0 ) { v0, v1, v2, v3 } | | |
| 75 | #else | | |
| 76 | #define wordIncr -1 | | |
| 77 | #define indexWord( total, n ) ((total) - 1 - (n)) | | |
| 78 | #define indexWordHi( total ) 0 | | |
| 79 | #define indexWordLo( total ) ((total) - 1) | | |
| 80 | #define indexMultiword( total, m, n ) ((total) - 1 - (m)) | | |
| 81 | #define indexMultiwordHi( total, n ) 0 | | |
| 82 | #define indexMultiwordLo( total, n ) ((total) - (n)) | | |
| 83 | #define indexMultiwordHiBut( total, n ) 0 | | |
| 84 | #define indexMultiwordLoBut( total, n ) (n) | | |
| 85 | #define INIT_UINTM4( v3, v2, v1, v0 ) { v3, v2, v1, v0 } | | |
| 86 | #endif | | |
| 87 | | | |
| 88 | #ifndef softfloat_shortShiftRightJam64 | | |
| 89 | /*---------------------------------------------------------------------------- | | |
| 90 | | Shifts 'a' right by the number of bits given in 'dist', which must be in | | |
| 91 | | the range 1 to 63. If any nonzero bits are shifted off, they are "jammed" | | |
| 92 | | into the least-significant bit of the shifted value by setting the least- | | |
| 93 | | significant bit to 1. This shifted-and-jammed value is returned. | | |
| 94 | *----------------------------------------------------------------------------*/ | | |
| 95 | #if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) | | |
| 96 | INLINE | | |
| 97 | u64int softfloat_shortShiftRightJam64( u64int a, u8int dist ) | | |
| 98 | { return a>>dist | ((a & (((u64int) 1<<dist) - 1)) != 0); } | | |
| 99 | #else | | |
| 100 | u64int softfloat_shortShiftRightJam64( u64int a, u8int dist ); | | |
| 101 | #endif | | |
| 102 | #endif | | |
| 103 | | | |
| 104 | #ifndef softfloat_shiftRightJam32 | | |
| 105 | /*---------------------------------------------------------------------------- | | |
| 106 | | Shifts 'a' right by the number of bits given in 'dist', which must not | | |
| 107 | | be zero. If any nonzero bits are shifted off, they are "jammed" into the | | |
| 108 | | least-significant bit of the shifted value by setting the least-significant | | |
| 109 | | bit to 1. This shifted-and-jammed value is returned. | | |
| 110 | | The value of 'dist' can be arbitrarily large. In particular, if 'dist' is | | |
| 111 | | greater than 32, the result will be either 0 or 1, depending on whether 'a' | | |
| 112 | | is zero or nonzero. | | |
| 113 | *----------------------------------------------------------------------------*/ | | |
| 114 | #if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) | | |
| 115 | INLINE u32int softfloat_shiftRightJam32( u32int a, u16int dist ) | | |
| 116 | { | | |
| 117 | return | | |
| 118 | (dist < 31) ? a>>dist | ((u32int) (a<<(-dist & 31)) != 0) : (a != 0); | | |
| 119 | } | | |
| 120 | #else | | |
| 121 | u32int softfloat_shiftRightJam32( u32int a, u16int dist ); | | |
| 122 | #endif | | |
| 123 | #endif | | |
| 124 | | | |
| 125 | #ifndef softfloat_shiftRightJam64 | | |
| 126 | /*---------------------------------------------------------------------------- | | |
| 127 | | Shifts 'a' right by the number of bits given in 'dist', which must not | | |
| 128 | | be zero. If any nonzero bits are shifted off, they are "jammed" into the | | |
| 129 | | least-significant bit of the shifted value by setting the least-significant | | |
| 130 | | bit to 1. This shifted-and-jammed value is returned. | | |
| 131 | | The value of 'dist' can be arbitrarily large. In particular, if 'dist' is | | |
| 132 | | greater than 64, the result will be either 0 or 1, depending on whether 'a' | | |
| 133 | | is zero or nonzero. | | |
| 134 | *----------------------------------------------------------------------------*/ | | |
| 135 | #if defined INLINE_LEVEL && (3 <= INLINE_LEVEL) | | |
| 136 | INLINE u64int softfloat_shiftRightJam64( u64int a, u32int dist ) | | |
| 137 | { | | |
| 138 | return | | |
| 139 | (dist < 63) ? a>>dist | ((u64int) (a<<(-dist & 63)) != 0) : (a != 0); | | |
| 140 | } | | |
| 141 | #else | | |
| 142 | u64int softfloat_shiftRightJam64( u64int a, u32int dist ); | | |
| 143 | #endif | | |
| 144 | #endif | | |
| 145 | | | |
| 146 | #ifndef softfloat_countLeadingZeros16 | | |
| 147 | /*---------------------------------------------------------------------------- | | |
| 148 | | Returns the number of leading 0 bits before the most-significant 1 bit of | | |
| 149 | | 'a'. If 'a' is zero, 16 is returned. | | |
| 150 | *----------------------------------------------------------------------------*/ | | |
| 151 | #if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) | | |
| 152 | INLINE u8int softfloat_countLeadingZeros16( u16int a ) | | |
| 153 | { | | |
| 154 | u8int count = 8; | | |
| 155 | if ( 0x100 <= a ) { | | |
| 156 | count = 0; | | |
| 157 | a >>= 8; | | |
| 158 | } | | |
| 159 | count += softfloat_countLeadingZeros8[a]; | | |
| 160 | return count; | | |
| 161 | } | | |
| 162 | #else | | |
| 163 | u8int softfloat_countLeadingZeros16( u16int a ); | | |
| 164 | #endif | | |
| 165 | #endif | | |
| 166 | | | |
| 167 | #ifndef softfloat_countLeadingZeros32 | | |
| 168 | /*---------------------------------------------------------------------------- | | |
| 169 | | Returns the number of leading 0 bits before the most-significant 1 bit of | | |
| 170 | | 'a'. If 'a' is zero, 32 is returned. | | |
| 171 | *----------------------------------------------------------------------------*/ | | |
| 172 | #if defined INLINE_LEVEL && (3 <= INLINE_LEVEL) | | |
| 173 | INLINE u8int softfloat_countLeadingZeros32( u32int a ) | | |
| 174 | { | | |
| 175 | u8int count = 0; | | |
| 176 | if ( a < 0x10000 ) { | | |
| 177 | count = 16; | | |
| 178 | a <<= 16; | | |
| 179 | } | | |
| 180 | if ( a < 0x1000000 ) { | | |
| 181 | count += 8; | | |
| 182 | a <<= 8; | | |
| 183 | } | | |
| 184 | count += softfloat_countLeadingZeros8[a>>24]; | | |
| 185 | return count; | | |
| 186 | } | | |
| 187 | #else | | |
| 188 | u8int softfloat_countLeadingZeros32( u32int a ); | | |
| 189 | #endif | | |
| 190 | #endif | | |
| 191 | | | |
| 192 | #ifndef softfloat_countLeadingZeros64 | | |
| 193 | /*---------------------------------------------------------------------------- | | |
| 194 | | Returns the number of leading 0 bits before the most-significant 1 bit of | | |
| 195 | | 'a'. If 'a' is zero, 64 is returned. | | |
| 196 | *----------------------------------------------------------------------------*/ | | |
| 197 | u8int softfloat_countLeadingZeros64( u64int a ); | | |
| 198 | #endif | | |
| 199 | | | |
| 200 | extern const u16int softfloat_approxRecip_1k0s[16]; | | |
| 201 | extern const u16int softfloat_approxRecip_1k1s[16]; | | |
| 202 | | | |
| 203 | #ifndef softfloat_approxRecip32_1 | | |
| 204 | /*---------------------------------------------------------------------------- | | |
| 205 | | Returns an approximation to the reciprocal of the number represented by 'a', | | |
| 206 | | where 'a' is interpreted as an unsigned fixed-point number with one integer | | |
| 207 | | bit and 31 fraction bits. The 'a' input must be "normalized", meaning that | | |
| 208 | | its most-significant bit (bit 31) must be 1. Thus, if A is the value of | | |
| 209 | | the fixed-point interpretation of 'a', then 1 <= A < 2. The returned value | | |
| 210 | | is interpreted as a pure unsigned fraction, having no integer bits and 32 | | |
| 211 | | fraction bits. The approximation returned is never greater than the true | | |
| 212 | | reciprocal 1/A, and it differs from the true reciprocal by at most 2.006 ulp | | |
| 213 | | (units in the last place). | | |
| 214 | *----------------------------------------------------------------------------*/ | | |
| 215 | #ifdef SOFTFLOAT_FAST_DIV64TO32 | | |
| 216 | #define softfloat_approxRecip32_1( a ) ((u32int) (UINT64_C( 0x7FFFFFFFFFFFFFFF ) / (u32int) (a))) | | |
| 217 | #else | | |
| 218 | u32int softfloat_approxRecip32_1( u32int a ); | | |
| 219 | #endif | | |
| 220 | #endif | | |
| 221 | | | |
| 222 | extern const u16int softfloat_approxRecipSqrt_1k0s[16]; | | |
| 223 | extern const u16int softfloat_approxRecipSqrt_1k1s[16]; | | |
| 224 | | | |
| 225 | #ifndef softfloat_approxRecipSqrt32_1 | | |
| 226 | /*---------------------------------------------------------------------------- | | |
| 227 | | Returns an approximation to the reciprocal of the square root of the number | | |
| 228 | | represented by 'a', where 'a' is interpreted as an unsigned fixed-point | | |
| 229 | | number either with one integer bit and 31 fraction bits or with two integer | | |
| 230 | | bits and 30 fraction bits. The format of 'a' is determined by 'oddExpA', | | |
| 231 | | which must be either 0 or 1. If 'oddExpA' is 1, 'a' is interpreted as | | |
| 232 | | having one integer bit, and if 'oddExpA' is 0, 'a' is interpreted as having | | |
| 233 | | two integer bits. The 'a' input must be "normalized", meaning that its | | |
| 234 | | most-significant bit (bit 31) must be 1. Thus, if A is the value of the | | |
| 235 | | fixed-point interpretation of 'a', it follows that 1 <= A < 2 when 'oddExpA' | | |
| 236 | | is 1, and 2 <= A < 4 when 'oddExpA' is 0. | | |
| 237 | | The returned value is interpreted as a pure unsigned fraction, having | | |
| 238 | | no integer bits and 32 fraction bits. The approximation returned is never | | |
| 239 | | greater than the true reciprocal 1/sqrt(A), and it differs from the true | | |
| 240 | | reciprocal by at most 2.06 ulp (units in the last place). The approximation | | |
| 241 | | returned is also always within the range 0.5 to 1; thus, the most- | | |
| 242 | | significant bit of the result is always set. | | |
| 243 | *----------------------------------------------------------------------------*/ | | |
| 244 | u32int softfloat_approxRecipSqrt32_1( unsigned int oddExpA, u32int a ); | | |
| 245 | #endif | | |
| 246 | | | |
| 247 | #ifdef SOFTFLOAT_FAST_INT64 | | |
| 248 | | | |
| 249 | /*---------------------------------------------------------------------------- | | |
| 250 | | The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is | | |
| 251 | | defined. | | |
| 252 | *----------------------------------------------------------------------------*/ | | |
| 253 | | | |
| 254 | #ifndef softfloat_eq128 | | |
| 255 | /*---------------------------------------------------------------------------- | | |
| 256 | | Returns true if the 128-bit unsigned integer formed by concatenating 'a64' | | |
| 257 | | and 'a0' is equal to the 128-bit unsigned integer formed by concatenating | | |
| 258 | | 'b64' and 'b0'. | | |
| 259 | *----------------------------------------------------------------------------*/ | | |
| 260 | #if defined INLINE_LEVEL && (1 <= INLINE_LEVEL) | | |
| 261 | INLINE | | |
| 262 | bool softfloat_eq128( u64int a64, u64int a0, u64int b64, u64int b0 ) | | |
| 263 | { return (a64 == b64) && (a0 == b0); } | | |
| 264 | #else | | |
| 265 | bool softfloat_eq128( u64int a64, u64int a0, u64int b64, u64int b0 ); | | |
| 266 | #endif | | |
| 267 | #endif | | |
| 268 | | | |
| 269 | #ifndef softfloat_le128 | | |
| 270 | /*---------------------------------------------------------------------------- | | |
| 271 | | Returns true if the 128-bit unsigned integer formed by concatenating 'a64' | | |
| 272 | | and 'a0' is less than or equal to the 128-bit unsigned integer formed by | | |
| 273 | | concatenating 'b64' and 'b0'. | | |
| 274 | *----------------------------------------------------------------------------*/ | | |
| 275 | #if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) | | |
| 276 | INLINE | | |
| 277 | bool softfloat_le128( u64int a64, u64int a0, u64int b64, u64int b0 ) | | |
| 278 | { return (a64 < b64) || ((a64 == b64) && (a0 <= b0)); } | | |
| 279 | #else | | |
| 280 | bool softfloat_le128( u64int a64, u64int a0, u64int b64, u64int b0 ); | | |
| 281 | #endif | | |
| 282 | #endif | | |
| 283 | | | |
| 284 | #ifndef softfloat_lt128 | | |
| 285 | /*---------------------------------------------------------------------------- | | |
| 286 | | Returns true if the 128-bit unsigned integer formed by concatenating 'a64' | | |
| 287 | | and 'a0' is less than the 128-bit unsigned integer formed by concatenating | | |
| 288 | | 'b64' and 'b0'. | | |
| 289 | *----------------------------------------------------------------------------*/ | | |
| 290 | #if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) | | |
| 291 | INLINE | | |
| 292 | bool softfloat_lt128( u64int a64, u64int a0, u64int b64, u64int b0 ) | | |
| 293 | { return (a64 < b64) || ((a64 == b64) && (a0 < b0)); } | | |
| 294 | #else | | |
| 295 | bool softfloat_lt128( u64int a64, u64int a0, u64int b64, u64int b0 ); | | |
| 296 | #endif | | |
| 297 | #endif | | |
| 298 | | | |
| 299 | #ifndef softfloat_shortShiftLeft128 | | |
| 300 | /*---------------------------------------------------------------------------- | | |
| 301 | | Shifts the 128 bits formed by concatenating 'a64' and 'a0' left by the | | |
| 302 | | number of bits given in 'dist', which must be in the range 1 to 63. | | |
| 303 | *----------------------------------------------------------------------------*/ | | |
| 304 | #if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) | | |
| 305 | INLINE | | |
| 306 | struct uint128 | | |
| 307 | softfloat_shortShiftLeft128( u64int a64, u64int a0, u8int dist ) | | |
| 308 | { | | |
| 309 | struct uint128 z; | | |
| 310 | z.v64 = a64<<dist | a0>>(-dist & 63); | | |
| 311 | z.v0 = a0<<dist; | | |
| 312 | return z; | | |
| 313 | } | | |
| 314 | #else | | |
| 315 | struct uint128 | | |
| 316 | softfloat_shortShiftLeft128( u64int a64, u64int a0, u8int dist ); | | |
| 317 | #endif | | |
| 318 | #endif | | |
| 319 | | | |
| 320 | #ifndef softfloat_shortShiftRight128 | | |
| 321 | /*---------------------------------------------------------------------------- | | |
| 322 | | Shifts the 128 bits formed by concatenating 'a64' and 'a0' right by the | | |
| 323 | | number of bits given in 'dist', which must be in the range 1 to 63. | | |
| 324 | *----------------------------------------------------------------------------*/ | | |
| 325 | #if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) | | |
| 326 | INLINE | | |
| 327 | struct uint128 | | |
| 328 | softfloat_shortShiftRight128( u64int a64, u64int a0, u8int dist ) | | |
| 329 | { | | |
| 330 | struct uint128 z; | | |
| 331 | z.v64 = a64>>dist; | | |
| 332 | z.v0 = a64<<(-dist & 63) | a0>>dist; | | |
| 333 | return z; | | |
| 334 | } | | |
| 335 | #else | | |
| 336 | struct uint128 | | |
| 337 | softfloat_shortShiftRight128( u64int a64, u64int a0, u8int dist ); | | |
| 338 | #endif | | |
| 339 | #endif | | |
| 340 | | | |
| 341 | #ifndef softfloat_shortShiftRightJam64Extra | | |
| 342 | /*---------------------------------------------------------------------------- | | |
| 343 | | This function is the same as 'softfloat_shiftRightJam64Extra' (below), | | |
| 344 | | except that 'dist' must be in the range 1 to 63. | | |
| 345 | *----------------------------------------------------------------------------*/ | | |
| 346 | #if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) | | |
| 347 | INLINE | | |
| 348 | struct uint64_extra | | |
| 349 | softfloat_shortShiftRightJam64Extra( | | |
| 350 | u64int a, u64int extra, u8int dist ) | | |
| 351 | { | | |
| 352 | struct uint64_extra z; | | |
| 353 | z.v = a>>dist; | | |
| 354 | z.extra = a<<(-dist & 63) | (extra != 0); | | |
| 355 | return z; | | |
| 356 | } | | |
| 357 | #else | | |
| 358 | struct uint64_extra | | |
| 359 | softfloat_shortShiftRightJam64Extra( | | |
| 360 | u64int a, u64int extra, u8int dist ); | | |
| 361 | #endif | | |
| 362 | #endif | | |
| 363 | | | |
| 364 | #ifndef softfloat_shortShiftRightJam128 | | |
| 365 | /*---------------------------------------------------------------------------- | | |
| 366 | | Shifts the 128 bits formed by concatenating 'a64' and 'a0' right by the | | |
| 367 | | number of bits given in 'dist', which must be in the range 1 to 63. If any | | |
| 368 | | nonzero bits are shifted off, they are "jammed" into the least-significant | | |
| 369 | | bit of the shifted value by setting the least-significant bit to 1. This | | |
| 370 | | shifted-and-jammed value is returned. | | |
| 371 | *----------------------------------------------------------------------------*/ | | |
| 372 | #if defined INLINE_LEVEL && (3 <= INLINE_LEVEL) | | |
| 373 | INLINE | | |
| 374 | struct uint128 | | |
| 375 | softfloat_shortShiftRightJam128( | | |
| 376 | u64int a64, u64int a0, u8int dist ) | | |
| 377 | { | | |
| 378 | u8int negDist = -dist; | | |
| 379 | struct uint128 z; | | |
| 380 | z.v64 = a64>>dist; | | |
| 381 | z.v0 = | | |
| 382 | a64<<(negDist & 63) | a0>>dist | | |
| 383 | | ((u64int) (a0<<(negDist & 63)) != 0); | | |
| 384 | return z; | | |
| 385 | } | | |
| 386 | #else | | |
| 387 | struct uint128 | | |
| 388 | softfloat_shortShiftRightJam128( | | |
| 389 | u64int a64, u64int a0, u8int dist ); | | |
| 390 | #endif | | |
| 391 | #endif | | |
| 392 | | | |
| 393 | #ifndef softfloat_shortShiftRightJam128Extra | | |
| 394 | /*---------------------------------------------------------------------------- | | |
| 395 | | This function is the same as 'softfloat_shiftRightJam128Extra' (below), | | |
| 396 | | except that 'dist' must be in the range 1 to 63. | | |
| 397 | *----------------------------------------------------------------------------*/ | | |
| 398 | #if defined INLINE_LEVEL && (3 <= INLINE_LEVEL) | | |
| 399 | INLINE | | |
| 400 | struct uint128_extra | | |
| 401 | softfloat_shortShiftRightJam128Extra( | | |
| 402 | u64int a64, u64int a0, u64int extra, u8int dist ) | | |
| 403 | { | | |
| 404 | u8int negDist = -dist; | | |
| 405 | struct uint128_extra z; | | |
| 406 | z.v.v64 = a64>>dist; | | |
| 407 | z.v.v0 = a64<<(negDist & 63) | a0>>dist; | | |
| 408 | z.extra = a0<<(negDist & 63) | (extra != 0); | | |
| 409 | return z; | | |
| 410 | } | | |
| 411 | #else | | |
| 412 | struct uint128_extra | | |
| 413 | softfloat_shortShiftRightJam128Extra( | | |
| 414 | u64int a64, u64int a0, u64int extra, u8int dist ); | | |
| 415 | #endif | | |
| 416 | #endif | | |
| 417 | | | |
| 418 | #ifndef softfloat_shiftRightJam64Extra | | |
| 419 | /*---------------------------------------------------------------------------- | | |
| 420 | | Shifts the 128 bits formed by concatenating 'a' and 'extra' right by 64 | | |
| 421 | | _plus_ the number of bits given in 'dist', which must not be zero. This | | |
| 422 | | shifted value is at most 64 nonzero bits and is returned in the 'v' field | | |
| 423 | | of the 'struct uint64_extra' result. The 64-bit 'extra' field of the result | | |
| 424 | | contains a value formed as follows from the bits that were shifted off: The | | |
| 425 | | _last_ bit shifted off is the most-significant bit of the 'extra' field, and | | |
| 426 | | the other 63 bits of the 'extra' field are all zero if and only if _all_but_ | | |
| 427 | | _the_last_ bits shifted off were all zero. | | |
| 428 | | (This function makes more sense if 'a' and 'extra' are considered to form | | |
| 429 | | an unsigned fixed-point number with binary point between 'a' and 'extra'. | | |
| 430 | | This fixed-point value is shifted right by the number of bits given in | | |
| 431 | | 'dist', and the integer part of this shifted value is returned in the 'v' | | |
| 432 | | field of the result. The fractional part of the shifted value is modified | | |
| 433 | | as described above and returned in the 'extra' field of the result.) | | |
| 434 | *----------------------------------------------------------------------------*/ | | |
| 435 | #if defined INLINE_LEVEL && (4 <= INLINE_LEVEL) | | |
| 436 | INLINE | | |
| 437 | struct uint64_extra | | |
| 438 | softfloat_shiftRightJam64Extra( | | |
| 439 | u64int a, u64int extra, u32int dist ) | | |
| 440 | { | | |
| 441 | struct uint64_extra z; | | |
| 442 | if ( dist < 64 ) { | | |
| 443 | z.v = a>>dist; | | |
| 444 | z.extra = a<<(-dist & 63); | | |
| 445 | } else { | | |
| 446 | z.v = 0; | | |
| 447 | z.extra = (dist == 64) ? a : (a != 0); | | |
| 448 | } | | |
| 449 | z.extra |= (extra != 0); | | |
| 450 | return z; | | |
| 451 | } | | |
| 452 | #else | | |
| 453 | struct uint64_extra | | |
| 454 | softfloat_shiftRightJam64Extra( | | |
| 455 | u64int a, u64int extra, u32int dist ); | | |
| 456 | #endif | | |
| 457 | #endif | | |
| 458 | | | |
| 459 | #ifndef softfloat_shiftRightJam128 | | |
| 460 | /*---------------------------------------------------------------------------- | | |
| 461 | | Shifts the 128 bits formed by concatenating 'a64' and 'a0' right by the | | |
| 462 | | number of bits given in 'dist', which must not be zero. If any nonzero bits | | |
| 463 | | are shifted off, they are "jammed" into the least-significant bit of the | | |
| 464 | | shifted value by setting the least-significant bit to 1. This shifted-and- | | |
| 465 | | jammed value is returned. | | |
| 466 | | The value of 'dist' can be arbitrarily large. In particular, if 'dist' is | | |
| 467 | | greater than 128, the result will be either 0 or 1, depending on whether the | | |
| 468 | | original 128 bits are all zeros. | | |
| 469 | *----------------------------------------------------------------------------*/ | | |
| 470 | struct uint128 | | |
| 471 | softfloat_shiftRightJam128( u64int a64, u64int a0, u32int dist ); | | |
| 472 | #endif | | |
| 473 | | | |
| 474 | #ifndef softfloat_shiftRightJam128Extra | | |
| 475 | /*---------------------------------------------------------------------------- | | |
| 476 | | Shifts the 192 bits formed by concatenating 'a64', 'a0', and 'extra' right | | |
| 477 | | by 64 _plus_ the number of bits given in 'dist', which must not be zero. | | |
| 478 | | This shifted value is at most 128 nonzero bits and is returned in the 'v' | | |
| 479 | | field of the 'struct uint128_extra' result. The 64-bit 'extra' field of the | | |
| 480 | | result contains a value formed as follows from the bits that were shifted | | |
| 481 | | off: The _last_ bit shifted off is the most-significant bit of the 'extra' | | |
| 482 | | field, and the other 63 bits of the 'extra' field are all zero if and only | | |
| 483 | | if _all_but_the_last_ bits shifted off were all zero. | | |
| 484 | | (This function makes more sense if 'a64', 'a0', and 'extra' are considered | | |
| 485 | | to form an unsigned fixed-point number with binary point between 'a0' and | | |
| 486 | | 'extra'. This fixed-point value is shifted right by the number of bits | | |
| 487 | | given in 'dist', and the integer part of this shifted value is returned | | |
| 488 | | in the 'v' field of the result. The fractional part of the shifted value | | |
| 489 | | is modified as described above and returned in the 'extra' field of the | | |
| 490 | | result.) | | |
| 491 | *----------------------------------------------------------------------------*/ | | |
| 492 | struct uint128_extra | | |
| 493 | softfloat_shiftRightJam128Extra( | | |
| 494 | u64int a64, u64int a0, u64int extra, u32int dist ); | | |
| 495 | #endif | | |
| 496 | | | |
| 497 | #ifndef softfloat_shiftRightJam256M | | |
| 498 | /*---------------------------------------------------------------------------- | | |
| 499 | | Shifts the 256-bit unsigned integer pointed to by 'aPtr' right by the number | | |
| 500 | | of bits given in 'dist', which must not be zero. If any nonzero bits are | | |
| 501 | | shifted off, they are "jammed" into the least-significant bit of the shifted | | |
| 502 | | value by setting the least-significant bit to 1. This shifted-and-jammed | | |
| 503 | | value is stored at the location pointed to by 'zPtr'. Each of 'aPtr' and | | |
| 504 | | 'zPtr' points to an array of four 64-bit elements that concatenate in the | | |
| 505 | | platform's normal endian order to form a 256-bit integer. | | |
| 506 | | The value of 'dist' can be arbitrarily large. In particular, if 'dist' | | |
| 507 | | is greater than 256, the stored result will be either 0 or 1, depending on | | |
| 508 | | whether the original 256 bits are all zeros. | | |
| 509 | *----------------------------------------------------------------------------*/ | | |
| 510 | void | | |
| 511 | softfloat_shiftRightJam256M( | | |
| 512 | const u64int *aPtr, u32int dist, u64int *zPtr ); | | |
| 513 | #endif | | |
| 514 | | | |
| 515 | #ifndef softfloat_add128 | | |
| 516 | /*---------------------------------------------------------------------------- | | |
| 517 | | Returns the sum of the 128-bit integer formed by concatenating 'a64' and | | |
| 518 | | 'a0' and the 128-bit integer formed by concatenating 'b64' and 'b0'. The | | |
| 519 | | addition is modulo 2^128, so any carry out is lost. | | |
| 520 | *----------------------------------------------------------------------------*/ | | |
| 521 | #if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) | | |
| 522 | INLINE | | |
| 523 | struct uint128 | | |
| 524 | softfloat_add128( u64int a64, u64int a0, u64int b64, u64int b0 ) | | |
| 525 | { | | |
| 526 | struct uint128 z; | | |
| 527 | z.v0 = a0 + b0; | | |
| 528 | z.v64 = a64 + b64 + (z.v0 < a0); | | |
| 529 | return z; | | |
| 530 | } | | |
| 531 | #else | | |
| 532 | struct uint128 | | |
| 533 | softfloat_add128( u64int a64, u64int a0, u64int b64, u64int b0 ); | | |
| 534 | #endif | | |
| 535 | #endif | | |
| 536 | | | |
| 537 | #ifndef softfloat_add256M | | |
| 538 | /*---------------------------------------------------------------------------- | | |
| 539 | | Adds the two 256-bit integers pointed to by 'aPtr' and 'bPtr'. The addition | | |
| 540 | | is modulo 2^256, so any carry out is lost. The sum is stored at the | | |
| 541 | | location pointed to by 'zPtr'. Each of 'aPtr', 'bPtr', and 'zPtr' points to | | |
| 542 | | an array of four 64-bit elements that concatenate in the platform's normal | | |
| 543 | | endian order to form a 256-bit integer. | | |
| 544 | *----------------------------------------------------------------------------*/ | | |
| 545 | void | | |
| 546 | softfloat_add256M( | | |
| 547 | const u64int *aPtr, const u64int *bPtr, u64int *zPtr ); | | |
| 548 | #endif | | |
| 549 | | | |
| 550 | #ifndef softfloat_sub128 | | |
| 551 | /*---------------------------------------------------------------------------- | | |
| 552 | | Returns the difference of the 128-bit integer formed by concatenating 'a64' | | |
| 553 | | and 'a0' and the 128-bit integer formed by concatenating 'b64' and 'b0'. | | |
| 554 | | The subtraction is modulo 2^128, so any borrow out (carry out) is lost. | | |
| 555 | *----------------------------------------------------------------------------*/ | | |
| 556 | #if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) | | |
| 557 | INLINE | | |
| 558 | struct uint128 | | |
| 559 | softfloat_sub128( u64int a64, u64int a0, u64int b64, u64int b0 ) | | |
| 560 | { | | |
| 561 | struct uint128 z; | | |
| 562 | z.v0 = a0 - b0; | | |
| 563 | z.v64 = a64 - b64; | | |
| 564 | z.v64 -= (a0 < b0); | | |
| 565 | return z; | | |
| 566 | } | | |
| 567 | #else | | |
| 568 | struct uint128 | | |
| 569 | softfloat_sub128( u64int a64, u64int a0, u64int b64, u64int b0 ); | | |
| 570 | #endif | | |
| 571 | #endif | | |
| 572 | | | |
| 573 | #ifndef softfloat_sub256M | | |
| 574 | /*---------------------------------------------------------------------------- | | |
| 575 | | Subtracts the 256-bit integer pointed to by 'bPtr' from the 256-bit integer | | |
| 576 | | pointed to by 'aPtr'. The addition is modulo 2^256, so any borrow out | | |
| 577 | | (carry out) is lost. The difference is stored at the location pointed to | | |
| 578 | | by 'zPtr'. Each of 'aPtr', 'bPtr', and 'zPtr' points to an array of four | | |
| 579 | | 64-bit elements that concatenate in the platform's normal endian order to | | |
| 580 | | form a 256-bit integer. | | |
| 581 | *----------------------------------------------------------------------------*/ | | |
| 582 | void | | |
| 583 | softfloat_sub256M( | | |
| 584 | const u64int *aPtr, const u64int *bPtr, u64int *zPtr ); | | |
| 585 | #endif | | |
| 586 | | | |
| 587 | #ifndef softfloat_mul64ByShifted32To128 | | |
| 588 | /*---------------------------------------------------------------------------- | | |
| 589 | | Returns the 128-bit product of 'a', 'b', and 2^32. | | |
| 590 | *----------------------------------------------------------------------------*/ | | |
| 591 | #if defined INLINE_LEVEL && (3 <= INLINE_LEVEL) | | |
| 592 | INLINE struct uint128 softfloat_mul64ByShifted32To128( u64int a, u32int b ) | | |
| 593 | { | | |
| 594 | u64int mid; | | |
| 595 | struct uint128 z; | | |
| 596 | mid = (u64int) (u32int) a * b; | | |
| 597 | z.v0 = mid<<32; | | |
| 598 | z.v64 = (u64int) (u32int) (a>>32) * b + (mid>>32); | | |
| 599 | return z; | | |
| 600 | } | | |
| 601 | #else | | |
| 602 | struct uint128 softfloat_mul64ByShifted32To128( u64int a, u32int b ); | | |
| 603 | #endif | | |
| 604 | #endif | | |
| 605 | | | |
| 606 | #ifndef softfloat_mul64To128 | | |
| 607 | /*---------------------------------------------------------------------------- | | |
| 608 | | Returns the 128-bit product of 'a' and 'b'. | | |
| 609 | *----------------------------------------------------------------------------*/ | | |
| 610 | struct uint128 softfloat_mul64To128( u64int a, u64int b ); | | |
| 611 | #endif | | |
| 612 | | | |
| 613 | #ifndef softfloat_mul128By32 | | |
| 614 | /*---------------------------------------------------------------------------- | | |
| 615 | | Returns the product of the 128-bit integer formed by concatenating 'a64' and | | |
| 616 | | 'a0', multiplied by 'b'. The multiplication is modulo 2^128; any overflow | | |
| 617 | | bits are discarded. | | |
| 618 | *----------------------------------------------------------------------------*/ | | |
| 619 | #if defined INLINE_LEVEL && (4 <= INLINE_LEVEL) | | |
| 620 | INLINE | | |
| 621 | struct uint128 softfloat_mul128By32( u64int a64, u64int a0, u32int b ) | | |
| 622 | { | | |
| 623 | struct uint128 z; | | |
| 624 | u64int mid; | | |
| 625 | u32int carry; | | |
| 626 | z.v0 = a0 * b; | | |
| 627 | mid = (u64int) (u32int) (a0>>32) * b; | | |
| 628 | carry = (u32int) ((u32int) (z.v0>>32) - (u32int) mid); | | |
| 629 | z.v64 = a64 * b + (u32int) ((mid + carry)>>32); | | |
| 630 | return z; | | |
| 631 | } | | |
| 632 | #else | | |
| 633 | struct uint128 softfloat_mul128By32( u64int a64, u64int a0, u32int b ); | | |
| 634 | #endif | | |
| 635 | #endif | | |
| 636 | | | |
| 637 | #ifndef softfloat_mul128To256M | | |
| 638 | /*---------------------------------------------------------------------------- | | |
| 639 | | Multiplies the 128-bit unsigned integer formed by concatenating 'a64' and | | |
| 640 | | 'a0' by the 128-bit unsigned integer formed by concatenating 'b64' and | | |
| 641 | | 'b0'. The 256-bit product is stored at the location pointed to by 'zPtr'. | | |
| 642 | | Argument 'zPtr' points to an array of four 64-bit elements that concatenate | | |
| 643 | | in the platform's normal endian order to form a 256-bit integer. | | |
| 644 | *----------------------------------------------------------------------------*/ | | |
| 645 | void | | |
| 646 | softfloat_mul128To256M( | | |
| 647 | u64int a64, u64int a0, u64int b64, u64int b0, u64int *zPtr ); | | |
| 648 | #endif | | |
| 649 | | 40 | |
| | 41 | #ifdef __plan9__ |
| | 42 | #define LITTLE_ENDIAN 1234 |
| | 43 | #define BIG_ENDIAN 4321 |
| | 44 | #if defined(__mips__) || \ |
| | 45 | defined(__power__) || defined(__power64__) || \ |
| | 46 | defined(__sparc__) || defined(__sparc64__) |
| | 47 | #define BYTE_ORDER BIG_ENDIAN |
| 650 | #else | 48 | #else |
| 651 | | 49 | #define BYTE_ORDER LITTLE_ENDIAN |
| 652 | /*---------------------------------------------------------------------------- | | |
| 653 | | The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not | | |
| 654 | | defined. | | |
| 655 | *----------------------------------------------------------------------------*/ | | |
| 656 | | | |
| 657 | #ifndef softfloat_compare96M | | |
| 658 | /*---------------------------------------------------------------------------- | | |
| 659 | | Compares the two 96-bit unsigned integers pointed to by 'aPtr' and 'bPtr'. | | |
| 660 | | Returns -1 if the first integer (A) is less than the second (B); returns 0 | | |
| 661 | | if the two integers are equal; and returns +1 if the first integer (A) | | |
| 662 | | is greater than the second (B). (The result is thus the signum of A - B.) | | |
| 663 | | Each of 'aPtr' and 'bPtr' points to an array of three 32-bit elements that | | |
| 664 | | concatenate in the platform's normal endian order to form a 96-bit integer. | | |
| 665 | *----------------------------------------------------------------------------*/ | | |
| 666 | s8int softfloat_compare96M( const u32int *aPtr, const u32int *bPtr ); | | |
| 667 | #endif | 50 | #endif |
| 668 | | | |
| 669 | #ifndef softfloat_compare128M | | |
| 670 | /*---------------------------------------------------------------------------- | | |
| 671 | | Compares the two 128-bit unsigned integers pointed to by 'aPtr' and 'bPtr'. | | |
| 672 | | Returns -1 if the first integer (A) is less than the second (B); returns 0 | | |
| 673 | | if the two integers are equal; and returns +1 if the first integer (A) | | |
| 674 | | is greater than the second (B). (The result is thus the signum of A - B.) | | |
| 675 | | Each of 'aPtr' and 'bPtr' points to an array of four 32-bit elements that | | |
| 676 | | concatenate in the platform's normal endian order to form a 128-bit integer. | | |
| 677 | *----------------------------------------------------------------------------*/ | | |
| 678 | s8int | | |
| 679 | softfloat_compare128M( const u32int *aPtr, const u32int *bPtr ); | | |
| 680 | #endif | | |
| 681 | | | |
| 682 | #ifndef softfloat_shortShiftLeft64To96M | | |
| 683 | /*---------------------------------------------------------------------------- | | |
| 684 | | Extends 'a' to 96 bits and shifts the value left by the number of bits given | | |
| 685 | | in 'dist', which must be in the range 1 to 31. The result is stored at the | | |
| 686 | | location pointed to by 'zPtr'. Argument 'zPtr' points to an array of three | | |
| 687 | | 32-bit elements that concatenate in the platform's normal endian order to | | |
| 688 | | form a 96-bit integer. | | |
| 689 | *----------------------------------------------------------------------------*/ | | |
| 690 | #if defined INLINE_LEVEL && (2 <= INLINE_LEVEL) | | |
| 691 | INLINE | | |
| 692 | void | | |
| 693 | softfloat_shortShiftLeft64To96M( | | |
| 694 | u64int a, u8int dist, u32int *zPtr ) | | |
| 695 | { | | |
| 696 | zPtr[indexWord( 3, 0 )] = (u32int) a<<dist; | | |
| 697 | a >>= 32 - dist; | | |
| 698 | zPtr[indexWord( 3, 2 )] = a>>32; | | |
| 699 | zPtr[indexWord( 3, 1 )] = a; | | |
| 700 | } | | |
| 701 | #else | 51 | #else |
| 702 | void | 52 | #include <endian.h> |
| 703 | softfloat_shortShiftLeft64To96M( | 53 | #ifndef BYTE_ORDER |
| 704 | u64int a, u8int dist, u32int *zPtr ); | 54 | #define LITTLE_ENDIAN __LITTLE_ENDIAN |
| 705 | #endif | 55 | #define BIG_ENDIAN __BIG_ENDIAN |
| 706 | #endif | 56 | #define BYTE_ORDER __BYTE_ORDER |
| 707 | | | |
| 708 | #ifndef softfloat_shortShiftLeftM | | |
| 709 | /*---------------------------------------------------------------------------- | | |
| 710 | | Shifts the N-bit unsigned integer pointed to by 'aPtr' left by the number | | |
| 711 | | of bits given in 'dist', where N = 'size_words' * 32. The value of 'dist' | | |
| 712 | | must be in the range 1 to 31. Any nonzero bits shifted off are lost. The | | |
| 713 | | shifted N-bit result is stored at the location pointed to by 'zPtr'. Each | | |
| 714 | | of 'aPtr' and 'zPtr' points to a 'size_words'-long array of 32-bit elements | | |
| 715 | | that concatenate in the platform's normal endian order to form an N-bit | | |
| 716 | | integer. | | |
| 717 | *----------------------------------------------------------------------------*/ | | |
| 718 | void | | |
| 719 | softfloat_shortShiftLeftM( | | |
| 720 | u8int size_words, | | |
| 721 | const u32int *aPtr, | | |
| 722 | u8int dist, | | |
| 723 | u32int *zPtr | | |
| 724 | ); | | |
| 725 | #endif | | |
| 726 | | | |
| 727 | #ifndef softfloat_shortShiftLeft96M | | |
| 728 | /*---------------------------------------------------------------------------- | | |
| 729 | | This function or macro is the same as 'softfloat_shortShiftLeftM' with | | |
| 730 | | 'size_words' = 3 (N = 96). | | |
| 731 | *----------------------------------------------------------------------------*/ | | |
| 732 | #define softfloat_shortShiftLeft96M( aPtr, dist, zPtr ) softfloat_shortShiftLeftM( 3, aPtr, dist, zPtr ) | | |
| 733 | #endif | | |
| 734 | | | |
| 735 | #ifndef softfloat_shortShiftLeft128M | | |
| 736 | /*---------------------------------------------------------------------------- | | |
| 737 | | This function or macro is the same as 'softfloat_shortShiftLeftM' with | | |
| 738 | | 'size_words' = 4 (N = 128). | | |
| 739 | *----------------------------------------------------------------------------*/ | | |
| 740 | #define softfloat_shortShiftLeft128M( aPtr, dist, zPtr ) softfloat_shortShiftLeftM( 4, aPtr, dist, zPtr ) | | |
| 741 | #endif | | |
| 742 | | | |
| 743 | #ifndef softfloat_shortShiftLeft160M | | |
| 744 | /*---------------------------------------------------------------------------- | | |
| 745 | | This function or macro is the same as 'softfloat_shortShiftLeftM' with | | |
| 746 | | 'size_words' = 5 (N = 160). | | |
| 747 | *----------------------------------------------------------------------------*/ | | |
| 748 | #define softfloat_shortShiftLeft160M( aPtr, dist, zPtr ) softfloat_shortShiftLeftM( 5, aPtr, dist, zPtr ) | | |
| 749 | #endif | | |
| 750 | | | |
| 751 | #ifndef softfloat_shiftLeftM | | |
| 752 | /*---------------------------------------------------------------------------- | | |
| 753 | | Shifts the N-bit unsigned integer pointed to by 'aPtr' left by the number | | |
| 754 | | of bits given in 'dist', where N = 'size_words' * 32. The value of 'dist' | | |
| 755 | | must not be zero. Any nonzero bits shifted off are lost. The shifted | | |
| 756 | | N-bit result is stored at the location pointed to by 'zPtr'. Each of 'aPtr' | | |
| 757 | | and 'zPtr' points to a 'size_words'-long array of 32-bit elements that | | |
| 758 | | concatenate in the platform's normal endian order to form an N-bit integer. | | |
| 759 | | The value of 'dist' can be arbitrarily large. In particular, if 'dist' is | | |
| 760 | | greater than N, the stored result will be 0. | | |
| 761 | *----------------------------------------------------------------------------*/ | | |
| 762 | void | | |
| 763 | softfloat_shiftLeftM( | | |
| 764 | u8int size_words, | | |
| 765 | const u32int *aPtr, | | |
| 766 | u32int dist, | | |
| 767 | u32int *zPtr | | |
| 768 | ); | | |
| 769 | #endif | | |
| 770 | | | |
| 771 | #ifndef softfloat_shiftLeft96M | | |
| 772 | /*---------------------------------------------------------------------------- | | |
| 773 | | This function or macro is the same as 'softfloat_shiftLeftM' with | | |
| 774 | | 'size_words' = 3 (N = 96). | | |
| 775 | *----------------------------------------------------------------------------*/ | | |
| 776 | #define softfloat_shiftLeft96M( aPtr, dist, zPtr ) softfloat_shiftLeftM( 3, aPtr, dist, zPtr ) | | |
| 777 | #endif | | |
| 778 | | | |
| 779 | #ifndef softfloat_shiftLeft128M | | |
| 780 | /*---------------------------------------------------------------------------- | | |
| 781 | | This function or macro is the same as 'softfloat_shiftLeftM' with | | |
| 782 | | 'size_words' = 4 (N = 128). | | |
| 783 | *----------------------------------------------------------------------------*/ | | |
| 784 | #define softfloat_shiftLeft128M( aPtr, dist, zPtr ) softfloat_shiftLeftM( 4, aPtr, dist, zPtr ) | | |
| 785 | #endif | | |
| 786 | | | |
| 787 | #ifndef softfloat_shiftLeft160M | | |
| 788 | /*---------------------------------------------------------------------------- | | |
| 789 | | This function or macro is the same as 'softfloat_shiftLeftM' with | | |
| 790 | | 'size_words' = 5 (N = 160). | | |
| 791 | *----------------------------------------------------------------------------*/ | | |
| 792 | #define softfloat_shiftLeft160M( aPtr, dist, zPtr ) softfloat_shiftLeftM( 5, aPtr, dist, zPtr ) | | |
| 793 | #endif | | |
| 794 | | | |
| 795 | #ifndef softfloat_shortShiftRightM | | |
| 796 | /*---------------------------------------------------------------------------- | | |
| 797 | | Shifts the N-bit unsigned integer pointed to by 'aPtr' right by the number | | |
| 798 | | of bits given in 'dist', where N = 'size_words' * 32. The value of 'dist' | | |
| 799 | | must be in the range 1 to 31. Any nonzero bits shifted off are lost. The | | |
| 800 | | shifted N-bit result is stored at the location pointed to by 'zPtr'. Each | | |
| 801 | | of 'aPtr' and 'zPtr' points to a 'size_words'-long array of 32-bit elements | | |
| 802 | | that concatenate in the platform's normal endian order to form an N-bit | | |
| 803 | | integer. | | |
| 804 | *----------------------------------------------------------------------------*/ | | |
| 805 | void | | |
| 806 | softfloat_shortShiftRightM( | | |
| 807 | u8int size_words, | | |
| 808 | const u32int *aPtr, | | |
| 809 | u8int dist, | | |
| 810 | u32int *zPtr | | |
| 811 | ); | | |
| 812 | #endif | | |
| 813 | | | |
| 814 | #ifndef softfloat_shortShiftRight128M | | |
| 815 | /*---------------------------------------------------------------------------- | | |
| 816 | | This function or macro is the same as 'softfloat_shortShiftRightM' with | | |
| 817 | | 'size_words' = 4 (N = 128). | | |
| 818 | *----------------------------------------------------------------------------*/ | | |
| 819 | #define softfloat_shortShiftRight128M( aPtr, dist, zPtr ) softfloat_shortShiftRightM( 4, aPtr, dist, zPtr ) | | |
| 820 | #endif | | |
| 821 | | | |
| 822 | #ifndef softfloat_shortShiftRight160M | | |
| 823 | /*---------------------------------------------------------------------------- | | |
| 824 | | This function or macro is the same as 'softfloat_shortShiftRightM' with | | |
| 825 | | 'size_words' = 5 (N = 160). | | |
| 826 | *----------------------------------------------------------------------------*/ | | |
| 827 | #define softfloat_shortShiftRight160M( aPtr, dist, zPtr ) softfloat_shortShiftRightM( 5, aPtr, dist, zPtr ) | | |
| 828 | #endif | | |
| 829 | | | |
| 830 | #ifndef softfloat_shortShiftRightJamM | | |
| 831 | /*---------------------------------------------------------------------------- | | |
| 832 | | Shifts the N-bit unsigned integer pointed to by 'aPtr' right by the number | | |
| 833 | | of bits given in 'dist', where N = 'size_words' * 32. The value of 'dist' | | |
| 834 | | must be in the range 1 to 31. If any nonzero bits are shifted off, they are | | |
| 835 | | "jammed" into the least-significant bit of the shifted value by setting the | | |
| 836 | | least-significant bit to 1. This shifted-and-jammed N-bit result is stored | | |
| 837 | | at the location pointed to by 'zPtr'. Each of 'aPtr' and 'zPtr' points | | |
| 838 | | to a 'size_words'-long array of 32-bit elements that concatenate in the | | |
| 839 | | platform's normal endian order to form an N-bit integer. | | |
| 840 | *----------------------------------------------------------------------------*/ | | |
| 841 | void | | |
| 842 | softfloat_shortShiftRightJamM( | | |
| 843 | u8int, const u32int *, u8int, u32int * ); | | |
| 844 | #endif | | |
| 845 | | | |
| 846 | #ifndef softfloat_shortShiftRightJam160M | | |
| 847 | /*---------------------------------------------------------------------------- | | |
| 848 | | This function or macro is the same as 'softfloat_shortShiftRightJamM' with | | |
| 849 | | 'size_words' = 5 (N = 160). | | |
| 850 | *----------------------------------------------------------------------------*/ | | |
| 851 | #define softfloat_shortShiftRightJam160M( aPtr, dist, zPtr ) softfloat_shortShiftRightJamM( 5, aPtr, dist, zPtr ) | | |
| 852 | #endif | | |
| 853 | | | |
| 854 | #ifndef softfloat_shiftRightM | | |
| 855 | /*---------------------------------------------------------------------------- | | |
| 856 | | Shifts the N-bit unsigned integer pointed to by 'aPtr' right by the number | | |
| 857 | | of bits given in 'dist', where N = 'size_words' * 32. The value of 'dist' | | |
| 858 | | must not be zero. Any nonzero bits shifted off are lost. The shifted | | |
| 859 | | N-bit result is stored at the location pointed to by 'zPtr'. Each of 'aPtr' | | |
| 860 | | and 'zPtr' points to a 'size_words'-long array of 32-bit elements that | | |
| 861 | | concatenate in the platform's normal endian order to form an N-bit integer. | | |
| 862 | | The value of 'dist' can be arbitrarily large. In particular, if 'dist' is | | |
| 863 | | greater than N, the stored result will be 0. | | |
| 864 | *----------------------------------------------------------------------------*/ | | |
| 865 | void | | |
| 866 | softfloat_shiftRightM( | | |
| 867 | u8int size_words, | | |
| 868 | const u32int *aPtr, | | |
| 869 | u32int dist, | | |
| 870 | u32int *zPtr | | |
| 871 | ); | | |
| 872 | #endif | | |
| 873 | | | |
| 874 | #ifndef softfloat_shiftRight96M | | |
| 875 | /*---------------------------------------------------------------------------- | | |
| 876 | | This function or macro is the same as 'softfloat_shiftRightM' with | | |
| 877 | | 'size_words' = 3 (N = 96). | | |
| 878 | *----------------------------------------------------------------------------*/ | | |
| 879 | #define softfloat_shiftRight96M( aPtr, dist, zPtr ) softfloat_shiftRightM( 3, aPtr, dist, zPtr ) | | |
| 880 | #endif | | |
| 881 | | | |
| 882 | #ifndef softfloat_shiftRightJamM | | |
| 883 | /*---------------------------------------------------------------------------- | | |
| 884 | | Shifts the N-bit unsigned integer pointed to by 'aPtr' right by the number | | |
| 885 | | of bits given in 'dist', where N = 'size_words' * 32. The value of 'dist' | | |
| 886 | | must not be zero. If any nonzero bits are shifted off, they are "jammed" | | |
| 887 | | into the least-significant bit of the shifted value by setting the least- | | |
| 888 | | significant bit to 1. This shifted-and-jammed N-bit result is stored | | |
| 889 | | at the location pointed to by 'zPtr'. Each of 'aPtr' and 'zPtr' points | | |
| 890 | | to a 'size_words'-long array of 32-bit elements that concatenate in the | | |
| 891 | | platform's normal endian order to form an N-bit integer. | | |
| 892 | | The value of 'dist' can be arbitrarily large. In particular, if 'dist' | | |
| 893 | | is greater than N, the stored result will be either 0 or 1, depending on | | |
| 894 | | whether the original N bits are all zeros. | | |
| 895 | *----------------------------------------------------------------------------*/ | | |
| 896 | void | | |
| 897 | softfloat_shiftRightJamM( | | |
| 898 | u8int size_words, | | |
| 899 | const u32int *aPtr, | | |
| 900 | u32int dist, | | |
| 901 | u32int *zPtr | | |
| 902 | ); | | |
| 903 | #endif | | |
| 904 | | | |
| 905 | #ifndef softfloat_shiftRightJam128M | | |
| 906 | /*---------------------------------------------------------------------------- | | |
| 907 | | This function or macro is the same as 'softfloat_shiftRightJamM' with | | |
| 908 | | 'size_words' = 4 (N = 128). | | |
| 909 | *----------------------------------------------------------------------------*/ | | |
| 910 | #define softfloat_shiftRightJam128M( aPtr, dist, zPtr ) softfloat_shiftRightJamM( 4, aPtr, dist, zPtr ) | | |
| 911 | #endif | | |
| 912 | | | |
| 913 | #ifndef softfloat_shiftRightJam160M | | |
| 914 | /*---------------------------------------------------------------------------- | | |
| 915 | | This function or macro is the same as 'softfloat_shiftRightJamM' with | | |
| 916 | | 'size_words' = 5 (N = 160). | | |
| 917 | *----------------------------------------------------------------------------*/ | | |
| 918 | #define softfloat_shiftRightJam160M( aPtr, dist, zPtr ) softfloat_shiftRightJamM( 5, aPtr, dist, zPtr ) | | |
| 919 | #endif | | |
| 920 | | | |
| 921 | #ifndef softfloat_addM | | |
| 922 | /*---------------------------------------------------------------------------- | | |
| 923 | | Adds the two N-bit integers pointed to by 'aPtr' and 'bPtr', where N = | | |
| 924 | | 'size_words' * 32. The addition is modulo 2^N, so any carry out is lost. | | |
| 925 | | The N-bit sum is stored at the location pointed to by 'zPtr'. Each of | | |
| 926 | | 'aPtr', 'bPtr', and 'zPtr' points to a 'size_words'-long array of 32-bit | | |
| 927 | | elements that concatenate in the platform's normal endian order to form an | | |
| 928 | | N-bit integer. | | |
| 929 | *----------------------------------------------------------------------------*/ | | |
| 930 | void | | |
| 931 | softfloat_addM( | | |
| 932 | u8int size_words, | | |
| 933 | const u32int *aPtr, | | |
| 934 | const u32int *bPtr, | | |
| 935 | u32int *zPtr | | |
| 936 | ); | | |
| 937 | #endif | | |
| 938 | | | |
| 939 | #ifndef softfloat_add128M | | |
| 940 | /*---------------------------------------------------------------------------- | | |
| 941 | | This function or macro is the same as 'softfloat_addM' with 'size_words' | | |
| 942 | | = 4 (N = 128). | | |
| 943 | *----------------------------------------------------------------------------*/ | | |
| 944 | #define softfloat_add128M( aPtr, bPtr, zPtr ) softfloat_addM( 4, aPtr, bPtr, zPtr ) | | |
| 945 | #endif | | |
| 946 | | | |
| 947 | #ifndef softfloat_add160M | | |
| 948 | /*---------------------------------------------------------------------------- | | |
| 949 | | This function or macro is the same as 'softfloat_addM' with 'size_words' | | |
| 950 | | = 5 (N = 160). | | |
| 951 | *----------------------------------------------------------------------------*/ | | |
| 952 | #define softfloat_add160M( aPtr, bPtr, zPtr ) softfloat_addM( 5, aPtr, bPtr, zPtr ) | | |
| 953 | #endif | | |
| 954 | | | |
| 955 | #ifndef softfloat_addCarryM | | |
| 956 | /*---------------------------------------------------------------------------- | | |
| 957 | | Adds the two N-bit unsigned integers pointed to by 'aPtr' and 'bPtr', where | | |
| 958 | | N = 'size_words' * 32, plus 'carry', which must be either 0 or 1. The N-bit | | |
| 959 | | sum (modulo 2^N) is stored at the location pointed to by 'zPtr', and any | | |
| 960 | | carry out is returned as the result. Each of 'aPtr', 'bPtr', and 'zPtr' | | |
| 961 | | points to a 'size_words'-long array of 32-bit elements that concatenate in | | |
| 962 | | the platform's normal endian order to form an N-bit integer. | | |
| 963 | *----------------------------------------------------------------------------*/ | | |
| 964 | u8int | | |
| 965 | softfloat_addCarryM( | | |
| 966 | u8int size_words, | | |
| 967 | const u32int *aPtr, | | |
| 968 | const u32int *bPtr, | | |
| 969 | u8int carry, | | |
| 970 | u32int *zPtr | | |
| 971 | ); | | |
| 972 | #endif | | |
| 973 | | | |
| 974 | #ifndef softfloat_addComplCarryM | | |
| 975 | /*---------------------------------------------------------------------------- | | |
| 976 | | This function or macro is the same as 'softfloat_addCarryM', except that | | |
| 977 | | the value of the unsigned integer pointed to by 'bPtr' is bit-wise completed | | |
| 978 | | before the addition. | | |
| 979 | *----------------------------------------------------------------------------*/ | | |
| 980 | u8int | | |
| 981 | softfloat_addComplCarryM( | | |
| 982 | u8int size_words, | | |
| 983 | const u32int *aPtr, | | |
| 984 | const u32int *bPtr, | | |
| 985 | u8int carry, | | |
| 986 | u32int *zPtr | | |
| 987 | ); | | |
| 988 | #endif | | |
| 989 | | | |
| 990 | #ifndef softfloat_addComplCarry96M | | |
| 991 | /*---------------------------------------------------------------------------- | | |
| 992 | | This function or macro is the same as 'softfloat_addComplCarryM' with | | |
| 993 | | 'size_words' = 3 (N = 96). | | |
| 994 | *----------------------------------------------------------------------------*/ | | |
| 995 | #define softfloat_addComplCarry96M( aPtr, bPtr, carry, zPtr ) softfloat_addComplCarryM( 3, aPtr, bPtr, carry, zPtr ) | | |
| 996 | #endif | | |
| 997 | | | |
| 998 | #ifndef softfloat_negXM | | |
| 999 | /*---------------------------------------------------------------------------- | | |
| 1000 | | Replaces the N-bit unsigned integer pointed to by 'zPtr' by the | | |
| 1001 | | 2s-complement of itself, where N = 'size_words' * 32. Argument 'zPtr' | | |
| 1002 | | points to a 'size_words'-long array of 32-bit elements that concatenate in | | |
| 1003 | | the platform's normal endian order to form an N-bit integer. | | |
| 1004 | *----------------------------------------------------------------------------*/ | | |
| 1005 | void softfloat_negXM( u8int size_words, u32int *zPtr ); | | |
| 1006 | #endif | 57 | #endif |
| 1007 | | | |
| 1008 | #ifndef softfloat_negX96M | | |
| 1009 | /*---------------------------------------------------------------------------- | | |
| 1010 | | This function or macro is the same as 'softfloat_negXM' with 'size_words' | | |
| 1011 | | = 3 (N = 96). | | |
| 1012 | *----------------------------------------------------------------------------*/ | | |
| 1013 | #define softfloat_negX96M( zPtr ) softfloat_negXM( 3, zPtr ) | | |
| 1014 | #endif | | |
| 1015 | | | |
| 1016 | #ifndef softfloat_negX128M | | |
| 1017 | /*---------------------------------------------------------------------------- | | |
| 1018 | | This function or macro is the same as 'softfloat_negXM' with 'size_words' | | |
| 1019 | | = 4 (N = 128). | | |
| 1020 | *----------------------------------------------------------------------------*/ | | |
| 1021 | #define softfloat_negX128M( zPtr ) softfloat_negXM( 4, zPtr ) | | |
| 1022 | #endif | | |
| 1023 | | | |
| 1024 | #ifndef softfloat_negX160M | | |
| 1025 | /*---------------------------------------------------------------------------- | | |
| 1026 | | This function or macro is the same as 'softfloat_negXM' with 'size_words' | | |
| 1027 | | = 5 (N = 160). | | |
| 1028 | *----------------------------------------------------------------------------*/ | | |
| 1029 | #define softfloat_negX160M( zPtr ) softfloat_negXM( 5, zPtr ) | | |
| 1030 | #endif | | |
| 1031 | | | |
| 1032 | #ifndef softfloat_negX256M | | |
| 1033 | /*---------------------------------------------------------------------------- | | |
| 1034 | | This function or macro is the same as 'softfloat_negXM' with 'size_words' | | |
| 1035 | | = 8 (N = 256). | | |
| 1036 | *----------------------------------------------------------------------------*/ | | |
| 1037 | #define softfloat_negX256M( zPtr ) softfloat_negXM( 8, zPtr ) | | |
| 1038 | #endif | | |
| 1039 | | | |
| 1040 | #ifndef softfloat_sub1XM | | |
| 1041 | /*---------------------------------------------------------------------------- | | |
| 1042 | | Subtracts 1 from the N-bit integer pointed to by 'zPtr', where N = | | |
| 1043 | | 'size_words' * 32. The subtraction is modulo 2^N, so any borrow out (carry | | |
| 1044 | | out) is lost. Argument 'zPtr' points to a 'size_words'-long array of 32-bit | | |
| 1045 | | elements that concatenate in the platform's normal endian order to form an | | |
| 1046 | | N-bit integer. | | |
| 1047 | *----------------------------------------------------------------------------*/ | | |
| 1048 | void softfloat_sub1XM( u8int size_words, u32int *zPtr ); | | |
| 1049 | #endif | | |
| 1050 | | | |
| 1051 | #ifndef softfloat_sub1X96M | | |
| 1052 | /*---------------------------------------------------------------------------- | | |
| 1053 | | This function or macro is the same as 'softfloat_sub1XM' with 'size_words' | | |
| 1054 | | = 3 (N = 96). | | |
| 1055 | *----------------------------------------------------------------------------*/ | | |
| 1056 | #define softfloat_sub1X96M( zPtr ) softfloat_sub1XM( 3, zPtr ) | | |
| 1057 | #endif | | |
| 1058 | | | |
| 1059 | #ifndef softfloat_sub1X160M | | |
| 1060 | /*---------------------------------------------------------------------------- | | |
| 1061 | | This function or macro is the same as 'softfloat_sub1XM' with 'size_words' | | |
| 1062 | | = 5 (N = 160). | | |
| 1063 | *----------------------------------------------------------------------------*/ | | |
| 1064 | #define softfloat_sub1X160M( zPtr ) softfloat_sub1XM( 5, zPtr ) | | |
| 1065 | #endif | | |
| 1066 | | | |
| 1067 | #ifndef softfloat_subM | | |
| 1068 | /*---------------------------------------------------------------------------- | | |
| 1069 | | Subtracts the two N-bit integers pointed to by 'aPtr' and 'bPtr', where N = | | |
| 1070 | | 'size_words' * 32. The subtraction is modulo 2^N, so any borrow out (carry | | |
| 1071 | | out) is lost. The N-bit difference is stored at the location pointed to by | | |
| 1072 | | 'zPtr'. Each of 'aPtr', 'bPtr', and 'zPtr' points to a 'size_words'-long | | |
| 1073 | | array of 32-bit elements that concatenate in the platform's normal endian | | |
| 1074 | | order to form an N-bit integer. | | |
| 1075 | *----------------------------------------------------------------------------*/ | | |
| 1076 | void | | |
| 1077 | softfloat_subM( | | |
| 1078 | u8int size_words, | | |
| 1079 | const u32int *aPtr, | | |
| 1080 | const u32int *bPtr, | | |
| 1081 | u32int *zPtr | | |
| 1082 | ); | | |
| 1083 | #endif | | |
| 1084 | | | |
| 1085 | #ifndef softfloat_sub96M | | |
| 1086 | /*---------------------------------------------------------------------------- | | |
| 1087 | | This function or macro is the same as 'softfloat_subM' with 'size_words' | | |
| 1088 | | = 3 (N = 96). | | |
| 1089 | *----------------------------------------------------------------------------*/ | | |
| 1090 | #define softfloat_sub96M( aPtr, bPtr, zPtr ) softfloat_subM( 3, aPtr, bPtr, zPtr ) | | |
| 1091 | #endif | | |
| 1092 | | | |
| 1093 | #ifndef softfloat_sub128M | | |
| 1094 | /*---------------------------------------------------------------------------- | | |
| 1095 | | This function or macro is the same as 'softfloat_subM' with 'size_words' | | |
| 1096 | | = 4 (N = 128). | | |
| 1097 | *----------------------------------------------------------------------------*/ | | |
| 1098 | #define softfloat_sub128M( aPtr, bPtr, zPtr ) softfloat_subM( 4, aPtr, bPtr, zPtr ) | | |
| 1099 | #endif | | |
| 1100 | | | |
| 1101 | #ifndef softfloat_sub160M | | |
| 1102 | /*---------------------------------------------------------------------------- | | |
| 1103 | | This function or macro is the same as 'softfloat_subM' with 'size_words' | | |
| 1104 | | = 5 (N = 160). | | |
| 1105 | *----------------------------------------------------------------------------*/ | | |
| 1106 | #define softfloat_sub160M( aPtr, bPtr, zPtr ) softfloat_subM( 5, aPtr, bPtr, zPtr ) | | |
| 1107 | #endif | 58 | #endif |
| 1108 | | 59 | |
| 1109 | #ifndef softfloat_mul64To128M | 60 | #if BYTE_ORDER == LITTLE_ENDIAN |
| 1110 | /*---------------------------------------------------------------------------- | | |
| 1111 | | Multiplies 'a' and 'b' and stores the 128-bit product at the location | | |
| 1112 | | pointed to by 'zPtr'. Argument 'zPtr' points to an array of four 32-bit | | |
| 1113 | | elements that concatenate in the platform's normal endian order to form a | | |
| 1114 | | 128-bit integer. | | |
| 1115 | *----------------------------------------------------------------------------*/ | | |
| 1116 | void softfloat_mul64To128M( u64int a, u64int b, u32int *zPtr ); | | |
| 1117 | #endif | | |
| 1118 | | | |
| 1119 | #ifndef softfloat_mul128MTo256M | | |
| 1120 | /*---------------------------------------------------------------------------- | | |
| 1121 | | Multiplies the two 128-bit unsigned integers pointed to by 'aPtr' and | | |
| 1122 | | 'bPtr', and stores the 256-bit product at the location pointed to by 'zPtr'. | | |
| 1123 | | Each of 'aPtr' and 'bPtr' points to an array of four 32-bit elements that | | |
| 1124 | | concatenate in the platform's normal endian order to form a 128-bit integer. | | |
| 1125 | | Argument 'zPtr' points to an array of eight 32-bit elements that concatenate | | |
| 1126 | | to form a 256-bit integer. | | |
| 1127 | *----------------------------------------------------------------------------*/ | | |
| 1128 | void | | |
| 1129 | softfloat_mul128MTo256M( | | |
| 1130 | const u32int *aPtr, const u32int *bPtr, u32int *zPtr ); | | |
| 1131 | #endif | | |
| 1132 | | | |
| 1133 | #ifndef softfloat_remStepMBy32 | | |
| 1134 | /*---------------------------------------------------------------------------- | | |
| 1135 | | Performs a "remainder reduction step" as follows: Arguments 'remPtr' and | | |
| 1136 | | 'bPtr' both point to N-bit unsigned integers, where N = 'size_words' * 32. | | |
| 1137 | | Defining R and B as the values of those integers, the expression (R<<'dist') | | |
| 1138 | | - B * q is computed modulo 2^N, and the N-bit result is stored at the | | |
| 1139 | | location pointed to by 'zPtr'. Each of 'remPtr', 'bPtr', and 'zPtr' points | | |
| 1140 | | to a 'size_words'-long array of 32-bit elements that concatenate in the | | |
| 1141 | | platform's normal endian order to form an N-bit integer. | | |
| 1142 | *----------------------------------------------------------------------------*/ | | |
| 1143 | void | | |
| 1144 | softfloat_remStepMBy32( | | |
| 1145 | u8int size_words, | | |
| 1146 | const u32int *remPtr, | | |
| 1147 | u8int dist, | | |
| 1148 | const u32int *bPtr, | | |
| 1149 | u32int q, | | |
| 1150 | u32int *zPtr | | |
| 1151 | ); | | |
| 1152 | #endif | | |
| 1153 | | | |
| 1154 | #ifndef softfloat_remStep96MBy32 | | |
| 1155 | /*---------------------------------------------------------------------------- | | |
| 1156 | | This function or macro is the same as 'softfloat_remStepMBy32' with | | |
| 1157 | | 'size_words' = 3 (N = 96). | | |
| 1158 | *----------------------------------------------------------------------------*/ | | |
| 1159 | #define softfloat_remStep96MBy32( remPtr, dist, bPtr, q, zPtr ) softfloat_remStepMBy32( 3, remPtr, dist, bPtr, q, zPtr ) | | |
| 1160 | #endif | | |
| 1161 | | | |
| 1162 | #ifndef softfloat_remStep128MBy32 | | |
| 1163 | /*---------------------------------------------------------------------------- | | |
| 1164 | | This function or macro is the same as 'softfloat_remStepMBy32' with | | |
| 1165 | | 'size_words' = 4 (N = 128). | | |
| 1166 | *----------------------------------------------------------------------------*/ | | |
| 1167 | #define softfloat_remStep128MBy32( remPtr, dist, bPtr, q, zPtr ) softfloat_remStepMBy32( 4, remPtr, dist, bPtr, q, zPtr ) | | |
| 1168 | #endif | | |
| 1169 | | | |
| 1170 | #ifndef softfloat_remStep160MBy32 | | |
| 1171 | /*---------------------------------------------------------------------------- | | |
| 1172 | | This function or macro is the same as 'softfloat_remStepMBy32' with | | |
| 1173 | | 'size_words' = 5 (N = 160). | | |
| 1174 | *----------------------------------------------------------------------------*/ | | |
| 1175 | #define softfloat_remStep160MBy32( remPtr, dist, bPtr, q, zPtr ) softfloat_remStepMBy32( 5, remPtr, dist, bPtr, q, zPtr ) | | |
| 1176 | #endif | | |
| 1177 | | | |
| 1178 | #endif | | |
| 1179 | | | |
| 1180 | /*---------------------------------------------------------------------------- | | |
| 1181 | | Types used to pass 16-bit, 32-bit, 64-bit, and 128-bit floating-point | | |
| 1182 | | arguments and results to/from functions. These types must be exactly | | |
| 1183 | | 16 bits, 32 bits, 64 bits, and 128 bits in size, respectively. Where a | | |
| 1184 | | platform has "native" support for IEEE-Standard floating-point formats, | | |
| 1185 | | the types below may, if desired, be defined as aliases for the native types | | |
| 1186 | | (typically 'float' and 'double', and possibly 'long double'). | | |
| 1187 | *----------------------------------------------------------------------------*/ | | |
| 1188 | | | |
| 1189 | typedef struct { u16int v; } float16_t; | | |
| 1190 | typedef struct { u16int v; } bfloat16_t; | | |
| 1191 | typedef struct { u32int v; } float32_t; | | |
| 1192 | typedef struct { u64int v; } float64_t; | | |
| 1193 | typedef struct { u64int v[2]; } float128_t; | | |
| 1194 | | | |
| 1195 | /*---------------------------------------------------------------------------- | | |
| 1196 | | The format of an 80-bit extended floating-point number in memory. This | | |
| 1197 | | structure must contain a 16-bit field named 'signExp' and a 64-bit field | | |
| 1198 | | named 'signif'. | | |
| 1199 | *----------------------------------------------------------------------------*/ | | |
| 1200 | #ifdef LITTLEENDIAN | | |
| 1201 | struct extFloat80M { u64int signif; u16int signExp; }; | 61 | struct extFloat80M { u64int signif; u16int signExp; }; |
| 1202 | #else | 62 | #else |
| 1203 | struct extFloat80M { u16int signExp; u64int signif; }; | 63 | struct extFloat80M { u16int signExp; u64int signif; }; |
| 1204 | #endif | 64 | #endif |
| 1205 | | 65 | |
| 1206 | /*---------------------------------------------------------------------------- | | |
| 1207 | | The type used to pass 80-bit extended floating-point arguments and | | |
| 1208 | | results to/from functions. This type must have size identical to | | |
| 1209 | | 'struct extFloat80M'. Type 'extFloat80_t' can be defined as an alias for | | |
| 1210 | | 'struct extFloat80M'. Alternatively, if a platform has "native" support | | |
| 1211 | | for IEEE-Standard 80-bit extended floating-point, it may be possible, | | |
| 1212 | | if desired, to define 'extFloat80_t' as an alias for the native type | | |
| 1213 | | (presumably either 'long double' or a nonstandard compiler-intrinsic type). | | |
| 1214 | | In that case, the 'signif' and 'signExp' fields of 'struct extFloat80M' | | |
| 1215 | | must align exactly with the locations in memory of the sign, exponent, and | | |
| 1216 | | significand of the native type. | | |
| 1217 | *----------------------------------------------------------------------------*/ | | |
| 1218 | typedef struct extFloat80M extFloat80_t; | | |
| 1219 | | | |
| 1220 | union ui16_f16 { u16int ui; float16_t f; }; | | |
| 1221 | union ui16_bf16 { u16int ui; bfloat16_t f; }; | | |
| 1222 | union ui32_f32 { u32int ui; float32_t f; }; | | |
| 1223 | union ui64_f64 { u64int ui; float64_t f; }; | | |
| 1224 | | | |
| 1225 | #ifdef SOFTFLOAT_FAST_INT64 | | |
| 1226 | union extF80M_extF80 { struct extFloat80M fM; extFloat80_t f; }; | | |
| 1227 | union ui128_f128 { struct uint128 ui; float128_t f; }; | | |
| 1228 | #endif | | |
| 1229 | | | |
| 1230 | enum { | | |
| 1231 | softfloat_mulAdd_subC = 1, | | |
| 1232 | softfloat_mulAdd_subProd = 2 | | |
| 1233 | }; | | |
| 1234 | | | |
| 1235 | /*---------------------------------------------------------------------------- | | |
| 1236 | *----------------------------------------------------------------------------*/ | | |
| 1237 | u32int softfloat_roundToUI32( bool, u64int, u8int, bool ); | | |
| 1238 | | | |
| 1239 | #ifdef SOFTFLOAT_FAST_INT64 | | |
| 1240 | u64int | | |
| 1241 | softfloat_roundToUI64( | | |
| 1242 | bool, u64int, u64int, u8int, bool ); | | |
| 1243 | #else | | |
| 1244 | u64int softfloat_roundMToUI64( bool, u32int *, u8int, bool ); | | |
| 1245 | #endif | | |
| 1246 | | | |
| 1247 | s32int softfloat_roundToI32( bool, u64int, u8int, bool ); | | |
| 1248 | | | |
| 1249 | #ifdef SOFTFLOAT_FAST_INT64 | | |
| 1250 | s64int | | |
| 1251 | softfloat_roundToI64( | | |
| 1252 | bool, u64int, u64int, u8int, bool ); | | |
| 1253 | #else | | |
| 1254 | s64int softfloat_roundMToI64( bool, u32int *, u8int, bool ); | | |
| 1255 | #endif | | |
| 1256 | | | |
| 1257 | /*---------------------------------------------------------------------------- | | |
| 1258 | *----------------------------------------------------------------------------*/ | | |
| 1259 | #define signF16UI( a ) ((bool) ((u16int) (a)>>15)) | | |
| 1260 | #define expF16UI( a ) ((s8int) ((a)>>10) & 0x1F) | | |
| 1261 | #define fracF16UI( a ) ((a) & 0x03FF) | | |
| 1262 | #define packToF16UI( sign, exp, sig ) (((u16int) (sign)<<15) + ((u16int) (exp)<<10) + (sig)) | | |
| 1263 | | | |
| 1264 | #define isNaNF16UI( a ) (((~(a) & 0x7C00) == 0) && ((a) & 0x03FF)) | | |
| 1265 | | | |
| 1266 | struct exp8_sig16 { s8int exp; u16int sig; }; | | |
| 1267 | struct exp8_sig16 softfloat_normSubnormalF16Sig( u16int ); | | |
| 1268 | | | |
| 1269 | float16_t softfloat_roundPackToF16( bool, s16int, u16int ); | | |
| 1270 | float16_t softfloat_normRoundPackToF16( bool, s16int, u16int ); | | |
| 1271 | | | |
| 1272 | float16_t softfloat_addMagsF16( u16int, u16int ); | | |
| 1273 | float16_t softfloat_subMagsF16( u16int, u16int ); | | |
| 1274 | float16_t | | |
| 1275 | softfloat_mulAddF16( | | |
| 1276 | u16int, u16int, u16int, u8int ); | | |
| 1277 | | | |
| 1278 | /*---------------------------------------------------------------------------- | | |
| 1279 | *----------------------------------------------------------------------------*/ | | |
| 1280 | #define signBF16UI( a ) ((bool) ((u16int) (a)>>15)) | | |
| 1281 | #define expBF16UI( a ) ((s16int) ((a)>>7) & 0xFF) | | |
| 1282 | #define fracBF16UI( a ) ((a) & 0x07F) | | |
| 1283 | #define packToBF16UI( sign, exp, sig ) (((u16int) (sign)<<15) + ((u16int) (exp)<<7) + (sig)) | | |
| 1284 | | | |
| 1285 | #define isNaNBF16UI( a ) (((~(a) & 0x7FC0) == 0) && ((a) & 0x07F)) | | |
| 1286 | | | |
| 1287 | bfloat16_t softfloat_roundPackToBF16( bool, s16int, u16int ); | | |
| 1288 | struct exp8_sig16 softfloat_normSubnormalBF16Sig( u16int ); | | |
| 1289 | | | |
| 1290 | /*---------------------------------------------------------------------------- | | |
| 1291 | *----------------------------------------------------------------------------*/ | | |
| 1292 | #define signF32UI( a ) ((bool) ((u32int) (a)>>31)) | | |
| 1293 | #define expF32UI( a ) ((s16int) ((a)>>23) & 0xFF) | | |
| 1294 | #define fracF32UI( a ) ((a) & 0x007FFFFF) | | |
| 1295 | #define packToF32UI( sign, exp, sig ) (((u32int) (sign)<<31) + ((u32int) (exp)<<23) + (sig)) | | |
| 1296 | | | |
| 1297 | #define isNaNF32UI( a ) (((~(a) & 0x7F800000) == 0) && ((a) & 0x007FFFFF)) | | |
| 1298 | | | |
| 1299 | struct exp16_sig32 { s16int exp; u32int sig; }; | | |
| 1300 | struct exp16_sig32 softfloat_normSubnormalF32Sig( u32int ); | | |
| 1301 | | | |
| 1302 | float32_t softfloat_roundPackToF32( bool, s16int, u32int ); | | |
| 1303 | float32_t softfloat_normRoundPackToF32( bool, s16int, u32int ); | | |
| 1304 | | | |
| 1305 | float32_t softfloat_addMagsF32( u32int, u32int ); | | |
| 1306 | float32_t softfloat_subMagsF32( u32int, u32int ); | | |
| 1307 | float32_t | | |
| 1308 | softfloat_mulAddF32( | | |
| 1309 | u32int, u32int, u32int, u8int ); | | |
| 1310 | | | |
| 1311 | /*---------------------------------------------------------------------------- | | |
| 1312 | *----------------------------------------------------------------------------*/ | | |
| 1313 | #define signF64UI( a ) ((bool) ((u64int) (a)>>63)) | | |
| 1314 | #define expF64UI( a ) ((s16int) ((a)>>52) & 0x7FF) | | |
| 1315 | #define fracF64UI( a ) ((a) & UINT64_C( 0x000FFFFFFFFFFFFF )) | | |
| 1316 | #define packToF64UI( sign, exp, sig ) ((u64int) (((u64int) (sign)<<63) + ((u64int) (exp)<<52) + (sig))) | | |
| 1317 | | | |
| 1318 | #define isNaNF64UI( a ) (((~(a) & UINT64_C( 0x7FF0000000000000 )) == 0) && ((a) & UINT64_C( 0x000FFFFFFFFFFFFF ))) | | |
| 1319 | | | |
| 1320 | struct exp16_sig64 { s16int exp; u64int sig; }; | | |
| 1321 | struct exp16_sig64 softfloat_normSubnormalF64Sig( u64int ); | | |
| 1322 | | | |
| 1323 | float64_t softfloat_roundPackToF64( bool, s16int, u64int ); | | |
| 1324 | float64_t softfloat_normRoundPackToF64( bool, s16int, u64int ); | | |
| 1325 | | | |
| 1326 | float64_t softfloat_addMagsF64( u64int, u64int, bool ); | | |
| 1327 | float64_t softfloat_subMagsF64( u64int, u64int, bool ); | | |
| 1328 | float64_t | | |
| 1329 | softfloat_mulAddF64( | | |
| 1330 | u64int, u64int, u64int, u8int ); | | |
| 1331 | | | |
| 1332 | /*---------------------------------------------------------------------------- | | |
| 1333 | *----------------------------------------------------------------------------*/ | | |
| 1334 | #define signExtF80UI64( a64 ) ((bool) ((u16int) (a64)>>15)) | | |
| 1335 | #define expExtF80UI64( a64 ) ((a64) & 0x7FFF) | | |
| 1336 | #define packToExtF80UI64( sign, exp ) ((u16int) (sign)<<15 | (exp)) | | |
| 1337 | | | |
| 1338 | #define isNaNExtF80UI( a64, a0 ) ((((a64) & 0x7FFF) == 0x7FFF) && ((a0) & UINT64_C( 0x7FFFFFFFFFFFFFFF ))) | | |
| 1339 | | | |
| 1340 | #ifdef SOFTFLOAT_FAST_INT64 | | |
| 1341 | | | |
| 1342 | /*---------------------------------------------------------------------------- | | |
| 1343 | *----------------------------------------------------------------------------*/ | | |
| 1344 | | | |
| 1345 | struct exp32_sig64 { s32int exp; u64int sig; }; | | |
| 1346 | struct exp32_sig64 softfloat_normSubnormalExtF80Sig( u64int ); | | |
| 1347 | | | |
| 1348 | extFloat80_t | | |
| 1349 | softfloat_roundPackToExtF80( | | |
| 1350 | bool, s32int, u64int, u64int, u8int ); | | |
| 1351 | extFloat80_t | | |
| 1352 | softfloat_normRoundPackToExtF80( | | |
| 1353 | bool, s32int, u64int, u64int, u8int ); | | |
| 1354 | | | |
| 1355 | extFloat80_t | | |
| 1356 | softfloat_addMagsExtF80( | | |
| 1357 | u16int, u64int, u16int, u64int, bool ); | | |
| 1358 | extFloat80_t | | |
| 1359 | softfloat_subMagsExtF80( | | |
| 1360 | u16int, u64int, u16int, u64int, bool ); | | |
| 1361 | | | |
| 1362 | /*---------------------------------------------------------------------------- | | |
| 1363 | *----------------------------------------------------------------------------*/ | | |
| 1364 | #define signF128UI64( a64 ) ((bool) ((u64int) (a64)>>63)) | | |
| 1365 | #define expF128UI64( a64 ) ((s32int) ((a64)>>48) & 0x7FFF) | | |
| 1366 | #define fracF128UI64( a64 ) ((a64) & UINT64_C( 0x0000FFFFFFFFFFFF )) | | |
| 1367 | #define packToF128UI64( sign, exp, sig64 ) (((u64int) (sign)<<63) + ((u64int) (exp)<<48) + (sig64)) | | |
| 1368 | | | |
| 1369 | #define isNaNF128UI( a64, a0 ) (((~(a64) & UINT64_C( 0x7FFF000000000000 )) == 0) && (a0 || ((a64) & UINT64_C( 0x0000FFFFFFFFFFFF )))) | | |
| 1370 | | | |
| 1371 | struct exp32_sig128 { s32int exp; struct uint128 sig; }; | | |
| 1372 | struct exp32_sig128 | | |
| 1373 | softfloat_normSubnormalF128Sig( u64int, u64int ); | | |
| 1374 | | | |
| 1375 | float128_t | | |
| 1376 | softfloat_roundPackToF128( | | |
| 1377 | bool, s32int, u64int, u64int, u64int ); | | |
| 1378 | float128_t | | |
| 1379 | softfloat_normRoundPackToF128( | | |
| 1380 | bool, s32int, u64int, u64int ); | | |
| 1381 | | | |
| 1382 | float128_t | | |
| 1383 | softfloat_addMagsF128( | | |
| 1384 | u64int, u64int, u64int, u64int, bool ); | | |
| 1385 | float128_t | | |
| 1386 | softfloat_subMagsF128( | | |
| 1387 | u64int, u64int, u64int, u64int, bool ); | | |
| 1388 | float128_t | | |
| 1389 | softfloat_mulAddF128( | | |
| 1390 | u64int, | | |
| 1391 | u64int, | | |
| 1392 | u64int, | | |
| 1393 | u64int, | | |
| 1394 | u64int, | | |
| 1395 | u64int, | | |
| 1396 | u8int | | |
| 1397 | ); | | |
| 1398 | | | |
| 1399 | #else | | |
| 1400 | | | |
| 1401 | /*---------------------------------------------------------------------------- | | |
| 1402 | *----------------------------------------------------------------------------*/ | | |
| 1403 | | | |
| 1404 | bool | | |
| 1405 | softfloat_tryPropagateNaNExtF80M( | | |
| 1406 | const struct extFloat80M *, | | |
| 1407 | const struct extFloat80M *, | | |
| 1408 | struct extFloat80M * | | |
| 1409 | ); | | |
| 1410 | void softfloat_invalidExtF80M( struct extFloat80M * ); | | |
| 1411 | | | |
| 1412 | int softfloat_normExtF80SigM( u64int * ); | | |
| 1413 | | | |
| 1414 | void | | |
| 1415 | softfloat_roundPackMToExtF80M( | | |
| 1416 | bool, s32int, u32int *, u8int, struct extFloat80M * ); | | |
| 1417 | void | | |
| 1418 | softfloat_normRoundPackMToExtF80M( | | |
| 1419 | bool, s32int, u32int *, u8int, struct extFloat80M * ); | | |
| 1420 | | | |
| 1421 | void | | |
| 1422 | softfloat_addExtF80M( | | |
| 1423 | const struct extFloat80M *, | | |
| 1424 | const struct extFloat80M *, | | |
| 1425 | struct extFloat80M *, | | |
| 1426 | bool | | |
| 1427 | ); | | |
| 1428 | | | |
| 1429 | int | | |
| 1430 | softfloat_compareNonnormExtF80M( | | |
| 1431 | const struct extFloat80M *, const struct extFloat80M * ); | | |
| 1432 | | | |
| 1433 | /*---------------------------------------------------------------------------- | | |
| 1434 | *----------------------------------------------------------------------------*/ | | |
| 1435 | #define signF128UI96( a96 ) ((bool) ((u32int) (a96)>>31)) | | |
| 1436 | #define expF128UI96( a96 ) ((s32int) ((a96)>>16) & 0x7FFF) | | |
| 1437 | #define fracF128UI96( a96 ) ((a96) & 0x0000FFFF) | | |
| 1438 | #define packToF128UI96( sign, exp, sig96 ) (((u32int) (sign)<<31) + ((u32int) (exp)<<16) + (sig96)) | | |
| 1439 | | | |
| 1440 | bool softfloat_isNaNF128M( const u32int * ); | | |
| 1441 | | | |
| 1442 | bool | | |
| 1443 | softfloat_tryPropagateNaNF128M( | | |
| 1444 | const u32int *, const u32int *, u32int * ); | | |
| 1445 | void softfloat_invalidF128M( u32int * ); | | |
| 1446 | | | |
| 1447 | int softfloat_shiftNormSigF128M( const u32int *, u8int, u32int * ); | | |
| 1448 | | | |
| 1449 | void softfloat_roundPackMToF128M( bool, s32int, u32int *, u32int * ); | | |
| 1450 | void softfloat_normRoundPackMToF128M( bool, s32int, u32int *, u32int * ); | | |
| 1451 | | | |
| 1452 | void | | |
| 1453 | softfloat_addF128M( const u32int *, const u32int *, u32int *, bool ); | | |
| 1454 | void | | |
| 1455 | softfloat_mulAddF128M( | | |
| 1456 | const u32int *, | | |
| 1457 | const u32int *, | | |
| 1458 | const u32int *, | | |
| 1459 | u32int *, | | |
| 1460 | u8int | | |
| 1461 | ); | | |
| 1462 | | | |
| 1463 | #endif | | |
| 1464 | | | |
| 1465 | #ifndef THREAD_LOCAL | | |
| 1466 | #define THREAD_LOCAL | | |
| 1467 | #endif | | |
| 1468 | | | |
| 1469 | /*---------------------------------------------------------------------------- | | |
| 1470 | | Software floating-point underflow tininess-detection mode. | | |
| 1471 | *----------------------------------------------------------------------------*/ | | |
| 1472 | extern THREAD_LOCAL u8int softfloat_detectTininess; | | |
| 1473 | enum { | | |
| 1474 | softfloat_tininess_beforeRounding = 0, | | |
| 1475 | softfloat_tininess_afterRounding = 1 | | |
| 1476 | }; | | |
| 1477 | | | |
| 1478 | /*---------------------------------------------------------------------------- | | |
| 1479 | | Software floating-point rounding mode. (Mode "odd" is supported only if | | |
| 1480 | | SoftFloat is compiled with macro 'SOFTFLOAT_ROUND_ODD' defined.) | | |
| 1481 | *----------------------------------------------------------------------------*/ | | |
| 1482 | extern THREAD_LOCAL u8int softfloat_roundingMode; | | |
| 1483 | enum { | | |
| 1484 | softfloat_round_near_even = 0, | | |
| 1485 | softfloat_round_minMag = 1, | | |
| 1486 | softfloat_round_min = 2, | | |
| 1487 | softfloat_round_max = 3, | | |
| 1488 | softfloat_round_near_maxMag = 4, | | |
| 1489 | softfloat_round_odd = 6 | | |
| 1490 | }; | | |
| 1491 | | | |
| 1492 | /*---------------------------------------------------------------------------- | | |
| 1493 | | Software floating-point exception flags. | | |
| 1494 | *----------------------------------------------------------------------------*/ | | |
| 1495 | extern THREAD_LOCAL u8int softfloat_exceptionFlags; | | |
| 1496 | typedef enum { | | |
| 1497 | softfloat_flag_inexact = 1, | | |
| 1498 | softfloat_flag_underflow = 2, | | |
| 1499 | softfloat_flag_overflow = 4, | | |
| 1500 | softfloat_flag_infinite = 8, | | |
| 1501 | softfloat_flag_invalid = 16 | | |
| 1502 | } exceptionFlag_t; | | |
| 1503 | | | |
| 1504 | /*---------------------------------------------------------------------------- | | |
| 1505 | | Routine to raise any or all of the software floating-point exception flags. | | |
| 1506 | *----------------------------------------------------------------------------*/ | | |
| 1507 | void softfloat_raiseFlags( u8int ); | | |
| 1508 | | | |
| 1509 | /*---------------------------------------------------------------------------- | | |
| 1510 | | Integer-to-floating-point conversion routines. | | |
| 1511 | *----------------------------------------------------------------------------*/ | | |
| 1512 | float16_t ui32_to_f16( u32int ); | | |
| 1513 | float32_t ui32_to_f32( u32int ); | | |
| 1514 | float64_t ui32_to_f64( u32int ); | | |
| 1515 | #ifdef SOFTFLOAT_FAST_INT64 | | |
| 1516 | extFloat80_t ui32_to_extF80( u32int ); | | |
| 1517 | float128_t ui32_to_f128( u32int ); | | |
| 1518 | #endif | | |
| 1519 | void ui32_to_extF80M( u32int, extFloat80_t * ); | | |
| 1520 | void ui32_to_f128M( u32int, float128_t * ); | | |
| 1521 | float16_t ui64_to_f16( u64int ); | | |
| 1522 | float32_t ui64_to_f32( u64int ); | | |
| 1523 | float64_t ui64_to_f64( u64int ); | | |
| 1524 | #ifdef SOFTFLOAT_FAST_INT64 | | |
| 1525 | extFloat80_t ui64_to_extF80( u64int ); | | |
| 1526 | float128_t ui64_to_f128( u64int ); | | |
| 1527 | #endif | | |
| 1528 | void ui64_to_extF80M( u64int, extFloat80_t * ); | | |
| 1529 | void ui64_to_f128M( u64int, float128_t * ); | | |
| 1530 | float16_t i32_to_f16( s32int ); | | |
| 1531 | float32_t i32_to_f32( s32int ); | | |
| 1532 | float64_t i32_to_f64( s32int ); | | |
| 1533 | #ifdef SOFTFLOAT_FAST_INT64 | | |
| 1534 | extFloat80_t i32_to_extF80( s32int ); | | |
| 1535 | float128_t i32_to_f128( s32int ); | | |
| 1536 | #endif | | |
| 1537 | void i32_to_extF80M( s32int, extFloat80_t * ); | | |
| 1538 | void i32_to_f128M( s32int, float128_t * ); | | |
| 1539 | float16_t i64_to_f16( s64int ); | | |
| 1540 | float32_t i64_to_f32( s64int ); | | |
| 1541 | float64_t i64_to_f64( s64int ); | | |
| 1542 | #ifdef SOFTFLOAT_FAST_INT64 | | |
| 1543 | extFloat80_t i64_to_extF80( s64int ); | | |
| 1544 | float128_t i64_to_f128( s64int ); | | |
| 1545 | #endif | | |
| 1546 | void i64_to_extF80M( s64int, extFloat80_t * ); | | |
| 1547 | void i64_to_f128M( s64int, float128_t * ); | | |
| 1548 | | | |
| 1549 | /*---------------------------------------------------------------------------- | | |
| 1550 | | 16-bit (half-precision) floating-point operations. | | |
| 1551 | *----------------------------------------------------------------------------*/ | | |
| 1552 | u32int f16_to_ui32( float16_t, u8int, bool ); | | |
| 1553 | u64int f16_to_ui64( float16_t, u8int, bool ); | | |
| 1554 | s32int f16_to_i32( float16_t, u8int, bool ); | | |
| 1555 | s64int f16_to_i64( float16_t, u8int, bool ); | | |
| 1556 | u32int f16_to_ui32_r_minMag( float16_t, bool ); | | |
| 1557 | u64int f16_to_ui64_r_minMag( float16_t, bool ); | | |
| 1558 | s32int f16_to_i32_r_minMag( float16_t, bool ); | | |
| 1559 | s64int f16_to_i64_r_minMag( float16_t, bool ); | | |
| 1560 | float32_t f16_to_f32( float16_t ); | | |
| 1561 | float64_t f16_to_f64( float16_t ); | | |
| 1562 | #ifdef SOFTFLOAT_FAST_INT64 | | |
| 1563 | extFloat80_t f16_to_extF80( float16_t ); | | |
| 1564 | float128_t f16_to_f128( float16_t ); | | |
| 1565 | #endif | | |
| 1566 | void f16_to_extF80M( float16_t, extFloat80_t * ); | | |
| 1567 | void f16_to_f128M( float16_t, float128_t * ); | | |
| 1568 | float16_t f16_roundToInt( float16_t, u8int, bool ); | | |
| 1569 | float16_t f16_add( float16_t, float16_t ); | | |
| 1570 | float16_t f16_sub( float16_t, float16_t ); | | |
| 1571 | float16_t f16_mul( float16_t, float16_t ); | | |
| 1572 | float16_t f16_mulAdd( float16_t, float16_t, float16_t ); | | |
| 1573 | float16_t f16_div( float16_t, float16_t ); | | |
| 1574 | float16_t f16_rem( float16_t, float16_t ); | | |
| 1575 | float16_t f16_sqrt( float16_t ); | | |
| 1576 | bool f16_eq( float16_t, float16_t ); | | |
| 1577 | bool f16_le( float16_t, float16_t ); | | |
| 1578 | bool f16_lt( float16_t, float16_t ); | | |
| 1579 | bool f16_eq_signaling( float16_t, float16_t ); | | |
| 1580 | bool f16_le_quiet( float16_t, float16_t ); | | |
| 1581 | bool f16_lt_quiet( float16_t, float16_t ); | | |
| 1582 | bool f16_isSignalingNaN( float16_t ); | | |
| 1583 | | | |
| 1584 | /*---------------------------------------------------------------------------- | | |
| 1585 | | 16-bit (brain float 16) floating-point operations. | | |
| 1586 | *----------------------------------------------------------------------------*/ | | |
| 1587 | float32_t bf16_to_f32( bfloat16_t ); | | |
| 1588 | bfloat16_t f32_to_bf16( float32_t ); | | |
| 1589 | bool bf16_isSignalingNaN( bfloat16_t ); | | |
| 1590 | | | |
| 1591 | /*---------------------------------------------------------------------------- | | |
| 1592 | | 32-bit (single-precision) floating-point operations. | | |
| 1593 | *----------------------------------------------------------------------------*/ | | |
| 1594 | u32int f32_to_ui32( float32_t, u8int, bool ); | | |
| 1595 | u64int f32_to_ui64( float32_t, u8int, bool ); | | |
| 1596 | s32int f32_to_i32( float32_t, u8int, bool ); | | |
| 1597 | s64int f32_to_i64( float32_t, u8int, bool ); | | |
| 1598 | u32int f32_to_ui32_r_minMag( float32_t, bool ); | | |
| 1599 | u64int f32_to_ui64_r_minMag( float32_t, bool ); | | |
| 1600 | s32int f32_to_i32_r_minMag( float32_t, bool ); | | |
| 1601 | s64int f32_to_i64_r_minMag( float32_t, bool ); | | |
| 1602 | float16_t f32_to_f16( float32_t ); | | |
| 1603 | float64_t f32_to_f64( float32_t ); | | |
| 1604 | #ifdef SOFTFLOAT_FAST_INT64 | | |
| 1605 | extFloat80_t f32_to_extF80( float32_t ); | | |
| 1606 | float128_t f32_to_f128( float32_t ); | | |
| 1607 | #endif | | |
| 1608 | void f32_to_extF80M( float32_t, extFloat80_t * ); | 66 | void f32_to_extF80M( float32_t, extFloat80_t * ); |
| 1609 | void f32_to_f128M( float32_t, float128_t * ); | | |
| 1610 | float32_t f32_roundToInt( float32_t, u8int, bool ); | | |
| 1611 | float32_t f32_add( float32_t, float32_t ); | | |
| 1612 | float32_t f32_sub( float32_t, float32_t ); | | |
| 1613 | float32_t f32_mul( float32_t, float32_t ); | | |
| 1614 | float32_t f32_mulAdd( float32_t, float32_t, float32_t ); | | |
| 1615 | float32_t f32_div( float32_t, float32_t ); | | |
| 1616 | float32_t f32_rem( float32_t, float32_t ); | | |
| 1617 | float32_t f32_sqrt( float32_t ); | | |
| 1618 | bool f32_eq( float32_t, float32_t ); | | |
| 1619 | bool f32_le( float32_t, float32_t ); | | |
| 1620 | bool f32_lt( float32_t, float32_t ); | | |
| 1621 | bool f32_eq_signaling( float32_t, float32_t ); | | |
| 1622 | bool f32_le_quiet( float32_t, float32_t ); | | |
| 1623 | bool f32_lt_quiet( float32_t, float32_t ); | | |
| 1624 | bool f32_isSignalingNaN( float32_t ); | | |
| 1625 | | | |
| 1626 | /*---------------------------------------------------------------------------- | | |
| 1627 | | 64-bit (double-precision) floating-point operations. | | |
| 1628 | *----------------------------------------------------------------------------*/ | | |
| 1629 | u32int f64_to_ui32( float64_t, u8int, bool ); | | |
| 1630 | u64int f64_to_ui64( float64_t, u8int, bool ); | | |
| 1631 | s32int f64_to_i32( float64_t, u8int, bool ); | | |
| 1632 | s64int f64_to_i64( float64_t, u8int, bool ); | | |
| 1633 | u32int f64_to_ui32_r_minMag( float64_t, bool ); | | |
| 1634 | u64int f64_to_ui64_r_minMag( float64_t, bool ); | | |
| 1635 | s32int f64_to_i32_r_minMag( float64_t, bool ); | | |
| 1636 | s64int f64_to_i64_r_minMag( float64_t, bool ); | | |
| 1637 | float16_t f64_to_f16( float64_t ); | | |
| 1638 | float32_t f64_to_f32( float64_t ); | | |
| 1639 | #ifdef SOFTFLOAT_FAST_INT64 | | |
| 1640 | extFloat80_t f64_to_extF80( float64_t ); | | |
| 1641 | float128_t f64_to_f128( float64_t ); | | |
| 1642 | #endif | | |
| 1643 | void f64_to_extF80M( float64_t, extFloat80_t * ); | | |
| 1644 | void f64_to_f128M( float64_t, float128_t * ); | | |
| 1645 | float64_t f64_roundToInt( float64_t, u8int, bool ); | | |
| 1646 | float64_t f64_add( float64_t, float64_t ); | | |
| 1647 | float64_t f64_sub( float64_t, float64_t ); | | |
| 1648 | float64_t f64_mul( float64_t, float64_t ); | | |
| 1649 | float64_t f64_mulAdd( float64_t, float64_t, float64_t ); | | |
| 1650 | float64_t f64_div( float64_t, float64_t ); | | |
| 1651 | float64_t f64_rem( float64_t, float64_t ); | | |
| 1652 | float64_t f64_sqrt( float64_t ); | | |
| 1653 | bool f64_eq( float64_t, float64_t ); | | |
| 1654 | bool f64_le( float64_t, float64_t ); | | |
| 1655 | bool f64_lt( float64_t, float64_t ); | | |
| 1656 | bool f64_eq_signaling( float64_t, float64_t ); | | |
| 1657 | bool f64_le_quiet( float64_t, float64_t ); | | |
| 1658 | bool f64_lt_quiet( float64_t, float64_t ); | | |
| 1659 | bool f64_isSignalingNaN( float64_t ); | | |
| 1660 | | | |
| 1661 | /*---------------------------------------------------------------------------- | | |
| 1662 | | Rounding precision for 80-bit extended double-precision floating-point. | | |
| 1663 | | Valid values are 32, 64, and 80. | | |
| 1664 | *----------------------------------------------------------------------------*/ | | |
| 1665 | extern THREAD_LOCAL u8int extF80_roundingPrecision; | | |
| 1666 | | | |
| 1667 | /*---------------------------------------------------------------------------- | | |
| 1668 | | 80-bit extended double-precision floating-point operations. | | |
| 1669 | *----------------------------------------------------------------------------*/ | | |
| 1670 | #ifdef SOFTFLOAT_FAST_INT64 | | |
| 1671 | u32int extF80_to_ui32( extFloat80_t, u8int, bool ); | | |
| 1672 | u64int extF80_to_ui64( extFloat80_t, u8int, bool ); | | |
| 1673 | s32int extF80_to_i32( extFloat80_t, u8int, bool ); | | |
| 1674 | s64int extF80_to_i64( extFloat80_t, u8int, bool ); | | |
| 1675 | u32int extF80_to_ui32_r_minMag( extFloat80_t, bool ); | | |
| 1676 | u64int extF80_to_ui64_r_minMag( extFloat80_t, bool ); | | |
| 1677 | s32int extF80_to_i32_r_minMag( extFloat80_t, bool ); | | |
| 1678 | s64int extF80_to_i64_r_minMag( extFloat80_t, bool ); | | |
| 1679 | float16_t extF80_to_f16( extFloat80_t ); | | |
| 1680 | float32_t extF80_to_f32( extFloat80_t ); | | |
| 1681 | float64_t extF80_to_f64( extFloat80_t ); | | |
| 1682 | float128_t extF80_to_f128( extFloat80_t ); | | |
| 1683 | extFloat80_t extF80_roundToInt( extFloat80_t, u8int, bool ); | | |
| 1684 | extFloat80_t extF80_add( extFloat80_t, extFloat80_t ); | | |
| 1685 | extFloat80_t extF80_sub( extFloat80_t, extFloat80_t ); | | |
| 1686 | extFloat80_t extF80_mul( extFloat80_t, extFloat80_t ); | | |
| 1687 | extFloat80_t extF80_div( extFloat80_t, extFloat80_t ); | | |
| 1688 | extFloat80_t extF80_rem( extFloat80_t, extFloat80_t ); | | |
| 1689 | extFloat80_t extF80_sqrt( extFloat80_t ); | | |
| 1690 | bool extF80_eq( extFloat80_t, extFloat80_t ); | | |
| 1691 | bool extF80_le( extFloat80_t, extFloat80_t ); | | |
| 1692 | bool extF80_lt( extFloat80_t, extFloat80_t ); | | |
| 1693 | bool extF80_eq_signaling( extFloat80_t, extFloat80_t ); | | |
| 1694 | bool extF80_le_quiet( extFloat80_t, extFloat80_t ); | | |
| 1695 | bool extF80_lt_quiet( extFloat80_t, extFloat80_t ); | | |
| 1696 | bool extF80_isSignalingNaN( extFloat80_t ); | | |
| 1697 | #endif | | |
| 1698 | u32int extF80M_to_ui32( const extFloat80_t *, u8int, bool ); | | |
| 1699 | u64int extF80M_to_ui64( const extFloat80_t *, u8int, bool ); | | |
| 1700 | s32int extF80M_to_i32( const extFloat80_t *, u8int, bool ); | | |
| 1701 | s64int extF80M_to_i64( const extFloat80_t *, u8int, bool ); | | |
| 1702 | u32int extF80M_to_ui32_r_minMag( const extFloat80_t *, bool ); | | |
| 1703 | u64int extF80M_to_ui64_r_minMag( const extFloat80_t *, bool ); | | |
| 1704 | s32int extF80M_to_i32_r_minMag( const extFloat80_t *, bool ); | | |
| 1705 | s64int extF80M_to_i64_r_minMag( const extFloat80_t *, bool ); | | |
| 1706 | float16_t extF80M_to_f16( const extFloat80_t * ); | | |
| 1707 | float32_t extF80M_to_f32( const extFloat80_t * ); | 67 | float32_t extF80M_to_f32( const extFloat80_t * ); |
| 1708 | float64_t extF80M_to_f64( const extFloat80_t * ); | | |
| 1709 | void extF80M_to_f128M( const extFloat80_t *, float128_t * ); | | |
| 1710 | void | | |
| 1711 | extF80M_roundToInt( | | |
| 1712 | const extFloat80_t *, u8int, bool, extFloat80_t * ); | | |
| 1713 | void extF80M_add( const extFloat80_t *, const extFloat80_t *, extFloat80_t * ); | 68 | void extF80M_add( const extFloat80_t *, const extFloat80_t *, extFloat80_t * ); |
| 1714 | void extF80M_sub( const extFloat80_t *, const extFloat80_t *, extFloat80_t * ); | | |
| 1715 | void extF80M_mul( const extFloat80_t *, const extFloat80_t *, extFloat80_t * ); | 69 | void extF80M_mul( const extFloat80_t *, const extFloat80_t *, extFloat80_t * ); |
| 1716 | void extF80M_div( const extFloat80_t *, const extFloat80_t *, extFloat80_t * ); | | |
| 1717 | void extF80M_rem( const extFloat80_t *, const extFloat80_t *, extFloat80_t * ); | | |
| 1718 | void extF80M_sqrt( const extFloat80_t *, extFloat80_t * ); | | |
| 1719 | bool extF80M_eq( const extFloat80_t *, const extFloat80_t * ); | | |
| 1720 | bool extF80M_le( const extFloat80_t *, const extFloat80_t * ); | | |
| 1721 | bool extF80M_lt( const extFloat80_t *, const extFloat80_t * ); | | |
| 1722 | bool extF80M_eq_signaling( const extFloat80_t *, const extFloat80_t * ); | | |
| 1723 | bool extF80M_le_quiet( const extFloat80_t *, const extFloat80_t * ); | | |
| 1724 | bool extF80M_lt_quiet( const extFloat80_t *, const extFloat80_t * ); | | |
| 1725 | bool extF80M_isSignalingNaN( const extFloat80_t * ); | | |
| 1726 | | | |
| 1727 | /*---------------------------------------------------------------------------- | | |
| 1728 | | 128-bit (quadruple-precision) floating-point operations. | | |
| 1729 | *----------------------------------------------------------------------------*/ | | |
| 1730 | #ifdef SOFTFLOAT_FAST_INT64 | | |
| 1731 | u32int f128_to_ui32( float128_t, u8int, bool ); | | |
| 1732 | u64int f128_to_ui64( float128_t, u8int, bool ); | | |
| 1733 | s32int f128_to_i32( float128_t, u8int, bool ); | | |
| 1734 | s64int f128_to_i64( float128_t, u8int, bool ); | | |
| 1735 | u32int f128_to_ui32_r_minMag( float128_t, bool ); | | |
| 1736 | u64int f128_to_ui64_r_minMag( float128_t, bool ); | | |
| 1737 | s32int f128_to_i32_r_minMag( float128_t, bool ); | | |
| 1738 | s64int f128_to_i64_r_minMag( float128_t, bool ); | | |
| 1739 | float16_t f128_to_f16( float128_t ); | | |
| 1740 | float32_t f128_to_f32( float128_t ); | | |
| 1741 | float64_t f128_to_f64( float128_t ); | | |
| 1742 | extFloat80_t f128_to_extF80( float128_t ); | | |
| 1743 | float128_t f128_roundToInt( float128_t, u8int, bool ); | | |
| 1744 | float128_t f128_add( float128_t, float128_t ); | | |
| 1745 | float128_t f128_sub( float128_t, float128_t ); | | |
| 1746 | float128_t f128_mul( float128_t, float128_t ); | | |
| 1747 | float128_t f128_mulAdd( float128_t, float128_t, float128_t ); | | |
| 1748 | float128_t f128_div( float128_t, float128_t ); | | |
| 1749 | float128_t f128_rem( float128_t, float128_t ); | | |
| 1750 | float128_t f128_sqrt( float128_t ); | | |
| 1751 | bool f128_eq( float128_t, float128_t ); | | |
| 1752 | bool f128_le( float128_t, float128_t ); | | |
| 1753 | bool f128_lt( float128_t, float128_t ); | | |
| 1754 | bool f128_eq_signaling( float128_t, float128_t ); | | |
| 1755 | bool f128_le_quiet( float128_t, float128_t ); | | |
| 1756 | bool f128_lt_quiet( float128_t, float128_t ); | | |
| 1757 | bool f128_isSignalingNaN( float128_t ); | | |
| 1758 | #endif | | |
| 1759 | u32int f128M_to_ui32( const float128_t *, u8int, bool ); | | |
| 1760 | u64int f128M_to_ui64( const float128_t *, u8int, bool ); | | |
| 1761 | s32int f128M_to_i32( const float128_t *, u8int, bool ); | | |
| 1762 | s64int f128M_to_i64( const float128_t *, u8int, bool ); | | |
| 1763 | u32int f128M_to_ui32_r_minMag( const float128_t *, bool ); | | |
| 1764 | u64int f128M_to_ui64_r_minMag( const float128_t *, bool ); | | |
| 1765 | s32int f128M_to_i32_r_minMag( const float128_t *, bool ); | | |
| 1766 | s64int f128M_to_i64_r_minMag( const float128_t *, bool ); | | |
| 1767 | float16_t f128M_to_f16( const float128_t * ); | | |
| 1768 | float32_t f128M_to_f32( const float128_t * ); | | |
| 1769 | float64_t f128M_to_f64( const float128_t * ); | | |
| 1770 | void f128M_to_extF80M( const float128_t *, extFloat80_t * ); | | |
| 1771 | void f128M_roundToInt( const float128_t *, u8int, bool, float128_t * ); | | |
| 1772 | void f128M_add( const float128_t *, const float128_t *, float128_t * ); | | |
| 1773 | void f128M_sub( const float128_t *, const float128_t *, float128_t * ); | | |
| 1774 | void f128M_mul( const float128_t *, const float128_t *, float128_t * ); | | |
| 1775 | void | | |
| 1776 | f128M_mulAdd( | | |
| 1777 | const float128_t *, const float128_t *, const float128_t *, float128_t * | | |
| 1778 | ); | | |
| 1779 | void f128M_div( const float128_t *, const float128_t *, float128_t * ); | | |
| 1780 | void f128M_rem( const float128_t *, const float128_t *, float128_t * ); | | |
| 1781 | void f128M_sqrt( const float128_t *, float128_t * ); | | |
| 1782 | bool f128M_eq( const float128_t *, const float128_t * ); | | |
| 1783 | bool f128M_le( const float128_t *, const float128_t * ); | | |
| 1784 | bool f128M_lt( const float128_t *, const float128_t * ); | | |
| 1785 | bool f128M_eq_signaling( const float128_t *, const float128_t * ); | | |
| 1786 | bool f128M_le_quiet( const float128_t *, const float128_t * ); | | |
| 1787 | bool f128M_lt_quiet( const float128_t *, const float128_t * ); | | |
| 1788 | bool f128M_isSignalingNaN( const float128_t * ); | | |
| 1789 | | | |
| 1790 | /*---------------------------------------------------------------------------- | | |
| 1791 | | Default value for 'softfloat_detectTininess'. | | |
| 1792 | *----------------------------------------------------------------------------*/ | | |
| 1793 | #define init_detectTininess softfloat_tininess_afterRounding | | |
| 1794 | | | |
| 1795 | /*---------------------------------------------------------------------------- | | |
| 1796 | | The values to return on conversions to 32-bit integer formats that raise an | | |
| 1797 | | invalid exception. | | |
| 1798 | *----------------------------------------------------------------------------*/ | | |
| 1799 | #define ui32_fromPosOverflow 0xFFFFFFFF | | |
| 1800 | #define ui32_fromNegOverflow 0xFFFFFFFF | | |
| 1801 | #define ui32_fromNaN 0xFFFFFFFF | | |
| 1802 | #define i32_fromPosOverflow (-0x7FFFFFFF - 1) | | |
| 1803 | #define i32_fromNegOverflow (-0x7FFFFFFF - 1) | | |
| 1804 | #define i32_fromNaN (-0x7FFFFFFF - 1) | | |
| 1805 | | | |
| 1806 | /*---------------------------------------------------------------------------- | | |
| 1807 | | The values to return on conversions to 64-bit integer formats that raise an | | |
| 1808 | | invalid exception. | | |
| 1809 | *----------------------------------------------------------------------------*/ | | |
| 1810 | #define ui64_fromPosOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF ) | | |
| 1811 | #define ui64_fromNegOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF ) | | |
| 1812 | #define ui64_fromNaN UINT64_C( 0xFFFFFFFFFFFFFFFF ) | | |
| 1813 | #define i64_fromPosOverflow (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1) | | |
| 1814 | #define i64_fromNegOverflow (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1) | | |
| 1815 | #define i64_fromNaN (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1) | | |
| 1816 | | | |
| 1817 | /*---------------------------------------------------------------------------- | | |
| 1818 | | "Common NaN" structure, used to transfer NaN representations from one format | | |
| 1819 | | to another. | | |
| 1820 | *----------------------------------------------------------------------------*/ | | |
| 1821 | struct commonNaN { | | |
| 1822 | bool sign; | | |
| 1823 | #ifdef LITTLEENDIAN | | |
| 1824 | u64int v0, v64; | | |
| 1825 | #else | | |
| 1826 | u64int v64, v0; | | |
| 1827 | #endif | | |
| 1828 | }; | | |
| 1829 | | | |
| 1830 | /*---------------------------------------------------------------------------- | | |
| 1831 | | The bit pattern for a default generated 16-bit floating-point NaN. | | |
| 1832 | *----------------------------------------------------------------------------*/ | | |
| 1833 | #define defaultNaNF16UI 0xFE00 | | |
| 1834 | | | |
| 1835 | /*---------------------------------------------------------------------------- | | |
| 1836 | | Returns true when 16-bit unsigned integer 'uiA' has the bit pattern of a | | |
| 1837 | | 16-bit floating-point signaling NaN. | | |
| 1838 | | Note: This macro evaluates its argument more than once. | | |
| 1839 | *----------------------------------------------------------------------------*/ | | |
| 1840 | #define softfloat_isSigNaNF16UI( uiA ) ((((uiA) & 0x7E00) == 0x7C00) && ((uiA) & 0x01FF)) | | |
| 1841 | | | |
| 1842 | /*---------------------------------------------------------------------------- | | |
| 1843 | | Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts | | |
| 1844 | | this NaN to the common NaN form, and stores the resulting common NaN at the | | |
| 1845 | | location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid | | |
| 1846 | | exception is raised. | | |
| 1847 | *----------------------------------------------------------------------------*/ | | |
| 1848 | void softfloat_f16UIToCommonNaN( u16int uiA, struct commonNaN *zPtr ); | | |
| 1849 | | | |
| 1850 | /*---------------------------------------------------------------------------- | | |
| 1851 | | Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point | | |
| 1852 | | NaN, and returns the bit pattern of this value as an unsigned integer. | | |
| 1853 | *----------------------------------------------------------------------------*/ | | |
| 1854 | u16int softfloat_commonNaNToF16UI( const struct commonNaN *aPtr ); | | |
| 1855 | | | |
| 1856 | /*---------------------------------------------------------------------------- | | |
| 1857 | | Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating- | | |
| 1858 | | point values, at least one of which is a NaN, returns the bit pattern of | | |
| 1859 | | the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a | | |
| 1860 | | signaling NaN, the invalid exception is raised. | | |
| 1861 | *----------------------------------------------------------------------------*/ | | |
| 1862 | u16int | | |
| 1863 | softfloat_propagateNaNF16UI( u16int uiA, u16int uiB ); | | |
| 1864 | | | |
| 1865 | /*---------------------------------------------------------------------------- | | |
| 1866 | | The bit pattern for a default generated 32-bit floating-point NaN. | | |
| 1867 | *----------------------------------------------------------------------------*/ | | |
| 1868 | #define defaultNaNF32UI 0xFFC00000 | | |
| 1869 | | | |
| 1870 | /*---------------------------------------------------------------------------- | | |
| 1871 | | Returns true when 32-bit unsigned integer 'uiA' has the bit pattern of a | | |
| 1872 | | 32-bit floating-point signaling NaN. | | |
| 1873 | | Note: This macro evaluates its argument more than once. | | |
| 1874 | *----------------------------------------------------------------------------*/ | | |
| 1875 | #define softfloat_isSigNaNF32UI( uiA ) ((((uiA) & 0x7FC00000) == 0x7F800000) && ((uiA) & 0x003FFFFF)) | | |
| 1876 | | | |
| 1877 | /*---------------------------------------------------------------------------- | | |
| 1878 | | Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts | | |
| 1879 | | this NaN to the common NaN form, and stores the resulting common NaN at the | | |
| 1880 | | location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid | | |
| 1881 | | exception is raised. | | |
| 1882 | *----------------------------------------------------------------------------*/ | | |
| 1883 | void softfloat_f32UIToCommonNaN( u32int uiA, struct commonNaN *zPtr ); | | |
| 1884 | | | |
| 1885 | /*---------------------------------------------------------------------------- | | |
| 1886 | | Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point | | |
| 1887 | | NaN, and returns the bit pattern of this value as an unsigned integer. | | |
| 1888 | *----------------------------------------------------------------------------*/ | | |
| 1889 | u32int softfloat_commonNaNToF32UI( const struct commonNaN *aPtr ); | | |
| 1890 | | | |
| 1891 | /*---------------------------------------------------------------------------- | | |
| 1892 | | Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating- | | |
| 1893 | | point values, at least one of which is a NaN, returns the bit pattern of | | |
| 1894 | | the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a | | |
| 1895 | | signaling NaN, the invalid exception is raised. | | |
| 1896 | *----------------------------------------------------------------------------*/ | | |
| 1897 | u32int | | |
| 1898 | softfloat_propagateNaNF32UI( u32int uiA, u32int uiB ); | | |
| 1899 | | | |
| 1900 | /*---------------------------------------------------------------------------- | | |
| 1901 | | The bit pattern for a default generated 64-bit floating-point NaN. | | |
| 1902 | *----------------------------------------------------------------------------*/ | | |
| 1903 | #define defaultNaNF64UI UINT64_C( 0xFFF8000000000000 ) | | |
| 1904 | | | |
| 1905 | /*---------------------------------------------------------------------------- | | |
| 1906 | | Returns true when 64-bit unsigned integer 'uiA' has the bit pattern of a | | |
| 1907 | | 64-bit floating-point signaling NaN. | | |
| 1908 | | Note: This macro evaluates its argument more than once. | | |
| 1909 | *----------------------------------------------------------------------------*/ | | |
| 1910 | #define softfloat_isSigNaNF64UI( uiA ) ((((uiA) & UINT64_C( 0x7FF8000000000000 )) == UINT64_C( 0x7FF0000000000000 )) && ((uiA) & UINT64_C( 0x0007FFFFFFFFFFFF ))) | | |
| 1911 | | | |
| 1912 | /*---------------------------------------------------------------------------- | | |
| 1913 | | Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts | | |
| 1914 | | this NaN to the common NaN form, and stores the resulting common NaN at the | | |
| 1915 | | location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid | | |
| 1916 | | exception is raised. | | |
| 1917 | *----------------------------------------------------------------------------*/ | | |
| 1918 | void softfloat_f64UIToCommonNaN( u64int uiA, struct commonNaN *zPtr ); | | |
| 1919 | | | |
| 1920 | /*---------------------------------------------------------------------------- | | |
| 1921 | | Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point | | |
| 1922 | | NaN, and returns the bit pattern of this value as an unsigned integer. | | |
| 1923 | *----------------------------------------------------------------------------*/ | | |
| 1924 | u64int softfloat_commonNaNToF64UI( const struct commonNaN *aPtr ); | | |
| 1925 | | | |
| 1926 | /*---------------------------------------------------------------------------- | | |
| 1927 | | Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating- | | |
| 1928 | | point values, at least one of which is a NaN, returns the bit pattern of | | |
| 1929 | | the combined NaN result. If either 'uiA' or 'uiB' has the pattern of a | | |
| 1930 | | signaling NaN, the invalid exception is raised. | | |
| 1931 | *----------------------------------------------------------------------------*/ | | |
| 1932 | u64int | | |
| 1933 | softfloat_propagateNaNF64UI( u64int uiA, u64int uiB ); | | |
| 1934 | | | |
| 1935 | /*---------------------------------------------------------------------------- | | |
| 1936 | | The bit pattern for a default generated 80-bit extended floating-point NaN. | | |
| 1937 | *----------------------------------------------------------------------------*/ | | |
| 1938 | #define defaultNaNExtF80UI64 0xFFFF | | |
| 1939 | #define defaultNaNExtF80UI0 UINT64_C( 0xC000000000000000 ) | | |
| 1940 | | | |
| 1941 | /*---------------------------------------------------------------------------- | | |
| 1942 | | Returns true when the 80-bit unsigned integer formed from concatenating | | |
| 1943 | | 16-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of an 80-bit extended | | |
| 1944 | | floating-point signaling NaN. | | |
| 1945 | | Note: This macro evaluates its arguments more than once. | | |
| 1946 | *----------------------------------------------------------------------------*/ | | |
| 1947 | #define softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ((((uiA64) & 0x7FFF) == 0x7FFF) && ! ((uiA0) & UINT64_C( 0x4000000000000000 )) && ((uiA0) & UINT64_C( 0x3FFFFFFFFFFFFFFF ))) | | |
| 1948 | | | |
| 1949 | #ifdef SOFTFLOAT_FAST_INT64 | | |
| 1950 | | | |
| 1951 | /*---------------------------------------------------------------------------- | | |
| 1952 | | The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is | | |
| 1953 | | defined. | | |
| 1954 | *----------------------------------------------------------------------------*/ | | |
| 1955 | | | |
| 1956 | /*---------------------------------------------------------------------------- | | |
| 1957 | | Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0' | | |
| 1958 | | has the bit pattern of an 80-bit extended floating-point NaN, converts | | |
| 1959 | | this NaN to the common NaN form, and stores the resulting common NaN at the | | |
| 1960 | | location pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid | | |
| 1961 | | exception is raised. | | |
| 1962 | *----------------------------------------------------------------------------*/ | | |
| 1963 | void | | |
| 1964 | softfloat_extF80UIToCommonNaN( | | |
| 1965 | u16int uiA64, u64int uiA0, struct commonNaN *zPtr ); | | |
| 1966 | | | |
| 1967 | /*---------------------------------------------------------------------------- | | |
| 1968 | | Converts the common NaN pointed to by 'aPtr' into an 80-bit extended | | |
| 1969 | | floating-point NaN, and returns the bit pattern of this value as an unsigned | | |
| 1970 | | integer. | | |
| 1971 | *----------------------------------------------------------------------------*/ | | |
| 1972 | struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr ); | | |
| 1973 | | | |
| 1974 | /*---------------------------------------------------------------------------- | | |
| 1975 | | Interpreting the unsigned integer formed from concatenating 'uiA64' and | | |
| 1976 | | 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting | | |
| 1977 | | the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another | | |
| 1978 | | 80-bit extended floating-point value, and assuming at least on of these | | |
| 1979 | | floating-point values is a NaN, returns the bit pattern of the combined NaN | | |
| 1980 | | result. If either original floating-point value is a signaling NaN, the | | |
| 1981 | | invalid exception is raised. | | |
| 1982 | *----------------------------------------------------------------------------*/ | | |
| 1983 | struct uint128 | | |
| 1984 | softfloat_propagateNaNExtF80UI( | | |
| 1985 | u16int uiA64, | | |
| 1986 | u64int uiA0, | | |
| 1987 | u16int uiB64, | | |
| 1988 | u64int uiB0 | | |
| 1989 | ); | | |
| 1990 | | | |
| 1991 | /*---------------------------------------------------------------------------- | | |
| 1992 | | The bit pattern for a default generated 128-bit floating-point NaN. | | |
| 1993 | *----------------------------------------------------------------------------*/ | | |
| 1994 | #define defaultNaNF128UI64 UINT64_C( 0xFFFF800000000000 ) | | |
| 1995 | #define defaultNaNF128UI0 UINT64_C( 0 ) | | |
| 1996 | | | |
| 1997 | /*---------------------------------------------------------------------------- | | |
| 1998 | | Returns true when the 128-bit unsigned integer formed from concatenating | | |
| 1999 | | 64-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of a 128-bit floating- | | |
| 2000 | | point signaling NaN. | | |
| 2001 | | Note: This macro evaluates its arguments more than once. | | |
| 2002 | *----------------------------------------------------------------------------*/ | | |
| 2003 | #define softfloat_isSigNaNF128UI( uiA64, uiA0 ) ((((uiA64) & UINT64_C( 0x7FFF800000000000 )) == UINT64_C( 0x7FFF000000000000 )) && ((uiA0) || ((uiA64) & UINT64_C( 0x00007FFFFFFFFFFF )))) | | |
| 2004 | | | |
| 2005 | /*---------------------------------------------------------------------------- | | |
| 2006 | | Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0' | | |
| 2007 | | has the bit pattern of a 128-bit floating-point NaN, converts this NaN to | | |
| 2008 | | the common NaN form, and stores the resulting common NaN at the location | | |
| 2009 | | pointed to by 'zPtr'. If the NaN is a signaling NaN, the invalid exception | | |
| 2010 | | is raised. | | |
| 2011 | *----------------------------------------------------------------------------*/ | | |
| 2012 | void | | |
| 2013 | softfloat_f128UIToCommonNaN( | | |
| 2014 | u64int uiA64, u64int uiA0, struct commonNaN *zPtr ); | | |
| 2015 | | | |
| 2016 | /*---------------------------------------------------------------------------- | | |
| 2017 | | Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point | | |
| 2018 | | NaN, and returns the bit pattern of this value as an unsigned integer. | | |
| 2019 | *----------------------------------------------------------------------------*/ | | |
| 2020 | struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN * ); | | |
| 2021 | | | |
| 2022 | /*---------------------------------------------------------------------------- | | |
| 2023 | | Interpreting the unsigned integer formed from concatenating 'uiA64' and | | |
| 2024 | | 'uiA0' as a 128-bit floating-point value, and likewise interpreting the | | |
| 2025 | | unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another | | |
| 2026 | | 128-bit floating-point value, and assuming at least on of these floating- | | |
| 2027 | | point values is a NaN, returns the bit pattern of the combined NaN result. | | |
| 2028 | | If either original floating-point value is a signaling NaN, the invalid | | |
| 2029 | | exception is raised. | | |
| 2030 | *----------------------------------------------------------------------------*/ | | |
| 2031 | struct uint128 | | |
| 2032 | softfloat_propagateNaNF128UI( | | |
| 2033 | u64int uiA64, | | |
| 2034 | u64int uiA0, | | |
| 2035 | u64int uiB64, | | |
| 2036 | u64int uiB0 | | |
| 2037 | ); | | |
| 2038 | | | |
| 2039 | #else | | |
| 2040 | | | |
| 2041 | /*---------------------------------------------------------------------------- | | |
| 2042 | | The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not | | |
| 2043 | | defined. | | |
| 2044 | *----------------------------------------------------------------------------*/ | | |
| 2045 | | | |
| 2046 | /*---------------------------------------------------------------------------- | | |
| 2047 | | Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is | | |
| 2048 | | a NaN, converts this NaN to the common NaN form, and stores the resulting | | |
| 2049 | | common NaN at the location pointed to by 'zPtr'. If the NaN is a signaling | | |
| 2050 | | NaN, the invalid exception is raised. | | |
| 2051 | *----------------------------------------------------------------------------*/ | | |
| 2052 | void | | |
| 2053 | softfloat_extF80MToCommonNaN( | | |
| 2054 | const struct extFloat80M *aSPtr, struct commonNaN *zPtr ); | | |
| 2055 | | | |
| 2056 | /*---------------------------------------------------------------------------- | | |
| 2057 | | Converts the common NaN pointed to by 'aPtr' into an 80-bit extended | | |
| 2058 | | floating-point NaN, and stores this NaN at the location pointed to by | | |
| 2059 | | 'zSPtr'. | | |
| 2060 | *----------------------------------------------------------------------------*/ | | |
| 2061 | void | | |
| 2062 | softfloat_commonNaNToExtF80M( | | |
| 2063 | const struct commonNaN *aPtr, struct extFloat80M *zSPtr ); | | |
| 2064 | | | |
| 2065 | /*---------------------------------------------------------------------------- | | |
| 2066 | | Assuming at least one of the two 80-bit extended floating-point values | | |
| 2067 | | pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result | | |
| 2068 | | at the location pointed to by 'zSPtr'. If either original floating-point | | |
| 2069 | | value is a signaling NaN, the invalid exception is raised. | | |
| 2070 | *----------------------------------------------------------------------------*/ | | |
| 2071 | void | | |
| 2072 | softfloat_propagateNaNExtF80M( | | |
| 2073 | const struct extFloat80M *aSPtr, | | |
| 2074 | const struct extFloat80M *bSPtr, | | |
| 2075 | struct extFloat80M *zSPtr | | |
| 2076 | ); | | |
| 2077 | | | |
| 2078 | /*---------------------------------------------------------------------------- | | |
| 2079 | | The bit pattern for a default generated 128-bit floating-point NaN. | | |
| 2080 | *----------------------------------------------------------------------------*/ | | |
| 2081 | #define defaultNaNF128UI96 0xFFFF8000 | | |
| 2082 | #define defaultNaNF128UI64 0 | | |
| 2083 | #define defaultNaNF128UI32 0 | | |
| 2084 | #define defaultNaNF128UI0 0 | | |
| 2085 | | | |
| 2086 | /*---------------------------------------------------------------------------- | | |
| 2087 | | Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN, | | |
| 2088 | | converts this NaN to the common NaN form, and stores the resulting common | | |
| 2089 | | NaN at the location pointed to by 'zPtr'. If the NaN is a signaling NaN, | | |
| 2090 | | the invalid exception is raised. Argument 'aWPtr' points to an array of | | |
| 2091 | | four 32-bit elements that concatenate in the platform's normal endian order | | |
| 2092 | | to form a 128-bit floating-point value. | | |
| 2093 | *----------------------------------------------------------------------------*/ | | |
| 2094 | void | | |
| 2095 | softfloat_f128MToCommonNaN( const u32int *aWPtr, struct commonNaN *zPtr ); | | |
| 2096 | | | |
| 2097 | /*---------------------------------------------------------------------------- | | |
| 2098 | | Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point | | |
| 2099 | | NaN, and stores this NaN at the location pointed to by 'zWPtr'. Argument | | |
| 2100 | | 'zWPtr' points to an array of four 32-bit elements that concatenate in the | | |
| 2101 | | platform's normal endian order to form a 128-bit floating-point value. | | |
| 2102 | *----------------------------------------------------------------------------*/ | | |
| 2103 | void | | |
| 2104 | softfloat_commonNaNToF128M( const struct commonNaN *aPtr, u32int *zWPtr ); | | |
| 2105 | | | |
| 2106 | /*---------------------------------------------------------------------------- | | |
| 2107 | | Assuming at least one of the two 128-bit floating-point values pointed to by | | |
| 2108 | | 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location | | |
| 2109 | | pointed to by 'zWPtr'. If either original floating-point value is a | | |
| 2110 | | signaling NaN, the invalid exception is raised. Each of 'aWPtr', 'bWPtr', | | |
| 2111 | | and 'zWPtr' points to an array of four 32-bit elements that concatenate in | | |
| 2112 | | the platform's normal endian order to form a 128-bit floating-point value. | | |
| 2113 | *----------------------------------------------------------------------------*/ | | |
| 2114 | void | | |
| 2115 | softfloat_propagateNaNF128M( | | |
| 2116 | const u32int *aWPtr, const u32int *bWPtr, u32int *zWPtr ); | | |
| 2117 | | | |
| 2118 | #endif | | |