This is a work-around for TCC's linker, on AArch64, not building a PLT when TCC is invoked with "-run". Fixing the linker should be possible: it works on arm and x86_64, apparently.
Unified · Split
| @@ -592,13 +592,22 @@ ST_FUNC void store(int r, SValue *sv) · 591 unmodified lines | ||
| 592 | 592 | |
| 593 | 593 | static void arm64_gen_bl_or_b(int b) |
| 594 | 594 | { |
| 595 | + // Currently TCC's linker does not generate a PLT when TCC is invoked | |
| 596 | + // with "-run". This means functions can be out of range if we try to | |
| 597 | + // call them in the usual way. Until the linker is fixed, work around | |
| 598 | + // this by using R_AARCH64_MOVW_UABS_G* relocations; see arm64_sym. | |
| 599 | + int avoid_call26 = 1; | |
| 600 | + | |
| 595 | 601 | if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST) { |
| 596 | − assert(!b); | |
| 597 | − if (vtop->r & VT_SYM) | |
| 602 | + assert(!b && (vtop->r & VT_SYM)); | |
| 603 | + if (avoid_call26) { | |
| 604 | + arm64_sym(30, vtop->sym, 0); | |
| 605 | + o(0xd63f03c0); // blr x30 | |
| 606 | + } | |
| 607 | + else { | |
| 598 | 608 | greloc(cur_text_section, vtop->sym, ind, R_AARCH64_CALL26); |
| 599 | − else | |
| 600 | − assert(0); | |
| 601 | − o(0x94000000); // bl . | |
| 609 | + o(0x94000000); // bl . | |
| 610 | + } | |
| 602 | 611 | } |
| 603 | 612 | else |
| 604 | 613 | o(0xd61f0000 | (uint32_t)!b << 21 | intr(gv(RC_R30)) << 5); // br/blr |