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riscv64-asm: Add lui, auipc

Danny Milosavljevic committed 5 years ago

Commit 0b1cc481 parent e5a898e2 files · +53 −0Browse files

Unified · Split

2 files
  1. riscv64-asm.c +48 −0
  2. riscv64-tok.h +5 −0
riscv64-asm.c+48−0
@@ -179,6 +179,49 @@ static void asm_unary_opcode(TCCState *s1, int token) · 178 unmodified lines
179 }179 }
180}180}
181 181
182static void asm_emit_u(int token, uint32_t opcode, const Operand* rd, const Operand* rs2)
183{
184 if (rd->type != OP_REG) {
185 tcc_error("'%s': Expected destination operand that is a register", get_tok_str(token, NULL));
186 return;
187 }
188 if (rs2->type != OP_IM12S && rs2->type != OP_IM32) {
189 tcc_error("'%s': Expected second source operand that is an immediate value", get_tok_str(token, NULL));
190 return;
191 } else if (rs2->e.v >= 0x100000) {
192 tcc_error("'%s': Expected second source operand that is an immediate value between 0 and 0xfffff", get_tok_str(token, NULL));
193 return;
194 }
195 /* U-type instruction:
196 31...12 imm[31:12]
197 11...7 rd
198 6...0 opcode */
199 gen_le32(opcode | ENCODE_RD(rd->reg) | (rs2->e.v << 12));
200}
201
202static void asm_binary_opcode(TCCState* s1, int token)
203{
204 Operand ops[2];
205 parse_operand(s1, &ops[0]);
206 if (tok == ',')
207 next();
208 else
209 expect("','");
210 parse_operand(s1, &ops[1]);
211
212 switch (token) {
213 case TOK_ASM_lui:
214 asm_emit_u(token, (0xD << 2) | 3, &ops[0], &ops[1]);
215 return;
216 case TOK_ASM_auipc:
217 asm_emit_u(token, (0x05 << 2) | 3, &ops[0], &ops[1]);
218 return;
219 default:
220 expect("binary instruction");
221 }
222}
223
224
182ST_FUNC void asm_opcode(TCCState *s1, int token)225ST_FUNC void asm_opcode(TCCState *s1, int token)
183{226{
184 switch (token) {227 switch (token) {
@@ -204,6 +247,11 @@ ST_FUNC void asm_opcode(TCCState *s1, int token) · 19 unmodified lines
204 asm_unary_opcode(s1, token);247 asm_unary_opcode(s1, token);
205 return;248 return;
206 249
250 case TOK_ASM_lui:
251 case TOK_ASM_auipc:
252 asm_binary_opcode(s1, token);
253 return;
254
207 default:255 default:
208 expect("known instruction");256 expect("known instruction");
209 }257 }
riscv64-tok.h+5−0
@@ -82,6 +82,11 @@ · 81 unmodified lines
82#define DEF_ASM_WITH_SUFFIX(x, y) \82#define DEF_ASM_WITH_SUFFIX(x, y) \
83 DEF(TOK_ASM_ ## x ## _ ## y, #x #y)83 DEF(TOK_ASM_ ## x ## _ ## y, #x #y)
84 84
85/* Arithmetic */
86
87 DEF_ASM(lui)
88 DEF_ASM(auipc)
89
85/* Sync */90/* Sync */
86 91
87 DEF_ASM(fence)92 DEF_ASM(fence)

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