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riscv64-asm: Add add, addi, sub, addw, addd, addiw, addid, subw, subd, xor, xori, or, ori, and, andi, slt, slti, sltu, sltiu

Danny Milosavljevic committed 5 years ago

Commit 1e37ec41 parent 8b1a89f2 files · +124 −0Browse files

Unified · Split

2 files
  1. riscv64-asm.c +98 −0
  2. riscv64-tok.h +26 −0
riscv64-asm.c+98−0
@@ -328,6 +328,83 @@ static void asm_shift_opcode(TCCState *s1, int token) · 327 unmodified lines
328328 }
329329 }
330330
331+static void asm_data_processing_opcode(TCCState* s1, int token)
332+{
333+ Operand ops[3];
334+ parse_operand(s1, &ops[0]);
335+ if (tok == ',')
336+ next();
337+ else
338+ expect("','");
339+ parse_operand(s1, &ops[1]);
340+ if (tok == ',')
341+ next();
342+ else
343+ expect("','");
344+ parse_operand(s1, &ops[2]);
345+
346+ switch (token) {
347+ // Arithmetic (RD,RS1,(RS2|IMM)); R-format, I-format or U-format
348+
349+ case TOK_ASM_add:
350+ asm_emit_r(token, (0xC << 2) | 3, &ops[0], &ops[1], &ops[2]);
351+ return;
352+ case TOK_ASM_addi:
353+ asm_emit_i(token, (4 << 2) | 3, &ops[0], &ops[1], &ops[2]);
354+ return;
355+ case TOK_ASM_sub:
356+ asm_emit_r(token, (0xC << 2) | 3 | (32 << 25), &ops[0], &ops[1], &ops[2]);
357+ return;
358+ case TOK_ASM_addw:
359+ asm_emit_r(token, (0xE << 2) | 3 | (0 << 12), &ops[0], &ops[1], &ops[2]);
360+ return;
361+ case TOK_ASM_addiw: // 64 bit
362+ asm_emit_i(token, (0x6 << 2) | 3 | (0 << 12), &ops[0], &ops[1], &ops[2]);
363+ return;
364+ case TOK_ASM_subw:
365+ asm_emit_r(token, (0xE << 2) | 3 | (0 << 12) | (32 << 25), &ops[0], &ops[1], &ops[2]);
366+ return;
367+
368+ // Logical (RD,RS1,(RS2|IMM)); R-format or I-format
369+
370+ case TOK_ASM_xor:
371+ asm_emit_r(token, (0xC << 2) | 3 | (4 << 12), &ops[0], &ops[1], &ops[2]);
372+ return;
373+ case TOK_ASM_xori:
374+ asm_emit_i(token, (0x4 << 2) | 3 | (4 << 12), &ops[0], &ops[1], &ops[2]);
375+ return;
376+ case TOK_ASM_or:
377+ asm_emit_r(token, (0xC << 2) | 3 | (6 << 12), &ops[0], &ops[1], &ops[2]);
378+ return;
379+ case TOK_ASM_ori:
380+ asm_emit_i(token, (0x4 << 2) | 3 | (6 << 12), &ops[0], &ops[1], &ops[2]);
381+ return;
382+ case TOK_ASM_and:
383+ asm_emit_r(token, (0xC << 2) | 3 | (7 << 12), &ops[0], &ops[1], &ops[2]);
384+ return;
385+ case TOK_ASM_andi:
386+ asm_emit_i(token, (0x4 << 2) | 3 | (7 << 12), &ops[0], &ops[1], &ops[2]);
387+ return;
388+
389+ // Compare (RD,RS1,(RS2|IMM)); R-format or I-format
390+
391+ case TOK_ASM_slt:
392+ asm_emit_r(token, (0xC << 2) | 3 | (2 << 12), &ops[0], &ops[1], &ops[2]);
393+ return;
394+ case TOK_ASM_slti:
395+ asm_emit_i(token, (0x4 << 2) | 3 | (2 << 12), &ops[0], &ops[1], &ops[2]);
396+ return;
397+ case TOK_ASM_sltu:
398+ asm_emit_r(token, (0xC << 2) | 3 | (3 << 12), &ops[0], &ops[1], &ops[2]);
399+ return;
400+ case TOK_ASM_sltiu:
401+ asm_emit_i(token, (0x4 << 2) | 3 | (3 << 12), &ops[0], &ops[1], &ops[2]);
402+ return;
403+ default:
404+ expect("known data processing instruction");
405+ }
406+}
407+
331408 ST_FUNC void asm_opcode(TCCState *s1, int token)
332409 {
333410 switch (token) {
@@ -379,6 +456,27 @@ ST_FUNC void asm_opcode(TCCState *s1, int token) · 45 unmodified lines
379456 asm_shift_opcode(s1, token);
380457 return;
381458
459+ case TOK_ASM_add:
460+ case TOK_ASM_addi:
461+ case TOK_ASM_sub:
462+ case TOK_ASM_addw:
463+ case TOK_ASM_addd:
464+ case TOK_ASM_addiw:
465+ case TOK_ASM_addid:
466+ case TOK_ASM_subw:
467+ case TOK_ASM_subd:
468+ case TOK_ASM_xor:
469+ case TOK_ASM_xori:
470+ case TOK_ASM_or:
471+ case TOK_ASM_ori:
472+ case TOK_ASM_and:
473+ case TOK_ASM_andi:
474+ case TOK_ASM_slt:
475+ case TOK_ASM_slti:
476+ case TOK_ASM_sltu:
477+ case TOK_ASM_sltiu:
478+ asm_data_processing_opcode(s1, token);
479+
382480 default:
383481 expect("known instruction");
384482 }
riscv64-tok.h+26−0
@@ -106,9 +106,35 @@ · 105 unmodified lines
106106
107107 /* Arithmetic */
108108
109+ DEF_ASM(add)
110+ DEF_ASM(addi)
111+ DEF_ASM(sub)
109112 DEF_ASM(lui)
110113 DEF_ASM(auipc)
111114
115+ DEF_ASM(addw)
116+ DEF_ASM(addd)
117+ DEF_ASM(addiw)
118+ DEF_ASM(addid)
119+ DEF_ASM(subw)
120+ DEF_ASM(subd)
121+
122+/* Logical */
123+
124+ DEF_ASM(xor)
125+ DEF_ASM(xori)
126+ DEF_ASM(or)
127+ DEF_ASM(ori)
128+ DEF_ASM(and)
129+ DEF_ASM(andi)
130+
131+/* Compare */
132+
133+ DEF_ASM(slt)
134+ DEF_ASM(slti)
135+ DEF_ASM(sltu)
136+ DEF_ASM(sltiu)
137+
112138 /* Sync */
113139
114140 DEF_ASM(fence)

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