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riscv64-asm.c: implement Zicsr extension

noneofyourbusiness committed 2 years ago

Commit 3b3c9411 parent 279dbb91 file · +31 −0Browse files

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riscv64-asm.c+31−0
@@ -676,6 +676,30 @@ static void asm_ternary_opcode(TCCState *s1, int token) · 675 unmodified lines
676676 asm_emit_r(token, 0x3b | (6 << 12) | (1 << 25), ops, ops + 1, ops + 2);
677677 return;
678678
679+ /* Zicsr extension; (rd, csr, rs/uimm) */
680+ case TOK_ASM_csrrc:
681+ asm_emit_i(token, 0x73 | (3 << 12), ops, ops + 2, ops + 1);
682+ return;
683+ case TOK_ASM_csrrci:
684+ /* using rs1 field for uimmm */
685+ ops[2].type = OP_REG;
686+ asm_emit_i(token, 0x73 | (7 << 12), ops, ops + 2, ops + 1);
687+ return;
688+ case TOK_ASM_csrrs:
689+ asm_emit_i(token, 0x73 | (2 << 12), ops, ops + 2, ops + 1);
690+ return;
691+ case TOK_ASM_csrrsi:
692+ ops[2].type = OP_REG;
693+ asm_emit_i(token, 0x73 | (6 << 12), ops, ops + 2, ops + 1);
694+ return;
695+ case TOK_ASM_csrrw:
696+ asm_emit_i(token, 0x73 | (1 << 12), ops, ops + 2, ops + 1);
697+ return;
698+ case TOK_ASM_csrrwi:
699+ ops[2].type = OP_REG;
700+ asm_emit_i(token, 0x73 | (5 << 12), ops, ops + 2, ops + 1);
701+ return;
702+
679703 /* C extension */
680704 /* register-based loads and stores (RD, RS1, IMM); CL-format */
681705 case TOK_ASM_c_fld:
@@ -858,6 +882,13 @@ ST_FUNC void asm_opcode(TCCState *s1, int token) · 176 unmodified lines
858882 case TOK_ASM_remu:
859883 case TOK_ASM_remuw:
860884 case TOK_ASM_remw:
885+ /* Zicsr extension */
886+ case TOK_ASM_csrrc:
887+ case TOK_ASM_csrrci:
888+ case TOK_ASM_csrrs:
889+ case TOK_ASM_csrrsi:
890+ case TOK_ASM_csrrw:
891+ case TOK_ASM_csrrwi:
861892 asm_ternary_opcode(s1, token);
862893 return;
863894

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