With -run the call instruction and a defined function can be far away, if the function is defined in the executable itself, not in the to be compiled code. So we always need PLT slots for -run, not just for undefined symbols.
Unified · Split
| @@ -592,22 +592,10 @@ ST_FUNC void store(int r, SValue *sv) · 591 unmodified lines | |||
| 592 | 592 | ||
| 593 | static void arm64_gen_bl_or_b(int b) | 593 | static void arm64_gen_bl_or_b(int b) |
| 594 | { | 594 | { |
| 595 | // Currently TCC's linker does not generate a PLT when TCC is invoked | ||
| 596 | // with "-run". This means functions can be out of range if we try to | ||
| 597 | // call them in the usual way. Until the linker is fixed, work around | ||
| 598 | // this by using R_AARCH64_MOVW_UABS_G* relocations; see arm64_sym. | ||
| 599 | int avoid_call26 = 1; | ||
| 600 | |||
| 601 | if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST) { | 595 | if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST) { |
| 602 | assert(!b && (vtop->r & VT_SYM)); | 596 | assert(!b && (vtop->r & VT_SYM)); |
| 603 | if (avoid_call26) { | 597 | greloc(cur_text_section, vtop->sym, ind, R_AARCH64_CALL26); |
| 604 | arm64_sym(30, vtop->sym, 0); | 598 | o(0x94000000); // bl . |
| 605 | o(0xd63f03c0); // blr x30 | ||
| 606 | } | ||
| 607 | else { | ||
| 608 | greloc(cur_text_section, vtop->sym, ind, R_AARCH64_CALL26); | ||
| 609 | o(0x94000000); // bl . | ||
| 610 | } | ||
| 611 | } | 599 | } |
| 612 | else | 600 | else |
| 613 | o(0xd61f0000 | (uint32_t)!b << 21 | intr(gv(RC_R30)) << 5); // br/blr | 601 | o(0xd61f0000 | (uint32_t)!b << 21 | intr(gv(RC_R30)) << 5); // br/blr |
| @@ -826,7 +826,8 @@ ST_FUNC void relocate_section(TCCState *s1, Section *s) · 825 unmodified lines | |||
| 826 | case R_AARCH64_CALL26: | 826 | case R_AARCH64_CALL26: |
| 827 | /* This check must match the one in build_got_entries, testing | 827 | /* This check must match the one in build_got_entries, testing |
| 828 | if we really need a PLT slot. */ | 828 | if we really need a PLT slot. */ |
| 829 | if (sym->st_shndx == SHN_UNDEF) | 829 | if (sym->st_shndx == SHN_UNDEF || |
| 830 | s1->output_type == TCC_OUTPUT_MEMORY) | ||
| 830 | /* We've put the PLT slot offset into r_addend when generating | 831 | /* We've put the PLT slot offset into r_addend when generating |
| 831 | it, and that's what we must use as relocation value (adjusted | 832 | it, and that's what we must use as relocation value (adjusted |
| 832 | by section offset of course). */ | 833 | by section offset of course). */ |
| @@ -1423,19 +1424,20 @@ ST_FUNC void build_got_entries(TCCState *s1) · 590 unmodified lines | |||
| 1423 | 1424 | ||
| 1424 | case R_AARCH64_JUMP26: | 1425 | case R_AARCH64_JUMP26: |
| 1425 | case R_AARCH64_CALL26: | 1426 | case R_AARCH64_CALL26: |
| 1426 | if (!s1->got) | 1427 | if (!s1->got) |
| 1427 | build_got(s1); | 1428 | build_got(s1); |
| 1428 | sym_index = ELFW(R_SYM)(rel->r_info); | 1429 | sym_index = ELFW(R_SYM)(rel->r_info); |
| 1429 | sym = &((ElfW(Sym) *)symtab_section->data)[sym_index]; | 1430 | sym = &((ElfW(Sym) *)symtab_section->data)[sym_index]; |
| 1430 | if (sym->st_shndx == SHN_UNDEF) { | 1431 | if (sym->st_shndx == SHN_UNDEF || |
| 1432 | s1->output_type == TCC_OUTPUT_MEMORY) { | ||
| 1431 | unsigned long ofs; | 1433 | unsigned long ofs; |
| 1432 | reloc_type = R_AARCH64_JUMP_SLOT; | 1434 | reloc_type = R_AARCH64_JUMP_SLOT; |
| 1433 | ofs = put_got_entry(s1, reloc_type, sym->st_size, | 1435 | ofs = put_got_entry(s1, reloc_type, sym->st_size, |
| 1434 | sym->st_info, sym_index); | 1436 | sym->st_info, sym_index); |
| 1435 | /* We store the place of the generated PLT slot | 1437 | /* We store the place of the generated PLT slot |
| 1436 | in our addend. */ | 1438 | in our addend. */ |
| 1437 | rel->r_addend += ofs; | 1439 | rel->r_addend += ofs; |
| 1438 | } | 1440 | } |
| 1439 | break; | 1441 | break; |
| 1440 | #elif defined(TCC_TARGET_C67) | 1442 | #elif defined(TCC_TARGET_C67) |
| 1441 | case R_C60_GOT32: | 1443 | case R_C60_GOT32: |