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Another update for clang -fsanitize

arm-link.c: remove some casts tccelf.c: code style and remove code tccpp.c: use correct pointer size so cross compiling works riscv64-gen.c: make code more readable

herman ten brugge committed 1 year ago

Commit 8a0ccbb1 parent 666e88e4 files · +26 −23Browse files

Unified · Split

4 files
  1. arm-link.c +7 −7
  2. riscv64-gen.c +12 −11
  3. tccelf.c +3 −3
  4. tccpp.c +4 −2
arm-link.c+7−7
@@ -204,7 +204,7 @@ ST_FUNC void relocate(TCCState *s1, ElfW_Rel *rel, int type, unsigned char *ptr, · 203 unmodified lines
204 x = (unsigned) x << 2;204 x = (unsigned) x << 2;
205 blx_avail = (CONFIG_TCC_CPUVER >= 5);205 blx_avail = (CONFIG_TCC_CPUVER >= 5);
206 is_thumb = val & 1;206 is_thumb = val & 1;
207 is_bl = ((unsigned) read32le(ptr)) >> 24 == 0xeb;207 is_bl = read32le(ptr) >> 24 == 0xeb;
208 is_call = (type == R_ARM_CALL || (type == R_ARM_PC24 && is_bl));208 is_call = (type == R_ARM_CALL || (type == R_ARM_PC24 && is_bl));
209 x += val - addr;209 x += val - addr;
210#ifdef DEBUG_RELOC210#ifdef DEBUG_RELOC
@@ -241,8 +241,8 @@ ST_FUNC void relocate(TCCState *s1, ElfW_Rel *rel, int type, unsigned char *ptr, · 30 unmodified lines
241 return;241 return;
242 242
243 /* Get initial offset */243 /* Get initial offset */
244 hi = (uint16_t) read16le(ptr);244 hi = read16le(ptr);
245 lo = (uint16_t) read16le(ptr+2);245 lo = read16le(ptr+2);
246 s = (hi >> 10) & 1;246 s = (hi >> 10) & 1;
247 j1 = (lo >> 13) & 1;247 j1 = (lo >> 13) & 1;
248 j2 = (lo >> 11) & 1;248 j2 = (lo >> 11) & 1;
@@ -313,11 +313,11 @@ ST_FUNC void relocate(TCCState *s1, ElfW_Rel *rel, int type, unsigned char *ptr, · 64 unmodified lines
313 j2 = s ^ (i2 ^ 1);313 j2 = s ^ (i2 ^ 1);
314 imm10 = (x >> 12) & 0x3ff;314 imm10 = (x >> 12) & 0x3ff;
315 imm11 = (x >> 1) & 0x7ff;315 imm11 = (x >> 1) & 0x7ff;
316 write16le(ptr, (uint16_t) ((hi & 0xf800) |316 write16le(ptr, (hi & 0xf800) |
317 (s << 10) | imm10));317 (s << 10) | imm10);
318 write16le(ptr+2, (uint16_t) ((lo & 0xc000) |318 write16le(ptr+2, (lo & 0xc000) |
319 (j1 << 13) | blx_bit | (j2 << 11) |319 (j1 << 13) | blx_bit | (j2 << 11) |
320 imm11));320 imm11);
321 }321 }
322 return;322 return;
323 case R_ARM_MOVT_ABS:323 case R_ARM_MOVT_ABS:
riscv64-gen.c+12−11
@@ -36,6 +36,7 @@ · 35 unmodified lines
36#include <assert.h>36#include <assert.h>
37 37
38#define UPPER(x) (((unsigned)(x) + 0x800u) & 0xfffff000)38#define UPPER(x) (((unsigned)(x) + 0x800u) & 0xfffff000)
39#define LOW_OVERFLOW(x) UPPER(x)
39#define SIGN7(x) ((((x) & 0xff) ^ 0x80) - 0x80)40#define SIGN7(x) ((((x) & 0xff) ^ 0x80) - 0x80)
40#define SIGN11(x) ((((x) & 0xfff) ^ 0x800) - 0x800)41#define SIGN11(x) ((((x) & 0xfff) ^ 0x800) - 0x800)
41 42
@@ -135,14 +136,14 @@ static void ER(uint32_t opcode, uint32_t func3, · 93 unmodified lines
135static void EI(uint32_t opcode, uint32_t func3,136static void EI(uint32_t opcode, uint32_t func3,
136 uint32_t rd, uint32_t rs1, uint32_t imm)137 uint32_t rd, uint32_t rs1, uint32_t imm)
137{138{
138 assert(! ((imm + (1 << 11)) >> 12));139 assert(! LOW_OVERFLOW(imm));
139 EIu(opcode, func3, rd, rs1, imm);140 EIu(opcode, func3, rd, rs1, imm);
140}141}
141 142
142static void ES(uint32_t opcode, uint32_t func3,143static void ES(uint32_t opcode, uint32_t func3,
143 uint32_t rs1, uint32_t rs2, uint32_t imm)144 uint32_t rs1, uint32_t rs2, uint32_t imm)
144{145{
145 assert(! ((imm + (1 << 11)) >> 12));146 assert(! LOW_OVERFLOW(imm));
146 o(opcode | (func3 << 12) | ((imm & 0x1f) << 7) | (rs1 << 15)147 o(opcode | (func3 << 12) | ((imm & 0x1f) << 7) | (rs1 << 15)
147 | (rs2 << 20) | ((imm >> 5) << 25));148 | (rs2 << 20) | ((imm >> 5) << 25));
148}149}
@@ -158,7 +159,7 @@ ST_FUNC void gsym_addr(int t_, int a_) · 9 unmodified lines
158 uint32_t r = a - t, imm;159 uint32_t r = a - t, imm;
159 if ((r + (1 << 21)) & ~((1U << 22) - 2))160 if ((r + (1 << 21)) & ~((1U << 22) - 2))
160 tcc_error("out-of-range branch chain");161 tcc_error("out-of-range branch chain");
161 imm = (((r >> 12) & 0xff) << 12)162 imm = (((r >> 12) & 0xff) << 12)
162 | (((r >> 11) & 1) << 20)163 | (((r >> 11) & 1) << 20)
163 | (((r >> 1) & 0x3ff) << 21)164 | (((r >> 1) & 0x3ff) << 21)
164 | (((r >> 20) & 1) << 31);165 | (((r >> 20) & 1) << 31);
@@ -179,7 +180,7 @@ static int load_symofs(int r, SValue *sv, int forstore, int *new_fc) · 14 unmodified lines
179 R_RISCV_PCREL_HI20, sv->c.i);180 R_RISCV_PCREL_HI20, sv->c.i);
180 *new_fc = 0;181 *new_fc = 0;
181 } else {182 } else {
182 if (((unsigned)fc + (1 << 11)) >> 12){183 if (LOW_OVERFLOW(fc)){
183 large_addend = 1;184 large_addend = 1;
184 }185 }
185 greloca(cur_text_section, sv->sym, ind,186 greloca(cur_text_section, sv->sym, ind,
@@ -206,7 +207,7 @@ static int load_symofs(int r, SValue *sv, int forstore, int *new_fc) · 20 unmodified lines
206 rr = 8; // s0207 rr = 8; // s0
207 if (fc != sv->c.i)208 if (fc != sv->c.i)
208 tcc_error("unimp: store(giant local off) (0x%lx)", (long)sv->c.i);209 tcc_error("unimp: store(giant local off) (0x%lx)", (long)sv->c.i);
209 if (((unsigned)fc + (1 << 11)) >> 12) {210 if (LOW_OVERFLOW(fc)) {
210 rr = is_ireg(r) ? ireg(r) : 5; // t0211 rr = is_ireg(r) ? ireg(r) : 5; // t0
211 o(0x37 | (rr << 7) | UPPER(fc)); //lui RR, upper(fc)212 o(0x37 | (rr << 7) | UPPER(fc)); //lui RR, upper(fc)
212 ER(0x33, 0, rr, rr, 8, 0); // add RR, RR, s0213 ER(0x33, 0, rr, rr, 8, 0); // add RR, RR, s0
@@ -251,7 +252,7 @@ ST_FUNC void load(int r, SValue *sv) · 38 unmodified lines
251 br = load_symofs(r, sv, 0, &fc);252 br = load_symofs(r, sv, 0, &fc);
252 } else if (v < VT_CONST) {253 } else if (v < VT_CONST) {
253 br = ireg(v);254 br = ireg(v);
254 /*if (((unsigned)fc + (1 << 11)) >> 12)255 /*if (LOW_OVERFLOW(fc))
255 tcc_error("unimp: load(large addend) (0x%x)", fc);*/256 tcc_error("unimp: load(large addend) (0x%x)", fc);*/
256 fc = 0; // XXX store ofs in LVAL(reg)257 fc = 0; // XXX store ofs in LVAL(reg)
257 } else if (v == VT_LLOCAL) {258 } else if (v == VT_LLOCAL) {
@@ -297,7 +298,7 @@ ST_FUNC void load(int r, SValue *sv) · 39 unmodified lines
297 zext = 1;298 zext = 1;
298 }299 }
299 }300 }
300 if (((unsigned)fc + (1 << 11)) >> 12)301 if (LOW_OVERFLOW(fc))
301 o(0x37 | (rr << 7) | UPPER(fc)), rb = rr; //lui RR, upper(fc)302 o(0x37 | (rr << 7) | UPPER(fc)), rb = rr; //lui RR, upper(fc)
302 if (fc || (rr != rb) || do32bit || (fr & VT_SYM))303 if (fc || (rr != rb) || do32bit || (fr & VT_SYM))
303 EI(0x13 | do32bit, 0, rr, rb, SIGN11(fc)); // addi[w] R, x0|R, FC304 EI(0x13 | do32bit, 0, rr, rb, SIGN11(fc)); // addi[w] R, x0|R, FC
@@ -392,7 +393,7 @@ ST_FUNC void store(int r, SValue *sv) · 88 unmodified lines
392 ptrreg = load_symofs(-1, sv, 1, &fc);393 ptrreg = load_symofs(-1, sv, 1, &fc);
393 } else if (fr < VT_CONST) {394 } else if (fr < VT_CONST) {
394 ptrreg = ireg(fr);395 ptrreg = ireg(fr);
395 /*if (((unsigned)fc + (1 << 11)) >> 12)396 /*if (LOW_OVERFLOW(fc))
396 tcc_error("unimp: store(large addend) (0x%x)", fc);*/397 tcc_error("unimp: store(large addend) (0x%x)", fc);*/
397 fc = 0; // XXX support offsets regs398 fc = 0; // XXX support offsets regs
398 } else if (fr == VT_CONST) {399 } else if (fr == VT_CONST) {
@@ -1014,7 +1015,7 @@ static void gen_opil(int op, int ll) · 615 unmodified lines
1014 ll = ll ? 0 : 8;1015 ll = ll ? 0 : 8;
1015 if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {1016 if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {
1016 int fc = vtop->c.i;1017 int fc = vtop->c.i;
1017 if (fc == vtop->c.i && !(((unsigned)fc + (1 << 11)) >> 12)) {1018 if (fc == vtop->c.i && !LOW_OVERFLOW(fc)) {
1018 int cll = 0;1019 int cll = 0;
1019 int m = ll ? 31 : 63;1020 int m = ll ? 31 : 63;
1020 vswap();1021 vswap();
@@ -1381,7 +1382,7 @@ ST_FUNC void ggoto(void) · 360 unmodified lines
1381 1382
1382ST_FUNC void gen_vla_sp_save(int addr)1383ST_FUNC void gen_vla_sp_save(int addr)
1383{1384{
1384 if (((unsigned)addr + (1 << 11)) >> 12) {1385 if (LOW_OVERFLOW(addr)) {
1385 o(0x37 | (5 << 7) | UPPER(addr)); //lui t0,upper(addr)1386 o(0x37 | (5 << 7) | UPPER(addr)); //lui t0,upper(addr)
1386 ER(0x33, 0, 5, 5, 8, 0); // add t0, t0, s01387 ER(0x33, 0, 5, 5, 8, 0); // add t0, t0, s0
1387 ES(0x23, 3, 5, 2, SIGN11(addr)); // sd sp, fc(t0)1388 ES(0x23, 3, 5, 2, SIGN11(addr)); // sd sp, fc(t0)
@@ -1392,7 +1393,7 @@ ST_FUNC void gen_vla_sp_save(int addr) · 4 unmodified lines
1392 1393
1393ST_FUNC void gen_vla_sp_restore(int addr)1394ST_FUNC void gen_vla_sp_restore(int addr)
1394{1395{
1395 if (((unsigned)addr + (1 << 11)) >> 12) {1396 if (LOW_OVERFLOW(addr)) {
1396 o(0x37 | (5 << 7) | UPPER(addr)); //lui t0,upper(addr)1397 o(0x37 | (5 << 7) | UPPER(addr)); //lui t0,upper(addr)
1397 ER(0x33, 0, 5, 5, 8, 0); // add t0, t0, s01398 ER(0x33, 0, 5, 5, 8, 0); // add t0, t0, s0
1398 EI(0x03, 3, 2, 5, SIGN11(addr)); // ld sp, fc(t0)1399 EI(0x03, 3, 2, 5, SIGN11(addr)); // ld sp, fc(t0)
tccelf.c+3−3
@@ -1129,7 +1129,8 @@ static void relocate_section(TCCState *s1, Section *s, Section *sr) · 1128 unmodified lines
1129 1129
1130 qrel = (ElfW_Rel *)sr->data;1130 qrel = (ElfW_Rel *)sr->data;
1131 for_each_elem(sr, 0, rel, ElfW_Rel) {1131 for_each_elem(sr, 0, rel, ElfW_Rel) {
1132 if (s->data == NULL) continue; /* bss */1132 if (s->data == NULL) /* bss */
1133 continue;
1133 ptr = s->data + rel->r_offset;1134 ptr = s->data + rel->r_offset;
1134 sym_index = ELFW(R_SYM)(rel->r_info);1135 sym_index = ELFW(R_SYM)(rel->r_info);
1135 sym = &((ElfW(Sym) *)symtab_section->data)[sym_index];1136 sym = &((ElfW(Sym) *)symtab_section->data)[sym_index];
@@ -3310,7 +3311,6 @@ invalid: · 2174 unmodified lines
3310 /* resolve symbols */3311 /* resolve symbols */
3311 old_to_new_syms = tcc_mallocz(nb_syms * sizeof(int));3312 old_to_new_syms = tcc_mallocz(nb_syms * sizeof(int));
3312 3313
3313 if (nb_syms == 0) goto skip;
3314 sym = symtab + 1;3314 sym = symtab + 1;
3315 for(i = 1; i < nb_syms; i++, sym++) {3315 for(i = 1; i < nb_syms; i++, sym++) {
3316 if (sym->st_shndx != SHN_UNDEF &&3316 if (sym->st_shndx != SHN_UNDEF &&
@@ -3343,7 +3343,7 @@ invalid: · 26 unmodified lines
3343 sym->st_shndx, name);3343 sym->st_shndx, name);
3344 old_to_new_syms[i] = sym_index;3344 old_to_new_syms[i] = sym_index;
3345 }3345 }
3346skip:3346
3347 /* third pass to patch relocation entries */3347 /* third pass to patch relocation entries */
3348 for(i = 1; i < ehdr.e_shnum; i++) {3348 for(i = 1; i < ehdr.e_shnum; i++) {
3349 s = sm_table[i].s;3349 s = sm_table[i].s;
tccpp.c+4−2
@@ -117,6 +117,8 @@ ST_FUNC void expect(const char *msg) · 116 unmodified lines
117 117
118#define USE_TAL118#define USE_TAL
119 119
120#define POINTER_SIZE sizeof(void *)
121
120#ifndef USE_TAL122#ifndef USE_TAL
121#define tal_free(al, p) tcc_free(p)123#define tal_free(al, p) tcc_free(p)
122#define tal_realloc(al, p, size) tcc_realloc(p, size)124#define tal_realloc(al, p, size) tcc_realloc(p, size)
@@ -157,7 +159,7 @@ typedef struct TinyAlloc { · 34 unmodified lines
157} TinyAlloc;159} TinyAlloc;
158 160
159typedef struct tal_header_t {161typedef struct tal_header_t {
160 ALIGNED(PTR_SIZE) unsigned size;162 ALIGNED(POINTER_SIZE) unsigned size;
161#ifdef TAL_DEBUG163#ifdef TAL_DEBUG
162 int line_num; /* negative line_num used for double free check */164 int line_num; /* negative line_num used for double free check */
163 char file_name[TAL_DEBUG_FILE_LEN + 1];165 char file_name[TAL_DEBUG_FILE_LEN + 1];
@@ -246,7 +248,7 @@ static void *tal_realloc_impl(TinyAlloc **pal, void *p, unsigned size TAL_DEBUG_ · 82 unmodified lines
246 tal_header_t *header;248 tal_header_t *header;
247 void *ret;249 void *ret;
248 int is_own;250 int is_own;
249 unsigned adj_size = (size + PTR_SIZE - 1) & -PTR_SIZE;251 unsigned adj_size = (size + POINTER_SIZE - 1) & -POINTER_SIZE;
250 TinyAlloc *al = *pal;252 TinyAlloc *al = *pal;
251 253
252tail_call:254tail_call:

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