History

arm-asm: Add cdp2

Also allow instructions without condition code in the first place

Danny Milosavljevic committed 5 years ago

Commit a1dad7a1 parent 036a7fe3 files · +21 −6Browse files

Unified · Split

3 files
  1. arm-asm.c +15 −5
  2. arm-tok.h +4 −0
  3. tests/arm-asm-testsuite.sh +2 −1
arm-asm.c+15−5
@@ -155,7 +155,7 @@ ST_FUNC void gen_expr32(ExprValue *pe) · 154 unmodified lines
155 155
156static uint32_t condition_code_of_token(int token) {156static uint32_t condition_code_of_token(int token) {
157 if (token < TOK_ASM_nopeq) {157 if (token < TOK_ASM_nopeq) {
158 expect("instruction");158 expect("condition-enabled instruction");
159 return 0;159 return 0;
160 } else160 } else
161 return (token - TOK_ASM_nopeq) & 15;161 return (token - TOK_ASM_nopeq) & 15;
@@ -335,6 +335,7 @@ static void asm_coprocessor_opcode(TCCState *s1, int token) { · 173 unmodified lines
335 Operand opcode2;335 Operand opcode2;
336 uint8_t registers[3];336 uint8_t registers[3];
337 unsigned int i;337 unsigned int i;
338 uint8_t high_nibble;
338 339
339 if (tok >= TOK_ASM_p0 && tok <= TOK_ASM_p15) {340 if (tok >= TOK_ASM_p0 && tok <= TOK_ASM_p15) {
340 coprocessor = tok - TOK_ASM_p0;341 coprocessor = tok - TOK_ASM_p0;
@@ -380,7 +381,11 @@ static void asm_coprocessor_opcode(TCCState *s1, int token) { · 39 unmodified lines
380 return;381 return;
381 }382 }
382 383
383 asm_emit_coprocessor_opcode(condition_code_of_token(token), coprocessor, opcode1.e.v, registers[0], registers[1], registers[2], opcode2.e.v, 0);384 if (token == TOK_ASM_cdp2)
385 high_nibble = 0xF;
386 else
387 high_nibble = condition_code_of_token(token);
388 asm_emit_coprocessor_opcode(high_nibble, coprocessor, opcode1.e.v, registers[0], registers[1], registers[2], opcode2.e.v, 0);
384}389}
385 390
386/* data processing and single data transfer instructions only */391/* data processing and single data transfer instructions only */
@@ -1426,9 +1431,14 @@ ST_FUNC void asm_opcode(TCCState *s1, int token) · 1039 unmodified lines
1426 }1431 }
1427 if (token == TOK_EOF)1432 if (token == TOK_EOF)
1428 return;1433 return;
1429 if (token < TOK_ASM_nopeq) {1434 if (token < TOK_ASM_nopeq) { // no condition code
1430 expect("instruction");1435 switch (token) {
1431 return;1436 case TOK_ASM_cdp2:
1437 return asm_coprocessor_opcode(s1, token);
1438 default:
1439 expect("instruction");
1440 return;
1441 }
1432 }1442 }
1433 1443
1434 switch (ARM_INSTRUCTION_GROUP(token)) {1444 switch (ARM_INSTRUCTION_GROUP(token)) {
arm-tok.h+4−0
@@ -70,6 +70,10 @@ · 69 unmodified lines
70 70
71 DEF_ASM(asl)71 DEF_ASM(asl)
72 72
73 /* instructions that have no condition code */
74
75 DEF_ASM(cdp2)
76
73#define ARM_INSTRUCTION_GROUP(tok) ((((tok) - TOK_ASM_nopeq) & 0xFFFFFFF0) + TOK_ASM_nopeq)77#define ARM_INSTRUCTION_GROUP(tok) ((((tok) - TOK_ASM_nopeq) & 0xFFFFFFF0) + TOK_ASM_nopeq)
74 78
75/* Note: condition code is 4 bits */79/* Note: condition code is 4 bits */
tests/arm-asm-testsuite.sh+2−1
@@ -5,7 +5,7 @@ set -e · 4 unmodified lines
5# Note: "{r3}" is definitely different--but would complicate the assembler.5# Note: "{r3}" is definitely different--but would complicate the assembler.
6 6
7state="`mktemp -d`"7state="`mktemp -d`"
8cat ../arm-tok.h |grep DEF_ASM_CONDED |grep -v '#define' |grep -v '/[*]' |sed -e 's;DEF_ASM_CONDED.\(.*\).$;\1;'| grep -v 'not useful' | while read s8cat ../arm-tok.h |grep DEF_ASM |grep -v 'not useful' |grep -v '#define' |grep -v '/[*]' |sed -e 's;^[ ]*DEF_ASM[^(]*(\(.*\)).*$;\1;' | egrep -v '^((r|c|p)[0-9]+|fp|ip|sp|lr|pc|asl)$' | while read s
9do9do
10 ok=010 ok=0
11 for args in "r3, r4, r5, r6" \11 for args in "r3, r4, r5, r6" \
@@ -90,6 +90,7 @@ do · 78 unmodified lines
90 "r4, #0xFFFFFF00" \90 "r4, #0xFFFFFF00" \
91 "r2, #-4" \91 "r2, #-4" \
92 "p10, #7, c2, c0, c1, #4" \92 "p10, #7, c2, c0, c1, #4" \
93 "p10, #7, r2, c0, c1, #4" \
93 "#4" \94 "#4" \
94 "#-4" \95 "#-4" \
95 ""96 ""

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