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x86_64-asm: support endbr64 instruction

endbr64 has no operand but comes with a ModR/M byte. Handle it in the same way as *fence instructions.

John Nunley committed 2 years ago

Commit a21b5f11 parent 6acf3012 files · +12 −3Browse files

Unified · Split

2 files
  1. i386-asm.c +9 −3
  2. x86_64-asm.h +3 −0
i386-asm.c+9−3
@@ -1002,15 +1002,21 @@ again: · 1001 unmodified lines
10021002 modrm_index = -1;
10031003 modreg_index = -1;
10041004 if (pa->instr_type & OPC_MODRM) {
1005+#ifdef TCC_TARGET_X86_64
10051006 if (!nb_ops) {
10061007 /* A modrm opcode without operands is a special case (e.g. mfence).
1007− It has a group and acts as if there's an register operand 0
1008− (ax). */
1008+ It has a group and acts as if there's an register operand 0 */
10091009 i = 0;
10101010 ops[i].type = OP_REG;
1011− ops[i].reg = 0;
1011+ if (pa->sym == TOK_ASM_endbr64)
1012+ ops[i].reg = 2; // dx
1013+ else if (pa->sym >= TOK_ASM_lfence && pa->sym <= TOK_ASM_sfence)
1014+ ops[i].reg = 0; // ax
1015+ else
1016+ tcc_error("bad MODR/M opcode without operands");
10121017 goto modrm_found;
10131018 }
1019+#endif
10141020 /* first look for an ea operand */
10151021 for(i = 0;i < nb_ops; i++) {
10161022 if (op_type[i] & OP_EA)
x86_64-asm.h+3−0
@@ -538,6 +538,9 @@ ALT(DEF_ASM_OP2(movhps, 0x0f17, 0, OPC_MODRM, OPT_SSE, OPT_EA | OPT_REG32 )) · 537 unmodified lines
538538 DEF_ASM_OP0L(mfence, 0x0fae, 6, OPC_MODRM)
539539 DEF_ASM_OP0L(sfence, 0x0fae, 7, OPC_MODRM)
540540 DEF_ASM_OP1(clflush, 0x0fae, 7, OPC_MODRM, OPT_EA)
541+
542+ /* Control-Flow Enforcement */
543+ DEF_ASM_OP0L(endbr64, 0xf30f1e, 7, OPC_MODRM)
541544 #undef ALT
542545 #undef DEF_ASM_OP0
543546 #undef DEF_ASM_OP0L

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