add some pseudoinstructions riscv64-tok.h: add pseudoinstructions from tables 25.{2,3}
Unified · Split
| @@ -167,6 +167,7 @@ static void asm_nullary_opcode(TCCState *s1, int token) · 166 unmodified lines | |||
| 167 | static void parse_operand(TCCState *s1, Operand *op) | 167 | static void parse_operand(TCCState *s1, Operand *op) |
| 168 | { | 168 | { |
| 169 | ExprValue e = {0}; | 169 | ExprValue e = {0}; |
| 170 | Sym label = {0}; | ||
| 170 | int8_t reg; | 171 | int8_t reg; |
| 171 | 172 | ||
| 172 | op->type = 0; | 173 | op->type = 0; |
| @@ -190,6 +191,19 @@ static void parse_operand(TCCState *s1, Operand *op) · 17 unmodified lines | |||
| 190 | if (!op->e.sym) { | 191 | if (!op->e.sym) { |
| 191 | if (op->e.v < 0x1000) | 192 | if (op->e.v < 0x1000) |
| 192 | op->type = OP_IM12S; | 193 | op->type = OP_IM12S; |
| 194 | } else if (op->e.sym->type.t & (VT_EXTERN | VT_STATIC)) { | ||
| 195 | label.type.t = VT_VOID | VT_STATIC; | ||
| 196 | |||
| 197 | /* use the medium PIC model: GOT, auipc, lw */ | ||
| 198 | if (op->e.sym->type.t & VT_STATIC) | ||
| 199 | greloca(cur_text_section, op->e.sym, ind, R_RISCV_PCREL_HI20, 0); | ||
| 200 | else | ||
| 201 | greloca(cur_text_section, op->e.sym, ind, R_RISCV_GOT_HI20, 0); | ||
| 202 | put_extern_sym(&label, cur_text_section, ind, 0); | ||
| 203 | greloca(cur_text_section, &label, ind+4, R_RISCV_PCREL_LO12_I, 0); | ||
| 204 | |||
| 205 | op->type = OP_IM12S; | ||
| 206 | op->e.v = 0; | ||
| 193 | } else { | 207 | } else { |
| 194 | expect("operand"); | 208 | expect("operand"); |
| 195 | } | 209 | } |
| @@ -206,6 +220,7 @@ static void asm_unary_opcode(TCCState *s1, int token) · 10 unmodified lines | |||
| 206 | opcode |= ENCODE_RD(op.reg); | 220 | opcode |= ENCODE_RD(op.reg); |
| 207 | 221 | ||
| 208 | switch (token) { | 222 | switch (token) { |
| 223 | /* pseudoinstructions */ | ||
| 209 | case TOK_ASM_rdcycle: | 224 | case TOK_ASM_rdcycle: |
| 210 | asm_emit_opcode(opcode | (0xC00 << 20)); | 225 | asm_emit_opcode(opcode | (0xC00 << 20)); |
| 211 | return; | 226 | return; |
| @@ -224,6 +239,7 @@ static void asm_unary_opcode(TCCState *s1, int token) · 12 unmodified lines | |||
| 224 | case TOK_ASM_rdinstreth: | 239 | case TOK_ASM_rdinstreth: |
| 225 | asm_emit_opcode(opcode | (0xC82 << 20) | ENCODE_RD(op.reg)); | 240 | asm_emit_opcode(opcode | (0xC82 << 20) | ENCODE_RD(op.reg)); |
| 226 | return; | 241 | return; |
| 242 | /* C extension */ | ||
| 227 | case TOK_ASM_c_j: | 243 | case TOK_ASM_c_j: |
| 228 | asm_emit_cj(token, 1 | (5 << 13), &op); | 244 | asm_emit_cj(token, 1 | (5 << 13), &op); |
| 229 | return; | 245 | return; |
| @@ -375,6 +391,21 @@ static void asm_binary_opcode(TCCState* s1, int token) · 145 unmodified lines | |||
| 375 | asm_emit_css(token, 2 | (5 << 13), ops, ops + 1); | 391 | asm_emit_css(token, 2 | (5 << 13), ops, ops + 1); |
| 376 | return; | 392 | return; |
| 377 | 393 | ||
| 394 | /* pseudoinstructions */ | ||
| 395 | /* rd, sym */ | ||
| 396 | case TOK_ASM_la: | ||
| 397 | /* auipc rd, 0 */ | ||
| 398 | asm_emit_u(token, 3 | (5 << 2), ops, ops + 1); | ||
| 399 | /* lw rd, rd, 0 */ | ||
| 400 | asm_emit_i(token, 3 | (2 << 12), ops, ops, ops + 1); | ||
| 401 | return; | ||
| 402 | case TOK_ASM_lla: | ||
| 403 | /* auipc rd, 0 */ | ||
| 404 | asm_emit_u(token, 3 | (5 << 2), ops, ops + 1); | ||
| 405 | /* addi rd, rd, 0 */ | ||
| 406 | asm_emit_i(token, 3 | (4 << 2), ops, ops, ops + 1); | ||
| 407 | return; | ||
| 408 | |||
| 378 | default: | 409 | default: |
| 379 | expect("binary instruction"); | 410 | expect("binary instruction"); |
| 380 | } | 411 | } |
| @@ -807,7 +838,6 @@ ST_FUNC void asm_opcode(TCCState *s1, int token) · 426 unmodified lines | |||
| 807 | case TOK_ASM_hrts: | 838 | case TOK_ASM_hrts: |
| 808 | case TOK_ASM_mrth: | 839 | case TOK_ASM_mrth: |
| 809 | case TOK_ASM_mrts: | 840 | case TOK_ASM_mrts: |
| 810 | case TOK_ASM_nop: | ||
| 811 | case TOK_ASM_wfi: | 841 | case TOK_ASM_wfi: |
| 812 | asm_nullary_opcode(s1, token); | 842 | asm_nullary_opcode(s1, token); |
| 813 | return; | 843 | return; |
| @@ -952,6 +982,16 @@ ST_FUNC void asm_opcode(TCCState *s1, int token) · 138 unmodified lines | |||
| 952 | asm_ternary_opcode(s1, token); | 982 | asm_ternary_opcode(s1, token); |
| 953 | return; | 983 | return; |
| 954 | 984 | ||
| 985 | /* pseudoinstructions */ | ||
| 986 | case TOK_ASM_nop: | ||
| 987 | asm_nullary_opcode(s1, token); | ||
| 988 | return; | ||
| 989 | |||
| 990 | case TOK_ASM_la: | ||
| 991 | case TOK_ASM_lla: | ||
| 992 | asm_binary_opcode(s1, token); | ||
| 993 | return; | ||
| 994 | |||
| 955 | default: | 995 | default: |
| 956 | expect("known instruction"); | 996 | expect("known instruction"); |
| 957 | } | 997 | } |
| @@ -244,10 +244,6 @@ · 243 unmodified lines | |||
| 244 | DEF_ASM(rdinstret) | 244 | DEF_ASM(rdinstret) |
| 245 | DEF_ASM(rdinstreth) | 245 | DEF_ASM(rdinstreth) |
| 246 | 246 | ||
| 247 | /* no operation */ | ||
| 248 | DEF_ASM(nop) | ||
| 249 | DEF_ASM_WITH_SUFFIX(c, nop) | ||
| 250 | |||
| 251 | /* “M” Standard Extension for Integer Multiplication and Division, V2.0 */ | 247 | /* “M” Standard Extension for Integer Multiplication and Division, V2.0 */ |
| 252 | DEF_ASM(mul) | 248 | DEF_ASM(mul) |
| 253 | DEF_ASM(mulh) | 249 | DEF_ASM(mulh) |
| @@ -265,6 +261,7 @@ · 11 unmodified lines | |||
| 265 | DEF_ASM(remuw) | 261 | DEF_ASM(remuw) |
| 266 | 262 | ||
| 267 | /* "C" Extension for Compressed Instructions, V2.0 */ | 263 | /* "C" Extension for Compressed Instructions, V2.0 */ |
| 264 | DEF_ASM_WITH_SUFFIX(c, nop) | ||
| 268 | /* Loads */ | 265 | /* Loads */ |
| 269 | DEF_ASM_WITH_SUFFIX(c, li) | 266 | DEF_ASM_WITH_SUFFIX(c, li) |
| 270 | DEF_ASM_WITH_SUFFIX(c, lw) | 267 | DEF_ASM_WITH_SUFFIX(c, lw) |
| @@ -360,8 +357,10 @@ · 89 unmodified lines | |||
| 360 | DEF_ASM(csrw) | 357 | DEF_ASM(csrw) |
| 361 | DEF_ASM(csrwi) | 358 | DEF_ASM(csrwi) |
| 362 | DEF_ASM(frcsr) | 359 | DEF_ASM(frcsr) |
| 360 | DEF_ASM(frflags) | ||
| 363 | DEF_ASM(frrm) | 361 | DEF_ASM(frrm) |
| 364 | DEF_ASM(fscsr) | 362 | DEF_ASM(fscsr) |
| 363 | DEF_ASM(fsflags) | ||
| 365 | DEF_ASM(fsrm) | 364 | DEF_ASM(fsrm) |
| 366 | 365 | ||
| 367 | /* Privileged Instructions */ | 366 | /* Privileged Instructions */ |
| @@ -371,4 +370,43 @@ · 3 unmodified lines | |||
| 371 | DEF_ASM(hrts) | 370 | DEF_ASM(hrts) |
| 372 | DEF_ASM(wfi) | 371 | DEF_ASM(wfi) |
| 373 | 372 | ||
| 373 | /* pseudoinstructions */ | ||
| 374 | DEF_ASM(beqz) | ||
| 375 | DEF_ASM(bgez) | ||
| 376 | DEF_ASM(bgt) | ||
| 377 | DEF_ASM(bgtu) | ||
| 378 | DEF_ASM(bgtz) | ||
| 379 | DEF_ASM(ble) | ||
| 380 | DEF_ASM(bleu) | ||
| 381 | DEF_ASM(blez) | ||
| 382 | DEF_ASM(bltz) | ||
| 383 | DEF_ASM(bnez) | ||
| 384 | DEF_ASM(call) | ||
| 385 | DEF_ASM_WITH_SUFFIX(fabs, d) | ||
| 386 | DEF_ASM_WITH_SUFFIX(fabs, s) | ||
| 387 | DEF_ASM(fld) | ||
| 388 | DEF_ASM(flw) | ||
| 389 | DEF_ASM_WITH_SUFFIX(fmv, d) | ||
| 390 | DEF_ASM_WITH_SUFFIX(fmv, s) | ||
| 391 | DEF_ASM_WITH_SUFFIX(fneg, d) | ||
| 392 | DEF_ASM_WITH_SUFFIX(fneg, s) | ||
| 393 | DEF_ASM(fsd) | ||
| 394 | DEF_ASM(fsw) | ||
| 395 | DEF_ASM(j) | ||
| 396 | DEF_ASM(la) | ||
| 397 | DEF_ASM(li) | ||
| 398 | DEF_ASM(lla) | ||
| 399 | DEF_ASM(mv) | ||
| 400 | DEF_ASM(neg) | ||
| 401 | DEF_ASM(negw) | ||
| 402 | DEF_ASM(nop) | ||
| 403 | DEF_ASM(not) | ||
| 404 | DEF_ASM(ret) | ||
| 405 | DEF_ASM(seqz) | ||
| 406 | DEF_ASM_WITH_SUFFIX(sext, w) | ||
| 407 | DEF_ASM(sgtz) | ||
| 408 | DEF_ASM(sltz) | ||
| 409 | DEF_ASM(snez) | ||
| 410 | DEF_ASM(tail) | ||
| 411 | |||
| 374 | #undef DEF_ASM_WITH_SUFFIX | 412 | #undef DEF_ASM_WITH_SUFFIX |