Change type from signed char to int. Make assembly code work with tcc and gcc.
Unified · Split
| @@ -273,8 +273,8 @@ static unsigned char print_calls; · 272 unmodified lines | |||
| 273 | static unsigned char print_heap; | 273 | static unsigned char print_heap; |
| 274 | static unsigned char print_statistic; | 274 | static unsigned char print_statistic; |
| 275 | static unsigned char no_strdup; | 275 | static unsigned char no_strdup; |
| 276 | static signed char never_fatal; | 276 | static int never_fatal; |
| 277 | static signed char no_checking = 1; | 277 | static int no_checking = 1; |
| 278 | static char exec[100]; | 278 | static char exec[100]; |
| 279 | 279 | ||
| 280 | #if BOUND_STATISTIC | 280 | #if BOUND_STATISTIC |
| @@ -325,22 +325,22 @@ static unsigned long long bound_splay_delete; · 44 unmodified lines | |||
| 325 | #endif | 325 | #endif |
| 326 | 326 | ||
| 327 | /* currently only i386/x86_64 supported. Change for other platforms */ | 327 | /* currently only i386/x86_64 supported. Change for other platforms */ |
| 328 | static void fetch_and_add(signed char* variable, signed char value) | 328 | static void fetch_and_add(int* variable, int value) |
| 329 | { | 329 | { |
| 330 | #if defined __i386__ || defined __x86_64__ | 330 | #if defined __i386__ || defined __x86_64__ |
| 331 | __asm__ volatile("lock; addb %0, %1" | 331 | __asm__ volatile("lock; addl %0, %1" |
| 332 | : "+r" (value), "+m" (*variable) // input+output | 332 | : "+r" (value), "+m" (*variable) // input+output |
| 333 | : // No input-only | 333 | : // No input-only |
| 334 | : "memory" | 334 | : "memory" |
| 335 | ); | 335 | ); |
| 336 | #elif defined __arm__ | 336 | #elif defined __arm__ |
| 337 | extern fetch_and_add_arm(signed char* variable, signed char value); | 337 | extern void fetch_and_add_arm(int* variable, int value); |
| 338 | fetch_and_add_arm(variable, value); | 338 | fetch_and_add_arm(variable, value); |
| 339 | #elif defined __aarch64__ | 339 | #elif defined __aarch64__ |
| 340 | extern fetch_and_add_arm64(signed char* variable, signed char value); | 340 | extern void fetch_and_add_arm64(int* variable, int value); |
| 341 | fetch_and_add_arm64(variable, value); | 341 | fetch_and_add_arm64(variable, value); |
| 342 | #elif defined __riscv | 342 | #elif defined __riscv |
| 343 | extern fetch_and_add_riscv64(signed char* variable, signed char value); | 343 | extern void fetch_and_add_riscv64(int* variable, int value); |
| 344 | fetch_and_add_riscv64(variable, value); | 344 | fetch_and_add_riscv64(variable, value); |
| 345 | #else | 345 | #else |
| 346 | *variable += value; | 346 | *variable += value; |
| @@ -3,14 +3,26 @@ · 2 unmodified lines | |||
| 3 | .global fetch_and_add_arm | 3 | .global fetch_and_add_arm |
| 4 | .type fetch_and_add_arm, %function | 4 | .type fetch_and_add_arm, %function |
| 5 | fetch_and_add_arm: | 5 | fetch_and_add_arm: |
| 6 | .int 0xee070fba # mcr 15, 0, r0, cr7, cr10, {5} | 6 | #ifdef __TINYC__ |
| 7 | .int 0xe1903f9f # ldrex r3, [r0] | 7 | .int 0xf57ff05b |
| 8 | .int 0xe2833001 # add r3, r3, #1 | 8 | .int 0xe1903f9f |
| 9 | .int 0xe1802f93 # strex r2, r3, [r0] | 9 | .int 0xe0833001 |
| 10 | .int 0xe3520000 # cmp r2, #0 | 10 | .int 0xe1802f93 |
| 11 | .int 0x1afffffa # bne 4 <fetch_and_add_arm+0x4> | 11 | .int 0xe3520000 |
| 12 | .int 0xee070fba # mcr 15, 0, r0, cr7, cr10, {5} | 12 | .int 0x1afffffa |
| 13 | .int 0xe1a00003 # mov r0, r3 | 13 | .int 0xf57ff05b |
| 14 | .int 0xe12fff1e # bx lr | 14 | .int 0xe12fff1e |
| 15 | #else | ||
| 16 | .arch armv7-a | ||
| 15 | 17 | ||
| 18 | dmb ish | ||
| 19 | .L0: | ||
| 20 | ldrex r3, [r0] | ||
| 21 | add r3, r3, r1 | ||
| 22 | strex r2, r3, [r0] | ||
| 23 | cmp r2, #0 | ||
| 24 | bne .L0 | ||
| 25 | dmb ish | ||
| 26 | bx lr | ||
| 27 | #endif | ||
| 16 | .size fetch_and_add_arm, .-fetch_and_add_arm | 28 | .size fetch_and_add_arm, .-fetch_and_add_arm |
| @@ -3,12 +3,20 @@ · 2 unmodified lines | |||
| 3 | .global fetch_and_add_arm64 | 3 | .global fetch_and_add_arm64 |
| 4 | .type fetch_and_add_arm64, %function | 4 | .type fetch_and_add_arm64, %function |
| 5 | fetch_and_add_arm64: | 5 | fetch_and_add_arm64: |
| 6 | .int 0x885f7c01 # ldxr w1, [x0] | 6 | #ifdef __TINYC__ |
| 7 | .int 0x11000421 # add w1, w1, #0x1 | 7 | .int 0x885f7c02 |
| 8 | .int 0x8802fc01 # stlxr w2, w1, [x0] | 8 | .int 0x0b010042 |
| 9 | .int 0x35ffffa2 # cbnz w2, 0 <fetch_and_add_arm64> | 9 | .int 0x8803fc02 |
| 10 | .int 0xd5033bbf # dmb ish | 10 | .int 0x35ffffa3 |
| 11 | .int 0x2a0103e0 # mov w0, w1 | 11 | .int 0xd5033bbf |
| 12 | .int 0xd65f03c0 # ret | 12 | .int 0xd65f03c0 |
| 13 | #else | ||
| 14 | ldxr w2, [x0] | ||
| 15 | add w2, w2, w1 | ||
| 16 | stlxr w3, w2, [x0] | ||
| 17 | cbnz w3, fetch_and_add_arm64 | ||
| 18 | dmb ish | ||
| 19 | ret | ||
| 20 | #endif | ||
| 13 | 21 | ||
| 14 | .size fetch_and_add_arm64, .-fetch_and_add_arm64 | 22 | .size fetch_and_add_arm64, .-fetch_and_add_arm64 |
| @@ -3,10 +3,14 @@ · 2 unmodified lines | |||
| 3 | .global fetch_and_add_riscv64 | 3 | .global fetch_and_add_riscv64 |
| 4 | .type fetch_and_add_riscv64, %function | 4 | .type fetch_and_add_riscv64, %function |
| 5 | fetch_and_add_riscv64: | 5 | fetch_and_add_riscv64: |
| 6 | .short 0x4705 # li a4,1 | 6 | #ifdef __TINYC__ |
| 7 | .int 0x0f50000f # fence iorw,ow | 7 | .int 0x0f50000f |
| 8 | .int 0x04e527af # amoadd.w.aq a5,a4,(a0) | 8 | .int 0x004b5202f |
| 9 | .int 0x0017851b # addiw a0,a5,1 | 9 | .short 0x8082 |
| 10 | .short 0x8082 # ret | 10 | #else |
| 11 | fence iorw,ow | ||
| 12 | amoadd.w.aq zero,a1,0(a0) | ||
| 13 | ret | ||
| 14 | #endif | ||
| 11 | 15 | ||
| 12 | .size fetch_and_add_riscv64, .-fetch_and_add_riscv64 | 16 | .size fetch_and_add_riscv64, .-fetch_and_add_riscv64 |