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x86: Improve cmov handling

cmov can accept multi sizes, but is also a OPC_TEST opcode, deal with this.

Michael Matz committed 10 years ago

Commit bd93dc61 parent 9645b624 files · +11 −9Browse files

Unified · Split

4 files
  1. i386-asm.c +5 −0
  2. i386-asm.h +1 −1
  3. tests/asmtest.S +4 −0
  4. x86_64-asm.h +1 −8
i386-asm.c+5−0
@@ -659,6 +659,11 @@ ST_FUNC void asm_opcode(TCCState *s1, int opcode) · 658 unmodified lines
659 } else if (pa->instr_type & OPC_TEST) {659 } else if (pa->instr_type & OPC_TEST) {
660 if (!(opcode >= pa->sym && opcode < pa->sym + NB_TEST_OPCODES))660 if (!(opcode >= pa->sym && opcode < pa->sym + NB_TEST_OPCODES))
661 continue;661 continue;
662 /* cmovxx is a test opcode but accepts multiple sizes.
663 TCC doesn't accept the suffixed mnemonic, instead we
664 simply force size autodetection always. */
665 if (pa->instr_type & OPC_WLX)
666 s = NBWLX - 1;
662 } else if (pa->instr_type & OPC_B) {667 } else if (pa->instr_type & OPC_B) {
663#ifdef TCC_TARGET_X86_64668#ifdef TCC_TARGET_X86_64
664 /* Some instructions don't have the full size but only669 /* Some instructions don't have the full size but only
i386-asm.h+1−1
@@ -382,7 +382,7 @@ ALT(DEF_ASM_OP2(cmpxchgb, 0x0fb0, 0, OPC_MODRM | OPC_BWL, OPT_REG, OPT_REG | OPT · 381 unmodified lines
382 DEF_ASM_OP1(cmpxchg8b, 0x0fc7, 1, OPC_MODRM, OPT_EA )382 DEF_ASM_OP1(cmpxchg8b, 0x0fc7, 1, OPC_MODRM, OPT_EA )
383 383
384 /* pentium pro */384 /* pentium pro */
385 ALT(DEF_ASM_OP2(cmovo, 0x0f40, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))385 ALT(DEF_ASM_OP2(cmovo, 0x0f40, 0, OPC_MODRM | OPC_TEST | OPC_WL, OPT_REGW | OPT_EA, OPT_REGW))
386#ifdef I386_ASM_16386#ifdef I386_ASM_16
387ALT(DEF_ASM_OP2(cmovno, 0x0f41, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))387ALT(DEF_ASM_OP2(cmovno, 0x0f41, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
388ALT(DEF_ASM_OP2(cmovc, 0x0f42, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))388ALT(DEF_ASM_OP2(cmovc, 0x0f42, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
tests/asmtest.S+4−0
@@ -474,6 +474,10 @@ fucomip %st(5), %st · 473 unmodified lines
474 cmovo 0x1000, %eax474 cmovo 0x1000, %eax
475 cmovs 0x1000, %eax475 cmovs 0x1000, %eax
476 cmovns %edx, %edi476 cmovns %edx, %edi
477 cmovne %ax, %si
478#ifdef __x86_64__
479 cmovz %rdi,%rbx
480#endif
477 481
478int $3482int $3
479int $0x10483int $0x10
x86_64-asm.h+1−8
@@ -367,14 +367,7 @@ ALT(DEF_ASM_OP2(cmpxchgb, 0x0fb0, 0, OPC_MODRM | OPC_BWLQ, OPT_REG, OPT_REG | OP · 366 unmodified lines
367 DEF_ASM_OP1(cmpxchg8b, 0x0fc7, 1, OPC_MODRM, OPT_EA )367 DEF_ASM_OP1(cmpxchg8b, 0x0fc7, 1, OPC_MODRM, OPT_EA )
368 368
369 /* pentium pro */369 /* pentium pro */
370ALT(DEF_ASM_OP2(cmovo, 0x0f40, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))370ALT(DEF_ASM_OP2(cmovo, 0x0f40, 0, OPC_MODRM | OPC_TEST | OPC_WLQ, OPT_REGW | OPT_EA, OPT_REGW))
371ALT(DEF_ASM_OP2(cmovno, 0x0f41, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
372ALT(DEF_ASM_OP2(cmovc, 0x0f42, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
373ALT(DEF_ASM_OP2(cmovnc, 0x0f43, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
374ALT(DEF_ASM_OP2(cmovz, 0x0f44, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
375ALT(DEF_ASM_OP2(cmovnz, 0x0f45, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
376ALT(DEF_ASM_OP2(cmovna, 0x0f46, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
377ALT(DEF_ASM_OP2(cmova, 0x0f47, 0, OPC_MODRM | OPC_TEST, OPT_REG32 | OPT_EA, OPT_REG32))
378 371
379 DEF_ASM_OP2(fcmovb, 0xdac0, 0, OPC_REG, OPT_ST, OPT_ST0 )372 DEF_ASM_OP2(fcmovb, 0xdac0, 0, OPC_REG, OPT_ST, OPT_ST0 )
380 DEF_ASM_OP2(fcmove, 0xdac8, 0, OPC_REG, OPT_ST, OPT_ST0 )373 DEF_ASM_OP2(fcmove, 0xdac8, 0, OPC_REG, OPT_ST, OPT_ST0 )

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