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x86-64-asm: Fix ltr/str and push/pop operands

str accepts rm16/r32/r64, and push/pop defaults to 64 when given memory operands (to 32 on i386).

Michael Matz committed 10 years ago

Commit c0368601 parent 45b24c33 files · +12 −2Browse files

Unified · Split

3 files
  1. i386-asm.c +3 −0
  2. tests/asmtest.S +5 −0
  3. x86_64-asm.h +4 −2
i386-asm.c+3−0
@@ -869,6 +869,9 @@ ST_FUNC void asm_opcode(TCCState *s1, int opcode) · 868 unmodified lines
869 if ((opcode == TOK_ASM_push || opcode == TOK_ASM_pop) &&869 if ((opcode == TOK_ASM_push || opcode == TOK_ASM_pop) &&
870 (ops[0].type & (OP_SEG | OP_IM8S | OP_IM32)))870 (ops[0].type & (OP_SEG | OP_IM8S | OP_IM32)))
871 s = 2;871 s = 2;
872 else if ((opcode == TOK_ASM_push || opcode == TOK_ASM_pop) &&
873 (ops[0].type & OP_EA))
874 s = NBWLX - 2;
872 else875 else
873 tcc_error("cannot infer opcode suffix");876 tcc_error("cannot infer opcode suffix");
874 }877 }
tests/asmtest.S+5−0
@@ -125,6 +125,8 @@ notl %r15d · 124 unmodified lines
125 push %gs125 push %gs
126 push $1126 push $1
127 push $100127 push $100
128 push 0x42(%eax)
129 pop 0x43(%esi)
128 130
129#ifdef __i386__131#ifdef __i386__
130 popl %eax132 popl %eax
@@ -740,8 +742,11 @@ int $0x10 · 609 unmodified lines
740 lmsw 0x1000742 lmsw 0x1000
741 lsl 0x1000, %ecx743 lsl 0x1000, %ecx
742 ltr 0x1000744 ltr 0x1000
745 ltr %si
743 smsw 0x1000746 smsw 0x1000
744 str 0x1000747 str 0x1000
748 str %ecx
749 str %dx
745 750
746 verr 0x1000751 verr 0x1000
747 verw 0x1000752 verw 0x1000
x86_64-asm.h+4−2
@@ -367,14 +367,16 @@ ALT(DEF_ASM_OP2(larw, 0x0f02, 0, OPC_MODRM | OPC_WLX, OPT_REG | OPT_EA, OPT_REG) · 366 unmodified lines
367 DEF_ASM_OP1(lldt, 0x0f00, 2, OPC_MODRM, OPT_EA | OPT_REG)367 DEF_ASM_OP1(lldt, 0x0f00, 2, OPC_MODRM, OPT_EA | OPT_REG)
368 DEF_ASM_OP1(lmsw, 0x0f01, 6, OPC_MODRM, OPT_EA | OPT_REG)368 DEF_ASM_OP1(lmsw, 0x0f01, 6, OPC_MODRM, OPT_EA | OPT_REG)
369ALT(DEF_ASM_OP2(lslw, 0x0f03, 0, OPC_MODRM | OPC_WLX, OPT_EA | OPT_REG, OPT_REG))369ALT(DEF_ASM_OP2(lslw, 0x0f03, 0, OPC_MODRM | OPC_WLX, OPT_EA | OPT_REG, OPT_REG))
370 DEF_ASM_OP1(ltr, 0x0f00, 3, OPC_MODRM, OPT_EA | OPT_REG)370 DEF_ASM_OP1(ltr, 0x0f00, 3, OPC_MODRM, OPT_EA | OPT_REG16)
371 DEF_ASM_OP1(sgdt, 0x0f01, 0, OPC_MODRM, OPT_EA)371 DEF_ASM_OP1(sgdt, 0x0f01, 0, OPC_MODRM, OPT_EA)
372 DEF_ASM_OP1(sgdtq, 0x0f01, 0, OPC_MODRM, OPT_EA)372 DEF_ASM_OP1(sgdtq, 0x0f01, 0, OPC_MODRM, OPT_EA)
373 DEF_ASM_OP1(sidt, 0x0f01, 1, OPC_MODRM, OPT_EA)373 DEF_ASM_OP1(sidt, 0x0f01, 1, OPC_MODRM, OPT_EA)
374 DEF_ASM_OP1(sidtq, 0x0f01, 1, OPC_MODRM, OPT_EA)374 DEF_ASM_OP1(sidtq, 0x0f01, 1, OPC_MODRM, OPT_EA)
375 DEF_ASM_OP1(sldt, 0x0f00, 0, OPC_MODRM, OPT_REG | OPT_EA)375 DEF_ASM_OP1(sldt, 0x0f00, 0, OPC_MODRM, OPT_REG | OPT_EA)
376 DEF_ASM_OP1(smsw, 0x0f01, 4, OPC_MODRM, OPT_REG | OPT_EA)376 DEF_ASM_OP1(smsw, 0x0f01, 4, OPC_MODRM, OPT_REG | OPT_EA)
377 DEF_ASM_OP1(str, 0x0f00, 1, OPC_MODRM, OPT_REG16| OPT_EA)377 DEF_ASM_OP1(str, 0x0f00, 1, OPC_MODRM, OPT_REG32 | OPT_EA)
378ALT(DEF_ASM_OP1(str, 0x660f00, 1, OPC_MODRM, OPT_REG16))
379ALT(DEF_ASM_OP1(str, 0x480f00, 1, OPC_MODRM, OPT_REG64))
378 DEF_ASM_OP1(verr, 0x0f00, 4, OPC_MODRM, OPT_REG | OPT_EA)380 DEF_ASM_OP1(verr, 0x0f00, 4, OPC_MODRM, OPT_REG | OPT_EA)
379 DEF_ASM_OP1(verw, 0x0f00, 5, OPC_MODRM, OPT_REG | OPT_EA)381 DEF_ASM_OP1(verw, 0x0f00, 5, OPC_MODRM, OPT_REG | OPT_EA)
380 DEF_ASM_OP0L(swapgs, 0x0f01, 7, OPC_MODRM)382 DEF_ASM_OP0L(swapgs, 0x0f01, 7, OPC_MODRM)

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