riscv64-asm.c: asm_opcode: add return asm_parse_regvar: add abi register names riscv64-tok.h: add abi register names
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| @@ -643,6 +643,7 @@ ST_FUNC void asm_opcode(TCCState *s1, int token) · 642 unmodified lines | |||
| 643 | case TOK_ASM_sltu: | 643 | case TOK_ASM_sltu: |
| 644 | case TOK_ASM_sltiu: | 644 | case TOK_ASM_sltiu: |
| 645 | asm_data_processing_opcode(s1, token); | 645 | asm_data_processing_opcode(s1, token); |
| 646 | return; | ||
| 646 | 647 | ||
| 647 | case TOK_ASM_lb: | 648 | case TOK_ASM_lb: |
| 648 | case TOK_ASM_lh: | 649 | case TOK_ASM_lh: |
| @@ -712,9 +713,13 @@ ST_FUNC void asm_clobber(uint8_t *clobber_regs, const char *str) · 63 unmodified lines | |||
| 712 | ST_FUNC int asm_parse_regvar (int t) | 713 | ST_FUNC int asm_parse_regvar (int t) |
| 713 | { | 714 | { |
| 714 | if (t >= TOK_ASM_x0 && t <= TOK_ASM_pc) { /* register name */ | 715 | if (t >= TOK_ASM_x0 && t <= TOK_ASM_pc) { /* register name */ |
| 716 | if (t >= TOK_ASM_zero && t <= TOK_ASM_t6) | ||
| 717 | return t - TOK_ASM_zero; | ||
| 715 | switch (t) { | 718 | switch (t) { |
| 719 | case TOK_ASM_s0: | ||
| 720 | return 8; | ||
| 716 | case TOK_ASM_pc: | 721 | case TOK_ASM_pc: |
| 717 | return -1; // TODO: Figure out where it can be used after all | 722 | tcc_error("PC register not implemented."); |
| 718 | default: | 723 | default: |
| 719 | return t - TOK_ASM_x0; | 724 | return t - TOK_ASM_x0; |
| 720 | } | 725 | } |
| @@ -41,7 +41,6 @@ · 40 unmodified lines | |||
| 41 | /* register macros */ | 41 | /* register macros */ |
| 42 | 42 | ||
| 43 | DEF_ASM(zero) | 43 | DEF_ASM(zero) |
| 44 | /* | ||
| 45 | DEF_ASM(ra) | 44 | DEF_ASM(ra) |
| 46 | DEF_ASM(sp) | 45 | DEF_ASM(sp) |
| 47 | DEF_ASM(gp) | 46 | DEF_ASM(gp) |
| @@ -75,7 +74,6 @@ · 27 unmodified lines | |||
| 75 | DEF_ASM(t6) | 74 | DEF_ASM(t6) |
| 76 | 75 | ||
| 77 | DEF_ASM(s0) // = x8 | 76 | DEF_ASM(s0) // = x8 |
| 78 | */ | ||
| 79 | 77 | ||
| 80 | DEF_ASM(pc) | 78 | DEF_ASM(pc) |
| 81 | 79 | ||