History

i386: Fix various testsuite issues

on 32bit long long support was sometimes broken. This fixes code-gen for long long values in switches, disables a x86-64 specific testcase and avoid an undefined shift amount. It comments out a bitfield test involving long long bitfields > 32 bit; with GCC layout they can straddle multiple words and code generation isn't prepared for this.

Michael Matz committed 9 years ago

Commit cd9514a1 parent 3980e073 files · +64 −18Browse files

Unified · Split

3 files
  1. i386-gen.c +21 −8
  2. tests/tcctest.c +22 −2
  3. x86_64-gen.c +21 −8
i386-gen.c+21−8
@@ -694,14 +694,27 @@ ST_FUNC void gjmp_addr(int a) · 693 unmodified lines
694 694
695ST_FUNC void gtst_addr(int inv, int a)695ST_FUNC void gtst_addr(int inv, int a)
696{696{
697 inv ^= (vtop--)->c.i;697 int v = vtop->r & VT_VALMASK;
698 a -= ind + 2;698 if (v == VT_CMP) {
699 if (a == (char)a) {699 inv ^= (vtop--)->c.i;
700 g(inv - 32);700 a -= ind + 2;
701 g(a);701 if (a == (char)a) {
702 } else {702 g(inv - 32);
703 g(0x0f);703 g(a);
704 oad(inv - 16, a - 4);704 } else {
705 g(0x0f);
706 oad(inv - 16, a - 4);
707 }
708 } else if ((v & ~1) == VT_JMP) {
709 if ((v & 1) != inv) {
710 gjmp_addr(a);
711 gsym(vtop->c.i);
712 } else {
713 gsym(vtop->c.i);
714 o(0x05eb);
715 gjmp_addr(a);
716 }
717 vtop--;
705 }718 }
706}719}
707 720
tests/tcctest.c+22−2
@@ -610,7 +610,7 @@ struct S_enum { · 609 unmodified lines
610enum ELong {610enum ELong {
611 /* This is either 0 on L32 machines, or a large number611 /* This is either 0 on L32 machines, or a large number
612 on L64 machines. We should be able to store this. */612 on L64 machines. We should be able to store this. */
613 EL_large = (unsigned long)0xf000 << 32,613 EL_large = ((unsigned long)0xf000 << 31) << 1,
614};614};
615 615
616enum { BIASU = -1U<<31 };616enum { BIASU = -1U<<31 };
@@ -2028,6 +2028,11 @@ void bitfield_test(void) · 1411 unmodified lines
2028 else 2028 else
2029 printf("st1.f2 != -1\n");2029 printf("st1.f2 != -1\n");
2030 2030
2031#ifndef __i386__
2032 /* on i386 we don't correctly support long long bit-fields.
2033 The bitfields can straddle long long boundaries (at least with
2034 GCC bitfield layout) and code generation isn't prepared for this
2035 (would have to work with two words in that case). */
2031 /* bit sizes below must be bigger than 32 since GCC doesn't allow2036 /* bit sizes below must be bigger than 32 since GCC doesn't allow
2032 long-long bitfields whose size is not bigger than int */2037 long-long bitfields whose size is not bigger than int */
2033 struct sbf2 {2038 struct sbf2 {
@@ -2042,6 +2047,19 @@ void bitfield_test(void) · 8 unmodified lines
2042 st2.f3 = a;2047 st2.f3 = a;
2043 st2.f2++;2048 st2.f2++;
2044 printf("%lld %lld %lld\n", st2.f1, st2.f2, st2.f3);2049 printf("%lld %lld %lld\n", st2.f1, st2.f2, st2.f3);
2050#endif
2051#if 0
2052 Disabled for now until further clarification re GCC compatibility
2053 struct sbf3 {
2054 int f1 : 7;
2055 int f2 : 1;
2056 char f3;
2057 int f4 : 8;
2058 int f5 : 1;
2059 int f6 : 16;
2060 } st3;
2061 printf("sizeof(st3) = %d\n", sizeof(st3));
2062#endif
2045}2063}
2046 2064
2047#ifdef __x86_64__2065#ifdef __x86_64__
@@ -3100,7 +3118,7 @@ void other_constraints_test(void) · 1052 unmodified lines
3100{3118{
3101 unsigned long ret;3119 unsigned long ret;
3102 int var;3120 int var;
3103 __asm__ volatile ("movq %P1,%0" : "=r" (ret) : "p" (&var));3121 __asm__ volatile ("mov %P1,%0" : "=r" (ret) : "p" (&var));
3104 printf ("oc1: %d\n", ret == (unsigned long)&var);3122 printf ("oc1: %d\n", ret == (unsigned long)&var);
3105}3123}
3106 3124
@@ -3182,6 +3200,7 @@ void test_high_clobbers(void) · 75 unmodified lines
3182static long cpu_number;3200static long cpu_number;
3183void trace_console(long len, long len2)3201void trace_console(long len, long len2)
3184{3202{
3203#ifdef __x86_64__
3185 /* This generated invalid code when the emission of the switch3204 /* This generated invalid code when the emission of the switch
3186 table isn't disabled. The asms are necessary to show the bug,3205 table isn't disabled. The asms are necessary to show the bug,
3187 normal statements don't work (they need to generate some code3206 normal statements don't work (they need to generate some code
@@ -3228,6 +3247,7 @@ void trace_console(long len, long len2) · 40 unmodified lines
3228 {3247 {
3229 printf("huh?\n");3248 printf("huh?\n");
3230 }3249 }
3250#endif
3231}3251}
3232void asm_test(void)3252void asm_test(void)
3233{3253{
x86_64-gen.c+21−8
@@ -1721,14 +1721,27 @@ void gjmp_addr(int a) · 1720 unmodified lines
1721 1721
1722ST_FUNC void gtst_addr(int inv, int a)1722ST_FUNC void gtst_addr(int inv, int a)
1723{1723{
1724 inv ^= (vtop--)->c.i;1724 int v = vtop->r & VT_VALMASK;
1725 a -= ind + 2;1725 if (v == VT_CMP) {
1726 if (a == (char)a) {1726 inv ^= (vtop--)->c.i;
1727 g(inv - 32);1727 a -= ind + 2;
1728 g(a);1728 if (a == (char)a) {
1729 } else {1729 g(inv - 32);
1730 g(0x0f);1730 g(a);
1731 oad(inv - 16, a - 4);1731 } else {
1732 g(0x0f);
1733 oad(inv - 16, a - 4);
1734 }
1735 } else if ((v & ~1) == VT_JMP) {
1736 if ((v & 1) != inv) {
1737 gjmp_addr(a);
1738 gsym(vtop->c.i);
1739 } else {
1740 gsym(vtop->c.i);
1741 o(0x05eb);
1742 gjmp_addr(a);
1743 }
1744 vtop--;
1732 }1745 }
1733}1746}
1734 1747

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