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riscv64-asm.c: add jal/jalr

this implements the base instructions, not the pseudoinstructions examples jal ra, 0 jalr x0, ra, 0

noneofyourbusiness committed 3 years ago

Commit d1c10771 parent e70fec81 file · +13 −0Browse files

Unified · Split

riscv64-asm.c+13−0
@@ -111,6 +111,8 @@ typedef struct Operand { · 110 unmodified lines
111111 };
112112 } Operand;
113113
114+static void asm_emit_i(int token, uint32_t opcode, const Operand* rd, const Operand* rs1, const Operand* rs2);
115+
114116 /* Parse a text containing operand and store the result in OP */
115117 static void parse_operand(TCCState *s1, Operand *op)
116118 {
@@ -215,6 +217,9 @@ static void asm_binary_opcode(TCCState* s1, int token) · 98 unmodified lines
215217 case TOK_ASM_auipc:
216218 asm_emit_u(token, (0x05 << 2) | 3, &ops[0], &ops[1]);
217219 return;
220+ case TOK_ASM_jal:
221+ asm_emit_u(token, 0x6f, ops, ops + 1);
222+ return;
218223 default:
219224 expect("binary instruction");
220225 }
@@ -399,6 +404,12 @@ static void asm_data_processing_opcode(TCCState* s1, int token) · 178 unmodified lines
399404 case TOK_ASM_sltiu:
400405 asm_emit_i(token, (0x4 << 2) | 3 | (3 << 12), &ops[0], &ops[1], &ops[2]);
401406 return;
407+
408+ /* indirect jump (RD, RS1, IMM); I-format */
409+ case TOK_ASM_jalr:
410+ asm_emit_i(token, 0x67 | (0 << 12), ops, ops + 1, ops + 2);
411+ return;
412+
402413 default:
403414 expect("known data processing instruction");
404415 }
@@ -588,6 +599,7 @@ ST_FUNC void asm_opcode(TCCState *s1, int token) · 183 unmodified lines
588599
589600 case TOK_ASM_lui:
590601 case TOK_ASM_auipc:
602+ case TOK_ASM_jal:
591603 asm_binary_opcode(s1, token);
592604 return;
593605
@@ -628,6 +640,7 @@ ST_FUNC void asm_opcode(TCCState *s1, int token) · 34 unmodified lines
628640 case TOK_ASM_slti:
629641 case TOK_ASM_sltu:
630642 case TOK_ASM_sltiu:
643+ case TOK_ASM_jalr:
631644 asm_data_processing_opcode(s1, token);
632645 return;
633646

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