History

riscv: fix 72_long_long_constant

32bit signed constants larger than 0x7ffff800 were handled wrongly.

Michael Matz committed 7 years ago

Commit f64d4601 parent 5fcb8711 file · +4 −2Browse files

Unified · Split

riscv64-gen.c+4−2
@@ -189,7 +189,7 @@ ST_FUNC void load(int r, SValue *sv) · 188 unmodified lines
189189 tcc_error("unimp: load(non-local lval)");
190190 }
191191 } else if (v == VT_CONST) {
192− int rb = 0;
192+ int rb = 0, do32bit = 8;
193193 assert(!is_float(sv->type.t) && is_ireg(r));
194194 if (fr & VT_SYM) {
195195 static Sym label;
@@ -207,6 +207,7 @@ ST_FUNC void load(int r, SValue *sv) · 11 unmodified lines
207207 rb = rr;
208208 fc = 0;
209209 sv->c.i = 0;
210+ do32bit = 0;
210211 }
211212 if (is_float(sv->type.t))
212213 tcc_error("unimp: load(float)");
@@ -224,10 +225,11 @@ ST_FUNC void load(int r, SValue *sv) · 11 unmodified lines
224225 EI(0x13, 1, rr, rr, 8); // slli RR, RR, 8
225226 fc = (pi & 0x3ff) | (-((int)(pi & 0x200)));
226227 rb = rr;
228+ do32bit = 0;
227229 }
228230 if (((unsigned)fc + (1 << 11)) >> 12)
229231 o(0x37 | (rr << 7) | ((0x800 + fc) & 0xfffff000)), rb = rr; //lui RR, upper(fc)
230− EI(0x13, 0, rr, rb, fc << 20 >> 20); // addi R, x0|R, FC
232+ EI(0x13 | do32bit, 0, rr, rb, fc << 20 >> 20); // addi[w] R, x0|R, FC
231233 } else if (v == VT_LOCAL) {
232234 assert(is_ireg(r));
233235 if (((unsigned)fc + (1 << 11)) >> 12)

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