5894 lines · 85.2 KB · Text
RawDownload
# SPDX-License-Identifier: GPL-2.0-only## System register metadata # Each System register is described by a Sysreg block: # Sysreg 	<name>	<op0> 	<op1>	<crn>	<crm>	<op2># <field># ...# EndSysreg # Within a Sysreg block, each field can be described as one of: # Res0	<msb>[:<lsb>] # Res1	<msb>[:<lsb>] # Unkn	<msb>[:<lsb>] # Field	<msb>[:<lsb>]	<name> # Enum	<msb>[:<lsb>]	<name>#	<enumval>	<enumname>#	...# EndEnum # For VHE aliases (*_EL12, *_EL02) of system registers, a Mapping# entry describes the register the alias actually accesses: # Sysreg 	<name_EL12>	<op0> 	<op1>	<crn>	<crm>	<op2># Mapping	<name_EL1># EndSysreg # Where multiple system registers are not VHE aliases but share a# common layout, a SysregFields block can be used to describe the# shared layout: # SysregFields	<fieldsname># <field># ...# EndSysregFields # and referenced from within the Sysreg: # Sysreg 	<name>	<op0> 	<op1>	<crn>	<crm>	<op2># Fields	<fieldsname># EndSysreg # For ID registers we adopt a few conventions for translating the# language in the ARM into defines:## NI  - Not implemented# IMP - Implemented## In general it is recommended that new enumeration items be named for the# feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration# item ACCDATA) though it may be more tasteful to do something else. Sysreg	OSDTRRX_EL1	2	0	0	0	2Res0	63:32Field	31:0	DTRRXEndSysreg Sysreg	MDCCINT_EL1	2	0	0	2	0Res0	63:31Field	30	RXField	29	TXRes0	28:0EndSysreg Sysreg	MDSCR_EL1	2	0	0	2	2Res0	63:36Field	35	EHBWEField	34	EnSPMField	33	TTAField	32	EMBWEField	31	TFOField	30	RXfullField	29	TXfullRes0	28Field	27	RXOField	26	TXURes0	25:24Field	23:22	INTdisField	21	TDARes0	20Field	19	SC2Res0	18:16Field	15	MDEField	14	HDEField	13	KDEField	12	TDCCRes0	11:7Field	6	ERRRes0	5:1Field	0	SSEndSysreg Sysreg	OSDTRTX_EL1	2	0	0	3	2Res0	63:32Field	31:0	DTRTXEndSysreg Sysreg	MDSELR_EL1	2	0	0	4	2Res0	63:6Field	5:4	BANKRes0	3:0EndSysreg Sysreg	MDSTEPOP_EL1	2	0	0	5	2Res0	63:32Field	31:0	OPCODEEndSysreg Sysreg	OSECCR_EL1	2	0	0	6	2Res0	63:32Field	31:0	EDECCREndSysreg Sysreg	OSLAR_EL1	2	0	1	0	4Res0	63:1Field	0	OSLKEndSysreg Sysreg	SPMACCESSR_EL1	2	0	9	13	3UnsignedEnum	63:62	P31	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	61:60	P30	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	59:58	P29	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	57:56	P28	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	55:54	P27	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	53:52	P26	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	51:50	P25	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	49:48	P24	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	47:46	P23	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	45:44	P22	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	43:42	P21	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	41:40	P20	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	39:38	P19	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	37:36	P18	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	35:34	P17	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	33:32	P16	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	31:30	P15	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	29:28	P14	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	27:26	P13	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	25:24	P12	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	23:22	P11	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	21:20	P10	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	19:18	P9	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	17:16	P8	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	15:14	P7	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	13:12	P6	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	11:10	P5	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	9:8	P4	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	7:6	P3	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	5:4	P2	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	3:2	P1	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumUnsignedEnum	1:0	P0	0b00	TRAP_RW	0b01	TRAP_W	0b11	NOTRAPEndEnumEndSysreg Sysreg	SPMACCESSR_EL12	2	5	9	13	3Mapping	SPMACCESSR_EL1EndSysreg Sysreg	SPMIIDR_EL1	2	0	9	13	4Res0	63:32Field	31:20	ProductIDField	19:16	VariantField	15:12	RevisionField	11:0	ImplementerEndSysreg Sysreg	SPMDEVARCH_EL1	2	0	9	13	5Res0	63:32Field	31:21	ARCHITECTField	20	PRESENTField	19:16	REVISIONField	15:12	ARCHVERField	11:0	ARCHPARTEndSysreg Sysreg	SPMDEVAFF_EL1	2	0	9	13	6Res0	63:40Field	39:32	Aff3Field	31	F0VField	30	URes0	29:25Field	24	MTField	23:16	Aff2Field	15:8	Aff1Field	7:0	Aff0EndSysreg Sysreg	SPMCFGR_EL1	2	0	9	13	7Res0	63:32Field	31:28	NCGRes0	27:25Field	24	HDBGField	23	TROField	22	SSField	21	FZOField	20	MSIField	19	RAORes0	18Field	17	NAField	16	EXField	15:14	RAZField	13:8	SIZEField	7:0	NEndSysreg Sysreg	SPMINTENSET_EL1	2	0	9	14	1Field	63:0	PEndSysreg Sysreg	SPMINTENCLR_EL1	2	0	9	14	2Field	63:0	PEndSysreg Sysreg	PMCCNTSVR_EL1	2	0	14	11	7Field	63:0	CCNTEndSysreg Sysreg	PMICNTSVR_EL1	2	0	14	12	0Field	63:0	ICNTEndSysreg Sysreg	SPMCR_EL0	2	3	9	12	0Res0	63:12Field	11	TROField	10	HDBGField	9	FZOField	8	NARes0	7:5Field	4	EXRes0	3:2Field	1	PField	0	EEndSysreg Sysreg	SPMCNTENSET_EL0	2	3	9	12	1Field	63:0	PEndSysreg Sysreg	SPMCNTENCLR_EL0	2	3	9	12	2Field	63:0	PEndSysreg Sysreg	SPMOVSCLR_EL0	2	3	9	12	3Field	63:0	PEndSysreg Sysreg	SPMZR_EL0       2	3	9	12	4Field   63:0      PEndSysreg Sysreg	SPMSELR_EL0	2	3	9	12	5Res0	63:10Field	9:4	SYSPMUSELRes0	3:2Field	1:0	BANKEndSysreg Sysreg	SPMOVSSET_EL0	2	3	9	14	3Field	63:0	PEndSysreg Sysreg	SPMSCR_EL1	2	7	9	14	7Field	63:32	IMPDEFField	31	RAORes0	30:5Field	4	NAORes0	3:1Field	0	SOEndSysreg Sysreg ID_PFR0_EL1	3	0	0	1	0Res0	63:32UnsignedEnum	31:28	RAS	0b0000	NI	0b0001	RAS	0b0010	RASv1p1EndEnumUnsignedEnum	27:24	DIT	0b0000	NI	0b0001	IMPEndEnumUnsignedEnum	23:20	AMU	0b0000	NI	0b0001	AMUv1	0b0010	AMUv1p1EndEnumUnsignedEnum	19:16	CSV2	0b0000	UNDISCLOSED	0b0001	IMP	0b0010	CSV2p1EndEnumUnsignedEnum	15:12	State3	0b0000	NI	0b0001	IMPEndEnumEnum	11:8	State2	0b0000	NI	0b0001	NO_CV	0b0010	CVEndEnumUnsignedEnum	7:4	State1	0b0000	NI	0b0001	THUMB	0b0010	THUMB2EndEnumUnsignedEnum	3:0	State0	0b0000	NI	0b0001	IMPEndEnumEndSysreg Sysreg ID_PFR1_EL1	3	0	0	1	1Res0	63:32UnsignedEnum	31:28	GIC	0b0000	NI	0b0001	GICv3	0b0011	GICv4p1EndEnumUnsignedEnum	27:24	Virt_frac	0b0000	NI	0b0001	IMPEndEnumEnum	23:20	Sec_frac	0b0000	NI	0b0001	WALK_DISABLE	0b0010	SECURE_MEMORYEndEnumUnsignedEnum	19:16	GenTimer	0b0000	NI	0b0001	IMP	0b0010	ECVEndEnumUnsignedEnum	15:12	Virtualization	0b0000	NI	0b0001	IMPEndEnumUnsignedEnum	11:8	MProgMod	0b0000	NI	0b0001	IMPEndEnumEnum	7:4	Security	0b0000	NI	0b0001	EL3	0b0010	NSACR_RFREndEnumUnsignedEnum	3:0	ProgMod	0b0000	NI	0b0001	IMPEndEnumEndSysreg Sysreg ID_DFR0_EL1	3	0	0	1	2Res0	63:32UnsignedEnum	31:28	TraceFilt	0b0000	NI	0b0001	IMPEndEnumUnsignedEnum	27:24	PerfMon	0b0000	NI	0b0001	PMUv1	0b0010	PMUv2	0b0011	PMUv3	0b0100	PMUv3p1	0b0101	PMUv3p4	0b0110	PMUv3p5	0b0111	PMUv3p7	0b1000	PMUv3p8

Lines 1–500 of 5894.