/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 *//****************************************************************************** * * Name: actbl2.h - ACPI Table Definitions * * Copyright (C) 2000 - 2026, Intel Corp. * *****************************************************************************/ #ifndef __ACTBL2_H__#define __ACTBL2_H__ /******************************************************************************* * * Additional ACPI Tables (2) * * These tables are not consumed directly by the ACPICA subsystem, but are * included here to support device drivers and the AML disassembler. * ******************************************************************************/ /* * Values for description table header signatures for tables defined in this * file. Useful because they make it more difficult to inadvertently type in * the wrong signature. */#define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */#define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */#define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */#define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */#define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */#define ACPI_SIG_ERDT "ERDT" /* Enhanced Resource Director Technology */#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */#define ACPI_SIG_IOVT "IOVT" /* I/O Virtualization Table */#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */#define ACPI_SIG_KEYP "KEYP" /* Key Programming Interface for IDE */#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */#define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */#define ACPI_SIG_MRRM "MRRM" /* Memory Range and Region Mapping table */#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */#define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */#define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */#define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */#define ACPI_SIG_RASF "RASF" /* RAS Feature table */#define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */#define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */#define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */#define ACPI_SIG_RIMT "RIMT" /* RISC-V IO Mapping Table */#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */#define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */#define ACPI_SIG_SWFT "SWFT" /* SoundWire File Table */#define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ /* * All tables must be byte-packed to match the ACPI specification, since * the tables are provided by the system BIOS. */#pragma pack(1) /* * Note: C bitfields are not used for this reason: * * "Bitfields are great and easy to read, but unfortunately the C language * does not specify the layout of bitfields in memory, which means they are * essentially useless for dealing with packed data in on-disk formats or * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, * this decision was a design error in C. Ritchie could have picked an order * and stuck with it." Norman Ramsey. * See http://stackoverflow.com/a/1053662/41661 */ /******************************************************************************* * * AEST - Arm Error Source Table * * Conforms to: ACPI for the Armv8 RAS Extensions 1.1(Sep 2020) and * 2.0(May 2023) Platform Design Document. * ******************************************************************************/ struct acpi_table_aest { struct acpi_table_header header;}; /* Common Subtable header - one per Node Structure (Subtable) */ struct acpi_aest_hdr { u8 type; u16 length; u8 reserved; u32 node_specific_offset; u32 node_interface_offset; u32 node_interrupt_offset; u32 node_interrupt_count; u64 timestamp_rate; u64 reserved1; u64 error_injection_rate;}; /* Values for Type above */ #define ACPI_AEST_PROCESSOR_ERROR_NODE 0#define ACPI_AEST_MEMORY_ERROR_NODE 1#define ACPI_AEST_SMMU_ERROR_NODE 2#define ACPI_AEST_VENDOR_ERROR_NODE 3#define ACPI_AEST_GIC_ERROR_NODE 4#define ACPI_AEST_PCIE_ERROR_NODE 5#define ACPI_AEST_PROXY_ERROR_NODE 6#define ACPI_AEST_NODE_TYPE_RESERVED 7 /* 7 and above are reserved */ /* * AEST subtables (Error nodes) */ /* 0: Processor Error */ typedef struct acpi_aest_processor { u32 processor_id; u8 resource_type; u8 reserved; u8 flags; u8 revision; u64 processor_affinity; } acpi_aest_processor; /* Values for resource_type above, related structs below */ #define ACPI_AEST_CACHE_RESOURCE 0#define ACPI_AEST_TLB_RESOURCE 1#define ACPI_AEST_GENERIC_RESOURCE 2#define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ /* 0R: Processor Cache Resource Substructure */ typedef struct acpi_aest_processor_cache { u32 cache_reference; u32 reserved; } acpi_aest_processor_cache; /* Values for cache_type above */ #define ACPI_AEST_CACHE_DATA 0#define ACPI_AEST_CACHE_INSTRUCTION 1#define ACPI_AEST_CACHE_UNIFIED 2#define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ /* 1R: Processor TLB Resource Substructure */ typedef struct acpi_aest_processor_tlb { u32 tlb_level; u32 reserved; } acpi_aest_processor_tlb; /* 2R: Processor Generic Resource Substructure */ typedef struct acpi_aest_processor_generic { u32 resource; } acpi_aest_processor_generic; /* 1: Memory Error */ typedef struct acpi_aest_memory { u32 srat_proximity_domain; } acpi_aest_memory; /* 2: Smmu Error */ typedef struct acpi_aest_smmu { u32 iort_node_reference; u32 subcomponent_reference; } acpi_aest_smmu; /* 3: Vendor Defined */ typedef struct acpi_aest_vendor { u32 acpi_hid; u32 acpi_uid; u8 vendor_specific_data[16]; } acpi_aest_vendor; struct acpi_aest_vendor_v2 { char acpi_hid[8]; u32 acpi_uid; u8 vendor_specific_data[16];}; /* 4: Gic Error */ typedef struct acpi_aest_gic { u32 interface_type; u32 instance_id; } acpi_aest_gic; /* Values for interface_type above */ #define ACPI_AEST_GIC_CPU 0#define ACPI_AEST_GIC_DISTRIBUTOR 1#define ACPI_AEST_GIC_REDISTRIBUTOR 2#define ACPI_AEST_GIC_ITS 3#define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ /* 5: PCIe Error */ struct acpi_aest_pcie { u32 iort_node_reference;}; /* 6: Proxy Error */ struct acpi_aest_proxy { u64 node_address;}; /* Node Interface Structure */ typedef struct acpi_aest_node_interface { u8 type; u8 reserved[3]; u32 flags; u64 address; u32 error_record_index; u32 error_record_count; u64 error_record_implemented; u64 error_status_reporting; u64 addressing_mode; } acpi_aest_node_interface; /* Node Interface Structure V2 */ struct acpi_aest_node_interface_header { u8 type; u8 group_format; u8 reserved[2]; u32 flags; u64 address; u32 error_record_index; u32 error_record_count;}; #define ACPI_AEST_NODE_GROUP_FORMAT_4K 0#define ACPI_AEST_NODE_GROUP_FORMAT_16K 1#define ACPI_AEST_NODE_GROUP_FORMAT_64K 2 struct acpi_aest_node_interface_common { u32 error_node_device; u32 processor_affinity; u64 error_group_register_base; u64 fault_inject_register_base; u64 interrupt_config_register_base;}; struct acpi_aest_node_interface_4k { u64 error_record_implemented; u64 error_status_reporting; u64 addressing_mode; struct acpi_aest_node_interface_common common;}; struct acpi_aest_node_interface_16k { u64 error_record_implemented[4]; u64 error_status_reporting[4]; u64 addressing_mode[4]; struct acpi_aest_node_interface_common common;}; struct acpi_aest_node_interface_64k { u64 error_record_implemented[14]; u64 error_status_reporting[14]; u64 addressing_mode[14]; struct acpi_aest_node_interface_common common;}; /* Values for Type field above */ #define ACPI_AEST_NODE_SYSTEM_REGISTER 0#define ACPI_AEST_NODE_MEMORY_MAPPED 1#define ACPI_AEST_NODE_SINGLE_RECORD_MEMORY_MAPPED 2#define ACPI_AEST_XFACE_RESERVED 3 /* 2 and above are reserved */ /* Node Interrupt Structure */ typedef struct acpi_aest_node_interrupt { u8 type; u8 reserved[2]; u8 flags; u32 gsiv; u8 iort_id; u8 reserved1[3]; } acpi_aest_node_interrupt; /* Node Interrupt Structure V2 */ struct acpi_aest_node_interrupt_v2 { u8 type; u8 reserved[2]; u8 flags; u32 gsiv; u8 reserved1[4];}; /* Values for Type field above */ #define ACPI_AEST_NODE_FAULT_HANDLING 0#define ACPI_AEST_NODE_ERROR_RECOVERY 1#define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ /******************************************************************************* * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface * * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" * ARM DEN0093 v1.1 * ******************************************************************************/struct acpi_table_agdi { struct acpi_table_header header; /* Common ACPI table header */ u8 flags; u8 reserved[3]; u32 sdei_event; u32 gsiv;}; /* Mask for Flags field above */ #define ACPI_AGDI_SIGNALING_MODE (1) /******************************************************************************* * * APMT - ARM Performance Monitoring Unit Table * * Conforms to: * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document * ARM DEN0117 v1.0 November 25, 2021 * ******************************************************************************/ struct acpi_table_apmt { struct acpi_table_header header; /* Common ACPI table header */}; #define ACPI_APMT_NODE_ID_LENGTH 4 /* * APMT subtables */struct acpi_apmt_node { u16 length; u8 flags; u8 type; u32 id; u64 inst_primary; u32 inst_secondary; u64 base_address0; u64 base_address1; u32 ovflw_irq; u32 reserved; u32 ovflw_irq_flags; u32 proc_affinity; u32 impl_id;}; /* Masks for Flags field above */ #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0)#define ACPI_APMT_FLAGS_AFFINITY (1<<1)#define ACPI_APMT_FLAGS_ATOMIC (1<<2) /* Values for Flags dual page field above */ #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0)#define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) /* Values for Flags processor affinity field above */#define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1)#define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) /* Values for Flags 64-bit atomic field above */#define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2)#define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) /* Values for Type field above */ enum acpi_apmt_node_type { ACPI_APMT_NODE_TYPE_MC = 0x00, ACPI_APMT_NODE_TYPE_SMMU = 0x01, ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, ACPI_APMT_NODE_TYPE_ACPI = 0x03, ACPI_APMT_NODE_TYPE_CACHE = 0x04, ACPI_APMT_NODE_TYPE_COUNT}; /* Masks for ovflw_irq_flags field above */ #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0)#define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) /* Values for ovflw_irq_flags mode field above */ #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0)#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) /* Values for ovflw_irq_flags type field above */ #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) /******************************************************************************* * * BDAT - BIOS Data ACPI Table * * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 * Nov 2020 * ******************************************************************************/ struct acpi_table_bdat { struct acpi_table_header header; struct acpi_generic_address gas;}; /******************************************************************************* * * CCEL - CC-Event Log * From: "Guest-Host-Communication Interface (GHCI) for Intel * Trust Domain Extensions (Intel TDX)". Feb 2022 * ******************************************************************************/ struct acpi_table_ccel { struct acpi_table_header header; /* Common ACPI table header */ u8 CCtype; u8 Ccsub_type; u16 reserved; u64 log_area_minimum_length; u64 log_area_start_address;}; /******************************************************************************* * * ERDT - Enhanced Resource Director Technology (ERDT) table * * Conforms to "Intel Resource Director Technology Architecture Specification" * Version 1.1, January 2025 * ******************************************************************************/ struct acpi_table_erdt { struct acpi_table_header header; /* Common ACPI table header */ u32 max_clos; /* Maximum classes of service */ u8 reserved[24]; u8 erdt_substructures[];}; /* Values for subtable type in struct acpi_subtbl_hdr_16 */ enum acpi_erdt_type { ACPI_ERDT_TYPE_RMDD = 0, ACPI_ERDT_TYPE_CACD = 1, ACPI_ERDT_TYPE_DACD = 2, ACPI_ERDT_TYPE_CMRC = 3, ACPI_ERDT_TYPE_MMRC = 4, ACPI_ERDT_TYPE_MARC = 5, ACPI_ERDT_TYPE_CARC = 6, ACPI_ERDT_TYPE_CMRD = 7, ACPI_ERDT_TYPE_IBRD = 8, ACPI_ERDT_TYPE_IBAD = 9, ACPI_ERDT_TYPE_CARD = 10, ACPI_ERDT_TYPE_RESERVED = 11 /* 11 and above are reserved */}; /* * ERDT Subtables, correspond to Type in struct acpi_subtbl_hdr_16 */ /* 0: RMDD - Resource Management Domain Description */ struct acpi_erdt_rmdd { struct acpi_subtbl_hdr_16 header; u16 flags; u16 IO_l3_slices; /* Number of slices in IO cache */ u8 IO_l3_sets; /* Number of sets in IO cache */Lines 1–500 of 3708. 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/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ /****************************************************************************** * * Name: actbl2.h - ACPI Table Definitions * * Copyright (C) 2000 - 2026, Intel Corp. * *****************************************************************************/ #ifndef __ACTBL2_H__ #define __ACTBL2_H__ /******************************************************************************* * * Additional ACPI Tables (2) * * These tables are not consumed directly by the ACPICA subsystem, but are * included here to support device drivers and the AML disassembler. * ******************************************************************************/ /* * Values for description table header signatures for tables defined in this * file. Useful because they make it more difficult to inadvertently type in * the wrong signature. */ #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ #define ACPI_SIG_ERDT "ERDT" /* Enhanced Resource Director Technology */ #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ #define ACPI_SIG_IOVT "IOVT" /* I/O Virtualization Table */ #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ #define ACPI_SIG_KEYP "KEYP" /* Key Programming Interface for IDE */ #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */ #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ #define ACPI_SIG_MRRM "MRRM" /* Memory Range and Region Mapping table */ #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ #define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */ #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ #define ACPI_SIG_RIMT "RIMT" /* RISC-V IO Mapping Table */ #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ #define ACPI_SIG_SWFT "SWFT" /* SoundWire File Table */ #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ /* * All tables must be byte-packed to match the ACPI specification, since * the tables are provided by the system BIOS. */ #pragma pack(1) /* * Note: C bitfields are not used for this reason: * * "Bitfields are great and easy to read, but unfortunately the C language * does not specify the layout of bitfields in memory, which means they are * essentially useless for dealing with packed data in on-disk formats or * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, * this decision was a design error in C. Ritchie could have picked an order * and stuck with it." Norman Ramsey. * See http://stackoverflow.com/a/1053662/41661 */ /******************************************************************************* * * AEST - Arm Error Source Table * * Conforms to: ACPI for the Armv8 RAS Extensions 1.1(Sep 2020) and * 2.0(May 2023) Platform Design Document. * ******************************************************************************/ struct acpi_table_aest { struct acpi_table_header header; }; /* Common Subtable header - one per Node Structure (Subtable) */ struct acpi_aest_hdr { u8 type; u16 length; u8 reserved; u32 node_specific_offset; u32 node_interface_offset; u32 node_interrupt_offset; u32 node_interrupt_count; u64 timestamp_rate; u64 reserved1; u64 error_injection_rate; }; /* Values for Type above */ #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 #define ACPI_AEST_MEMORY_ERROR_NODE 1 #define ACPI_AEST_SMMU_ERROR_NODE 2 #define ACPI_AEST_VENDOR_ERROR_NODE 3 #define ACPI_AEST_GIC_ERROR_NODE 4 #define ACPI_AEST_PCIE_ERROR_NODE 5 #define ACPI_AEST_PROXY_ERROR_NODE 6 #define ACPI_AEST_NODE_TYPE_RESERVED 7 /* 7 and above are reserved */ /* * AEST subtables (Error nodes) */ /* 0: Processor Error */ typedef struct acpi_aest_processor { u32 processor_id; u8 resource_type; u8 reserved; u8 flags; u8 revision; u64 processor_affinity; } acpi_aest_processor; /* Values for resource_type above, related structs below */ #define ACPI_AEST_CACHE_RESOURCE 0 #define ACPI_AEST_TLB_RESOURCE 1 #define ACPI_AEST_GENERIC_RESOURCE 2 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ /* 0R: Processor Cache Resource Substructure */ typedef struct acpi_aest_processor_cache { u32 cache_reference; u32 reserved; } acpi_aest_processor_cache; /* Values for cache_type above */ #define ACPI_AEST_CACHE_DATA 0 #define ACPI_AEST_CACHE_INSTRUCTION 1 #define ACPI_AEST_CACHE_UNIFIED 2 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ /* 1R: Processor TLB Resource Substructure */ typedef struct acpi_aest_processor_tlb { u32 tlb_level; u32 reserved; } acpi_aest_processor_tlb; /* 2R: Processor Generic Resource Substructure */ typedef struct acpi_aest_processor_generic { u32 resource; } acpi_aest_processor_generic; /* 1: Memory Error */ typedef struct acpi_aest_memory { u32 srat_proximity_domain; } acpi_aest_memory; /* 2: Smmu Error */ typedef struct acpi_aest_smmu { u32 iort_node_reference; u32 subcomponent_reference; } acpi_aest_smmu; /* 3: Vendor Defined */ typedef struct acpi_aest_vendor { u32 acpi_hid; u32 acpi_uid; u8 vendor_specific_data[16]; } acpi_aest_vendor; struct acpi_aest_vendor_v2 { char acpi_hid[8]; u32 acpi_uid; u8 vendor_specific_data[16]; }; /* 4: Gic Error */ typedef struct acpi_aest_gic { u32 interface_type; u32 instance_id; } acpi_aest_gic; /* Values for interface_type above */ #define ACPI_AEST_GIC_CPU 0 #define ACPI_AEST_GIC_DISTRIBUTOR 1 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 #define ACPI_AEST_GIC_ITS 3 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ /* 5: PCIe Error */ struct acpi_aest_pcie { u32 iort_node_reference; }; /* 6: Proxy Error */ struct acpi_aest_proxy { u64 node_address; }; /* Node Interface Structure */ typedef struct acpi_aest_node_interface { u8 type; u8 reserved[3]; u32 flags; u64 address; u32 error_record_index; u32 error_record_count; u64 error_record_implemented; u64 error_status_reporting; u64 addressing_mode; } acpi_aest_node_interface; /* Node Interface Structure V2 */ struct acpi_aest_node_interface_header { u8 type; u8 group_format; u8 reserved[2]; u32 flags; u64 address; u32 error_record_index; u32 error_record_count; }; #define ACPI_AEST_NODE_GROUP_FORMAT_4K 0 #define ACPI_AEST_NODE_GROUP_FORMAT_16K 1 #define ACPI_AEST_NODE_GROUP_FORMAT_64K 2 struct acpi_aest_node_interface_common { u32 error_node_device; u32 processor_affinity; u64 error_group_register_base; u64 fault_inject_register_base; u64 interrupt_config_register_base; }; struct acpi_aest_node_interface_4k { u64 error_record_implemented; u64 error_status_reporting; u64 addressing_mode; struct acpi_aest_node_interface_common common; }; struct acpi_aest_node_interface_16k { u64 error_record_implemented[4]; u64 error_status_reporting[4]; u64 addressing_mode[4]; struct acpi_aest_node_interface_common common; }; struct acpi_aest_node_interface_64k { u64 error_record_implemented[14]; u64 error_status_reporting[14]; u64 addressing_mode[14]; struct acpi_aest_node_interface_common common; }; /* Values for Type field above */ #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 #define ACPI_AEST_NODE_SINGLE_RECORD_MEMORY_MAPPED 2 #define ACPI_AEST_XFACE_RESERVED 3 /* 2 and above are reserved */ /* Node Interrupt Structure */ typedef struct acpi_aest_node_interrupt { u8 type; u8 reserved[2]; u8 flags; u32 gsiv; u8 iort_id; u8 reserved1[3]; } acpi_aest_node_interrupt; /* Node Interrupt Structure V2 */ struct acpi_aest_node_interrupt_v2 { u8 type; u8 reserved[2]; u8 flags; u32 gsiv; u8 reserved1[4]; }; /* Values for Type field above */ #define ACPI_AEST_NODE_FAULT_HANDLING 0 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ /******************************************************************************* * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface * * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" * ARM DEN0093 v1.1 * ******************************************************************************/ struct acpi_table_agdi { struct acpi_table_header header; /* Common ACPI table header */ u8 flags; u8 reserved[3]; u32 sdei_event; u32 gsiv; }; /* Mask for Flags field above */ #define ACPI_AGDI_SIGNALING_MODE (1) /******************************************************************************* * * APMT - ARM Performance Monitoring Unit Table * * Conforms to: * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document * ARM DEN0117 v1.0 November 25, 2021 * ******************************************************************************/ struct acpi_table_apmt { struct acpi_table_header header; /* Common ACPI table header */ }; #define ACPI_APMT_NODE_ID_LENGTH 4 /* * APMT subtables */ struct acpi_apmt_node { u16 length; u8 flags; u8 type; u32 id; u64 inst_primary; u32 inst_secondary; u64 base_address0; u64 base_address1; u32 ovflw_irq; u32 reserved; u32 ovflw_irq_flags; u32 proc_affinity; u32 impl_id; }; /* Masks for Flags field above */ #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) #define ACPI_APMT_FLAGS_AFFINITY (1<<1) #define ACPI_APMT_FLAGS_ATOMIC (1<<2) /* Values for Flags dual page field above */ #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) /* Values for Flags processor affinity field above */ #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) /* Values for Flags 64-bit atomic field above */ #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) /* Values for Type field above */ enum acpi_apmt_node_type { ACPI_APMT_NODE_TYPE_MC = 0x00, ACPI_APMT_NODE_TYPE_SMMU = 0x01, ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, ACPI_APMT_NODE_TYPE_ACPI = 0x03, ACPI_APMT_NODE_TYPE_CACHE = 0x04, ACPI_APMT_NODE_TYPE_COUNT }; /* Masks for ovflw_irq_flags field above */ #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) /* Values for ovflw_irq_flags mode field above */ #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) /* Values for ovflw_irq_flags type field above */ #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) /******************************************************************************* * * BDAT - BIOS Data ACPI Table * * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 * Nov 2020 * ******************************************************************************/ struct acpi_table_bdat { struct acpi_table_header header; struct acpi_generic_address gas; }; /******************************************************************************* * * CCEL - CC-Event Log * From: "Guest-Host-Communication Interface (GHCI) for Intel * Trust Domain Extensions (Intel TDX)". Feb 2022 * ******************************************************************************/ struct acpi_table_ccel { struct acpi_table_header header; /* Common ACPI table header */ u8 CCtype; u8 Ccsub_type; u16 reserved; u64 log_area_minimum_length; u64 log_area_start_address; }; /******************************************************************************* * * ERDT - Enhanced Resource Director Technology (ERDT) table * * Conforms to "Intel Resource Director Technology Architecture Specification" * Version 1.1, January 2025 * ******************************************************************************/ struct acpi_table_erdt { struct acpi_table_header header; /* Common ACPI table header */ u32 max_clos; /* Maximum classes of service */ u8 reserved[24]; u8 erdt_substructures[]; }; /* Values for subtable type in struct acpi_subtbl_hdr_16 */ enum acpi_erdt_type { ACPI_ERDT_TYPE_RMDD = 0, ACPI_ERDT_TYPE_CACD = 1, ACPI_ERDT_TYPE_DACD = 2, ACPI_ERDT_TYPE_CMRC = 3, ACPI_ERDT_TYPE_MMRC = 4, ACPI_ERDT_TYPE_MARC = 5, ACPI_ERDT_TYPE_CARC = 6, ACPI_ERDT_TYPE_CMRD = 7, ACPI_ERDT_TYPE_IBRD = 8, ACPI_ERDT_TYPE_IBAD = 9, ACPI_ERDT_TYPE_CARD = 10, ACPI_ERDT_TYPE_RESERVED = 11 /* 11 and above are reserved */ }; /* * ERDT Subtables, correspond to Type in struct acpi_subtbl_hdr_16 */ /* 0: RMDD - Resource Management Domain Description */ struct acpi_erdt_rmdd { struct acpi_subtbl_hdr_16 header; u16 flags; u16 IO_l3_slices; /* Number of slices in IO cache */ u8 IO_l3_sets; /* Number of sets in IO cache */