/* * IA-64-specific support for kernel module loader. * * Copyright (C) 2003 Hewlett-Packard Co *	David Mosberger-Tang <davidm@hpl.hp.com> * * Loosely based on patch by Rusty Russell. */ /* relocs tested so far:    DIR64LSB   FPTR64LSB   GPREL22   LDXMOV   LDXMOV   LTOFF22   LTOFF22X   LTOFF22X   LTOFF_FPTR22   PCREL21B	(for br.call only; br.cond is not supported out of modules!)   PCREL60B	(for brl.cond only; brl.call is not supported for modules!)   PCREL64LSB   SECREL32LSB   SEGREL64LSB */  #include <linux/kernel.h>#include <linux/sched.h>#include <linux/elf.h>#include <linux/moduleloader.h>#include <linux/string.h>#include <linux/vmalloc.h> #include <asm/patch.h>#include <asm/unaligned.h> #define ARCH_MODULE_DEBUG 0 #if ARCH_MODULE_DEBUG# define DEBUGP printk# define inline#else# define DEBUGP(fmt , a...)#endif #ifdef CONFIG_ITANIUM# define USE_BRL	0#else# define USE_BRL	1#endif #define MAX_LTOFF	((uint64_t) (1 << 22))	/* max. allowable linkage-table offset */ /* Define some relocation helper macros/types: */ #define FORMAT_SHIFT	0#define FORMAT_BITS	3#define FORMAT_MASK	((1 << FORMAT_BITS) - 1)#define VALUE_SHIFT	3#define VALUE_BITS	5#define VALUE_MASK	((1 << VALUE_BITS) - 1) enum reloc_target_format {	/* direct encoded formats: */	RF_NONE = 0,	RF_INSN14 = 1,	RF_INSN22 = 2,	RF_INSN64 = 3,	RF_32MSB = 4,	RF_32LSB = 5,	RF_64MSB = 6,	RF_64LSB = 7, 	/* formats that cannot be directly decoded: */	RF_INSN60,	RF_INSN21B,	/* imm21 form 1 */	RF_INSN21M,	/* imm21 form 2 */	RF_INSN21F	/* imm21 form 3 */}; enum reloc_value_formula {	RV_DIRECT = 4,		/* S + A */	RV_GPREL = 5,		/* @gprel(S + A) */	RV_LTREL = 6,		/* @ltoff(S + A) */	RV_PLTREL = 7,		/* @pltoff(S + A) */	RV_FPTR = 8,		/* @fptr(S + A) */	RV_PCREL = 9,		/* S + A - P */	RV_LTREL_FPTR = 10,	/* @ltoff(@fptr(S + A)) */	RV_SEGREL = 11,		/* @segrel(S + A) */	RV_SECREL = 12,		/* @secrel(S + A) */	RV_BDREL = 13,		/* BD + A */	RV_LTV = 14,		/* S + A (like RV_DIRECT, except frozen at static link-time) */	RV_PCREL2 = 15,		/* S + A - P */	RV_SPECIAL = 16,	/* various (see below) */	RV_RSVD17 = 17,	RV_TPREL = 18,		/* @tprel(S + A) */	RV_LTREL_TPREL = 19,	/* @ltoff(@tprel(S + A)) */	RV_DTPMOD = 20,		/* @dtpmod(S + A) */	RV_LTREL_DTPMOD = 21,	/* @ltoff(@dtpmod(S + A)) */	RV_DTPREL = 22,		/* @dtprel(S + A) */	RV_LTREL_DTPREL = 23,	/* @ltoff(@dtprel(S + A)) */	RV_RSVD24 = 24,	RV_RSVD25 = 25,	RV_RSVD26 = 26,	RV_RSVD27 = 27	/* 28-31 reserved for implementation-specific purposes.  */}; #define N(reloc)	[R_IA64_##reloc] = #reloc static const char *reloc_name[256] = {	N(NONE),		N(IMM14),		N(IMM22),		N(IMM64),	N(DIR32MSB),		N(DIR32LSB),		N(DIR64MSB),		N(DIR64LSB),	N(GPREL22),		N(GPREL64I),		N(GPREL32MSB),		N(GPREL32LSB),	N(GPREL64MSB),		N(GPREL64LSB),		N(LTOFF22),		N(LTOFF64I),	N(PLTOFF22),		N(PLTOFF64I),		N(PLTOFF64MSB),		N(PLTOFF64LSB),	N(FPTR64I),		N(FPTR32MSB),		N(FPTR32LSB),		N(FPTR64MSB),	N(FPTR64LSB),		N(PCREL60B),		N(PCREL21B),		N(PCREL21M),	N(PCREL21F),		N(PCREL32MSB),		N(PCREL32LSB),		N(PCREL64MSB),	N(PCREL64LSB),		N(LTOFF_FPTR22),	N(LTOFF_FPTR64I),	N(LTOFF_FPTR32MSB),	N(LTOFF_FPTR32LSB),	N(LTOFF_FPTR64MSB),	N(LTOFF_FPTR64LSB),	N(SEGREL32MSB),	N(SEGREL32LSB),		N(SEGREL64MSB),		N(SEGREL64LSB),		N(SECREL32MSB),	N(SECREL32LSB),		N(SECREL64MSB),		N(SECREL64LSB),		N(REL32MSB),	N(REL32LSB),		N(REL64MSB),		N(REL64LSB),		N(LTV32MSB),	N(LTV32LSB),		N(LTV64MSB),		N(LTV64LSB),		N(PCREL21BI),	N(PCREL22),		N(PCREL64I),		N(IPLTMSB),		N(IPLTLSB),	N(COPY),		N(LTOFF22X),		N(LDXMOV),		N(TPREL14),	N(TPREL22),		N(TPREL64I),		N(TPREL64MSB),		N(TPREL64LSB),	N(LTOFF_TPREL22),	N(DTPMOD64MSB),		N(DTPMOD64LSB),		N(LTOFF_DTPMOD22),	N(DTPREL14),		N(DTPREL22),		N(DTPREL64I),		N(DTPREL32MSB),	N(DTPREL32LSB),		N(DTPREL64MSB),		N(DTPREL64LSB),		N(LTOFF_DTPREL22)}; #undef N struct got_entry {	uint64_t val;}; struct fdesc {	uint64_t ip;	uint64_t gp;}; /* Opaque struct for insns, to protect against derefs. */struct insn; static inline uint64_tbundle (const struct insn *insn){	return (uint64_t) insn & ~0xfUL;} static inline intslot (const struct insn *insn){	return (uint64_t) insn & 0x3;} static intapply_imm64 (struct module *mod, struct insn *insn, uint64_t val){	if (slot(insn) != 2) {		printk(KERN_ERR "%s: invalid slot number %d for IMM64\n",		       mod->name, slot(insn));		return 0;	}	ia64_patch_imm64((u64) insn, val);	return 1;} static intapply_imm60 (struct module *mod, struct insn *insn, uint64_t val){	if (slot(insn) != 2) {		printk(KERN_ERR "%s: invalid slot number %d for IMM60\n",		       mod->name, slot(insn));		return 0;	}	if (val + ((uint64_t) 1 << 59) >= (1UL << 60)) {		printk(KERN_ERR "%s: value %ld out of IMM60 range\n", mod->name, (int64_t) val);		return 0;	}	ia64_patch_imm60((u64) insn, val);	return 1;} static intapply_imm22 (struct module *mod, struct insn *insn, uint64_t val){	if (val + (1 << 21) >= (1 << 22)) {		printk(KERN_ERR "%s: value %li out of IMM22 range\n", mod->name, (int64_t)val);		return 0;	}	ia64_patch((u64) insn, 0x01fffcfe000UL, (  ((val & 0x200000UL) << 15) /* bit 21 -> 36 */					         | ((val & 0x1f0000UL) <<  6) /* bit 16 -> 22 */					         | ((val & 0x00ff80UL) << 20) /* bit  7 -> 27 */					         | ((val & 0x00007fUL) << 13) /* bit  0 -> 13 */));	return 1;} static intapply_imm21b (struct module *mod, struct insn *insn, uint64_t val){	if (val + (1 << 20) >= (1 << 21)) {		printk(KERN_ERR "%s: value %li out of IMM21b range\n", mod->name, (int64_t)val);		return 0;	}	ia64_patch((u64) insn, 0x11ffffe000UL, (  ((val & 0x100000UL) << 16) /* bit 20 -> 36 */					        | ((val & 0x0fffffUL) << 13) /* bit  0 -> 13 */));	return 1;} #if USE_BRL struct plt_entry {	/* Three instruction bundles in PLT. */ 	unsigned char bundle[2][16];}; static const struct plt_entry ia64_plt_template = {	{		{			0x04, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MLX] nop.m 0 */			0x00, 0x00, 0x00, 0x00, 0x00, 0x20, /*	     movl gp=TARGET_GP */			0x00, 0x00, 0x00, 0x60		},		{			0x05, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MLX] nop.m 0 */			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*	     brl.many gp=TARGET_GP */			0x08, 0x00, 0x00, 0xc0		}	}}; static intpatch_plt (struct module *mod, struct plt_entry *plt, long target_ip, unsigned long target_gp){	if (apply_imm64(mod, (struct insn *) (plt->bundle[0] + 2), target_gp)	    && apply_imm60(mod, (struct insn *) (plt->bundle[1] + 2),			   (target_ip - (int64_t) plt->bundle[1]) / 16))		return 1;	return 0;} unsigned longplt_target (struct plt_entry *plt){	uint64_t b0, b1, *b = (uint64_t *) plt->bundle[1];	long off; 	b0 = b[0]; b1 = b[1];	off = (  ((b1 & 0x00fffff000000000UL) >> 36)		/* imm20b -> bit 0 */	       | ((b0 >> 48) << 20) | ((b1 & 0x7fffffUL) << 36)	/* imm39 -> bit 20 */	       | ((b1 & 0x0800000000000000UL) << 0));		/* i -> bit 59 */	return (long) plt->bundle[1] + 16*off;} #else /* !USE_BRL */ struct plt_entry {	/* Three instruction bundles in PLT. */ 	unsigned char bundle[3][16];}; static const struct plt_entry ia64_plt_template = {	{		{			0x05, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MLX] nop.m 0 */			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*	     movl r16=TARGET_IP */			0x02, 0x00, 0x00, 0x60		},		{			0x04, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MLX] nop.m 0 */			0x00, 0x00, 0x00, 0x00, 0x00, 0x20, /*	     movl gp=TARGET_GP */			0x00, 0x00, 0x00, 0x60		},		{			0x11, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MIB] nop.m 0 */			0x60, 0x80, 0x04, 0x80, 0x03, 0x00, /*	     mov b6=r16 */			0x60, 0x00, 0x80, 0x00		    /*	     br.few b6 */		}	}}; static intpatch_plt (struct module *mod, struct plt_entry *plt, long target_ip, unsigned long target_gp){	if (apply_imm64(mod, (struct insn *) (plt->bundle[0] + 2), target_ip)	    && apply_imm64(mod, (struct insn *) (plt->bundle[1] + 2), target_gp))		return 1;	return 0;} unsigned longplt_target (struct plt_entry *plt){	uint64_t b0, b1, *b = (uint64_t *) plt->bundle[0]; 	b0 = b[0]; b1 = b[1];	return (  ((b1 & 0x000007f000000000) >> 36)		/* imm7b -> bit 0 */		| ((b1 & 0x07fc000000000000) >> 43)		/* imm9d -> bit 7 */		| ((b1 & 0x0003e00000000000) >> 29)		/* imm5c -> bit 16 */		| ((b1 & 0x0000100000000000) >> 23)		/* ic -> bit 21 */		| ((b0 >> 46) << 22) | ((b1 & 0x7fffff) << 40)	/* imm41 -> bit 22 */		| ((b1 & 0x0800000000000000) <<  4));		/* i -> bit 63 */} #endif /* !USE_BRL */ void *module_alloc (unsigned long size){	if (!size)		return NULL;	return vmalloc(size);} voidmodule_free (struct module *mod, void *module_region){	if (mod->arch.init_unw_table && module_region == mod->module_init) {		unw_remove_unwind_table(mod->arch.init_unw_table);		mod->arch.init_unw_table = NULL;	}	vfree(module_region);} /* Have we already seen one of these relocations? *//* FIXME: we could look in other sections, too --RR */static intduplicate_reloc (const Elf64_Rela *rela, unsigned int num){	unsigned int i; 	for (i = 0; i < num; i++) {		if (rela[i].r_info == rela[num].r_info && rela[i].r_addend == rela[num].r_addend)			return 1;	}	return 0;} /* Count how many GOT entries we may need */static unsigned intcount_gots (const Elf64_Rela *rela, unsigned int num){	unsigned int i, ret = 0; 	/* Sure, this is order(n^2), but it's usually short, and not           time critical */	for (i = 0; i < num; i++) {		switch (ELF64_R_TYPE(rela[i].r_info)) {		      case R_IA64_LTOFF22:		      case R_IA64_LTOFF22X:		      case R_IA64_LTOFF64I:		      case R_IA64_LTOFF_FPTR22:		      case R_IA64_LTOFF_FPTR64I:		      case R_IA64_LTOFF_FPTR32MSB:		      case R_IA64_LTOFF_FPTR32LSB:		      case R_IA64_LTOFF_FPTR64MSB:		      case R_IA64_LTOFF_FPTR64LSB:			if (!duplicate_reloc(rela, i))				ret++;			break;		}	}	return ret;} /* Count how many PLT entries we may need */static unsigned intcount_plts (const Elf64_Rela *rela, unsigned int num){	unsigned int i, ret = 0; 	/* Sure, this is order(n^2), but it's usually short, and not           time critical */	for (i = 0; i < num; i++) {		switch (ELF64_R_TYPE(rela[i].r_info)) {		      case R_IA64_PCREL21B:		      case R_IA64_PLTOFF22:		      case R_IA64_PLTOFF64I:		      case R_IA64_PLTOFF64MSB:		      case R_IA64_PLTOFF64LSB:		      case R_IA64_IPLTMSB:		      case R_IA64_IPLTLSB:			if (!duplicate_reloc(rela, i))				ret++;			break;		}	}	return ret;} /* We need to create an function-descriptors for any internal function   which is referenced. */static unsigned intcount_fdescs (const Elf64_Rela *rela, unsigned int num){	unsigned int i, ret = 0; 	/* Sure, this is order(n^2), but it's usually short, and not time critical.  */	for (i = 0; i < num; i++) {		switch (ELF64_R_TYPE(rela[i].r_info)) {		      case R_IA64_FPTR64I:		      case R_IA64_FPTR32LSB:		      case R_IA64_FPTR32MSB:		      case R_IA64_FPTR64LSB:		      case R_IA64_FPTR64MSB:		      case R_IA64_LTOFF_FPTR22:		      case R_IA64_LTOFF_FPTR32LSB:		      case R_IA64_LTOFF_FPTR32MSB:		      case R_IA64_LTOFF_FPTR64I:		      case R_IA64_LTOFF_FPTR64LSB:		      case R_IA64_LTOFF_FPTR64MSB:		      case R_IA64_IPLTMSB:		      case R_IA64_IPLTLSB:			/*			 * Jumps to static functions sometimes go straight to their			 * offset.  Of course, that may not be possible if the jump is			 * from init -> core or vice. versa, so we need to generate an			 * FDESC (and PLT etc) for that.			 */		      case R_IA64_PCREL21B:			if (!duplicate_reloc(rela, i))				ret++;			break;		}	}	return ret;} intmodule_frob_arch_sections (Elf_Ehdr *ehdr, Elf_Shdr *sechdrs, char *secstrings,			   struct module *mod){	unsigned long core_plts = 0, init_plts = 0, gots = 0, fdescs = 0;	Elf64_Shdr *s, *sechdrs_end = sechdrs + ehdr->e_shnum; 	/*	 * To store the PLTs and function-descriptors, we expand the .text section for	 * core module-code and the .init.text section for initialization code.	 */	for (s = sechdrs; s < sechdrs_end; ++s)		if (strcmp(".core.plt", secstrings + s->sh_name) == 0)			mod->arch.core_plt = s;		else if (strcmp(".init.plt", secstrings + s->sh_name) == 0)			mod->arch.init_plt = s;		else if (strcmp(".got", secstrings + s->sh_name) == 0)			mod->arch.got = s;		else if (strcmp(".opd", secstrings + s->sh_name) == 0)			mod->arch.opd = s;		else if (strcmp(".IA_64.unwind", secstrings + s->sh_name) == 0)			mod->arch.unwind = s; 	if (!mod->arch.core_plt || !mod->arch.init_plt || !mod->arch.got || !mod->arch.opd) {		printk(KERN_ERR "%s: sections missing\n", mod->name);		return -ENOEXEC;	} 	/* GOT and PLTs can occur in any relocated section... */	for (s = sechdrs + 1; s < sechdrs_end; ++s) {		const Elf64_Rela *rels = (void *)ehdr + s->sh_offset;		unsigned long numrels = s->sh_size/sizeof(Elf64_Rela); 		if (s->sh_type != SHT_RELA)			continue; 		gots += count_gots(rels, numrels);		fdescs += count_fdescs(rels, numrels);		if (strstr(secstrings + s->sh_name, ".init"))			init_plts += count_plts(rels, numrels);		else			core_plts += count_plts(rels, numrels);	} 	mod->arch.core_plt->sh_type = SHT_NOBITS;	mod->arch.core_plt->sh_flags = SHF_EXECINSTR | SHF_ALLOC;	mod->arch.core_plt->sh_addralign = 16;	mod->arch.core_plt->sh_size = core_plts * sizeof(struct plt_entry);	mod->arch.init_plt->sh_type = SHT_NOBITS;	mod->arch.init_plt->sh_flags = SHF_EXECINSTR | SHF_ALLOC;	mod->arch.init_plt->sh_addralign = 16;	mod->arch.init_plt->sh_size = init_plts * sizeof(struct plt_entry);	mod->arch.got->sh_type = SHT_NOBITS;	mod->arch.got->sh_flags = ARCH_SHF_SMALL | SHF_ALLOC;	mod->arch.got->sh_addralign = 8;	mod->arch.got->sh_size = gots * sizeof(struct got_entry);	mod->arch.opd->sh_type = SHT_NOBITS;	mod->arch.opd->sh_flags = SHF_ALLOC;	mod->arch.opd->sh_addralign = 8;	mod->arch.opd->sh_size = fdescs * sizeof(struct fdesc);	DEBUGP("%s: core.plt=%lx, init.plt=%lx, got=%lx, fdesc=%lx\n",	       __FUNCTION__, mod->arch.core_plt->sh_size, mod->arch.init_plt->sh_size,	       mod->arch.got->sh_size, mod->arch.opd->sh_size);	return 0;} 

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