/* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 1994 - 1999, 2000, 01, 06 Ralf Baechle * Copyright (C) 1995, 1996 Paul M. Antoine * Copyright (C) 1998 Ulf Carlsson * Copyright (C) 1999 Silicon Graphics, Inc. * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com * Copyright (C) 2000, 01 MIPS Technologies, Inc. * Copyright (C) 2002, 2003, 2004, 2005 Maciej W. Rozycki */#include <linux/init.h>#include <linux/mm.h>#include <linux/module.h>#include <linux/sched.h>#include <linux/smp.h>#include <linux/smp_lock.h>#include <linux/spinlock.h>#include <linux/kallsyms.h>#include <linux/bootmem.h>#include <linux/interrupt.h> #include <asm/bootinfo.h>#include <asm/branch.h>#include <asm/break.h>#include <asm/cpu.h>#include <asm/dsp.h>#include <asm/fpu.h>#include <asm/mipsregs.h>#include <asm/mipsmtregs.h>#include <asm/module.h>#include <asm/pgtable.h>#include <asm/ptrace.h>#include <asm/sections.h>#include <asm/system.h>#include <asm/tlbdebug.h>#include <asm/traps.h>#include <asm/uaccess.h>#include <asm/mmu_context.h>#include <asm/watch.h>#include <asm/types.h>#include <asm/stacktrace.h> extern asmlinkage void handle_int(void);extern asmlinkage void handle_tlbm(void);extern asmlinkage void handle_tlbl(void);extern asmlinkage void handle_tlbs(void);extern asmlinkage void handle_adel(void);extern asmlinkage void handle_ades(void);extern asmlinkage void handle_ibe(void);extern asmlinkage void handle_dbe(void);extern asmlinkage void handle_sys(void);extern asmlinkage void handle_bp(void);extern asmlinkage void handle_ri(void);extern asmlinkage void handle_ri_rdhwr_vivt(void);extern asmlinkage void handle_ri_rdhwr(void);extern asmlinkage void handle_cpu(void);extern asmlinkage void handle_ov(void);extern asmlinkage void handle_tr(void);extern asmlinkage void handle_fpe(void);extern asmlinkage void handle_mdmx(void);extern asmlinkage void handle_watch(void);extern asmlinkage void handle_mt(void);extern asmlinkage void handle_dsp(void);extern asmlinkage void handle_mcheck(void);extern asmlinkage void handle_reserved(void); extern int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx, int has_fpu); void (*board_be_init)(void);int (*board_be_handler)(struct pt_regs *regs, int is_fixup);void (*board_nmi_handler_setup)(void);void (*board_ejtag_handler_setup)(void);void (*board_bind_eic_interrupt)(int irq, int regset); static void show_raw_backtrace(unsigned long reg29){ unsigned long *sp = (unsigned long *)reg29; unsigned long addr; printk("Call Trace:");#ifdef CONFIG_KALLSYMS printk("\n");#endif while (!kstack_end(sp)) { addr = *sp++; if (__kernel_text_address(addr)) print_ip_sym(addr); } printk("\n");} #ifdef CONFIG_KALLSYMSint raw_show_trace;static int __init set_raw_show_trace(char *str){ raw_show_trace = 1; return 1;}__setup("raw_show_trace", set_raw_show_trace);#endif static void show_backtrace(struct task_struct *task, struct pt_regs *regs){ unsigned long sp = regs->regs[29]; unsigned long ra = regs->regs[31]; unsigned long pc = regs->cp0_epc; if (raw_show_trace || !__kernel_text_address(pc)) { show_raw_backtrace(sp); return; } printk("Call Trace:\n"); do { print_ip_sym(pc); pc = unwind_stack(task, &sp, pc, &ra); } while (pc); printk("\n");} /* * This routine abuses get_user()/put_user() to reference pointers * with at least a bit of error checking ... */static void show_stacktrace(struct task_struct *task, struct pt_regs *regs){ const int field = 2 * sizeof(unsigned long); long stackdata; int i; unsigned long *sp = (unsigned long *)regs->regs[29]; printk("Stack :"); i = 0; while ((unsigned long) sp & (PAGE_SIZE - 1)) { if (i && ((i % (64 / field)) == 0)) printk("\n "); if (i > 39) { printk(" ..."); break; } if (__get_user(stackdata, sp++)) { printk(" (Bad stack address)"); break; } printk(" %0*lx", field, stackdata); i++; } printk("\n"); show_backtrace(task, regs);} void show_stack(struct task_struct *task, unsigned long *sp){ struct pt_regs regs; if (sp) { regs.regs[29] = (unsigned long)sp; regs.regs[31] = 0; regs.cp0_epc = 0; } else { if (task && task != current) { regs.regs[29] = task->thread.reg29; regs.regs[31] = 0; regs.cp0_epc = task->thread.reg31; } else { prepare_frametrace(®s); } } show_stacktrace(task, ®s);} /* * The architecture-independent dump_stack generator */void dump_stack(void){ struct pt_regs regs; prepare_frametrace(®s); show_backtrace(current, ®s);} EXPORT_SYMBOL(dump_stack); void show_code(unsigned int *pc){ long i; printk("\nCode:"); for(i = -3 ; i < 6 ; i++) { unsigned int insn; if (__get_user(insn, pc + i)) { printk(" (Bad address in epc)\n"); break; } printk("%c%08x%c", (i?' ':'<'), insn, (i?' ':'>')); }} void show_regs(struct pt_regs *regs){ const int field = 2 * sizeof(unsigned long); unsigned int cause = regs->cp0_cause; int i; printk("Cpu %d\n", smp_processor_id()); /* * Saved main processor registers */ for (i = 0; i < 32; ) { if ((i % 4) == 0) printk("$%2d :", i); if (i == 0) printk(" %0*lx", field, 0UL); else if (i == 26 || i == 27) printk(" %*s", field, ""); else printk(" %0*lx", field, regs->regs[i]); i++; if ((i % 4) == 0) printk("\n"); } #ifdef CONFIG_CPU_HAS_SMARTMIPS printk("Acx : %0*lx\n", field, regs->acx);#endif printk("Hi : %0*lx\n", field, regs->hi); printk("Lo : %0*lx\n", field, regs->lo); /* * Saved cp0 registers */ printk("epc : %0*lx ", field, regs->cp0_epc); print_symbol("%s ", regs->cp0_epc); printk(" %s\n", print_tainted()); printk("ra : %0*lx ", field, regs->regs[31]); print_symbol("%s\n", regs->regs[31]); printk("Status: %08x ", (uint32_t) regs->cp0_status); if (current_cpu_data.isa_level == MIPS_CPU_ISA_I) { if (regs->cp0_status & ST0_KUO) printk("KUo "); if (regs->cp0_status & ST0_IEO) printk("IEo "); if (regs->cp0_status & ST0_KUP) printk("KUp "); if (regs->cp0_status & ST0_IEP) printk("IEp "); if (regs->cp0_status & ST0_KUC) printk("KUc "); if (regs->cp0_status & ST0_IEC) printk("IEc "); } else { if (regs->cp0_status & ST0_KX) printk("KX "); if (regs->cp0_status & ST0_SX) printk("SX "); if (regs->cp0_status & ST0_UX) printk("UX "); switch (regs->cp0_status & ST0_KSU) { case KSU_USER: printk("USER "); break; case KSU_SUPERVISOR: printk("SUPERVISOR "); break; case KSU_KERNEL: printk("KERNEL "); break; default: printk("BAD_MODE "); break; } if (regs->cp0_status & ST0_ERL) printk("ERL "); if (regs->cp0_status & ST0_EXL) printk("EXL "); if (regs->cp0_status & ST0_IE) printk("IE "); } printk("\n"); printk("Cause : %08x\n", cause); cause = (cause & CAUSEF_EXCCODE) >> CAUSEB_EXCCODE; if (1 <= cause && cause <= 5) printk("BadVA : %0*lx\n", field, regs->cp0_badvaddr); printk("PrId : %08x\n", read_c0_prid());} void show_registers(struct pt_regs *regs){ show_regs(regs); print_modules(); printk("Process %s (pid: %d, threadinfo=%p, task=%p)\n", current->comm, current->pid, current_thread_info(), current); show_stacktrace(current, regs); show_code((unsigned int *) regs->cp0_epc); printk("\n");} static DEFINE_SPINLOCK(die_lock); NORET_TYPE void ATTRIB_NORET die(const char * str, struct pt_regs * regs){ static int die_counter;#ifdef CONFIG_MIPS_MT_SMTC unsigned long dvpret = dvpe();#endif /* CONFIG_MIPS_MT_SMTC */ console_verbose(); spin_lock_irq(&die_lock); bust_spinlocks(1);#ifdef CONFIG_MIPS_MT_SMTC mips_mt_regdump(dvpret);#endif /* CONFIG_MIPS_MT_SMTC */ printk("%s[#%d]:\n", str, ++die_counter); show_registers(regs); spin_unlock_irq(&die_lock); if (in_interrupt()) panic("Fatal exception in interrupt"); if (panic_on_oops) { printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n"); ssleep(5); panic("Fatal exception"); } do_exit(SIGSEGV);} extern const struct exception_table_entry __start___dbe_table[];extern const struct exception_table_entry __stop___dbe_table[]; __asm__(" .section __dbe_table, \"a\"\n"" .previous \n"); /* Given an address, look for it in the exception tables. */static const struct exception_table_entry *search_dbe_tables(unsigned long addr){ const struct exception_table_entry *e; e = search_extable(__start___dbe_table, __stop___dbe_table - 1, addr); if (!e) e = search_module_dbetables(addr); return e;} asmlinkage void do_be(struct pt_regs *regs){ const int field = 2 * sizeof(unsigned long); const struct exception_table_entry *fixup = NULL; int data = regs->cp0_cause & 4; int action = MIPS_BE_FATAL; /* XXX For now. Fixme, this searches the wrong table ... */ if (data && !user_mode(regs)) fixup = search_dbe_tables(exception_epc(regs)); if (fixup) action = MIPS_BE_FIXUP; if (board_be_handler) action = board_be_handler(regs, fixup != 0); switch (action) { case MIPS_BE_DISCARD: return; case MIPS_BE_FIXUP: if (fixup) { regs->cp0_epc = fixup->nextinsn; return; } break; default: break; } /* * Assume it would be too dangerous to continue ... */ printk(KERN_ALERT "%s bus error, epc == %0*lx, ra == %0*lx\n", data ? "Data" : "Instruction", field, regs->cp0_epc, field, regs->regs[31]); die_if_kernel("Oops", regs); force_sig(SIGBUS, current);} /* * ll/sc emulation */ #define OPCODE 0xfc000000#define BASE 0x03e00000#define RT 0x001f0000#define OFFSET 0x0000ffff#define LL 0xc0000000#define SC 0xe0000000#define SPEC3 0x7c000000#define RD 0x0000f800#define FUNC 0x0000003f#define RDHWR 0x0000003b /* * The ll_bit is cleared by r*_switch.S */ unsigned long ll_bit; static struct task_struct *ll_task = NULL; static inline void simulate_ll(struct pt_regs *regs, unsigned int opcode){ unsigned long value, __user *vaddr; long offset; int signal = 0; /* * analyse the ll instruction that just caused a ri exception * and put the referenced address to addr. */ /* sign extend offset */ offset = opcode & OFFSET; offset <<= 16; offset >>= 16; vaddr = (unsigned long __user *) ((unsigned long)(regs->regs[(opcode & BASE) >> 21]) + offset); if ((unsigned long)vaddr & 3) { signal = SIGBUS; goto sig; } if (get_user(value, vaddr)) { signal = SIGSEGV; goto sig; } preempt_disable(); if (ll_task == NULL || ll_task == current) { ll_bit = 1; } else { ll_bit = 0; } ll_task = current; preempt_enable(); compute_return_epc(regs); regs->regs[(opcode & RT) >> 16] = value; return; sig: force_sig(signal, current);} static inline void simulate_sc(struct pt_regs *regs, unsigned int opcode){ unsigned long __user *vaddr; unsigned long reg; long offset; int signal = 0; /* * analyse the sc instruction that just caused a ri exception * and put the referenced address to addr. */ /* sign extend offset */ offset = opcode & OFFSET; offset <<= 16; offset >>= 16; vaddr = (unsigned long __user *) ((unsigned long)(regs->regs[(opcode & BASE) >> 21]) + offset); reg = (opcode & RT) >> 16; if ((unsigned long)vaddr & 3) { signal = SIGBUS; goto sig; } preempt_disable(); Lines 1–500 of 1553. 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/* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 1994 - 1999, 2000, 01, 06 Ralf Baechle * Copyright (C) 1995, 1996 Paul M. Antoine * Copyright (C) 1998 Ulf Carlsson * Copyright (C) 1999 Silicon Graphics, Inc. * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com * Copyright (C) 2000, 01 MIPS Technologies, Inc. * Copyright (C) 2002, 2003, 2004, 2005 Maciej W. Rozycki */ #include <linux/init.h> #include <linux/mm.h> #include <linux/module.h> #include <linux/sched.h> #include <linux/smp.h> #include <linux/smp_lock.h> #include <linux/spinlock.h> #include <linux/kallsyms.h> #include <linux/bootmem.h> #include <linux/interrupt.h> #include <asm/bootinfo.h> #include <asm/branch.h> #include <asm/break.h> #include <asm/cpu.h> #include <asm/dsp.h> #include <asm/fpu.h> #include <asm/mipsregs.h> #include <asm/mipsmtregs.h> #include <asm/module.h> #include <asm/pgtable.h> #include <asm/ptrace.h> #include <asm/sections.h> #include <asm/system.h> #include <asm/tlbdebug.h> #include <asm/traps.h> #include <asm/uaccess.h> #include <asm/mmu_context.h> #include <asm/watch.h> #include <asm/types.h> #include <asm/stacktrace.h> extern asmlinkage void handle_int(void); extern asmlinkage void handle_tlbm(void); extern asmlinkage void handle_tlbl(void); extern asmlinkage void handle_tlbs(void); extern asmlinkage void handle_adel(void); extern asmlinkage void handle_ades(void); extern asmlinkage void handle_ibe(void); extern asmlinkage void handle_dbe(void); extern asmlinkage void handle_sys(void); extern asmlinkage void handle_bp(void); extern asmlinkage void handle_ri(void); extern asmlinkage void handle_ri_rdhwr_vivt(void); extern asmlinkage void handle_ri_rdhwr(void); extern asmlinkage void handle_cpu(void); extern asmlinkage void handle_ov(void); extern asmlinkage void handle_tr(void); extern asmlinkage void handle_fpe(void); extern asmlinkage void handle_mdmx(void); extern asmlinkage void handle_watch(void); extern asmlinkage void handle_mt(void); extern asmlinkage void handle_dsp(void); extern asmlinkage void handle_mcheck(void); extern asmlinkage void handle_reserved(void); extern int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx, int has_fpu); void (*board_be_init)(void); int (*board_be_handler)(struct pt_regs *regs, int is_fixup); void (*board_nmi_handler_setup)(void); void (*board_ejtag_handler_setup)(void); void (*board_bind_eic_interrupt)(int irq, int regset); static void show_raw_backtrace(unsigned long reg29) { unsigned long *sp = (unsigned long *)reg29; unsigned long addr; printk("Call Trace:"); #ifdef CONFIG_KALLSYMS printk("\n"); #endif while (!kstack_end(sp)) { addr = *sp++; if (__kernel_text_address(addr)) print_ip_sym(addr); } printk("\n"); } #ifdef CONFIG_KALLSYMS int raw_show_trace; static int __init set_raw_show_trace(char *str) { raw_show_trace = 1; return 1; } __setup("raw_show_trace", set_raw_show_trace); #endif static void show_backtrace(struct task_struct *task, struct pt_regs *regs) { unsigned long sp = regs->regs[29]; unsigned long ra = regs->regs[31]; unsigned long pc = regs->cp0_epc; if (raw_show_trace || !__kernel_text_address(pc)) { show_raw_backtrace(sp); return; } printk("Call Trace:\n"); do { print_ip_sym(pc); pc = unwind_stack(task, &sp, pc, &ra); } while (pc); printk("\n"); } /* * This routine abuses get_user()/put_user() to reference pointers * with at least a bit of error checking ... */ static void show_stacktrace(struct task_struct *task, struct pt_regs *regs) { const int field = 2 * sizeof(unsigned long); long stackdata; int i; unsigned long *sp = (unsigned long *)regs->regs[29]; printk("Stack :"); i = 0; while ((unsigned long) sp & (PAGE_SIZE - 1)) { if (i && ((i % (64 / field)) == 0)) printk("\n "); if (i > 39) { printk(" ..."); break; } if (__get_user(stackdata, sp++)) { printk(" (Bad stack address)"); break; } printk(" %0*lx", field, stackdata); i++; } printk("\n"); show_backtrace(task, regs); } void show_stack(struct task_struct *task, unsigned long *sp) { struct pt_regs regs; if (sp) { regs.regs[29] = (unsigned long)sp; regs.regs[31] = 0; regs.cp0_epc = 0; } else { if (task && task != current) { regs.regs[29] = task->thread.reg29; regs.regs[31] = 0; regs.cp0_epc = task->thread.reg31; } else { prepare_frametrace(®s); } } show_stacktrace(task, ®s); } /* * The architecture-independent dump_stack generator */ void dump_stack(void) { struct pt_regs regs; prepare_frametrace(®s); show_backtrace(current, ®s); } EXPORT_SYMBOL(dump_stack); void show_code(unsigned int *pc) { long i; printk("\nCode:"); for(i = -3 ; i < 6 ; i++) { unsigned int insn; if (__get_user(insn, pc + i)) { printk(" (Bad address in epc)\n"); break; } printk("%c%08x%c", (i?' ':'<'), insn, (i?' ':'>')); } } void show_regs(struct pt_regs *regs) { const int field = 2 * sizeof(unsigned long); unsigned int cause = regs->cp0_cause; int i; printk("Cpu %d\n", smp_processor_id()); /* * Saved main processor registers */ for (i = 0; i < 32; ) { if ((i % 4) == 0) printk("$%2d :", i); if (i == 0) printk(" %0*lx", field, 0UL); else if (i == 26 || i == 27) printk(" %*s", field, ""); else printk(" %0*lx", field, regs->regs[i]); i++; if ((i % 4) == 0) printk("\n"); } #ifdef CONFIG_CPU_HAS_SMARTMIPS printk("Acx : %0*lx\n", field, regs->acx); #endif printk("Hi : %0*lx\n", field, regs->hi); printk("Lo : %0*lx\n", field, regs->lo); /* * Saved cp0 registers */ printk("epc : %0*lx ", field, regs->cp0_epc); print_symbol("%s ", regs->cp0_epc); printk(" %s\n", print_tainted()); printk("ra : %0*lx ", field, regs->regs[31]); print_symbol("%s\n", regs->regs[31]); printk("Status: %08x ", (uint32_t) regs->cp0_status); if (current_cpu_data.isa_level == MIPS_CPU_ISA_I) { if (regs->cp0_status & ST0_KUO) printk("KUo "); if (regs->cp0_status & ST0_IEO) printk("IEo "); if (regs->cp0_status & ST0_KUP) printk("KUp "); if (regs->cp0_status & ST0_IEP) printk("IEp "); if (regs->cp0_status & ST0_KUC) printk("KUc "); if (regs->cp0_status & ST0_IEC) printk("IEc "); } else { if (regs->cp0_status & ST0_KX) printk("KX "); if (regs->cp0_status & ST0_SX) printk("SX "); if (regs->cp0_status & ST0_UX) printk("UX "); switch (regs->cp0_status & ST0_KSU) { case KSU_USER: printk("USER "); break; case KSU_SUPERVISOR: printk("SUPERVISOR "); break; case KSU_KERNEL: printk("KERNEL "); break; default: printk("BAD_MODE "); break; } if (regs->cp0_status & ST0_ERL) printk("ERL "); if (regs->cp0_status & ST0_EXL) printk("EXL "); if (regs->cp0_status & ST0_IE) printk("IE "); } printk("\n"); printk("Cause : %08x\n", cause); cause = (cause & CAUSEF_EXCCODE) >> CAUSEB_EXCCODE; if (1 <= cause && cause <= 5) printk("BadVA : %0*lx\n", field, regs->cp0_badvaddr); printk("PrId : %08x\n", read_c0_prid()); } void show_registers(struct pt_regs *regs) { show_regs(regs); print_modules(); printk("Process %s (pid: %d, threadinfo=%p, task=%p)\n", current->comm, current->pid, current_thread_info(), current); show_stacktrace(current, regs); show_code((unsigned int *) regs->cp0_epc); printk("\n"); } static DEFINE_SPINLOCK(die_lock); NORET_TYPE void ATTRIB_NORET die(const char * str, struct pt_regs * regs) { static int die_counter; #ifdef CONFIG_MIPS_MT_SMTC unsigned long dvpret = dvpe(); #endif /* CONFIG_MIPS_MT_SMTC */ console_verbose(); spin_lock_irq(&die_lock); bust_spinlocks(1); #ifdef CONFIG_MIPS_MT_SMTC mips_mt_regdump(dvpret); #endif /* CONFIG_MIPS_MT_SMTC */ printk("%s[#%d]:\n", str, ++die_counter); show_registers(regs); spin_unlock_irq(&die_lock); if (in_interrupt()) panic("Fatal exception in interrupt"); if (panic_on_oops) { printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n"); ssleep(5); panic("Fatal exception"); } do_exit(SIGSEGV); } extern const struct exception_table_entry __start___dbe_table[]; extern const struct exception_table_entry __stop___dbe_table[]; __asm__( " .section __dbe_table, \"a\"\n" " .previous \n"); /* Given an address, look for it in the exception tables. */ static const struct exception_table_entry *search_dbe_tables(unsigned long addr) { const struct exception_table_entry *e; e = search_extable(__start___dbe_table, __stop___dbe_table - 1, addr); if (!e) e = search_module_dbetables(addr); return e; } asmlinkage void do_be(struct pt_regs *regs) { const int field = 2 * sizeof(unsigned long); const struct exception_table_entry *fixup = NULL; int data = regs->cp0_cause & 4; int action = MIPS_BE_FATAL; /* XXX For now. Fixme, this searches the wrong table ... */ if (data && !user_mode(regs)) fixup = search_dbe_tables(exception_epc(regs)); if (fixup) action = MIPS_BE_FIXUP; if (board_be_handler) action = board_be_handler(regs, fixup != 0); switch (action) { case MIPS_BE_DISCARD: return; case MIPS_BE_FIXUP: if (fixup) { regs->cp0_epc = fixup->nextinsn; return; } break; default: break; } /* * Assume it would be too dangerous to continue ... */ printk(KERN_ALERT "%s bus error, epc == %0*lx, ra == %0*lx\n", data ? "Data" : "Instruction", field, regs->cp0_epc, field, regs->regs[31]); die_if_kernel("Oops", regs); force_sig(SIGBUS, current); } /* * ll/sc emulation */ #define OPCODE 0xfc000000 #define BASE 0x03e00000 #define RT 0x001f0000 #define OFFSET 0x0000ffff #define LL 0xc0000000 #define SC 0xe0000000 #define SPEC3 0x7c000000 #define RD 0x0000f800 #define FUNC 0x0000003f #define RDHWR 0x0000003b /* * The ll_bit is cleared by r*_switch.S */ unsigned long ll_bit; static struct task_struct *ll_task = NULL; static inline void simulate_ll(struct pt_regs *regs, unsigned int opcode) { unsigned long value, __user *vaddr; long offset; int signal = 0; /* * analyse the ll instruction that just caused a ri exception * and put the referenced address to addr. */ /* sign extend offset */ offset = opcode & OFFSET; offset <<= 16; offset >>= 16; vaddr = (unsigned long __user *) ((unsigned long)(regs->regs[(opcode & BASE) >> 21]) + offset); if ((unsigned long)vaddr & 3) { signal = SIGBUS; goto sig; } if (get_user(value, vaddr)) { signal = SIGSEGV; goto sig; } preempt_disable(); if (ll_task == NULL || ll_task == current) { ll_bit = 1; } else { ll_bit = 0; } ll_task = current; preempt_enable(); compute_return_epc(regs); regs->regs[(opcode & RT) >> 16] = value; return; sig: force_sig(signal, current); } static inline void simulate_sc(struct pt_regs *regs, unsigned int opcode) { unsigned long __user *vaddr; unsigned long reg; long offset; int signal = 0; /* * analyse the sc instruction that just caused a ri exception * and put the referenced address to addr. */ /* sign extend offset */ offset = opcode & OFFSET; offset <<= 16; offset >>= 16; vaddr = (unsigned long __user *) ((unsigned long)(regs->regs[(opcode & BASE) >> 21]) + offset); reg = (opcode & RT) >> 16; if ((unsigned long)vaddr & 3) { signal = SIGBUS; goto sig; } preempt_disable();