/* * Timer device implementation for SGI SN platforms. * * This file is subject to the terms and conditions of the GNU General Public * License.  See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (c) 2001-2006 Silicon Graphics, Inc.  All rights reserved. * * This driver exports an API that should be supportable by any HPET or IA-PC * multimedia timer.  The code below is currently specific to the SGI Altix * SHub RTC, however. * * 11/01/01 - jbarnes - initial revision * 9/10/04 - Christoph Lameter - remove interrupt support for kernel inclusion * 10/1/04 - Christoph Lameter - provide posix clock CLOCK_SGI_CYCLE * 10/13/04 - Christoph Lameter, Dimitri Sivanich - provide timer interrupt *		support via the posix timer interface */ #include <linux/types.h>#include <linux/kernel.h>#include <linux/ioctl.h>#include <linux/module.h>#include <linux/init.h>#include <linux/errno.h>#include <linux/mm.h>#include <linux/mmtimer.h>#include <linux/miscdevice.h>#include <linux/posix-timers.h>#include <linux/interrupt.h> #include <asm/uaccess.h>#include <asm/sn/addrs.h>#include <asm/sn/intr.h>#include <asm/sn/shub_mmr.h>#include <asm/sn/nodepda.h>#include <asm/sn/shubio.h> MODULE_AUTHOR("Jesse Barnes <jbarnes@sgi.com>");MODULE_DESCRIPTION("SGI Altix RTC Timer");MODULE_LICENSE("GPL"); /* name of the device, usually in /dev */#define MMTIMER_NAME "mmtimer"#define MMTIMER_DESC "SGI Altix RTC Timer"#define MMTIMER_VERSION "2.1" #define RTC_BITS 55 /* 55 bits for this implementation */ extern unsigned long sn_rtc_cycles_per_second; #define RTC_COUNTER_ADDR        ((long *)LOCAL_MMR_ADDR(SH_RTC)) #define rtc_time()              (*RTC_COUNTER_ADDR) static int mmtimer_ioctl(struct inode *inode, struct file *file,			 unsigned int cmd, unsigned long arg);static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma); /* * Period in femtoseconds (10^-15 s) */static unsigned long mmtimer_femtoperiod = 0; static const struct file_operations mmtimer_fops = {	.owner =	THIS_MODULE,	.mmap =		mmtimer_mmap,	.ioctl =	mmtimer_ioctl,}; /* * We only have comparison registers RTC1-4 currently available per * node.  RTC0 is used by SAL. */#define NUM_COMPARATORS 3/* Check for an RTC interrupt pending */static int inline mmtimer_int_pending(int comparator){	if (HUB_L((unsigned long *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)) &			SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator)		return 1;	else		return 0;}/* Clear the RTC interrupt pending bit */static void inline mmtimer_clr_int_pending(int comparator){	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS),		SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator);} /* Setup timer on comparator RTC1 */static void inline mmtimer_setup_int_0(u64 expires){	u64 val; 	/* Disable interrupt */	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 0UL); 	/* Initialize comparator value */	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), -1L); 	/* Clear pending bit */	mmtimer_clr_int_pending(0); 	val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC1_INT_CONFIG_IDX_SHFT) |		((u64)cpu_physical_id(smp_processor_id()) <<			SH_RTC1_INT_CONFIG_PID_SHFT); 	/* Set configuration */	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_CONFIG), val); 	/* Enable RTC interrupts */	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 1UL); 	/* Initialize comparator value */	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), expires);  } /* Setup timer on comparator RTC2 */static void inline mmtimer_setup_int_1(u64 expires){	u64 val; 	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 0UL); 	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), -1L); 	mmtimer_clr_int_pending(1); 	val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC2_INT_CONFIG_IDX_SHFT) |		((u64)cpu_physical_id(smp_processor_id()) <<			SH_RTC2_INT_CONFIG_PID_SHFT); 	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_CONFIG), val); 	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 1UL); 	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), expires);} /* Setup timer on comparator RTC3 */static void inline mmtimer_setup_int_2(u64 expires){	u64 val; 	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 0UL); 	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), -1L); 	mmtimer_clr_int_pending(2); 	val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC3_INT_CONFIG_IDX_SHFT) |		((u64)cpu_physical_id(smp_processor_id()) <<			SH_RTC3_INT_CONFIG_PID_SHFT); 	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_CONFIG), val); 	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 1UL); 	HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), expires);} /* * This function must be called with interrupts disabled and preemption off * in order to insure that the setup succeeds in a deterministic time frame. * It will check if the interrupt setup succeeded. */static int inline mmtimer_setup(int comparator, unsigned long expires){ 	switch (comparator) {	case 0:		mmtimer_setup_int_0(expires);		break;	case 1:		mmtimer_setup_int_1(expires);		break;	case 2:		mmtimer_setup_int_2(expires);		break;	}	/* We might've missed our expiration time */	if (rtc_time() < expires)		return 1; 	/*	 * If an interrupt is already pending then its okay	 * if not then we failed	 */	return mmtimer_int_pending(comparator);} static int inline mmtimer_disable_int(long nasid, int comparator){	switch (comparator) {	case 0:		nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE),			0UL) : REMOTE_HUB_S(nasid, SH_RTC1_INT_ENABLE, 0UL);		break;	case 1:		nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE),			0UL) : REMOTE_HUB_S(nasid, SH_RTC2_INT_ENABLE, 0UL);		break;	case 2:		nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE),			0UL) : REMOTE_HUB_S(nasid, SH_RTC3_INT_ENABLE, 0UL);		break;	default:		return -EFAULT;	}	return 0;} #define TIMER_OFF 0xbadcabLL /* There is one of these for each comparator */typedef struct mmtimer {	spinlock_t lock ____cacheline_aligned;	struct k_itimer *timer;	int i;	int cpu;	struct tasklet_struct tasklet;} mmtimer_t; static mmtimer_t ** timers; /** * mmtimer_ioctl - ioctl interface for /dev/mmtimer * @inode: inode of the device * @file: file structure for the device * @cmd: command to execute * @arg: optional argument to command * * Executes the command specified by @cmd.  Returns 0 for success, < 0 for * failure. * * Valid commands: * * %MMTIMER_GETOFFSET - Should return the offset (relative to the start * of the page where the registers are mapped) for the counter in question. * * %MMTIMER_GETRES - Returns the resolution of the clock in femto (10^-15) * seconds * * %MMTIMER_GETFREQ - Copies the frequency of the clock in Hz to the address * specified by @arg * * %MMTIMER_GETBITS - Returns the number of bits in the clock's counter * * %MMTIMER_MMAPAVAIL - Returns 1 if the registers can be mmap'd into userspace * * %MMTIMER_GETCOUNTER - Gets the current value in the counter and places it * in the address specified by @arg. */static int mmtimer_ioctl(struct inode *inode, struct file *file,			 unsigned int cmd, unsigned long arg){	int ret = 0; 	switch (cmd) {	case MMTIMER_GETOFFSET:	/* offset of the counter */		/*		 * SN RTC registers are on their own 64k page		 */		if(PAGE_SIZE <= (1 << 16))			ret = (((long)RTC_COUNTER_ADDR) & (PAGE_SIZE-1)) / 8;		else			ret = -ENOSYS;		break; 	case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */		if(copy_to_user((unsigned long __user *)arg,				&mmtimer_femtoperiod, sizeof(unsigned long)))			return -EFAULT;		break; 	case MMTIMER_GETFREQ: /* frequency in Hz */		if(copy_to_user((unsigned long __user *)arg,				&sn_rtc_cycles_per_second,				sizeof(unsigned long)))			return -EFAULT;		ret = 0;		break; 	case MMTIMER_GETBITS: /* number of bits in the clock */		ret = RTC_BITS;		break; 	case MMTIMER_MMAPAVAIL: /* can we mmap the clock into userspace? */		ret = (PAGE_SIZE <= (1 << 16)) ? 1 : 0;		break; 	case MMTIMER_GETCOUNTER:		if(copy_to_user((unsigned long __user *)arg,				RTC_COUNTER_ADDR, sizeof(unsigned long)))			return -EFAULT;		break;	default:		ret = -ENOSYS;		break;	} 	return ret;} /** * mmtimer_mmap - maps the clock's registers into userspace * @file: file structure for the device * @vma: VMA to map the registers into * * Calls remap_pfn_range() to map the clock's registers into * the calling process' address space. */static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma){	unsigned long mmtimer_addr; 	if (vma->vm_end - vma->vm_start != PAGE_SIZE)		return -EINVAL; 	if (vma->vm_flags & VM_WRITE)		return -EPERM; 	if (PAGE_SIZE > (1 << 16))		return -ENOSYS; 	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 	mmtimer_addr = __pa(RTC_COUNTER_ADDR);	mmtimer_addr &= ~(PAGE_SIZE - 1);	mmtimer_addr &= 0xfffffffffffffffUL; 	if (remap_pfn_range(vma, vma->vm_start, mmtimer_addr >> PAGE_SHIFT,					PAGE_SIZE, vma->vm_page_prot)) {		printk(KERN_ERR "remap_pfn_range failed in mmtimer.c\n");		return -EAGAIN;	} 	return 0;} static struct miscdevice mmtimer_miscdev = {	SGI_MMTIMER,	MMTIMER_NAME,	&mmtimer_fops}; static struct timespec sgi_clock_offset;static int sgi_clock_period; /* * Posix Timer Interface */ static struct timespec sgi_clock_offset;static int sgi_clock_period; static int sgi_clock_get(clockid_t clockid, struct timespec *tp){	u64 nsec; 	nsec = rtc_time() * sgi_clock_period			+ sgi_clock_offset.tv_nsec;	tp->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &tp->tv_nsec)			+ sgi_clock_offset.tv_sec;	return 0;}; static int sgi_clock_set(clockid_t clockid, struct timespec *tp){ 	u64 nsec;	u64 rem; 	nsec = rtc_time() * sgi_clock_period; 	sgi_clock_offset.tv_sec = tp->tv_sec - div_long_long_rem(nsec, NSEC_PER_SEC, &rem); 	if (rem <= tp->tv_nsec)		sgi_clock_offset.tv_nsec = tp->tv_sec - rem;	else {		sgi_clock_offset.tv_nsec = tp->tv_sec + NSEC_PER_SEC - rem;		sgi_clock_offset.tv_sec--;	}	return 0;} /* * Schedule the next periodic interrupt. This function will attempt * to schedule a periodic interrupt later if necessary. If the scheduling * of an interrupt fails then the time to skip is lengthened * exponentially in order to ensure that the next interrupt * can be properly scheduled.. */static int inline reschedule_periodic_timer(mmtimer_t *x){	int n;	struct k_itimer *t = x->timer; 	t->it.mmtimer.clock = x->i;	t->it_overrun--; 	n = 0;	do { 		t->it.mmtimer.expires += t->it.mmtimer.incr << n;		t->it_overrun += 1 << n;		n++;		if (n > 20)			return 1; 	} while (!mmtimer_setup(x->i, t->it.mmtimer.expires)); 	return 0;} /** * mmtimer_interrupt - timer interrupt handler * @irq: irq received * @dev_id: device the irq came from * * Called when one of the comarators matches the counter, This * routine will send signals to processes that have requested * them. * * This interrupt is run in an interrupt context * by the SHUB. It is therefore safe to locally access SHub * registers. */static irqreturn_tmmtimer_interrupt(int irq, void *dev_id){	int i;	unsigned long expires = 0;	int result = IRQ_NONE;	unsigned indx = cpu_to_node(smp_processor_id()); 	/*	 * Do this once for each comparison register	 */	for (i = 0; i < NUM_COMPARATORS; i++) {		mmtimer_t *base = timers[indx] + i;		/* Make sure this doesn't get reused before tasklet_sched */		spin_lock(&base->lock);		if (base->cpu == smp_processor_id()) {			if (base->timer)				expires = base->timer->it.mmtimer.expires;			/* expires test won't work with shared irqs */			if ((mmtimer_int_pending(i) > 0) ||				(expires && (expires < rtc_time()))) {				mmtimer_clr_int_pending(i);				tasklet_schedule(&base->tasklet);				result = IRQ_HANDLED;			}		}		spin_unlock(&base->lock);		expires = 0;	}	return result;} void mmtimer_tasklet(unsigned long data) {	mmtimer_t *x = (mmtimer_t *)data;	struct k_itimer *t = x->timer;	unsigned long flags; 	if (t == NULL)		return; 	/* Send signal and deal with periodic signals */	spin_lock_irqsave(&t->it_lock, flags);	spin_lock(&x->lock);	/* If timer was deleted between interrupt and here, leave */	if (t != x->timer)		goto out;	t->it_overrun = 0; 	if (posix_timer_event(t, 0) != 0) { 		// printk(KERN_WARNING "mmtimer: cannot deliver signal.\n"); 		t->it_overrun++;	}	if(t->it.mmtimer.incr) {		/* Periodic timer */		if (reschedule_periodic_timer(x)) {			printk(KERN_WARNING "mmtimer: unable to reschedule\n");			x->timer = NULL;		}	} else {		/* Ensure we don't false trigger in mmtimer_interrupt */		t->it.mmtimer.expires = 0;	}	t->it_overrun_last = t->it_overrun;out:	spin_unlock(&x->lock);

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