/* *  Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) * *  Modifications for ppc64: *      Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> * *  This program is free software; you can redistribute it and/or *  modify it under the terms of the GNU General Public License *  as published by the Free Software Foundation; either version *  2 of the License, or (at your option) any later version. */ #include <linux/string.h>#include <linux/sched.h>#include <linux/threads.h>#include <linux/init.h>#include <linux/export.h> #include <asm/oprofile_impl.h>#include <asm/cputable.h>#include <asm/prom.h>		/* for PTRRELOC on ARCH=ppc */#include <asm/mmu.h>#include <asm/setup.h> struct cpu_spec* cur_cpu_spec = NULL;EXPORT_SYMBOL(cur_cpu_spec); /* The platform string corresponding to the real PVR */const char *powerpc_base_platform; /* NOTE: * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's * the responsibility of the appropriate CPU save/restore functions to * eventually copy these settings over. Those save/restore aren't yet * part of the cputable though. That has to be fixed for both ppc32 * and ppc64 */#ifdef CONFIG_PPC32extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);#endif /* CONFIG_PPC32 */#ifdef CONFIG_PPC64extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec);extern void __restore_cpu_pa6t(void);extern void __restore_cpu_ppc970(void);extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);extern void __restore_cpu_power7(void);extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);extern void __restore_cpu_power8(void);extern void __restore_cpu_a2(void);#endif /* CONFIG_PPC64 */#if defined(CONFIG_E500)extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);extern void __restore_cpu_e5500(void);extern void __restore_cpu_e6500(void);#endif /* CONFIG_E500 */ /* This table only contains "desktop" CPUs, it need to be filled with embedded * ones as well... */#define COMMON_USER		(PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \				 PPC_FEATURE_HAS_MMU)#define COMMON_USER_PPC64	(COMMON_USER | PPC_FEATURE_64)#define COMMON_USER_POWER4	(COMMON_USER_PPC64 | PPC_FEATURE_POWER4)#define COMMON_USER_POWER5	(COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)#define COMMON_USER_POWER5_PLUS	(COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)#define COMMON_USER_POWER6	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \				 PPC_FEATURE_TRUE_LE | \				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)#define COMMON_USER_POWER7	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \				 PPC_FEATURE_TRUE_LE | \				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)#define COMMON_USER2_POWER7	(PPC_FEATURE2_DSCR)#define COMMON_USER_POWER8	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \				 PPC_FEATURE_TRUE_LE | \				 PPC_FEATURE_PSERIES_PERFMON_COMPAT)#define COMMON_USER2_POWER8	(PPC_FEATURE2_ARCH_2_07 | \				 PPC_FEATURE2_HTM_COMP | PPC_FEATURE2_DSCR | \				 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR)#define COMMON_USER_PA6T	(COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\				 PPC_FEATURE_TRUE_LE | \				 PPC_FEATURE_HAS_ALTIVEC_COMP)#ifdef CONFIG_PPC_BOOK3E_64#define COMMON_USER_BOOKE	(COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)#else#define COMMON_USER_BOOKE	(PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \				 PPC_FEATURE_BOOKE)#endif static struct cpu_spec __initdata cpu_specs[] = {#ifdef CONFIG_PPC_BOOK3S_64	{	/* Power3 */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x00400000,		.cpu_name		= "POWER3 (630)",		.cpu_features		= CPU_FTRS_POWER3,		.cpu_user_features	= COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,		.mmu_features		= MMU_FTR_HPTE_TABLE,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 8,		.pmc_type		= PPC_PMC_IBM,		.oprofile_cpu_type	= "ppc64/power3",		.oprofile_type		= PPC_OPROFILE_RS64,		.platform		= "power3",	},	{	/* Power3+ */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x00410000,		.cpu_name		= "POWER3 (630+)",		.cpu_features		= CPU_FTRS_POWER3,		.cpu_user_features	= COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,		.mmu_features		= MMU_FTR_HPTE_TABLE,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 8,		.pmc_type		= PPC_PMC_IBM,		.oprofile_cpu_type	= "ppc64/power3",		.oprofile_type		= PPC_OPROFILE_RS64,		.platform		= "power3",	},	{	/* Northstar */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x00330000,		.cpu_name		= "RS64-II (northstar)",		.cpu_features		= CPU_FTRS_RS64,		.cpu_user_features	= COMMON_USER_PPC64,		.mmu_features		= MMU_FTR_HPTE_TABLE,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 8,		.pmc_type		= PPC_PMC_IBM,		.oprofile_cpu_type	= "ppc64/rs64",		.oprofile_type		= PPC_OPROFILE_RS64,		.platform		= "rs64",	},	{	/* Pulsar */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x00340000,		.cpu_name		= "RS64-III (pulsar)",		.cpu_features		= CPU_FTRS_RS64,		.cpu_user_features	= COMMON_USER_PPC64,		.mmu_features		= MMU_FTR_HPTE_TABLE,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 8,		.pmc_type		= PPC_PMC_IBM,		.oprofile_cpu_type	= "ppc64/rs64",		.oprofile_type		= PPC_OPROFILE_RS64,		.platform		= "rs64",	},	{	/* I-star */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x00360000,		.cpu_name		= "RS64-III (icestar)",		.cpu_features		= CPU_FTRS_RS64,		.cpu_user_features	= COMMON_USER_PPC64,		.mmu_features		= MMU_FTR_HPTE_TABLE,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 8,		.pmc_type		= PPC_PMC_IBM,		.oprofile_cpu_type	= "ppc64/rs64",		.oprofile_type		= PPC_OPROFILE_RS64,		.platform		= "rs64",	},	{	/* S-star */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x00370000,		.cpu_name		= "RS64-IV (sstar)",		.cpu_features		= CPU_FTRS_RS64,		.cpu_user_features	= COMMON_USER_PPC64,		.mmu_features		= MMU_FTR_HPTE_TABLE,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 8,		.pmc_type		= PPC_PMC_IBM,		.oprofile_cpu_type	= "ppc64/rs64",		.oprofile_type		= PPC_OPROFILE_RS64,		.platform		= "rs64",	},	{	/* Power4 */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x00350000,		.cpu_name		= "POWER4 (gp)",		.cpu_features		= CPU_FTRS_POWER4,		.cpu_user_features	= COMMON_USER_POWER4,		.mmu_features		= MMU_FTRS_POWER4,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 8,		.pmc_type		= PPC_PMC_IBM,		.oprofile_cpu_type	= "ppc64/power4",		.oprofile_type		= PPC_OPROFILE_POWER4,		.platform		= "power4",	},	{	/* Power4+ */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x00380000,		.cpu_name		= "POWER4+ (gq)",		.cpu_features		= CPU_FTRS_POWER4,		.cpu_user_features	= COMMON_USER_POWER4,		.mmu_features		= MMU_FTRS_POWER4,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 8,		.pmc_type		= PPC_PMC_IBM,		.oprofile_cpu_type	= "ppc64/power4",		.oprofile_type		= PPC_OPROFILE_POWER4,		.platform		= "power4",	},	{	/* PPC970 */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x00390000,		.cpu_name		= "PPC970",		.cpu_features		= CPU_FTRS_PPC970,		.cpu_user_features	= COMMON_USER_POWER4 |			PPC_FEATURE_HAS_ALTIVEC_COMP,		.mmu_features		= MMU_FTRS_PPC970,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 8,		.pmc_type		= PPC_PMC_IBM,		.cpu_setup		= __setup_cpu_ppc970,		.cpu_restore		= __restore_cpu_ppc970,		.oprofile_cpu_type	= "ppc64/970",		.oprofile_type		= PPC_OPROFILE_POWER4,		.platform		= "ppc970",	},	{	/* PPC970FX */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x003c0000,		.cpu_name		= "PPC970FX",		.cpu_features		= CPU_FTRS_PPC970,		.cpu_user_features	= COMMON_USER_POWER4 |			PPC_FEATURE_HAS_ALTIVEC_COMP,		.mmu_features		= MMU_FTRS_PPC970,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 8,		.pmc_type		= PPC_PMC_IBM,		.cpu_setup		= __setup_cpu_ppc970,		.cpu_restore		= __restore_cpu_ppc970,		.oprofile_cpu_type	= "ppc64/970",		.oprofile_type		= PPC_OPROFILE_POWER4,		.platform		= "ppc970",	},	{	/* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */		.pvr_mask		= 0xffffffff,		.pvr_value		= 0x00440100,		.cpu_name		= "PPC970MP",		.cpu_features		= CPU_FTRS_PPC970,		.cpu_user_features	= COMMON_USER_POWER4 |			PPC_FEATURE_HAS_ALTIVEC_COMP,		.mmu_features		= MMU_FTRS_PPC970,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 8,		.pmc_type		= PPC_PMC_IBM,		.cpu_setup		= __setup_cpu_ppc970,		.cpu_restore		= __restore_cpu_ppc970,		.oprofile_cpu_type	= "ppc64/970MP",		.oprofile_type		= PPC_OPROFILE_POWER4,		.platform		= "ppc970",	},	{	/* PPC970MP */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x00440000,		.cpu_name		= "PPC970MP",		.cpu_features		= CPU_FTRS_PPC970,		.cpu_user_features	= COMMON_USER_POWER4 |			PPC_FEATURE_HAS_ALTIVEC_COMP,		.mmu_features		= MMU_FTRS_PPC970,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 8,		.pmc_type		= PPC_PMC_IBM,		.cpu_setup		= __setup_cpu_ppc970MP,		.cpu_restore		= __restore_cpu_ppc970,		.oprofile_cpu_type	= "ppc64/970MP",		.oprofile_type		= PPC_OPROFILE_POWER4,		.platform		= "ppc970",	},	{	/* PPC970GX */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x00450000,		.cpu_name		= "PPC970GX",		.cpu_features		= CPU_FTRS_PPC970,		.cpu_user_features	= COMMON_USER_POWER4 |			PPC_FEATURE_HAS_ALTIVEC_COMP,		.mmu_features		= MMU_FTRS_PPC970,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 8,		.pmc_type		= PPC_PMC_IBM,		.cpu_setup		= __setup_cpu_ppc970,		.oprofile_cpu_type	= "ppc64/970",		.oprofile_type		= PPC_OPROFILE_POWER4,		.platform		= "ppc970",	},	{	/* Power5 GR */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x003a0000,		.cpu_name		= "POWER5 (gr)",		.cpu_features		= CPU_FTRS_POWER5,		.cpu_user_features	= COMMON_USER_POWER5,		.mmu_features		= MMU_FTRS_POWER5,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 6,		.pmc_type		= PPC_PMC_IBM,		.oprofile_cpu_type	= "ppc64/power5",		.oprofile_type		= PPC_OPROFILE_POWER4,		/* SIHV / SIPR bits are implemented on POWER4+ (GQ)		 * and above but only works on POWER5 and above		 */		.oprofile_mmcra_sihv	= MMCRA_SIHV,		.oprofile_mmcra_sipr	= MMCRA_SIPR,		.platform		= "power5",	},	{	/* Power5++ */		.pvr_mask		= 0xffffff00,		.pvr_value		= 0x003b0300,		.cpu_name		= "POWER5+ (gs)",		.cpu_features		= CPU_FTRS_POWER5,		.cpu_user_features	= COMMON_USER_POWER5_PLUS,		.mmu_features		= MMU_FTRS_POWER5,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 6,		.oprofile_cpu_type	= "ppc64/power5++",		.oprofile_type		= PPC_OPROFILE_POWER4,		.oprofile_mmcra_sihv	= MMCRA_SIHV,		.oprofile_mmcra_sipr	= MMCRA_SIPR,		.platform		= "power5+",	},	{	/* Power5 GS */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x003b0000,		.cpu_name		= "POWER5+ (gs)",		.cpu_features		= CPU_FTRS_POWER5,		.cpu_user_features	= COMMON_USER_POWER5_PLUS,		.mmu_features		= MMU_FTRS_POWER5,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 6,		.pmc_type		= PPC_PMC_IBM,		.oprofile_cpu_type	= "ppc64/power5+",		.oprofile_type		= PPC_OPROFILE_POWER4,		.oprofile_mmcra_sihv	= MMCRA_SIHV,		.oprofile_mmcra_sipr	= MMCRA_SIPR,		.platform		= "power5+",	},	{	/* POWER6 in P5+ mode; 2.04-compliant processor */		.pvr_mask		= 0xffffffff,		.pvr_value		= 0x0f000001,		.cpu_name		= "POWER5+",		.cpu_features		= CPU_FTRS_POWER5,		.cpu_user_features	= COMMON_USER_POWER5_PLUS,		.mmu_features		= MMU_FTRS_POWER5,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",		.oprofile_type		= PPC_OPROFILE_POWER4,		.platform		= "power5+",	},	{	/* Power6 */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x003e0000,		.cpu_name		= "POWER6 (raw)",		.cpu_features		= CPU_FTRS_POWER6,		.cpu_user_features	= COMMON_USER_POWER6 |			PPC_FEATURE_POWER6_EXT,		.mmu_features		= MMU_FTRS_POWER6,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 6,		.pmc_type		= PPC_PMC_IBM,		.oprofile_cpu_type	= "ppc64/power6",		.oprofile_type		= PPC_OPROFILE_POWER4,		.oprofile_mmcra_sihv	= POWER6_MMCRA_SIHV,		.oprofile_mmcra_sipr	= POWER6_MMCRA_SIPR,		.oprofile_mmcra_clear	= POWER6_MMCRA_THRM |			POWER6_MMCRA_OTHER,		.platform		= "power6x",	},	{	/* 2.05-compliant processor, i.e. Power6 "architected" mode */		.pvr_mask		= 0xffffffff,		.pvr_value		= 0x0f000002,		.cpu_name		= "POWER6 (architected)",		.cpu_features		= CPU_FTRS_POWER6,		.cpu_user_features	= COMMON_USER_POWER6,		.mmu_features		= MMU_FTRS_POWER6,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",		.oprofile_type		= PPC_OPROFILE_POWER4,		.platform		= "power6",	},	{	/* 2.06-compliant processor, i.e. Power7 "architected" mode */		.pvr_mask		= 0xffffffff,		.pvr_value		= 0x0f000003,		.cpu_name		= "POWER7 (architected)",		.cpu_features		= CPU_FTRS_POWER7,		.cpu_user_features	= COMMON_USER_POWER7,		.cpu_user_features2	= COMMON_USER2_POWER7,		.mmu_features		= MMU_FTRS_POWER7,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.oprofile_type		= PPC_OPROFILE_POWER4,		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",		.cpu_setup		= __setup_cpu_power7,		.cpu_restore		= __restore_cpu_power7,		.platform		= "power7",	},	{	/* 2.07-compliant processor, i.e. Power8 "architected" mode */		.pvr_mask		= 0xffffffff,		.pvr_value		= 0x0f000004,		.cpu_name		= "POWER8 (architected)",		.cpu_features		= CPU_FTRS_POWER8,		.cpu_user_features	= COMMON_USER_POWER8,		.cpu_user_features2	= COMMON_USER2_POWER8,		.mmu_features		= MMU_FTRS_POWER8,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.oprofile_type		= PPC_OPROFILE_INVALID,		.oprofile_cpu_type	= "ppc64/ibm-compat-v1",		.cpu_setup		= __setup_cpu_power8,		.cpu_restore		= __restore_cpu_power8,		.platform		= "power8",	},	{	/* Power7 */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x003f0000,		.cpu_name		= "POWER7 (raw)",		.cpu_features		= CPU_FTRS_POWER7,		.cpu_user_features	= COMMON_USER_POWER7,		.cpu_user_features2	= COMMON_USER2_POWER7,		.mmu_features		= MMU_FTRS_POWER7,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 6,		.pmc_type		= PPC_PMC_IBM,		.oprofile_cpu_type	= "ppc64/power7",		.oprofile_type		= PPC_OPROFILE_POWER4,		.cpu_setup		= __setup_cpu_power7,		.cpu_restore		= __restore_cpu_power7,		.platform		= "power7",	},	{	/* Power7+ */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x004A0000,		.cpu_name		= "POWER7+ (raw)",		.cpu_features		= CPU_FTRS_POWER7,		.cpu_user_features	= COMMON_USER_POWER7,		.cpu_user_features2	= COMMON_USER2_POWER7,		.mmu_features		= MMU_FTRS_POWER7,		.icache_bsize		= 128,		.dcache_bsize		= 128,		.num_pmcs		= 6,		.pmc_type		= PPC_PMC_IBM,		.oprofile_cpu_type	= "ppc64/power7",		.oprofile_type		= PPC_OPROFILE_POWER4,		.cpu_setup		= __setup_cpu_power7,		.cpu_restore		= __restore_cpu_power7,		.platform		= "power7+",	},	{	/* Power8E */		.pvr_mask		= 0xffff0000,		.pvr_value		= 0x004b0000,		.cpu_name		= "POWER8E (raw)",

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