/* * RTC class driver for "CMOS RTC":  PCs, ACPI, etc * * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c) * Copyright (C) 2006 David Brownell (convert to new framework) * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ /* * The original "cmos clock" chip was an MC146818 chip, now obsolete. * That defined the register interface now provided by all PCs, some * non-PC systems, and incorporated into ACPI.  Modern PC chipsets * integrate an MC146818 clone in their southbridge, and boards use * that instead of discrete clones like the DS12887 or M48T86.  There * are also clones that connect using the LPC bus. * * That register API is also used directly by various other drivers * (notably for integrated NVRAM), infrastructure (x86 has code to * bypass the RTC framework, directly reading the RTC during boot * and updating minutes/seconds for systems using NTP synch) and * utilities (like userspace 'hwclock', if no /dev node exists). * * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with * interrupts disabled, holding the global rtc_lock, to exclude those * other drivers and utilities on correctly configured systems. */#include <linux/kernel.h>#include <linux/module.h>#include <linux/init.h>#include <linux/interrupt.h>#include <linux/spinlock.h>#include <linux/platform_device.h>#include <linux/mod_devicetable.h>#include <linux/log2.h>#include <linux/pm.h>#include <linux/of.h>#include <linux/of_platform.h> /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */#include <asm-generic/rtc.h> struct cmos_rtc {	struct rtc_device	*rtc;	struct device		*dev;	int			irq;	struct resource		*iomem; 	void			(*wake_on)(struct device *);	void			(*wake_off)(struct device *); 	u8			enabled_wake;	u8			suspend_ctrl; 	/* newer hardware extends the original register set */	u8			day_alrm;	u8			mon_alrm;	u8			century;}; /* both platform and pnp busses use negative numbers for invalid irqs */#define is_valid_irq(n)		((n) > 0) static const char driver_name[] = "rtc_cmos"; /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear; * always mask it against the irq enable bits in RTC_CONTROL.  Bit values * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both. */#define	RTC_IRQMASK	(RTC_PF | RTC_AF | RTC_UF) static inline int is_intr(u8 rtc_intr){	if (!(rtc_intr & RTC_IRQF))		return 0;	return rtc_intr & RTC_IRQMASK;} /*----------------------------------------------------------------*/ /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly * used in a broken "legacy replacement" mode.  The breakage includes * HPET #1 hijacking the IRQ for this RTC, and being unavailable for * other (better) use. * * When that broken mode is in use, platform glue provides a partial * emulation of hardware RTC IRQ facilities using HPET #1.  We don't * want to use HPET for anything except those IRQs though... */#ifdef CONFIG_HPET_EMULATE_RTC#include <asm/hpet.h>#else static inline int is_hpet_enabled(void){	return 0;} static inline int hpet_mask_rtc_irq_bit(unsigned long mask){	return 0;} static inline int hpet_set_rtc_irq_bit(unsigned long mask){	return 0;} static inline inthpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec){	return 0;} static inline int hpet_set_periodic_freq(unsigned long freq){	return 0;} static inline int hpet_rtc_dropped_irq(void){	return 0;} static inline int hpet_rtc_timer_init(void){	return 0;} extern irq_handler_t hpet_rtc_interrupt; static inline int hpet_register_irq_handler(irq_handler_t handler){	return 0;} static inline int hpet_unregister_irq_handler(irq_handler_t handler){	return 0;} #endif /*----------------------------------------------------------------*/ #ifdef RTC_PORT /* Most newer x86 systems have two register banks, the first used * for RTC and NVRAM and the second only for NVRAM.  Caller must * own rtc_lock ... and we won't worry about access during NMI. */#define can_bank2	true static inline unsigned char cmos_read_bank2(unsigned char addr){	outb(addr, RTC_PORT(2));	return inb(RTC_PORT(3));} static inline void cmos_write_bank2(unsigned char val, unsigned char addr){	outb(addr, RTC_PORT(2));	outb(val, RTC_PORT(3));} #else #define can_bank2	false static inline unsigned char cmos_read_bank2(unsigned char addr){	return 0;} static inline void cmos_write_bank2(unsigned char val, unsigned char addr){} #endif /*----------------------------------------------------------------*/ static int cmos_read_time(struct device *dev, struct rtc_time *t){	/* REVISIT:  if the clock has a "century" register, use	 * that instead of the heuristic in get_rtc_time().	 * That'll make Y3K compatility (year > 2070) easy!	 */	get_rtc_time(t);	return 0;} static int cmos_set_time(struct device *dev, struct rtc_time *t){	/* REVISIT:  set the "century" register if available	 *	 * NOTE: this ignores the issue whereby updating the seconds	 * takes effect exactly 500ms after we write the register.	 * (Also queueing and other delays before we get this far.)	 */	return set_rtc_time(t);} static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t){	struct cmos_rtc	*cmos = dev_get_drvdata(dev);	unsigned char	rtc_control; 	if (!is_valid_irq(cmos->irq))		return -EIO; 	/* Basic alarms only support hour, minute, and seconds fields.	 * Some also support day and month, for alarms up to a year in	 * the future.	 */	t->time.tm_mday = -1;	t->time.tm_mon = -1; 	spin_lock_irq(&rtc_lock);	t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);	t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);	t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM); 	if (cmos->day_alrm) {		/* ignore upper bits on readback per ACPI spec */		t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;		if (!t->time.tm_mday)			t->time.tm_mday = -1; 		if (cmos->mon_alrm) {			t->time.tm_mon = CMOS_READ(cmos->mon_alrm);			if (!t->time.tm_mon)				t->time.tm_mon = -1;		}	} 	rtc_control = CMOS_READ(RTC_CONTROL);	spin_unlock_irq(&rtc_lock); 	if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {		if (((unsigned)t->time.tm_sec) < 0x60)			t->time.tm_sec = bcd2bin(t->time.tm_sec);		else			t->time.tm_sec = -1;		if (((unsigned)t->time.tm_min) < 0x60)			t->time.tm_min = bcd2bin(t->time.tm_min);		else			t->time.tm_min = -1;		if (((unsigned)t->time.tm_hour) < 0x24)			t->time.tm_hour = bcd2bin(t->time.tm_hour);		else			t->time.tm_hour = -1; 		if (cmos->day_alrm) {			if (((unsigned)t->time.tm_mday) <= 0x31)				t->time.tm_mday = bcd2bin(t->time.tm_mday);			else				t->time.tm_mday = -1; 			if (cmos->mon_alrm) {				if (((unsigned)t->time.tm_mon) <= 0x12)					t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;				else					t->time.tm_mon = -1;			}		}	}	t->time.tm_year = -1; 	t->enabled = !!(rtc_control & RTC_AIE);	t->pending = 0; 	return 0;} static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control){	unsigned char	rtc_intr; 	/* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;	 * allegedly some older rtcs need that to handle irqs properly	 */	rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 	if (is_hpet_enabled())		return; 	rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;	if (is_intr(rtc_intr))		rtc_update_irq(cmos->rtc, 1, rtc_intr);} static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask){	unsigned char	rtc_control; 	/* flush any pending IRQ status, notably for update irqs,	 * before we enable new IRQs	 */	rtc_control = CMOS_READ(RTC_CONTROL);	cmos_checkintr(cmos, rtc_control); 	rtc_control |= mask;	CMOS_WRITE(rtc_control, RTC_CONTROL);	hpet_set_rtc_irq_bit(mask); 	cmos_checkintr(cmos, rtc_control);} static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask){	unsigned char	rtc_control; 	rtc_control = CMOS_READ(RTC_CONTROL);	rtc_control &= ~mask;	CMOS_WRITE(rtc_control, RTC_CONTROL);	hpet_mask_rtc_irq_bit(mask); 	cmos_checkintr(cmos, rtc_control);} static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t){	struct cmos_rtc	*cmos = dev_get_drvdata(dev);	unsigned char mon, mday, hrs, min, sec, rtc_control; 	if (!is_valid_irq(cmos->irq))		return -EIO; 	mon = t->time.tm_mon + 1;	mday = t->time.tm_mday;	hrs = t->time.tm_hour;	min = t->time.tm_min;	sec = t->time.tm_sec; 	rtc_control = CMOS_READ(RTC_CONTROL);	if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {		/* Writing 0xff means "don't care" or "match all".  */		mon = (mon <= 12) ? bin2bcd(mon) : 0xff;		mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;		hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;		min = (min < 60) ? bin2bcd(min) : 0xff;		sec = (sec < 60) ? bin2bcd(sec) : 0xff;	} 	spin_lock_irq(&rtc_lock); 	/* next rtc irq must not be from previous alarm setting */	cmos_irq_disable(cmos, RTC_AIE); 	/* update alarm */	CMOS_WRITE(hrs, RTC_HOURS_ALARM);	CMOS_WRITE(min, RTC_MINUTES_ALARM);	CMOS_WRITE(sec, RTC_SECONDS_ALARM); 	/* the system may support an "enhanced" alarm */	if (cmos->day_alrm) {		CMOS_WRITE(mday, cmos->day_alrm);		if (cmos->mon_alrm)			CMOS_WRITE(mon, cmos->mon_alrm);	} 	/* FIXME the HPET alarm glue currently ignores day_alrm	 * and mon_alrm ...	 */	hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec); 	if (t->enabled)		cmos_irq_enable(cmos, RTC_AIE); 	spin_unlock_irq(&rtc_lock); 	return 0;} static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled){	struct cmos_rtc	*cmos = dev_get_drvdata(dev);	unsigned long	flags; 	if (!is_valid_irq(cmos->irq))		return -EINVAL; 	spin_lock_irqsave(&rtc_lock, flags); 	if (enabled)		cmos_irq_enable(cmos, RTC_AIE);	else		cmos_irq_disable(cmos, RTC_AIE); 	spin_unlock_irqrestore(&rtc_lock, flags);	return 0;} #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) static int cmos_procfs(struct device *dev, struct seq_file *seq){	struct cmos_rtc	*cmos = dev_get_drvdata(dev);	unsigned char	rtc_control, valid; 	spin_lock_irq(&rtc_lock);	rtc_control = CMOS_READ(RTC_CONTROL);	valid = CMOS_READ(RTC_VALID);	spin_unlock_irq(&rtc_lock); 	/* NOTE:  at least ICH6 reports battery status using a different	 * (non-RTC) bit; and SQWE is ignored on many current systems.	 */	return seq_printf(seq,			"periodic_IRQ\t: %s\n"			"update_IRQ\t: %s\n"			"HPET_emulated\t: %s\n"			// "square_wave\t: %s\n"			"BCD\t\t: %s\n"			"DST_enable\t: %s\n"			"periodic_freq\t: %d\n"			"batt_status\t: %s\n",			(rtc_control & RTC_PIE) ? "yes" : "no",			(rtc_control & RTC_UIE) ? "yes" : "no",			is_hpet_enabled() ? "yes" : "no",			// (rtc_control & RTC_SQWE) ? "yes" : "no",			(rtc_control & RTC_DM_BINARY) ? "no" : "yes",			(rtc_control & RTC_DST_EN) ? "yes" : "no",			cmos->rtc->irq_freq,			(valid & RTC_VRT) ? "okay" : "dead");} #else#define	cmos_procfs	NULL#endif static const struct rtc_class_ops cmos_rtc_ops = {	.read_time		= cmos_read_time,	.set_time		= cmos_set_time,	.read_alarm		= cmos_read_alarm,	.set_alarm		= cmos_set_alarm,	.proc			= cmos_procfs,	.alarm_irq_enable	= cmos_alarm_irq_enable,}; /*----------------------------------------------------------------*/ /* * All these chips have at least 64 bytes of address space, shared by * RTC registers and NVRAM.  Most of those bytes of NVRAM are used * by boot firmware.  Modern chips have 128 or 256 bytes. */ #define NVRAM_OFFSET	(RTC_REG_D + 1) static ssize_tcmos_nvram_read(struct file *filp, struct kobject *kobj,		struct bin_attribute *attr,		char *buf, loff_t off, size_t count){	int	retval; 	if (unlikely(off >= attr->size))		return 0;	if (unlikely(off < 0))		return -EINVAL;	if ((off + count) > attr->size)		count = attr->size - off; 	off += NVRAM_OFFSET;	spin_lock_irq(&rtc_lock);	for (retval = 0; count; count--, off++, retval++) {		if (off < 128)			*buf++ = CMOS_READ(off);		else if (can_bank2)			*buf++ = cmos_read_bank2(off);		else			break;	}	spin_unlock_irq(&rtc_lock); 	return retval;} static ssize_tcmos_nvram_write(struct file *filp, struct kobject *kobj,		struct bin_attribute *attr,		char *buf, loff_t off, size_t count){	struct cmos_rtc	*cmos;	int		retval; 	cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));	if (unlikely(off >= attr->size))		return -EFBIG;	if (unlikely(off < 0))		return -EINVAL;	if ((off + count) > attr->size)		count = attr->size - off; 

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