/* * Kernel page table mapping * * Copyright (C) 2015 ARM Ltd. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program.  If not, see <http://www.gnu.org/licenses/>. */ #ifndef __ASM_KERNEL_PGTABLE_H#define __ASM_KERNEL_PGTABLE_H #include <asm/pgtable.h>#include <asm/sparsemem.h> /* * The linear mapping and the start of memory are both 2M aligned (per * the arm64 booting.txt requirements). Hence we can use section mapping * with 4K (section size = 2M) but not with 16K (section size = 32M) or * 64K (section size = 512M). */#ifdef CONFIG_ARM64_4K_PAGES#define ARM64_SWAPPER_USES_SECTION_MAPS 1#else#define ARM64_SWAPPER_USES_SECTION_MAPS 0#endif /* * The idmap and swapper page tables need some space reserved in the kernel * image. Both require pgd, pud (4 levels only) and pmd tables to (section) * map the kernel. With the 64K page configuration, swapper and idmap need to * map to pte level. The swapper also maps the FDT (see __create_page_tables * for more information). Note that the number of ID map translation levels * could be increased on the fly if system RAM is out of reach for the default * VA range, so pages required to map highest possible PA are reserved in all * cases. */#if ARM64_SWAPPER_USES_SECTION_MAPS#define SWAPPER_PGTABLE_LEVELS	(CONFIG_PGTABLE_LEVELS - 1)#define IDMAP_PGTABLE_LEVELS	(ARM64_HW_PGTABLE_LEVELS(PHYS_MASK_SHIFT) - 1)#else#define SWAPPER_PGTABLE_LEVELS	(CONFIG_PGTABLE_LEVELS)#define IDMAP_PGTABLE_LEVELS	(ARM64_HW_PGTABLE_LEVELS(PHYS_MASK_SHIFT))#endif #define SWAPPER_DIR_SIZE	(SWAPPER_PGTABLE_LEVELS * PAGE_SIZE)#define IDMAP_DIR_SIZE		(IDMAP_PGTABLE_LEVELS * PAGE_SIZE) #ifdef CONFIG_ARM64_SW_TTBR0_PAN#define RESERVED_TTBR0_SIZE	(PAGE_SIZE)#else#define RESERVED_TTBR0_SIZE	(0)#endif /* Initial memory map size */#if ARM64_SWAPPER_USES_SECTION_MAPS#define SWAPPER_BLOCK_SHIFT	SECTION_SHIFT#define SWAPPER_BLOCK_SIZE	SECTION_SIZE#define SWAPPER_TABLE_SHIFT	PUD_SHIFT#else#define SWAPPER_BLOCK_SHIFT	PAGE_SHIFT#define SWAPPER_BLOCK_SIZE	PAGE_SIZE#define SWAPPER_TABLE_SHIFT	PMD_SHIFT#endif /* The size of the initial kernel direct mapping */#define SWAPPER_INIT_MAP_SIZE	(_AC(1, UL) << SWAPPER_TABLE_SHIFT) /* * Initial memory map attributes. */#define SWAPPER_PTE_FLAGS	(PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)#define SWAPPER_PMD_FLAGS	(PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S) #if ARM64_SWAPPER_USES_SECTION_MAPS#define SWAPPER_MM_MMUFLAGS	(PMD_ATTRINDX(MT_NORMAL) | SWAPPER_PMD_FLAGS)#else#define SWAPPER_MM_MMUFLAGS	(PTE_ATTRINDX(MT_NORMAL) | SWAPPER_PTE_FLAGS)#endif /* * To make optimal use of block mappings when laying out the linear * mapping, round down the base of physical memory to a size that can * be mapped efficiently, i.e., either PUD_SIZE (4k granule) or PMD_SIZE * (64k granule), or a multiple that can be mapped using contiguous bits * in the page tables: 32 * PMD_SIZE (16k granule) */#if defined(CONFIG_ARM64_4K_PAGES)#define ARM64_MEMSTART_SHIFT		PUD_SHIFT#elif defined(CONFIG_ARM64_16K_PAGES)#define ARM64_MEMSTART_SHIFT		(PMD_SHIFT + 5)#else#define ARM64_MEMSTART_SHIFT		PMD_SHIFT#endif /* * sparsemem vmemmap imposes an additional requirement on the alignment of * memstart_addr, due to the fact that the base of the vmemmap region * has a direct correspondence, and needs to appear sufficiently aligned * in the virtual address space. */#if defined(CONFIG_SPARSEMEM_VMEMMAP) && ARM64_MEMSTART_SHIFT < SECTION_SIZE_BITS#define ARM64_MEMSTART_ALIGN	(1UL << SECTION_SIZE_BITS)#else#define ARM64_MEMSTART_ALIGN	(1UL << ARM64_MEMSTART_SHIFT)#endif #endif	/* __ASM_KERNEL_PGTABLE_H */