/* setup.c: FRV specific setup * * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved. * Written by David Howells (dhowells@redhat.com) * - Derived from arch/m68k/kernel/setup.c * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ #include <generated/utsrelease.h>#include <linux/kernel.h>#include <linux/sched.h>#include <linux/delay.h>#include <linux/interrupt.h>#include <linux/fs.h>#include <linux/mm.h>#include <linux/fb.h>#include <linux/console.h>#include <linux/genhd.h>#include <linux/errno.h>#include <linux/string.h>#include <linux/major.h>#include <linux/bootmem.h>#include <linux/highmem.h>#include <linux/seq_file.h>#include <linux/serial.h>#include <linux/serial_core.h>#include <linux/serial_reg.h>#include <linux/serial_8250.h> #include <asm/setup.h>#include <asm/irq.h>#include <asm/sections.h>#include <asm/pgalloc.h>#include <asm/busctl-regs.h>#include <asm/serial-regs.h>#include <asm/timer-regs.h>#include <asm/irc-regs.h>#include <asm/spr-regs.h>#include <asm/mb-regs.h>#include <asm/mb93493-regs.h>#include <asm/gdb-stub.h>#include <asm/io.h> #ifdef CONFIG_BLK_DEV_INITRD#include <asm/pgtable.h>#endif #include "local.h" #ifdef CONFIG_MB93090_MB00static void __init mb93090_display(void);#endif#ifdef CONFIG_MMUstatic void __init setup_linux_memory(void);#elsestatic void __init setup_uclinux_memory(void);#endif #ifdef CONFIG_MB93090_MB00static char __initdata mb93090_banner[] = "FJ/RH FR-V Linux";static char __initdata mb93090_version[] = UTS_RELEASE; int __nongprelbss mb93090_mb00_detected;#endif const char __frv_unknown_system[] = "unknown";const char __frv_mb93091_cb10[] = "mb93091-cb10";const char __frv_mb93091_cb11[] = "mb93091-cb11";const char __frv_mb93091_cb30[] = "mb93091-cb30";const char __frv_mb93091_cb41[] = "mb93091-cb41";const char __frv_mb93091_cb60[] = "mb93091-cb60";const char __frv_mb93091_cb70[] = "mb93091-cb70";const char __frv_mb93091_cb451[] = "mb93091-cb451";const char __frv_mb93090_mb00[] = "mb93090-mb00"; const char __frv_mb93493[] = "mb93493"; const char __frv_mb93093[] = "mb93093"; static const char *__nongprelbss cpu_series;static const char *__nongprelbss cpu_core;static const char *__nongprelbss cpu_silicon;static const char *__nongprelbss cpu_mmu;static const char *__nongprelbss cpu_system;static const char *__nongprelbss cpu_board1;static const char *__nongprelbss cpu_board2; static unsigned long __nongprelbss cpu_psr_all;static unsigned long __nongprelbss cpu_hsr0_all; unsigned long __nongprelbss pdm_suspend_mode; unsigned long __nongprelbss rom_length;unsigned long __nongprelbss memory_start;unsigned long __nongprelbss memory_end; unsigned long __nongprelbss dma_coherent_mem_start;unsigned long __nongprelbss dma_coherent_mem_end; unsigned long __initdata __sdram_old_base;unsigned long __initdata num_mappedpages; char __initdata command_line[COMMAND_LINE_SIZE];char __initdata redboot_command_line[COMMAND_LINE_SIZE]; #ifdef CONFIG_PM#define __pminit#define __pminitdata#define __pminitconst#else#define __pminit __init#define __pminitdata __initdata#define __pminitconst __initconst#endif struct clock_cmode {	uint8_t	xbus, sdram, corebus, core, dsu;}; #define _frac(N,D) ((N)<<4 | (D))#define _x0_16	_frac(1,6)#define _x0_25	_frac(1,4)#define _x0_33	_frac(1,3)#define _x0_375	_frac(3,8)#define _x0_5	_frac(1,2)#define _x0_66	_frac(2,3)#define _x0_75	_frac(3,4)#define _x1	_frac(1,1)#define _x1_5	_frac(3,2)#define _x2	_frac(2,1)#define _x3	_frac(3,1)#define _x4	_frac(4,1)#define _x4_5	_frac(9,2)#define _x6	_frac(6,1)#define _x8	_frac(8,1)#define _x9	_frac(9,1) int __nongprelbss clock_p0_current;int __nongprelbss clock_cm_current;int __nongprelbss clock_cmode_current;#ifdef CONFIG_PMint __nongprelbss clock_cmodes_permitted;unsigned long __nongprelbss clock_bits_settable;#endif static struct clock_cmode __pminitdata undef_clock_cmode = { _x1, _x1, _x1, _x1, _x1 }; static struct clock_cmode __pminitdata clock_cmodes_fr401_fr403[16] = {	[4]	= {	_x1,	_x1,	_x2,	_x2,	_x0_25	},	[5]	= { 	_x1,	_x2,	_x4,	_x4,	_x0_5	},	[8]	= { 	_x1,	_x1,	_x1,	_x2,	_x0_25	},	[9]	= { 	_x1,	_x2,	_x2,	_x4,	_x0_5	},	[11]	= { 	_x1,	_x4,	_x4,	_x8,	_x1	},	[12]	= { 	_x1,	_x1,	_x2,	_x4,	_x0_5	},	[13]	= { 	_x1,	_x2,	_x4,	_x8,	_x1	},}; static struct clock_cmode __pminitdata clock_cmodes_fr405[16] = {	[0]	= {	_x1,	_x1,	_x1,	_x1,	_x0_5	},	[1]	= {	_x1,	_x1,	_x1,	_x3,	_x0_25	},	[2]	= {	_x1,	_x1,	_x2,	_x6,	_x0_5	},	[3]	= {	_x1,	_x2,	_x2,	_x6,	_x0_5	},	[4]	= {	_x1,	_x1,	_x2,	_x2,	_x0_16	},	[8]	= { 	_x1,	_x1,	_x1,	_x2,	_x0_16	},	[9]	= { 	_x1,	_x2,	_x2,	_x4,	_x0_33	},	[12]	= { 	_x1,	_x1,	_x2,	_x4,	_x0_33	},	[14]	= { 	_x1,	_x3,	_x3,	_x9,	_x0_75	},	[15]	= { 	_x1,	_x1_5,	_x1_5,	_x4_5,	_x0_375	}, #define CLOCK_CMODES_PERMITTED_FR405 0xd31f}; static struct clock_cmode __pminitdata clock_cmodes_fr555[16] = {	[0]	= {	_x1,	_x2,	_x2,	_x4,	_x0_33	},	[1]	= {	_x1,	_x3,	_x3,	_x6,	_x0_5	},	[2]	= {	_x1,	_x2,	_x4,	_x8,	_x0_66	},	[3]	= {	_x1,	_x1_5,	_x3,	_x6,	_x0_5	},	[4]	= {	_x1,	_x3,	_x3,	_x9,	_x0_75	},	[5]	= {	_x1,	_x2,	_x2,	_x6,	_x0_5	},	[6]	= {	_x1,	_x1_5,	_x1_5,	_x4_5,	_x0_375	},}; static const struct clock_cmode __pminitconst *clock_cmodes;static int __pminitdata clock_doubled; static struct uart_port __pminitdata __frv_uart0 = {	.uartclk		= 0,	.membase		= (char *) UART0_BASE,	.irq			= IRQ_CPU_UART0,	.regshift		= 3,	.iotype			= UPIO_MEM,	.flags			= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,}; static struct uart_port __pminitdata __frv_uart1 = {	.uartclk		= 0,	.membase		= (char *) UART1_BASE,	.irq			= IRQ_CPU_UART1,	.regshift		= 3,	.iotype			= UPIO_MEM,	.flags			= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,}; #if 0static void __init printk_xampr(unsigned long ampr, unsigned long amlr, char i_d, int n){	unsigned long phys, virt, cxn, size; #ifdef CONFIG_MMU	virt = amlr & 0xffffc000;	cxn = amlr & 0x3fff;#else	virt = ampr & 0xffffc000;	cxn = 0;#endif	phys = ampr & xAMPRx_PPFN;	size = 1 << (((ampr & xAMPRx_SS) >> 4) + 17); 	printk("%cAMPR%d: va %08lx-%08lx [pa %08lx] %c%c%c%c [cxn:%04lx]\n",	       i_d, n,	       virt, virt + size - 1,	       phys,	       ampr & xAMPRx_S  ? 'S' : '-',	       ampr & xAMPRx_C  ? 'C' : '-',	       ampr & DAMPRx_WP ? 'W' : '-',	       ampr & xAMPRx_V  ? 'V' : '-',	       cxn	       );}#endif /*****************************************************************************//* * dump the memory map */static void __init dump_memory_map(void){ #if 0	/* dump the protection map */	printk_xampr(__get_IAMPR(0),  __get_IAMLR(0),  'I', 0);	printk_xampr(__get_IAMPR(1),  __get_IAMLR(1),  'I', 1);	printk_xampr(__get_IAMPR(2),  __get_IAMLR(2),  'I', 2);	printk_xampr(__get_IAMPR(3),  __get_IAMLR(3),  'I', 3);	printk_xampr(__get_IAMPR(4),  __get_IAMLR(4),  'I', 4);	printk_xampr(__get_IAMPR(5),  __get_IAMLR(5),  'I', 5);	printk_xampr(__get_IAMPR(6),  __get_IAMLR(6),  'I', 6);	printk_xampr(__get_IAMPR(7),  __get_IAMLR(7),  'I', 7);	printk_xampr(__get_IAMPR(8),  __get_IAMLR(8),  'I', 8);	printk_xampr(__get_IAMPR(9),  __get_IAMLR(9),  'i', 9);	printk_xampr(__get_IAMPR(10), __get_IAMLR(10), 'I', 10);	printk_xampr(__get_IAMPR(11), __get_IAMLR(11), 'I', 11);	printk_xampr(__get_IAMPR(12), __get_IAMLR(12), 'I', 12);	printk_xampr(__get_IAMPR(13), __get_IAMLR(13), 'I', 13);	printk_xampr(__get_IAMPR(14), __get_IAMLR(14), 'I', 14);	printk_xampr(__get_IAMPR(15), __get_IAMLR(15), 'I', 15); 	printk_xampr(__get_DAMPR(0),  __get_DAMLR(0),  'D', 0);	printk_xampr(__get_DAMPR(1),  __get_DAMLR(1),  'D', 1);	printk_xampr(__get_DAMPR(2),  __get_DAMLR(2),  'D', 2);	printk_xampr(__get_DAMPR(3),  __get_DAMLR(3),  'D', 3);	printk_xampr(__get_DAMPR(4),  __get_DAMLR(4),  'D', 4);	printk_xampr(__get_DAMPR(5),  __get_DAMLR(5),  'D', 5);	printk_xampr(__get_DAMPR(6),  __get_DAMLR(6),  'D', 6);	printk_xampr(__get_DAMPR(7),  __get_DAMLR(7),  'D', 7);	printk_xampr(__get_DAMPR(8),  __get_DAMLR(8),  'D', 8);	printk_xampr(__get_DAMPR(9),  __get_DAMLR(9),  'D', 9);	printk_xampr(__get_DAMPR(10), __get_DAMLR(10), 'D', 10);	printk_xampr(__get_DAMPR(11), __get_DAMLR(11), 'D', 11);	printk_xampr(__get_DAMPR(12), __get_DAMLR(12), 'D', 12);	printk_xampr(__get_DAMPR(13), __get_DAMLR(13), 'D', 13);	printk_xampr(__get_DAMPR(14), __get_DAMLR(14), 'D', 14);	printk_xampr(__get_DAMPR(15), __get_DAMLR(15), 'D', 15);#endif #if 0	/* dump the bus controller registers */	printk("LGCR: %08lx\n", __get_LGCR());	printk("Master: %08lx-%08lx CR=%08lx\n",	       __get_LEMBR(), __get_LEMBR() + __get_LEMAM(),	       __get_LMAICR()); 	int loop;	for (loop = 1; loop <= 7; loop++) {		unsigned long lcr = __get_LCR(loop), lsbr = __get_LSBR(loop);		printk("CS#%d: %08lx-%08lx %c%c%c%c%c%c%c%c%c\n",		       loop,		       lsbr, lsbr + __get_LSAM(loop),		       lcr & 0x80000000 ? 'r' : '-',		       lcr & 0x40000000 ? 'w' : '-',		       lcr & 0x08000000 ? 'b' : '-',		       lcr & 0x04000000 ? 'B' : '-',		       lcr & 0x02000000 ? 'C' : '-',		       lcr & 0x01000000 ? 'D' : '-',		       lcr & 0x00800000 ? 'W' : '-',		       lcr & 0x00400000 ? 'R' : '-',		       (lcr & 0x00030000) == 0x00000000 ? '4' :		       (lcr & 0x00030000) == 0x00010000 ? '2' :		       (lcr & 0x00030000) == 0x00020000 ? '1' :		       '-'		       );	}#endif #if 0	printk("\n");#endif} /* end dump_memory_map() */ /*****************************************************************************//* * attempt to detect a VDK motherboard and DAV daughter board on an MB93091 system */#ifdef CONFIG_MB93091_VDKstatic void __init detect_mb93091(void){#ifdef CONFIG_MB93090_MB00	/* Detect CB70 without motherboard */	if (!(cpu_system == __frv_mb93091_cb70 && ((*(unsigned short *)0xffc00030) & 0x100))) {		cpu_board1 = __frv_mb93090_mb00;		mb93090_mb00_detected = 1;	}#endif #ifdef CONFIG_FUJITSU_MB93493	cpu_board2 = __frv_mb93493;#endif } /* end detect_mb93091() */#endif /*****************************************************************************//* * determine the CPU type and set appropriate parameters * * Family     Series      CPU Core    Silicon    Imple  Vers * ---------------------------------------------------------- * FR-V --+-> FR400 --+-> FR401 --+-> MB93401     02     00 [1] *        |           |           | *        |           |           +-> MB93401/A   02     01 *        |           |           | *        |           |           +-> MB93403     02     02 *        |           | *        |           +-> FR405 ----> MB93405     04     00 *        | *        +-> FR450 ----> FR451 ----> MB93451     05     00 *        | *        +-> FR500 ----> FR501 --+-> MB93501     01     01 [2] *        |                       | *        |                       +-> MB93501/A   01     02 *        | *        +-> FR550 --+-> FR551 ----> MB93555     03     01 * *  [1] The MB93401 is an obsolete CPU replaced by the MB93401A *  [2] The MB93501 is an obsolete CPU replaced by the MB93501A * * Imple is PSR(Processor Status Register)[31:28]. * Vers is PSR(Processor Status Register)[27:24]. * * A "Silicon" consists of CPU core and some on-chip peripherals. */static void __init determine_cpu(void){	unsigned long hsr0 = __get_HSR(0);	unsigned long psr = __get_PSR(); 	/* work out what selectable services the CPU supports */	__set_PSR(psr | PSR_EM | PSR_EF | PSR_CM | PSR_NEM);	cpu_psr_all = __get_PSR();	__set_PSR(psr); 	__set_HSR(0, hsr0 | HSR0_GRLE | HSR0_GRHE | HSR0_FRLE | HSR0_FRHE);	cpu_hsr0_all = __get_HSR(0);	__set_HSR(0, hsr0); 	/* derive other service specs from the CPU type */	cpu_series		= "unknown";	cpu_core		= "unknown";	cpu_silicon		= "unknown";	cpu_mmu			= "Prot";	cpu_system		= __frv_unknown_system;	clock_cmodes		= NULL;	clock_doubled		= 0;#ifdef CONFIG_PM	clock_bits_settable	= CLOCK_BIT_CM_H | CLOCK_BIT_CM_M | CLOCK_BIT_P0;#endif 	switch (PSR_IMPLE(psr)) {	case PSR_IMPLE_FR401:		cpu_series	= "fr400";		cpu_core	= "fr401";		pdm_suspend_mode = HSR0_PDM_PLL_RUN; 		switch (PSR_VERSION(psr)) {		case PSR_VERSION_FR401_MB93401:			cpu_silicon	= "mb93401";			cpu_system	= __frv_mb93091_cb10;			clock_cmodes	= clock_cmodes_fr401_fr403;			clock_doubled	= 1;			break;		case PSR_VERSION_FR401_MB93401A:			cpu_silicon	= "mb93401/A";			cpu_system	= __frv_mb93091_cb11;			clock_cmodes	= clock_cmodes_fr401_fr403;			break;		case PSR_VERSION_FR401_MB93403:			cpu_silicon	= "mb93403";#ifndef CONFIG_MB93093_PDK			cpu_system	= __frv_mb93091_cb30;#else			cpu_system	= __frv_mb93093;#endif			clock_cmodes	= clock_cmodes_fr401_fr403;			break;		default:			break;		}		break; 	case PSR_IMPLE_FR405:		cpu_series	= "fr400";		cpu_core	= "fr405";		pdm_suspend_mode = HSR0_PDM_PLL_STOP; 		switch (PSR_VERSION(psr)) {		case PSR_VERSION_FR405_MB93405:			cpu_silicon	= "mb93405";			cpu_system	= __frv_mb93091_cb60;			clock_cmodes	= clock_cmodes_fr405;#ifdef CONFIG_PM			clock_bits_settable |= CLOCK_BIT_CMODE;			clock_cmodes_permitted = CLOCK_CMODES_PERMITTED_FR405;#endif 			/* the FPGA on the CB70 has extra registers			 * - it has 0x0046 in the VDK_ID FPGA register at 0x1a0, which is			 *   how we tell the difference between it and a CB60			 */			if (*(volatile unsigned short *) 0xffc001a0 == 0x0046)				cpu_system = __frv_mb93091_cb70;			break;		default:			break;		}		break; 	case PSR_IMPLE_FR451:		cpu_series	= "fr450";		cpu_core	= "fr451";		pdm_suspend_mode = HSR0_PDM_PLL_STOP;#ifdef CONFIG_PM		clock_bits_settable |= CLOCK_BIT_CMODE;		clock_cmodes_permitted = CLOCK_CMODES_PERMITTED_FR405;#endif		switch (PSR_VERSION(psr)) {		case PSR_VERSION_FR451_MB93451:			cpu_silicon	= "mb93451";			cpu_mmu		= "Prot, SAT, xSAT, DAT";			cpu_system	= __frv_mb93091_cb451;			clock_cmodes	= clock_cmodes_fr405;			break;		default:			break;		}		break; 	case PSR_IMPLE_FR501:		cpu_series	= "fr500";		cpu_core	= "fr501";		pdm_suspend_mode = HSR0_PDM_PLL_STOP; 		switch (PSR_VERSION(psr)) {		case PSR_VERSION_FR501_MB93501:  cpu_silicon = "mb93501";   break;		case PSR_VERSION_FR501_MB93501A: cpu_silicon = "mb93501/A"; break;		default:			break;		}		break; 	case PSR_IMPLE_FR551:		cpu_series	= "fr550";		cpu_core	= "fr551";		pdm_suspend_mode = HSR0_PDM_PLL_RUN; 		switch (PSR_VERSION(psr)) {		case PSR_VERSION_FR551_MB93555:			cpu_silicon	= "mb93555";			cpu_mmu		= "Prot, SAT";			cpu_system	= __frv_mb93091_cb41;			clock_cmodes	= clock_cmodes_fr555;			clock_doubled	= 1;			break;		default:			break;		}		break;

Lines 1–500 of 1178. Load more