/* * Copyright 2010 Tilera Corporation. All Rights Reserved. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation, version 2. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or * NON INFRINGEMENT. See the GNU General Public License for * more details. */ #include <linux/sched.h>#include <linux/kernel.h>#include <linux/mmzone.h>#include <linux/bootmem.h>#include <linux/module.h>#include <linux/node.h>#include <linux/cpu.h>#include <linux/ioport.h>#include <linux/irq.h>#include <linux/kexec.h>#include <linux/pci.h>#include <linux/swiotlb.h>#include <linux/initrd.h>#include <linux/io.h>#include <linux/highmem.h>#include <linux/smp.h>#include <linux/timex.h>#include <linux/hugetlb.h>#include <linux/start_kernel.h>#include <linux/screen_info.h>#include <linux/tick.h>#include <asm/setup.h>#include <asm/sections.h>#include <asm/cacheflush.h>#include <asm/pgalloc.h>#include <asm/mmu_context.h>#include <hv/hypervisor.h>#include <arch/interrupts.h> /* <linux/smp.h> doesn't provide this definition. */#ifndef CONFIG_SMP#define setup_max_cpus 1#endif static inline int ABS(int x) { return x >= 0 ? x : -x; } /* Chip information */char chip_model[64] __write_once; #ifdef CONFIG_VTstruct screen_info screen_info;#endif struct pglist_data node_data[MAX_NUMNODES] __read_mostly;EXPORT_SYMBOL(node_data); /* Information on the NUMA nodes that we compute early */unsigned long node_start_pfn[MAX_NUMNODES];unsigned long node_end_pfn[MAX_NUMNODES];unsigned long __initdata node_memmap_pfn[MAX_NUMNODES];unsigned long __initdata node_percpu_pfn[MAX_NUMNODES];unsigned long __initdata node_free_pfn[MAX_NUMNODES]; static unsigned long __initdata node_percpu[MAX_NUMNODES]; /* * per-CPU stack and boot info. */DEFINE_PER_CPU(unsigned long, boot_sp) = (unsigned long)init_stack + THREAD_SIZE - STACK_TOP_DELTA; #ifdef CONFIG_SMPDEFINE_PER_CPU(unsigned long, boot_pc) = (unsigned long)start_kernel;#else/* * The variable must be __initdata since it references __init code. * With CONFIG_SMP it is per-cpu data, which is exempt from validation. */unsigned long __initdata boot_pc = (unsigned long)start_kernel;#endif #ifdef CONFIG_HIGHMEM/* Page frame index of end of lowmem on each controller. */unsigned long node_lowmem_end_pfn[MAX_NUMNODES]; /* Number of pages that can be mapped into lowmem. */static unsigned long __initdata mappable_physpages;#endif /* Data on which physical memory controller corresponds to which NUMA node */int node_controller[MAX_NUMNODES] = { [0 ... MAX_NUMNODES-1] = -1 }; #ifdef CONFIG_HIGHMEM/* Map information from VAs to PAs */unsigned long pbase_map[1 << (32 - HPAGE_SHIFT)] __write_once __attribute__((aligned(L2_CACHE_BYTES)));EXPORT_SYMBOL(pbase_map); /* Map information from PAs to VAs */void *vbase_map[NR_PA_HIGHBIT_VALUES] __write_once __attribute__((aligned(L2_CACHE_BYTES)));EXPORT_SYMBOL(vbase_map);#endif /* Node number as a function of the high PA bits */int highbits_to_node[NR_PA_HIGHBIT_VALUES] __write_once;EXPORT_SYMBOL(highbits_to_node); static unsigned int __initdata maxmem_pfn = -1U;static unsigned int __initdata maxnodemem_pfn[MAX_NUMNODES] = { [0 ... MAX_NUMNODES-1] = -1U};static nodemask_t __initdata isolnodes; #if defined(CONFIG_PCI) && !defined(__tilegx__)enum { DEFAULT_PCI_RESERVE_MB = 64 };static unsigned int __initdata pci_reserve_mb = DEFAULT_PCI_RESERVE_MB;unsigned long __initdata pci_reserve_start_pfn = -1U;unsigned long __initdata pci_reserve_end_pfn = -1U;#endif static int __init setup_maxmem(char *str){ unsigned long long maxmem; if (str == NULL || (maxmem = memparse(str, NULL)) == 0) return -EINVAL; maxmem_pfn = (maxmem >> HPAGE_SHIFT) << (HPAGE_SHIFT - PAGE_SHIFT); pr_info("Forcing RAM used to no more than %dMB\n", maxmem_pfn >> (20 - PAGE_SHIFT)); return 0;}early_param("maxmem", setup_maxmem); static int __init setup_maxnodemem(char *str){ char *endp; unsigned long long maxnodemem; long node; node = str ? simple_strtoul(str, &endp, 0) : INT_MAX; if (node >= MAX_NUMNODES || *endp != ':') return -EINVAL; maxnodemem = memparse(endp+1, NULL); maxnodemem_pfn[node] = (maxnodemem >> HPAGE_SHIFT) << (HPAGE_SHIFT - PAGE_SHIFT); pr_info("Forcing RAM used on node %ld to no more than %dMB\n", node, maxnodemem_pfn[node] >> (20 - PAGE_SHIFT)); return 0;}early_param("maxnodemem", setup_maxnodemem); struct memmap_entry { u64 addr; /* start of memory segment */ u64 size; /* size of memory segment */};static struct memmap_entry memmap_map[64];static int memmap_nr; static void add_memmap_region(u64 addr, u64 size){ if (memmap_nr >= ARRAY_SIZE(memmap_map)) { pr_err("Ooops! Too many entries in the memory map!\n"); return; } memmap_map[memmap_nr].addr = addr; memmap_map[memmap_nr].size = size; memmap_nr++;} static int __init setup_memmap(char *p){ char *oldp; u64 start_at, mem_size; if (!p) return -EINVAL; if (!strncmp(p, "exactmap", 8)) { pr_err("\"memmap=exactmap\" not valid on tile\n"); return 0; } oldp = p; mem_size = memparse(p, &p); if (p == oldp) return -EINVAL; if (*p == '@') { pr_err("\"memmap=nn@ss\" (force RAM) invalid on tile\n"); } else if (*p == '#') { pr_err("\"memmap=nn#ss\" (force ACPI data) invalid on tile\n"); } else if (*p == '$') { start_at = memparse(p+1, &p); add_memmap_region(start_at, mem_size); } else { if (mem_size == 0) return -EINVAL; maxmem_pfn = (mem_size >> HPAGE_SHIFT) << (HPAGE_SHIFT - PAGE_SHIFT); } return *p == '\0' ? 0 : -EINVAL;}early_param("memmap", setup_memmap); static int __init setup_mem(char *str){ return setup_maxmem(str);}early_param("mem", setup_mem); /* compatibility with x86 */ static int __init setup_isolnodes(char *str){ if (str == NULL || nodelist_parse(str, isolnodes) != 0) return -EINVAL; pr_info("Set isolnodes value to '%*pbl'\n", nodemask_pr_args(&isolnodes)); return 0;}early_param("isolnodes", setup_isolnodes); #if defined(CONFIG_PCI) && !defined(__tilegx__)static int __init setup_pci_reserve(char* str){ if (str == NULL || kstrtouint(str, 0, &pci_reserve_mb) != 0 || pci_reserve_mb > 3 * 1024) return -EINVAL; pr_info("Reserving %dMB for PCIE root complex mappings\n", pci_reserve_mb); return 0;}early_param("pci_reserve", setup_pci_reserve);#endif #ifndef __tilegx__/* * vmalloc=size forces the vmalloc area to be exactly 'size' bytes. * This can be used to increase (or decrease) the vmalloc area. */static int __init parse_vmalloc(char *arg){ if (!arg) return -EINVAL; VMALLOC_RESERVE = (memparse(arg, &arg) + PGDIR_SIZE - 1) & PGDIR_MASK; /* See validate_va() for more on this test. */ if ((long)_VMALLOC_START >= 0) early_panic("\"vmalloc=%#lx\" value too large: maximum %#lx\n", VMALLOC_RESERVE, _VMALLOC_END - 0x80000000UL); return 0;}early_param("vmalloc", parse_vmalloc);#endif #ifdef CONFIG_HIGHMEM/* * Determine for each controller where its lowmem is mapped and how much of * it is mapped there. On controller zero, the first few megabytes are * already mapped in as code at MEM_SV_START, so in principle we could * start our data mappings higher up, but for now we don't bother, to avoid * additional confusion. * * One question is whether, on systems with more than 768 Mb and * controllers of different sizes, to map in a proportionate amount of * each one, or to try to map the same amount from each controller. * (E.g. if we have three controllers with 256MB, 1GB, and 256MB * respectively, do we map 256MB from each, or do we map 128 MB, 512 * MB, and 128 MB respectively?) For now we use a proportionate * solution like the latter. * * The VA/PA mapping demands that we align our decisions at 16 MB * boundaries so that we can rapidly convert VA to PA. */static void *__init setup_pa_va_mapping(void){ unsigned long curr_pages = 0; unsigned long vaddr = PAGE_OFFSET; nodemask_t highonlynodes = isolnodes; int i, j; memset(pbase_map, -1, sizeof(pbase_map)); memset(vbase_map, -1, sizeof(vbase_map)); /* Node zero cannot be isolated for LOWMEM purposes. */ node_clear(0, highonlynodes); /* Count up the number of pages on non-highonlynodes controllers. */ mappable_physpages = 0; for_each_online_node(i) { if (!node_isset(i, highonlynodes)) mappable_physpages += node_end_pfn[i] - node_start_pfn[i]; } for_each_online_node(i) { unsigned long start = node_start_pfn[i]; unsigned long end = node_end_pfn[i]; unsigned long size = end - start; unsigned long vaddr_end; if (node_isset(i, highonlynodes)) { /* Mark this controller as having no lowmem. */ node_lowmem_end_pfn[i] = start; continue; } curr_pages += size; if (mappable_physpages > MAXMEM_PFN) { vaddr_end = PAGE_OFFSET + (((u64)curr_pages * MAXMEM_PFN / mappable_physpages) << PAGE_SHIFT); } else { vaddr_end = PAGE_OFFSET + (curr_pages << PAGE_SHIFT); } for (j = 0; vaddr < vaddr_end; vaddr += HPAGE_SIZE, ++j) { unsigned long this_pfn = start + (j << HUGETLB_PAGE_ORDER); pbase_map[vaddr >> HPAGE_SHIFT] = this_pfn; if (vbase_map[__pfn_to_highbits(this_pfn)] == (void *)-1) vbase_map[__pfn_to_highbits(this_pfn)] = (void *)(vaddr & HPAGE_MASK); } node_lowmem_end_pfn[i] = start + (j << HUGETLB_PAGE_ORDER); BUG_ON(node_lowmem_end_pfn[i] > end); } /* Return highest address of any mapped memory. */ return (void *)vaddr;}#endif /* CONFIG_HIGHMEM */ /* * Register our most important memory mappings with the debug stub. * * This is up to 4 mappings for lowmem, one mapping per memory * controller, plus one for our text segment. */static void store_permanent_mappings(void){ int i; for_each_online_node(i) { HV_PhysAddr pa = ((HV_PhysAddr)node_start_pfn[i]) << PAGE_SHIFT;#ifdef CONFIG_HIGHMEM HV_PhysAddr high_mapped_pa = node_lowmem_end_pfn[i];#else HV_PhysAddr high_mapped_pa = node_end_pfn[i];#endif unsigned long pages = high_mapped_pa - node_start_pfn[i]; HV_VirtAddr addr = (HV_VirtAddr) __va(pa); hv_store_mapping(addr, pages << PAGE_SHIFT, pa); } hv_store_mapping((HV_VirtAddr)_text, (uint32_t)(_einittext - _text), 0);} /* * Use hv_inquire_physical() to populate node_{start,end}_pfn[] * and node_online_map, doing suitable sanity-checking. * Also set min_low_pfn, max_low_pfn, and max_pfn. */static void __init setup_memory(void){ int i, j; int highbits_seen[NR_PA_HIGHBIT_VALUES] = { 0 };#ifdef CONFIG_HIGHMEM long highmem_pages;#endif#ifndef __tilegx__ int cap;#endif#if defined(CONFIG_HIGHMEM) || defined(__tilegx__) long lowmem_pages;#endif unsigned long physpages = 0; /* We are using a char to hold the cpu_2_node[] mapping */ BUILD_BUG_ON(MAX_NUMNODES > 127); /* Discover the ranges of memory available to us */ for (i = 0; ; ++i) { unsigned long start, size, end, highbits; HV_PhysAddrRange range = hv_inquire_physical(i); if (range.size == 0) break;#ifdef CONFIG_FLATMEM if (i > 0) { pr_err("Can't use discontiguous PAs: %#llx..%#llx\n", range.size, range.start + range.size); continue; }#endif#ifndef __tilegx__ if ((unsigned long)range.start) { pr_err("Range not at 4GB multiple: %#llx..%#llx\n", range.start, range.start + range.size); continue; }#endif if ((range.start & (HPAGE_SIZE-1)) != 0 || (range.size & (HPAGE_SIZE-1)) != 0) { unsigned long long start_pa = range.start; unsigned long long orig_size = range.size; range.start = (start_pa + HPAGE_SIZE - 1) & HPAGE_MASK; range.size -= (range.start - start_pa); range.size &= HPAGE_MASK; pr_err("Range not hugepage-aligned: %#llx..%#llx: now %#llx-%#llx\n", start_pa, start_pa + orig_size, range.start, range.start + range.size); } highbits = __pa_to_highbits(range.start); if (highbits >= NR_PA_HIGHBIT_VALUES) { pr_err("PA high bits too high: %#llx..%#llx\n", range.start, range.start + range.size); continue; } if (highbits_seen[highbits]) { pr_err("Range overlaps in high bits: %#llx..%#llx\n", range.start, range.start + range.size); continue; } highbits_seen[highbits] = 1; if (PFN_DOWN(range.size) > maxnodemem_pfn[i]) { int max_size = maxnodemem_pfn[i]; if (max_size > 0) { pr_err("Maxnodemem reduced node %d to %d pages\n", i, max_size); range.size = PFN_PHYS(max_size); } else { pr_err("Maxnodemem disabled node %d\n", i); continue; } } if (physpages + PFN_DOWN(range.size) > maxmem_pfn) { int max_size = maxmem_pfn - physpages; if (max_size > 0) { pr_err("Maxmem reduced node %d to %d pages\n", i, max_size); range.size = PFN_PHYS(max_size); } else { pr_err("Maxmem disabled node %d\n", i); continue; } } if (i >= MAX_NUMNODES) { pr_err("Too many PA nodes (#%d): %#llx...%#llx\n", i, range.size, range.size + range.start); continue; } start = range.start >> PAGE_SHIFT; size = range.size >> PAGE_SHIFT; end = start + size; #ifndef __tilegx__ if (((HV_PhysAddr)end << PAGE_SHIFT) != (range.start + range.size)) { pr_err("PAs too high to represent: %#llx..%#llx\n", range.start, range.start + range.size); continue; }#endif#if defined(CONFIG_PCI) && !defined(__tilegx__) /* * Blocks that overlap the pci reserved region must * have enough space to hold the maximum percpu data * region at the top of the range. If there isn't * enough space above the reserved region, just * truncate the node. */ if (start <= pci_reserve_start_pfn && end > pci_reserve_start_pfn) { unsigned int per_cpu_size = __per_cpu_end - __per_cpu_start; unsigned int percpu_pages = NR_CPUS * (PFN_UP(per_cpu_size) >> PAGE_SHIFT); if (end < pci_reserve_end_pfn + percpu_pages) { end = pci_reserve_start_pfn; pr_err("PCI mapping region reduced node %d to %ld pages\n", i, end - start); } }#endif for (j = __pfn_to_highbits(start); j <= __pfn_to_highbits(end - 1); j++) highbits_to_node[j] = i;Lines 1–500 of 1740. Load more
/* * Copyright 2010 Tilera Corporation. All Rights Reserved. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation, version 2. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or * NON INFRINGEMENT. See the GNU General Public License for * more details. */ #include <linux/sched.h> #include <linux/kernel.h> #include <linux/mmzone.h> #include <linux/bootmem.h> #include <linux/module.h> #include <linux/node.h> #include <linux/cpu.h> #include <linux/ioport.h> #include <linux/irq.h> #include <linux/kexec.h> #include <linux/pci.h> #include <linux/swiotlb.h> #include <linux/initrd.h> #include <linux/io.h> #include <linux/highmem.h> #include <linux/smp.h> #include <linux/timex.h> #include <linux/hugetlb.h> #include <linux/start_kernel.h> #include <linux/screen_info.h> #include <linux/tick.h> #include <asm/setup.h> #include <asm/sections.h> #include <asm/cacheflush.h> #include <asm/pgalloc.h> #include <asm/mmu_context.h> #include <hv/hypervisor.h> #include <arch/interrupts.h> /* <linux/smp.h> doesn't provide this definition. */ #ifndef CONFIG_SMP #define setup_max_cpus 1 #endif static inline int ABS(int x) { return x >= 0 ? x : -x; } /* Chip information */ char chip_model[64] __write_once; #ifdef CONFIG_VT struct screen_info screen_info; #endif struct pglist_data node_data[MAX_NUMNODES] __read_mostly; EXPORT_SYMBOL(node_data); /* Information on the NUMA nodes that we compute early */ unsigned long node_start_pfn[MAX_NUMNODES]; unsigned long node_end_pfn[MAX_NUMNODES]; unsigned long __initdata node_memmap_pfn[MAX_NUMNODES]; unsigned long __initdata node_percpu_pfn[MAX_NUMNODES]; unsigned long __initdata node_free_pfn[MAX_NUMNODES]; static unsigned long __initdata node_percpu[MAX_NUMNODES]; /* * per-CPU stack and boot info. */ DEFINE_PER_CPU(unsigned long, boot_sp) = (unsigned long)init_stack + THREAD_SIZE - STACK_TOP_DELTA; #ifdef CONFIG_SMP DEFINE_PER_CPU(unsigned long, boot_pc) = (unsigned long)start_kernel; #else /* * The variable must be __initdata since it references __init code. * With CONFIG_SMP it is per-cpu data, which is exempt from validation. */ unsigned long __initdata boot_pc = (unsigned long)start_kernel; #endif #ifdef CONFIG_HIGHMEM /* Page frame index of end of lowmem on each controller. */ unsigned long node_lowmem_end_pfn[MAX_NUMNODES]; /* Number of pages that can be mapped into lowmem. */ static unsigned long __initdata mappable_physpages; #endif /* Data on which physical memory controller corresponds to which NUMA node */ int node_controller[MAX_NUMNODES] = { [0 ... MAX_NUMNODES-1] = -1 }; #ifdef CONFIG_HIGHMEM /* Map information from VAs to PAs */ unsigned long pbase_map[1 << (32 - HPAGE_SHIFT)] __write_once __attribute__((aligned(L2_CACHE_BYTES))); EXPORT_SYMBOL(pbase_map); /* Map information from PAs to VAs */ void *vbase_map[NR_PA_HIGHBIT_VALUES] __write_once __attribute__((aligned(L2_CACHE_BYTES))); EXPORT_SYMBOL(vbase_map); #endif /* Node number as a function of the high PA bits */ int highbits_to_node[NR_PA_HIGHBIT_VALUES] __write_once; EXPORT_SYMBOL(highbits_to_node); static unsigned int __initdata maxmem_pfn = -1U; static unsigned int __initdata maxnodemem_pfn[MAX_NUMNODES] = { [0 ... MAX_NUMNODES-1] = -1U }; static nodemask_t __initdata isolnodes; #if defined(CONFIG_PCI) && !defined(__tilegx__) enum { DEFAULT_PCI_RESERVE_MB = 64 }; static unsigned int __initdata pci_reserve_mb = DEFAULT_PCI_RESERVE_MB; unsigned long __initdata pci_reserve_start_pfn = -1U; unsigned long __initdata pci_reserve_end_pfn = -1U; #endif static int __init setup_maxmem(char *str) { unsigned long long maxmem; if (str == NULL || (maxmem = memparse(str, NULL)) == 0) return -EINVAL; maxmem_pfn = (maxmem >> HPAGE_SHIFT) << (HPAGE_SHIFT - PAGE_SHIFT); pr_info("Forcing RAM used to no more than %dMB\n", maxmem_pfn >> (20 - PAGE_SHIFT)); return 0; } early_param("maxmem", setup_maxmem); static int __init setup_maxnodemem(char *str) { char *endp; unsigned long long maxnodemem; long node; node = str ? simple_strtoul(str, &endp, 0) : INT_MAX; if (node >= MAX_NUMNODES || *endp != ':') return -EINVAL; maxnodemem = memparse(endp+1, NULL); maxnodemem_pfn[node] = (maxnodemem >> HPAGE_SHIFT) << (HPAGE_SHIFT - PAGE_SHIFT); pr_info("Forcing RAM used on node %ld to no more than %dMB\n", node, maxnodemem_pfn[node] >> (20 - PAGE_SHIFT)); return 0; } early_param("maxnodemem", setup_maxnodemem); struct memmap_entry { u64 addr; /* start of memory segment */ u64 size; /* size of memory segment */ }; static struct memmap_entry memmap_map[64]; static int memmap_nr; static void add_memmap_region(u64 addr, u64 size) { if (memmap_nr >= ARRAY_SIZE(memmap_map)) { pr_err("Ooops! Too many entries in the memory map!\n"); return; } memmap_map[memmap_nr].addr = addr; memmap_map[memmap_nr].size = size; memmap_nr++; } static int __init setup_memmap(char *p) { char *oldp; u64 start_at, mem_size; if (!p) return -EINVAL; if (!strncmp(p, "exactmap", 8)) { pr_err("\"memmap=exactmap\" not valid on tile\n"); return 0; } oldp = p; mem_size = memparse(p, &p); if (p == oldp) return -EINVAL; if (*p == '@') { pr_err("\"memmap=nn@ss\" (force RAM) invalid on tile\n"); } else if (*p == '#') { pr_err("\"memmap=nn#ss\" (force ACPI data) invalid on tile\n"); } else if (*p == '$') { start_at = memparse(p+1, &p); add_memmap_region(start_at, mem_size); } else { if (mem_size == 0) return -EINVAL; maxmem_pfn = (mem_size >> HPAGE_SHIFT) << (HPAGE_SHIFT - PAGE_SHIFT); } return *p == '\0' ? 0 : -EINVAL; } early_param("memmap", setup_memmap); static int __init setup_mem(char *str) { return setup_maxmem(str); } early_param("mem", setup_mem); /* compatibility with x86 */ static int __init setup_isolnodes(char *str) { if (str == NULL || nodelist_parse(str, isolnodes) != 0) return -EINVAL; pr_info("Set isolnodes value to '%*pbl'\n", nodemask_pr_args(&isolnodes)); return 0; } early_param("isolnodes", setup_isolnodes); #if defined(CONFIG_PCI) && !defined(__tilegx__) static int __init setup_pci_reserve(char* str) { if (str == NULL || kstrtouint(str, 0, &pci_reserve_mb) != 0 || pci_reserve_mb > 3 * 1024) return -EINVAL; pr_info("Reserving %dMB for PCIE root complex mappings\n", pci_reserve_mb); return 0; } early_param("pci_reserve", setup_pci_reserve); #endif #ifndef __tilegx__ /* * vmalloc=size forces the vmalloc area to be exactly 'size' bytes. * This can be used to increase (or decrease) the vmalloc area. */ static int __init parse_vmalloc(char *arg) { if (!arg) return -EINVAL; VMALLOC_RESERVE = (memparse(arg, &arg) + PGDIR_SIZE - 1) & PGDIR_MASK; /* See validate_va() for more on this test. */ if ((long)_VMALLOC_START >= 0) early_panic("\"vmalloc=%#lx\" value too large: maximum %#lx\n", VMALLOC_RESERVE, _VMALLOC_END - 0x80000000UL); return 0; } early_param("vmalloc", parse_vmalloc); #endif #ifdef CONFIG_HIGHMEM /* * Determine for each controller where its lowmem is mapped and how much of * it is mapped there. On controller zero, the first few megabytes are * already mapped in as code at MEM_SV_START, so in principle we could * start our data mappings higher up, but for now we don't bother, to avoid * additional confusion. * * One question is whether, on systems with more than 768 Mb and * controllers of different sizes, to map in a proportionate amount of * each one, or to try to map the same amount from each controller. * (E.g. if we have three controllers with 256MB, 1GB, and 256MB * respectively, do we map 256MB from each, or do we map 128 MB, 512 * MB, and 128 MB respectively?) For now we use a proportionate * solution like the latter. * * The VA/PA mapping demands that we align our decisions at 16 MB * boundaries so that we can rapidly convert VA to PA. */ static void *__init setup_pa_va_mapping(void) { unsigned long curr_pages = 0; unsigned long vaddr = PAGE_OFFSET; nodemask_t highonlynodes = isolnodes; int i, j; memset(pbase_map, -1, sizeof(pbase_map)); memset(vbase_map, -1, sizeof(vbase_map)); /* Node zero cannot be isolated for LOWMEM purposes. */ node_clear(0, highonlynodes); /* Count up the number of pages on non-highonlynodes controllers. */ mappable_physpages = 0; for_each_online_node(i) { if (!node_isset(i, highonlynodes)) mappable_physpages += node_end_pfn[i] - node_start_pfn[i]; } for_each_online_node(i) { unsigned long start = node_start_pfn[i]; unsigned long end = node_end_pfn[i]; unsigned long size = end - start; unsigned long vaddr_end; if (node_isset(i, highonlynodes)) { /* Mark this controller as having no lowmem. */ node_lowmem_end_pfn[i] = start; continue; } curr_pages += size; if (mappable_physpages > MAXMEM_PFN) { vaddr_end = PAGE_OFFSET + (((u64)curr_pages * MAXMEM_PFN / mappable_physpages) << PAGE_SHIFT); } else { vaddr_end = PAGE_OFFSET + (curr_pages << PAGE_SHIFT); } for (j = 0; vaddr < vaddr_end; vaddr += HPAGE_SIZE, ++j) { unsigned long this_pfn = start + (j << HUGETLB_PAGE_ORDER); pbase_map[vaddr >> HPAGE_SHIFT] = this_pfn; if (vbase_map[__pfn_to_highbits(this_pfn)] == (void *)-1) vbase_map[__pfn_to_highbits(this_pfn)] = (void *)(vaddr & HPAGE_MASK); } node_lowmem_end_pfn[i] = start + (j << HUGETLB_PAGE_ORDER); BUG_ON(node_lowmem_end_pfn[i] > end); } /* Return highest address of any mapped memory. */ return (void *)vaddr; } #endif /* CONFIG_HIGHMEM */ /* * Register our most important memory mappings with the debug stub. * * This is up to 4 mappings for lowmem, one mapping per memory * controller, plus one for our text segment. */ static void store_permanent_mappings(void) { int i; for_each_online_node(i) { HV_PhysAddr pa = ((HV_PhysAddr)node_start_pfn[i]) << PAGE_SHIFT; #ifdef CONFIG_HIGHMEM HV_PhysAddr high_mapped_pa = node_lowmem_end_pfn[i]; #else HV_PhysAddr high_mapped_pa = node_end_pfn[i]; #endif unsigned long pages = high_mapped_pa - node_start_pfn[i]; HV_VirtAddr addr = (HV_VirtAddr) __va(pa); hv_store_mapping(addr, pages << PAGE_SHIFT, pa); } hv_store_mapping((HV_VirtAddr)_text, (uint32_t)(_einittext - _text), 0); } /* * Use hv_inquire_physical() to populate node_{start,end}_pfn[] * and node_online_map, doing suitable sanity-checking. * Also set min_low_pfn, max_low_pfn, and max_pfn. */ static void __init setup_memory(void) { int i, j; int highbits_seen[NR_PA_HIGHBIT_VALUES] = { 0 }; #ifdef CONFIG_HIGHMEM long highmem_pages; #endif #ifndef __tilegx__ int cap; #endif #if defined(CONFIG_HIGHMEM) || defined(__tilegx__) long lowmem_pages; #endif unsigned long physpages = 0; /* We are using a char to hold the cpu_2_node[] mapping */ BUILD_BUG_ON(MAX_NUMNODES > 127); /* Discover the ranges of memory available to us */ for (i = 0; ; ++i) { unsigned long start, size, end, highbits; HV_PhysAddrRange range = hv_inquire_physical(i); if (range.size == 0) break; #ifdef CONFIG_FLATMEM if (i > 0) { pr_err("Can't use discontiguous PAs: %#llx..%#llx\n", range.size, range.start + range.size); continue; } #endif #ifndef __tilegx__ if ((unsigned long)range.start) { pr_err("Range not at 4GB multiple: %#llx..%#llx\n", range.start, range.start + range.size); continue; } #endif if ((range.start & (HPAGE_SIZE-1)) != 0 || (range.size & (HPAGE_SIZE-1)) != 0) { unsigned long long start_pa = range.start; unsigned long long orig_size = range.size; range.start = (start_pa + HPAGE_SIZE - 1) & HPAGE_MASK; range.size -= (range.start - start_pa); range.size &= HPAGE_MASK; pr_err("Range not hugepage-aligned: %#llx..%#llx: now %#llx-%#llx\n", start_pa, start_pa + orig_size, range.start, range.start + range.size); } highbits = __pa_to_highbits(range.start); if (highbits >= NR_PA_HIGHBIT_VALUES) { pr_err("PA high bits too high: %#llx..%#llx\n", range.start, range.start + range.size); continue; } if (highbits_seen[highbits]) { pr_err("Range overlaps in high bits: %#llx..%#llx\n", range.start, range.start + range.size); continue; } highbits_seen[highbits] = 1; if (PFN_DOWN(range.size) > maxnodemem_pfn[i]) { int max_size = maxnodemem_pfn[i]; if (max_size > 0) { pr_err("Maxnodemem reduced node %d to %d pages\n", i, max_size); range.size = PFN_PHYS(max_size); } else { pr_err("Maxnodemem disabled node %d\n", i); continue; } } if (physpages + PFN_DOWN(range.size) > maxmem_pfn) { int max_size = maxmem_pfn - physpages; if (max_size > 0) { pr_err("Maxmem reduced node %d to %d pages\n", i, max_size); range.size = PFN_PHYS(max_size); } else { pr_err("Maxmem disabled node %d\n", i); continue; } } if (i >= MAX_NUMNODES) { pr_err("Too many PA nodes (#%d): %#llx...%#llx\n", i, range.size, range.size + range.start); continue; } start = range.start >> PAGE_SHIFT; size = range.size >> PAGE_SHIFT; end = start + size; #ifndef __tilegx__ if (((HV_PhysAddr)end << PAGE_SHIFT) != (range.start + range.size)) { pr_err("PAs too high to represent: %#llx..%#llx\n", range.start, range.start + range.size); continue; } #endif #if defined(CONFIG_PCI) && !defined(__tilegx__) /* * Blocks that overlap the pci reserved region must * have enough space to hold the maximum percpu data * region at the top of the range. If there isn't * enough space above the reserved region, just * truncate the node. */ if (start <= pci_reserve_start_pfn && end > pci_reserve_start_pfn) { unsigned int per_cpu_size = __per_cpu_end - __per_cpu_start; unsigned int percpu_pages = NR_CPUS * (PFN_UP(per_cpu_size) >> PAGE_SHIFT); if (end < pci_reserve_end_pfn + percpu_pages) { end = pci_reserve_start_pfn; pr_err("PCI mapping region reduced node %d to %ld pages\n", i, end - start); } } #endif for (j = __pfn_to_highbits(start); j <= __pfn_to_highbits(end - 1); j++) highbits_to_node[j] = i;