/* * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Rafał Miłecki <zajec5@gmail.com> *          Alex Deucher <alexdeucher@gmail.com> */#include <drm/drmP.h>#include "amdgpu.h"#include "amdgpu_drv.h"#include "amdgpu_pm.h"#include "amdgpu_dpm.h"#include "atom.h"#include <linux/power_supply.h>#include <linux/hwmon.h>#include <linux/hwmon-sysfs.h> #include "amd_powerplay.h" static int amdgpu_debugfs_pm_init(struct amdgpu_device *adev); void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev){	if (adev->pp_enabled)		/* TODO */		return; 	if (adev->pm.dpm_enabled) {		mutex_lock(&adev->pm.mutex);		if (power_supply_is_system_supplied() > 0)			adev->pm.dpm.ac_power = true;		else			adev->pm.dpm.ac_power = false;		if (adev->pm.funcs->enable_bapm)			amdgpu_dpm_enable_bapm(adev, adev->pm.dpm.ac_power);		mutex_unlock(&adev->pm.mutex);	}} static ssize_t amdgpu_get_dpm_state(struct device *dev,				    struct device_attribute *attr,				    char *buf){	struct drm_device *ddev = dev_get_drvdata(dev);	struct amdgpu_device *adev = ddev->dev_private;	enum amd_pm_state_type pm; 	if (adev->pp_enabled) {		pm = amdgpu_dpm_get_current_power_state(adev);	} else		pm = adev->pm.dpm.user_state; 	return snprintf(buf, PAGE_SIZE, "%s\n",			(pm == POWER_STATE_TYPE_BATTERY) ? "battery" :			(pm == POWER_STATE_TYPE_BALANCED) ? "balanced" : "performance");} static ssize_t amdgpu_set_dpm_state(struct device *dev,				    struct device_attribute *attr,				    const char *buf,				    size_t count){	struct drm_device *ddev = dev_get_drvdata(dev);	struct amdgpu_device *adev = ddev->dev_private;	enum amd_pm_state_type  state; 	if (strncmp("battery", buf, strlen("battery")) == 0)		state = POWER_STATE_TYPE_BATTERY;	else if (strncmp("balanced", buf, strlen("balanced")) == 0)		state = POWER_STATE_TYPE_BALANCED;	else if (strncmp("performance", buf, strlen("performance")) == 0)		state = POWER_STATE_TYPE_PERFORMANCE;	else {		count = -EINVAL;		goto fail;	} 	if (adev->pp_enabled) {		amdgpu_dpm_dispatch_task(adev, AMD_PP_EVENT_ENABLE_USER_STATE, &state, NULL);	} else {		mutex_lock(&adev->pm.mutex);		adev->pm.dpm.user_state = state;		mutex_unlock(&adev->pm.mutex); 		/* Can't set dpm state when the card is off */		if (!(adev->flags & AMD_IS_PX) ||		    (ddev->switch_power_state == DRM_SWITCH_POWER_ON))			amdgpu_pm_compute_clocks(adev);	}fail:	return count;} static ssize_t amdgpu_get_dpm_forced_performance_level(struct device *dev,						struct device_attribute *attr,								char *buf){	struct drm_device *ddev = dev_get_drvdata(dev);	struct amdgpu_device *adev = ddev->dev_private; 	if  ((adev->flags & AMD_IS_PX) &&	     (ddev->switch_power_state != DRM_SWITCH_POWER_ON))		return snprintf(buf, PAGE_SIZE, "off\n"); 	if (adev->pp_enabled) {		enum amd_dpm_forced_level level; 		level = amdgpu_dpm_get_performance_level(adev);		return snprintf(buf, PAGE_SIZE, "%s\n",				(level == AMD_DPM_FORCED_LEVEL_AUTO) ? "auto" :				(level == AMD_DPM_FORCED_LEVEL_LOW) ? "low" :				(level == AMD_DPM_FORCED_LEVEL_HIGH) ? "high" :				(level == AMD_DPM_FORCED_LEVEL_MANUAL) ? "manual" : "unknown");	} else {		enum amdgpu_dpm_forced_level level; 		level = adev->pm.dpm.forced_level;		return snprintf(buf, PAGE_SIZE, "%s\n",				(level == AMDGPU_DPM_FORCED_LEVEL_AUTO) ? "auto" :				(level == AMDGPU_DPM_FORCED_LEVEL_LOW) ? "low" : "high");	}} static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev,						       struct device_attribute *attr,						       const char *buf,						       size_t count){	struct drm_device *ddev = dev_get_drvdata(dev);	struct amdgpu_device *adev = ddev->dev_private;	enum amdgpu_dpm_forced_level level;	int ret = 0; 	/* Can't force performance level when the card is off */	if  ((adev->flags & AMD_IS_PX) &&	     (ddev->switch_power_state != DRM_SWITCH_POWER_ON))		return -EINVAL; 	if (strncmp("low", buf, strlen("low")) == 0) {		level = AMDGPU_DPM_FORCED_LEVEL_LOW;	} else if (strncmp("high", buf, strlen("high")) == 0) {		level = AMDGPU_DPM_FORCED_LEVEL_HIGH;	} else if (strncmp("auto", buf, strlen("auto")) == 0) {		level = AMDGPU_DPM_FORCED_LEVEL_AUTO;	} else if (strncmp("manual", buf, strlen("manual")) == 0) {		level = AMDGPU_DPM_FORCED_LEVEL_MANUAL;	} else {		count = -EINVAL;		goto fail;	} 	if (adev->pp_enabled)		amdgpu_dpm_force_performance_level(adev, level);	else {		mutex_lock(&adev->pm.mutex);		if (adev->pm.dpm.thermal_active) {			count = -EINVAL;			mutex_unlock(&adev->pm.mutex);			goto fail;		}		ret = amdgpu_dpm_force_performance_level(adev, level);		if (ret)			count = -EINVAL;		else			adev->pm.dpm.forced_level = level;		mutex_unlock(&adev->pm.mutex);	}fail:	return count;} static ssize_t amdgpu_get_pp_num_states(struct device *dev,		struct device_attribute *attr,		char *buf){	struct drm_device *ddev = dev_get_drvdata(dev);	struct amdgpu_device *adev = ddev->dev_private;	struct pp_states_info data;	int i, buf_len; 	if (adev->pp_enabled)		amdgpu_dpm_get_pp_num_states(adev, &data); 	buf_len = snprintf(buf, PAGE_SIZE, "states: %d\n", data.nums);	for (i = 0; i < data.nums; i++)		buf_len += snprintf(buf + buf_len, PAGE_SIZE, "%d %s\n", i,				(data.states[i] == POWER_STATE_TYPE_INTERNAL_BOOT) ? "boot" :				(data.states[i] == POWER_STATE_TYPE_BATTERY) ? "battery" :				(data.states[i] == POWER_STATE_TYPE_BALANCED) ? "balanced" :				(data.states[i] == POWER_STATE_TYPE_PERFORMANCE) ? "performance" : "default"); 	return buf_len;} static ssize_t amdgpu_get_pp_cur_state(struct device *dev,		struct device_attribute *attr,		char *buf){	struct drm_device *ddev = dev_get_drvdata(dev);	struct amdgpu_device *adev = ddev->dev_private;	struct pp_states_info data;	enum amd_pm_state_type pm = 0;	int i = 0; 	if (adev->pp_enabled) { 		pm = amdgpu_dpm_get_current_power_state(adev);		amdgpu_dpm_get_pp_num_states(adev, &data); 		for (i = 0; i < data.nums; i++) {			if (pm == data.states[i])				break;		} 		if (i == data.nums)			i = -EINVAL;	} 	return snprintf(buf, PAGE_SIZE, "%d\n", i);} static ssize_t amdgpu_get_pp_force_state(struct device *dev,		struct device_attribute *attr,		char *buf){	struct drm_device *ddev = dev_get_drvdata(dev);	struct amdgpu_device *adev = ddev->dev_private;	struct pp_states_info data;	enum amd_pm_state_type pm = 0;	int i; 	if (adev->pp_force_state_enabled && adev->pp_enabled) {		pm = amdgpu_dpm_get_current_power_state(adev);		amdgpu_dpm_get_pp_num_states(adev, &data); 		for (i = 0; i < data.nums; i++) {			if (pm == data.states[i])				break;		} 		if (i == data.nums)			i = -EINVAL; 		return snprintf(buf, PAGE_SIZE, "%d\n", i); 	} else		return snprintf(buf, PAGE_SIZE, "\n");} static ssize_t amdgpu_set_pp_force_state(struct device *dev,		struct device_attribute *attr,		const char *buf,		size_t count){	struct drm_device *ddev = dev_get_drvdata(dev);	struct amdgpu_device *adev = ddev->dev_private;	enum amd_pm_state_type state = 0;	unsigned long idx;	int ret; 	if (strlen(buf) == 1)		adev->pp_force_state_enabled = false;	else if (adev->pp_enabled) {		struct pp_states_info data; 		ret = kstrtoul(buf, 0, &idx);		if (ret || idx >= ARRAY_SIZE(data.states)) {			count = -EINVAL;			goto fail;		} 		amdgpu_dpm_get_pp_num_states(adev, &data);		state = data.states[idx];		/* only set user selected power states */		if (state != POWER_STATE_TYPE_INTERNAL_BOOT &&		    state != POWER_STATE_TYPE_DEFAULT) {			amdgpu_dpm_dispatch_task(adev,					AMD_PP_EVENT_ENABLE_USER_STATE, &state, NULL);			adev->pp_force_state_enabled = true;		}	}fail:	return count;} static ssize_t amdgpu_get_pp_table(struct device *dev,		struct device_attribute *attr,		char *buf){	struct drm_device *ddev = dev_get_drvdata(dev);	struct amdgpu_device *adev = ddev->dev_private;	char *table = NULL;	int size, i; 	if (adev->pp_enabled)		size = amdgpu_dpm_get_pp_table(adev, &table);	else		return 0; 	if (size >= PAGE_SIZE)		size = PAGE_SIZE - 1; 	for (i = 0; i < size; i++) {		sprintf(buf + i, "%02x", table[i]);	}	sprintf(buf + i, "\n"); 	return size;} static ssize_t amdgpu_set_pp_table(struct device *dev,		struct device_attribute *attr,		const char *buf,		size_t count){	struct drm_device *ddev = dev_get_drvdata(dev);	struct amdgpu_device *adev = ddev->dev_private; 	if (adev->pp_enabled)		amdgpu_dpm_set_pp_table(adev, buf, count); 	return count;} static ssize_t amdgpu_get_pp_dpm_sclk(struct device *dev,		struct device_attribute *attr,		char *buf){	struct drm_device *ddev = dev_get_drvdata(dev);	struct amdgpu_device *adev = ddev->dev_private;	ssize_t size = 0; 	if (adev->pp_enabled)		size = amdgpu_dpm_print_clock_levels(adev, PP_SCLK, buf); 	return size;} static ssize_t amdgpu_set_pp_dpm_sclk(struct device *dev,		struct device_attribute *attr,		const char *buf,		size_t count){	struct drm_device *ddev = dev_get_drvdata(dev);	struct amdgpu_device *adev = ddev->dev_private;	int ret;	long level;	uint32_t i, mask = 0;	char sub_str[2]; 	for (i = 0; i < strlen(buf) - 1; i++) {		sub_str[0] = *(buf + i);		sub_str[1] = '\0';		ret = kstrtol(sub_str, 0, &level); 		if (ret) {			count = -EINVAL;			goto fail;		}		mask |= 1 << level;	} 	if (adev->pp_enabled)		amdgpu_dpm_force_clock_level(adev, PP_SCLK, mask);fail:	return count;} static ssize_t amdgpu_get_pp_dpm_mclk(struct device *dev,		struct device_attribute *attr,		char *buf){	struct drm_device *ddev = dev_get_drvdata(dev);	struct amdgpu_device *adev = ddev->dev_private;	ssize_t size = 0; 	if (adev->pp_enabled)		size = amdgpu_dpm_print_clock_levels(adev, PP_MCLK, buf); 	return size;} static ssize_t amdgpu_set_pp_dpm_mclk(struct device *dev,		struct device_attribute *attr,		const char *buf,		size_t count){	struct drm_device *ddev = dev_get_drvdata(dev);	struct amdgpu_device *adev = ddev->dev_private;	int ret;	long level;	uint32_t i, mask = 0;	char sub_str[2]; 	for (i = 0; i < strlen(buf) - 1; i++) {		sub_str[0] = *(buf + i);		sub_str[1] = '\0';		ret = kstrtol(sub_str, 0, &level); 		if (ret) {			count = -EINVAL;			goto fail;		}		mask |= 1 << level;	} 	if (adev->pp_enabled)		amdgpu_dpm_force_clock_level(adev, PP_MCLK, mask);fail:	return count;} static ssize_t amdgpu_get_pp_dpm_pcie(struct device *dev,		struct device_attribute *attr,		char *buf){	struct drm_device *ddev = dev_get_drvdata(dev);	struct amdgpu_device *adev = ddev->dev_private;	ssize_t size = 0; 	if (adev->pp_enabled)		size = amdgpu_dpm_print_clock_levels(adev, PP_PCIE, buf); 	return size;} static ssize_t amdgpu_set_pp_dpm_pcie(struct device *dev,		struct device_attribute *attr,		const char *buf,		size_t count){	struct drm_device *ddev = dev_get_drvdata(dev);	struct amdgpu_device *adev = ddev->dev_private;	int ret;	long level;	uint32_t i, mask = 0;	char sub_str[2]; 	for (i = 0; i < strlen(buf) - 1; i++) {		sub_str[0] = *(buf + i);		sub_str[1] = '\0';		ret = kstrtol(sub_str, 0, &level); 		if (ret) {			count = -EINVAL;			goto fail;		}		mask |= 1 << level;	} 	if (adev->pp_enabled)		amdgpu_dpm_force_clock_level(adev, PP_PCIE, mask);fail:	return count;} static DEVICE_ATTR(power_dpm_state, S_IRUGO | S_IWUSR, amdgpu_get_dpm_state, amdgpu_set_dpm_state);static DEVICE_ATTR(power_dpm_force_performance_level, S_IRUGO | S_IWUSR,		   amdgpu_get_dpm_forced_performance_level,		   amdgpu_set_dpm_forced_performance_level);static DEVICE_ATTR(pp_num_states, S_IRUGO, amdgpu_get_pp_num_states, NULL);static DEVICE_ATTR(pp_cur_state, S_IRUGO, amdgpu_get_pp_cur_state, NULL);static DEVICE_ATTR(pp_force_state, S_IRUGO | S_IWUSR,		amdgpu_get_pp_force_state,		amdgpu_set_pp_force_state);static DEVICE_ATTR(pp_table, S_IRUGO | S_IWUSR,		amdgpu_get_pp_table,		amdgpu_set_pp_table);static DEVICE_ATTR(pp_dpm_sclk, S_IRUGO | S_IWUSR,		amdgpu_get_pp_dpm_sclk,		amdgpu_set_pp_dpm_sclk);static DEVICE_ATTR(pp_dpm_mclk, S_IRUGO | S_IWUSR,		amdgpu_get_pp_dpm_mclk,		amdgpu_set_pp_dpm_mclk);static DEVICE_ATTR(pp_dpm_pcie, S_IRUGO | S_IWUSR,		amdgpu_get_pp_dpm_pcie,		amdgpu_set_pp_dpm_pcie); static ssize_t amdgpu_hwmon_show_temp(struct device *dev,				      struct device_attribute *attr,				      char *buf){	struct amdgpu_device *adev = dev_get_drvdata(dev);	struct drm_device *ddev = adev->ddev;	int temp;

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