#ifndef _ASM_GENERIC_PGTABLE_H#define _ASM_GENERIC_PGTABLE_H #include <linux/pfn.h> #ifndef __ASSEMBLY__#ifdef CONFIG_MMU #include <linux/mm_types.h>#include <linux/bug.h>#include <linux/errno.h> #if 4 - defined(__PAGETABLE_PUD_FOLDED) - defined(__PAGETABLE_PMD_FOLDED) != \	CONFIG_PGTABLE_LEVELS#error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{PUD,PMD}_FOLDED#endif /* * On almost all architectures and configurations, 0 can be used as the * upper ceiling to free_pgtables(): on many architectures it has the same * effect as using TASK_SIZE.  However, there is one configuration which * must impose a more careful limit, to avoid freeing kernel pgtables. */#ifndef USER_PGTABLES_CEILING#define USER_PGTABLES_CEILING	0UL#endif #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGSextern int ptep_set_access_flags(struct vm_area_struct *vma,				 unsigned long address, pte_t *ptep,				 pte_t entry, int dirty);#endif #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS#ifdef CONFIG_TRANSPARENT_HUGEPAGEextern int pmdp_set_access_flags(struct vm_area_struct *vma,				 unsigned long address, pmd_t *pmdp,				 pmd_t entry, int dirty);#elsestatic inline int pmdp_set_access_flags(struct vm_area_struct *vma,					unsigned long address, pmd_t *pmdp,					pmd_t entry, int dirty){	BUILD_BUG();	return 0;}#endif /* CONFIG_TRANSPARENT_HUGEPAGE */#endif #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNGstatic inline int ptep_test_and_clear_young(struct vm_area_struct *vma,					    unsigned long address,					    pte_t *ptep){	pte_t pte = *ptep;	int r = 1;	if (!pte_young(pte))		r = 0;	else		set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));	return r;}#endif #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG#ifdef CONFIG_TRANSPARENT_HUGEPAGEstatic inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,					    unsigned long address,					    pmd_t *pmdp){	pmd_t pmd = *pmdp;	int r = 1;	if (!pmd_young(pmd))		r = 0;	else		set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));	return r;}#elsestatic inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,					    unsigned long address,					    pmd_t *pmdp){	BUILD_BUG();	return 0;}#endif /* CONFIG_TRANSPARENT_HUGEPAGE */#endif #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSHint ptep_clear_flush_young(struct vm_area_struct *vma,			   unsigned long address, pte_t *ptep);#endif #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH#ifdef CONFIG_TRANSPARENT_HUGEPAGEextern int pmdp_clear_flush_young(struct vm_area_struct *vma,				  unsigned long address, pmd_t *pmdp);#else/* * Despite relevant to THP only, this API is called from generic rmap code * under PageTransHuge(), hence needs a dummy implementation for !THP */static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,					 unsigned long address, pmd_t *pmdp){	BUILD_BUG();	return 0;}#endif /* CONFIG_TRANSPARENT_HUGEPAGE */#endif #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEARstatic inline pte_t ptep_get_and_clear(struct mm_struct *mm,				       unsigned long address,				       pte_t *ptep){	pte_t pte = *ptep;	pte_clear(mm, address, ptep);	return pte;}#endif #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR#ifdef CONFIG_TRANSPARENT_HUGEPAGEstatic inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,					    unsigned long address,					    pmd_t *pmdp){	pmd_t pmd = *pmdp;	pmd_clear(pmdp);	return pmd;}#endif /* CONFIG_TRANSPARENT_HUGEPAGE */#endif #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL#ifdef CONFIG_TRANSPARENT_HUGEPAGEstatic inline pmd_t pmdp_huge_get_and_clear_full(struct mm_struct *mm,					    unsigned long address, pmd_t *pmdp,					    int full){	return pmdp_huge_get_and_clear(mm, address, pmdp);}#endif /* CONFIG_TRANSPARENT_HUGEPAGE */#endif #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULLstatic inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,					    unsigned long address, pte_t *ptep,					    int full){	pte_t pte;	pte = ptep_get_and_clear(mm, address, ptep);	return pte;}#endif /* * Some architectures may be able to avoid expensive synchronization * primitives when modifications are made to PTE's which are already * not present, or in the process of an address space destruction. */#ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULLstatic inline void pte_clear_not_present_full(struct mm_struct *mm,					      unsigned long address,					      pte_t *ptep,					      int full){	pte_clear(mm, address, ptep);}#endif #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSHextern pte_t ptep_clear_flush(struct vm_area_struct *vma,			      unsigned long address,			      pte_t *ptep);#endif #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSHextern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,			      unsigned long address,			      pmd_t *pmdp);#endif #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECTstruct mm_struct;static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep){	pte_t old_pte = *ptep;	set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));}#endif #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT#ifdef CONFIG_TRANSPARENT_HUGEPAGEstatic inline void pmdp_set_wrprotect(struct mm_struct *mm,				      unsigned long address, pmd_t *pmdp){	pmd_t old_pmd = *pmdp;	set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));}#elsestatic inline void pmdp_set_wrprotect(struct mm_struct *mm,				      unsigned long address, pmd_t *pmdp){	BUILD_BUG();}#endif /* CONFIG_TRANSPARENT_HUGEPAGE */#endif #ifndef pmdp_collapse_flush#ifdef CONFIG_TRANSPARENT_HUGEPAGEextern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,				 unsigned long address, pmd_t *pmdp);#elsestatic inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,					unsigned long address,					pmd_t *pmdp){	BUILD_BUG();	return *pmdp;}#define pmdp_collapse_flush pmdp_collapse_flush#endif /* CONFIG_TRANSPARENT_HUGEPAGE */#endif #ifndef __HAVE_ARCH_PGTABLE_DEPOSITextern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,				       pgtable_t pgtable);#endif #ifndef __HAVE_ARCH_PGTABLE_WITHDRAWextern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);#endif #ifndef __HAVE_ARCH_PMDP_INVALIDATEextern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,			    pmd_t *pmdp);#endif #ifndef __HAVE_ARCH_PMDP_HUGE_SPLIT_PREPAREstatic inline void pmdp_huge_split_prepare(struct vm_area_struct *vma,					   unsigned long address, pmd_t *pmdp){ }#endif #ifndef __HAVE_ARCH_PTE_SAMEstatic inline int pte_same(pte_t pte_a, pte_t pte_b){	return pte_val(pte_a) == pte_val(pte_b);}#endif #ifndef __HAVE_ARCH_PTE_UNUSED/* * Some architectures provide facilities to virtualization guests * so that they can flag allocated pages as unused. This allows the * host to transparently reclaim unused pages. This function returns * whether the pte's page is unused. */static inline int pte_unused(pte_t pte){	return 0;}#endif #ifndef __HAVE_ARCH_PMD_SAME#ifdef CONFIG_TRANSPARENT_HUGEPAGEstatic inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b){	return pmd_val(pmd_a) == pmd_val(pmd_b);}#else /* CONFIG_TRANSPARENT_HUGEPAGE */static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b){	BUILD_BUG();	return 0;}#endif /* CONFIG_TRANSPARENT_HUGEPAGE */#endif #ifndef __HAVE_ARCH_PGD_OFFSET_GATE#define pgd_offset_gate(mm, addr)	pgd_offset(mm, addr)#endif #ifndef __HAVE_ARCH_MOVE_PTE#define move_pte(pte, prot, old_addr, new_addr)	(pte)#endif #ifndef pte_accessible# define pte_accessible(mm, pte)	((void)(pte), 1)#endif #ifndef flush_tlb_fix_spurious_fault#define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)#endif #ifndef pgprot_noncached#define pgprot_noncached(prot)	(prot)#endif #ifndef pgprot_writecombine#define pgprot_writecombine pgprot_noncached#endif #ifndef pgprot_writethrough#define pgprot_writethrough pgprot_noncached#endif #ifndef pgprot_device#define pgprot_device pgprot_noncached#endif #ifndef pgprot_modify#define pgprot_modify pgprot_modifystatic inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot){	if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))		newprot = pgprot_noncached(newprot);	if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))		newprot = pgprot_writecombine(newprot);	if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))		newprot = pgprot_device(newprot);	return newprot;}#endif /* * When walking page tables, get the address of the next boundary, * or the end address of the range if that comes earlier.  Although no * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout. */ #define pgd_addr_end(addr, end)						\({	unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK;	\	(__boundary - 1 < (end) - 1)? __boundary: (end);		\}) #ifndef pud_addr_end#define pud_addr_end(addr, end)						\({	unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK;	\	(__boundary - 1 < (end) - 1)? __boundary: (end);		\})#endif #ifndef pmd_addr_end#define pmd_addr_end(addr, end)						\({	unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK;	\	(__boundary - 1 < (end) - 1)? __boundary: (end);		\})#endif /* * When walking page tables, we usually want to skip any p?d_none entries; * and any p?d_bad entries - reporting the error before resetting to none. * Do the tests inline, but report and clear the bad entry in mm/memory.c. */void pgd_clear_bad(pgd_t *);void pud_clear_bad(pud_t *);void pmd_clear_bad(pmd_t *); static inline int pgd_none_or_clear_bad(pgd_t *pgd){	if (pgd_none(*pgd))		return 1;	if (unlikely(pgd_bad(*pgd))) {		pgd_clear_bad(pgd);		return 1;	}	return 0;} static inline int pud_none_or_clear_bad(pud_t *pud){	if (pud_none(*pud))		return 1;	if (unlikely(pud_bad(*pud))) {		pud_clear_bad(pud);		return 1;	}	return 0;} static inline int pmd_none_or_clear_bad(pmd_t *pmd){	if (pmd_none(*pmd))		return 1;	if (unlikely(pmd_bad(*pmd))) {		pmd_clear_bad(pmd);		return 1;	}	return 0;} static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm,					     unsigned long addr,					     pte_t *ptep){	/*	 * Get the current pte state, but zero it out to make it	 * non-present, preventing the hardware from asynchronously	 * updating it.	 */	return ptep_get_and_clear(mm, addr, ptep);} static inline void __ptep_modify_prot_commit(struct mm_struct *mm,					     unsigned long addr,					     pte_t *ptep, pte_t pte){	/*	 * The pte is non-present, so there's no hardware state to	 * preserve.	 */	set_pte_at(mm, addr, ptep, pte);} #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION/* * Start a pte protection read-modify-write transaction, which * protects against asynchronous hardware modifications to the pte. * The intention is not to prevent the hardware from making pte * updates, but to prevent any updates it may make from being lost. * * This does not protect against other software modifications of the * pte; the appropriate pte lock must be held over the transation. * * Note that this interface is intended to be batchable, meaning that * ptep_modify_prot_commit may not actually update the pte, but merely * queue the update to be done at some later time.  The update must be * actually committed before the pte lock is released, however. */static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,					   unsigned long addr,					   pte_t *ptep){	return __ptep_modify_prot_start(mm, addr, ptep);} /* * Commit an update to a pte, leaving any hardware-controlled bits in * the PTE unmodified. */static inline void ptep_modify_prot_commit(struct mm_struct *mm,					   unsigned long addr,					   pte_t *ptep, pte_t pte){	__ptep_modify_prot_commit(mm, addr, ptep, pte);}#endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */#endif /* CONFIG_MMU */ /* * A facility to provide lazy MMU batching.  This allows PTE updates and * page invalidations to be delayed until a call to leave lazy MMU mode * is issued.  Some architectures may benefit from doing this, and it is * beneficial for both shadow and direct mode hypervisors, which may batch * the PTE updates which happen during this window.  Note that using this * interface requires that read hazards be removed from the code.  A read * hazard could result in the direct mode hypervisor case, since the actual * write to the page tables may not yet have taken place, so reads though * a raw PTE pointer after it has been modified are not guaranteed to be * up to date.  This mode can only be entered and left under the protection of * the page table locks for all page tables which may be modified.  In the UP * case, this is required so that preemption is disabled, and in the SMP case, * it must synchronize the delayed page table writes properly on other CPUs. */#ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE#define arch_enter_lazy_mmu_mode()	do {} while (0)#define arch_leave_lazy_mmu_mode()	do {} while (0)#define arch_flush_lazy_mmu_mode()	do {} while (0)#endif /* * A facility to provide batching of the reload of page tables and * other process state with the actual context switch code for * paravirtualized guests.  By convention, only one of the batched * update (lazy) modes (CPU, MMU) should be active at any given time, * entry should never be nested, and entry and exits should always be * paired.  This is for sanity of maintaining and reasoning about the * kernel code.  In this case, the exit (end of the context switch) is * in architecture-specific code, and so doesn't need a generic * definition. */#ifndef __HAVE_ARCH_START_CONTEXT_SWITCH#define arch_start_context_switch(prev)	do {} while (0)#endif #ifndef CONFIG_HAVE_ARCH_SOFT_DIRTYstatic inline int pte_soft_dirty(pte_t pte){	return 0;} static inline int pmd_soft_dirty(pmd_t pmd){	return 0;

Lines 1–500 of 817. Load more