/* * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #include <drm/drmP.h>#include <drm/amdgpu_drm.h>#include <drm/drm_gem.h>#include "amdgpu_drv.h" #include <drm/drm_pciids.h>#include <linux/console.h>#include <linux/module.h>#include <linux/pm_runtime.h>#include <linux/vga_switcheroo.h>#include <drm/drm_probe_helper.h> #include "amdgpu.h"#include "amdgpu_irq.h"#include "amdgpu_gem.h" #include "amdgpu_amdkfd.h" /* * KMS wrapper. * - 3.0.0 - initial driver * - 3.1.0 - allow reading more status registers (GRBM, SRBM, SDMA, CP) * - 3.2.0 - GFX8: Uses EOP_TC_WB_ACTION_EN, so UMDs don't have to do the same *           at the end of IBs. * - 3.3.0 - Add VM support for UVD on supported hardware. * - 3.4.0 - Add AMDGPU_INFO_NUM_EVICTIONS. * - 3.5.0 - Add support for new UVD_NO_OP register. * - 3.6.0 - kmd involves use CONTEXT_CONTROL in ring buffer. * - 3.7.0 - Add support for VCE clock list packet * - 3.8.0 - Add support raster config init in the kernel * - 3.9.0 - Add support for memory query info about VRAM and GTT. * - 3.10.0 - Add support for new fences ioctl, new gem ioctl flags * - 3.11.0 - Add support for sensor query info (clocks, temp, etc). * - 3.12.0 - Add query for double offchip LDS buffers * - 3.13.0 - Add PRT support * - 3.14.0 - Fix race in amdgpu_ctx_get_fence() and note new functionality * - 3.15.0 - Export more gpu info for gfx9 * - 3.16.0 - Add reserved vmid support * - 3.17.0 - Add AMDGPU_NUM_VRAM_CPU_PAGE_FAULTS. * - 3.18.0 - Export gpu always on cu bitmap * - 3.19.0 - Add support for UVD MJPEG decode * - 3.20.0 - Add support for local BOs * - 3.21.0 - Add DRM_AMDGPU_FENCE_TO_HANDLE ioctl * - 3.22.0 - Add DRM_AMDGPU_SCHED ioctl * - 3.23.0 - Add query for VRAM lost counter * - 3.24.0 - Add high priority compute support for gfx9 * - 3.25.0 - Add support for sensor query info (stable pstate sclk/mclk). * - 3.26.0 - GFX9: Process AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE. * - 3.27.0 - Add new chunk to to AMDGPU_CS to enable BO_LIST creation. * - 3.28.0 - Add AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES * - 3.29.0 - Add AMDGPU_IB_FLAG_RESET_GDS_MAX_WAVE_ID * - 3.30.0 - Add AMDGPU_SCHED_OP_CONTEXT_PRIORITY_OVERRIDE. * - 3.31.0 - Add support for per-flip tiling attribute changes with DC * - 3.32.0 - Add syncobj timeline support to AMDGPU_CS. */#define KMS_DRIVER_MAJOR	3#define KMS_DRIVER_MINOR	32#define KMS_DRIVER_PATCHLEVEL	0 int amdgpu_vram_limit = 0;int amdgpu_vis_vram_limit = 0;int amdgpu_gart_size = -1; /* auto */int amdgpu_gtt_size = -1; /* auto */int amdgpu_moverate = -1; /* auto */int amdgpu_benchmarking = 0;int amdgpu_testing = 0;int amdgpu_audio = -1;int amdgpu_disp_priority = 0;int amdgpu_hw_i2c = 0;int amdgpu_pcie_gen2 = -1;int amdgpu_msi = -1;int amdgpu_lockup_timeout = 10000;int amdgpu_dpm = -1;int amdgpu_fw_load_type = -1;int amdgpu_aspm = -1;int amdgpu_runtime_pm = -1;uint amdgpu_ip_block_mask = 0xffffffff;int amdgpu_bapm = -1;int amdgpu_deep_color = 0;int amdgpu_vm_size = -1;int amdgpu_vm_fragment_size = -1;int amdgpu_vm_block_size = -1;int amdgpu_vm_fault_stop = 0;int amdgpu_vm_debug = 0;int amdgpu_vram_page_split = 512;int amdgpu_vm_update_mode = -1;int amdgpu_exp_hw_support = 0;int amdgpu_dc = -1;int amdgpu_sched_jobs = 32;int amdgpu_sched_hw_submission = 2;uint amdgpu_pcie_gen_cap = 0;uint amdgpu_pcie_lane_cap = 0;uint amdgpu_cg_mask = 0xffffffff;uint amdgpu_pg_mask = 0xffffffff;uint amdgpu_sdma_phase_quantum = 32;char *amdgpu_disable_cu = NULL;char *amdgpu_virtual_display = NULL;/* OverDrive(bit 14) disabled by default*/uint amdgpu_pp_feature_mask = 0xffffbfff;int amdgpu_ngg = 0;int amdgpu_prim_buf_per_se = 0;int amdgpu_pos_buf_per_se = 0;int amdgpu_cntl_sb_buf_per_se = 0;int amdgpu_param_buf_per_se = 0;int amdgpu_job_hang_limit = 0;int amdgpu_lbpw = -1;int amdgpu_compute_multipipe = -1;int amdgpu_gpu_recovery = -1; /* auto */int amdgpu_emu_mode = 0;uint amdgpu_smu_memory_pool_size = 0;/* FBC (bit 0) disabled by default*/uint amdgpu_dc_feature_mask = 0; struct amdgpu_mgpu_info mgpu_info = {	.mutex = __MUTEX_INITIALIZER(mgpu_info.mutex),};int amdgpu_ras_enable = -1;uint amdgpu_ras_mask = 0xffffffff; /** * DOC: vramlimit (int) * Restrict the total amount of VRAM in MiB for testing.  The default is 0 (Use full VRAM). */MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");module_param_named(vramlimit, amdgpu_vram_limit, int, 0600); /** * DOC: vis_vramlimit (int) * Restrict the amount of CPU visible VRAM in MiB for testing.  The default is 0 (Use full CPU visible VRAM). */MODULE_PARM_DESC(vis_vramlimit, "Restrict visible VRAM for testing, in megabytes");module_param_named(vis_vramlimit, amdgpu_vis_vram_limit, int, 0444); /** * DOC: gartsize (uint) * Restrict the size of GART in Mib (32, 64, etc.) for testing. The default is -1 (The size depends on asic). */MODULE_PARM_DESC(gartsize, "Size of GART to setup in megabytes (32, 64, etc., -1=auto)");module_param_named(gartsize, amdgpu_gart_size, uint, 0600); /** * DOC: gttsize (int) * Restrict the size of GTT domain in MiB for testing. The default is -1 (It's VRAM size if 3GB < VRAM < 3/4 RAM, * otherwise 3/4 RAM size). */MODULE_PARM_DESC(gttsize, "Size of the GTT domain in megabytes (-1 = auto)");module_param_named(gttsize, amdgpu_gtt_size, int, 0600); /** * DOC: moverate (int) * Set maximum buffer migration rate in MB/s. The default is -1 (8 MB/s). */MODULE_PARM_DESC(moverate, "Maximum buffer migration rate in MB/s. (32, 64, etc., -1=auto, 0=1=disabled)");module_param_named(moverate, amdgpu_moverate, int, 0600); /** * DOC: benchmark (int) * Run benchmarks. The default is 0 (Skip benchmarks). */MODULE_PARM_DESC(benchmark, "Run benchmark");module_param_named(benchmark, amdgpu_benchmarking, int, 0444); /** * DOC: test (int) * Test BO GTT->VRAM and VRAM->GTT GPU copies. The default is 0 (Skip test, only set 1 to run test). */MODULE_PARM_DESC(test, "Run tests");module_param_named(test, amdgpu_testing, int, 0444); /** * DOC: audio (int) * Set HDMI/DPAudio. Only affects non-DC display handling. The default is -1 (Enabled), set 0 to disabled it. */MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");module_param_named(audio, amdgpu_audio, int, 0444); /** * DOC: disp_priority (int) * Set display Priority (1 = normal, 2 = high). Only affects non-DC display handling. The default is 0 (auto). */MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");module_param_named(disp_priority, amdgpu_disp_priority, int, 0444); /** * DOC: hw_i2c (int) * To enable hw i2c engine. Only affects non-DC display handling. The default is 0 (Disabled). */MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");module_param_named(hw_i2c, amdgpu_hw_i2c, int, 0444); /** * DOC: pcie_gen2 (int) * To disable PCIE Gen2/3 mode (0 = disable, 1 = enable). The default is -1 (auto, enabled). */MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");module_param_named(pcie_gen2, amdgpu_pcie_gen2, int, 0444); /** * DOC: msi (int) * To disable Message Signaled Interrupts (MSI) functionality (1 = enable, 0 = disable). The default is -1 (auto, enabled). */MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");module_param_named(msi, amdgpu_msi, int, 0444); /** * DOC: lockup_timeout (int) * Set GPU scheduler timeout value in ms. Value 0 is invalidated, will be adjusted to 10000. * Negative values mean 'infinite timeout' (MAX_JIFFY_OFFSET). The default is 10000. */MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms > 0 (default 10000)");module_param_named(lockup_timeout, amdgpu_lockup_timeout, int, 0444); /** * DOC: dpm (int) * Override for dynamic power management setting (1 = enable, 0 = disable). The default is -1 (auto). */MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");module_param_named(dpm, amdgpu_dpm, int, 0444); /** * DOC: fw_load_type (int) * Set different firmware loading type for debugging (0 = direct, 1 = SMU, 2 = PSP). The default is -1 (auto). */MODULE_PARM_DESC(fw_load_type, "firmware loading type (0 = direct, 1 = SMU, 2 = PSP, -1 = auto)");module_param_named(fw_load_type, amdgpu_fw_load_type, int, 0444); /** * DOC: aspm (int) * To disable ASPM (1 = enable, 0 = disable). The default is -1 (auto, enabled). */MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");module_param_named(aspm, amdgpu_aspm, int, 0444); /** * DOC: runpm (int) * Override for runtime power management control for dGPUs in PX/HG laptops. The amdgpu driver can dynamically power down * the dGPU on PX/HG laptops when it is idle. The default is -1 (auto enable). Setting the value to 0 disables this functionality. */MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");module_param_named(runpm, amdgpu_runtime_pm, int, 0444); /** * DOC: ip_block_mask (uint) * Override what IP blocks are enabled on the GPU. Each GPU is a collection of IP blocks (gfx, display, video, etc.). * Use this parameter to disable specific blocks. Note that the IP blocks do not have a fixed index. Some asics may not have * some IPs or may include multiple instances of an IP so the ordering various from asic to asic. See the driver output in * the kernel log for the list of IPs on the asic. The default is 0xffffffff (enable all blocks on a device). */MODULE_PARM_DESC(ip_block_mask, "IP Block Mask (all blocks enabled (default))");module_param_named(ip_block_mask, amdgpu_ip_block_mask, uint, 0444); /** * DOC: bapm (int) * Bidirectional Application Power Management (BAPM) used to dynamically share TDP between CPU and GPU. Set value 0 to disable it. * The default -1 (auto, enabled) */MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");module_param_named(bapm, amdgpu_bapm, int, 0444); /** * DOC: deep_color (int) * Set 1 to enable Deep Color support. Only affects non-DC display handling. The default is 0 (disabled). */MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");module_param_named(deep_color, amdgpu_deep_color, int, 0444); /** * DOC: vm_size (int) * Override the size of the GPU's per client virtual address space in GiB.  The default is -1 (automatic for each asic). */MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 64GB)");module_param_named(vm_size, amdgpu_vm_size, int, 0444); /** * DOC: vm_fragment_size (int) * Override VM fragment size in bits (4, 5, etc. 4 = 64K, 9 = 2M). The default is -1 (automatic for each asic). */MODULE_PARM_DESC(vm_fragment_size, "VM fragment size in bits (4, 5, etc. 4 = 64K (default), Max 9 = 2M)");module_param_named(vm_fragment_size, amdgpu_vm_fragment_size, int, 0444); /** * DOC: vm_block_size (int) * Override VM page table size in bits (default depending on vm_size and hw setup). The default is -1 (automatic for each asic). */MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");module_param_named(vm_block_size, amdgpu_vm_block_size, int, 0444); /** * DOC: vm_fault_stop (int) * Stop on VM fault for debugging (0 = never, 1 = print first, 2 = always). The default is 0 (No stop). */MODULE_PARM_DESC(vm_fault_stop, "Stop on VM fault (0 = never (default), 1 = print first, 2 = always)");module_param_named(vm_fault_stop, amdgpu_vm_fault_stop, int, 0444); /** * DOC: vm_debug (int) * Debug VM handling (0 = disabled, 1 = enabled). The default is 0 (Disabled). */MODULE_PARM_DESC(vm_debug, "Debug VM handling (0 = disabled (default), 1 = enabled)");module_param_named(vm_debug, amdgpu_vm_debug, int, 0644); /** * DOC: vm_update_mode (int) * Override VM update mode. VM updated by using CPU (0 = never, 1 = Graphics only, 2 = Compute only, 3 = Both). The default * is -1 (Only in large BAR(LB) systems Compute VM tables will be updated by CPU, otherwise 0, never). */MODULE_PARM_DESC(vm_update_mode, "VM update using CPU (0 = never (default except for large BAR(LB)), 1 = Graphics only, 2 = Compute only (default for LB), 3 = Both");module_param_named(vm_update_mode, amdgpu_vm_update_mode, int, 0444); /** * DOC: vram_page_split (int) * Override the number of pages after we split VRAM allocations (default 512, -1 = disable). The default is 512. */MODULE_PARM_DESC(vram_page_split, "Number of pages after we split VRAM allocations (default 512, -1 = disable)");module_param_named(vram_page_split, amdgpu_vram_page_split, int, 0444); /** * DOC: exp_hw_support (int) * Enable experimental hw support (1 = enable). The default is 0 (disabled). */MODULE_PARM_DESC(exp_hw_support, "experimental hw support (1 = enable, 0 = disable (default))");module_param_named(exp_hw_support, amdgpu_exp_hw_support, int, 0444); /** * DOC: dc (int) * Disable/Enable Display Core driver for debugging (1 = enable, 0 = disable). The default is -1 (automatic for each asic). */MODULE_PARM_DESC(dc, "Display Core driver (1 = enable, 0 = disable, -1 = auto (default))");module_param_named(dc, amdgpu_dc, int, 0444); /** * DOC: sched_jobs (int) * Override the max number of jobs supported in the sw queue. The default is 32. */MODULE_PARM_DESC(sched_jobs, "the max number of jobs supported in the sw queue (default 32)");module_param_named(sched_jobs, amdgpu_sched_jobs, int, 0444); /** * DOC: sched_hw_submission (int) * Override the max number of HW submissions. The default is 2. */MODULE_PARM_DESC(sched_hw_submission, "the max number of HW submissions (default 2)");module_param_named(sched_hw_submission, amdgpu_sched_hw_submission, int, 0444); /** * DOC: ppfeaturemask (uint) * Override power features enabled. See enum PP_FEATURE_MASK in drivers/gpu/drm/amd/include/amd_shared.h. * The default is the current set of stable power features. */MODULE_PARM_DESC(ppfeaturemask, "all power features enabled (default))");module_param_named(ppfeaturemask, amdgpu_pp_feature_mask, uint, 0444); /** * DOC: pcie_gen_cap (uint) * Override PCIE gen speed capabilities. See the CAIL flags in drivers/gpu/drm/amd/include/amd_pcie.h. * The default is 0 (automatic for each asic). */MODULE_PARM_DESC(pcie_gen_cap, "PCIE Gen Caps (0: autodetect (default))");module_param_named(pcie_gen_cap, amdgpu_pcie_gen_cap, uint, 0444); /** * DOC: pcie_lane_cap (uint) * Override PCIE lanes capabilities. See the CAIL flags in drivers/gpu/drm/amd/include/amd_pcie.h. * The default is 0 (automatic for each asic). */MODULE_PARM_DESC(pcie_lane_cap, "PCIE Lane Caps (0: autodetect (default))");module_param_named(pcie_lane_cap, amdgpu_pcie_lane_cap, uint, 0444); /** * DOC: cg_mask (uint) * Override Clockgating features enabled on GPU (0 = disable clock gating). See the AMD_CG_SUPPORT flags in * drivers/gpu/drm/amd/include/amd_shared.h. The default is 0xffffffff (all enabled). */MODULE_PARM_DESC(cg_mask, "Clockgating flags mask (0 = disable clock gating)");module_param_named(cg_mask, amdgpu_cg_mask, uint, 0444); /** * DOC: pg_mask (uint) * Override Powergating features enabled on GPU (0 = disable power gating). See the AMD_PG_SUPPORT flags in * drivers/gpu/drm/amd/include/amd_shared.h. The default is 0xffffffff (all enabled). */MODULE_PARM_DESC(pg_mask, "Powergating flags mask (0 = disable power gating)");module_param_named(pg_mask, amdgpu_pg_mask, uint, 0444); /** * DOC: sdma_phase_quantum (uint) * Override SDMA context switch phase quantum (x 1K GPU clock cycles, 0 = no change). The default is 32. */MODULE_PARM_DESC(sdma_phase_quantum, "SDMA context switch phase quantum (x 1K GPU clock cycles, 0 = no change (default 32))");module_param_named(sdma_phase_quantum, amdgpu_sdma_phase_quantum, uint, 0444); /** * DOC: disable_cu (charp) * Set to disable CUs (It's set like se.sh.cu,...). The default is NULL. */MODULE_PARM_DESC(disable_cu, "Disable CUs (se.sh.cu,...)");module_param_named(disable_cu, amdgpu_disable_cu, charp, 0444); /** * DOC: virtual_display (charp) * Set to enable virtual display feature. This feature provides a virtual display hardware on headless boards * or in virtualized environments. It will be set like xxxx:xx:xx.x,x;xxxx:xx:xx.x,x. It's the pci address of * the device, plus the number of crtcs to expose. E.g., 0000:26:00.0,4 would enable 4 virtual crtcs on the pci * device at 26:00.0. The default is NULL. */MODULE_PARM_DESC(virtual_display,		 "Enable virtual display feature (the virtual_display will be set like xxxx:xx:xx.x,x;xxxx:xx:xx.x,x)");module_param_named(virtual_display, amdgpu_virtual_display, charp, 0444); /** * DOC: ngg (int) * Set to enable Next Generation Graphics (1 = enable). The default is 0 (disabled). */MODULE_PARM_DESC(ngg, "Next Generation Graphics (1 = enable, 0 = disable(default depending on gfx))");module_param_named(ngg, amdgpu_ngg, int, 0444); /** * DOC: prim_buf_per_se (int) * Override the size of Primitive Buffer per Shader Engine in Byte. The default is 0 (depending on gfx). */MODULE_PARM_DESC(prim_buf_per_se, "the size of Primitive Buffer per Shader Engine (default depending on gfx)");module_param_named(prim_buf_per_se, amdgpu_prim_buf_per_se, int, 0444); /** * DOC: pos_buf_per_se (int) * Override the size of Position Buffer per Shader Engine in Byte. The default is 0 (depending on gfx). */MODULE_PARM_DESC(pos_buf_per_se, "the size of Position Buffer per Shader Engine (default depending on gfx)");module_param_named(pos_buf_per_se, amdgpu_pos_buf_per_se, int, 0444); /** * DOC: cntl_sb_buf_per_se (int) * Override the size of Control Sideband per Shader Engine in Byte. The default is 0 (depending on gfx). */MODULE_PARM_DESC(cntl_sb_buf_per_se, "the size of Control Sideband per Shader Engine (default depending on gfx)");module_param_named(cntl_sb_buf_per_se, amdgpu_cntl_sb_buf_per_se, int, 0444); /** * DOC: param_buf_per_se (int) * Override the size of Off-Chip Parameter Cache per Shader Engine in Byte. * The default is 0 (depending on gfx). */MODULE_PARM_DESC(param_buf_per_se, "the size of Off-Chip Parameter Cache per Shader Engine (default depending on gfx)");module_param_named(param_buf_per_se, amdgpu_param_buf_per_se, int, 0444); /** * DOC: job_hang_limit (int) * Set how much time allow a job hang and not drop it. The default is 0. */MODULE_PARM_DESC(job_hang_limit, "how much time allow a job hang and not drop it (default 0)");module_param_named(job_hang_limit, amdgpu_job_hang_limit, int ,0444); /** * DOC: lbpw (int) * Override Load Balancing Per Watt (LBPW) support (1 = enable, 0 = disable). The default is -1 (auto, enabled). */MODULE_PARM_DESC(lbpw, "Load Balancing Per Watt (LBPW) support (1 = enable, 0 = disable, -1 = auto)");module_param_named(lbpw, amdgpu_lbpw, int, 0444); MODULE_PARM_DESC(compute_multipipe, "Force compute queues to be spread across pipes (1 = enable, 0 = disable, -1 = auto)");module_param_named(compute_multipipe, amdgpu_compute_multipipe, int, 0444); /** * DOC: gpu_recovery (int) * Set to enable GPU recovery mechanism (1 = enable, 0 = disable). The default is -1 (auto, disabled except SRIOV). */MODULE_PARM_DESC(gpu_recovery, "Enable GPU recovery mechanism, (1 = enable, 0 = disable, -1 = auto)");module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 0444); /** * DOC: emu_mode (int) * Set value 1 to enable emulation mode. This is only needed when running on an emulator. The default is 0 (disabled). */MODULE_PARM_DESC(emu_mode, "Emulation mode, (1 = enable, 0 = disable)");module_param_named(emu_mode, amdgpu_emu_mode, int, 0444); 

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