// SPDX-License-Identifier: GPL-2.0-only/* * CPPC (Collaborative Processor Performance Control) driver for * interfacing with the CPUfreq layer and governors. See * cppc_acpi.c for CPPC specific methods. * * (C) Copyright 2014, 2015 Linaro Ltd. * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org> */ #define pr_fmt(fmt) "CPPC Cpufreq:" fmt #include <linux/arch_topology.h>#include <linux/kernel.h>#include <linux/module.h>#include <linux/delay.h>#include <linux/cpu.h>#include <linux/cpufreq.h>#include <linux/dmi.h>#include <linux/irq_work.h>#include <linux/kthread.h>#include <linux/time.h>#include <linux/vmalloc.h>#include <uapi/linux/sched/types.h> #include <asm/unaligned.h> #include <acpi/cppc_acpi.h> /* Minimum struct length needed for the DMI processor entry we want */#define DMI_ENTRY_PROCESSOR_MIN_LENGTH 48 /* Offset in the DMI processor structure for the max frequency */#define DMI_PROCESSOR_MAX_SPEED 0x14 /* * This list contains information parsed from per CPU ACPI _CPC and _PSD * structures: e.g. the highest and lowest supported performance, capabilities, * desired performance, level requested etc. Depending on the share_type, not * all CPUs will have an entry in the list. */static LIST_HEAD(cpu_data_list); static bool boost_supported; struct cppc_workaround_oem_info { char oem_id[ACPI_OEM_ID_SIZE + 1]; char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1]; u32 oem_revision;}; static struct cppc_workaround_oem_info wa_info[] = { { .oem_id = "HISI ", .oem_table_id = "HIP07 ", .oem_revision = 0, }, { .oem_id = "HISI ", .oem_table_id = "HIP08 ", .oem_revision = 0, }}; static struct cpufreq_driver cppc_cpufreq_driver; static enum { FIE_UNSET = -1, FIE_ENABLED, FIE_DISABLED} fie_disabled = FIE_UNSET; #ifdef CONFIG_ACPI_CPPC_CPUFREQ_FIEmodule_param(fie_disabled, int, 0444);MODULE_PARM_DESC(fie_disabled, "Disable Frequency Invariance Engine (FIE)"); /* Frequency invariance support */struct cppc_freq_invariance { int cpu; struct irq_work irq_work; struct kthread_work work; struct cppc_perf_fb_ctrs prev_perf_fb_ctrs; struct cppc_cpudata *cpu_data;}; static DEFINE_PER_CPU(struct cppc_freq_invariance, cppc_freq_inv);static struct kthread_worker *kworker_fie; static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu);static int cppc_perf_from_fbctrs(struct cppc_cpudata *cpu_data, struct cppc_perf_fb_ctrs *fb_ctrs_t0, struct cppc_perf_fb_ctrs *fb_ctrs_t1); /** * cppc_scale_freq_workfn - CPPC arch_freq_scale updater for frequency invariance * @work: The work item. * * The CPPC driver register itself with the topology core to provide its own * implementation (cppc_scale_freq_tick()) of topology_scale_freq_tick() which * gets called by the scheduler on every tick. * * Note that the arch specific counters have higher priority than CPPC counters, * if available, though the CPPC driver doesn't need to have any special * handling for that. * * On an invocation of cppc_scale_freq_tick(), we schedule an irq work (since we * reach here from hard-irq context), which then schedules a normal work item * and cppc_scale_freq_workfn() updates the per_cpu arch_freq_scale variable * based on the counter updates since the last tick. */static void cppc_scale_freq_workfn(struct kthread_work *work){ struct cppc_freq_invariance *cppc_fi; struct cppc_perf_fb_ctrs fb_ctrs = {0}; struct cppc_cpudata *cpu_data; unsigned long local_freq_scale; u64 perf; cppc_fi = container_of(work, struct cppc_freq_invariance, work); cpu_data = cppc_fi->cpu_data; if (cppc_get_perf_ctrs(cppc_fi->cpu, &fb_ctrs)) { pr_warn("%s: failed to read perf counters\n", __func__); return; } perf = cppc_perf_from_fbctrs(cpu_data, &cppc_fi->prev_perf_fb_ctrs, &fb_ctrs); cppc_fi->prev_perf_fb_ctrs = fb_ctrs; perf <<= SCHED_CAPACITY_SHIFT; local_freq_scale = div64_u64(perf, cpu_data->perf_caps.highest_perf); /* This can happen due to counter's overflow */ if (unlikely(local_freq_scale > 1024)) local_freq_scale = 1024; per_cpu(arch_freq_scale, cppc_fi->cpu) = local_freq_scale;} static void cppc_irq_work(struct irq_work *irq_work){ struct cppc_freq_invariance *cppc_fi; cppc_fi = container_of(irq_work, struct cppc_freq_invariance, irq_work); kthread_queue_work(kworker_fie, &cppc_fi->work);} static void cppc_scale_freq_tick(void){ struct cppc_freq_invariance *cppc_fi = &per_cpu(cppc_freq_inv, smp_processor_id()); /* * cppc_get_perf_ctrs() can potentially sleep, call that from the right * context. */ irq_work_queue(&cppc_fi->irq_work);} static struct scale_freq_data cppc_sftd = { .source = SCALE_FREQ_SOURCE_CPPC, .set_freq_scale = cppc_scale_freq_tick,}; static void cppc_cpufreq_cpu_fie_init(struct cpufreq_policy *policy){ struct cppc_freq_invariance *cppc_fi; int cpu, ret; if (fie_disabled) return; for_each_cpu(cpu, policy->cpus) { cppc_fi = &per_cpu(cppc_freq_inv, cpu); cppc_fi->cpu = cpu; cppc_fi->cpu_data = policy->driver_data; kthread_init_work(&cppc_fi->work, cppc_scale_freq_workfn); init_irq_work(&cppc_fi->irq_work, cppc_irq_work); ret = cppc_get_perf_ctrs(cpu, &cppc_fi->prev_perf_fb_ctrs); if (ret) { pr_warn("%s: failed to read perf counters for cpu:%d: %d\n", __func__, cpu, ret); /* * Don't abort if the CPU was offline while the driver * was getting registered. */ if (cpu_online(cpu)) return; } } /* Register for freq-invariance */ topology_set_scale_freq_source(&cppc_sftd, policy->cpus);} /* * We free all the resources on policy's removal and not on CPU removal as the * irq-work are per-cpu and the hotplug core takes care of flushing the pending * irq-works (hint: smpcfd_dying_cpu()) on CPU hotplug. Even if the kthread-work * fires on another CPU after the concerned CPU is removed, it won't harm. * * We just need to make sure to remove them all on policy->exit(). */static void cppc_cpufreq_cpu_fie_exit(struct cpufreq_policy *policy){ struct cppc_freq_invariance *cppc_fi; int cpu; if (fie_disabled) return; /* policy->cpus will be empty here, use related_cpus instead */ topology_clear_scale_freq_source(SCALE_FREQ_SOURCE_CPPC, policy->related_cpus); for_each_cpu(cpu, policy->related_cpus) { cppc_fi = &per_cpu(cppc_freq_inv, cpu); irq_work_sync(&cppc_fi->irq_work); kthread_cancel_work_sync(&cppc_fi->work); }} static void __init cppc_freq_invariance_init(void){ struct sched_attr attr = { .size = sizeof(struct sched_attr), .sched_policy = SCHED_DEADLINE, .sched_nice = 0, .sched_priority = 0, /* * Fake (unused) bandwidth; workaround to "fix" * priority inheritance. */ .sched_runtime = 1000000, .sched_deadline = 10000000, .sched_period = 10000000, }; int ret; if (fie_disabled != FIE_ENABLED && fie_disabled != FIE_DISABLED) { fie_disabled = FIE_ENABLED; if (cppc_perf_ctrs_in_pcc()) { pr_info("FIE not enabled on systems with registers in PCC\n"); fie_disabled = FIE_DISABLED; } } if (fie_disabled) return; kworker_fie = kthread_create_worker(0, "cppc_fie"); if (IS_ERR(kworker_fie)) return; ret = sched_setattr_nocheck(kworker_fie->task, &attr); if (ret) { pr_warn("%s: failed to set SCHED_DEADLINE: %d\n", __func__, ret); kthread_destroy_worker(kworker_fie); return; }} static void cppc_freq_invariance_exit(void){ if (fie_disabled) return; kthread_destroy_worker(kworker_fie); kworker_fie = NULL;} #elsestatic inline void cppc_cpufreq_cpu_fie_init(struct cpufreq_policy *policy){} static inline void cppc_cpufreq_cpu_fie_exit(struct cpufreq_policy *policy){} static inline void cppc_freq_invariance_init(void){} static inline void cppc_freq_invariance_exit(void){}#endif /* CONFIG_ACPI_CPPC_CPUFREQ_FIE */ /* Callback function used to retrieve the max frequency from DMI */static void cppc_find_dmi_mhz(const struct dmi_header *dm, void *private){ const u8 *dmi_data = (const u8 *)dm; u16 *mhz = (u16 *)private; if (dm->type == DMI_ENTRY_PROCESSOR && dm->length >= DMI_ENTRY_PROCESSOR_MIN_LENGTH) { u16 val = (u16)get_unaligned((const u16 *) (dmi_data + DMI_PROCESSOR_MAX_SPEED)); *mhz = val > *mhz ? val : *mhz; }} /* Look up the max frequency in DMI */static u64 cppc_get_dmi_max_khz(void){ u16 mhz = 0; dmi_walk(cppc_find_dmi_mhz, &mhz); /* * Real stupid fallback value, just in case there is no * actual value set. */ mhz = mhz ? mhz : 1; return (1000 * mhz);} /* * If CPPC lowest_freq and nominal_freq registers are exposed then we can * use them to convert perf to freq and vice versa. The conversion is * extrapolated as an affine function passing by the 2 points: * - (Low perf, Low freq) * - (Nominal perf, Nominal perf) */static unsigned int cppc_cpufreq_perf_to_khz(struct cppc_cpudata *cpu_data, unsigned int perf){ struct cppc_perf_caps *caps = &cpu_data->perf_caps; s64 retval, offset = 0; static u64 max_khz; u64 mul, div; if (caps->lowest_freq && caps->nominal_freq) { mul = caps->nominal_freq - caps->lowest_freq; div = caps->nominal_perf - caps->lowest_perf; offset = caps->nominal_freq - div64_u64(caps->nominal_perf * mul, div); } else { if (!max_khz) max_khz = cppc_get_dmi_max_khz(); mul = max_khz; div = caps->highest_perf; } retval = offset + div64_u64(perf * mul, div); if (retval >= 0) return retval; return 0;} static unsigned int cppc_cpufreq_khz_to_perf(struct cppc_cpudata *cpu_data, unsigned int freq){ struct cppc_perf_caps *caps = &cpu_data->perf_caps; s64 retval, offset = 0; static u64 max_khz; u64 mul, div; if (caps->lowest_freq && caps->nominal_freq) { mul = caps->nominal_perf - caps->lowest_perf; div = caps->nominal_freq - caps->lowest_freq; offset = caps->nominal_perf - div64_u64(caps->nominal_freq * mul, div); } else { if (!max_khz) max_khz = cppc_get_dmi_max_khz(); mul = caps->highest_perf; div = max_khz; } retval = offset + div64_u64(freq * mul, div); if (retval >= 0) return retval; return 0;} static int cppc_cpufreq_set_target(struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation) { struct cppc_cpudata *cpu_data = policy->driver_data; unsigned int cpu = policy->cpu; struct cpufreq_freqs freqs; u32 desired_perf; int ret = 0; desired_perf = cppc_cpufreq_khz_to_perf(cpu_data, target_freq); /* Return if it is exactly the same perf */ if (desired_perf == cpu_data->perf_ctrls.desired_perf) return ret; cpu_data->perf_ctrls.desired_perf = desired_perf; freqs.old = policy->cur; freqs.new = target_freq; cpufreq_freq_transition_begin(policy, &freqs); ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls); cpufreq_freq_transition_end(policy, &freqs, ret != 0); if (ret) pr_debug("Failed to set target on CPU:%d. ret:%d\n", cpu, ret); return ret;} static unsigned int cppc_cpufreq_fast_switch(struct cpufreq_policy *policy, unsigned int target_freq){ struct cppc_cpudata *cpu_data = policy->driver_data; unsigned int cpu = policy->cpu; u32 desired_perf; int ret; desired_perf = cppc_cpufreq_khz_to_perf(cpu_data, target_freq); cpu_data->perf_ctrls.desired_perf = desired_perf; ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls); if (ret) { pr_debug("Failed to set target on CPU:%d. ret:%d\n", cpu, ret); return 0; } return target_freq;} static int cppc_verify_policy(struct cpufreq_policy_data *policy){ cpufreq_verify_within_cpu_limits(policy); return 0;} /* * The PCC subspace describes the rate at which platform can accept commands * on the shared PCC channel (including READs which do not count towards freq * transition requests), so ideally we need to use the PCC values as a fallback * if we don't have a platform specific transition_delay_us */#ifdef CONFIG_ARM64#include <asm/cputype.h> static unsigned int cppc_cpufreq_get_transition_delay_us(unsigned int cpu){ unsigned long implementor = read_cpuid_implementor(); unsigned long part_num = read_cpuid_part_number(); switch (implementor) { case ARM_CPU_IMP_QCOM: switch (part_num) { case QCOM_CPU_PART_FALKOR_V1: case QCOM_CPU_PART_FALKOR: return 10000; } } return cppc_get_transition_latency(cpu) / NSEC_PER_USEC;}#elsestatic unsigned int cppc_cpufreq_get_transition_delay_us(unsigned int cpu){ return cppc_get_transition_latency(cpu) / NSEC_PER_USEC;}#endif #if defined(CONFIG_ARM64) && defined(CONFIG_ENERGY_MODEL) static DEFINE_PER_CPU(unsigned int, efficiency_class);static void cppc_cpufreq_register_em(struct cpufreq_policy *policy); /* Create an artificial performance state every CPPC_EM_CAP_STEP capacity unit. */#define CPPC_EM_CAP_STEP (20)/* Increase the cost value by CPPC_EM_COST_STEP every performance state. */#define CPPC_EM_COST_STEP (1)/* Add a cost gap correspnding to the energy of 4 CPUs. */#define CPPC_EM_COST_GAP (4 * SCHED_CAPACITY_SCALE * CPPC_EM_COST_STEP \ / CPPC_EM_CAP_STEP) static unsigned int get_perf_level_count(struct cpufreq_policy *policy){ struct cppc_perf_caps *perf_caps; unsigned int min_cap, max_cap; struct cppc_cpudata *cpu_data; int cpu = policy->cpu; cpu_data = policy->driver_data; perf_caps = &cpu_data->perf_caps; max_cap = arch_scale_cpu_capacity(cpu); min_cap = div_u64(max_cap * perf_caps->lowest_perf, perf_caps->highest_perf); if ((min_cap == 0) || (max_cap < min_cap)) return 0; return 1 + max_cap / CPPC_EM_CAP_STEP - min_cap / CPPC_EM_CAP_STEP;} /* * The cost is defined as: * cost = power * max_frequency / frequency */static inline unsigned long compute_cost(int cpu, int step)Lines 1–500 of 1013. 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// SPDX-License-Identifier: GPL-2.0-only /* * CPPC (Collaborative Processor Performance Control) driver for * interfacing with the CPUfreq layer and governors. See * cppc_acpi.c for CPPC specific methods. * * (C) Copyright 2014, 2015 Linaro Ltd. * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org> */ #define pr_fmt(fmt) "CPPC Cpufreq:" fmt #include <linux/arch_topology.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/delay.h> #include <linux/cpu.h> #include <linux/cpufreq.h> #include <linux/dmi.h> #include <linux/irq_work.h> #include <linux/kthread.h> #include <linux/time.h> #include <linux/vmalloc.h> #include <uapi/linux/sched/types.h> #include <asm/unaligned.h> #include <acpi/cppc_acpi.h> /* Minimum struct length needed for the DMI processor entry we want */ #define DMI_ENTRY_PROCESSOR_MIN_LENGTH 48 /* Offset in the DMI processor structure for the max frequency */ #define DMI_PROCESSOR_MAX_SPEED 0x14 /* * This list contains information parsed from per CPU ACPI _CPC and _PSD * structures: e.g. the highest and lowest supported performance, capabilities, * desired performance, level requested etc. Depending on the share_type, not * all CPUs will have an entry in the list. */ static LIST_HEAD(cpu_data_list); static bool boost_supported; struct cppc_workaround_oem_info { char oem_id[ACPI_OEM_ID_SIZE + 1]; char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1]; u32 oem_revision; }; static struct cppc_workaround_oem_info wa_info[] = { { .oem_id = "HISI ", .oem_table_id = "HIP07 ", .oem_revision = 0, }, { .oem_id = "HISI ", .oem_table_id = "HIP08 ", .oem_revision = 0, } }; static struct cpufreq_driver cppc_cpufreq_driver; static enum { FIE_UNSET = -1, FIE_ENABLED, FIE_DISABLED } fie_disabled = FIE_UNSET; #ifdef CONFIG_ACPI_CPPC_CPUFREQ_FIE module_param(fie_disabled, int, 0444); MODULE_PARM_DESC(fie_disabled, "Disable Frequency Invariance Engine (FIE)"); /* Frequency invariance support */ struct cppc_freq_invariance { int cpu; struct irq_work irq_work; struct kthread_work work; struct cppc_perf_fb_ctrs prev_perf_fb_ctrs; struct cppc_cpudata *cpu_data; }; static DEFINE_PER_CPU(struct cppc_freq_invariance, cppc_freq_inv); static struct kthread_worker *kworker_fie; static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu); static int cppc_perf_from_fbctrs(struct cppc_cpudata *cpu_data, struct cppc_perf_fb_ctrs *fb_ctrs_t0, struct cppc_perf_fb_ctrs *fb_ctrs_t1); /** * cppc_scale_freq_workfn - CPPC arch_freq_scale updater for frequency invariance * @work: The work item. * * The CPPC driver register itself with the topology core to provide its own * implementation (cppc_scale_freq_tick()) of topology_scale_freq_tick() which * gets called by the scheduler on every tick. * * Note that the arch specific counters have higher priority than CPPC counters, * if available, though the CPPC driver doesn't need to have any special * handling for that. * * On an invocation of cppc_scale_freq_tick(), we schedule an irq work (since we * reach here from hard-irq context), which then schedules a normal work item * and cppc_scale_freq_workfn() updates the per_cpu arch_freq_scale variable * based on the counter updates since the last tick. */ static void cppc_scale_freq_workfn(struct kthread_work *work) { struct cppc_freq_invariance *cppc_fi; struct cppc_perf_fb_ctrs fb_ctrs = {0}; struct cppc_cpudata *cpu_data; unsigned long local_freq_scale; u64 perf; cppc_fi = container_of(work, struct cppc_freq_invariance, work); cpu_data = cppc_fi->cpu_data; if (cppc_get_perf_ctrs(cppc_fi->cpu, &fb_ctrs)) { pr_warn("%s: failed to read perf counters\n", __func__); return; } perf = cppc_perf_from_fbctrs(cpu_data, &cppc_fi->prev_perf_fb_ctrs, &fb_ctrs); cppc_fi->prev_perf_fb_ctrs = fb_ctrs; perf <<= SCHED_CAPACITY_SHIFT; local_freq_scale = div64_u64(perf, cpu_data->perf_caps.highest_perf); /* This can happen due to counter's overflow */ if (unlikely(local_freq_scale > 1024)) local_freq_scale = 1024; per_cpu(arch_freq_scale, cppc_fi->cpu) = local_freq_scale; } static void cppc_irq_work(struct irq_work *irq_work) { struct cppc_freq_invariance *cppc_fi; cppc_fi = container_of(irq_work, struct cppc_freq_invariance, irq_work); kthread_queue_work(kworker_fie, &cppc_fi->work); } static void cppc_scale_freq_tick(void) { struct cppc_freq_invariance *cppc_fi = &per_cpu(cppc_freq_inv, smp_processor_id()); /* * cppc_get_perf_ctrs() can potentially sleep, call that from the right * context. */ irq_work_queue(&cppc_fi->irq_work); } static struct scale_freq_data cppc_sftd = { .source = SCALE_FREQ_SOURCE_CPPC, .set_freq_scale = cppc_scale_freq_tick, }; static void cppc_cpufreq_cpu_fie_init(struct cpufreq_policy *policy) { struct cppc_freq_invariance *cppc_fi; int cpu, ret; if (fie_disabled) return; for_each_cpu(cpu, policy->cpus) { cppc_fi = &per_cpu(cppc_freq_inv, cpu); cppc_fi->cpu = cpu; cppc_fi->cpu_data = policy->driver_data; kthread_init_work(&cppc_fi->work, cppc_scale_freq_workfn); init_irq_work(&cppc_fi->irq_work, cppc_irq_work); ret = cppc_get_perf_ctrs(cpu, &cppc_fi->prev_perf_fb_ctrs); if (ret) { pr_warn("%s: failed to read perf counters for cpu:%d: %d\n", __func__, cpu, ret); /* * Don't abort if the CPU was offline while the driver * was getting registered. */ if (cpu_online(cpu)) return; } } /* Register for freq-invariance */ topology_set_scale_freq_source(&cppc_sftd, policy->cpus); } /* * We free all the resources on policy's removal and not on CPU removal as the * irq-work are per-cpu and the hotplug core takes care of flushing the pending * irq-works (hint: smpcfd_dying_cpu()) on CPU hotplug. Even if the kthread-work * fires on another CPU after the concerned CPU is removed, it won't harm. * * We just need to make sure to remove them all on policy->exit(). */ static void cppc_cpufreq_cpu_fie_exit(struct cpufreq_policy *policy) { struct cppc_freq_invariance *cppc_fi; int cpu; if (fie_disabled) return; /* policy->cpus will be empty here, use related_cpus instead */ topology_clear_scale_freq_source(SCALE_FREQ_SOURCE_CPPC, policy->related_cpus); for_each_cpu(cpu, policy->related_cpus) { cppc_fi = &per_cpu(cppc_freq_inv, cpu); irq_work_sync(&cppc_fi->irq_work); kthread_cancel_work_sync(&cppc_fi->work); } } static void __init cppc_freq_invariance_init(void) { struct sched_attr attr = { .size = sizeof(struct sched_attr), .sched_policy = SCHED_DEADLINE, .sched_nice = 0, .sched_priority = 0, /* * Fake (unused) bandwidth; workaround to "fix" * priority inheritance. */ .sched_runtime = 1000000, .sched_deadline = 10000000, .sched_period = 10000000, }; int ret; if (fie_disabled != FIE_ENABLED && fie_disabled != FIE_DISABLED) { fie_disabled = FIE_ENABLED; if (cppc_perf_ctrs_in_pcc()) { pr_info("FIE not enabled on systems with registers in PCC\n"); fie_disabled = FIE_DISABLED; } } if (fie_disabled) return; kworker_fie = kthread_create_worker(0, "cppc_fie"); if (IS_ERR(kworker_fie)) return; ret = sched_setattr_nocheck(kworker_fie->task, &attr); if (ret) { pr_warn("%s: failed to set SCHED_DEADLINE: %d\n", __func__, ret); kthread_destroy_worker(kworker_fie); return; } } static void cppc_freq_invariance_exit(void) { if (fie_disabled) return; kthread_destroy_worker(kworker_fie); kworker_fie = NULL; } #else static inline void cppc_cpufreq_cpu_fie_init(struct cpufreq_policy *policy) { } static inline void cppc_cpufreq_cpu_fie_exit(struct cpufreq_policy *policy) { } static inline void cppc_freq_invariance_init(void) { } static inline void cppc_freq_invariance_exit(void) { } #endif /* CONFIG_ACPI_CPPC_CPUFREQ_FIE */ /* Callback function used to retrieve the max frequency from DMI */ static void cppc_find_dmi_mhz(const struct dmi_header *dm, void *private) { const u8 *dmi_data = (const u8 *)dm; u16 *mhz = (u16 *)private; if (dm->type == DMI_ENTRY_PROCESSOR && dm->length >= DMI_ENTRY_PROCESSOR_MIN_LENGTH) { u16 val = (u16)get_unaligned((const u16 *) (dmi_data + DMI_PROCESSOR_MAX_SPEED)); *mhz = val > *mhz ? val : *mhz; } } /* Look up the max frequency in DMI */ static u64 cppc_get_dmi_max_khz(void) { u16 mhz = 0; dmi_walk(cppc_find_dmi_mhz, &mhz); /* * Real stupid fallback value, just in case there is no * actual value set. */ mhz = mhz ? mhz : 1; return (1000 * mhz); } /* * If CPPC lowest_freq and nominal_freq registers are exposed then we can * use them to convert perf to freq and vice versa. The conversion is * extrapolated as an affine function passing by the 2 points: * - (Low perf, Low freq) * - (Nominal perf, Nominal perf) */ static unsigned int cppc_cpufreq_perf_to_khz(struct cppc_cpudata *cpu_data, unsigned int perf) { struct cppc_perf_caps *caps = &cpu_data->perf_caps; s64 retval, offset = 0; static u64 max_khz; u64 mul, div; if (caps->lowest_freq && caps->nominal_freq) { mul = caps->nominal_freq - caps->lowest_freq; div = caps->nominal_perf - caps->lowest_perf; offset = caps->nominal_freq - div64_u64(caps->nominal_perf * mul, div); } else { if (!max_khz) max_khz = cppc_get_dmi_max_khz(); mul = max_khz; div = caps->highest_perf; } retval = offset + div64_u64(perf * mul, div); if (retval >= 0) return retval; return 0; } static unsigned int cppc_cpufreq_khz_to_perf(struct cppc_cpudata *cpu_data, unsigned int freq) { struct cppc_perf_caps *caps = &cpu_data->perf_caps; s64 retval, offset = 0; static u64 max_khz; u64 mul, div; if (caps->lowest_freq && caps->nominal_freq) { mul = caps->nominal_perf - caps->lowest_perf; div = caps->nominal_freq - caps->lowest_freq; offset = caps->nominal_perf - div64_u64(caps->nominal_freq * mul, div); } else { if (!max_khz) max_khz = cppc_get_dmi_max_khz(); mul = caps->highest_perf; div = max_khz; } retval = offset + div64_u64(freq * mul, div); if (retval >= 0) return retval; return 0; } static int cppc_cpufreq_set_target(struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation) { struct cppc_cpudata *cpu_data = policy->driver_data; unsigned int cpu = policy->cpu; struct cpufreq_freqs freqs; u32 desired_perf; int ret = 0; desired_perf = cppc_cpufreq_khz_to_perf(cpu_data, target_freq); /* Return if it is exactly the same perf */ if (desired_perf == cpu_data->perf_ctrls.desired_perf) return ret; cpu_data->perf_ctrls.desired_perf = desired_perf; freqs.old = policy->cur; freqs.new = target_freq; cpufreq_freq_transition_begin(policy, &freqs); ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls); cpufreq_freq_transition_end(policy, &freqs, ret != 0); if (ret) pr_debug("Failed to set target on CPU:%d. ret:%d\n", cpu, ret); return ret; } static unsigned int cppc_cpufreq_fast_switch(struct cpufreq_policy *policy, unsigned int target_freq) { struct cppc_cpudata *cpu_data = policy->driver_data; unsigned int cpu = policy->cpu; u32 desired_perf; int ret; desired_perf = cppc_cpufreq_khz_to_perf(cpu_data, target_freq); cpu_data->perf_ctrls.desired_perf = desired_perf; ret = cppc_set_perf(cpu, &cpu_data->perf_ctrls); if (ret) { pr_debug("Failed to set target on CPU:%d. ret:%d\n", cpu, ret); return 0; } return target_freq; } static int cppc_verify_policy(struct cpufreq_policy_data *policy) { cpufreq_verify_within_cpu_limits(policy); return 0; } /* * The PCC subspace describes the rate at which platform can accept commands * on the shared PCC channel (including READs which do not count towards freq * transition requests), so ideally we need to use the PCC values as a fallback * if we don't have a platform specific transition_delay_us */ #ifdef CONFIG_ARM64 #include <asm/cputype.h> static unsigned int cppc_cpufreq_get_transition_delay_us(unsigned int cpu) { unsigned long implementor = read_cpuid_implementor(); unsigned long part_num = read_cpuid_part_number(); switch (implementor) { case ARM_CPU_IMP_QCOM: switch (part_num) { case QCOM_CPU_PART_FALKOR_V1: case QCOM_CPU_PART_FALKOR: return 10000; } } return cppc_get_transition_latency(cpu) / NSEC_PER_USEC; } #else static unsigned int cppc_cpufreq_get_transition_delay_us(unsigned int cpu) { return cppc_get_transition_latency(cpu) / NSEC_PER_USEC; } #endif #if defined(CONFIG_ARM64) && defined(CONFIG_ENERGY_MODEL) static DEFINE_PER_CPU(unsigned int, efficiency_class); static void cppc_cpufreq_register_em(struct cpufreq_policy *policy); /* Create an artificial performance state every CPPC_EM_CAP_STEP capacity unit. */ #define CPPC_EM_CAP_STEP (20) /* Increase the cost value by CPPC_EM_COST_STEP every performance state. */ #define CPPC_EM_COST_STEP (1) /* Add a cost gap correspnding to the energy of 4 CPUs. */ #define CPPC_EM_COST_GAP (4 * SCHED_CAPACITY_SCALE * CPPC_EM_COST_STEP \ / CPPC_EM_CAP_STEP) static unsigned int get_perf_level_count(struct cpufreq_policy *policy) { struct cppc_perf_caps *perf_caps; unsigned int min_cap, max_cap; struct cppc_cpudata *cpu_data; int cpu = policy->cpu; cpu_data = policy->driver_data; perf_caps = &cpu_data->perf_caps; max_cap = arch_scale_cpu_capacity(cpu); min_cap = div_u64(max_cap * perf_caps->lowest_perf, perf_caps->highest_perf); if ((min_cap == 0) || (max_cap < min_cap)) return 0; return 1 + max_cap / CPPC_EM_CAP_STEP - min_cap / CPPC_EM_CAP_STEP; } /* * The cost is defined as: * cost = power * max_frequency / frequency */ static inline unsigned long compute_cost(int cpu, int step)