// SPDX-License-Identifier: GPL-2.0-or-later/* * Intel CPU Microcode Update Driver for Linux * * Copyright (C) 2000-2006 Tigran Aivazian <aivazian.tigran@gmail.com> * 2006 Shaohua Li <shaohua.li@intel.com> * * Intel CPU microcode early update for Linux * * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com> * H Peter Anvin" <hpa@zytor.com> */ /* * This needs to be before all headers so that pr_debug in printk.h doesn't turn * printk calls into no_printk(). * *#define DEBUG */#define pr_fmt(fmt) "microcode: " fmt #include <linux/earlycpio.h>#include <linux/firmware.h>#include <linux/uaccess.h>#include <linux/vmalloc.h>#include <linux/initrd.h>#include <linux/kernel.h>#include <linux/slab.h>#include <linux/cpu.h>#include <linux/uio.h>#include <linux/mm.h> #include <asm/microcode_intel.h>#include <asm/intel-family.h>#include <asm/processor.h>#include <asm/tlbflush.h>#include <asm/setup.h>#include <asm/msr.h> static const char ucode_path[] = "kernel/x86/microcode/GenuineIntel.bin"; /* Current microcode patch used in early patching on the APs. */static struct microcode_intel *intel_ucode_patch; /* last level cache size per core */static int llc_size_per_core; /* * Returns 1 if update has been found, 0 otherwise. */static int has_newer_microcode(void *mc, unsigned int csig, int cpf, int new_rev){ struct microcode_header_intel *mc_hdr = mc; if (mc_hdr->rev <= new_rev) return 0; return intel_find_matching_signature(mc, csig, cpf);} static struct ucode_patch *memdup_patch(void *data, unsigned int size){ struct ucode_patch *p; p = kzalloc(sizeof(struct ucode_patch), GFP_KERNEL); if (!p) return NULL; p->data = kmemdup(data, size, GFP_KERNEL); if (!p->data) { kfree(p); return NULL; } return p;} static void save_microcode_patch(struct ucode_cpu_info *uci, void *data, unsigned int size){ struct microcode_header_intel *mc_hdr, *mc_saved_hdr; struct ucode_patch *iter, *tmp, *p = NULL; bool prev_found = false; unsigned int sig, pf; mc_hdr = (struct microcode_header_intel *)data; list_for_each_entry_safe(iter, tmp, µcode_cache, plist) { mc_saved_hdr = (struct microcode_header_intel *)iter->data; sig = mc_saved_hdr->sig; pf = mc_saved_hdr->pf; if (intel_find_matching_signature(data, sig, pf)) { prev_found = true; if (mc_hdr->rev <= mc_saved_hdr->rev) continue; p = memdup_patch(data, size); if (!p) pr_err("Error allocating buffer %p\n", data); else { list_replace(&iter->plist, &p->plist); kfree(iter->data); kfree(iter); } } } /* * There weren't any previous patches found in the list cache; save the * newly found. */ if (!prev_found) { p = memdup_patch(data, size); if (!p) pr_err("Error allocating buffer for %p\n", data); else list_add_tail(&p->plist, µcode_cache); } if (!p) return; if (!intel_find_matching_signature(p->data, uci->cpu_sig.sig, uci->cpu_sig.pf)) return; /* * Save for early loading. On 32-bit, that needs to be a physical * address as the APs are running from physical addresses, before * paging has been enabled. */ if (IS_ENABLED(CONFIG_X86_32)) intel_ucode_patch = (struct microcode_intel *)__pa_nodebug(p->data); else intel_ucode_patch = p->data;} /* * Get microcode matching with BSP's model. Only CPUs with the same model as * BSP can stay in the platform. */static struct microcode_intel *scan_microcode(void *data, size_t size, struct ucode_cpu_info *uci, bool save){ struct microcode_header_intel *mc_header; struct microcode_intel *patch = NULL; unsigned int mc_size; while (size) { if (size < sizeof(struct microcode_header_intel)) break; mc_header = (struct microcode_header_intel *)data; mc_size = get_totalsize(mc_header); if (!mc_size || mc_size > size || intel_microcode_sanity_check(data, false, MC_HEADER_TYPE_MICROCODE) < 0) break; size -= mc_size; if (!intel_find_matching_signature(data, uci->cpu_sig.sig, uci->cpu_sig.pf)) { data += mc_size; continue; } if (save) { save_microcode_patch(uci, data, mc_size); goto next; } if (!patch) { if (!has_newer_microcode(data, uci->cpu_sig.sig, uci->cpu_sig.pf, uci->cpu_sig.rev)) goto next; } else { struct microcode_header_intel *phdr = &patch->hdr; if (!has_newer_microcode(data, phdr->sig, phdr->pf, phdr->rev)) goto next; } /* We have a newer patch, save it. */ patch = data; next: data += mc_size; } if (size) return NULL; return patch;} static void show_saved_mc(void){#ifdef DEBUG int i = 0, j; unsigned int sig, pf, rev, total_size, data_size, date; struct ucode_cpu_info uci; struct ucode_patch *p; if (list_empty(µcode_cache)) { pr_debug("no microcode data saved.\n"); return; } intel_cpu_collect_info(&uci); sig = uci.cpu_sig.sig; pf = uci.cpu_sig.pf; rev = uci.cpu_sig.rev; pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev); list_for_each_entry(p, µcode_cache, plist) { struct microcode_header_intel *mc_saved_header; struct extended_sigtable *ext_header; struct extended_signature *ext_sig; int ext_sigcount; mc_saved_header = (struct microcode_header_intel *)p->data; sig = mc_saved_header->sig; pf = mc_saved_header->pf; rev = mc_saved_header->rev; date = mc_saved_header->date; total_size = get_totalsize(mc_saved_header); data_size = get_datasize(mc_saved_header); pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, total size=0x%x, date = %04x-%02x-%02x\n", i++, sig, pf, rev, total_size, date & 0xffff, date >> 24, (date >> 16) & 0xff); /* Look for ext. headers: */ if (total_size <= data_size + MC_HEADER_SIZE) continue; ext_header = (void *)mc_saved_header + data_size + MC_HEADER_SIZE; ext_sigcount = ext_header->count; ext_sig = (void *)ext_header + EXT_HEADER_SIZE; for (j = 0; j < ext_sigcount; j++) { sig = ext_sig->sig; pf = ext_sig->pf; pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n", j, sig, pf); ext_sig++; } }#endif} /* * Save this microcode patch. It will be loaded early when a CPU is * hot-added or resumes. */static void save_mc_for_early(struct ucode_cpu_info *uci, u8 *mc, unsigned int size){ /* Synchronization during CPU hotplug. */ static DEFINE_MUTEX(x86_cpu_microcode_mutex); mutex_lock(&x86_cpu_microcode_mutex); save_microcode_patch(uci, mc, size); show_saved_mc(); mutex_unlock(&x86_cpu_microcode_mutex);} static bool load_builtin_intel_microcode(struct cpio_data *cp){ unsigned int eax = 1, ebx, ecx = 0, edx; struct firmware fw; char name[30]; if (IS_ENABLED(CONFIG_X86_32)) return false; native_cpuid(&eax, &ebx, &ecx, &edx); sprintf(name, "intel-ucode/%02x-%02x-%02x", x86_family(eax), x86_model(eax), x86_stepping(eax)); if (firmware_request_builtin(&fw, name)) { cp->size = fw.size; cp->data = (void *)fw.data; return true; } return false;} /* * Print ucode update info. */static voidprint_ucode_info(struct ucode_cpu_info *uci, unsigned int date){ pr_info_once("microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n", uci->cpu_sig.rev, date & 0xffff, date >> 24, (date >> 16) & 0xff);} #ifdef CONFIG_X86_32 static int delay_ucode_info;static int current_mc_date; /* * Print early updated ucode info after printk works. This is delayed info dump. */void show_ucode_info_early(void){ struct ucode_cpu_info uci; if (delay_ucode_info) { intel_cpu_collect_info(&uci); print_ucode_info(&uci, current_mc_date); delay_ucode_info = 0; }} /* * At this point, we can not call printk() yet. Delay printing microcode info in * show_ucode_info_early() until printk() works. */static void print_ucode(struct ucode_cpu_info *uci){ struct microcode_intel *mc; int *delay_ucode_info_p; int *current_mc_date_p; mc = uci->mc; if (!mc) return; delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info); current_mc_date_p = (int *)__pa_nodebug(¤t_mc_date); *delay_ucode_info_p = 1; *current_mc_date_p = mc->hdr.date;}#else static inline void print_ucode(struct ucode_cpu_info *uci){ struct microcode_intel *mc; mc = uci->mc; if (!mc) return; print_ucode_info(uci, mc->hdr.date);}#endif static int apply_microcode_early(struct ucode_cpu_info *uci, bool early){ struct microcode_intel *mc; u32 rev; mc = uci->mc; if (!mc) return 0; /* * Save us the MSR write below - which is a particular expensive * operation - when the other hyperthread has updated the microcode * already. */ rev = intel_get_microcode_revision(); if (rev >= mc->hdr.rev) { uci->cpu_sig.rev = rev; return UCODE_OK; } /* * Writeback and invalidate caches before updating microcode to avoid * internal issues depending on what the microcode is updating. */ native_wbinvd(); /* write microcode via MSR 0x79 */ native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits); rev = intel_get_microcode_revision(); if (rev != mc->hdr.rev) return -1; uci->cpu_sig.rev = rev; if (early) print_ucode(uci); else print_ucode_info(uci, mc->hdr.date); return 0;} int __init save_microcode_in_initrd_intel(void){ struct ucode_cpu_info uci; struct cpio_data cp; /* * initrd is going away, clear patch ptr. We will scan the microcode one * last time before jettisoning and save a patch, if found. Then we will * update that pointer too, with a stable patch address to use when * resuming the cores. */ intel_ucode_patch = NULL; if (!load_builtin_intel_microcode(&cp)) cp = find_microcode_in_initrd(ucode_path, false); if (!(cp.data && cp.size)) return 0; intel_cpu_collect_info(&uci); scan_microcode(cp.data, cp.size, &uci, true); show_saved_mc(); return 0;} /* * @res_patch, output: a pointer to the patch we found. */static struct microcode_intel *__load_ucode_intel(struct ucode_cpu_info *uci){ static const char *path; struct cpio_data cp; bool use_pa; if (IS_ENABLED(CONFIG_X86_32)) { path = (const char *)__pa_nodebug(ucode_path); use_pa = true; } else { path = ucode_path; use_pa = false; } /* try built-in microcode first */ if (!load_builtin_intel_microcode(&cp)) cp = find_microcode_in_initrd(path, use_pa); if (!(cp.data && cp.size)) return NULL; intel_cpu_collect_info(uci); return scan_microcode(cp.data, cp.size, uci, false);} void __init load_ucode_intel_bsp(void){ struct microcode_intel *patch; struct ucode_cpu_info uci; patch = __load_ucode_intel(&uci); if (!patch) return; uci.mc = patch; apply_microcode_early(&uci, true);} void load_ucode_intel_ap(void){ struct microcode_intel *patch, **iup; struct ucode_cpu_info uci; if (IS_ENABLED(CONFIG_X86_32)) iup = (struct microcode_intel **) __pa_nodebug(&intel_ucode_patch); else iup = &intel_ucode_patch; if (!*iup) { patch = __load_ucode_intel(&uci); if (!patch)Lines 1–500 of 806. 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// SPDX-License-Identifier: GPL-2.0-or-later /* * Intel CPU Microcode Update Driver for Linux * * Copyright (C) 2000-2006 Tigran Aivazian <aivazian.tigran@gmail.com> * 2006 Shaohua Li <shaohua.li@intel.com> * * Intel CPU microcode early update for Linux * * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com> * H Peter Anvin" <hpa@zytor.com> */ /* * This needs to be before all headers so that pr_debug in printk.h doesn't turn * printk calls into no_printk(). * *#define DEBUG */ #define pr_fmt(fmt) "microcode: " fmt #include <linux/earlycpio.h> #include <linux/firmware.h> #include <linux/uaccess.h> #include <linux/vmalloc.h> #include <linux/initrd.h> #include <linux/kernel.h> #include <linux/slab.h> #include <linux/cpu.h> #include <linux/uio.h> #include <linux/mm.h> #include <asm/microcode_intel.h> #include <asm/intel-family.h> #include <asm/processor.h> #include <asm/tlbflush.h> #include <asm/setup.h> #include <asm/msr.h> static const char ucode_path[] = "kernel/x86/microcode/GenuineIntel.bin"; /* Current microcode patch used in early patching on the APs. */ static struct microcode_intel *intel_ucode_patch; /* last level cache size per core */ static int llc_size_per_core; /* * Returns 1 if update has been found, 0 otherwise. */ static int has_newer_microcode(void *mc, unsigned int csig, int cpf, int new_rev) { struct microcode_header_intel *mc_hdr = mc; if (mc_hdr->rev <= new_rev) return 0; return intel_find_matching_signature(mc, csig, cpf); } static struct ucode_patch *memdup_patch(void *data, unsigned int size) { struct ucode_patch *p; p = kzalloc(sizeof(struct ucode_patch), GFP_KERNEL); if (!p) return NULL; p->data = kmemdup(data, size, GFP_KERNEL); if (!p->data) { kfree(p); return NULL; } return p; } static void save_microcode_patch(struct ucode_cpu_info *uci, void *data, unsigned int size) { struct microcode_header_intel *mc_hdr, *mc_saved_hdr; struct ucode_patch *iter, *tmp, *p = NULL; bool prev_found = false; unsigned int sig, pf; mc_hdr = (struct microcode_header_intel *)data; list_for_each_entry_safe(iter, tmp, µcode_cache, plist) { mc_saved_hdr = (struct microcode_header_intel *)iter->data; sig = mc_saved_hdr->sig; pf = mc_saved_hdr->pf; if (intel_find_matching_signature(data, sig, pf)) { prev_found = true; if (mc_hdr->rev <= mc_saved_hdr->rev) continue; p = memdup_patch(data, size); if (!p) pr_err("Error allocating buffer %p\n", data); else { list_replace(&iter->plist, &p->plist); kfree(iter->data); kfree(iter); } } } /* * There weren't any previous patches found in the list cache; save the * newly found. */ if (!prev_found) { p = memdup_patch(data, size); if (!p) pr_err("Error allocating buffer for %p\n", data); else list_add_tail(&p->plist, µcode_cache); } if (!p) return; if (!intel_find_matching_signature(p->data, uci->cpu_sig.sig, uci->cpu_sig.pf)) return; /* * Save for early loading. On 32-bit, that needs to be a physical * address as the APs are running from physical addresses, before * paging has been enabled. */ if (IS_ENABLED(CONFIG_X86_32)) intel_ucode_patch = (struct microcode_intel *)__pa_nodebug(p->data); else intel_ucode_patch = p->data; } /* * Get microcode matching with BSP's model. Only CPUs with the same model as * BSP can stay in the platform. */ static struct microcode_intel * scan_microcode(void *data, size_t size, struct ucode_cpu_info *uci, bool save) { struct microcode_header_intel *mc_header; struct microcode_intel *patch = NULL; unsigned int mc_size; while (size) { if (size < sizeof(struct microcode_header_intel)) break; mc_header = (struct microcode_header_intel *)data; mc_size = get_totalsize(mc_header); if (!mc_size || mc_size > size || intel_microcode_sanity_check(data, false, MC_HEADER_TYPE_MICROCODE) < 0) break; size -= mc_size; if (!intel_find_matching_signature(data, uci->cpu_sig.sig, uci->cpu_sig.pf)) { data += mc_size; continue; } if (save) { save_microcode_patch(uci, data, mc_size); goto next; } if (!patch) { if (!has_newer_microcode(data, uci->cpu_sig.sig, uci->cpu_sig.pf, uci->cpu_sig.rev)) goto next; } else { struct microcode_header_intel *phdr = &patch->hdr; if (!has_newer_microcode(data, phdr->sig, phdr->pf, phdr->rev)) goto next; } /* We have a newer patch, save it. */ patch = data; next: data += mc_size; } if (size) return NULL; return patch; } static void show_saved_mc(void) { #ifdef DEBUG int i = 0, j; unsigned int sig, pf, rev, total_size, data_size, date; struct ucode_cpu_info uci; struct ucode_patch *p; if (list_empty(µcode_cache)) { pr_debug("no microcode data saved.\n"); return; } intel_cpu_collect_info(&uci); sig = uci.cpu_sig.sig; pf = uci.cpu_sig.pf; rev = uci.cpu_sig.rev; pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev); list_for_each_entry(p, µcode_cache, plist) { struct microcode_header_intel *mc_saved_header; struct extended_sigtable *ext_header; struct extended_signature *ext_sig; int ext_sigcount; mc_saved_header = (struct microcode_header_intel *)p->data; sig = mc_saved_header->sig; pf = mc_saved_header->pf; rev = mc_saved_header->rev; date = mc_saved_header->date; total_size = get_totalsize(mc_saved_header); data_size = get_datasize(mc_saved_header); pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, total size=0x%x, date = %04x-%02x-%02x\n", i++, sig, pf, rev, total_size, date & 0xffff, date >> 24, (date >> 16) & 0xff); /* Look for ext. headers: */ if (total_size <= data_size + MC_HEADER_SIZE) continue; ext_header = (void *)mc_saved_header + data_size + MC_HEADER_SIZE; ext_sigcount = ext_header->count; ext_sig = (void *)ext_header + EXT_HEADER_SIZE; for (j = 0; j < ext_sigcount; j++) { sig = ext_sig->sig; pf = ext_sig->pf; pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n", j, sig, pf); ext_sig++; } } #endif } /* * Save this microcode patch. It will be loaded early when a CPU is * hot-added or resumes. */ static void save_mc_for_early(struct ucode_cpu_info *uci, u8 *mc, unsigned int size) { /* Synchronization during CPU hotplug. */ static DEFINE_MUTEX(x86_cpu_microcode_mutex); mutex_lock(&x86_cpu_microcode_mutex); save_microcode_patch(uci, mc, size); show_saved_mc(); mutex_unlock(&x86_cpu_microcode_mutex); } static bool load_builtin_intel_microcode(struct cpio_data *cp) { unsigned int eax = 1, ebx, ecx = 0, edx; struct firmware fw; char name[30]; if (IS_ENABLED(CONFIG_X86_32)) return false; native_cpuid(&eax, &ebx, &ecx, &edx); sprintf(name, "intel-ucode/%02x-%02x-%02x", x86_family(eax), x86_model(eax), x86_stepping(eax)); if (firmware_request_builtin(&fw, name)) { cp->size = fw.size; cp->data = (void *)fw.data; return true; } return false; } /* * Print ucode update info. */ static void print_ucode_info(struct ucode_cpu_info *uci, unsigned int date) { pr_info_once("microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n", uci->cpu_sig.rev, date & 0xffff, date >> 24, (date >> 16) & 0xff); } #ifdef CONFIG_X86_32 static int delay_ucode_info; static int current_mc_date; /* * Print early updated ucode info after printk works. This is delayed info dump. */ void show_ucode_info_early(void) { struct ucode_cpu_info uci; if (delay_ucode_info) { intel_cpu_collect_info(&uci); print_ucode_info(&uci, current_mc_date); delay_ucode_info = 0; } } /* * At this point, we can not call printk() yet. Delay printing microcode info in * show_ucode_info_early() until printk() works. */ static void print_ucode(struct ucode_cpu_info *uci) { struct microcode_intel *mc; int *delay_ucode_info_p; int *current_mc_date_p; mc = uci->mc; if (!mc) return; delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info); current_mc_date_p = (int *)__pa_nodebug(¤t_mc_date); *delay_ucode_info_p = 1; *current_mc_date_p = mc->hdr.date; } #else static inline void print_ucode(struct ucode_cpu_info *uci) { struct microcode_intel *mc; mc = uci->mc; if (!mc) return; print_ucode_info(uci, mc->hdr.date); } #endif static int apply_microcode_early(struct ucode_cpu_info *uci, bool early) { struct microcode_intel *mc; u32 rev; mc = uci->mc; if (!mc) return 0; /* * Save us the MSR write below - which is a particular expensive * operation - when the other hyperthread has updated the microcode * already. */ rev = intel_get_microcode_revision(); if (rev >= mc->hdr.rev) { uci->cpu_sig.rev = rev; return UCODE_OK; } /* * Writeback and invalidate caches before updating microcode to avoid * internal issues depending on what the microcode is updating. */ native_wbinvd(); /* write microcode via MSR 0x79 */ native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits); rev = intel_get_microcode_revision(); if (rev != mc->hdr.rev) return -1; uci->cpu_sig.rev = rev; if (early) print_ucode(uci); else print_ucode_info(uci, mc->hdr.date); return 0; } int __init save_microcode_in_initrd_intel(void) { struct ucode_cpu_info uci; struct cpio_data cp; /* * initrd is going away, clear patch ptr. We will scan the microcode one * last time before jettisoning and save a patch, if found. Then we will * update that pointer too, with a stable patch address to use when * resuming the cores. */ intel_ucode_patch = NULL; if (!load_builtin_intel_microcode(&cp)) cp = find_microcode_in_initrd(ucode_path, false); if (!(cp.data && cp.size)) return 0; intel_cpu_collect_info(&uci); scan_microcode(cp.data, cp.size, &uci, true); show_saved_mc(); return 0; } /* * @res_patch, output: a pointer to the patch we found. */ static struct microcode_intel *__load_ucode_intel(struct ucode_cpu_info *uci) { static const char *path; struct cpio_data cp; bool use_pa; if (IS_ENABLED(CONFIG_X86_32)) { path = (const char *)__pa_nodebug(ucode_path); use_pa = true; } else { path = ucode_path; use_pa = false; } /* try built-in microcode first */ if (!load_builtin_intel_microcode(&cp)) cp = find_microcode_in_initrd(path, use_pa); if (!(cp.data && cp.size)) return NULL; intel_cpu_collect_info(uci); return scan_microcode(cp.data, cp.size, uci, false); } void __init load_ucode_intel_bsp(void) { struct microcode_intel *patch; struct ucode_cpu_info uci; patch = __load_ucode_intel(&uci); if (!patch) return; uci.mc = patch; apply_microcode_early(&uci, true); } void load_ucode_intel_ap(void) { struct microcode_intel *patch, **iup; struct ucode_cpu_info uci; if (IS_ENABLED(CONFIG_X86_32)) iup = (struct microcode_intel **) __pa_nodebug(&intel_ucode_patch); else iup = &intel_ucode_patch; if (!*iup) { patch = __load_ucode_intel(&uci); if (!patch)