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qed: FW 8.42.2.0 HSI changes

This patch contains several HSI changes. The changes are part of features like RDMA VF and OVS, the patch also contains a fix to how the init code determines if the dmae is ready to be used.

Michal Kalderon committed 6 years ago

Commit 0500a701 parent 6459d937 files · +280 −154Browse files

Showing the changes to include/linux (2 of 7 files). Show all

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2 files
  1. include/linux/qed/common_hsi.h +12 −9
  2. include/linux/qed/eth_common.h +56 −22
include/linux/qed/common_hsi.h+12−9
@@ -76,7 +76,6 @@ · 75 unmodified lines
7676
7777 #define FW_ASSERT_GENERAL_ATTN_IDX 32
7878
79−#define MAX_PINNED_CCFC 32
8079
8180 /* Queue Zone sizes in bytes */
8281 #define TSTORM_QZONE_SIZE 8
@@ -139,10 +138,10 @@ · 56 unmodified lines
139138 #define MAX_NUM_VFS (MAX_NUM_VFS_K2)
140139
141140 #define MAX_NUM_FUNCTIONS_BB (MAX_NUM_PFS_BB + MAX_NUM_VFS_BB)
142−#define MAX_NUM_FUNCTIONS (MAX_NUM_PFS + MAX_NUM_VFS)
143141
144142 #define MAX_FUNCTION_NUMBER_BB (MAX_NUM_PFS + MAX_NUM_VFS_BB)
145−#define MAX_FUNCTION_NUMBER (MAX_NUM_PFS + MAX_NUM_VFS)
143+#define MAX_FUNCTION_NUMBER_K2 (MAX_NUM_PFS + MAX_NUM_VFS_K2)
144+#define MAX_NUM_FUNCTIONS (MAX_FUNCTION_NUMBER_K2)
146145
147146 #define MAX_NUM_VPORTS_K2 (208)
148147 #define MAX_NUM_VPORTS_BB (160)
@@ -229,6 +228,7 @@ · 80 unmodified lines
229228 #define DQ_XCM_TOE_TX_BD_PROD_CMD DQ_XCM_AGG_VAL_SEL_WORD4
230229 #define DQ_XCM_TOE_MORE_TO_SEND_SEQ_CMD DQ_XCM_AGG_VAL_SEL_REG3
231230 #define DQ_XCM_TOE_LOCAL_ADV_WND_SEQ_CMD DQ_XCM_AGG_VAL_SEL_REG4
231+#define DQ_XCM_ROCE_ACK_EDPM_DORQ_SEQ_CMD DQ_XCM_AGG_VAL_SEL_WORD5
232232
233233 /* UCM agg val selection (HW) */
234234 #define DQ_UCM_AGG_VAL_SEL_WORD0 0
@@ -406,6 +406,7 @@ · 171 unmodified lines
406406
407407 /* Number of Protocol Indices per Status Block */
408408 #define PIS_PER_SB_E4 12
409+#define MAX_PIS_PER_SB PIS_PER_SB
409410
410411 #define CAU_HC_STOPPED_STATE 3
411412 #define CAU_HC_DISABLE_STATE 4
@@ -436,8 +437,6 @@ · 24 unmodified lines
436437 #define IGU_MEM_PBA_MSIX_RESERVED_UPPER 0x03ff
437438
438439 #define IGU_CMD_INT_ACK_BASE 0x0400
439−#define IGU_CMD_INT_ACK_UPPER (IGU_CMD_INT_ACK_BASE + \
440− MAX_TOT_SB_PER_PATH - 1)
441440 #define IGU_CMD_INT_ACK_RESERVED_UPPER 0x05ff
442441
443442 #define IGU_CMD_ATTN_BIT_UPD_UPPER 0x05f0
@@ -450,8 +449,6 @@ · 6 unmodified lines
450449 #define IGU_REG_SISR_MDPC_WOMASK_UPPER 0x05f6
451450
452451 #define IGU_CMD_PROD_UPD_BASE 0x0600
453−#define IGU_CMD_PROD_UPD_UPPER (IGU_CMD_PROD_UPD_BASE +\
454− MAX_TOT_SB_PER_PATH - 1)
455452 #define IGU_CMD_PROD_UPD_RESERVED_UPPER 0x07ff
456453
457454 /*****************/
@@ -741,6 +738,8 @@ enum protocol_type { · 283 unmodified lines
741738 PROTOCOLID_PREROCE,
742739 PROTOCOLID_COMMON,
743740 PROTOCOLID_RESERVED1,
741+ PROTOCOLID_RDMA,
742+ PROTOCOLID_SCSI,
744743 MAX_PROTOCOL_TYPE
745744 };
746745
@@ -761,6 +760,10 @@ union rdma_eqe_data { · 14 unmodified lines
761760 struct rdma_eqe_destroy_qp rdma_destroy_qp_data;
762761 };
763762
763+struct tstorm_queue_zone {
764+ __le32 reserved[2];
765+};
766+
764767 /* Ustorm Queue Zone */
765768 struct ustorm_eth_queue_zone {
766769 struct coalescing_timeset int_coalescing_timeset;
@@ -883,8 +886,8 @@ struct db_l2_dpm_data { · 116 unmodified lines
883886 #define DB_L2_DPM_DATA_RESERVED0_SHIFT 27
884887 #define DB_L2_DPM_DATA_SGE_NUM_MASK 0x7
885888 #define DB_L2_DPM_DATA_SGE_NUM_SHIFT 28
886−#define DB_L2_DPM_DATA_GFS_SRC_EN_MASK 0x1
887−#define DB_L2_DPM_DATA_GFS_SRC_EN_SHIFT 31
889+#define DB_L2_DPM_DATA_TGFS_SRC_EN_MASK 0x1
890+#define DB_L2_DPM_DATA_TGFS_SRC_EN_SHIFT 31
888891 };
889892
890893 /* Structure for SGE in a DPM doorbell of type DPM_L2_BD */
include/linux/qed/eth_common.h+56−22
@@ -38,9 +38,11 @@ · 37 unmodified lines
3838 /********************/
3939
4040 #define ETH_HSI_VER_MAJOR 3
41−#define ETH_HSI_VER_MINOR 10
41+#define ETH_HSI_VER_MINOR 11
4242
43−#define ETH_HSI_VER_NO_PKT_LEN_TUNN 5
43+#define ETH_HSI_VER_NO_PKT_LEN_TUNN 5
44+/* Maximum number of pinned L2 connections (CIDs) */
45+#define ETH_PINNED_CONN_MAX_NUM 32
4446
4547 #define ETH_CACHE_LINE_SIZE 64
4648 #define ETH_RX_CQE_GAP 32
@@ -61,6 +63,7 @@ · 14 unmodified lines
6163 #define ETH_TX_MIN_BDS_PER_TUNN_IPV6_WITH_EXT_PKT 3
6264 #define ETH_TX_MIN_BDS_PER_IPV6_WITH_EXT_PKT 2
6365 #define ETH_TX_MIN_BDS_PER_PKT_W_LOOPBACK_MODE 2
66+#define ETH_TX_MIN_BDS_PER_PKT_W_VPORT_FORWARDING 4
6467 #define ETH_TX_MAX_NON_LSO_PKT_LEN (9700 - (4 + 4 + 12 + 8))
6568 #define ETH_TX_MAX_LSO_HDR_BYTES 510
6669 #define ETH_TX_LSO_WINDOW_BDS_NUM (18 - 1)
@@ -75,9 +78,8 @@ · 8 unmodified lines
7578 #define ETH_NUM_STATISTIC_COUNTERS_QUAD_VF_ZONE \
7679 (ETH_NUM_STATISTIC_COUNTERS - 3 * MAX_NUM_VFS / 4)
7780
78−/* Maximum number of buffers, used for RX packet placement */
7981 #define ETH_RX_MAX_BUFF_PER_PKT 5
80−#define ETH_RX_BD_THRESHOLD 12
82+#define ETH_RX_BD_THRESHOLD 16
8183
8284 /* Num of MAC/VLAN filters */
8385 #define ETH_NUM_MAC_FILTERS 512
@@ -96,24 +98,24 @@ · 12 unmodified lines
9698 #define ETH_RSS_ENGINE_NUM_BB 127
9799
98100 /* TPA constants */
99−#define ETH_TPA_MAX_AGGS_NUM 64
100−#define ETH_TPA_CQE_START_LEN_LIST_SIZE ETH_RX_MAX_BUFF_PER_PKT
101−#define ETH_TPA_CQE_CONT_LEN_LIST_SIZE 6
102−#define ETH_TPA_CQE_END_LEN_LIST_SIZE 4
101+#define ETH_TPA_MAX_AGGS_NUM 64
102+#define ETH_TPA_CQE_START_BW_LEN_LIST_SIZE 2
103+#define ETH_TPA_CQE_CONT_LEN_LIST_SIZE 6
104+#define ETH_TPA_CQE_END_LEN_LIST_SIZE 4
103105
104106 /* Control frame check constants */
105−#define ETH_CTL_FRAME_ETH_TYPE_NUM 4
107+#define ETH_CTL_FRAME_ETH_TYPE_NUM 4
106108
107109 /* GFS constants */
108110 #define ETH_GFT_TRASHCAN_VPORT 0x1FF /* GFT drop flow vport number */
109111
110112 /* Destination port mode */
111−enum dest_port_mode {
112− DEST_PORT_PHY,
113− DEST_PORT_LOOPBACK,
114− DEST_PORT_PHY_LOOPBACK,
115− DEST_PORT_DROP,
116− MAX_DEST_PORT_MODE
113+enum dst_port_mode {
114+ DST_PORT_PHY,
115+ DST_PORT_LOOPBACK,
116+ DST_PORT_PHY_LOOPBACK,
117+ DST_PORT_DROP,
118+ MAX_DST_PORT_MODE
117119 };
118120
119121 /* Ethernet address type */
@@ -167,8 +169,8 @@ struct eth_tx_data_2nd_bd { · 47 unmodified lines
167169 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_L2_HDR_SIZE_W_SHIFT 0
168170 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_ETH_TYPE_MASK 0x3
169171 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_ETH_TYPE_SHIFT 4
170−#define ETH_TX_DATA_2ND_BD_DEST_PORT_MODE_MASK 0x3
171−#define ETH_TX_DATA_2ND_BD_DEST_PORT_MODE_SHIFT 6
172+#define ETH_TX_DATA_2ND_BD_DST_PORT_MODE_MASK 0x3
173+#define ETH_TX_DATA_2ND_BD_DST_PORT_MODE_SHIFT 6
172174 #define ETH_TX_DATA_2ND_BD_START_BD_MASK 0x1
173175 #define ETH_TX_DATA_2ND_BD_START_BD_SHIFT 8
174176 #define ETH_TX_DATA_2ND_BD_TUNN_TYPE_MASK 0x3
@@ -244,8 +246,9 @@ struct eth_fast_path_rx_reg_cqe { · 69 unmodified lines
244246 struct eth_tunnel_parsing_flags tunnel_pars_flags;
245247 u8 bd_num;
246248 u8 reserved;
247− __le16 flow_id;
248− u8 reserved1[11];
249+ __le16 reserved2;
250+ __le32 flow_id_or_resource_id;
251+ u8 reserved1[7];
249252 struct eth_pmd_flow_flags pmd_flags;
250253 };
251254
@@ -296,9 +299,10 @@ struct eth_fast_path_rx_tpa_start_cqe { · 44 unmodified lines
296299 struct eth_tunnel_parsing_flags tunnel_pars_flags;
297300 u8 tpa_agg_index;
298301 u8 header_len;
299− __le16 ext_bd_len_list[ETH_TPA_CQE_START_LEN_LIST_SIZE];
300− __le16 flow_id;
301− u8 reserved;
302+ __le16 bw_ext_bd_len_list[ETH_TPA_CQE_START_BW_LEN_LIST_SIZE];
303+ __le16 reserved2;
304+ __le32 flow_id_or_resource_id;
305+ u8 reserved[3];
302306 struct eth_pmd_flow_flags pmd_flags;
303307 };
304308
@@ -407,6 +411,29 @@ struct eth_tx_3rd_bd { · 102 unmodified lines
407411 struct eth_tx_data_3rd_bd data;
408412 };
409413
414+/* The parsing information data for the forth tx bd of a given packet. */
415+struct eth_tx_data_4th_bd {
416+ u8 dst_vport_id;
417+ u8 reserved4;
418+ __le16 bitfields;
419+#define ETH_TX_DATA_4TH_BD_DST_VPORT_ID_VALID_MASK 0x1
420+#define ETH_TX_DATA_4TH_BD_DST_VPORT_ID_VALID_SHIFT 0
421+#define ETH_TX_DATA_4TH_BD_RESERVED1_MASK 0x7F
422+#define ETH_TX_DATA_4TH_BD_RESERVED1_SHIFT 1
423+#define ETH_TX_DATA_4TH_BD_START_BD_MASK 0x1
424+#define ETH_TX_DATA_4TH_BD_START_BD_SHIFT 8
425+#define ETH_TX_DATA_4TH_BD_RESERVED2_MASK 0x7F
426+#define ETH_TX_DATA_4TH_BD_RESERVED2_SHIFT 9
427+ __le16 reserved3;
428+};
429+
430+/* The forth tx bd of a given packet */
431+struct eth_tx_4th_bd {
432+ struct regpair addr; /* Single continuous buffer */
433+ __le16 nbytes; /* Number of bytes in this BD */
434+ struct eth_tx_data_4th_bd data; /* Parsing information data */
435+};
436+
410437 /* Complementary information for the regular tx bd of a given packet */
411438 struct eth_tx_data_bd {
412439 __le16 reserved0;
@@ -431,6 +458,7 @@ union eth_tx_bd_types { · 18 unmodified lines
431458 struct eth_tx_1st_bd first_bd;
432459 struct eth_tx_2nd_bd second_bd;
433460 struct eth_tx_3rd_bd third_bd;
461+ struct eth_tx_4th_bd fourth_bd;
434462 struct eth_tx_bd reg_bd;
435463 };
436464
@@ -443,6 +471,12 @@ enum eth_tx_tunn_type { · 6 unmodified lines
443471 MAX_ETH_TX_TUNN_TYPE
444472 };
445473
474+/* Mstorm Queue Zone */
475+struct mstorm_eth_queue_zone {
476+ struct eth_rx_prod_data rx_producers;
477+ __le32 reserved[3];
478+};
479+
446480 /* Ystorm Queue Zone */
447481 struct xstorm_eth_queue_zone {
448482 struct coalescing_timeset int_coalescing_timeset;