Pull sound fixes from Takashi Iwai: "No surprise here, including only a collection of HD-audio device-specific small fixes" * tag 'sound-6.7-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: ALSA: hda: Disable power-save on KONTRON SinglePC ALSA: hda/realtek: Add supported ALC257 for ChromeOS ALSA: hda/realtek: Headset Mic VREF to 100% ALSA: hda: intel-nhlt: Ignore vbps when looking for DMIC 32 bps format ALSA: hda: cs35l56: Enable low-power hibernation mode on SPI ALSA: cs35l41: Fix for old systems which do not support command ALSA: hda: cs35l41: Remove unnecessary boolean state variable firmware_running ALSA: hda - Fix speaker and headset mic pin config for CHUWI CoreBook XPro
Unified · Split
| @@ -906,6 +906,6 @@ int cs35l41_init_boost(struct device *dev, struct regmap *regmap, · 905 unmodified lines | |||
| 906 | bool cs35l41_safe_reset(struct regmap *regmap, enum cs35l41_boost_type b_type); | 906 | bool cs35l41_safe_reset(struct regmap *regmap, enum cs35l41_boost_type b_type); |
| 907 | int cs35l41_mdsync_up(struct regmap *regmap); | 907 | int cs35l41_mdsync_up(struct regmap *regmap); |
| 908 | int cs35l41_global_enable(struct device *dev, struct regmap *regmap, enum cs35l41_boost_type b_type, | 908 | int cs35l41_global_enable(struct device *dev, struct regmap *regmap, enum cs35l41_boost_type b_type, |
| 909 | int enable, bool firmware_running); | 909 | int enable, struct cs_dsp *dsp); |
| 910 | 910 | ||
| 911 | #endif /* __CS35L41_H */ | 911 | #endif /* __CS35L41_H */ |
| @@ -238,7 +238,7 @@ EXPORT_SYMBOL(intel_nhlt_ssp_mclk_mask); · 237 unmodified lines | |||
| 238 | 238 | ||
| 239 | static struct nhlt_specific_cfg * | 239 | static struct nhlt_specific_cfg * |
| 240 | nhlt_get_specific_cfg(struct device *dev, struct nhlt_fmt *fmt, u8 num_ch, | 240 | nhlt_get_specific_cfg(struct device *dev, struct nhlt_fmt *fmt, u8 num_ch, |
| 241 | u32 rate, u8 vbps, u8 bps) | 241 | u32 rate, u8 vbps, u8 bps, bool ignore_vbps) |
| 242 | { | 242 | { |
| 243 | struct nhlt_fmt_cfg *cfg = fmt->fmt_config; | 243 | struct nhlt_fmt_cfg *cfg = fmt->fmt_config; |
| 244 | struct wav_fmt *wfmt; | 244 | struct wav_fmt *wfmt; |
| @@ -255,8 +255,12 @@ nhlt_get_specific_cfg(struct device *dev, struct nhlt_fmt *fmt, u8 num_ch, · 10 unmodified lines | |||
| 255 | dev_dbg(dev, "Endpoint format: ch=%d fmt=%d/%d rate=%d\n", | 255 | dev_dbg(dev, "Endpoint format: ch=%d fmt=%d/%d rate=%d\n", |
| 256 | wfmt->channels, _vbps, _bps, wfmt->samples_per_sec); | 256 | wfmt->channels, _vbps, _bps, wfmt->samples_per_sec); |
| 257 | 257 | ||
| 258 | /* | ||
| 259 | * When looking for exact match of configuration ignore the vbps | ||
| 260 | * from NHLT table when ignore_vbps is true | ||
| 261 | */ | ||
| 258 | if (wfmt->channels == num_ch && wfmt->samples_per_sec == rate && | 262 | if (wfmt->channels == num_ch && wfmt->samples_per_sec == rate && |
| 259 | vbps == _vbps && bps == _bps) | 263 | (ignore_vbps || vbps == _vbps) && bps == _bps) |
| 260 | return &cfg->config; | 264 | return &cfg->config; |
| 261 | 265 | ||
| 262 | cfg = (struct nhlt_fmt_cfg *)(cfg->config.caps + cfg->config.size); | 266 | cfg = (struct nhlt_fmt_cfg *)(cfg->config.caps + cfg->config.size); |
| @@ -289,6 +293,7 @@ intel_nhlt_get_endpoint_blob(struct device *dev, struct nhlt_acpi_table *nhlt, · 26 unmodified lines | |||
| 289 | { | 293 | { |
| 290 | struct nhlt_specific_cfg *cfg; | 294 | struct nhlt_specific_cfg *cfg; |
| 291 | struct nhlt_endpoint *epnt; | 295 | struct nhlt_endpoint *epnt; |
| 296 | bool ignore_vbps = false; | ||
| 292 | struct nhlt_fmt *fmt; | 297 | struct nhlt_fmt *fmt; |
| 293 | int i; | 298 | int i; |
| 294 | 299 | ||
| @@ -298,7 +303,26 @@ intel_nhlt_get_endpoint_blob(struct device *dev, struct nhlt_acpi_table *nhlt, · 3 unmodified lines | |||
| 298 | dev_dbg(dev, "Looking for configuration:\n"); | 303 | dev_dbg(dev, "Looking for configuration:\n"); |
| 299 | dev_dbg(dev, " vbus_id=%d link_type=%d dir=%d, dev_type=%d\n", | 304 | dev_dbg(dev, " vbus_id=%d link_type=%d dir=%d, dev_type=%d\n", |
| 300 | bus_id, link_type, dir, dev_type); | 305 | bus_id, link_type, dir, dev_type); |
| 301 | dev_dbg(dev, " ch=%d fmt=%d/%d rate=%d\n", num_ch, vbps, bps, rate); | 306 | if (link_type == NHLT_LINK_DMIC && bps == 32 && (vbps == 24 || vbps == 32)) { |
| 307 | /* | ||
| 308 | * The DMIC hardware supports only one type of 32 bits sample | ||
| 309 | * size, which is 24 bit sampling on the MSB side and bits[1:0] | ||
| 310 | * are used for indicating the channel number. | ||
| 311 | * It has been observed that some NHLT tables have the vbps | ||
| 312 | * specified as 32 while some uses 24. | ||
| 313 | * The format these variations describe are identical, the | ||
| 314 | * hardware is configured and behaves the same way. | ||
| 315 | * Note: when the samples assumed to be vbps=32 then the 'noise' | ||
| 316 | * introduced by the lower two bits (channel number) have no | ||
| 317 | * real life implication on audio quality. | ||
| 318 | */ | ||
| 319 | dev_dbg(dev, | ||
| 320 | " ch=%d fmt=%d rate=%d (vbps is ignored for DMIC 32bit format)\n", | ||
| 321 | num_ch, bps, rate); | ||
| 322 | ignore_vbps = true; | ||
| 323 | } else { | ||
| 324 | dev_dbg(dev, " ch=%d fmt=%d/%d rate=%d\n", num_ch, vbps, bps, rate); | ||
| 325 | } | ||
| 302 | dev_dbg(dev, "Endpoint count=%d\n", nhlt->endpoint_count); | 326 | dev_dbg(dev, "Endpoint count=%d\n", nhlt->endpoint_count); |
| 303 | 327 | ||
| 304 | epnt = (struct nhlt_endpoint *)nhlt->desc; | 328 | epnt = (struct nhlt_endpoint *)nhlt->desc; |
| @@ -307,7 +331,8 @@ intel_nhlt_get_endpoint_blob(struct device *dev, struct nhlt_acpi_table *nhlt, · 2 unmodified lines | |||
| 307 | if (nhlt_check_ep_match(dev, epnt, bus_id, link_type, dir, dev_type)) { | 331 | if (nhlt_check_ep_match(dev, epnt, bus_id, link_type, dir, dev_type)) { |
| 308 | fmt = (struct nhlt_fmt *)(epnt->config.caps + epnt->config.size); | 332 | fmt = (struct nhlt_fmt *)(epnt->config.caps + epnt->config.size); |
| 309 | 333 | ||
| 310 | cfg = nhlt_get_specific_cfg(dev, fmt, num_ch, rate, vbps, bps); | 334 | cfg = nhlt_get_specific_cfg(dev, fmt, num_ch, rate, |
| 335 | vbps, bps, ignore_vbps); | ||
| 311 | if (cfg) | 336 | if (cfg) |
| 312 | return cfg; | 337 | return cfg; |
| 313 | } | 338 | } |
| @@ -504,7 +504,6 @@ static void cs35l41_shutdown_dsp(struct cs35l41_hda *cs35l41) · 503 unmodified lines | |||
| 504 | 504 | ||
| 505 | cs_dsp_stop(dsp); | 505 | cs_dsp_stop(dsp); |
| 506 | cs_dsp_power_down(dsp); | 506 | cs_dsp_power_down(dsp); |
| 507 | cs35l41->firmware_running = false; | ||
| 508 | dev_dbg(cs35l41->dev, "Unloaded Firmware\n"); | 507 | dev_dbg(cs35l41->dev, "Unloaded Firmware\n"); |
| 509 | } | 508 | } |
| 510 | 509 | ||
| @@ -550,7 +549,7 @@ static void cs35l41_hda_play_start(struct device *dev) · 39 unmodified lines | |||
| 550 | 549 | ||
| 551 | cs35l41->playback_started = true; | 550 | cs35l41->playback_started = true; |
| 552 | 551 | ||
| 553 | if (cs35l41->firmware_running) { | 552 | if (cs35l41->cs_dsp.running) { |
| 554 | regmap_multi_reg_write(reg, cs35l41_hda_config_dsp, | 553 | regmap_multi_reg_write(reg, cs35l41_hda_config_dsp, |
| 555 | ARRAY_SIZE(cs35l41_hda_config_dsp)); | 554 | ARRAY_SIZE(cs35l41_hda_config_dsp)); |
| 556 | regmap_update_bits(reg, CS35L41_PWR_CTRL2, | 555 | regmap_update_bits(reg, CS35L41_PWR_CTRL2, |
| @@ -580,7 +579,7 @@ static void cs35l41_mute(struct device *dev, bool mute) · 23 unmodified lines | |||
| 580 | regmap_multi_reg_write(reg, cs35l41_hda_mute, ARRAY_SIZE(cs35l41_hda_mute)); | 579 | regmap_multi_reg_write(reg, cs35l41_hda_mute, ARRAY_SIZE(cs35l41_hda_mute)); |
| 581 | } else { | 580 | } else { |
| 582 | dev_dbg(dev, "Unmuting\n"); | 581 | dev_dbg(dev, "Unmuting\n"); |
| 583 | if (cs35l41->firmware_running) { | 582 | if (cs35l41->cs_dsp.running) { |
| 584 | regmap_multi_reg_write(reg, cs35l41_hda_unmute_dsp, | 583 | regmap_multi_reg_write(reg, cs35l41_hda_unmute_dsp, |
| 585 | ARRAY_SIZE(cs35l41_hda_unmute_dsp)); | 584 | ARRAY_SIZE(cs35l41_hda_unmute_dsp)); |
| 586 | } else { | 585 | } else { |
| @@ -599,7 +598,7 @@ static void cs35l41_hda_play_done(struct device *dev) · 12 unmodified lines | |||
| 599 | dev_dbg(dev, "Play (Complete)\n"); | 598 | dev_dbg(dev, "Play (Complete)\n"); |
| 600 | 599 | ||
| 601 | cs35l41_global_enable(dev, reg, cs35l41->hw_cfg.bst_type, 1, | 600 | cs35l41_global_enable(dev, reg, cs35l41->hw_cfg.bst_type, 1, |
| 602 | cs35l41->firmware_running); | 601 | &cs35l41->cs_dsp); |
| 603 | cs35l41_mute(dev, false); | 602 | cs35l41_mute(dev, false); |
| 604 | } | 603 | } |
| 605 | 604 | ||
| @@ -612,7 +611,7 @@ static void cs35l41_hda_pause_start(struct device *dev) · 6 unmodified lines | |||
| 612 | 611 | ||
| 613 | cs35l41_mute(dev, true); | 612 | cs35l41_mute(dev, true); |
| 614 | cs35l41_global_enable(dev, reg, cs35l41->hw_cfg.bst_type, 0, | 613 | cs35l41_global_enable(dev, reg, cs35l41->hw_cfg.bst_type, 0, |
| 615 | cs35l41->firmware_running); | 614 | &cs35l41->cs_dsp); |
| 616 | } | 615 | } |
| 617 | 616 | ||
| 618 | static void cs35l41_hda_pause_done(struct device *dev) | 617 | static void cs35l41_hda_pause_done(struct device *dev) |
| @@ -625,7 +624,7 @@ static void cs35l41_hda_pause_done(struct device *dev) · 6 unmodified lines | |||
| 625 | regmap_update_bits(reg, CS35L41_PWR_CTRL2, CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT); | 624 | regmap_update_bits(reg, CS35L41_PWR_CTRL2, CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT); |
| 626 | if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) | 625 | if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) |
| 627 | regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00000001); | 626 | regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00000001); |
| 628 | if (cs35l41->firmware_running) { | 627 | if (cs35l41->cs_dsp.running) { |
| 629 | cs35l41_set_cspl_mbox_cmd(dev, reg, CSPL_MBOX_CMD_PAUSE); | 628 | cs35l41_set_cspl_mbox_cmd(dev, reg, CSPL_MBOX_CMD_PAUSE); |
| 630 | regmap_update_bits(reg, CS35L41_PWR_CTRL2, | 629 | regmap_update_bits(reg, CS35L41_PWR_CTRL2, |
| 631 | CS35L41_VMON_EN_MASK | CS35L41_IMON_EN_MASK, | 630 | CS35L41_VMON_EN_MASK | CS35L41_IMON_EN_MASK, |
| @@ -675,7 +674,7 @@ static void cs35l41_hda_playback_hook(struct device *dev, int action) · 43 unmodified lines | |||
| 675 | break; | 674 | break; |
| 676 | case HDA_GEN_PCM_ACT_CLOSE: | 675 | case HDA_GEN_PCM_ACT_CLOSE: |
| 677 | mutex_lock(&cs35l41->fw_mutex); | 676 | mutex_lock(&cs35l41->fw_mutex); |
| 678 | if (!cs35l41->firmware_running && cs35l41->request_fw_load && | 677 | if (!cs35l41->cs_dsp.running && cs35l41->request_fw_load && |
| 679 | !cs35l41->fw_request_ongoing) { | 678 | !cs35l41->fw_request_ongoing) { |
| 680 | dev_info(dev, "Requesting Firmware Load after HDA_GEN_PCM_ACT_CLOSE\n"); | 679 | dev_info(dev, "Requesting Firmware Load after HDA_GEN_PCM_ACT_CLOSE\n"); |
| 681 | cs35l41->fw_request_ongoing = true; | 680 | cs35l41->fw_request_ongoing = true; |
| @@ -761,10 +760,9 @@ static int cs35l41_verify_id(struct cs35l41_hda *cs35l41, unsigned int *regid, u · 79 unmodified lines | |||
| 761 | static int cs35l41_ready_for_reset(struct cs35l41_hda *cs35l41) | 760 | static int cs35l41_ready_for_reset(struct cs35l41_hda *cs35l41) |
| 762 | { | 761 | { |
| 763 | mutex_lock(&cs35l41->fw_mutex); | 762 | mutex_lock(&cs35l41->fw_mutex); |
| 764 | if (cs35l41->firmware_running) { | 763 | if (cs35l41->cs_dsp.running) { |
| 765 | cs35l41->cs_dsp.running = false; | 764 | cs35l41->cs_dsp.running = false; |
| 766 | cs35l41->cs_dsp.booted = false; | 765 | cs35l41->cs_dsp.booted = false; |
| 767 | cs35l41->firmware_running = false; | ||
| 768 | } | 766 | } |
| 769 | regcache_mark_dirty(cs35l41->regmap); | 767 | regcache_mark_dirty(cs35l41->regmap); |
| 770 | mutex_unlock(&cs35l41->fw_mutex); | 768 | mutex_unlock(&cs35l41->fw_mutex); |
| @@ -925,7 +923,7 @@ static int cs35l41_runtime_suspend(struct device *dev) · 154 unmodified lines | |||
| 925 | 923 | ||
| 926 | mutex_lock(&cs35l41->fw_mutex); | 924 | mutex_lock(&cs35l41->fw_mutex); |
| 927 | 925 | ||
| 928 | if (cs35l41->firmware_running) { | 926 | if (cs35l41->cs_dsp.running) { |
| 929 | ret = cs35l41_enter_hibernate(cs35l41->dev, cs35l41->regmap, | 927 | ret = cs35l41_enter_hibernate(cs35l41->dev, cs35l41->regmap, |
| 930 | cs35l41->hw_cfg.bst_type); | 928 | cs35l41->hw_cfg.bst_type); |
| 931 | if (ret) | 929 | if (ret) |
| @@ -960,7 +958,7 @@ static int cs35l41_runtime_resume(struct device *dev) · 28 unmodified lines | |||
| 960 | 958 | ||
| 961 | regcache_cache_only(cs35l41->regmap, false); | 959 | regcache_cache_only(cs35l41->regmap, false); |
| 962 | 960 | ||
| 963 | if (cs35l41->firmware_running) { | 961 | if (cs35l41->cs_dsp.running) { |
| 964 | ret = cs35l41_exit_hibernate(cs35l41->dev, cs35l41->regmap); | 962 | ret = cs35l41_exit_hibernate(cs35l41->dev, cs35l41->regmap); |
| 965 | if (ret) { | 963 | if (ret) { |
| 966 | dev_warn(cs35l41->dev, "Unable to exit Hibernate."); | 964 | dev_warn(cs35l41->dev, "Unable to exit Hibernate."); |
| @@ -1052,8 +1050,6 @@ static int cs35l41_smart_amp(struct cs35l41_hda *cs35l41) · 85 unmodified lines | |||
| 1052 | goto clean_dsp; | 1050 | goto clean_dsp; |
| 1053 | } | 1051 | } |
| 1054 | 1052 | ||
| 1055 | cs35l41->firmware_running = true; | ||
| 1056 | |||
| 1057 | return 0; | 1053 | return 0; |
| 1058 | 1054 | ||
| 1059 | clean_dsp: | 1055 | clean_dsp: |
| @@ -1063,10 +1059,10 @@ clean_dsp: · 3 unmodified lines | |||
| 1063 | 1059 | ||
| 1064 | static void cs35l41_load_firmware(struct cs35l41_hda *cs35l41, bool load) | 1060 | static void cs35l41_load_firmware(struct cs35l41_hda *cs35l41, bool load) |
| 1065 | { | 1061 | { |
| 1066 | if (cs35l41->firmware_running && !load) { | 1062 | if (cs35l41->cs_dsp.running && !load) { |
| 1067 | dev_dbg(cs35l41->dev, "Unloading Firmware\n"); | 1063 | dev_dbg(cs35l41->dev, "Unloading Firmware\n"); |
| 1068 | cs35l41_shutdown_dsp(cs35l41); | 1064 | cs35l41_shutdown_dsp(cs35l41); |
| 1069 | } else if (!cs35l41->firmware_running && load) { | 1065 | } else if (!cs35l41->cs_dsp.running && load) { |
| 1070 | dev_dbg(cs35l41->dev, "Loading Firmware\n"); | 1066 | dev_dbg(cs35l41->dev, "Loading Firmware\n"); |
| 1071 | cs35l41_smart_amp(cs35l41); | 1067 | cs35l41_smart_amp(cs35l41); |
| 1072 | } else { | 1068 | } else { |
| @@ -1346,7 +1342,7 @@ static int cs35l41_hda_bind(struct device *dev, struct device *master, void *mas · 273 unmodified lines | |||
| 1346 | cs35l41->acpi_subsystem_id, cs35l41->hw_cfg.bst_type, | 1342 | cs35l41->acpi_subsystem_id, cs35l41->hw_cfg.bst_type, |
| 1347 | cs35l41->hw_cfg.gpio1.func == CS35l41_VSPK_SWITCH, | 1343 | cs35l41->hw_cfg.gpio1.func == CS35l41_VSPK_SWITCH, |
| 1348 | cs35l41->hw_cfg.spk_pos ? 'R' : 'L', | 1344 | cs35l41->hw_cfg.spk_pos ? 'R' : 'L', |
| 1349 | cs35l41->firmware_running, cs35l41->speaker_id); | 1345 | cs35l41->cs_dsp.running, cs35l41->speaker_id); |
| 1350 | 1346 | ||
| 1351 | return ret; | 1347 | return ret; |
| 1352 | } | 1348 | } |
| @@ -21,6 +21,10 @@ static int cs35l56_hda_spi_probe(struct spi_device *spi) · 20 unmodified lines | |||
| 21 | return -ENOMEM; | 21 | return -ENOMEM; |
| 22 | 22 | ||
| 23 | cs35l56->base.dev = &spi->dev; | 23 | cs35l56->base.dev = &spi->dev; |
| 24 | |||
| 25 | #ifdef CS35L56_WAKE_HOLD_TIME_US | ||
| 26 | cs35l56->base.can_hibernate = true; | ||
| 27 | #endif | ||
| 24 | cs35l56->base.regmap = devm_regmap_init_spi(spi, &cs35l56_regmap_spi); | 28 | cs35l56->base.regmap = devm_regmap_init_spi(spi, &cs35l56_regmap_spi); |
| 25 | if (IS_ERR(cs35l56->base.regmap)) { | 29 | if (IS_ERR(cs35l56->base.regmap)) { |
| 26 | ret = PTR_ERR(cs35l56->base.regmap); | 30 | ret = PTR_ERR(cs35l56->base.regmap); |
| @@ -2242,6 +2242,8 @@ static const struct snd_pci_quirk power_save_denylist[] = { · 2241 unmodified lines | |||
| 2242 | SND_PCI_QUIRK(0x17aa, 0x36a7, "Lenovo C50 All in one", 0), | 2242 | SND_PCI_QUIRK(0x17aa, 0x36a7, "Lenovo C50 All in one", 0), |
| 2243 | /* https://bugs.launchpad.net/bugs/1821663 */ | 2243 | /* https://bugs.launchpad.net/bugs/1821663 */ |
| 2244 | SND_PCI_QUIRK(0x1631, 0xe017, "Packard Bell NEC IMEDIA 5204", 0), | 2244 | SND_PCI_QUIRK(0x1631, 0xe017, "Packard Bell NEC IMEDIA 5204", 0), |
| 2245 | /* KONTRON SinglePC may cause a stall at runtime resume */ | ||
| 2246 | SND_PCI_QUIRK(0x1734, 0x1232, "KONTRON SinglePC", 0), | ||
| 2245 | {} | 2247 | {} |
| 2246 | }; | 2248 | }; |
| 2247 | #endif /* CONFIG_PM */ | 2249 | #endif /* CONFIG_PM */ |
| @@ -1987,6 +1987,7 @@ enum { · 1986 unmodified lines | |||
| 1987 | ALC887_FIXUP_ASUS_AUDIO, | 1987 | ALC887_FIXUP_ASUS_AUDIO, |
| 1988 | ALC887_FIXUP_ASUS_HMIC, | 1988 | ALC887_FIXUP_ASUS_HMIC, |
| 1989 | ALCS1200A_FIXUP_MIC_VREF, | 1989 | ALCS1200A_FIXUP_MIC_VREF, |
| 1990 | ALC888VD_FIXUP_MIC_100VREF, | ||
| 1990 | }; | 1991 | }; |
| 1991 | 1992 | ||
| 1992 | static void alc889_fixup_coef(struct hda_codec *codec, | 1993 | static void alc889_fixup_coef(struct hda_codec *codec, |
| @@ -2540,6 +2541,13 @@ static const struct hda_fixup alc882_fixups[] = { · 547 unmodified lines | |||
| 2540 | {} | 2541 | {} |
| 2541 | } | 2542 | } |
| 2542 | }, | 2543 | }, |
| 2544 | [ALC888VD_FIXUP_MIC_100VREF] = { | ||
| 2545 | .type = HDA_FIXUP_PINCTLS, | ||
| 2546 | .v.pins = (const struct hda_pintbl[]) { | ||
| 2547 | { 0x18, PIN_VREF100 }, /* headset mic */ | ||
| 2548 | {} | ||
| 2549 | } | ||
| 2550 | }, | ||
| 2543 | }; | 2551 | }; |
| 2544 | 2552 | ||
| 2545 | static const struct snd_pci_quirk alc882_fixup_tbl[] = { | 2553 | static const struct snd_pci_quirk alc882_fixup_tbl[] = { |
| @@ -2609,6 +2617,7 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = { · 63 unmodified lines | |||
| 2609 | SND_PCI_QUIRK(0x106b, 0x4a00, "Macbook 5,2", ALC889_FIXUP_MBA11_VREF), | 2617 | SND_PCI_QUIRK(0x106b, 0x4a00, "Macbook 5,2", ALC889_FIXUP_MBA11_VREF), |
| 2610 | 2618 | ||
| 2611 | SND_PCI_QUIRK(0x1071, 0x8258, "Evesham Voyaeger", ALC882_FIXUP_EAPD), | 2619 | SND_PCI_QUIRK(0x1071, 0x8258, "Evesham Voyaeger", ALC882_FIXUP_EAPD), |
| 2620 | SND_PCI_QUIRK(0x10ec, 0x12d8, "iBase Elo Touch", ALC888VD_FIXUP_MIC_100VREF), | ||
| 2612 | SND_PCI_QUIRK(0x13fe, 0x1009, "Advantech MIT-W101", ALC886_FIXUP_EAPD), | 2621 | SND_PCI_QUIRK(0x13fe, 0x1009, "Advantech MIT-W101", ALC886_FIXUP_EAPD), |
| 2613 | SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte EP45-DS3/Z87X-UD3H", ALC889_FIXUP_FRONT_HP_NO_PRESENCE), | 2622 | SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte EP45-DS3/Z87X-UD3H", ALC889_FIXUP_FRONT_HP_NO_PRESENCE), |
| 2614 | SND_PCI_QUIRK(0x1458, 0xa0b8, "Gigabyte AZ370-Gaming", ALC1220_FIXUP_GB_DUAL_CODECS), | 2623 | SND_PCI_QUIRK(0x1458, 0xa0b8, "Gigabyte AZ370-Gaming", ALC1220_FIXUP_GB_DUAL_CODECS), |
| @@ -3256,6 +3265,7 @@ static void alc_disable_headset_jack_key(struct hda_codec *codec) · 641 unmodified lines | |||
| 3256 | case 0x10ec0230: | 3265 | case 0x10ec0230: |
| 3257 | case 0x10ec0236: | 3266 | case 0x10ec0236: |
| 3258 | case 0x10ec0256: | 3267 | case 0x10ec0256: |
| 3268 | case 0x10ec0257: | ||
| 3259 | case 0x19e58326: | 3269 | case 0x19e58326: |
| 3260 | alc_write_coef_idx(codec, 0x48, 0x0); | 3270 | alc_write_coef_idx(codec, 0x48, 0x0); |
| 3261 | alc_update_coef_idx(codec, 0x49, 0x0045, 0x0); | 3271 | alc_update_coef_idx(codec, 0x49, 0x0045, 0x0); |
| @@ -3285,6 +3295,7 @@ static void alc_enable_headset_jack_key(struct hda_codec *codec) · 23 unmodified lines | |||
| 3285 | case 0x10ec0230: | 3295 | case 0x10ec0230: |
| 3286 | case 0x10ec0236: | 3296 | case 0x10ec0236: |
| 3287 | case 0x10ec0256: | 3297 | case 0x10ec0256: |
| 3298 | case 0x10ec0257: | ||
| 3288 | case 0x19e58326: | 3299 | case 0x19e58326: |
| 3289 | alc_write_coef_idx(codec, 0x48, 0xd011); | 3300 | alc_write_coef_idx(codec, 0x48, 0xd011); |
| 3290 | alc_update_coef_idx(codec, 0x49, 0x007f, 0x0045); | 3301 | alc_update_coef_idx(codec, 0x49, 0x007f, 0x0045); |
| @@ -6496,6 +6507,7 @@ static void alc_combo_jack_hp_jd_restart(struct hda_codec *codec) · 3205 unmodified lines | |||
| 6496 | case 0x10ec0236: | 6507 | case 0x10ec0236: |
| 6497 | case 0x10ec0255: | 6508 | case 0x10ec0255: |
| 6498 | case 0x10ec0256: | 6509 | case 0x10ec0256: |
| 6510 | case 0x10ec0257: | ||
| 6499 | case 0x19e58326: | 6511 | case 0x19e58326: |
| 6500 | alc_update_coef_idx(codec, 0x1b, 0x8000, 1 << 15); /* Reset HP JD */ | 6512 | alc_update_coef_idx(codec, 0x1b, 0x8000, 1 << 15); /* Reset HP JD */ |
| 6501 | alc_update_coef_idx(codec, 0x1b, 0x8000, 0 << 15); | 6513 | alc_update_coef_idx(codec, 0x1b, 0x8000, 0 << 15); |
| @@ -7249,6 +7261,7 @@ enum { · 747 unmodified lines | |||
| 7249 | ALC290_FIXUP_SUBWOOFER_HSJACK, | 7261 | ALC290_FIXUP_SUBWOOFER_HSJACK, |
| 7250 | ALC269_FIXUP_THINKPAD_ACPI, | 7262 | ALC269_FIXUP_THINKPAD_ACPI, |
| 7251 | ALC269_FIXUP_DMIC_THINKPAD_ACPI, | 7263 | ALC269_FIXUP_DMIC_THINKPAD_ACPI, |
| 7264 | ALC269VB_FIXUP_CHUWI_COREBOOK_XPRO, | ||
| 7252 | ALC255_FIXUP_ACER_MIC_NO_PRESENCE, | 7265 | ALC255_FIXUP_ACER_MIC_NO_PRESENCE, |
| 7253 | ALC255_FIXUP_ASUS_MIC_NO_PRESENCE, | 7266 | ALC255_FIXUP_ASUS_MIC_NO_PRESENCE, |
| 7254 | ALC255_FIXUP_DELL1_MIC_NO_PRESENCE, | 7267 | ALC255_FIXUP_DELL1_MIC_NO_PRESENCE, |
| @@ -7601,6 +7614,14 @@ static const struct hda_fixup alc269_fixups[] = { · 346 unmodified lines | |||
| 7601 | .type = HDA_FIXUP_FUNC, | 7614 | .type = HDA_FIXUP_FUNC, |
| 7602 | .v.func = alc269_fixup_pincfg_U7x7_headset_mic, | 7615 | .v.func = alc269_fixup_pincfg_U7x7_headset_mic, |
| 7603 | }, | 7616 | }, |
| 7617 | [ALC269VB_FIXUP_CHUWI_COREBOOK_XPRO] = { | ||
| 7618 | .type = HDA_FIXUP_PINS, | ||
| 7619 | .v.pins = (const struct hda_pintbl[]) { | ||
| 7620 | { 0x18, 0x03a19020 }, /* headset mic */ | ||
| 7621 | { 0x1b, 0x90170150 }, /* speaker */ | ||
| 7622 | { } | ||
| 7623 | }, | ||
| 7624 | }, | ||
| 7604 | [ALC269_FIXUP_AMIC] = { | 7625 | [ALC269_FIXUP_AMIC] = { |
| 7605 | .type = HDA_FIXUP_PINS, | 7626 | .type = HDA_FIXUP_PINS, |
| 7606 | .v.pins = (const struct hda_pintbl[]) { | 7627 | .v.pins = (const struct hda_pintbl[]) { |
| @@ -10244,6 +10265,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { · 2637 unmodified lines | |||
| 10244 | SND_PCI_QUIRK(0x1d72, 0x1901, "RedmiBook 14", ALC256_FIXUP_ASUS_HEADSET_MIC), | 10265 | SND_PCI_QUIRK(0x1d72, 0x1901, "RedmiBook 14", ALC256_FIXUP_ASUS_HEADSET_MIC), |
| 10245 | SND_PCI_QUIRK(0x1d72, 0x1945, "Redmi G", ALC256_FIXUP_ASUS_HEADSET_MIC), | 10266 | SND_PCI_QUIRK(0x1d72, 0x1945, "Redmi G", ALC256_FIXUP_ASUS_HEADSET_MIC), |
| 10246 | SND_PCI_QUIRK(0x1d72, 0x1947, "RedmiBook Air", ALC255_FIXUP_XIAOMI_HEADSET_MIC), | 10267 | SND_PCI_QUIRK(0x1d72, 0x1947, "RedmiBook Air", ALC255_FIXUP_XIAOMI_HEADSET_MIC), |
| 10268 | SND_PCI_QUIRK(0x2782, 0x0232, "CHUWI CoreBook XPro", ALC269VB_FIXUP_CHUWI_COREBOOK_XPRO), | ||
| 10247 | SND_PCI_QUIRK(0x8086, 0x2074, "Intel NUC 8", ALC233_FIXUP_INTEL_NUC8_DMIC), | 10269 | SND_PCI_QUIRK(0x8086, 0x2074, "Intel NUC 8", ALC233_FIXUP_INTEL_NUC8_DMIC), |
| 10248 | SND_PCI_QUIRK(0x8086, 0x2080, "Intel NUC 8 Rugged", ALC256_FIXUP_INTEL_NUC8_RUGGED), | 10270 | SND_PCI_QUIRK(0x8086, 0x2080, "Intel NUC 8 Rugged", ALC256_FIXUP_INTEL_NUC8_RUGGED), |
| 10249 | SND_PCI_QUIRK(0x8086, 0x2081, "Intel NUC 10", ALC256_FIXUP_INTEL_NUC10), | 10271 | SND_PCI_QUIRK(0x8086, 0x2081, "Intel NUC 10", ALC256_FIXUP_INTEL_NUC10), |
| @@ -16,6 +16,8 @@ · 15 unmodified lines | |||
| 16 | 16 | ||
| 17 | #include <sound/cs35l41.h> | 17 | #include <sound/cs35l41.h> |
| 18 | 18 | ||
| 19 | #define CS35L41_FIRMWARE_OLD_VERSION 0x001C00 /* v0.28.0 */ | ||
| 20 | |||
| 19 | static const struct reg_default cs35l41_reg[] = { | 21 | static const struct reg_default cs35l41_reg[] = { |
| 20 | { CS35L41_PWR_CTRL1, 0x00000000 }, | 22 | { CS35L41_PWR_CTRL1, 0x00000000 }, |
| 21 | { CS35L41_PWR_CTRL2, 0x00000000 }, | 23 | { CS35L41_PWR_CTRL2, 0x00000000 }, |
| @@ -1214,7 +1216,7 @@ EXPORT_SYMBOL_GPL(cs35l41_safe_reset); · 1192 unmodified lines | |||
| 1214 | * the PLL Lock interrupt, in the IRQ handler. | 1216 | * the PLL Lock interrupt, in the IRQ handler. |
| 1215 | */ | 1217 | */ |
| 1216 | int cs35l41_global_enable(struct device *dev, struct regmap *regmap, enum cs35l41_boost_type b_type, | 1218 | int cs35l41_global_enable(struct device *dev, struct regmap *regmap, enum cs35l41_boost_type b_type, |
| 1217 | int enable, bool firmware_running) | 1219 | int enable, struct cs_dsp *dsp) |
| 1218 | { | 1220 | { |
| 1219 | int ret; | 1221 | int ret; |
| 1220 | unsigned int gpio1_func, pad_control, pwr_ctrl1, pwr_ctrl3, int_status, pup_pdn_mask; | 1222 | unsigned int gpio1_func, pad_control, pwr_ctrl1, pwr_ctrl3, int_status, pup_pdn_mask; |
| @@ -1309,7 +1311,7 @@ int cs35l41_global_enable(struct device *dev, struct regmap *regmap, enum cs35l4 · 88 unmodified lines | |||
| 1309 | } | 1311 | } |
| 1310 | regmap_write(regmap, CS35L41_IRQ1_STATUS1, CS35L41_PUP_DONE_MASK); | 1312 | regmap_write(regmap, CS35L41_IRQ1_STATUS1, CS35L41_PUP_DONE_MASK); |
| 1311 | 1313 | ||
| 1312 | if (firmware_running) | 1314 | if (dsp->running && dsp->fw_id_version > CS35L41_FIRMWARE_OLD_VERSION) |
| 1313 | ret = cs35l41_set_cspl_mbox_cmd(dev, regmap, | 1315 | ret = cs35l41_set_cspl_mbox_cmd(dev, regmap, |
| 1314 | CSPL_MBOX_CMD_SPK_OUT_ENABLE); | 1316 | CSPL_MBOX_CMD_SPK_OUT_ENABLE); |
| 1315 | else | 1317 | else |
| @@ -519,11 +519,11 @@ static int cs35l41_main_amp_event(struct snd_soc_dapm_widget *w, · 518 unmodified lines | |||
| 519 | ARRAY_SIZE(cs35l41_pup_patch)); | 519 | ARRAY_SIZE(cs35l41_pup_patch)); |
| 520 | 520 | ||
| 521 | ret = cs35l41_global_enable(cs35l41->dev, cs35l41->regmap, cs35l41->hw_cfg.bst_type, | 521 | ret = cs35l41_global_enable(cs35l41->dev, cs35l41->regmap, cs35l41->hw_cfg.bst_type, |
| 522 | 1, cs35l41->dsp.cs_dsp.running); | 522 | 1, &cs35l41->dsp.cs_dsp); |
| 523 | break; | 523 | break; |
| 524 | case SND_SOC_DAPM_POST_PMD: | 524 | case SND_SOC_DAPM_POST_PMD: |
| 525 | ret = cs35l41_global_enable(cs35l41->dev, cs35l41->regmap, cs35l41->hw_cfg.bst_type, | 525 | ret = cs35l41_global_enable(cs35l41->dev, cs35l41->regmap, cs35l41->hw_cfg.bst_type, |
| 526 | 0, cs35l41->dsp.cs_dsp.running); | 526 | 0, &cs35l41->dsp.cs_dsp); |
| 527 | 527 | ||
| 528 | regmap_multi_reg_write_bypassed(cs35l41->regmap, | 528 | regmap_multi_reg_write_bypassed(cs35l41->regmap, |
| 529 | cs35l41_pdn_patch, | 529 | cs35l41_pdn_patch, |