History

Merge branch 'pci/misc'

- Mark expected switch fall-throughs (Gustavo A. R. Silva) - Remove unused pci_request_region_exclusive() (Johannes Thumshirn) - Fix x86 PCI IRQ routing table memory leak (Wenwen Wang) - Reset Lenovo ThinkPad P50 if firmware didn't do it on reboot (Lyude Paul) - Add and use pci_dev_id() helper to simplify PCI_DEVID() usage (touches several places outside drivers/pci/) (Heiner Kallweit) - Transition Mobiveil PCI maintenance to Karthikeyan M and Hou Zhiqiang (Subrahmanya Lingappa) * pci/misc: MAINTAINERS: Add Karthikeyan Mitran and Hou Zhiqiang for Mobiveil PCI platform/chrome: chromeos_laptop: use pci_dev_id() helper stmmac: pci: Use pci_dev_id() helper iommu/vt-d: Use pci_dev_id() helper iommu/amd: Use pci_dev_id() helper drm/amdkfd: Use pci_dev_id() helper powerpc/powernv/npu: Use pci_dev_id() helper r8169: use pci_dev_id() helper PCI: Add pci_dev_id() helper PCI: Reset Lenovo ThinkPad P50 nvgpu at boot if necessary x86/PCI: Fix PCI IRQ routing table memory leak PCI: Remove unused pci_request_region_exclusive() PCI: Mark expected switch fall-throughs

Bjorn Helgaas committed 7 years ago

Commit 09fdd752 parents 33987fd 86511db17 files · +94 −57Browse files

Unified · Split

17 files
  1. MAINTAINERS +2 −1
  2. arch/powerpc/platforms/powernv/npu-dma.c +6 −8
  3. arch/x86/pci/irq.c +8 −2
  4. drivers/gpu/drm/amd/amdkfd/kfd_topology.c +1 −2
  5. drivers/iommu/amd_iommu.c +1 −1
  6. drivers/iommu/intel-iommu.c +1 −1
  7. drivers/iommu/intel_irq_remapping.c +1 −1
  8. drivers/net/ethernet/realtek/r8169.c +1 −2
  9. drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c +1 −1
  10. drivers/pci/msi.c +3 −3
  11. drivers/pci/pci.c +0 −25
  12. drivers/pci/proc.c +1 −0
  13. drivers/pci/quirks.c +58 −0
  14. drivers/pci/search.c +3 −7
  15. drivers/pci/xen-pcifront.c +1 −1
  16. drivers/platform/chrome/chromeos_laptop.c +1 −1
  17. include/linux/pci.h +5 −1
MAINTAINERS+2−1
@@ -11880,7 +11880,8 @@ F: include/linux/switchtec.h · 11879 unmodified lines
1188011880 F: drivers/ntb/hw/mscc/
1188111881
1188211882 PCI DRIVER FOR MOBIVEIL PCIE IP
11883−M: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
11883+M: Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>
11884+M: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
1188411885 L: linux-pci@vger.kernel.org
1188511886 S: Supported
1188611887 F: Documentation/devicetree/bindings/pci/mobiveil-pcie.txt
arch/powerpc/platforms/powernv/npu-dma.c+6−8
@@ -1213,9 +1213,8 @@ int pnv_npu2_map_lpar_dev(struct pci_dev *gpdev, unsigned int lparid, · 1212 unmodified lines
12131213 * Currently we only support radix and non-zero LPCR only makes sense
12141214 * for hash tables so skiboot expects the LPCR parameter to be a zero.
12151215 */
1216− ret = opal_npu_map_lpar(nphb->opal_id,
1217− PCI_DEVID(gpdev->bus->number, gpdev->devfn), lparid,
1218− 0 /* LPCR bits */);
1216+ ret = opal_npu_map_lpar(nphb->opal_id, pci_dev_id(gpdev), lparid,
1217+ 0 /* LPCR bits */);
12191218 if (ret) {
12201219 dev_err(&gpdev->dev, "Error %d mapping device to LPAR\n", ret);
12211220 return ret;
@@ -1224,7 +1223,7 @@ int pnv_npu2_map_lpar_dev(struct pci_dev *gpdev, unsigned int lparid, · 2 unmodified lines
12241223 dev_dbg(&gpdev->dev, "init context opalid=%llu msr=%lx\n",
12251224 nphb->opal_id, msr);
12261225 ret = opal_npu_init_context(nphb->opal_id, 0/*__unused*/, msr,
1227− PCI_DEVID(gpdev->bus->number, gpdev->devfn));
1226+ pci_dev_id(gpdev));
12281227 if (ret < 0)
12291228 dev_err(&gpdev->dev, "Failed to init context: %d\n", ret);
12301229 else
@@ -1258,7 +1257,7 @@ int pnv_npu2_unmap_lpar_dev(struct pci_dev *gpdev) · 27 unmodified lines
12581257 dev_dbg(&gpdev->dev, "destroy context opalid=%llu\n",
12591258 nphb->opal_id);
12601259 ret = opal_npu_destroy_context(nphb->opal_id, 0/*__unused*/,
1261− PCI_DEVID(gpdev->bus->number, gpdev->devfn));
1260+ pci_dev_id(gpdev));
12621261 if (ret < 0) {
12631262 dev_err(&gpdev->dev, "Failed to destroy context: %d\n", ret);
12641263 return ret;
@@ -1266,9 +1265,8 @@ int pnv_npu2_unmap_lpar_dev(struct pci_dev *gpdev) · 1 unmodified line
12661265
12671266 /* Set LPID to 0 anyway, just to be safe */
12681267 dev_dbg(&gpdev->dev, "Map LPAR opalid=%llu lparid=0\n", nphb->opal_id);
1269− ret = opal_npu_map_lpar(nphb->opal_id,
1270− PCI_DEVID(gpdev->bus->number, gpdev->devfn), 0 /*LPID*/,
1271− 0 /* LPCR bits */);
1268+ ret = opal_npu_map_lpar(nphb->opal_id, pci_dev_id(gpdev), 0 /*LPID*/,
1269+ 0 /* LPCR bits */);
12721270 if (ret)
12731271 dev_err(&gpdev->dev, "Error %d mapping device to LPAR\n", ret);
12741272
arch/x86/pci/irq.c+8−2
@@ -1119,6 +1119,8 @@ static const struct dmi_system_id pciirq_dmi_table[] __initconst = { · 1118 unmodified lines
11191119
11201120 void __init pcibios_irq_init(void)
11211121 {
1122+ struct irq_routing_table *rtable = NULL;
1123+
11221124 DBG(KERN_DEBUG "PCI: IRQ init\n");
11231125
11241126 if (raw_pci_ops == NULL)
@@ -1129,8 +1131,10 @@ void __init pcibios_irq_init(void) · 4 unmodified lines
11291131 pirq_table = pirq_find_routing_table();
11301132
11311133 #ifdef CONFIG_PCI_BIOS
1132− if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN))
1134+ if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN)) {
11331135 pirq_table = pcibios_get_irq_routing_table();
1136+ rtable = pirq_table;
1137+ }
11341138 #endif
11351139 if (pirq_table) {
11361140 pirq_peer_trick();
@@ -1145,8 +1149,10 @@ void __init pcibios_irq_init(void) · 8 unmodified lines
11451149 * If we're using the I/O APIC, avoid using the PCI IRQ
11461150 * routing table
11471151 */
1148− if (io_apic_assign_pci_irqs)
1152+ if (io_apic_assign_pci_irqs) {
1153+ kfree(rtable);
11491154 pirq_table = NULL;
1155+ }
11501156 }
11511157
11521158 x86_init.pci.fixup_irqs();
drivers/gpu/drm/amd/amdkfd/kfd_topology.c+1−2
@@ -1270,8 +1270,7 @@ int kfd_topology_add_device(struct kfd_dev *gpu) · 1269 unmodified lines
12701270
12711271 dev->node_props.vendor_id = gpu->pdev->vendor;
12721272 dev->node_props.device_id = gpu->pdev->device;
1273− dev->node_props.location_id = PCI_DEVID(gpu->pdev->bus->number,
1274− gpu->pdev->devfn);
1273+ dev->node_props.location_id = pci_dev_id(gpu->pdev);
12751274 dev->node_props.max_engine_clk_fcompute =
12761275 amdgpu_amdkfd_get_max_engine_clock_in_mhz(dev->gpu->kgd);
12771276 dev->node_props.max_engine_clk_ccompute =
drivers/iommu/amd_iommu.c+1−1
@@ -165,7 +165,7 @@ static inline u16 get_pci_device_id(struct device *dev) · 164 unmodified lines
165165 {
166166 struct pci_dev *pdev = to_pci_dev(dev);
167167
168− return PCI_DEVID(pdev->bus->number, pdev->devfn);
168+ return pci_dev_id(pdev);
169169 }
170170
171171 static inline int get_acpihid_device_id(struct device *dev,
drivers/iommu/intel-iommu.c+1−1
@@ -1391,7 +1391,7 @@ static void iommu_enable_dev_iotlb(struct device_domain_info *info) · 1390 unmodified lines
13911391
13921392 /* pdev will be returned if device is not a vf */
13931393 pf_pdev = pci_physfn(pdev);
1394− info->pfsid = PCI_DEVID(pf_pdev->bus->number, pf_pdev->devfn);
1394+ info->pfsid = pci_dev_id(pf_pdev);
13951395 }
13961396
13971397 #ifdef CONFIG_INTEL_IOMMU_SVM
drivers/iommu/intel_irq_remapping.c+1−1
@@ -424,7 +424,7 @@ static int set_msi_sid(struct irte *irte, struct pci_dev *dev) · 423 unmodified lines
424424 set_irte_sid(irte, SVT_VERIFY_SID_SQ, SQ_ALL_16, data.alias);
425425 else
426426 set_irte_sid(irte, SVT_VERIFY_SID_SQ, SQ_ALL_16,
427− PCI_DEVID(dev->bus->number, dev->devfn));
427+ pci_dev_id(dev));
428428
429429 return 0;
430430 }
drivers/net/ethernet/realtek/r8169.c+1−2
@@ -7182,8 +7182,7 @@ static int r8169_mdio_register(struct rtl8169_private *tp) · 7181 unmodified lines
71827182 new_bus->priv = tp;
71837183 new_bus->parent = &pdev->dev;
71847184 new_bus->irq[0] = PHY_IGNORE_INTERRUPT;
7185− snprintf(new_bus->id, MII_BUS_ID_SIZE, "r8169-%x",
7186− PCI_DEVID(pdev->bus->number, pdev->devfn));
7185+ snprintf(new_bus->id, MII_BUS_ID_SIZE, "r8169-%x", pci_dev_id(pdev));
71877186
71887187 new_bus->read = r8169_mdio_read_reg;
71897188 new_bus->write = r8169_mdio_write_reg;
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c+1−1
@@ -204,7 +204,7 @@ static int quark_default_data(struct pci_dev *pdev, · 203 unmodified lines
204204 ret = 1;
205205 }
206206
207− plat->bus_id = PCI_DEVID(pdev->bus->number, pdev->devfn);
207+ plat->bus_id = pci_dev_id(pdev);
208208 plat->phy_addr = ret;
209209 plat->interface = PHY_INTERFACE_MODE_RMII;
210210
drivers/pci/msi.c+3−3
@@ -1338,7 +1338,7 @@ irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev, · 1337 unmodified lines
13381338 struct msi_desc *desc)
13391339 {
13401340 return (irq_hw_number_t)desc->msi_attrib.entry_nr |
1341− PCI_DEVID(dev->bus->number, dev->devfn) << 11 |
1341+ pci_dev_id(dev) << 11 |
13421342 (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27;
13431343 }
13441344
@@ -1508,7 +1508,7 @@ static int get_msi_id_cb(struct pci_dev *pdev, u16 alias, void *data) · 163 unmodified lines
15081508 u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev)
15091509 {
15101510 struct device_node *of_node;
1511− u32 rid = PCI_DEVID(pdev->bus->number, pdev->devfn);
1511+ u32 rid = pci_dev_id(pdev);
15121512
15131513 pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid);
15141514
@@ -1531,7 +1531,7 @@ u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev) · 16 unmodified lines
15311531 struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
15321532 {
15331533 struct irq_domain *dom;
1534− u32 rid = PCI_DEVID(pdev->bus->number, pdev->devfn);
1534+ u32 rid = pci_dev_id(pdev);
15351535
15361536 pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid);
15371537 dom = of_msi_map_get_device_domain(&pdev->dev, rid);
drivers/pci/pci.c+0−25
@@ -3706,31 +3706,6 @@ int pci_request_region(struct pci_dev *pdev, int bar, const char *res_name) · 3705 unmodified lines
37063706 }
37073707 EXPORT_SYMBOL(pci_request_region);
37083708
3709−/**
3710− * pci_request_region_exclusive - Reserved PCI I/O and memory resource
3711− * @pdev: PCI device whose resources are to be reserved
3712− * @bar: BAR to be reserved
3713− * @res_name: Name to be associated with resource.
3714− *
3715− * Mark the PCI region associated with PCI device @pdev BR @bar as
3716− * being reserved by owner @res_name. Do not access any
3717− * address inside the PCI regions unless this call returns
3718− * successfully.
3719− *
3720− * Returns 0 on success, or %EBUSY on error. A warning
3721− * message is also printed on failure.
3722− *
3723− * The key difference that _exclusive makes it that userspace is
3724− * explicitly not allowed to map the resource via /dev/mem or
3725− * sysfs.
3726− */
3727−int pci_request_region_exclusive(struct pci_dev *pdev, int bar,
3728− const char *res_name)
3729−{
3730− return __pci_request_region(pdev, bar, res_name, IORESOURCE_EXCLUSIVE);
3731−}
3732−EXPORT_SYMBOL(pci_request_region_exclusive);
3733−
37343709 /**
37353710 * pci_release_selected_regions - Release selected PCI I/O and memory resources
37363711 * @pdev: PCI device whose resources were previously reserved
drivers/pci/proc.c+1−0
@@ -222,6 +222,7 @@ static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd, · 221 unmodified lines
222222 }
223223 /* If arch decided it can't, fall through... */
224224 #endif /* HAVE_PCI_MMAP */
225+ /* fall through */
225226 default:
226227 ret = -EINVAL;
227228 break;
drivers/pci/quirks.c+58−0
@@ -5137,3 +5137,61 @@ SWITCHTEC_QUIRK(0x8573); /* PFXI 48XG3 */ · 5136 unmodified lines
51375137 SWITCHTEC_QUIRK(0x8574); /* PFXI 64XG3 */
51385138 SWITCHTEC_QUIRK(0x8575); /* PFXI 80XG3 */
51395139 SWITCHTEC_QUIRK(0x8576); /* PFXI 96XG3 */
5140+
5141+/*
5142+ * On Lenovo Thinkpad P50 SKUs with a Nvidia Quadro M1000M, the BIOS does
5143+ * not always reset the secondary Nvidia GPU between reboots if the system
5144+ * is configured to use Hybrid Graphics mode. This results in the GPU
5145+ * being left in whatever state it was in during the *previous* boot, which
5146+ * causes spurious interrupts from the GPU, which in turn causes us to
5147+ * disable the wrong IRQ and end up breaking the touchpad. Unsurprisingly,
5148+ * this also completely breaks nouveau.
5149+ *
5150+ * Luckily, it seems a simple reset of the Nvidia GPU brings it back to a
5151+ * clean state and fixes all these issues.
5152+ *
5153+ * When the machine is configured in Dedicated display mode, the issue
5154+ * doesn't occur. Fortunately the GPU advertises NoReset+ when in this
5155+ * mode, so we can detect that and avoid resetting it.
5156+ */
5157+static void quirk_reset_lenovo_thinkpad_p50_nvgpu(struct pci_dev *pdev)
5158+{
5159+ void __iomem *map;
5160+ int ret;
5161+
5162+ if (pdev->subsystem_vendor != PCI_VENDOR_ID_LENOVO ||
5163+ pdev->subsystem_device != 0x222e ||
5164+ !pdev->reset_fn)
5165+ return;
5166+
5167+ if (pci_enable_device_mem(pdev))
5168+ return;
5169+
5170+ /*
5171+ * Based on nvkm_device_ctor() in
5172+ * drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
5173+ */
5174+ map = pci_iomap(pdev, 0, 0x23000);
5175+ if (!map) {
5176+ pci_err(pdev, "Can't map MMIO space\n");
5177+ goto out_disable;
5178+ }
5179+
5180+ /*
5181+ * Make sure the GPU looks like it's been POSTed before resetting
5182+ * it.
5183+ */
5184+ if (ioread32(map + 0x2240c) & 0x2) {
5185+ pci_info(pdev, FW_BUG "GPU left initialized by EFI, resetting\n");
5186+ ret = pci_reset_function(pdev);
5187+ if (ret < 0)
5188+ pci_err(pdev, "Failed to reset GPU: %d\n", ret);
5189+ }
5190+
5191+ iounmap(map);
5192+out_disable:
5193+ pci_disable_device(pdev);
5194+}
5195+DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NVIDIA, 0x13b1,
5196+ PCI_CLASS_DISPLAY_VGA, 8,
5197+ quirk_reset_lenovo_thinkpad_p50_nvgpu);
drivers/pci/search.c+3−7
@@ -33,7 +33,7 @@ int pci_for_each_dma_alias(struct pci_dev *pdev, · 32 unmodified lines
3333 struct pci_bus *bus;
3434 int ret;
3535
36− ret = fn(pdev, PCI_DEVID(pdev->bus->number, pdev->devfn), data);
36+ ret = fn(pdev, pci_dev_id(pdev), data);
3737 if (ret)
3838 return ret;
3939
@@ -88,9 +88,7 @@ int pci_for_each_dma_alias(struct pci_dev *pdev, · 48 unmodified lines
8888 return ret;
8989 continue;
9090 case PCI_EXP_TYPE_PCIE_BRIDGE:
91− ret = fn(tmp,
92− PCI_DEVID(tmp->bus->number,
93− tmp->devfn), data);
91+ ret = fn(tmp, pci_dev_id(tmp), data);
9492 if (ret)
9593 return ret;
9694 continue;
@@ -101,9 +99,7 @@ int pci_for_each_dma_alias(struct pci_dev *pdev, · 4 unmodified lines
10199 PCI_DEVID(tmp->subordinate->number,
102100 PCI_DEVFN(0, 0)), data);
103101 else
104− ret = fn(tmp,
105− PCI_DEVID(tmp->bus->number,
106− tmp->devfn), data);
102+ ret = fn(tmp, pci_dev_id(tmp), data);
107103 if (ret)
108104 return ret;
109105 }
drivers/pci/xen-pcifront.c+1−1
@@ -1104,7 +1104,7 @@ static void __ref pcifront_backend_changed(struct xenbus_device *xdev, · 1103 unmodified lines
11041104 case XenbusStateClosed:
11051105 if (xdev->state == XenbusStateClosed)
11061106 break;
1107− /* Missed the backend's CLOSING state -- fallthrough */
1107+ /* fall through - Missed the backend's CLOSING state. */
11081108 case XenbusStateClosing:
11091109 dev_warn(&xdev->dev, "backend going away!\n");
11101110 pcifront_try_disconnect(pdev);
drivers/platform/chrome/chromeos_laptop.c+1−1
@@ -125,7 +125,7 @@ static bool chromeos_laptop_match_adapter_devid(struct device *dev, u32 devid) · 124 unmodified lines
125125 return false;
126126
127127 pdev = to_pci_dev(dev);
128− return devid == PCI_DEVID(pdev->bus->number, pdev->devfn);
128+ return devid == pci_dev_id(pdev);
129129 }
130130
131131 static void chromeos_laptop_check_adapter(struct i2c_adapter *adapter)
include/linux/pci.h+5−1
@@ -598,6 +598,11 @@ struct pci_bus { · 597 unmodified lines
598598
599599 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
600600
601+static inline u16 pci_dev_id(struct pci_dev *dev)
602+{
603+ return PCI_DEVID(dev->bus->number, dev->devfn);
604+}
605+
601606 /*
602607 * Returns true if the PCI bus is root (behind host-PCI bridge),
603608 * false otherwise
@@ -1235,7 +1240,6 @@ int __must_check pci_request_regions(struct pci_dev *, const char *); · 631 unmodified lines
12351240 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
12361241 void pci_release_regions(struct pci_dev *);
12371242 int __must_check pci_request_region(struct pci_dev *, int, const char *);
1238−int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
12391243 void pci_release_region(struct pci_dev *, int);
12401244 int pci_request_selected_regions(struct pci_dev *, int, const char *);
12411245 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);

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