History

Merge tag 'timers-v7.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/daniel.lezcano/linux into timers/clocksource

- Use designated initializers for sh_mtu2, sh_cmt, and sh_tmu, and drop the unused initializer in the platform_device_id table for sh_mtu2 (Uwe Kleine-König) - Remove redundant dev_err()/dev_err_probe() messages when devm_request_*_irq() fails, as the helper already logs an error message (Pan Chuang) - Fix a boot hang on Allwinner D1 when a forced minimum delta is used with the sun4i timer (Felix Yan) - Fix an IRQ leak in the cpuhp_setup_state() error path by freeing the IRQ on failure in the NXP PIT driver (WenTao Liang) - Fix incorrect unmapping of shared MMIO between the clocksource and clockevent drivers. If one of them fails to initialize, the error path unmaps the shared MMIO region, leaving the other driver with an invalid mapping on clps711x (Guangshuo Li) - Make the samsung_pwm driver compatible with PREEMPT_RT by replacing regular spinlocks with raw_spinlock_t in atomic contexts (Marek Szyprowski) - Use __raw_readl() and __raw_writel() instead of ioread32() and iowrite32() to support SWAP_IO_SPACE in the rtl-otto driver (Rustam Adilov) - Fix a missing clk_disable_unprepare() call in the timer initialization error path of the Armada driver (Yuho Choi)

Thomas Gleixner committed 2 months ago

Commit 0eaed892 parents c66494c 8b4127f15916 files · +843124 −257982Browse files

Unified · Split

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  272. Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc.yaml +0 −90
  273. Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-interrupt.yaml +188 −0
  274. Documentation/devicetree/bindings/interrupt-controller/econet,en751221-intc.yaml +20 −0
  275. Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml +2 −0
  276. Documentation/devicetree/bindings/interrupt-controller/renesas,r9a09g077-icu.yaml +1 −1
  277. Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml +1 −0
  278. Documentation/devicetree/bindings/interrupt-controller/starfive,jhb100-intc.yaml +4 −16
  279. Documentation/devicetree/bindings/interrupt-controller/ti,irq-crossbar.yaml +96 −0
  280. Documentation/devicetree/bindings/iommu/arm,smmu.yaml +43 −1
  281. Documentation/devicetree/bindings/iommu/riscv,iommu.yaml +51 −8
  282. Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml +71 −0
  283. Documentation/devicetree/bindings/leds/backlight/maxim,max25014.yaml +83 −0
  284. Documentation/devicetree/bindings/leds/irled/ir-spi-led.yaml +1 −1
  285. Documentation/devicetree/bindings/leds/leds-lp55xx.yaml +1 −1
  286. Documentation/devicetree/bindings/leds/samsung,s2mu005-flash.yaml +52 −0
  287. Documentation/devicetree/bindings/leds/ti,lm3560.yaml +163 −0
  288. Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +1 −0
  289. Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml +2 −0
  290. Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml +2 −0
  291. Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml +10 −0
  292. Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml +6 −0
  293. Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml +6 −0
  294. Documentation/devicetree/bindings/media/cnm,wave521c.yaml +1 −1
  295. Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml +4 −1
  296. Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml +1 −1
  297. Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml +1 −1
  298. Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml +3 −3
  299. Documentation/devicetree/bindings/media/qcom,msm8939-venus.yaml +79 −0
  300. Documentation/devicetree/bindings/media/qcom,qcm2290-venus.yaml +5 −1
  301. Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml +15 −0
  302. Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml +2 −8
  303. Documentation/devicetree/bindings/media/qcom,sm6350-camss.yaml +471 −0
  304. Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml +17 −6
  305. Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml +22 −1
  306. Documentation/devicetree/bindings/media/qcom,venus-common.yaml +0 −15
  307. Documentation/devicetree/bindings/media/renesas,fcp.yaml +4 −0
  308. Documentation/devicetree/bindings/media/renesas,vsp1.yaml +2 −0
  309. Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml +24 −3
  310. Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml +154 −19
  311. Documentation/devicetree/bindings/media/rockchip,vdec.yaml +2 −3
  312. Documentation/devicetree/bindings/media/rockchip-rga.yaml +9 −1
  313. Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml +3 −3
  314. Documentation/devicetree/bindings/media/ti,j721e-csi2rx-shim.yaml +36 −3
  315. Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml +26 −148
  316. Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.yaml +8 −23
  317. Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml +31 −0
  318. Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.yaml +2 −2
  319. Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml +50 −10
  320. Documentation/devicetree/bindings/memory-controllers/samsung,exynos5422-dmc.yaml +1 −1
  321. Documentation/devicetree/bindings/mfd/apple,smc.yaml +36 −0
  322. Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml +115 −0
  323. Documentation/devicetree/bindings/mfd/hisilicon,hi655x-pmic.yaml +80 −0
  324. Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt +0 −33
  325. Documentation/devicetree/bindings/mfd/khadas,mcu.yaml +17 −0
  326. Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml +64 −0
  327. Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml +2 −0
  328. Documentation/devicetree/bindings/mfd/rockchip,rk816.yaml +1 −2
  329. Documentation/devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml +120 −0
  330. Documentation/devicetree/bindings/mfd/sprd,sc2731.yaml +3 −1
  331. Documentation/devicetree/bindings/mfd/st,stmpe.yaml +4 −0
  332. Documentation/devicetree/bindings/mfd/ti,bq25703a.yaml +63 −10
  333. Documentation/devicetree/bindings/misc/fsl,qoriq-mc.yaml +1 −1
  334. Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml +1 −0
  335. Documentation/devicetree/bindings/mmc/hisilicon,hi3798cv200-dw-mshc.yaml +4 −3
  336. Documentation/devicetree/bindings/mmc/qcom,sdhci-msm.yaml +4 −1
  337. Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml +1 −0
  338. Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml +15 −0
  339. Documentation/devicetree/bindings/mtd/nand-chip.yaml +9 −0
  340. Documentation/devicetree/bindings/net/airoha,an8801.yaml +120 −0
  341. Documentation/devicetree/bindings/net/airoha,en7581-eth.yaml +55 −1
  342. Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6855-bt.yaml +2 −5
  343. Documentation/devicetree/bindings/net/dsa/dsa.txt +0 −4
  344. Documentation/devicetree/bindings/net/dsa/dsa.yaml +5 −1
  345. Documentation/devicetree/bindings/net/dsa/lan9303.txt +0 −100
  346. Documentation/devicetree/bindings/net/dsa/nxp,netc-switch.yaml +131 −0
  347. Documentation/devicetree/bindings/net/dsa/smsc,lan9303.yaml +123 −0
  348. Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml +14 −2
  349. Documentation/devicetree/bindings/net/ethernet-phy.yaml +6 −3
  350. Documentation/devicetree/bindings/net/mdio.txt +0 −1
  351. Documentation/devicetree/bindings/net/mediatek,net.yaml +1 −2
  352. Documentation/devicetree/bindings/net/microchip,lan8650.yaml +1 −1
  353. Documentation/devicetree/bindings/net/microchip,lan95xx.yaml +2 −0
  354. Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml +5 −5
  355. Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml +4 −0
  356. Documentation/devicetree/bindings/net/qca,ar803x.yaml +19 −0
  357. Documentation/devicetree/bindings/net/qcom,bam-dmux.yaml +12 −0
  358. Documentation/devicetree/bindings/net/qcom,ipa.yaml +12 −0
  359. Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml +1 −1
  360. Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml +8 −1
  361. Documentation/devicetree/bindings/net/renesas,ether.yaml +1 −2
  362. Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml +20 −11
  363. Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml +1 −1
  364. Documentation/devicetree/bindings/net/ti,icssm-prueth.yaml +1 −1
  365. Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml +7 −1
  366. Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml +7 −1
  367. Documentation/devicetree/bindings/net/wireless/qcom,ipq5332-wifi.yaml +18 −0
  368. Documentation/devicetree/bindings/net/wireless/st,stlc4560.yaml +61 −0
  369. Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml +2 −0
  370. Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +32 −0
  371. Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml +7 −2
  372. Documentation/devicetree/bindings/pci/mediatek-pcie-mt7623.yaml +2 −2
  373. Documentation/devicetree/bindings/pci/mediatek-pcie.yaml +26 −0
  374. Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml +50 −0
  375. Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml +15 −8
  376. Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml +1 −1
  377. Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml +3 −0
  378. Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml +3 −2
  379. Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml +93 −0
  380. Documentation/devicetree/bindings/phy/axiado,ax3000-emmc-phy.yaml +37 −0
  381. Documentation/devicetree/bindings/phy/econet,en751221-pcie-phy.yaml +50 −0
  382. Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml +139 −0
  383. Documentation/devicetree/bindings/phy/fsl,lynx-28g.yaml +45 −3
  384. Documentation/devicetree/bindings/phy/nxp,tja1145.yaml +86 −0
  385. Documentation/devicetree/bindings/phy/qcom,dsi-phy-7nm.yaml +1 −0
  386. Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml +1 −0
  387. Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml +4 −0
  388. Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +17 −2
  389. Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml +1 −0
  390. Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml +26 −20
  391. Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml +4 −0
  392. Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml +1 −0
  393. Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml +40 −4
  394. Documentation/devicetree/bindings/phy/spacemit,usb2-phy.yaml +4 −2
  395. Documentation/devicetree/bindings/phy/ti,ds125df111.yaml +46 −0
  396. Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml +14 −9
  397. Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml +12 −7
  398. Documentation/devicetree/bindings/pinctrl/allwinner,sun55i-a523-pinctrl.yaml +4 −4
  399. Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml +1 −0
  400. Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml +188 −0
  401. Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc1-pinctrl.yaml +760 −0
  402. Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml +1 −0
  403. Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml +8 −0
  404. Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml +5 −0
  405. Documentation/devicetree/bindings/pinctrl/nvidia,tegra234-pinmux-aon.yaml +5 −1
  406. Documentation/devicetree/bindings/pinctrl/nvidia,tegra234-pinmux.yaml +5 −1
  407. Documentation/devicetree/bindings/pinctrl/nvidia,tegra238-pinmux-aon.yaml +102 −0
  408. Documentation/devicetree/bindings/pinctrl/nvidia,tegra238-pinmux-common.yaml +73 −0
  409. Documentation/devicetree/bindings/pinctrl/nvidia,tegra238-pinmux.yaml +219 −0
  410. Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-aon.yaml +80 −0
  411. Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-common.yaml +84 −0
  412. Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-main.yaml +167 −0
  413. Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-uphy.yaml +78 −0
  414. Documentation/devicetree/bindings/pinctrl/pinctrl-multiplexer.yaml +57 −0
  415. Documentation/devicetree/bindings/pinctrl/pinctrl.yaml +1 −1
  416. Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml +16 −10
  417. Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.yaml +0 −5
  418. Documentation/devicetree/bindings/pinctrl/qcom,ipq9650-tlmm.yaml +118 −0
  419. Documentation/devicetree/bindings/pinctrl/qcom,nord-tlmm.yaml +141 −0
  420. Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml +3 −0
  421. Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml +0 −5
  422. Documentation/devicetree/bindings/pinctrl/qcom,shikra-tlmm.yaml +123 −0
  423. Documentation/devicetree/bindings/pinctrl/qcom,sm6350-lpass-lpi-pinctrl.yaml +124 −0
  424. Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml +6 −0
  425. Documentation/devicetree/bindings/pinctrl/realtek,rtd1625-pinctrl.yaml +1 −1
  426. Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml +35 −0
  427. Documentation/devicetree/bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml +130 −0
  428. Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml +3 −1
  429. Documentation/devicetree/bindings/power/power-domain.yaml +34 −0
  430. Documentation/devicetree/bindings/power/qcom,rpmpd.yaml +2 −0
  431. Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml +1 −0
  432. Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml +38 −3
  433. Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml +51 −0
  434. Documentation/devicetree/bindings/pwm/st,stmpe-pwm.txt +0 −18
  435. Documentation/devicetree/bindings/regulator/mediatek,mt6311-regulator.yaml +70 −0
  436. Documentation/devicetree/bindings/regulator/mt6311-regulator.txt +0 −35
  437. Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml +13 −57
  438. Documentation/devicetree/bindings/regulator/mt6360-regulator.yaml +4 −0
  439. Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml +3 −0
  440. Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml +8 −0
  441. Documentation/devicetree/bindings/regulator/sgmicro,sgm3804.yaml +77 −0
  442. Documentation/devicetree/bindings/regulator/sprd,sc2730-regulator.yaml +44 −0
  443. Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml +1 −6
  444. Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml +3 −0
  445. Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml +6 −0
  446. Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml +7 −0
  447. Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml +6 −0
  448. Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml +6 −0
  449. Documentation/devicetree/bindings/remoteproc/qcom,rpm-proc.yaml +1 −0
  450. Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml +6 −0
  451. Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml +6 −0
  452. Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml +6 −0
  453. Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml +6 −0
  454. Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml +6 −0
  455. Documentation/devicetree/bindings/remoteproc/qcom,shikra-pas.yaml +167 −0
  456. Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml +4 −0
  457. Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml +6 −0
  458. Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml +0 −8
  459. Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml +0 −8
  460. Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml +5 −8
  461. Documentation/devicetree/bindings/reserved-memory/intel,wakeup-mailbox.yaml +49 −0
  462. Documentation/devicetree/bindings/reserved-memory/nvidia,tegra264-bpmp-shmem.yaml +2 −1
  463. Documentation/devicetree/bindings/riscv/spacemit.yaml +6 −0
  464. Documentation/devicetree/bindings/rng/mtk-rng.yaml +34 −9
  465. Documentation/devicetree/bindings/rtc/epson,rx6110.txt +0 −39
  466. Documentation/devicetree/bindings/rtc/epson,rx6110.yaml +68 −0
  467. Documentation/devicetree/bindings/rtc/rtc-ds1307.yaml +1 −0
  468. Documentation/devicetree/bindings/rtc/st,m41t93.yaml +50 −0
  469. Documentation/devicetree/bindings/rtc/trivial-rtc.yaml +2 −0
  470. Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml +10 −3
  471. Documentation/devicetree/bindings/serial/rs485.txt +0 −1
  472. Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +1 −0
  473. Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-irqmux.yaml +5 −1
  474. Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml +2 −0
  475. Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml +6 −0
  476. Documentation/devicetree/bindings/soc/qcom/qcom,sa8255p-geni-se-qup.yaml +25 −6
  477. Documentation/devicetree/bindings/soc/renesas/renesas,r8a78000-mfis.yaml +221 −0
  478. Documentation/devicetree/bindings/soc/renesas/renesas.yaml +6 −0
  479. Documentation/devicetree/bindings/soc/sophgo/sophgo.yaml +4 −0
  480. Documentation/devicetree/bindings/soc/ti/ti,omap-dmm.yaml +53 −0
  481. Documentation/devicetree/bindings/sound/cdns,xtfpga-i2s.txt +0 −18
  482. Documentation/devicetree/bindings/sound/cdns,xtfpga-i2s.yaml +48 −0
  483. Documentation/devicetree/bindings/sound/cirrus,cs42xx8.yaml +23 −0
  484. Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml +2 −2
  485. Documentation/devicetree/bindings/sound/everest,es8389.yaml +4 −0
  486. Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml +4 −0
  487. Documentation/devicetree/bindings/sound/fsl,sai.yaml +7 −0
  488. Documentation/devicetree/bindings/sound/gpio-audio-amp.yaml +270 −0
  489. Documentation/devicetree/bindings/sound/imx-audio-card.yaml +6 −0
  490. Documentation/devicetree/bindings/sound/mediatek,mt2701-audio.yaml +23 −0
  491. Documentation/devicetree/bindings/sound/mediatek,mt2701-hdmi-audio.yaml +48 −0
  492. Documentation/devicetree/bindings/sound/mediatek,mt6351-sound.yaml +37 −0
  493. Documentation/devicetree/bindings/sound/mediatek,mt8173-rt5650-rt5514.yaml +2 −0
  494. Documentation/devicetree/bindings/sound/mediatek,mt8196-afe.yaml +113 −0
  495. Documentation/devicetree/bindings/sound/mediatek,mt8196-nau8825.yaml +100 −0
  496. Documentation/devicetree/bindings/sound/mt6351.txt +0 −16
  497. Documentation/devicetree/bindings/sound/nuvoton,nau8822.yaml +18 −0
  498. Documentation/devicetree/bindings/sound/realtek,rt5677.yaml +2 −2
  499. Documentation/devicetree/bindings/sound/renesas,fsi.yaml +55 −5
  500. Documentation/devicetree/bindings/sound/renesas,r9a09g047-sound.yaml +800 −0
  501. Documentation/devicetree/bindings/sound/rockchip-spdif.yaml +1 −1
  502. Documentation/devicetree/bindings/sound/samsung,tm2.yaml +6 −2
  503. Documentation/devicetree/bindings/sound/simple-card.yaml +3 −3
  504. Documentation/devicetree/bindings/sound/spacemit,k1-i2s.yaml +29 −2
  505. Documentation/devicetree/bindings/sound/ti,tas2781.yaml +5 −0
  506. Documentation/devicetree/bindings/sound/ti,tas67524.yaml +280 −0
  507. Documentation/devicetree/bindings/spi/fsl,spi-fsl-qspi.yaml +3 −0
  508. Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.txt +0 −58
  509. Documentation/devicetree/bindings/spi/nuvoton,npcm750-fiu.yaml +93 −0
  510. Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml +18 −3
  511. Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml +1 −0
  512. Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +9 −1
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  857. arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts +23 −11
  858. arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-clemente.dts +0 −20
  859. arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-rainiera6.dts +1012 −0
  860. arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts +672 −0
  861. arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite5.dts +5 −0
  862. arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts +15 −0
  863. arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +325 −227
  864. arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts +1 −1
  865. arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4-io.dts +1 −1
  866. arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts +4 −0
  867. arch/arm/boot/dts/broadcom/bcm4708-netgear-r6300-v2.dts +4 −0
  868. arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi +3 −3
  869. arch/arm/boot/dts/gemini/Makefile +2 −0
  870. arch/arm/boot/dts/gemini/gemini-nas4210b.dts +205 −0
  871. arch/arm/boot/dts/gemini/gemini-nas4220b.dts +1 −0
  872. arch/arm/boot/dts/gemini/gemini-rut1xx.dts +7 −11
  873. arch/arm/boot/dts/gemini/gemini-sl93512r.dts +1 −1
  874. arch/arm/boot/dts/gemini/gemini-sq201.dts +2 −2
  875. arch/arm/boot/dts/gemini/gemini-verbatim-s08v1901-d1.dts +225 −0
  876. arch/arm/boot/dts/gemini/gemini.dtsi +17 −0
  877. arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi +3 −3
  878. arch/arm/boot/dts/intel/socfpga/socfpga.dtsi +1 −3
  879. arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +1 −3
  880. arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_nand.dts +2 −2
  881. arch/arm/boot/dts/mediatek/mt6589.dtsi +11 −0
  882. arch/arm/boot/dts/mediatek/mt7623.dtsi +32 −32
  883. arch/arm/boot/dts/mediatek/mt8135.dtsi +1 −1
  884. arch/arm/boot/dts/microchip/sam9x7.dtsi +3 −3
  885. arch/arm/boot/dts/microchip/sama7d65.dtsi +8 −0
  886. arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi +1439 −0
  887. arch/arm/boot/dts/nvidia/tegra114.dtsi +157 −0
  888. arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi +5 −0
  889. arch/arm/boot/dts/nvidia/tegra124-venice2.dts +5 −0
  890. arch/arm/boot/dts/nvidia/tegra20-asus-transformer-common.dtsi +19 −3
  891. arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-common.dtsi +128 −0
  892. arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-maxim-pmic.dtsi +2 −2
  893. arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-ti-pmic.dtsi +2 −2
  894. arch/arm/boot/dts/nvidia/tegra30-asus-tf600t.dts +59 −12
  895. arch/arm/boot/dts/nvidia/tegra30-asus-transformer-common.dtsi +156 −3
  896. arch/arm/boot/dts/nvidia/tegra30-lg-p880.dts +41 −0
  897. arch/arm/boot/dts/nvidia/tegra30-lg-p895.dts +46 −0
  898. arch/arm/boot/dts/nvidia/tegra30-lg-x3.dtsi +142 −15
  899. arch/arm/boot/dts/nxp/imx/Makefile +3 −0
  900. arch/arm/boot/dts/nxp/imx/imx25.dtsi +0 −1
  901. arch/arm/boot/dts/nxp/imx/imx35.dtsi +0 −1
  902. arch/arm/boot/dts/nxp/imx/imx51-babbage.dts +1 −0
  903. arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts +1 −1
  904. arch/arm/boot/dts/nxp/imx/imx53-cx9020.dts +1 −0
  905. arch/arm/boot/dts/nxp/imx/imx53-m53menlo.dts +10 −1
  906. arch/arm/boot/dts/nxp/imx/imx53-ppd.dts +2 −0
  907. arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi +10 −0
  908. arch/arm/boot/dts/nxp/imx/imx53-sk-imx53-atm0700d4.dtsi +1 −0
  909. arch/arm/boot/dts/nxp/imx/imx53-sk-imx53.dts +7 −0
  910. arch/arm/boot/dts/nxp/imx/imx53-smd.dts +2 −0
  911. arch/arm/boot/dts/nxp/imx/imx53-tx53-x03x.dts +1 −1
  912. arch/arm/boot/dts/nxp/imx/imx6dl-gw52xx.dts +0 −2
  913. arch/arm/boot/dts/nxp/imx/imx6dl-gw53xx.dts +0 −2
  914. arch/arm/boot/dts/nxp/imx/imx6dl-gw54xx.dts +0 −2
  915. arch/arm/boot/dts/nxp/imx/imx6q-display5.dtsi +1 −1
  916. arch/arm/boot/dts/nxp/imx/imx6q-gw52xx.dts +0 −2
  917. arch/arm/boot/dts/nxp/imx/imx6q-gw53xx.dts +0 −2
  918. arch/arm/boot/dts/nxp/imx/imx6q-gw54xx.dts +0 −4
  919. arch/arm/boot/dts/nxp/imx/imx6q-novena.dts +1 −0
  920. arch/arm/boot/dts/nxp/imx/imx6q-utilite-pro.dts +5 −13
  921. arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dts +1 −1
  922. arch/arm/boot/dts/nxp/imx/imx6qdl-gw51xx.dtsi +0 −2
  923. arch/arm/boot/dts/nxp/imx/imx6qdl-gw551x.dtsi +0 −2
  924. arch/arm/boot/dts/nxp/imx/imx6qdl-gw553x.dtsi +0 −2
  925. arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi +1 −1
  926. arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi +1 −1
  927. arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi +1 −1
  928. arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi +1 −1
  929. arch/arm/boot/dts/nxp/imx/imx6qdl-pico.dtsi +1 −1
  930. arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi +0 −2
  931. arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi +5 −0
  932. arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi +2 −3
  933. arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi +11 −0
  934. arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts +5 −0
  935. arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi +5 −0
  936. arch/arm/boot/dts/nxp/imx/imx6sx.dtsi +11 −0
  937. arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi +1 −0
  938. arch/arm/boot/dts/nxp/imx/imx6ul-pico-hobbit.dts +1 −1
  939. arch/arm/boot/dts/nxp/imx/imx6ul-pico-pi.dts +1 −1
  940. arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi +1 −1
  941. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-audio.dtsi +30 −0
  942. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-common.dtsi +187 −0
  943. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi +215 −0
  944. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-full.dts +22 −0
  945. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts +10 −308
  946. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-enet1.dtsi +44 −0
  947. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-enet2.dtsi +79 −0
  948. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-lvds-panel.dtsi +112 −0
  949. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-sd.dtsi +27 −0
  950. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-wifi.dtsi +75 −0
  951. arch/arm/boot/dts/nxp/imx/imx6ul-var-som.dtsi +10 −205
  952. arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +1 −0
  953. arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto-full.dts +22 −0
  954. arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto.dts +21 −0
  955. arch/arm/boot/dts/nxp/imx/imx6ull-var-som.dtsi +36 −0
  956. arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi +10 −0
  957. arch/arm/boot/dts/nxp/imx/imx7d-pico-dwarf.dts +1 −1
  958. arch/arm/boot/dts/nxp/imx/imx7d-pico-pi.dts +67 −1
  959. arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts +5 −0
  960. arch/arm/boot/dts/nxp/imx/imx7d.dtsi +11 −0
  961. arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi +12 −0
  962. arch/arm/boot/dts/renesas/r7s72100-genmai.dts +0 −3
  963. arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts +0 −2
  964. arch/arm/boot/dts/renesas/r7s72100.dtsi +1 −1
  965. arch/arm/boot/dts/renesas/r8a73a4.dtsi +111 −3
  966. arch/arm/boot/dts/renesas/r8a7740.dtsi +112 −4
  967. arch/arm/boot/dts/renesas/r8a7778.dtsi +1 −1
  968. arch/arm/boot/dts/renesas/r8a7779.dtsi +1 −1
  969. arch/arm/boot/dts/renesas/r8a7792.dtsi +1 −1
  970. arch/arm/boot/dts/rockchip/rk3288-veyron-analog-audio.dtsi +0 −2
  971. arch/arm/boot/dts/rockchip/rk3288-veyron.dtsi +5 −0
  972. arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts +4 −0
  973. arch/arm/boot/dts/st/stm32mp135f-dk.dts +24 −4
  974. arch/arm/boot/dts/st/stm32mp151c-mecio1r0.dts +128 −0
  975. arch/arm/boot/dts/st/stm32mp153c-mecio1r1.dts +144 −0
  976. arch/arm/boot/dts/st/stm32mp15x-mecio1-io.dtsi +16 −130
  977. arch/arm/boot/dts/ti/omap/am335x-sl50.dts +2 −2
  978. arch/arm/boot/dts/ti/omap/dm8168-evm.dts +4 −0
  979. arch/arm/boot/dts/ti/omap/motorola-cpcap-mapphone.dtsi +5 −1
  980. arch/arm/boot/dts/ti/omap/omap2.dtsi +4 −0
  981. arch/arm/boot/dts/ti/omap/omap2420-n8x0-common.dtsi +12 −0
  982. arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts +2 −2
  983. arch/arm/boot/dts/zte/Makefile +3 −0
  984. arch/arm/boot/dts/zte/zx297520v3-dlink-dwr932m.dts +22 −0
  985. arch/arm/boot/dts/zte/zx297520v3.dtsi +103 −0
  986. arch/arm/common/sa1111.c +1 −1
  987. arch/arm/configs/am200epdkit_defconfig +0 −1
  988. arch/arm/configs/at91_dt_defconfig +0 −1
  989. arch/arm/configs/axm55xx_defconfig +0 −1
  990. arch/arm/configs/dove_defconfig +0 −2
  991. arch/arm/configs/ep93xx_defconfig +0 −1
  992. arch/arm/configs/exynos_defconfig +0 −1
  993. arch/arm/configs/hisi_defconfig +0 −1
  994. arch/arm/configs/ixp4xx_defconfig +0 −1
  995. arch/arm/configs/mmp2_defconfig +0 −1
  996. arch/arm/configs/multi_v5_defconfig +0 −2
  997. arch/arm/configs/multi_v7_defconfig +46 −61
  998. arch/arm/configs/mv78xx0_defconfig +0 −2
  999. arch/arm/configs/mvebu_v5_defconfig +0 −2
  1000. arch/arm/configs/omap1_defconfig +0 −1
  1001. arch/arm/configs/orion5x_defconfig +0 −1
  1002. arch/arm/configs/pxa_defconfig +0 −7
  1003. arch/arm/configs/qcom_defconfig +0 −15
  1004. arch/arm/configs/sama5_defconfig +0 −1
  1005. arch/arm/configs/sama7_defconfig +2 −1
  1006. arch/arm/configs/socfpga_defconfig +0 −1
  1007. arch/arm/configs/spear13xx_defconfig +0 −1
  1008. arch/arm/configs/spear3xx_defconfig +0 −1
  1009. arch/arm/configs/spear6xx_defconfig +0 −1
  1010. arch/arm/configs/spitz_defconfig +0 −3
  1011. arch/arm/configs/sunxi_defconfig +0 −1
  1012. arch/arm/configs/wpcm450_defconfig +0 −1
  1013. arch/arm/include/asm/Kbuild +1 −0
  1014. arch/arm/include/asm/arch_gicv3.h +2 −2
  1015. arch/arm/include/asm/io.h +13 −2
  1016. arch/arm/include/asm/mach/irq.h +0 −10
  1017. arch/arm/include/asm/module.lds.h +2 −2
  1018. arch/arm/include/asm/neon-intrinsics.h +60 −0
  1019. arch/arm/include/asm/uaccess.h +1 −2
  1020. arch/arm/include/uapi/asm/fcntl.h +4 −4
  1021. arch/arm/kernel/entry-armv.S +1 −1
  1022. arch/arm/kernel/hibernate.c +10 −0
  1023. arch/arm/kernel/smp.c +1 −2
  1024. arch/arm/mach-footbridge/isa-irq.c +1 −1
  1025. arch/arm/mach-highbank/highbank.c +1 −1
  1026. arch/arm/mach-imx/cpu-imx31.c +7 −2
  1027. arch/arm/mach-imx/mm-imx3.c +2 −0
  1028. arch/arm/mach-mv78xx0/Kconfig +1 −0
  1029. arch/arm/mach-mvebu/coherency.c +3 −8
  1030. arch/arm/mach-omap1/board-nokia770.c +5 −28
  1031. arch/arm/mach-omap1/common.h +3 −0
  1032. arch/arm/mach-omap1/gpio16xx.c +40 −40
  1033. arch/arm/mach-omap2/board-generic.c +0 −1
  1034. arch/arm/mach-omap2/board-n8x0.c +0 −18
  1035. arch/arm/mach-omap2/omap_device.c +10 −19
  1036. arch/arm/mach-omap2/omap_device.h +2 −2
  1037. arch/arm/mach-orion5x/Kconfig +1 −0
  1038. arch/arm/mach-orion5x/board-mss2.c +2 −2
  1039. arch/arm/mach-pxa/Kconfig +1 −0
  1040. arch/arm/mach-pxa/devices.c +0 −7
  1041. arch/arm/mach-pxa/gumstix.c +0 −1
  1042. arch/arm/mach-pxa/pxa25x.c +3 −0
  1043. arch/arm/mach-pxa/pxa27x.c +11 −1
  1044. arch/arm/mach-pxa/spitz.c +8 −3
  1045. arch/arm/mach-pxa/udc.h +0 −8
  1046. arch/arm/mach-rockchip/platsmp.c +10 −6
  1047. arch/arm/mach-s3c/Kconfig.s3c64xx +1 −0
  1048. arch/arm/mach-s3c/mach-crag6410.c +16 −8
  1049. arch/arm/mach-sa1100/Kconfig +1 −0
  1050. arch/arm/mach-socfpga/platsmp.c +1 −0
  1051. arch/arm/mach-versatile/integrator_cp.c +4 −9
  1052. arch/arm/mach-zte/Kconfig +29 −0
  1053. arch/arm/mach-zte/Makefile +2 −0
  1054. arch/arm/mach-zte/zx297520v3.c +16 −0
  1055. arch/arm/mm/Kconfig +0 −1
  1056. arch/arm/mm/dma-mapping-nommu.c +2 −2
  1057. arch/arm/mm/dma-mapping.c +14 −14
  1058. arch/arm/mm/idmap.c +12 −0
  1059. arch/arm64/Kconfig +64 −2
  1060. arch/arm64/Kconfig.platforms +6 −1
  1061. arch/arm64/Makefile +3 −0
  1062. arch/arm64/boot/dts/Makefile +1 −0
  1063. arch/arm64/boot/dts/allwinner/Makefile +6 −0
  1064. arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +37 −1
  1065. arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi +17 −2
  1066. arch/arm64/boot/dts/amlogic/Makefile +1 −0
  1067. arch/arm64/boot/dts/amlogic/amlogic-a9-a311y3-by401.dts +40 −0
  1068. arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi +128 −0
  1069. arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts +215 −0
  1070. arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi +482 −0
  1071. arch/arm64/boot/dts/amlogic/meson-gxl-s905d-phicomm-n1.dts +15 −0
  1072. arch/arm64/boot/dts/amlogic/meson-s4-s905y4-khadas-vim1s.dts +81 −0
  1073. arch/arm64/boot/dts/amlogic/meson-s4.dtsi +45 −0
  1074. arch/arm64/boot/dts/apple/Makefile +5 −0
  1075. arch/arm64/boot/dts/apple/t8122-j433.dts +19 −0
  1076. arch/arm64/boot/dts/apple/t8122-j434.dts +19 −0
  1077. arch/arm64/boot/dts/apple/t8122-j504.dts +37 −0
  1078. arch/arm64/boot/dts/apple/t8122-j613.dts +35 −0
  1079. arch/arm64/boot/dts/apple/t8122-j615.dts +35 −0
  1080. arch/arm64/boot/dts/apple/t8122-jxxx.dtsi +48 −0
  1081. arch/arm64/boot/dts/apple/t8122-pmgr.dtsi +1149 −0
  1082. arch/arm64/boot/dts/apple/t8122-usbpd-i2c.dtsi +32 −0
  1083. arch/arm64/boot/dts/apple/t8122.dtsi +444 −0
  1084. arch/arm64/boot/dts/aspeed/Makefile +4 −0
  1085. arch/arm64/boot/dts/aspeed/aspeed-evb-flash-layout-128.dtsi +32 −0
  1086. arch/arm64/boot/dts/aspeed/aspeed-g7-a35.dtsi +194 −0
  1087. arch/arm64/boot/dts/aspeed/aspeed-g7-soc0-pinctrl.dtsi +225 −0
  1088. arch/arm64/boot/dts/aspeed/aspeed-g7-soc0.dtsi +230 −0
  1089. arch/arm64/boot/dts/aspeed/aspeed-g7-soc1-pinctrl.dtsi +1011 −0
  1090. arch/arm64/boot/dts/aspeed/aspeed-g7-soc1.dtsi +557 −0
  1091. arch/arm64/boot/dts/aspeed/ast2700-evb.dts +65 −0
  1092. arch/arm64/boot/dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts +19 −0
  1093. arch/arm64/boot/dts/bst/bstc1200.dtsi +18 −0
  1094. arch/arm64/boot/dts/cix/sky1-power.h +13 −0
  1095. arch/arm64/boot/dts/cix/sky1.dtsi +70 −0
  1096. arch/arm64/boot/dts/exynos/axis/artpec9.dtsi +2 −1
  1097. arch/arm64/boot/dts/exynos/exynos2200.dtsi +2 −1
  1098. arch/arm64/boot/dts/exynos/exynos850.dtsi +7 −0
  1099. arch/arm64/boot/dts/exynos/exynos990.dtsi +2 −1
  1100. arch/arm64/boot/dts/exynos/exynosautov9.dtsi +2 −1
  1101. arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts +8 −0
  1102. arch/arm64/boot/dts/exynos/exynosautov920.dtsi +27 −0
  1103. arch/arm64/boot/dts/exynos/google/gs101.dtsi +2 −1
  1104. arch/arm64/boot/dts/freescale/Makefile +155 −8
  1105. arch/arm64/boot/dts/freescale/fsl-ls1028a-tqmls1028a-mbls1028a.dtsi +2 −2
  1106. arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi +29 −12
  1107. arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-cx.dts +2 −0
  1108. arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi +4 −3
  1109. arch/arm64/boot/dts/freescale/fsl-lx2160a-half-twins.dts +830 −0
  1110. arch/arm64/boot/dts/freescale/fsl-lx2160a-honeycomb.dts +2 −0
  1111. arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi +36 −12
  1112. arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +12 −12
  1113. arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts +15 −22
  1114. arch/arm64/boot/dts/freescale/imx-m2-pcie.dtso +15 −0
  1115. arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi +11 −0
  1116. arch/arm64/boot/dts/freescale/imx8dxl-evk.dts +5 −2
  1117. arch/arm64/boot/dts/freescale/imx8dxl-hummingboard-telematics.dts +560 −0
  1118. arch/arm64/boot/dts/freescale/imx8dxl-sr-som.dtsi +458 −0
  1119. arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi +5 −0
  1120. arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts +3 −7
  1121. arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi +3 −4
  1122. arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-zinnia.dts +21 −0
  1123. arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-zinnia.dts +21 −0
  1124. arch/arm64/boot/dts/freescale/imx8mm-verdin-zinnia.dtsi +383 −0
  1125. arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi +12 −4
  1126. arch/arm64/boot/dts/freescale/imx8mm.dtsi +11 −0
  1127. arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1.dts +1 −1
  1128. arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v2.dts +1 −1
  1129. arch/arm64/boot/dts/freescale/imx8mp-ab2.dts +1 −1
  1130. arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-ch101olhlwh.dtsi +37 −0
  1131. arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-clock.dtsi +33 −0
  1132. arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-common.dtsi +31 −0
  1133. arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-dpi.dtsi +35 −0
  1134. arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-etm0700g0edh6.dtsi +53 −0
  1135. arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-lvds.dtsi +22 −0
  1136. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk-overlay-eth2xfast.dtso +10 −0
  1137. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtso +40 −0
  1138. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-531-100-x21.dtso +32 −0
  1139. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-531-100-x22.dtso +32 −0
  1140. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-560-300-x12.dtso +25 −0
  1141. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts +1 −1
  1142. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-505-200-x36-ch101olhlwh.dtso +53 −0
  1143. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-531-100-x40.dtso +32 −0
  1144. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-531-100-x41.dtso +32 −0
  1145. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-560-300-x36.dtso +24 −0
  1146. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-732-100-x36.dtso +36 −0
  1147. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-ea-murata-2ae-x20.dtso +56 −0
  1148. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x29.dtso +32 −0
  1149. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x31.dtso +32 −0
  1150. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640.dtsi +64 −0
  1151. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts +1 −1
  1152. arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtso +77 −0
  1153. arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx.dts +3 −0
  1154. arch/arm64/boot/dts/freescale/imx8mp-dhcom-som-overlay-eth1xfast.dtso +85 −0
  1155. arch/arm64/boot/dts/freescale/imx8mp-dhcom-som-overlay-eth2xfast.dtso +29 −0
  1156. arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi +2 −2
  1157. arch/arm64/boot/dts/freescale/imx8mp-evk.dts +7 −2
  1158. arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts +11 −3
  1159. arch/arm64/boot/dts/freescale/imx8mp-kontron-osm-s.dtsi +3 −4
  1160. arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts +62 −0
  1161. arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts +3 −0
  1162. arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtso +24 −0
  1163. arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso +18 −1
  1164. arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-zinnia.dts +21 −0
  1165. arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-zinnia.dts +21 −0
  1166. arch/arm64/boot/dts/freescale/imx8mp-verdin-zinnia.dtsi +422 −0
  1167. arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi +11 −3
  1168. arch/arm64/boot/dts/freescale/imx8mp.dtsi +11 −0
  1169. arch/arm64/boot/dts/freescale/imx8mq-evk.dts +10 −0
  1170. arch/arm64/boot/dts/freescale/imx8mq.dtsi +22 −0
  1171. arch/arm64/boot/dts/freescale/imx8qm-mek.dts +10 −0
  1172. arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi +22 −0
  1173. arch/arm64/boot/dts/freescale/imx8qm-tqma8qm-mba8x.dts +871 −0
  1174. arch/arm64/boot/dts/freescale/imx8qm-tqma8qm.dtsi +325 −0
  1175. arch/arm64/boot/dts/freescale/imx8qxp-mek.dts +5 −1
  1176. arch/arm64/boot/dts/freescale/imx8ulp-evk.dts +2 −2
  1177. arch/arm64/boot/dts/freescale/imx8ulp.dtsi +67 −0
  1178. arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +2 −2
  1179. arch/arm64/boot/dts/freescale/imx91-11x11-evk.dts +14 −1
  1180. arch/arm64/boot/dts/freescale/imx91-93-phyboard-segin-peb-av-18.dtsi +93 −0
  1181. arch/arm64/boot/dts/freescale/imx91-9x9-qsb.dts +435 −0
  1182. arch/arm64/boot/dts/freescale/imx91-phyboard-segin-peb-av-18.dtso +57 −0
  1183. arch/arm64/boot/dts/freescale/imx91-phyboard-segin.dts +21 −3
  1184. arch/arm64/boot/dts/freescale/imx91-phycore-som.dtsi +32 −7
  1185. arch/arm64/boot/dts/freescale/imx91-var-dart-sonata.dts +9 −0
  1186. arch/arm64/boot/dts/freescale/imx91-var-som-symphony.dts +527 −0
  1187. arch/arm64/boot/dts/freescale/imx91-var-som.dtsi +456 −0
  1188. arch/arm64/boot/dts/freescale/imx91_93_common.dtsi +3 −0
  1189. arch/arm64/boot/dts/freescale/imx93-11x11-evk-common.dtsi +0 −1
  1190. arch/arm64/boot/dts/freescale/imx93-9x9-qsb-ontat-kd50g21-40nt-a1.dtsi +110 −0
  1191. arch/arm64/boot/dts/freescale/imx93-9x9-qsb-ontat-kd50g21-40nt-a1.dtso +1 −105
  1192. arch/arm64/boot/dts/freescale/imx93-9x9-qsb-tianma-tm050rdh03.dtso +14 −0
  1193. arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts +0 −1
  1194. arch/arm64/boot/dts/freescale/imx93-phyboard-nash.dts +35 −4
  1195. arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-av-18.dtso +57 −0
  1196. arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts +21 −3
  1197. arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi +32 −7
  1198. arch/arm64/boot/dts/freescale/imx93-var-dart-sonata.dts +654 −0
  1199. arch/arm64/boot/dts/freescale/imx93-var-dart.dtsi +461 −0
  1200. arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts +61 −0
  1201. arch/arm64/boot/dts/freescale/imx94.dtsi +101 −1
  1202. arch/arm64/boot/dts/freescale/imx943-evk-sdwifi.dtso +15 −0
  1203. arch/arm64/boot/dts/freescale/imx943-evk.dts +84 −1
  1204. arch/arm64/boot/dts/freescale/imx943.dtsi +75 −0
  1205. arch/arm64/boot/dts/freescale/imx95-15x15-ab2.dts +669 −0
  1206. arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts +7 −2
  1207. arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts +11 −1
  1208. arch/arm64/boot/dts/freescale/imx95-19x19-frdm-pro.dts +1021 −0
  1209. arch/arm64/boot/dts/freescale/imx95-aquila-clover.dts +285 −0
  1210. arch/arm64/boot/dts/freescale/imx95-aquila-dev.dts +389 −0
  1211. arch/arm64/boot/dts/freescale/imx95-aquila.dtsi +1160 −0
  1212. arch/arm64/boot/dts/freescale/imx95-toradex-smarc-dev.dts +5 −0
  1213. arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi +45 −1
  1214. arch/arm64/boot/dts/freescale/imx95-var-dart-sonata.dts +28 −1
  1215. arch/arm64/boot/dts/freescale/imx95-verdin-ivy.dtsi +0 −1
  1216. arch/arm64/boot/dts/freescale/imx95-verdin-nonwifi-zinnia.dts +21 −0
  1217. arch/arm64/boot/dts/freescale/imx95-verdin-wifi-zinnia.dts +21 −0
  1218. arch/arm64/boot/dts/freescale/imx95-verdin-zinnia.dtsi +429 −0
  1219. arch/arm64/boot/dts/freescale/imx95-verdin.dtsi +13 −5
  1220. arch/arm64/boot/dts/freescale/imx95.dtsi +124 −5
  1221. arch/arm64/boot/dts/freescale/imx952.dtsi +47 −0
  1222. arch/arm64/boot/dts/freescale/s32g2.dtsi +65 −1
  1223. arch/arm64/boot/dts/freescale/s32g3.dtsi +68 −2
  1224. arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi +77 −1
  1225. arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +7 −10
  1226. arch/arm64/boot/dts/intel/Makefile +1 −0
  1227. arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts +2 −0
  1228. arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi +2 −2
  1229. arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts +3 −1
  1230. arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts +3 −1
  1231. arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts +3 −1
  1232. arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts +3 −1
  1233. arch/arm64/boot/dts/intel/socfpga_agilex7m_socdk.dts +103 −0
  1234. arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts +7 −4
  1235. arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi +4 −1
  1236. arch/arm64/boot/dts/mediatek/Makefile +8 −0
  1237. arch/arm64/boot/dts/mediatek/mt6359.dtsi +4 −18
  1238. arch/arm64/boot/dts/mediatek/mt6365.dtsi +26 −0
  1239. arch/arm64/boot/dts/mediatek/mt7981b-xiaomi-ax3000t.dts +36 −0
  1240. arch/arm64/boot/dts/mediatek/mt7981b.dtsi +15 −0
  1241. arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-pro-cn13.dtso +20 −0
  1242. arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-pro-cn14.dtso +20 −0
  1243. arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-pro.dtsi +3 −12
  1244. arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb.dtsi +4 −0
  1245. arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi +41 −0
  1246. arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +76 −6
  1247. arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +97 −57
  1248. arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts +7 −0
  1249. arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi +74 −6
  1250. arch/arm64/boot/dts/mediatek/mt8390-grinn-genio-som.dtsi +1 −1
  1251. arch/arm64/boot/dts/mediatek/mt8390-tungsten-smarc.dtsi +119 −3
  1252. arch/arm64/boot/dts/mediatek/mt8395-genio-common.dtsi +38 −8
  1253. arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l-8-hd-panel.dtso +2 −2
  1254. arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts +4 −4
  1255. arch/arm64/boot/dts/microchip/lan9691.dtsi +5 −0
  1256. arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts +25 −0
  1257. arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts +24 −0
  1258. arch/arm64/boot/dts/nuvoton/ma35d1.dtsi +52 −0
  1259. arch/arm64/boot/dts/nvidia/tegra132-norrin.dts +5 −0
  1260. arch/arm64/boot/dts/nvidia/tegra194.dtsi +15 −2
  1261. arch/arm64/boot/dts/nvidia/tegra210-smaug.dts +7 −0
  1262. arch/arm64/boot/dts/nvidia/tegra234.dtsi +20 −4
  1263. arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834-0008.dts +12 −0
  1264. arch/arm64/boot/dts/nvidia/tegra264.dtsi +44 −44
  1265. arch/arm64/boot/dts/qcom/Makefile +8 −0
  1266. arch/arm64/boot/dts/qcom/agatti.dtsi +63 −0
  1267. arch/arm64/boot/dts/qcom/eliza-mtp.dts +154 −2
  1268. arch/arm64/boot/dts/qcom/eliza.dtsi +2497 −210
  1269. arch/arm64/boot/dts/qcom/glymur-crd.dts +0 −4
  1270. arch/arm64/boot/dts/qcom/glymur-crd.dtsi +32 −1
  1271. arch/arm64/boot/dts/qcom/glymur.dtsi +1673 −191
  1272. arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts +21 −0
  1273. arch/arm64/boot/dts/qcom/hamoa.dtsi +12 −65
  1274. arch/arm64/boot/dts/qcom/ipq5210.dtsi +7 −0
  1275. arch/arm64/boot/dts/qcom/ipq5424.dtsi +2 −2
  1276. arch/arm64/boot/dts/qcom/ipq9650-rdp488.dts +79 −0
  1277. arch/arm64/boot/dts/qcom/ipq9650.dtsi +384 −0
  1278. arch/arm64/boot/dts/qcom/kaanapali-mtp.dts +27 −0
  1279. arch/arm64/boot/dts/qcom/kaanapali-qrd.dts +27 −0
  1280. arch/arm64/boot/dts/qcom/kaanapali.dtsi +164 −6
  1281. arch/arm64/boot/dts/qcom/kodiak.dtsi +12 −5
  1282. arch/arm64/boot/dts/qcom/lemans-evk-ifp-mezzanine.dtso +74 −0
  1283. arch/arm64/boot/dts/qcom/lemans-evk.dts +7 −0
  1284. arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi +110 −0
  1285. arch/arm64/boot/dts/qcom/lemans.dtsi +622 −379
  1286. arch/arm64/boot/dts/qcom/mahua.dtsi +1 −0
  1287. arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts +30 −1
  1288. arch/arm64/boot/dts/qcom/milos-nothing-asteroids.dts +964 −0
  1289. arch/arm64/boot/dts/qcom/milos.dtsi +50 −2
  1290. arch/arm64/boot/dts/qcom/monaco-arduino-monza.dts +11 −0
  1291. arch/arm64/boot/dts/qcom/monaco.dtsi +35 −2
  1292. arch/arm64/boot/dts/qcom/msm8998.dtsi +4 −4
  1293. arch/arm64/boot/dts/qcom/pm4125.dtsi +0 −1
  1294. arch/arm64/boot/dts/qcom/pm7250b.dtsi +0 −1
  1295. arch/arm64/boot/dts/qcom/pm7550ba-eliza.dtsi +70 −0
  1296. arch/arm64/boot/dts/qcom/pm8150b.dtsi +0 −1
  1297. arch/arm64/boot/dts/qcom/pmh0104-glymur.dtsi +1 −1
  1298. arch/arm64/boot/dts/qcom/pmi632.dtsi +0 −1
  1299. arch/arm64/boot/dts/qcom/qcs615-ride.dts +13 −1
  1300. arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +31 −0
  1301. arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +2 −0
  1302. arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +2 −0
  1303. arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +2 −0
  1304. arch/arm64/boot/dts/qcom/sar2130p.dtsi +1 −1
  1305. arch/arm64/boot/dts/qcom/sc7180.dtsi +11 −4
  1306. arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi +1 −1
  1307. arch/arm64/boot/dts/qcom/sc8180x.dtsi +2 −2
  1308. arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +1 −1
  1309. arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts +1 −1
  1310. arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +1 −1
  1311. arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts +1 −1
  1312. arch/arm64/boot/dts/qcom/sc8280xp.dtsi +28 −21
  1313. arch/arm64/boot/dts/qcom/sdm630.dtsi +17 −11
  1314. arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts +2 −0
  1315. arch/arm64/boot/dts/qcom/sdm660.dtsi +18 −18
  1316. arch/arm64/boot/dts/qcom/sdm670-google-bonito-tianma.dts +32 −0
  1317. arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi +712 −0
  1318. arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts +13 −601
  1319. arch/arm64/boot/dts/qcom/sdm670.dtsi +104 −15
  1320. arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso +5 −0
  1321. arch/arm64/boot/dts/qcom/sdm845-google-common.dtsi +31 −0
  1322. arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi +19 −3
  1323. arch/arm64/boot/dts/qcom/sdm845-lg-judyln.dts +2 −2
  1324. arch/arm64/boot/dts/qcom/sdm845-lg-judyp.dts +2 −2
  1325. arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi +78 −1
  1326. arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts +4 −3
  1327. arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts +112 −15
  1328. arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi +18 −1
  1329. arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts +1 −1
  1330. arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts +1 −1
  1331. arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +2 −0
  1332. arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts +94 −0
  1333. arch/arm64/boot/dts/qcom/sm6350.dtsi +66 −0
  1334. arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts +2 −0
  1335. arch/arm64/boot/dts/qcom/sm7325-motorola-dubai.dts +1456 −0
  1336. arch/arm64/boot/dts/qcom/sm8150-hdk.dts +2 −0
  1337. arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi +2 −0
  1338. arch/arm64/boot/dts/qcom/sm8450-hdk.dts +1 −1
  1339. arch/arm64/boot/dts/qcom/sm8450.dtsi +7 −3
  1340. arch/arm64/boot/dts/qcom/sm8550.dtsi +373 −2
  1341. arch/arm64/boot/dts/qcom/sm8650.dtsi +6 −2
  1342. arch/arm64/boot/dts/qcom/sm8750.dtsi +56 −7
  1343. arch/arm64/boot/dts/qcom/talos-evk.dts +56 −0
  1344. arch/arm64/boot/dts/qcom/talos.dtsi +134 −0
  1345. arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi +1 −6
  1346. arch/arm64/boot/dts/qcom/x1-hp-omnibook-x14.dtsi +1 −1
  1347. arch/arm64/boot/dts/qcom/x1p42100-asus-zenbook-a14.dtsi +1 −1
  1348. arch/arm64/boot/dts/realtek/kent.dtsi +20 −0
  1349. arch/arm64/boot/dts/renesas/Makefile +1 −0
  1350. arch/arm64/boot/dts/renesas/condor-common.dtsi +2 −0
  1351. arch/arm64/boot/dts/renesas/draak-ebisu-panel-aa104xd12.dtso +1 −27
  1352. arch/arm64/boot/dts/renesas/draak.dtsi +3 −1
  1353. arch/arm64/boot/dts/renesas/ebisu.dtsi +20 −18
  1354. arch/arm64/boot/dts/renesas/gray-hawk-single.dtsi +7 −5
  1355. arch/arm64/boot/dts/renesas/hihope-rev4.dtsi +1 −1
  1356. arch/arm64/boot/dts/renesas/panel-aa104xd12.dtsi +45 −19
  1357. arch/arm64/boot/dts/renesas/r8a77960-salvator-x.dts +4 −0
  1358. arch/arm64/boot/dts/renesas/r8a77960-salvator-xs.dts +4 −0
  1359. arch/arm64/boot/dts/renesas/r8a77960-ulcb.dts +4 −0
  1360. arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts +4 −0
  1361. arch/arm64/boot/dts/renesas/r8a77961-ulcb.dts +4 −0
  1362. arch/arm64/boot/dts/renesas/r8a77970-eagle.dts +2 −0
  1363. arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts +2 −0
  1364. arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts +2 −0
  1365. arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts +2 −0
  1366. arch/arm64/boot/dts/renesas/r8a779md-geist.dts +720 −0
  1367. arch/arm64/boot/dts/renesas/r8a779md.dtsi +59 −0
  1368. arch/arm64/boot/dts/renesas/r8a78000-ironhide.dts +62 −3
  1369. arch/arm64/boot/dts/renesas/r8a78000.dtsi +169 −9
  1370. arch/arm64/boot/dts/renesas/r9a07g043.dtsi +5 −3
  1371. arch/arm64/boot/dts/renesas/r9a07g044.dtsi +15 −3
  1372. arch/arm64/boot/dts/renesas/r9a07g054.dtsi +5 −3
  1373. arch/arm64/boot/dts/renesas/r9a08g045.dtsi +1 −0
  1374. arch/arm64/boot/dts/renesas/r9a08g046.dtsi +784 −2
  1375. arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts +134 −6
  1376. arch/arm64/boot/dts/renesas/r9a09g047.dtsi +53 −0
  1377. arch/arm64/boot/dts/renesas/r9a09g056.dtsi +71 −0
  1378. arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts +24 −0
  1379. arch/arm64/boot/dts/renesas/r9a09g057.dtsi +3 −0
  1380. arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts +1 −0
  1381. arch/arm64/boot/dts/renesas/r9a09g077.dtsi +108 −0
  1382. arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts +15 −0
  1383. arch/arm64/boot/dts/renesas/r9a09g087.dtsi +108 −0
  1384. arch/arm64/boot/dts/renesas/rz-smarc-cru-csi-ov5645.dtsi +5 −0
  1385. arch/arm64/boot/dts/renesas/rz-smarc-du-adv7513.dtsi +3 −7
  1386. arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi +24 −25
  1387. arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi +204 −0
  1388. arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi +263 −11
  1389. arch/arm64/boot/dts/renesas/salvator-common.dtsi +16 −14
  1390. arch/arm64/boot/dts/renesas/salvator-panel-aa104xd12.dtso +1 −27
  1391. arch/arm64/boot/dts/renesas/ulcb.dtsi +3 −1
  1392. arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi +2 −0
  1393. arch/arm64/boot/dts/rockchip/Makefile +7 −0
  1394. arch/arm64/boot/dts/rockchip/px30-cobra.dtsi +1 −1
  1395. arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi +1 −1
  1396. arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi +5 −0
  1397. arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s-enterprise.dts +1 −1
  1398. arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dtsi +68 −0
  1399. arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +1 −1
  1400. arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts +25 −0
  1401. arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts +29 −0
  1402. arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts +60 −0
  1403. arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi +17 −0
  1404. arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts +11 −0
  1405. arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts +12 −0
  1406. arch/arm64/boot/dts/rockchip/rk3528.dtsi +88 −0
  1407. arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts +1 −1
  1408. arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts +3 −3
  1409. arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts +14 −0
  1410. arch/arm64/boot/dts/rockchip/rk3568-rock-3b.dts +17 −3
  1411. arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +2 −1
  1412. arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts +10 −0
  1413. arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts +10 −0
  1414. arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts +9 −0
  1415. arch/arm64/boot/dts/rockchip/rk3576-evb2-v10.dts +9 −0
  1416. arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts +620 −0
  1417. arch/arm64/boot/dts/rockchip/rk3576-luckfox-core3576.dtsi +4 −18
  1418. arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts +9 −0
  1419. arch/arm64/boot/dts/rockchip/rk3576-nanopi-r76s.dts +3 −13
  1420. arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts +10 −0
  1421. arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts +10 −0
  1422. arch/arm64/boot/dts/rockchip/rk3576.dtsi +3 −3
  1423. arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts +11 −0
  1424. arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts +19 −0
  1425. arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +204 −6
  1426. arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts +17 −1
  1427. arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts +11 −1
  1428. arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi +4 −0
  1429. arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi +1 −0
  1430. arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts +20 −0
  1431. arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +11 −0
  1432. arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi +1 −0
  1433. arch/arm64/boot/dts/rockchip/rk3588-firefly-core-3588j.dtsi +1 −0
  1434. arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi +1 −0
  1435. arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts +12 −0
  1436. arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts +18 −0
  1437. arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts +11 −0
  1438. arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts +17 −7
  1439. arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts +12 −0
  1440. arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +21 −0
  1441. arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts +16 −2
  1442. arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts +20 −0
  1443. arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-ultra.dts +9 −2
  1444. arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi +1 −0
  1445. arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts +19 −0
  1446. arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts +45 −2
  1447. arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi +18 −1
  1448. arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam0.dtso +99 −0
  1449. arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam1.dtso +99 −0
  1450. arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts +3 −1
  1451. arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi +18 −2
  1452. arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts +1 −0
  1453. arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi +2 −0
  1454. arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts +16 −0
  1455. arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts +1 −0
  1456. arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts +10 −5
  1457. arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts +12 −1
  1458. arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +11 −4
  1459. arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi +11 −0
  1460. arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts +10 −0
  1461. arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi +11 −0
  1462. arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5-base.dts +8 −4
  1463. arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dtsi +3 −0
  1464. arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5-io.dts +10 −0
  1465. arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts +14 −3
  1466. arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +11 −2
  1467. arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts +11 −2
  1468. arch/arm64/boot/dts/st/stm32mp251.dtsi +4 −4
  1469. arch/arm64/boot/dts/ti/Makefile +67 −0
  1470. arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts +1 −0
  1471. arch/arm64/boot/dts/ti/k3-am62-phyboard-lyra-oldi-lcd185.dtso +185 −0
  1472. arch/arm64/boot/dts/ti/k3-am625-tqma62xx-mba62xx.dts +1033 −0
  1473. arch/arm64/boot/dts/ti/k3-am625-tqma62xx.dtsi +360 −0
  1474. arch/arm64/boot/dts/ti/k3-am625-verdin-dev-mezzanine-can.dtso +28 −0
  1475. arch/arm64/boot/dts/ti/k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds.dtso +98 −0
  1476. arch/arm64/boot/dts/ti/k3-am625-verdin-dev-nau8822-btl.dtso +14 −0
  1477. arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-hdmi.dtso +94 −0
  1478. arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtso +124 −0
  1479. arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640-24mhz.dtso +17 −0
  1480. arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640.dtsi +71 −0
  1481. arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640.dtso +18 −0
  1482. arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-10inch-dsi.dtso +132 −0
  1483. arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-10inch-lvds.dtso +120 −0
  1484. arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-7inch-dsi.dtso +132 −0
  1485. arch/arm64/boot/dts/ti/k3-am625-verdin-uart4-mcu.dtso +13 −0
  1486. arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +2 −0
  1487. arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +1 −0
  1488. arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +12 −20
  1489. arch/arm64/boot/dts/ti/k3-j722s-mcu.dtsi +15 −0
  1490. arch/arm64/boot/dts/ti/k3-j722s-wakeup.dtsi +18 −0
  1491. arch/arm64/boot/dts/ti/k3-j722s.dtsi +2 −0
  1492. arch/arm64/configs/defconfig +208 −223
  1493. arch/arm64/include/asm/arch_timer.h +2 −10
  1494. arch/arm64/include/asm/cpucaps.h +2 −2
  1495. arch/arm64/include/asm/cpufeature.h +7 −0
  1496. arch/arm64/include/asm/cputype.h +4 −0
  1497. arch/arm64/include/asm/daifflags.h +5 −5
  1498. arch/arm64/include/asm/device.h +0 −14
  1499. arch/arm64/include/asm/el2_setup.h +3 −1
  1500. arch/arm64/include/asm/esr.h +2 −0
  1501. arch/arm64/include/asm/fpsimd.h +347 −27
  1502. arch/arm64/include/asm/fpsimdmacros.h +0 −357
  1503. arch/arm64/include/asm/insn.h +1 −1
  1504. arch/arm64/include/asm/io.h +1 −1
  1505. arch/arm64/include/asm/kvm_host.h +9 −28
  1506. arch/arm64/include/asm/kvm_hyp.h +1 −5
  1507. arch/arm64/include/asm/kvm_mmu.h +1 −2
  1508. arch/arm64/include/asm/kvm_nested.h +2 −2
  1509. arch/arm64/include/asm/kvm_pkvm.h +1 −2
  1510. arch/arm64/include/asm/linkage.h +4 −0
  1511. arch/arm64/include/asm/module.lds.h +2 −2
  1512. arch/arm64/include/asm/page.h +1 −1
  1513. arch/arm64/include/asm/pgtable-types.h +7 −7
  1514. arch/arm64/include/asm/pgtable.h +30 −2
  1515. arch/arm64/include/asm/processor.h +5 −2
  1516. arch/arm64/include/asm/ptdump.h +4 −4
  1517. arch/arm64/include/asm/ring_buffer.h +10 −0
  1518. arch/arm64/include/asm/tlb.h +2 −1
  1519. arch/arm64/include/asm/tlbflush.h +2 −2
  1520. arch/arm64/include/asm/uaccess.h +1 −2
  1521. arch/arm64/include/uapi/asm/fcntl.h +4 −4
  1522. arch/arm64/include/uapi/asm/hwcap.h +8 −0
  1523. arch/arm64/kernel/Makefile +1 −1
  1524. arch/arm64/kernel/cpu_errata.c +48 −7
  1525. arch/arm64/kernel/cpufeature.c +25 −6
  1526. arch/arm64/kernel/cpuinfo.c +8 −0
  1527. arch/arm64/kernel/efi.c +2 −2
  1528. arch/arm64/kernel/entry-common.c +2 −6
  1529. arch/arm64/kernel/entry-fpsimd.S +0 −134
  1530. arch/arm64/kernel/fpsimd.c +39 −51
  1531. arch/arm64/kernel/hw_breakpoint.c +9 −0
  1532. arch/arm64/kernel/hyp-stub.S +1 −3
  1533. arch/arm64/kernel/irq.c +20 −9
  1534. arch/arm64/kernel/mte.c +2 −4
  1535. arch/arm64/kernel/patching.c +1 −2
  1536. arch/arm64/kernel/pi/map_kernel.c +1 −1
  1537. arch/arm64/kernel/pi/map_range.c +2 −2
  1538. arch/arm64/kernel/pi/pi.h +1 −1
  1539. arch/arm64/kernel/proton-pack.c +9 −8
  1540. arch/arm64/kernel/smp.c +12 −7
  1541. arch/arm64/kernel/static_call.c +1 −0
  1542. arch/arm64/kernel/vmlinux.lds.S +8 −1
  1543. arch/arm64/kvm/arch_timer.c +63 −74
  1544. arch/arm64/kvm/arm.c +40 −21
  1545. arch/arm64/kvm/at.c +118 −34
  1546. arch/arm64/kvm/emulate-nested.c +12 −0
  1547. arch/arm64/kvm/fpsimd.c +26 −0
  1548. arch/arm64/kvm/guest.c +2 −2
  1549. arch/arm64/kvm/hyp/entry.S +0 −1
  1550. arch/arm64/kvm/hyp/fpsimd.S +0 −33
  1551. arch/arm64/kvm/hyp/include/hyp/switch.h +25 −18
  1552. arch/arm64/kvm/hyp/include/nvhe/mem_protect.h +2 −1
  1553. arch/arm64/kvm/hyp/nvhe/Makefile +1 −1
  1554. arch/arm64/kvm/hyp/nvhe/host.S +1 −1
  1555. arch/arm64/kvm/hyp/nvhe/hyp-main.c +30 −11
  1556. arch/arm64/kvm/hyp/nvhe/mem_protect.c +26 −11
  1557. arch/arm64/kvm/hyp/nvhe/page_alloc.c +16 −5
  1558. arch/arm64/kvm/hyp/nvhe/pkvm.c +3 −1
  1559. arch/arm64/kvm/hyp/nvhe/setup.c +2 −2
  1560. arch/arm64/kvm/hyp/nvhe/switch.c +1 −1
  1561. arch/arm64/kvm/hyp/nvhe/tlb.c +2 −2
  1562. arch/arm64/kvm/hyp/nvhe/trace.c +7 −2
  1563. arch/arm64/kvm/hyp/pgtable.c +3 −1
  1564. arch/arm64/kvm/hyp/vgic-v5-sr.c +16 −66
  1565. arch/arm64/kvm/hyp/vhe/Makefile +1 −1
  1566. arch/arm64/kvm/hyp/vhe/switch.c +1 −1
  1567. arch/arm64/kvm/hyp/vhe/tlb.c +2 −2
  1568. arch/arm64/kvm/hyp_trace.c +10 −7
  1569. arch/arm64/kvm/hypercalls.c +3 −3
  1570. arch/arm64/kvm/mmu.c +38 −6
  1571. arch/arm64/kvm/nested.c +179 −93
  1572. arch/arm64/kvm/pmu-emul.c +11 −24
  1573. arch/arm64/kvm/sys_regs.c +12 −19
  1574. arch/arm64/kvm/vgic/vgic-init.c +18 −27
  1575. arch/arm64/kvm/vgic/vgic-irqfd.c +6 −0
  1576. arch/arm64/kvm/vgic/vgic-its.c +17 −14
  1577. arch/arm64/kvm/vgic/vgic-kvm-device.c +3 −6
  1578. arch/arm64/kvm/vgic/vgic-v5.c +17 −34
  1579. arch/arm64/kvm/vgic/vgic.c +15 −18
  1580. arch/arm64/kvm/vgic/vgic.h +3 −0
  1581. arch/arm64/mm/dma-mapping.c +1 −1
  1582. arch/arm64/mm/fault.c +14 −7
  1583. arch/arm64/mm/fixmap.c +3 −3
  1584. arch/arm64/mm/kasan_init.c +1 −1
  1585. arch/arm64/mm/mmap.c +2 −2
  1586. arch/arm64/mm/mmu.c +81 −87
  1587. arch/arm64/mm/pageattr.c +1 −1
  1588. arch/arm64/mm/ptdump.c +1 −1
  1589. arch/arm64/net/bpf_jit_comp.c +122 −34
  1590. arch/arm64/net/bpf_timed_may_goto.S +4 −4
  1591. arch/arm64/tools/cpucaps +1 −1
  1592. arch/arm64/tools/sysreg +74 −0
  1593. arch/csky/include/asm/Kbuild +1 −0
  1594. arch/hexagon/include/asm/Kbuild +1 −0
  1595. arch/hexagon/include/asm/uaccess.h +1 −2
  1596. arch/loongarch/Kconfig +2 −2
  1597. arch/loongarch/Makefile +0 −2
  1598. arch/loongarch/boot/dts/loongson-2k0500.dtsi +12 −0
  1599. arch/loongarch/boot/dts/loongson-2k1000.dtsi +4 −0
  1600. arch/loongarch/boot/dts/loongson-2k2000.dtsi +4 −0
  1601. arch/loongarch/configs/loongson32_defconfig +0 −4
  1602. arch/loongarch/configs/loongson64_defconfig +0 −4
  1603. arch/loongarch/crypto/Kconfig +0 −5
  1604. arch/loongarch/crypto/Makefile +0 −4
  1605. arch/loongarch/include/asm/Kbuild +1 −0
  1606. arch/loongarch/include/asm/acpi.h +2 −0
  1607. arch/loongarch/include/asm/current.h +31 −0
  1608. arch/loongarch/include/asm/efi.h +3 −1
  1609. arch/loongarch/include/asm/kexec.h +2 −1
  1610. arch/loongarch/include/asm/kvm_host.h +6 −8
  1611. arch/loongarch/include/asm/kvm_vcpu.h +29 −14
  1612. arch/loongarch/include/asm/paravirt.h +6 −0
  1613. arch/loongarch/include/asm/percpu.h +0 −1
  1614. arch/loongarch/include/asm/pgtable.h +4 −0
  1615. arch/loongarch/include/asm/qspinlock.h +1 −4
  1616. arch/loongarch/include/asm/smp.h +2 −1
  1617. arch/loongarch/include/asm/stackframe.h +7 −3
  1618. arch/loongarch/include/asm/switch_to.h +3 −4
  1619. arch/loongarch/include/asm/thread_info.h +0 −10
  1620. arch/loongarch/include/asm/uaccess.h +1 −2
  1621. arch/loongarch/kernel/acpi.c +28 −0
  1622. arch/loongarch/kernel/asm-offsets.c +3 −3
  1623. arch/loongarch/kernel/entry.S +5 −2
  1624. arch/loongarch/kernel/head.S +11 −7
  1625. arch/loongarch/kernel/kprobes.c +8 −6
  1626. arch/loongarch/kernel/process.c +2 −0
  1627. arch/loongarch/kernel/relocate.c +51 −1
  1628. arch/loongarch/kernel/setup.c +3 −0
  1629. arch/loongarch/kernel/smp.c +6 −3
  1630. arch/loongarch/kernel/switch.S +8 −6
  1631. arch/loongarch/kernel/traps.c +8 −0
  1632. arch/loongarch/kvm/exit.c +7 −15
  1633. arch/loongarch/kvm/intc/eiointc.c +6 −0
  1634. arch/loongarch/kvm/intc/ipi.c +2 −0
  1635. arch/loongarch/kvm/intc/pch_pic.c +2 −0
  1636. arch/loongarch/kvm/interrupt.c +27 −71
  1637. arch/loongarch/kvm/irqfd.c +2 −1
  1638. arch/loongarch/kvm/main.c +1 −0
  1639. arch/loongarch/kvm/timer.c +1 −2
  1640. arch/loongarch/kvm/vcpu.c +49 −69
  1641. arch/loongarch/mm/init.c +3 −17
  1642. arch/loongarch/mm/pageattr.c +1 −1
  1643. arch/loongarch/net/bpf_jit.c +76 −35
  1644. arch/loongarch/pci/acpi.c +2 −0
  1645. arch/loongarch/vdso/elf.S +3 −0
  1646. arch/m68k/Kconfig.cpu +1 −0
  1647. arch/m68k/Kconfig.machine +4 −4
  1648. arch/m68k/coldfire/amcore.c +2 −2
  1649. arch/m68k/coldfire/clk.c +4 −4
  1650. arch/m68k/coldfire/device.c +4 −4
  1651. arch/m68k/coldfire/dma_timer.c +6 −6
  1652. arch/m68k/coldfire/intc-2.c +15 −15
  1653. arch/m68k/coldfire/intc-5249.c +5 −5
  1654. arch/m68k/coldfire/intc-525x.c +6 −6
  1655. arch/m68k/coldfire/intc-5272.c +10 −10
  1656. arch/m68k/coldfire/intc-simr.c +19 −19
  1657. arch/m68k/coldfire/intc.c +14 −14
  1658. arch/m68k/coldfire/m5206.c +1 −1
  1659. arch/m68k/coldfire/m520x.c +13 −13
  1660. arch/m68k/coldfire/m523x.c +6 −6
  1661. arch/m68k/coldfire/m5249.c +8 −8
  1662. arch/m68k/coldfire/m525x.c +6 −6
  1663. arch/m68k/coldfire/m5272.c +8 −8
  1664. arch/m68k/coldfire/m527x.c +20 −20
  1665. arch/m68k/coldfire/m528x.c +14 −14
  1666. arch/m68k/coldfire/m5307.c +1 −1
  1667. arch/m68k/coldfire/m53xx.c +61 −61
  1668. arch/m68k/coldfire/m5407.c +1 −1
  1669. arch/m68k/coldfire/m5441x.c +18 −15
  1670. arch/m68k/coldfire/m54xx.c +9 −9
  1671. arch/m68k/coldfire/nettel.c +8 −8
  1672. arch/m68k/coldfire/pci.c +28 −28
  1673. arch/m68k/coldfire/pit.c +10 −10
  1674. arch/m68k/coldfire/reset.c +2 −2
  1675. arch/m68k/coldfire/sltimers.c +9 −9
  1676. arch/m68k/coldfire/stmark2.c +40 −23
  1677. arch/m68k/coldfire/timers.c +15 −15
  1678. arch/m68k/configs/amiga_defconfig +8 −8
  1679. arch/m68k/configs/apollo_defconfig +8 −8
  1680. arch/m68k/configs/atari_defconfig +8 −7
  1681. arch/m68k/configs/bvme6000_defconfig +8 −8
  1682. arch/m68k/configs/hp300_defconfig +8 −8
  1683. arch/m68k/configs/m5208evb_defconfig +5 −4
  1684. arch/m68k/configs/m5249evb_defconfig +5 −4
  1685. arch/m68k/configs/m5272c3_defconfig +5 −4
  1686. arch/m68k/configs/m5275evb_defconfig +5 −4
  1687. arch/m68k/configs/m5307c3_defconfig +5 −5
  1688. arch/m68k/configs/m5329evb_defconfig +61 −0
  1689. arch/m68k/configs/m5407c3_defconfig +4 −5
  1690. arch/m68k/configs/m54418evb_defconfig +70 −0
  1691. arch/m68k/configs/m5475evb_defconfig +6 −6
  1692. arch/m68k/configs/mac_defconfig +8 −8
  1693. arch/m68k/configs/multi_defconfig +8 −8
  1694. arch/m68k/configs/mvme147_defconfig +8 −8
  1695. arch/m68k/configs/mvme16x_defconfig +8 −8
  1696. arch/m68k/configs/nettel_defconfig +56 −0
  1697. arch/m68k/configs/q40_defconfig +8 −8
  1698. arch/m68k/configs/stmark2_defconfig +20 −13
  1699. arch/m68k/configs/sun3_defconfig +8 −8
  1700. arch/m68k/configs/sun3x_defconfig +8 −8
  1701. arch/m68k/include/asm/Kbuild +1 −0
  1702. arch/m68k/include/asm/hash.h +3 −1
  1703. arch/m68k/include/asm/io_no.h +16 −0
  1704. arch/m68k/include/asm/m5441xsim.h +42 −0
  1705. arch/m68k/include/asm/mcfgpio.h +6 −6
  1706. arch/m68k/include/asm/module.lds.h +1 −1
  1707. arch/m68k/include/asm/nettel.h +2 −2
  1708. arch/m68k/include/asm/string.h +0 −17
  1709. arch/m68k/include/asm/uaccess.h +1 −2
  1710. arch/m68k/include/uapi/asm/fcntl.h +4 −4
  1711. arch/m68k/kernel/head.S +1 −1
  1712. arch/microblaze/include/asm/Kbuild +1 −0
  1713. arch/microblaze/include/asm/uaccess.h +1 −2
  1714. arch/mips/Kconfig +16 −18
  1715. arch/mips/Makefile +0 −2
  1716. arch/mips/alchemy/Kconfig +0 −1
  1717. arch/mips/alchemy/board-gpr.c +75 −52
  1718. arch/mips/alchemy/board-mtx1.c +13 −21
  1719. arch/mips/alchemy/common/gpiolib.c +44 −1
  1720. arch/mips/alchemy/devboards/db1000.c +10 −21
  1721. arch/mips/alchemy/devboards/db1200.c +1 −0
  1722. arch/mips/alchemy/devboards/db1300.c +148 −71
  1723. arch/mips/alchemy/devboards/db1550.c +2 −0
  1724. arch/mips/alchemy/devboards/db1xxx.c +1 −10
  1725. arch/mips/alchemy/devboards/db1xxx.h +18 −0
  1726. arch/mips/alchemy/devboards/platform.c +2 −0
  1727. arch/mips/boot/dts/loongson/ls7a-pch.dtsi +13 −4
  1728. arch/mips/boot/dts/qca/ar9132.dtsi +1 −1
  1729. arch/mips/cavium-octeon/executive/cvmx-helper-util.c +1 −1
  1730. arch/mips/cavium-octeon/executive/cvmx-helper.c +4 −4
  1731. arch/mips/cavium-octeon/executive/cvmx-pko.c +3 −3
  1732. arch/mips/cavium-octeon/executive/cvmx-spi.c +8 −8
  1733. arch/mips/configs/bigsur_defconfig +0 −2
  1734. arch/mips/configs/cu1000-neo_defconfig +1 −1
  1735. arch/mips/configs/cu1830-neo_defconfig +1 −1
  1736. arch/mips/configs/decstation_64_defconfig +0 −4
  1737. arch/mips/configs/decstation_defconfig +0 −4
  1738. arch/mips/configs/decstation_r4k_defconfig +0 −4
  1739. arch/mips/configs/fuloong2e_defconfig +0 −2
  1740. arch/mips/configs/gcw0_defconfig +1 −1
  1741. arch/mips/configs/gpr_defconfig +0 −2
  1742. arch/mips/configs/ip22_defconfig +0 −3
  1743. arch/mips/configs/ip27_defconfig +0 −3
  1744. arch/mips/configs/ip30_defconfig +0 −3
  1745. arch/mips/configs/ip32_defconfig +0 −2
  1746. arch/mips/configs/jazz_defconfig +0 −1
  1747. arch/mips/configs/lemote2f_defconfig +0 −2
  1748. arch/mips/configs/malta_defconfig +0 −4
  1749. arch/mips/configs/malta_kvm_defconfig +0 −4
  1750. arch/mips/configs/malta_qemu_32r6_defconfig +0 −2
  1751. arch/mips/configs/maltaaprp_defconfig +0 −2
  1752. arch/mips/configs/maltasmvp_defconfig +0 −2
  1753. arch/mips/configs/maltasmvp_eva_defconfig +0 −2
  1754. arch/mips/configs/maltaup_defconfig +0 −2
  1755. arch/mips/configs/maltaup_xpa_defconfig +0 −4
  1756. arch/mips/configs/mtx1_defconfig +0 −9
  1757. arch/mips/configs/rm200_defconfig +0 −3
  1758. arch/mips/configs/sb1250_swarm_defconfig +0 −3
  1759. arch/mips/crypto/.gitignore +0 −2
  1760. arch/mips/crypto/Kconfig +0 −5
  1761. arch/mips/crypto/Makefile +0 −5
  1762. arch/mips/dec/int-handler.S +1 −1
  1763. arch/mips/dec/ioasic-irq.c +1 −4
  1764. arch/mips/dec/platform.c +112 −1
  1765. arch/mips/dec/prom/console.c +5 −2
  1766. arch/mips/dec/prom/init.c +5 −1
  1767. arch/mips/dec/reset.c +2 −0
  1768. arch/mips/dec/setup.c +1 −11
  1769. arch/mips/fw/lib/call_o32.S +1 −1
  1770. arch/mips/include/asm/Kbuild +1 −0
  1771. arch/mips/include/asm/cdmm.h +1 −1
  1772. arch/mips/include/asm/dec/prom.h +13 −2
  1773. arch/mips/include/asm/dec/reset.h +19 −0
  1774. arch/mips/include/asm/gio_device.h +0 −6
  1775. arch/mips/include/asm/irq.h +1 −1
  1776. arch/mips/include/asm/irq_work.h +9 −0
  1777. arch/mips/include/asm/mach-ath79/kmalloc.h +7 −0
  1778. arch/mips/include/asm/mach-au1x00/gpio-au1000.h +5 −0
  1779. arch/mips/include/asm/mach-au1x00/gpio-au1300.h +3 −0
  1780. arch/mips/include/asm/mach-ralink/kmalloc.h +9 −0
  1781. arch/mips/include/asm/mips_mt.h +0 −1
  1782. arch/mips/include/asm/octeon/cvmx-helper-util.h +1 −1
  1783. arch/mips/include/asm/octeon/cvmx-helper.h +3 −3
  1784. arch/mips/include/asm/octeon/cvmx-pip.h +3 −3
  1785. arch/mips/include/asm/octeon/cvmx-pko.h +13 −13
  1786. arch/mips/include/asm/octeon/cvmx-pow.h +6 −6
  1787. arch/mips/include/asm/octeon/cvmx-spi.h +19 −19
  1788. arch/mips/include/asm/smp.h +2 −0
  1789. arch/mips/include/asm/uaccess.h +1 −2
  1790. arch/mips/include/uapi/asm/errno.h +2 −0
  1791. arch/mips/include/uapi/asm/fcntl.h +11 −11
  1792. arch/mips/kernel/cps-vec.S +6 −0
  1793. arch/mips/kernel/csrc-r4k.c +2 −0
  1794. arch/mips/kernel/irq.c +1 −1
  1795. arch/mips/kernel/mips-mt-fpaff.c +15 −13
  1796. arch/mips/kernel/proc.c +4 −5
  1797. arch/mips/kernel/smp.c +2 −0
  1798. arch/mips/kernel/vdso.c +7 −5
  1799. arch/mips/lantiq/xway/dcdc.c +0 −1
  1800. arch/mips/lantiq/xway/gptu.c +0 −1
  1801. arch/mips/lantiq/xway/vmmc.c +0 −1
  1802. arch/mips/lib/memcpy.S +0 −2
  1803. arch/mips/lib/memset.S +0 −2
  1804. arch/mips/loongson64/smp.c +10 −0
  1805. arch/mips/mm/c-r4k.c +0 −5
  1806. arch/mips/mm/dma-noncoherent.c +1 −1
  1807. arch/mips/mm/init.c +11 −6
  1808. arch/mips/n64/init.c +1 −1
  1809. arch/mips/pci/pci-rt2880.c +0 −1
  1810. arch/mips/ralink/mt7621.c +1 −1
  1811. arch/mips/ralink/timer.c +0 −1
  1812. arch/mips/rb532/devices.c +26 −6
  1813. arch/mips/rb532/gpio.c +21 −20
  1814. arch/mips/rb532/serial.c +1 −1
  1815. arch/mips/sgi-ip22/ip22-gio.c +11 −23
  1816. arch/mips/txx9/Kconfig +1 −0
  1817. arch/mips/vdso/Kconfig +0 −6
  1818. arch/mips/vdso/Makefile +2 −5
  1819. arch/mips/vdso/elf.S +3 −0
  1820. arch/mips/vdso/vdso.lds.S +2 −3
  1821. arch/mips/vdso/vgettimeofday.c +0 −20
  1822. arch/nios2/include/asm/Kbuild +1 −0
  1823. arch/nios2/include/asm/linkage.h +2 −0
  1824. arch/nios2/include/asm/uaccess.h +1 −2
  1825. arch/openrisc/include/asm/Kbuild +1 −0
  1826. arch/openrisc/include/asm/cacheflush.h +4 −0
  1827. arch/openrisc/include/asm/uaccess.h +1 −2
  1828. arch/openrisc/kernel/head.S +0 −10
  1829. arch/openrisc/kernel/jump_label.c +1 −1
  1830. arch/openrisc/kernel/patching.c +3 −0
  1831. arch/openrisc/kernel/smp.c +21 −0
  1832. arch/openrisc/mm/cache.c +16 −0
  1833. arch/openrisc/mm/init.c +1 −1
  1834. arch/parisc/configs/generic-64bit_defconfig +0 −2
  1835. arch/parisc/include/asm/Kbuild +1 −0
  1836. arch/parisc/include/asm/hardware.h +1 −3
  1837. arch/parisc/include/asm/parisc-device.h +1 −0
  1838. arch/parisc/include/asm/ptrace.h +1 −0
  1839. arch/parisc/include/asm/uaccess.h +1 −2
  1840. arch/parisc/include/uapi/asm/errno.h +2 −0
  1841. arch/parisc/include/uapi/asm/fcntl.h +14 −14
  1842. arch/powerpc/Kconfig +1 −1
  1843. arch/powerpc/boot/dts/Makefile +73 −0
  1844. arch/powerpc/boot/dts/fsl/Makefile +43 −0
  1845. arch/powerpc/boot/dts/mpc8308_p1m.dts +1 −0
  1846. arch/powerpc/boot/dts/mpc8308rdb.dts +1 −0
  1847. arch/powerpc/boot/dts/mpc8315erdb.dts +1 −0
  1848. arch/powerpc/boot/dts/mpc836x_rdk.dts +1 −0
  1849. arch/powerpc/boot/dts/mpc8377_rdb.dts +1 −0
  1850. arch/powerpc/boot/dts/mpc8377_wlan.dts +1 −0
  1851. arch/powerpc/boot/dts/mpc8378_rdb.dts +1 −0
  1852. arch/powerpc/boot/dts/mpc8379_rdb.dts +1 −0
  1853. arch/powerpc/boot/hack-coff.c +1 −1
  1854. arch/powerpc/boot/rs6000.h +40 −44
  1855. arch/powerpc/boot/string.S +0 −13
  1856. arch/powerpc/boot/string.h +0 −1
  1857. arch/powerpc/boot/wrapper +1 −0
  1858. arch/powerpc/configs/44x/akebono_defconfig +0 −1
  1859. arch/powerpc/configs/44x/bamboo_defconfig +0 −1
  1860. arch/powerpc/configs/44x/currituck_defconfig +0 −1
  1861. arch/powerpc/configs/44x/ebony_defconfig +0 −1
  1862. arch/powerpc/configs/44x/eiger_defconfig +0 −1
  1863. arch/powerpc/configs/44x/fsp2_defconfig +0 −1
  1864. arch/powerpc/configs/44x/icon_defconfig +0 −1
  1865. arch/powerpc/configs/44x/iss476-smp_defconfig +0 −1
  1866. arch/powerpc/configs/44x/katmai_defconfig +0 −1
  1867. arch/powerpc/configs/44x/rainier_defconfig +0 −1
  1868. arch/powerpc/configs/44x/redwood_defconfig +0 −1
  1869. arch/powerpc/configs/44x/sequoia_defconfig +0 −1
  1870. arch/powerpc/configs/44x/taishan_defconfig +0 −1
  1871. arch/powerpc/configs/52xx/cm5200_defconfig +0 −1
  1872. arch/powerpc/configs/52xx/motionpro_defconfig +0 −1
  1873. arch/powerpc/configs/52xx/tqm5200_defconfig +0 −1
  1874. arch/powerpc/configs/83xx/asp8347_defconfig +0 −1
  1875. arch/powerpc/configs/83xx/mpc8313_rdb_defconfig +0 −1
  1876. arch/powerpc/configs/83xx/mpc8315_rdb_defconfig +0 −1
  1877. arch/powerpc/configs/83xx/mpc832x_rdb_defconfig +0 −1
  1878. arch/powerpc/configs/83xx/mpc834x_itx_defconfig +0 −1
  1879. arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig +0 −1
  1880. arch/powerpc/configs/83xx/mpc837x_rdb_defconfig +0 −1
  1881. arch/powerpc/configs/amigaone_defconfig +0 −1
  1882. arch/powerpc/configs/cell_defconfig +0 −1
  1883. arch/powerpc/configs/chrp32_defconfig +0 −1
  1884. arch/powerpc/configs/ep8248e_defconfig +0 −1
  1885. arch/powerpc/configs/fsl-emb-nonhw.config +0 −1
  1886. arch/powerpc/configs/g5_defconfig +0 −1
  1887. arch/powerpc/configs/linkstation_defconfig +0 −1
  1888. arch/powerpc/configs/mgcoge_defconfig +0 −1
  1889. arch/powerpc/configs/mpc83xx_defconfig +0 −1
  1890. arch/powerpc/configs/mvme5100_defconfig +0 −1
  1891. arch/powerpc/configs/pmac32_defconfig +0 −1
  1892. arch/powerpc/configs/powernv_defconfig +0 −1
  1893. arch/powerpc/configs/ppc44x_defconfig +0 −1
  1894. arch/powerpc/configs/ppc64_defconfig +0 −1
  1895. arch/powerpc/configs/ppc64e_defconfig +0 −1
  1896. arch/powerpc/configs/ppc6xx_defconfig +1 −8
  1897. arch/powerpc/configs/ps3_defconfig +0 −1
  1898. arch/powerpc/crypto/aes-spe-glue.c +5 −4
  1899. arch/powerpc/include/asm/Kbuild +1 −0
  1900. arch/powerpc/include/asm/entry-common.h +534 −0
  1901. arch/powerpc/include/asm/hw_irq.h +2 −2
  1902. arch/powerpc/include/asm/interrupt.h +61 −325
  1903. arch/powerpc/include/asm/kasan.h +10 −5
  1904. arch/powerpc/include/asm/machdep.h +1 −1
  1905. arch/powerpc/include/asm/pci.h +0 −2
  1906. arch/powerpc/include/asm/prom.h +3 −1
  1907. arch/powerpc/include/asm/ptrace.h +3 −3
  1908. arch/powerpc/include/asm/rtas-types.h +3 −2
  1909. arch/powerpc/include/asm/signal.h +0 −1
  1910. arch/powerpc/include/asm/stacktrace.h +6 −0
  1911. arch/powerpc/include/asm/string.h +0 −2
  1912. arch/powerpc/include/asm/syscall.h +5 −0
  1913. arch/powerpc/include/asm/thread_info.h +1 −0
  1914. arch/powerpc/include/asm/topology.h +7 −0
  1915. arch/powerpc/include/asm/uaccess.h +26 −0
  1916. arch/powerpc/include/asm/vga.h +2 −2
  1917. arch/powerpc/include/uapi/asm/fcntl.h +4 −4
  1918. arch/powerpc/include/uapi/asm/ptrace.h +9 −5
  1919. arch/powerpc/kernel/cacheinfo.c +7 −6
  1920. arch/powerpc/kernel/dma-iommu.c +4 −4
  1921. arch/powerpc/kernel/eeh_sysfs.c +4 −4
  1922. arch/powerpc/kernel/fadump.c +7 −7
  1923. arch/powerpc/kernel/interrupt.c +45 −210
  1924. arch/powerpc/kernel/iommu.c +2 −1
  1925. arch/powerpc/kernel/irq.c +1 −4
  1926. arch/powerpc/kernel/pci-common.c +1 −1
  1927. arch/powerpc/kernel/prom_init.c +1 −1
  1928. arch/powerpc/kernel/ptrace/ptrace.c +1 −141
  1929. arch/powerpc/kernel/security.c +7 −6
  1930. arch/powerpc/kernel/setup-common.c +10 −5
  1931. arch/powerpc/kernel/signal.c +8 −17
  1932. arch/powerpc/kernel/syscall.c +3 −116
  1933. arch/powerpc/kernel/sysfs.c +12 −11
  1934. arch/powerpc/kernel/time.c +41 −0
  1935. arch/powerpc/kernel/traps.c +1 −1
  1936. arch/powerpc/kernel/watchdog.c +1 −1
  1937. arch/powerpc/kexec/core_64.c +1 −3
  1938. arch/powerpc/lib/code-patching.c +2 −50
  1939. arch/powerpc/lib/string.S +0 −22
  1940. arch/powerpc/mm/book3s64/hash_utils.c +1 −3
  1941. arch/powerpc/mm/init_64.c +0 −8
  1942. arch/powerpc/mm/mem.c +3 −2
  1943. arch/powerpc/net/Makefile +4 −0
  1944. arch/powerpc/net/bpf_jit_comp.c +34 −29
  1945. arch/powerpc/net/bpf_jit_comp64.c +51 −11
  1946. arch/powerpc/net/bpf_timed_may_goto.S +57 −0
  1947. arch/powerpc/perf/core-book3s.c +3 −2
  1948. arch/powerpc/perf/core-fsl-emb.c +2 −1
  1949. arch/powerpc/perf/hv-24x7.c +7 −11
  1950. arch/powerpc/perf/hv-gpci.c +3 −2
  1951. arch/powerpc/perf/imc-pmu.c +2 −4
  1952. arch/powerpc/perf/kvm-hv-pmu.c +2 −1
  1953. arch/powerpc/perf/vpa-pmu.c +2 −1
  1954. arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c +2 −2
  1955. arch/powerpc/platforms/86xx/common.c +0 −1
  1956. arch/powerpc/platforms/8xx/cpm1.c +26 −0
  1957. arch/powerpc/platforms/cell/spu_base.c +3 −2
  1958. arch/powerpc/platforms/cell/spufs/file.c +1 −1
  1959. arch/powerpc/platforms/powernv/idle.c +2 −1
  1960. arch/powerpc/platforms/powernv/opal-dump.c +6 −5
  1961. arch/powerpc/platforms/powernv/opal-elog.c +4 −5
  1962. arch/powerpc/platforms/powernv/opal-flash.c +2 −2
  1963. arch/powerpc/platforms/powernv/opal-powercap.c +4 −8
  1964. arch/powerpc/platforms/powernv/opal-psr.c +4 −8
  1965. arch/powerpc/platforms/powernv/pci-sriov.c +2 −2
  1966. arch/powerpc/platforms/powernv/pci.h +3 −2
  1967. arch/powerpc/platforms/powernv/setup.c +2 −1
  1968. arch/powerpc/platforms/powernv/subcore.c +2 −1
  1969. arch/powerpc/platforms/ps3/setup.c +2 −1
  1970. arch/powerpc/platforms/pseries/cmm.c +3 −2
  1971. arch/powerpc/platforms/pseries/dlpar.c +2 −1
  1972. arch/powerpc/platforms/pseries/hotplug-memory.c +6 −12
  1973. arch/powerpc/platforms/pseries/ibmebus.c +3 −2
  1974. arch/powerpc/platforms/pseries/lparcfg.c +13 −11
  1975. arch/powerpc/platforms/pseries/papr_scm.c +3 −2
  1976. arch/powerpc/platforms/pseries/power.c +2 −1
  1977. arch/powerpc/platforms/pseries/pseries_energy.c +2 −1
  1978. arch/powerpc/platforms/pseries/rtas-fadump.c +47 −33
  1979. arch/powerpc/platforms/pseries/rtas-fadump.h +6 −0
  1980. arch/powerpc/platforms/pseries/setup.c +3 −2
  1981. arch/powerpc/platforms/pseries/suspend.c +2 −1
  1982. arch/powerpc/platforms/pseries/vas-sysfs.c +2 −1
  1983. arch/powerpc/platforms/pseries/vio.c +13 −16
  1984. arch/powerpc/sysdev/fsl_lbc.c +0 −1
  1985. arch/powerpc/sysdev/fsl_mpic_timer_wakeup.c +2 −1
  1986. arch/powerpc/sysdev/fsl_pmc.c +0 −1
  1987. arch/powerpc/sysdev/xive/common.c +1 −0
  1988. arch/riscv/Kconfig +29 −17
  1989. arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +9 −0
  1990. arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dts +19 −18
  1991. arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts +0 −4
  1992. arch/riscv/boot/dts/microchip/mpfs-icicle-kit-common.dtsi +0 −4
  1993. arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi +0 −10
  1994. arch/riscv/boot/dts/microchip/mpfs-icicle-kit-prod.dts +10 −0
  1995. arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts +19 −0
  1996. arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts +0 −4
  1997. arch/riscv/boot/dts/microchip/mpfs-polarberry.dts +0 −4
  1998. arch/riscv/boot/dts/microchip/mpfs-sev-kit.dts +0 −4
  1999. arch/riscv/boot/dts/microchip/mpfs-tysom-m.dts +0 −4
  2000. arch/riscv/boot/dts/microchip/mpfs.dtsi +3 −3
  2001. arch/riscv/boot/dts/microchip/pic64gx-curiosity-kit.dts +37 −30
  2002. arch/riscv/boot/dts/microchip/pic64gx.dtsi +36 −10
  2003. arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi +118 −118
  2004. arch/riscv/boot/dts/sophgo/sg2042.dtsi +5 −1
  2005. arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi +118 −118
  2006. arch/riscv/boot/dts/spacemit/Makefile +2 −0
  2007. arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts +30 −3
  2008. arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts +34 −4
  2009. arch/riscv/boot/dts/spacemit/k1-musepi-pro.dts +328 −1
  2010. arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts +157 −0
  2011. arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts +292 −0
  2012. arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi +60 −0
  2013. arch/riscv/boot/dts/spacemit/k1.dtsi +130 −1
  2014. arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts +21 −0
  2015. arch/riscv/boot/dts/spacemit/k3-com260.dtsi +190 −0
  2016. arch/riscv/boot/dts/spacemit/k3-deepcomputing-fml13v05.dts +31 −0
  2017. arch/riscv/boot/dts/spacemit/k3-pico-itx.dts +24 −0
  2018. arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi +623 −0
  2019. arch/riscv/boot/dts/spacemit/k3.dtsi +272 −9
  2020. arch/riscv/boot/dts/starfive/jh7110-common.dtsi +1 −26
  2021. arch/riscv/boot/dts/starfive/jh7110.dtsi +0 −28
  2022. arch/riscv/boot/dts/tenstorrent/blackhole.dtsi +48 −0
  2023. arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts +48 −0
  2024. arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts +47 −0
  2025. arch/riscv/boot/dts/thead/th1520.dtsi +11 −0
  2026. arch/riscv/configs/defconfig +1 −0
  2027. arch/riscv/crypto/aes-riscv64-glue.c +2 −2
  2028. arch/riscv/include/asm/Kbuild +1 −0
  2029. arch/riscv/include/asm/asm-prototypes.h +4 −0
  2030. arch/riscv/include/asm/bitrev.h +51 −0
  2031. arch/riscv/include/asm/cacheflush.h +13 −12
  2032. arch/riscv/include/asm/cpu_ops.h +1 −1
  2033. arch/riscv/include/asm/kfence.h +5 −2
  2034. arch/riscv/include/asm/kvm_aia.h +1 −1
  2035. arch/riscv/include/asm/kvm_gstage.h +7 −3
  2036. arch/riscv/include/asm/kvm_host.h +2 −0
  2037. arch/riscv/include/asm/kvm_nacl.h +8 −6
  2038. arch/riscv/include/asm/linkage.h +2 −0
  2039. arch/riscv/include/asm/module.lds.h +3 −3
  2040. arch/riscv/include/asm/pgtable.h +10 −0
  2041. arch/riscv/include/asm/purgatory.h +11 −0
  2042. arch/riscv/include/asm/syscall_wrapper.h +4 −0
  2043. arch/riscv/include/asm/uaccess.h +1 −1
  2044. arch/riscv/include/asm/usercfi.h +1 −0
  2045. arch/riscv/include/asm/vdso.h +5 −5
  2046. arch/riscv/include/asm/vdso/gettimeofday.h +0 −8
  2047. arch/riscv/kernel/alternative.c +7 −7
  2048. arch/riscv/kernel/asm-offsets.c +2 −2
  2049. arch/riscv/kernel/bugs.c +6 −6
  2050. arch/riscv/kernel/cacheinfo.c +1 −1
  2051. arch/riscv/kernel/cpu-hotplug.c +2 −2
  2052. arch/riscv/kernel/cpu_ops_sbi.c +10 −12
  2053. arch/riscv/kernel/entry.S +32 −27
  2054. arch/riscv/kernel/image-vars.h +9 −0
  2055. arch/riscv/kernel/irq.c +14 −8
  2056. arch/riscv/kernel/kexec_elf.c +2 −8
  2057. arch/riscv/kernel/machine_kexec_file.c +2 −1
  2058. arch/riscv/kernel/module-sections.c +2 −4
  2059. arch/riscv/kernel/pi/cmdline_early.c +8 −8
  2060. arch/riscv/kernel/probes/rethook_trampoline.S +3 −0
  2061. arch/riscv/kernel/ptrace.c +1 −1
  2062. arch/riscv/kernel/setup.c +4 −7
  2063. arch/riscv/kernel/smp.c +1 −2
  2064. arch/riscv/kernel/smpboot.c +2 −3
  2065. arch/riscv/kernel/stacktrace.c +2 −2
  2066. arch/riscv/kernel/traps_misaligned.c +2 −2
  2067. arch/riscv/kernel/unaligned_access_speed.c +25 −57
  2068. arch/riscv/kernel/usercfi.c +3 −0
  2069. arch/riscv/kernel/vdso/note.S +3 −0
  2070. arch/riscv/kvm/aia.c +53 −35
  2071. arch/riscv/kvm/aia_aplic.c +3 −12
  2072. arch/riscv/kvm/aia_device.c +2 −2
  2073. arch/riscv/kvm/aia_imsic.c +9 −0
  2074. arch/riscv/kvm/gstage.c +66 −34
  2075. arch/riscv/kvm/main.c +4 −4
  2076. arch/riscv/kvm/mmu.c +171 −40
  2077. arch/riscv/kvm/nacl.c +1 −1
  2078. arch/riscv/kvm/vcpu.c +1 −0
  2079. arch/riscv/kvm/vcpu_insn.c +4 −5
  2080. arch/riscv/kvm/vcpu_pmu.c +8 −4
  2081. arch/riscv/kvm/vcpu_sbi_fwft.c +40 −4
  2082. arch/riscv/kvm/vcpu_sbi_sta.c +1 −1
  2083. arch/riscv/kvm/vcpu_sbi_system.c +14 −0
  2084. arch/riscv/kvm/vcpu_sbi_v01.c +2 −0
  2085. arch/riscv/kvm/vcpu_timer.c +1 −1
  2086. arch/riscv/lib/Makefile +1 −0
  2087. arch/riscv/lib/ashldi3.S +36 −0
  2088. arch/riscv/lib/ashrdi3.S +36 −0
  2089. arch/riscv/lib/lshrdi3.S +36 −0
  2090. arch/riscv/mm/dma-noncoherent.c +1 −1
  2091. arch/riscv/mm/init.c +4 −16
  2092. arch/riscv/mm/ptdump.c +7 −6
  2093. arch/riscv/net/bpf_jit_comp64.c +36 −27
  2094. arch/riscv/net/bpf_jit_core.c +2 −1
  2095. arch/riscv/purgatory/purgatory.c +6 −10
  2096. arch/s390/Kconfig +5 −10
  2097. arch/s390/Makefile +17 −11
  2098. arch/s390/appldata/appldata_base.c +1 −2
  2099. arch/s390/boot/Makefile +6 −1
  2100. arch/s390/boot/mem.S +0 −2
  2101. arch/s390/boot/string.c +1 −5
  2102. arch/s390/boot/vmem.c +17 −15
  2103. arch/s390/boot/vmlinux.lds.S +1 −0
  2104. arch/s390/configs/debug_defconfig +4 −3
  2105. arch/s390/configs/defconfig +4 −3
  2106. arch/s390/crypto/Kconfig +1 −0
  2107. arch/s390/include/asm/Kbuild +1 −0
  2108. arch/s390/include/asm/asm-extable.h +0 −4
  2109. arch/s390/include/asm/asm-prototypes.h +0 −4
  2110. arch/s390/include/asm/barrier.h +4 −8
  2111. arch/s390/include/asm/bug.h +18 −6
  2112. arch/s390/include/asm/ccwdev.h +1 −1
  2113. arch/s390/include/asm/cmpxchg.h +4 −4
  2114. arch/s390/include/asm/debug.h +1 −0
  2115. arch/s390/include/asm/entry-percpu.h +80 −0
  2116. arch/s390/include/asm/fpu-insn-asm.h +2 −174
  2117. arch/s390/include/asm/fpu-insn.h +1 −0
  2118. arch/s390/include/asm/gmap_helpers.h +1 −0
  2119. arch/s390/include/asm/hugetlb.h +1 −1
  2120. arch/s390/include/asm/idle.h +7 −7
  2121. arch/s390/include/asm/insn-common-asm.h +53 −0
  2122. arch/s390/include/asm/jump_label.h +19 −14
  2123. arch/s390/include/asm/kvm_host.h +22 −1
  2124. arch/s390/include/asm/linkage.h +2 −0
  2125. arch/s390/include/asm/lowcore.h +4 −3
  2126. arch/s390/include/asm/percpu.h +207 −39
  2127. arch/s390/include/asm/pgtable.h +65 −38
  2128. arch/s390/include/asm/processor.h +1 −2
  2129. arch/s390/include/asm/ptrace.h +2 −0
  2130. arch/s390/include/asm/sclp.h +2 −0
  2131. arch/s390/include/asm/string.h +0 −2
  2132. arch/s390/include/asm/timex.h +1 −19
  2133. arch/s390/include/asm/tod_types.h +30 −0
  2134. arch/s390/include/asm/trace_clock.h +13 −0
  2135. arch/s390/include/asm/uaccess.h +1 −2
  2136. arch/s390/include/asm/vdso/processor.h +3 −1
  2137. arch/s390/include/asm/vtime.h +2 −2
  2138. arch/s390/include/asm/word-at-a-time.h +0 −22
  2139. arch/s390/include/uapi/asm/kvm.h +1 −0
  2140. arch/s390/kernel/Makefile +1 −0
  2141. arch/s390/kernel/asm-offsets.c +7 −0
  2142. arch/s390/kernel/debug.c +112 −17
  2143. arch/s390/kernel/entry.S +12 −2
  2144. arch/s390/kernel/idle.c +101 −26
  2145. arch/s390/kernel/irq.c +21 −10
  2146. arch/s390/kernel/nmi.c +5 −0
  2147. arch/s390/kernel/perf_pai.c +21 −10
  2148. arch/s390/kernel/process.c +1 −4
  2149. arch/s390/kernel/smp.c +1 −32
  2150. arch/s390/kernel/topology.c +7 −3
  2151. arch/s390/kernel/trace_clock.c +12 −0
  2152. arch/s390/kernel/traps.c +5 −0
  2153. arch/s390/kernel/vmlinux.lds.S +7 −0
  2154. arch/s390/kernel/vtime.c +14 −6
  2155. arch/s390/kvm/Kconfig +1 −0
  2156. arch/s390/kvm/dat.c +6 −2
  2157. arch/s390/kvm/dat.h +3 −1
  2158. arch/s390/kvm/faultin.c +15 −15
  2159. arch/s390/kvm/gaccess.c +49 −34
  2160. arch/s390/kvm/gmap.c +84 −19
  2161. arch/s390/kvm/gmap.h +83 −5
  2162. arch/s390/kvm/intercept.c +3 −2
  2163. arch/s390/kvm/interrupt.c +445 −114
  2164. arch/s390/kvm/kvm-s390.c +206 −59
  2165. arch/s390/kvm/kvm-s390.h +4 −1
  2166. arch/s390/kvm/priv.c +13 −5
  2167. arch/s390/kvm/pv.c +24 −2
  2168. arch/s390/kvm/vsie.c +66 −19
  2169. arch/s390/lib/Makefile +5 −1
  2170. arch/s390/lib/mem.S +0 −192
  2171. arch/s390/lib/string.c +210 −26
  2172. arch/s390/lib/tishift.S +0 −63
  2173. arch/s390/lib/tishift.c +64 −0
  2174. arch/s390/lib/tishift.h +9 −0
  2175. arch/s390/mm/extable.c +0 −18
  2176. arch/s390/mm/gmap_helpers.c +71 −58
  2177. arch/s390/mm/hugetlbpage.c +6 −6
  2178. arch/s390/mm/init.c +5 −2
  2179. arch/s390/mm/pageattr.c +25 −20
  2180. arch/s390/mm/vmem.c +47 −38
  2181. arch/s390/net/bpf_jit_comp.c +59 −22
  2182. arch/s390/purgatory/Makefile +4 −5
  2183. arch/s390/purgatory/purgatory.lds.S +1 −0
  2184. arch/sh/configs/hp6xx_defconfig +0 −1
  2185. arch/sh/configs/landisk_defconfig +0 −1
  2186. arch/sh/configs/r7780mp_defconfig +0 −1
  2187. arch/sh/configs/r7785rp_defconfig +0 −1
  2188. arch/sh/configs/se7712_defconfig +0 −1
  2189. arch/sh/configs/sh2007_defconfig +0 −2
  2190. arch/sh/drivers/platform_early.c +1 −1
  2191. arch/sh/include/asm/Kbuild +1 −0
  2192. arch/sh/include/asm/uaccess.h +1 −2
  2193. arch/sh/kernel/irq.c +1 −1
  2194. arch/sh/mm/cache-sh4.c +1 −1
  2195. arch/sh/mm/init.c +0 −3
  2196. arch/sparc/Kconfig +1 −25
  2197. arch/sparc/configs/sparc32_defconfig +0 −1
  2198. arch/sparc/configs/sparc64_defconfig +0 −4
  2199. arch/sparc/crypto/crop_devid.c +1 −1
  2200. arch/sparc/include/asm/Kbuild +1 −0
  2201. arch/sparc/include/asm/asm-prototypes.h +2 −0
  2202. arch/sparc/include/asm/page_32.h +2 −0
  2203. arch/sparc/include/asm/uaccess_32.h +1 −2
  2204. arch/sparc/include/asm/uaccess_64.h +1 −2
  2205. arch/sparc/include/uapi/asm/errno.h +2 −0
  2206. arch/sparc/include/uapi/asm/fcntl.h +17 −17
  2207. arch/sparc/include/uapi/asm/ucontext.h +3 −0
  2208. arch/sparc/kernel/irq_32.c +6 −6
  2209. arch/sparc/kernel/irq_64.c +2 −2
  2210. arch/sparc/kernel/led.c +1 −1
  2211. arch/sparc/kernel/of_device_32.c +0 −1
  2212. arch/sparc/kernel/of_device_64.c +0 −1
  2213. arch/sparc/kernel/of_device_common.c +0 −1
  2214. arch/sparc/kernel/uprobes.c +1 −0
  2215. arch/sparc/kernel/vio.c +5 −4
  2216. arch/sparc/lib/mcount.S +1 −0
  2217. arch/sparc/mm/init_64.c +0 −31
  2218. arch/sparc/mm/srmmu.c +0 −29
  2219. arch/um/Makefile +2 −1
  2220. arch/um/include/asm/Kbuild +2 −0
  2221. arch/um/include/asm/uaccess.h +1 −2
  2222. arch/um/kernel/irq.c +2 −2
  2223. arch/x86/Kconfig +17 −63
  2224. arch/x86/Kconfig.cpu +8 −56
  2225. arch/x86/Kconfig.cpufeatures +0 −2
  2226. arch/x86/Makefile +4 −6
  2227. arch/x86/Makefile.um +8 −0
  2228. arch/x86/Makefile_32.cpu +0 −6
  2229. arch/x86/boot/compressed/kaslr.c +2 −1
  2230. arch/x86/boot/compressed/pgtable_64.c +1 −0
  2231. arch/x86/boot/startup/sme.c +1 −0
  2232. arch/x86/boot/string.c +5 −25
  2233. arch/x86/boot/string.h +0 −1
  2234. arch/x86/coco/sev/core.c +2 −6
  2235. arch/x86/coco/sev/internal.h +3 −0
  2236. arch/x86/coco/sev/noinstr.c +3 −1
  2237. arch/x86/coco/sev/svsm.c +2 −8
  2238. arch/x86/coco/sev/vc-handle.c +10 −2
  2239. arch/x86/coco/tdx/tdx.c +1 −0
  2240. arch/x86/entry/Makefile +1 −1
  2241. arch/x86/entry/common.c +61 −0
  2242. arch/x86/entry/entry.S +48 −0
  2243. arch/x86/entry/entry_64.S +2 −2
  2244. arch/x86/entry/entry_64_fred.S +0 −1
  2245. arch/x86/entry/entry_fred.c +0 −10
  2246. arch/x86/entry/vdso/common/vfutex.c +71 −0
  2247. arch/x86/entry/vdso/vdso32/Makefile +3 −2
  2248. arch/x86/entry/vdso/vdso32/sigreturn.S +0 −10
  2249. arch/x86/entry/vdso/vdso32/vdso32.lds.S +3 −0
  2250. arch/x86/entry/vdso/vdso32/vfutex.c +1 −0
  2251. arch/x86/entry/vdso/vdso64/Makefile +4 −3
  2252. arch/x86/entry/vdso/vdso64/vdso64.lds.S +7 −0
  2253. arch/x86/entry/vdso/vdso64/vdsox32.lds.S +7 −0
  2254. arch/x86/entry/vdso/vdso64/vfutex.c +1 −0
  2255. arch/x86/entry/vdso/vma.c +30 −1
  2256. arch/x86/events/amd/core.c +6 −4
  2257. arch/x86/events/amd/ibs.c +2 −1
  2258. arch/x86/events/amd/lbr.c +2 −0
  2259. arch/x86/events/amd/power.c +3 −0
  2260. arch/x86/events/amd/uncore.c +6 −5
  2261. arch/x86/events/core.c +1 −1
  2262. arch/x86/events/intel/core.c +412 −84
  2263. arch/x86/events/intel/ds.c +21 −13
  2264. arch/x86/events/intel/knc.c +1 −1
  2265. arch/x86/events/intel/lbr.c +1 −0
  2266. arch/x86/events/intel/p4.c +1 −1
  2267. arch/x86/events/intel/uncore.c +31 −1
  2268. arch/x86/events/intel/uncore.h +2 −1
  2269. arch/x86/events/intel/uncore_discovery.c +31 −15
  2270. arch/x86/events/intel/uncore_snb.c +0 −7
  2271. arch/x86/events/intel/uncore_snbep.c +12 −24
  2272. arch/x86/events/perf_event.h +4 −4
  2273. arch/x86/events/zhaoxin/core.c +2 −1
  2274. arch/x86/hyperv/hv_init.c +1 −1
  2275. arch/x86/hyperv/hv_vtl.c +34 −4
  2276. arch/x86/hyperv/irqdomain.c +104 −94
  2277. arch/x86/include/asm/Kbuild +1 −0
  2278. arch/x86/include/asm/acpi.h +16 −0
  2279. arch/x86/include/asm/acrn.h +2 −0
  2280. arch/x86/include/asm/bug.h +3 −1
  2281. arch/x86/include/asm/cpu_device_id.h +1 −4
  2282. arch/x86/include/asm/cpufeature.h +0 −1
  2283. arch/x86/include/asm/cpufeatures.h +2 −0
  2284. arch/x86/include/asm/cpuid/api.h +250 −3
  2285. arch/x86/include/asm/cpuid/leaf_types.h +2350 −0
  2286. arch/x86/include/asm/cpuid/types.h +98 −0
  2287. arch/x86/include/asm/desc.h +4 −0
  2288. arch/x86/include/asm/desc_defs.h +1 −1
  2289. arch/x86/include/asm/device.h +0 −11
  2290. arch/x86/include/asm/elf.h +2 −3
  2291. arch/x86/include/asm/entry-common.h +2 −0
  2292. arch/x86/include/asm/extable_fixup_types.h +4 −9
  2293. arch/x86/include/asm/fpu/api.h +0 −6
  2294. arch/x86/include/asm/fred.h +0 −1
  2295. arch/x86/include/asm/futex_robust.h +19 −0
  2296. arch/x86/include/asm/hardirq.h +52 −33
  2297. arch/x86/include/asm/hw_irq.h +0 −4
  2298. arch/x86/include/asm/idtentry.h +3 −26
  2299. arch/x86/include/asm/intel-family.h +2 −0
  2300. arch/x86/include/asm/kvm-x86-ops.h +2 −3
  2301. arch/x86/include/asm/kvm-x86-pmu-ops.h +4 −1
  2302. arch/x86/include/asm/kvm_host.h +88 −72
  2303. arch/x86/include/asm/kvm_vcpu_regs.h +101 −8
  2304. arch/x86/include/asm/mce.h +0 −3
  2305. arch/x86/include/asm/microcode.h +1 −0
  2306. arch/x86/include/asm/msr-index.h +1 −0
  2307. arch/x86/include/asm/msr.h +2 −31
  2308. arch/x86/include/asm/nospec-branch.h +4 −0
  2309. arch/x86/include/asm/paravirt.h +4 −5
  2310. arch/x86/include/asm/paravirt_types.h +1 −10
  2311. arch/x86/include/asm/percpu.h +0 −5
  2312. arch/x86/include/asm/percpu_types.h +17 −0
  2313. arch/x86/include/asm/perf_event.h +2 −0
  2314. arch/x86/include/asm/pgtable.h +12 −0
  2315. arch/x86/include/asm/processor.h +8 −1
  2316. arch/x86/include/asm/purgatory.h +1 −1
  2317. arch/x86/include/asm/seamldr.h +38 −0
  2318. arch/x86/include/asm/sev.h +2 −2
  2319. arch/x86/include/asm/shared/tdx.h +1 −0
  2320. arch/x86/include/asm/shared/tdx_errno.h +4 −4
  2321. arch/x86/include/asm/string_32.h +0 −3
  2322. arch/x86/include/asm/svm.h +1 −0
  2323. arch/x86/include/asm/tdx.h +27 −75
  2324. arch/x86/include/asm/tdx_global_metadata.h +4 −0
  2325. arch/x86/include/asm/timex.h +1 −2
  2326. arch/x86/include/asm/topology.h +3 −0
  2327. arch/x86/include/asm/trace_clock.h +0 −8
  2328. arch/x86/include/asm/tsc.h +1 −12
  2329. arch/x86/include/asm/vdso.h +4 −0
  2330. arch/x86/include/asm/vermagic.h +0 −6
  2331. arch/x86/include/asm/vmx.h +13 −2
  2332. arch/x86/include/asm/x86_init.h +3 −0
  2333. arch/x86/include/asm/xen/hypervisor.h +2 −24
  2334. arch/x86/include/uapi/asm/kvm.h +2 −0
  2335. arch/x86/kernel/Makefile +2 −2
  2336. arch/x86/kernel/acpi/madt_wakeup.c +16 −0
  2337. arch/x86/kernel/apic/apic.c +4 −3
  2338. arch/x86/kernel/apic/apic_common.c +0 −1
  2339. arch/x86/kernel/apic/io_apic.c +1 −3
  2340. arch/x86/kernel/apic/ipi.c +1 −1
  2341. arch/x86/kernel/cpu/Makefile +1 −0
  2342. arch/x86/kernel/cpu/acrn.c +1 −1
  2343. arch/x86/kernel/cpu/amd.c +2 −1
  2344. arch/x86/kernel/cpu/bugs.c +45 −5
  2345. arch/x86/kernel/cpu/centaur.c +1 −0
  2346. arch/x86/kernel/cpu/common.c +4 −8
  2347. arch/x86/kernel/cpu/cpu.h +0 −1
  2348. arch/x86/kernel/cpu/cpuid-deps.c +1 −0
  2349. arch/x86/kernel/cpu/cpuid_parser.c +182 −0
  2350. arch/x86/kernel/cpu/cpuid_parser.h +120 −0
  2351. arch/x86/kernel/cpu/hygon.c +1 −0
  2352. arch/x86/kernel/cpu/intel.c +3 −12
  2353. arch/x86/kernel/cpu/mce/amd.c +4 −4
  2354. arch/x86/kernel/cpu/mce/core.c +3 −6
  2355. arch/x86/kernel/cpu/mce/inject.c +5 −4
  2356. arch/x86/kernel/cpu/mce/threshold.c +1 −1
  2357. arch/x86/kernel/cpu/microcode/amd.c +10 −7
  2358. arch/x86/kernel/cpu/microcode/core.c +12 −13
  2359. arch/x86/kernel/cpu/microcode/intel-ucode-defs.h +241 −238
  2360. arch/x86/kernel/cpu/microcode/intel.c +4 −0
  2361. arch/x86/kernel/cpu/microcode/internal.h +0 −1
  2362. arch/x86/kernel/cpu/mshyperv.c +3 −2
  2363. arch/x86/kernel/cpu/resctrl/core.c +1 −0
  2364. arch/x86/kernel/cpu/resctrl/monitor.c +15 −3
  2365. arch/x86/kernel/cpu/scattered.c +1 −0
  2366. arch/x86/kernel/cpu/sgx/driver.c +3 −0
  2367. arch/x86/kernel/cpu/sgx/main.c +3 −0
  2368. arch/x86/kernel/cpu/topology_amd.c +2 −1
  2369. arch/x86/kernel/cpu/topology_common.c +1 −0
  2370. arch/x86/kernel/cpu/topology_ext.c +2 −1
  2371. arch/x86/kernel/cpu/transmeta.c +3 −0
  2372. arch/x86/kernel/cpu/umc.c +0 −26
  2373. arch/x86/kernel/cpu/vmware.c +1 −0
  2374. arch/x86/kernel/cpu/zhaoxin.c +1 −0
  2375. arch/x86/kernel/cpuid.c +3 −3
  2376. arch/x86/kernel/crash.c +2 −0
  2377. arch/x86/kernel/devicetree.c +47 −0
  2378. arch/x86/kernel/fpu/core.c +0 −5
  2379. arch/x86/kernel/fpu/init.c +1 −8
  2380. arch/x86/kernel/fpu/signal.c +8 −3
  2381. arch/x86/kernel/ftrace.c +7 −0
  2382. arch/x86/kernel/i8253.c +1 −1
  2383. arch/x86/kernel/i8259.c +1 −1
  2384. arch/x86/kernel/idt.c +7 −0
  2385. arch/x86/kernel/irq.c +114 −167
  2386. arch/x86/kernel/irq_work.c +1 −1
  2387. arch/x86/kernel/jailhouse.c +1 −0
  2388. arch/x86/kernel/kvm.c +2 −1
  2389. arch/x86/kernel/kvmclock.c +29 −7
  2390. arch/x86/kernel/machine_kexec_64.c +0 −16
  2391. arch/x86/kernel/module.c +0 −15
  2392. arch/x86/kernel/msr.c +4 −4
  2393. arch/x86/kernel/nmi.c +2 −3
  2394. arch/x86/kernel/paravirt.c +2 −5
  2395. arch/x86/kernel/pmem.c +2 −0
  2396. arch/x86/kernel/process.c +4 −3
  2397. arch/x86/kernel/process_64.c +1 −1
  2398. arch/x86/kernel/smp.c +3 −3
  2399. arch/x86/kernel/smpboot.c +20 −0
  2400. arch/x86/kernel/traps.c +0 −21
  2401. arch/x86/kernel/tsc.c +0 −13
  2402. arch/x86/kernel/uprobes.c +18 −8
  2403. arch/x86/kernel/vmlinux.lds.S +1 −4
  2404. arch/x86/kernel/x86_init.c +3 −0
  2405. arch/x86/kvm/cpuid.c +11 −10
  2406. arch/x86/kvm/cpuid.h +10 −6
  2407. arch/x86/kvm/debugfs.c +1 −1
  2408. arch/x86/kvm/emulate.c +6 −16
  2409. arch/x86/kvm/hyperv.c +17 −13
  2410. arch/x86/kvm/hyperv.h +2 −2
  2411. arch/x86/kvm/i8259.c +2 −1
  2412. arch/x86/kvm/ioapic.c +5 −4
  2413. arch/x86/kvm/irq.c +4 −0
  2414. arch/x86/kvm/kvm-asm-offsets.c +1 −0
  2415. arch/x86/kvm/kvm_cache_regs.h +0 −249
  2416. arch/x86/kvm/kvm_emulate.h +8 −9
  2417. arch/x86/kvm/lapic.c +50 −5
  2418. arch/x86/kvm/lapic.h +2 −1
  2419. arch/x86/kvm/mmu.h +22 −10
  2420. arch/x86/kvm/mmu/mmu.c +157 −76
  2421. arch/x86/kvm/mmu/mmutrace.h +12 −9
  2422. arch/x86/kvm/mmu/paging_tmpl.h +72 −35
  2423. arch/x86/kvm/mmu/spte.c +61 −34
  2424. arch/x86/kvm/mmu/spte.h +40 −30
  2425. arch/x86/kvm/mmu/tdp_mmu.c +124 −165
  2426. arch/x86/kvm/pmu.c +22 −5
  2427. arch/x86/kvm/pmu.h +35 −9
  2428. arch/x86/kvm/regs.h +423 −0
  2429. arch/x86/kvm/reverse_cpuid.h +2 −0
  2430. arch/x86/kvm/smm.c +1 −1
  2431. arch/x86/kvm/svm/avic.c +51 −49
  2432. arch/x86/kvm/svm/nested.c +163 −56
  2433. arch/x86/kvm/svm/pmu.c +42 −0
  2434. arch/x86/kvm/svm/sev.c +534 −496
  2435. arch/x86/kvm/svm/svm.c +102 −40
  2436. arch/x86/kvm/svm/svm.h +54 −8
  2437. arch/x86/kvm/svm/vmenter.S +45 −165
  2438. arch/x86/kvm/vmenter.h +111 −0
  2439. arch/x86/kvm/vmx/capabilities.h +7 −5
  2440. arch/x86/kvm/vmx/common.h +17 −9
  2441. arch/x86/kvm/vmx/hyperv_evmcs.h +1 −0
  2442. arch/x86/kvm/vmx/main.c +9 −0
  2443. arch/x86/kvm/vmx/nested.c +73 −26
  2444. arch/x86/kvm/vmx/nested.h +1 −1
  2445. arch/x86/kvm/vmx/pmu_intel.c +15 −4
  2446. arch/x86/kvm/vmx/run_flags.h +0 −9
  2447. arch/x86/kvm/vmx/sgx.c +4 −3
  2448. arch/x86/kvm/vmx/tdx.c +212 −142
  2449. arch/x86/kvm/vmx/tdx.h +0 −1
  2450. arch/x86/kvm/vmx/vmenter.S +58 −171
  2451. arch/x86/kvm/vmx/vmx.c +88 −112
  2452. arch/x86/kvm/vmx/vmx.h +16 −18
  2453. arch/x86/kvm/vmx/x86_ops.h +6 −0
  2454. arch/x86/kvm/x86.c +195 −250
  2455. arch/x86/kvm/x86.h +22 −117
  2456. arch/x86/kvm/xen.c +21 −18
  2457. arch/x86/lib/msr-smp.c +14 −75
  2458. arch/x86/lib/string_32.c +0 −19
  2459. arch/x86/math-emu/Makefile +0 −30
  2460. arch/x86/math-emu/README +0 −427
  2461. arch/x86/math-emu/control_w.h +0 −46
  2462. arch/x86/math-emu/div_Xsig.S +0 −367
  2463. arch/x86/math-emu/div_small.S +0 −48
  2464. arch/x86/math-emu/errors.c +0 −686
  2465. arch/x86/math-emu/exception.h +0 −51
  2466. arch/x86/math-emu/fpu_arith.c +0 −153
  2467. arch/x86/math-emu/fpu_asm.h +0 −32
  2468. arch/x86/math-emu/fpu_aux.c +0 −267
  2469. arch/x86/math-emu/fpu_emu.h +0 −218
  2470. arch/x86/math-emu/fpu_entry.c +0 −718
  2471. arch/x86/math-emu/fpu_etc.c +0 −136
  2472. arch/x86/math-emu/fpu_proto.h +0 −157
  2473. arch/x86/math-emu/fpu_system.h +0 −130
  2474. arch/x86/math-emu/fpu_tags.c +0 −116
  2475. arch/x86/math-emu/fpu_trig.c +0 −1649
  2476. arch/x86/math-emu/get_address.c +0 −401
  2477. arch/x86/math-emu/load_store.c +0 −322
  2478. arch/x86/math-emu/mul_Xsig.S +0 −179
  2479. arch/x86/math-emu/poly.h +0 −115
  2480. arch/x86/math-emu/poly_2xm1.c +0 −146
  2481. arch/x86/math-emu/poly_atan.c +0 −209
  2482. arch/x86/math-emu/poly_l2.c +0 −245
  2483. arch/x86/math-emu/poly_sin.c +0 −379
  2484. arch/x86/math-emu/poly_tan.c +0 −213
  2485. arch/x86/math-emu/polynom_Xsig.S +0 −137
  2486. arch/x86/math-emu/reg_add_sub.c +0 −334
  2487. arch/x86/math-emu/reg_compare.c +0 −479
  2488. arch/x86/math-emu/reg_constant.c +0 −123
  2489. arch/x86/math-emu/reg_constant.h +0 −26
  2490. arch/x86/math-emu/reg_convert.c +0 −47
  2491. arch/x86/math-emu/reg_divide.c +0 −183
  2492. arch/x86/math-emu/reg_ld_str.c +0 −1220
  2493. arch/x86/math-emu/reg_mul.c +0 −116
  2494. arch/x86/math-emu/reg_norm.S +0 −150
  2495. arch/x86/math-emu/reg_round.S +0 −711
  2496. arch/x86/math-emu/reg_u_add.S +0 −169
  2497. arch/x86/math-emu/reg_u_div.S +0 −474
  2498. arch/x86/math-emu/reg_u_mul.S +0 −150
  2499. arch/x86/math-emu/reg_u_sub.S +0 −274
  2500. arch/x86/math-emu/round_Xsig.S +0 −142
  2501. arch/x86/math-emu/shr_Xsig.S +0 −89
  2502. arch/x86/math-emu/status_w.h +0 −68
  2503. arch/x86/math-emu/version.h +0 −12
  2504. arch/x86/math-emu/wm_shrx.S +0 −207
  2505. arch/x86/math-emu/wm_sqrt.S +0 −472
  2506. arch/x86/mm/extable.c +1 −1
  2507. arch/x86/mm/fault.c +13 −4
  2508. arch/x86/mm/init_64.c +29 −16
  2509. arch/x86/mm/pgtable.c +0 −11
  2510. arch/x86/mm/pti.c +1 −0
  2511. arch/x86/mm/tlb.c +8 −13
  2512. arch/x86/net/bpf_jit_comp.c +175 −35
  2513. arch/x86/pci/xen.c +1 −0
  2514. arch/x86/platform/geode/geode-common.c +5 −7
  2515. arch/x86/platform/olpc/olpc-xo15-sci.c +19 −14
  2516. arch/x86/platform/uv/uv_nmi.c +2 −1
  2517. arch/x86/realmode/init.c +3 −4
  2518. arch/x86/tools/vdso2c.c +10 −6
  2519. arch/x86/virt/hw.c +14 −1
  2520. arch/x86/virt/svm/sev.c +16 −2
  2521. arch/x86/virt/vmx/tdx/Makefile +1 −1
  2522. arch/x86/virt/vmx/tdx/seamcall_internal.h +109 −0
  2523. arch/x86/virt/vmx/tdx/seamldr.c +368 −0
  2524. arch/x86/virt/vmx/tdx/tdx.c +188 −95
  2525. arch/x86/virt/vmx/tdx/tdx.h +6 −3
  2526. arch/x86/virt/vmx/tdx/tdx_global_metadata.c +15 −2
  2527. arch/x86/xen/Kconfig +1 −8
  2528. arch/x86/xen/Makefile +0 −2
  2529. arch/x86/xen/debugfs.c +0 −16
  2530. arch/x86/xen/enlighten.c +2 −1
  2531. arch/x86/xen/enlighten_hvm.c +2 −1
  2532. arch/x86/xen/enlighten_pv.c +14 −19
  2533. arch/x86/xen/mmu_pv.c +38 −51
  2534. arch/x86/xen/p2m.c +0 −45
  2535. arch/x86/xen/pmu.c +1 −0
  2536. arch/x86/xen/smp.c +3 −3
  2537. arch/x86/xen/smp_pv.c +1 −1
  2538. arch/x86/xen/time.c +1 −0
  2539. arch/x86/xen/xen-ops.h +117 −127
  2540. arch/xtensa/include/asm/Kbuild +1 −0
  2541. arch/xtensa/include/asm/string.h +0 −25
  2542. arch/xtensa/include/asm/uaccess.h +1 −2
  2543. arch/xtensa/kernel/irq.c +1 −1
  2544. block/Kconfig +8 −0
  2545. block/Makefile +3 −0
  2546. block/bdev.c +7 −6
  2547. block/bfq-cgroup.c +56 −28
  2548. block/bfq-iosched.c +2 −6
  2549. block/bio-integrity-auto.c +1 −1
  2550. block/bio-integrity-fs.c +7 −3
  2551. block/bio-integrity.c +4 −5
  2552. block/bio.c +40 −33
  2553. block/blk-cgroup-rwstat.c +9 −6
  2554. block/blk-cgroup.c +137 −159
  2555. block/blk-cgroup.h +13 −8
  2556. block/blk-core.c +73 −38
  2557. block/blk-crypto-fallback.c +8 −10
  2558. block/blk-crypto-profile.c +2 −0
  2559. block/blk-crypto.c +4 −2
  2560. block/blk-iocost.c +188 −140
  2561. block/blk-iolatency.c +20 −9
  2562. block/blk-merge.c +7 −10
  2563. block/blk-mq-debugfs.c +18 −6
  2564. block/blk-mq-tag.c +6 −0
  2565. block/blk-mq.c +14 −63
  2566. block/blk-settings.c +2 −0
  2567. block/blk-sysfs.c +5 −0
  2568. block/blk-throttle.c +80 −18
  2569. block/blk-zoned.c +4 −5
  2570. block/blk.h +32 −0
  2571. block/bsg-lib.c +1 −1
  2572. block/error-injection.c +315 −0
  2573. block/error-injection.h +21 −0
  2574. block/fops.c +1 −26
  2575. block/genhd.c +4 −0
  2576. block/ioctl.c +1 −1
  2577. block/kyber-iosched.c +5 −2
  2578. block/mq-deadline.c +8 −4
  2579. block/partitions/acorn.c +3 −2
  2580. block/partitions/aix.c +9 −0
  2581. block/partitions/core.c +3 −3
  2582. block/partitions/of.c +4 −1
  2583. certs/Kconfig +8 −8
  2584. crypto/Kconfig +57 −81
  2585. crypto/Makefile +9 −10
  2586. crypto/acompress.c +3 −5
  2587. crypto/aead.c +4 −6
  2588. crypto/aegis128-neon-inner.c +1 −3
  2589. crypto/af_alg.c +30 −80
  2590. crypto/ahash.c +3 −75
  2591. crypto/akcipher.c +3 −5
  2592. crypto/algif_aead.c +14 −37
  2593. crypto/algif_hash.c +2 −2
  2594. crypto/algif_rng.c +2 −2
  2595. crypto/algif_skcipher.c +15 −53
  2596. crypto/api.c +10 −66
  2597. crypto/asymmetric_keys/Kconfig +0 −1
  2598. crypto/asymmetric_keys/verify_pefile.c +2 −0
  2599. crypto/asymmetric_keys/x509_loader.c +1 −1
  2600. crypto/async_tx/async_pq.c +5 −4
  2601. crypto/async_tx/async_raid6_recov.c +5 −4
  2602. crypto/authencesn.c +16 −17
  2603. crypto/chacha20poly1305.c +9 −2
  2604. crypto/cipher.c +0 −28
  2605. crypto/cmac.c +0 −16
  2606. crypto/cryptd.c +0 −16
  2607. crypto/crypto_null.c +2 −33
  2608. crypto/crypto_user.c +6 −8
  2609. crypto/df_sp80090a.c +0 −222
  2610. crypto/drbg.c +243 −1530
  2611. crypto/ecc.c +20 −11
  2612. crypto/ecrdsa.c +1 −6
  2613. crypto/hmac.c +0 −31
  2614. crypto/internal.h +0 −10
  2615. crypto/jitterentropy.c +3 −3
  2616. crypto/kpp.c +3 −5
  2617. crypto/krb5/krb5_api.c +49 −7
  2618. crypto/lskcipher.c +4 −6
  2619. crypto/pcbc.c +0 −195
  2620. crypto/pcrypt.c +4 −0
  2621. crypto/rng.c +14 −5
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.clang-format+2−0
@@ -481,6 +481,7 @@ ForEachMacros: · 480 unmodified lines
481481 - 'genradix_for_each'
482482 - 'genradix_for_each_from'
483483 - 'genradix_for_each_reverse'
484+ - 'guard'
484485 - 'hash_for_each'
485486 - 'hash_for_each_possible'
486487 - 'hash_for_each_possible_rcu'
@@ -674,6 +675,7 @@ ForEachMacros: · 187 unmodified lines
674675 - 'rq_list_for_each'
675676 - 'rq_list_for_each_safe'
676677 - 'sample_read_group__for_each'
678+ - 'scoped_guard'
677679 - 'scsi_for_each_prot_sg'
678680 - 'scsi_for_each_sg'
679681 - 'sctp_for_each_hentry'
.gitignore+6−0
@@ -49,6 +49,7 @@ · 48 unmodified lines
4949 *.s
5050 *.so
5151 *.so.dbg
52+*.spdx.json
5253 *.su
5354 *.symtypes
5455 *.tab.[ch]
@@ -57,6 +58,7 @@ · 2 unmodified lines
5758 *.zst
5859 Module.symvers
5960 dtbs-list
61+builtin.order
6062 modules.order
6163
6264 #
@@ -68,6 +70,7 @@ modules.order · 5 unmodified lines
6870 /vmlinux.32
6971 /vmlinux.map
7072 /vmlinux.symvers
73+/vmlinux.thinlto-index
7174 /vmlinux.unstripped
7275 /vmlinux-gdb.py
7376 /vmlinuz
@@ -186,5 +189,8 @@ sphinx_*/ · 112 unmodified lines
186189 # Rust analyzer configuration
187190 /rust-project.json
188191
192+# rustc error message long types
193+*.long-type-*.txt
194+
189195 # bc language scripts (not LLVM bitcode)
190196 !kernel/time/timeconst.bc
.mailmap+25−13
@@ -36,13 +36,14 @@ Alexander Lobakin <alobakin@pm.me> <bloodyreaper@yandex.ru> · 35 unmodified lines
3636 Alexander Mikhalitsyn <alexander@mihalicyn.com> <alexander.mikhalitsyn@virtuozzo.com>
3737 Alexander Mikhalitsyn <alexander@mihalicyn.com> <aleksandr.mikhalitsyn@canonical.com>
3838 Alexander Mikhalitsyn <alexander@mihalicyn.com> <aleksandr.mikhalitsyn@futurfusion.io>
39−Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin.ext@nsn.com>
40−Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@gmx.de>
41−Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@nokia.com>
42−Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@nsn.com>
43−Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@siemens.com>
44−Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@sysgo.com>
45−Alexander Sverdlin <alexander.sverdlin@gmail.com> <subaparts@yandex.ru>
39+Alexander Sverdlin <alex@sverdlin.org> <alexander.sverdlin.ext@nsn.com>
40+Alexander Sverdlin <alex@sverdlin.org> <alexander.sverdlin@gmail.com>
41+Alexander Sverdlin <alex@sverdlin.org> <alexander.sverdlin@gmx.de>
42+Alexander Sverdlin <alex@sverdlin.org> <alexander.sverdlin@nokia.com>
43+Alexander Sverdlin <alex@sverdlin.org> <alexander.sverdlin@nsn.com>
44+Alexander Sverdlin <alex@sverdlin.org> <alexander.sverdlin@sysgo.com>
45+Alexander Sverdlin <alex@sverdlin.org> <asv@kernel.org>
46+Alexander Sverdlin <alex@sverdlin.org> <subaparts@yandex.ru>
4647 Alexandre Belloni <alexandre.belloni@bootlin.com> <alexandre.belloni@free-electrons.com>
4748 Alexandre Ghiti <alex@ghiti.fr> <alexandre.ghiti@canonical.com>
4849 Alexei Avshalom Lazar <quic_ailizaro@quicinc.com> <ailizaro@codeaurora.org>
@@ -117,6 +118,7 @@ Asutosh Das <quic_asutoshd@quicinc.com> <asutoshd@codeaurora.org> · 68 unmodified lines
117118 Atish Patra <atish.patra@linux.dev> <atishp@atishpatra.org>
118119 Atish Patra <atish.patra@linux.dev> <atish.patra@wdc.com>
119120 Avaneesh Kumar Dwivedi <quic_akdwived@quicinc.com> <akdwived@codeaurora.org>
121+Avri Altman <avri.altman@sandisk.com> <avri.altman@wdc.com>
120122 Axel Dyks <xl@xlsigned.net>
121123 Axel Lin <axel.lin@gmail.com>
122124 Balakrishna Godavarthi <quic_bgodavar@quicinc.com> <bgodavar@codeaurora.org>
@@ -126,6 +128,7 @@ Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@linaro.org> · 3 unmodified lines
126128 Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@spreadtrum.com>
127129 Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@unisoc.com>
128130 Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang7@gmail.com>
131+Baoquan He <baoquan.he@linux.dev> <bhe@redhat.com>
129132 Barry Song <baohua@kernel.org> <21cnbao@gmail.com>
130133 Barry Song <baohua@kernel.org> <v-songbaohua@oppo.com>
131134 Barry Song <baohua@kernel.org> <song.bao.hua@hisilicon.com>
@@ -201,9 +204,9 @@ Christophe Ricard <christophe.ricard@gmail.com> · 69 unmodified lines
201204 Christopher Obbard <christopher.obbard@linaro.org> <chris.obbard@collabora.com>
202205 Christoph Hellwig <hch@lst.de>
203206 Christoph Manszewski <c.manszewski@gmail.com> <christoph.manszewski@intel.com>
204−Chuck Lever <chuck.lever@oracle.com> <cel@kernel.org>
205−Chuck Lever <chuck.lever@oracle.com> <cel@netapp.com>
206−Chuck Lever <chuck.lever@oracle.com> <cel@citi.umich.edu>
207+Chuck Lever <cel@kernel.org> <chuck.lever@oracle.com>
208+Chuck Lever <cel@kernel.org> <cel@netapp.com>
209+Chuck Lever <cel@kernel.org> <cel@citi.umich.edu>
207210 Claudiu Beznea <claudiu.beznea@tuxon.dev> <claudiu.beznea@microchip.com>
208211 Colin Ian King <colin.i.king@gmail.com> <colin.king@canonical.com>
209212 Corey Minyard <minyard@acm.org>
@@ -263,8 +266,9 @@ Enric Balletbo i Serra <eballetbo@kernel.org> <enric.balletbo@collabora.com> · 53 unmodified lines
263266 Enric Balletbo i Serra <eballetbo@kernel.org> <eballetbo@iseebcn.com>
264267 Erik Kaneda <erik.kaneda@intel.com> <erik.schmauss@intel.com>
265268 Ethan Carter Edwards <ethan@ethancedwards.com> Ethan Edwards <ethancarteredwards@gmail.com>
266−Eugen Hristev <eugen.hristev@linaro.org> <eugen.hristev@microchip.com>
267−Eugen Hristev <eugen.hristev@linaro.org> <eugen.hristev@collabora.com>
269+Eugen Hristev <ehristev@kernel.org> <eugen.hristev@microchip.com>
270+Eugen Hristev <ehristev@kernel.org> <eugen.hristev@linaro.org>
271+Eugen Hristev <ehristev@kernel.org> <eugen.hristev@collabora.com>
268272 Evgeniy Polyakov <johnpol@2ka.mipt.ru>
269273 Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> <ezequiel@collabora.com>
270274 Faith Ekstrand <faith.ekstrand@collabora.com> <jason@jlekstrand.net>
@@ -339,6 +343,7 @@ Henrik Rydberg <rydberg@bitmath.org> · 68 unmodified lines
339343 Herbert Xu <herbert@gondor.apana.org.au>
340344 Huacai Chen <chenhuacai@kernel.org> <chenhc@lemote.com>
341345 Huacai Chen <chenhuacai@kernel.org> <chenhuacai@loongson.cn>
346+Ian Ray <ian.ray@gehealthcare.com> <ian.ray@ge.com>
342347 Ignat Korchagin <ignat@linux.win> <ignat@cloudflare.com>
343348 Igor Korotin <igor.korotin@linux.dev> <igor.korotin.linux@gmail.com>
344349 Ike Panhc <ikepanhc@gmail.com> <ike.pan@canonical.com>
@@ -368,6 +373,7 @@ Jarkko Sakkinen <jarkko@kernel.org> <jarkko.sakkinen@opinsys.com> · 23 unmodified lines
368373 Jason Gunthorpe <jgg@ziepe.ca> <jgg@mellanox.com>
369374 Jason Gunthorpe <jgg@ziepe.ca> <jgg@nvidia.com>
370375 Jason Gunthorpe <jgg@ziepe.ca> <jgunthorpe@obsidianresearch.com>
376+Jason Wang <jasowangio@gmail.com> <jasowang@redhat.com>
371377 Jason Xing <kerneljasonxing@gmail.com> <kernelxing@tencent.com>
372378 <javier@osg.samsung.com> <javier.martinez@collabora.co.uk>
373379 Javi Merino <javi.merino@kernel.org> <javi.merino@arm.com>
@@ -399,6 +405,7 @@ Jesper Dangaard Brouer <hawk@kernel.org> <hawk@comx.dk> · 25 unmodified lines
399405 Jesper Dangaard Brouer <hawk@kernel.org> <jbrouer@redhat.com>
400406 Jesper Dangaard Brouer <hawk@kernel.org> <jdb@comx.dk>
401407 Jesper Dangaard Brouer <hawk@kernel.org> <netoptimizer@brouer.com>
408+Jesse Brandeburg <jbrandeb@kernel.org> <jesse.brandeburg@intel.com>
402409 Jessica Zhang <jesszhan0024@gmail.com> <jesszhan@codeaurora.org>
403410 Jessica Zhang <jesszhan0024@gmail.com> <quic_jesszhan@quicinc.com>
404411 Jessica Zhang <jesszhan0024@gmail.com> <jessica.zhang@oss.qualcomm.com>
@@ -433,6 +440,7 @@ John Stultz <johnstul@us.ibm.com> · 28 unmodified lines
433440 Jonas Gorski <jonas.gorski@gmail.com> <jogo@openwrt.org>
434441 Jonathan Cameron <jic23@kernel.org> <jonathan.cameron@huawei.com>
435442 Jordan Crouse <jordan@cosmicpenguin.net> <jcrouse@codeaurora.org>
443+Jorge Ramirez-Ortiz <jorge.ramirez@oss.qualcomm.com> <jorge.ramirez-ortiz@linaro.org>
436444 <josh@joshtriplett.org> <josh@freedesktop.org>
437445 <josh@joshtriplett.org> <josh@kernel.org>
438446 <josh@joshtriplett.org> <josht@linux.vnet.ibm.com>
@@ -446,6 +454,7 @@ Juha Yrjola <juha.yrjola@nokia.com> · 7 unmodified lines
446454 Juha Yrjola <juha.yrjola@solidboot.com>
447455 Julien Thierry <julien.thierry.kdev@gmail.com> <julien.thierry@arm.com>
448456 Justin Iurman <justin.iurman@gmail.com> <justin.iurman@uliege.be>
457+Ira Weiny <iweiny@kernel.org> <ira.weiny@intel.com>
449458 Iskren Chernev <me@iskren.info> <iskren.chernev@gmail.com>
450459 Kalle Valo <kvalo@kernel.org> <kvalo@codeaurora.org>
451460 Kalle Valo <kvalo@kernel.org> <quic_kvalo@quicinc.com>
@@ -522,7 +531,8 @@ Luca Ceresoli <luca.ceresoli@bootlin.com> <luca@lucaceresoli.net> · 70 unmodified lines
522531 Luca Weiss <luca@lucaweiss.eu> <luca@z3ntu.xyz>
523532 Lucas De Marchi <demarchi@kernel.org> <lucas.demarchi@intel.com>
524533 Lukasz Luba <lukasz.luba@arm.com> <l.luba@partner.samsung.com>
525−Luo Jie <quic_luoj@quicinc.com> <luoj@codeaurora.org>
534+Luo Jie <jie.luo@oss.qualcomm.com> <luoj@codeaurora.org>
535+Luo Jie <jie.luo@oss.qualcomm.com> <quic_luoj@quicinc.com>
526536 Lance Yang <lance.yang@linux.dev> <ioworker0@gmail.com>
527537 Lance Yang <lance.yang@linux.dev> <mingzhe.yang@ly.com>
528538 Maciej W. Rozycki <macro@mips.com> <macro@imgtec.com>
@@ -584,6 +594,8 @@ Mayuresh Janorkar <mayur@ti.com> · 55 unmodified lines
584594 Md Sadre Alam <quic_mdalam@quicinc.com> <mdalam@codeaurora.org>
585595 Miaoqing Pan <quic_miaoqing@quicinc.com> <miaoqing@codeaurora.org>
586596 Michael Buesch <m@bues.ch>
597+Michal Grzeschik <mgr@kernel.org> <m.grzeschik@pengutronix.de>
598+Michal Grzeschik <mgr@kernel.org> <mgr@pengutronix.de>
587599 Michael Riesch <michael.riesch@collabora.com> <michael.riesch@wolfvision.net>
588600 Michal Simek <michal.simek@amd.com> <michal.simek@xilinx.com>
589601 Michel Dänzer <michel@tungstengraphics.com>
CREDITS+19−0
@@ -197,6 +197,9 @@ S: Hauptstrasse 19 · 196 unmodified lines
197197 S: 79837 St. Blasien
198198 S: Germany
199199
200+N: Ferenc Bakonyi
201+D: Hercules graphics adapter framebuffer driver
202+
200203 N: Krishna Balasubramanian
201204 E: balasub@cis.ohio-state.edu
202205 D: Wrote SYS V IPC (part of standard kernel since 0.99.10)
@@ -2241,6 +2244,7 @@ S: Canada · 2038 unmodified lines
22412244 N: Krzysztof Kozlowski
22422245 E: krzk@kernel.org
22432246 D: NFC network subsystem and drivers maintainer
2247+D: Samsung S2M/S5M Multifunction PMIC device drivers for Exynos platforms
22442248
22452249 N: Christian Krafft
22462250 D: PowerPC Cell support
@@ -2804,6 +2808,7 @@ D: Some of PAS 16 mixer & PCM support, inet6-apps · 557 unmodified lines
28042808
28052809 N: William (Bill) Metzenthen
28062810 E: billm@suburbia.net
2811+E: billm@melbpc.org.au
28072812 D: Author of the FPU emulator.
28082813 D: Minor kernel hacker for other lost causes (Hercules mono, etc).
28092814 S: 22 Parker Street
@@ -3368,6 +3373,10 @@ N: Anil Ravindranath · 558 unmodified lines
33683373 E: anil_ravindranath@pmc-sierra.com
33693374 D: PMC-Sierra MaxRAID driver
33703375
3376+N: Dwaipayan Ray
3377+E: dwaipayanray1@gmail.com
3378+D: checkpatch improvements
3379+
33713380 N: Eric S. Raymond
33723381 E: esr@thyrsus.com
33733382 W: http://www.tuxedo.org/~esr/
@@ -3668,7 +3677,17 @@ D: Macintosh IDE Driver · 294 unmodified lines
36683677
36693678 N: Peter De Schrijver
36703679 E: stud11@cc4.kuleuven.ac.be
3680+E: p2@mind.be
3681+E: peter.de-schrijver@nokia.com
3682+E: pdeschrijver@nvidia.com
3683+E: p2@psychaos.be
3684+D: Apollo Domain workstations
3685+D: Ariadne and Hydra Amiga Ethernet drivers
3686+D: IBM PS/2, Microchannel, and Token Ring support
36713687 D: Mitsumi CD-ROM driver patches March version
3688+D: TWL4030 power management and audio codec driver
3689+D: OMAP power management
3690+D: NVIDIA Tegra clock and BPMP drivers, among many other things
36723691 S: Molenbaan 29
36733692 S: B2240 Zandhoven
36743693 S: Belgium
Documentation/.renames.txt+1−0
@@ -786,6 +786,7 @@ networking/altera_tse networking/device_drivers/ethernet/altera/altera_tse · 785 unmodified lines
786786 networking/bpf_flow_dissector bpf/prog_flow_dissector
787787 networking/cxacru networking/device_drivers/atm/cxacru
788788 networking/defza networking/device_drivers/fddi/defza
789+networking/device_drivers/3com/3c509 networking/device_drivers/ethernet/3com/3c509
789790 networking/device_drivers/3com/vortex networking/device_drivers/ethernet/3com/vortex
790791 networking/device_drivers/amazon/ena networking/device_drivers/ethernet/amazon/ena
791792 networking/device_drivers/aquantia/atlantic networking/device_drivers/ethernet/aquantia/atlantic
Documentation/ABI/obsolete/sysfs-driver-ivpu+30−0
@@ -0,0 +1,30 @@
1+What: /sys/bus/pci/drivers/intel_vpu/.../sched_mode
2+Date: October 2024
3+KernelVersion: 6.12
4+Contact: dri-devel@lists.freedesktop.org
5+Description: Current NPU scheduling mode. Returns one of the following strings:
6+ - "HW" - Hardware Scheduler mode
7+ - "OS" - Operating System Scheduler mode
8+ Read-only.
9+ Deprecated since the "OS" scheduling mode is not usable
10+ and will be removed from future versions of the driver.
11+ Will be removed in 2027
12+
13+What: /sys/bus/pci/drivers/intel_vpu/.../npu_max_frequency_mhz
14+Date: April 2025
15+KernelVersion: 6.15
16+Contact: dri-devel@lists.freedesktop.org
17+Description: Legacy alias for /sys/bus/pci/drivers/intel_vpu/.../freq/hw_max_freq.
18+ Shows maximum frequency in MHz of the NPU's data processing unit.
19+ Read-only.
20+ Will be removed in 2027
21+
22+What: /sys/bus/pci/drivers/intel_vpu/.../npu_current_frequency_mhz
23+Date: April 2025
24+KernelVersion: 6.15
25+Contact: dri-devel@lists.freedesktop.org
26+Description: Legacy alias for /sys/bus/pci/drivers/intel_vpu/.../freq/current_freq.
27+ Shows current frequency in MHz of the NPU's data processing unit.
28+ The value is read only when the device is active; otherwise it returns 0.
29+ Read-only.
30+ Will be removed in 2027
Documentation/ABI/stable/sysfs-class-infiniband+4−4
@@ -148,17 +148,17 @@ Description: · 147 unmodified lines
148148 **Data info**:
149149
150150 port_xmit_data: (RO) Total number of data octets, divided by 4
151− (lanes), transmitted on all VLs. This is 64 bit counter
151+ (lanes), transmitted on all VLs. This is a 64-bit counter
152152
153153 port_rcv_data: (RO) Total number of data octets, divided by 4
154− (lanes), received on all VLs. This is 64 bit counter.
154+ (lanes), received on all VLs. This is a 64-bit counter.
155155
156156 port_xmit_packets: (RO) Total number of packets transmitted on
157157 all VLs from this port. This may include packets with errors.
158− This is 64 bit counter.
158+ This is a 64-bit counter.
159159
160160 port_rcv_packets: (RO) Total number of packets (this may include
161− packets containing Errors. This is 64 bit counter.
161+ packets containing Errors). This is a 64-bit counter.
162162
163163 link_downed: (RO) Total number of times the Port Training state
164164 machine has failed the link error recovery process and downed
Documentation/ABI/testing/configfs-thunderbolt_stream+83−0
@@ -0,0 +1,83 @@
1+What: /sys/kernel/config/thunderbolt/stream/<xdomain>.<service>
2+Date: Sep 2026
3+KernelVersion: v7.2
4+Contact: Mika Westerberg <mika.westerberg@linux.intel.com>
5+Description:
6+ Configuration group for a stream Thunderbolt/USB4
7+ service. It is possible to create groups even if there
8+ is no connection yet to the other host. Once a
9+ connection established and there is stream service on
10+ the remote side that matches, this configuration is
11+ applied to it.
12+
13+ To find the service name you can run tblist from tbtools [1]:
14+
15+ # tblist -A
16+ ...
17+ Domain 0 Route 3 Index 0: stream
18+
19+ [1] https://github.com/intel/tbtools
20+
21+What: /sys/kernel/config/thunderbolt/stream/<xdomain>.<service>/$name
22+Date: Sep 2026
23+KernelVersion: v7.2
24+Contact: Mika Westerberg <mika.westerberg@linux.intel.com>
25+Description:
26+ Creates new stream with $name and fills it with the
27+ default values. If there is an advertised remote stream
28+ with the same name, uses its values as the default.
29+
30+What: /sys/kernel/config/thunderbolt/stream/<xdomain>.<service>/$name/index
31+Date: Sep 2026
32+KernelVersion: v7.2
33+Contact: Mika Westerberg <mika.westerberg@linux.intel.com>
34+Description:
35+ This matches the X in /dev/tbstreamX and allows userspace
36+ to map the configfs directory to the corresponding character
37+ device.
38+
39+What: /sys/kernel/config/thunderbolt/stream/<xdomain>.<service>/$name/in_hopid
40+Date: Sep 2026
41+KernelVersion: v7.2
42+Contact: Mika Westerberg <mika.westerberg@linux.intel.com>
43+Description:
44+ In HopID used with the read path of the tunnel. Available HopIDs
45+ for tunneling start from 8. You can pass also -1 for automatic
46+ allocation. The allocated value can be read here. Writing 0 will
47+ de-allocate if the stream is not in use.
48+
49+ To figure out the maximum HopID you can run tbget from
50+ tbtools for the lane adapter. For example below we check
51+ for lane adapter number 1 (first USB4 port):
52+
53+ # tbget -r 0 -a 1 -D ADP_CS_5.Max\ Input\ HopID
54+ 19
55+
56+ This allows to use anything between 8 and 19 inclusive.
57+
58+What: /sys/kernel/config/thunderbolt/stream/<xdomain>.<service>/$name/out_hopid
59+Date: Sep 2026
60+KernelVersion: v7.2
61+Contact: Mika Westerberg <mika.westerberg@linux.intel.com>
62+Description:
63+ Out HopID used with the write path of the tunnel. Available HopIDs
64+ for tunneling start from 8. You can pass also -1 for automatic
65+ allocation. The allocated value can be read here. Writing 0 will
66+ de-allocate if the stream is not in use. See @in_hopid
67+ for how to figure out the maximum HopID.
68+
69+What: /sys/kernel/config/thunderbolt/stream/<xdomain>.<service>/$name/ring_size
70+Date: Sep 2026
71+KernelVersion: v7.2
72+Contact: Mika Westerberg <mika.westerberg@linux.intel.com>
73+Description:
74+ Size of the TX/RX rings. Can be adjusted between 32 and
75+ 4096. The default is 256.
76+
77+What: /sys/kernel/config/thunderbolt/stream/<xdomain>.<service>/$name/throttling
78+Date: Sep 2026
79+KernelVersion: v7.2
80+Contact: Mika Westerberg <mika.westerberg@linux.intel.com>
81+Description:
82+ Interrupt throttling rate in ns. Lower values can give
83+ better latency. The default is 8192 ns.
Documentation/ABI/testing/debugfs-vfio+26−0
@@ -29,3 +29,29 @@ Date: Oct 2025 · 28 unmodified lines
2929 KernelVersion: 6.18
3030 Contact: Cédric Le Goater <clg@redhat.com>
3131 Description: Read the migration features of the vfio device.
32+
33+What: /sys/kernel/debug/vfio/<device>/pci
34+Date: June 2026
35+KernelVersion: 7.2
36+Contact: Alex Williamson <alex.williamson@nvidia.com>
37+Description: This debugfs file directory is used for debugging
38+ VFIO PCI devices.
39+
40+What: /sys/kernel/debug/vfio/<device>/pci/nointxmask
41+Date: June 2026
42+KernelVersion: 7.2
43+Contact: Alex Williamson <alex.williamson@nvidia.com>
44+Description: Read the nointxmask policy latched for this device. This
45+ policy governs whether the device may use PCI 2.3 style
46+ INTx masking when supported, reporting a value of "N", or
47+ requires APIC level INTx masking, reporting a value of "Y".
48+
49+What: /sys/kernel/debug/vfio/<device>/pci/disable_idle_d3
50+Date: June 2026
51+KernelVersion: 7.2
52+Contact: Alex Williamson <alex.williamson@nvidia.com>
53+Description: Read the disable_idle_d3 policy latched for this device. This
54+ policy governs whether the device PM runtime usage count is
55+ kept elevated while the device is bound to the driver and
56+ unused, reporting a value of "Y", or decremented to allow the
57+ device to enter a low power state, reporting a value of "N".
Documentation/ABI/testing/sysfs-bus-iio+53−15
@@ -764,10 +764,13 @@ Contact: linux-iio@vger.kernel.org · 763 unmodified lines
764764 Description:
765765 Specifies the output powerdown mode.
766766 DAC output stage is disconnected from the amplifier and
767+ 500ohm_to_gnd: connected to ground via a 500Ohm resistor,
767768 1kohm_to_gnd: connected to ground via an 1kOhm resistor,
768769 2.5kohm_to_gnd: connected to ground via a 2.5kOhm resistor,
770+ 3.85kohm_to_gnd: connected to ground via a 3.85kOhm resistor,
769771 6kohm_to_gnd: connected to ground via a 6kOhm resistor,
770772 7.7kohm_to_gnd: connected to ground via a 7.7kOhm resistor,
773+ 16kohm_to_gnd: connected to ground via a 16kOhm resistor,
771774 20kohm_to_gnd: connected to ground via a 20kOhm resistor,
772775 32kohm_to_gnd: connected to ground via a 32kOhm resistor,
773776 42kohm_to_gnd: connected to ground via a 42kOhm resistor,
@@ -1510,21 +1513,24 @@ Contact: linux-iio@vger.kernel.org · 736 unmodified lines
15101513 Description:
15111514 Description of the scan element data storage within the buffer
15121515 and hence the form in which it is read from user-space.
1513− Form is [be|le]:[s|u]bits/storagebits[>>shift].
1514− be or le specifies big or little endian. s or u specifies if
1515− signed (2's complement) or unsigned. bits is the number of bits
1516− of data and storagebits is the space (after padding) that it
1517− occupies in the buffer. shift if specified, is the shift that
1518− needs to be applied prior to masking out unused bits. Some
1519− devices put their data in the middle of the transferred elements
1520− with additional information on both sides. Note that some
1521− devices will have additional information in the unused bits
1522− so to get a clean value, the bits value must be used to mask
1523− the buffer output value appropriately. The storagebits value
1524− also specifies the data alignment. So s48/64>>2 will be a
1525− signed 48 bit integer stored in a 64 bit location aligned to
1526− a 64 bit boundary. To obtain the clean value, shift right 2
1527− and apply a mask to zero the top 16 bits of the result.
1516+ Form is [be|le]:[f|s|u]bits/storagebits[>>shift].
1517+ be or le specifies big or little endian. f means floating-point
1518+ (IEEE 754 binary format), s means signed (2's complement), u means
1519+ unsigned. bits is the number of bits of data and storagebits is the
1520+ space (after padding) that it occupies in the buffer; when using a
1521+ floating-point format, bits must be one of the width values defined
1522+ in the IEEE 754 standard for binary interchange formats (e.g. 16
1523+ indicates the binary16 format for half-precision numbers). shift,
1524+ if specified, is the shift that needs to be applied prior to
1525+ masking out unused bits. Some devices put their data in the middle
1526+ of the transferred elements with additional information on both
1527+ sides. Note that some devices will have additional information in
1528+ the unused bits, so to get a clean value the bits value must be
1529+ used to mask the buffer output value appropriately. The storagebits
1530+ value also specifies the data alignment. So s48/64>>2 will be a
1531+ signed 48 bit integer stored in a 64 bit location aligned to a 64
1532+ bit boundary. To obtain the clean value, shift right 2 and apply a
1533+ mask to zero the top 16 bits of the result.
15281534 For other storage combinations this attribute will be extended
15291535 appropriately.
15301536
@@ -1752,6 +1758,21 @@ Description: · 221 unmodified lines
17521758 measurement from channel Y. Units after application of scale and
17531759 offset are milliamps.
17541760
1761+What: /sys/bus/iio/devices/iio:deviceX/in_rot_quaternionaxis_raw
1762+KernelVersion: 7.1
1763+Contact: linux-iio@vger.kernel.org
1764+Description:
1765+ Raw value of {x, y, z} components of the quaternion vector. These
1766+ components represent the axis about which a rotation occurs, and are
1767+ subject to the following constraints:
1768+
1769+ - the quaternion vector is normalized, i.e. w^2 + x^2 + y^2 + z^2 = 1
1770+ - the rotation angle is within the [-pi, pi] range, i.e. the w
1771+ component (which represents the amount of rotation) is non-negative
1772+
1773+ These constraints allow the w value to be calculated from the other
1774+ components: w = sqrt(1 - (x^2 + y^2 + z^2)).
1775+
17551776 What: /sys/.../iio:deviceX/in_energy_en
17561777 What: /sys/.../iio:deviceX/in_distance_en
17571778 What: /sys/.../iio:deviceX/in_velocity_sqrt(x^2+y^2+z^2)_en
@@ -1959,6 +1980,23 @@ Description: · 201 unmodified lines
19591980 Raw (unscaled no offset etc.) resistance reading.
19601981 Units after application of scale and offset are ohms.
19611982
1983+What: /sys/bus/iio/devices/iio:deviceX/in_coverageY_raw
1984+KernelVersion: 7.2
1985+Contact: linux-iio@vger.kernel.org
1986+Description:
1987+ Raw (unscaled no offset etc.) coverage reading. Used for sensors
1988+ that report fractional coverage as a percentage, such as leak
1989+ detectors where the value represents what portion of the sensing
1990+ element is wetted. Units after application of scale and offset are
1991+ percent.
1992+
1993+What: /sys/bus/iio/devices/iio:deviceX/in_coverageY_scale
1994+KernelVersion: 7.2
1995+Contact: linux-iio@vger.kernel.org
1996+Description:
1997+ Scale to be applied to in_coverageY_raw to obtain coverage
1998+ in percent.
1999+
19622000 What: /sys/bus/iio/devices/iio:deviceX/heater_enable
19632001 KernelVersion: 4.1.0
19642002 Contact: linux-iio@vger.kernel.org
Documentation/ABI/testing/sysfs-bus-pci-drivers-xhci_hcd+1−1
@@ -22,7 +22,7 @@ Description: · 21 unmodified lines
2222
2323 Reading this attribute gives the state of the DbC. It
2424 can be one of the following states: disabled, enabled,
25− initialized, connected, configured and stalled.
25+ initialized, connected or configured.
2626
2727 What: /sys/bus/pci/drivers/xhci_hcd/.../dbc_idVendor
2828 Date: March 2023
Documentation/ABI/testing/sysfs-class-hwmon+14−0
@@ -27,6 +27,20 @@ Description: · 26 unmodified lines
2727 Some devices have a variable update rate or interval.
2828 This attribute can be used to change it to the desired value.
2929
30+What: /sys/class/hwmon/hwmonX/update_interval_us
31+Description:
32+ The interval at which the chip will update readings,
33+ expressed in microseconds.
34+ Unit: microsecond
35+
36+ RW
37+
38+ Some devices have a variable update rate or interval and
39+ require finer-than-millisecond control.
40+ This attribute can be used to change it to the desired value.
41+ Drivers implementing this attribute should also implement
42+ update_interval for millisecond-based userspace interfaces.
43+
3044 What: /sys/class/hwmon/hwmonX/inY_min
3145 Description:
3246 Voltage min value.
Documentation/ABI/testing/sysfs-class-ieee80211-rtw89+24−0
@@ -0,0 +1,24 @@
1+What: /sys/class/ieee80211/phyX/rtw89_usb/serial_number
2+Date: May 2026
3+Contact: Johnson Tsai <wenjie.tsai@realtek.com>, linux-wireless@vger.kernel.org
4+Description: (Read) Serial number burned into EFUSE of the RTL8852CU-based
5+ USB Wi-Fi adapter. Only present on devices that set the
6+ RTW89_QUIRK_HW_INFO_SYSFS quirk (currently VID 0x28de /
7+ PID 0x2432).
8+
9+ Format: %10phN (5 raw bytes printed as 10 lowercase hex
10+ digits, no separators).
11+
12+ Example: 3642000123
13+
14+What: /sys/class/ieee80211/phyX/rtw89_usb/uuid
15+Date: May 2026
16+Contact: Johnson Tsai <wenjie.tsai@realtek.com>, linux-wireless@vger.kernel.org
17+Description: (Read) UUID burned into EFUSE of the RTL8852CU-based USB Wi-Fi
18+ adapter. Only present on devices that set the
19+ RTW89_QUIRK_HW_INFO_SYSFS quirk (currently VID 0x28de /
20+ PID 0x2432).
21+
22+ Format: %pUb (RFC 4122 UUID in lowercase with hyphens).
23+
24+ Example: aaec2b7c-0a55-4727-8de0-b30febccbbaa
Documentation/ABI/testing/sysfs-class-led+2−2
@@ -22,8 +22,8 @@ Description: · 21 unmodified lines
2222 For additional details please refer to
2323 Documentation/leds/leds-class-multicolor.rst.
2424
25− The value is between 0 and
26− /sys/class/leds/<led>/max_brightness.
25+ The value is between 0 and /sys/class/leds/<led>/max_brightness
26+ and is represented by as a decimal.
2727
2828 Writing 0 to this file clears active trigger.
2929
Documentation/ABI/testing/sysfs-class-led-multicolor+16−3
@@ -16,9 +16,22 @@ Date: March 2020 · 15 unmodified lines
1616 KernelVersion: 5.9
1717 Contact: Dan Murphy <dmurphy@ti.com>
1818 Description: read/write
19− This file contains array of integers. Order of components is
20− described by the multi_index array. The maximum intensity should
21− not exceed /sys/class/leds/<led>/max_brightness.
19+ This file contains an array of integers. The order of components
20+ is described by the multi_index array. The maximum intensity value
21+ supported by each color component is described by the multi_max_intensity
22+ file. Writing intensity values larger than the maximum value of a
23+ given color component will result in those values being clamped.
24+
25+ For additional details please refer to
26+ Documentation/leds/leds-class-multicolor.rst.
27+
28+What: /sys/class/leds/<led>/multi_max_intensity
29+Date: May 2026
30+KernelVersion: 7.2
31+Contact: Armin Wolf <W_Armin@gmx.de>
32+Description: read
33+ This file contains an array of integers describing the maximum
34+ intensity value for each intensity component.
2235
2336 For additional details please refer to
2437 Documentation/leds/leds-class-multicolor.rst.
Documentation/ABI/testing/sysfs-class-power-bd71828+12−0
@@ -0,0 +1,12 @@
1+What: /sys/class/power_supply/bd71828_ac/auto_dcin_limit
2+Description:
3+ Enable/Disable automatic management of input current limit
4+ (ILIM_DCIN_EN bit).
5+
6+ Possible values are:
7+
8+ ============ ===========================================
9+ 1 automatic adjustment of input current limit
10+ 0 no adjustment of input current limit. This
11+ helps for more unusual power sources like
12+ solar modules.
Documentation/ABI/testing/sysfs-class-reboot-mode-reboot_modes+8−5
@@ -2,33 +2,36 @@ What: /sys/class/reboot-mode/<driver>/reboot_modes · 1 unmodified line
22 Date: March 2026(TBD)
33 KernelVersion: TBD
44 Contact: linux-pm@vger.kernel.org
5− Description:
5+Description:
66 This interface exposes the reboot-mode arguments
77 registered with the reboot-mode framework. It is
88 a read-only interface and provides a space
99 separated list of reboot-mode arguments supported
1010 on the current platform.
1111 Example:
12+
1213 recovery fastboot bootloader
1314
1415 The exact sysfs path may vary depending on the
1516 name of the driver that registers the arguments.
16− Example:
17+ Example::
18+
1719 /sys/class/reboot-mode/nvmem-reboot-mode/reboot_modes
1820 /sys/class/reboot-mode/syscon-reboot-mode/reboot_modes
1921 /sys/class/reboot-mode/qcom-pon/reboot_modes
2022
2123 The supported arguments can be used by userspace to
2224 invoke device reset using the standard reboot() system
23− call interface, with the "argument" as string to "*arg"
24− parameter along with LINUX_REBOOT_CMD_RESTART2.
25+ call interface, with the "argument" as string to ``*arg``
26+ parameter along with ``LINUX_REBOOT_CMD_RESTART2``.
2527
2628 A driver can expose the supported arguments by
2729 registering them with the reboot-mode framework
2830 using the property names that follow the
2931 mode-<argument> format.
3032 Example:
31− mode-bootloader, mode-recovery.
33+
34+ mode-bootloader, mode-recovery
3235
3336 This attribute is useful for scripts or initramfs
3437 logic that need to programmatically determine
Documentation/ABI/testing/sysfs-devices-faux-tdx-host+26−0
@@ -0,0 +1,26 @@
1+What: /sys/devices/faux/tdx_host/version
2+Contact: linux-coco@lists.linux.dev
3+Description: (RO) Report the version of the loaded TDX module.
4+ Formatted as "major.minor.update". Used by TDX module
5+ update tooling. Example: "1.2.03".
6+
7+What: /sys/devices/faux/tdx_host/seamldr_version
8+Contact: linux-coco@lists.linux.dev
9+Description: (RO) Report the version of the loaded P-SEAMLDR.
10+ Formatted as a TDX module version. Used by TDX module
11+ update tooling.
12+
13+What: /sys/devices/faux/tdx_host/num_remaining_updates
14+Contact: linux-coco@lists.linux.dev
15+Description: (RO) Report the number of remaining updates. TDX maintains a
16+ log about each TDX module that has been loaded. This log has
17+ a finite size, which limits the number of TDX module updates
18+ that can be performed.
19+
20+ After each successful update, the number reduces by one. Once it
21+ reaches zero, further updates will fail until next reboot. The
22+ number is always zero if the P-SEAMLDR doesn't support updates.
23+
24+ See Intel Trust Domain Extensions - SEAM Loader (SEAMLDR)
25+ Interface Specification, Chapter "SEAMLDR_INFO" and Chapter
26+ "SEAMLDR.INSTALL" for more information.
Documentation/ABI/testing/sysfs-driver-dell-dw5826e-reset+9−0
@@ -0,0 +1,9 @@
1+What: /sys/bus/platform/devices/<PALC0001 device>/wwan_reset
2+Date: April 2026
3+KernelVersion: 7.2
4+Contact: Jackbb Wu <jackbb.wu@compal.com>
5+Description:
6+ Writing to this file triggers a Platform Level Device Reset
7+ (PLDR) of the Dell DW5826e WWAN module via an ACPI _DSM
8+ method. This can be used to recover the modem when it is in
9+ a frozen state and unable to respond to USB commands.
Documentation/ABI/testing/sysfs-driver-ivpu+65−0
@@ -0,0 +1,65 @@
1+What: /sys/bus/pci/drivers/intel_vpu/.../npu_busy_time_us
2+Date: May 2024
3+KernelVersion: 6.11
4+Contact: dri-devel@lists.freedesktop.org
5+Description: Time in microseconds that the device spent executing jobs. The time is
6+ counted when and only when there are jobs submitted to firmware. This time
7+ can be used to measure the utilization of NPU, either by calculating the
8+ difference between two timepoints or monitoring utilization percentage by
9+ reading periodically. Recommended read period is 1 second to avoid impact
10+ on job submission performance. Read-only.
11+
12+What: /sys/bus/pci/drivers/intel_vpu/.../npu_memory_utilization
13+Date: Jan 2025
14+KernelVersion: 6.15
15+Contact: dri-devel@lists.freedesktop.org
16+Description: Current NPU memory utilization in bytes. Reports the total size of all
17+ resident buffer objects allocated for NPU use. Read-only.
18+
19+What: /sys/bus/pci/drivers/intel_vpu/.../freq/hw_min_freq
20+Date: April 2026
21+KernelVersion: 7.2
22+Contact: dri-devel@lists.freedesktop.org
23+Description: Minimum frequency in MHz supported by the NPU hardware. This is a
24+ hardware capability and cannot be changed. Read-only.
25+
26+What: /sys/bus/pci/drivers/intel_vpu/.../freq/hw_efficient_freq
27+Date: April 2026
28+KernelVersion: 7.2
29+Contact: dri-devel@lists.freedesktop.org
30+Description: Most efficient operating frequency in MHz for the NPU. This represents
31+ the frequency at which the NPU operates most efficiently in terms of power
32+ and performance. Read-only.
33+
34+What: /sys/bus/pci/drivers/intel_vpu/.../freq/hw_max_freq
35+Date: April 2026
36+KernelVersion: 7.2
37+Contact: dri-devel@lists.freedesktop.org
38+Description: Maximum frequency in MHz supported by the NPU hardware. This is a
39+ hardware capability and cannot be changed. Read-only.
40+
41+What: /sys/bus/pci/drivers/intel_vpu/.../freq/current_freq
42+Date: April 2026
43+KernelVersion: 7.2
44+Contact: dri-devel@lists.freedesktop.org
45+Description: Current operating frequency in MHz of the NPU. The value is valid only
46+ when the device is active; returns 0 when idle. The actual frequency may
47+ be lower than the requested range due to power or thermal constraints.
48+ Read-only.
49+
50+What: /sys/bus/pci/drivers/intel_vpu/.../freq/set_min_freq
51+Date: April 2026
52+KernelVersion: 7.2
53+Contact: dri-devel@lists.freedesktop.org
54+Description: Configured minimum operating frequency in MHz (50XX devices and newer).
55+ Values written are clamped to hardware limits (hw_min_freq to hw_max_freq).
56+ If set_min_freq exceeds set_max_freq, the driver clamps set_min_freq to
57+ set_max_freq when selecting the operating frequency. Read-write.
58+
59+What: /sys/bus/pci/drivers/intel_vpu/.../freq/set_max_freq
60+Date: April 2026
61+KernelVersion: 7.2
62+Contact: dri-devel@lists.freedesktop.org
63+Description: Configured maximum operating frequency in MHz (50XX devices and newer).
64+ Values written are clamped to hardware limits (hw_min_freq to hw_max_freq).
65+ Read-write.
Documentation/ABI/testing/sysfs-driver-qat_kpt+97−0
@@ -0,0 +1,97 @@
1+What: /sys/bus/pci/devices/<BDF>/qat_kpt/
2+Date: August 2026
3+KernelVersion: 7.2
4+Contact: qat-linux@intel.com
5+Description:
6+ Directory containing attributes related to the QAT Key Protection
7+ Technology (KPT) feature. KPT allows cryptographic keys to be used
8+ by the accelerator without being exposed in plaintext to the host.
9+
10+What: /sys/bus/pci/devices/<BDF>/qat_kpt/enable
11+Date: August 2026
12+KernelVersion: 7.2
13+Contact: qat-linux@intel.com
14+Description:
15+ (RW) Enables or disables Key Protection Technology (KPT).
16+
17+ Write 1 to enable KPT, or 0 to disable it.
18+
19+ Example usage::
20+
21+ # cat /sys/bus/pci/devices/<BDF>/qat_kpt/enable
22+ 0
23+ # echo 1 > /sys/bus/pci/devices/<BDF>/qat_kpt/enable
24+
25+ This attribute is only available on devices that support KPT.
26+
27+What: /sys/bus/pci/devices/<BDF>/qat_kpt/swk_cnt_per_fn
28+Date: August 2026
29+KernelVersion: 7.2
30+Contact: qat-linux@intel.com
31+Description:
32+ (RW) Configures the maximum number of KPT symmetric wrapping keys
33+ (SWKs) that a Virtual Function (VF) may be associated with.
34+
35+ Valid values range from 0 to 128. A value of 0 indicates no limit.
36+
37+ Example usage::
38+
39+ # cat /sys/bus/pci/devices/<BDF>/qat_kpt/swk_cnt_per_fn
40+ 128
41+ # echo 128 > /sys/bus/pci/devices/<BDF>/qat_kpt/swk_cnt_per_fn
42+
43+ This attribute is only available on devices that support KPT.
44+
45+What: /sys/bus/pci/devices/<BDF>/qat_kpt/swk_cnt_per_pasid
46+Date: August 2026
47+KernelVersion: 7.2
48+Contact: qat-linux@intel.com
49+Description:
50+ (RW) Configures the maximum number of KPT symmetric wrapping keys
51+ (SWKs) per Process Address Space ID (PASID).
52+
53+ Valid values range from 0 to 128. A value of 0 indicates no limit.
54+
55+ Example usage::
56+
57+ # cat /sys/bus/pci/devices/<BDF>/qat_kpt/swk_cnt_per_pasid
58+ 128
59+ # echo 128 > /sys/bus/pci/devices/<BDF>/qat_kpt/swk_cnt_per_pasid
60+
61+ This attribute is only available on devices that support KPT.
62+
63+What: /sys/bus/pci/devices/<BDF>/qat_kpt/swk_max_ttl
64+Date: August 2026
65+KernelVersion: 7.2
66+Contact: qat-linux@intel.com
67+Description:
68+ (RW) Configures the maximum Time To Live (TTL) for KPT symmetric
69+ wrapping keys (SWK).
70+
71+ Valid values range from 0 to 31536000 seconds. A value of 0
72+ indicates that the SWK TTL is unlimited.
73+
74+ Example usage::
75+
76+ # cat /sys/bus/pci/devices/<BDF>/qat_kpt/swk_max_ttl
77+ 1000
78+ # echo 1000 > /sys/bus/pci/devices/<BDF>/qat_kpt/swk_max_ttl
79+
80+ This attribute is only available on devices that support KPT.
81+
82+What: /sys/bus/pci/devices/<BDF>/qat_kpt/swk_shared
83+Date: August 2026
84+KernelVersion: 7.2
85+Contact: qat-linux@intel.com
86+Description:
87+ (RW) Controls shared mode for KPT symmetric wrapping keys (SWK).
88+
89+ Write 1 to enable shared mode, or 0 to disable it (non-shared mode).
90+
91+ Example usage::
92+
93+ # cat /sys/bus/pci/devices/<BDF>/qat_kpt/swk_shared
94+ 0
95+ # echo 1 > /sys/bus/pci/devices/<BDF>/qat_kpt/swk_shared
96+
97+ This attribute is only available on devices that support KPT.
Documentation/ABI/testing/sysfs-driver-qat_rl+1−1
@@ -209,7 +209,7 @@ Date: January 2024 · 208 unmodified lines
209209 KernelVersion: 6.7
210210 Contact: qat-linux@intel.com
211211 Description:
212− (RW) This file will return the remaining capability for a
212+ (RW) This file will return the remaining capacity for a
213213 particular service/sla. This is the remaining value that a new
214214 SLA can be set to or a current SLA can be increased with.
215215
Documentation/ABI/testing/sysfs-driver-tegra-fuse+1−1
@@ -1,6 +1,6 @@
11 What: /sys/devices/*/<our-device>/fuse
22 Date: February 2014
3−Contact: Peter De Schrijver <pdeschrijver@nvidia.com>
3+Contact: Thierry Reding <thierry.reding@kernel.org>
44 Description: read-only access to the efuses on Tegra20, Tegra30, Tegra114
55 and Tegra124 SoC's from NVIDIA. The efuses contain write once
66 data programmed at the factory. The data is laid out in 32bit
Documentation/ABI/testing/sysfs-fs-f2fs+3−2
@@ -270,7 +270,8 @@ Description: Shows all enabled kernel features. · 269 unmodified lines
270270 inode_checksum, flexible_inline_xattr, quota_ino,
271271 inode_crtime, lost_found, verity, sb_checksum,
272272 casefold, readonly, compression, test_dummy_encryption_v2,
273− atomic_write, pin_file, encrypted_casefold, linear_lookup.
273+ atomic_write, pin_file, encrypted_casefold, linear_lookup,
274+ fserror.
274275
275276 What: /sys/fs/f2fs/<disk>/inject_rate
276277 Date: May 2016
@@ -1000,4 +1001,4 @@ Contact: "Chao Yu" <chao@kernel.org> · 723 unmodified lines
10001001 Description: It can be used to tune priority of f2fs critical task, e.g. f2fs_ckpt, f2fs_gc
10011002 threads, limitation as below:
10021003 - it requires user has CAP_SYS_NICE capability.
1003− - the range is [100, 139], by default the value is 100.
1004+ - the range is [100, 139], by default the value is 120.
Documentation/ABI/testing/sysfs-kernel-mm-damon+53−28
@@ -84,6 +84,13 @@ Description: Writing an integer to this file sets the 'address unit' · 83 unmodified lines
8484 parameter of the given operations set of the context. Reading
8585 the file returns the last-written 'address unit' value.
8686
87+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/pause
88+Date: Mar 2026
89+Contact: SeongJae Park <sj@kernel.org>
90+Description: Writing a boolean keyword to this file sets the 'pause' request
91+ parameter for the context. Reading the file returns the
92+ last-written 'pause' value.
93+
8794 What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/monitoring_attrs/intervals/sample_us
8895 Date: Mar 2022
8996 Contact: SeongJae Park <sj@kernel.org>
@@ -322,6 +329,18 @@ Contact: SeongJae Park <sj@kernel.org> · 232 unmodified lines
322329 Description: Writing to and reading from this file sets and gets the
323330 goal-based effective quota auto-tuning algorithm to use.
324331
332+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/quotas/fail_charge_num
333+Date: Mar 2026
334+Contact: SeongJae Park <sj@kernel.org>
335+Description: Writing to and reading from this file sets and gets the
336+ action-failed memory quota charging ratio numerator.
337+
338+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/quotas/fail_charge_denom
339+Date: Mar 2026
340+Contact: SeongJae Park <sj@kernel.org>
341+Description: Writing to and reading from this file sets and gets the
342+ action-failed memory quota charging ratio denominator.
343+
325344 What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/quotas/weights/sz_permil
326345 Date: Mar 2022
327346 Contact: SeongJae Park <sj@kernel.org>
@@ -377,15 +396,20 @@ Contact: SeongJae Park <sj@kernel.org> · 49 unmodified lines
377396 Description: Writing to and reading from this file sets and gets the low
378397 watermark of the scheme in permil.
379398
380−What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/nr_filters
381−Date: Dec 2022
399+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters
400+Date: Feb 2025
401+Contact: SeongJae Park <sj@kernel.org>
402+Description: Directory for DAMON core layer-handled DAMOS filters.
403+
404+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/nr_filters
405+Date: Feb 2025
382406 Contact: SeongJae Park <sj@kernel.org>
383407 Description: Writing a number 'N' to this file creates the number of
384408 directories for setting filters of the scheme named '0' to
385− 'N-1' under the filters/ directory.
409+ 'N-1' under the core_filters/ directory.
386410
387−What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/type
388−Date: Dec 2022
411+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/type
412+Date: Feb 2025
389413 Contact: SeongJae Park <sj@kernel.org>
390414 Description: Writing to and reading from this file sets and gets the type of
391415 the memory of the interest. 'anon' for anonymous pages,
@@ -393,77 +417,78 @@ Description: Writing to and reading from this file sets and gets the type of · 1 unmodified line
393417 'addr' for address range (an open-ended interval), or 'target'
394418 for DAMON monitoring target can be written and read.
395419
396−What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/memcg_path
397−Date: Dec 2022
420+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/memcg_path
421+Date: Feb 2025
398422 Contact: SeongJae Park <sj@kernel.org>
399423 Description: If 'memcg' is written to the 'type' file, writing to and
400424 reading from this file sets and gets the path to the memory
401425 cgroup of the interest.
402426
403−What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/addr_start
404−Date: Jul 2023
427+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/addr_start
428+Date: Feb 2025
405429 Contact: SeongJae Park <sj@kernel.org>
406430 Description: If 'addr' is written to the 'type' file, writing to or reading
407431 from this file sets or gets the start address of the address
408432 range for the filter.
409433
410−What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/addr_end
411−Date: Jul 2023
434+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/addr_end
435+Date: Feb 2025
412436 Contact: SeongJae Park <sj@kernel.org>
413437 Description: If 'addr' is written to the 'type' file, writing to or reading
414438 from this file sets or gets the end address of the address
415439 range for the filter.
416440
417−What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/min
441+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/min
418442 Date: Feb 2025
419443 Contact: SeongJae Park <sj@kernel.org>
420444 Description: If 'hugepage_size' is written to the 'type' file, writing to
421445 or reading from this file sets or gets the minimum size of the
422446 hugepage for the filter.
423447
424−What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/max
448+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/max
425449 Date: Feb 2025
426450 Contact: SeongJae Park <sj@kernel.org>
427451 Description: If 'hugepage_size' is written to the 'type' file, writing to
428452 or reading from this file sets or gets the maximum size of the
429453 hugepage for the filter.
430454
431−What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/target_idx
432−Date: Dec 2022
455+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/damon_target_idx
456+Date: Feb 2025
433457 Contact: SeongJae Park <sj@kernel.org>
434458 Description: If 'target' is written to the 'type' file, writing to or
435459 reading from this file sets or gets the index of the DAMON
436460 monitoring target of the interest.
437461
438−What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/matching
439−Date: Dec 2022
462+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/matching
463+Date: Feb 2025
440464 Contact: SeongJae Park <sj@kernel.org>
441465 Description: Writing 'Y' or 'N' to this file sets whether the filter is for
442466 the memory of the 'type', or all except the 'type'.
443467
444−What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/allow
445−Date: Jan 2025
468+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/allow
469+Date: Feb 2025
446470 Contact: SeongJae Park <sj@kernel.org>
447471 Description: Writing 'Y' or 'N' to this file sets whether to allow or reject
448472 applying the scheme's action to the memory that satisfies the
449473 'type' and the 'matching' of the directory.
450474
451−What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters
452−Date: Feb 2025
453−Contact: SeongJae Park <sj@kernel.org>
454−Description: Directory for DAMON core layer-handled DAMOS filters. Files
455− under this directory works same to those of
456− /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters
457− directory.
458−
459475 What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/ops_filters
460476 Date: Feb 2025
461477 Contact: SeongJae Park <sj@kernel.org>
462478 Description: Directory for DAMON operations set layer-handled DAMOS filters.
463479 Files under this directory works same to those of
464− /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters
480+ /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters
465481 directory.
466482
483+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters
484+Date: Dec 2022
485+Contact: SeongJae Park <sj@kernel.org>
486+Description: Directory for DAMOS filters. Files under this directory works
487+ same to those of
488+ /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/{core,ops}_filters
489+ directory. This is deprecated. Use the core_filters and
490+ ops_filters instead.
491+
467492 What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/dests/nr_dests
468493 Date: Jul 2025
469494 Contact: SeongJae Park <sj@kernel.org>
Documentation/ABI/testing/sysfs-platform-asus-wmi+9−0
@@ -58,6 +58,15 @@ Description: · 57 unmodified lines
5858 * 1 - overboost,
5959 * 2 - silent
6060
61+What: /sys/devices/platform/<platform>/keystone
62+Date: Jun 2026
63+KernelVersion: 7.2
64+Contact: "Dariusz Figzał" <dariuszfigzal@gmail.com>
65+Description:
66+ Reports the Keystone dongle insert state (read-only):
67+ * 0 - not inserted
68+ * 1 - inserted
69+
6170 What: /sys/devices/platform/<platform>/gpu_mux_mode
6271 Date: Aug 2022
6372 KernelVersion: 6.1
Documentation/PCI/pci.rst+1−1
@@ -338,7 +338,7 @@ the PCI_IRQ_MSI and PCI_IRQ_MSIX flags will fail, so try to always · 337 unmodified lines
338338 specify PCI_IRQ_INTX as well.
339339
340340 Drivers that have different interrupt handlers for MSI/MSI-X and
341−legacy INTx should chose the right one based on the msi_enabled
341+legacy INTx should choose the right one based on the msi_enabled
342342 and msix_enabled flags in the pci_dev structure after calling
343343 pci_alloc_irq_vectors.
344344
Documentation/PCI/pciebus-howto.rst+1−1
@@ -97,7 +97,7 @@ register its service with the PCI Express Port Bus driver (see · 96 unmodified lines
9797 section 5.2.1 & 5.2.2). It is important that a service driver
9898 initializes the pcie_port_service_driver data structure, included in
9999 header file /include/linux/pcieport_if.h, before calling these APIs.
100−Failure to do so will result an identity mismatch, which prevents
100+Failure to do so will result in an identity mismatch, which prevents
101101 the PCI Express Port Bus driver from loading a service driver.
102102
103103 pcie_port_service_register
Documentation/RCU/Design/Requirements/Requirements.rst+3−3
@@ -206,7 +206,7 @@ non-\ ``NULL``, locklessly accessing the ``->a`` and ``->b`` fields. · 205 unmodified lines
206206
207207 1 bool add_gp_buggy(int a, int b)
208208 2 {
209− 3 p = kmalloc(sizeof(*p), GFP_KERNEL);
209+ 3 p = kmalloc_obj(*p);
210210 4 if (!p)
211211 5 return -ENOMEM;
212212 6 spin_lock(&gp_lock);
@@ -228,7 +228,7 @@ their rights to reorder this code as follows: · 15 unmodified lines
228228
229229 1 bool add_gp_buggy_optimized(int a, int b)
230230 2 {
231− 3 p = kmalloc(sizeof(*p), GFP_KERNEL);
231+ 3 p = kmalloc_obj(*p);
232232 4 if (!p)
233233 5 return -ENOMEM;
234234 6 spin_lock(&gp_lock);
@@ -264,7 +264,7 @@ shows an example of insertion: · 29 unmodified lines
264264
265265 1 bool add_gp(int a, int b)
266266 2 {
267− 3 p = kmalloc(sizeof(*p), GFP_KERNEL);
267+ 3 p = kmalloc_obj(*p);
268268 4 if (!p)
269269 5 return -ENOMEM;
270270 6 spin_lock(&gp_lock);
Documentation/RCU/listRCU.rst+1−1
@@ -276,7 +276,7 @@ The RCU version of audit_upd_rule() is as follows:: · 275 unmodified lines
276276
277277 list_for_each_entry(e, list, list) {
278278 if (!audit_compare_rule(rule, &e->rule)) {
279− ne = kmalloc(sizeof(*entry), GFP_ATOMIC);
279+ ne = kmalloc_obj(*entry, GFP_ATOMIC);
280280 if (ne == NULL)
281281 return -ENOMEM;
282282 audit_copy_rule(&ne->rule, &e->rule);
Documentation/RCU/whatisRCU.rst+2−2
@@ -468,7 +468,7 @@ uses of RCU may be found in listRCU.rst and NMI-RCU.rst. · 467 unmodified lines
468468 struct foo *new_fp;
469469 struct foo *old_fp;
470470
471− new_fp = kmalloc(sizeof(*new_fp), GFP_KERNEL);
471+ new_fp = kmalloc_obj(*new_fp);
472472 spin_lock(&foo_mutex);
473473 old_fp = rcu_dereference_protected(gbl_foo, lockdep_is_held(&foo_mutex));
474474 *new_fp = *old_fp;
@@ -570,7 +570,7 @@ The foo_update_a() function might then be written as follows:: · 95 unmodified lines
570570 struct foo *new_fp;
571571 struct foo *old_fp;
572572
573− new_fp = kmalloc(sizeof(*new_fp), GFP_KERNEL);
573+ new_fp = kmalloc_obj(*new_fp);
574574 spin_lock(&foo_mutex);
575575 old_fp = rcu_dereference_protected(gbl_foo, lockdep_is_held(&foo_mutex));
576576 *new_fp = *old_fp;
Documentation/accel/amdxdna/amdnpu.rst+25−0
@@ -270,6 +270,31 @@ MERT can report various kinds of telemetry information like the following: · 269 unmodified lines
270270 * Deep Sleep counter
271271 * etc.
272272
273+.. _amdxdna-usage-stats:
274+
275+Amdxdna DRM client usage stats implementation
276+=============================================
277+
278+The amdxdna driver implements the DRM client usage stats specification as
279+documented in :ref:`drm-client-usage-stats`.
280+
281+Example of the output showing the implemented key value pairs:
282+
283+::
284+
285+ pos: 0
286+ flags: 0100002
287+ mnt_id: 29
288+ ino: 939
289+ drm-driver: amdxdna_accel_driver
290+ drm-client-id: 3219
291+ drm-pdev: 0000:c5:00.1
292+ amdxdna_accel_driver-heap-alloc: 60 KiB
293+ amdxdna_accel_driver-internal-alloc: 67588 KiB
294+ amdxdna_accel_driver-external-alloc: 0
295+ drm-total-memory: 67632 KiB
296+ drm-shared-memory: 0
297+
273298
274299 References
275300 ==========
Documentation/admin-guide/LSM/landlock.rst+9−4
@@ -6,7 +6,7 @@ Landlock: system-wide management · 5 unmodified lines
66 ================================
77
88 :Author: Mickaël Salaün
9−:Date: January 2026
9+:Date: June 2026
1010
1111 Landlock can leverage the audit framework to log events.
1212
@@ -19,8 +19,10 @@ Audit · 6 unmodified lines
1919 Denied access requests are logged by default for a sandboxed program if `audit`
2020 is enabled. This default behavior can be changed with the
2121 sys_landlock_restrict_self() flags (cf.
22−Documentation/userspace-api/landlock.rst). Landlock logs can also be masked
23−thanks to audit rules. Landlock can generate 2 audit record types.
22+Documentation/userspace-api/landlock.rst), or suppressed on a per-object
23+basis by using ``LANDLOCK_ADD_RULE_QUIET`` (ABI 10+). Landlock logs can
24+also be masked thanks to audit rules. Landlock can generate 2 audit
25+record types.
2426
2527 Record types
2628 ------------
@@ -54,6 +56,8 @@ AUDIT_LANDLOCK_ACCESS · 27 unmodified lines
5456 **net.*** - Network access rights (ABI 4+):
5557 - net.bind_tcp - TCP port binding was denied
5658 - net.connect_tcp - TCP connection was denied
59+ - net.bind_udp - UDP port binding was denied
60+ - net.connect_send_udp - UDP connection and send was denied
5761
5862 **scope.*** - IPC scoping restrictions (ABI 6+):
5963 - scope.abstract_unix_socket - Abstract UNIX socket connection denied
@@ -172,7 +176,8 @@ If you get spammed with audit logs related to Landlock, this is either an · 112 unmodified lines
172176 attack attempt or a bug in the security policy. We can put in place some
173177 filters to limit noise with two complementary ways:
174178
175−- with sys_landlock_restrict_self()'s flags if we can fix the sandboxed
179+- with sys_landlock_restrict_self()'s flags, or
180+ ``LANDLOCK_ADD_RULE_QUIET`` (ABI 10+) if we can fix the sandboxed
176181 programs,
177182 - or with audit rules (see :manpage:`auditctl(8)`).
178183
Documentation/admin-guide/binfmt-misc.rst+4−4
@@ -68,10 +68,10 @@ Here is what the fields mean: · 67 unmodified lines
6868 Legacy behavior of binfmt_misc is to pass the full path
6969 of the binary to the interpreter as an argument. When this flag is
7070 included, binfmt_misc will open the file for reading and pass its
71− descriptor as an argument, instead of the full path, thus allowing
72− the interpreter to execute non-readable binaries. This feature
73− should be used with care - the interpreter has to be trusted not to
74− emit the contents of the non-readable binary.
71+ descriptor into the auxilary vector with the key "AT_EXECFD", thus
72+ allowing the interpreter to execute non-readable binaries. This
73+ feature should be used with care - the interpreter has to be trusted
74+ not to emit the contents of the non-readable binary.
7575 ``C`` - credentials
7676 Currently, the behavior of binfmt_misc is to calculate
7777 the credentials and security token of the new process according to
Documentation/admin-guide/bug-hunting.rst+2−2
@@ -63,8 +63,8 @@ Documentation/admin-guide/tainted-kernels.rst, "being loaded" is · 62 unmodified lines
6363 annotated with "+", and "being unloaded" is annotated with "-".
6464
6565
66−Where is the Oops message is located?
67−-------------------------------------
66+Where is the Oops message located?
67+----------------------------------
6868
6969 Normally the Oops text is read from the kernel buffers by klogd and
7070 handed to ``syslogd`` which writes it to a syslog file, typically
Documentation/admin-guide/cgroup-v1/cgroups.rst+1−1
@@ -525,7 +525,7 @@ cgroup. It may also be taken to prevent cgroups from being · 524 unmodified lines
525525 modified, but more specific locks may be more appropriate in that
526526 situation.
527527
528−See kernel/cgroup.c for more details.
528+See kernel/cgroup/cgroup.c for more details.
529529
530530 Subsystems can take/release the cgroup_mutex via the functions
531531 cgroup_lock()/cgroup_unlock().
Documentation/admin-guide/cgroup-v1/memcg_test.rst+1−1
@@ -321,7 +321,7 @@ Under below explanation, we assume CONFIG_SWAP=y. · 320 unmodified lines
321321 ----------------------
322322
323323 Memory controller implements memory thresholds using cgroups notification
324− API. You can use tools/cgroup/cgroup_event_listener.c to test it.
324+ API. You can use samples/cgroup/cgroup_event_listener.c to test it.
325325
326326 (Shell-A) Create cgroup and run event listener::
327327
Documentation/admin-guide/cgroup-v2.rst+53−0
@@ -2785,6 +2785,59 @@ RDMA Interface Files · 2784 unmodified lines
27852785 mlx4_0 hca_handle=1 hca_object=20
27862786 ocrdma1 hca_handle=1 hca_object=23
27872787
2788+ rdma.peak
2789+ A read-only nested-keyed file that exists for all the cgroups
2790+ except root. It shows the historical high watermark of
2791+ resource usage per device since the cgroup was created.
2792+
2793+ An example for mlx4 and ocrdma device follows::
2794+
2795+ mlx4_0 hca_handle=1 hca_object=20
2796+ ocrdma1 hca_handle=0 hca_object=23
2797+
2798+ rdma.events
2799+ A read-only nested-keyed file which exists on non-root
2800+ cgroups. The following nested keys are defined.
2801+
2802+ max
2803+ The number of times a process in this cgroup or its
2804+ descendants attempted an RDMA resource allocation that
2805+ was rejected because a rdma.max limit in the subtree
2806+ was reached. This is a hierarchical counter: the event
2807+ is propagated upward to all ancestor cgroups. A value
2808+ change in this file generates a file modified event.
2809+
2810+ alloc_fail
2811+ The number of RDMA resource allocation attempts that
2812+ originated in this cgroup or its descendants and failed
2813+ due to a rdma.max limit being reached. This is a
2814+ hierarchical counter propagated upward.
2815+
2816+ An example for mlx4 device follows::
2817+
2818+ mlx4_0 hca_handle.max=5 hca_handle.alloc_fail=3 hca_object.max=0 hca_object.alloc_fail=0
2819+
2820+ rdma.events.local
2821+ Similar to rdma.events but the fields in the file are local
2822+ to the cgroup i.e. not hierarchical. The file modified event
2823+ generated on this file reflects only the local events.
2824+
2825+ The following nested keys are defined.
2826+
2827+ max
2828+ The number of times a process in this cgroup or its
2829+ descendants attempted an RDMA resource allocation that
2830+ was rejected because this cgroup's own rdma.max limit
2831+ was reached.
2832+ alloc_fail
2833+ The number of RDMA resource allocation attempts
2834+ originating from this cgroup that failed due to this
2835+ cgroup's or an ancestor's rdma.max limit.
2836+
2837+ An example for mlx4 device follows::
2838+
2839+ mlx4_0 hca_handle.max=5 hca_handle.alloc_fail=0 hca_object.max=0 hca_object.alloc_fail=0
2840+
27882841 DMEM
27892842 ----
27902843
Documentation/admin-guide/device-mapper/dm-inlinecrypt.rst+129−0
@@ -0,0 +1,129 @@
1+==============
2+dm-inlinecrypt
3+==============
4+
5+Device-Mapper's "inlinecrypt" target provides transparent encryption of block devices
6+using the inline encryption hardware.
7+
8+For a more detailed description of inline encryption, see:
9+https://docs.kernel.org/block/inline-encryption.html
10+
11+Parameters::
12+
13+ <cipher> <key> <iv_offset> <device path> \
14+ <offset> [<#opt_params> <opt_params>]
15+
16+<cipher>
17+ Encryption cipher type.
18+
19+ The cipher specifications format is::
20+
21+ cipher
22+
23+ Examples::
24+
25+ aes-xts-plain64
26+
27+ The cipher type corresponds to the encryption modes supported by
28+ inline crypto in the block layer. Currently, only
29+ BLK_ENCRYPTION_MODE_AES_256_XTS (i.e. aes-xts-plain64) is supported.
30+
31+<key>
32+ Key used for encryption. It is encoded either as a hexadecimal number
33+ or it can be passed as <key_string> prefixed with single colon
34+ character (':') for keys residing in kernel keyring service.
35+ You can only use key sizes that are valid for the selected cipher.
36+ Note that the size in bytes of a valid key must be in bellow range.
37+
38+ [BLK_CRYPTO_KEY_TYPE_RAW, BLK_CRYPTO_KEY_TYPE_HW_WRAPPED]
39+
40+<key_string>
41+ The kernel keyring key is identified by string in following format:
42+ <key_size>:<keyring_type>:<key_description>.
43+
44+<key_size>
45+ The encryption key size in bytes. The kernel key payload size must match
46+ the value passed in <key_size>.
47+
48+<keyring_type>
49+ The type of the key inside the kernel keyring. It can be either 'logon',
50+ or 'trusted' kernel key type.
51+
52+<key_description>
53+ The kernel keyring key description inlinecrypt target should look for
54+ when loading key of <keyring_type>.
55+
56+<iv_offset>
57+ The IV offset is a sector count that is added to the sector number
58+ before creating the IV.
59+
60+<device path>
61+ This is the device that is going to be used as backend and contains the
62+ encrypted data. You can specify it as a path like /dev/xxx or a device
63+ number <major>:<minor>.
64+
65+<offset>
66+ Starting sector within the device where the encrypted data begins.
67+
68+<#opt_params>
69+ Number of optional parameters. If there are no optional parameters,
70+ the optional parameters section can be skipped or #opt_params can be zero.
71+ Otherwise #opt_params is the number of following arguments.
72+
73+ Example of optional parameters section:
74+ keytype:raw allow_discards sector_size:4096 iv_large_sectors
75+
76+<key_type>
77+ The type of the key as seen by the block layer, either standard or
78+ hardware-wrapped. The string is supplied in the table as <keytype:raw>
79+ or <keytype:hw-wrapped>.
80+
81+allow_discards
82+ Block discard requests (a.k.a. TRIM) are passed through the inlinecrypt
83+ device. The default is to ignore discard requests.
84+
85+ WARNING: Assess the specific security risks carefully before enabling this
86+ option. For example, allowing discards on encrypted devices may lead to
87+ the leak of information about the ciphertext device (filesystem type,
88+ used space etc.) if the discarded blocks can be located easily on the
89+ device later.
90+
91+sector_size:<bytes>
92+ Use <bytes> as the encryption unit instead of 512 bytes sectors.
93+ This option can be in range 512 - 4096 bytes and must be power of two.
94+ Virtual device will announce this size as a minimal IO and logical sector.
95+
96+iv_large_sectors
97+ Use <sector_size>-based sector numbers for IV generation instead of
98+ 512-byte sectors.
99+
100+ For dm-inlinecrypt, this flag must be specified when <sector_size>
101+ is larger than 512 bytes. The legacy 512-byte-based IV behavior is
102+ not supported.
103+
104+ When specified, if <sector_size> is 4096 bytes, plain64 IV for the
105+ second sector will be 1, and <iv_offset> must be a multiple of
106+ <sector_size> (in 512-byte units).
107+
108+Example scripts
109+===============
110+Currently, dm-inlinecrypt devices must be set up directly using dmsetup.
111+There is no userspace support yet to integrate dm-inlinecrypt with LUKS
112+or cryptsetup. In particular, cryptsetup currently only supports
113+dm-crypt, and cannot be used to create dm-inlinecrypt mappings.
114+
115+The following examples demonstrate how to create dm-inlinecrypt devices
116+using dmsetup
117+
118+::
119+
120+ #!/bin/sh
121+ # Create a inlinecrypt device using dmsetup
122+ dmsetup create inlinecrypt1 --table "0 `blockdev --getsz $1` inlinecrypt aes-xts-plain64 babebabebabebabebabebabebabebabebabebabebabebabebabebabebabebabe 0 0 $1 0 1 keytype:raw"
123+
124+::
125+
126+ #!/bin/sh
127+ # Create a inlinecrypt device using dmsetup when encryption key is stored in keyring service
128+ dmsetup create inlinecrypt2 --table "0 `blockdev --getsz $1` inlinecrypt aes-xts-plain64 :64:logon:fde:dminlinecrypt_test_key 0 0 $1 0 1 keytype:raw"
129+
Documentation/admin-guide/device-mapper/index.rst+1−0
@@ -15,6 +15,7 @@ Device Mapper · 14 unmodified lines
1515 dm-flakey
1616 dm-ima
1717 dm-init
18+ dm-inlinecrypt
1819 dm-integrity
1920 dm-io
2021 dm-log
Documentation/admin-guide/devices.txt+0−1
@@ -291,7 +291,6 @@ · 290 unmodified lines
291291 154 = /dev/pmu Macintosh PowerBook power manager
292292 155 =
293293 156 = /dev/lcd Front panel LCD display
294− 157 = /dev/ac Applicom Intl Profibus card
295294 158 = /dev/nwbutton Netwinder external button
296295 159 = /dev/nwdebug Netwinder debug interface
297296 160 = /dev/nwflash Netwinder flash memory
Documentation/admin-guide/dynamic-debug-howto.rst+22−13
@@ -38,12 +38,12 @@ You can view the currently configured behaviour in the *prdbg* catalog:: · 37 unmodified lines
3838
3939 :#> head -n7 /proc/dynamic_debug/control
4040 # filename:lineno [module]function flags format
41− init/main.c:1179 [main]initcall_blacklist =_ "blacklisting initcall %s\012
42− init/main.c:1218 [main]initcall_blacklisted =_ "initcall %s blacklisted\012"
43− init/main.c:1424 [main]run_init_process =_ " with arguments:\012"
44− init/main.c:1426 [main]run_init_process =_ " %s\012"
45− init/main.c:1427 [main]run_init_process =_ " with environment:\012"
46− init/main.c:1429 [main]run_init_process =_ " %s\012"
41+ init/main.c:1179 [main]initcall_blacklist =_ "blacklisting initcall %s\n"
42+ init/main.c:1218 [main]initcall_blacklisted =_ "initcall %s blacklisted\n"
43+ init/main.c:1424 [main]run_init_process =_ " with arguments:\n"
44+ init/main.c:1426 [main]run_init_process =_ " %s\n"
45+ init/main.c:1427 [main]run_init_process =_ " with environment:\n"
46+ init/main.c:1429 [main]run_init_process =_ " %s\n"
4747
4848 The 3rd space-delimited column shows the current flags, preceded by
4949 a ``=`` for easy use with grep/cut. ``=p`` shows enabled callsites.
@@ -59,10 +59,10 @@ query/commands to the control file. Example:: · 9 unmodified lines
5959
6060 :#> ddcmd '-p; module main func run* +p'
6161 :#> grep =p /proc/dynamic_debug/control
62− init/main.c:1424 [main]run_init_process =p " with arguments:\012"
63− init/main.c:1426 [main]run_init_process =p " %s\012"
64− init/main.c:1427 [main]run_init_process =p " with environment:\012"
65− init/main.c:1429 [main]run_init_process =p " %s\012"
62+ init/main.c:1424 [main]run_init_process =p " with arguments:\n"
63+ init/main.c:1426 [main]run_init_process =p " %s\n"
64+ init/main.c:1427 [main]run_init_process =p " with environment:\n"
65+ init/main.c:1429 [main]run_init_process =p " %s\n"
6666
6767 Error messages go to console/syslog::
6868
@@ -109,10 +109,19 @@ The match-spec's select *prdbgs* from the catalog, upon which to apply · 40 unmodified lines
109109 the flags-spec, all constraints are ANDed together. An absent keyword
110110 is the same as keyword "*".
111111
112+Note that since the match-spec can be empty, the flags are checked 1st,
113+then the pairs of keyword and value. Flag errs will hide keyword errs::
112114
113−A match specification is a keyword, which selects the attribute of
114−the callsite to be compared, and a value to compare against. Possible
115−keywords are:::
115+ bash-5.2# ddcmd mod bar +foo
116+ dyndbg: read 13 bytes from userspace
117+ dyndbg: query 0: "mod bar +foo" mod:*
118+ dyndbg: unknown flag 'o'
119+ dyndbg: flags parse failed
120+ dyndbg: processed 1 queries, with 0 matches, 1 errs
121+
122+So a match-spec is a keyword, which selects the attribute of the
123+callsite to be compared, and a value to compare against. Possible
124+keywords are::
116125
117126 match-spec ::= 'func' string |
118127 'file' string |
Documentation/admin-guide/kernel-parameters.txt+90−97
@@ -24,7 +24,6 @@ · 23 unmodified lines
2424 IP_PNP IP DHCP, BOOTP, or RARP is enabled.
2525 IPV6 IPv6 support is enabled.
2626 ISAPNP ISA PnP code is enabled.
27− ISDN Appropriate ISDN support is enabled.
2827 ISOL CPU Isolation is enabled.
2928 JOY Appropriate joystick support is enabled.
3029 KGDB Kernel debugger support is enabled.
@@ -36,7 +35,6 @@ · 5 unmodified lines
3635 M68k M68k architecture is enabled.
3736 These options have more detailed description inside of
3837 Documentation/arch/m68k/kernel-options.rst.
39− MDA MDA console support is enabled.
4038 MIPS MIPS architecture is enabled.
4139 MOUSE Appropriate mouse support is enabled.
4240 MSI Message Signaled Interrupts (PCI).
@@ -558,9 +556,6 @@ Kernel parameters · 515 unmodified lines
558556 1 -- enable.
559557 Default value is set via kernel config option.
560558
561− arcrimi= [HW,NET] ARCnet - "RIM I" (entirely mem-mapped) cards
562− Format: <io>,<irq>,<nodeID>
563−
564559 arm64.no32bit_el0 [ARM64] Unconditionally disable the execution of
565560 32 bit applications.
566561
@@ -789,24 +784,6 @@ Kernel parameters · 222 unmodified lines
789784 cio_ignore= [S390]
790785 See Documentation/arch/s390/common_io.rst for details.
791786
792− clearcpuid=X[,X...] [X86]
793− Disable CPUID feature X for the kernel. See
794− arch/x86/include/asm/cpufeatures.h for the valid bit
795− numbers X. Note the Linux-specific bits are not necessarily
796− stable over kernel options, but the vendor-specific
797− ones should be.
798− X can also be a string as appearing in the flags: line
799− in /proc/cpuinfo which does not have the above
800− instability issue. However, not all features have names
801− in /proc/cpuinfo.
802− Note that using this option will taint your kernel.
803− Also note that user programs calling CPUID directly
804− or using the feature without checking anything
805− will still see it. This just prevents it from
806− being used by the kernel or shown in /proc/cpuinfo.
807− Also note the kernel might malfunction if you disable
808− some critical bits.
809−
810787 clk_ignore_unused
811788 [CLK]
812789 Prevents the clock framework from automatically gating
@@ -895,6 +872,10 @@ Kernel parameters · 82 unmodified lines
895872 contiguous memory allocations. It will reserve CMA
896873 area for the specified node.
897874
875+ If it is setup together with upper 'cmd_pernuma='
876+ (unlikely), its size setting takes priority for the
877+ specified numa nodes.
878+
898879 With numa CMA enabled, DMA users on node nid will
899880 first try to allocate buffer from the numa area
900881 which is located in node nid, if the allocation fails,
@@ -911,17 +892,6 @@ Kernel parameters · 10 unmodified lines
911892 Sets the size of memory pool for coherent, atomic dma
912893 allocations, by default set to 256K.
913894
914− com20020= [HW,NET] ARCnet - COM20020 chipset
915− Format:
916− <io>[,<irq>[,<nodeID>[,<backplane>[,<ckp>[,<timeout>]]]]]
917−
918− com90io= [HW,NET] ARCnet - COM90xx chipset (IO-mapped buffers)
919− Format: <io>[,<irq>]
920−
921− com90xx= [HW,NET]
922− ARCnet - COM90xx chipset (memory-mapped buffers)
923− Format: <io>[,<irq>[,<memstart>]]
924−
925895 condev= [HW,S390] console device
926896 conmode=
927897
@@ -1246,8 +1216,9 @@ Kernel parameters · 318 unmodified lines
12461216 deferred probe to give up waiting on dependencies to
12471217 probe. Only specific dependencies (subsystems or
12481218 drivers) that have opted in will be ignored. A timeout
1249− of 0 will timeout at the end of initcalls. If the time
1250− out hasn't expired, it'll be restarted by each
1219+ of 0 will timeout at the end of initcalls; a negative
1220+ value is treated as an infinite timeout value. If the
1221+ timeout hasn't expired, it'll be restarted by each
12511222 successful driver registration. This option will also
12521223 dump out devices still on the deferred probe list after
12531224 retrying.
@@ -1669,10 +1640,6 @@ Kernel parameters · 415 unmodified lines
16691640 very early in the boot process. For early debugging
16701641 via a serial port see kgdboc_earlycon instead.
16711642
1672− elanfreq= [X86-32]
1673− See comment before function elanfreq_setup() in
1674− arch/x86/kernel/cpu/cpufreq/elanfreq.c.
1675−
16761643 elfcorehdr=[size[KMG]@]offset[KMG] [PPC,SH,X86,S390,EARLY]
16771644 Specifies physical address of start of kernel core
16781645 image elf header and optionally the size. Generally
@@ -2100,6 +2067,10 @@ Kernel parameters · 421 unmodified lines
21002067 Format: nn[KMGTPE] or (node format)
21012068 <node>:nn[KMGTPE][,<node>:nn[KMGTPE]]
21022069
2070+ The size must be a multiple of the gigantic page size.
2071+ When using node format, this applies to each per-node size.
2072+ Missaligned values are dropped with a warning.
2073+
21032074 Reserve a CMA area of given size and allocate gigantic
21042075 hugepages using the CMA allocator. If enabled, the
21052076 boot-time allocation of gigantic hugepages is skipped.
@@ -2245,9 +2216,6 @@ Kernel parameters · 139 unmodified lines
22452216 syscalls, essentially overriding IA32_EMULATION_DEFAULT_DISABLED at
22462217 boot time. When false, unconditionally disables IA32 emulation.
22472218
2248− icn= [HW,ISDN]
2249− Format: <io>[,<membase>[,<icn_id>[,<icn_id2>]]]
2250−
22512219
22522220 idle= [X86,EARLY]
22532221 Format: idle=poll, idle=halt, idle=nomwait
@@ -2343,6 +2311,12 @@ Kernel parameters · 89 unmodified lines
23432311 Use the canonical format for the binary runtime
23442312 measurements, instead of host native format.
23452313
2314+ ima_flush_htable [IMA]
2315+ Flush the IMA hash table when deleting all the
2316+ staged measurement records, to achieve maximum
2317+ memory saving at the cost of having duplicate
2318+ records across the staged measurement lists.
2319+
23462320 ima_hash= [IMA]
23472321 Format: { md5 | sha1 | rmd160 | sha256 | sha384
23482322 | sha512 | ... }
@@ -2584,23 +2558,41 @@ Kernel parameters · 235 unmodified lines
25842558 Don't force hardware IOMMU usage when it is not
25852559 needed. (default).
25862560
2561+ merge
2562+ Do scatter-gather (SG) merging. Implies "force"
2563+ (experimental).
2564+
2565+ nomerge
2566+ Don't do scatter-gather (SG) merging.
2567+
25872568 biomerge
2569+ Do scatter-gather (SG) merging. Implies "force"
2570+ (experimental). [same as "merge"]
2571+
25882572 panic
2573+ Always panic when IOMMU overflows.
2574+
25892575 nopanic
2590− merge
2591− nomerge
2576+ Don't panic on IOMMU overflows.
2577+
2578+ pt
2579+ Use passththrough mode by default
2580+ (Equivalent to iommu.passthrough=1)
2581+
2582+ nopt
2583+ Use translated mode for DMA by default
2584+ (Equivalent to iommu.passthrough=0)
25922585
25932586 soft
25942587 Use software bounce buffering (SWIOTLB) (default for
25952588 Intel machines). This can be used to prevent the usage
25962589 of an available hardware IOMMU.
25972590
2598− pt
2599− nopt
2600− nobypass [PPC/POWERNV]
2601− Disable IOMMU bypass, using IOMMU for PCI devices.
2591+ usedac
2592+ Use the DAC on VIA PCI bridge
2593+ (default: disable the VIA PCI bridge DAC)
26022594
2603− AMD Gart HW IOMMU-specific options:
2595+ AMD Gart HW IOMMU-specific options: (CONFIG_GART_IOMMU)
26042596
26052597 <size>
26062598 Set the size of the remapping area in bytes.
@@ -2608,6 +2600,9 @@ Kernel parameters · 1 unmodified line
26082600 allowed
26092601 Overwrite iommu off workarounds for specific chipsets
26102602
2603+ force
2604+ Overwrite iommu off workarounds for specific chipsets
2605+
26112606 fullflush
26122607 Flush IOMMU on each allocation (default).
26132608
@@ -2618,21 +2613,16 @@ Kernel parameters · 4 unmodified lines
26182613 Allocate an own aperture over RAM with size
26192614 32MB<<order. (default: order=1, i.e. 64MB)
26202615
2621− merge
2622− Do scatter-gather (SG) merging. Implies "force"
2623− (experimental).
2624−
2625− nomerge
2626− Don't do scatter-gather (SG) merging.
2627−
26282616 noaperture
26292617 Ask the IOMMU not to touch the aperture for AGP.
26302618
26312619 noagp
26322620 Don't initialize the AGP driver and use full aperture.
26332621
2634− panic
2635− Always panic when IOMMU overflows.
2622+ iommu= [PPC/POWERNV]
2623+
2624+ nobypass
2625+ Disable IOMMU bypass, using IOMMU for PCI devices.
26362626
26372627 iommu.forcedac= [ARM64,X86,EARLY] Control IOVA allocation for PCI devices.
26382628 Format: { "0" | "1" }
@@ -2755,7 +2745,6 @@ Kernel parameters · 116 unmodified lines
27552745 Format: <RDP>,<reset>,<pci_scan>,<verbosity>
27562746
27572747 isolcpus= [KNL,SMP,ISOL] Isolate a given set of CPUs from disturbance.
2758− [Deprecated - use cpusets instead]
27592748 Format: [flag-list,]<cpu-list>
27602749
27612750 Specify one or more CPUs to isolate from disturbances
@@ -2780,11 +2769,10 @@ Kernel parameters · 18 unmodified lines
27802769 Isolate from the general SMP balancing and scheduling
27812770 algorithms. Note that performing domain isolation this way
27822771 is irreversible: it's not possible to bring back a CPU to
2783− the domains once isolated through isolcpus. It's strongly
2784− advised to use cpusets instead to disable scheduler load
2785− balancing through the "cpuset.sched_load_balance" file.
2786− It offers a much more flexible interface where CPUs can
2787− move in and out of an isolated set anytime.
2772+ the domains once isolated through this boot time
2773+ configuration. Use cpusets for a dynamic configuration
2774+ which can be altered at runtime. For details see
2775+ Documentation/admin-guide/cpu-isolation.rst.
27882776
27892777 You can move a process onto or off an "isolated" CPU via
27902778 the CPU affinity syscalls or cpuset.
@@ -3816,10 +3804,6 @@ Kernel parameters · 1025 unmodified lines
38163804 md= [HW] RAID subsystems devices and level
38173805 See Documentation/admin-guide/md.rst.
38183806
3819− mdacon= [MDA]
3820− Format: <first>,<last>
3821− Specifies range of consoles to be captured by the MDA.
3822−
38233807 mds= [X86,INTEL,EARLY]
38243808 Control mitigation for the Micro-architectural Data
38253809 Sampling (MDS) vulnerability.
@@ -4266,12 +4250,8 @@ Kernel parameters · 440 unmodified lines
42664250
42674251 n2= [NET] SDL Inc. RISCom/N2 synchronous serial card
42684252
4269− netdev= [NET] Network devices parameters
4253+ netdev= [NET] NE2000 ISA network devices parameters
42704254 Format: <irq>,<io>,<mem_start>,<mem_end>,<name>
4271− Note that mem_start is often overloaded to mean
4272− something different and driver-specific.
4273− This usage is only documented in each driver source
4274− file if at all.
42754255
42764256 netpoll.carrier_timeout=
42774257 [NET] Specifies amount of time (in seconds) that
@@ -4308,13 +4288,6 @@ Kernel parameters · 30 unmodified lines
43084288 Only applies if the softerr mount option is enabled,
43094289 and the specified value is >= 0.
43104290
4311− nfs.enable_ino64=
4312− [NFS] enable 64-bit inode numbers.
4313− If zero, the NFS client will fake up a 32-bit inode
4314− number for the readdir() and stat() syscalls instead
4315− of returning the full 64-bit number.
4316− The default is to return 64-bit inode numbers.
4317−
43184291 nfs.idmap_cache_timeout=
43194292 [NFS] set the maximum lifetime for idmapper cache
43204293 entries.
@@ -4437,10 +4410,6 @@ Kernel parameters · 116 unmodified lines
44374410 These settings can be accessed at runtime via
44384411 the nmi_watchdog and hardlockup_panic sysctls.
44394412
4440− no387 [BUGS=X86-32] Tells the kernel to use the 387 maths
4441− emulation library even if a 387 maths coprocessor
4442− is present.
4443−
44444413 no4lvl [RISCV,EARLY] Disable 4-level and 5-level paging modes.
44454414 Forces kernel to use 3-level paging instead.
44464415
@@ -4644,7 +4613,7 @@ Kernel parameters · 197 unmodified lines
46444613 nosmt [KNL,MIPS,PPC,EARLY] Disable symmetric multithreading (SMT).
46454614 Equivalent to smt=1.
46464615
4647− [KNL,LOONGARCH,X86,PPC,S390] Disable symmetric multithreading (SMT).
4616+ [KNL,LOONGARCH,X86,ARM64,PPC,S390] Disable symmetric multithreading (SMT).
46484617 nosmt=force: Force disable SMT, cannot be undone
46494618 via the sysfs control file.
46504619
@@ -5037,8 +5006,6 @@ Kernel parameters · 386 unmodified lines
50375006 the specified number of seconds. This is to be used if
50385007 your oopses keep scrolling off the screen.
50395008
5040− pcbit= [HW,ISDN]
5041−
50425009 pci=option[,option...] [PCI,EARLY] various PCI subsystem options.
50435010
50445011 Some options herein operate on a specific device
@@ -5862,13 +5829,13 @@ Kernel parameters · 817 unmodified lines
58625829 use a call_rcu[_hurry]() path. Please note, this is for a
58635830 normal grace period.
58645831
5865− How to enable it:
5832+ How to disable it:
58665833
5867− echo 1 > /sys/module/rcutree/parameters/rcu_normal_wake_from_gp
5868− or pass a boot parameter "rcutree.rcu_normal_wake_from_gp=1"
5834+ echo 0 > /sys/module/rcutree/parameters/rcu_normal_wake_from_gp
5835+ or pass a boot parameter "rcutree.rcu_normal_wake_from_gp=0"
58695836
5870− Default is 1 if num_possible_cpus() <= 16 and it is not explicitly
5871− disabled by the boot parameter passing 0.
5837+ Default is 1 if it is not explicitly disabled by the boot parameter
5838+ passing 0.
58725839
58735840 rcuscale.gp_async= [KNL]
58745841 Measure performance of asynchronous
@@ -6778,8 +6745,6 @@ Kernel parameters · 903 unmodified lines
67786745 restrictions other than those given by hardware at the
67796746 cost of significant additional memory use for tables.
67806747
6781− sa1100ir [NET]
6782− See drivers/net/irda/sa1100_ir.c.
67836748
67846749 sched_proxy_exec= [KNL]
67856750 Enables or disables "proxy execution" style
@@ -7236,6 +7201,18 @@ Kernel parameters · 450 unmodified lines
72367201 Not specifying this option is equivalent to
72377202 spec_store_bypass_disable=auto.
72387203
7204+ split_llc=
7205+ [X86,EARLY] Split the LLC N-ways
7206+
7207+ When set, the LLC is split this many ways by matching
7208+ 'core_id % n'. This is setup before SMP bringup and
7209+ used during SMP bringup before it knows the full
7210+ topology. If your core count doesn't nicely divide by
7211+ the number given, you get to keep the pieces.
7212+
7213+ This is mostly a debug feature to emulate multiple LLCs
7214+ on hardware that only have a single LLC.
7215+
72397216 split_lock_detect=
72407217 [X86] Enable split lock detection or bus lock detection
72417218
@@ -7414,10 +7391,10 @@ Kernel parameters · 172 unmodified lines
74147391 Set the STI (builtin display/keyboard on the HP-PARISC
74157392 machines) console (graphic card) which should be used
74167393 as the initial boot-console.
7417− See also comment in drivers/video/console/sticore.c.
7394+ See also comment in drivers/video/sticore.c.
74187395
74197396 sti_font= [HW]
7420− See comment in drivers/video/console/sticore.c.
7397+ See comment in drivers/video/sticore.c.
74217398
74227399 stifb= [HW]
74237400 Format: bpp:<bpp1>[:<bpp2>[:<bpp3>...]]
@@ -7888,6 +7865,22 @@ Kernel parameters · 464 unmodified lines
78887865 first trust source as a backend which is initialized
78897866 successfully during iteration.
78907867
7868+ trusted.debug= [KEYS]
7869+ Format: <bool>
7870+ Enable trusted keys debug traces at runtime when
7871+ CONFIG_TRUSTED_KEYS_DEBUG=y.
7872+
7873+ To make the traces visible after enabling the option,
7874+ use trusted.dyndbg='+p' as needed. By convention,
7875+ the subsystem uses pr_debug() for these traces.
7876+
7877+ SAFETY: The traces can leak sensitive data, so be
7878+ cautious before enabling this. They remain inactive
7879+ unless this parameter is set this option to a true
7880+ value.
7881+
7882+ Default: false
7883+
78917884 trusted.rng= [KEYS]
78927885 Format: <string>
78937886 The RNG used to generate key material for trusted keys.
Documentation/admin-guide/laptops/sonypi.rst+1−1
@@ -89,7 +89,7 @@ statically linked into the kernel). Those options are: · 88 unmodified lines
8989 set to 0xffffffff, meaning that all possible events
9090 will be tried. You can use the following bits to
9191 construct your own event mask (from
92− drivers/char/sonypi.h)::
92+ include/linux/sonypi.h)::
9393
9494 SONYPI_JOGGER_MASK 0x0001
9595 SONYPI_CAPTURE_MASK 0x0002
Documentation/admin-guide/laptops/uniwill-laptop.rst+22−3
@@ -43,9 +43,23 @@ Support for changing the platform performance mode is currently not implemented. · 42 unmodified lines
4343 Battery Charging Control
4444 ------------------------
4545
46−The ``uniwill-laptop`` driver supports controlling the battery charge limit. This happens over
47−the standard ``charge_control_end_threshold`` power supply sysfs attribute. All values
48−between 1 and 100 percent are supported.
46+.. warning:: Some devices do not properly implement the charging threshold interface. Forcing
47+ the driver to enable access to said interface on such devices might damage the
48+ battery [1]_. Because of this the driver will not enable said feature even when
49+ using the ``force`` module parameter. The charging profile interface will be
50+ available instead.
51+
52+The ``uniwill-laptop`` driver supports controlling the battery charge limit. This either happens
53+over the standard ``charge_control_end_threshold`` or ``charge_types`` power supply sysfs attribute,
54+depending on the device. When using the ``charge_control_end_threshold`` sysfs attribute, all values
55+between 1 and 100 percent are supported. When using the ``charge_types`` sysfs attribute, the driver
56+supports switching between the ``Standard``, ``Trickle`` and ``Long Life`` profiles.
57+
58+Keep in mind that when using the ``charge_types`` sysfs attribute, the EC firmware will hide the
59+true charging status of the battery from the operating system, potentially misleading users into
60+thinking that the charging profile does not work. Checking the ``current_now`` sysfs attribute
61+tells you the true charging status of the battery even when using the ``charge_types`` sysfs
62+attribute (0 means that the battery is currently not charging).
4963
5064 Additionally the driver signals the presence of battery charging issues through the standard
5165 ``health`` power supply sysfs attribute.
@@ -70,3 +84,8 @@ The ``uniwill-laptop`` driver allows to set the configurable TGP for devices wit · 18 unmodified lines
7084 allow it.
7185
7286 See Documentation/ABI/testing/sysfs-driver-uniwill-laptop for details.
87+
88+References
89+==========
90+
91+.. [1] https://www.reddit.com/r/XMG_gg/comments/ld9yyf/battery_limit_hidden_function_discovered_on/
Documentation/admin-guide/md.rst+1−1
@@ -734,7 +734,7 @@ also have · 733 unmodified lines
734734 They should be scaled by the bitmap_chunksize.
735735
736736 sync_speed_min, sync_speed_max
737− This are similar to ``/proc/sys/dev/raid/speed_limit_{min,max}``
737+ These are similar to ``/proc/sys/dev/raid/speed_limit_{min,max}``
738738 however they only apply to the particular array.
739739
740740 If no value has been written to these, or if the word ``system``
Documentation/admin-guide/media/amdisp4-1.rst+63−0
@@ -0,0 +1,63 @@
1+.. SPDX-License-Identifier: GPL-2.0
2+
3+.. include:: <isonum.txt>
4+
5+====================================
6+AMD Image Signal Processor (amdisp4)
7+====================================
8+
9+Introduction
10+============
11+
12+This file documents the driver for the AMD ISP4 that is part of
13+AMD Ryzen AI Max 300 Series.
14+
15+The driver is located under drivers/media/platform/amd/isp4 and uses
16+the Media-Controller API.
17+
18+The driver exposes one video capture device to userspace and provide
19+web camera like interface. Internally the video device is connected
20+to the isp4 sub-device responsible for communication with the CCPU FW.
21+
22+Topology
23+========
24+
25+.. _amdisp4_topology_graph:
26+
27+.. kernel-figure:: amdisp4.dot
28+ :alt: Diagram of the media pipeline topology
29+ :align: center
30+
31+
32+
33+The driver has 1 sub-device: Representing isp4 image signal processor.
34+The driver has 1 video device: Capture device for retrieving images.
35+
36+- ISP4 Image Signal Processing Subdevice Node
37+
38+---------------------------------------------
39+
40+The isp4 is represented as a single V4L2 subdev, the sub-device does not
41+provide interface to the user space. The sub-device is connected to one video node
42+(isp4_capture) with immutable active link. The sub-device represents ISP with
43+connected sensor similar to smart cameras (sensors with integrated ISP).
44+sub-device has only one link to the video device for capturing the frames.
45+The sub-device communicates with CCPU FW for streaming configuration and
46+buffer management.
47+
48+
49+- isp4_capture - Frames Capture Video Node
50+
51+------------------------------------------
52+
53+Isp4_capture is a capture device to capture frames to memory.
54+The entity is connected to isp4 sub-device. The video device
55+provides web camera like interface to userspace. It supports
56+mmap and dma buf types of memory.
57+
58+Capturing Video Frames Example
59+==============================
60+
61+.. code-block:: bash
62+
63+ v4l2-ctl "-d" "/dev/video0" "--set-fmt-video=width=1920,height=1080,pixelformat=NV12" "--stream-mmap" "--stream-count=10"
Documentation/admin-guide/media/amdisp4.dot+6−0
@@ -0,0 +1,6 @@
1+digraph board {
2+ rankdir=TB
3+ n00000001 [label="{{} | amd isp4\n | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
4+ n00000001:port0 -> n00000003 [style=bold]
5+ n00000003 [label="Preview\n/dev/video0", shape=box, style=filled, fillcolor=yellow]
6+}
Documentation/admin-guide/media/rkcif-rk3588-vicap.dot+29−0
@@ -0,0 +1,29 @@
1+digraph board {
2+ rankdir=TB
3+ n00000007 [label="{{<port0> 0} | rkcif-mipi2\n/dev/v4l-subdev0 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
4+ n00000007:port1 -> n0000000a
5+ n00000007:port1 -> n00000010 [style=dashed]
6+ n00000007:port1 -> n00000016 [style=dashed]
7+ n00000007:port1 -> n0000001c [style=dashed]
8+ n0000000a [label="rkcif-mipi2-id0\n/dev/video0", shape=box, style=filled, fillcolor=yellow]
9+ n00000010 [label="rkcif-mipi2-id1\n/dev/video1", shape=box, style=filled, fillcolor=yellow]
10+ n00000016 [label="rkcif-mipi2-id2\n/dev/video2", shape=box, style=filled, fillcolor=yellow]
11+ n0000001c [label="rkcif-mipi2-id3\n/dev/video3", shape=box, style=filled, fillcolor=yellow]
12+ n00000025 [label="{{<port0> 0} | rkcif-mipi4\n/dev/v4l-subdev1 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
13+ n00000025:port1 -> n00000028
14+ n00000025:port1 -> n0000002e [style=dashed]
15+ n00000025:port1 -> n00000034 [style=dashed]
16+ n00000025:port1 -> n0000003a [style=dashed]
17+ n00000028 [label="rkcif-mipi4-id0\n/dev/video4", shape=box, style=filled, fillcolor=yellow]
18+ n0000002e [label="rkcif-mipi4-id1\n/dev/video5", shape=box, style=filled, fillcolor=yellow]
19+ n00000034 [label="rkcif-mipi4-id2\n/dev/video6", shape=box, style=filled, fillcolor=yellow]
20+ n0000003a [label="rkcif-mipi4-id3\n/dev/video7", shape=box, style=filled, fillcolor=yellow]
21+ n00000043 [label="{{<port0> 0} | dw-mipi-csi2rx fdd30000.csi\n/dev/v4l-subdev2 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
22+ n00000043:port1 -> n00000007:port0
23+ n00000048 [label="{{<port0> 0} | dw-mipi-csi2rx fdd50000.csi\n/dev/v4l-subdev3 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
24+ n00000048:port1 -> n00000025:port0
25+ n0000004d [label="{{} | imx415 3-001a\n/dev/v4l-subdev4 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
26+ n0000004d:port0 -> n00000043:port0
27+ n00000051 [label="{{} | imx415 4-001a\n/dev/v4l-subdev5 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
28+ n00000051:port0 -> n00000048:port0
29+}
Documentation/admin-guide/media/rkcif.rst+32−0
@@ -77,3 +77,35 @@ and the following video devices: · 76 unmodified lines
7777 .. kernel-figure:: rkcif-rk3568-vicap.dot
7878 :alt: Topology of the RK3568 Video Capture (VICAP) unit
7979 :align: center
80+
81+Rockchip RK3588 Video Capture (VICAP)
82+-------------------------------------
83+
84+The RK3588 Video Capture (VICAP) unit features a digital video port and six
85+MIPI CSI-2 capture interfaces that can receive video data independently.
86+The DVP accepts parallel video data, BT.656 and BT.1120.
87+Since the BT.1120 protocol may feature more than one stream, the RK3588 VICAP
88+DVP features four DMA engines that can capture different streams.
89+Similarly, the RK3588 VICAP MIPI CSI-2 receivers feature four DMA engines each
90+to handle different Virtual Channels (VCs).
91+
92+The rkcif driver represents this hardware variant by exposing the following
93+V4L2 subdevices:
94+
95+* dw-mipi-csi2rx fdd30000.csi: MIPI CSI-2 receiver connected to MIPI DPHY0
96+* dw-mipi-csi2rx fdd50000.csi: MIPI CSI-2 receiver connected to MIPI DPHY1
97+* rkcif-mipi2: INTERFACE/CROP block for the MIPI CSI-2 receiver connected to
98+ MIPI DPHY0
99+* rkcif-mipi4: INTERFACE/CROP block for the MIPI CSI-2 receiver connected to
100+ MIPI DPHY1
101+
102+and the following video devices:
103+
104+* rkcif-mipi2-id{0,1,2,3}: The DMA engines connected to the rkcif-mipi2
105+ INTERFACE/CROP block.
106+* rkcif-mipi4-id{0,1,2,3}: The DMA engines connected to the rkcif-mipi4
107+ INTERFACE/CROP block.
108+
109+.. kernel-figure:: rkcif-rk3588-vicap.dot
110+ :alt: Topology of the RK3588 Video Capture (VICAP) unit
111+ :align: center
Documentation/admin-guide/media/v4l-drivers.rst+1−0
@@ -9,6 +9,7 @@ Video4Linux (V4L) driver-specific documentation · 8 unmodified lines
99 .. toctree::
1010 :maxdepth: 2
1111
12+ amdisp4-1
1213 bttv
1314 c3-isp
1415 cafe_ccic
Documentation/admin-guide/mm/damon/lru_sort.rst+5−3
@@ -75,7 +75,7 @@ Make DAMON_LRU_SORT reads the input parameters again, except ``enabled``. · 74 unmodified lines
7575
7676 Input parameters that updated while DAMON_LRU_SORT is running are not applied
7777 by default. Once this parameter is set as ``Y``, DAMON_LRU_SORT reads values
78−of parametrs except ``enabled`` again. Once the re-reading is done, this
78+of parameters except ``enabled`` again. Once the re-reading is done, this
7979 parameter is set as ``N``. If invalid parameters are found while the
8080 re-reading, DAMON_LRU_SORT will be disabled.
8181
@@ -246,7 +246,8 @@ monitor_region_start · 164 unmodified lines
246246 Start of target memory region in physical address.
247247
248248 The start physical address of memory region that DAMON_LRU_SORT will do work
249−against. By default, biggest System RAM is used as the region.
249+against. By default, the system's entire physical memory is used as the
250+region.
250251
251252 monitor_region_end
252253 ------------------
@@ -254,7 +255,8 @@ monitor_region_end · 1 unmodified line
254255 End of target memory region in physical address.
255256
256257 The end physical address of memory region that DAMON_LRU_SORT will do work
257−against. By default, biggest System RAM is used as the region.
258+against. By default, the system's entire physical memory is used as the
259+region.
258260
259261 addr_unit
260262 ---------
Documentation/admin-guide/mm/damon/reclaim.rst+16−3
@@ -67,7 +67,7 @@ Make DAMON_RECLAIM reads the input parameters again, except ``enabled``. · 66 unmodified lines
6767
6868 Input parameters that updated while DAMON_RECLAIM is running are not applied
6969 by default. Once this parameter is set as ``Y``, DAMON_RECLAIM reads values
70−of parametrs except ``enabled`` again. Once the re-reading is done, this
70+of parameters except ``enabled`` again. Once the re-reading is done, this
7171 parameter is set as ``N``. If invalid parameters are found while the
7272 re-reading, DAMON_RECLAIM will be disabled.
7373
@@ -85,6 +85,17 @@ identifies the region as cold, and reclaims it. · 11 unmodified lines
8585
8686 120 seconds by default.
8787
88+autotune_monitoring_intervals
89+-----------------------------
90+
91+If this parameter is set as ``Y``, DAMON_RECLAIM automatically tunes DAMON's
92+sampling and aggregation intervals. The auto-tuning aims to capture meaningful
93+amount of access events in each DAMON-snapshot, while keeping the sampling
94+interval 5 milliseconds in minimum, and 10 seconds in maximum. Setting this as
95+``N`` disables the auto-tuning.
96+
97+Disabled by default.
98+
8899 quota_ms
89100 --------
90101
@@ -229,7 +240,8 @@ Start of target memory region in physical address. · 138 unmodified lines
229240
230241 The start physical address of memory region that DAMON_RECLAIM will do work
231242 against. That is, DAMON_RECLAIM will find cold memory regions in this region
232−and reclaims. By default, biggest System RAM is used as the region.
243+and reclaims. By default, the system's entire physical memory is used as the
244+region.
233245
234246 monitor_region_end
235247 ------------------
@@ -238,7 +250,8 @@ End of target memory region in physical address. · 2 unmodified lines
238250
239251 The end physical address of memory region that DAMON_RECLAIM will do work
240252 against. That is, DAMON_RECLAIM will find cold memory regions in this region
241−and reclaims. By default, biggest System RAM is used as the region.
253+and reclaims. By default, the system's entire physical memory is used as the
254+region.
242255
243256 addr_unit
244257 ---------
Documentation/admin-guide/mm/damon/stat.rst+7−0
@@ -89,3 +89,10 @@ percentiles of the idle time values via this read-only parameter. Reading the · 88 unmodified lines
8989 parameter returns 101 idle time values in milliseconds, separated by comma.
9090 Each value represents 0-th, 1st, 2nd, 3rd, ..., 99th and 100th percentile idle
9191 times.
92+
93+kdamond_pid
94+-----------
95+
96+PID of the DAMON thread.
97+
98+If DAMON_STAT is enabled, this becomes the PID of the worker thread. Else, -1.
Documentation/admin-guide/mm/damon/usage.rst+82−26
@@ -66,11 +66,17 @@ comma (","). · 65 unmodified lines
6666 │ :ref:`kdamonds <sysfs_kdamonds>`/nr_kdamonds
6767 │ │ :ref:`0 <sysfs_kdamond>`/state,pid,refresh_ms
6868 │ │ │ :ref:`contexts <sysfs_contexts>`/nr_contexts
69− │ │ │ │ :ref:`0 <sysfs_context>`/avail_operations,operations,addr_unit
69+ │ │ │ │ :ref:`0 <sysfs_context>`/avail_operations,operations,addr_unit,
70+ │ │ │ │ pause
7071 │ │ │ │ │ :ref:`monitoring_attrs <sysfs_monitoring_attrs>`/
7172 │ │ │ │ │ │ intervals/sample_us,aggr_us,update_us
7273 │ │ │ │ │ │ │ intervals_goal/access_bp,aggrs,min_sample_us,max_sample_us
7374 │ │ │ │ │ │ nr_regions/min,max
75+ │ │ │ │ │ │ :ref:`probes <damon_usage_sysfs_probes>`/nr_probes
76+ │ │ │ │ │ │ │ 0/filters/nr_filters
77+ │ │ │ │ │ │ │ │ 0/type,matching,allow,path
78+ │ │ │ │ │ │ │ │ ...
79+ │ │ │ │ │ │ │ ...
7480 │ │ │ │ │ :ref:`targets <sysfs_targets>`/nr_targets
7581 │ │ │ │ │ │ :ref:`0 <sysfs_target>`/pid_target,obsolete_target
7682 │ │ │ │ │ │ │ :ref:`regions <sysfs_regions>`/nr_regions
@@ -83,18 +89,23 @@ comma (","). · 6 unmodified lines
8389 │ │ │ │ │ │ │ │ sz/min,max
8490 │ │ │ │ │ │ │ │ nr_accesses/min,max
8591 │ │ │ │ │ │ │ │ age/min,max
86− │ │ │ │ │ │ │ :ref:`quotas <sysfs_quotas>`/ms,bytes,reset_interval_ms,effective_bytes,goal_tuner
92+ │ │ │ │ │ │ │ :ref:`quotas <sysfs_quotas>`/ms,bytes,reset_interval_ms,
93+ │ │ │ │ │ │ │ effective_bytes,goal_tuner,
94+ │ │ │ │ │ │ │ fail_charge_num,fail_charge_denom
8795 │ │ │ │ │ │ │ │ weights/sz_permil,nr_accesses_permil,age_permil
8896 │ │ │ │ │ │ │ │ :ref:`goals <sysfs_schemes_quota_goals>`/nr_goals
8997 │ │ │ │ │ │ │ │ │ 0/target_metric,target_value,current_value,nid,path
9098 │ │ │ │ │ │ │ :ref:`watermarks <sysfs_watermarks>`/metric,interval_us,high,mid,low
9199 │ │ │ │ │ │ │ :ref:`{core_,ops_,}filters <sysfs_filters>`/nr_filters
92− │ │ │ │ │ │ │ │ 0/type,matching,allow,memcg_path,addr_start,addr_end,target_idx,min,max
100+ │ │ │ │ │ │ │ │ 0/type,matching,allow,memcg_path,addr_start,addr_end,damon_target_idx,min,max
93101 │ │ │ │ │ │ │ :ref:`dests <damon_sysfs_dests>`/nr_dests
94102 │ │ │ │ │ │ │ │ 0/id,weight
95103 │ │ │ │ │ │ │ :ref:`stats <sysfs_schemes_stats>`/nr_tried,sz_tried,nr_applied,sz_applied,sz_ops_filter_passed,qt_exceeds,nr_snapshots,max_nr_snapshots
96104 │ │ │ │ │ │ │ :ref:`tried_regions <sysfs_schemes_tried_regions>`/total_bytes
97105 │ │ │ │ │ │ │ │ 0/start,end,nr_accesses,age,sz_filter_passed
106+ │ │ │ │ │ │ │ │ │ probes
107+ │ │ │ │ │ │ │ │ │ │ 0/hits
108+ │ │ │ │ │ │ │ │ │ │ ...
98109 │ │ │ │ │ │ │ │ ...
99110 │ │ │ │ │ │ ...
100111 │ │ │ │ ...
@@ -194,9 +205,9 @@ details). At the moment, only one context per kdamond is supported, so only · 93 unmodified lines
194205 contexts/<N>/
195206 -------------
196207
197−In each context directory, three files (``avail_operations``, ``operations``
198−and ``addr_unit``) and three directories (``monitoring_attrs``, ``targets``,
199−and ``schemes``) exist.
208+In each context directory, four files (``avail_operations``, ``operations``,
209+``addr_unit`` and ``pause``) and three directories (``monitoring_attrs``,
210+``targets``, and ``schemes``) exist.
200211
201212 DAMON supports multiple types of :ref:`monitoring operations
202213 <damon_design_configurable_operations_set>`, including those for virtual address
@@ -214,6 +225,9 @@ reading from the ``operations`` file. · 11 unmodified lines
214225 ``addr_unit`` file is for setting and getting the :ref:`address unit
215226 <damon_design_addr_unit>` parameter of the operations set.
216227
228+``pause`` file is for setting and getting the :ref:`pause request
229+<damon_design_execution_model_and_data_structures>` parameter of the context.
230+
217231 .. _sysfs_monitoring_attrs:
218232
219233 contexts/<N>/monitoring_attrs/
@@ -221,8 +235,8 @@ contexts/<N>/monitoring_attrs/ · 1 unmodified line
221235
222236 Files for specifying attributes of the monitoring including required quality
223237 and efficiency of the monitoring are in ``monitoring_attrs`` directory.
224−Specifically, two directories, ``intervals`` and ``nr_regions`` exist in this
225−directory.
238+Specifically, three directories, ``intervals``, ``nr_regions`` and ``probes``
239+exist in this directory.
226240
227241 Under ``intervals`` directory, three files for DAMON's sampling interval
228242 (``sample_us``), aggregation interval (``aggr_us``), and update interval
@@ -256,6 +270,29 @@ tuning-applied current values of the two intervals can be read from the · 27 unmodified lines
256270 ``sample_us`` and ``aggr_us`` files after writing ``update_tuned_intervals`` to
257271 the ``state`` file.
258272
273+.. _damon_usage_sysfs_probes:
274+
275+contexts/<N>/monitoring_attrs/probes/
276+-------------------------------------
277+
278+A directory for registering :ref:`data attributes monitoring
279+<damon_design_data_attrs_monitoring>` probes.
280+
281+In the beginning, this directory has only one file, ``nr_probes``. Writing a
282+number (``N``) to the file creates the number of child directories named ``0``
283+to ``N-1``. Each directory represents each monitoring probe.
284+
285+In each probe directory, one directory, ``filters`` exists. The directory
286+contains files for installing filters for the probe, that is used to determine
287+the data attribute for the probe.
288+
289+In the beginning, ``filters`` directory has only one file, ``nr_filters``.
290+Writing a number (``N``) to the file creates the number of child directories
291+named ``0`` to ``N-1``. Each directory represents each filter and works in a
292+way similar to that for :ref:`DAMOS filter <sysfs_filters>`. When the filter
293+``type`` is ``memcg``, ``path`` file acts as ``memcg_path`` for :ref:`DAMOS
294+filter <sysfs_filters>`.
295+
259296 .. _sysfs_targets:
260297
261298 contexts/<N>/targets/
@@ -337,7 +374,7 @@ to ``N-1``. Each directory represents each DAMON-based operation scheme. · 75 unmodified lines
337374 schemes/<N>/
338375 ------------
339376
340−In each scheme directory, eight directories (``access_pattern``, ``quotas``,
377+In each scheme directory, nine directories (``access_pattern``, ``quotas``,
341378 ``watermarks``, ``core_filters``, ``ops_filters``, ``filters``, ``dests``,
342379 ``stats``, and ``tried_regions``) and three files (``action``, ``target_nid``
343380 and ``apply_interval``) exist.
@@ -377,9 +414,10 @@ schemes/<N>/quotas/ · 33 unmodified lines
377414 The directory for the :ref:`quotas <damon_design_damos_quotas>` of the given
378415 DAMON-based operation scheme.
379416
380−Under ``quotas`` directory, five files (``ms``, ``bytes``,
381−``reset_interval_ms``, ``effective_bytes`` and ``goal_tuner``) and two
382−directories (``weights`` and ``goals``) exist.
417+Under ``quotas`` directory, seven files (``ms``, ``bytes``,
418+``reset_interval_ms``, ``effective_bytes``, ``goal_tuner``, ``fail_charge_num``
419+and ``fail_charge_denom``) and two directories (``weights`` and ``goals``)
420+exist.
383421
384422 You can set the ``time quota`` in milliseconds, ``size quota`` in bytes, and
385423 ``reset interval`` in milliseconds by writing the values to the three files,
@@ -398,6 +436,13 @@ the background design of the feature and the name of the selectable algorithms. · 12 unmodified lines
398436 Refer to :ref:`goals directory <sysfs_schemes_quota_goals>` for the goals
399437 setup.
400438
439+You can set the action-failed memory quota charging ratio by writing the
440+numerator and the denominator for the ratio to ``fail_charge_num`` and
441+``fail_charge_denom`` files, respectively. Reading those files will return the
442+current set values. Refer to :ref:`design
443+<damon_design_damos_quotas_failed_memory_charging_ratio>` for more details of
444+the ratio feature.
445+
401446 The time quota is internally transformed to a size quota. Between the
402447 transformed size quota and user-specified size quota, smaller one is applied.
403448 Based on the user-specified :ref:`goal <sysfs_schemes_quota_goals>`, the
@@ -429,10 +474,12 @@ to ``N-1``. Each directory represents each goal and current achievement. · 25 unmodified lines
429474 Among the multiple feedback, the best one is used.
430475
431476 Each goal directory contains five files, namely ``target_metric``,
432−``target_value``, ``current_value`` ``nid`` and ``path``. Users can set and
477+``target_value``, ``current_value``, ``nid``, and ``path``. Users can set and
433478 get the five parameters for the quota auto-tuning goals that specified on the
434479 :ref:`design doc <damon_design_damos_quotas_auto_tuning>` by writing to and
435−reading from each of the files. Note that users should further write
480+reading from each of the files. Because the kernel does not update
481+``current_value``, reading it only makes sense when ``target_metric`` is
482+``user_input``. Note that users should further write
436483 ``commit_schemes_quota_goals`` to the ``state`` file of the :ref:`kdamond
437484 directory <sysfs_kdamond>` to pass the feedback to DAMON.
438485
@@ -447,7 +494,7 @@ given DAMON-based operation scheme. · 8 unmodified lines
447494 Under the watermarks directory, five files (``metric``, ``interval_us``,
448495 ``high``, ``mid``, and ``low``) for setting the metric, the time interval
449496 between check of the metric, and the three watermarks exist. You can set and
450−get the five values by writing to the files, respectively.
497+get the five values by writing to and reading from the files, respectively.
451498
452499 Keywords and meanings of those that can be written to the ``metric`` file are
453500 as below.
@@ -455,7 +502,7 @@ as below. · 1 unmodified line
455502 - none: Ignore the watermarks
456503 - free_mem_rate: System's free memory rate (per thousand)
457504
458−The ``interval`` should written in microseconds unit.
505+The ``interval_us`` should be written in microseconds unit.
459506
460507 .. _sysfs_filters:
461508
@@ -471,10 +518,10 @@ directory can be used for installing filters regardless of their handled · 9 unmodified lines
471518 layers. Filters that requested by ``core_filters`` and ``ops_filters`` will be
472519 installed before those of ``filters``. All three directories have same files.
473520
474−Use of ``filters`` directory can make expecting evaluation orders of given
475−filters with the files under directory bit confusing. Users are hence
476−recommended to use ``core_filters`` and ``ops_filters`` directories. The
477−``filters`` directory could be deprecated in future.
521+Use of ``filters`` directory can make filters evaluation orders confusing to
522+expect. For this reason, ``filters`` directory is deprecated. It is still
523+functioning, but is scheduled for removal in the near future. Users should use
524+``core_filters`` and ``ops_filters`` directories instead.
478525
479526 In the beginning, the directory has only one file, ``nr_filters``. Writing a
480527 number (``N``) to the file creates the number of child directories named ``0``
@@ -483,9 +530,9 @@ in the numeric order. · 2 unmodified lines
483530
484531 Each filter directory contains nine files, namely ``type``, ``matching``,
485532 ``allow``, ``memcg_path``, ``addr_start``, ``addr_end``, ``min``, ``max``
486−and ``target_idx``. To ``type`` file, you can write the type of the filter.
487−Refer to :ref:`the design doc <damon_design_damos_filters>` for available type
488−names, their meaning and on what layer those are handled.
533+and ``damon_target_idx``. To ``type`` file, you can write the type of the
534+filter. Refer to :ref:`the design doc <damon_design_damos_filters>` for
535+available type names, their meaning and on what layer those are handled.
489536
490537 For ``memcg`` type, you can specify the memory cgroup of the interest by
491538 writing the path of the memory cgroup from the cgroups mount point to
@@ -495,7 +542,7 @@ files, respectively. For ``hugepage_size`` type, you can specify the minimum · 3 unmodified lines
495542 and maximum size of the range (closed interval) to ``min`` and ``max`` files,
496543 respectively. For ``target`` type, you can specify the index of the target
497544 between the list of the DAMON context's monitoring targets list to
498−``target_idx`` file.
545+``damon_target_idx`` file.
499546
500547 You can write ``Y`` or ``N`` to ``matching`` file to specify whether the filter
501548 is for memory that matches the ``type``. You can write ``Y`` or ``N`` to
@@ -601,10 +648,19 @@ tried_regions/<N>/ · 99 unmodified lines
601648 ------------------
602649
603650 In each region directory, you will find five files (``start``, ``end``,
604−``nr_accesses``, ``age``, and ``sz_filter_passed``). Reading the files will
651+``nr_accesses``, ``age`` and ``sz_filter_passed``). Reading the files will
605652 show the properties of the region that corresponding DAMON-based operation
606653 scheme ``action`` has tried to be applied.
607654
655+tried_regions/<N>/probes/
656+-------------------------
657+
658+In each region directory, one directory (``probes``) also exists. In the
659+directory, subdirectories named ``0`` to ``N-1`` exists. ``N`` is the number
660+of installed probes. In each number-named directory, a file (``hits``) exist.
661+Reading the file shows the number of data attributes monitoring probe-hit
662+positive samples of the region.
663+
608664 Example
609665 ~~~~~~~
610666
@@ -677,7 +733,7 @@ show results using tracepoint supporting tools like ``perf``. For example:: · 66 unmodified lines
677733
678734 Each line of the perf script output represents each monitoring region. The
679735 first five fields are as usual other tracepoint outputs. The sixth field
680−(``target_id=X``) shows the ide of the monitoring target of the region. The
736+(``target_id=X``) shows the id of the monitoring target of the region. The
681737 seventh field (``nr_regions=X``) shows the total number of monitoring regions
682738 for the target. The eighth field (``X-Y:``) shows the start (``X``) and end
683739 (``Y``) addresses of the region in bytes. The ninth field (``X``) shows the
Documentation/admin-guide/mm/hugetlbpage.rst+6−9
@@ -455,7 +455,7 @@ used to change the file attributes on hugetlbfs. · 454 unmodified lines
455455 Also, it is important to note that no such mount command is required if
456456 applications are going to use only shmat/shmget system calls or mmap with
457457 MAP_HUGETLB. For an example of how to use mmap with MAP_HUGETLB see
458−:ref:`map_hugetlb <map_hugetlb>` below.
458+:ref:`examples <examples>` below.
459459
460460 Users who wish to use hugetlb memory via shared memory segment should be
461461 members of a supplementary group and system admin needs to configure that gid
@@ -473,16 +473,13 @@ a hugetlb page and the length is smaller than the hugepage size. · 11 unmodified lines
473473 Examples
474474 ========
475475
476−.. _map_hugetlb:
476+.. _examples:
477477
478−``map_hugetlb``
479− see tools/testing/selftests/mm/map_hugetlb.c
478+``hugetlb-shm``
479+ see tools/testing/selftests/mm/hugetlb-shm.c
480480
481−``hugepage-shm``
482− see tools/testing/selftests/mm/hugepage-shm.c
483−
484−``hugepage-mmap``
485− see tools/testing/selftests/mm/hugepage-mmap.c
481+``hugetlb-mmap``
482+ see tools/testing/selftests/mm/hugetlb-mmap.c
486483
487484 The `libhugetlbfs`_ library provides a wide range of userspace tools
488485 to help with huge page usability, environment setup, and control.
Documentation/admin-guide/mm/transhuge.rst+56−19
@@ -57,13 +57,14 @@ prominent because the size of each page isn't as huge as the PMD-sized · 56 unmodified lines
5757 variant and there is less memory to clear in each page fault. Some
5858 architectures also employ TLB compression mechanisms to squeeze more
5959 entries in when a set of PTEs are virtually and physically contiguous
60−and approporiately aligned. In this case, TLB misses will occur less
60+and appropriately aligned. In this case, TLB misses will occur less
6161 often.
6262
6363 THP can be enabled system wide or restricted to certain tasks or even
6464 memory ranges inside task's address space. Unless THP is completely
6565 disabled, there is ``khugepaged`` daemon that scans memory and
66−collapses sequences of basic pages into PMD-sized huge pages.
66+collapses sequences of basic pages into huge pages of either PMD size
67+or mTHP sizes, if the system is configured to do so.
6768
6869 The THP behaviour is controlled via :ref:`sysfs <thp_sysfs>`
6970 interface and using madvise(2) and prctl(2) system calls.
@@ -210,7 +211,7 @@ PMD-mappable transparent hugepage:: · 140 unmodified lines
210211 cat /sys/kernel/mm/transparent_hugepage/hpage_pmd_size
211212
212213 All THPs at fault and collapse time will be added to _deferred_list,
213−and will therefore be split under memory presure if they are considered
214+and will therefore be split under memory pressure if they are considered
214215 "underused". A THP is underused if the number of zero-filled pages in
215216 the THP is above max_ptes_none (see below). It is possible to disable
216217 this behaviour by writing 0 to shrink_underused, and enable it by writing
@@ -219,10 +220,10 @@ this behaviour by writing 0 to shrink_underused, and enable it by writing · 2 unmodified lines
219220 echo 0 > /sys/kernel/mm/transparent_hugepage/shrink_underused
220221 echo 1 > /sys/kernel/mm/transparent_hugepage/shrink_underused
221222
222−khugepaged will be automatically started when PMD-sized THP is enabled
223+khugepaged will be automatically started when any THP size is enabled
223224 (either of the per-size anon control or the top-level control are set
224225 to "always" or "madvise"), and it'll be automatically shutdown when
225−PMD-sized THP is disabled (when both the per-size anon control and the
226+all THP sizes are disabled (when both the per-size anon control and the
226227 top-level control are "never")
227228
228229 process THP controls
@@ -265,8 +266,8 @@ Khugepaged controls · 36 unmodified lines
265266 -------------------
266267
267268 .. note::
268− khugepaged currently only searches for opportunities to collapse to
269− PMD-sized THP and no attempt is made to collapse to other THP
269+ khugepaged currently only searches for opportunities to collapse file/shmem
270+ to PMD-sized THP. Only anonymous memory will attempt to collapse to other THP
270271 sizes.
271272
272273 khugepaged runs usually at low frequency so while one may not want to
@@ -296,11 +297,11 @@ allocation failure to throttle the next allocation attempt:: · 23 unmodified lines
296297 The khugepaged progress can be seen in the number of pages collapsed (note
297298 that this counter may not be an exact count of the number of pages
298299 collapsed, since "collapsed" could mean multiple things: (1) A PTE mapping
299−being replaced by a PMD mapping, or (2) All 4K physical pages replaced by
300−one 2M hugepage. Each may happen independently, or together, depending on
301−the type of memory and the failures that occur. As such, this value should
302−be interpreted roughly as a sign of progress, and counters in /proc/vmstat
303−consulted for more accurate accounting)::
300+being replaced by a PMD mapping, or (2) physical pages replaced by one
301+hugepage of various sizes (PMD-sized or mTHP). Each may happen independently,
302+or together, depending on the type of memory and the failures that occur.
303+As such, this value should be interpreted roughly as a sign of progress,
304+and counters in /proc/vmstat consulted for more accurate accounting)::
304305
305306 /sys/kernel/mm/transparent_hugepage/khugepaged/pages_collapsed
306307
@@ -308,16 +309,21 @@ for each pass:: · 1 unmodified line
308309
309310 /sys/kernel/mm/transparent_hugepage/khugepaged/full_scans
310311
311−``max_ptes_none`` specifies how many extra small pages (that are
312−not already mapped) can be allocated when collapsing a group
313−of small pages into one large page::
312+``max_ptes_none`` specifies how many empty (none/zero) pages are allowed
313+when collapsing a group of small pages into one large page::
314314
315315 /sys/kernel/mm/transparent_hugepage/khugepaged/max_ptes_none
316316
317−A higher value leads to use additional memory for programs.
318−A lower value leads to gain less thp performance. Value of
319−max_ptes_none can waste cpu time very little, you can
320−ignore it.
317+For PMD-sized THP collapse, this directly limits the number of empty pages
318+allowed in the 2MB region.
319+
320+For mTHP collapse, only 0 or (HPAGE_PMD_NR - 1) are supported. At
321+HPAGE_PMD_NR - 1, we collapse to the highest possible order. Any intermediate
322+value will emit a warning and mTHP collapse will default to max_ptes_none=0.
323+
324+A higher value allows more empty pages, potentially leading to more memory
325+usage but better THP performance. A lower value is more conservative and
326+may result in fewer THP collapses.
321327
322328 ``max_ptes_swap`` specifies how many pages can be brought in from
323329 swap when collapsing a group of pages into a transparent huge page::
@@ -337,6 +343,15 @@ that THP is shared. Exceeding the number would block the collapse:: · 13 unmodified lines
337343
338344 A higher value may increase memory footprint for some workloads.
339345
346+.. note::
347+ For mTHP collapse, khugepaged does not support collapsing regions that
348+ contain shared or swapped out pages, as this could lead to continuous
349+ promotion to higher orders. The collapse will fail if any shared or
350+ swapped PTEs are encountered during the scan.
351+
352+ Currently, madvise_collapse only supports collapsing to PMD-sized THPs
353+ and does not attempt mTHP collapses.
354+
340355 Boot parameters
341356 ===============
342357
@@ -639,6 +654,14 @@ anon_fault_fallback_charge · 296 unmodified lines
639654 instead falls back to using huge pages with lower orders or
640655 small pages even though the allocation was successful.
641656
657+collapse_alloc
658+ is incremented every time a huge page is successfully allocated for a
659+ khugepaged collapse.
660+
661+collapse_alloc_failed
662+ is incremented every time a huge page allocation fails during a
663+ khugepaged collapse.
664+
642665 zswpout
643666 is incremented every time a huge page is swapped out to zswap in one
644667 piece without splitting.
@@ -706,6 +729,20 @@ nr_anon_partially_mapped · 61 unmodified lines
706729 an anonymous THP as "partially mapped" and count it here, even though it
707730 is not actually partially mapped anymore.
708731
732+collapse_exceed_none_pte
733+ The number of collapse attempts that failed due to exceeding the
734+ max_ptes_none threshold.
735+
736+collapse_exceed_swap_pte
737+ The number of collapse attempts that failed due to exceeding the
738+ max_ptes_swap threshold. For non-PMD orders this occurs if a mTHP range
739+ contains at least one swap PTE.
740+
741+collapse_exceed_shared_pte
742+ The number of collapse attempts that failed due to exceeding the
743+ max_ptes_shared threshold. For non-PMD orders this occurs if a mTHP range
744+ contains at least one shared PTE.
745+
709746 As the system ages, allocating huge pages may be expensive as the
710747 system uses memory compaction to copy data around memory to free a
711748 huge page for use. There are some counters in ``/proc/vmstat`` to help
Documentation/admin-guide/pm/amd-pstate.rst+5−6
@@ -358,9 +358,9 @@ Dynamic energy performance profile · 357 unmodified lines
358358 The amd-pstate driver supports dynamically selecting the energy performance
359359 profile based on whether the machine is running on AC or DC power.
360360
361−Whether this behavior is enabled by default depends on the kernel
362−config option `CONFIG_X86_AMD_PSTATE_DYNAMIC_EPP`. This behavior can also be overridden
363−at runtime by the sysfs file ``/sys/devices/system/cpu/cpufreq/policyX/dynamic_epp``.
361+Whether this behavior is enabled by default depends on the kernel command line option
362+``amd_dynamic_epp`` is set. This behavior can also be overridden
363+at runtime by the sysfs file ``/sys/devices/system/cpu/amd_pstate/dynamic_epp``.
364364
365365 When set to enabled, the driver will select a different energy performance
366366 profile when the machine is running on battery or AC power. The driver will
@@ -485,9 +485,8 @@ kernel parameter ``amd_prefcore=disable``. · 118 unmodified lines
485485 ``amd_dynamic_epp``
486486
487487 When AMD pstate is in auto mode, dynamic EPP will control whether the kernel
488−autonomously changes the EPP mode. The default is configured by
489−``CONFIG_X86_AMD_PSTATE_DYNAMIC_EPP`` but can be explicitly enabled with
490−``amd_dynamic_epp=enable`` or disabled with ``amd_dynamic_epp=disable``.
488+autonomously changes the EPP mode. The default is disabled. It can be enabled
489+with the kernel parameter ``amd_dynamic_epp=enable``.
491490
492491 User Space Interface in ``sysfs`` - General
493492 ===========================================
Documentation/admin-guide/pm/cpufreq.rst+3−3
@@ -516,7 +516,7 @@ This governor exposes the following tunables: · 515 unmodified lines
516516 of those tasks above 0 and set this attribute to 1.
517517
518518 ``sampling_down_factor``
519− Temporary multiplier, between 1 (default) and 100 inclusive, to apply to
519+ Temporary multiplier, between 1 (default) and 100000 inclusive, to apply to
520520 the ``sampling_rate`` value if the CPU load goes above ``up_threshold``.
521521
522522 This causes the next execution of the governor's worker routine (after
@@ -586,8 +586,8 @@ This governor exposes the following tunables: · 63 unmodified lines
586586 100 (5 by default).
587587
588588 This is how much the frequency is allowed to change in one go. Setting
589− it to 0 will cause the default frequency step (5 percent) to be used
590− and setting it to 100 effectively causes the governor to periodically
589+ it to 0 disables frequency changes by the governor entirely and setting
590+ it to 100 effectively causes the governor to periodically
591591 switch the frequency between the ``scaling_min_freq`` and
592592 ``scaling_max_freq`` policy limits.
593593
Documentation/admin-guide/pm/intel_pstate.rst+6−5
@@ -355,11 +355,12 @@ HyperThreading (HT) in the context of Intel processors, is enabled on at least · 354 unmodified lines
355355 one core, ``intel_pstate`` assigns performance-based priorities to CPUs. Namely,
356356 the priority of a given CPU reflects its highest HWP performance level which
357357 causes the CPU scheduler to generally prefer more performant CPUs, so the less
358−performant CPUs are used when the other ones are fully loaded. However, SMT
359−siblings (that is, logical CPUs sharing one physical core) are treated in a
360−special way such that if one of them is in use, the effective priority of the
361−other ones is lowered below the priorities of the CPUs located in the other
362−physical cores.
358+performant CPUs are used when the other ones are fully loaded. SMT siblings
359+(that is, logical CPUs sharing one physical core) are given the same priority.
360+The scheduler can pull tasks from lower-priority cores and place them on any
361+sibling. Since the scheduler spreads tasks among physical cores, tasks will be
362+placed on the SMT siblings of physical cores only after all physical cores are
363+busy.
363364
364365 This approach maximizes performance in the majority of cases, but unfortunately
365366 it also leads to excessive energy usage in some important scenarios, like video
Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst+7−0
@@ -88,8 +88,15 @@ and "fabric_cluster_id" in the directory. · 87 unmodified lines
8888
8989 Attributes in each directory:
9090
91+``instance_id``
92+ This attribute is used to get die indices in userspace mapped MMIO
93+ blocks. Indices are local to a single TPMI partition. Needed for direct
94+ TPMI register access.
95+
9196 ``domain_id``
9297 This attribute is used to get the power domain id of this instance.
98+ Indices are unique in all TPMI partitions on a given CPU package. Can be
99+ used to map compute dies to corresponding CPUs.
93100
94101 ``die_id``
95102 This attribute is used to get the Linux die id of this instance.
Documentation/admin-guide/quickly-build-trimmed-linux.rst+1−1
@@ -217,7 +217,7 @@ again. · 216 unmodified lines
217217
218218 There is a catch: 'localmodconfig' is likely to disable kernel features you
219219 did not use since you booted your Linux -- like drivers for currently
220− disconnected peripherals or a virtualization software not haven't used yet.
220+ disconnected peripherals or virtualization software not currently in use.
221221 You can reduce or nearly eliminate that risk with tricks the reference
222222 section outlines; but when building a kernel just for quick testing purposes
223223 it is often negligible if such features are missing. But you should keep that
Documentation/admin-guide/reporting-issues.rst+2−2
@@ -129,7 +129,7 @@ After these preparations you'll now enter the main part: · 128 unmodified lines
129129 situations; during the merge window that actually might be even the best
130130 approach, but in that development phase it can be an even better idea to
131131 suspend your efforts for a few days anyway. Whatever version you choose,
132− ideally use a 'vanilla' build. Ignoring these advices will dramatically
132+ ideally use a 'vanilla' build. Ignoring all of this advice will dramatically
133133 increase the risk your report will be rejected or ignored.
134134
135135 * Ensure the kernel you just installed does not 'taint' itself when
@@ -795,7 +795,7 @@ Install a fresh kernel for testing · 659 unmodified lines
795795 situations; during the merge window that actually might be even the best
796796 approach, but in that development phase it can be an even better idea to
797797 suspend your efforts for a few days anyway. Whatever version you choose,
798− ideally use a 'vanilla' built. Ignoring these advices will dramatically
798+ ideally use a 'vanilla' built. Ignoring all of this advice will dramatically
799799 increase the risk your report will be rejected or ignored.*
800800
801801 As mentioned in the detailed explanation for the first step already: Like most
Documentation/admin-guide/sysctl/net.rst+6−51
@@ -36,12 +36,11 @@ Table : Subdirectories in /proc/sys/net · 35 unmodified lines
3636 ========= =================== = ========== ===================
3737 802 E802 protocol mptcp Multipath TCP
3838 appletalk Appletalk protocol netfilter Network Filter
39− ax25 AX25 netrom NET/ROM
40− bridge Bridging rose X.25 PLP layer
41− core General parameter tipc TIPC
42− ethernet Ethernet protocol unix Unix domain sockets
43− ipv4 IP version 4 vsock VSOCK sockets
44− ipv6 IP version 6 x25 X.25 protocol
39+ bridge Bridging tipc TIPC
40+ core General parameter unix Unix domain sockets
41+ ethernet Ethernet protocol vsock VSOCK sockets
42+ ipv4 IP version 4 x25 X.25 protocol
43+ ipv6 IP version 6
4544 ========= =================== = ========== ===================
4645
4746 1. /proc/sys/net/core - Network core options
@@ -475,51 +474,7 @@ Please see: Documentation/networking/ip-sysctl.rst and · 427 unmodified lines
475474 Documentation/admin-guide/sysctl/net.rst for descriptions of these entries.
476475
477476
478−4. Appletalk
479−------------
480−
481−The /proc/sys/net/appletalk directory holds the Appletalk configuration data
482−when Appletalk is loaded. The configurable parameters are:
483−
484−aarp-expiry-time
485−----------------
486−
487−The amount of time we keep an ARP entry before expiring it. Used to age out
488−old hosts.
489−
490−aarp-resolve-time
491−-----------------
492−
493−The amount of time we will spend trying to resolve an Appletalk address.
494−
495−aarp-retransmit-limit
496−---------------------
497−
498−The number of times we will retransmit a query before giving up.
499−
500−aarp-tick-time
501−--------------
502−
503−Controls the rate at which expires are checked.
504−
505−The directory /proc/net/appletalk holds the list of active Appletalk sockets
506−on a machine.
507−
508−The fields indicate the DDP type, the local address (in network:node format)
509−the remote address, the size of the transmit pending queue, the size of the
510−received queue (bytes waiting for applications to read) the state and the uid
511−owning the socket.
512−
513−/proc/net/atalk_iface lists all the interfaces configured for appletalk.It
514−shows the name of the interface, its Appletalk address, the network range on
515−that address (or network number for phase 1 networks), and the status of the
516−interface.
517−
518−/proc/net/atalk_route lists each known network route. It lists the target
519−(network) that the route leads to, the router (may be directly connected), the
520−route flags, and the device the route is using.
521−
522−5. TIPC
477+4. TIPC
523478 -------
524479
525480 tipc_rmem
Documentation/admin-guide/sysctl/vm.rst+2−0
@@ -1034,6 +1034,8 @@ min(3% of current process size, user_reserve_kbytes) of free memory. · 1033 unmodified lines
10341034 This is intended to prevent a user from starting a single memory hogging
10351035 process, such that they cannot recover (kill the hog).
10361036
1037+This setting has no effect when overcommit_memory is set to 0 or 1.
1038+
10371039 user_reserve_kbytes defaults to min(3% of the current process size, 128MB).
10381040
10391041 If this is reduced to zero, then the user will be allowed to allocate
Documentation/admin-guide/thunderbolt.rst+61−0
@@ -373,6 +373,67 @@ port which are named like ``thunderbolt0`` and so on. From this point · 372 unmodified lines
373373 you can either use standard userspace tools like ``ip`` to
374374 configure the interface or let your GUI handle it automatically.
375375
376+Streaming data directly over Thunderbolt cable
377+----------------------------------------------
378+In addition to Thunderbolt networking (aka. USB4NET) Linux supports
379+streaming data directly over a cable as well (aka. USB4STREAM). This is
380+possible through ``thunderbolt-stream`` driver.
381+
382+Similarly to ``thunderbolt-net`` you load the driver first on one end::
383+
384+ host1 # modprobe thunderbolt-stream
385+
386+Then you configure it via ``ConfigFS``::
387+
388+ host1 # cd /sys/kernel/config/thunderbolt/stream
389+ host1 # mkdir -p 0-1.0/data
390+ host1 # cd 0-1.0
391+ host1 # echo -1 > data/in_hopid
392+ host1 # echo -1 > data/out_hopid
393+
394+This information is automatically announced to the other side via
395+XDomain properties so if you have cable connected the other side knows
396+that there is a stream named ``data`` available and can configure it for
397+you automatically::
398+
399+ host2 # cd /sys/kernel/config/thunderbolt/stream
400+ host2 # mkdir -p 0-3.0/data
401+
402+Here we used auto-configuration but you can configure it manually too.
403+In that case you need to fill ``in_hopid`` and ``out_hopid`` accordingly.
404+If you set them to ``-1`` the next available HopID is used which is
405+typically what we want.
406+
407+Once they are configured you can use ``/dev/tbstreamX`` on both sides to
408+transfer data::
409+
410+ host2 # cat /dev/tbstream0
411+ host1 # dmesg > /dev/tbstream0
412+
413+Once you are done with the stream you can remove them::
414+
415+ host2 # cd /sys/kernel/config/thunderbolt/stream
416+ host2 # rmdir -p 0-1.0/data
417+ host1 # cd /sys/kernel/config/thunderbolt/stream
418+ host1 # rmdir -p 0-3.0/data
419+
420+Since streams are essentially files you can use any existing application
421+that supports ``read(2)`` and ``write(2)`` in some form.
422+
423+It is possible to have more than one stream and you can have both stream
424+and ``thunderbolt-net`` in use simultaneously. For example we can create
425+two streams with name ``control`` and ``data`` like this::
426+
427+ host1 # cd /sys/kernel/config/thunderbolt/stream
428+ host1 # mkdir 0-1.0
429+ host1 # cd 0-1.0
430+ host1 # mkdir control
431+ host1 # mkdir data
432+
433+Then you have ``/dev/tbstream0`` for ``control`` and ``/dev/tbstream1``
434+for ``data``. Before you can use them you need to configure them as
435+shown above for the one stream case.
436+
376437 Forcing power
377438 -------------
378439 Many OEMs include a method that can be used to force the power of a
Documentation/admin-guide/workload-tracing.rst+29−12
@@ -202,6 +202,15 @@ database. To get out of this mode press ctrl+d. -p option is used to · 201 unmodified lines
202202 specify the number of file path components to display. -p10 is optimal
203203 for browsing kernel sources.
204204
205+Alternatively, the kernel build system can generate the cscope database::
206+
207+ make cscope
208+
209+To exclude directories from the generated database, pass IGNORE_DIRS to
210+the cscope target. For example, to exclude Documentation/, run::
211+
212+ make IGNORE_DIRS="Documentation" cscope
213+
205214 What is perf and how do we use it?
206215 ==================================
207216
@@ -243,13 +252,21 @@ which can help mitigate performance regressions. It also acts as a common · 35 unmodified lines
243252 benchmarking framework, enabling developers to easily create test cases,
244253 integrate transparently, and use performance-rich tooling.
245254
246−"perf bench all" command runs the following benchmarks:
255+"perf bench all" runs all available benchmarks in the perf bench
256+framework. The exact set of benchmarks depends on the perf version and on
257+the features enabled when perf was built.
258+
259+To list the benchmark collections available on the current system, run::
260+
261+ perf bench
262+
263+To list benchmarks in a collection, run::
264+
265+ perf bench <collection>
266+
267+For example, to list the benchmarks in the mem collection, run::
247268
248− * sched/messaging
249− * sched/pipe
250− * syscall/basic
251− * mem/memcpy
252− * mem/memset
269+ perf bench mem
253270
254271 What is stress-ng and how do we use it?
255272 =======================================
@@ -271,17 +288,17 @@ exercised: · 15 unmodified lines
271288
272289 The following command runs the stressor::
273290
274− stress-ng --netdev 1 -t 60 --metrics command.
291+ stress-ng --netdev 1 -t 60 --metrics
275292
276293 We can use the perf record command to record the events and information
277294 associated with a process. This command records the profiling data in the
278295 perf.data file in the same directory.
279296
280297 Using the following commands you can record the events associated with the
281−netdev stressor, view the generated report perf.data and annotate the to
282−view the statistics of each instruction of the program::
298+netdev stressor, view the generated report perf.data and annotate the output
299+to view the statistics of each instruction of the program::
283300
284− perf record stress-ng --netdev 1 -t 60 --metrics command.
301+ perf record -- stress-ng --netdev 1 -t 60 --metrics
285302 perf report
286303 perf annotate
287304
@@ -349,13 +366,13 @@ times each system call is invoked, and the corresponding Linux subsystem. · 61 unmodified lines
349366 +-------------------+-----------+-----------------+-------------------------+
350367 | geteuid | 1 | Process Mgmt. | sys_geteuid() |
351368 +-------------------+-----------+-----------------+-------------------------+
352−| getegid | 1 | Process Mgmt. | sys_getegid |
369+| getegid | 1 | Process Mgmt. | sys_getegid() |
353370 +-------------------+-----------+-----------------+-------------------------+
354371 | close | 49951 | Filesystem | sys_close() |
355372 +-------------------+-----------+-----------------+-------------------------+
356373 | pipe | 604 | Filesystem | sys_pipe() |
357374 +-------------------+-----------+-----------------+-------------------------+
358−| openat | 48560 | Filesystem | sys_opennat() |
375+| openat | 48560 | Filesystem | sys_openat() |
359376 +-------------------+-----------+-----------------+-------------------------+
360377 | fstat | 8338 | Filesystem | sys_fstat() |
361378 +-------------------+-----------+-----------------+-------------------------+
Documentation/arch/arc/arc.rst+1−1
@@ -36,7 +36,7 @@ Important note on ARC processors configurability · 35 unmodified lines
3636
3737 ARC processors are highly configurable and several configurable options
3838 are supported in Linux. Some options are transparent to software
39−(i.e cache geometries, some can be detected at runtime and configured
39+(e.g., cache geometries), some can be detected at runtime and configured
4040 and used accordingly, while some need to be explicitly selected or configured
4141 in the kernel's configuration utility (AKA "make menuconfig").
4242
Documentation/arch/arm/index.rst+2−0
@@ -75,3 +75,5 @@ SoC-specific documents · 74 unmodified lines
7575 sti/overview
7676
7777 vfp/release-notes
78+
79+ zte/index
Documentation/arch/arm/kernel_mode_neon.rst+3−1
@@ -121,4 +121,6 @@ observe the following in addition to the rules above: · 120 unmodified lines
121121 * Compile the unit containing the NEON intrinsics with '-ffreestanding' so GCC
122122 uses its builtin version of <stdint.h> (this is a C99 header which the kernel
123123 does not supply);
124−* Include <arm_neon.h> last, or at least after <linux/types.h>
124+* Do not include <arm_neon.h> directly: instead, include <asm/neon-intrinsics.h>,
125+ which tweaks some macro definitions so that system headers can be included
126+ safely.
Documentation/arch/arm/omap/dss.rst+1−1
@@ -314,7 +314,7 @@ Kernel boot arguments · 313 unmodified lines
314314
315315 omapfb.mode=<display>:<mode>[,...]
316316 - Default video mode for specified displays. For example,
317− "dvi:800x400MR-24@60". See drivers/video/modedb.c.
317+ "dvi:800x400MR-24@60". See drivers/video/fbdev/core/modedb.c.
318318 There are also two special modes: "pal" and "ntsc" that
319319 can be used to tv out.
320320
Documentation/arch/arm/samsung/clksrc-change-registers.awk+1−1
@@ -163,4 +163,4 @@ BEGIN { · 162 unmodified lines
163163 }
164164 }
165165
166−// && ! /clksrc_clk.*=.*{/ { print $0 }
166+// && ! /clksrc_clk.*=.*{/ { print $0 }}
Documentation/arch/arm/vlocks.rst+2−2
@@ -102,10 +102,10 @@ Features and limitations · 101 unmodified lines
102102 if (I_won) {
103103 /* we won the town election, let's go for the state */
104104 my_state = states[(this_cpu >> 8) & 0xf];
105− I_won = vlock_lock(my_state, this_cpu & 0xf));
105+ I_won = vlock_lock(my_state, this_cpu & 0xf);
106106 if (I_won) {
107107 /* and so on */
108− I_won = vlock_lock(the_whole_country, this_cpu & 0xf];
108+ I_won = vlock_lock(the_whole_country, this_cpu & 0xf);
109109 if (I_won) {
110110 /* ... */
111111 }
Documentation/arch/arm/zte/index.rst+10−0
@@ -0,0 +1,10 @@
1+.. SPDX-License-Identifier: GPL-2.0-only
2+
3+=======
4+ZTE SoC
5+=======
6+
7+.. toctree::
8+ :maxdepth: 1
9+
10+ zx297520v3
Documentation/arch/arm/zte/zx297520v3.rst+166−0
@@ -0,0 +1,166 @@
1+.. SPDX-License-Identifier: GPL-2.0-only
2+
3+====================================
4+Booting Linux on ZTE zx297520v3 SoCs
5+====================================
6+
7+Author: Stefan Dösinger
8+
9+Date : 27 Jan 2026
10+
11+1. Hardware description
12+---------------------------
13+Zx297520v3 SoCs use a 64-bit capable Cortex-A53 CPU and GICv3, although they
14+run in arm32 mode only. The CPU has support EL3, but no hypervisor (EL2) and
15+it seems to lack VFP and NEON.
16+
17+The SoC is used in a number of cheap LTE to WiFi routers, both battery powered
18+MiFis and stationary CPEs. In addition to the CPU these devices usually have
19+64 MB Ram (although some is shared with the LTE chip), 128 MB NAND flash, an
20+SDIO connected RTL8192-type Wifi chip limited to 2.4 ghz operation, USB 2,
21+and buttons. Devices with as low as 32 MB or as high as 128 MB ram exist, as
22+do devices with 8 or 16 MB of NOR flash.
23+
24+Some devices, especially the stationary ones, have 100 mbit Ethernet and an
25+Ethernet switch.
26+
27+Usually the devices have LEDs for status indication, although some have SPI or
28+I2C connected displays.
29+
30+Some have an SD card slot. If it exists, it is a better choice for the root
31+file system because it easily outperforms the built-in NAND.
32+
33+The LTE interface runs on a separate DSP called ZSP880. It is probably derived
34+from LSI ZSPs and has an undocumented instruction set. The ZSP communicates
35+with the main CPU via SRAM and DRAM and a mailbox hardware that can generate
36+IRQs on either ends.
37+
38+There is also a Cortex M0 CPU, which is responsible for early HW initialization
39+and starting the Cortex A53 CPU. It does not have any essential purpose once
40+U-Boot is started. An SRAM-based handover protocol exists to run custom code on
41+this CPU.
42+
43+2. Booting via USB
44+---------------------------
45+
46+The Boot ROM has support for booting custom code via USB. This mode can be
47+entered by connecting a Boot PIN to GND or by modifying the third byte on NAND
48+(set it to anything other than 0x5A aka 'Z'). A free software tool to start
49+custom U-Boot and kernels can be found here:
50+
51+https://github.com/zx297520v3-mainline/zx297520v3-loader
52+
53+If USB download mode is entered but no boot commands are sent through USB, the
54+device will proceed to boot normally after a few seconds. It is therefore
55+possible to enable USB boot permanently and still leave the default boot files
56+in place.
57+
58+https://github.com/zx297520v3-mainline/u-boot-mainline
59+
60+Contains an U-Boot version that can be used with the USB loader and sets up the
61+CPU and interrupt controller to comply with Linux's booting requirements.
62+
63+3. Building for built-in U-Boot
64+-------------------------------
65+The devices come with an ancient U-Boot that loads legacy uImages from NAND and
66+boots them without a chance for the user to interrupt. The images are stored in
67+files ap_cpuap.bin and ap_recovery.bin on a jffs2 partition named imagefs,
68+usually mtd4. A file named "fotaflag" switches between the two modes.
69+
70+In addition to the uImage header, those files have a 384-byte signature header,
71+which is used for authenticating the images on some devices. Most devices have
72+this authentication disabled and it is enough to pad the uImage files with 384
73+zero bytes.
74+
75+Builtin U-Boot also poorly sets up the CPU. Read the next section for details
76+on this. It has no support for loading DTBs, so CONFIG_ARM_APPENDED_DTB is
77+needed.
78+
79+So to build an image that boots from NAND the following steps are necessary:
80+
81+1) Patch the assembly code from section 3 into arch/arm/kernel/head.S.
82+2) make zx29_defconfig
83+3) make [-j x]
84+4) cat arch/arm/boot/zImage arch/arm/boot/dts/zte/[device].dtb > kernel+dtb
85+5) mkimage -A arm -O linux -T kernel -C none -a 0x20008000 -d kernel+dtb uimg
86+6) dd if=/dev/zero bs=1 count=384 of=ap_recovery.bin
87+7) cat uimg >> ap_recovery.bin
88+8) Place this file onto imagefs on the device. Delete ap_cpuap.bin if the
89+ free space is not enough.
90+9) Create the file fotaflag: echo -n FOTA-RECOVERY > fotaflag
91+
92+For development, booting ap_recovery.bin is recommended because the normal boot
93+mode arms the watchdog before starting the kernel.
94+
95+4. CPU and GIC Setup
96+---------------------------
97+
98+Generally CPU and GICv3 need to be set up according to the requirements spelled
99+out in Documentation/arch/arm64/booting.rst. For zx297520v3 this means:
100+
101+1. GICD_CTLR.DS=1 to disable GIC security
102+2. Enable access to ICC_SRE
103+3. Disable trapping IRQs into monitor mode
104+4. Configure EL2 and below to run in insecure mode.
105+5. Configure timer PPIs to active-low.
106+
107+The kernel sources provided by ZTE do not boot either (interrupts do not work
108+at all). They are incomplete in other aspects too, so it is assumed that there
109+is some workaround similar to the one described in this document somewhere in
110+the binary blobs.
111+
112+The assembly code below is given as an example of how to achieve this:
113+
114+::
115+
116+ #include <linux/irqchip/arm-gic-v3.h>
117+ #include <asm/assembler.h>
118+ #include <asm/cp15.h>
119+
120+ @ Detect sane bootloaders and skip the hack
121+ ldr r3, =0xf2000000
122+ ldr r3, [r3]
123+ ldr r4, =(GICD_CTLR_ARE_NS | GICD_CTLR_DS)
124+ cmp r3, r4
125+ beq skip_zx_hack
126+ @ This allows EL1 to handle ints hat are normally handled by EL2/3.
127+ ldr r3, =0xf2000000
128+ str r4, [r3]
129+
130+ cps #MON_MODE
131+
132+ @ Work in non-secure physical address space: SCR_EL3.NS = 1. At least the UART
133+ @ seems to respond only to non-secure addresses. I have taken insipiration from
134+ @ Raspberry pi's armstub7.S here.
135+ mov r3, #0x131 @ non-secure, Make F, A bits in CPSR writeable
136+ @ Allow hypervisor call.
137+ mcr p15, 0, r3, c1, c1, 0
138+
139+ @ AP_PPI_MODE_REG: Configure timer PPIs (10, 11, 13, 14) to active-low.
140+ ldr r3, =0xF22020a8
141+ ldr r4, =0x50
142+ str r4, [r3]
143+ ldr r3, =0xF22020ac
144+ ldr r4, =0x14
145+ str r4, [r3]
146+
147+ @ Enable EL2 access to ICC_SRE (bit 3, ICC_SRE_EL3.Enable). Enable system reg
148+ @ access to GICv3 registers (bit 0, ICC_SRE_EL3.SRE) for EL1 and EL3.
149+ mrc p15, 6, r3, c12, c12, 5 @ ICC_SRE_EL3
150+ orr r3, #0x9 @ FIXME: No defines for SRE_EL3 values?
151+ mcr p15, 6, r3, c12, c12, 5
152+ mrc p15, 0, r3, c12, c12, 5 @ ICC_SRE_EL1
153+ orr r3, #(ICC_SRE_EL1_SRE)
154+ mcr p15, 0, r3, c12, c12, 5
155+
156+ @ Like ICC_SRE_EL3, enable EL1 access to ICC_SRE and system register access
157+ @ for EL2.
158+ mrc p15, 4, r3, c12, c9, 5 @ ICC_SRE_EL2 aka ICC_HSRE
159+ orr r3, r3, #(ICC_SRE_EL2_ENABLE | ICC_SRE_EL2_SRE)
160+ mcr p15, 4, r3, c12, c9, 5
161+ isb
162+
163+ @ Back to SVC mode
164+ cps #SVC_MODE
165+ skip_zx_hack:
166+
Documentation/arch/arm64/elf_hwcaps.rst+27−0
@@ -451,6 +451,33 @@ HWCAP3_LS64 · 450 unmodified lines
451451 of CPU. User should only use ld64b/st64b on supported target (device)
452452 memory location, otherwise fallback to the non-atomic alternatives.
453453
454+HWCAP3_SVE_B16MM
455+ Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
456+ ID_AA64ZFR0_EL1.B16B16 == 0b0011
457+
458+HWCAP3_SVE2P3
459+ Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
460+ ID_AA64ZFR0_EL1.SVEver == 0b0100
461+
462+HWCAP3_SME_LUT6
463+ Functionality implied by ID_AA64SMFR0_EL1.LUT6 == 0b1
464+
465+HWCAP3_SME2P3
466+ Functionality implied by ID_AA64SMFR0_EL1.SMEver == 0b0100
467+
468+HWCAP3_F16MM
469+ Functionality implied by ID_AA64FPFR0_EL1.F16MM2 == 0b1
470+
471+HWCAP3_F16F32DOT
472+ Functionality implied by ID_AA64ISAR0_EL1.FHM == 0b0010
473+
474+HWCAP3_F16F32MM
475+ Functionality implied by ID_AA64ISAR0_EL1.FHM == 0b0011
476+
477+HWCAP3_SVE_LUT6
478+ Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
479+ ID_AA64ISAR2_EL1.LUT == 0b0010.
480+
454481
455482 4. Unused AT_HWCAP bits
456483 -----------------------
Documentation/arch/arm64/memory-tagging-extension.rst+1−1
@@ -222,7 +222,7 @@ programs should not retry in case of a non-zero system call return. · 221 unmodified lines
222222 address ABI control and MTE configuration of a process as per the
223223 ``prctl()`` options described in
224224 Documentation/arch/arm64/tagged-address-abi.rst and above. The corresponding
225−``regset`` is 1 element of 8 bytes (``sizeof(long))``).
225+``regset`` is 1 element of 8 bytes (``sizeof(long)``).
226226
227227 Core dump support
228228 -----------------
Documentation/arch/arm64/silicon-errata.rst+72−21
@@ -116,7 +116,8 @@ stable kernels. · 115 unmodified lines
116116 +----------------+-----------------+-----------------+-----------------------------+
117117 | ARM | Cortex-A73 | #858921 | ARM64_ERRATUM_858921 |
118118 +----------------+-----------------+-----------------+-----------------------------+
119−| ARM | Cortex-A76 | #1188873,1418040| ARM64_ERRATUM_1418040 |
119+| ARM | Cortex-A76 | #1188873, | ARM64_ERRATUM_1418040 |
120+| | | #1418040 | |
120121 +----------------+-----------------+-----------------+-----------------------------+
121122 | ARM | Cortex-A76 | #1165522 | ARM64_ERRATUM_1165522 |
122123 +----------------+-----------------+-----------------+-----------------------------+
@@ -128,15 +129,28 @@ stable kernels. · 5 unmodified lines
128129 +----------------+-----------------+-----------------+-----------------------------+
129130 | ARM | Cortex-A76 | #3324349 | ARM64_ERRATUM_3194386 |
130131 +----------------+-----------------+-----------------+-----------------------------+
132+| ARM | Cortex-A76 | #4193800 | ARM64_ERRATUM_4118414 |
133++----------------+-----------------+-----------------+-----------------------------+
134+| ARM | Cortex-A76AE | #4193801 | ARM64_ERRATUM_4118414 |
135++----------------+-----------------+-----------------+-----------------------------+
131136 | ARM | Cortex-A77 | #1491015 | N/A |
132137 +----------------+-----------------+-----------------+-----------------------------+
133138 | ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 |
134139 +----------------+-----------------+-----------------+-----------------------------+
135140 | ARM | Cortex-A77 | #3324348 | ARM64_ERRATUM_3194386 |
136141 +----------------+-----------------+-----------------+-----------------------------+
142+| ARM | Cortex-A77 | #4193798 | ARM64_ERRATUM_4118414 |
143++----------------+-----------------+-----------------+-----------------------------+
137144 | ARM | Cortex-A78 | #3324344 | ARM64_ERRATUM_3194386 |
138145 +----------------+-----------------+-----------------+-----------------------------+
139−| ARM | Cortex-A78C | #3324346,3324347| ARM64_ERRATUM_3194386 |
146+| ARM | Cortex-A78 | #4193791 | ARM64_ERRATUM_4118414 |
147++----------------+-----------------+-----------------+-----------------------------+
148+| ARM | Cortex-A78AE | #4193793 | ARM64_ERRATUM_4118414 |
149++----------------+-----------------+-----------------+-----------------------------+
150+| ARM | Cortex-A78C | #3324346, | ARM64_ERRATUM_3194386 |
151+| | | #3324347 | |
152++----------------+-----------------+-----------------+-----------------------------+
153+| ARM | Cortex-A78C | #4193794 | ARM64_ERRATUM_4118414 |
140154 +----------------+-----------------+-----------------+-----------------------------+
141155 | ARM | Cortex-A710 | #2119858 | ARM64_ERRATUM_2119858 |
142156 +----------------+-----------------+-----------------+-----------------------------+
@@ -146,6 +160,8 @@ stable kernels. · 3 unmodified lines
146160 +----------------+-----------------+-----------------+-----------------------------+
147161 | ARM | Cortex-A710 | #3324338 | ARM64_ERRATUM_3194386 |
148162 +----------------+-----------------+-----------------+-----------------------------+
163+| ARM | Cortex-A710 | #4193788 | ARM64_ERRATUM_4118414 |
164++----------------+-----------------+-----------------+-----------------------------+
149165 | ARM | Cortex-A715 | #2645198 | ARM64_ERRATUM_2645198 |
150166 +----------------+-----------------+-----------------+-----------------------------+
151167 | ARM | Cortex-A715 | #3456084 | ARM64_ERRATUM_3194386 |
@@ -158,30 +174,44 @@ stable kernels. · 6 unmodified lines
158174 +----------------+-----------------+-----------------+-----------------------------+
159175 | ARM | Cortex-X1 | #3324344 | ARM64_ERRATUM_3194386 |
160176 +----------------+-----------------+-----------------+-----------------------------+
177+| ARM | Cortex-X1 | #4193791 | ARM64_ERRATUM_4118414 |
178++----------------+-----------------+-----------------+-----------------------------+
161179 | ARM | Cortex-X1C | #3324346 | ARM64_ERRATUM_3194386 |
162180 +----------------+-----------------+-----------------+-----------------------------+
181+| ARM | Cortex-X1C | #4193792 | ARM64_ERRATUM_4118414 |
182++----------------+-----------------+-----------------+-----------------------------+
163183 | ARM | Cortex-X2 | #2119858 | ARM64_ERRATUM_2119858 |
164184 +----------------+-----------------+-----------------+-----------------------------+
165185 | ARM | Cortex-X2 | #2224489 | ARM64_ERRATUM_2224489 |
166186 +----------------+-----------------+-----------------+-----------------------------+
167187 | ARM | Cortex-X2 | #3324338 | ARM64_ERRATUM_3194386 |
168188 +----------------+-----------------+-----------------+-----------------------------+
189+| ARM | Cortex-X2 | #4193788 | ARM64_ERRATUM_4118414 |
190++----------------+-----------------+-----------------+-----------------------------+
169191 | ARM | Cortex-X3 | #3324335 | ARM64_ERRATUM_3194386 |
170192 +----------------+-----------------+-----------------+-----------------------------+
193+| ARM | Cortex-X3 | #4193786 | ARM64_ERRATUM_4118414 |
194++----------------+-----------------+-----------------+-----------------------------+
171195 | ARM | Cortex-X4 | #3194386 | ARM64_ERRATUM_3194386 |
172196 +----------------+-----------------+-----------------+-----------------------------+
197+| ARM | Cortex-X4 | #4118414 | ARM64_ERRATUM_4118414 |
198++----------------+-----------------+-----------------+-----------------------------+
173199 | ARM | Cortex-X925 | #3324334 | ARM64_ERRATUM_3194386 |
174200 +----------------+-----------------+-----------------+-----------------------------+
175−| ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 |
201+| ARM | Cortex-X925 | #4193781 | ARM64_ERRATUM_4118414 |
176202 +----------------+-----------------+-----------------+-----------------------------+
177−| ARM | Neoverse-N1 | #1349291 | N/A |
203+| ARM | Neoverse-N1 | #1188873, | ARM64_ERRATUM_1418040 |
204+| | | #1418040 | |
178205 +----------------+-----------------+-----------------+-----------------------------+
179−| ARM | Neoverse-N1 | #1490853 | N/A |
206+| ARM | Neoverse-N1 | #1349291, | N/A |
207+| | | #1490853 | |
180208 +----------------+-----------------+-----------------+-----------------------------+
181209 | ARM | Neoverse-N1 | #1542419 | ARM64_ERRATUM_1542419 |
182210 +----------------+-----------------+-----------------+-----------------------------+
183211 | ARM | Neoverse-N1 | #3324349 | ARM64_ERRATUM_3194386 |
184212 +----------------+-----------------+-----------------+-----------------------------+
213+| ARM | Neoverse-N1 | #4193800 | ARM64_ERRATUM_4118414 |
214++----------------+-----------------+-----------------+-----------------------------+
185215 | ARM | Neoverse-N2 | #2139208 | ARM64_ERRATUM_2139208 |
186216 +----------------+-----------------+-----------------+-----------------------------+
187217 | ARM | Neoverse-N2 | #2067961 | ARM64_ERRATUM_2067961 |
@@ -190,24 +220,41 @@ stable kernels. · 2 unmodified lines
190220 +----------------+-----------------+-----------------+-----------------------------+
191221 | ARM | Neoverse-N2 | #3324339 | ARM64_ERRATUM_3194386 |
192222 +----------------+-----------------+-----------------+-----------------------------+
223+| ARM | Neoverse-N2 | #4193789 | ARM64_ERRATUM_4118414 |
224++----------------+-----------------+-----------------+-----------------------------+
193225 | ARM | Neoverse-N3 | #3456111 | ARM64_ERRATUM_3194386 |
194226 +----------------+-----------------+-----------------+-----------------------------+
195227 | ARM | Neoverse-V1 | #1619801 | N/A |
196228 +----------------+-----------------+-----------------+-----------------------------+
197229 | ARM | Neoverse-V1 | #3324341 | ARM64_ERRATUM_3194386 |
198230 +----------------+-----------------+-----------------+-----------------------------+
231+| ARM | Neoverse-V1 | #4193790 | ARM64_ERRATUM_4118414 |
232++----------------+-----------------+-----------------+-----------------------------+
199233 | ARM | Neoverse-V2 | #3324336 | ARM64_ERRATUM_3194386 |
200234 +----------------+-----------------+-----------------+-----------------------------+
235+| ARM | Neoverse-V2 | #4193787 | ARM64_ERRATUM_4118414 |
236++----------------+-----------------+-----------------+-----------------------------+
201237 | ARM | Neoverse-V3 | #3312417 | ARM64_ERRATUM_3194386 |
202238 +----------------+-----------------+-----------------+-----------------------------+
239+| ARM | Neoverse-V3 | #4193784 | ARM64_ERRATUM_4118414 |
240++----------------+-----------------+-----------------+-----------------------------+
203241 | ARM | Neoverse-V3AE | #3312417 | ARM64_ERRATUM_3194386 |
204242 +----------------+-----------------+-----------------+-----------------------------+
243+| ARM | Neoverse-V3AE | #4193784 | ARM64_ERRATUM_4118414 |
244++----------------+-----------------+-----------------+-----------------------------+
245+| ARM | C1-Premium | #4193780 | ARM64_ERRATUM_4118414 |
246++----------------+-----------------+-----------------+-----------------------------+
205247 | ARM | C1-Pro | #4193714 | ARM64_ERRATUM_4193714 |
206248 +----------------+-----------------+-----------------+-----------------------------+
207−| ARM | MMU-500 | #841119,826419 | ARM_SMMU_MMU_500_CPRE_ERRATA|
208−| | | #562869,1047329 | |
249+| ARM | C1-Ultra | #4193780 | ARM64_ERRATUM_4118414 |
250++----------------+-----------------+-----------------+-----------------------------+
251+| ARM | MMU-500 | #562869, | ARM_SMMU_MMU_500_CPRE_ERRATA|
252+| | | #841119, | |
253+| | | #826419, | |
254+| | | #1047329 | |
209255 +----------------+-----------------+-----------------+-----------------------------+
210−| ARM | MMU-600 | #1076982,1209401| N/A |
256+| ARM | MMU-600 | #1076982, | N/A |
257+| | | #1209401 | |
211258 +----------------+-----------------+-----------------+-----------------------------+
212259 | ARM | MMU-700 | #2133013, | N/A |
213260 | | | #2268618, | |
@@ -230,11 +277,13 @@ stable kernels. · 16 unmodified lines
230277 | Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_843419 |
231278 +----------------+-----------------+-----------------+-----------------------------+
232279 +----------------+-----------------+-----------------+-----------------------------+
233−| Cavium | ThunderX ITS | #22375,24313 | CAVIUM_ERRATUM_22375 |
280+| Cavium | ThunderX ITS | #22375, | CAVIUM_ERRATUM_22375 |
281+| | | #24313 | |
234282 +----------------+-----------------+-----------------+-----------------------------+
235283 | Cavium | ThunderX ITS | #23144 | CAVIUM_ERRATUM_23144 |
236284 +----------------+-----------------+-----------------+-----------------------------+
237−| Cavium | ThunderX GICv3 | #23154,38545 | CAVIUM_ERRATUM_23154 |
285+| Cavium | ThunderX GICv3 | #23154, | CAVIUM_ERRATUM_23154 |
286+| | | #38545 | |
238287 +----------------+-----------------+-----------------+-----------------------------+
239288 | Cavium | ThunderX GICv3 | #38539 | N/A |
240289 +----------------+-----------------+-----------------+-----------------------------+
@@ -244,9 +293,8 @@ stable kernels. · 3 unmodified lines
244293 +----------------+-----------------+-----------------+-----------------------------+
245294 | Cavium | ThunderX SMMUv2 | #27704 | N/A |
246295 +----------------+-----------------+-----------------+-----------------------------+
247−| Cavium | ThunderX2 SMMUv3| #74 | N/A |
248−+----------------+-----------------+-----------------+-----------------------------+
249−| Cavium | ThunderX2 SMMUv3| #126 | N/A |
296+| Cavium | ThunderX2 SMMUv3| #74, | N/A |
297+| | | #126 | |
250298 +----------------+-----------------+-----------------+-----------------------------+
251299 | Cavium | ThunderX2 Core | #219 | CAVIUM_TX2_ERRATUM_219 |
252300 +----------------+-----------------+-----------------+-----------------------------+
@@ -256,13 +304,13 @@ stable kernels. · 3 unmodified lines
256304 +----------------+-----------------+-----------------+-----------------------------+
257305 | NVIDIA | Carmel Core | N/A | NVIDIA_CARMEL_CNP_ERRATUM |
258306 +----------------+-----------------+-----------------+-----------------------------+
259−| NVIDIA | T241 GICv3/4.x | T241-FABRIC-4 | N/A |
260−+----------------+-----------------+-----------------+-----------------------------+
261−| NVIDIA | T241 MPAM | T241-MPAM-1 | N/A |
307+| NVIDIA | Olympus core | T410-OLY-1029 | ARM64_ERRATUM_4118414 |
262308 +----------------+-----------------+-----------------+-----------------------------+
263−| NVIDIA | T241 MPAM | T241-MPAM-4 | N/A |
309+| NVIDIA | T241 GICv3/4.x | T241-FABRIC-4 | N/A |
264310 +----------------+-----------------+-----------------+-----------------------------+
265−| NVIDIA | T241 MPAM | T241-MPAM-6 | N/A |
311+| NVIDIA | T241 MPAM | T241-MPAM-1, | N/A |
312+| | | T241-MPAM-4, | |
313+| | | T241-MPAM-6 | |
266314 +----------------+-----------------+-----------------+-----------------------------+
267315 +----------------+-----------------+-----------------+-----------------------------+
268316 | Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 |
@@ -270,9 +318,8 @@ stable kernels. · 1 unmodified line
270318 +----------------+-----------------+-----------------+-----------------------------+
271319 | Hisilicon | Hip0{5,6,7} | #161010101 | HISILICON_ERRATUM_161010101 |
272320 +----------------+-----------------+-----------------+-----------------------------+
273−| Hisilicon | Hip0{6,7} | #161010701 | N/A |
274−+----------------+-----------------+-----------------+-----------------------------+
275−| Hisilicon | Hip0{6,7} | #161010803 | N/A |
321+| Hisilicon | Hip0{6,7} | #161010701, | N/A |
322+| | | #161010803 | |
276323 +----------------+-----------------+-----------------+-----------------------------+
277324 | Hisilicon | Hip07 | #161600802 | HISILICON_ERRATUM_161600802 |
278325 +----------------+-----------------+-----------------+-----------------------------+
@@ -284,6 +331,8 @@ stable kernels. · 5 unmodified lines
284331 +----------------+-----------------+-----------------+-----------------------------+
285332 | Hisilicon | Hip09 | #162100801 | HISILICON_ERRATUM_162100801 |
286333 +----------------+-----------------+-----------------+-----------------------------+
334+| Hisilicon | Hip09 | #162100125 | HISILICON_ERRATUM_162100125 |
335++----------------+-----------------+-----------------+-----------------------------+
287336 +----------------+-----------------+-----------------+-----------------------------+
288337 | Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
289338 +----------------+-----------------+-----------------+-----------------------------+
@@ -323,3 +372,5 @@ stable kernels. · 33 unmodified lines
323372 +----------------+-----------------+-----------------+-----------------------------+
324373 | Microsoft | Azure Cobalt 100| #3324339 | ARM64_ERRATUM_3194386 |
325374 +----------------+-----------------+-----------------+-----------------------------+
375+| Microsoft | Azure Cobalt 100| #4193789 | ARM64_ERRATUM_4118414 |
376++----------------+-----------------+-----------------+-----------------------------+
Documentation/arch/loongarch/irq-chip-model.rst+35−0
@@ -181,6 +181,41 @@ go to PCH-PIC/PCH-LPC and gathered by EIOINTC, and then go to CPUINTC directly:: · 180 unmodified lines
181181 | Devices |
182182 +---------+
183183
184+Advanced Extended IRQ model (with redirection)
185+==============================================
186+
187+In this model, IPI (Inter-Processor Interrupt) and CPU Local Timer interrupt go
188+to CPUINTC directly, CPU UARTS interrupts go to LIOINTC, PCH-MSI interrupts go
189+to REDIRECT for remapping it to AVECINTC, and then go to CPUINTC directly, while
190+all other devices interrupts go to PCH-PIC/PCH-LPC and gathered by EIOINTC, and
191+then go to CPUINTC directly::
192+
193+ +-----+ +-----------------------+ +-------+
194+ | IPI | --> | CPUINTC | <-- | Timer |
195+ +-----+ +-----------------------+ +-------+
196+ ^ ^ ^
197+ | | |
198+ | +----------+ |
199+ +---------+ | AVECINTC | +---------+ +-------+
200+ | EIOINTC | +----------+ | LIOINTC | <-- | UARTs |
201+ +---------+ | REDIRECT | +---------+ +-------+
202+ ^ +----------+
203+ | ^
204+ | |
205+ +---------+ +---------+
206+ | PCH-PIC | | PCH-MSI |
207+ +---------+ +---------+
208+ ^ ^ ^
209+ | | |
210+ +---------+ +---------+ +---------+
211+ | Devices | | PCH-LPC | | Devices |
212+ +---------+ +---------+ +---------+
213+ ^
214+ |
215+ +---------+
216+ | Devices |
217+ +---------+
218+
184219 ACPI-related definitions
185220 ========================
186221
Documentation/arch/m68k/kernel-options.rst+4−20
@@ -244,23 +244,7 @@ drive (with "root="). · 243 unmodified lines
244244 3) General Device Options (Amiga and Atari)
245245 ===========================================
246246
247−3.1) ether=
248−-----------
249−
250−:Syntax: ether=[<irq>[,<base_addr>[,<mem_start>[,<mem_end>]]]],<dev-name>
251−
252−<dev-name> is the name of a net driver, as specified in
253−drivers/net/Space.c in the Linux source. Most prominent are eth0, ...
254−eth3, sl0, ... sl3, ppp0, ..., ppp3, dummy, and lo.
255−
256−The non-ethernet drivers (sl, ppp, dummy, lo) obviously ignore the
257−settings by this options. Also, the existing ethernet drivers for
258−Linux/m68k (ariadne, a2065, hydra) don't use them because Zorro boards
259−are really Plug-'n-Play, so the "ether=" option is useless altogether
260−for Linux/m68k.
261−
262−
263−3.2) hd=
247+3.1) hd=
264248 --------
265249
266250 :Syntax: hd=<cylinders>,<heads>,<sectors>
@@ -273,7 +257,7 @@ itself. It exists just for the case that this fails for one of your · 6 unmodified lines
273257 disks.
274258
275259
276−3.3) max_scsi_luns=
260+3.2) max_scsi_luns=
277261 -------------------
278262
279263 :Syntax: max_scsi_luns=<n>
@@ -284,7 +268,7 @@ be scanned. Valid values for <n> are between 1 and 8. Default is 8 if · 4 unmodified lines
284268 configuration, else 1.
285269
286270
287−3.4) st=
271+3.3) st=
288272 --------
289273
290274 :Syntax: st=<buffer_size>,[<write_thres>,[<max_buffers>]]
@@ -297,7 +281,7 @@ total number of buffers. <max_buffer> limits the total number of · 6 unmodified lines
297281 buffers allocated for all tape devices.
298282
299283
300−3.5) dmasound=
284+3.4) dmasound=
301285 --------------
302286
303287 :Syntax: dmasound=[<buffers>,<buffer-size>[,<catch-radius>]]
Documentation/arch/powerpc/vas-api.rst+1−1
@@ -293,7 +293,7 @@ Simple example · 292 unmodified lines
293293 //Format CRB request with compression or
294294 //uncompression
295295 // Refer tests for vas_copy/vas_paste
296− vas_copy((&crb, 0, 1);
296+ vas_copy(&crb, 0, 1);
297297 vas_paste(addr, 0, 1);
298298 // Poll on csb.flags with timeout
299299 // csb address is listed in CRB
Documentation/arch/s390/s390dbf.rst+30−0
@@ -106,6 +106,36 @@ the ``debug_stoppable`` sysctl. If you set ``debug_stoppable`` to 0 the debug · 105 unmodified lines
106106 feature cannot be stopped. If the debug feature is already stopped, it
107107 will stay deactivated.
108108
109+Kernel parameters
110+-----------------
111+The size and log levels of debug logs can be configured early during boot using
112+the ``s390dbf`` kernel parameter. The parameter accepts a debug log name, a log
113+level, and a log size, separated by colon characters (``:``). To configure only
114+a single attribute, either the log level or the log size may be omitted.
115+
116+To configure multiple debug logs, the parameter may be specified multiple times,
117+or multiple parameter sets may be provided in a single instance, separated by
118+commas.
119+
120+Parameter format::
121+
122+ s390dbf=<name|pattern>:[<level>|-]:[<pages>][,...]
123+
124+where:
125+
126+- ``name`` specifies either an exact debug log name or a shell-style wildcard
127+ pattern
128+- ``level`` specifies the log level, or ``-`` to completely deactivate the log
129+- ``pages`` specifies the debug area size in pages
130+
131+Example::
132+
133+ s390dbf=cio*:6:128,sclp_err::2
134+
135+This example sets the log level to 6 and the log size to 128 pages for all debug
136+logs whose names start with ``cio``. It also sets the log level of the
137+``sclp_err`` debug log to 2.
138+
109139 Kernel Interfaces:
110140 ------------------
111141
Documentation/arch/sparc/oradax/dax-hv-api.txt+9−9
@@ -457,7 +457,7 @@ bits set, and terminate at a CCB that has the Conditional bit set, but not the P · 456 unmodified lines
457457 Offset Size Field Description
458458 Bits Field Description
459459 [15:14] Secondary Input Element Size (see Section 36.2.1.1.4,
460− “Secondary Input Element Size”
460+ “Secondary Input Element Size”)
461461 [13:10] Output Format (see Section 36.2.1.1.6, “Output Format”)
462462 [9] Padding Direction selector: A value of 1 causes padding bytes
463463 to be added to the left side of output elements. A value of 0
@@ -656,7 +656,7 @@ Offset Size Field Description · 192 unmodified lines
656656 [18:16] Secondary Input Starting Offset (see Section 36.2.1.1.5, “Input
657657 Element Offsets”)
658658 [15:14] Secondary Input Element Size (see Section 36.2.1.1.4,
659− “Secondary Input Element Size”
659+ “Secondary Input Element Size”)
660660 [13:10] Output Format (see Section 36.2.1.1.6, “Output Format”)
661661 [9:5] Operand size for first scan criteria value. In a scan value
662662 operation, this is one of two potential exact match values.
@@ -793,13 +793,13 @@ Offset Size Field Description · 130 unmodified lines
793793 [18:16] Secondary Input Starting Offset (see Section 36.2.1.1.5, “Input
794794 Element Offsets”)
795795 [15:14] Secondary Input Element Size (see Section 36.2.1.1.4,
796− “Secondary Input Element Size”
796+ “Secondary Input Element Size”)
797797 [13:10] Output Format (see Section 36.2.1.1.6, “Output Format”)
798798 [9] Reserved
799799 [8:0] Test value used for comparison against the most significant bits
800800 in the input values, when using 2 or 3 byte input elements.
801−8 8 Completion (same fields as Section 36.2.1.2, “Extract command”
802−16 8 Primary Input (same fields as Section 36.2.1.2, “Extract command”
801+8 8 Completion (same fields as Section 36.2.1.2, “Extract command”)
802+16 8 Primary Input (same fields as Section 36.2.1.2, “Extract command”)
803803 24 8 Data Access Control (same fields as Section 36.2.1.2, “Extract command”,
804804 except Primary Input Length Format may not use the 0x0 value)
805805 32 8 Secondary Input, if used by Primary Input Format. Same fields as Primary
@@ -880,7 +880,7 @@ Offset Size Field Description · 74 unmodified lines
880880 [18:16] Secondary Input Starting Offset (see Section 36.2.1.1.5, “Input
881881 Element Offsets”)
882882 [15:14] Secondary Input Element Size (see Section 36.2.1.1.4,
883− “Secondary Input Element Size”
883+ “Secondary Input Element Size”)
884884
885885
886886 524
@@ -895,8 +895,8 @@ Offset Size Field Description · 8 unmodified lines
895895 causes padding bytes to be added to the right side of output
896896 elements.
897897 [8:0] Reserved
898− 8 8 Completion (same fields as Section 36.2.1.2, “Extract command”
899− 16 8 Primary Input (same fields as Section 36.2.1.2, “Extract command”
898+ 8 8 Completion (same fields as Section 36.2.1.2, “Extract command”)
899+ 16 8 Primary Input (same fields as Section 36.2.1.2, “Extract command”)
900900 24 8 Data Access Control (same fields as Section 36.2.1.2, “Extract command”)
901901 32 8 Secondary Bit Vector Input. Same fields as Primary Input.
902902 40 8 Reserved
@@ -949,7 +949,7 @@ Offset Size Field Description · 46 unmodified lines
949949 [31] If set, this CCB functions as a Sync command. If clear, this
950950 CCB functions as a No-op command.
951951 [30:0] Reserved
952− 8 8 Completion (same fields as Section 36.2.1.2, “Extract command”
952+ 8 8 Completion (same fields as Section 36.2.1.2, “Extract command”)
953953 16 46 Reserved
954954
955955 36.2.2. CCB Completion Area
Documentation/arch/sparc/oradax/oracle-dax.rst+1−1
@@ -438,7 +438,7 @@ that in user land:: · 437 unmodified lines
438438 The output bitmap is ready for consumption immediately after the
439439 completion status indicates success.
440440
441−Excer[t from UltraSPARC Virtual Machine Specification
441+Excerpt from UltraSPARC Virtual Machine Specification
442442 =====================================================
443443
444444 .. include:: dax-hv-api.txt
Documentation/arch/x86/cpuinfo.rst+4−0
@@ -187,6 +187,10 @@ to disable features using the feature number as defined in · 186 unmodified lines
187187 Protection can be disabled using clearcpuid=514. The number 514 is calculated
188188 from #define X86_FEATURE_UMIP (16*32 + 2).
189189
190+DO NOT USE this cmdline option in production - it is meant to be used only as
191+a quick'n'dirty debugging aid to rule out a feature-enabling code is the
192+culprit. If you use it, it'll taint the kernel.
193+
190194 In addition, there exists a variety of custom command-line parameters that
191195 disable specific features. The list of parameters includes, but is not limited
192196 to, nofsgsbase, nosgx, noxsave, etc. 5-level paging can also be disabled using
Documentation/arch/x86/tdx.rst+127−7
@@ -73,6 +73,133 @@ initialize:: · 72 unmodified lines
7373
7474 [..] virt/tdx: TDX-Module initialization failed ...
7575
76+TDX module Runtime Update
77+-------------------------
78+
79+Similar to microcode, the BIOS generally has a copy of the TDX module
80+in flash. It loads this module image in to RAM at boot. However, just
81+like microcode, the BIOS-loaded TDX module might be out of date either
82+because the BIOS is old or the system has been up a long time. The
83+kernel can replace the BIOS version in RAM and load a different TDX
84+module. Kernel-loaded TDX modules do not affect the BIOS flash and do
85+not survive reboots.
86+
87+The TDX module is normally the only piece of software running in SEAM
88+mode with which the kernel interacts. But there is a second piece of
89+software which is used to load or update the TDX module: a persistent
90+SEAM loader (P-SEAMLDR). It runs in SEAM mode separately from the TDX
91+module. The kernel communicates with the P-SEAMLDR to perform TDX
92+module runtime updates.
93+
94+How to update the TDX module
95+~~~~~~~~~~~~~~~~~~~~~~~~~~~~
96+
97+Updating the TDX module is a complex process. Much of the logic and
98+policy is left to userspace. End users should use existing update
99+infrastructure provided by their distro. The Intel TDX Module Binaries
100+repository has a reference implementation of this logic:
101+
102+ https://github.com/intel/confidential-computing.tdx.tdx-module.binaries/blob/main/version_select_and_load.py
103+
104+This section will now lay out roughly what is needed to implement a
105+userspace-driven TDX module update. Detailed documentation on the
106+tdx_host ABIs is available here::
107+
108+ Documentation/ABI/testing/sysfs-devices-faux-tdx-host
109+
110+and is not duplicated in this document.
111+
112+1. Check whether runtime update is supported at all
113+
114+ Verify that the TDX module firmware upload interface is available::
115+
116+ /sys/class/firmware/tdx_module
117+
118+ Note that this is the generic kernel firmware update ABI. It is
119+ separate from the "tdx_host" device ABI itself.
120+
121+2. Check whether additional updates are possible. Verify that::
122+
123+ /sys/devices/faux/tdx_host/num_remaining_updates
124+
125+ has a value greater than 0. If it is 0, the TDX update log might be
126+ full. Reboot to reset this to a nonzero value.
127+
128+3. Choose a compatible TDX module image
129+
130+ Choosing a compatible TDX module image is not trivial. There are both
131+ hard compatibility requirements and policy choices to make.
132+
133+ Hard compatibility requirements:
134+
135+ - The update must be compatible with the kernel.
136+
137+ The update must not change any TDX ABIs in any non-backward-compatible
138+ way. It can introduce new features but must not require that the kernel
139+ use new ABIs for existing features. It must ensure that the rest of the
140+ system is not affected in any way. Software on the system must never
141+ notice any behavioral changes. Attestation results should be identical
142+ except for version changes.
143+
144+ - The update must be compatible with the CPU.
145+
146+ The set of supported CPU FMS values (family, model, stepping) is
147+ encoded in the module image itself. In practice, module version series
148+ are platform-specific. For example, the 1.5.x series runs on Sapphire
149+ Rapids but not Granite Rapids, which needs 2.0.x.
150+
151+ - The update must be compatible with the P-SEAMLDR.
152+
153+ This information is provided in a metadata file, typically
154+ mapping_file.json, released with the module image. Each module image
155+ specifies the minimum required P-SEAMLDR version, and the update is
156+ compatible only if the running P-SEAMLDR meets that requirement.
157+
158+ The current version of the P-SEAMLDR can be read here::
159+
160+ /sys/devices/faux/tdx_host/seamldr_version
161+
162+ - The update must be compatible with the running TDX module.
163+
164+ Like P-SEAMLDR, each module image also specifies a minimum required
165+ TDX module version. The running module must satisfy that requirement.
166+
167+ The update software can read the current TDX module version here::
168+
169+ /sys/devices/faux/tdx_host/version
170+
171+ Policy choices:
172+
173+ - The update software chooses how to optimize its update. For instance,
174+ it can optimize for fewer updates or for smaller version steps,
175+ for example, 1.2.3 => 1.2.5 versus 1.2.3 => 1.2.4 => 1.2.5.
176+
177+4. Perform the update
178+
179+ Run::
180+
181+ echo 1 > /sys/class/firmware/tdx_module/loading
182+ cat <path_to_module_image> > /sys/class/firmware/tdx_module/data
183+ echo 0 > /sys/class/firmware/tdx_module/loading
184+
185+ The files /sys/class/firmware/tdx_module/status and
186+ /sys/class/firmware/tdx_module/error report update progress and error
187+ information.
188+
189+ After the update completes, the new module version is visible in
190+ /sys/devices/faux/tdx_host/version.
191+
192+Impact on running TDs
193+~~~~~~~~~~~~~~~~~~~~~
194+
195+TDX module runtime updates must have virtually no visible impact on running
196+TDs. Any TD visible impact is a TDX module bug.
197+
198+The main exception is the TEE_TCB_SVN_2 field in TD quotes, which
199+reflects the TCB of the currently running TDX module and therefore
200+changes after an update. By contrast, TEE_TCB_SVN reflects the TCB at TD
201+launch time and is not affected.
202+
76203 TDX Interaction to Other Kernel Components
77204 ------------------------------------------
78205
@@ -138,13 +265,6 @@ If the platform has such erratum, the kernel prints additional message in · 59 unmodified lines
138265 machine check handler to tell user the machine check may be caused by
139266 kernel bug on TDX private memory.
140267
141−Kexec
142−~~~~~~~
143−
144−Currently kexec doesn't work on the TDX platforms with the aforementioned
145−erratum. It fails when loading the kexec kernel image. Otherwise it
146−works normally.
147−
148268 Interaction vs S3 and deeper states
149269 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
150270
Documentation/arch/x86/x86_64/fsgs.rst+2−2
@@ -182,8 +182,8 @@ address spaces via an attribute based mechanism in Clang 2.6 and newer · 181 unmodified lines
182182 versions:
183183
184184 ==================================== =====================================
185− __attribute__((address_space(256)) Variable is addressed relative to GS
186− __attribute__((address_space(257)) Variable is addressed relative to FS
185+ __attribute__(address_space(256)) Variable is addressed relative to GS
186+ __attribute__(address_space(257)) Variable is addressed relative to FS
187187 ==================================== =====================================
188188
189189 FS/GS based addressing with inline assembly
Documentation/block/data-integrity.rst+1−1
@@ -154,7 +154,7 @@ bio_free() will automatically free the bip. · 153 unmodified lines
154154 ----------------
155155
156156 Block devices can set up the integrity information in the integrity
157−sub-struture of the queue_limits structure.
157+sub-structure of the queue_limits structure.
158158
159159 Layered block devices will need to pick a profile that's appropriate
160160 for all subdevices. queue_limits_stack_integrity() can help with that. DM
Documentation/block/error-injection.rst+59−0
@@ -0,0 +1,59 @@
1+.. SPDX-License-Identifier: GPL-2.0
2+
3+============================
4+Configurable Error Injection
5+============================
6+
7+Overview
8+--------
9+
10+Configurable error injection allows injecting specific block layer status codes
11+for sector ranges of a block device. Errors can be injected unconditionally, or
12+with a given probability.
13+
14+To use configurable error injection, CONFIG_BLK_ERROR_INJECTION must be enabled.
15+
16+The only interface is the error_injection debugfs file, which is created for
17+each registered gendisk. Writes to this file are used to create or delete rules
18+and reads return a list of the current error injection sites.
19+
20+Options
21+-------
22+
23+The following options specify the operations:
24+
25+=================== =======================================================
26+add add a new rule
27+removeall remove all existing rules
28+=================== =======================================================
29+
30+The following options specify the details of the rule for the add operation:
31+
32+=================== =======================================================
33+op=<string> block layer operation this rule applies to. This uses
34+ the XYZ for each REQ_OP_XYZ operation, e.g. READ, WRITE
35+ or DISCARD. Mandatory.
36+status=<string> Status to return. This uses XYZ for each BLK_STS_XYZ
37+ code, e.g. IOERR or MEDIUM. Mandatory.
38+start=<number> First block layer sector the rule applies to.
39+ Optional, defaults to 0.
40+nr_sectors=<number> Number of sectors this rule applies.
41+ Optional, defaults to the remainder of the device.
42+chance=<number> Only return a failure with a likelihood of 1/chance.
43+ Optional, defaults to 1 (always).
44+=================== =======================================================
45+
46+Example
47+-------
48+
49+Return BLK_STS_IOERR for one in 10 reads of sector 0 of /dev/nvme0n1:
50+
51+ $ echo 'add,op=READ,start=0,status=IOERR,chance=10' > /sys/kernel/debug/block/nvme0n1/error_injection
52+
53+Return BLK_STS_MEDIUM for every write to /dev/nvme0n1:
54+
55+ $ echo 'add,op=WRITE,start=0,status=MEDIUM' > /sys/kernel/debug/block/nvme0n1/error_injection
56+
57+Remove all rules for /dev/nvme0n1:
58+
59+ $ echo 'removeall' > /sys/kernel/debug/block/nvme0n1/error_injection
Documentation/block/index.rst+1−0
@@ -22,3 +22,4 @@ Block · 21 unmodified lines
2222 switching-sched
2323 writeback_cache_control
2424 ublk
25+ error-injection
Documentation/bpf/btf.rst+2−4
@@ -97,10 +97,8 @@ Each type contains the following common data:: · 96 unmodified lines
9797 struct btf_type {
9898 __u32 name_off;
9999 /* "info" bits arrangement
100− * bits 0-15: vlen (e.g. # of struct's members)
101− * bits 16-23: unused
102− * bits 24-28: kind (e.g. int, ptr, array...etc)
103− * bits 29-30: unused
100+ * bits 0-23: vlen (e.g. # of struct's members)
101+ * bits 24-30: kind (e.g. int, ptr, array...etc)
104102 * bit 31: kind_flag, currently used by
105103 * struct, union, enum, fwd, enum64,
106104 * decl_tag and type_tag
Documentation/bpf/kfuncs.rst+34−2
@@ -207,8 +207,26 @@ Here, the buffer may be NULL. If the buffer is not NULL, it must be at least · 206 unmodified lines
207207 buffer__szk bytes in size. The kfunc is responsible for checking if the buffer
208208 is NULL before using it.
209209
210−2.3.5 __str Annotation
211−----------------------------
210+2.3.5 __nonown_allowed Annotation
211+---------------------------------
212+
213+This annotation is used to indicate that the parameter may be a non-owning reference.
214+
215+An example is given below::
216+
217+ __bpf_kfunc int bpf_list_add(..., struct bpf_list_node
218+ *prev__nonown_allowed, ...)
219+ {
220+ ...
221+ }
222+
223+For the ``prev__nonown_allowed`` parameter (resolved as ``KF_ARG_PTR_TO_LIST_NODE``),
224+suffix ``__nonown_allowed`` retains the usual owning-pointer rules and also
225+permits a non-owning reference with no ref_obj_id (e.g. the return value of
226+bpf_list_front() / bpf_list_back()).
227+
228+2.3.6 __str Annotation
229+----------------------
212230 This annotation is used to indicate that the argument is a constant string.
213231
214232 An example is given below::
@@ -462,6 +480,20 @@ In order to accommodate such requirements, the verifier will enforce strict · 247 unmodified lines
462480 PTR_TO_BTF_ID type matching if two types have the exact same name, with one
463481 being suffixed with ``___init``.
464482
483+2.8 Accessing arena memory through kfunc arguments
484+--------------------------------------------------
485+
486+A read or write at any address inside an arena does not oops the kernel.
487+Unallocated arena pages are lazily backed by a scratch page and the
488+access is reported through the program's BPF stream as an error. Only
489+the BPF program's correctness is affected; the kernel itself remains
490+intact.
491+
492+The arena is followed by a ``GUARD_SZ / 2`` (32 KiB) guard region that
493+is also covered by this recovery. A kfunc handed an arena pointer may
494+therefore access up to ``GUARD_SZ / 2`` past it without bounds-checking
495+against the arena. Larger accesses must verify the range explicitly.
496+
465497 .. _BPF_kfunc_lifecycle_expectations:
466498
467499 3. kfunc lifecycle expectations
Documentation/bpf/map_lru_hash_update.dot+42−2
@@ -21,10 +21,18 @@ digraph { · 20 unmodified lines
2121 // names that initiate the corresponding logic in kernel/bpf/bpf_lru_list.c.
2222 // Number suffixes and errno suffixes handle subsections of the corresponding
2323 // logic in the function as of the writing of this dot.
24+ //
25+ // All LRU locks are rqspinlock_t. Every acquire can fail (AA self-deadlock
26+ // or contention timeout); on failure the corresponding helper returns NULL
27+ // and the caller propagates -ENOMEM. The "rqspinlock acquire failed"
28+ // terminal below is reached via the dashed arrows from each acquire site.
29+
30+ rqspinlock_failed [shape=rectangle,
31+ label="Any LRU rqspinlock\nacquire fails\n(AA or timeout)"]
2432
2533 // cf. __local_list_pop_free() / bpf_percpu_lru_pop_free()
2634 local_freelist_check [shape=diamond,fillcolor=1,
27− label="Local freelist\nnode available?"];
35+ label="Local freelist\nnode available?\n(lockless free_llist)"];
2836 use_local_node [shape=rectangle,
2937 label="Use node owned\nby this CPU"]
3038
@@ -82,6 +90,15 @@ digraph { · 51 unmodified lines
8290 // fn__local_list_pop_pending()
8391 }
8492
93+ // Post-steal: re-acquire local loc_l->lock to insert the stolen node into
94+ // the local pending list. If the acquire fails, the stolen node is published
95+ // to the lockless local free_llist so the next pop on this CPU picks it up
96+ // instead of orphaning it.
97+ post_steal_lock [shape=diamond,fillcolor=1,
98+ label="Acquire local\nloc_l->lock\nto add pending"]
99+ post_steal_to_free_llist [shape=rectangle,
100+ label="Publish stolen node to\nlocal free_llist (lockless)"]
101+
85102 fn_bpf_lru_list_pop_free_to_local2 [shape=rectangle,
86103 label="Use node that was\nnot recently referenced"]
87104 local_freelist_check4 [shape=rectangle,
@@ -97,10 +114,19 @@ digraph { · 9 unmodified lines
97114 fn_htab_lru_map_update_elem_ENOENT [shape=oval,label="return -ENOENT"]
98115
99116 begin -> local_freelist_check
117+ // The initial per-CPU lock (loc_l->lock for common, l->lock for percpu) is
118+ // acquired before the local freelist check; rqspinlock failure here exits
119+ // directly to -ENOMEM (no recovery needed: nothing was removed yet).
120+ local_freelist_check -> rqspinlock_failed [style=dashed,
121+ xlabel="acquire fails"]
100122 local_freelist_check -> use_local_node [xlabel="Y"]
101123 local_freelist_check -> common_lru_check [xlabel="N"]
102124 common_lru_check -> fn_bpf_lru_list_pop_free_to_local [xlabel="Y"]
103125 common_lru_check -> fn___bpf_lru_list_shrink_inactive [xlabel="N"]
126+ // Global lru_list lock acquire failure in pop_free_to_local: skip refill,
127+ // fall through to the steal path. Not ENOMEM by itself.
128+ fn_bpf_lru_list_pop_free_to_local -> common_lru_check2 [style=dashed,
129+ xlabel="global lru_lock\nacquire fails"]
104130 fn_bpf_lru_list_pop_free_to_local -> fn___bpf_lru_node_move_to_free
105131 fn___bpf_lru_node_move_to_free ->
106132 fn_bpf_lru_list_pop_free_to_local2 [xlabel="Y"]
@@ -120,13 +146,27 @@ digraph { · 13 unmodified lines
120146 local_freelist_check6 -> local_freelist_check7
121147 local_freelist_check7 -> fn_htab_lru_map_update_elem
122148
123− fn_htab_lru_map_update_elem -> fn_htab_lru_map_update_elem3 [xlabel = "Y"]
149+ // Steal-loop victim lock failure is silent: treat as "no node found here"
150+ // and continue to next CPU; same edge as the existing "N" path.
151+ local_freelist_check5 -> fn_htab_lru_map_update_elem2 [style=dashed,
152+ xlabel="victim's lock\nfails: skip"]
153+ // After a successful steal, re-acquire the local loc_l->lock. On failure
154+ // the stolen node is published to free_llist (recovered, not orphaned)
155+ // and the update returns -ENOMEM.
156+ fn_htab_lru_map_update_elem -> post_steal_lock [xlabel = "Y"]
157+ post_steal_lock -> fn_htab_lru_map_update_elem3 [xlabel = "OK"]
158+ post_steal_lock -> post_steal_to_free_llist [style=dashed,
159+ xlabel="loc_l->lock\nacquire fails"]
160+ post_steal_to_free_llist -> fn_htab_lru_map_update_elem_ENOMEM
124161 fn_htab_lru_map_update_elem -> fn_htab_lru_map_update_elem2 [xlabel = "N"]
125162 fn_htab_lru_map_update_elem2 ->
126163 fn_htab_lru_map_update_elem_ENOMEM [xlabel = "Y"]
127164 fn_htab_lru_map_update_elem2 -> local_freelist_check5 [xlabel = "N"]
128165 fn_htab_lru_map_update_elem3 -> fn_htab_lru_map_update_elem4
129166
167+ // Shared rqspinlock-failure terminal collapses to the same -ENOMEM exit.
168+ rqspinlock_failed -> fn_htab_lru_map_update_elem_ENOMEM
169+
130170 use_local_node -> fn_htab_lru_map_update_elem4
131171 fn_bpf_lru_list_pop_free_to_local2 -> fn_htab_lru_map_update_elem4
132172 local_freelist_check4 -> fn_htab_lru_map_update_elem4
Documentation/core-api/cpu_hotplug.rst+0−5
@@ -45,11 +45,6 @@ Command Line Switches · 44 unmodified lines
4545
4646 This option is limited to the X86 and S390 architecture.
4747
48−``cpu0_hotplug``
49− Allow to shutdown CPU0.
50−
51− This option is limited to the X86 architecture.
52−
5348 CPU maps
5449 ========
5550
Documentation/core-api/housekeeping.rst+1−1
@@ -99,7 +99,7 @@ the same RCU read side critical section. · 98 unmodified lines
9999 A typical layout example would look like this on the update side
100100 (``housekeeping_update()``)::
101101
102− rcu_assign_pointer(housekeeping_cpumasks[type], trial);
102+ rcu_assign_pointer(housekeeping.cpumasks[type], trial);
103103 synchronize_rcu();
104104 flush_workqueue(example_workqueue);
105105
Documentation/core-api/kernel-api.rst+1−0
@@ -307,6 +307,7 @@ Accounting Framework · 306 unmodified lines
307307 Block Devices
308308 =============
309309
310+.. kernel-doc:: include/linux/bvec.h
310311 .. kernel-doc:: include/linux/bio.h
311312 .. kernel-doc:: block/blk-core.c
312313 :export:
Documentation/core-api/kho/abi.rst+5−0
@@ -28,6 +28,11 @@ KHO persistent memory tracker ABI · 27 unmodified lines
2828 .. kernel-doc:: include/linux/kho/abi/kexec_handover.h
2929 :doc: KHO persistent memory tracker
3030
31+KHO serialization block ABI
32+===========================
33+
34+.. kernel-doc:: include/linux/kho/abi/block.h
35+
3136 See Also
3237 ========
3338
Documentation/core-api/kho/index.rst+11−0
@@ -83,6 +83,17 @@ Public API · 82 unmodified lines
8383 .. kernel-doc:: kernel/liveupdate/kexec_handover.c
8484 :export:
8585
86+KHO Serialization Blocks API
87+============================
88+
89+.. kernel-doc:: kernel/liveupdate/kho_block.c
90+ :doc: KHO Serialization Blocks
91+
92+.. kernel-doc:: include/linux/kho_block.h
93+
94+.. kernel-doc:: kernel/liveupdate/kho_block.c
95+ :internal:
96+
8697 See Also
8798 ========
8899
Documentation/core-api/kref.rst+2−2
@@ -40,7 +40,7 @@ kref_init as so:: · 39 unmodified lines
4040
4141 struct my_data *data;
4242
43− data = kmalloc(sizeof(*data), GFP_KERNEL);
43+ data = kmalloc_obj(*data);
4444 if (!data)
4545 return -ENOMEM;
4646 kref_init(&data->refcount);
@@ -100,7 +100,7 @@ thread to process:: · 53 unmodified lines
100100 int rv = 0;
101101 struct my_data *data;
102102 struct task_struct *task;
103− data = kmalloc(sizeof(*data), GFP_KERNEL);
103+ data = kmalloc_obj(*data);
104104 if (!data)
105105 return -ENOMEM;
106106 kref_init(&data->refcount);
Documentation/core-api/list.rst+3−3
@@ -112,7 +112,7 @@ list: · 111 unmodified lines
112112
113113 /* State 1 */
114114
115− grock = kzalloc(sizeof(*grock), GFP_KERNEL);
115+ grock = kzalloc_obj(*grock);
116116 if (!grock)
117117 return -ENOMEM;
118118 grock->name = "Grock";
@@ -123,7 +123,7 @@ list: · 4 unmodified lines
123123
124124 /* State 2 */
125125
126− dimitri = kzalloc(sizeof(*dimitri), GFP_KERNEL);
126+ dimitri = kzalloc_obj(*dimitri);
127127 if (!dimitri)
128128 return -ENOMEM;
129129 dimitri->name = "Dimitri";
@@ -752,7 +752,7 @@ This is because list_splice() did not reinitialize the list_head it took · 622 unmodified lines
752752 entries from, leaving its pointer pointing into what is now a different list.
753753
754754 If we want to avoid this situation, list_splice_init() can be used. It does the
755−same thing as list_splice(), except reinitalizes the donor list_head after the
755+same thing as list_splice(), except reinitializes the donor list_head after the
756756 transplant.
757757
758758 Concurrency considerations
Documentation/core-api/printk-formats.rst+3−0
@@ -322,6 +322,7 @@ MAC/FDDI addresses · 321 unmodified lines
322322 %pMF 00-01-02-03-04-05
323323 %pm 000102030405
324324 %pmR 050403020100
325+ %p[mM][FR][U]
325326
326327 For printing 6-byte MAC/FDDI addresses in hex notation. The ``M`` and ``m``
327328 specifiers result in a printed address with (M) or without (m) byte
@@ -335,6 +336,8 @@ For Bluetooth addresses the ``R`` specifier shall be used after the ``M`` · 7 unmodified lines
335336 specifier to use reversed byte order suitable for visual interpretation
336337 of Bluetooth addresses which are in the little endian order.
337338
339+When ``U`` is passed, the result is printed in the upper case.
340+
338341 Passed by reference.
339342
340343 IPv4 addresses
Documentation/core-api/real-time/theory.rst+1−1
@@ -25,7 +25,7 @@ Scheduling · 24 unmodified lines
2525 ==========
2626
2727 The core principles of Linux scheduling and the associated user-space API are
28−documented in the man page sched(7)
28+documented in the man page
2929 `sched(7) <https://man7.org/linux/man-pages/man7/sched.7.html>`_.
3030 By default, the Linux kernel uses the SCHED_OTHER scheduling policy. Under
3131 this policy, a task is preempted when the scheduler determines that it has
Documentation/cpu-freq/cpu-drivers.rst+7−2
@@ -114,8 +114,13 @@ Then, the driver must fill in the following values: · 113 unmodified lines
114114 |policy->cur | The current operating frequency of |
115115 | | this CPU (if appropriate) |
116116 +-----------------------------------+--------------------------------------+
117−|policy->min, | |
118−|policy->max, | |
117+|policy->min, | The min/max scaling frequency. |
118+|policy->max | If set by the driver in ->init(), |
119+| | used as the lower/upper bound for |
120+| | policy frequency QoS requests; |
121+| | otherwise, reflects the min/max |
122+| | frequency the driver can set |
123++-----------------------------------+--------------------------------------+
119124 |policy->policy and, if necessary, | |
120125 |policy->governor | must contain the "default policy" for|
121126 | | this CPU. A few moments later, |
Documentation/crypto/api-samples.rst+1−1
@@ -159,7 +159,7 @@ Code Example For Random Number Generator Usage · 158 unmodified lines
159159 static int get_random_numbers(u8 *buf, unsigned int len)
160160 {
161161 struct crypto_rng *rng = NULL;
162− char *drbg = "drbg_nopr_sha256"; /* Hash DRBG with SHA-256, no PR */
162+ char *drbg = "stdrng";
163163 int ret;
164164
165165 if (!buf || !len) {
Documentation/crypto/async-tx-api.rst+2−2
@@ -82,9 +82,9 @@ xor_val xor a series of source buffers and set a flag if the · 81 unmodified lines
8282 pq generate the p+q (raid6 syndrome) from a series of source buffers
8383 pq_val validate that a p and or q buffer are in sync with a given series of
8484 sources
85−datap (raid6_datap_recov) recover a raid6 data block and the p block
85+datap (raid6_recov_datap) recover a raid6 data block and the p block
8686 from the given sources
87−2data (raid6_2data_recov) recover 2 raid6 data blocks from the given
87+2data (raid6_recov_2data) recover 2 raid6 data blocks from the given
8888 sources
8989 ======== ====================================================================
9090
Documentation/crypto/krb5.rst+13−4
@@ -158,13 +158,22 @@ returned. · 157 unmodified lines
158158 When a message has been received, the location and size of the data with the
159159 message can be determined by calling::
160160
161− void crypto_krb5_where_is_the_data(const struct krb5_enctype *krb5,
162− enum krb5_crypto_mode mode,
163− size_t *_offset, size_t *_len);
161+ int crypto_krb5_where_is_the_data(const struct krb5_enctype *krb5,
162+ enum krb5_crypto_mode mode,
163+ size_t *_offset, size_t *_len);
164164
165165 The caller provides the offset and length of the message to the function, which
166166 then alters those values to indicate the region containing the data (plus any
167−padding). It is up to the caller to determine how much padding there is.
167+padding). It is up to the caller to determine how much padding there is. The
168+function returns an error if the length is too small or if the mode is
169+unsupported. An additional function::
170+
171+ int crypto_krb5_check_data_len(const struct krb5_enctype *krb5,
172+ enum krb5_crypto_mode mode,
173+ size_t len, size_t min_content);
174+
175+is provided to just do a basic check that the decrypted/verified message would
176+have a sufficient minimum payload.
168177
169178 Preparation Functions
170179 ---------------------
Documentation/crypto/userspace-if.rst+87−48
@@ -4,26 +4,88 @@ User Space Interface · 3 unmodified lines
44 Introduction
55 ------------
66
7−The concepts of the kernel crypto API visible to kernel space is fully
8−applicable to the user space interface as well. Therefore, the kernel
9−crypto API high level discussion for the in-kernel use cases applies
10−here as well.
11−
12−The major difference, however, is that user space can only act as a
13−consumer and never as a provider of a transformation or cipher
14−algorithm.
15−
16−The following covers the user space interface exported by the kernel
17−crypto API. A working example of this description is libkcapi that can
18−be obtained from [1]. That library can be used by user space
19−applications that require cryptographic services from the kernel.
20−
21−Some details of the in-kernel kernel crypto API aspects do not apply to
22−user space, however. This includes the difference between synchronous
23−and asynchronous invocations. The user space API call is fully
24−synchronous.
25−
26−[1] https://www.chronox.de/libkcapi/index.html
7+AF_ALG provides unprivileged userspace programs access to arbitrary hash,
8+symmetric cipher, AEAD, and RNG algorithms that are implemented in kernel-mode
9+code.
10+
11+AF_ALG is insecure and is deprecated. Originally added to the kernel in 2010,
12+most kernel developers now consider it to be a mistake. Support for hardware
13+accelerators, which was the original purpose of AF_ALG, has been removed.
14+
15+AF_ALG continues to be supported only for backwards compatibility. On systems
16+where no programs using AF_ALG remain, the support for it should be disabled by
17+disabling ``CONFIG_CRYPTO_USER_API_*``.
18+
19+Deprecation
20+-----------
21+
22+AF_ALG was originally intended to provide userspace programs access to crypto
23+accelerators that they wouldn't otherwise have access to.
24+
25+However, that capability turned out to not be useful on very many systems. More
26+significantly, the actual implementation exposes a vastly greater amount of
27+functionality than that. It actually provides access to all software algorithms.
28+
29+This includes arbitrary compositions of different algorithms created via a
30+complex template system, as well as algorithms that only make sense as internal
31+implementation details of other algorithms. In the past, it also included full
32+zero-copy support, which was difficult for the kernel to implement securely.
33+
34+Ultimately, these algorithms are just math computations. They use the same
35+instructions that userspace programs already have access to, just accessed in a
36+much more convoluted and less efficient way.
37+
38+Indeed, userspace code is nearly always what is being used anyway. These same
39+algorithms are widely implemented in userspace crypto libraries.
40+
41+Even when zero-copy and off-CPU accelerators were supported, AF_ALG was usually
42+much slower than optimized software cryptography in userspace. This was
43+especially true for the small message sizes usually seen in performance-critical
44+workloads. While it was possible to demonstrate performance wins for hashing
45+large files on embedded devices, it is hard to imagine a situation where this
46+would be performance-critical.
47+
48+Nowadays, AF_ALG no longer supports zero-copy or off-CPU accelerators.
49+Therefore, it is *always* slower than an optimized userspace implementation,
50+even for large messages. The only possible advantage left is that it avoids
51+duplicating code between kernel and userspace. However, userspace
52+implementations, especially hardware-accelerated ones, do not need to be large.
53+Just because OpenSSL is huge does not mean that all userspace cryptography
54+libraries are.
55+
56+Meanwhile, AF_ALG hasn't been withstanding modern vulnerability discovery tools
57+such as syzbot and large language models. It receives a steady stream of CVEs.
58+Some of the examples include:
59+
60+- CVE-2026-31677
61+- CVE-2026-31431 (https://copy.fail)
62+- CVE-2025-38079
63+- CVE-2025-37808
64+- CVE-2024-26824
65+- CVE-2022-48781
66+- CVE-2019-8912
67+- CVE-2018-14619
68+- CVE-2017-18075
69+- CVE-2017-17806
70+- CVE-2017-17805
71+- CVE-2016-10147
72+- CVE-2015-8970
73+- CVE-2015-3331
74+- CVE-2014-9644
75+- CVE-2013-7421
76+- CVE-2011-4081
77+
78+Hardware accelerator drivers are frequently buggy. To reduce attack surface,
79+AF_ALG now only provides access to algorithms implemented in software. This
80+means that AF_ALG no longer fulfills its original purpose.
81+
82+It is recommended that, whenever possible, userspace programs be migrated to
83+userspace crypto code (which again, is what is normally used anyway) and
84+``CONFIG_CRYPTO_USER_API_*`` be disabled. On systems that use SELinux, SELinux
85+can also be used to restrict the use of AF_ALG to trusted programs.
86+
87+The remainder of this documentation provides the historical documentation for
88+the deprecated AF_ALG interface.
2789
2890 User Space API General Remarks
2991 ------------------------------
@@ -297,7 +359,7 @@ follows: · 267 unmodified lines
297359 struct sockaddr_alg sa = {
298360 .salg_family = AF_ALG,
299361 .salg_type = "rng", /* this selects the random number generator */
300− .salg_name = "drbg_nopr_sha256" /* this is the RNG name */
362+ .salg_name = "stdrng" /* this is the RNG name */
301363 };
302364
303365
@@ -327,33 +389,10 @@ CRYPTO_USER_API_RNG_CAVP option: · 23 unmodified lines
327389 Zero-Copy Interface
328390 -------------------
329391
330−In addition to the send/write/read/recv system call family, the AF_ALG
331−interface can be accessed with the zero-copy interface of
332−splice/vmsplice. As the name indicates, the kernel tries to avoid a copy
333−operation into kernel space.
334−
335−The zero-copy operation requires data to be aligned at the page
336−boundary. Non-aligned data can be used as well, but may require more
337−operations of the kernel which would defeat the speed gains obtained
338−from the zero-copy interface.
339−
340−The system-inherent limit for the size of one zero-copy operation is 16
341−pages. If more data is to be sent to AF_ALG, user space must slice the
342−input into segments with a maximum size of 16 pages.
343−
344−Zero-copy can be used with the following code example (a complete
345−working example is provided with libkcapi):
346−
347−::
348−
349− int pipes[2];
350−
351− pipe(pipes);
352− /* input data in iov */
353− vmsplice(pipes[1], iov, iovlen, SPLICE_F_GIFT);
354− /* opfd is the file descriptor returned from accept() system call */
355− splice(pipes[0], NULL, opfd, NULL, ret, 0);
356− read(opfd, out, outlen);
392+AF_ALG used to have zero-copy support, but it was removed due to it being a
393+frequent source of vulnerabilities. For backwards compatibility the splice()
394+and sendfile() system calls are still supported, but the kernel will make an
395+internal copy of the data before passing it to the crypto code.
357396
358397
359398 Setsockopt Interface
Documentation/dev-tools/autofdo.rst+41−0
@@ -61,6 +61,9 @@ process consists of the following steps: · 60 unmodified lines
6161 the AutoFDO profile via offline tools.
6262
6363 The support requires a Clang compiler LLVM 17 or later.
64+Current supported architectures include x86/x86_64 (via LBR) and
65+arm64 (via SPE or ETM).
66+
6467
6568 Preparation
6669 ===========
@@ -141,6 +144,35 @@ Here is an example workflow for AutoFDO kernel: · 74 unmodified lines
141144
142145 $ perf record --pfm-events RETIRED_TAKEN_BRANCH_INSTRUCTIONS:k -a -N -b -c <count> -o <perf_file> -- <loadtest>
143146
147+ - For arm64 with SPE:
148+
149+ There are a few kernel features that must be enabled to collect SPE profiles on Arm.
150+ Below is a list of the required features:
151+
152+ - CONFIG_ARM_SPE_PMU=y
153+ - CONFIG_PID_IN_CONTEXTIDR=y
154+ - kpti=off
155+
156+ Use the following command to generate SPE perf data file::
157+
158+ $ perf record -e ' arm_spe_0/branch_filter=1,load_filter=0,store_filter=0/' -a -c <count> -N --no-switch-events -o <perf_file> -- <loadtest>
159+
160+ - For arm64 with ETM trace:
161+
162+ Follow the instructions in `Linaro OpenCSD document
163+ <https://github.com/Linaro/OpenCSD/blob/master/decoder/tests/auto-fdo/autofdo.md>`_
164+ to record ETM traces for AutoFDO::
165+
166+ $ perf record -e cs_etm/@tmc_etr0/k -a -o <etm_perf_file> -- <loadtest>
167+ $ perf inject -i <etm_perf_file> -o <perf_file> --itrace=i500009il
168+
169+ For ARM platforms running Android, follow the instructions in `Android simpleperf
170+ document <https://android.googlesource.com/kernel/common/+/refs/heads/android-mainline/gki/aarch64/afdo>`_
171+ to record ETM traces for AutoFDO::
172+
173+ $ simpleperf record -e cs-etm:k -a -o <etm_perf_file> -- <loadtest>
174+ $ simpleperf inject -i <etm_perf_file> -o <text_perf_file> --symdir <vmlinux_dir>
175+
144176 4) (Optional) Download the raw perf file to the host machine.
145177
146178 5) To generate an AutoFDO profile, two offline tools are available:
@@ -162,6 +194,15 @@ Here is an example workflow for AutoFDO kernel: · 15 unmodified lines
162194
163195 $ llvm-profdata merge -o <profile_file> <profile_1> <profile_2> ... <profile_n>
164196
197+ For arm64 SPE, use the following command::
198+
199+ $ create_llvm_prof --binary=<vmlinux> --profile=<perf_file> --profiler=perf_spe --format=extbinary --out=<profile_file>
200+
201+ For arm64 ETM, use the following command::
202+
203+ $ create_llvm_prof --binary=<vmlinux> --profile=<text_perf_file> --profiler=text -format=extbinary -out=<profile_file>
204+
205+
165206 6) Rebuild the kernel using the AutoFDO profile file with the same config as step 1,
166207 (Note CONFIG_AUTOFDO_CLANG needs to be enabled)::
167208
Documentation/dev-tools/checkpatch.rst+14−0
@@ -184,6 +184,13 @@ Available options: · 183 unmodified lines
184184 Override checking of perl version. Runtime errors may be encountered after
185185 enabling this flag if the perl version does not meet the minimum specified.
186186
187+ - --spdx-cxx-comments
188+
189+ Don't force C comments ``/* */`` for SPDX license (required by old
190+ toolchains), allow also C++ comments ``//``.
191+
192+ NOTE: it should *not* be used for Linux mainline.
193+
187194 - --codespell
188195
189196 Use the codespell dictionary for checking spelling errors.
@@ -210,6 +217,13 @@ Available options: · 20 unmodified lines
210217
211218 Display the help text.
212219
220+Configuration file
221+==================
222+
223+Default configuration options can be stored in ``.checkpatch.conf``, search
224+path: ``.:$HOME:.scripts`` or in a directory specified by ``$CHECKPATCH_CONFIG_DIR``
225+environment variable (falling back to the default search path).
226+
213227 Message Levels
214228 ==============
215229
Documentation/dev-tools/context-analysis.rst+1−1
@@ -17,7 +17,7 @@ features. To enable for Clang, configure the kernel with:: · 16 unmodified lines
1717
1818 CONFIG_WARN_CONTEXT_ANALYSIS=y
1919
20−The feature requires Clang 22 or later.
20+The feature requires Clang 23 or later.
2121
2222 The analysis is *opt-in by default*, and requires declaring which modules and
2323 subsystems should be analyzed in the respective `Makefile`::
Documentation/dev-tools/kcov.rst+6−0
@@ -237,6 +237,9 @@ Both ``kcov_remote_start`` and ``kcov_remote_stop`` annotations and the · 236 unmodified lines
237237 collection sections. The way a handle is used depends on the context where the
238238 matching code section executes.
239239
240+A thread can use two separate KCOV instances to collect remote coverage and
241+normal coverage at the same time.
242+
240243 KCOV supports collecting remote coverage from the following contexts:
241244
242245 1. Global kernel background tasks. These are the tasks that are spawned during
@@ -262,6 +265,9 @@ gets saved to the ``kcov_handle`` field in the current ``task_struct`` and · 19 unmodified lines
262265 needs to be passed to the newly spawned local tasks via custom kernel code
263266 modifications. Those tasks should in turn use the passed handle in their
264267 ``kcov_remote_start`` and ``kcov_remote_stop`` annotations.
268+In the kernel, common handles are wrapped in a ``kcov_common_handle_id``, which
269+consumes no space in builds without ``CONFIG_KCOV``; subsystems that integrate
270+with this mechanism should not need to use any ``#ifdef CONFIG_KCOV`` or such.
265271
266272 KCOV follows a predefined format for both global and common handles. Each
267273 handle is a ``u64`` integer. Currently, only the one top and the lower 4 bytes
Documentation/dev-tools/kselftest.rst+12−5
@@ -15,11 +15,6 @@ able to run that test on an older kernel. Hence, it is important to keep · 14 unmodified lines
1515 code that can still test an older kernel and make sure it skips the test
1616 gracefully on newer releases.
1717
18−You can find additional information on Kselftest framework, how to
19−write new tests using the framework on Kselftest wiki:
20−
21−https://kselftest.wiki.kernel.org/
22−
2318 On some systems, hot-plug tests could hang forever waiting for cpu and
2419 memory to be ready to be offlined. A special hot-plug target is created
2520 to run the full range of hot-plug tests. In default mode, hot-plug tests run
@@ -126,6 +121,18 @@ dedicated skiplist:: · 100 unmodified lines
126121 See the top-level tools/testing/selftests/Makefile for the list of all
127122 possible targets.
128123
124+Requiring all targets to build successfully
125+===========================================
126+
127+By default, the build succeeds as long as at least one target builds
128+without error. Set ``FORCE_TARGETS=1`` to instead require every target to
129+build successfully; make will abort as soon as any target fails::
130+
131+ $ make -C tools/testing/selftests FORCE_TARGETS=1
132+
133+This applies to both the ``all`` and ``install`` targets and is useful in
134+CI environments where a silent partial build would be misleading.
135+
129136 Running the full range hotplug selftests
130137 ========================================
131138
Documentation/dev-tools/kunit/run_wrapper.rst+3−0
@@ -324,6 +324,9 @@ command line arguments: · 323 unmodified lines
324324 - ``--json``: If set, stores the test results in a JSON format and prints to `stdout` or
325325 saves to a file if a filename is specified.
326326
327+- ``--junit``: If set, stores the test results in JUnit XML format and prints to `stdout` or
328+ saves to a file if a filename is specified.
329+
327330 - ``--filter``: Specifies filters on test attributes, for example, ``speed!=slow``.
328331 Multiple filters can be used by wrapping input in quotes and separating filters
329332 by commas. Example: ``--filter "speed>slow, module=example"``.
Documentation/dev-tools/kunit/usage.rst+45−1
@@ -157,6 +157,50 @@ Alternatively, one can take full control over the error message by using · 156 unmodified lines
157157 if (some_setup_function())
158158 KUNIT_FAIL(test, "Failed to setup thing for testing");
159159
160+Suppressing warning backtraces
161+------------------------------
162+
163+Some unit tests trigger warning backtraces either intentionally or as a side
164+effect. Such backtraces are normally undesirable since they distract from
165+the actual test and may result in the impression that there is a problem.
166+
167+Backtraces can be suppressed with **task-scoped suppression**: while
168+suppression is active on the current task, the backtrace and stack dump from
169+``WARN*()``, ``WARN_ON*()``, and related macros on that task are suppressed.
170+Two API forms are available.
171+
172+- Scoped suppression is the simplest form. Wrap the code that triggers
173+ warnings in a ``kunit_warning_suppress()`` block:
174+
175+.. code-block:: c
176+
177+ static void some_test(struct kunit *test)
178+ {
179+ kunit_warning_suppress(test) {
180+ trigger_backtrace();
181+ KUNIT_EXPECT_SUPPRESSED_WARNING_COUNT(test, 1);
182+ }
183+ }
184+
185+.. note::
186+ The warning count must be checked inside the block; the suppression handle
187+ is not accessible after the block exits.
188+
189+- Direct functions return an explicit handle pointer. Use them when the handle
190+ needs to be retained or passed across helper functions:
191+
192+.. code-block:: c
193+
194+ static void some_test(struct kunit *test)
195+ {
196+ struct kunit_suppressed_warning *w;
197+
198+ w = kunit_start_suppress_warning(test);
199+ trigger_backtrace();
200+ kunit_end_suppress_warning(test, w);
201+
202+ KUNIT_EXPECT_EQ(test, kunit_suppressed_warning_count(w), 1);
203+ }
160204
161205 Test Suites
162206 ~~~~~~~~~~~
@@ -1211,4 +1255,4 @@ For example: · 1048 unmodified lines
12111255 dev_managed_string = devm_kstrdup(fake_device, "Hello, World!");
12121256
12131257 // Everything is cleaned up automatically when the test ends.
1214− }
1258+ }
Documentation/dev-tools/propeller.rst+37−12
@@ -28,8 +28,10 @@ A few important notes about adopting Propeller optimization: · 27 unmodified lines
2828 and the linker(ld.lld).
2929
3030 #. In addition to LLVM toolchain, Propeller requires a profiling
31− conversion tool: https://github.com/google/autofdo with a release
32− after v0.30.1: https://github.com/google/autofdo/releases/tag/v0.30.1.
31+ conversion tool: https://github.com/google/llvm-propeller.
32+
33+Current supported architectures include x86/X86_64 (via LBR),
34+and arm64 (via SPE).
3335
3436 The Propeller optimization process involves the following steps:
3537
@@ -124,17 +126,30 @@ Here is an example workflow for building an AutoFDO+Propeller kernel: · 88 unmodified lines
124126
125127 $ perf record --pfm-event RETIRED_TAKEN_BRANCH_INSTRUCTIONS:k -a -N -b -c <count> -o <perf_file> -- <loadtest>
126128
127− Note you can repeat the above steps to collect multiple <perf_file>s.
129+ - For arm64 with SPE::
130+ There are a few kernel features that must be enabled to collect SPE profiles on Arm.
131+ Below is a list of the required features:
132+
133+ - CONFIG_ARM_SPE_PMU=y
134+ - CONFIG_PID_IN_CONTEXTIDR=y
135+ - kpti=off
136+
137+ Use the following command to generate SPE perf data file::
138+
139+ $ perf record -e 'arm_spe_0/branch_filter=1,load_filter=0,store_filter=0/' -a -N -c <count> --no-switch-events -o <perf_file> -- <loadtest>
140+
141+ Note you can repeat the above steps to collect multiple <perf_file>s.
128142
129143 4) (Optional) Download the raw perf file(s) to the host machine.
130144
131−5) Use the create_llvm_prof tool (https://github.com/google/autofdo) to
145+5) Use the generate_propeller_profiles tool (https://github.com/google/llvm-propeller) to
132146 generate Propeller profile. ::
133147
134− $ create_llvm_prof --binary=<vmlinux> --profile=<perf_file>
135− --format=propeller --propeller_output_module_name
136− --out=<propeller_profile_prefix>_cc_profile.txt
137− --propeller_symorder=<propeller_profile_prefix>_ld_profile.txt
148+ $ generate_propeller_profiles \
149+ --binary=<vmlinux> --profile=<perf_file> \
150+ --format=propeller --propeller_output_module_name \
151+ --out=<propeller_profile_prefix>_cc_profile.txt \
152+ --propeller_symorder=<propeller_profile_prefix>_ld_profile.txt
138153
139154 "<propeller_profile_prefix>" can be something like "/home/user/dir/any_string".
140155
@@ -146,10 +161,20 @@ Here is an example workflow for building an AutoFDO+Propeller kernel: · 5 unmodified lines
146161 you can create a temp list file "<perf_file_list>" with each line
147162 containing one perf file name and run::
148163
149− $ create_llvm_prof --binary=<vmlinux> --profile=@<perf_file_list>
150− --format=propeller --propeller_output_module_name
151− --out=<propeller_profile_prefix>_cc_profile.txt
152− --propeller_symorder=<propeller_profile_prefix>_ld_profile.txt
164+ $ generate_propeller_profiles \
165+ --binary=<vmlinux> --profile=@<perf_file_list> \
166+ --format=propeller --propeller_output_module_name \
167+ --out=<propeller_profile_prefix>_cc_profile.txt \
168+ --propeller_symorder=<propeller_profile_prefix>_ld_profile.txt
169+
170+ For arm64 SPE, add the option '--profiler=perf_spe', like::
171+
172+ $ generate_propeller_profiles \
173+ --binary=<vmlinux> --profile=<perf_file> \
174+ --profiler=perf_spe \
175+ --format=propeller --propeller_output_module_name \
176+ --out=<propeller_profile_prefix>_cc_profile.txt \
177+ --propeller_symorder=<propeller_profile_prefix>_ld_profile.txt
153178
154179 6) Rebuild the kernel using the AutoFDO and Propeller
155180 profiles. ::
Documentation/devicetree/bindings/Makefile+17−2
@@ -46,6 +46,18 @@ quiet_cmd_chk_bindings = CHKDT $(src) · 45 unmodified lines
4646 xargs -n200 -P$$(nproc) $(DT_DOC_CHECKER) -u $(src)) \
4747 && touch $@ || true
4848
49+DT_CHK_STYLE = $(srctree)/scripts/dtc/dt-check-style
50+
51+# Feed the file list to the checker via @argfile in a single Python
52+# process so the ruamel.yaml import is paid once. scripts/jobserver-exec
53+# claims slots from the GNU make jobserver and exposes the count via
54+# $PARALLELISM, which dt-check-style picks up to size its worker pool.
55+quiet_cmd_chk_style = STYLE $(src)
56+ cmd_chk_style = f=$$(mktemp) && $(find_cmd) > $$f && \
57+ $(PYTHON3) $(srctree)/scripts/jobserver-exec \
58+ $(PYTHON3) $(DT_CHK_STYLE) @$$f \
59+ && touch $@ || true; rm -f $$f
60+
4961 quiet_cmd_mk_schema = SCHEMA $@
5062 cmd_mk_schema = f=$$(mktemp) ; \
5163 $(find_all_cmd) > $$f ; \
@@ -62,13 +74,16 @@ override DTC_FLAGS := \ · 10 unmodified lines
6274 $(obj)/processed-schema.json: $(DT_DOCS) check_dtschema_version FORCE
6375 $(call if_changed,mk_schema)
6476
65−targets += .dt-binding.checked .yamllint.checked
77+targets += .dt-binding.checked .yamllint.checked .dt-style.checked
6678 $(obj)/.yamllint.checked: $(DT_DOCS) $(src)/.yamllint FORCE
6779 $(if $(DT_SCHEMA_LINT),$(call if_changed,yamllint),)
6880
6981 $(obj)/.dt-binding.checked: $(DT_DOCS) FORCE
7082 $(call if_changed,chk_bindings)
7183
84+$(obj)/.dt-style.checked: $(DT_DOCS) FORCE
85+ $(call if_changed,chk_style)
86+
7287 always-y += processed-schema.json
7388 targets += $(patsubst $(obj)/%,%, $(CHK_DT_EXAMPLES))
7489 targets += $(patsubst $(obj)/%.dtb,%.dts, $(CHK_DT_EXAMPLES))
@@ -82,7 +97,7 @@ dt_compatible_check: $(obj)/processed-schema.json · 7 unmodified lines
8297 $(Q)$(srctree)/scripts/dtc/dt-extract-compatibles $(srctree) | xargs dt-check-compatible -v -s $<
8398
8499 PHONY += dt_binding_check_one
85−dt_binding_check_one: $(obj)/.dt-binding.checked $(obj)/.yamllint.checked
100+dt_binding_check_one: $(obj)/.dt-binding.checked $(obj)/.yamllint.checked $(obj)/.dt-style.checked
86101
87102 PHONY += dt_binding_check
88103 dt_binding_check: dt_binding_check_one $(CHK_DT_EXAMPLES)
Documentation/devicetree/bindings/arm/altera.yaml+7−0
@@ -111,10 +111,17 @@ properties: · 110 unmodified lines
111111 - enum:
112112 - intel,socfpga-agilex5-socdk
113113 - intel,socfpga-agilex5-socdk-013b
114+ - intel,socfpga-agilex5-socdk-debug
114115 - intel,socfpga-agilex5-socdk-modular
115116 - intel,socfpga-agilex5-socdk-nand
116117 - const: intel,socfpga-agilex5
117118
119+ - description: Agilex7m boards
120+ items:
121+ - enum:
122+ - altr,socfpga-agilex7m-socdk
123+ - const: altr,socfpga-agilex7m
124+
118125 - description: SoCFPGA VT
119126 items:
120127 - const: altr,socfpga-vt
Documentation/devicetree/bindings/arm/amlogic.yaml+6−0
@@ -234,6 +234,12 @@ properties: · 233 unmodified lines
234234 - amlogic,av400
235235 - const: amlogic,a5
236236
237+ - description: Boards with the Amlogic A9 A311Y3 SoC
238+ items:
239+ - enum:
240+ - amlogic,by401
241+ - const: amlogic,a9
242+
237243 - description: Boards with the Amlogic C3 C302X/C308L SoC
238244 items:
239245 - enum:
Documentation/devicetree/bindings/arm/apple.yaml+18−0
@@ -96,6 +96,13 @@ description: | · 95 unmodified lines
9696 - MacBook Pro (13-inch, M2, 2022)
9797 - Mac mini (M2, 2023)
9898
99+ Devices based on the "M3" SoC:
100+
101+ - MacBook Air (13-inch, M3, 2024)
102+ - MacBook Air (15-inch, M3, 2024)
103+ - MacBook Pro (14-inch, M3, 2023)
104+ - iMac (24-inch, M3, 2023)
105+
99106 Devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs:
100107
101108 - MacBook Pro (14-inch, M1 Pro, 2021)
@@ -297,6 +304,17 @@ properties: · 195 unmodified lines
297304 - const: apple,t8112
298305 - const: apple,arm-platform
299306
307+ - description: Apple M3 SoC based platforms
308+ items:
309+ - enum:
310+ - apple,j433 # iMac (24-inch, 2x USB-C, M3, 2023)
311+ - apple,j434 # iMac (24-inch, 4x USB-C, M3, 2023)
312+ - apple,j504 # MacBook Pro (14-inch, M3, 2023)
313+ - apple,j613 # MacBook Air (13-inch, M3, 2024)
314+ - apple,j615 # MacBook Air (15-inch, M3, 2024)
315+ - const: apple,t8122
316+ - const: apple,arm-platform
317+
300318 - description: Apple M1 Pro SoC based platforms
301319 items:
302320 - enum:
Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml+3−1
@@ -36,7 +36,9 @@ properties: · 35 unmodified lines
3636 - const: syscon
3737 - const: simple-mfd
3838 - items:
39− - const: apple,t6020-pmgr
39+ - enum:
40+ - apple,t6020-pmgr
41+ - apple,t8122-pmgr
4042 - const: apple,t8103-pmgr
4143 - const: syscon
4244 - const: simple-mfd
Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml+8−0
@@ -95,6 +95,8 @@ properties: · 94 unmodified lines
9595 - facebook,greatlakes-bmc
9696 - facebook,harma-bmc
9797 - facebook,minerva-cmc
98+ - facebook,rainiera6-bmc
99+ - facebook,sanmiguel-bmc
98100 - facebook,santabarbara-bmc
99101 - facebook,yosemite4-bmc
100102 - facebook,yosemite5-bmc
@@ -117,4 +119,10 @@ properties: · 16 unmodified lines
117119 - ufispace,ncplite-bmc
118120 - const: aspeed,ast2600
119121
122+ - description: AST2700 based boards
123+ items:
124+ - enum:
125+ - aspeed,ast2700-evb
126+ - const: aspeed,ast2700
127+
120128 additionalProperties: true
Documentation/devicetree/bindings/arm/cpus.yaml+1−0
@@ -223,6 +223,7 @@ properties: · 222 unmodified lines
223223 - qcom,oryon-1-2
224224 - qcom,oryon-1-3
225225 - qcom,oryon-1-4
226+ - qcom,oryon-1-5
226227 - qcom,oryon-2-1
227228 - qcom,oryon-2-2
228229 - qcom,oryon-2-3
Documentation/devicetree/bindings/arm/fsl.yaml+44−1
@@ -688,7 +688,7 @@ properties: · 687 unmodified lines
688688 - const: phytec,imx6ul-pcl063 # PHYTEC phyCORE-i.MX 6UL
689689 - const: fsl,imx6ul
690690
691− - description: i.MX6UL Variscite VAR-SOM-MX6 Boards
691+ - description: i.MX6UL Variscite VAR-SOM-6UL Boards
692692 items:
693693 - const: variscite,mx6ulconcerto
694694 - const: variscite,var-som-imx6ul
@@ -797,6 +797,12 @@ properties: · 102 unmodified lines
797797 - const: phytec,imx6ull-pcl063 # PHYTEC phyCORE-i.MX 6ULL
798798 - const: fsl,imx6ull
799799
800+ - description: i.MX6ULL Variscite VAR-SOM-6UL Boards
801+ items:
802+ - const: variscite,mx6ullconcerto # Variscite VAR-SOM-6UL dev kit board
803+ - const: variscite,var-som-imx6ull # Variscite VAR-SOM-6UL SoM (6ULL variant)
804+ - const: fsl,imx6ull
805+
800806 - description: i.MX6ULL Boards with Toradex Colibri iMX6ULL Modules
801807 items:
802808 - enum:
@@ -1025,6 +1031,7 @@ properties: · 222 unmodified lines
10251031 - toradex,verdin-imx8mm-nonwifi-ivy # Verdin iMX8M Mini Module on Ivy
10261032 - toradex,verdin-imx8mm-nonwifi-mallow # Verdin iMX8M Mini Module on Mallow
10271033 - toradex,verdin-imx8mm-nonwifi-yavia # Verdin iMX8M Mini Module on Yavia
1034+ - toradex,verdin-imx8mm-nonwifi-zinnia # Verdin iMX8M Mini Module on Zinnia
10281035 - const: toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Module without Wi-Fi / BT
10291036 - const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module
10301037 - const: fsl,imx8mm
@@ -1037,6 +1044,7 @@ properties: · 6 unmodified lines
10371044 - toradex,verdin-imx8mm-wifi-ivy # Verdin iMX8M Mini Wi-Fi / BT Module on Ivy
10381045 - toradex,verdin-imx8mm-wifi-mallow # Verdin iMX8M Mini Wi-Fi / BT Module on Mallow
10391046 - toradex,verdin-imx8mm-wifi-yavia # Verdin iMX8M Mini Wi-Fi / BT Module on Yavia
1047+ - toradex,verdin-imx8mm-wifi-zinnia # Verdin iMX8M Mini Wi-Fi / BT Module on Zinnia
10401048 - const: toradex,verdin-imx8mm-wifi # Verdin iMX8M Mini Wi-Fi / BT Module
10411049 - const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module
10421050 - const: fsl,imx8mm
@@ -1271,6 +1279,7 @@ properties: · 228 unmodified lines
12711279 - toradex,verdin-imx8mp-nonwifi-ivy # Verdin iMX8M Plus Module on Ivy
12721280 - toradex,verdin-imx8mp-nonwifi-mallow # Verdin iMX8M Plus Module on Mallow
12731281 - toradex,verdin-imx8mp-nonwifi-yavia # Verdin iMX8M Plus Module on Yavia
1282+ - toradex,verdin-imx8mp-nonwifi-zinnia # Verdin iMX8M Plus Module on Zinnia
12741283 - const: toradex,verdin-imx8mp-nonwifi # Verdin iMX8M Plus Module without Wi-Fi / BT
12751284 - const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module
12761285 - const: fsl,imx8mp
@@ -1283,6 +1292,7 @@ properties: · 6 unmodified lines
12831292 - toradex,verdin-imx8mp-wifi-ivy # Verdin iMX8M Plus Wi-Fi / BT Module on Ivy
12841293 - toradex,verdin-imx8mp-wifi-mallow # Verdin iMX8M Plus Wi-Fi / BT Module on Mallow
12851294 - toradex,verdin-imx8mp-wifi-yavia # Verdin iMX8M Plus Wi-Fi / BT Module on Yavia
1295+ - toradex,verdin-imx8mp-wifi-zinnia # Verdin iMX8M Plus Wi-Fi / BT Module on Zinnia
12861296 - const: toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Module
12871297 - const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module
12881298 - const: fsl,imx8mp
@@ -1394,6 +1404,13 @@ properties: · 105 unmodified lines
13941404 - fsl,imx8dxl-evk # i.MX8DXL EVK Board
13951405 - const: fsl,imx8dxl
13961406
1407+ - description: SolidRun i.MX8DXL SoM based boards
1408+ items:
1409+ - enum:
1410+ - solidrun,imx8dxl-hummingboard-telematics # SolidRun i.MX8DXL SoM EVK Board
1411+ - const: solidrun,imx8dxl-sr-som
1412+ - const: fsl,imx8dxl
1413+
13971414 - description: i.MX8QXP/i.MX8DX Boards with Toradex Colibri iMX8X Modules
13981415 items:
13991416 - enum:
@@ -1458,6 +1475,7 @@ properties: · 58 unmodified lines
14581475 - description: i.MX91 based Boards
14591476 items:
14601477 - enum:
1478+ - fsl,imx91-9x9-qsb # i.MX91 9x9 QSB Board
14611479 - fsl,imx91-11x11-evk # i.MX91 11x11 EVK Board
14621480 - fsl,imx91-11x11-frdm # FRDM i.MX91 Development Board
14631481 - fsl,imx91-11x11-frdm-s # FRDM i.MX91S Development Board
@@ -1482,9 +1500,11 @@ properties: · 18 unmodified lines
14821500 - description: i.MX95 based Boards
14831501 items:
14841502 - enum:
1503+ - fsl,imx95-15x15-ab2 # i.MX95 15x15 Audio Board V2
14851504 - fsl,imx95-15x15-evk # i.MX95 15x15 EVK Board
14861505 - fsl,imx95-15x15-frdm # i.MX95 15x15 FRDM Board
14871506 - fsl,imx95-19x19-evk # i.MX95 19x19 EVK Board
1507+ - fsl,imx95-19x19-frdm-pro # i.MX95 19x19 FRDM PRO Board
14881508 - toradex,verdin-imx95-19x19-evk # i.MX95 Verdin Evaluation Kit (EVK)
14891509 - const: fsl,imx95
14901510
@@ -1501,6 +1521,14 @@ properties: · 10 unmodified lines
15011521 - const: phytec,imx95-phycore-fpsc # phyCORE-i.MX 95 FPSC
15021522 - const: fsl,imx95
15031523
1524+ - description: Toradex Boards with Aquila iMX95 Modules
1525+ items:
1526+ - enum:
1527+ - toradex,aquila-imx95-clover # Aquila iMX95 Module on Clover Board
1528+ - toradex,aquila-imx95-dev # Aquila iMX95 Module on Aquila Development Board
1529+ - const: toradex,aquila-imx95 # Aquila iMX95 Module
1530+ - const: fsl,imx95
1531+
15041532 - description: Toradex Boards with SMARC iMX95 Modules
15051533 items:
15061534 - const: toradex,smarc-imx95-dev # Toradex SMARC iMX95 on Toradex SMARC Development Board
@@ -1515,6 +1543,7 @@ properties: · 8 unmodified lines
15151543 - toradex,verdin-imx95-nonwifi-ivy # Verdin iMX95 Module on Ivy
15161544 - toradex,verdin-imx95-nonwifi-mallow # Verdin iMX95 Module on Mallow
15171545 - toradex,verdin-imx95-nonwifi-yavia # Verdin iMX95 Module on Yavia
1546+ - toradex,verdin-imx95-nonwifi-zinnia # Verdin iMX95 Module on Zinnia
15181547 - const: toradex,verdin-imx95-nonwifi # Verdin iMX95 Module without Wi-Fi / BT
15191548 - const: toradex,verdin-imx95 # Verdin iMX95 Module
15201549 - const: fsl,imx95
@@ -1527,6 +1556,7 @@ properties: · 6 unmodified lines
15271556 - toradex,verdin-imx95-wifi-ivy # Verdin iMX95 Wi-Fi / BT Module on Ivy
15281557 - toradex,verdin-imx95-wifi-mallow # Verdin iMX95 Wi-Fi / BT Module on Mallow
15291558 - toradex,verdin-imx95-wifi-yavia # Verdin iMX95 Wi-Fi / BT Module on Yavia
1559+ - toradex,verdin-imx95-wifi-zinnia # Verdin iMX95 Wi-Fi / BT Module on Zinnia
15301560 - const: toradex,verdin-imx95-wifi # Verdin iMX95 Wi-Fi / BT Module
15311561 - const: toradex,verdin-imx95 # Verdin iMX95 Module
15321562 - const: fsl,imx95
@@ -1614,6 +1644,18 @@ properties: · 81 unmodified lines
16141644 - const: variscite,var-dart-mx91 # Variscite DART-MX91 SOM
16151645 - const: fsl,imx91
16161646
1647+ - description: Variscite VAR-SOM-MX91 based boards
1648+ items:
1649+ - const: variscite,var-som-mx91-symphony # Variscite VAR-SOM-MX91 on Symphony
1650+ - const: variscite,var-som-mx91 # Variscite VAR-SOM-MX91
1651+ - const: fsl,imx91
1652+
1653+ - description: Variscite DART-MX93 based boards
1654+ items:
1655+ - const: variscite,var-dart-mx93-sonata # Variscite DART-MX93 on Sonata Development Board
1656+ - const: variscite,var-dart-mx93 # Variscite DART-MX93 SOM
1657+ - const: fsl,imx93
1658+
16171659 - description: Variscite VAR-SOM-MX93 based boards
16181660 items:
16191661 - const: variscite,var-som-mx93-symphony
@@ -1868,6 +1910,7 @@ properties: · 248 unmodified lines
18681910 - enum:
18691911 - solidrun,clearfog-cx
18701912 - solidrun,honeycomb
1913+ - solidrun,twins-single
18711914 - const: solidrun,lx2160a-cex7
18721915 - const: fsl,lx2160a
18731916
Documentation/devicetree/bindings/arm/gemini.yaml+10−0
@@ -55,6 +55,11 @@ properties: · 54 unmodified lines
5555 - const: itian,sq201
5656 - const: cortina,gemini
5757
58+ - description: Raidsonic NAS IB-4210-B
59+ items:
60+ - const: raidsonic,ib-4210-b
61+ - const: cortina,gemini
62+
5863 - description: Raidsonic NAS IB-4220-B
5964 items:
6065 - const: raidsonic,ib-4220-b
@@ -70,6 +75,11 @@ properties: · 9 unmodified lines
7075 - const: teltonika,rut1xx
7176 - const: cortina,gemini
7277
78+ - description: Verbatim S08V1901-D1 NAS
79+ items:
80+ - const: verbatim,s08v1901-d1
81+ - const: cortina,gemini
82+
7383 - description: Wiligear Wiliboard WBD-111
7484 items:
7585 - const: wiligear,wiliboard-wbd111
Documentation/devicetree/bindings/arm/omap/crossbar.txt+0−55
@@ -1,55 +0,0 @@
1−Some socs have a large number of interrupts requests to service
2−the needs of its many peripherals and subsystems. All of the
3−interrupt lines from the subsystems are not needed at the same
4−time, so they have to be muxed to the irq-controller appropriately.
5−In such places a interrupt controllers are preceded by an CROSSBAR
6−that provides flexibility in muxing the device requests to the controller
7−inputs.
8−
9−Required properties:
10−- compatible : Should be "ti,irq-crossbar"
11−- reg: Base address and the size of the crossbar registers.
12−- interrupt-controller: indicates that this block is an interrupt controller.
13−- ti,max-irqs: Total number of irqs available at the parent interrupt controller.
14−- ti,max-crossbar-sources: Maximum number of crossbar sources that can be routed.
15−- ti,reg-size: Size of a individual register in bytes. Every individual
16− register is assumed to be of same size. Valid sizes are 1, 2, 4.
17−- ti,irqs-reserved: List of the reserved irq lines that are not muxed using
18− crossbar. These interrupt lines are reserved in the soc,
19− so crossbar bar driver should not consider them as free
20− lines.
21−
22−Optional properties:
23−- ti,irqs-skip: This is similar to "ti,irqs-reserved", but these are for
24− SOC-specific hard-wiring of those irqs which unexpectedly bypasses the
25− crossbar. These irqs have a crossbar register, but still cannot be used.
26−
27−- ti,irqs-safe-map: integer which maps to a safe configuration to use
28− when the interrupt controller irq is unused (when not provided, default is 0)
29−
30−Examples:
31− crossbar_mpu: crossbar@4a002a48 {
32− compatible = "ti,irq-crossbar";
33− reg = <0x4a002a48 0x130>;
34− ti,max-irqs = <160>;
35− ti,max-crossbar-sources = <400>;
36− ti,reg-size = <2>;
37− ti,irqs-reserved = <0 1 2 3 5 6 131 132>;
38− ti,irqs-skip = <10 133 139 140>;
39− };
40−
41−Consumer:
42−========
43−See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt and
44−Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml for
45−further details.
46−
47−An interrupt consumer on an SoC using crossbar will use:
48− interrupts = <GIC_SPI request_number interrupt_level>
49−
50−Example:
51− device_x@4a023000 {
52− /* Crossbar 8 used */
53− interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
54− ...
55− };
Documentation/devicetree/bindings/arm/omap/dmm.txt+0−22
@@ -1,22 +0,0 @@
1−OMAP Dynamic Memory Manager (DMM) bindings
2−
3−The dynamic memory manager (DMM) is a module located immediately in front of the
4−SDRAM controllers (called EMIFs on OMAP). DMM manages various aspects of memory
5−accesses such as priority generation amongst initiators, configuration of SDRAM
6−interleaving, optimizing transfer of 2D block objects, and provide MMU-like page
7−translation for initiators which need contiguous dma bus addresses.
8−
9−Required properties:
10−- compatible: Should contain "ti,omap4-dmm" for OMAP4 family
11− Should contain "ti,omap5-dmm" for OMAP5 and DRA7x family
12−- reg: Contains DMM register address range (base address and length)
13−- interrupts: Should contain an interrupt-specifier for DMM_IRQ.
14−- ti,hwmods: Name of the hwmod associated to DMM, which is typically "dmm"
15−
16−Example:
17−
18−dmm@4e000000 {
19− compatible = "ti,omap4-dmm";
20− reg = <0x4e000000 0x800>;
21− ti,hwmods = "dmm";
22−};
Documentation/devicetree/bindings/arm/qcom.yaml+19−2
@@ -79,6 +79,7 @@ properties: · 78 unmodified lines
7979 - items:
8080 - enum:
8181 - fairphone,fp6
82+ - nothing,asteroids
8283 - const: qcom,milos
8384
8485 - items:
@@ -365,6 +366,11 @@ properties: · 280 unmodified lines
365366 - qcom,ipq9574-ap-al02-c9
366367 - const: qcom,ipq9574
367368
369+ - items:
370+ - enum:
371+ - qcom,ipq9650-rdp488
372+ - const: qcom,ipq9650
373+
368374 - items:
369375 - enum:
370376 - qcom,kaanapali-mtp
@@ -822,6 +828,14 @@ properties: · 451 unmodified lines
822828 - const: google,zombie-sku514
823829 - const: qcom,sc7280
824830
831+ - description: Xiaomi Poco F1
832+ items:
833+ - enum:
834+ - xiaomi,beryllium-ebbg
835+ - xiaomi,beryllium-tianma
836+ - const: xiaomi,beryllium
837+ - const: qcom,sdm845
838+
825839 - items:
826840 - enum:
827841 - lenovo,flex-5g
@@ -972,8 +986,6 @@ properties: · 144 unmodified lines
972986 - sony,akatsuki-row
973987 - sony,apollo-row
974988 - thundercomm,db845c
975− - xiaomi,beryllium
976− - xiaomi,beryllium-ebbg
977989 - xiaomi,polaris
978990 - const: qcom,sdm845
979991
@@ -1040,6 +1052,7 @@ properties: · 60 unmodified lines
10401052
10411053 - items:
10421054 - enum:
1055+ - motorola,dubai
10431056 - nothing,spacewar
10441057 - const: qcom,sm7325
10451058
@@ -1168,6 +1181,10 @@ properties: · 122 unmodified lines
11681181 - const: microsoft,denali
11691182 - const: qcom,x1e80100
11701183
1184+ - items:
1185+ - const: microsoft,surface-pro-12in
1186+ - const: qcom,x1p42100
1187+
11711188 - items:
11721189 - enum:
11731190 - qcom,purwa-iot-evk
Documentation/devicetree/bindings/arm/st,nomadik.yaml+23−0
@@ -0,0 +1,23 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/arm/st,nomadik.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: ST Nomadik SoC based Boards
8+
9+maintainers:
10+ - Linus Walleij <linusw@kernel.org>
11+
12+description:
13+ Boards using the Nomadik SoC platform
14+
15+properties:
16+ $nodename:
17+ const: '/'
18+ compatible:
19+ enum:
20+ - st,nomadik-nhk-15
21+ - calaosystems,usb-s8815
22+
23+additionalProperties: true
Documentation/devicetree/bindings/arm/ste-nomadik.txt+0−38
@@ -1,38 +0,0 @@
1−ST-Ericsson Nomadik Device Tree Bindings
2−
3−For various board the "board" node may contain specific properties
4−that pertain to this particular board, such as board-specific GPIOs.
5−
6−Required root node property: src
7−- Nomadik System and reset controller used for basic chip control, clock
8− and reset line control.
9−- compatible: must be "stericsson,nomadik,src"
10−
11−Boards with the Nomadik SoC include:
12−
13−Nomadik NHK-15 board manufactured by ST Microelectronics:
14−
15−Required root node property:
16−
17−compatible="st,nomadik-nhk-15";
18−
19−S8815 "MiniKit" manufactured by Calao Systems:
20−
21−Required root node property:
22−
23−compatible="calaosystems,usb-s8815";
24−
25−Required node: usb-s8815
26−
27−Example:
28−
29−usb-s8815 {
30− ethernet-gpio {
31− gpios = <&gpio3 19 0x1>;
32− interrupts = <19 0x1>;
33− interrupt-parent = <&gpio3>;
34− };
35− mmcsd-gpio {
36− gpios = <&gpio3 16 0x1>;
37− };
38−};
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.yaml+2−0
@@ -16,6 +16,7 @@ properties: · 15 unmodified lines
1616 - nvidia,tegra186-pmc
1717 - nvidia,tegra194-pmc
1818 - nvidia,tegra234-pmc
19+ - nvidia,tegra238-pmc
1920 - nvidia,tegra264-pmc
2021
2122 reg:
@@ -76,6 +77,7 @@ allOf: · 54 unmodified lines
7677 contains:
7778 enum:
7879 - nvidia,tegra234-pmc
80+ - nvidia,tegra238-pmc
7981 - nvidia,tegra264-pmc
8082 then:
8183 properties:
Documentation/devicetree/bindings/arm/ti/k3.yaml+7−0
@@ -97,6 +97,13 @@ properties: · 96 unmodified lines
9797 - const: toradex,verdin-am62 # Verdin AM62 Module
9898 - const: ti,am625
9999
100+ - description: K3 AM625 SoC on TQ-Systems TQMa62xx SoM
101+ items:
102+ - enum:
103+ - tq,am625-tqma6254-mba62xx # MBa62xx base board
104+ - const: tq,am625-tqma6254
105+ - const: ti,am625
106+
100107 - description: K3 AM62P5 SoC Toradex Verdin Modules and Carrier Boards
101108 items:
102109 - enum:
Documentation/devicetree/bindings/arm/zte.yaml+26−0
@@ -0,0 +1,26 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/arm/zte.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: ZTE zx platforms
8+
9+maintainers:
10+ - Stefan Dösinger <stefandoesinger@gmail.com>
11+
12+description: |
13+ ARM platforms using SoCs designed by ZTE. Currently this supports devices
14+ based on the zx297520v3 SoC which is found in LTE routers.
15+
16+properties:
17+ $nodename:
18+ const: "/"
19+ compatible:
20+ oneOf:
21+ - items:
22+ - enum:
23+ - dlink,dwr932m
24+ - const: zte,zx297520v3
25+
26+additionalProperties: true
Documentation/devicetree/bindings/bus/fsl,spba-bus.yaml+4−0
@@ -26,8 +26,10 @@ select: · 25 unmodified lines
2626 compatible:
2727 contains:
2828 enum:
29+ - fsl,aipi-bus
2930 - fsl,aips
3031 - fsl,emi
32+ - fsl,emi-bus
3133 - fsl,spba-bus
3234 required:
3335 - compatible
@@ -39,8 +41,10 @@ properties: · 5 unmodified lines
3941 compatible:
4042 items:
4143 - enum:
44+ - fsl,aipi-bus
4245 - fsl,aips
4346 - fsl,emi
47+ - fsl,emi-bus
4448 - fsl,spba-bus
4549 - const: simple-bus
4650
Documentation/devicetree/bindings/cache/l2c2x0.yaml+3−0
@@ -66,6 +66,9 @@ properties: · 65 unmodified lines
6666 reg:
6767 maxItems: 1
6868
69+ power-domains:
70+ maxItems: 1
71+
6972 arm,data-latency:
7073 description: Cycles of latency for Data RAM accesses. Specifies 3 cells of
7174 read, write and setup latencies. Minimum valid values are 1. Controllers
Documentation/devicetree/bindings/cache/qcom,llcc.yaml+43−0
@@ -20,7 +20,9 @@ description: | · 19 unmodified lines
2020 properties:
2121 compatible:
2222 enum:
23+ - qcom,eliza-llcc
2324 - qcom,glymur-llcc
25+ - qcom,hawi-llcc
2426 - qcom,ipq5424-llcc
2527 - qcom,kaanapali-llcc
2628 - qcom,qcs615-llcc
@@ -35,6 +37,7 @@ properties: · 8 unmodified lines
3537 - qcom,sc8280xp-llcc
3638 - qcom,sdm670-llcc
3739 - qcom,sdm845-llcc
40+ - qcom,shikra-llcc
3841 - qcom,sm6350-llcc
3942 - qcom,sm7150-llcc
4043 - qcom,sm8150-llcc
@@ -57,6 +60,11 @@ properties: · 16 unmodified lines
5760 interrupts:
5861 maxItems: 1
5962
63+ memory-region:
64+ maxItems: 1
65+ description: handle to a reserved-memory node used for firmware-populated
66+ SLC/SCT shared memory.
67+
6068 nvmem-cells:
6169 items:
6270 - description: Reference to an nvmem node for multi channel DDR
@@ -206,6 +214,7 @@ allOf: · 143 unmodified lines
206214 enum:
207215 - qcom,sc7280-llcc
208216 - qcom,sdm670-llcc
217+ - qcom,shikra-llcc
209218 then:
210219 properties:
211220 reg:
@@ -318,6 +327,7 @@ allOf: · 106 unmodified lines
318327 contains:
319328 enum:
320329 - qcom,kaanapali-llcc
330+ - qcom,hawi-llcc
321331 - qcom,sm8450-llcc
322332 - qcom,sm8550-llcc
323333 - qcom,sm8650-llcc
@@ -340,6 +350,39 @@ allOf: · 16 unmodified lines
340350 - const: llcc3_base
341351 - const: llcc_broadcast_base
342352 - const: llcc_broadcast_and_base
353+ - if:
354+ properties:
355+ compatible:
356+ contains:
357+ enum:
358+ - qcom,hawi-llcc
359+ then:
360+ required:
361+ - memory-region
362+ else:
363+ properties:
364+ memory-region: false
365+
366+ - if:
367+ properties:
368+ compatible:
369+ contains:
370+ enum:
371+ - qcom,eliza-llcc
372+ then:
373+ properties:
374+ reg:
375+ items:
376+ - description: LLCC0 base register region
377+ - description: LLCC2 base register region
378+ - description: LLCC broadcast OR register region
379+ - description: LLCC broadcast AND register region
380+ reg-names:
381+ items:
382+ - const: llcc0_base
383+ - const: llcc2_base
384+ - const: llcc_broadcast_base
385+ - const: llcc_broadcast_and_base
343386
344387 additionalProperties: false
345388
Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml+8−4
@@ -24,7 +24,7 @@ properties: · 23 unmodified lines
2424 const: 1
2525
2626 clocks:
27− minItems: 14
27+ minItems: 15
2828 items:
2929 - description: input oscillator
3030 - description: input sys clk
@@ -40,12 +40,13 @@ properties: · 9 unmodified lines
4040 - description: input gp1 pll
4141 - description: input mpll1
4242 - description: input mpll2
43+ - description: input mpll3
4344 - description: external input rmii oscillator (optional)
4445 - description: input video pll0 (optional)
4546 - description: external pad input for rtc (optional)
4647
4748 clock-names:
48− minItems: 14
49+ minItems: 15
4950 items:
5051 - const: xtal
5152 - const: sys
@@ -61,6 +62,7 @@ properties: · 9 unmodified lines
6162 - const: gp1
6263 - const: mpll1
6364 - const: mpll2
65+ - const: mpll3
6466 - const: ext_rmii
6567 - const: vid_pll0
6668 - const: ext_rtc
@@ -97,7 +99,8 @@ examples: · 30 unmodified lines
9799 <&gp0 1>,
98100 <&gp1 1>,
99101 <&mpll 4>,
100− <&mpll 6>;
102+ <&mpll 6>,
103+ <&mpll 8>;
101104 clock-names = "xtal",
102105 "sys",
103106 "fix",
@@ -111,6 +114,7 @@ examples: · 7 unmodified lines
111114 "gp0",
112115 "gp1",
113116 "mpll1",
114− "mpll2";
117+ "mpll2",
118+ "mpll3";
115119 };
116120 };
Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml+1−1
@@ -72,7 +72,7 @@ allOf: · 71 unmodified lines
7272 contains:
7373 enum:
7474 - amlogic,t7-gp0-pll
75− - amlogic,t7-gp1--pll
75+ - amlogic,t7-gp1-pll
7676 - amlogic,t7-hifi-pll
7777 - amlogic,t7-pcie-pll
7878 - amlogic,t7-mpll
Documentation/devicetree/bindings/clock/canaan,k230-clk.yaml+59−0
@@ -0,0 +1,59 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/canaan,k230-clk.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Canaan Kendryte K230 Clock
8+
9+maintainers:
10+ - Xukai Wang <kingxukai@zohomail.com>
11+
12+description:
13+ The Canaan K230 clock controller generates various clocks for SoC
14+ peripherals. See include/dt-bindings/clock/canaan,k230-clk.h for
15+ valid clock IDs.
16+
17+properties:
18+ compatible:
19+ const: canaan,k230-clk
20+
21+ reg:
22+ items:
23+ - description: PLL control registers
24+ - description: Sysclk control registers
25+
26+ clocks:
27+ items:
28+ - description: Main external reference clock
29+ - description:
30+ External clock which used as the pulse input
31+ for the timer to provide timing signals.
32+
33+ clock-names:
34+ items:
35+ - const: osc24m
36+ - const: timer-pulse-in
37+
38+ '#clock-cells':
39+ const: 1
40+
41+required:
42+ - compatible
43+ - reg
44+ - clocks
45+ - clock-names
46+ - '#clock-cells'
47+
48+additionalProperties: false
49+
50+examples:
51+ - |
52+ clock-controller@91102000 {
53+ compatible = "canaan,k230-clk";
54+ reg = <0x91102000 0x40>,
55+ <0x91100000 0x108>;
56+ clocks = <&osc24m>, <&timerx_pulse_in>;
57+ clock-names = "osc24m", "timer-pulse-in";
58+ #clock-cells = <1>;
59+ };
Documentation/devicetree/bindings/clock/cirrus,cs2000-cp.yaml+8−3
@@ -11,14 +11,19 @@ maintainers: · 10 unmodified lines
1111
1212 description: |
1313 The CS2000-CP is an extremely versatile system clocking device that
14− utilizes a programmable phase lock loop.
14+ utilizes a programmable phase lock loop. CS2500 is a compatible
15+ drop-in replacement for CS2000-CP.
1516
1617 Link: https://www.cirrus.com/products/cs2000/
18+ Link: https://www.cirrus.com/products/cs2500/
1719
1820 properties:
1921 compatible:
20− enum:
21− - cirrus,cs2000-cp
22+ oneOf:
23+ - items:
24+ - const: cirrus,cs2500
25+ - const: cirrus,cs2000-cp
26+ - const: cirrus,cs2000-cp
2227
2328 clocks:
2429 description:
Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml+24−10
@@ -37,6 +37,9 @@ properties: · 36 unmodified lines
3737 '#power-domain-cells':
3838 const: 1
3939
40+ '#reset-cells':
41+ const: 1
42+
4043 required:
4144 - compatible
4245 - reg
@@ -44,16 +47,27 @@ required: · 1 unmodified line
4447
4548 additionalProperties: false
4649
47−if:
48− not:
49− properties:
50− compatible:
51− contains:
52− const: marvell,pxa1908-apmu
53−
54−then:
55− properties:
56− '#power-domain-cells': false
50+allOf:
51+ - if:
52+ not:
53+ properties:
54+ compatible:
55+ contains:
56+ const: marvell,pxa1908-apmu
57+ then:
58+ properties:
59+ '#power-domain-cells': false
60+ - if:
61+ not:
62+ properties:
63+ compatible:
64+ contains:
65+ enum:
66+ - marvell,pxa1908-apbc
67+ - marvell,pxa1908-apbcp
68+ then:
69+ properties:
70+ '#reset-cells': false
5771
5872 examples:
5973 # APMU block:
Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml+5−12
@@ -42,12 +42,6 @@ properties: · 41 unmodified lines
4242 - const: cfg_ahb_clk
4343 - const: gcc_disp_gpll0_div_clk_src
4444
45− '#clock-cells':
46− const: 1
47−
48− '#power-domain-cells':
49− const: 1
50−
5145 power-domains:
5246 description:
5347 A phandle and PM domain specifier for the CX power domain.
@@ -58,18 +52,16 @@ properties: · 4 unmodified lines
5852 A phandle to an OPP node describing the power domain's performance point.
5953 maxItems: 1
6054
61− reg:
62− maxItems: 1
63−
6455 required:
6556 - compatible
66− - reg
6757 - clocks
6858 - clock-names
69− - '#clock-cells'
7059 - '#power-domain-cells'
7160
72−additionalProperties: false
61+allOf:
62+ - $ref: qcom,gcc.yaml#
63+
64+unevaluatedProperties: false
7365
7466 examples:
7567 - |
@@ -101,6 +93,7 @@ examples: · 25 unmodified lines
10193 power-domains = <&rpmpd SM6125_VDDCX>;
10294
10395 #clock-cells = <1>;
96+ #reset-cells = <1>;
10497 #power-domain-cells = <1>;
10598 };
10699 ...
Documentation/devicetree/bindings/clock/qcom,hawi-gcc.yaml+63−0
@@ -0,0 +1,63 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/qcom,hawi-gcc.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm Global Clock & Reset Controller on Hawi
8+
9+maintainers:
10+ - Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>
11+
12+description: |
13+ Qualcomm global clock control module provides the clocks, resets and power
14+ domains on Hawi.
15+
16+ See also: include/dt-bindings/clock/qcom,hawi-gcc.h
17+
18+properties:
19+ compatible:
20+ const: qcom,hawi-gcc
21+
22+ clocks:
23+ items:
24+ - description: Board XO source
25+ - description: Board Always On XO source
26+ - description: Sleep clock source
27+ - description: PCIE 0 Pipe clock source
28+ - description: PCIE 1 Pipe clock source
29+ - description: UFS PHY RX symbol 0 clock
30+ - description: UFS PHY RX symbol 1 clock
31+ - description: UFS PHY TX symbol 0 clock
32+ - description: USB3 PHY wrapper pipe clock
33+
34+required:
35+ - compatible
36+ - clocks
37+ - '#power-domain-cells'
38+
39+allOf:
40+ - $ref: qcom,gcc.yaml#
41+
42+unevaluatedProperties: false
43+
44+examples:
45+ - |
46+ #include <dt-bindings/clock/qcom,rpmh.h>
47+ clock-controller@100000 {
48+ compatible = "qcom,hawi-gcc";
49+ reg = <0x00100000 0x1f4200>;
50+ clocks = <&rpmhcc RPMH_CXO_CLK>,
51+ <&rpmhcc RPMH_CXO_CLK_A>,
52+ <&sleep_clk>,
53+ <&pcie0_phy>,
54+ <&pcie1_phy>,
55+ <&ufs_mem_phy 0>,
56+ <&ufs_mem_phy 1>,
57+ <&ufs_mem_phy 2>,
58+ <&usb_1_qmpphy>;
59+ #clock-cells = <1>;
60+ #reset-cells = <1>;
61+ #power-domain-cells = <1>;
62+ };
63+...
Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml+2−1
@@ -8,7 +8,7 @@ title: Qualcomm CMN PLL Clock Controller on IPQ SoC · 7 unmodified lines
88
99 maintainers:
1010 - Bjorn Andersson <andersson@kernel.org>
11− - Luo Jie <quic_luoj@quicinc.com>
11+ - Luo Jie <jie.luo@oss.qualcomm.com>
1212
1313 description:
1414 The CMN (or common) PLL clock controller expects a reference
@@ -25,6 +25,7 @@ properties: · 10 unmodified lines
2525 compatible:
2626 enum:
2727 - qcom,ipq5018-cmn-pll
28+ - qcom,ipq5332-cmn-pll
2829 - qcom,ipq5424-cmn-pll
2930 - qcom,ipq6018-cmn-pll
3031 - qcom,ipq8074-cmn-pll
Documentation/devicetree/bindings/clock/qcom,ipq9650-gcc.yaml+68−0
@@ -0,0 +1,68 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/qcom,ipq9650-gcc.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm Global Clock & Reset Controller on IPQ9650
8+
9+maintainers:
10+ - Bjorn Andersson <andersson@kernel.org>
11+ - Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
12+
13+description: |
14+ Qualcomm global clock control module provides the clocks, resets and power
15+ domains on IPQ9650
16+
17+ See also:
18+ include/dt-bindings/clock/qcom,ipq9650-gcc.h
19+ include/dt-bindings/reset/qcom,ipq9650-gcc.h
20+
21+properties:
22+ compatible:
23+ const: qcom,ipq9650-gcc
24+
25+ clocks:
26+ items:
27+ - description: Board XO source
28+ - description: Sleep clock source
29+ - description: PCIE30 PHY0 pipe clock source
30+ - description: PCIE30 PHY1 pipe clock source
31+ - description: PCIE30 PHY2 pipe clock source
32+ - description: PCIE30 PHY3 pipe clock source
33+ - description: PCIE30 PHY4 pipe clock source
34+ - description: USB PCIE wrapper pipe clock source
35+ - description: NSS common clock source
36+
37+ '#power-domain-cells': false
38+
39+ '#interconnect-cells':
40+ const: 1
41+
42+required:
43+ - compatible
44+ - clocks
45+
46+allOf:
47+ - $ref: qcom,gcc.yaml#
48+
49+unevaluatedProperties: false
50+
51+examples:
52+ - |
53+ clock-controller@1800000 {
54+ compatible = "qcom,ipq9650-gcc";
55+ reg = <0x01800000 0x40000>;
56+ clocks = <&xo_board_clk>,
57+ <&sleep_clk>,
58+ <&pcie30_phy0_pipe_clk>,
59+ <&pcie30_phy1_pipe_clk>,
60+ <&pcie30_phy2_pipe_clk>,
61+ <&pcie30_phy3_pipe_clk>,
62+ <&pcie30_phy4_pipe_clk>,
63+ <&usb3phy_0_cc_pipe_clk>,
64+ <&nss_cmn_clk>;
65+ #clock-cells = <1>;
66+ #reset-cells = <1>;
67+ };
68+...
Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml+1−1
@@ -44,7 +44,7 @@ required: · 43 unmodified lines
4444 - power-domains
4545 - '#power-domain-cells'
4646
47−unevaluatedProperties: false
47+additionalProperties: false
4848
4949 examples:
5050 - |
Documentation/devicetree/bindings/clock/qcom,milos-camcc.yaml+8−0
@@ -25,6 +25,10 @@ properties: · 24 unmodified lines
2525 - description: Sleep clock source
2626 - description: Camera AHB clock from GCC
2727
28+ interconnects:
29+ items:
30+ - description: Interconnect path to enable the MultiMedia NoC
31+
2832 required:
2933 - compatible
3034 - clocks
@@ -37,12 +41,16 @@ unevaluatedProperties: false · 6 unmodified lines
3741 examples:
3842 - |
3943 #include <dt-bindings/clock/qcom,milos-gcc.h>
44+ #include <dt-bindings/interconnect/qcom,icc.h>
45+ #include <dt-bindings/interconnect/qcom,milos-rpmh.h>
4046 clock-controller@adb0000 {
4147 compatible = "qcom,milos-camcc";
4248 reg = <0x0adb0000 0x40000>;
4349 clocks = <&bi_tcxo_div2>,
4450 <&sleep_clk>,
4551 <&gcc GCC_CAMERA_AHB_CLK>;
52+ interconnects = <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS
53+ &mmss_noc SLAVE_MNOC_HF_MEM_NOC QCOM_ICC_TAG_ALWAYS>;
4654 #clock-cells = <1>;
4755 #reset-cells = <1>;
4856 #power-domain-cells = <1>;
Documentation/devicetree/bindings/clock/qcom,milos-gxclkctl.yaml+61−0
@@ -0,0 +1,61 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/qcom,milos-gxclkctl.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm Graphics Power Domain Controller on Milos
8+
9+maintainers:
10+ - Luca Weiss <luca.weiss@fairphone.com>
11+
12+description: |
13+ Qualcomm GX(graphics) is a clock controller which has PLLs, clocks and
14+ Power domains (GDSC). This module provides the power domains control
15+ of gxclkctl on Qualcomm SoCs which helps the recovery of Graphics subsystem.
16+
17+ See also:
18+ include/dt-bindings/clock/qcom,kaanapali-gxclkctl.h
19+
20+properties:
21+ compatible:
22+ enum:
23+ - qcom,milos-gxclkctl
24+
25+ reg:
26+ maxItems: 1
27+
28+ power-domains:
29+ description:
30+ Power domains required for the clock controller to operate
31+ items:
32+ - description: GFX power domain
33+ - description: GPUCC(CX) power domain
34+
35+ '#power-domain-cells':
36+ const: 1
37+
38+required:
39+ - compatible
40+ - reg
41+ - power-domains
42+ - '#power-domain-cells'
43+
44+additionalProperties: false
45+
46+examples:
47+ - |
48+ #include <dt-bindings/power/qcom,rpmhpd.h>
49+ soc {
50+ #address-cells = <2>;
51+ #size-cells = <2>;
52+
53+ clock-controller@3d64000 {
54+ compatible = "qcom,milos-gxclkctl";
55+ reg = <0x0 0x03d64000 0x0 0x6000>;
56+ power-domains = <&rpmhpd RPMHPD_GFX>,
57+ <&gpucc 0>;
58+ #power-domain-cells = <1>;
59+ };
60+ };
61+...
Documentation/devicetree/bindings/clock/qcom,qca8k-nsscc.yaml+1−1
@@ -8,7 +8,7 @@ title: Qualcomm NSS Clock & Reset Controller on QCA8386/QCA8084 · 7 unmodified lines
88
99 maintainers:
1010 - Bjorn Andersson <andersson@kernel.org>
11− - Luo Jie <quic_luoj@quicinc.com>
11+ - Luo Jie <jie.luo@oss.qualcomm.com>
1212
1313 description: |
1414 Qualcomm NSS clock control module provides the clocks and resets
Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml+1−0
@@ -19,6 +19,7 @@ properties: · 18 unmodified lines
1919 enum:
2020 - qcom,eliza-rpmh-clk
2121 - qcom,glymur-rpmh-clk
22+ - qcom,hawi-rpmh-clk
2223 - qcom,kaanapali-rpmh-clk
2324 - qcom,milos-rpmh-clk
2425 - qcom,nord-rpmh-clk
Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml+3−0
@@ -20,6 +20,7 @@ description: | · 19 unmodified lines
2020 include/dt-bindings/clock/qcom,sm8450-videocc.h
2121 include/dt-bindings/clock/qcom,sm8650-videocc.h
2222 include/dt-bindings/clock/qcom,sm8750-videocc.h
23+ include/dt-bindings/clock/qcom,x1p42100-videocc.h
2324
2425 properties:
2526 compatible:
@@ -32,6 +33,7 @@ properties: · 6 unmodified lines
3233 - qcom,sm8650-videocc
3334 - qcom,sm8750-videocc
3435 - qcom,x1e80100-videocc
36+ - qcom,x1p42100-videocc
3537
3638 clocks:
3739 items:
@@ -70,6 +72,7 @@ allOf: · 32 unmodified lines
7072 - qcom,sm8450-videocc
7173 - qcom,sm8550-videocc
7274 - qcom,sm8750-videocc
75+ - qcom,x1p42100-videocc
7376 then:
7477 required:
7578 - required-opps
Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml+2−0
@@ -17,6 +17,7 @@ description: | · 16 unmodified lines
1717 See also:
1818 - include/dt-bindings/clock/qcom,eliza-tcsr.h
1919 - include/dt-bindings/clock/qcom,glymur-tcsr.h
20+ - include/dt-bindings/clock/qcom,hawi-tcsrcc.h
2021 - include/dt-bindings/clock/qcom,nord-tcsrcc.h
2122 - include/dt-bindings/clock/qcom,sm8550-tcsr.h
2223 - include/dt-bindings/clock/qcom,sm8650-tcsr.h
@@ -28,6 +29,7 @@ properties: · 5 unmodified lines
2829 - enum:
2930 - qcom,eliza-tcsr
3031 - qcom,glymur-tcsr
32+ - qcom,hawi-tcsrcc
3133 - qcom,kaanapali-tcsr
3234 - qcom,milos-tcsr
3335 - qcom,nord-tcsrcc
Documentation/devicetree/bindings/clock/qcom,x1e80100-camcc.yaml+1−0
@@ -23,6 +23,7 @@ properties: · 22 unmodified lines
2323 compatible:
2424 enum:
2525 - qcom,x1e80100-camcc
26+ - qcom,x1p42100-camcc
2627
2728 reg:
2829 maxItems: 1
Documentation/devicetree/bindings/clock/renesas,cpg-clocks.yaml+6−2
@@ -41,7 +41,7 @@ properties: · 40 unmodified lines
4141
4242 clock-output-names:
4343 minItems: 3
44− maxItems: 17
44+ maxItems: 19
4545
4646 renesas,mode:
4747 description: Board-specific settings of the MD_CK* bits on R-Mobile A1
@@ -90,6 +90,8 @@ allOf: · 42 unmodified lines
9090 - const: zx
9191 - const: zs
9292 - const: hp
93+ - const: ztr
94+ - const: zt
9395
9496 - if:
9597 properties:
@@ -123,6 +125,8 @@ allOf: · 27 unmodified lines
123125 - const: zb
124126 - const: m3
125127 - const: cp
128+ - const: ztr
129+ - const: zt
126130
127131 required:
128132 - renesas,mode
@@ -240,6 +244,6 @@ examples: · 111 unmodified lines
240244 #clock-cells = <1>;
241245 clock-output-names = "system", "pllc0", "pllc1", "pllc2", "r",
242246 "usb24s", "i", "zg", "b", "m1", "hp", "hpp",
243− "usbp", "s", "zb", "m3", "cp";
247+ "usbp", "s", "zb", "m3", "cp", "ztr", "zt";
244248 renesas,mode = <0x05>;
245249 };
Documentation/devicetree/bindings/clock/renesas,cpg-div6-clock.yaml+1−1
@@ -60,7 +60,7 @@ examples: · 59 unmodified lines
6060 clock-output-names = "main", "pll0", "pll1", "pll2",
6161 "pll2s", "pll2h", "z", "z2",
6262 "i", "m3", "b", "m1", "m2",
63− "zx", "zs", "hp";
63+ "zx", "zs", "hp", "ztr", "zt";
6464 };
6565
6666 sdhi2_clk: sdhi2_clk@e615007c {
Documentation/devicetree/bindings/cpufreq/qcom,shikra-epss.yaml+96−0
@@ -0,0 +1,96 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/cpufreq/qcom,shikra-epss.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm Shikra SoC EPSS
8+
9+maintainers:
10+ - Imran Shaik <imran.shaik@oss.qualcomm.com>
11+ - Taniya Das <taniya.das@oss.qualcomm.com>
12+
13+description: |
14+ EPSS is a hardware engine used by some Qualcomm SoCs to manage
15+ frequency in hardware. It is capable of controlling frequency for
16+ multiple clusters.
17+
18+ The Qualcomm Shikra SoC EPSS supports up to 12 frequency lookup table
19+ (LUT) entries.
20+
21+properties:
22+ compatible:
23+ enum:
24+ - qcom,shikra-epss
25+
26+ reg:
27+ items:
28+ - description: Frequency domain 0 register region
29+ - description: Frequency domain 1 register region
30+
31+ reg-names:
32+ items:
33+ - const: freq-domain0
34+ - const: freq-domain1
35+
36+ clocks:
37+ items:
38+ - description: XO Clock
39+ - description: GPLL0 Clock
40+
41+ clock-names:
42+ items:
43+ - const: xo
44+ - const: alternate
45+
46+ interrupts:
47+ items:
48+ - description: IRQ line for DCVSH 0
49+ - description: IRQ line for DCVSH 1
50+
51+ interrupt-names:
52+ items:
53+ - const: dcvsh-irq-0
54+ - const: dcvsh-irq-1
55+
56+ '#freq-domain-cells':
57+ const: 1
58+
59+ '#clock-cells':
60+ const: 1
61+
62+required:
63+ - compatible
64+ - reg
65+ - clocks
66+ - clock-names
67+ - interrupts
68+ - interrupt-names
69+ - '#freq-domain-cells'
70+ - '#clock-cells'
71+
72+additionalProperties: false
73+
74+examples:
75+ - |
76+ #include <dt-bindings/clock/qcom,rpmcc.h>
77+ #include <dt-bindings/interrupt-controller/arm-gic.h>
78+
79+ soc {
80+ #address-cells = <1>;
81+ #size-cells = <1>;
82+
83+ cpufreq@fd91000 {
84+ compatible = "qcom,shikra-epss";
85+ reg = <0x0fd91000 0x1000>, <0x0fd92000 0x1000>;
86+ reg-names = "freq-domain0", "freq-domain1";
87+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gpll0>;
88+ clock-names = "xo", "alternate";
89+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
90+ <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
91+ interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1";
92+ #freq-domain-cells = <1>;
93+ #clock-cells = <1>;
94+ };
95+ };
96+...
Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml+35−1
@@ -14,6 +14,7 @@ properties: · 13 unmodified lines
1414 items:
1515 - enum:
1616 - qcom,eliza-inline-crypto-engine
17+ - qcom,hawi-inline-crypto-engine
1718 - qcom,kaanapali-inline-crypto-engine
1819 - qcom,milos-inline-crypto-engine
1920 - qcom,qcs8300-inline-crypto-engine
@@ -30,6 +31,16 @@ properties: · 10 unmodified lines
3031 maxItems: 1
3132
3233 clocks:
34+ minItems: 1
35+ maxItems: 2
36+
37+ clock-names:
38+ minItems: 1
39+ items:
40+ - const: core
41+ - const: iface
42+
43+ power-domains:
3344 maxItems: 1
3445
3546 operating-points-v2: true
@@ -44,6 +55,25 @@ required: · 8 unmodified lines
4455
4556 additionalProperties: false
4657
58+allOf:
59+ - if:
60+ properties:
61+ compatible:
62+ contains:
63+ enum:
64+ - qcom,eliza-inline-crypto-engine
65+ - qcom,milos-inline-crypto-engine
66+
67+ then:
68+ required:
69+ - power-domains
70+ - clock-names
71+ properties:
72+ clocks:
73+ minItems: 2
74+ clock-names:
75+ minItems: 2
76+
4777 examples:
4878 - |
4979 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
@@ -52,7 +82,11 @@ examples: · 2 unmodified lines
5282 compatible = "qcom,sm8550-inline-crypto-engine",
5383 "qcom,inline-crypto-engine";
5484 reg = <0x01d88000 0x8000>;
55− clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
85+ clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
86+ <&gcc GCC_UFS_PHY_AHB_CLK>;
87+ clock-names = "core",
88+ "iface";
89+ power-domains = <&gcc UFS_PHY_GDSC>;
5690
5791 operating-points-v2 = <&ice_opp_table>;
5892
Documentation/devicetree/bindings/crypto/qcom,prng.yaml+3−0
@@ -17,11 +17,14 @@ properties: · 16 unmodified lines
1717 - qcom,prng-ee # 8996 and later using EE
1818 - items:
1919 - enum:
20+ - qcom,glymur-trng
21+ - qcom,hawi-trng
2022 - qcom,ipq5332-trng
2123 - qcom,ipq5424-trng
2224 - qcom,ipq9574-trng
2325 - qcom,kaanapali-trng
2426 - qcom,milos-trng
27+ - qcom,nord-trng
2528 - qcom,qcs615-trng
2629 - qcom,qcs8300-trng
2730 - qcom,sa8255p-trng
Documentation/devicetree/bindings/crypto/qcom-qce.yaml+4−0
@@ -45,7 +45,11 @@ properties: · 44 unmodified lines
4545
4646 - items:
4747 - enum:
48+ - qcom,eliza-qce
49+ - qcom,glymur-qce
4850 - qcom,kaanapali-qce
51+ - qcom,milos-qce
52+ - qcom,nord-qce
4953 - qcom,qcs615-qce
5054 - qcom,qcs8300-qce
5155 - qcom,sa8775p-qce
Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml+41−2
@@ -36,18 +36,56 @@ properties: · 35 unmodified lines
3636
3737 properties:
3838 port@0:
39− $ref: /schemas/graph.yaml#/properties/port
39+ $ref: /schemas/graph.yaml#/$defs/port-base
40+ unevaluatedProperties: false
4041 description:
4142 Primary MIPI DSI port-1 for MIPI input or
4243 LVDS port-1 for LVDS input or DPI input.
4344
45+ properties:
46+ endpoint:
47+ $ref: /schemas/media/video-interfaces.yaml#
48+ unevaluatedProperties: false
49+
50+ properties:
51+ data-lanes:
52+ description: array of physical DSI data lane indexes.
53+ minItems: 1
54+ items:
55+ - const: 1
56+ - const: 2
57+ - const: 3
58+ - const: 4
59+
60+ required:
61+ - data-lanes
62+
4463 port@1:
45− $ref: /schemas/graph.yaml#/properties/port
64+ $ref: /schemas/graph.yaml#/$defs/port-base
65+ unevaluatedProperties: false
4666 description:
4767 Additional MIPI port-2 for MIPI input or LVDS port-2
4868 for LVDS input. Used in combination with primary
4969 port-1 to drive higher resolution displays
5070
71+ properties:
72+ endpoint:
73+ $ref: /schemas/media/video-interfaces.yaml#
74+ unevaluatedProperties: false
75+
76+ properties:
77+ data-lanes:
78+ description: array of physical DSI data lane indexes.
79+ minItems: 1
80+ items:
81+ - const: 1
82+ - const: 2
83+ - const: 3
84+ - const: 4
85+
86+ required:
87+ - data-lanes
88+
5189 port@2:
5290 $ref: /schemas/graph.yaml#/properties/port
5391 description:
@@ -99,6 +137,7 @@ examples: · 45 unmodified lines
99137 reg = <0>;
100138
101139 endpoint {
140+ data-lanes = <1 2 3 4>;
102141 remote-endpoint = <&dsi0_out>;
103142 };
104143 };
Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml+2−0
@@ -34,10 +34,12 @@ properties: · 33 unmodified lines
3434 - items:
3535 - enum:
3636 - doestek,dtc34lm85am # For the Doestek DTC34LM85AM Flat Panel Display (FPD) Transmitter
37+ - idt,v103 # For the Triple 10-BIT LVDS Transmitter
3738 - onnn,fin3385 # OnSemi FIN3385
3839 - ti,ds90c185 # For the TI DS90C185 FPD-Link Serializer
3940 - ti,ds90c187 # For the TI DS90C187 FPD-Link Serializer
4041 - ti,sn75lvds83 # For the TI SN75LVDS83 FlatLink transmitter
42+ - ti,sn75lvds93 # For the TI SN75LVDS93 FlatLink transmitter
4143 - const: lvds-encoder # Generic LVDS encoder compatible fallback
4244 - items:
4345 - enum:
Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml+1−0
@@ -30,6 +30,7 @@ properties: · 29 unmodified lines
3030 - algoltek,ag6311
3131 - asl-tek,cs5263
3232 - dumb-vga-dac
33+ - mstar,tsumu88adt3-lf-1
3334 - parade,ps185hdm
3435 - radxa,ra620
3536 - realtek,rtd2171
Documentation/devicetree/bindings/display/bridge/solomon,ssd2825.yaml+2−1
@@ -10,6 +10,7 @@ maintainers: · 9 unmodified lines
1010 - Svyatoslav Ryhel <clamor95@gmail.com>
1111
1212 allOf:
13+ - $ref: /schemas/display/dsi-controller.yaml#
1314 - $ref: /schemas/spi/spi-peripheral-props.yaml#
1415
1516 properties:
@@ -86,7 +87,7 @@ required: · 70 unmodified lines
8687 - compatible
8788 - ports
8889
89−additionalProperties: false
90+unevaluatedProperties: false
9091
9192 examples:
9293 - |
Documentation/devicetree/bindings/display/bridge/waveshare,dsi2dpi.yaml+6−3
@@ -10,11 +10,14 @@ maintainers: · 9 unmodified lines
1010 - Joseph Guo <qijian.guo@nxp.com>
1111
1212 description:
13− Waveshare bridge board is part of Waveshare panel which converts DSI to DPI.
13+ Waveshare bridge board is part of Waveshare panel which converts DSI to DPI
14+ or LVDS.
1415
1516 properties:
1617 compatible:
17− const: waveshare,dsi2dpi
18+ enum:
19+ - waveshare,dsi2dpi
20+ - waveshare,dsi2lvds
1821
1922 reg:
2023 maxItems: 1
@@ -53,7 +56,7 @@ properties: · 32 unmodified lines
5356 port@1:
5457 $ref: /schemas/graph.yaml#/properties/port
5558 description:
56− Video port for MIPI DPI output panel.
59+ Video port for MIPI DPI or LVDS output to the panel.
5760
5861 required:
5962 - port@0
Documentation/devicetree/bindings/display/imx/fsl,imx-parallel-display.yaml+11−0
@@ -42,6 +42,17 @@ properties: · 41 unmodified lines
4242 unevaluatedProperties: false
4343 description: output port connected to a panel
4444
45+ port:
46+ $ref: /schemas/graph.yaml#/properties/port
47+ unevaluatedProperties: false
48+ deprecated: true
49+ description: input port connected to the IPU display interface, see port@0
50+
51+ display-timings:
52+ $ref: /schemas/display/panel/display-timings.yaml#
53+ unevaluatedProperties: false
54+ deprecated: true
55+
4556 required:
4657 - compatible
4758
Documentation/devicetree/bindings/display/imx/fsl,imx53-tve.yaml+104−0
@@ -0,0 +1,104 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/display/imx/fsl,imx53-tve.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Freescale i.MX53 Television Encoder (TVE)
8+
9+maintainers:
10+ - Frank Li <Frank.Li@nxp.com>
11+
12+description:
13+ The Television Encoder (TVE) is a hardware block in the i.MX53 SoC that
14+ converts digital video data into analog TV signals (NTSC/PAL).
15+
16+properties:
17+ compatible:
18+ const: fsl,imx53-tve
19+
20+ reg:
21+ maxItems: 1
22+
23+ interrupts:
24+ maxItems: 1
25+
26+ clocks:
27+ items:
28+ - description: TVE gate clock
29+ - description: Display interface selector clock
30+
31+ clock-names:
32+ items:
33+ - const: tve
34+ - const: di_sel
35+
36+ ddc-i2c-bus:
37+ $ref: /schemas/types.yaml#/definitions/phandle
38+ description:
39+ Phandle to the I2C bus used for DDC (Display Data Channel) communication
40+ to read EDID information from the connected display.
41+
42+ dac-supply:
43+ description:
44+ Regulator supply for the TVE DAC (Digital-to-Analog Converter).
45+
46+ fsl,tve-mode:
47+ $ref: /schemas/types.yaml#/definitions/string
48+ description:
49+ TVE output mode selection.
50+ enum:
51+ - ntsc
52+ - pal
53+ - vga
54+
55+ fsl,hsync-pin:
56+ $ref: /schemas/types.yaml#/definitions/uint32
57+ description:
58+ Pin number for horizontal sync signal in VGA mode.
59+ minimum: 0
60+ maximum: 8
61+
62+ fsl,vsync-pin:
63+ $ref: /schemas/types.yaml#/definitions/uint32
64+ description:
65+ Pin number for vertical sync signal in VGA mode.
66+ minimum: 0
67+ maximum: 8
68+
69+ port:
70+ $ref: /schemas/graph.yaml#/properties/port
71+ description:
72+ Port node with one endpoint connected to the IPU display interface.
73+
74+required:
75+ - compatible
76+ - reg
77+ - interrupts
78+ - clocks
79+ - clock-names
80+ - fsl,tve-mode
81+
82+additionalProperties: false
83+
84+examples:
85+ - |
86+ #include <dt-bindings/clock/imx5-clock.h>
87+ #include <dt-bindings/interrupt-controller/irq.h>
88+
89+ tve@63ff0000 {
90+ compatible = "fsl,imx53-tve";
91+ reg = <0x63ff0000 0x1000>;
92+ interrupts = <92>;
93+ clocks = <&clks IMX5_CLK_TVE_GATE>,
94+ <&clks IMX5_CLK_IPU_DI1_SEL>;
95+ clock-names = "tve", "di_sel";
96+ fsl,tve-mode = "vga";
97+
98+ port {
99+ endpoint {
100+ remote-endpoint = <&ipu_di1_tve>;
101+ };
102+ };
103+ };
104+
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml+1−1
@@ -41,7 +41,7 @@ properties: · 40 unmodified lines
4141 - const: sw3
4242
4343 sram:
44− $ref: /schemas/types.yaml#/definitions/phandle
44+ maxItems: 1
4545 description: phandle pointing to the mmio-sram device node
4646
4747 required:
Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml+2−3
@@ -45,9 +45,8 @@ properties: · 44 unmodified lines
4545 - description: OVL-2L Clock
4646
4747 iommus:
48− description:
49− This property should point to the respective IOMMU block with master port as argument,
50− see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
48+ minItems: 1
49+ maxItems: 2
5150
5251 mediatek,gce-client-reg:
5352 description: The register of client driver can be configured by gce with
Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml+2−3
@@ -66,9 +66,8 @@ properties: · 65 unmodified lines
6666 - description: OVL Clock
6767
6868 iommus:
69− description:
70− This property should point to the respective IOMMU block with master port as argument,
71− see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
69+ minItems: 1
70+ maxItems: 2
7271
7372 mediatek,gce-client-reg:
7473 description: The register of client driver can be configured by gce with
Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml+1−3
@@ -65,9 +65,7 @@ properties: · 64 unmodified lines
6565 - description: RDMA Clock
6666
6767 iommus:
68− description:
69− This property should point to the respective IOMMU block with master port as argument,
70− see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
68+ maxItems: 1
7169
7270 mediatek,rdma-fifo-size:
7371 description:
Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml+1−3
@@ -45,9 +45,7 @@ properties: · 44 unmodified lines
4545 - description: WDMA Clock
4646
4747 iommus:
48− description:
49− This property should point to the respective IOMMU block with master port as argument,
50− see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
48+ maxItems: 1
5149
5250 mediatek,gce-client-reg:
5351 description: The register of client driver can be configured by gce with
Documentation/devicetree/bindings/display/msm/dp-controller.yaml+23−5
@@ -219,6 +219,7 @@ allOf: · 218 unmodified lines
219219 - required:
220220 - "#sound-dai-cells"
221221 else:
222+ $ref: /schemas/sound/dai-common.yaml#
222223 properties:
223224 aux-bus: false
224225 required:
@@ -243,7 +244,7 @@ allOf: · 18 unmodified lines
243244 clocks:
244245 minItems: 5
245246 maxItems: 5
246− clocks-names:
247+ clock-names:
247248 minItems: 5
248249 maxItems: 5
249250
@@ -264,7 +265,7 @@ allOf: · 14 unmodified lines
264265 clocks:
265266 minItems: 5
266267 maxItems: 6
267− clocks-names:
268+ clock-names:
268269 minItems: 5
269270 maxItems: 6
270271
@@ -277,7 +278,6 @@ allOf: · 6 unmodified lines
277278 - qcom,sc8180x-dp
278279 - qcom,sdm845-dp
279280 - qcom,sm8350-dp
280− - qcom,sm8650-dp
281281 then:
282282 properties:
283283 reg:
@@ -286,6 +286,24 @@ allOf: · 2 unmodified lines
286286 clocks:
287287 minItems: 6
288288 maxItems: 6
289+ clock-names:
290+ minItems: 6
291+ maxItems: 6
292+
293+ - if:
294+ properties:
295+ compatible:
296+ contains:
297+ enum:
298+ - qcom,sm8650-dp
299+ then:
300+ properties:
301+ reg:
302+ minItems: 5
303+ maxItems: 9
304+ clocks:
305+ minItems: 6
306+ maxItems: 6
289307 clocks-names:
290308 minItems: 6
291309 maxItems: 6
@@ -306,7 +324,7 @@ allOf: · 14 unmodified lines
306324 clocks:
307325 minItems: 6
308326 maxItems: 8
309− clocks-names:
327+ clock-names:
310328 minItems: 6
311329 maxItems: 8
312330
@@ -326,7 +344,7 @@ allOf: · 13 unmodified lines
326344 clocks:
327345 minItems: 5
328346 maxItems: 6
329− clocks-names:
347+ clock-names:
330348 minItems: 5
331349 maxItems: 6
332350
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml+2−0
@@ -16,6 +16,7 @@ properties: · 15 unmodified lines
1616 - enum:
1717 - qcom,apq8064-dsi-ctrl
1818 - qcom,kaanapali-dsi-ctrl
19+ - qcom,milos-dsi-ctrl
1920 - qcom,msm8226-dsi-ctrl
2021 - qcom,msm8916-dsi-ctrl
2122 - qcom,msm8953-dsi-ctrl
@@ -339,6 +340,7 @@ allOf: · 317 unmodified lines
339340 compatible:
340341 contains:
341342 enum:
343+ - qcom,milos-dsi-ctrl
342344 - qcom,msm8998-dsi-ctrl
343345 - qcom,sa8775p-dsi-ctrl
344346 - qcom,sar2130p-dsi-ctrl
Documentation/devicetree/bindings/display/msm/gmu.yaml+30−0
@@ -300,6 +300,36 @@ allOf: · 299 unmodified lines
300300 required:
301301 - qcom,qmp
302302
303+ - if:
304+ properties:
305+ compatible:
306+ contains:
307+ const: qcom,adreno-gmu-810.0
308+ then:
309+ properties:
310+ reg:
311+ items:
312+ - description: Core GMU registers
313+ reg-names:
314+ items:
315+ - const: gmu
316+ clocks:
317+ items:
318+ - description: GPU AHB clock
319+ - description: GMU clock
320+ - description: GPU CX clock
321+ - description: GPU AXI clock
322+ - description: GPU MEMNOC clock
323+ - description: GMU HUB clock
324+ clock-names:
325+ items:
326+ - const: ahb
327+ - const: gmu
328+ - const: cxo
329+ - const: axi
330+ - const: memnoc
331+ - const: hub
332+
303333 - if:
304334 properties:
305335 compatible:
Documentation/devicetree/bindings/display/msm/gpu.yaml+20−5
@@ -84,13 +84,9 @@ properties: · 83 unmodified lines
8484 maxItems: 64
8585
8686 sram:
87− $ref: /schemas/types.yaml#/definitions/phandle-array
8887 minItems: 1
8988 maxItems: 4
90− items:
91− maxItems: 1
92− description: |
93− phandles to one or more reserved on-chip SRAM regions.
89+ description:
9490 phandle to the On Chip Memory (OCMEM) that's present on some a3xx and
9591 a4xx Snapdragon SoCs. See
9692 Documentation/devicetree/bindings/sram/qcom,ocmem.yaml
@@ -411,6 +407,23 @@ allOf: · 314 unmodified lines
411407 - clocks
412408 - clock-names
413409
410+ - if:
411+ properties:
412+ compatible:
413+ contains:
414+ enum:
415+ - qcom,adreno-44010000
416+ - qcom,adreno-44070001
417+ then:
418+ properties:
419+ reg:
420+ minItems: 2
421+ maxItems: 2
422+
423+ reg-names:
424+ minItems: 2
425+ maxItems: 2
426+
414427 - if:
415428 properties:
416429 compatible:
@@ -434,6 +447,8 @@ allOf: · 17 unmodified lines
434447 - qcom,adreno-43050a01
435448 - qcom,adreno-43050c01
436449 - qcom,adreno-43051401
450+ - qcom,adreno-44010000
451+ - qcom,adreno-44070001
437452
438453 then: # Starting with A6xx, the clocks are usually defined in the GMU node
439454 properties:
Documentation/devicetree/bindings/display/msm/qcom,eliza-mdss.yaml+12−8
@@ -119,7 +119,7 @@ examples: · 118 unmodified lines
119119 mdss_mdp: display-controller@ae01000 {
120120 compatible = "qcom,eliza-dpu";
121121 reg = <0x0ae01000 0x93000>,
122− <0x0aeb0000 0x2008>;
122+ <0x0aeb0000 0x3000>;
123123 reg-names = "mdp",
124124 "vbif";
125125
@@ -304,7 +304,7 @@ examples: · 178 unmodified lines
304304 mdss_dsi0_phy: phy@ae95000 {
305305 compatible = "qcom,eliza-dsi-phy-4nm", "qcom,sm8650-dsi-phy-4nm";
306306 reg = <0x0ae95000 0x200>,
307− <0x0ae95200 0x280>,
307+ <0x0ae95200 0x300>,
308308 <0x0ae95500 0x400>;
309309 reg-names = "dsi_phy",
310310 "dsi_phy_lane",
@@ -388,7 +388,7 @@ examples: · 77 unmodified lines
388388 mdss_dsi1_phy: phy@ae97000 {
389389 compatible = "qcom,eliza-dsi-phy-4nm", "qcom,sm8650-dsi-phy-4nm";
390390 reg = <0x0ae97000 0x200>,
391− <0x0ae97200 0x280>,
391+ <0x0ae97200 0x300>,
392392 <0x0ae97500 0x400>;
393393 reg-names = "dsi_phy",
394394 "dsi_phy_lane",
@@ -407,11 +407,15 @@ examples: · 12 unmodified lines
407407
408408 displayport-controller@af54000 {
409409 compatible = "qcom,eliza-dp", "qcom,sm8650-dp";
410− reg = <0xaf54000 0x104>,
411− <0xaf54200 0xc0>,
412− <0xaf55000 0x770>,
413− <0xaf56000 0x9c>,
414− <0xaf57000 0x9c>;
410+ reg = <0x0af54000 0x200>,
411+ <0x0af54200 0x200>,
412+ <0x0af55000 0xc00>,
413+ <0x0af56000 0x400>,
414+ <0x0af57000 0x400>,
415+ <0x0af58000 0x400>,
416+ <0x0af59000 0x400>,
417+ <0x0af5a000 0x600>,
418+ <0x0af5b000 0x600>;
415419
416420 interrupts-extended = <&mdss 12>;
417421
Documentation/devicetree/bindings/display/msm/qcom,milos-mdss.yaml+286−0
@@ -0,0 +1,286 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/display/msm/qcom,milos-mdss.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm Milos Display MDSS
8+
9+maintainers:
10+ - Luca Weiss <luca.weiss@fairphone.com>
11+
12+description:
13+ Milos MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like
14+ DPU display controller, DSI and DP interfaces etc.
15+
16+$ref: /schemas/display/msm/mdss-common.yaml#
17+
18+properties:
19+ compatible:
20+ const: qcom,milos-mdss
21+
22+ clocks:
23+ items:
24+ - description: Display AHB
25+ - description: Display hf AXI
26+ - description: Display core
27+
28+ iommus:
29+ maxItems: 1
30+
31+ interconnects:
32+ items:
33+ - description: Interconnect path from mdp0 port to the data bus
34+ - description: Interconnect path from CPU to the reg bus
35+
36+ interconnect-names:
37+ items:
38+ - const: mdp0-mem
39+ - const: cpu-cfg
40+
41+patternProperties:
42+ "^display-controller@[0-9a-f]+$":
43+ type: object
44+ additionalProperties: true
45+ properties:
46+ compatible:
47+ const: qcom,milos-dpu
48+
49+ "^displayport-controller@[0-9a-f]+$":
50+ type: object
51+ additionalProperties: true
52+ properties:
53+ compatible:
54+ const: qcom,milos-dp
55+
56+ "^dsi@[0-9a-f]+$":
57+ type: object
58+ additionalProperties: true
59+ properties:
60+ compatible:
61+ contains:
62+ const: qcom,milos-dsi-ctrl
63+
64+ "^phy@[0-9a-f]+$":
65+ type: object
66+ additionalProperties: true
67+ properties:
68+ compatible:
69+ const: qcom,milos-dsi-phy-4nm
70+
71+required:
72+ - compatible
73+
74+unevaluatedProperties: false
75+
76+examples:
77+ - |
78+ #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
79+ #include <dt-bindings/clock/qcom,milos-dispcc.h>
80+ #include <dt-bindings/clock/qcom,milos-gcc.h>
81+ #include <dt-bindings/clock/qcom,rpmh.h>
82+ #include <dt-bindings/interconnect/qcom,icc.h>
83+ #include <dt-bindings/interconnect/qcom,milos-rpmh.h>
84+ #include <dt-bindings/interrupt-controller/arm-gic.h>
85+ #include <dt-bindings/power/qcom,rpmhpd.h>
86+
87+ display-subsystem@ae00000 {
88+ compatible = "qcom,milos-mdss";
89+ reg = <0x0ae00000 0x1000>;
90+ reg-names = "mdss";
91+
92+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH 0>;
93+
94+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
95+ <&gcc GCC_DISP_HF_AXI_CLK>,
96+ <&dispcc DISP_CC_MDSS_MDP_CLK>;
97+
98+ resets = <&dispcc DISP_CC_MDSS_CORE_BCR>;
99+
100+ interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_ALWAYS
101+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
102+ <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
103+ &cnoc_main SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
104+ interconnect-names = "mdp0-mem",
105+ "cpu-cfg";
106+
107+ power-domains = <&dispcc DISP_CC_MDSS_CORE_GDSC>;
108+
109+ iommus = <&apps_smmu 0x1c00 0x2>;
110+
111+ interrupt-controller;
112+ #interrupt-cells = <1>;
113+
114+ #address-cells = <1>;
115+ #size-cells = <1>;
116+ ranges;
117+
118+ display-controller@ae01000 {
119+ compatible = "qcom,milos-dpu";
120+ reg = <0x0ae01000 0x8f000>,
121+ <0x0aeb0000 0x3000>;
122+ reg-names = "mdp",
123+ "vbif";
124+
125+ interrupts-extended = <&mdss 0>;
126+
127+ clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
128+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
129+ <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
130+ <&dispcc DISP_CC_MDSS_MDP_CLK>,
131+ <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
132+ clock-names = "nrt_bus",
133+ "iface",
134+ "lut",
135+ "core",
136+ "vsync";
137+
138+ assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
139+ assigned-clock-rates = <19200000>;
140+
141+ operating-points-v2 = <&mdp_opp_table>;
142+
143+ power-domains = <&rpmhpd RPMHPD_CX>;
144+
145+ ports {
146+ #address-cells = <1>;
147+ #size-cells = <0>;
148+
149+ port@0 {
150+ reg = <0>;
151+
152+ dpu_intf1_out: endpoint {
153+ remote-endpoint = <&mdss_dsi0_in>;
154+ };
155+ };
156+ };
157+
158+ mdp_opp_table: opp-table {
159+ compatible = "operating-points-v2";
160+
161+ opp-200000000 {
162+ opp-hz = /bits/ 64 <200000000>;
163+ required-opps = <&rpmhpd_opp_low_svs>;
164+ };
165+
166+ opp-342000000 {
167+ opp-hz = /bits/ 64 <342000000>;
168+ required-opps = <&rpmhpd_opp_svs>;
169+ };
170+
171+ opp-402000000 {
172+ opp-hz = /bits/ 64 <402000000>;
173+ required-opps = <&rpmhpd_opp_svs_l1>;
174+ };
175+
176+ opp-535000000 {
177+ opp-hz = /bits/ 64 <535000000>;
178+ required-opps = <&rpmhpd_opp_nom>;
179+ };
180+
181+ opp-600000000 {
182+ opp-hz = /bits/ 64 <600000000>;
183+ required-opps = <&rpmhpd_opp_nom_l1>;
184+ };
185+
186+ opp-630000000 {
187+ opp-hz = /bits/ 64 <630000000>;
188+ required-opps = <&rpmhpd_opp_turbo>;
189+ };
190+ };
191+ };
192+
193+ dsi@ae94000 {
194+ compatible = "qcom,milos-dsi-ctrl", "qcom,mdss-dsi-ctrl";
195+ reg = <0x0ae94000 0x1000>;
196+ reg-names = "dsi_ctrl";
197+
198+ interrupts-extended = <&mdss 4>;
199+
200+ clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
201+ <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
202+ <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
203+ <&dispcc DISP_CC_MDSS_ESC0_CLK>,
204+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
205+ <&gcc GCC_DISP_HF_AXI_CLK>;
206+ clock-names = "byte",
207+ "byte_intf",
208+ "pixel",
209+ "core",
210+ "iface",
211+ "bus";
212+
213+ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
214+ <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
215+ assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
216+ <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
217+
218+ operating-points-v2 = <&mdss_dsi_opp_table>;
219+
220+ power-domains = <&rpmhpd RPMHPD_CX>;
221+
222+ phys = <&mdss_dsi0_phy>;
223+ phy-names = "dsi";
224+
225+ #address-cells = <1>;
226+ #size-cells = <0>;
227+
228+ ports {
229+ #address-cells = <1>;
230+ #size-cells = <0>;
231+
232+ port@0 {
233+ reg = <0>;
234+
235+ mdss_dsi0_in: endpoint {
236+ remote-endpoint = <&dpu_intf1_out>;
237+ };
238+ };
239+
240+ port@1 {
241+ reg = <1>;
242+
243+ mdss_dsi0_out: endpoint {
244+ };
245+ };
246+ };
247+
248+ mdss_dsi_opp_table: opp-table {
249+ compatible = "operating-points-v2";
250+
251+ opp-187500000 {
252+ opp-hz = /bits/ 64 <187500000>;
253+ required-opps = <&rpmhpd_opp_low_svs>;
254+ };
255+
256+ opp-300000000 {
257+ opp-hz = /bits/ 64 <300000000>;
258+ required-opps = <&rpmhpd_opp_svs>;
259+ };
260+
261+ opp-358000000 {
262+ opp-hz = /bits/ 64 <358000000>;
263+ required-opps = <&rpmhpd_opp_svs_l1>;
264+ };
265+ };
266+ };
267+
268+ mdss_dsi0_phy: phy@ae95000 {
269+ compatible = "qcom,milos-dsi-phy-4nm";
270+ reg = <0x0ae95000 0x200>,
271+ <0x0ae95200 0x300>,
272+ <0x0ae95500 0x400>;
273+ reg-names = "dsi_phy",
274+ "dsi_phy_lane",
275+ "dsi_pll";
276+
277+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
278+ <&rpmhcc RPMH_CXO_CLK>;
279+ clock-names = "iface",
280+ "ref";
281+
282+ #clock-cells = <1>;
283+ #phy-cells = <0>;
284+ };
285+ };
286+...
Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml+4−2
@@ -200,9 +200,11 @@ examples: · 199 unmodified lines
200200 <0x0aec2000 0x1c8>;
201201
202202 clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>,
203− <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>;
203+ <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>,
204+ <&gcc GCC_EDP_REF_CLKREF_EN>;
204205 clock-names = "aux",
205− "cfg_ahb";
206+ "cfg_ahb",
207+ "ref";
206208
207209 #clock-cells = <1>;
208210 #phy-cells = <0>;
Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml+2−1
@@ -18,6 +18,7 @@ properties: · 17 unmodified lines
1818 - qcom,eliza-dpu
1919 - qcom,glymur-dpu
2020 - qcom,kaanapali-dpu
21+ - qcom,milos-dpu
2122 - qcom,sa8775p-dpu
2223 - qcom,sm8650-dpu
2324 - qcom,sm8750-dpu
@@ -70,7 +71,7 @@ examples: · 46 unmodified lines
7071 display-controller@ae01000 {
7172 compatible = "qcom,sm8650-dpu";
7273 reg = <0x0ae01000 0x8f000>,
73− <0x0aeb0000 0x2008>;
74+ <0x0aeb0000 0x3000>;
7475 reg-names = "mdp", "vbif";
7576
7677 clocks = <&gcc_axi_clk>,
Documentation/devicetree/bindings/display/msm/qcom,sm8650-mdss.yaml+1−1
@@ -112,7 +112,7 @@ examples: · 111 unmodified lines
112112 display-controller@ae01000 {
113113 compatible = "qcom,sm8650-dpu";
114114 reg = <0x0ae01000 0x8f000>,
115− <0x0aeb0000 0x2008>;
115+ <0x0aeb0000 0x3000>;
116116 reg-names = "mdp", "vbif";
117117
118118 clocks = <&gcc_axi_clk>,
Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml+10−6
@@ -117,7 +117,7 @@ examples: · 116 unmodified lines
117117 display-controller@ae01000 {
118118 compatible = "qcom,sm8750-dpu";
119119 reg = <0x0ae01000 0x93000>,
120− <0x0aeb0000 0x2008>;
120+ <0x0aeb0000 0x3000>;
121121 reg-names = "mdp",
122122 "vbif";
123123
@@ -389,11 +389,15 @@ examples: · 265 unmodified lines
389389
390390 displayport-controller@af54000 {
391391 compatible = "qcom,sm8750-dp", "qcom,sm8650-dp";
392− reg = <0xaf54000 0x104>,
393− <0xaf54200 0xc0>,
394− <0xaf55000 0x770>,
395− <0xaf56000 0x9c>,
396− <0xaf57000 0x9c>;
392+ reg = <0x0af54000 0x200>,
393+ <0x0af54200 0x200>,
394+ <0x0af55000 0xc00>,
395+ <0x0af56000 0x400>,
396+ <0x0af57000 0x400>,
397+ <0x0af58000 0x400>,
398+ <0x0af59000 0x400>,
399+ <0x0af5a000 0x600>,
400+ <0x0af5b000 0x600>;
397401
398402 interrupts-extended = <&mdss 12>;
399403
Documentation/devicetree/bindings/display/panel/chipwealth,ch13726a.yaml+67−0
@@ -0,0 +1,67 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/display/panel/chipwealth,ch13726a.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Chip Wealth Technology CH13726A AMOLED driver
8+
9+maintainers:
10+ - Neil Armstrong <neil.armstrong@linaro.org>
11+
12+description:
13+ Chip Wealth Technology CH13726A is a single-chip solution
14+ for AMOLED connected using a MIPI-DSI video interface.
15+
16+allOf:
17+ - $ref: panel-common.yaml#
18+
19+properties:
20+ compatible:
21+ items:
22+ - const: ayntec,thor-panel-bottom
23+ - const: chipwealth,ch13726a
24+
25+ reg:
26+ maxItems: 1
27+ description: DSI virtual channel
28+
29+ vdd-supply: true
30+ vddio-supply: true
31+ vdd1v2-supply: true
32+ avdd-supply: true
33+
34+ port: true
35+ reset-gpios: true
36+ rotation: true
37+
38+required:
39+ - compatible
40+ - reg
41+ - vdd-supply
42+ - vddio-supply
43+ - vdd1v2-supply
44+ - avdd-supply
45+ - reset-gpios
46+
47+additionalProperties: false
48+
49+examples:
50+ - |
51+ #include <dt-bindings/gpio/gpio.h>
52+
53+ dsi {
54+ #address-cells = <1>;
55+ #size-cells = <0>;
56+ panel@0 {
57+ compatible = "ayntec,thor-panel-bottom", "chipwealth,ch13726a";
58+ reg = <0>;
59+ vdd1v2-supply = <&vreg_l11b_1p2>;
60+ vddio-supply = <&vdd_disp_1v8>;
61+ vdd-supply = <&vreg_l13b_3p0>;
62+ avdd-supply = <&vdd_disp2_2v8>;
63+ reset-gpios = <&tlmm 133 GPIO_ACTIVE_HIGH>;
64+ };
65+ };
66+
67+...
Documentation/devicetree/bindings/display/panel/focaltech,ota7290b.yaml+70−0
@@ -0,0 +1,70 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/display/panel/focaltech,ota7290b.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Focaltech OTA7290B DSI panels
8+
9+maintainers:
10+ - Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
11+
12+allOf:
13+ - $ref: panel-common.yaml#
14+
15+properties:
16+ compatible:
17+ const: waveshare,8.8-dsi-touch-a
18+
19+ reg:
20+ maxItems: 1
21+
22+ vdd-supply:
23+ description: supply regulator for VDD, usually 3.3V
24+
25+ vdda-supply:
26+ description: supply regulator for VDDA, 7-10V
27+
28+ vcc-supply:
29+ description: supply regulator for VCCIO, usually 1.5V
30+
31+ reset-gpios: true
32+ backlight: true
33+ rotation: true
34+ port: true
35+
36+required:
37+ - compatible
38+ - reg
39+ - vdd-supply
40+ - vcc-supply
41+ - reset-gpios
42+
43+additionalProperties: false
44+
45+examples:
46+ - |
47+ #include <dt-bindings/gpio/gpio.h>
48+
49+ dsi {
50+ #address-cells = <1>;
51+ #size-cells = <0>;
52+
53+ panel@0 {
54+ compatible = "waveshare,8.8-dsi-touch-a";
55+ reg = <0>;
56+ vdd-supply = <&vdd>;
57+ vcc-supply = <&vccio>;
58+ reset-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
59+ backlight = <&backlight>;
60+
61+ port {
62+ endpoint {
63+ remote-endpoint = <&mipi_out_panel>;
64+ };
65+ };
66+ };
67+ };
68+
69+...
70+
Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml+2−0
@@ -30,6 +30,8 @@ properties: · 29 unmodified lines
3030 - starry,2082109qfh040022-50e
3131 # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
3232 - starry,himax83102-j02
33+ # Waveshare 12.3-DSI-TOUCH-A panel
34+ - waveshare,12.3-dsi-touch-a
3335 - const: himax,hx83102
3436
3537 reg:
Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml+2−0
@@ -23,6 +23,8 @@ properties: · 22 unmodified lines
2323 - hannstar,hsd060bhw4
2424 - microchip,ac40t08a-mipi-panel
2525 - powkiddy,x55-panel
26+ - waveshare,5.0-dsi-touch-a
27+ - waveshare,5.5-dsi-touch-a
2628 - const: himax,hx8394
2729 - items:
2830 - enum:
Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml+2−0
@@ -24,6 +24,7 @@ properties: · 23 unmodified lines
2424 - raspberrypi,dsi-7inch
2525 - startek,kd050hdfia020
2626 - tdo,tl050hdv35
27+ - waveshare,7.0-dsi-touch-a
2728 - wanchanglong,w552946aaa
2829 - wanchanglong,w552946aba
2930 - const: ilitek,ili9881c
@@ -34,6 +35,7 @@ properties: · 4 unmodified lines
3435 backlight: true
3536 port: true
3637 power-supply: true
38+ iovcc-supply: true
3739 reset-gpios: true
3840 rotation: true
3941
Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml+6−0
@@ -24,6 +24,12 @@ properties: · 23 unmodified lines
2424 - radxa,display-10hd-ad001
2525 - radxa,display-8hd-ad002
2626 - taiguanck,xti05101-01a
27+ - waveshare,3.4-dsi-touch-c
28+ - waveshare,4.0-dsi-touch-c
29+ - waveshare,8.0-dsi-touch-a
30+ - waveshare,9.0-dsi-touch-b
31+ - waveshare,10.1-dsi-touch-a
32+ - waveshare,10.1-dsi-touch-b
2733 - const: jadard,jd9365da-h3
2834
2935 reg:
Documentation/devicetree/bindings/display/panel/novatek,nt35532.yaml+80−0
@@ -0,0 +1,80 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/display/panel/novatek,nt35532.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Novatek NT35532-based DSI display panels
8+
9+maintainers:
10+ - Cristian Cozzolino <cristian_ci@protonmail.com>
11+
12+allOf:
13+ - $ref: panel-common.yaml#
14+
15+properties:
16+ compatible:
17+ items:
18+ - enum:
19+ - flipkart,rimob-panel-nt35532-cs
20+ - const: novatek,nt35532
21+
22+ reg:
23+ maxItems: 1
24+
25+ backlight: true
26+ reset-gpios: true
27+
28+ avdd-supply:
29+ description: positive boost supply regulator
30+
31+ avee-supply:
32+ description: negative boost supply regulator
33+
34+ vci-supply:
35+ description: regulator that supplies the analog voltage
36+
37+ vddam-supply:
38+ description: power supply for MIPI interface
39+
40+ vddi-supply:
41+ description: regulator that supplies the I/O voltage
42+
43+ port: true
44+
45+required:
46+ - compatible
47+ - reg
48+ - reset-gpios
49+ - vddi-supply
50+ - port
51+
52+additionalProperties: false
53+
54+examples:
55+ - |
56+ #include <dt-bindings/gpio/gpio.h>
57+
58+ dsi {
59+ #address-cells = <1>;
60+ #size-cells = <0>;
61+
62+ panel@0 {
63+ compatible = "flipkart,rimob-panel-nt35532-cs", "novatek,nt35532";
64+ reg = <0>;
65+
66+ backlight = <&pmi8950_wled>;
67+ reset-gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
68+ avdd-supply = <&lab>;
69+ avee-supply = <&ibb>;
70+ vci-supply = <&pm8953_l17>;
71+ vddi-supply = <&pm8953_l6>;
72+
73+ port {
74+ panel_in: endpoint {
75+ remote-endpoint = <&dsi0_out>;
76+ };
77+ };
78+ };
79+ };
80+...
Documentation/devicetree/bindings/display/panel/panel-lvds.yaml+4−0
@@ -58,6 +58,10 @@ properties: · 57 unmodified lines
5858 - hydis,hv070wx2-1e0
5959 # Jenson Display BL-JT60050-01A 7" WSVGA (1024x600) color TFT LCD LVDS panel
6060 - jenson,bl-jt60050-01a
61+ # Riverdi RVT101HVLNWC00 10.1" WXGA (1280x800) TFT LCD LVDS panel
62+ - riverdi,rvt101hvlnwc00
63+ # Riverdi RVT70HSLNWCA0 7.0" WSVGA (1024x600) TFT LCD LVDS panel
64+ - riverdi,rvt70hslnwca0
6165 # Samsung LTN070NL01 7.0" WSVGA (1024x600) TFT LCD LVDS panel
6266 - samsung,ltn070nl01
6367 # Samsung LTN101AL03 10.1" WXGA (800x1280) TFT LCD LVDS panel
Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml+2−0
@@ -63,6 +63,8 @@ properties: · 62 unmodified lines
6363 - samsung,s6e3fa7-ams559nk06
6464 # Shangai Top Display Optoelectronics 7" TL070WSH30 1024x600 TFT LCD panel
6565 - tdo,tl070wsh30
66+ # Team Source Display Technology 7" TST070WSBE-196C 1024x600 TFT LCD panel
67+ - team-source-display,tst070wsbe-196c
6668
6769 reg:
6870 maxItems: 1
Documentation/devicetree/bindings/display/panel/panel-simple.yaml+36−0
@@ -31,6 +31,8 @@ properties: · 30 unmodified lines
3131
3232 # Ampire AM-1280800N3TZQW-T00H 10.1" WQVGA TFT LCD panel
3333 - ampire,am-1280800n3tzqw-t00h
34+ # Ampire AM-1280800W8TZQW-T00H 10.1" WXGA TFT LCD panel
35+ - ampire,am-1280800w8tzqw-t00h
3436 # Ampire AM-480272H3TMQW-T01H 4.3" WQVGA TFT LCD panel
3537 - ampire,am-480272h3tmqw-t01h
3638 # Ampire AM-800480L1TMQW-T00H 5" WVGA TFT LCD panel
@@ -97,6 +99,8 @@ properties: · 60 unmodified lines
9799 - dataimage,fg1001l0dsswmg01
98100 # DataImage, Inc. 7" WVGA (800x480) TFT LCD panel with 24-bit parallel interface.
99101 - dataimage,scf0700c48ggu18
102+ # Displaytech DT050BTFT-PTS 5.0" 800x480 TFT LCD Panel
103+ - displaytech,dt050btft-pts
100104 # DLC Display Co. DLC1010GIG 10.1" WXGA TFT LCD Panel
101105 - dlc,dlc1010gig
102106 # Emerging Display Technology Corp. 3.5" QVGA TFT LCD panel
@@ -232,6 +236,8 @@ properties: · 129 unmodified lines
232236 - nec,nl12880bc20-05
233237 # NEC LCD Technologies,Ltd. WQVGA TFT LCD panel
234238 - nec,nl4827hc19-05b
239+ # NEC LCD Technologies,Ltd. VGA TFT LCD panel
240+ - nec,nl6448bc33-70c
235241 # Netron-DY E231732 7.0" WSVGA TFT LCD panel
236242 - netron-dy,e231732
237243 # Newhaven Display International 480 x 272 TFT LCD panel
@@ -304,6 +310,8 @@ properties: · 66 unmodified lines
304310 - shelly,sca07010-bfn-lnn
305311 # Starry KR070PE2T 7" WVGA TFT LCD panel
306312 - starry,kr070pe2t
313+ # Startek KD070HDFLD092 7" WSVGA TFT LCD panel
314+ - startek,kd070hdfld092
307315 # Startek KD070WVFPA043-C069A 7" TFT LCD panel
308316 - startek,kd070wvfpa
309317 # Team Source Display Technology TST043015CMHX 4.3" WQVGA TFT LCD panel
@@ -341,10 +349,38 @@ properties: · 31 unmodified lines
341349 - vivax,tpc9150-panel
342350 # VXT 800x480 color TFT LCD panel
343351 - vxt,vl050-8048nt-c01
352+ # Waveshare 10.1" WXGA (1280x800) LCD panel
353+ - waveshare,10.1inch-c-panel
354+ # Waveshare 11.9" (320x1480) LCD panel
355+ - waveshare,11.9inch-panel
344356 # Waveshare 13.3" FHD (1920x1080) LCD panel
345357 - waveshare,13.3inch-panel
358+ # Waveshare 2.8" VGA (480x640) LCD panel
359+ - waveshare,2.8inch-panel
360+ # Waveshare 3.4" (800x800) LCD panel
361+ - waveshare,3.4inch-c-panel
362+ # Waveshare 4.0" WVGA (480x800) LCD panel
363+ - waveshare,4.0inch-panel
364+ # Waveshare 4.0" (720x720) LCD panel
365+ - waveshare,4.0inch-c-panel
366+ # Waveshare 5.0" WSVGA (1024x600) LCD panel
367+ - waveshare,5.0inch-c-panel
368+ # Waveshare 5.0" HD 720p (720x1280) LCD panel
369+ - waveshare,5.0inch-d-panel
370+ # Waveshare 6.25" (720x1560) LCD panel
371+ - waveshare,6.25inch-panel
346372 # Waveshare 7.0" WSVGA (1024x600) LCD panel
347373 - waveshare,7.0inch-c-panel
374+ # Waveshare 7.0" WXGA (1280x800) LCD panel
375+ - waveshare,7.0inch-e-panel
376+ # Waveshare 7.0" HD 720p (720x1280) LCD panel
377+ - waveshare,7.0inch-h-panel
378+ # Waveshare 7.9" (400x1280) LCD panel
379+ - waveshare,7.9inch-panel
380+ # Waveshare 8.0" WXGA (1280x800) LCD panel
381+ - waveshare,8.0inch-c-panel
382+ # Waveshare 8.8" (480x1920) LCD panel
383+ - waveshare,8.8inch-panel
348384 # Winstar Display Corporation 3.5" QVGA (320x240) TFT LCD panel
349385 - winstar,wf35ltiacd
350386 # Yes Optoelectronics YTC700TLAG-05-201C 7" TFT LCD panel
Documentation/devicetree/bindings/display/panel/samsung,sofef01-m.yaml+94−0
@@ -0,0 +1,94 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/display/panel/samsung,sofef01-m.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Samsung SOFEF01-M DDI for 1080x2520@60Hz 6.0"/6.1" OLED DSI panels
8+
9+maintainers:
10+ - Marijn Suijten <marijn.suijten@somainline.org>
11+
12+description: |
13+ Samsung SOFEF01-M Display-Driver-IC found in multiple Sony smartphones, paired with
14+ the following panel:
15+ - Sony Xperia 5 (kumano bahamut): amb609tc01
16+ - Sony Xperia 10 II (seine pdx201): ams597ut01
17+ - Sony Xperia 10 III (lena pdx213): ams597ut04
18+ - Sony Xperia 10 IV (murray pdx225): ams597ut05
19+ - Sony Xperia 10 V (zambezi pdx235): ams605dk01
20+ - Sony Xperia 10 VI (columbia pdx246): ams605dk01
21+
22+ The assembly features a Samsung touchscreen compatible with
23+ samsung,s6sy761.
24+
25+properties:
26+ compatible:
27+ enum:
28+ - samsung,sofef01-m-amb609tc01 # 6.1"
29+ - samsung,sofef01-m-ams597ut01 # 6.0"
30+ - samsung,sofef01-m-ams597ut04 # 6.0"
31+ - samsung,sofef01-m-ams597ut05 # 6.0"
32+ - samsung,sofef01-m-ams605dk01 # 6.1"
33+
34+ port: true
35+
36+ reg:
37+ maxItems: 1
38+ description: DSI virtual channel
39+
40+ reset-gpios: true
41+
42+ vci-supply:
43+ description: DisplayIC Operation supply (3.0V)
44+
45+ vddio-supply:
46+ description: I/O voltage supply (1.8V)
47+
48+required:
49+ - compatible
50+ - port
51+ - reg
52+ - reset-gpios
53+ - vddio-supply
54+
55+allOf:
56+ - $ref: panel-common.yaml#
57+ - if:
58+ properties:
59+ compatible:
60+ contains:
61+ const: samsung,sofef01-m-amb609tc01
62+ then:
63+ required:
64+ - vci-supply
65+ else:
66+ properties:
67+ vci-supply: false
68+
69+unevaluatedProperties: false
70+
71+examples:
72+ - |
73+ #include <dt-bindings/gpio/gpio.h>
74+
75+ dsi {
76+ #address-cells = <1>;
77+ #size-cells = <0>;
78+ panel@0 {
79+ compatible = "samsung,sofef01-m-amb609tc01";
80+ reg = <0>;
81+
82+ reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
83+
84+ vci-supply = <&vreg_l17a_3p0>;
85+ vddio-supply = <&vreg_l14a_1p8>;
86+
87+ port {
88+ endpoint {
89+ remote-endpoint = <&dsi0_out>;
90+ };
91+ };
92+ };
93+ };
94+...
Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml+19−2
@@ -21,6 +21,7 @@ properties: · 20 unmodified lines
2121 - renesas,r9a07g043u-du # RZ/G2UL
2222 - renesas,r9a07g044-du # RZ/G2{L,LC}
2323 - renesas,r9a09g057-du # RZ/V2H(P)
24+ - renesas,r9a09g077-du # RZ/T2H
2425 - items:
2526 - enum:
2627 - renesas,r9a07g054-du # RZ/V2L
@@ -28,6 +29,9 @@ properties: · 1 unmodified line
2829 - items:
2930 - const: renesas,r9a09g056-du # RZ/V2N
3031 - const: renesas,r9a09g057-du # RZ/V2H(P) fallback
32+ - items:
33+ - const: renesas,r9a09g087-du # RZ/N2H
34+ - const: renesas,r9a09g077-du # RZ/T2H fallback
3135
3236 reg:
3337 maxItems: 1
@@ -83,7 +87,6 @@ required: · 49 unmodified lines
8387 - interrupts
8488 - clocks
8589 - clock-names
86− - resets
8790 - power-domains
8891 - ports
8992 - renesas,vsps
@@ -95,13 +98,16 @@ allOf: · 5 unmodified lines
9598 properties:
9699 compatible:
97100 contains:
98− const: renesas,r9a07g043u-du
101+ enum:
102+ - renesas,r9a07g043u-du
103+ - renesas,r9a09g077-du
99104 then:
100105 properties:
101106 ports:
102107 properties:
103108 port@0:
104109 description: DPI
110+ port@1: false
105111
106112 required:
107113 - port@0
@@ -137,6 +143,17 @@ allOf: · 29 unmodified lines
137143
138144 required:
139145 - port@0
146+ - if:
147+ properties:
148+ compatible:
149+ contains:
150+ const: renesas,r9a09g077-du
151+ then:
152+ properties:
153+ resets: false
154+ else:
155+ required:
156+ - resets
140157
141158 examples:
142159 # RZ/G2L DU
Documentation/devicetree/bindings/display/rockchip/rockchip,rk3399-cdn-dp.yaml+2−0
@@ -41,7 +41,9 @@ properties: · 40 unmodified lines
4141 minItems: 1
4242 items:
4343 - description: Extcon device providing the cable state for DP PHY device 0
44+ maxItems: 1
4445 - description: Extcon device providing the cable state for DP PHY device 1
46+ maxItems: 1
4547 description:
4648 List of phandle to the extcon device providing the cable state for the DP PHY.
4749
Documentation/devicetree/bindings/dma/fsl,edma.yaml+9−0
@@ -12,6 +12,9 @@ description: | · 11 unmodified lines
1212 DMAMUX0 and DMAMUX1, specific DMA request source can only be multiplexed
1313 by any channel of certain group, DMAMUX0 or DMAMUX1, but not both.
1414
15+ This binding has an inverted dma-channel-mask definition compared to
16+ the common DMA binding for historical reasons.
17+
1518 maintainers:
1619 - Peng Fan <peng.fan@nxp.com>
1720
@@ -95,6 +98,12 @@ properties: · 77 unmodified lines
9598 eDMA are implemented in big endian mode, otherwise in little mode.
9699 type: boolean
97100
101+ dma-channel-mask:
102+ description: |
103+ Bitmask of available DMA channels (inverted definition).
104+ Bit semantics: 0 means channel available, 1 means channel unavailable
105+ default: 0
106+
98107 required:
99108 - "#dma-cells"
100109 - compatible
Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml+25−7
@@ -14,17 +14,16 @@ description: | · 13 unmodified lines
1414 maintainers:
1515 - Jon Hunter <jonathanh@nvidia.com>
1616 - Rajesh Gumasta <rgumasta@nvidia.com>
17−
18−allOf:
19− - $ref: dma-controller.yaml#
17+ - Akhil R <akhilrajeev@nvidia.com>
2018
2119 properties:
2220 compatible:
2321 oneOf:
24− - const: nvidia,tegra186-gpcdma
22+ - enum:
23+ - nvidia,tegra264-gpcdma
24+ - nvidia,tegra186-gpcdma
2525 - items:
2626 - enum:
27− - nvidia,tegra264-gpcdma
2827 - nvidia,tegra234-gpcdma
2928 - nvidia,tegra194-gpcdma
3029 - const: nvidia,tegra186-gpcdma
@@ -51,6 +50,14 @@ properties: · 20 unmodified lines
5150 iommus:
5251 maxItems: 1
5352
53+ iommu-map:
54+ description:
55+ Maps DMA channel numbers to IOMMU stream IDs. A single entry can map all
56+ channels when stream IDs are contiguous. In systems where the channels or
57+ stream IDs are not contiguous, multiple entries may be needed.
58+ minItems: 1
59+ maxItems: 32
60+
5461 dma-coherent: true
5562
5663 dma-channel-mask:
@@ -60,12 +67,23 @@ required: · 3 unmodified lines
6067 - compatible
6168 - reg
6269 - interrupts
63− - resets
64− - reset-names
6570 - "#dma-cells"
6671 - iommus
6772 - dma-channel-mask
6873
74+allOf:
75+ - $ref: dma-controller.yaml#
76+ - if:
77+ properties:
78+ compatible:
79+ contains:
80+ enum:
81+ - nvidia,tegra186-gpcdma
82+ then:
83+ required:
84+ - resets
85+ - reset-names
86+
6987 additionalProperties: false
7088
7189 examples:
Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml+21−0
@@ -23,6 +23,8 @@ properties: · 22 unmodified lines
2323 - qcom,bam-v1.4.0
2424 # MSM8916, SDM630
2525 - qcom,bam-v1.7.0
26+ # Kaanapali
27+ - qcom,bam-v2.0.0
2628 - items:
2729 - enum:
2830 # SDM845, SM6115, SM8150, SM8250 and QCM2290
@@ -118,4 +120,23 @@ examples: · 89 unmodified lines
118120 #dma-cells = <1>;
119121 qcom,ee = <0>;
120122 };
123+ - |
124+ #include <dt-bindings/interrupt-controller/arm-gic.h>
125+
126+ soc {
127+ #address-cells = <2>;
128+ #size-cells = <2>;
129+
130+ dma-controller@1dc4000 {
131+ compatible = "qcom,bam-v2.0.0";
132+ reg = <0x0 0x01dc4000 0x0 0x22000>;
133+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
134+ #dma-cells = <1>;
135+ iommus = <&apps_smmu 0xc0 0>, <&apps_smmu 0xc1 0>;
136+ qcom,ee = <0>;
137+ qcom,num-ees = <4>;
138+ num-channels = <20>;
139+ qcom,controlled-remotely;
140+ };
141+ };
121142 ...
Documentation/devicetree/bindings/dma/qcom,gpi.yaml+3−0
@@ -24,7 +24,9 @@ properties: · 23 unmodified lines
2424 - qcom,sm6350-gpi-dma
2525 - items:
2626 - enum:
27+ - qcom,eliza-gpi-dma
2728 - qcom,glymur-gpi-dma
29+ - qcom,hawi-gpi-dma
2830 - qcom,kaanapali-gpi-dma
2931 - qcom,milos-gpi-dma
3032 - qcom,qcm2290-gpi-dma
@@ -35,6 +37,7 @@ properties: · 4 unmodified lines
3537 - qcom,sc7280-gpi-dma
3638 - qcom,sc8280xp-gpi-dma
3739 - qcom,sdx75-gpi-dma
40+ - qcom,shikra-gpi-dma
3841 - qcom,sm6115-gpi-dma
3942 - qcom,sm6375-gpi-dma
4043 - qcom,sm8350-gpi-dma
Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml+3−2
@@ -21,11 +21,12 @@ properties: · 20 unmodified lines
2121 - enum:
2222 - snps,axi-dma-1.01a
2323 - intel,kmb-axi-dma
24− - sophgo,cv1800b-axi-dma
2524 - starfive,jh7110-axi-dma
2625 - starfive,jh8100-axi-dma
2726 - items:
28− - const: altr,agilex5-axi-dma
27+ - enum:
28+ - altr,agilex5-axi-dma
29+ - sophgo,cv1800b-axi-dma
2930 - const: snps,axi-dma-1.01a
3031
3132 reg:
Documentation/devicetree/bindings/dma/spacemit,k1-pdma.yaml+3−1
@@ -14,7 +14,9 @@ allOf: · 13 unmodified lines
1414
1515 properties:
1616 compatible:
17− const: spacemit,k1-pdma
17+ enum:
18+ - spacemit,k1-pdma
19+ - spacemit,k3-pdma
1820
1921 reg:
2022 maxItems: 1
Documentation/devicetree/bindings/dma/stericsson,dma40.yaml+2−6
@@ -136,13 +136,9 @@ properties: · 135 unmodified lines
136136 maxItems: 1
137137
138138 sram:
139− $ref: /schemas/types.yaml#/definitions/phandle-array
140− description: A phandle array with inner size 1 (no arg cells).
141− First phandle is the LCPA (Logical Channel Parameter Address) memory.
142− Second phandle is the LCLA (Logical Channel Link base Address) memory.
143− maxItems: 2
144139 items:
145− maxItems: 1
140+ - description: LCPA (Logical Channel Parameter Address) memory.
141+ - description: LCLA (Logical Channel Link base Address) memory.
146142
147143 memcpy-channels:
148144 $ref: /schemas/types.yaml#/definitions/uint32-array
Documentation/devicetree/bindings/embedded-controller/microsoft,surface-rt-ec.yaml+63−0
@@ -0,0 +1,63 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/embedded-controller/microsoft,surface-rt-ec.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Microsoft Surface RT fuel gauge and charger EC
8+
9+maintainers:
10+ - Jonas Schwöbel <jonasschwoebel@yahoo.de>
11+ - Svyatoslav Ryhel <clamor95@gmail.com>
12+
13+description:
14+ An Embedded Controller used in Microsoft Surface RT for monitoring
15+ battery properties and charger status.
16+
17+allOf:
18+ - $ref: /schemas/power/supply/power-supply.yaml#
19+
20+properties:
21+ compatible:
22+ const: microsoft,surface-rt-ec
23+
24+ reg:
25+ maxItems: 1
26+
27+ interrupts:
28+ maxItems: 1
29+
30+ enable-gpios:
31+ maxItems: 1
32+
33+ monitored-battery: true
34+
35+required:
36+ - compatible
37+ - reg
38+ - interrupts
39+ - enable-gpios
40+
41+additionalProperties: false
42+
43+examples:
44+ - |
45+ #include <dt-bindings/gpio/gpio.h>
46+ #include <dt-bindings/interrupt-controller/irq.h>
47+
48+ i2c {
49+ #address-cells = <1>;
50+ #size-cells = <0>;
51+
52+ embedded-controller@a {
53+ compatible = "microsoft,surface-rt-ec";
54+ reg = <0x0a>;
55+
56+ interrupt-parent = <&gpio>;
57+ interrupts = <74 IRQ_TYPE_EDGE_RISING>;
58+
59+ enable-gpios = <&gpio 88 GPIO_ACTIVE_HIGH>;
60+ monitored-battery = <&battery>;
61+ };
62+ };
63+...
Documentation/devicetree/bindings/embedded-controller/qcom,hamoa-crd-ec.yaml+56−0
@@ -0,0 +1,56 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/embedded-controller/qcom,hamoa-crd-ec.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm Hamoa Embedded Controller
8+
9+maintainers:
10+ - Sibi Sankar <sibi.sankar@oss.qualcomm.com>
11+ - Anvesh Jain P <anvesh.p@oss.qualcomm.com>
12+
13+description:
14+ Qualcomm Snapdragon based Hamoa/Purwa and Glymur reference devices have an
15+ EC running on different MCU chips. The EC handles things like fan control,
16+ temperature sensors, access to EC internal state changes.
17+
18+properties:
19+ compatible:
20+ oneOf:
21+ - items:
22+ - enum:
23+ - qcom,glymur-crd-ec
24+ - qcom,hamoa-iot-evk-ec
25+ - const: qcom,hamoa-crd-ec
26+ - enum:
27+ - qcom,hamoa-crd-ec
28+
29+ reg:
30+ const: 0x76
31+
32+ interrupts:
33+ maxItems: 1
34+
35+required:
36+ - compatible
37+ - reg
38+ - interrupts
39+
40+additionalProperties: false
41+
42+examples:
43+ - |
44+ #include <dt-bindings/interrupt-controller/irq.h>
45+ i2c {
46+ #address-cells = <1>;
47+ #size-cells = <0>;
48+
49+ embedded-controller@76 {
50+ compatible = "qcom,hamoa-crd-ec";
51+ reg = <0x76>;
52+
53+ interrupts-extended = <&tlmm 66 IRQ_TYPE_LEVEL_HIGH>;
54+ };
55+ };
56+...
Documentation/devicetree/bindings/extcon/samsung,s2mu005-muic.yaml+40−0
@@ -0,0 +1,40 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/extcon/samsung,s2mu005-muic.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: MUIC Device for Samsung S2M series PMICs
8+
9+maintainers:
10+ - Kaustabh Chakraborty <kauschluss@disroot.org>
11+
12+description: |
13+ The Samsung S2M series PMIC MUIC device is a USB port accessory
14+ detector. It reports multiple states depending on the ID-GND
15+ resistance measured by an internal ADC.
16+
17+ This is a part of device tree bindings for S2M and S5M family of Power
18+ Management IC (PMIC).
19+
20+ See also Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml for
21+ additional information and example.
22+
23+properties:
24+ compatible:
25+ enum:
26+ - samsung,s2mu005-muic
27+
28+ connector:
29+ $ref: /schemas/connector/usb-connector.yaml#
30+
31+ port:
32+ $ref: /schemas/graph.yaml#/properties/port
33+ description: Port connecting to the USB controller or PHY.
34+
35+required:
36+ - compatible
37+ - connector
38+ - port
39+
40+additionalProperties: false
Documentation/devicetree/bindings/firmware/qcom,scm.yaml+3−0
@@ -25,6 +25,7 @@ properties: · 24 unmodified lines
2525 - qcom,scm-apq8084
2626 - qcom,scm-eliza
2727 - qcom,scm-glymur
28+ - qcom,scm-hawi
2829 - qcom,scm-ipq4019
2930 - qcom,scm-ipq5018
3031 - qcom,scm-ipq5210
@@ -49,6 +50,7 @@ properties: · 18 unmodified lines
4950 - qcom,scm-msm8994
5051 - qcom,scm-msm8996
5152 - qcom,scm-msm8998
53+ - qcom,scm-nord
5254 - qcom,scm-qcm2290
5355 - qcom,scm-qcs615
5456 - qcom,scm-qcs8300
@@ -208,6 +210,7 @@ allOf: · 153 unmodified lines
208210 contains:
209211 enum:
210212 - qcom,scm-eliza
213+ - qcom,scm-hawi
211214 - qcom,scm-kaanapali
212215 - qcom,scm-milos
213216 - qcom,scm-sm8450
Documentation/devicetree/bindings/fpga/altera-pr-ip.txt+0−12
@@ -1,12 +0,0 @@
1−Altera Arria10 Partial Reconfiguration IP
2−
3−Required properties:
4−- compatible : should contain "altr,a10-pr-ip"
5−- reg : base address and size for memory mapped io.
6−
7−Example:
8−
9− fpga_mgr: fpga-mgr@ff20c000 {
10− compatible = "altr,a10-pr-ip";
11− reg = <0xff20c000 0x10>;
12− };
Documentation/devicetree/bindings/fpga/altera-socfpga-fpga-mgr.txt+0−17
@@ -1,17 +0,0 @@
1−Altera SOCFPGA FPGA Manager
2−
3−Required properties:
4−- compatible : should contain "altr,socfpga-fpga-mgr"
5−- reg : base address and size for memory mapped io.
6− - The first index is for FPGA manager register access.
7− - The second index is for writing FPGA configuration data.
8−- interrupts : interrupt for the FPGA Manager device.
9−
10−Example:
11−
12− hps_0_fpgamgr: fpgamgr@ff706000 {
13− compatible = "altr,socfpga-fpga-mgr";
14− reg = <0xFF706000 0x1000
15− 0xFFB90000 0x1000>;
16− interrupts = <0 175 4>;
17− };
Documentation/devicetree/bindings/fpga/altr,a10-pr-ip.yaml+34−0
@@ -0,0 +1,34 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/fpga/altr,a10-pr-ip.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Altera Arria10 Partial Reconfiguration IP
8+
9+maintainers:
10+ - Matthew Gerlach <matthew.gerlach@linux.intel.com>
11+
12+description:
13+ The Altera Arria 10 Partial Reconfiguration IP core allows the host
14+ processor to perform partial reconfiguration of the FPGA fabric.
15+
16+properties:
17+ compatible:
18+ const: altr,a10-pr-ip
19+
20+ reg:
21+ maxItems: 1
22+
23+required:
24+ - compatible
25+ - reg
26+
27+additionalProperties: false
28+
29+examples:
30+ - |
31+ fpga-mgr@ff20c000 {
32+ compatible = "altr,a10-pr-ip";
33+ reg = <0xff20c000 0x10>;
34+ };
Documentation/devicetree/bindings/fpga/altr,socfpga-fpga-mgr.yaml+38−0
@@ -0,0 +1,38 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/fpga/altr,socfpga-fpga-mgr.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Altera SOCFPGA FPGA Manager
8+
9+maintainers:
10+ - Steffen Trumtrar <s.trumtrar@pengutronix.de>
11+
12+properties:
13+ compatible:
14+ const: altr,socfpga-fpga-mgr
15+
16+ reg:
17+ items:
18+ - description: FPGA manager register access
19+ - description: Writing FPGA configuration data
20+
21+ interrupts:
22+ maxItems: 1
23+
24+required:
25+ - compatible
26+ - reg
27+ - interrupts
28+
29+additionalProperties: false
30+
31+examples:
32+ - |
33+ fpgamgr@ff706000 {
34+ compatible = "altr,socfpga-fpga-mgr";
35+ reg = <0xff706000 0x1000>,
36+ <0xffb90000 0x1000>;
37+ interrupts = <0 175 4>;
38+ };
Documentation/devicetree/bindings/fpga/efinix,trion-config.yaml+98−0
@@ -0,0 +1,98 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/fpga/efinix,trion-config.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Efinix SPI FPGA Manager
8+
9+maintainers:
10+ - Ian Dannapel <iansdannapel@gmail.com>
11+
12+description: |
13+ Efinix FPGAs (Trion, Topaz, and Titanium families) support loading bitstreams
14+ through "SPI Passive Mode".
15+ Additional pin hogs for bus width configuration should be set
16+ elsewhere, if necessary.
17+
18+ References:
19+ - https://www.efinixinc.com/docs/an006-configuring-trion-fpgas-v6.3.pdf
20+ - https://www.efinixinc.com/docs/an033-configuring-titanium-fpgas-v2.8.pdf
21+ - https://www.efinixinc.com/docs/an061-configuring-topaz-fpgas-v1.1.pdf
22+
23+allOf:
24+ - $ref: /schemas/spi/spi-peripheral-props.yaml#
25+
26+properties:
27+ compatible:
28+ oneOf:
29+ - items:
30+ - enum:
31+ - efinix,titanium-config
32+ - efinix,topaz-config
33+ - const: efinix,trion-config
34+ - const: efinix,trion-config
35+
36+ spi-cpha: true
37+
38+ spi-cpol: true
39+
40+ spi-max-frequency:
41+ maximum: 25000000
42+
43+ reg:
44+ maxItems: 1
45+
46+ reset-gpios:
47+ description:
48+ reset and re-configuration trigger pin (low active)
49+ maxItems: 1
50+
51+ cdone-gpios:
52+ description:
53+ optional configuration done status pin (high active)
54+ maxItems: 1
55+
56+required:
57+ - compatible
58+ - reg
59+ - reset-gpios
60+ - spi-cpha
61+ - spi-cpol
62+
63+unevaluatedProperties: false
64+
65+examples:
66+ - |
67+ #include <dt-bindings/gpio/gpio.h>
68+ spi {
69+ #address-cells = <1>;
70+ #size-cells = <0>;
71+ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
72+ fpga-mgr@0 {
73+ compatible = "efinix,trion-config";
74+ reg = <0>;
75+ spi-max-frequency = <25000000>;
76+ spi-cpha;
77+ spi-cpol;
78+ reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
79+ cdone-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
80+ };
81+ };
82+ - |
83+ #include <dt-bindings/gpio/gpio.h>
84+ spi {
85+ #address-cells = <1>;
86+ #size-cells = <0>;
87+ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
88+ fpga-mgr@0 {
89+ compatible = "efinix,titanium-config", "efinix,trion-config";
90+ reg = <0>;
91+ spi-max-frequency = <25000000>;
92+ spi-cpha;
93+ spi-cpol;
94+ reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
95+ cdone-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
96+ };
97+ };
98+...
Documentation/devicetree/bindings/fpga/technologic,ts7300-fpga.yaml+36−0
@@ -0,0 +1,36 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/fpga/technologic,ts7300-fpga.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Technologic Systems TS-7300 FPGA Manager
8+
9+maintainers:
10+ - Florian Fainelli <f.fainelli@gmail.com>
11+
12+description:
13+ FPGA manager for the Altera Cyclone II FPGA on Technologic Systems
14+ TS-7300 board. The FPGA is programmed via the memory-mapped interface
15+ implemented in the CPLD.
16+
17+properties:
18+ compatible:
19+ const: technologic,ts7300-fpga
20+
21+ reg:
22+ maxItems: 1
23+
24+required:
25+ - compatible
26+ - reg
27+
28+additionalProperties: false
29+
30+examples:
31+ - |
32+ fpga-mgr@13c00000 {
33+ compatible = "technologic,ts7300-fpga";
34+ reg = <0x13c00000 0x2>;
35+ };
36+...
Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml+13−0
@@ -45,6 +45,18 @@ properties: · 44 unmodified lines
4545 $ref: /schemas/types.yaml#/definitions/uint32
4646 description: Number of daisy-chained shift registers
4747
48+ lines-initial-states:
49+ $ref: /schemas/types.yaml#/definitions/uint32
50+ description:
51+ Bitmask that specifies the initial state of each output line, written
52+ by the driver before the gpiochip is registered. Bit N corresponds to
53+ GPIO line N, following the convention already documented for
54+ nxp,pcf8575. Because the 74HC595/74LVC594 family is push-pull output
55+ only, a bit set to zero drives the line low and a bit set to one
56+ drives it high. The bitmask covers up to 32 lines (four cascaded
57+ registers); outputs beyond that come up zeroed. When the property is
58+ absent all outputs come up low, preserving the previous behaviour.
59+
4860 enable-gpios:
4961 description: GPIO connected to the OE (Output Enable) pin.
5062 maxItems: 1
@@ -79,6 +91,7 @@ examples: · 28 unmodified lines
7991 gpio-controller;
8092 #gpio-cells = <2>;
8193 registers-number = <4>;
94+ lines-initial-states = <0xffff0000>;
8295 spi-max-frequency = <100000>;
8396 };
8497 };
Documentation/devicetree/bindings/gpio/gpio-zynq.yaml+14−3
@@ -12,10 +12,11 @@ maintainers: · 11 unmodified lines
1212 properties:
1313 compatible:
1414 enum:
15+ - xlnx,eio-gpio-1.0
16+ - xlnx,pmc-gpio-1.0
17+ - xlnx,versal-gpio-1.0
1518 - xlnx,zynq-gpio-1.0
1619 - xlnx,zynqmp-gpio-1.0
17− - xlnx,versal-gpio-1.0
18− - xlnx,pmc-gpio-1.0
1920
2021 reg:
2122 maxItems: 1
@@ -30,7 +31,7 @@ properties: · 8 unmodified lines
3031
3132 gpio-line-names:
3233 description: strings describing the names of each gpio line
33− minItems: 58
34+ minItems: 52
3435 maxItems: 174
3536
3637 interrupt-controller: true
@@ -89,6 +90,16 @@ allOf: · 52 unmodified lines
8990 minItems: 116
9091 maxItems: 116
9192
93+ - if:
94+ properties:
95+ compatible:
96+ enum:
97+ - xlnx,eio-gpio-1.0
98+ then:
99+ properties:
100+ gpio-line-names:
101+ maxItems: 52
102+
92103 required:
93104 - compatible
94105 - reg
Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml+6−0
@@ -85,6 +85,8 @@ properties: · 84 unmodified lines
8585 - nvidia,tegra194-gpio-aon
8686 - nvidia,tegra234-gpio
8787 - nvidia,tegra234-gpio-aon
88+ - nvidia,tegra238-gpio
89+ - nvidia,tegra238-gpio-aon
8890 - nvidia,tegra256-gpio
8991 - nvidia,tegra264-gpio
9092 - nvidia,tegra264-gpio-uphy
@@ -163,6 +165,7 @@ allOf: · 72 unmodified lines
163165 - nvidia,tegra186-gpio
164166 - nvidia,tegra194-gpio
165167 - nvidia,tegra234-gpio
168+ - nvidia,tegra238-gpio
166169 - nvidia,tegra256-gpio
167170 - nvidia,tegra264-gpio
168171 - nvidia,tegra264-gpio-uphy
@@ -180,6 +183,7 @@ allOf: · 11 unmodified lines
180183 - nvidia,tegra186-gpio-aon
181184 - nvidia,tegra194-gpio-aon
182185 - nvidia,tegra234-gpio-aon
186+ - nvidia,tegra238-gpio-aon
183187 - nvidia,tegra264-gpio-aon
184188 then:
185189 properties:
@@ -192,6 +196,8 @@ allOf: · 6 unmodified lines
192196 compatible:
193197 contains:
194198 enum:
199+ - nvidia,tegra238-gpio
200+ - nvidia,tegra238-gpio-aon
195201 - nvidia,tegra264-gpio
196202 - nvidia,tegra264-gpio-uphy
197203 - nvidia,tegra264-gpio-aon
Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml+6−0
@@ -95,6 +95,12 @@ patternProperties: · 94 unmodified lines
9595 '#interrupt-cells':
9696 const: 2
9797
98+ patternProperties:
99+ "^.+-hog(-[0-9]+)?$":
100+ type: object
101+ required:
102+ - gpio-hog
103+
98104 required:
99105 - compatible
100106 - reg
Documentation/devicetree/bindings/gpio/waveshare,dsi-touch-gpio.yaml+73−0
@@ -0,0 +1,73 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/gpio/waveshare,dsi-touch-gpio.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Waveshare GPIO controller on DSI TOUCH panels
8+
9+maintainers:
10+ - Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
11+
12+description:
13+ Waveshare DSI TOUCH panel kits contain separate GPIO controller for toggling
14+ power supplies and panel / touchscreen resets.
15+
16+properties:
17+ compatible:
18+ const: waveshare,dsi-touch-gpio
19+
20+ reg:
21+ maxItems: 1
22+
23+ gpio-controller: true
24+
25+ '#gpio-cells':
26+ const: 2
27+
28+required:
29+ - compatible
30+ - reg
31+ - gpio-controller
32+ - "#gpio-cells"
33+
34+additionalProperties: false
35+
36+examples:
37+ - |
38+ #include <dt-bindings/gpio/gpio.h>
39+
40+ i2c {
41+ #address-cells = <1>;
42+ #size-cells = <0>;
43+
44+ wsgpio: gpio@45 {
45+ compatible = "waveshare,dsi-touch-gpio";
46+ reg = <0x45>;
47+ gpio-controller;
48+ #gpio-cells = <2>;
49+ };
50+ };
51+
52+ panel_avdd: regulator-panel-avdd {
53+ compatible = "regulator-fixed";
54+ regulator-name = "panel-avdd";
55+ gpios = <&wsgpio 0 GPIO_ACTIVE_HIGH>;
56+ enable-active-high;
57+ };
58+
59+ panel_iovcc: regulator-panel-iovcc {
60+ compatible = "regulator-fixed";
61+ regulator-name = "panel-iovcc";
62+ gpios = <&wsgpio 4 GPIO_ACTIVE_HIGH>;
63+ enable-active-high;
64+ };
65+
66+ panel_vcc: regulator-panel-vcc {
67+ compatible = "regulator-fixed";
68+ regulator-name = "panel-vcc";
69+ gpios = <&wsgpio 8 GPIO_ACTIVE_HIGH>;
70+ enable-active-high;
71+ regulator-always-on;
72+ };
73+...
Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml+2−0
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
2626 - realtek,rtd1619-mali
2727 - renesas,r9a07g044-mali
2828 - renesas,r9a07g054-mali
29+ - renesas,r9a08g046-mali
2930 - renesas,r9a09g047-mali
3031 - renesas,r9a09g056-mali
3132 - renesas,r9a09g057-mali
@@ -150,6 +151,7 @@ allOf: · 118 unmodified lines
150151 enum:
151152 - renesas,r9a07g044-mali
152153 - renesas,r9a07g054-mali
154+ - renesas,r9a08g046-mali
153155 - renesas,r9a09g047-mali
154156 - renesas,r9a09g056-mali
155157 - renesas,r9a09g057-mali
Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml+11−0
@@ -15,6 +15,9 @@ description: | · 14 unmodified lines
1515 represented by CTRLMMR_xxx_JTAGID register which contains information about
1616 SoC id and revision.
1717
18+ On some SoCs like AM62P, the silicon revision is determined by reading
19+ alternative registers via NVMEM cells.
20+
1821 properties:
1922 $nodename:
2023 pattern: "^chipid@[0-9a-f]+$"
@@ -26,6 +29,14 @@ properties: · 5 unmodified lines
2629 reg:
2730 maxItems: 1
2831
32+ nvmem-cells:
33+ items:
34+ - description: Alternate silicon revision register
35+
36+ nvmem-cell-names:
37+ items:
38+ - const: gpsw1
39+
2940 required:
3041 - compatible
3142 - reg
Documentation/devicetree/bindings/hwmon/adi,ltc4283.yaml+272−0
@@ -0,0 +1,272 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/hwmon/adi,ltc4283.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: LTC4283 Negative Voltage Hot Swap Controller
8+
9+maintainers:
10+ - Nuno Sá <nuno.sa@analog.com>
11+
12+description: |
13+ The LTC4283 negative voltage hot swap controller drives an external N-channel
14+ MOSFET to allow a board to be safely inserted and removed from a live
15+ backplane.
16+
17+ https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4283.pdf
18+
19+properties:
20+ compatible:
21+ enum:
22+ - adi,ltc4283
23+
24+ reg:
25+ maxItems: 1
26+
27+ adi,rsense-nano-ohms:
28+ description: Value of the sense resistor.
29+
30+ adi,current-limit-sense-microvolt:
31+ description:
32+ The current limit sense voltage of the chip is adjustable between
33+ 15mV and 30mV in 1mV steps. This effectively limits the current
34+ on the load.
35+ minimum: 15000
36+ maximum: 30000
37+ default: 15000
38+
39+ adi,current-limit-foldback-factor:
40+ description:
41+ Specifies the foldback factor for the current limit. The current limit
42+ can be reduced (folded back) to one of four preset levels. The value
43+ represents the percentage of the current limit sense voltage to use
44+ during foldback. A value of 100 means no foldback.
45+ $ref: /schemas/types.yaml#/definitions/uint32
46+ enum: [10, 20, 50, 100]
47+ default: 100
48+
49+ adi,cooling-delay-ms:
50+ description:
51+ Cooling time to apply after an overcurrent fault, FET bad or
52+ external fault.
53+ enum: [512, 1002, 2005, 4100, 8190, 16400, 32800, 65600]
54+ default: 512
55+
56+ adi,fet-bad-timer-delay-ms:
57+ description:
58+ FET bad timer delay. After a FET bad status condition is detected,
59+ this timer is started. If the condition persists for the
60+ specified time, the FET is turned off and a fault is logged.
61+ enum: [256, 512, 1002, 2005]
62+ default: 256
63+
64+ adi,power-good-reset-on-fet:
65+ description:
66+ If set, resets the power good status when the MOSFET is turned off.
67+ Otherwise, it resets when a low output voltage is detected.
68+ type: boolean
69+
70+ adi,fet-turn-off-disable:
71+ description:
72+ If set, the MOSFET is not turned off when a FET fault is detected.
73+ type: boolean
74+
75+ adi,tmr-pull-down-disable:
76+ description: Disables 2uA pull-down current on the TMR pin.
77+ type: boolean
78+
79+ adi,dvdt-inrush-control-disable:
80+ description:
81+ Disables dV/dt inrush control during startup. In dV/dt mode, the inrush
82+ current is limited by controlling a constant output voltage ramp rate.
83+ When disabled, the inrush control mechanism is active current limiting.
84+ type: boolean
85+
86+ adi,fault-log-enable:
87+ description:
88+ If set, enables logging fault registers and ADC data into EEPROM upon a
89+ fault.
90+ type: boolean
91+
92+ adi,vpower-drns-enable:
93+ description:
94+ If set, enables the attenuated MOSFET drain voltage to be monitored. This
95+ effectively means that the MOSFET power is monitored. If not set, the
96+ attenuated input voltage (and hence input power) is monitored.
97+ type: boolean
98+
99+ adi,external-fault-fet-off-enable:
100+ description: Turns MOSFET off following an external fault.
101+ type: boolean
102+
103+ adi,undervoltage-retry-disable:
104+ description: Do not retry to turn on the MOSFET after an undervoltage fault.
105+ type: boolean
106+
107+ adi,overvoltage-retry-disable:
108+ description: Do not retry to turn on the MOSFET after an overvoltage fault.
109+ type: boolean
110+
111+ adi,external-fault-retry-enable:
112+ description: Retry to turn on the MOSFET after an external fault.
113+ type: boolean
114+
115+ adi,overcurrent-retries:
116+ description: Configures auto-retry following an Overcurrent fault.
117+ $ref: /schemas/types.yaml#/definitions/string
118+ enum: [latch-off, "1", "7", unlimited]
119+ default: latch-off
120+
121+ adi,fet-bad-retries:
122+ description:
123+ Configures auto-retry following a FET bad fault and a consequent MOSFET
124+ turn off.
125+ $ref: /schemas/types.yaml#/definitions/string
126+ enum: [latch-off, "1", "7", unlimited]
127+ default: latch-off
128+
129+ adi,pgio1-func:
130+ description: Configures the function of the PGIO1 pin.
131+ $ref: /schemas/types.yaml#/definitions/string
132+ enum: [inverted_power_good, power_good, gpio]
133+ default: inverted_power_good
134+
135+ adi,pgio2-func:
136+ description: Configures the function of the PGIO2 pin.
137+ $ref: /schemas/types.yaml#/definitions/string
138+ enum: [inverted_power_good, power_good, gpio, active_current_limiting]
139+ default: inverted_power_good
140+
141+ adi,pgio3-func:
142+ description: Configures the function of the PGIO3 pin.
143+ $ref: /schemas/types.yaml#/definitions/string
144+ enum: [inverted_power_good_input, power_good_input, gpio]
145+ default: inverted_power_good_input
146+
147+ adi,pgio4-func:
148+ description: Configures the function of the PGIO4 pin.
149+ $ref: /schemas/types.yaml#/definitions/string
150+ enum: [inverted_external_fault, external_fault, gpio]
151+ default: inverted_external_fault
152+
153+ adi,gpio-on-adio1:
154+ description: If set, the ADIO1 pin is used as a GPIO.
155+ type: boolean
156+
157+ adi,gpio-on-adio2:
158+ description: If set, the ADIO2 pin is used as a GPIO.
159+ type: boolean
160+
161+ adi,gpio-on-adio3:
162+ description: If set, the ADIO3 pin is used as a GPIO.
163+ type: boolean
164+
165+ adi,gpio-on-adio4:
166+ description: If set, the ADIO4 pin is used as a GPIO.
167+ type: boolean
168+
169+ gpio-controller: true
170+
171+ '#gpio-cells':
172+ const: 2
173+
174+dependencies:
175+ adi,gpio-on-adio1:
176+ - gpio-controller
177+ - '#gpio-cells'
178+ adi,gpio-on-adio2:
179+ - gpio-controller
180+ - '#gpio-cells'
181+ adi,gpio-on-adio3:
182+ - gpio-controller
183+ - '#gpio-cells'
184+ adi,gpio-on-adio4:
185+ - gpio-controller
186+ - '#gpio-cells'
187+ adi,external-fault-retry-enable:
188+ - adi,pgio4-func
189+ adi,external-fault-fet-off-enable:
190+ - adi,pgio4-func
191+
192+required:
193+ - compatible
194+ - reg
195+ - adi,rsense-nano-ohms
196+
197+allOf:
198+ - if:
199+ properties:
200+ adi,pgio1-func:
201+ const: gpio
202+ required:
203+ - adi,pgio1-func
204+ then:
205+ required:
206+ - gpio-controller
207+ - '#gpio-cells'
208+
209+ - if:
210+ properties:
211+ adi,pgio2-func:
212+ const: gpio
213+ required:
214+ - adi,pgio2-func
215+ then:
216+ required:
217+ - gpio-controller
218+ - '#gpio-cells'
219+
220+ - if:
221+ properties:
222+ adi,pgio3-func:
223+ const: gpio
224+ required:
225+ - adi,pgio3-func
226+ then:
227+ required:
228+ - gpio-controller
229+ - '#gpio-cells'
230+
231+ - if:
232+ properties:
233+ adi,pgio4-func:
234+ const: gpio
235+ required:
236+ - adi,pgio4-func
237+ then:
238+ properties:
239+ adi,external-fault-retry-enable: false
240+ adi,external-fault-fet-off-enable: false
241+ required:
242+ - gpio-controller
243+ - '#gpio-cells'
244+
245+additionalProperties: false
246+
247+examples:
248+ - |
249+ i2c {
250+ #address-cells = <1>;
251+ #size-cells = <0>;
252+
253+ swap-controller@15 {
254+ compatible = "adi,ltc4283";
255+ reg = <0x15>;
256+
257+ adi,rsense-nano-ohms = <500>;
258+ adi,current-limit-sense-microvolt = <25000>;
259+ adi,current-limit-foldback-factor = <10>;
260+ adi,cooling-delay-ms = <8190>;
261+ adi,fet-bad-timer-delay-ms = <512>;
262+
263+ adi,external-fault-fet-off-enable;
264+ adi,pgio4-func = "external_fault";
265+
266+ adi,gpio-on-adio1;
267+ adi,pgio1-func = "gpio";
268+ gpio-controller;
269+ #gpio-cells = <2>;
270+ };
271+ };
272+...
Documentation/devicetree/bindings/hwmon/apple,smc-hwmon.yaml+85−0
@@ -0,0 +1,85 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/hwmon/apple,smc-hwmon.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Apple SMC Hardware Monitoring
8+
9+description:
10+ Apple's System Management Controller (SMC) exposes a vast array of
11+ hardware monitoring sensors, including temperature probes, current and
12+ voltage sense, power meters, and fan speeds. It also provides endpoints
13+ to manually control the speed of each fan individually. Each Apple
14+ Silicon device exposes a different set of endpoints via SMC keys. This
15+ is true even when two machines share an SoC. The CPU core temperature
16+ sensor keys on an M1 Mac mini are different to those on an M1 MacBook
17+ Pro, for example.
18+
19+maintainers:
20+ - James Calligeros <jcalligeros99@gmail.com>
21+
22+$defs:
23+ sensor:
24+ type: object
25+
26+ properties:
27+ apple,key-id:
28+ $ref: /schemas/types.yaml#/definitions/string
29+ pattern: "^[A-Za-z0-9]{4}$"
30+ description: The SMC FourCC key of the desired sensor.
31+ Must match the node's suffix.
32+
33+ label:
34+ description: Human-readable name for the sensor
35+
36+ required:
37+ - apple,key-id
38+
39+properties:
40+ compatible:
41+ const: apple,smc-hwmon
42+
43+patternProperties:
44+ "^current-[A-Za-z0-9]{4}$":
45+ $ref: "#/$defs/sensor"
46+ unevaluatedProperties: false
47+
48+ "^fan-[A-Za-z0-9]{4}$":
49+ $ref: "#/$defs/sensor"
50+ unevaluatedProperties: false
51+
52+ properties:
53+ apple,fan-minimum:
54+ $ref: /schemas/types.yaml#/definitions/string
55+ pattern: "^[A-Za-z0-9]{4}$"
56+ description: SMC key containing the fan's minimum speed
57+
58+ apple,fan-maximum:
59+ $ref: /schemas/types.yaml#/definitions/string
60+ pattern: "^[A-Za-z0-9]{4}$"
61+ description: SMC key containing the fan's maximum speed
62+
63+ apple,fan-target:
64+ $ref: /schemas/types.yaml#/definitions/string
65+ pattern: "^[A-Za-z0-9]{4}$"
66+ description: Writeable endpoint for setting desired fan speed
67+
68+ apple,fan-mode:
69+ $ref: /schemas/types.yaml#/definitions/string
70+ pattern: "^[A-Za-z0-9]{4}$"
71+ description: Writeable key to enable/disable manual fan control
72+
73+ "^power-[A-Za-z0-9]{4}$":
74+ $ref: "#/$defs/sensor"
75+ unevaluatedProperties: false
76+
77+ "^temperature-[A-Za-z0-9]{4}$":
78+ $ref: "#/$defs/sensor"
79+ unevaluatedProperties: false
80+
81+ "^voltage-[A-Za-z0-9]{4}$":
82+ $ref: "#/$defs/sensor"
83+ unevaluatedProperties: false
84+
85+additionalProperties: false
Documentation/devicetree/bindings/hwmon/lm75.yaml+7−0
@@ -54,6 +54,13 @@ properties: · 53 unmodified lines
5454 interrupts:
5555 maxItems: 1
5656
57+ ti,alert-polarity-active-high:
58+ description: Alert pin is asserted based on the value of alert polarity
59+ bit of configuration register. Default value is normal (0 which maps to
60+ active-low). The other value is inverted (1 which maps to active-high).
61+ Specify this property to set the alert polarity to active-high.
62+ $ref: /schemas/types.yaml#/definitions/flag
63+
5764 required:
5865 - compatible
5966 - reg
Documentation/devicetree/bindings/hwmon/microchip,emc1812.yaml+193−0
@@ -0,0 +1,193 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/hwmon/microchip,emc1812.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Microchip EMC1812/13/14/15/33 multichannel temperature sensor
8+
9+maintainers:
10+ - Marius Cristea <marius.cristea@microchip.com>
11+
12+description: |
13+ The Microchip EMC1812/13/14/15/33 is a high-accuracy 2-wire multichannel
14+ low-voltage remote diode temperature monitor.
15+
16+ The datasheet can be found here:
17+ https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/EMC1812-3-4-5-33-Data-Sheet-DS20005751.pdf
18+
19+ EMC1812 has one external remote temperature monitoring channel
20+ EMC1813 has two external remote temperature monitoring channels
21+ EMC1814 has three external remote temperature monitoring channels and
22+ channels 2 and 3 support anti parallel diode
23+ EMC1815 has four external remote temperature monitoring channels and
24+ channels 1/2 and 3/4 support anti parallel diode
25+ EMC1833 has two external remote temperature monitoring channels and
26+ channels 1 and 2 support anti parallel diode
27+
28+properties:
29+ compatible:
30+ enum:
31+ - microchip,emc1812
32+ - microchip,emc1813
33+ - microchip,emc1814
34+ - microchip,emc1815
35+ - microchip,emc1833
36+
37+ reg:
38+ maxItems: 1
39+
40+ interrupts:
41+ items:
42+ - description: alert-therm2 asserts when the ALERT limit is exceeded.
43+ - description: therm-addr asserts when the THERM limit is exceeded.
44+ minItems: 1
45+
46+ interrupt-names:
47+ items:
48+ - const: alert-therm2
49+ - const: therm-addr
50+ minItems: 1
51+
52+ "#address-cells":
53+ const: 1
54+
55+ "#size-cells":
56+ const: 0
57+
58+ microchip,enable-anti-parallel:
59+ description:
60+ Enable anti-parallel diode mode operation. EMC1814, EMC1815 and EMC1833
61+ support reading two external diodes in anti-parallel connection on the
62+ same set of pins. Disabling APD functionality to implement substrate
63+ diodes on devices that support APD eliminates the benefit of APD
64+ (two diodes on one channel).
65+ type: boolean
66+
67+ microchip,parasitic-res-on-channel1-2:
68+ description:
69+ Indicates that the chip and the diodes/transistors are sufficiently
70+ far apart that a parasitic resistance is added to the wires, which can
71+ affect the measurements. Due to the availability of only a single
72+ configuration bit in hardware, channels 1 and 2 are affected together.
73+ If channel 2 is not available in hardware, this setting affects only
74+ channel 1.
75+ type: boolean
76+
77+ microchip,parasitic-res-on-channel3-4:
78+ description:
79+ Indicates that the chip and the diodes/transistors are sufficiently
80+ far apart that a parasitic resistance is added to the wires, which can
81+ affect the measurements. Due to the availability of only a single
82+ configuration bit in hardware, channels 3 and 4 are affected together.
83+ If channel 4 is not available in hardware, this setting affects only
84+ channel 3.
85+ type: boolean
86+
87+ vdd-supply: true
88+
89+patternProperties:
90+ "^channel@[0-4]$":
91+ description: |
92+ Represents the temperature channels.
93+ 0: Internal sensor
94+ 1-4: External remote diodes
95+ type: object
96+
97+ properties:
98+ reg:
99+ maxItems: 1
100+
101+ label:
102+ description: Unique name to identify which channel this is.
103+
104+ required:
105+ - reg
106+
107+ additionalProperties: false
108+
109+required:
110+ - compatible
111+ - reg
112+ - vdd-supply
113+
114+allOf:
115+ # EMC1812: 1 Internal, 1 External Channels, No APD,
116+ # parasitic-res-on-channel1-2: for channel 1
117+ - if:
118+ properties:
119+ compatible:
120+ const: microchip,emc1812
121+ then:
122+ properties:
123+ microchip,enable-anti-parallel: false
124+ microchip,parasitic-res-on-channel3-4: false
125+ patternProperties:
126+ "^channel@[2-4]$": false
127+
128+ # EMC1813: 1 Internal, 2 External Channels, No APD,
129+ # parasitic-res-on-channel1-2: on both channel 1 & 2
130+ - if:
131+ properties:
132+ compatible:
133+ const: microchip,emc1813
134+ then:
135+ properties:
136+ microchip,enable-anti-parallel: false
137+ microchip,parasitic-res-on-channel3-4: false
138+ patternProperties:
139+ "^channel@[3-4]$": false
140+
141+ # EMC1833: 1 Internal, 2 External Channels, Supports APD,
142+ # parasitic-res-on-channel1-2: on both channel 1 & 2
143+ - if:
144+ properties:
145+ compatible:
146+ const: microchip,emc1833
147+ then:
148+ properties:
149+ microchip,parasitic-res-on-channel3-4: false
150+ patternProperties:
151+ "^channel@[3-4]$": false
152+
153+ # EMC1814: 1 Internal, 3 External Channels, Supports APD,
154+ # parasitic-res-on-channel1-2: on both channel 1 & 2
155+ # parasitic-res-on-channel3-4: for channel 3
156+ - if:
157+ properties:
158+ compatible:
159+ const: microchip,emc1814
160+ then:
161+ properties:
162+ channel@4: false
163+
164+unevaluatedProperties: false
165+
166+examples:
167+ - |
168+ i2c {
169+ #address-cells = <1>;
170+ #size-cells = <0>;
171+
172+ temperature-sensor@4c {
173+ compatible = "microchip,emc1813";
174+ reg = <0x4c>;
175+
176+ #address-cells = <1>;
177+ #size-cells = <0>;
178+
179+ microchip,parasitic-res-on-channel1-2;
180+
181+ vdd-supply = <&vdd>;
182+
183+ channel@1 {
184+ reg = <1>;
185+ label = "External CH1 Temperature";
186+ };
187+
188+ channel@2 {
189+ reg = <2>;
190+ label = "External CH2 Temperature";
191+ };
192+ };
193+ };
Documentation/devicetree/bindings/hwmon/microchip,emc2305.yaml+8−0
@@ -54,6 +54,12 @@ patternProperties: · 53 unmodified lines
5454 The fan number used to determine the associated PWM channel.
5555 maxItems: 1
5656
57+ fan-shutdown-percent:
58+ description:
59+ PWM duty cycle in percent applied to the fan during shutdown.
60+ minimum: 0
61+ maximum: 100
62+
5763 required:
5864 - reg
5965
@@ -80,12 +86,14 @@ examples: · 20 unmodified lines
8086 fan@0 {
8187 reg = <0x0>;
8288 pwms = <&fan_controller 26000 PWM_POLARITY_INVERTED 1>;
89+ fan-shutdown-percent = <100>;
8390 #cooling-cells = <2>;
8491 };
8592
8693 fan@1 {
8794 reg = <0x1>;
8895 pwms = <&fan_controller 26000 0 1>;
96+ fan-shutdown-percent = <50>;
8997 #cooling-cells = <2>;
9098 };
9199
Documentation/devicetree/bindings/hwmon/nsa320-mcu.txt+0−20
@@ -1,20 +0,0 @@
1−Bindings for the fan / temperature monitor microcontroller used on
2−the Zyxel NSA 320 and several subsequent models.
3−
4−Required properties:
5−- compatible : "zyxel,nsa320-mcu"
6−- data-gpios : The GPIO pin connected to the data line on the MCU
7−- clk-gpios : The GPIO pin connected to the clock line on the MCU
8−- act-gpios : The GPIO pin connected to the active line on the MCU
9−
10−Example:
11−
12− hwmon {
13− compatible = "zyxel,nsa320-mcu";
14− pinctrl-0 = <&pmx_mcu_data &pmx_mcu_clk &pmx_mcu_act>;
15− pinctrl-names = "default";
16−
17− data-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
18− clk-gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
19− act-gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
20− };
Documentation/devicetree/bindings/hwmon/pmbus/adi,max20830.yaml+66−0
@@ -0,0 +1,66 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/hwmon/pmbus/adi,max20830.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Analog Devices MAX20830 Step-Down Switching Regulator with PMBus
8+
9+maintainers:
10+ - Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
11+
12+description: |
13+ The MAX20830 is a fully integrated step-down DC-DC switching regulator with
14+ PMBus interface. It provides 2.7V to 16V input, 0.4V to 5.8V adjustable
15+ output, and up to 30A output current. It allows monitoring of input/output
16+ voltage, output current and temperature through the PMBus serial interface.
17+ Datasheet:
18+ https://www.analog.com/en/products/max20830.html
19+
20+allOf:
21+ - $ref: /schemas/regulator/regulator.yaml#
22+
23+properties:
24+ compatible:
25+ const: adi,max20830
26+
27+ reg:
28+ maxItems: 1
29+
30+ vddh-supply:
31+ description:
32+ Phandle to the regulator that provides the VDDH power supply.
33+
34+ avdd-supply:
35+ description:
36+ Phandle to the regulator that provides the AVDD power supply.
37+
38+ ldoin-supply:
39+ description:
40+ Optional 2.5V to 5.5V LDO input supply.
41+
42+ pwr-good-gpios:
43+ description:
44+ GPIO connected to the power-good status output pin.
45+ maxItems: 1
46+
47+required:
48+ - compatible
49+ - reg
50+ - vddh-supply
51+
52+unevaluatedProperties: false
53+
54+examples:
55+ - |
56+ i2c {
57+ #address-cells = <1>;
58+ #size-cells = <0>;
59+
60+ regulator@30 {
61+ compatible = "adi,max20830";
62+ reg = <0x30>;
63+ vddh-supply = <&vddh>;
64+ };
65+ };
66+...
Documentation/devicetree/bindings/hwmon/pmbus/adi,max20860a.yaml+45−0
@@ -0,0 +1,45 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/hwmon/pmbus/adi,max20860a.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Analog Devices MAX20860A Step-Down Converter
8+
9+maintainers:
10+ - Sanman Pradhan <psanman@juniper.net>
11+
12+description: |
13+ The MAX20860A is a fully integrated step-down DC-DC switching regulator
14+ with PMBus interface for monitoring input/output voltage, output current
15+ and temperature.
16+
17+ Datasheet: https://www.analog.com/en/products/max20860a.html
18+
19+allOf:
20+ - $ref: /schemas/regulator/regulator.yaml#
21+
22+properties:
23+ compatible:
24+ const: adi,max20860a
25+
26+ reg:
27+ maxItems: 1
28+
29+required:
30+ - compatible
31+ - reg
32+
33+unevaluatedProperties: false
34+
35+examples:
36+ - |
37+ i2c {
38+ #address-cells = <1>;
39+ #size-cells = <0>;
40+
41+ regulator@40 {
42+ compatible = "adi,max20860a";
43+ reg = <0x40>;
44+ };
45+ };
Documentation/devicetree/bindings/hwmon/pmbus/infineon,xdp720.yaml+18−10
@@ -5,23 +5,31 @@ · 4 unmodified lines
55 $id: http://devicetree.org/schemas/hwmon/pmbus/infineon,xdp720.yaml#
66 $schema: http://devicetree.org/meta-schemas/core.yaml#
77
8−title: Infineon XDP720 Digital eFuse Controller
8+title: Infineon XDP720 / XDP730 Digital eFuse Controllers
99
1010 maintainers:
1111 - Ashish Yadav <ashish.yadav@infineon.com>
1212
1313 description: |
14− The XDP720 is an eFuse with integrated current sensor and digital
15− controller. It provides accurate system telemetry (V, I, P, T) and
16− reports analog current at the IMON pin for post-processing.
14+ The XDP720 and XDP730 are PMBus-compliant digital eFuse controllers
15+ with an integrated current sensor. They provide accurate system
16+ telemetry (V, I, P, T) and report analog current at the IMON pin for
17+ post-processing.
1718
18− Datasheet:
19− https://www.infineon.com/assets/row/public/documents/24/49/infineon-xdp720-001-datasheet-en.pdf
19+ Both parts share the same PMBus register map and direct-format
20+ coefficients; they differ in the GIMON gain step exposed via the
21+ TELEMETRY_AVG register (bit 10) and in the VDD_VIN pin number
22+ (XDP720: pin 9, XDP730: pin 20).
23+
24+ Datasheets:
25+ - XDP720: https://www.infineon.com/assets/row/public/documents/24/49/infineon-xdp720-001-datasheet-en.pdf
26+ - XDP730: https://www.infineon.com/assets/row/public/documents/24/49/infineon-xdp730-001-datasheet-en.pdf
2027
2128 properties:
2229 compatible:
2330 enum:
2431 - infineon,xdp720
32+ - infineon,xdp730
2533
2634 reg:
2735 maxItems: 1
@@ -33,9 +41,9 @@ properties: · 5 unmodified lines
3341
3442 vdd-vin-supply:
3543 description:
36− Supply for the VDD_VIN pin (pin 9), the IC controller power supply.
37− Typically connected to the input bus (VIN) through a 100 ohm / 100 nF
38− RC filter.
44+ Supply for the VDD_VIN pin (XDP720 pin 9, XDP730 pin 20), the IC
45+ controller power supply. Typically connected to the input bus
46+ (VIN) through a 100 ohm / 100 nF RC filter.
3947
4048 required:
4149 - compatible
@@ -50,7 +58,7 @@ examples: · 8 unmodified lines
5058 #address-cells = <1>;
5159 #size-cells = <0>;
5260
53− hwmon@11 {
61+ efuse@11 {
5462 compatible = "infineon,xdp720";
5563 reg = <0x11>;
5664 vdd-vin-supply = <&vdd_vin>;
Documentation/devicetree/bindings/hwmon/pwm-fan.yaml+2−1
@@ -63,7 +63,8 @@ properties: · 62 unmodified lines
6363 description: The PWM that is used to control the fan.
6464 maxItems: 1
6565
66− "#cooling-cells": true
66+ "#cooling-cells":
67+ const: 2
6768
6869 required:
6970 - compatible
Documentation/devicetree/bindings/hwmon/zyxel,nsa320-mcu.yaml+54−0
@@ -0,0 +1,54 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/hwmon/zyxel,nsa320-mcu.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: ZyXEL NSA320 MCU
8+
9+maintainers:
10+ - Adam Baker <linux@baker-net.org.uk>
11+ - Guenter Roeck <linux@roeck-us.net>
12+
13+description:
14+ The ZyXEL NSA320 uses a dedicated microcontroller to manage system-critical
15+ functions like fan speed and power monitoring. It is connected to the SoC
16+ via a GPIO-based serial protocol.
17+
18+properties:
19+ compatible:
20+ const: zyxel,nsa320-mcu
21+
22+ data-gpios:
23+ maxItems: 1
24+ description: GPIO pin connected to the data line on the MCU.
25+
26+ clk-gpios:
27+ maxItems: 1
28+ description: GPIO pin connected to the clock line on the MCU.
29+
30+ act-gpios:
31+ maxItems: 1
32+ description: GPIO pin connected to the active line on the MCU.
33+
34+required:
35+ - compatible
36+ - data-gpios
37+ - clk-gpios
38+ - act-gpios
39+
40+additionalProperties: false
41+
42+examples:
43+ - |
44+ #include <dt-bindings/gpio/gpio.h>
45+
46+ hwmon {
47+ compatible = "zyxel,nsa320-mcu";
48+ pinctrl-0 = <&pmx_mcu_data &pmx_mcu_clk &pmx_mcu_act>;
49+ pinctrl-names = "default";
50+
51+ data-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
52+ clk-gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
53+ act-gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
54+ };
Documentation/devicetree/bindings/i2c/i2c-davinci.txt+0−43
@@ -1,43 +0,0 @@
1−* Texas Instruments Davinci/Keystone I2C
2−
3−This file provides information, what the device node for the
4−davinci/keystone i2c interface contains.
5−
6−Required properties:
7−- compatible: "ti,davinci-i2c" or "ti,keystone-i2c";
8−- reg : Offset and length of the register set for the device
9−- clocks: I2C functional clock phandle.
10− For 66AK2G this property should be set per binding,
11− Documentation/devicetree/bindings/clock/ti,sci-clk.yaml
12−
13−SoC-specific Required Properties:
14−
15−The following are mandatory properties for Keystone 2 66AK2G SoCs only:
16−
17−- power-domains: Should contain a phandle to a PM domain provider node
18− and an args specifier containing the I2C device id
19− value. This property is as per the binding,
20− Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
21−
22−Recommended properties :
23−- interrupts : standard interrupt property.
24−- clock-frequency : desired I2C bus clock frequency in Hz.
25−- ti,has-pfunc: boolean; if defined, it indicates that SoC supports PFUNC
26− registers. PFUNC registers allow to switch I2C pins to function as
27− GPIOs, so they can be toggled manually.
28−
29−Example (enbw_cmc board):
30− i2c@1c22000 {
31− compatible = "ti,davinci-i2c";
32− reg = <0x22000 0x1000>;
33− clock-frequency = <100000>;
34− interrupts = <15>;
35− interrupt-parent = <&intc>;
36− #address-cells = <1>;
37− #size-cells = <0>;
38−
39− dtt@48 {
40− compatible = "national,lm75";
41− reg = <0x48>;
42− };
43− };
Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml+1−0
@@ -40,6 +40,7 @@ properties: · 39 unmodified lines
4040
4141 i2c-parent:
4242 $ref: /schemas/types.yaml#/definitions/phandle-array
43+ minItems: 2
4344 items:
4445 maxItems: 1
4546 description:
Documentation/devicetree/bindings/i2c/i2c-mux-gpio.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: GPIO-based I2C Bus Mux
88
99 maintainers:
10− - Wolfram Sang <wsa@kernel.org>
10+ - Peter Korsgaard <peter.korsgaard@barco.com>
1111
1212 description: |
1313 This binding describes an I2C bus multiplexer that uses GPIOs to route the I2C signals.
Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Pinctrl-based I2C Bus Mux
88
99 maintainers:
10− - Wolfram Sang <wsa@kernel.org>
10+ - Thierry Reding <thierry.reding@kernel.org>
1111
1212 description: |
1313 This binding describes an I2C bus multiplexer that uses pin multiplexing to route the I2C
Documentation/devicetree/bindings/i2c/i2c-mux-reg.txt+0−74
@@ -1,74 +0,0 @@
1−Register-based I2C Bus Mux
2−
3−This binding describes an I2C bus multiplexer that uses a single register
4−to route the I2C signals.
5−
6−Required properties:
7−- compatible: i2c-mux-reg
8−- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
9− port is connected to.
10−* Standard I2C mux properties. See i2c-mux.yaml in this directory.
11−* I2C child bus nodes. See i2c-mux.yaml in this directory.
12−
13−Optional properties:
14−- reg: this pair of <offset size> specifies the register to control the mux.
15− The <offset size> depends on its parent node. It can be any memory-mapped
16− address. The size must be either 1, 2, or 4 bytes. If reg is omitted, the
17− resource of this device will be used.
18−- little-endian: The existence indicates the register is in little endian.
19−- big-endian: The existence indicates the register is in big endian.
20− If both little-endian and big-endian are omitted, the endianness of the
21− CPU will be used.
22−- write-only: The existence indicates the register is write-only.
23−- idle-state: value to set the muxer to when idle. When no value is
24− given, it defaults to the last value used.
25−
26−Whenever an access is made to a device on a child bus, the value set
27−in the relevant node's reg property will be output to the register.
28−
29−If an idle state is defined, using the idle-state (optional) property,
30−whenever an access is not being made to a device on a child bus, the
31−register will be set according to the idle value.
32−
33−If an idle state is not defined, the most recently used value will be
34−left programmed into the register.
35−
36−Example of a mux on PCIe card, the host is a powerpc SoC (big endian):
37−
38− i2c-mux {
39− /* the <offset size> depends on the address translation
40− * of the parent device. If omitted, device resource
41− * will be used instead. The size is to determine
42− * whether iowrite32, iowrite16, or iowrite8 will be used.
43− */
44− reg = <0x6028 0x4>;
45− little-endian; /* little endian register on PCIe */
46− compatible = "i2c-mux-reg";
47− #address-cells = <1>;
48− #size-cells = <0>;
49− i2c-parent = <&i2c1>;
50− i2c@0 {
51− reg = <0>;
52− #address-cells = <1>;
53− #size-cells = <0>;
54−
55− si5338: clock-generator@70 {
56− compatible = "silabs,si5338";
57− reg = <0x70>;
58− /* other stuff */
59− };
60− };
61−
62− i2c@1 {
63− /* data is written using iowrite32 */
64− reg = <1>;
65− #address-cells = <1>;
66− #size-cells = <0>;
67−
68− si5338: clock-generator@70 {
69− compatible = "silabs,si5338";
70− reg = <0x70>;
71− /* other stuff */
72− };
73− };
74− };
Documentation/devicetree/bindings/i2c/i2c-mux-reg.yaml+92−0
@@ -0,0 +1,92 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/i2c/i2c-mux-reg.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Register-based I2C Bus Mux
8+
9+maintainers:
10+ - Peter Rosin <peda@axentia.se>
11+
12+description: |
13+ This binding describes an I2C bus multiplexer that uses a single
14+ memory-mapped register to route the I2C signals.
15+
16+ Whenever an access is made to a device on a child bus, the value
17+ set in the relevant node's reg property is output to the register.
18+
19+ If an idle state is defined via the idle-state property, the
20+ register is set to that value whenever no access is being made.
21+ Otherwise the most recently used value is left programmed.
22+
23+allOf:
24+ - $ref: /schemas/i2c/i2c-mux.yaml#
25+
26+properties:
27+ compatible:
28+ const: i2c-mux-reg
29+
30+ reg:
31+ maxItems: 1
32+ description: |
33+ Offset and size of the register that selects the active child
34+ bus, relative to the parent node's address space. The size
35+ determines the access width and must be 1, 2, or 4 bytes. If
36+ omitted, the platform device's own memory resource is used
37+ instead.
38+
39+ i2c-parent:
40+ $ref: /schemas/types.yaml#/definitions/phandle
41+ description:
42+ Phandle of the I2C bus that this multiplexer's master-side port
43+ is connected to.
44+
45+ little-endian:
46+ type: boolean
47+ description: Register is accessed in little-endian byte order.
48+
49+ big-endian:
50+ type: boolean
51+ description: Register is accessed in big-endian byte order.
52+
53+ write-only:
54+ type: boolean
55+ description:
56+ Register is write-only; the driver must not read back the
57+ current selection.
58+
59+ idle-state:
60+ $ref: /schemas/types.yaml#/definitions/uint32
61+ description:
62+ Value to write to the register when no child bus is selected.
63+
64+required:
65+ - compatible
66+ - i2c-parent
67+
68+unevaluatedProperties: false
69+
70+examples:
71+ - |
72+ i2c-mux@6028 {
73+ compatible = "i2c-mux-reg";
74+ reg = <0x6028 0x4>;
75+ little-endian;
76+ #address-cells = <1>;
77+ #size-cells = <0>;
78+ i2c-parent = <&i2c1>;
79+
80+ i2c@0 {
81+ reg = <0>;
82+ #address-cells = <1>;
83+ #size-cells = <0>;
84+ };
85+
86+ i2c@1 {
87+ reg = <1>;
88+ #address-cells = <1>;
89+ #size-cells = <0>;
90+ };
91+ };
92+...
Documentation/devicetree/bindings/i2c/loongson,ls2x-i2c.yaml+4−0
@@ -16,6 +16,7 @@ properties: · 15 unmodified lines
1616 compatible:
1717 enum:
1818 - loongson,ls2k-i2c
19+ - loongson,ls2k0300-i2c
1920 - loongson,ls7a-i2c
2021
2122 reg:
@@ -24,6 +25,9 @@ properties: · 2 unmodified lines
2425 interrupts:
2526 maxItems: 1
2627
28+ clocks:
29+ maxItems: 1
30+
2731 required:
2832 - compatible
2933 - reg
Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml+3−0
@@ -37,6 +37,9 @@ properties: · 36 unmodified lines
3737 modes are supported, possible values are 100000 and 400000.
3838 enum: [100000, 400000]
3939
40+ resets:
41+ maxItems: 1
42+
4043 required:
4144 - compatible
4245 - reg
Documentation/devicetree/bindings/i2c/opencores,i2c-ocores.yaml+4−4
@@ -95,8 +95,8 @@ examples: · 94 unmodified lines
9595 interrupts = <10>;
9696 opencores,ip-clock-frequency = <20000000>;
9797
98− reg-shift = <0>; /* 8 bit registers */
99− reg-io-width = <1>; /* 8 bit read/write */
98+ reg-shift = <0>; /* 8 bit registers */
99+ reg-io-width = <1>; /* 8 bit read/write */
100100 };
101101
102102 i2c@b0000000 {
@@ -108,7 +108,7 @@ examples: · 5 unmodified lines
108108 clocks = <&osc>;
109109 clock-frequency = <400000>; /* i2c bus frequency 400 KHz */
110110
111− reg-shift = <0>; /* 8 bit registers */
112− reg-io-width = <1>; /* 8 bit read/write */
111+ reg-shift = <0>; /* 8 bit registers */
112+ reg-io-width = <1>; /* 8 bit read/write */
113113 };
114114 ...
Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml+4−0
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
2626
2727 - items:
2828 - enum:
29+ - qcom,glymur-cci
2930 - qcom,kaanapali-cci
3031 - qcom,milos-cci
3132 - qcom,qcm2290-cci
@@ -35,6 +36,7 @@ properties: · 3 unmodified lines
3536 - qcom,sc8280xp-cci
3637 - qcom,sdm670-cci
3738 - qcom,sdm845-cci
39+ - qcom,shikra-cci
3840 - qcom,sm6150-cci
3941 - qcom,sm6350-cci
4042 - qcom,sm8250-cci
@@ -134,9 +136,11 @@ allOf: · 93 unmodified lines
134136 compatible:
135137 contains:
136138 enum:
139+ - qcom,glymur-cci
137140 - qcom,kaanapali-cci
138141 - qcom,qcm2290-cci
139142 - qcom,qcs8300-cci
143+ - qcom,shikra-cci
140144 - qcom,sm8750-cci
141145 then:
142146 properties:
Documentation/devicetree/bindings/i2c/ti,davinci-i2c.yaml+70−0
@@ -0,0 +1,70 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/i2c/ti,davinci-i2c.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Texas Instruments DaVinci/Keystone I2C
8+
9+maintainers:
10+ - Chaitanya Sabnis <chaitanya.msabnis@gmail.com>
11+
12+allOf:
13+ - $ref: /schemas/i2c/i2c-controller.yaml#
14+ - if:
15+ properties:
16+ compatible:
17+ contains:
18+ const: ti,keystone-i2c
19+ then:
20+ required:
21+ - power-domains
22+
23+properties:
24+ compatible:
25+ enum:
26+ - ti,davinci-i2c
27+ - ti,keystone-i2c
28+
29+ reg:
30+ maxItems: 1
31+
32+ interrupts:
33+ maxItems: 1
34+
35+ clocks:
36+ maxItems: 1
37+
38+ power-domains:
39+ maxItems: 1
40+
41+ ti,has-pfunc:
42+ description:
43+ Indicates that the SoC supports PFUNC registers, allowing I2C pins
44+ to function as GPIOs for manual toggling.
45+ type: boolean
46+
47+required:
48+ - compatible
49+ - reg
50+ - interrupts
51+ - clocks
52+
53+unevaluatedProperties: false
54+
55+examples:
56+ - |
57+ i2c@1c22000 {
58+ compatible = "ti,davinci-i2c";
59+ reg = <0x01c22000 0x1000>;
60+ clocks = <&i2c_clk>;
61+ clock-frequency = <100000>;
62+ interrupts = <15>;
63+ #address-cells = <1>;
64+ #size-cells = <0>;
65+
66+ sensor@48 {
67+ compatible = "national,lm75";
68+ reg = <0x48>;
69+ };
70+ };
Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml+23−4
@@ -9,9 +9,6 @@ title: MIPI I3C HCI · 8 unmodified lines
99 maintainers:
1010 - Nicolas Pitre <npitre@baylibre.com>
1111
12−allOf:
13− - $ref: /schemas/i3c/i3c.yaml#
14−
1512 description: |
1613 MIPI I3C Host Controller Interface
1714
@@ -28,9 +25,17 @@ description: | · 10 unmodified lines
2825
2926 properties:
3027 compatible:
31− const: mipi-i3c-hci
28+ enum:
29+ - mipi-i3c-hci
30+ - microchip,sama7d65-i3c-hci
3231 reg:
3332 maxItems: 1
33+
34+ clocks:
35+ items:
36+ - description: Peripheral bus clock
37+ - description: System Generic clock
38+
3439 interrupts:
3540 maxItems: 1
3641
@@ -39,6 +44,20 @@ required: · 2 unmodified lines
3944 - reg
4045 - interrupts
4146
47+allOf:
48+ - $ref: /schemas/i3c/i3c.yaml#
49+ - if:
50+ properties:
51+ compatible:
52+ contains:
53+ const: microchip,sama7d65-i3c-hci
54+ then:
55+ required:
56+ - clocks
57+ else:
58+ properties:
59+ clocks: false
60+
4261 unevaluatedProperties: false
4362
4463 examples:
Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml+54−2
@@ -18,7 +18,11 @@ description: | · 17 unmodified lines
1818 service a wide variety of precision, wide bandwidth data acquisition
1919 applications.
2020
21+ The AD4880 is a dual-channel variant with two independent ADC channels,
22+ each with its own SPI configuration interface.
23+
2124 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4080.pdf
25+ https://www.analog.com/media/en/technical-documentation/data-sheets/ad4880.pdf
2226
2327 $ref: /schemas/spi/spi-peripheral-props.yaml#
2428
@@ -34,9 +38,16 @@ properties: · 9 unmodified lines
3438 - adi,ad4086
3539 - adi,ad4087
3640 - adi,ad4088
41+ - adi,ad4880
42+ - adi,ad4884
3743
3844 reg:
39− maxItems: 1
45+ minItems: 1
46+ maxItems: 2
47+ description:
48+ SPI chip select(s). For single-channel devices, one chip select.
49+ For multi-channel devices like AD4880, two chip selects are required
50+ as each channel has its own SPI configuration interface.
4051
4152 spi-max-frequency:
4253 description: Configuration of the SPI bus.
@@ -60,7 +71,10 @@ properties: · 17 unmodified lines
6071 vrefin-supply: true
6172
6273 io-backends:
63− maxItems: 1
74+ minItems: 1
75+ items:
76+ - description: Backend for channel A (primary)
77+ - description: Backend for channel B (secondary)
6478
6579 adi,lvds-cnv-enable:
6680 description: Enable the LVDS signal type on the CNV pin. Default is CMOS.
@@ -81,6 +95,27 @@ required: · 14 unmodified lines
8195 - vdd33-supply
8296 - vrefin-supply
8397
98+allOf:
99+ - if:
100+ properties:
101+ compatible:
102+ contains:
103+ enum:
104+ - adi,ad4880
105+ - adi,ad4884
106+ then:
107+ properties:
108+ reg:
109+ minItems: 2
110+ io-backends:
111+ minItems: 2
112+ else:
113+ properties:
114+ reg:
115+ maxItems: 1
116+ io-backends:
117+ maxItems: 1
118+
84119 additionalProperties: false
85120
86121 examples:
@@ -101,4 +136,21 @@ examples: · 14 unmodified lines
101136 io-backends = <&iio_backend>;
102137 };
103138 };
139+ - |
140+ spi {
141+ #address-cells = <1>;
142+ #size-cells = <0>;
143+
144+ adc@0 {
145+ compatible = "adi,ad4880";
146+ reg = <0>, <1>;
147+ spi-max-frequency = <10000000>;
148+ vdd33-supply = <&vdd33>;
149+ vddldo-supply = <&vddldo>;
150+ vrefin-supply = <&vrefin>;
151+ clocks = <&cnv>;
152+ clock-names = "cnv";
153+ io-backends = <&iio_backend_cha>, <&iio_backend_chb>;
154+ };
155+ };
104156 ...
Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml+17−2
@@ -5,19 +5,30 @@ · 4 unmodified lines
55 $id: http://devicetree.org/schemas/iio/adc/adi,ad4130.yaml#
66 $schema: http://devicetree.org/meta-schemas/core.yaml#
77
8−title: Analog Devices AD4130 ADC device driver
8+title: Analog Devices AD4130 family ADCs
99
1010 maintainers:
1111 - Cosmin Tanislav <cosmin.tanislav@analog.com>
1212
1313 description: |
14− Bindings for the Analog Devices AD4130 ADC. Datasheet can be found here:
14+ Bindings for the Analog Devices AD4130 family ADCs.
15+ Datasheets can be found here:
16+ https://www.analog.com/media/en/technical-documentation/data-sheets/AD4129-4.pdf
17+ https://www.analog.com/media/en/technical-documentation/data-sheets/AD4129-8.pdf
18+ https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-4.pdf
1519 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-8.pdf
20+ https://www.analog.com/media/en/technical-documentation/data-sheets/AD4131-4.pdf
21+ https://www.analog.com/media/en/technical-documentation/data-sheets/AD4131-8.pdf
1622
1723 properties:
1824 compatible:
1925 enum:
26+ - adi,ad4129-4
27+ - adi,ad4129-8
28+ - adi,ad4130-4
2029 - adi,ad4130
30+ - adi,ad4131-4
31+ - adi,ad4131-8
2132
2233 reg:
2334 maxItems: 1
@@ -32,6 +43,10 @@ properties: · 8 unmodified lines
3243
3344 interrupts:
3445 maxItems: 1
46+ description: |
47+ Data Ready / FIFO interrupt. For devices with FIFO support, the
48+ interrupt polarity specified here is inverted when the device enters
49+ FIFO mode, and normal for data ready.
3550
3651 interrupt-names:
3752 description: |
Documentation/devicetree/bindings/iio/adc/adi,ad4691.yaml+180−0
@@ -0,0 +1,180 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/iio/adc/adi,ad4691.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Analog Devices AD4691 Family Multichannel SAR ADCs
8+
9+maintainers:
10+ - Radu Sabau <radu.sabau@analog.com>
11+
12+description: |
13+ The AD4691 family are high-speed, low-power, multichannel successive
14+ approximation register (SAR) analog-to-digital converters (ADCs) with
15+ an SPI-compatible serial interface. The ADC supports CNV Burst Mode,
16+ where an external PWM drives the CNV pin, and Manual Mode, where CNV
17+ is directly tied to the SPI chip-select.
18+
19+ Datasheets:
20+ * https://www.analog.com/en/products/ad4691.html
21+ * https://www.analog.com/en/products/ad4692.html
22+ * https://www.analog.com/en/products/ad4693.html
23+ * https://www.analog.com/en/products/ad4694.html
24+
25+$ref: /schemas/spi/spi-peripheral-props.yaml#
26+
27+properties:
28+ compatible:
29+ enum:
30+ - adi,ad4691
31+ - adi,ad4692
32+ - adi,ad4693
33+ - adi,ad4694
34+
35+ reg:
36+ maxItems: 1
37+
38+ spi-max-frequency:
39+ maximum: 40000000
40+
41+ spi-cpol: true
42+ spi-cpha: true
43+
44+ avdd-supply:
45+ description: Analog power supply (4.5V to 5.5V).
46+
47+ vdd-supply:
48+ description:
49+ External 1.8V digital core supply. When present, the internal LDO is
50+ disabled (LDO_EN = 0). Mutually exclusive with ldo-in-supply.
51+
52+ ldo-in-supply:
53+ description:
54+ LDO input supply (2.4V to 5.5V). When present and vdd-supply is absent,
55+ the internal LDO generates 1.8V VDD from this input (LDO_EN = 1).
56+ Mutually exclusive with vdd-supply.
57+
58+ vio-supply:
59+ description: I/O voltage supply (1.71V to 1.89V or VDD).
60+
61+ ref-supply:
62+ description: External reference voltage supply (2.4V to 5.25V).
63+
64+ refin-supply:
65+ description: Internal reference buffer input supply.
66+
67+ reset-gpios:
68+ description:
69+ GPIO line controlling the hardware reset pin (active-low).
70+ maxItems: 1
71+
72+ pwms:
73+ description:
74+ PWM connected to the CNV pin. When present, selects CNV Burst Mode where
75+ the PWM drives the conversion rate. When absent, Manual Mode is used
76+ (CNV tied to SPI CS).
77+ maxItems: 1
78+
79+ interrupts:
80+ description:
81+ Interrupt lines connected to the ADC GP pins. Each GP pin can be
82+ physically wired to an interrupt-capable input on the SoC.
83+ maxItems: 4
84+
85+ interrupt-names:
86+ description: Names of the interrupt lines, matching the GP pin names.
87+ minItems: 1
88+ maxItems: 4
89+ items:
90+ enum:
91+ - gp0
92+ - gp1
93+ - gp2
94+ - gp3
95+
96+ gpio-controller: true
97+
98+ '#gpio-cells':
99+ const: 2
100+
101+ '#trigger-source-cells':
102+ description:
103+ This node can act as a trigger source. The single cell in a consumer
104+ reference specifies the GP pin number (0-3) used as the trigger output.
105+ const: 1
106+
107+required:
108+ - compatible
109+ - reg
110+ - avdd-supply
111+ - vio-supply
112+
113+allOf:
114+ # vdd-supply and ldo-in-supply are mutually exclusive, one is required:
115+ # either an external 1.8V VDD is provided or the internal LDO is fed from
116+ # ldo-in-supply to generate VDD.
117+ - oneOf:
118+ - required:
119+ - vdd-supply
120+ - required:
121+ - ldo-in-supply
122+ # ref-supply and refin-supply are mutually exclusive, one is required
123+ - oneOf:
124+ - required:
125+ - ref-supply
126+ - required:
127+ - refin-supply
128+
129+unevaluatedProperties: false
130+
131+examples:
132+ - |
133+ #include <dt-bindings/gpio/gpio.h>
134+ /* AD4692 in CNV Burst Mode with SPI offload */
135+ spi {
136+ #address-cells = <1>;
137+ #size-cells = <0>;
138+
139+ adc@0 {
140+ compatible = "adi,ad4692";
141+ reg = <0>;
142+ spi-cpol;
143+ spi-cpha;
144+ spi-max-frequency = <40000000>;
145+
146+ avdd-supply = <&avdd_supply>;
147+ ldo-in-supply = <&avdd_supply>;
148+ vio-supply = <&vio_supply>;
149+ ref-supply = <&ref_5v>;
150+
151+ reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
152+
153+ pwms = <&pwm_gen 0 0>;
154+
155+ #trigger-source-cells = <1>;
156+ };
157+ };
158+
159+ - |
160+ #include <dt-bindings/gpio/gpio.h>
161+ /* AD4692 in Manual Mode (CNV tied to SPI CS) */
162+ spi {
163+ #address-cells = <1>;
164+ #size-cells = <0>;
165+
166+ adc@0 {
167+ compatible = "adi,ad4692";
168+ reg = <0>;
169+ spi-cpol;
170+ spi-cpha;
171+ spi-max-frequency = <31250000>;
172+
173+ avdd-supply = <&avdd_supply>;
174+ ldo-in-supply = <&avdd_supply>;
175+ vio-supply = <&vio_supply>;
176+ refin-supply = <&refin_supply>;
177+
178+ reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
179+ };
180+ };
Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml+31−1
@@ -14,6 +14,7 @@ properties: · 13 unmodified lines
1414 oneOf:
1515 - enum:
1616 - allwinner,sun20i-d1-gpadc
17+ - allwinner,sun55i-a523-gpadc
1718 - items:
1819 - enum:
1920 - allwinner,sun50i-h616-gpadc
@@ -29,7 +30,12 @@ properties: · 9 unmodified lines
2930 const: 0
3031
3132 clocks:
32− maxItems: 1
33+ minItems: 1
34+ maxItems: 2
35+
36+ clock-names:
37+ minItems: 1
38+ maxItems: 2
3339
3440 interrupts:
3541 maxItems: 1
@@ -40,6 +46,30 @@ properties: · 4 unmodified lines
4046 resets:
4147 maxItems: 1
4248
49+allOf:
50+ - if:
51+ properties:
52+ compatible:
53+ enum:
54+ - allwinner,sun55i-a523-gpadc
55+ then:
56+ properties:
57+ clocks:
58+ items:
59+ - description: Bus clock
60+ - description: Module clock
61+ clock-names:
62+ items:
63+ - const: bus
64+ - const: mod
65+ required:
66+ - clock-names
67+ else:
68+ properties:
69+ clocks:
70+ maxItems: 1
71+ clock-names: false
72+
4373 patternProperties:
4474 "^channel@[0-9a-f]+$":
4575 $ref: adc.yaml
Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml+10−15
@@ -10,14 +10,9 @@ maintainers: · 9 unmodified lines
1010 - Andreas Klinger <ak@it-klinger.de>
1111
1212 description: |
13− Bit-banging driver using two GPIOs:
14− - sck-gpio gives a clock to the sensor with 24 cycles for data retrieval
15− and up to 3 cycles for selection of the input channel and gain for the
16− next measurement
17− - dout-gpio is the sensor data the sensor responds to the clock
18−
19− Specifications about the driver can be found at:
20− http://www.aviaic.com/ENProducts.aspx
13+ The HX711 is a 24-bit ADC with selectable gain (32/64/128) and two
14+ differential input channels. Channel A supports gain 64 and 128;
15+ channel B supports gain 32.
2116
2217 properties:
2318 compatible:
@@ -26,23 +21,23 @@ properties: · 2 unmodified lines
2621
2722 sck-gpios:
2823 description:
29− Definition of the GPIO for the clock (output). In the datasheet it is
30− named PD_SCK
24+ GPIO for the clock output (PD_SCK in the datasheet).
3125 maxItems: 1
3226
3327 dout-gpios:
3428 description:
35− Definition of the GPIO for the data-out sent by the sensor in
36− response to the clock (input).
37− See Documentation/devicetree/bindings/gpio/gpio.txt for information
38− on how to specify a consumer gpio.
29+ GPIO for the data output from the sensor (DOUT in the datasheet).
3930 maxItems: 1
4031
4132 avdd-supply:
4233 description:
43− Definition of the regulator used as analog supply
34+ Analog supply voltage (AVDD).
4435
4536 clock-frequency:
37+ description:
38+ Controls the SCK bit-bang timing. The value is used to derive the
39+ delay between SCK edges; keep the SCK high time below 60 us to
40+ avoid triggering chip power-down mode.
4641 minimum: 20000
4742 maximum: 2500000
4843 default: 400000
Documentation/devicetree/bindings/iio/adc/mediatek,mt6359-auxadc.yaml+11−6
@@ -18,12 +18,17 @@ description: · 17 unmodified lines
1818
1919 properties:
2020 compatible:
21− enum:
22− - mediatek,mt6357-auxadc
23− - mediatek,mt6358-auxadc
24− - mediatek,mt6359-auxadc
25− - mediatek,mt6363-auxadc
26− - mediatek,mt6373-auxadc
21+ oneOf:
22+ - enum:
23+ - mediatek,mt6357-auxadc
24+ - mediatek,mt6358-auxadc
25+ - mediatek,mt6359-auxadc
26+ - mediatek,mt6363-auxadc
27+ - mediatek,mt6373-auxadc
28+ - items:
29+ - enum:
30+ - mediatek,mt6365-auxadc
31+ - const: mediatek,mt6359-auxadc
2732
2833 "#io-channel-cells":
2934 const: 1
Documentation/devicetree/bindings/iio/adc/qcom,pm8018-adc.yaml+15−0
@@ -78,6 +78,10 @@ patternProperties: · 77 unmodified lines
7878 reg:
7979 maxItems: 1
8080
81+ label:
82+ description: |
83+ Unique name to identify which channel this is.
84+
8185 qcom,decimation:
8286 $ref: /schemas/types.yaml#/definitions/uint32
8387 description: |
@@ -130,36 +134,47 @@ examples: · 46 unmodified lines
130134
131135 vcoin: adc-channel@0 {
132136 reg = <0x00 0x00>;
137+ label = "vcoin";
133138 };
134139 vbat: adc-channel@1 {
135140 reg = <0x00 0x01>;
141+ label = "vbat";
136142 };
137143 dcin: adc-channel@2 {
138144 reg = <0x00 0x02>;
145+ label = "dcin";
139146 };
140147 ichg: adc-channel@3 {
141148 reg = <0x00 0x03>;
149+ label = "ichg";
142150 };
143151 vph_pwr: adc-channel@4 {
144152 reg = <0x00 0x04>;
153+ label = "vph_pwr";
145154 };
146155 usb_vbus: adc-channel@a {
147156 reg = <0x00 0x0a>;
157+ label = "usb_vbus";
148158 };
149159 die_temp: adc-channel@b {
150160 reg = <0x00 0x0b>;
161+ label = "die_temp";
151162 };
152163 ref_625mv: adc-channel@c {
153164 reg = <0x00 0x0c>;
165+ label = "ref_625mv";
154166 };
155167 ref_1250mv: adc-channel@d {
156168 reg = <0x00 0x0d>;
169+ label = "ref_1250mv";
157170 };
158171 ref_325mv: adc-channel@e {
159172 reg = <0x00 0x0e>;
173+ label = "ref_325mv";
160174 };
161175 ref_muxoff: adc-channel@f {
162176 reg = <0x00 0x0f>;
177+ label = "ref_muxoff";
163178 };
164179 };
165180 };
Documentation/devicetree/bindings/iio/adc/st,spear600-adc.yaml+1−1
@@ -65,5 +65,5 @@ examples: · 64 unmodified lines
6565 interrupt-parent = <&vic1>;
6666 interrupts = <6>;
6767 sampling-frequency = <5000000>;
68− vref-external = <2500>; /* 2.5V VRef */
68+ vref-external = <2500>; /* 2.5V VRef */
6969 };
Documentation/devicetree/bindings/iio/chemical/sensirion,scd30.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Sensirion SCD30 carbon dioxide sensor
88
99 maintainers:
10− - Tomasz Duszynski <tomasz.duszynski@octakon.com>
10+ - Maxwell Doose <m32285159@gmail.com>
1111
1212 description: |
1313 Air quality sensor capable of measuring co2 concentration, temperature
Documentation/devicetree/bindings/iio/dac/adi,ad5706r.yaml+105−0
@@ -0,0 +1,105 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/iio/dac/adi,ad5706r.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Analog Devices AD5706R 4-Channel Current Output DAC
8+
9+maintainers:
10+ - Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
11+
12+description: |
13+ The AD5706R is a 4-channel, 16-bit resolution, current output
14+ digital-to-analog converter (DAC) with programmable output current
15+ ranges (50mA, 150mA, 200mA, 300mA), an integrated 2.5V voltage
16+ reference, and load DAC, A/B toggle, and dither functions.
17+
18+ Datasheet:
19+ https://www.analog.com/en/products/ad5706r.html
20+
21+properties:
22+ compatible:
23+ enum:
24+ - adi,ad5706r
25+
26+ reg:
27+ maxItems: 1
28+
29+ avdd-supply:
30+ description: Analog power supply (2.9V to 3.6V).
31+
32+ iovdd-supply:
33+ description: Logic power supply (1.14V to 1.89V).
34+
35+ pvdd0-supply:
36+ description: Power supply for IDAC0 channel (1.65V to AVDD).
37+
38+ pvdd1-supply:
39+ description: Power supply for IDAC1 channel (1.65V to AVDD).
40+
41+ pvdd2-supply:
42+ description: Power supply for IDAC2 channel (1.65V to AVDD).
43+
44+ pvdd3-supply:
45+ description: Power supply for IDAC3 channel (1.65V to AVDD).
46+
47+ vref-supply:
48+ description:
49+ Optional external 2.5V voltage reference. If not provided, the
50+ internal 2.5V reference is used.
51+
52+ pwms:
53+ maxItems: 1
54+ description:
55+ Optional PWM connected to the LDAC/TGP/DCK pin for hardware
56+ triggered DAC updates, toggle, or dither clock generation.
57+
58+ reset-gpios:
59+ maxItems: 1
60+ description:
61+ GPIO connected to the active low RESET pin. If not provided,
62+ software reset is used.
63+
64+ enable-gpios:
65+ maxItems: 1
66+ description:
67+ GPIO connected to the active low OUT_EN pin. Controls whether
68+ the current outputs are enabled or in high-Z/ground state.
69+
70+required:
71+ - compatible
72+ - reg
73+ - avdd-supply
74+ - iovdd-supply
75+
76+allOf:
77+ - $ref: /schemas/spi/spi-peripheral-props.yaml#
78+
79+unevaluatedProperties: false
80+
81+examples:
82+ - |
83+ #include <dt-bindings/gpio/gpio.h>
84+
85+ spi {
86+ #address-cells = <1>;
87+ #size-cells = <0>;
88+
89+ dac@0 {
90+ compatible = "adi,ad5706r";
91+ reg = <0>;
92+ avdd-supply = <&avdd>;
93+ iovdd-supply = <&iovdd>;
94+ pvdd0-supply = <&pvdd>;
95+ pvdd1-supply = <&pvdd>;
96+ pvdd2-supply = <&pvdd>;
97+ pvdd3-supply = <&pvdd>;
98+ vref-supply = <&vref>;
99+ spi-max-frequency = <50000000>;
100+ pwms = <&pwm0 0 1000000 0>;
101+ reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
102+ enable-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
103+ };
104+ };
105+...
Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml+18−18
@@ -161,8 +161,8 @@ patternProperties: · 160 unmodified lines
161161 properties:
162162 reg:
163163 description: The channel number.
164− minItems: 1
165− maxItems: 8
164+ minimum: 0
165+ maximum: 7
166166
167167 label:
168168 description: Unique name to identify which channel this is.
@@ -280,23 +280,23 @@ examples: · 111 unmodified lines
280280
281281 #address-cells = <1>;
282282 #size-cells = <0>;
283− dac@0 {
284− compatible = "microchip,mcp47feb02";
285− reg = <0>;
286− vdd-supply = <&vdac_vdd>;
287− vref-supply = <&vref_reg>;
283+ dac@60 {
284+ compatible = "microchip,mcp47feb02";
285+ reg = <0x60>;
286+ vdd-supply = <&vdac_vdd>;
287+ vref-supply = <&vref_reg>;
288288
289− #address-cells = <1>;
290− #size-cells = <0>;
291− channel@0 {
292− reg = <0>;
293− label = "Adjustable_voltage_ch0";
294− };
289+ #address-cells = <1>;
290+ #size-cells = <0>;
291+ channel@0 {
292+ reg = <0>;
293+ label = "Adjustable_voltage_ch0";
294+ };
295295
296− channel@1 {
297− reg = <0x1>;
298− label = "Adjustable_voltage_ch1";
299− };
300− };
296+ channel@1 {
297+ reg = <0x1>;
298+ label = "Adjustable_voltage_ch1";
299+ };
300+ };
301301 };
302302 ...
Documentation/devicetree/bindings/iio/gyroscope/bosch,bmg160.yaml+6−0
@@ -26,6 +26,9 @@ properties: · 25 unmodified lines
2626 vdd-supply: true
2727 vddio-supply: true
2828
29+ mount-matrix:
30+ description: an optional 3x3 mounting rotation matrix.
31+
2932 spi-max-frequency:
3033 maximum: 10000000
3134
@@ -56,6 +59,9 @@ examples: · 24 unmodified lines
5659 reg = <0x69>;
5760 interrupt-parent = <&gpio6>;
5861 interrupts = <18 IRQ_TYPE_EDGE_RISING>;
62+ mount-matrix = "0", "1", "0",
63+ "1", "0", "0",
64+ "0", "0", "1";
5965 };
6066 };
6167 ...
Documentation/devicetree/bindings/iio/light/brcm,apds9999.yaml+54−0
@@ -0,0 +1,54 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/iio/light/brcm,apds9999.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+title: Broadcom APDS-9999 Digital Proximity and RGB Sensor
7+
8+maintainers:
9+ - Jose A. Perez de Azpillaga <azpijr@gmail.com>
10+
11+description: |
12+ Broadcom APDS-9999 is a digital proximity and RGB sensor with
13+ ambient light sensing (ALS) capability. The device uses individual
14+ R, G, B, and IR channels plus a Vertical Cavity Surface Emitting
15+ Laser (VCSEL) for proximity detection.
16+
17+ Datasheet: https://docs.broadcom.com/docs/APDS-9999-DS
18+
19+properties:
20+ compatible:
21+ enum:
22+ - brcm,apds9999
23+
24+ reg:
25+ maxItems: 1
26+
27+ vdd-supply: true
28+
29+ vcsel-supply:
30+ description: VCSEL power supply (VVCSEL pin)
31+
32+ interrupts:
33+ maxItems: 1
34+
35+additionalProperties: false
36+
37+required:
38+ - compatible
39+ - reg
40+ - vdd-supply
41+
42+examples:
43+ - |
44+ i2c {
45+ #address-cells = <1>;
46+ #size-cells = <0>;
47+
48+ light-sensor@52 {
49+ compatible = "brcm,apds9999";
50+ reg = <0x52>;
51+ vdd-supply = <&vdd_reg>;
52+ vcsel-supply = <&vcsel_reg>;
53+ };
54+ };
Documentation/devicetree/bindings/iio/light/tsl2772.yaml+2−0
@@ -26,6 +26,8 @@ properties: · 25 unmodified lines
2626 - amstaos,tmd2672
2727 - amstaos,tsl2772
2828 - amstaos,tmd2772
29+ - avago,apds9900
30+ - avago,apds9901
2931 - avago,apds9930
3032
3133 reg:
Documentation/devicetree/bindings/iio/light/vishay,veml6030.yaml+4−1
@@ -4,7 +4,7 @@ · 3 unmodified lines
44 $id: http://devicetree.org/schemas/iio/light/vishay,veml6030.yaml#
55 $schema: http://devicetree.org/meta-schemas/core.yaml#
66
7−title: VEML3235, VEML6030, VEML6035 and VEML7700 Ambient Light Sensors (ALS)
7+title: VEML3235, VEML3328, VEML6030, VEML6035 and VEML7700 Ambient Light Sensors (ALS)
88
99 maintainers:
1010 - Rishi Gupta <gupt21@gmail.com>
@@ -21,6 +21,7 @@ description: | · 10 unmodified lines
2121
2222 Specifications about the sensors can be found at:
2323 https://www.vishay.com/docs/80131/veml3235.pdf
24+ https://www.vishay.com/docs/84968/veml3328.pdf
2425 https://www.vishay.com/docs/84366/veml6030.pdf
2526 https://www.vishay.com/docs/84889/veml6035.pdf
2627 https://www.vishay.com/docs/84286/veml7700.pdf
@@ -29,6 +30,7 @@ properties: · 2 unmodified lines
2930 compatible:
3031 enum:
3132 - vishay,veml3235
33+ - vishay,veml3328
3234 - vishay,veml6030
3335 - vishay,veml6035
3436 - vishay,veml7700
@@ -79,6 +81,7 @@ allOf: · 44 unmodified lines
7981 compatible:
8082 enum:
8183 - vishay,veml3235
84+ - vishay,veml3328
8285 - vishay,veml7700
8386 then:
8487 properties:
Documentation/devicetree/bindings/iio/magnetometer/memsic,mmc5983.yaml+63−0
@@ -0,0 +1,63 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/iio/magnetometer/memsic,mmc5983.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: MEMSIC MMC5983MA 3-axis magnetic sensor
8+
9+maintainers:
10+ - Vladislav Kulikov <vlad.kulikov.c@gmail.com>
11+
12+properties:
13+ compatible:
14+ const: memsic,mmc5983
15+
16+ reg:
17+ maxItems: 1
18+
19+ interrupts:
20+ maxItems: 1
21+
22+ vdd-supply:
23+ description: Regulator that provides power to the sensor
24+
25+ vddio-supply:
26+ description: Regulator that provides power to the digital interface and INT pin
27+
28+required:
29+ - compatible
30+ - reg
31+ - vdd-supply
32+
33+allOf:
34+ - $ref: /schemas/spi/spi-peripheral-props.yaml#
35+
36+unevaluatedProperties: false
37+
38+examples:
39+ - |
40+ i2c {
41+ #address-cells = <1>;
42+ #size-cells = <0>;
43+
44+ magnetometer@30 {
45+ compatible = "memsic,mmc5983";
46+ reg = <0x30>;
47+ vdd-supply = <&vdd_3v3_reg>;
48+ vddio-supply = <&vdd_3v3_reg>;
49+ };
50+ };
51+ - |
52+ spi {
53+ #address-cells = <1>;
54+ #size-cells = <0>;
55+
56+ magnetometer@0 {
57+ compatible = "memsic,mmc5983";
58+ reg = <0>;
59+ spi-max-frequency = <10000000>;
60+ vdd-supply = <&vdd_3v3_reg>;
61+ vddio-supply = <&vdd_3v3_reg>;
62+ };
63+ };
Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml+214−3
@@ -4,14 +4,18 @@ · 3 unmodified lines
44 $id: http://devicetree.org/schemas/iio/temperature/adi,ltc2983.yaml#
55 $schema: http://devicetree.org/meta-schemas/core.yaml#
66
7−title: Analog Devices LTC2983, LTC2986, LTM2985 Multi-sensor Temperature system
7+title: Analog Devices LTC2983 and similar Multi-sensor Temperature systems
88
99 maintainers:
1010 - Nuno Sá <nuno.sa@analog.com>
1111
1212 description: |
13− Analog Devices LTC2983, LTC2984, LTC2986, LTM2985 Multi-Sensor Digital
14− Temperature Measurement Systems
13+ Analog Devices Multi-Sensor Digital Temperature Measurement Systems:
14+ - ADT7604
15+ - LTC2983
16+ - LTC2984
17+ - LTC2986
18+ - LTM2985
1519
1620 https://www.analog.com/media/en/technical-documentation/data-sheets/2983fc.pdf
1721 https://www.analog.com/media/en/technical-documentation/data-sheets/2984fb.pdf
@@ -43,6 +47,7 @@ properties: · 25 unmodified lines
4347 compatible:
4448 oneOf:
4549 - enum:
50+ - adi,adt7604
4651 - adi,ltc2983
4752 - adi,ltc2986
4853 - adi,ltm2985
@@ -436,6 +441,121 @@ patternProperties: · 387 unmodified lines
436441 required:
437442 - adi,custom-temp
438443
444+ '^copper-trace@':
445+ $ref: '#/$defs/sensor-node'
446+ unevaluatedProperties: false
447+ description: |
448+ Copper trace resistance sensor (some parts only). Two variants exist:
449+ sub-ohm (< 1 ohm, no custom table allowed) and standard (> 1 ohm,
450+ required custom table).
451+
452+ properties:
453+ reg:
454+ minimum: 2
455+ maximum: 20
456+
457+ adi,sensor-type:
458+ description: Sensor type for copper trace sensors.
459+ $ref: /schemas/types.yaml#/definitions/uint32
460+ const: 32
461+
462+ adi,rsense-handle:
463+ description: Associated sense resistor sensor.
464+ $ref: /schemas/types.yaml#/definitions/phandle
465+
466+ adi,copper-trace-sub-ohm:
467+ description:
468+ Select the sub-ohm (< 1 ohm) copper trace variant. Custom table
469+ and excitation current are not allowed in this mode.
470+ type: boolean
471+
472+ adi,excitation-current-microamp:
473+ description:
474+ Excitation current applied to the copper trace. Not used in
475+ sub-ohm mode. The datasheet recommends 1mA for copper trace
476+ sensors due to their typically small resistance.
477+ enum: [5, 10, 25, 50, 100, 250, 500, 1000]
478+ default: 1000
479+
480+ adi,custom-copper-trace:
481+ description:
482+ Resistance-to-temperature table for copper trace sensors with
483+ resistance > 1 ohm. Required when adi,copper-trace-sub-ohm is not
484+ set. See Page 36 of the datasheet.
485+ $ref: /schemas/types.yaml#/definitions/uint64-matrix
486+ minItems: 3
487+ maxItems: 64
488+ items:
489+ items:
490+ - description: Resistance point in uOhms.
491+ - description: Temperature point in uK.
492+
493+ required:
494+ - adi,rsense-handle
495+
496+ allOf:
497+ - if:
498+ required:
499+ - adi,copper-trace-sub-ohm
500+ then:
501+ properties:
502+ adi,custom-copper-trace: false
503+ adi,excitation-current-microamp: false
504+ - if:
505+ not:
506+ required:
507+ - adi,copper-trace-sub-ohm
508+ then:
509+ required:
510+ - adi,custom-copper-trace
511+
512+ '^leak-detector@':
513+ $ref: '#/$defs/sensor-node'
514+ unevaluatedProperties: false
515+ description: |
516+ Leak detector sensor (some parts only). Outputs resistance in ohms and
517+ a coverage percentage via IIO_COVERAGE (raw/1024 = coverage %).
518+
519+ properties:
520+ reg:
521+ minimum: 2
522+ maximum: 20
523+
524+ adi,sensor-type:
525+ description: Sensor type for leak detector sensors.
526+ $ref: /schemas/types.yaml#/definitions/uint32
527+ const: 33
528+
529+ adi,rsense-handle:
530+ description: Associated sense resistor sensor.
531+ $ref: /schemas/types.yaml#/definitions/phandle
532+
533+ adi,excitation-current-nanoamp:
534+ description:
535+ Excitation current applied to the leak detector. The correct value
536+ depends on the electrical characteristics of the liquid being sensed.
537+ For example, 10000 (10µA) is recommended for PG25 (see datasheet
538+ Table 39).
539+ enum: [250, 500, 1000, 5000, 10000, 25000, 50000, 100000, 250000,
540+ 500000, 1000000]
541+
542+ adi,custom-leak-detector:
543+ description: |
544+ Lookup table mapping resistance to coverage percentage. Entries must
545+ be in ascending resistance order.
546+ $ref: /schemas/types.yaml#/definitions/uint64-matrix
547+ minItems: 3
548+ maxItems: 64
549+ items:
550+ items:
551+ - description: Resistance point in uOhms.
552+ - description: Coverage data percentage (0 to 100).
553+
554+ required:
555+ - adi,rsense-handle
556+ - adi,excitation-current-nanoamp
557+ - adi,custom-leak-detector
558+
439559 '^rsense@':
440560 $ref: '#/$defs/sensor-node'
441561 unevaluatedProperties: false
@@ -477,6 +597,32 @@ allOf: · 35 unmodified lines
477597 patternProperties:
478598 '^temp@': false
479599
600+ - if:
601+ properties:
602+ compatible:
603+ contains:
604+ const: adi,adt7604
605+ then:
606+ patternProperties:
607+ '^thermocouple@': false
608+ '^diode@': false
609+ '^adc@': false
610+ '^temp@': false
611+ '^rtd@':
612+ properties:
613+ adi,sensor-type:
614+ not:
615+ const: 18
616+ '^thermistor@':
617+ properties:
618+ adi,sensor-type:
619+ not:
620+ const: 27
621+ else:
622+ patternProperties:
623+ '^copper-trace@': false
624+ '^leak-detector@': false
625+
480626 examples:
481627 - |
482628 #include <dt-bindings/interrupt-controller/irq.h>
@@ -556,4 +702,69 @@ examples: · 73 unmodified lines
556702 };
557703 };
558704 };
705+
706+ - |
707+ #include <dt-bindings/interrupt-controller/irq.h>
708+ spi {
709+ #address-cells = <1>;
710+ #size-cells = <0>;
711+
712+ temperature-sensor@0 {
713+ compatible = "adi,adt7604";
714+ reg = <0>;
715+ interrupt-parent = <&gpio>;
716+ interrupts = <25 IRQ_TYPE_EDGE_RISING>;
717+
718+ #address-cells = <1>;
719+ #size-cells = <0>;
720+ vdd-supply = <&supply>;
721+
722+ trace_rsense: rsense@2 {
723+ reg = <2>;
724+ adi,sensor-type = <29>;
725+ adi,rsense-val-milli-ohms = <100000>; // 100 ohm
726+ };
727+
728+ copper-trace@4 {
729+ reg = <4>;
730+ adi,sensor-type = <32>;
731+ adi,rsense-handle = <&trace_rsense>;
732+ adi,copper-trace-sub-ohm;
733+ };
734+
735+ r_sense: rsense@12 {
736+ reg = <12>;
737+ adi,sensor-type = <29>;
738+ adi,rsense-val-milli-ohms = <1000000>; // 1 kohm
739+ };
740+
741+ leak-detector@14 {
742+ reg = <14>;
743+ adi,sensor-type = <33>;
744+ adi,rsense-handle = <&r_sense>;
745+ adi,excitation-current-nanoamp = <10000>;
746+ adi,custom-leak-detector =
747+ /bits/ 64 < 0 100>,
748+ /bits/ 64 < 202020000 99>,
749+ /bits/ 64 < 285710000 70>,
750+ /bits/ 64 < 333330000 60>,
751+ /bits/ 64 < 400000000 50>,
752+ /bits/ 64 < 500000000 40>,
753+ /bits/ 64 < 666670000 30>,
754+ /bits/ 64 < 1000000000 20>,
755+ /bits/ 64 < 2000000000 10>,
756+ /bits/ 64 <1000000000000 0>;
757+ };
758+
759+ rtd@18 {
760+ reg = <18>;
761+ adi,sensor-type = <12>; // PT100
762+ adi,rsense-handle = <&r_sense>;
763+ adi,number-of-wires = <2>;
764+ adi,rsense-share;
765+ adi,excitation-current-microamp = <500>;
766+ adi,rtd-curve = <0>;
767+ };
768+ };
769+ };
559770 ...
Documentation/devicetree/bindings/input/atmel,maxtouch.yaml+1−2
@@ -88,8 +88,7 @@ properties: · 87 unmodified lines
8888 - 2 # ATMEL_MXT_WAKEUP_GPIO
8989 default: 0
9090
91− wakeup-source:
92− type: boolean
91+ wakeup-source: true
9392
9493 required:
9594 - compatible
Documentation/devicetree/bindings/input/imx-keypad.yaml+16−16
@@ -66,20 +66,20 @@ examples: · 65 unmodified lines
6666 clocks = <&clks 0>;
6767 pinctrl-names = "default";
6868 pinctrl-0 = <&pinctrl_kpp_1>;
69− linux,keymap = <0x00000067 /* KEY_UP */
70− 0x0001006c /* KEY_DOWN */
71− 0x00020072 /* KEY_VOLUMEDOWN */
72− 0x00030066 /* KEY_HOME */
73− 0x0100006a /* KEY_RIGHT */
74− 0x01010069 /* KEY_LEFT */
75− 0x0102001c /* KEY_ENTER */
76− 0x01030073 /* KEY_VOLUMEUP */
77− 0x02000040 /* KEY_F6 */
78− 0x02010042 /* KEY_F8 */
79− 0x02020043 /* KEY_F9 */
80− 0x02030044 /* KEY_F10 */
81− 0x0300003b /* KEY_F1 */
82− 0x0301003c /* KEY_F2 */
83− 0x0302003d /* KEY_F3 */
84− 0x03030074>; /* KEY_POWER */
69+ linux,keymap = <0x00000067 /* KEY_UP */
70+ 0x0001006c /* KEY_DOWN */
71+ 0x00020072 /* KEY_VOLUMEDOWN */
72+ 0x00030066 /* KEY_HOME */
73+ 0x0100006a /* KEY_RIGHT */
74+ 0x01010069 /* KEY_LEFT */
75+ 0x0102001c /* KEY_ENTER */
76+ 0x01030073 /* KEY_VOLUMEUP */
77+ 0x02000040 /* KEY_F6 */
78+ 0x02010042 /* KEY_F8 */
79+ 0x02020043 /* KEY_F9 */
80+ 0x02030044 /* KEY_F10 */
81+ 0x0300003b /* KEY_F1 */
82+ 0x0301003c /* KEY_F2 */
83+ 0x0302003d /* KEY_F3 */
84+ 0x03030074>; /* KEY_POWER */
8585 };
Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml+13−8
@@ -23,14 +23,19 @@ description: | · 22 unmodified lines
2323
2424 properties:
2525 compatible:
26− enum:
27− - mediatek,mt6323-keys
28− - mediatek,mt6328-keys
29− - mediatek,mt6331-keys
30− - mediatek,mt6357-keys
31− - mediatek,mt6358-keys
32− - mediatek,mt6359-keys
33− - mediatek,mt6397-keys
26+ oneOf:
27+ - enum:
28+ - mediatek,mt6323-keys
29+ - mediatek,mt6328-keys
30+ - mediatek,mt6331-keys
31+ - mediatek,mt6357-keys
32+ - mediatek,mt6358-keys
33+ - mediatek,mt6359-keys
34+ - mediatek,mt6397-keys
35+ - items:
36+ - enum:
37+ - mediatek,mt6365-keys
38+ - const: mediatek,mt6359-keys
3439
3540 power-off-time-sec: true
3641
Documentation/devicetree/bindings/input/microchip,cap11xx.yaml+6−6
@@ -197,12 +197,12 @@ examples: · 196 unmodified lines
197197 microchip,sensitivity-delta-sense = <16>;
198198 microchip,input-threshold = <21>, <18>, <46>, <46>, <46>, <21>;
199199
200− linux,keycodes = <103>, /* KEY_UP */
201− <106>, /* KEY_RIGHT */
202− <108>, /* KEY_DOWN */
203− <105>, /* KEY_LEFT */
204− <109>, /* KEY_PAGEDOWN */
205− <104>; /* KEY_PAGEUP */
200+ linux,keycodes = <103>, /* KEY_UP */
201+ <106>, /* KEY_RIGHT */
202+ <108>, /* KEY_DOWN */
203+ <105>, /* KEY_LEFT */
204+ <109>, /* KEY_PAGEDOWN */
205+ <104>; /* KEY_PAGEUP */
206206
207207 #address-cells = <1>;
208208 #size-cells = <0>;
Documentation/devicetree/bindings/input/touchscreen/st,stmfts.yaml+4−0
@@ -40,6 +40,10 @@ properties: · 39 unmodified lines
4040 vdd-supply:
4141 description: Power supply
4242
43+ reset-gpios:
44+ description: Reset GPIO (active-low)
45+ maxItems: 1
46+
4347 required:
4448 - compatible
4549 - reg
Documentation/devicetree/bindings/input/touchscreen/ti,ads7843.yaml+2−2
@@ -165,9 +165,9 @@ examples: · 164 unmodified lines
165165
166166 touchscreen@0 {
167167 compatible = "ti,tsc2046";
168− reg = <0>; /* CS0 */
168+ reg = <0>; /* CS0 */
169169 interrupt-parent = <&gpio1>;
170− interrupts = <8 0>; /* BOOT6 / GPIO 8 */
170+ interrupts = <8 0>; /* BOOT6 / GPIO 8 */
171171 pendown-gpio = <&gpio1 8 0>;
172172 spi-max-frequency = <1000000>;
173173 vcc-supply = <&reg_vcc3>;
Documentation/devicetree/bindings/input/touchscreen/wacom,w9007a-lt03.yaml+73−0
@@ -0,0 +1,73 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/input/touchscreen/wacom,w9007a-lt03.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Wacom W9000-series penabled I2C touchscreen
8+
9+maintainers:
10+ - Hendrik Noack <hendrik-noack@gmx.de>
11+
12+description: |
13+ The W9000-series are penabled touchscreen controllers by Wacom.
14+
15+ The firmware of controllers in different devices may differ. This can also
16+ affect the controller's behavior.
17+
18+allOf:
19+ - $ref: touchscreen.yaml#
20+
21+properties:
22+ compatible:
23+ enum:
24+ - wacom,w9002
25+ - wacom,w9007a-lt03
26+ - wacom,w9007a-v1
27+
28+ reg:
29+ maxItems: 1
30+
31+ interrupts:
32+ maxItems: 1
33+
34+ vdd-supply: true
35+
36+ flash-mode-gpios:
37+ maxItems: 1
38+
39+ reset-gpios:
40+ maxItems: 1
41+
42+required:
43+ - compatible
44+ - reg
45+ - interrupts
46+
47+unevaluatedProperties: false
48+
49+examples:
50+ - |
51+ #include <dt-bindings/gpio/gpio.h>
52+ #include <dt-bindings/interrupt-controller/irq.h>
53+
54+ i2c {
55+ #address-cells = <1>;
56+ #size-cells = <0>;
57+
58+ digitizer@56 {
59+ compatible = "wacom,w9007a-lt03";
60+ reg = <0x56>;
61+ interrupt-parent = <&gpd1>;
62+ interrupts = <1 IRQ_TYPE_EDGE_RISING>;
63+
64+ vdd-supply = <&stylus_reg>;
65+
66+ flash-mode-gpios = <&gpd1 3 GPIO_ACTIVE_HIGH>;
67+ reset-gpios = <&gpx0 1 GPIO_ACTIVE_LOW>;
68+
69+ touchscreen-x-mm = <216>;
70+ touchscreen-y-mm = <135>;
71+ touchscreen-inverted-x;
72+ };
73+ };
Documentation/devicetree/bindings/interconnect/qcom,hawi-rpmh.yaml+131−0
@@ -0,0 +1,131 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/interconnect/qcom,hawi-rpmh.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm RPMh Network-On-Chip Interconnect on Hawi
8+
9+maintainers:
10+ - Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>
11+
12+description: |
13+ RPMh interconnect providers support system bandwidth requirements through
14+ RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
15+ able to communicate with the BCM through the Resource State Coordinator (RSC)
16+ associated with each execution environment. Provider nodes must point to at
17+ least one RPMh device child node pertaining to their RSC and each provider
18+ can map to multiple RPMh resources.
19+
20+ See also: include/dt-bindings/interconnect/qcom,hawi-rpmh.h
21+
22+properties:
23+ compatible:
24+ enum:
25+ - qcom,hawi-aggre1-noc
26+ - qcom,hawi-clk-virt
27+ - qcom,hawi-cnoc-main
28+ - qcom,hawi-gem-noc
29+ - qcom,hawi-llclpi-noc
30+ - qcom,hawi-lpass-ag-noc
31+ - qcom,hawi-lpass-lpiaon-noc
32+ - qcom,hawi-lpass-lpicx-noc
33+ - qcom,hawi-mc-virt
34+ - qcom,hawi-mmss-noc
35+ - qcom,hawi-nsp-noc
36+ - qcom,hawi-pcie-anoc
37+ - qcom,hawi-stdst-cfg
38+ - qcom,hawi-stdst-main
39+ - qcom,hawi-system-noc
40+
41+ reg:
42+ maxItems: 1
43+
44+ clocks:
45+ minItems: 2
46+ maxItems: 3
47+
48+required:
49+ - compatible
50+
51+allOf:
52+ - $ref: qcom,rpmh-common.yaml#
53+ - if:
54+ properties:
55+ compatible:
56+ contains:
57+ enum:
58+ - qcom,hawi-clk-virt
59+ - qcom,hawi-mc-virt
60+ then:
61+ properties:
62+ reg: false
63+ else:
64+ required:
65+ - reg
66+
67+ - if:
68+ properties:
69+ compatible:
70+ contains:
71+ enum:
72+ - qcom,hawi-pcie-anoc
73+ then:
74+ properties:
75+ clocks:
76+ items:
77+ - description: aggre-NOC PCIe AXI clock
78+ - description: cfg-NOC PCIe a-NOC AHB clock
79+
80+ - if:
81+ properties:
82+ compatible:
83+ contains:
84+ enum:
85+ - qcom,hawi-aggre1-noc
86+ then:
87+ properties:
88+ clocks:
89+ items:
90+ - description: aggre UFS PHY AXI clock
91+ - description: aggre USB3 PRIM AXI clock
92+ - description: RPMH CC IPA clock
93+
94+ - if:
95+ properties:
96+ compatible:
97+ contains:
98+ enum:
99+ - qcom,hawi-aggre1-noc
100+ - qcom,hawi-pcie-anoc
101+ then:
102+ required:
103+ - clocks
104+ else:
105+ properties:
106+ clocks: false
107+
108+unevaluatedProperties: false
109+
110+examples:
111+ - |
112+ soc {
113+ #address-cells = <2>;
114+ #size-cells = <2>;
115+
116+ clk_virt: interconnect-0 {
117+ compatible = "qcom,hawi-clk-virt";
118+ #interconnect-cells = <2>;
119+ qcom,bcm-voters = <&apps_bcm_voter>;
120+ };
121+
122+ aggre_noc: interconnect@f00000 {
123+ compatible = "qcom,hawi-aggre1-noc";
124+ reg = <0x0 0xf00000 0x0 0x54400>;
125+ #interconnect-cells = <2>;
126+ clocks = <&gcc_aggre_ufs_phy_axi_clk>,
127+ <&gcc_aggre_usb3_prim_axi_clk>,
128+ <&rpmhcc_ipa_clk>;
129+ qcom,bcm-voters = <&apps_bcm_voter>;
130+ };
131+ };
Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml+2−0
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
2626 - items:
2727 - enum:
2828 - qcom,glymur-cpu-bwmon
29+ - qcom,hawi-cpu-bwmon
2930 - qcom,kaanapali-cpu-bwmon
3031 - qcom,qcm2290-cpu-bwmon
3132 - qcom,qcs615-cpu-bwmon
@@ -45,6 +46,7 @@ properties: · 13 unmodified lines
4546 - const: qcom,sdm845-bwmon # BWMON v4, unified register space
4647 - items:
4748 - enum:
49+ - qcom,hawi-llcc-bwmon
4850 - qcom,qcs615-llcc-bwmon
4951 - qcom,qcs8300-llcc-bwmon
5052 - qcom,sa8775p-llcc-bwmon
Documentation/devicetree/bindings/interconnect/qcom,nord-rpmh.yaml+131−0
@@ -0,0 +1,131 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/interconnect/qcom,nord-rpmh.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm RPMh Network-On-Chip Interconnect on Nord
8+
9+maintainers:
10+ - Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
11+
12+description: |
13+ RPMh interconnect providers support system bandwidth requirements through
14+ RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
15+ able to communicate with the BCM through the Resource State Coordinator (RSC)
16+ associated with each execution environment. Provider nodes must point to at
17+ least one RPMh device child node pertaining to their RSC and each provider
18+ can map to multiple RPMh resources.
19+
20+ See also: include/dt-bindings/interconnect/qcom,nord-rpmh.h
21+
22+properties:
23+ compatible:
24+ enum:
25+ - qcom,nord-aggre1-noc
26+ - qcom,nord-aggre1-noc-tile
27+ - qcom,nord-aggre2-noc
28+ - qcom,nord-aggre2-noc-tile
29+ - qcom,nord-clk-virt
30+ - qcom,nord-cnoc-cfg
31+ - qcom,nord-cnoc-main
32+ - qcom,nord-hpass-ag-noc
33+ - qcom,nord-hscnoc
34+ - qcom,nord-mc-virt
35+ - qcom,nord-mmss-noc
36+ - qcom,nord-nsp-data-noc-0
37+ - qcom,nord-nsp-data-noc-1
38+ - qcom,nord-nsp-data-noc-2
39+ - qcom,nord-nsp-data-noc-3
40+ - qcom,nord-pcie-cfg
41+ - qcom,nord-pcie-data-inbound
42+ - qcom,nord-pcie-data-outbound
43+ - qcom,nord-system-noc
44+
45+ reg:
46+ maxItems: 1
47+
48+ clocks:
49+ minItems: 1
50+ maxItems: 4
51+
52+required:
53+ - compatible
54+
55+allOf:
56+ - $ref: qcom,rpmh-common.yaml#
57+ - if:
58+ properties:
59+ compatible:
60+ contains:
61+ enum:
62+ - qcom,nord-clk-virt
63+ - qcom,nord-mc-virt
64+ then:
65+ properties:
66+ reg: false
67+ else:
68+ required:
69+ - reg
70+
71+ - if:
72+ properties:
73+ compatible:
74+ contains:
75+ enum:
76+ - qcom,nord-aggre1-noc-tile
77+ then:
78+ properties:
79+ clocks:
80+ items:
81+ - description: aggre UFS PHY AXI clock
82+ - description: aggre USB2 AXI clock
83+ - description: aggre USB3 PRIM AXI clock
84+ - description: aggre USB3 SEC AXI clock
85+
86+ - if:
87+ properties:
88+ compatible:
89+ contains:
90+ enum:
91+ - qcom,nord-aggre2-noc
92+ then:
93+ properties:
94+ clocks:
95+ items:
96+ - description: RPMH CC IPA clock
97+
98+ - if:
99+ properties:
100+ compatible:
101+ contains:
102+ enum:
103+ - qcom,nord-aggre1-noc-tile
104+ - qcom,nord-aggre2-noc
105+ then:
106+ required:
107+ - clocks
108+ else:
109+ properties:
110+ clocks: false
111+
112+unevaluatedProperties: false
113+
114+examples:
115+ - |
116+ clk_virt: interconnect-clk-virt {
117+ compatible = "qcom,nord-clk-virt";
118+ #interconnect-cells = <2>;
119+ qcom,bcm-voters = <&apps_bcm_voter>;
120+ };
121+
122+ aggre1_noc_tile: interconnect@1720000 {
123+ compatible = "qcom,nord-aggre1-noc-tile";
124+ reg = <0x01720000 0x23400>;
125+ #interconnect-cells = <2>;
126+ qcom,bcm-voters = <&apps_bcm_voter>;
127+ clocks = <&ne_gcc_aggre_noc_ufs_phy_axi_clk>,
128+ <&ne_gcc_aggre_noc_usb2_axi_clk>,
129+ <&ne_gcc_aggre_noc_usb3_prim_axi_clk>,
130+ <&ne_gcc_aggre_noc_usb3_sec_axi_clk>;
131+ };
Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml+13−0
@@ -79,6 +79,19 @@ allOf: · 78 unmodified lines
7979 - const: aggre2_usb3_axi
8080 - const: cfg_noc_usb2_axi
8181
82+ - if:
83+ properties:
84+ compatible:
85+ enum:
86+ - qcom,sdm660-bimc
87+ - qcom,sdm660-cnoc
88+ - qcom,sdm660-gnoc
89+ - qcom,sdm660-snoc
90+ then:
91+ properties:
92+ clocks: false
93+ clock-names: false
94+
8295 examples:
8396 - |
8497 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
Documentation/devicetree/bindings/interconnect/qcom,shikra.yaml+134−0
@@ -0,0 +1,134 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/interconnect/qcom,shikra.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm Shikra Network-On-Chip interconnect
8+
9+maintainers:
10+ - Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
11+
12+description:
13+ The Qualcomm Shikra interconnect providers support adjusting the
14+ bandwidth requirements between the various NoC fabrics.
15+
16+properties:
17+ compatible:
18+ enum:
19+ - qcom,shikra-config-noc
20+ - qcom,shikra-mem-noc-core
21+ - qcom,shikra-sys-noc
22+
23+ reg:
24+ maxItems: 1
25+
26+ clocks:
27+ minItems: 1
28+ maxItems: 4
29+
30+ clock-names:
31+ minItems: 1
32+ maxItems: 4
33+
34+# Child node's properties
35+patternProperties:
36+ '^interconnect-[a-z0-9]+$':
37+ type: object
38+ description:
39+ The interconnect providers do not have a separate QoS register space,
40+ but share parent's space.
41+
42+ $ref: qcom,rpm-common.yaml#
43+
44+ properties:
45+ compatible:
46+ enum:
47+ - qcom,shikra-clk-virt
48+ - qcom,shikra-mc-virt
49+ - qcom,shikra-mmrt-virt
50+ - qcom,shikra-mmnrt-virt
51+
52+ required:
53+ - compatible
54+
55+ unevaluatedProperties: false
56+
57+required:
58+ - compatible
59+ - reg
60+
61+allOf:
62+ - $ref: qcom,rpm-common.yaml#
63+ - if:
64+ properties:
65+ compatible:
66+ const: qcom,shikra-mem-noc-core
67+
68+ then:
69+ properties:
70+ clocks:
71+ items:
72+ - description: GPU-NoC AXI clock
73+
74+ clock-names:
75+ items:
76+ - const: gpu_axi
77+ patternProperties:
78+ '^interconnect-[a-z0-9]+$': false
79+
80+ - if:
81+ properties:
82+ compatible:
83+ const: qcom,shikra-sys-noc
84+
85+ then:
86+ properties:
87+ clocks:
88+ items:
89+ - description: EMAC0-NoC AXI clock.
90+ - description: EMAC1-NoC AXI clock.
91+ - description: USB2-NoC AXI clock.
92+ - description: USB3-NoC AXI clock.
93+
94+ clock-names:
95+ items:
96+ - const: emac0_axi
97+ - const: emac1_axi
98+ - const: usb2_axi
99+ - const: usb3_axi
100+
101+ - if:
102+ properties:
103+ compatible:
104+ const: qcom,shikra-config-noc
105+
106+ then:
107+ properties:
108+ clocks: false
109+ clock-names: false
110+ patternProperties:
111+ '^interconnect-[a-z0-9]+$': false
112+
113+unevaluatedProperties: false
114+
115+examples:
116+ - |
117+ interconnect@1880000 {
118+ compatible = "qcom,shikra-sys-noc";
119+ reg = <0x01880000 0x6a080>;
120+ #interconnect-cells = <2>;
121+ clocks = <&gcc_emac0_axi_sys_noc_clk>,
122+ <&gcc_emac1_axi_sys_noc_clk>,
123+ <&gcc_sys_noc_usb2_prim_axi_clk>,
124+ <&gcc_sys_noc_usb3_prim_axi_clk>;
125+ clock-names = "emac0_axi",
126+ "emac1_axi",
127+ "usb2_axi",
128+ "usb3_axi";
129+
130+ interconnect-clk {
131+ compatible = "qcom,shikra-clk-virt";
132+ #interconnect-cells = <2>;
133+ };
134+ };
Documentation/devicetree/bindings/interconnect/qcom,sm6115.yaml+15−18
@@ -62,23 +62,33 @@ allOf: · 61 unmodified lines
6262 - if:
6363 properties:
6464 compatible:
65− const: qcom,sm6115-cnoc
65+ const: qcom,sm6115-bimc
66+ then:
67+ properties:
68+ clocks: false
69+ clock-names: false
70+ patternProperties:
71+ '^interconnect-[a-z0-9]+$': false
6672
73+ - if:
74+ properties:
75+ compatible:
76+ const: qcom,sm6115-cnoc
6777 then:
6878 properties:
6979 clocks:
7080 items:
7181 - description: USB-NoC AXI clock
72−
7382 clock-names:
7483 items:
7584 - const: usb_axi
85+ patternProperties:
86+ '^interconnect-[a-z0-9]+$': false
7687
7788 - if:
7889 properties:
7990 compatible:
8091 const: qcom,sm6115-snoc
81−
8292 then:
8393 properties:
8494 clocks:
@@ -87,7 +97,6 @@ allOf: · 2 unmodified lines
8797 - description: UFS-NoC AXI clock.
8898 - description: USB-NoC AXI clock.
8999 - description: IPA clock.
90−
91100 clock-names:
92101 items:
93102 - const: cpu_axi
@@ -95,20 +104,6 @@ allOf: · 1 unmodified line
95104 - const: usb_axi
96105 - const: ipa
97106
98− - if:
99− properties:
100− compatible:
101− enum:
102− - qcom,sm6115-bimc
103− - qcom,sm6115-clk-virt
104− - qcom,sm6115-mmrt-virt
105− - qcom,sm6115-mmnrt-virt
106−
107− then:
108− properties:
109− clocks: false
110− clock-names: false
111−
112107 unevaluatedProperties: false
113108
114109 examples:
@@ -149,4 +144,6 @@ examples: · 34 unmodified lines
149144 compatible = "qcom,sm6115-cnoc";
150145 reg = <0x01900000 0x8200>;
151146 #interconnect-cells = <1>;
147+ clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>;
148+ clock-names = "usb_axi";
152149 };
Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml+17−4
@@ -38,6 +38,8 @@ properties: · 37 unmodified lines
3838 - amlogic,a4-gpio-intc
3939 - amlogic,a4-gpio-ao-intc
4040 - amlogic,a5-gpio-intc
41+ - amlogic,a9-gpio-intc
42+ - amlogic,a9-gpio-ao-intc
4143 - amlogic,c3-gpio-intc
4244 - amlogic,s6-gpio-intc
4345 - amlogic,s7-gpio-intc
@@ -56,7 +58,7 @@ properties: · 12 unmodified lines
5658 amlogic,channel-interrupts:
5759 description: Array with the upstream hwirq numbers
5860 minItems: 2
59− maxItems: 12
61+ maxItems: 20
6062 $ref: /schemas/types.yaml#/definitions/uint32-array
6163
6264 required:
@@ -76,9 +78,20 @@ then: · 13 unmodified lines
7678 amlogic,channel-interrupts:
7779 maxItems: 2
7880 else:
79− properties:
80− amlogic,channel-interrupts:
81− minItems: 8
81+ if:
82+ properties:
83+ compatible:
84+ contains:
85+ const: amlogic,a9-gpio-ao-intc
86+ then:
87+ properties:
88+ amlogic,channel-interrupts:
89+ minItems: 20
90+ else:
91+ properties:
92+ amlogic,channel-interrupts:
93+ minItems: 8
94+ maxItems: 12
8295
8396 additionalProperties: false
8497
Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc.yaml+0−90
@@ -1,90 +0,0 @@
1−# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
2−%YAML 1.2
3−---
4−$id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc.yaml#
5−$schema: http://devicetree.org/meta-schemas/core.yaml#
6−
7−title: Aspeed AST2700 Interrupt Controller
8−
9−description:
10− This interrupt controller hardware is second level interrupt controller that
11− is hooked to a parent interrupt controller. It's useful to combine multiple
12− interrupt sources into 1 interrupt to parent interrupt controller.
13−
14−maintainers:
15− - Kevin Chen <kevin_chen@aspeedtech.com>
16−
17−properties:
18− compatible:
19− enum:
20− - aspeed,ast2700-intc-ic
21−
22− reg:
23− maxItems: 1
24−
25− interrupt-controller: true
26−
27− '#interrupt-cells':
28− const: 1
29− description:
30− The first cell is the IRQ number, the second cell is the trigger
31− type as defined in interrupt.txt in this directory.
32−
33− interrupts:
34− minItems: 1
35− maxItems: 10
36− description: |
37− Depend to which INTC0 or INTC1 used.
38− INTC0 and INTC1 are two kinds of interrupt controller with enable and raw
39− status registers for use.
40− INTC0 is used to assert GIC if interrupt in INTC1 asserted.
41− INTC1 is used to assert INTC0 if interrupt of modules asserted.
42− +-----+ +-------+ +---------+---module0
43− | GIC |---| INTC0 |--+--| INTC1_0 |---module2
44− | | | | | | |---...
45− +-----+ +-------+ | +---------+---module31
46− |
47− | +---------+---module0
48− +---| INTC1_1 |---module2
49− | | |---...
50− | +---------+---module31
51− ...
52− | +---------+---module0
53− +---| INTC1_5 |---module2
54− | |---...
55− +---------+---module31
56−
57−required:
58− - compatible
59− - reg
60− - interrupt-controller
61− - '#interrupt-cells'
62− - interrupts
63−
64−additionalProperties: false
65−
66−examples:
67− - |
68− #include <dt-bindings/interrupt-controller/arm-gic.h>
69−
70− bus {
71− #address-cells = <2>;
72− #size-cells = <2>;
73−
74− interrupt-controller@12101b00 {
75− compatible = "aspeed,ast2700-intc-ic";
76− reg = <0 0x12101b00 0 0x10>;
77− #interrupt-cells = <1>;
78− interrupt-controller;
79− interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
80− <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>,
81− <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>,
82− <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>,
83− <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
84− <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
85− <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
86− <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
87− <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
88− <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
89− };
90− };
Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-interrupt.yaml+188−0
@@ -0,0 +1,188 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-interrupt.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: ASPEED AST2700 Interrupt Controllers (INTC0/INTC1)
8+
9+description: |
10+ The ASPEED AST2700 SoC integrates two interrupt controller designs:
11+
12+ - INTC0: Primary controller that routes interrupt sources to upstream,
13+ processor-specific interrupt controllers
14+
15+ - INTC1: Secondary controller whose interrupt outputs feed into INTC0
16+
17+ The SoC contains four processors to which interrupts can be routed:
18+
19+ - PSP: Primary Service Processor (Cortex-A35)
20+ - SSP: Secondary Service Processor (Cortex-M4)
21+ - TSP: Tertiary Service Processor (Cortex-M4)
22+ - BMCU: Boot MCU (a RISC-V microcontroller)
23+
24+ The following diagram illustrates the overall architecture of the
25+ ASPEED AST2700 interrupt controllers:
26+
27+ +-----------+ +-----------+
28+ | INTC0 | | INTC1(0) |
29+ +-----------+ +-----------+
30+ | Router | +-----------+ | Router |
31+ | out int | +Peripheral + | out int |
32+ +-----------+ | 0 0 <-+Controllers+ | INTM | +-----------+
33+ |PSP GIC <-|---+ . . | +-----------+ | . . <-+Peripheral +
34+ +-----------+ | . . | | . . | +Controllers+
35+ +-----------+ | . . | | . . | +-----------+
36+ |SSP NVIC <-|---+ . . <----------------+ . . |
37+ +-----------+ | . . | | . . |
38+ +-----------+ | . . <-------- | . . |
39+ |TSP NVIC <-|---+ . . | | ----+ . . |
40+ +-----------+ | . . | | | | O P |
41+ | . . | | | +-----------+
42+ | . . <---- | --------------------
43+ | . . | | | +-----------+ |
44+ | M N | | ---------+ INTC1(1) | |
45+ +-----------+ | +-----------+ |
46+ | . |
47+ | +-----------+ |
48+ -------------+ INTC1(N) | |
49+ +-----------+ |
50+ +--------------+ |
51+ + BMCU APLIC <-+---------------------------------------------
52+ +--------------+
53+
54+ INTC0 supports:
55+ - 128 local peripheral interrupt inputs
56+ - Fan-in from up to three INTC1 instances via banked interrupt lines (INTM)
57+ - Local peripheral interrupt outputs
58+ - Merged interrupt outputs
59+ - Software interrupt outputs (SWINT)
60+ - Configurable interrupt routes targeting the PSP, SSP, and TSP
61+
62+ INTC1 supports:
63+ - 192 local peripheral interrupt inputs
64+ - Banked interrupt outputs (INTM, 5 x 6 banks x 32 interrupts per bank)
65+ - Configurable interrupt routes targeting the PSP, SSP, TSP, and BMCU
66+
67+ One INTC1 instance is always present, on the SoC's IO die. A further two
68+ instances may be attached to the SoC's one INTC0 instance via LTPI (LVDS
69+ Tunneling Protocol & Interface).
70+
71+ Interrupt numbering model
72+ -------------------------
73+ The binding uses a controller-local numbering model. Peripheral device
74+ nodes use the INTCx local interrupt number (hwirq) in their 'interrupts' or
75+ 'interrupts-extended' properties.
76+
77+ For AST2700, INTC0 exposes the following (inclusive) input ranges:
78+
79+ - 000..479: Independent interrupts
80+ - 480..489: INTM0-INTM9
81+ - 490..499: INTM10-INTM19
82+ - 500..509: INTM20-INTM29
83+ - 510..519: INTM30-INTM39
84+ - 520..529: INTM40-INTM49
85+
86+ INTC0's (inclusive) output ranges are as follows:
87+
88+ - 000..127: 1:1 local peripheral interrupt output to PSP
89+ - 144..151: Software interrupts from the SSP output to PSP
90+ - 152..159: Software interrupts from the TSP output to PSP
91+ - 192..201: INTM0-INTM9 banked outputs to PSP
92+ - 208..217: INTM30-INTM39 banked outputs to PSP
93+ - 224..233: INTM40-INTM49 banked outputs to PSP
94+ - 256..383: 1:1 local peripheral interrupt output to SSP
95+ - 384..393: INTM10-INTM19 banked outputs to SSP
96+ - 400..407: Software interrupts from the PSP output to SSP
97+ - 408..415: Software interrupts from the TSP output to SSP
98+ - 426..553: 1:1 local peripheral interrupt output to TSP
99+ - 554..563: INTM20-INTM29 banked outputs to TSP
100+ - 570..577: Software interrupts from the PSP output to TSP
101+ - 578..585: Software interrupts from the SSP output to TSP
102+
103+ Inputs and outputs for INTC1 instances are context-dependent. However, for the
104+ first instance of INTC1, the (inclusive) output ranges are:
105+
106+ - 00..05: INTM0-INTM5
107+ - 10..15: INTM10-INTM15
108+ - 20..25: INTM20-INTM25
109+ - 30..35: INTM30-INTM35
110+ - 40..45: INTM40-INTM45
111+ - 50..50: BootMCU
112+
113+maintainers:
114+ - Ryan Chen <ryan_chen@aspeedtech.com>
115+ - Andrew Jeffery <andrew@codeconstruct.com.au>
116+
117+properties:
118+ compatible:
119+ enum:
120+ - aspeed,ast2700-intc0
121+ - aspeed,ast2700-intc1
122+
123+ reg:
124+ maxItems: 1
125+
126+ interrupt-controller: true
127+
128+ '#interrupt-cells':
129+ const: 1
130+ description: Single cell encoding the INTC local interrupt number (hwirq).
131+
132+ aspeed,interrupt-ranges:
133+ description: |
134+ Describes how ranges of controller output pins are routed to a parent
135+ interrupt controller.
136+
137+ Each range entry is encoded as:
138+
139+ <out count phandle parent-specifier...>
140+
141+ where:
142+ - out: First controller interrupt output index in the range.
143+ - count: Number of consecutive controller interrupt outputs and parent
144+ interrupt inputs in this range.
145+ - phandle: Phandle to the parent interrupt controller node.
146+ - parent-specifier: Interrupt specifier, as defined by the parent
147+ interrupt controller binding.
148+ $ref: /schemas/types.yaml#/definitions/uint32-array
149+ minItems: 3
150+ items:
151+ description: Range descriptors with a parent interrupt specifier.
152+
153+required:
154+ - compatible
155+ - reg
156+ - interrupt-controller
157+ - '#interrupt-cells'
158+ - aspeed,interrupt-ranges
159+
160+additionalProperties: false
161+
162+examples:
163+ - |
164+ #include <dt-bindings/interrupt-controller/arm-gic.h>
165+
166+ interrupt-controller@12100000 {
167+ compatible = "aspeed,ast2700-intc0";
168+ reg = <0x12100000 0x3b00>;
169+ interrupt-parent = <&gic>;
170+ interrupt-controller;
171+ #interrupt-cells = <1>;
172+
173+ aspeed,interrupt-ranges =
174+ <0 128 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
175+ <144 8 &gic GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
176+ <152 8 &gic GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
177+ <192 10 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
178+ <208 10 &gic GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
179+ <224 10 &gic GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>,
180+ <256 128 &ssp_nvic 0 0>,
181+ <384 10 &ssp_nvic 160 0>,
182+ <400 8 &ssp_nvic 144 0>,
183+ <408 8 &ssp_nvic 152 0>,
184+ <426 128 &tsp_nvic 0 0>,
185+ <554 10 &tsp_nvic 160 0>,
186+ <570 8 &tsp_nvic 144 0>,
187+ <578 8 &tsp_nvic 152 0>;
188+ };
Documentation/devicetree/bindings/interrupt-controller/econet,en751221-intc.yaml+20−0
@@ -52,6 +52,25 @@ properties: · 51 unmodified lines
5252 - description: primary per-CPU IRQ
5353 - description: shadow IRQ number
5454
55+ econet,cpu-interrupt-map:
56+ $ref: /schemas/types.yaml#/definitions/uint32-matrix
57+ description:
58+ When running in VEIC mode, the hardware re-routes interrupts from the
59+ CPU interrupt controller core to the "external" interrupt controller
60+ (this device). It then prioritizes them and sends them back to the CPU
61+ along with its own interrupts. The CPU hardware handles interrupts using
62+ a special dispatch table (the normal interrupt handler is not invoked).
63+ In this interrupt controller, the CPU interrupts are renumbered as they
64+ are merged with this controller's own hardware interrupts.
65+
66+ This is the inverse of an interrupt-map, mapping which interrupts from
67+ this controller must be routed back to the CPU interrupt domain for
68+ correct handling there.
69+ items:
70+ items:
71+ - description: The interrupt number as received in this controller
72+ - description: The interrupt number to be dispatched on the CPU intc
73+
5574 required:
5675 - compatible
5776 - reg
@@ -74,5 +93,6 @@ examples: · 16 unmodified lines
7493 interrupts = <2>;
7594
7695 econet,shadow-interrupts = <7 2>, <8 3>, <13 12>, <30 29>;
96+ econet,cpu-interrupt-map = <7 0>, <8 1>;
7797 };
7898 ...
Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml+2−0
@@ -30,7 +30,9 @@ properties: · 29 unmodified lines
3030 - qcom,glymur-pdc
3131 - qcom,hawi-pdc
3232 - qcom,kaanapali-pdc
33+ - qcom,maili-pdc
3334 - qcom,milos-pdc
35+ - qcom,nord-pdc
3436 - qcom,qcs615-pdc
3537 - qcom,qcs8300-pdc
3638 - qcom,qdu1000-pdc
Documentation/devicetree/bindings/interrupt-controller/renesas,r9a09g077-icu.yaml+1−1
@@ -165,7 +165,7 @@ examples: · 164 unmodified lines
165165 icu: interrupt-controller@802a0000 {
166166 compatible = "renesas,r9a09g077-icu";
167167 reg = <0x802a0000 0x10000>,
168− <0x812a0000 0x50>;
168+ <0x812a0000 0x10000>;
169169 #interrupt-cells = <2>;
170170 #address-cells = <0>;
171171 interrupt-controller;
Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml+1−0
@@ -73,6 +73,7 @@ properties: · 72 unmodified lines
7373 - allwinner,sun20i-d1-plic
7474 - sophgo,cv1800b-plic
7575 - sophgo,cv1812h-plic
76+ - sophgo,sg2000-plic
7677 - sophgo,sg2002-plic
7778 - sophgo,sg2042-plic
7879 - sophgo,sg2044-plic
Documentation/devicetree/bindings/interrupt-controller/starfive,jhb100-intc.yamlrenamed from Documentation/devicetree/bindings/interrupt-controller/starfive,jh8100-intc.yaml+4−16
@@ -1,13 +1,13 @@
11 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
22 %YAML 1.2
33 ---
4−$id: http://devicetree.org/schemas/interrupt-controller/starfive,jh8100-intc.yaml#
4+$id: http://devicetree.org/schemas/interrupt-controller/starfive,jhb100-intc.yaml#
55 $schema: http://devicetree.org/meta-schemas/core.yaml#
66
77 title: StarFive External Interrupt Controller
88
99 description:
10− StarFive SoC JH8100 contain a external interrupt controller. It can be used
10+ StarFive SoC JHB100 contain a external interrupt controller. It can be used
1111 to handle high-level input interrupt signals. It also send the output
1212 interrupt signal to RISC-V PLIC.
1313
@@ -16,19 +16,11 @@ maintainers: · 2 unmodified lines
1616
1717 properties:
1818 compatible:
19− const: starfive,jh8100-intc
19+ const: starfive,jhb100-intc
2020
2121 reg:
2222 maxItems: 1
2323
24− clocks:
25− description: APB clock for the interrupt controller
26− maxItems: 1
27−
28− resets:
29− description: APB reset for the interrupt controller
30− maxItems: 1
31−
3224 interrupts:
3325 maxItems: 1
3426
@@ -40,8 +32,6 @@ properties: · 5 unmodified lines
4032 required:
4133 - compatible
4234 - reg
43− - clocks
44− - resets
4535 - interrupts
4636 - interrupt-controller
4737 - "#interrupt-cells"
@@ -51,10 +41,8 @@ additionalProperties: false · 3 unmodified lines
5141 examples:
5242 - |
5343 interrupt-controller@12260000 {
54− compatible = "starfive,jh8100-intc";
44+ compatible = "starfive,jhb100-intc";
5545 reg = <0x12260000 0x10000>;
56− clocks = <&syscrg_ne 76>;
57− resets = <&syscrg_ne 13>;
5846 interrupts = <45>;
5947 interrupt-controller;
6048 #interrupt-cells = <1>;
Documentation/devicetree/bindings/interrupt-controller/ti,irq-crossbar.yaml+96−0
@@ -0,0 +1,96 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/interrupt-controller/ti,irq-crossbar.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Texas Instruments IRQ Crossbar
8+
9+maintainers:
10+ - Sricharan R <r.sricharan@ti.com>
11+
12+description:
13+ Some socs have a large number of interrupts requests to service the needs of
14+ its many peripherals and subsystems. All of the interrupt lines from the
15+ subsystems are not needed at the same time, so they have to be muxed to the
16+ irq-controller appropriately. In such places a interrupt controllers are
17+ preceded by an CROSSBAR that provides flexibility in muxing the device
18+ requests to the controller inputs.
19+
20+properties:
21+ compatible:
22+ const: ti,irq-crossbar
23+
24+ reg:
25+ maxItems: 1
26+
27+ interrupt-controller: true
28+
29+ '#interrupt-cells':
30+ const: 3
31+
32+ ti,max-irqs:
33+ $ref: /schemas/types.yaml#/definitions/uint32
34+ description:
35+ Total number of irqs available at the parent interrupt controller.
36+ minimum: 1
37+
38+ ti,max-crossbar-sources:
39+ $ref: /schemas/types.yaml#/definitions/uint32
40+ description:
41+ Maximum number of crossbar sources that can be routed.
42+ minimum: 1
43+
44+ ti,reg-size:
45+ $ref: /schemas/types.yaml#/definitions/uint32
46+ description:
47+ Size of a individual register in bytes. Every individual
48+ register is assumed to be of same size.
49+ enum: [1, 2, 4]
50+
51+ ti,irqs-reserved:
52+ $ref: /schemas/types.yaml#/definitions/uint32-array
53+ description:
54+ List of the reserved irq lines that are not muxed using crossbar. These
55+ interrupt lines are reserved in the soc, so crossbar bar driver should not
56+ consider them as free lines.
57+
58+ ti,irqs-skip:
59+ $ref: /schemas/types.yaml#/definitions/uint32-array
60+ description:
61+ Similar to "ti,irqs-reserved", but these are for SOC-specific hard-wiring
62+ of those irqs which unexpectedly bypasses the crossbar. These irqs have a
63+ crossbar register, but still cannot be used.
64+
65+ ti,irqs-safe-map:
66+ $ref: /schemas/types.yaml#/definitions/uint32
67+ description:
68+ integer which maps to a safe configuration to use when the interrupt
69+ controller irq is unused.
70+ default: 0
71+
72+required:
73+ - compatible
74+ - reg
75+ - interrupt-controller
76+ - '#interrupt-cells'
77+ - ti,max-irqs
78+ - ti,max-crossbar-sources
79+ - ti,reg-size
80+ - ti,irqs-reserved
81+
82+additionalProperties: false
83+
84+examples:
85+ - |
86+ crossbar@4a002a48 {
87+ compatible = "ti,irq-crossbar";
88+ reg = <0x4a002a48 0x130>;
89+ interrupt-controller;
90+ #interrupt-cells = <3>;
91+ ti,max-irqs = <160>;
92+ ti,max-crossbar-sources = <400>;
93+ ti,reg-size = <2>;
94+ ti,irqs-reserved = <0 1 2 3 5 6 131 132>;
95+ ti,irqs-skip = <10 133 139 140>;
96+ };
Documentation/devicetree/bindings/iommu/arm,smmu.yaml+43−1
@@ -37,8 +37,10 @@ properties: · 36 unmodified lines
3737 - enum:
3838 - qcom,eliza-smmu-500
3939 - qcom,glymur-smmu-500
40+ - qcom,hawi-smmu-500
4041 - qcom,kaanapali-smmu-500
4142 - qcom,milos-smmu-500
43+ - qcom,nord-smmu-500
4244 - qcom,qcm2290-smmu-500
4345 - qcom,qcs615-smmu-500
4446 - qcom,qcs8300-smmu-500
@@ -55,6 +57,7 @@ properties: · 10 unmodified lines
5557 - qcom,sdx55-smmu-500
5658 - qcom,sdx65-smmu-500
5759 - qcom,sdx75-smmu-500
60+ - qcom,shikra-smmu-500
5861 - qcom,sm6115-smmu-500
5962 - qcom,sm6125-smmu-500
6063 - qcom,sm6350-smmu-500
@@ -566,7 +569,11 @@ allOf: · 505 unmodified lines
566569 properties:
567570 compatible:
568571 items:
569− - const: qcom,sm8750-smmu-500
572+ - enum:
573+ - qcom,glymur-smmu-500
574+ - qcom,hawi-smmu-500
575+ - qcom,kaanapali-smmu-500
576+ - qcom,sm8750-smmu-500
570577 - const: qcom,adreno-smmu
571578 - const: qcom,smmu-500
572579 - const: arm,mmu-500
@@ -595,6 +602,7 @@ allOf: · 22 unmodified lines
595602 - qcom,sdm845-smmu-500
596603 - qcom,sdx55-smmu-500
597604 - qcom,sdx65-smmu-500
605+ - qcom,sdx75-smmu-500
598606 - qcom,sm6350-smmu-500
599607 - qcom,sm6375-smmu-500
600608 then:
@@ -602,6 +610,40 @@ allOf: · 1 unmodified line
602610 clock-names: false
603611 clocks: false
604612
613+ # Disallow clocks for all other platforms where specific compatible is used
614+ # with different fallbacks and only one combination has no clocks
615+ - if:
616+ properties:
617+ compatible:
618+ items:
619+ - enum:
620+ - qcom,eliza-smmu-500
621+ - qcom,glymur-smmu-500
622+ - qcom,hawi-smmu-500
623+ - qcom,kaanapali-smmu-500
624+ - qcom,milos-smmu-500
625+ - qcom,nord-smmu-500
626+ - qcom,qcs615-smmu-500
627+ - qcom,qcs8300-smmu-500
628+ - qcom,sa8775p-smmu-500
629+ - qcom,shikra-smmu-500
630+ - qcom,sm6115-smmu-500
631+ - qcom,sm6125-smmu-500
632+ - qcom,sm8150-smmu-500
633+ - qcom,sm8250-smmu-500
634+ - qcom,sm8350-smmu-500
635+ - qcom,sm8450-smmu-500
636+ - qcom,sm8550-smmu-500
637+ - qcom,sm8650-smmu-500
638+ - qcom,sm8750-smmu-500
639+ - qcom,x1e80100-smmu-500
640+ - const: qcom,smmu-500
641+ - const: arm,mmu-500
642+ then:
643+ properties:
644+ clock-names: false
645+ clocks: false
646+
605647 - if:
606648 properties:
607649 compatible:
Documentation/devicetree/bindings/iommu/riscv,iommu.yaml+51−8
@@ -32,22 +32,35 @@ properties: · 31 unmodified lines
3232 # should be specified along with 'reg' property providing MMIO location.
3333 compatible:
3434 oneOf:
35− - items:
35+ - description: Platform (non-PCIe) IOMMU implementations
36+ items:
3637 - enum:
3738 - qemu,riscv-iommu
39+ - tenstorrent,riscv-iommu
3840 - const: riscv,iommu
39− - items:
41+ - description: PCIe IOMMU implementations
42+ items:
4043 - enum:
4144 - pci1efd,edf1
4245 - const: riscv,pci-iommu
4346
4447 reg:
45− maxItems: 1
46− description:
47− For non-PCI devices this represents base address and size of for the
48− IOMMU memory mapped registers interface.
49− For PCI IOMMU hardware implementation this should represent an address
50− of the IOMMU, as defined in the PCI Bus Binding reference.
48+ minItems: 1
49+ items:
50+ - description:
51+ For non-PCI devices, base address and size of the IOMMU memory
52+ mapped registers interface. For PCI IOMMU hardware
53+ implementation, an address of the IOMMU, as defined in the PCI
54+ Bus Binding reference.
55+ - description:
56+ Region containing platform specific MMRs for machine-mode
57+ configuration, such as PMA and PMP registers.
58+
59+ reg-names:
60+ minItems: 1
61+ items:
62+ - const: base
63+ - const: machine
5164
5265 '#iommu-cells':
5366 const: 1
@@ -75,6 +88,26 @@ required: · 21 unmodified lines
7588
7689 additionalProperties: false
7790
91+allOf:
92+ - if:
93+ properties:
94+ compatible:
95+ contains:
96+ enum:
97+ - tenstorrent,riscv-iommu
98+ then:
99+ properties:
100+ reg:
101+ minItems: 2
102+ reg-names:
103+ minItems: 2
104+ else:
105+ properties:
106+ reg:
107+ maxItems: 1
108+ reg-names:
109+ maxItems: 1
110+
78111 examples:
79112 - |+
80113 /* Example 1 (IOMMU device with wired interrupts) */
@@ -145,3 +178,13 @@ examples: · 64 unmodified lines
145178 };
146179 };
147180 };
181+
182+ - |+
183+ /* Example 5 (Tenstorrent IOMMU device with MSIs) */
184+ iommu5: iommu@d2020000 {
185+ compatible = "tenstorrent,riscv-iommu", "riscv,iommu";
186+ reg = <0xd2020000 0x10000>, <0xaa000000 0x10000>;
187+ reg-names = "base", "machine";
188+ msi-parent = <&imsics_smode>;
189+ #iommu-cells = <1>;
190+ };
Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml+71−0
@@ -0,0 +1,71 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/iommu/verisilicon,iommu.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Verisilicon IOMMU
8+
9+maintainers:
10+ - Benjamin Gaignard <benjamin.gaignard@collabora.com>
11+
12+description: |+
13+ A Versilicon iommu translates io virtual addresses to physical addresses for
14+ its associated video decoder.
15+
16+properties:
17+ compatible:
18+ items:
19+ - const: rockchip,rk3588-av1-iommu
20+ - const: verisilicon,iommu-1.2
21+
22+ reg:
23+ maxItems: 1
24+
25+ interrupts:
26+ maxItems: 1
27+
28+ clocks:
29+ items:
30+ - description: Core clock
31+ - description: Interface clock
32+
33+ clock-names:
34+ items:
35+ - const: core
36+ - const: iface
37+
38+ "#iommu-cells":
39+ const: 0
40+
41+ power-domains:
42+ maxItems: 1
43+
44+required:
45+ - compatible
46+ - reg
47+ - interrupts
48+ - clocks
49+ - clock-names
50+ - "#iommu-cells"
51+
52+additionalProperties: false
53+
54+examples:
55+ - |
56+ #include <dt-bindings/clock/rockchip,rk3588-cru.h>
57+ #include <dt-bindings/interrupt-controller/arm-gic.h>
58+
59+ bus {
60+ #address-cells = <2>;
61+ #size-cells = <2>;
62+
63+ iommu@fdca0000 {
64+ compatible = "rockchip,rk3588-av1-iommu","verisilicon,iommu-1.2";
65+ reg = <0x0 0xfdca0000 0x0 0x600>;
66+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>;
67+ clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>;
68+ clock-names = "core", "iface";
69+ #iommu-cells = <0>;
70+ };
71+ };
Documentation/devicetree/bindings/leds/backlight/maxim,max25014.yaml+83−0
@@ -0,0 +1,83 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/leds/backlight/maxim,max25014.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Maxim max25014 backlight controller
8+
9+maintainers:
10+ - Maud Spierings <maudspierings@gocontroll.com>
11+
12+properties:
13+ compatible:
14+ enum:
15+ - maxim,max25014
16+
17+ reg:
18+ maxItems: 1
19+
20+ default-brightness:
21+ minimum: 0
22+ maximum: 100
23+ default: 50
24+
25+ enable-gpios:
26+ maxItems: 1
27+
28+ interrupts:
29+ maxItems: 1
30+
31+ power-supply:
32+ description: Regulator which controls the boost converter input rail.
33+
34+ pwms:
35+ maxItems: 1
36+
37+ maxim,iset:
38+ $ref: /schemas/types.yaml#/definitions/uint32
39+ maximum: 15
40+ default: 11
41+ description:
42+ Value of the ISET field in the ISET register. This controls the current
43+ scale of the outputs, a higher number means more current.
44+
45+ maxim,strings:
46+ $ref: /schemas/types.yaml#/definitions/uint32-array
47+ description:
48+ A 4-bit bitfield that describes which led strings to turn on.
49+ minItems: 4
50+ maxItems: 4
51+ items:
52+ maximum: 1
53+ default:
54+ [1 1 1 1]
55+
56+required:
57+ - compatible
58+ - reg
59+
60+additionalProperties: false
61+
62+examples:
63+ - |
64+ #include <dt-bindings/gpio/gpio.h>
65+ #include <dt-bindings/interrupt-controller/irq.h>
66+
67+ i2c {
68+ #address-cells = <1>;
69+ #size-cells = <0>;
70+
71+ backlight@6f {
72+ compatible = "maxim,max25014";
73+ reg = <0x6f>;
74+ default-brightness = <50>;
75+ enable-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
76+ interrupt-parent = <&gpio1>;
77+ interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
78+ power-supply = <&reg_backlight>;
79+ pwms = <&pwm1>;
80+ maxim,iset = <7>;
81+ maxim,strings = <1 1 1 0>;
82+ };
83+ };
Documentation/devicetree/bindings/leds/irled/ir-spi-led.yaml+1−1
@@ -25,7 +25,7 @@ properties: · 24 unmodified lines
2525
2626 duty-cycle:
2727 $ref: /schemas/types.yaml#/definitions/uint8
28− enum: [50, 60, 70, 75, 80, 90]
28+ enum: [30, 50, 60, 70, 75, 80, 90]
2929 description:
3030 Percentage of one period in which the signal is active.
3131
Documentation/devicetree/bindings/leds/leds-lp55xx.yaml+1−1
@@ -183,7 +183,7 @@ examples: · 182 unmodified lines
183183 compatible = "ti,lp8501";
184184 reg = <0x32>;
185185 clock-mode = /bits/ 8 <2>;
186− pwr-sel = /bits/ 8 <3>; /* D1~9 connected to VOUT */
186+ pwr-sel = /bits/ 8 <3>; /* D1~9 connected to VOUT */
187187 ti,charge-pump-mode = <LP55XX_CP_BYPASS>;
188188
189189 led@0 {
Documentation/devicetree/bindings/leds/samsung,s2mu005-flash.yaml+52−0
@@ -0,0 +1,52 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/leds/samsung,s2mu005-flash.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Flash and Torch LED Controller for Samsung S2M series PMICs
8+
9+maintainers:
10+ - Kaustabh Chakraborty <kauschluss@disroot.org>
11+
12+description: |
13+ The Samsung S2M series PMIC flash LED has two led channels (typically
14+ as back and front camera flashes), with support for both torch and
15+ flash modes.
16+
17+ This is a part of device tree bindings for S2M and S5M family of Power
18+ Management IC (PMIC).
19+
20+ See also Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml for
21+ additional information and example.
22+
23+properties:
24+ compatible:
25+ enum:
26+ - samsung,s2mu005-flash
27+
28+ "#address-cells":
29+ const: 1
30+
31+ "#size-cells":
32+ const: 0
33+
34+patternProperties:
35+ "^led@[0-1]$":
36+ type: object
37+ $ref: common.yaml#
38+ unevaluatedProperties: false
39+
40+ properties:
41+ reg:
42+ enum: [0, 1]
43+
44+ required:
45+ - reg
46+
47+required:
48+ - compatible
49+ - "#address-cells"
50+ - "#size-cells"
51+
52+additionalProperties: false
Documentation/devicetree/bindings/leds/ti,lm3560.yaml+163−0
@@ -0,0 +1,163 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/leds/ti,lm3560.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: TI LM3560 Synchronous Boost Flash Driver
8+
9+maintainers:
10+ - Svyatoslav Ryhel <clamor95@gmail.com>
11+
12+description:
13+ The LM3560 is a 2-MHz fixed frequency synchronous boost converter with two
14+ 1000-mA constant current drivers for high-current white LEDs. The dual high-
15+ side current sources allow for grounded cathode LED operation and can be
16+ tied together for providing flash currents at up to 2 A through a single LED.
17+ An adaptive regulation method ensures the current for each LED remains in
18+ regulation and maximizes efficiency.
19+
20+properties:
21+ compatible:
22+ enum:
23+ - ti,lm3559
24+ - ti,lm3560
25+
26+ reg:
27+ maxItems: 1
28+
29+ '#address-cells':
30+ const: 1
31+
32+ '#size-cells':
33+ const: 0
34+
35+ enable-gpios:
36+ description: GPIO connected to the HWEN pin.
37+ maxItems: 1
38+
39+ vin-supply:
40+ description: Supply connected to the IN line.
41+
42+ flash-max-timeout-us:
43+ minimum: 32000
44+ maximum: 1024000
45+ default: 32000
46+
47+ ti,peak-current-microamp:
48+ description:
49+ The LM3560 features 4 selectable current limits 1.6A, 2.3A, 3A, and 3.6A
50+ (in case of LM3559 - 1.4A, 2.1A, 2.7A, and 3.2A). When the current limit
51+ is reached, the LM3559/LM3560 stops switching for the remainder of the
52+ switching cycle.
53+
54+patternProperties:
55+ '^led@[01]$':
56+ type: object
57+ $ref: /schemas/leds/common.yaml#
58+ description: LED control bank nodes.
59+ unevaluatedProperties: false
60+
61+ properties:
62+ reg:
63+ description: Control bank selection (0 = bank A, 1 = bank B).
64+ maximum: 1
65+
66+ required:
67+ - reg
68+ - flash-max-microamp
69+ - led-max-microamp
70+
71+allOf:
72+ - $ref: /schemas/leds/common.yaml#
73+ - if:
74+ properties:
75+ compatible:
76+ contains:
77+ const: ti,lm3559
78+ then:
79+ properties:
80+ ti,peak-current-microamp:
81+ enum: [1400000, 2100000, 2700000, 3200000]
82+ default: 1400000
83+ patternProperties:
84+ '^led@[01]$':
85+ properties:
86+ flash-max-microamp:
87+ minimum: 56250
88+ maximum: 900000
89+ led-max-microamp:
90+ minimum: 28125
91+ maximum: 225000
92+
93+ - if:
94+ properties:
95+ compatible:
96+ contains:
97+ const: ti,lm3560
98+ then:
99+ properties:
100+ ti,peak-current-microamp:
101+ enum: [1600000, 2300000, 3000000, 3600000]
102+ default: 1600000
103+ patternProperties:
104+ '^led@[01]$':
105+ properties:
106+ flash-max-microamp:
107+ minimum: 62500
108+ maximum: 1000000
109+ led-max-microamp:
110+ minimum: 31250
111+ maximum: 250000
112+
113+required:
114+ - compatible
115+ - reg
116+ - '#address-cells'
117+ - '#size-cells'
118+
119+additionalProperties: false
120+
121+examples:
122+ - |
123+ #include <dt-bindings/gpio/gpio.h>
124+ #include <dt-bindings/leds/common.h>
125+
126+ i2c {
127+ #address-cells = <1>;
128+ #size-cells = <0>;
129+
130+ led-controller@53 {
131+ compatible = "ti,lm3560";
132+ reg = <0x53>;
133+
134+ enable-gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
135+ vin-supply = <&vdd_3v3_sys>;
136+
137+ flash-max-timeout-us = <1024000>;
138+ ti,peak-current-microamp = <1600000>;
139+
140+ #address-cells = <1>;
141+ #size-cells = <0>;
142+
143+ led@0 {
144+ reg = <0>;
145+
146+ function = LED_FUNCTION_FLASH;
147+ color = <LED_COLOR_ID_WHITE>;
148+
149+ flash-max-microamp = <562500>;
150+ led-max-microamp = <156250>;
151+ };
152+
153+ led@1 {
154+ reg = <1>;
155+
156+ function = LED_FUNCTION_FLASH;
157+ color = <LED_COLOR_ID_YELLOW>;
158+
159+ flash-max-microamp = <562500>;
160+ led-max-microamp = <156250>;
161+ };
162+ };
163+ };
Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml+1−0
@@ -49,6 +49,7 @@ properties: · 48 unmodified lines
4949 - qcom,qcs615-apss-shared
5050 - qcom,sc7180-apss-shared
5151 - qcom,sc8180x-apss-shared
52+ - qcom,shikra-apss-shared
5253 - qcom,sm7150-apss-shared
5354 - qcom,sm8150-apss-shared
5455 - const: qcom,sdm845-apss-shared
Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml+2−0
@@ -19,7 +19,9 @@ properties: · 18 unmodified lines
1919 - items:
2020 - enum:
2121 - qcom,glymur-cpucp-mbox
22+ - qcom,hawi-cpucp-mbox
2223 - qcom,kaanapali-cpucp-mbox
24+ - qcom,nord-cpucp-mbox
2325 - qcom,sm8750-cpucp-mbox
2426 - const: qcom,x1e80100-cpucp-mbox
2527 - enum:
Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml+2−0
@@ -26,7 +26,9 @@ properties: · 25 unmodified lines
2626 - enum:
2727 - qcom,eliza-ipcc
2828 - qcom,glymur-ipcc
29+ - qcom,hawi-ipcc
2930 - qcom,kaanapali-ipcc
31+ - qcom,maili-ipcc
3032 - qcom,milos-ipcc
3133 - qcom,qcs8300-ipcc
3234 - qcom,qdu1000-ipcc
Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml+10−0
@@ -63,6 +63,16 @@ properties: · 62 unmodified lines
6363 CMA pool to use for buffers allocation instead of the default
6464 CMA pool.
6565
66+ # FIXME: This should be made required eventually once every SoC will
67+ # have the MBUS declared.
68+ interconnects:
69+ maxItems: 1
70+
71+ # FIXME: This should be made required eventually once every SoC will
72+ # have the MBUS declared.
73+ interconnect-names:
74+ const: dma-mem
75+
6676 required:
6777 - compatible
6878 - reg
Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml+6−0
@@ -40,6 +40,12 @@ properties: · 39 unmodified lines
4040 resets:
4141 maxItems: 1
4242
43+ interconnects:
44+ maxItems: 1
45+
46+ interconnect-names:
47+ const: dma-mem
48+
4349 port:
4450 $ref: /schemas/graph.yaml#/$defs/port-base
4551 description: Parallel input port, connect to a parallel sensor
Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml+6−0
@@ -36,6 +36,12 @@ properties: · 35 unmodified lines
3636 resets:
3737 maxItems: 1
3838
39+ interconnects:
40+ maxItems: 1
41+
42+ interconnect-names:
43+ const: dma-mem
44+
3945 ports:
4046 $ref: /schemas/graph.yaml#/properties/ports
4147
Documentation/devicetree/bindings/media/cnm,wave521c.yaml+1−1
@@ -37,7 +37,7 @@ properties: · 36 unmodified lines
3737 maxItems: 1
3838
3939 sram:
40− $ref: /schemas/types.yaml#/definitions/phandle
40+ maxItems: 1
4141 description:
4242 The VPU uses the SRAM to store some of the reference data instead of
4343 storing it on DMA memory. It is mainly used for the purpose of reducing
Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml+4−1
@@ -15,6 +15,9 @@ description: |- · 14 unmodified lines
1515 an I2C interface and outputs image data over a 8-bit parallel or 1-lane MIPI
1616 CSI-2 connection.
1717
18+allOf:
19+ - $ref: /schemas/media/video-interface-devices.yaml#
20+
1821 properties:
1922 compatible:
2023 enum:
@@ -90,7 +93,7 @@ required: · 69 unmodified lines
9093 - vaa-supply
9194 - port
9295
93−additionalProperties: false
96+unevaluatedProperties: false
9497
9598 examples:
9699 - |
Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml+1−1
@@ -160,7 +160,7 @@ examples: · 159 unmodified lines
160160
161161 vcodec_enc_vp8: vcodec@19002000 {
162162 compatible = "mediatek,mt8173-vcodec-enc-vp8";
163− reg = <0x19002000 0x1000>; /* VENC_LT_SYS */
163+ reg = <0x19002000 0x1000>; /* VENC_LT_SYS */
164164 interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>;
165165 iommus = <&iommu M4U_PORT_VENC_RCPU_SET2>,
166166 <&iommu M4U_PORT_VENC_REC_FRM_SET2>,
Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml+1−1
@@ -232,7 +232,7 @@ examples: · 231 unmodified lines
232232 #address-cells = <2>;
233233 #size-cells = <2>;
234234 ranges = <0 0 0 0x16000000 0 0x40000>;
235− reg = <0 0x16000000 0 0x1000>; /* VDEC_SYS */
235+ reg = <0 0x16000000 0 0x1000>; /* VDEC_SYS */
236236 video-codec@10000 {
237237 compatible = "mediatek,mtk-vcodec-lat";
238238 reg = <0 0x10000 0 0x800>;
Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml+3−3
@@ -56,10 +56,10 @@ properties: · 55 unmodified lines
5656 maxItems: 5 # Wrapper and 4 slots
5757
5858 sram:
59− $ref: /schemas/types.yaml#/definitions/phandle
59+ maxItems: 1
6060 description:
61− Optional phandle to a reserved on-chip SRAM regions. The SRAM can
62− be used for descriptor storage, which may improve bus utilization.
61+ The SRAM can be used for descriptor storage, which may improve bus
62+ utilization.
6363
6464 required:
6565 - compatible
Documentation/devicetree/bindings/media/qcom,msm8939-venus.yaml+79−0
@@ -0,0 +1,79 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/media/qcom,msm8939-venus.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm MSM8939 Venus video encode and decode accelerators
8+
9+maintainers:
10+ - André Apitzsch <git@apitzsch.eu>
11+ - Erikas Bitovtas <xerikasxx@gmail.com>
12+
13+description:
14+ The Venus IP is a video encode and decode accelerator present
15+ on Qualcomm platforms
16+
17+allOf:
18+ - $ref: qcom,venus-common.yaml#
19+
20+properties:
21+ compatible:
22+ const: qcom,msm8939-venus
23+
24+ power-domains:
25+ maxItems: 3
26+
27+ power-domain-names:
28+ items:
29+ - const: venus
30+ - const: vcodec0
31+ - const: vcodec1
32+
33+ clocks:
34+ maxItems: 5
35+
36+ clock-names:
37+ items:
38+ - const: core
39+ - const: iface
40+ - const: bus
41+ - const: vcodec0_core
42+ - const: vcodec1_core
43+
44+ iommus:
45+ maxItems: 1
46+
47+required:
48+ - compatible
49+ - iommus
50+ - power-domain-names
51+
52+unevaluatedProperties: false
53+
54+examples:
55+ - |
56+ #include <dt-bindings/interrupt-controller/arm-gic.h>
57+ #include <dt-bindings/clock/qcom,gcc-msm8939.h>
58+
59+ video-codec@1d00000 {
60+ compatible = "qcom,msm8939-venus";
61+ reg = <0x01d00000 0xff000>;
62+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
63+ clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
64+ <&gcc GCC_VENUS0_AHB_CLK>,
65+ <&gcc GCC_VENUS0_AXI_CLK>,
66+ <&gcc GCC_VENUS0_CORE0_VCODEC0_CLK>,
67+ <&gcc GCC_VENUS0_CORE1_VCODEC0_CLK>;
68+ clock-names = "core",
69+ "iface",
70+ "bus",
71+ "vcodec0_core",
72+ "vcodec1_core";
73+ power-domains = <&gcc VENUS_GDSC>,
74+ <&gcc VENUS_CORE0_GDSC>,
75+ <&gcc VENUS_CORE1_GDSC>;
76+ power-domain-names = "venus", "vcodec0", "vcodec1";
77+ iommus = <&apps_iommu 5>;
78+ memory-region = <&venus_mem>;
79+ };
Documentation/devicetree/bindings/media/qcom,qcm2290-venus.yaml+5−1
@@ -18,7 +18,11 @@ allOf: · 17 unmodified lines
1818
1919 properties:
2020 compatible:
21− const: qcom,qcm2290-venus
21+ oneOf:
22+ - items:
23+ - const: qcom,sm6115-venus
24+ - const: qcom,qcm2290-venus
25+ - const: qcom,qcm2290-venus
2226
2327 power-domains:
2428 maxItems: 3
Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml+15−0
@@ -91,6 +91,21 @@ properties: · 90 unmodified lines
9191 deprecated: true
9292 additionalProperties: false
9393
94+ video-firmware:
95+ type: object
96+ additionalProperties: false
97+
98+ description: |
99+ Firmware subnode is needed when the platform does not
100+ have TrustZone.
101+
102+ properties:
103+ iommus:
104+ maxItems: 1
105+
106+ required:
107+ - iommus
108+
94109 required:
95110 - compatible
96111 - power-domain-names
Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml+2−8
@@ -43,8 +43,7 @@ properties: · 42 unmodified lines
4343 - const: vcodec_bus
4444
4545 iommus:
46− minItems: 1
47− maxItems: 2
46+ maxItems: 1
4847
4948 interconnects:
5049 maxItems: 2
@@ -120,12 +119,7 @@ examples: · 69 unmodified lines
120119 <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>;
121120 interconnect-names = "cpu-cfg", "video-mem";
122121
123− iommus = <&apps_smmu 0x2180 0x20>,
124− <&apps_smmu 0x2184 0x20>;
122+ iommus = <&apps_smmu 0x2180 0x20>;
125123
126124 memory-region = <&video_mem>;
127−
128− video-firmware {
129− iommus = <&apps_smmu 0x21a2 0x0>;
130− };
131125 };
Documentation/devicetree/bindings/media/qcom,sm6350-camss.yaml+471−0
@@ -0,0 +1,471 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/media/qcom,sm6350-camss.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm SM6350 Camera Subsystem (CAMSS)
8+
9+maintainers:
10+ - Luca Weiss <luca.weiss@fairphone.com>
11+
12+description:
13+ The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms.
14+
15+properties:
16+ compatible:
17+ const: qcom,sm6350-camss
18+
19+ reg:
20+ maxItems: 24
21+
22+ reg-names:
23+ items:
24+ - const: csid0
25+ - const: csid1
26+ - const: csid2
27+ - const: csid_lite
28+ - const: csiphy0
29+ - const: csiphy1
30+ - const: csiphy2
31+ - const: csiphy3
32+ - const: vfe0
33+ - const: vfe1
34+ - const: vfe2
35+ - const: vfe_lite
36+ - const: a5_csr
37+ - const: a5_qgic
38+ - const: a5_sierra
39+ - const: bps
40+ - const: camnoc
41+ - const: core_top_csr_tcsr
42+ - const: cpas_cdm
43+ - const: cpas_top
44+ - const: ipe
45+ - const: jpeg_dma
46+ - const: jpeg_enc
47+ - const: lrme
48+
49+ clocks:
50+ maxItems: 39
51+
52+ clock-names:
53+ items:
54+ - const: cam_axi
55+ - const: soc_ahb
56+ - const: camnoc_axi
57+ - const: core_ahb
58+ - const: cpas_ahb
59+ - const: csiphy0
60+ - const: csiphy0_timer
61+ - const: csiphy1
62+ - const: csiphy1_timer
63+ - const: csiphy2
64+ - const: csiphy2_timer
65+ - const: csiphy3
66+ - const: csiphy3_timer
67+ - const: vfe0_axi
68+ - const: vfe0
69+ - const: vfe0_cphy_rx
70+ - const: vfe0_csid
71+ - const: vfe1_axi
72+ - const: vfe1
73+ - const: vfe1_cphy_rx
74+ - const: vfe1_csid
75+ - const: vfe2_axi
76+ - const: vfe2
77+ - const: vfe2_cphy_rx
78+ - const: vfe2_csid
79+ - const: vfe_lite
80+ - const: vfe_lite_cphy_rx
81+ - const: vfe_lite_csid
82+ - const: bps
83+ - const: bps_ahb
84+ - const: bps_areg
85+ - const: bps_axi
86+ - const: icp
87+ - const: ipe0
88+ - const: ipe0_ahb
89+ - const: ipe0_areg
90+ - const: ipe0_axi
91+ - const: jpeg
92+ - const: lrme
93+
94+ interrupts:
95+ maxItems: 18
96+
97+ interrupt-names:
98+ items:
99+ - const: csid0
100+ - const: csid1
101+ - const: csid2
102+ - const: csid_lite
103+ - const: csiphy0
104+ - const: csiphy1
105+ - const: csiphy2
106+ - const: csiphy3
107+ - const: vfe0
108+ - const: vfe1
109+ - const: vfe2
110+ - const: vfe_lite
111+ - const: a5
112+ - const: cpas
113+ - const: cpas_cdm
114+ - const: jpeg_dma
115+ - const: jpeg_enc
116+ - const: lrme
117+
118+ interconnects:
119+ maxItems: 4
120+
121+ interconnect-names:
122+ items:
123+ - const: ahb
124+ - const: hf_mnoc
125+ - const: sf_mnoc
126+ - const: sf_icp_mnoc
127+
128+ iommus:
129+ maxItems: 14
130+
131+ power-domains:
132+ maxItems: 6
133+
134+ power-domain-names:
135+ items:
136+ - const: ife0
137+ - const: ife1
138+ - const: ife2
139+ - const: top
140+ - const: bps
141+ - const: ipe
142+
143+ vdd-csiphy0-0p9-supply:
144+ description:
145+ Phandle to a 0.9V regulator supply to CSIPHY0.
146+
147+ vdd-csiphy0-1p25-supply:
148+ description:
149+ Phandle to a 1.25V regulator supply to CSIPHY0.
150+
151+ vdd-csiphy1-0p9-supply:
152+ description:
153+ Phandle to a 0.9V regulator supply to CSIPHY1.
154+
155+ vdd-csiphy1-1p25-supply:
156+ description:
157+ Phandle to a 1.25V regulator supply to CSIPHY1.
158+
159+ vdd-csiphy2-0p9-supply:
160+ description:
161+ Phandle to a 0.9V regulator supply to CSIPHY2.
162+
163+ vdd-csiphy2-1p25-supply:
164+ description:
165+ Phandle to a 1.25V regulator supply to CSIPHY2.
166+
167+ vdd-csiphy3-0p9-supply:
168+ description:
169+ Phandle to a 0.9V regulator supply to CSIPHY3.
170+
171+ vdd-csiphy3-1p25-supply:
172+ description:
173+ Phandle to a 1.25V regulator supply to CSIPHY3.
174+
175+ ports:
176+ $ref: /schemas/graph.yaml#/properties/ports
177+
178+ description:
179+ CSI input ports.
180+
181+ patternProperties:
182+ "^port@[0-3]$":
183+ $ref: /schemas/graph.yaml#/$defs/port-base
184+ unevaluatedProperties: false
185+
186+ description:
187+ Input port for receiving CSI data from a CSIPHY.
188+
189+ properties:
190+ endpoint:
191+ $ref: video-interfaces.yaml#
192+ unevaluatedProperties: false
193+
194+ properties:
195+ data-lanes:
196+ minItems: 1
197+ maxItems: 4
198+
199+ bus-type:
200+ enum:
201+ - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
202+ - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
203+
204+ required:
205+ - data-lanes
206+
207+required:
208+ - compatible
209+ - reg
210+ - reg-names
211+ - clocks
212+ - clock-names
213+ - interrupts
214+ - interrupt-names
215+ - interconnects
216+ - interconnect-names
217+ - iommus
218+ - power-domains
219+ - power-domain-names
220+ - ports
221+
222+additionalProperties: false
223+
224+examples:
225+ - |
226+ #include <dt-bindings/clock/qcom,gcc-sm6350.h>
227+ #include <dt-bindings/clock/qcom,sm6350-camcc.h>
228+ #include <dt-bindings/interconnect/qcom,icc.h>
229+ #include <dt-bindings/interconnect/qcom,sm6350.h>
230+ #include <dt-bindings/interrupt-controller/arm-gic.h>
231+ #include <dt-bindings/media/video-interfaces.h>
232+ #include <dt-bindings/power/qcom-rpmpd.h>
233+
234+ soc {
235+ #address-cells = <2>;
236+ #size-cells = <2>;
237+
238+ isp@acb3000 {
239+ compatible = "qcom,sm6350-camss";
240+
241+ reg = <0x0 0x0acb3000 0x0 0x1000>,
242+ <0x0 0x0acba000 0x0 0x1000>,
243+ <0x0 0x0acc1000 0x0 0x1000>,
244+ <0x0 0x0acc8000 0x0 0x1000>,
245+ <0x0 0x0ac65000 0x0 0x1000>,
246+ <0x0 0x0ac66000 0x0 0x1000>,
247+ <0x0 0x0ac67000 0x0 0x1000>,
248+ <0x0 0x0ac68000 0x0 0x1000>,
249+ <0x0 0x0acaf000 0x0 0x4000>,
250+ <0x0 0x0acb6000 0x0 0x4000>,
251+ <0x0 0x0acbd000 0x0 0x4000>,
252+ <0x0 0x0acc4000 0x0 0x4000>,
253+ <0x0 0x0ac18000 0x0 0x3000>,
254+ <0x0 0x0ac00000 0x0 0x6000>,
255+ <0x0 0x0ac10000 0x0 0x8000>,
256+ <0x0 0x0ac6f000 0x0 0x8000>,
257+ <0x0 0x0ac42000 0x0 0x4600>,
258+ <0x0 0x01fc0000 0x0 0x40000>,
259+ <0x0 0x0ac48000 0x0 0x1000>,
260+ <0x0 0x0ac40000 0x0 0x1000>,
261+ <0x0 0x0ac87000 0x0 0xa000>,
262+ <0x0 0x0ac52000 0x0 0x4000>,
263+ <0x0 0x0ac4e000 0x0 0x4000>,
264+ <0x0 0x0ac6b000 0x0 0xa00>;
265+ reg-names = "csid0",
266+ "csid1",
267+ "csid2",
268+ "csid_lite",
269+ "csiphy0",
270+ "csiphy1",
271+ "csiphy2",
272+ "csiphy3",
273+ "vfe0",
274+ "vfe1",
275+ "vfe2",
276+ "vfe_lite",
277+ "a5_csr",
278+ "a5_qgic",
279+ "a5_sierra",
280+ "bps",
281+ "camnoc",
282+ "core_top_csr_tcsr",
283+ "cpas_cdm",
284+ "cpas_top",
285+ "ipe",
286+ "jpeg_dma",
287+ "jpeg_enc",
288+ "lrme";
289+
290+ clocks = <&gcc GCC_CAMERA_AXI_CLK>,
291+ <&camcc CAMCC_SOC_AHB_CLK>,
292+ <&camcc CAMCC_CAMNOC_AXI_CLK>,
293+ <&camcc CAMCC_CORE_AHB_CLK>,
294+ <&camcc CAMCC_CPAS_AHB_CLK>,
295+ <&camcc CAMCC_CSIPHY0_CLK>,
296+ <&camcc CAMCC_CSI0PHYTIMER_CLK>,
297+ <&camcc CAMCC_CSIPHY1_CLK>,
298+ <&camcc CAMCC_CSI1PHYTIMER_CLK>,
299+ <&camcc CAMCC_CSIPHY2_CLK>,
300+ <&camcc CAMCC_CSI2PHYTIMER_CLK>,
301+ <&camcc CAMCC_CSIPHY3_CLK>,
302+ <&camcc CAMCC_CSI3PHYTIMER_CLK>,
303+ <&camcc CAMCC_IFE_0_AXI_CLK>,
304+ <&camcc CAMCC_IFE_0_CLK>,
305+ <&camcc CAMCC_IFE_0_CPHY_RX_CLK>,
306+ <&camcc CAMCC_IFE_0_CSID_CLK>,
307+ <&camcc CAMCC_IFE_1_AXI_CLK>,
308+ <&camcc CAMCC_IFE_1_CLK>,
309+ <&camcc CAMCC_IFE_1_CPHY_RX_CLK>,
310+ <&camcc CAMCC_IFE_1_CSID_CLK>,
311+ <&camcc CAMCC_IFE_2_AXI_CLK>,
312+ <&camcc CAMCC_IFE_2_CLK>,
313+ <&camcc CAMCC_IFE_2_CPHY_RX_CLK>,
314+ <&camcc CAMCC_IFE_2_CSID_CLK>,
315+ <&camcc CAMCC_IFE_LITE_CLK>,
316+ <&camcc CAMCC_IFE_LITE_CPHY_RX_CLK>,
317+ <&camcc CAMCC_IFE_LITE_CSID_CLK>,
318+ <&camcc CAMCC_BPS_CLK>,
319+ <&camcc CAMCC_BPS_AHB_CLK>,
320+ <&camcc CAMCC_BPS_AREG_CLK>,
321+ <&camcc CAMCC_BPS_AXI_CLK>,
322+ <&camcc CAMCC_ICP_CLK>,
323+ <&camcc CAMCC_IPE_0_CLK>,
324+ <&camcc CAMCC_IPE_0_AHB_CLK>,
325+ <&camcc CAMCC_IPE_0_AREG_CLK>,
326+ <&camcc CAMCC_IPE_0_AXI_CLK>,
327+ <&camcc CAMCC_JPEG_CLK>,
328+ <&camcc CAMCC_LRME_CLK>;
329+ clock-names = "cam_axi",
330+ "soc_ahb",
331+ "camnoc_axi",
332+ "core_ahb",
333+ "cpas_ahb",
334+ "csiphy0",
335+ "csiphy0_timer",
336+ "csiphy1",
337+ "csiphy1_timer",
338+ "csiphy2",
339+ "csiphy2_timer",
340+ "csiphy3",
341+ "csiphy3_timer",
342+ "vfe0_axi",
343+ "vfe0",
344+ "vfe0_cphy_rx",
345+ "vfe0_csid",
346+ "vfe1_axi",
347+ "vfe1",
348+ "vfe1_cphy_rx",
349+ "vfe1_csid",
350+ "vfe2_axi",
351+ "vfe2",
352+ "vfe2_cphy_rx",
353+ "vfe2_csid",
354+ "vfe_lite",
355+ "vfe_lite_cphy_rx",
356+ "vfe_lite_csid",
357+ "bps",
358+ "bps_ahb",
359+ "bps_areg",
360+ "bps_axi",
361+ "icp",
362+ "ipe0",
363+ "ipe0_ahb",
364+ "ipe0_areg",
365+ "ipe0_axi",
366+ "jpeg",
367+ "lrme";
368+
369+ interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
370+ <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
371+ <GIC_SPI 717 IRQ_TYPE_EDGE_RISING>,
372+ <GIC_SPI 473 IRQ_TYPE_EDGE_RISING>,
373+ <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
374+ <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
375+ <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
376+ <GIC_SPI 461 IRQ_TYPE_EDGE_RISING>,
377+ <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
378+ <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
379+ <GIC_SPI 718 IRQ_TYPE_EDGE_RISING>,
380+ <GIC_SPI 472 IRQ_TYPE_EDGE_RISING>,
381+ <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>,
382+ <GIC_SPI 459 IRQ_TYPE_EDGE_RISING>,
383+ <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>,
384+ <GIC_SPI 475 IRQ_TYPE_EDGE_RISING>,
385+ <GIC_SPI 474 IRQ_TYPE_EDGE_RISING>,
386+ <GIC_SPI 476 IRQ_TYPE_EDGE_RISING>;
387+ interrupt-names = "csid0",
388+ "csid1",
389+ "csid2",
390+ "csid_lite",
391+ "csiphy0",
392+ "csiphy1",
393+ "csiphy2",
394+ "csiphy3",
395+ "vfe0",
396+ "vfe1",
397+ "vfe2",
398+ "vfe_lite",
399+ "a5",
400+ "cpas",
401+ "cpas_cdm",
402+ "jpeg_dma",
403+ "jpeg_enc",
404+ "lrme";
405+
406+ interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
407+ &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
408+ <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS
409+ &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>,
410+ <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS
411+ &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>,
412+ <&mmss_noc MASTER_CAMNOC_ICP QCOM_ICC_TAG_ALWAYS
413+ &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>;
414+ interconnect-names = "ahb",
415+ "hf_mnoc",
416+ "sf_mnoc",
417+ "sf_icp_mnoc";
418+
419+ iommus = <&apps_smmu 0x820 0xc0>,
420+ <&apps_smmu 0x840 0x0>,
421+ <&apps_smmu 0x860 0xc0>,
422+ <&apps_smmu 0x880 0x0>,
423+ <&apps_smmu 0xc40 0x20>,
424+ <&apps_smmu 0xc60 0x20>,
425+ <&apps_smmu 0xc80 0x0>,
426+ <&apps_smmu 0xca2 0x0>,
427+ <&apps_smmu 0xcc0 0x20>,
428+ <&apps_smmu 0xce0 0x20>,
429+ <&apps_smmu 0xd00 0x20>,
430+ <&apps_smmu 0xd20 0x20>,
431+ <&apps_smmu 0xd40 0x20>,
432+ <&apps_smmu 0xd60 0x20>;
433+
434+ power-domains = <&camcc IFE_0_GDSC>,
435+ <&camcc IFE_1_GDSC>,
436+ <&camcc IFE_2_GDSC>,
437+ <&camcc TITAN_TOP_GDSC>,
438+ <&camcc BPS_GDSC>,
439+ <&camcc IPE_0_GDSC>;
440+ power-domain-names = "ife0",
441+ "ife1",
442+ "ife2",
443+ "top",
444+ "bps",
445+ "ipe";
446+
447+ vdd-csiphy0-0p9-supply = <&vreg_l18a>;
448+ vdd-csiphy0-1p25-supply = <&vreg_l22a>;
449+ vdd-csiphy1-0p9-supply = <&vreg_l18a>;
450+ vdd-csiphy1-1p25-supply = <&vreg_l22a>;
451+ vdd-csiphy2-0p9-supply = <&vreg_l18a>;
452+ vdd-csiphy2-1p25-supply = <&vreg_l22a>;
453+ vdd-csiphy3-0p9-supply = <&vreg_l18a>;
454+ vdd-csiphy3-1p25-supply = <&vreg_l22a>;
455+
456+ ports {
457+ #address-cells = <1>;
458+ #size-cells = <0>;
459+
460+ port@0 {
461+ reg = <0>;
462+
463+ csiphy0_ep: endpoint {
464+ data-lanes = <0 1 2 3>;
465+ bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
466+ remote-endpoint = <&sensor_ep>;
467+ };
468+ };
469+ };
470+ };
471+ };
Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml+17−6
@@ -10,19 +10,25 @@ maintainers: · 9 unmodified lines
1010 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
1111
1212 description: |
13− The Venus IP is a video encode and decode accelerator present
14− on Qualcomm platforms
13+ The Iris v2.xx IP is a video encode and decode accelerator present on
14+ Qualcomm platforms
1515
1616 allOf:
1717 - $ref: qcom,venus-common.yaml#
1818
1919 properties:
2020 compatible:
21− const: qcom,sm8250-venus
21+ oneOf:
22+ - const: qcom,sm8250-venus
23+ - items:
24+ - enum:
25+ - qcom,sc8280xp-iris
26+ - qcom,sm8350-iris
27+ - const: qcom,sm8250-venus
2228
2329 power-domains:
2430 minItems: 2
25− maxItems: 3
31+ maxItems: 4
2632
2733 power-domain-names:
2834 minItems: 2
@@ -30,6 +36,7 @@ properties: · 1 unmodified line
3036 - const: venus
3137 - const: vcodec0
3238 - const: mx
39+ - const: mmcx
3340
3441 clocks:
3542 maxItems: 3
@@ -114,8 +121,12 @@ examples: · 78 unmodified lines
114121 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
115122 power-domains = <&videocc MVS0C_GDSC>,
116123 <&videocc MVS0_GDSC>,
117− <&rpmhpd RPMHPD_MX>;
118− power-domain-names = "venus", "vcodec0", "mx";
124+ <&rpmhpd RPMHPD_MX>,
125+ <&rpmhpd RPMHPD_MMCX>;
126+ power-domain-names = "venus",
127+ "vcodec0",
128+ "mx",
129+ "mmcx";
119130
120131 clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
121132 <&videocc VIDEO_CC_MVS0C_CLK>,
Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml+22−1
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
2626 - qcom,qcs8300-iris
2727 - qcom,sm8550-iris
2828 - qcom,sm8650-iris
29+ - qcom,x1p42100-iris
2930
3031 reg:
3132 maxItems: 1
@@ -41,13 +42,16 @@ properties: · 9 unmodified lines
4142 - const: mmcx
4243
4344 clocks:
44− maxItems: 3
45+ minItems: 3
46+ maxItems: 4
4547
4648 clock-names:
49+ minItems: 3
4750 items:
4851 - const: iface
4952 - const: core
5053 - const: vcodec0_core
54+ - const: vcodec0_bse
5155
5256 firmware-name:
5357 maxItems: 1
@@ -115,6 +119,23 @@ allOf: · 61 unmodified lines
115119 maxItems: 1
116120 reset-names:
117121 maxItems: 1
122+ - if:
123+ properties:
124+ compatible:
125+ enum:
126+ - qcom,x1p42100-iris
127+ then:
128+ properties:
129+ clocks:
130+ minItems: 4
131+ clock-names:
132+ minItems: 4
133+ else:
134+ properties:
135+ clocks:
136+ maxItems: 3
137+ clock-names:
138+ maxItems: 3
118139
119140 unevaluatedProperties: false
120141
Documentation/devicetree/bindings/media/qcom,venus-common.yaml+0−15
@@ -47,21 +47,6 @@ properties: · 46 unmodified lines
4747 minItems: 1
4848 maxItems: 4
4949
50− video-firmware:
51− type: object
52− additionalProperties: false
53−
54− description: |
55− Firmware subnode is needed when the platform does not
56− have TrustZone.
57−
58− properties:
59− iommus:
60− maxItems: 1
61−
62− required:
63− - iommus
64−
6550 required:
6651 - reg
6752 - clocks
Documentation/devicetree/bindings/media/renesas,fcp.yaml+4−0
@@ -30,6 +30,8 @@ properties: · 29 unmodified lines
3030 - renesas,r9a07g043u-fcpvd # RZ/G2UL
3131 - renesas,r9a07g044-fcpvd # RZ/G2{L,LC}
3232 - renesas,r9a07g054-fcpvd # RZ/V2L
33+ - renesas,r9a08g046-fcpvd # RZ/G3L
34+ - renesas,r9a09g047-fcpvd # RZ/G3E
3335 - renesas,r9a09g056-fcpvd # RZ/V2N
3436 - renesas,r9a09g057-fcpvd # RZ/V2H(P)
3537 - const: renesas,fcpv # Generic FCP for VSP fallback
@@ -77,6 +79,8 @@ allOf: · 41 unmodified lines
7779 - renesas,r9a07g043u-fcpvd
7880 - renesas,r9a07g044-fcpvd
7981 - renesas,r9a07g054-fcpvd
82+ - renesas,r9a08g046-fcpvd
83+ - renesas,r9a09g047-fcpvd
8084 - renesas,r9a09g056-fcpvd
8185 - renesas,r9a09g057-fcpvd
8286 then:
Documentation/devicetree/bindings/media/renesas,vsp1.yaml+2−0
@@ -25,6 +25,8 @@ properties: · 24 unmodified lines
2525 - enum:
2626 - renesas,r9a07g043u-vsp2 # RZ/G2UL
2727 - renesas,r9a07g054-vsp2 # RZ/V2L
28+ - renesas,r9a08g046-vsp2 # RZ/G3L
29+ - renesas,r9a09g047-vsp2 # RZ/G3E
2830 - renesas,r9a09g056-vsp2 # RZ/V2N
2931 - renesas,r9a09g057-vsp2 # RZ/V2H(P)
3032 - const: renesas,r9a07g044-vsp2 # RZ/G2L fallback
Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml+24−3
@@ -16,9 +16,15 @@ description: · 15 unmodified lines
1616
1717 properties:
1818 compatible:
19− enum:
20− - fsl,imx93-mipi-csi2
21− - rockchip,rk3568-mipi-csi2
19+ oneOf:
20+ - enum:
21+ - fsl,imx93-mipi-csi2
22+ - fsl,imx95-mipi-csi2
23+ - rockchip,rk3568-mipi-csi2
24+ - items:
25+ - enum:
26+ - rockchip,rk3588-mipi-csi2
27+ - const: rockchip,rk3568-mipi-csi2
2228
2329 reg:
2430 maxItems: 1
@@ -135,6 +141,21 @@ allOf: · 110 unmodified lines
135141 clock-names:
136142 minItems: 2
137143
144+ - if:
145+ properties:
146+ compatible:
147+ contains:
148+ const: fsl,imx95-mipi-csi2
149+ then:
150+ properties:
151+ interrupts:
152+ maxItems: 1
153+ interrupt-names: false
154+ clocks:
155+ maxItems: 1
156+ clock-names:
157+ maxItems: 1
158+
138159 examples:
139160 - |
140161 #include <dt-bindings/clock/rk3568-cru.h>
Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml+154−19
@@ -15,9 +15,15 @@ description: · 14 unmodified lines
1515 the data from camera sensors, video decoders, or other companion ICs and
1616 transfers it into system main memory by AXI bus.
1717
18+ The Rockchip RK3588 Video Capture (VICAP) is similar to its RK3568
19+ counterpart, but features six MIPI CSI-2 ports and additional connections
20+ to the image signal processor (ISP) blocks.
21+
1822 properties:
1923 compatible:
20− const: rockchip,rk3568-vicap
24+ enum:
25+ - rockchip,rk3568-vicap
26+ - rockchip,rk3588-vicap
2127
2228 reg:
2329 maxItems: 1
@@ -26,11 +32,8 @@ properties: · 2 unmodified lines
2632 maxItems: 1
2733
2834 clocks:
29− items:
30− - description: ACLK
31− - description: HCLK
32− - description: DCLK
33− - description: ICLK
35+ minItems: 4
36+ maxItems: 5
3437
3538 clock-names:
3639 items:
@@ -38,25 +41,19 @@ properties: · 1 unmodified line
3841 - const: hclk
3942 - const: dclk
4043 - const: iclk
44+ - const: iclk1
45+ minItems: 4
4146
4247 iommus:
4348 maxItems: 1
4449
4550 resets:
46− items:
47− - description: ARST
48− - description: HRST
49− - description: DRST
50− - description: PRST
51− - description: IRST
51+ minItems: 5
52+ maxItems: 9
5253
5354 reset-names:
54− items:
55− - const: arst
56− - const: hrst
57− - const: drst
58− - const: prst
59− - const: irst
55+ minItems: 5
56+ maxItems: 9
6057
6158 rockchip,grf:
6259 $ref: /schemas/types.yaml#/definitions/phandle
@@ -67,8 +64,15 @@ properties: · 4 unmodified lines
6764
6865 ports:
6966 $ref: /schemas/graph.yaml#/properties/ports
67+ additionalProperties: false
7068
7169 properties:
70+ "#address-cells":
71+ const: 1
72+
73+ "#size-cells":
74+ const: 0
75+
7276 port@0:
7377 $ref: /schemas/graph.yaml#/$defs/port-base
7478 unevaluatedProperties: false
@@ -100,13 +104,75 @@ properties: · 25 unmodified lines
100104
101105 port@1:
102106 $ref: /schemas/graph.yaml#/properties/port
103− description: Port connected to the MIPI CSI-2 receiver output.
107+ description: Port connected to the MIPI CSI-2 receiver 0 output.
108+
109+ properties:
110+ endpoint:
111+ $ref: video-interfaces.yaml#
112+ unevaluatedProperties: false
113+
114+ port@2:
115+ $ref: /schemas/graph.yaml#/properties/port
116+ description: Port connected to the MIPI CSI-2 receiver 1 output.
104117
105118 properties:
106119 endpoint:
107120 $ref: video-interfaces.yaml#
108121 unevaluatedProperties: false
109122
123+ port@3:
124+ $ref: /schemas/graph.yaml#/properties/port
125+ description: Port connected to the MIPI CSI-2 receiver 2 output.
126+
127+ properties:
128+ endpoint:
129+ $ref: video-interfaces.yaml#
130+ unevaluatedProperties: false
131+
132+ port@4:
133+ $ref: /schemas/graph.yaml#/properties/port
134+ description: Port connected to the MIPI CSI-2 receiver 3 output.
135+
136+ properties:
137+ endpoint:
138+ $ref: video-interfaces.yaml#
139+ unevaluatedProperties: false
140+
141+ port@5:
142+ $ref: /schemas/graph.yaml#/properties/port
143+ description: Port connected to the MIPI CSI-2 receiver 4 output.
144+
145+ properties:
146+ endpoint:
147+ $ref: video-interfaces.yaml#
148+ unevaluatedProperties: false
149+
150+ port@6:
151+ $ref: /schemas/graph.yaml#/properties/port
152+ description: Port connected to the MIPI CSI-2 receiver 5 output.
153+
154+ properties:
155+ endpoint:
156+ $ref: video-interfaces.yaml#
157+ unevaluatedProperties: false
158+
159+ port@10:
160+ $ref: /schemas/graph.yaml#/properties/port
161+ description: Port connected to the ISP0 input.
162+
163+ properties:
164+ endpoint:
165+ $ref: video-interfaces.yaml#
166+ unevaluatedProperties: false
167+
168+ port@11:
169+ $ref: /schemas/graph.yaml#/properties/port
170+ description: Port connected to the ISP1 input.
171+
172+ properties:
173+ endpoint:
174+ $ref: video-interfaces.yaml#
175+ unevaluatedProperties: false
110176 required:
111177 - compatible
112178 - reg
@@ -114,6 +180,75 @@ required: · 1 unmodified line
114180 - clocks
115181 - ports
116182
183+allOf:
184+ - if:
185+ properties:
186+ compatible:
187+ contains:
188+ const: rockchip,rk3568-vicap
189+ then:
190+ properties:
191+ clocks:
192+ maxItems: 4
193+
194+ clock-names:
195+ maxItems: 4
196+
197+ resets:
198+ maxItems: 5
199+
200+ reset-names:
201+ items:
202+ - const: arst
203+ - const: hrst
204+ - const: drst
205+ - const: prst
206+ - const: irst
207+
208+ ports:
209+ properties:
210+ port@2: false
211+
212+ port@3: false
213+
214+ port@4: false
215+
216+ port@5: false
217+
218+ port@6: false
219+
220+ port@10: false
221+
222+ port@11: false
223+
224+ - if:
225+ properties:
226+ compatible:
227+ contains:
228+ const: rockchip,rk3588-vicap
229+ then:
230+ properties:
231+ clocks:
232+ minItems: 5
233+
234+ clock-names:
235+ minItems: 5
236+
237+ resets:
238+ minItems: 9
239+
240+ reset-names:
241+ items:
242+ - const: arst
243+ - const: hrst
244+ - const: drst
245+ - const: irst0
246+ - const: irst1
247+ - const: irst2
248+ - const: irst3
249+ - const: irst4
250+ - const: irst5
251+
117252 additionalProperties: false
118253
119254 examples:
Documentation/devicetree/bindings/media/rockchip,vdec.yaml+2−3
@@ -91,9 +91,8 @@ properties: · 90 unmodified lines
9191 maxItems: 1
9292
9393 sram:
94− $ref: /schemas/types.yaml#/definitions/phandle
95− description: |
96− phandle to a reserved on-chip SRAM regions.
94+ maxItems: 1
95+ description:
9796 Some SoCs, like rk3588 provide on-chip SRAM to store temporary
9897 buffers during decoding.
9998
Documentation/devicetree/bindings/media/rockchip-rga.yaml+9−1
@@ -9,7 +9,11 @@ title: Rockchip 2D raster graphic acceleration controller (RGA) · 8 unmodified lines
99 description:
1010 RGA is a standalone 2D raster graphic acceleration unit. It accelerates 2D
1111 graphics operations, such as point/line drawing, image scaling, rotation,
12− BitBLT, alpha blending and image blur/sharpness.
12+ BitBLT, alpha blending and image blur/sharpness. There exist many versions
13+ of this unit that differ in the supported inputs/output formats,
14+ the attached IOMMU and the supported operations on the input. As some SoCs
15+ include multiple RGA units with different versions, a more specific
16+ compatible name to differentiate the concrete unit is used for them.
1317
1418 maintainers:
1519 - Jacob Chen <jacob-chen@iotwrt.com>
@@ -20,6 +24,7 @@ properties: · 4 unmodified lines
2024 oneOf:
2125 - const: rockchip,rk3288-rga
2226 - const: rockchip,rk3399-rga
27+ - const: rockchip,rk3588-rga3
2328 - items:
2429 - enum:
2530 - rockchip,rk3228-rga
@@ -45,6 +50,9 @@ properties: · 19 unmodified lines
4550 power-domains:
4651 maxItems: 1
4752
53+ iommus:
54+ maxItems: 1
55+
4856 resets:
4957 maxItems: 3
5058
Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml+3−3
@@ -47,10 +47,10 @@ properties: · 46 unmodified lines
4747 maxItems: 1
4848
4949 sram:
50− $ref: /schemas/types.yaml#/definitions/phandle
50+ maxItems: 1
5151 description:
52− phandle to a reserved SRAM region which is used as temporary
53− storage memory between DMA and MDMA engines.
52+ SRAM region which is used as temporary storage memory between DMA and
53+ MDMA engines.
5454
5555 port:
5656 $ref: /schemas/graph.yaml#/$defs/port-base
Documentation/devicetree/bindings/media/ti,j721e-csi2rx-shim.yaml+36−3
@@ -20,11 +20,44 @@ properties: · 19 unmodified lines
2020 const: ti,j721e-csi2rx-shim
2121
2222 dmas:
23− maxItems: 1
23+ minItems: 1
24+ maxItems: 32
2425
2526 dma-names:
27+ minItems: 1
2628 items:
2729 - const: rx0
30+ - const: rx1
31+ - const: rx2
32+ - const: rx3
33+ - const: rx4
34+ - const: rx5
35+ - const: rx6
36+ - const: rx7
37+ - const: rx8
38+ - const: rx9
39+ - const: rx10
40+ - const: rx11
41+ - const: rx12
42+ - const: rx13
43+ - const: rx14
44+ - const: rx15
45+ - const: rx16
46+ - const: rx17
47+ - const: rx18
48+ - const: rx19
49+ - const: rx20
50+ - const: rx21
51+ - const: rx22
52+ - const: rx23
53+ - const: rx24
54+ - const: rx25
55+ - const: rx26
56+ - const: rx27
57+ - const: rx28
58+ - const: rx29
59+ - const: rx30
60+ - const: rx31
2861
2962 reg:
3063 maxItems: 1
@@ -62,8 +95,8 @@ examples: · 31 unmodified lines
6295
6396 ti_csi2rx0: ticsi2rx@4500000 {
6497 compatible = "ti,j721e-csi2rx-shim";
65− dmas = <&main_udmap 0x4940>;
66− dma-names = "rx0";
98+ dmas = <&main_udmap 0x4940>, <&main_udmap 0x4941>;
99+ dma-names = "rx0", "rx1";
67100 reg = <0x4500000 0x1000>;
68101 power-domains = <&k3_pds 26 TI_SCI_PD_EXCLUSIVE>;
69102 #address-cells = <1>;
Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml+26−148
@@ -16,7 +16,9 @@ description: | · 15 unmodified lines
1616
1717 properties:
1818 compatible:
19− const: nvidia,tegra124-emc
19+ enum:
20+ - nvidia,tegra114-emc
21+ - nvidia,tegra124-emc
2022
2123 reg:
2224 maxItems: 1
@@ -29,6 +31,9 @@ properties: · 6 unmodified lines
2931 items:
3032 - const: emc
3133
34+ interrupts:
35+ maxItems: 1
36+
3237 "#interconnect-cells":
3338 const: 0
3439
@@ -164,153 +169,12 @@ patternProperties: · 129 unmodified lines
164169 nvidia,emc-configuration:
165170 description:
166171 EMC timing characterization data. These are the registers (see
167− section "15.6.2 EMC Registers" in the TRM) whose values need to
172+ section "20.11.2 EMC Registers" in the Tegra114 TRM or section
173+ "15.6.2 EMC Registers" in the Tegra124 TRM) whose values need to
168174 be specified, according to the board documentation.
169175 $ref: /schemas/types.yaml#/definitions/uint32-array
170− items:
171− - description: EMC_RC
172− - description: EMC_RFC
173− - description: EMC_RFC_SLR
174− - description: EMC_RAS
175− - description: EMC_RP
176− - description: EMC_R2W
177− - description: EMC_W2R
178− - description: EMC_R2P
179− - description: EMC_W2P
180− - description: EMC_RD_RCD
181− - description: EMC_WR_RCD
182− - description: EMC_RRD
183− - description: EMC_REXT
184− - description: EMC_WEXT
185− - description: EMC_WDV
186− - description: EMC_WDV_MASK
187− - description: EMC_QUSE
188− - description: EMC_QUSE_WIDTH
189− - description: EMC_IBDLY
190− - description: EMC_EINPUT
191− - description: EMC_EINPUT_DURATION
192− - description: EMC_PUTERM_EXTRA
193− - description: EMC_PUTERM_WIDTH
194− - description: EMC_PUTERM_ADJ
195− - description: EMC_CDB_CNTL_1
196− - description: EMC_CDB_CNTL_2
197− - description: EMC_CDB_CNTL_3
198− - description: EMC_QRST
199− - description: EMC_QSAFE
200− - description: EMC_RDV
201− - description: EMC_RDV_MASK
202− - description: EMC_REFRESH
203− - description: EMC_BURST_REFRESH_NUM
204− - description: EMC_PRE_REFRESH_REQ_CNT
205− - description: EMC_PDEX2WR
206− - description: EMC_PDEX2RD
207− - description: EMC_PCHG2PDEN
208− - description: EMC_ACT2PDEN
209− - description: EMC_AR2PDEN
210− - description: EMC_RW2PDEN
211− - description: EMC_TXSR
212− - description: EMC_TXSRDLL
213− - description: EMC_TCKE
214− - description: EMC_TCKESR
215− - description: EMC_TPD
216− - description: EMC_TFAW
217− - description: EMC_TRPAB
218− - description: EMC_TCLKSTABLE
219− - description: EMC_TCLKSTOP
220− - description: EMC_TREFBW
221− - description: EMC_FBIO_CFG6
222− - description: EMC_ODT_WRITE
223− - description: EMC_ODT_READ
224− - description: EMC_FBIO_CFG5
225− - description: EMC_CFG_DIG_DLL
226− - description: EMC_CFG_DIG_DLL_PERIOD
227− - description: EMC_DLL_XFORM_DQS0
228− - description: EMC_DLL_XFORM_DQS1
229− - description: EMC_DLL_XFORM_DQS2
230− - description: EMC_DLL_XFORM_DQS3
231− - description: EMC_DLL_XFORM_DQS4
232− - description: EMC_DLL_XFORM_DQS5
233− - description: EMC_DLL_XFORM_DQS6
234− - description: EMC_DLL_XFORM_DQS7
235− - description: EMC_DLL_XFORM_DQS8
236− - description: EMC_DLL_XFORM_DQS9
237− - description: EMC_DLL_XFORM_DQS10
238− - description: EMC_DLL_XFORM_DQS11
239− - description: EMC_DLL_XFORM_DQS12
240− - description: EMC_DLL_XFORM_DQS13
241− - description: EMC_DLL_XFORM_DQS14
242− - description: EMC_DLL_XFORM_DQS15
243− - description: EMC_DLL_XFORM_QUSE0
244− - description: EMC_DLL_XFORM_QUSE1
245− - description: EMC_DLL_XFORM_QUSE2
246− - description: EMC_DLL_XFORM_QUSE3
247− - description: EMC_DLL_XFORM_QUSE4
248− - description: EMC_DLL_XFORM_QUSE5
249− - description: EMC_DLL_XFORM_QUSE6
250− - description: EMC_DLL_XFORM_QUSE7
251− - description: EMC_DLL_XFORM_ADDR0
252− - description: EMC_DLL_XFORM_ADDR1
253− - description: EMC_DLL_XFORM_ADDR2
254− - description: EMC_DLL_XFORM_ADDR3
255− - description: EMC_DLL_XFORM_ADDR4
256− - description: EMC_DLL_XFORM_ADDR5
257− - description: EMC_DLL_XFORM_QUSE8
258− - description: EMC_DLL_XFORM_QUSE9
259− - description: EMC_DLL_XFORM_QUSE10
260− - description: EMC_DLL_XFORM_QUSE11
261− - description: EMC_DLL_XFORM_QUSE12
262− - description: EMC_DLL_XFORM_QUSE13
263− - description: EMC_DLL_XFORM_QUSE14
264− - description: EMC_DLL_XFORM_QUSE15
265− - description: EMC_DLI_TRIM_TXDQS0
266− - description: EMC_DLI_TRIM_TXDQS1
267− - description: EMC_DLI_TRIM_TXDQS2
268− - description: EMC_DLI_TRIM_TXDQS3
269− - description: EMC_DLI_TRIM_TXDQS4
270− - description: EMC_DLI_TRIM_TXDQS5
271− - description: EMC_DLI_TRIM_TXDQS6
272− - description: EMC_DLI_TRIM_TXDQS7
273− - description: EMC_DLI_TRIM_TXDQS8
274− - description: EMC_DLI_TRIM_TXDQS9
275− - description: EMC_DLI_TRIM_TXDQS10
276− - description: EMC_DLI_TRIM_TXDQS11
277− - description: EMC_DLI_TRIM_TXDQS12
278− - description: EMC_DLI_TRIM_TXDQS13
279− - description: EMC_DLI_TRIM_TXDQS14
280− - description: EMC_DLI_TRIM_TXDQS15
281− - description: EMC_DLL_XFORM_DQ0
282− - description: EMC_DLL_XFORM_DQ1
283− - description: EMC_DLL_XFORM_DQ2
284− - description: EMC_DLL_XFORM_DQ3
285− - description: EMC_DLL_XFORM_DQ4
286− - description: EMC_DLL_XFORM_DQ5
287− - description: EMC_DLL_XFORM_DQ6
288− - description: EMC_DLL_XFORM_DQ7
289− - description: EMC_XM2CMDPADCTRL
290− - description: EMC_XM2CMDPADCTRL4
291− - description: EMC_XM2CMDPADCTRL5
292− - description: EMC_XM2DQPADCTRL2
293− - description: EMC_XM2DQPADCTRL3
294− - description: EMC_XM2CLKPADCTRL
295− - description: EMC_XM2CLKPADCTRL2
296− - description: EMC_XM2COMPPADCTRL
297− - description: EMC_XM2VTTGENPADCTRL
298− - description: EMC_XM2VTTGENPADCTRL2
299− - description: EMC_XM2VTTGENPADCTRL3
300− - description: EMC_XM2DQSPADCTRL3
301− - description: EMC_XM2DQSPADCTRL4
302− - description: EMC_XM2DQSPADCTRL5
303− - description: EMC_XM2DQSPADCTRL6
304− - description: EMC_DSR_VTTGEN_DRV
305− - description: EMC_TXDSRVTTGEN
306− - description: EMC_FBIO_SPARE
307− - description: EMC_ZCAL_WAIT_CNT
308− - description: EMC_MRS_WAIT_CNT2
309− - description: EMC_CTT
310− - description: EMC_CTT_DURATION
311− - description: EMC_CFG_PIPE
312− - description: EMC_DYN_SELF_REF_CONTROL
313− - description: EMC_QPOP
176+ minItems: 97
177+ maxItems: 143
314178
315179 required:
316180 - clock-frequency
@@ -318,9 +182,7 @@ patternProperties: · 1 unmodified line
318182 - nvidia,emc-auto-cal-config2
319183 - nvidia,emc-auto-cal-config3
320184 - nvidia,emc-auto-cal-interval
321− - nvidia,emc-bgbias-ctl0
322185 - nvidia,emc-cfg
323− - nvidia,emc-cfg-2
324186 - nvidia,emc-ctt-term-ctrl
325187 - nvidia,emc-mode-1
326188 - nvidia,emc-mode-2
@@ -344,6 +206,22 @@ required: · 17 unmodified lines
344206 - "#interconnect-cells"
345207 - operating-points-v2
346208
209+allOf:
210+ - if:
211+ properties:
212+ compatible:
213+ contains:
214+ enum:
215+ - nvidia,tegra124-emc
216+ then:
217+ patternProperties:
218+ "^emc-timings-[0-9]+$":
219+ patternProperties:
220+ "^timing-[0-9]+$":
221+ required:
222+ - nvidia,emc-bgbias-ctl0
223+ - nvidia,emc-cfg-2
224+
347225 additionalProperties: false
348226
349227 examples:
Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.yaml+8−23
@@ -19,7 +19,9 @@ description: | · 18 unmodified lines
1919
2020 properties:
2121 compatible:
22− const: nvidia,tegra124-mc
22+ enum:
23+ - nvidia,tegra114-mc
24+ - nvidia,tegra124-mc
2325
2426 reg:
2527 maxItems: 1
@@ -64,29 +66,12 @@ patternProperties: · 38 unmodified lines
6466
6567 nvidia,emem-configuration:
6668 $ref: /schemas/types.yaml#/definitions/uint32-array
67− description: |
69+ description:
6870 Values to be written to the EMEM register block. See section
69− "15.6.1 MC Registers" in the TRM.
70− items:
71− - description: MC_EMEM_ARB_CFG
72− - description: MC_EMEM_ARB_OUTSTANDING_REQ
73− - description: MC_EMEM_ARB_TIMING_RCD
74− - description: MC_EMEM_ARB_TIMING_RP
75− - description: MC_EMEM_ARB_TIMING_RC
76− - description: MC_EMEM_ARB_TIMING_RAS
77− - description: MC_EMEM_ARB_TIMING_FAW
78− - description: MC_EMEM_ARB_TIMING_RRD
79− - description: MC_EMEM_ARB_TIMING_RAP2PRE
80− - description: MC_EMEM_ARB_TIMING_WAP2PRE
81− - description: MC_EMEM_ARB_TIMING_R2R
82− - description: MC_EMEM_ARB_TIMING_W2W
83− - description: MC_EMEM_ARB_TIMING_R2W
84− - description: MC_EMEM_ARB_TIMING_W2R
85− - description: MC_EMEM_ARB_DA_TURNS
86− - description: MC_EMEM_ARB_DA_COVERS
87− - description: MC_EMEM_ARB_MISC0
88− - description: MC_EMEM_ARB_MISC1
89− - description: MC_EMEM_ARB_RING1_THROTTLE
71+ "20.11.1 MC Registers" in the Tegea114 TRM or
72+ "15.6.1 MC Registers" in the Tegra124 TRM.
73+ minItems: 18
74+ maxItems: 19
9075
9176 required:
9277 - clock-frequency
Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml+31−0
@@ -32,6 +32,7 @@ properties: · 31 unmodified lines
3232 - nvidia,tegra186-mc
3333 - nvidia,tegra194-mc
3434 - nvidia,tegra234-mc
35+ - nvidia,tegra238-mc
3536 - nvidia,tegra264-mc
3637
3738 reg:
@@ -266,6 +267,36 @@ allOf: · 228 unmodified lines
266267
267268 interrupt-names: false
268269
270+ - if:
271+ properties:
272+ compatible:
273+ const: nvidia,tegra238-mc
274+ then:
275+ properties:
276+ reg:
277+ minItems: 10
278+ maxItems: 10
279+ description: 9 memory controller channels and 1 for stream-id registers
280+
281+ reg-names:
282+ items:
283+ - const: sid
284+ - const: broadcast
285+ - const: ch0
286+ - const: ch1
287+ - const: ch2
288+ - const: ch3
289+ - const: ch4
290+ - const: ch5
291+ - const: ch6
292+ - const: ch7
293+
294+ interrupts:
295+ items:
296+ - description: MC general interrupt
297+
298+ interrupt-names: false
299+
269300 - if:
270301 properties:
271302 compatible:
Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.yaml+2−2
@@ -66,8 +66,8 @@ examples: · 65 unmodified lines
6666 - |
6767 memory-controller@7000f000 {
6868 compatible = "nvidia,tegra20-mc-gart";
69− reg = <0x7000f000 0x400>, /* Controller registers */
70− <0x58000000 0x02000000>; /* GART aperture */
69+ reg = <0x7000f000 0x400>, /* Controller registers */
70+ <0x58000000 0x02000000>; /* GART aperture */
7171 clocks = <&clock_controller 32>;
7272 clock-names = "mc";
7373
Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml+50−10
@@ -30,6 +30,8 @@ properties: · 29 unmodified lines
3030 - enum:
3131 - renesas,r9a09g056-xspi # RZ/V2N
3232 - renesas,r9a09g057-xspi # RZ/V2H(P)
33+ - renesas,r9a09g077-xspi # RZ/T2H
34+ - renesas,r9a09g087-xspi # RZ/N2H
3335 - const: renesas,r9a09g047-xspi
3436
3537 reg:
@@ -53,28 +55,38 @@ properties: · 17 unmodified lines
5355 - const: err_pulse
5456
5557 clocks:
56− items:
57− - description: AHB clock
58− - description: AXI clock
59− - description: SPI clock
60− - description: Double speed SPI clock
58+ oneOf:
59+ - items:
60+ - description: AHB clock
61+ - description: AXI clock
62+ - description: SPI clock
63+ - description: Double speed SPI clock
64+ - items:
65+ - description: AHB clock
66+ - description: SPI clock
6167
6268 clock-names:
63− items:
64− - const: ahb
65− - const: axi
66− - const: spi
67− - const: spix2
69+ oneOf:
70+ - items:
71+ - const: ahb
72+ - const: axi
73+ - const: spi
74+ - const: spix2
75+ - items:
76+ - const: ahb
77+ - const: spi
6878
6979 power-domains:
7080 maxItems: 1
7181
7282 resets:
83+ minItems: 1
7384 items:
7485 - description: Hardware reset
7586 - description: AXI reset
7687
7788 reset-names:
89+ minItems: 1
7890 items:
7991 - const: hresetn
8092 - const: aresetn
@@ -109,6 +121,34 @@ required: · 28 unmodified lines
109121 - '#address-cells'
110122 - '#size-cells'
111123
124+if:
125+ properties:
126+ compatible:
127+ contains:
128+ enum:
129+ - renesas,r9a09g077-xspi
130+ - renesas,r9a09g087-xspi
131+then:
132+ properties:
133+ clocks:
134+ maxItems: 2
135+ clock-names:
136+ maxItems: 2
137+ resets:
138+ maxItems: 1
139+ reset-names:
140+ maxItems: 1
141+else:
142+ properties:
143+ clocks:
144+ minItems: 4
145+ clock-names:
146+ minItems: 4
147+ resets:
148+ minItems: 2
149+ reset-names:
150+ minItems: 2
151+
112152 unevaluatedProperties: false
113153
114154 examples:
Documentation/devicetree/bindings/memory-controllers/samsung,exynos5422-dmc.yaml+1−1
@@ -128,7 +128,7 @@ examples: · 127 unmodified lines
128128 "mout_mx_mspll_ccore",
129129 "mout_mclk_cdrex";
130130 operating-points-v2 = <&dmc_opp_table>;
131− devfreq-events = <&ppmu_event3_dmc0_0>, <&ppmu_event3_dmc0_1>,
131+ devfreq-events = <&ppmu_event3_dmc0_0>, <&ppmu_event3_dmc0_1>,
132132 <&ppmu_event3_dmc1_0>, <&ppmu_event3_dmc1_1>;
133133 device-handle = <&samsung_K3QF2F20DB>;
134134 vdd-supply = <&buck1_reg>;
Documentation/devicetree/bindings/mfd/apple,smc.yaml+36−0
@@ -49,6 +49,9 @@ properties: · 48 unmodified lines
4949 rtc:
5050 $ref: /schemas/rtc/apple,smc-rtc.yaml
5151
52+ hwmon:
53+ $ref: /schemas/hwmon/apple,smc-hwmon.yaml
54+
5255 additionalProperties: false
5356
5457 required:
@@ -89,5 +92,38 @@ examples: · 34 unmodified lines
8992 nvmem-cells = <&rtc_offset>;
9093 nvmem-cell-names = "rtc_offset";
9194 };
95+
96+ hwmon {
97+ compatible = "apple,smc-hwmon";
98+
99+ current-ID0R {
100+ apple,key-id = "ID0R";
101+ label = "AC Input Current";
102+ };
103+
104+ fan-F0Ac {
105+ apple,key-id = "F0Ac";
106+ apple,fan-minimum = "F0Mn";
107+ apple,fan-maximum = "F0Mx";
108+ apple,fan-target = "F0Tg";
109+ apple,fan-mode = "F0Md";
110+ label = "Fan 1";
111+ };
112+
113+ power-PSTR {
114+ apple,key-id = "PSTR";
115+ label = "Total System Power";
116+ };
117+
118+ temperature-TW0P {
119+ apple,key-id = "TW0P";
120+ label = "WiFi/BT Module Temperature";
121+ };
122+
123+ voltage-VD0R {
124+ apple,key-id = "VD0R";
125+ label = "AC Input Voltage";
126+ };
127+ };
92128 };
93129 };
Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml+115−0
@@ -46,6 +46,18 @@ properties: · 45 unmodified lines
4646 '#reset-cells':
4747 const: 1
4848
49+ memory-region:
50+ items:
51+ - description: Region mapped through the first SSP address window.
52+ - description: Region mapped through the second SSP address window.
53+ - description: Region mapped through the TSP address window.
54+
55+ memory-region-names:
56+ items:
57+ - const: ssp-0
58+ - const: ssp-1
59+ - const: tsp
60+
4961 patternProperties:
5062 '^p2a-control@[0-9a-f]+$':
5163 description: >
@@ -87,6 +99,8 @@ patternProperties: · 35 unmodified lines
8799 - aspeed,ast2400-pinctrl
88100 - aspeed,ast2500-pinctrl
89101 - aspeed,ast2600-pinctrl
102+ - aspeed,ast2700-soc0-pinctrl
103+ - aspeed,ast2700-soc1-pinctrl
90104
91105 required:
92106 - compatible
@@ -156,6 +170,30 @@ required: · 63 unmodified lines
156170 - '#clock-cells'
157171 - '#reset-cells'
158172
173+allOf:
174+ - if:
175+ properties:
176+ compatible:
177+ contains:
178+ enum:
179+ - aspeed,ast2700-scu0
180+ - aspeed,ast2700-scu1
181+ then:
182+ patternProperties:
183+ '^p2a-control@[0-9a-f]+$': false
184+ '^smp-memram@[0-9a-f]+$': false
185+
186+ - if:
187+ not:
188+ properties:
189+ compatible:
190+ contains:
191+ const: aspeed,ast2700-scu0
192+ then:
193+ properties:
194+ memory-region: false
195+ memory-region-names: false
196+
159197 additionalProperties: false
160198
161199 examples:
@@ -180,4 +218,81 @@ examples: · 18 unmodified lines
180218 reg = <0x7c 0x4>, <0x150 0x8>;
181219 };
182220 };
221+
222+ - |
223+ / {
224+ #address-cells = <2>;
225+ #size-cells = <2>;
226+
227+ reserved-memory {
228+ #address-cells = <2>;
229+ #size-cells = <2>;
230+ ranges;
231+
232+ ssp_region_0: memory@400000000 {
233+ reg = <0x4 0x00000000 0x0 0x01000000>;
234+ no-map;
235+ };
236+
237+ ssp_region_1: memory@401000000 {
238+ reg = <0x4 0x01000000 0x0 0x01000000>;
239+ no-map;
240+ };
241+
242+ tsp_region: memory@402000000 {
243+ reg = <0x4 0x02000000 0x0 0x01000000>;
244+ no-map;
245+ };
246+ };
247+
248+ bus {
249+ #address-cells = <2>;
250+ #size-cells = <2>;
251+
252+ syscon@12c02000 {
253+ compatible = "aspeed,ast2700-scu0", "syscon", "simple-mfd";
254+ reg = <0 0x12c02000 0 0x1000>;
255+ ranges = <0x0 0x0 0x12c02000 0x1000>;
256+ #address-cells = <1>;
257+ #size-cells = <1>;
258+ #clock-cells = <1>;
259+ #reset-cells = <1>;
260+
261+ memory-region = <&ssp_region_0>, <&ssp_region_1>,
262+ <&tsp_region>;
263+ memory-region-names = "ssp-0", "ssp-1", "tsp";
264+
265+ silicon-id@0 {
266+ compatible = "aspeed,ast2700-silicon-id", "aspeed,silicon-id";
267+ reg = <0x0 0x4>;
268+ };
269+
270+ interrupt-controller@1b0 {
271+ compatible = "aspeed,ast2700-scu-ic0";
272+ reg = <0x1b0 0x4>;
273+ #interrupt-cells = <1>;
274+ interrupts-extended = <&intc0 97>;
275+ interrupt-controller;
276+ };
277+
278+ interrupt-controller@1e0 {
279+ compatible = "aspeed,ast2700-scu-ic1";
280+ reg = <0x1e0 0x4>;
281+ #interrupt-cells = <1>;
282+ interrupts-extended = <&intc0 98>;
283+ interrupt-controller;
284+ };
285+
286+ pinctrl@400 {
287+ compatible = "aspeed,ast2700-soc0-pinctrl";
288+ reg = <0x400 0x318>;
289+ emmc-state {
290+ function = "EMMC";
291+ groups = "EMMCG1";
292+ };
293+ };
294+ };
295+ };
296+ };
297+
183298 ...
Documentation/devicetree/bindings/mfd/hisilicon,hi655x-pmic.yaml+80−0
@@ -0,0 +1,80 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/mfd/hisilicon,hi655x-pmic.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Hisilicon Hi655x Power Management Integrated Circuit
8+
9+maintainers:
10+ - Chen Feng <puck.chen@hisilicon.com>
11+ - Daniel Lezcano <daniel.lezcano@kernel.org>
12+
13+description:
14+ The hardware layout for access PMIC Hi655x from AP SoC Hi6220.
15+ Between PMIC Hi655x and Hi6220, the physical signal channel is SSI.
16+ We can use memory-mapped I/O to communicate.
17+
18+properties:
19+ compatible:
20+ const: hisilicon,hi655x-pmic
21+
22+ reg:
23+ maxItems: 1
24+
25+ interrupt-controller: true
26+
27+ '#interrupt-cells':
28+ const: 2
29+
30+ pmic-gpios:
31+ maxItems: 1
32+ description: The GPIO used by PMIC IRQ
33+
34+ '#clock-cells':
35+ const: 0
36+
37+ clock-output-names:
38+ maxItems: 1
39+
40+ regulators:
41+ type: object
42+ additionalProperties: false
43+
44+ patternProperties:
45+ '^LDO(2|7|10|13|14|15|17|19|21|22)$':
46+ type: object
47+ $ref: /schemas/regulator/regulator.yaml#
48+ unevaluatedProperties: false
49+
50+required:
51+ - compatible
52+ - reg
53+ - interrupt-controller
54+ - '#interrupt-cells'
55+ - pmic-gpios
56+ - '#clock-cells'
57+
58+additionalProperties: false
59+
60+examples:
61+ - |
62+ #include <dt-bindings/gpio/gpio.h>
63+
64+ pmic: pmic@f8000000 {
65+ compatible = "hisilicon,hi655x-pmic";
66+ reg = <0xf8000000 0x1000>;
67+ #clock-cells = <0>;
68+ interrupt-controller;
69+ #interrupt-cells = <2>;
70+ pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
71+
72+ regulators {
73+ ldo2: LDO2 {
74+ regulator-name = "LDO2_2V8";
75+ regulator-min-microvolt = <2500000>;
76+ regulator-max-microvolt = <3200000>;
77+ regulator-enable-ramp-delay = <120>;
78+ };
79+ };
80+ };
Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt+0−33
@@ -1,33 +0,0 @@
1−Hisilicon Hi655x Power Management Integrated Circuit (PMIC)
2−
3−The hardware layout for access PMIC Hi655x from AP SoC Hi6220.
4−Between PMIC Hi655x and Hi6220, the physical signal channel is SSI.
5−We can use memory-mapped I/O to communicate.
6−
7−+----------------+ +-------------+
8−| | | |
9−| Hi6220 | SSI bus | Hi655x |
10−| |-------------| |
11−| |(REGMAP_MMIO)| |
12−+----------------+ +-------------+
13−
14−Required properties:
15−- compatible: Should be "hisilicon,hi655x-pmic".
16−- reg: Base address of PMIC on Hi6220 SoC.
17−- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain).
18−- pmic-gpios: The GPIO used by PMIC IRQ.
19−- #clock-cells: From common clock binding; shall be set to 0
20−
21−Optional properties:
22−- clock-output-names: From common clock binding to override the
23− default output clock name
24−
25−Example:
26− pmic: pmic@f8000000 {
27− compatible = "hisilicon,hi655x-pmic";
28− reg = <0x0 0xf8000000 0x0 0x1000>;
29− interrupt-controller;
30− #interrupt-cells = <2>;
31− pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
32− #clock-cells = <0>;
33− }
Documentation/devicetree/bindings/mfd/khadas,mcu.yaml+17−0
@@ -18,6 +18,7 @@ properties: · 17 unmodified lines
1818 compatible:
1919 enum:
2020 - khadas,mcu # MCU revision is discoverable
21+ - khadas,vim4-mcu # Different MCU variant, not discoverable
2122
2223 "#cooling-cells": # Only needed for boards having FAN control feature
2324 const: 2
@@ -25,10 +26,26 @@ properties: · 1 unmodified line
2526 reg:
2627 maxItems: 1
2728
29+ fan-supply:
30+ description: Phandle to the regulator that powers the fan.
31+
2832 required:
2933 - compatible
3034 - reg
3135
36+allOf:
37+ - if:
38+ properties:
39+ compatible:
40+ contains:
41+ const: khadas,vim4-mcu
42+ then:
43+ required:
44+ - fan-supply
45+ else:
46+ properties:
47+ fan-supply: false
48+
3249 additionalProperties: false
3350
3451 examples:
Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml+64−0
@@ -44,6 +44,10 @@ properties: · 43 unmodified lines
4444 - enum:
4545 - mediatek,mt6366
4646 - const: mediatek,mt6358
47+ - items:
48+ - enum:
49+ - mediatek,mt6365
50+ - const: mediatek,mt6359
4751
4852 interrupts:
4953 maxItems: 1
@@ -70,6 +74,8 @@ properties: · 20 unmodified lines
7074 - mediatek,mt6397-rtc
7175 - items:
7276 - enum:
77+ - mediatek,mt6359-rtc
78+ - mediatek,mt6365-rtc
7379 - mediatek,mt6366-rtc
7480 - const: mediatek,mt6358-rtc
7581
@@ -98,6 +104,10 @@ properties: · 22 unmodified lines
98104 - enum:
99105 - mediatek,mt6366-regulator
100106 - const: mediatek,mt6358-regulator
107+ - items:
108+ - enum:
109+ - mediatek,mt6365-regulator
110+ - const: mediatek,mt6359-regulator
101111
102112 required:
103113 - compatible
@@ -124,6 +134,10 @@ properties: · 20 unmodified lines
124134 - enum:
125135 - mediatek,mt6366-sound
126136 - const: mediatek,mt6358-sound
137+ - items:
138+ - enum:
139+ - mediatek,mt6365-codec
140+ - const: mediatek,mt6359-codec
127141
128142 required:
129143 - compatible
@@ -225,12 +239,62 @@ properties: · 95 unmodified lines
225239 description:
226240 Pin controller
227241
242+ vsys-smps-supply:
243+ description: Supply for regulator control logic
244+
245+patternProperties:
246+ "^vsys-v[a-z]+[0-9]*-supply$":
247+ description: Supplies for PMIC buck regulators
248+ "^vs(ys|[12])-ldo[1-9]-supply$":
249+ description: Supplies for PMIC LDO regulators
250+
228251 required:
229252 - compatible
230253 - regulators
231254
232255 additionalProperties: false
233256
257+allOf:
258+ - if:
259+ properties:
260+ "compatible":
261+ contains:
262+ const: mediatek,mt6359
263+ then:
264+ properties:
265+ vsys-ldo1-supply:
266+ description: Supply for LDOs vcn33_[12], vio28, vfe28, vibr
267+ vsys-ldo2-supply:
268+ description: Supply for LDOs vaux18, vbif28, vxo22, vrfck, vrfck_1,
269+ vemc, vsim1, vsim2, vusb
270+ vsys-vcore-supply:
271+ description: Supply for buck regulator vcore
272+ vsys-vgpu11-supply:
273+ description: Supply for buck regulator vgpu11
274+ vsys-vmodem-supply:
275+ description: Supply for buck regulator vmodem
276+ vsys-vpa-supply:
277+ description: Supply for buck regulator vpa
278+ vsys-vproc1-supply:
279+ description: Supply for buck regulator vproc1
280+ vsys-vproc2-supply:
281+ description: Supply for buck regulator vproc2
282+ vsys-vpu-supply:
283+ description: Supply for buck regulator vpu
284+ vsys-vs1-supply:
285+ description: Supply for buck regulator vs1
286+ vsys-vs2-supply:
287+ description: Supply for buck regulator vs2
288+ vs1-ldo1-supply:
289+ description: Supply for LDOs vaud18, vcamio, vm18, vufs
290+ vs1-ldo2-supply:
291+ description: Supply for LDOs vcn18, vefuse, vio18, vrf18
292+ vs2-ldo1-supply:
293+ description:
294+ Supply for LDOs vsram_proc1, vsram_proc2, vsram_others, vsram_md
295+ vs2-ldo2-supply:
296+ description: Supply for LDOs va09, va12, vcn13, vrf12
297+
234298 examples:
235299 - |
236300 #include <dt-bindings/interrupt-controller/arm-gic.h>
Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml+2−0
@@ -19,6 +19,7 @@ properties: · 18 unmodified lines
1919 - enum:
2020 - qcom,msm8976-tcsr
2121 - qcom,msm8998-tcsr
22+ - qcom,nord-tcsr
2223 - qcom,qcm2290-tcsr
2324 - qcom,qcs404-tcsr
2425 - qcom,qcs615-tcsr
@@ -42,6 +43,7 @@ properties: · 17 unmodified lines
4243 - qcom,tcsr-apq8064
4344 - qcom,tcsr-apq8084
4445 - qcom,tcsr-ipq5018
46+ - qcom,tcsr-ipq5210
4547 - qcom,tcsr-ipq5332
4648 - qcom,tcsr-ipq5424
4749 - qcom,tcsr-ipq6018
Documentation/devicetree/bindings/mfd/rockchip,rk816.yaml+1−2
@@ -44,8 +44,7 @@ properties: · 43 unmodified lines
4444 description:
4545 Telling whether or not this PMIC is controlling the system power.
4646
47− wakeup-source:
48− type: boolean
47+ wakeup-source: true
4948
5049 vcc1-supply:
5150 description:
Documentation/devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml+120−0
@@ -0,0 +1,120 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/mfd/samsung,s2mu005-pmic.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Samsung S2MU005 Power Management IC
8+
9+maintainers:
10+ - Kaustabh Chakraborty <kauschluss@disroot.org>
11+
12+description: |
13+ The S2MU005 is a companion power management IC which includes subdevices for
14+ a charger controller, an MUIC (Micro USB Interface Controller), and flash and
15+ RGB LED controllers.
16+
17+allOf:
18+ - $ref: /schemas/power/supply/power-supply.yaml#
19+
20+properties:
21+ compatible:
22+ const: samsung,s2mu005-pmic
23+
24+ flash:
25+ $ref: /schemas/leds/samsung,s2mu005-flash.yaml#
26+ description:
27+ Child node describing flash LEDs.
28+
29+ interrupts:
30+ maxItems: 1
31+
32+ muic:
33+ $ref: /schemas/extcon/samsung,s2mu005-muic.yaml#
34+ description:
35+ Child node describing MUIC device.
36+
37+ multi-led:
38+ type: object
39+
40+ allOf:
41+ - $ref: /schemas/leds/leds-class-multicolor.yaml#
42+
43+ properties:
44+ compatible:
45+ const: samsung,s2mu005-rgb
46+
47+ required:
48+ - compatible
49+
50+ unevaluatedProperties: false
51+
52+ reg:
53+ maxItems: 1
54+
55+required:
56+ - compatible
57+ - reg
58+
59+unevaluatedProperties: false
60+
61+examples:
62+ - |
63+ #include <dt-bindings/interrupt-controller/irq.h>
64+ #include <dt-bindings/leds/common.h>
65+
66+ i2c {
67+ #address-cells = <1>;
68+ #size-cells = <0>;
69+
70+ pmic@3d {
71+ compatible = "samsung,s2mu005-pmic";
72+ reg = <0x3d>;
73+ interrupt-parent = <&gpa2>;
74+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
75+
76+ monitored-battery = <&battery>;
77+
78+ flash {
79+ compatible = "samsung,s2mu005-flash";
80+ #address-cells = <1>;
81+ #size-cells = <0>;
82+
83+ led@0 {
84+ reg = <0>;
85+ color = <LED_COLOR_ID_WHITE>;
86+ function = LED_FUNCTION_FLASH;
87+ };
88+
89+ led@1 {
90+ reg = <1>;
91+ color = <LED_COLOR_ID_WHITE>;
92+ function = LED_FUNCTION_FLASH;
93+ function-enumerator = <1>;
94+ };
95+ };
96+
97+ muic {
98+ compatible = "samsung,s2mu005-muic";
99+
100+ connector {
101+ compatible = "usb-b-connector";
102+ label = "micro-USB";
103+ type = "micro";
104+ };
105+
106+ port {
107+ muic_to_usb: endpoint {
108+ remote-endpoint = <&usb_to_muic>;
109+ };
110+ };
111+ };
112+
113+ multi-led {
114+ compatible = "samsung,s2mu005-rgb";
115+ color = <LED_COLOR_ID_RGB>;
116+ function = LED_FUNCTION_INDICATOR;
117+ linux,default-trigger = "pattern";
118+ };
119+ };
120+ };
Documentation/devicetree/bindings/mfd/sprd,sc2731.yaml+3−1
@@ -54,7 +54,9 @@ properties: · 53 unmodified lines
5454
5555 regulators:
5656 type: object
57− $ref: /schemas/regulator/sprd,sc2731-regulator.yaml#
57+ oneOf:
58+ - $ref: /schemas/regulator/sprd,sc2730-regulator.yaml#
59+ - $ref: /schemas/regulator/sprd,sc2731-regulator.yaml#
5860
5961 patternProperties:
6062 "^adc@[0-9a-f]+$":
Documentation/devicetree/bindings/mfd/st,stmpe.yaml+4−0
@@ -127,6 +127,10 @@ properties: · 126 unmodified lines
127127 "#pwm-cells":
128128 const: 2
129129
130+ required:
131+ - compatible
132+ - "#pwm-cells"
133+
130134 touchscreen:
131135 type: object
132136 $ref: /schemas/input/touchscreen/touchscreen.yaml#
Documentation/devicetree/bindings/mfd/ti,bq25703a.yaml+63−10
@@ -4,17 +4,16 @@ · 3 unmodified lines
44 $id: http://devicetree.org/schemas/mfd/ti,bq25703a.yaml#
55 $schema: http://devicetree.org/meta-schemas/core.yaml#
66
7−title: BQ25703A Charger Manager/Buck/Boost Converter
7+title: BQ257xx Charger Manager/Buck/Boost Converter
88
99 maintainers:
1010 - Chris Morgan <macromorgan@hotmail.com>
1111
12−allOf:
13− - $ref: /schemas/power/supply/power-supply.yaml#
14−
1512 properties:
1613 compatible:
17− const: ti,bq25703a
14+ enum:
15+ - ti,bq25703a
16+ - ti,bq25792
1817
1918 reg:
2019 const: 0x6b
@@ -25,7 +24,6 @@ properties: · 4 unmodified lines
2524 powering the device.
2625 minimum: 50000
2726 maximum: 6400000
28− default: 3250000
2927
3028 interrupts:
3129 maxItems: 1
@@ -57,11 +55,11 @@ properties: · 25 unmodified lines
5755 minimum: 0
5856 maximum: 6350000
5957 regulator-min-microvolt:
60− minimum: 4480000
61− maximum: 20800000
58+ minimum: 2800000
59+ maximum: 22000000
6260 regulator-max-microvolt:
63− minimum: 4480000
64− maximum: 20800000
61+ minimum: 2800000
62+ maximum: 22000000
6563 enable-gpios:
6664 description:
6765 The BQ25703 may require both a register write and a GPIO
@@ -74,6 +72,61 @@ properties: · 6 unmodified lines
7472 - regulator-min-microvolt
7573 - regulator-max-microvolt
7674
75+allOf:
76+ - $ref: /schemas/power/supply/power-supply.yaml#
77+ - if:
78+ properties:
79+ compatible:
80+ const: ti,bq25703a
81+ then:
82+ properties:
83+ input-current-limit-microamp:
84+ minimum: 50000
85+ maximum: 6400000
86+ default: 3250000
87+ regulators:
88+ properties:
89+ vbus:
90+ properties:
91+ regulator-min-microamp:
92+ minimum: 0
93+ maximum: 6350000
94+ regulator-max-microamp:
95+ minimum: 0
96+ maximum: 6350000
97+ regulator-min-microvolt:
98+ minimum: 4480000
99+ maximum: 20800000
100+ regulator-max-microvolt:
101+ minimum: 4480000
102+ maximum: 20800000
103+ - if:
104+ properties:
105+ compatible:
106+ const: ti,bq25792
107+ then:
108+ properties:
109+ input-current-limit-microamp:
110+ minimum: 100000
111+ maximum: 3300000
112+ default: 3000000
113+ regulators:
114+ properties:
115+ vbus:
116+ properties:
117+ regulator-min-microamp:
118+ minimum: 0
119+ maximum: 3320000
120+ regulator-max-microamp:
121+ minimum: 0
122+ maximum: 3320000
123+ regulator-min-microvolt:
124+ minimum: 2800000
125+ maximum: 22000000
126+ regulator-max-microvolt:
127+ minimum: 2800000
128+ maximum: 22000000
129+
77130 unevaluatedProperties: false
78131
79132 required:
Documentation/devicetree/bindings/misc/fsl,qoriq-mc.yaml+1−1
@@ -166,7 +166,7 @@ examples: · 165 unmodified lines
166166 */
167167 ranges = <0x0 0x0 0x8 0x0c000000 0x4000000
168168 0x1 0x0 0x8 0x18000000 0x8000000>;
169−
169+
170170 /* define map for ICIDs 23-64 */
171171 iommu-map = <23 &smmu 23 41>;
172172 /* define msi map for ICIDs 23-64 */
Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml+1−0
@@ -25,6 +25,7 @@ properties: · 24 unmodified lines
2525 - items:
2626 - enum:
2727 - qcom,glymur-fastrpc
28+ - qcom,hawi-fastrpc
2829 - const: qcom,kaanapali-fastrpc
2930
3031 label:
Documentation/devicetree/bindings/mmc/hisilicon,hi3798cv200-dw-mshc.yaml+4−3
@@ -39,10 +39,11 @@ properties: · 38 unmodified lines
3939 $ref: /schemas/types.yaml#/definitions/phandle-array
4040 description: |
4141 DWMMC core on Hi3798MV2x SoCs has a delay-locked-loop(DLL) attached to card data input path.
42− It is integrated into CRG core on the SoC and has to be controlled during tuning.
42+ It is integrated into CRG core on the SoC and has to be controlled during tuning
4343 items:
44− - description: A phandle pointed to the CRG syscon node
45− - description: Sample DLL register offset in CRG address space
44+ - items:
45+ - description: A phandle pointed to the CRG syscon node
46+ - description: Sample DLL register offset in CRG address space
4647
4748 required:
4849 - compatible
Documentation/devicetree/bindings/mmc/qcom,sdhci-msm.yamlrenamed from Documentation/devicetree/bindings/mmc/sdhci-msm.yaml+4−1
@@ -1,7 +1,7 @@
11 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
22 %YAML 1.2
33 ---
4−$id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml#
4+$id: http://devicetree.org/schemas/mmc/qcom,sdhci-msm.yaml#
55 $schema: http://devicetree.org/meta-schemas/core.yaml#
66
77 title: Qualcomm SDHCI controller (sdhci-msm)
@@ -37,6 +37,8 @@ properties: · 29 unmodified lines
3737 - const: qcom,sdhci-msm-v4 # for sdcc versions less than 5.0
3838 - items:
3939 - enum:
40+ - qcom,eliza-sdhci
41+ - qcom,hawi-sdhci
4042 - qcom,ipq5018-sdhci
4143 - qcom,ipq5210-sdhci
4244 - qcom,ipq5332-sdhci
@@ -62,6 +64,7 @@ properties: · 19 unmodified lines
6264 - qcom,sdx55-sdhci
6365 - qcom,sdx65-sdhci
6466 - qcom,sdx75-sdhci
67+ - qcom,shikra-sdhci
6568 - qcom,sm6115-sdhci
6669 - qcom,sm6125-sdhci
6770 - qcom,sm6350-sdhci
Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml+1−0
@@ -52,6 +52,7 @@ properties: · 51 unmodified lines
5252 - renesas,sdhi-r8a77980 # R-Car V3H
5353 - renesas,sdhi-r8a77990 # R-Car E3
5454 - renesas,sdhi-r8a77995 # R-Car D3
55+ - renesas,sdhi-r8a779md # R-Car M3Le
5556 - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2
5657 - items:
5758 - enum:
Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml+15−0
@@ -44,6 +44,18 @@ properties: · 43 unmodified lines
4444 - const: axi
4545 - const: sdh
4646
47+ pinctrl-names:
48+ minItems: 1
49+ items:
50+ - const: default
51+ - const: uhs
52+
53+ pinctrl-0:
54+ description: Default pinctrl state for 3.3V operation
55+
56+ pinctrl-1:
57+ description: Optional pinctrl state for 1.8V UHS operation with "uhs" name
58+
4759 required:
4860 - compatible
4961 - reg
@@ -62,4 +74,7 @@ examples: · 12 unmodified lines
6274 interrupt-parent = <&plic>;
6375 clocks = <&clk_apmu 10>, <&clk_apmu 13>;
6476 clock-names = "core", "io";
77+ pinctrl-names = "default", "uhs";
78+ pinctrl-0 = <&sdhci_default_cfg>;
79+ pinctrl-1 = <&sdhci_uhs_cfg>;
6580 };
Documentation/devicetree/bindings/mtd/nand-chip.yaml+9−0
@@ -23,6 +23,15 @@ properties: · 22 unmodified lines
2323 description:
2424 Contains the chip-select IDs.
2525
26+ nand-randomizer:
27+ description: |
28+ Control the data randomizer feature.
29+ 0: Disable randomizer.
30+ 1: Enable randomizer.
31+ If absent, the current hardware state is left unchanged.
32+ $ref: /schemas/types.yaml#/definitions/uint32
33+ enum: [0, 1]
34+
2635 required:
2736 - reg
2837
Documentation/devicetree/bindings/net/airoha,an8801.yaml+120−0
@@ -0,0 +1,120 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/net/airoha,an8801.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Airoha AN8801R Series PHY
8+
9+maintainers:
10+ - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
11+
12+description:
13+ The Airoha AN8801R is a low power single-port Ethernet PHY Transceiver
14+ with Single-port serdes interface for 1000Base-X/RGMII; this chip is
15+ compliant with 10Base-T, 100Base-TX and 1000Base-T IEEE 802.3(u,ab)
16+ and supports Energy Efficient Ethernet (802.3az), Full Duplex Control
17+ Flow (802.3x), auto-negotiation, crossover detect and autocorrection,
18+ Wake-on-LAN with Magic Packet, and Jumbo Frame up to 9 Kilobytes.
19+ This PHY also supports up to three user-configurable LEDs, which are
20+ usually used for LAN Activity, 100M, 1000M indication.
21+
22+allOf:
23+ - $ref: ethernet-phy.yaml#
24+
25+properties:
26+ compatible:
27+ enum:
28+ - ethernet-phy-idc0ff.0421
29+
30+ reg:
31+ maxItems: 1
32+
33+ leds:
34+ type: object
35+ description:
36+ Describes the LEDs associated to the PHY
37+
38+ properties:
39+ "#address-cells":
40+ const: 1
41+
42+ "#size-cells":
43+ const: 0
44+
45+ patternProperties:
46+ "^led@[0-2]$":
47+ type: object
48+ description: PHY LEDs
49+ $ref: /schemas/leds/common.yaml#
50+
51+ properties:
52+ reg:
53+ enum: [0, 1, 2]
54+
55+ function-enumerator:
56+ enum: [0, 1, 2]
57+ description: |
58+ Specifies a function for offloading LED functionality to the PHY:
59+ 0 - No offloading
60+ 1 - Link Availability
61+ 2 - Network Activity
62+
63+ required:
64+ - reg
65+
66+ unevaluatedProperties: false
67+
68+ additionalProperties: false
69+
70+ wakeup-source:
71+ $ref: /schemas/types.yaml#/definitions/flag
72+ description:
73+ Enable Wake-on-LAN support
74+
75+required:
76+ - reg
77+
78+unevaluatedProperties: false
79+
80+examples:
81+ - |
82+ #include <dt-bindings/leds/common.h>
83+
84+ mdio {
85+ #address-cells = <1>;
86+ #size-cells = <0>;
87+
88+ ethernet-phy@0 {
89+ compatible = "ethernet-phy-idc0ff.0421";
90+ reg = <0>;
91+
92+ leds {
93+ #address-cells = <1>;
94+ #size-cells = <0>;
95+
96+ led@0 {
97+ reg = <0>;
98+ color = <LED_COLOR_ID_GREEN>;
99+ function = LED_FUNCTION_LAN;
100+ default-state = "keep";
101+ };
102+
103+ led@1 {
104+ reg = <1>;
105+ color = <LED_COLOR_ID_GREEN>;
106+ function = LED_FUNCTION_LAN;
107+ function-enumerator = <1>;
108+ default-state = "keep";
109+ };
110+
111+ led@2 {
112+ reg = <2>;
113+ color = <LED_COLOR_ID_YELLOW>;
114+ function = LED_FUNCTION_LAN;
115+ function-enumerator = <2>;
116+ default-state = "keep";
117+ };
118+ };
119+ };
120+ };
Documentation/devicetree/bindings/net/airoha,en7581-eth.yaml+55−1
@@ -130,6 +130,42 @@ patternProperties: · 129 unmodified lines
130130 maximum: 4
131131 description: GMAC port identifier
132132
133+ allOf:
134+ - if:
135+ properties:
136+ reg:
137+ contains:
138+ items:
139+ - enum:
140+ - 3
141+ - 4
142+ then:
143+ properties:
144+ '#address-cells':
145+ const: 1
146+
147+ '#size-cells':
148+ const: 0
149+
150+ patternProperties:
151+ "^ethernet@[0-5]$":
152+ type: object
153+ unevaluatedProperties: false
154+ $ref: ethernet-controller.yaml#
155+ description: External ethernet port ID available on the GDM port
156+
157+ properties:
158+ compatible:
159+ const: airoha,eth-port
160+
161+ reg:
162+ maximum: 5
163+ description: External ethernet port identifier
164+
165+ required:
166+ - reg
167+ - compatible
168+
133169 required:
134170 - reg
135171 - compatible
@@ -191,9 +227,27 @@ examples: · 55 unmodified lines
191227 #address-cells = <1>;
192228 #size-cells = <0>;
193229
194− mac: ethernet@1 {
230+ ethernet@1 {
195231 compatible = "airoha,eth-mac";
196232 reg = <1>;
197233 };
234+
235+ ethernet@4 {
236+ compatible = "airoha,eth-mac";
237+ reg = <4>;
238+
239+ #address-cells = <1>;
240+ #size-cells = <0>;
241+
242+ ethernet@0 {
243+ compatible = "airoha,eth-port";
244+ reg = <0>;
245+ };
246+
247+ ethernet@1 {
248+ compatible = "airoha,eth-port";
249+ reg = <1>;
250+ };
251+ };
198252 };
199253 };
Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6855-bt.yaml+2−5
@@ -50,9 +50,6 @@ properties: · 49 unmodified lines
5050 description: VDD_RFA_1P7 supply regulator handle
5151 deprecated: true
5252
53− vddrfa1p8-supply:
54− description: VDD_RFA_1P8 supply regulator handle
55−
5653 vddrfacmn-supply:
5754 description: VDD_RFA_CMN supply regulator handle
5855
@@ -68,7 +65,7 @@ required: · 9 unmodified lines
6865 - vddbtcmx-supply
6966 - vddrfa0p8-supply
7067 - vddrfa1p2-supply
71− - vddrfa1p8-supply
68+ - vddrfa1p7-supply
7269 - vddrfacmn-supply
7370 - vddwlcx-supply
7471 - vddwlmx-supply
@@ -91,7 +88,7 @@ examples: · 16 unmodified lines
9188 vddbtcmx-supply = <&vreg_pmu_btcmx_0p8>;
9289 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
9390 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
94− vddrfa1p8-supply = <&vreg_pmu_rfa_1p7>;
91+ vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>;
9592 vddrfacmn-supply = <&vreg_pmu_rfa_cmn_0p8>;
9693 vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
9794 vddwlmx-supply = <&vreg_pmu_wlmx_0p8>;
Documentation/devicetree/bindings/net/dsa/dsa.txt+0−4
@@ -1,4 +0,0 @@
1−Distributed Switch Architecture Device Tree Bindings
2−----------------------------------------------------
3−
4−See Documentation/devicetree/bindings/net/dsa/dsa.yaml for the documentation.
Documentation/devicetree/bindings/net/dsa/dsa.yaml+5−1
@@ -28,7 +28,11 @@ properties: · 27 unmodified lines
2828 A two element list indicates which DSA cluster, and position within the
2929 cluster a switch takes. <0 0> is cluster 0, switch 0. <0 1> is cluster 0,
3030 switch 1. <1 0> is cluster 1, switch 0. A switch not part of any cluster
31− (single device hanging off a CPU port) must not specify this property
31+ (single device hanging off a CPU port) does not usually need to specify
32+ this property, and then it becomes cluster 0, switch 0. For a topology
33+ aware switch, its switch index can be specified through this property,
34+ even if it is not part of any cluster. Also, topology-unaware switches
35+ must always be defined as index 0 of their cluster.
3236 $ref: /schemas/types.yaml#/definitions/uint32-array
3337
3438 additionalProperties: true
Documentation/devicetree/bindings/net/dsa/lan9303.txt+0−100
@@ -1,100 +0,0 @@
1−SMSC/MicroChip LAN9303 three port ethernet switch
2−-------------------------------------------------
3−
4−Required properties:
5−
6−- compatible: should be
7− - "smsc,lan9303-i2c" for I2C managed mode
8− or
9− - "smsc,lan9303-mdio" for mdio managed mode
10−
11−Optional properties:
12−
13−- reset-gpios: GPIO to be used to reset the whole device
14−- reset-duration: reset duration in milliseconds, defaults to 200 ms
15−
16−Subnodes:
17−
18−The integrated switch subnode should be specified according to the binding
19−described in dsa/dsa.txt. The CPU port of this switch is always port 0.
20−
21−Note: always use 'reg = <0/1/2>;' for the three DSA ports, even if the device is
22−configured to use 1/2/3 instead. This hardware configuration will be
23−auto-detected and mapped accordingly.
24−
25−Example:
26−
27−I2C managed mode:
28−
29− master: masterdevice@X {
30−
31− fixed-link { /* RMII fixed link to LAN9303 */
32− speed = <100>;
33− full-duplex;
34− };
35− };
36−
37− switch: switch@a {
38− compatible = "smsc,lan9303-i2c";
39− reg = <0xa>;
40− reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
41− reset-duration = <200>;
42−
43− ports {
44− #address-cells = <1>;
45− #size-cells = <0>;
46−
47− port@0 { /* RMII fixed link to master */
48− reg = <0>;
49− ethernet = <&master>;
50− };
51−
52− port@1 { /* external port 1 */
53− reg = <1>;
54− label = "lan1";
55− };
56−
57− port@2 { /* external port 2 */
58− reg = <2>;
59− label = "lan2";
60− };
61− };
62− };
63−
64−MDIO managed mode:
65−
66− master: masterdevice@X {
67− phy-handle = <&switch>;
68−
69− mdio {
70− #address-cells = <1>;
71− #size-cells = <0>;
72−
73− switch: switch-phy@0 {
74− compatible = "smsc,lan9303-mdio";
75− reg = <0>;
76− reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
77− reset-duration = <100>;
78−
79− ports {
80− #address-cells = <1>;
81− #size-cells = <0>;
82−
83− port@0 {
84− reg = <0>;
85− ethernet = <&master>;
86− };
87−
88− port@1 { /* external port 1 */
89− reg = <1>;
90− label = "lan1";
91− };
92−
93− port@2 { /* external port 2 */
94− reg = <2>;
95− label = "lan2";
96− };
97− };
98− };
99− };
100− };
Documentation/devicetree/bindings/net/dsa/nxp,netc-switch.yaml+131−0
@@ -0,0 +1,131 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/net/dsa/nxp,netc-switch.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: NETC Switch family
8+
9+description: >
10+ The NETC presents itself as a multi-function PCIe Root Complex Integrated
11+ Endpoint (RCiEP) and provides full 802.1Q Ethernet switch functionality,
12+ advanced QoS with 8 traffic classes and 4 drop resilience levels, and a
13+ full range of TSN standards capabilities.
14+
15+ The CPU port of the switch connects to an internal ENETC. The switch and
16+ the internal ENETC are fully integrated into the NETC IP, a back-to-back
17+ MAC is not required. Instead, a light-weight "pseudo MAC" provides the
18+ delineation between the switch and ENETC. This translates to lower power
19+ (less logic and memory) and lower delay (as there is no serialization
20+ delay across this link).
21+
22+maintainers:
23+ - Wei Fang <wei.fang@nxp.com>
24+
25+properties:
26+ compatible:
27+ enum:
28+ - pci1131,eef2
29+
30+ reg:
31+ maxItems: 1
32+
33+ dsa,member:
34+ description: >
35+ The property indicates DSA cluster and switch index. For NETC switch,
36+ the valid range of the switch index is 1 ~ 7, the index is reflected
37+ in the switch tag as an indication of the switch ID where the frame
38+ originated. The value 0 is reserved for ENETC VEPA switch, whose ID
39+ is hardwired to zero.
40+ items:
41+ - true
42+ - minimum: 1
43+ maximum: 7
44+
45+ ethernet-ports:
46+ type: object
47+ patternProperties:
48+ "^ethernet-port@[0-9a-f]$":
49+ type: object
50+ $ref: dsa-port.yaml#
51+
52+ properties:
53+ clocks:
54+ items:
55+ - description: MAC transmit/receive reference clock.
56+
57+ clock-names:
58+ items:
59+ - const: ref
60+
61+ mdio:
62+ $ref: /schemas/net/mdio.yaml#
63+ unevaluatedProperties: false
64+ description:
65+ Optional child node for switch port, otherwise use NETC EMDIO.
66+
67+ unevaluatedProperties: false
68+
69+required:
70+ - compatible
71+ - reg
72+ - dsa,member
73+ - ethernet-ports
74+
75+allOf:
76+ - $ref: /schemas/pci/pci-device.yaml
77+ - $ref: dsa.yaml#
78+
79+unevaluatedProperties: false
80+
81+examples:
82+ - |
83+ pcie {
84+ #address-cells = <3>;
85+ #size-cells = <2>;
86+
87+ ethernet-switch@0,2 {
88+ compatible = "pci1131,eef2";
89+ reg = <0x200 0 0 0 0>;
90+ dsa,member = <0 1>;
91+ pinctrl-names = "default";
92+ pinctrl-0 = <&pinctrl_switch>;
93+
94+ ethernet-ports {
95+ #address-cells = <1>;
96+ #size-cells = <0>;
97+
98+ ethernet-port@0 {
99+ reg = <0>;
100+ phy-handle = <&ethphy0>;
101+ phy-mode = "mii";
102+ };
103+
104+ ethernet-port@1 {
105+ reg = <1>;
106+ phy-handle = <&ethphy1>;
107+ phy-mode = "mii";
108+ };
109+
110+ ethernet-port@2 {
111+ reg = <2>;
112+ clocks = <&scmi_clk 103>;
113+ clock-names = "ref";
114+ phy-handle = <&ethphy2>;
115+ phy-mode = "rgmii-id";
116+ };
117+
118+ ethernet-port@3 {
119+ reg = <3>;
120+ ethernet = <&enetc3>;
121+ phy-mode = "internal";
122+
123+ fixed-link {
124+ speed = <2500>;
125+ full-duplex;
126+ pause;
127+ };
128+ };
129+ };
130+ };
131+ };
Documentation/devicetree/bindings/net/dsa/smsc,lan9303.yaml+123−0
@@ -0,0 +1,123 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/net/dsa/smsc,lan9303.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: SMSC/MicroChip LAN9303 three port ethernet switch
8+
9+maintainers:
10+ - Frank Li <Frank.Li@nxp.com>
11+
12+description:
13+ The LAN9303 is a three port ethernet switch with integrated PHYs for the
14+ two external ports. The third port is an RMII/MII interface to a host
15+ processor. The device can be managed via I2C or MDIO.
16+
17+ Note - always use 'reg = <0/1/2>;' for the three DSA ports, even if the
18+ device is configured to use 1/2/3 instead. This hardware configuration
19+ will be auto-detected and mapped accordingly.
20+
21+properties:
22+ compatible:
23+ enum:
24+ - smsc,lan9303-i2c
25+ - smsc,lan9303-mdio
26+
27+ reg:
28+ maxItems: 1
29+
30+ reset-gpios:
31+ description:
32+ GPIO to be used to reset the whole device
33+ maxItems: 1
34+
35+ reset-duration:
36+ description:
37+ Reset duration in milliseconds
38+ default: 200
39+ $ref: /schemas/types.yaml#/definitions/uint32
40+
41+required:
42+ - compatible
43+ - reg
44+
45+unevaluatedProperties: false
46+
47+allOf:
48+ - $ref: dsa.yaml#
49+
50+examples:
51+ - |
52+ #include <dt-bindings/gpio/gpio.h>
53+
54+ /* I2C managed mode */
55+ i2c {
56+ #address-cells = <1>;
57+ #size-cells = <0>;
58+
59+ switch@a {
60+ compatible = "smsc,lan9303-i2c";
61+ reg = <0xa>;
62+ reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
63+ reset-duration = <200>;
64+
65+ ports {
66+ #address-cells = <1>;
67+ #size-cells = <0>;
68+
69+ port@0 {
70+ reg = <0>;
71+ label = "cpu";
72+ ethernet = <&master>;
73+ };
74+
75+ port@1 {
76+ reg = <1>;
77+ label = "lan1";
78+ };
79+
80+ port@2 {
81+ reg = <2>;
82+ label = "lan2";
83+ };
84+ };
85+ };
86+ };
87+
88+ - |
89+ #include <dt-bindings/gpio/gpio.h>
90+
91+ /* MDIO managed mode */
92+ mdio {
93+ #address-cells = <1>;
94+ #size-cells = <0>;
95+
96+ switch@0 {
97+ compatible = "smsc,lan9303-mdio";
98+ reg = <0>;
99+ reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
100+ reset-duration = <100>;
101+
102+ ports {
103+ #address-cells = <1>;
104+ #size-cells = <0>;
105+
106+ port@0 {
107+ reg = <0>;
108+ label = "cpu";
109+ ethernet = <&master>;
110+ };
111+
112+ port@1 {
113+ reg = <1>;
114+ label = "lan1";
115+ };
116+
117+ port@2 {
118+ reg = <2>;
119+ label = "lan2";
120+ };
121+ };
122+ };
123+ };
Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml+14−2
@@ -73,15 +73,27 @@ properties: · 72 unmodified lines
7373 HSP CSR is to control and get status of different high-speed peripherals
7474 (such as Ethernet, USB, SATA, etc.) via register, which can tune
7575 board-level's parameters of PHY, etc.
76+
77+ Additional background information about the High-Speed Subsystem
78+ and the HSP CSR block is available in Chapter 10 ("High-Speed Interface")
79+ of the EIC7700X SoC Technical Reference Manual, Part 4
80+ (EIC7700X_SoC_Technical_Reference_Manual_Part4.pdf). The manual is
81+ publicly available at
82+ https://github.com/eswincomputing/EIC7700X-SoC-Technical-Reference-Manual/releases
83+
84+ This reference is provided for background information only.
7685 $ref: /schemas/types.yaml#/definitions/phandle-array
7786 items:
78− - items:
87+ - minItems: 4
88+ items:
7989 - description: Phandle to HSP(High-Speed Peripheral) device
8090 - description: Offset of phy control register for internal
8191 or external clock selection
8292 - description: Offset of AXI clock controller Low-Power request
8393 register
8494 - description: Offset of register controlling TX/RX clock delay
95+ - description: Optional offset of register controlling TXD delay
96+ - description: Optional offset of register controlling RXD delay
8597
8698 required:
8799 - compatible
@@ -116,7 +128,7 @@ examples: · 28 unmodified lines
116128 reset-names = "stmmaceth";
117129 rx-internal-delay-ps = <200>;
118130 tx-internal-delay-ps = <200>;
119− eswin,hsp-sp-csr = <&hsp_sp_csr 0x100 0x108 0x118>;
131+ eswin,hsp-sp-csr = <&hsp_sp_csr 0x100 0x108 0x118 0x114 0x11c>;
120132 snps,axi-config = <&stmmac_axi_setup>;
121133 snps,aal;
122134 snps,fixed-burst;
Documentation/devicetree/bindings/net/ethernet-phy.yaml+6−3
@@ -106,10 +106,13 @@ properties: · 105 unmodified lines
106106 by software.
107107
108108 clocks:
109− maxItems: 1
109+ minItems: 1
110+ maxItems: 2
110111 description:
111− External clock connected to the PHY. If not specified it is assumed
112− that the PHY uses a fixed crystal or an internal oscillator.
112+ External clock connected to the PHY or RX and TX clocks that the PHY
113+ requires to enable explicitly. If not specified it is assumed
114+ that the PHY uses a fixed crystal or an internal oscillator or that the
115+ RX/TX clocks are hardware enabled by default.
113116
114117 enet-phy-lane-swap:
115118 $ref: /schemas/types.yaml#/definitions/flag
Documentation/devicetree/bindings/net/mdio.txt+0−1
@@ -1 +0,0 @@
1−This file has moved to mdio.yaml.
Documentation/devicetree/bindings/net/mediatek,net.yaml+1−2
@@ -67,8 +67,7 @@ properties: · 66 unmodified lines
6767 - const: ppe
6868
6969 sram:
70− $ref: /schemas/types.yaml#/definitions/phandle
71− description: phandle to mmio SRAM
70+ maxItems: 1
7271
7372 mediatek,ethsys:
7473 $ref: /schemas/types.yaml#/definitions/phandle
Documentation/devicetree/bindings/net/microchip,lan8650.yaml+1−1
@@ -67,7 +67,7 @@ examples: · 66 unmodified lines
6767 pinctrl-names = "default";
6868 pinctrl-0 = <&eth0_pins>;
6969 interrupt-parent = <&gpio>;
70− interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
70+ interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
7171 local-mac-address = [04 05 06 01 02 03];
7272 spi-max-frequency = <15000000>;
7373 };
Documentation/devicetree/bindings/net/microchip,lan95xx.yaml+2−0
@@ -20,6 +20,8 @@ properties: · 19 unmodified lines
2020 compatible:
2121 items:
2222 - enum:
23+ - usb424,7500 # SMSC LAN7500 USB Ethernet Device
24+ - usb424,7505 # SMSC LAN7505 USB Ethernet Device
2325 - usb424,9500 # SMSC9500 USB Ethernet Device
2426 - usb424,9505 # SMSC9505 USB Ethernet Device
2527 - usb424,9530 # SMSC LAN9530 USB Ethernet Device
Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml+5−5
@@ -17,7 +17,7 @@ description: | · 16 unmodified lines
1717
1818 properties:
1919 $nodename:
20− pattern: "^switch@[0-9a-f]+$"
20+ pattern: "^(ethernet-)?switch@[0-9a-f]+$"
2121
2222 compatible:
2323 const: microchip,lan966x-switch
@@ -70,7 +70,7 @@ properties: · 46 unmodified lines
7070 additionalProperties: false
7171
7272 patternProperties:
73− "^port@[0-9a-f]+$":
73+ "^(ethernet-)?port@[0-9a-f]+$":
7474 type: object
7575
7676 $ref: /schemas/net/ethernet-controller.yaml#
@@ -138,7 +138,7 @@ additionalProperties: false · 61 unmodified lines
138138 examples:
139139 - |
140140 #include <dt-bindings/interrupt-controller/arm-gic.h>
141− switch: switch@e0000000 {
141+ switch: ethernet-switch@e0000000 {
142142 compatible = "microchip,lan966x-switch";
143143 reg = <0xe0000000 0x0100000>,
144144 <0xe2000000 0x0800000>;
@@ -151,14 +151,14 @@ examples: · 6 unmodified lines
151151 #address-cells = <1>;
152152 #size-cells = <0>;
153153
154− port0: port@0 {
154+ port0: ethernet-port@0 {
155155 reg = <0>;
156156 phy-handle = <&phy0>;
157157 phys = <&serdes 0 0>;
158158 phy-mode = "gmii";
159159 };
160160
161− port1: port@1 {
161+ port1: ethernet-port@1 {
162162 reg = <1>;
163163 sfp = <&sfp_eth1>;
164164 managed = "in-band-status";
Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml+4−0
@@ -22,6 +22,10 @@ properties: · 21 unmodified lines
2222 reg:
2323 maxItems: 1
2424
25+ disable-ports-gpios:
26+ description: GPIO pin to disable PoE on all ports
27+ maxItems: 1
28+
2529 vdd-supply:
2630 description: Regulator that provides 3.3V VDD power supply.
2731
Documentation/devicetree/bindings/net/qca,ar803x.yaml+19−0
@@ -28,6 +28,16 @@ allOf: · 27 unmodified lines
2828 reg:
2929 const: 7 # This PHY is always at MDIO address 7 in the IPQ5018 SoC
3030
31+ clocks:
32+ items:
33+ - description: RX clock
34+ - description: TX clock
35+
36+ clock-names:
37+ items:
38+ - const: rx
39+ - const: tx
40+
3141 resets:
3242 items:
3343 - description:
@@ -42,6 +52,11 @@ allOf: · 8 unmodified lines
4252 of this PHY are directly connected to an RJ45 connector.
4353 type: boolean
4454
55+ required:
56+ - clocks
57+ - clock-names
58+ - resets
59+
4560 properties:
4661 compatible:
4762 enum:
@@ -162,6 +177,7 @@ examples: · 114 unmodified lines
162177 };
163178 };
164179 - |
180+ #include <dt-bindings/clock/qcom,gcc-ipq5018.h>
165181 #include <dt-bindings/reset/qcom,gcc-ipq5018.h>
166182
167183 mdio {
@@ -172,6 +188,9 @@ examples: · 4 unmodified lines
172188 compatible = "ethernet-phy-id004d.d0c0";
173189 reg = <7>;
174190
191+ clocks = <&gcc GCC_GEPHY_RX_CLK>,
192+ <&gcc GCC_GEPHY_TX_CLK>;
193+ clock-names = "rx", "tx";
175194 resets = <&gcc GCC_GEPHY_MISC_ARES>;
176195 };
177196 };
Documentation/devicetree/bindings/net/qcom,bam-dmux.yaml+12−0
@@ -42,7 +42,19 @@ properties: · 41 unmodified lines
4242 description: State bits used by the AP to signal the modem.
4343 items:
4444 - description: Power control
45+ items:
46+ - description: Phandle to the Shared Memory Point 2 Point device
47+ handling the communication with a remote processor
48+ - description: Single bit index to toggle in the value sent to
49+ the remote processor
50+ maximum: 32
4551 - description: Power control acknowledgment
52+ items:
53+ - description: Phandle to the Shared Memory Point 2 Point device
54+ handling the communication with a remote processor
55+ - description: Single bit index to toggle in the value sent to
56+ the remote processor
57+ maximum: 32
4658
4759 qcom,smem-state-names:
4860 description: Names for the state bits used by the AP to signal the modem.
Documentation/devicetree/bindings/net/qcom,ipa.yaml+12−0
@@ -128,7 +128,19 @@ properties: · 127 unmodified lines
128128 description: State bits used in by the AP to signal the modem.
129129 items:
130130 - description: Whether the "ipa-clock-enabled" state bit is valid
131+ items:
132+ - description: Phandle to the Shared Memory Point 2 Point device
133+ handling the communication with a remote processor
134+ - description: Single bit index to toggle in the value sent to
135+ the remote processor
136+ maximum: 32
131137 - description: Whether the IPA clock is enabled (if valid)
138+ items:
139+ - description: Phandle to the Shared Memory Point 2 Point device
140+ handling the communication with a remote processor
141+ - description: Single bit index to toggle in the value sent to
142+ the remote processor
143+ maximum: 32
132144
133145 qcom,smem-state-names:
134146 description: The names of the state bits used for SMP2P output
Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm IPQ packet process engine (PPE)
88
99 maintainers:
10− - Luo Jie <quic_luoj@quicinc.com>
10+ - Luo Jie <jie.luo@oss.qualcomm.com>
1111 - Lei Wei <quic_leiwei@quicinc.com>
1212 - Suruchi Agarwal <quic_suruchia@quicinc.com>
1313 - Pavithra R <quic_pavir@quicinc.com>
Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml+8−1
@@ -18,7 +18,14 @@ properties: · 17 unmodified lines
1818 - realtek,rtl9302c-mdio
1919 - realtek,rtl9303-mdio
2020 - const: realtek,rtl9301-mdio
21− - const: realtek,rtl9301-mdio
21+ - items:
22+ - enum:
23+ - realtek,rtl9312-mdio
24+ - realtek,rtl9313-mdio
25+ - const: realtek,rtl9311-mdio
26+ - enum:
27+ - realtek,rtl9301-mdio
28+ - realtek,rtl9311-mdio
2229
2330 '#address-cells':
2431 const: 1
Documentation/devicetree/bindings/net/renesas,ether.yaml+1−2
@@ -121,8 +121,7 @@ examples: · 120 unmodified lines
121121 #size-cells = <0>;
122122
123123 phy1: ethernet-phy@1 {
124− compatible = "ethernet-phy-id0022.1537",
125− "ethernet-phy-ieee802.3-c22";
124+ compatible = "ethernet-phy-id0022.1537";
126125 reg = <1>;
127126 interrupt-parent = <&irqc0>;
128127 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml+20−11
@@ -31,7 +31,7 @@ properties: · 30 unmodified lines
3131 - const: starfive,jh7110-dwmac
3232 - const: snps,dwmac-5.20
3333 - items:
34− - const: starfive,jh8100-dwmac
34+ - const: starfive,jhb100-dwmac
3535 - const: starfive,jh7110-dwmac
3636 - const: snps,dwmac-5.20
3737
@@ -39,20 +39,24 @@ properties: · 1 unmodified line
3939 maxItems: 1
4040
4141 clocks:
42+ minItems: 5
4243 items:
4344 - description: GMAC main clock
4445 - description: GMAC AHB clock
4546 - description: PTP clock
4647 - description: TX clock
4748 - description: GTX clock
49+ - description: SGMII RX clock
4850
4951 clock-names:
52+ minItems: 5
5053 items:
5154 - const: stmmaceth
5255 - const: pclk
5356 - const: ptp_ref
5457 - const: tx
5558 - const: gtx
59+ - const: sgmii_rx
5660
5761 starfive,tx-use-rgmii-clk:
5862 description:
@@ -111,22 +115,19 @@ allOf: · 52 unmodified lines
111115 contains:
112116 const: starfive,jh7110-dwmac
113117 then:
114− properties:
115− interrupts:
116− minItems: 3
117− maxItems: 3
118−
119− interrupt-names:
120− minItems: 3
121− maxItems: 3
122−
123118 if:
124119 properties:
125120 compatible:
126121 contains:
127− const: starfive,jh8100-dwmac
122+ const: starfive,jhb100-dwmac
128123 then:
129124 properties:
125+ interrupts:
126+ maxItems: 1
127+
128+ interrupt-names:
129+ const: macirq
130+
130131 resets:
131132 maxItems: 1
132133
@@ -134,6 +135,14 @@ allOf: · 1 unmodified line
134135 const: stmmaceth
135136 else:
136137 properties:
138+ interrupts:
139+ minItems: 3
140+ maxItems: 3
141+
142+ interrupt-names:
143+ minItems: 3
144+ maxItems: 3
145+
137146 resets:
138147 minItems: 2
139148
Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml+1−1
@@ -21,7 +21,7 @@ properties: · 20 unmodified lines
2121 - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0
2222
2323 sram:
24− $ref: /schemas/types.yaml#/definitions/phandle
24+ maxItems: 1
2525 description:
2626 phandle to MSMC SRAM node
2727
Documentation/devicetree/bindings/net/ti,icssm-prueth.yaml+1−1
@@ -24,7 +24,7 @@ properties: · 23 unmodified lines
2424 - ti,am3359-prueth # for AM33x SoC family
2525
2626 sram:
27− $ref: /schemas/types.yaml#/definitions/phandle
27+ maxItems: 1
2828 description:
2929 phandle to OCMC SRAM node
3030
Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml+7−1
@@ -158,7 +158,13 @@ properties: · 157 unmodified lines
158158 description: State bits used by the AP to signal the WLAN Q6.
159159 items:
160160 - description: Signal bits used to enable/disable low power mode
161− on WCN in the case of WoW (Wake on Wireless).
161+ on WCN in the case of WoW (Wake on Wireless).
162+ items:
163+ - description: Phandle to the Shared Memory Point 2 Point device
164+ handling the communication with a remote processor
165+ - description: Single bit index to toggle in the value sent to
166+ the remote processor
167+ maximum: 32
162168
163169 qcom,smem-state-names:
164170 description: The names of the state bits used for SMP2P output.
Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml+7−1
@@ -80,7 +80,13 @@ properties: · 79 unmodified lines
8080 description: State bits used by the AP to signal the WLAN Q6.
8181 items:
8282 - description: Signal bits used to enable/disable low power mode
83− on WCN6750 in the case of WoW (Wake on Wireless).
83+ on WCN6750 in the case of WoW (Wake on Wireless).
84+ items:
85+ - description: Phandle to the Shared Memory Point 2 Point device
86+ handling the communication with a remote processor
87+ - description: Single bit index to toggle in the value sent to
88+ the remote processor
89+ maximum: 32
8490
8591 qcom,smem-state-names:
8692 description: The names of the state bits used for SMP2P output.
Documentation/devicetree/bindings/net/wireless/qcom,ipq5332-wifi.yaml+18−0
@@ -168,8 +168,26 @@ properties: · 167 unmodified lines
168168 description: States used by the AP to signal the remote processor
169169 items:
170170 - description: Shutdown WCSS pd
171+ items:
172+ - description: Phandle to the Shared Memory Point 2 Point device
173+ handling the communication with a remote processor
174+ - description: Single bit index to toggle in the value sent to
175+ the remote processor
176+ maximum: 32
171177 - description: Stop WCSS pd
178+ items:
179+ - description: Phandle to the Shared Memory Point 2 Point device
180+ handling the communication with a remote processor
181+ - description: Single bit index to toggle in the value sent to
182+ the remote processor
183+ maximum: 32
172184 - description: Spawn WCSS pd
185+ items:
186+ - description: Phandle to the Shared Memory Point 2 Point device
187+ handling the communication with a remote processor
188+ - description: Single bit index to toggle in the value sent to
189+ the remote processor
190+ maximum: 32
173191
174192 qcom,smem-state-names:
175193 description:
Documentation/devicetree/bindings/net/wireless/st,stlc4560.yaml+61−0
@@ -0,0 +1,61 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/net/wireless/st,stlc4560.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: ST/Intersil/Conexant stlc45xx/p54spi/cx3110x SPI wireless device
8+
9+maintainers:
10+ - Christian Lamparter <chunkeey@gmail.com>
11+
12+description:
13+ The SPI variant of the Intersil Prism54 wireless device was sold
14+ under a variety of names, including Conexant CX3110x and
15+ ST Microelectronics STLC5460.
16+
17+allOf:
18+ - $ref: ieee80211.yaml#
19+ - $ref: /schemas/spi/spi-peripheral-props.yaml#
20+
21+properties:
22+ compatible:
23+ oneOf:
24+ - const: st,stlc4560
25+ - items:
26+ - enum:
27+ - cnxt,3110x
28+ - isil,p54spi
29+ - st,stlc4550
30+ - const: st,stlc4560
31+
32+ reg:
33+ maxItems: 1
34+
35+ interrupts:
36+ maxItems: 1
37+
38+ powerdown-gpios:
39+ maxItems: 1
40+
41+required:
42+ - compatible
43+ - reg
44+ - interrupts
45+
46+unevaluatedProperties: false
47+
48+examples:
49+ - |
50+ spi {
51+ #address-cells = <1>;
52+ #size-cells = <0>;
53+
54+ wifi@0 {
55+ compatible = "st,stlc4560";
56+ reg = <0>;
57+ spi-max-frequency = <48000000>;
58+ interrupts-extended = <&gpio 23>;
59+ powerdown-gpios = <&gpio 1>;
60+ };
61+ };
Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml+2−0
@@ -16,6 +16,8 @@ properties: · 15 unmodified lines
1616 $ref: /schemas/types.yaml#/definitions/phandle-array
1717 description:
1818 List of phandle to the nvmem providers.
19+ items:
20+ maxItems: 1
1921
2022 nvmem-cells:
2123 $ref: /schemas/types.yaml#/definitions/phandle-array
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml+32−0
@@ -66,16 +66,34 @@ properties: · 65 unmodified lines
6666 - const: dma
6767
6868 reset-gpio:
69+ deprecated: true
6970 description: Should specify the GPIO for controlling the PCI bus device
7071 reset signal. It's not polarity aware and defaults to active-low reset
7172 sequence (L=reset state, H=operation state) (optional required).
73+ This property is deprecated, instead of referencing this property from the
74+ host bridge node, use the reset-gpios property from the root port node.
7275
7376 reset-gpio-active-high:
77+ deprecated: true
7478 description: If present then the reset sequence using the GPIO
7579 specified in the "reset-gpio" property is reversed (H=reset state,
7680 L=operation state) (optional required).
81+ This property is deprecated along with the reset-gpio property above, use
82+ the reset-gpios property from the root port node.
7783 type: boolean
7884
85+ pcie@0:
86+ description:
87+ Describe the i.MX6 PCIe Root Port.
88+ type: object
89+ $ref: /schemas/pci/pci-pci-bridge.yaml#
90+
91+ properties:
92+ reg:
93+ maxItems: 1
94+
95+ unevaluatedProperties: false
96+
7997 required:
8098 - compatible
8199 - reg
@@ -236,6 +254,7 @@ unevaluatedProperties: false · 154 unmodified lines
236254 examples:
237255 - |
238256 #include <dt-bindings/clock/imx6qdl-clock.h>
257+ #include <dt-bindings/gpio/gpio.h>
239258 #include <dt-bindings/interrupt-controller/arm-gic.h>
240259
241260 pcie: pcie@1ffc000 {
@@ -262,5 +281,18 @@ examples: · 20 unmodified lines
262281 <&clks IMX6QDL_CLK_LVDS1_GATE>,
263282 <&clks IMX6QDL_CLK_PCIE_REF_125M>;
264283 clock-names = "pcie", "pcie_bus", "pcie_phy";
284+
285+ pcie_port0: pcie@0 {
286+ compatible = "pciclass,0604";
287+ device_type = "pci";
288+ reg = <0x0 0x0 0x0 0x0 0x0>;
289+ bus-range = <0x01 0xff>;
290+
291+ #address-cells = <3>;
292+ #size-cells = <2>;
293+ ranges;
294+
295+ reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
296+ };
265297 };
266298 ...
Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml+7−2
@@ -27,16 +27,20 @@ properties: · 26 unmodified lines
2727 - const: snps,dw-pcie
2828
2929 reg:
30+ minItems: 3
3031 items:
3132 - description: Controller control and status registers.
3233 - description: PCIe configuration registers.
3334 - description: Controller application registers.
35+ - description: Internal Address Translation Unit (iATU) registers.
3436
3537 reg-names:
38+ minItems: 3
3639 items:
3740 - const: dbi
3841 - const: config
3942 - const: app
43+ - const: atu
4044
4145 ranges:
4246 maxItems: 1
@@ -95,8 +99,9 @@ examples: · 52 unmodified lines
9599 #size-cells = <2>;
96100 reg = <0xd0e00000 0x1000>,
97101 <0xd2000000 0x800000>,
98− <0xd0a41000 0x1000>;
99− reg-names = "dbi", "config", "app";
102+ <0xd0a41000 0x1000>,
103+ <0xd0ec0000 0x1000>;
104+ reg-names = "dbi", "config", "app", "atu";
100105 linux,pci-domain = <0>;
101106 max-link-speed = <4>;
102107 bus-range = <0x00 0x08>;
Documentation/devicetree/bindings/pci/mediatek-pcie-mt7623.yaml+2−2
@@ -125,8 +125,8 @@ examples: · 124 unmodified lines
125125 phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2";
126126 power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>;
127127 bus-range = <0x00 0xff>;
128− ranges = <0x81000000 0 0x1a160000 0 0x1a160000 0 0x00010000>, /* I/O space */
129− <0x83000000 0 0x60000000 0 0x60000000 0 0x10000000>; /* memory space */
128+ ranges = <0x81000000 0 0x1a160000 0 0x1a160000 0 0x00010000>, /* I/O space */
129+ <0x83000000 0 0x60000000 0 0x60000000 0 0x10000000>; /* memory space */
130130
131131 pcie@0,0 {
132132 device_type = "pci";
Documentation/devicetree/bindings/pci/mediatek-pcie.yaml+26−0
@@ -14,6 +14,7 @@ properties: · 13 unmodified lines
1414 oneOf:
1515 - enum:
1616 - airoha,an7583-pcie
17+ - econet,en7528-pcie
1718 - mediatek,mt2712-pcie
1819 - mediatek,mt7622-pcie
1920 - mediatek,mt7629-pcie
@@ -226,6 +227,31 @@ allOf: · 206 unmodified lines
226227
227228 mediatek,pbus-csr: false
228229
230+ - if:
231+ properties:
232+ compatible:
233+ contains:
234+ const: econet,en7528-pcie
235+ then:
236+ properties:
237+ clocks:
238+ maxItems: 1
239+
240+ clock-names:
241+ maxItems: 1
242+
243+ resets: false
244+
245+ reset-names: false
246+
247+ power-domains: false
248+
249+ mediatek,pbus-csr: false
250+
251+ required:
252+ - phys
253+ - phy-names
254+
229255 unevaluatedProperties: false
230256
231257 examples:
Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml+50−0
@@ -20,6 +20,7 @@ properties: · 19 unmodified lines
2020 - const: qcom,pcie-sm8550
2121 - items:
2222 - enum:
23+ - qcom,eliza-pcie
2324 - qcom,kaanapali-pcie
2425 - qcom,sar2130p-pcie
2526 - qcom,pcie-sm8650
@@ -91,6 +92,55 @@ required: · 65 unmodified lines
9192
9293 allOf:
9394 - $ref: qcom,pcie-common.yaml#
95+ - if:
96+ properties:
97+ compatible:
98+ contains:
99+ const: qcom,eliza-pcie
100+ then:
101+ properties:
102+ reg:
103+ minItems: 6
104+ reg-names:
105+ minItems: 6
106+
107+ - if:
108+ properties:
109+ compatible:
110+ contains:
111+ const: qcom,eliza-pcie
112+ then:
113+ properties:
114+ clocks:
115+ minItems: 8
116+ maxItems: 8
117+ clock-names:
118+ minItems: 8
119+ maxItems: 8
120+
121+ - if:
122+ properties:
123+ compatible:
124+ contains:
125+ const: qcom,eliza-pcie
126+ then:
127+ properties:
128+ interrupts:
129+ minItems: 9
130+ interrupt-names:
131+ minItems: 9
132+
133+ - if:
134+ properties:
135+ compatible:
136+ contains:
137+ const: qcom,eliza-pcie
138+ then:
139+ properties:
140+ resets:
141+ minItems: 2
142+ reset-names:
143+ minItems: 2
94144
95145 unevaluatedProperties: false
96146
Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml+15−8
@@ -4,21 +4,27 @@ · 3 unmodified lines
44 $id: http://devicetree.org/schemas/pci/renesas,r9a08g045-pcie.yaml#
55 $schema: http://devicetree.org/meta-schemas/core.yaml#
66
7−title: Renesas RZ/G3S PCIe host controller
7+title: Renesas RZ/G3S PCIe host controller (and similar SoCs)
88
99 maintainers:
1010 - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
1111
12−description:
13− Renesas RZ/G3{E,S} PCIe host controllers comply with PCIe
14− Base Specification 4.0 and support up to 5 GT/s (Gen2) for RZ/G3S and
15− up to 8 GT/s (Gen3) for RZ/G3E.
12+description: |
13+ PCIe host controller found in Renesas RZ/G3S and similar SoCs complies
14+ with PCIe Base Specification 4.0 and supports different link speeds
15+ depending on the SoC variant:
16+ - Gen2 (5 GT/s): RZ/G3S
17+ - Gen3 (8 GT/s): RZ/G3E, RZ/V2N
1618
1719 properties:
1820 compatible:
19− enum:
20− - renesas,r9a08g045-pcie # RZ/G3S
21− - renesas,r9a09g047-pcie # RZ/G3E
21+ oneOf:
22+ - enum:
23+ - renesas,r9a08g045-pcie # RZ/G3S
24+ - renesas,r9a09g047-pcie # RZ/G3E
25+ - items:
26+ - const: renesas,r9a09g056-pcie # RZ/V2N
27+ - const: renesas,r9a09g047-pcie
2228
2329 reg:
2430 maxItems: 1
@@ -152,6 +158,7 @@ patternProperties: · 127 unmodified lines
152158 enum:
153159 - 0x0033
154160 - 0x0039
161+ - 0x003b
155162
156163 clocks:
157164 items:
Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml+1−1
@@ -109,7 +109,7 @@ examples: · 108 unmodified lines
109109 num-lanes = <1>;
110110 num-viewport = <3>;
111111 bus-range = <0x00 0xff>;
112− ranges = <0x81000000 0 0 0x0c001000 0 0x00010000>,
112+ ranges = <0x81000000 0 0 0x0c001000 0 0x00010000>,
113113 <0x82000000 0 0x0c011000 0x0c011000 0 0x03feefff>;
114114 vdd10-supply = <&ldo6_reg>;
115115 vdd18-supply = <&ldo7_reg>;
Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml+3−0
@@ -30,6 +30,8 @@ properties: · 29 unmodified lines
3030 device-id:
3131 const: 0x2042
3232
33+ dma-coherent: true
34+
3335 msi-parent: true
3436
3537 allOf:
@@ -60,5 +62,6 @@ examples: · 24 unmodified lines
6062 vendor-id = <0x1f1c>;
6163 device-id = <0x2042>;
6264 cdns,no-bar-match-nbits = <48>;
65+ dma-coherent;
6366 msi-parent = <&msi>;
6467 };
Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml+3−2
@@ -49,8 +49,9 @@ properties: · 48 unmodified lines
4949 A phandle to the parent I2C node and the slave address of the device
5050 used to configure tc9563 to change FTS, tx amplitude etc.
5151 items:
52− - description: Phandle to the I2C controller node
53− - description: I2C slave address
52+ - items:
53+ - description: Phandle to the I2C controller node
54+ - description: I2C slave address
5455
5556 patternProperties:
5657 "^pcie@[1-3],0$":
Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml+93−0
@@ -0,0 +1,93 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/pci/ultrarisc,dp1000-pcie.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: UltraRISC DP1000 PCIe Host Controller
8+
9+description:
10+ UltraRISC DP1000 SoC PCIe host controller is based on the DesignWare PCIe IP.
11+
12+maintainers:
13+ - Xincheng Zhang <zhangxincheng@ultrarisc.com>
14+ - Jia Wang <wangjia@ultrarisc.com>
15+
16+allOf:
17+ - $ref: /schemas/pci/snps,dw-pcie.yaml#
18+
19+properties:
20+ compatible:
21+ const: ultrarisc,dp1000-pcie
22+
23+ reg:
24+ items:
25+ - description: Data Bus Interface (DBI) registers.
26+ - description: PCIe configuration space region.
27+
28+ reg-names:
29+ items:
30+ - const: dbi
31+ - const: config
32+
33+ num-lanes:
34+ $ref: /schemas/types.yaml#/definitions/uint32
35+ enum: [4, 16]
36+ description: Number of lanes to use.
37+
38+ interrupts:
39+ items:
40+ - description: MSI interrupt
41+ - description: Legacy INTA interrupt
42+ - description: Legacy INTB interrupt
43+ - description: Legacy INTC interrupt
44+ - description: Legacy INTD interrupt
45+
46+ interrupt-names:
47+ items:
48+ - const: msi
49+ - const: inta
50+ - const: intb
51+ - const: intc
52+ - const: intd
53+
54+required:
55+ - compatible
56+ - reg
57+ - reg-names
58+ - interrupts
59+ - interrupt-names
60+
61+unevaluatedProperties: false
62+
63+examples:
64+ - |
65+ soc {
66+ #address-cells = <2>;
67+ #size-cells = <2>;
68+
69+ pcie@21000000 {
70+ compatible = "ultrarisc,dp1000-pcie";
71+ reg = <0x0 0x21000000 0x0 0x01000000>,
72+ <0x0 0x4fff0000 0x0 0x00010000>;
73+ reg-names = "dbi", "config";
74+ ranges = <0x81000000 0x0 0x4fbf0000 0x0 0x4fbf0000 0x0 0x00400000>,
75+ <0x82000000 0x0 0x40000000 0x0 0x40000000 0x0 0x0fbf0000>,
76+ <0xc3000000 0x40 0x00000000 0x40 0x00000000 0xd 0x00000000>;
77+ #address-cells = <3>;
78+ #size-cells = <2>;
79+ #interrupt-cells = <1>;
80+ device_type = "pci";
81+ dma-coherent;
82+ bus-range = <0x0 0xff>;
83+ num-lanes = <16>;
84+ interrupt-parent = <&plic>;
85+ interrupts = <43>, <44>, <45>, <46>, <47>;
86+ interrupt-names = "msi", "inta", "intb", "intc", "intd";
87+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
88+ interrupt-map = <0x0 0x0 0x0 0x1 &plic 44>,
89+ <0x0 0x0 0x0 0x2 &plic 45>,
90+ <0x0 0x0 0x0 0x3 &plic 46>,
91+ <0x0 0x0 0x0 0x4 &plic 47>;
92+ };
93+ };
Documentation/devicetree/bindings/phy/axiado,ax3000-emmc-phy.yaml+37−0
@@ -0,0 +1,37 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/phy/axiado,ax3000-emmc-phy.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Axiado AX3000 Arasan eMMC PHY
8+
9+maintainers:
10+ - SriNavmani A <srinavmani@axiado.com>
11+ - Tzu-Hao Wei <twei@axiado.com>
12+ - Prasad Bolisetty <pbolisetty@axiado.com>
13+
14+properties:
15+ compatible:
16+ const: axiado,ax3000-emmc-phy
17+
18+ reg:
19+ maxItems: 1
20+
21+ "#phy-cells":
22+ const: 0
23+
24+required:
25+ - compatible
26+ - reg
27+ - "#phy-cells"
28+
29+additionalProperties: false
30+
31+examples:
32+ - |
33+ phy@80801c00 {
34+ compatible = "axiado,ax3000-emmc-phy";
35+ reg = <0x80801c00 0x1000>;
36+ #phy-cells = <0>;
37+ };
Documentation/devicetree/bindings/phy/econet,en751221-pcie-phy.yaml+50−0
@@ -0,0 +1,50 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/phy/econet,en751221-pcie-phy.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: EcoNet PCI-Express PHY for EcoNet EN751221 and EN7528
8+
9+maintainers:
10+ - Caleb James DeLisle <cjd@cjdns.fr>
11+
12+description:
13+ The PCIe PHY supports physical layer functionality for PCIe Gen1 and
14+ Gen1/Gen2 ports. On these SoCs, port 0 is a Gen1-only port while
15+ port 1 is Gen1/Gen2 capable.
16+
17+properties:
18+ compatible:
19+ enum:
20+ - econet,en751221-pcie-gen1
21+ - econet,en751221-pcie-gen2
22+ - econet,en7528-pcie-gen1
23+ - econet,en7528-pcie-gen2
24+
25+ reg:
26+ maxItems: 1
27+
28+ "#phy-cells":
29+ const: 0
30+
31+required:
32+ - compatible
33+ - reg
34+ - "#phy-cells"
35+
36+additionalProperties: false
37+
38+examples:
39+ - |
40+ soc {
41+ #address-cells = <1>;
42+ #size-cells = <1>;
43+
44+ pcie-phy@1faf2000 {
45+ compatible = "econet,en7528-pcie-gen1";
46+ reg = <0x1faf2000 0x1000>;
47+ #phy-cells = <0>;
48+ };
49+ };
50+...
Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml+139−0
@@ -0,0 +1,139 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/phy/fsl,lynx-10g.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Freescale Lynx 10G SerDes PHY
8+
9+maintainers:
10+ - Vladimir Oltean <vladimir.oltean@nxp.com>
11+
12+description:
13+ The 10G Lynx is a multi-protocol SerDes block which handles networking, PCIe,
14+ SATA and other high-speed interfaces. It is present on most QorIQ and
15+ Layerscape SoCs. The register map is common, but the integration is
16+ SoC-specific, with the differences consisting in register endianness, the
17+ number of lanes, protocol converters available per lane and their location in
18+ the PCCR registers. Some SoCs have multiple SerDes blocks and those differ in
19+ their protocol capabilities per lane.
20+
21+properties:
22+ compatible:
23+ enum:
24+ - fsl,ls1028a-serdes
25+ - fsl,ls1046a-serdes1
26+ - fsl,ls1046a-serdes2
27+ - fsl,ls1088a-serdes1
28+ - fsl,ls1088a-serdes2
29+ - fsl,ls2088a-serdes1
30+ - fsl,ls2088a-serdes2
31+
32+ reg:
33+ maxItems: 1
34+
35+ big-endian: true
36+
37+ "#phy-cells":
38+ const: 1
39+
40+ "#address-cells":
41+ const: 1
42+
43+ "#size-cells":
44+ const: 0
45+
46+patternProperties:
47+ "^phy@[0-7]$":
48+ type: object
49+ description: SerDes lane (single RX/TX differential pair)
50+
51+ properties:
52+ reg:
53+ minimum: 0
54+ maximum: 7
55+ description: Lane index as seen in register map
56+
57+ "#phy-cells":
58+ const: 0
59+
60+ required:
61+ - reg
62+ - "#phy-cells"
63+
64+ additionalProperties: false
65+
66+required:
67+ - compatible
68+ - reg
69+ - "#phy-cells"
70+ - "#address-cells"
71+ - "#size-cells"
72+
73+allOf:
74+ - if:
75+ properties:
76+ compatible:
77+ contains:
78+ enum:
79+ - fsl,ls1028a-serdes
80+ - fsl,ls1046a-serdes1
81+ - fsl,ls1046a-serdes2
82+ - fsl,ls1088a-serdes1
83+ - fsl,ls1088a-serdes2
84+ then:
85+ patternProperties:
86+ "^phy@[0-7]$":
87+ properties:
88+ reg:
89+ minimum: 0
90+ maximum: 3
91+ - if:
92+ properties:
93+ compatible:
94+ enum:
95+ - fsl,ls1046a-serdes1
96+ - fsl,ls1046a-serdes2
97+ then:
98+ required:
99+ - big-endian
100+ else:
101+ properties:
102+ big-endian: false
103+
104+additionalProperties: false
105+
106+examples:
107+ - |
108+ soc {
109+ #address-cells = <2>;
110+ #size-cells = <2>;
111+
112+ serdes@1ea0000 {
113+ compatible = "fsl,ls1028a-serdes";
114+ reg = <0x0 0x1ea0000 0x0 0xffff>;
115+ #address-cells = <1>;
116+ #size-cells = <0>;
117+ #phy-cells = <1>;
118+
119+ phy@0 {
120+ reg = <0>;
121+ #phy-cells = <0>;
122+ };
123+
124+ phy@1 {
125+ reg = <1>;
126+ #phy-cells = <0>;
127+ };
128+
129+ phy@2 {
130+ reg = <2>;
131+ #phy-cells = <0>;
132+ };
133+
134+ phy@3 {
135+ reg = <3>;
136+ #phy-cells = <0>;
137+ };
138+ };
139+ };
Documentation/devicetree/bindings/phy/fsl,lynx-28g.yaml+45−3
@@ -9,10 +9,37 @@ title: Freescale Lynx 28G SerDes PHY · 8 unmodified lines
99 maintainers:
1010 - Ioana Ciornei <ioana.ciornei@nxp.com>
1111
12+description:
13+ The Lynx 28G is a multi-lane, multi-protocol SerDes (PCIe, SATA, Ethernet)
14+ present in multiple instances on NXP LX2160A and LX2162A SoCs. All instances
15+ share a common register map and programming model, however they differ in
16+ supported protocols per lane in a way that is not detectable by said
17+ programming model without prior knowledge. The distinction is made through
18+ the compatible string.
19+
1220 properties:
1321 compatible:
14− enum:
15− - fsl,lynx-28g
22+ oneOf:
23+ - const: fsl,lynx-28g
24+ deprecated: true
25+ description:
26+ Legacy compatibility string for Lynx 28G SerDes. Any assumption
27+ regarding whether a certain lane supports a certain protocol may
28+ be incorrect. Deprecated except when used as a fallback. Use
29+ device-specific strings instead.
30+ - items:
31+ - const: fsl,lx2160a-serdes1
32+ - const: fsl,lynx-28g
33+ - items:
34+ - const: fsl,lx2160a-serdes2
35+ - const: fsl,lynx-28g
36+ - items:
37+ - const: fsl,lx2162a-serdes1
38+ - const: fsl,lynx-28g
39+ - items:
40+ - const: fsl,lx2162a-serdes2
41+ - const: fsl,lynx-28g
42+ - const: fsl,lx2160a-serdes3
1643
1744 reg:
1845 maxItems: 1
@@ -51,6 +78,21 @@ required: · 32 unmodified lines
5178 - reg
5279 - "#phy-cells"
5380
81+allOf:
82+ # LX2162A SerDes 1 has fewer lanes than the others
83+ - if:
84+ properties:
85+ compatible:
86+ contains:
87+ const: fsl,lx2162a-serdes1
88+ then:
89+ patternProperties:
90+ "^phy@[0-7]$":
91+ properties:
92+ reg:
93+ minimum: 4
94+ maximum: 7
95+
5496 additionalProperties: false
5597
5698 examples:
@@ -60,7 +102,7 @@ examples: · 3 unmodified lines
60102 #size-cells = <2>;
61103
62104 serdes@1ea0000 {
63− compatible = "fsl,lynx-28g";
105+ compatible = "fsl,lx2160a-serdes1", "fsl,lynx-28g";
64106 reg = <0x0 0x1ea0000 0x0 0x1e30>;
65107 #address-cells = <1>;
66108 #size-cells = <0>;
Documentation/devicetree/bindings/phy/nxp,tja1145.yaml+86−0
@@ -0,0 +1,86 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/phy/nxp,tja1145.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: TJA1145 CAN transceiver
8+
9+maintainers:
10+ - Dimitri Fedrau <dimitri.fedrau@liebherr.com>
11+
12+allOf:
13+ - $ref: /schemas/spi/spi-peripheral-props.yaml#
14+
15+properties:
16+ compatible:
17+ const: nxp,tja1145
18+
19+ interrupts:
20+ maxItems: 1
21+
22+ reg:
23+ maxItems: 1
24+
25+ "#phy-cells":
26+ const: 0
27+
28+ spi-cpha: true
29+
30+ spi-max-frequency:
31+ maximum: 4000000
32+
33+ spi-cs-setup-delay-ns:
34+ minimum: 50
35+ default: 50
36+
37+ spi-cs-hold-delay-ns:
38+ minimum: 50
39+ default: 50
40+
41+ spi-cs-inactive-delay-ns:
42+ minimum: 250
43+ default: 250
44+
45+ vcc-supply:
46+ description:
47+ CAN transceiver supply voltage
48+
49+ vio-supply:
50+ description:
51+ Supply voltage for I/O level adaptor
52+
53+ vbat-supply:
54+ description:
55+ Battery supply voltage
56+
57+required:
58+ - compatible
59+ - reg
60+ - "#phy-cells"
61+ - spi-cpha
62+
63+additionalProperties: false
64+
65+examples:
66+ - |
67+ #include <dt-bindings/interrupt-controller/irq.h>
68+ spi {
69+ #address-cells = <1>;
70+ #size-cells = <0>;
71+ can-phy@0 {
72+ compatible = "nxp,tja1145";
73+ interrupt-parent = <&gpio0>;
74+ interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
75+ reg = <0>;
76+ #phy-cells = <0>;
77+ spi-cpha;
78+ spi-max-frequency = <4000000>;
79+ spi-cs-setup-delay-ns = <50>;
80+ spi-cs-hold-delay-ns = <50>;
81+ spi-cs-inactive-delay-ns = <250>;
82+ vcc-supply = <&reg_5v0>;
83+ vio-supply = <&reg_3v3>;
84+ vbat-supply = <&reg_24v0>;
85+ };
86+ };
Documentation/devicetree/bindings/phy/qcom,dsi-phy-7nm.yaml+1−0
@@ -20,6 +20,7 @@ properties: · 19 unmodified lines
2020 - qcom,dsi-phy-7nm
2121 - qcom,dsi-phy-7nm-8150
2222 - qcom,kaanapali-dsi-phy-3nm
23+ - qcom,milos-dsi-phy-4nm
2324 - qcom,sa8775p-dsi-phy-5nm
2425 - qcom,sar2130p-dsi-phy-5nm
2526 - qcom,sc7280-dsi-phy-7nm
Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml+1−0
@@ -74,6 +74,7 @@ allOf: · 73 unmodified lines
7474 compatible:
7575 enum:
7676 - qcom,glymur-dp-phy
77+ - qcom,sa8775p-edp-phy
7778 - qcom,x1e80100-dp-phy
7879 then:
7980 properties:
Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml+4−0
@@ -30,6 +30,10 @@ properties: · 29 unmodified lines
3030 - qcom,sdm660-qusb2-phy
3131 - qcom,sm4250-qusb2-phy
3232 - qcom,sm6115-qusb2-phy
33+ - items:
34+ - enum:
35+ - qcom,ipq5210-qusb2-phy
36+ - const: qcom,ipq6018-qusb2-phy
3337 - items:
3438 - enum:
3539 - qcom,sc7180-qusb2-phy
Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml+17−2
@@ -16,6 +16,8 @@ description: · 15 unmodified lines
1616 properties:
1717 compatible:
1818 enum:
19+ - qcom,eliza-qmp-gen3x1-pcie-phy
20+ - qcom,eliza-qmp-gen3x2-pcie-phy
1921 - qcom,glymur-qmp-gen4x2-pcie-phy
2022 - qcom,glymur-qmp-gen5x4-pcie-phy
2123 - qcom,kaanapali-qmp-gen3x2-pcie-phy
@@ -136,13 +138,22 @@ allOf: · 114 unmodified lines
136138 items:
137139 - description: port a
138140 - description: port b
139− required:
140− - qcom,4ln-config-sel
141141 else:
142142 properties:
143143 reg:
144144 maxItems: 1
145145
146+ - if:
147+ properties:
148+ compatible:
149+ contains:
150+ enum:
151+ - qcom,sc8280xp-qmp-gen3x4-pcie-phy
152+ - qcom,x1e80100-qmp-gen4x4-pcie-phy
153+ then:
154+ required:
155+ - qcom,4ln-config-sel
156+
146157 - if:
147158 properties:
148159 compatible:
@@ -181,6 +192,8 @@ allOf: · 32 unmodified lines
181192 compatible:
182193 contains:
183194 enum:
195+ - qcom,eliza-qmp-gen3x1-pcie-phy
196+ - qcom,eliza-qmp-gen3x2-pcie-phy
184197 - qcom,glymur-qmp-gen4x2-pcie-phy
185198 - qcom,glymur-qmp-gen5x4-pcie-phy
186199 - qcom,qcs8300-qmp-gen4x2-pcie-phy
@@ -206,6 +219,8 @@ allOf: · 19 unmodified lines
206219 compatible:
207220 contains:
208221 enum:
222+ - qcom,eliza-qmp-gen3x1-pcie-phy
223+ - qcom,eliza-qmp-gen3x2-pcie-phy
209224 - qcom,glymur-qmp-gen4x2-pcie-phy
210225 - qcom,glymur-qmp-gen5x4-pcie-phy
211226 - qcom,kaanapali-qmp-gen3x2-pcie-phy
Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml+1−0
@@ -31,6 +31,7 @@ properties: · 30 unmodified lines
3131 - items:
3232 - enum:
3333 - qcom,eliza-qmp-ufs-phy
34+ - qcom,nord-qmp-ufs-phy
3435 - const: qcom,sm8650-qmp-ufs-phy
3536 - items:
3637 - enum:
Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml+26−20
@@ -15,26 +15,32 @@ description: · 14 unmodified lines
1515
1616 properties:
1717 compatible:
18− enum:
19− - qcom,glymur-qmp-usb3-uni-phy
20− - qcom,ipq5424-qmp-usb3-phy
21− - qcom,ipq6018-qmp-usb3-phy
22− - qcom,ipq8074-qmp-usb3-phy
23− - qcom,ipq9574-qmp-usb3-phy
24− - qcom,msm8996-qmp-usb3-phy
25− - qcom,qcs8300-qmp-usb3-uni-phy
26− - qcom,qdu1000-qmp-usb3-uni-phy
27− - qcom,sa8775p-qmp-usb3-uni-phy
28− - qcom,sc8180x-qmp-usb3-uni-phy
29− - qcom,sc8280xp-qmp-usb3-uni-phy
30− - qcom,sdm845-qmp-usb3-uni-phy
31− - qcom,sdx55-qmp-usb3-uni-phy
32− - qcom,sdx65-qmp-usb3-uni-phy
33− - qcom,sdx75-qmp-usb3-uni-phy
34− - qcom,sm8150-qmp-usb3-uni-phy
35− - qcom,sm8250-qmp-usb3-uni-phy
36− - qcom,sm8350-qmp-usb3-uni-phy
37− - qcom,x1e80100-qmp-usb3-uni-phy
18+ oneOf:
19+ - items:
20+ - enum:
21+ - qcom,glymur-qmp-usb3-uni-phy
22+ - qcom,ipq5424-qmp-usb3-phy
23+ - qcom,ipq6018-qmp-usb3-phy
24+ - qcom,ipq8074-qmp-usb3-phy
25+ - qcom,ipq9574-qmp-usb3-phy
26+ - qcom,msm8996-qmp-usb3-phy
27+ - qcom,qcs8300-qmp-usb3-uni-phy
28+ - qcom,qdu1000-qmp-usb3-uni-phy
29+ - qcom,sa8775p-qmp-usb3-uni-phy
30+ - qcom,sc8180x-qmp-usb3-uni-phy
31+ - qcom,sc8280xp-qmp-usb3-uni-phy
32+ - qcom,sdm845-qmp-usb3-uni-phy
33+ - qcom,sdx55-qmp-usb3-uni-phy
34+ - qcom,sdx65-qmp-usb3-uni-phy
35+ - qcom,sdx75-qmp-usb3-uni-phy
36+ - qcom,sm8150-qmp-usb3-uni-phy
37+ - qcom,sm8250-qmp-usb3-uni-phy
38+ - qcom,sm8350-qmp-usb3-uni-phy
39+ - qcom,x1e80100-qmp-usb3-uni-phy
40+ - items:
41+ - enum:
42+ - qcom,ipq5210-qmp-usb3-phy
43+ - const: qcom,ipq9574-qmp-usb3-phy
3844
3945 reg:
4046 maxItems: 1
Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml+4−0
@@ -16,6 +16,10 @@ description: · 15 unmodified lines
1616 properties:
1717 compatible:
1818 oneOf:
19+ - items:
20+ - enum:
21+ - qcom,eliza-qmp-usb3-dp-phy
22+ - const: qcom,sm8650-qmp-usb3-dp-phy
1923 - items:
2024 - enum:
2125 - qcom,kaanapali-qmp-usb3-dp-phy
Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml+1−0
@@ -17,6 +17,7 @@ properties: · 16 unmodified lines
1717 oneOf:
1818 - items:
1919 - enum:
20+ - qcom,eliza-snps-eusb2-phy
2021 - qcom,milos-snps-eusb2-phy
2122 - qcom,sar2130p-snps-eusb2-phy
2223 - qcom,sdx75-snps-eusb2-phy
Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml+40−4
@@ -20,6 +20,7 @@ properties: · 19 unmodified lines
2020 - rockchip,rk3328-usb2phy
2121 - rockchip,rk3366-usb2phy
2222 - rockchip,rk3399-usb2phy
23+ - rockchip,rk3528-usb2phy
2324 - rockchip,rk3562-usb2phy
2425 - rockchip,rk3568-usb2phy
2526 - rockchip,rk3576-usb2phy
@@ -41,11 +42,15 @@ properties: · 15 unmodified lines
4142 maxItems: 3
4243
4344 clock-names:
44− minItems: 1
45− items:
45+ oneOf:
4646 - const: phyclk
47− - const: aclk
48− - const: aclk_slv
47+ - items:
48+ - const: phyclk
49+ - const: pclk
50+ - items:
51+ - const: phyclk
52+ - const: aclk
53+ - const: aclk_slv
4954
5055 assigned-clocks:
5156 description:
@@ -65,6 +70,9 @@ properties: · 13 unmodified lines
6570 description: Muxed interrupt for both ports
6671 maxItems: 1
6772
73+ power-domains:
74+ maxItems: 1
75+
6876 resets:
6977 maxItems: 2
7078
@@ -145,6 +153,21 @@ anyOf: · 74 unmodified lines
145153 - host-port
146154
147155 allOf:
156+ - if:
157+ properties:
158+ compatible:
159+ contains:
160+ enum:
161+ - rockchip,rk3528-usb2phy
162+ - rockchip,rk3568-usb2phy
163+ - rockchip,rv1108-usb2phy
164+ then:
165+ required:
166+ - rockchip,usbgrf
167+ else:
168+ properties:
169+ rockchip,usbgrf: false
170+
148171 - if:
149172 properties:
150173 compatible:
@@ -204,6 +227,19 @@ allOf: · 53 unmodified lines
204227 clock-names:
205228 maxItems: 1
206229
230+ - if:
231+ properties:
232+ compatible:
233+ contains:
234+ enum:
235+ - rockchip,rk3528-usb2phy
236+ then:
237+ properties:
238+ clocks:
239+ minItems: 2
240+ clock-names:
241+ minItems: 2
242+
207243 - if:
208244 properties:
209245 compatible:
Documentation/devicetree/bindings/phy/spacemit,usb2-phy.yaml+4−2
@@ -4,14 +4,16 @@ · 3 unmodified lines
44 $id: http://devicetree.org/schemas/phy/spacemit,usb2-phy.yaml#
55 $schema: http://devicetree.org/meta-schemas/core.yaml#
66
7−title: SpacemiT K1 SoC USB 2.0 PHY
7+title: SpacemiT K1/K3 SoC USB 2.0 PHY
88
99 maintainers:
1010 - Ze Huang <huang.ze@linux.dev>
1111
1212 properties:
1313 compatible:
14− const: spacemit,k1-usb2-phy
14+ enum:
15+ - spacemit,k1-usb2-phy
16+ - spacemit,k3-usb2-phy
1517
1618 reg:
1719 maxItems: 1
Documentation/devicetree/bindings/phy/ti,ds125df111.yaml+46−0
@@ -0,0 +1,46 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/phy/ti,ds125df111.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: TI DS125DF111 Retimer PHY
8+
9+description:
10+ This binding describes the TI DS125DF111 multi-protocol Retimer PHY.
11+
12+maintainers:
13+ - Ioana Ciornei <ioana.ciornei@nxp.com>
14+
15+properties:
16+ compatible:
17+ const: ti,ds125df111
18+
19+ reg:
20+ maxItems: 1
21+
22+ "#phy-cells":
23+ const: 1
24+ description: |
25+ The phandle's argument in the PHY specifier selects one of the two
26+ channels of the retimer
27+
28+required:
29+ - compatible
30+ - reg
31+ - "#phy-cells"
32+
33+additionalProperties: false
34+
35+examples:
36+ - |
37+ i2c {
38+ #address-cells = <1>;
39+ #size-cells = <0>;
40+
41+ phy@18 {
42+ compatible = "ti,ds125df111";
43+ reg = <0x18>;
44+ #phy-cells = <1>;
45+ };
46+ };
Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml+14−9
@@ -47,15 +47,20 @@ description: | · 46 unmodified lines
4747
4848 properties:
4949 compatible:
50− enum:
51− - ti,am3352-phy-gmii-sel
52− - ti,dra7xx-phy-gmii-sel
53− - ti,am43xx-phy-gmii-sel
54− - ti,dm814-phy-gmii-sel
55− - ti,am654-phy-gmii-sel
56− - ti,j7200-cpsw5g-phy-gmii-sel
57− - ti,j721e-cpsw9g-phy-gmii-sel
58− - ti,j784s4-cpsw9g-phy-gmii-sel
50+ oneOf:
51+ - enum:
52+ - ti,am3352-phy-gmii-sel
53+ - ti,dra7xx-phy-gmii-sel
54+ - ti,am43xx-phy-gmii-sel
55+ - ti,dm814-phy-gmii-sel
56+ - ti,am654-phy-gmii-sel
57+ - ti,j7200-cpsw5g-phy-gmii-sel
58+ - ti,j721e-cpsw9g-phy-gmii-sel
59+ - ti,j784s4-cpsw9g-phy-gmii-sel
60+ - items:
61+ - enum:
62+ - ti,j722s-phy-gmii-sel
63+ - const: ti,am654-phy-gmii-sel
5964
6065 reg:
6166 maxItems: 1
Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml+12−7
@@ -12,13 +12,18 @@ maintainers: · 11 unmodified lines
1212
1313 properties:
1414 compatible:
15− enum:
16− - ti,j721e-wiz-16g
17− - ti,j721e-wiz-10g
18− - ti,j721s2-wiz-10g
19− - ti,am64-wiz-10g
20− - ti,j7200-wiz-10g
21− - ti,j784s4-wiz-10g
15+ oneOf:
16+ - enum:
17+ - ti,j721e-wiz-16g
18+ - ti,j721e-wiz-10g
19+ - ti,j721s2-wiz-10g
20+ - ti,am64-wiz-10g
21+ - ti,j7200-wiz-10g
22+ - ti,j784s4-wiz-10g
23+ - items:
24+ - enum:
25+ - ti,j722s-wiz-10g
26+ - const: ti,am64-wiz-10g
2227
2328 power-domains:
2429 maxItems: 1
Documentation/devicetree/bindings/pinctrl/allwinner,sun55i-a523-pinctrl.yaml+4−4
@@ -34,7 +34,7 @@ properties: · 33 unmodified lines
3434
3535 interrupts:
3636 minItems: 2
37− maxItems: 10
37+ maxItems: 11
3838 description:
3939 One interrupt per external interrupt bank supported on the
4040 controller, sorted by bank number ascending order.
@@ -61,7 +61,7 @@ properties: · 20 unmodified lines
6161 bank found in the controller
6262 $ref: /schemas/types.yaml#/definitions/uint32-array
6363 minItems: 2
64− maxItems: 10
64+ maxItems: 11
6565
6666 patternProperties:
6767 # It's pretty scary, but the basic idea is that:
@@ -130,8 +130,8 @@ allOf: · 62 unmodified lines
130130 then:
131131 properties:
132132 interrupts:
133− minItems: 10
134− maxItems: 10
133+ minItems: 11
134+ maxItems: 11
135135
136136 - if:
137137 properties:
Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml+1−0
@@ -17,6 +17,7 @@ properties: · 16 unmodified lines
1717 oneOf:
1818 - enum:
1919 - amlogic,pinctrl-a4
20+ - amlogic,pinctrl-a9
2021 - amlogic,pinctrl-s6
2122 - amlogic,pinctrl-s7
2223 - items:
Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml+188−0
@@ -0,0 +1,188 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: ASPEED AST2700 SoC0 Pin Controller
8+
9+maintainers:
10+ - Billy Tsai <billy_tsai@aspeedtech.com>
11+
12+description: >
13+ The AST2700 features a dual-SoC architecture with two interconnected SoCs,
14+ each having its own System Control Unit (SCU) for independent pin control.
15+ This pin controller manages the pin multiplexing for SoC0.
16+
17+ The SoC0 pin controller manages pin functions including eMMC, VGA DDC,
18+ dual USB3/USB2 ports (A and B), JTAG, and PCIe root complex interfaces.
19+
20+properties:
21+ compatible:
22+ const: aspeed,ast2700-soc0-pinctrl
23+
24+ reg:
25+ maxItems: 1
26+
27+patternProperties:
28+ '-state$':
29+ description: |
30+ Pin control state.
31+
32+ If 'function' is present, the node describes a pinmux state and must
33+ specify 'groups'.
34+
35+ For pin configuration, exactly one of 'groups' or 'pins' must be
36+ specified in each state node. Group-level configuration applies to all
37+ pins in the group. Pin-level configuration may be supplied in a
38+ separate state node for individual pins; when both group-level and
39+ pin-level configuration apply to the same pin, the pin-level
40+ configuration takes precedence.
41+
42+ type: object
43+ allOf:
44+ - $ref: pinmux-node.yaml#
45+ - $ref: pincfg-node.yaml#
46+ - if:
47+ required:
48+ - function
49+ then:
50+ required:
51+ - groups
52+ - oneOf:
53+ - required:
54+ - groups
55+ - required:
56+ - pins
57+
58+ additionalProperties: false
59+
60+ properties:
61+ function:
62+ enum:
63+ - EMMC
64+ - JTAGDDR
65+ - JTAGM0
66+ - JTAGPCIEA
67+ - JTAGPCIEB
68+ - JTAGPSP
69+ - JTAGSSP
70+ - JTAGTSP
71+ - JTAGUSB3A
72+ - JTAGUSB3B
73+ - PCIERC0PERST
74+ - PCIERC1PERST
75+ - TSPRSTN
76+ - UFSCLKI
77+ - USB2AD0
78+ - USB2AD1
79+ - USB2AH
80+ - USB2AHP
81+ - USB2AHPD0
82+ - USB2AXH
83+ - USB2AXH2B
84+ - USB2AXHD1
85+ - USB2AXHP
86+ - USB2AXHP2B
87+ - USB2AXHPD1
88+ - USB2BD0
89+ - USB2BD1
90+ - USB2BH
91+ - USB2BHP
92+ - USB2BHPD0
93+ - USB2BXH
94+ - USB2BXH2A
95+ - USB2BXHD1
96+ - USB2BXHP
97+ - USB2BXHP2A
98+ - USB2BXHPD1
99+ - USB3AXH
100+ - USB3AXH2B
101+ - USB3AXHD
102+ - USB3AXHP
103+ - USB3AXHP2B
104+ - USB3AXHPD
105+ - USB3BXH
106+ - USB3BXH2A
107+ - USB3BXHD
108+ - USB3BXHP
109+ - USB3BXHP2A
110+ - USB3BXHPD
111+ - VB
112+ - VGADDC
113+
114+ groups:
115+ enum:
116+ - EMMCCDN
117+ - EMMCG1
118+ - EMMCG4
119+ - EMMCG8
120+ - EMMCWPN
121+ - JTAG0
122+ - PCIERC0PERST
123+ - PCIERC1PERST
124+ - TSPRSTN
125+ - UFSCLKI
126+ - USB2A
127+ - USB2AAP
128+ - USB2ABP
129+ - USB2ADAP
130+ - USB2AH
131+ - USB2AHAP
132+ - USB2B
133+ - USB2BAP
134+ - USB2BBP
135+ - USB2BDBP
136+ - USB2BH
137+ - USB2BHBP
138+ - USB3A
139+ - USB3AAP
140+ - USB3ABP
141+ - USB3B
142+ - USB3BAP
143+ - USB3BBP
144+ - VB0
145+ - VB1
146+ - VGADDC
147+
148+ pins:
149+ enum:
150+ - AB13
151+ - AB14
152+ - AC13
153+ - AC14
154+ - AD13
155+ - AD14
156+ - AE13
157+ - AE14
158+ - AE15
159+ - AF13
160+ - AF14
161+ - AF15
162+
163+ drive-strength:
164+ enum: [3, 6, 8, 11, 16, 18, 20, 23, 30, 32, 33, 35, 37, 38, 39, 41]
165+
166+ bias-disable: true
167+ bias-pull-up: true
168+ bias-pull-down: true
169+
170+required:
171+ - compatible
172+ - reg
173+
174+allOf:
175+ - $ref: pinctrl.yaml#
176+
177+additionalProperties: false
178+
179+examples:
180+ - |
181+ pinctrl@400 {
182+ compatible = "aspeed,ast2700-soc0-pinctrl";
183+ reg = <0x400 0x318>;
184+ emmc-state {
185+ function = "EMMC";
186+ groups = "EMMCG1";
187+ };
188+ };
Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc1-pinctrl.yaml+760−0
@@ -0,0 +1,760 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2700-soc1-pinctrl.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: ASPEED AST2700 SoC1 Pin Controller
8+
9+maintainers:
10+ - Billy Tsai <billy_tsai@aspeedtech.com>
11+
12+description:
13+ The AST2700 features a dual-SoC architecture with two interconnected SoCs,
14+ each having its own System Control Unit (SCU) for independent pin control.
15+ This pin controller manages the pin multiplexing for SoC1.
16+
17+ The SoC1 pin controller manages pin functions including eSPI, LPC and I2C,
18+ among others.
19+
20+properties:
21+ compatible:
22+ const: aspeed,ast2700-soc1-pinctrl
23+ reg:
24+ maxItems: 1
25+
26+patternProperties:
27+ '-state$':
28+ description: |
29+ Pin control state.
30+
31+ If `function` is present, the node describes a pinmux state and must
32+ specify `groups`.
33+
34+ For pin configuration, exactly one of `groups` or `pins` must be
35+ specified in each state node. Group-level configuration applies to all
36+ pins in the group. Pin-level configuration may be supplied in a
37+ separate state node for individual pins; when both group-level and
38+ pin-level configuration apply to the same pin, the pin-level
39+ configuration takes precedence.
40+
41+ type: object
42+ allOf:
43+ - $ref: pinmux-node.yaml#
44+ - $ref: pincfg-node.yaml#
45+ - if:
46+ required:
47+ - function
48+ then:
49+ required:
50+ - groups
51+ - oneOf:
52+ - required:
53+ - groups
54+ - required:
55+ - pins
56+ additionalProperties: false
57+
58+ properties:
59+ function:
60+ enum:
61+ - ADC0
62+ - ADC1
63+ - ADC10
64+ - ADC11
65+ - ADC12
66+ - ADC13
67+ - ADC14
68+ - ADC15
69+ - ADC2
70+ - ADC3
71+ - ADC4
72+ - ADC5
73+ - ADC6
74+ - ADC7
75+ - ADC8
76+ - ADC9
77+ - AUXPWRGOOD0
78+ - AUXPWRGOOD1
79+ - CANBUS
80+ - ESPI0
81+ - ESPI1
82+ - FSI0
83+ - FSI1
84+ - FSI2
85+ - FSI3
86+ - FWQSPI
87+ - FWSPIABR
88+ - FWWPN
89+ - HBLED
90+ - I2C0
91+ - I2C1
92+ - I2C10
93+ - I2C11
94+ - I2C12
95+ - I2C13
96+ - I2C14
97+ - I2C15
98+ - I2C2
99+ - I2C3
100+ - I2C4
101+ - I2C5
102+ - I2C6
103+ - I2C7
104+ - I2C8
105+ - I2C9
106+ - I2CF0
107+ - I2CF1
108+ - I2CF2
109+ - I3C0
110+ - I3C1
111+ - I3C10
112+ - I3C11
113+ - I3C12
114+ - I3C13
115+ - I3C14
116+ - I3C15
117+ - I3C2
118+ - I3C3
119+ - I3C4
120+ - I3C5
121+ - I3C6
122+ - I3C7
123+ - I3C8
124+ - I3C9
125+ - JTAGM1
126+ - LPC0
127+ - LPC1
128+ - LTPI
129+ - MACLINK0
130+ - MACLINK1
131+ - MACLINK2
132+ - MDIO0
133+ - MDIO1
134+ - MDIO2
135+ - NCTS0
136+ - NCTS1
137+ - NCTS5
138+ - NCTS6
139+ - NDCD0
140+ - NDCD1
141+ - NDCD5
142+ - NDCD6
143+ - NDSR0
144+ - NDSR1
145+ - NDSR5
146+ - NDSR6
147+ - NDTR0
148+ - NDTR1
149+ - NDTR5
150+ - NDTR6
151+ - NRI0
152+ - NRI1
153+ - NRI5
154+ - NRI6
155+ - NRTS0
156+ - NRTS1
157+ - NRTS5
158+ - NRTS6
159+ - OSCCLK
160+ - PCIERC
161+ - PWM0
162+ - PWM1
163+ - PWM10
164+ - PWM11
165+ - PWM12
166+ - PWM13
167+ - PWM14
168+ - PWM15
169+ - PWM2
170+ - PWM3
171+ - PWM4
172+ - PWM5
173+ - PWM6
174+ - PWM7
175+ - PWM8
176+ - PWM9
177+ - QSPI0
178+ - QSPI1
179+ - QSPI2
180+ - RGMII0
181+ - RGMII1
182+ - RMII0
183+ - RMII0RCLKO
184+ - RMII1
185+ - RMII1RCLKO
186+ - SALT0
187+ - SALT1
188+ - SALT10
189+ - SALT11
190+ - SALT12
191+ - SALT13
192+ - SALT14
193+ - SALT15
194+ - SALT2
195+ - SALT3
196+ - SALT4
197+ - SALT5
198+ - SALT6
199+ - SALT7
200+ - SALT8
201+ - SALT9
202+ - SD
203+ - SGMII
204+ - SGPM0
205+ - SGPM1
206+ - SGPS
207+ - SIOONCTRLN0
208+ - SIOONCTRLN1
209+ - SIOPBIN0
210+ - SIOPBIN1
211+ - SIOPBON0
212+ - SIOPBON1
213+ - SIOPWREQN0
214+ - SIOPWREQN1
215+ - SIOPWRGD1
216+ - SIOS3N0
217+ - SIOS3N1
218+ - SIOS5N0
219+ - SIOS5N1
220+ - SIOSCIN0
221+ - SIOSCIN1
222+ - SMON0
223+ - SMON1
224+ - SPI0
225+ - SPI0ABR
226+ - SPI0CS1
227+ - SPI0WPN
228+ - SPI1
229+ - SPI1ABR
230+ - SPI1CS1
231+ - SPI1WPN
232+ - SPI2
233+ - SPI2CS1
234+ - TACH0
235+ - TACH1
236+ - TACH10
237+ - TACH11
238+ - TACH12
239+ - TACH13
240+ - TACH14
241+ - TACH15
242+ - TACH2
243+ - TACH3
244+ - TACH4
245+ - TACH5
246+ - TACH6
247+ - TACH7
248+ - TACH8
249+ - TACH9
250+ - THRU0
251+ - THRU1
252+ - THRU2
253+ - THRU3
254+ - UART0
255+ - UART1
256+ - UART10
257+ - UART11
258+ - UART2
259+ - UART3
260+ - UART5
261+ - UART6
262+ - UART7
263+ - UART8
264+ - UART9
265+ - USB2C
266+ - USB2D
267+ - USBUART
268+ - VGA
269+ - VPI
270+ - WDTRST0N
271+ - WDTRST1N
272+ - WDTRST2N
273+ - WDTRST3N
274+ - WDTRST4N
275+ - WDTRST5N
276+ - WDTRST6N
277+ - WDTRST7N
278+
279+ groups:
280+ enum:
281+ - ADC0
282+ - ADC1
283+ - ADC10
284+ - ADC11
285+ - ADC12
286+ - ADC13
287+ - ADC14
288+ - ADC15
289+ - ADC2
290+ - ADC3
291+ - ADC4
292+ - ADC5
293+ - ADC6
294+ - ADC7
295+ - ADC8
296+ - ADC9
297+ - AUXPWRGOOD0
298+ - AUXPWRGOOD1
299+ - CANBUS
300+ - DI2C0
301+ - DI2C1
302+ - DI2C10
303+ - DI2C11
304+ - DI2C12
305+ - DI2C13
306+ - DI2C14
307+ - DI2C15
308+ - DI2C2
309+ - DI2C3
310+ - DI2C8
311+ - DI2C9
312+ - DSGPM0
313+ - ESPI0
314+ - ESPI1
315+ - FSI0
316+ - FSI1
317+ - FSI2
318+ - FSI3
319+ - FWQSPI
320+ - FWSPIABR
321+ - FWWPN
322+ - HBLED
323+ - HVI3C0
324+ - HVI3C1
325+ - HVI3C12
326+ - HVI3C13
327+ - HVI3C14
328+ - HVI3C15
329+ - HVI3C2
330+ - HVI3C3
331+ - I2C0
332+ - I2C1
333+ - I2C10
334+ - I2C11
335+ - I2C12
336+ - I2C13
337+ - I2C14
338+ - I2C15
339+ - I2C2
340+ - I2C3
341+ - I2C4
342+ - I2C5
343+ - I2C6
344+ - I2C7
345+ - I2C8
346+ - I2C9
347+ - I2CF0
348+ - I2CF1
349+ - I2CF2
350+ - I3C10
351+ - I3C11
352+ - I3C4
353+ - I3C5
354+ - I3C6
355+ - I3C7
356+ - I3C8
357+ - I3C9
358+ - JTAGM1
359+ - LPC0
360+ - LPC1
361+ - LTPI
362+ - LTPI_PS_I2C0
363+ - LTPI_PS_I2C1
364+ - LTPI_PS_I2C2
365+ - LTPI_PS_I2C3
366+ - MACLINK0
367+ - MACLINK1
368+ - MACLINK2
369+ - MDIO0
370+ - MDIO1
371+ - MDIO2
372+ - NCTS0
373+ - NCTS1
374+ - NCTS5
375+ - NCTS6
376+ - NDCD0
377+ - NDCD1
378+ - NDCD5
379+ - NDCD6
380+ - NDSR0
381+ - NDSR1
382+ - NDSR5
383+ - NDSR6
384+ - NDTR0
385+ - NDTR1
386+ - NDTR5
387+ - NDTR6
388+ - NRI0
389+ - NRI1
390+ - NRI5
391+ - NRI6
392+ - NRTS0
393+ - NRTS1
394+ - NRTS5
395+ - NRTS6
396+ - OSCCLK
397+ - PE2SGRSTN
398+ - PWM0
399+ - PWM1
400+ - PWM10
401+ - PWM11
402+ - PWM12
403+ - PWM13
404+ - PWM14
405+ - PWM15
406+ - PWM2
407+ - PWM3
408+ - PWM4
409+ - PWM5
410+ - PWM6
411+ - PWM7
412+ - PWM8
413+ - PWM9
414+ - QSPI0
415+ - QSPI1
416+ - QSPI2
417+ - RGMII0
418+ - RGMII1
419+ - RMII0
420+ - RMII0RCLKO
421+ - RMII1
422+ - RMII1RCLKO
423+ - SALT0
424+ - SALT1
425+ - SALT10
426+ - SALT11
427+ - SALT12
428+ - SALT13
429+ - SALT14
430+ - SALT15
431+ - SALT2
432+ - SALT3
433+ - SALT4
434+ - SALT5
435+ - SALT6
436+ - SALT7
437+ - SALT8
438+ - SALT9
439+ - SD
440+ - SGMII
441+ - SGPM0
442+ - SGPM1
443+ - SGPS
444+ - SIOONCTRLN0
445+ - SIOONCTRLN1
446+ - SIOPBIN0
447+ - SIOPBIN1
448+ - SIOPBON0
449+ - SIOPBON1
450+ - SIOPWREQN0
451+ - SIOPWREQN1
452+ - SIOPWRGD1
453+ - SIOS3N0
454+ - SIOS3N1
455+ - SIOS5N0
456+ - SIOS5N1
457+ - SIOSCIN0
458+ - SIOSCIN1
459+ - SMON0
460+ - SMON1
461+ - SPI0
462+ - SPI0ABR
463+ - SPI0CS1
464+ - SPI0WPN
465+ - SPI1
466+ - SPI1ABR
467+ - SPI1CS1
468+ - SPI1WPN
469+ - SPI2
470+ - SPI2CS1
471+ - TACH0
472+ - TACH1
473+ - TACH10
474+ - TACH11
475+ - TACH12
476+ - TACH13
477+ - TACH14
478+ - TACH15
479+ - TACH2
480+ - TACH3
481+ - TACH4
482+ - TACH5
483+ - TACH6
484+ - TACH7
485+ - TACH8
486+ - TACH9
487+ - THRU0
488+ - THRU1
489+ - THRU2
490+ - THRU3
491+ - UART0
492+ - UART1
493+ - UART10
494+ - UART11
495+ - UART2
496+ - UART3
497+ - UART5
498+ - UART6
499+ - UART7
500+ - UART8
501+ - UART9
502+ - USB2CD
503+ - USB2CH
504+ - USB2CU
505+ - USB2CUD
506+ - USB2DD
507+ - USB2DH
508+ - USBUART
509+ - VGA
510+ - VPI
511+ - WDTRST0N
512+ - WDTRST1N
513+ - WDTRST2N
514+ - WDTRST3N
515+ - WDTRST4N
516+ - WDTRST5N
517+ - WDTRST6N
518+ - WDTRST7N
519+
520+ pins:
521+ enum:
522+ - A14
523+ - A15
524+ - A18
525+ - A19
526+ - A21
527+ - A22
528+ - A23
529+ - A24
530+ - A25
531+ - A26
532+ - A6
533+ - A7
534+ - A8
535+ - AA12
536+ - AA13
537+ - AA14
538+ - AA15
539+ - AA16
540+ - AA17
541+ - AA18
542+ - AA20
543+ - AA21
544+ - AA22
545+ - AA23
546+ - AA24
547+ - AA25
548+ - AA26
549+ - AB15
550+ - AB16
551+ - AB17
552+ - AB18
553+ - AB19
554+ - AB20
555+ - AB21
556+ - AB22
557+ - AB23
558+ - AB24
559+ - AB25
560+ - AB26
561+ - AC15
562+ - AC16
563+ - AC17
564+ - AC18
565+ - AC19
566+ - AC20
567+ - AC22
568+ - AC24
569+ - AC25
570+ - AC26
571+ - AD15
572+ - AD16
573+ - AD17
574+ - AD18
575+ - AD19
576+ - AD20
577+ - AD22
578+ - AD25
579+ - AD26
580+ - AE16
581+ - AE17
582+ - AE18
583+ - AE19
584+ - AE20
585+ - AE21
586+ - AE23
587+ - AE25
588+ - AE26
589+ - AF16
590+ - AF17
591+ - AF18
592+ - AF19
593+ - AF20
594+ - AF21
595+ - AF23
596+ - AF25
597+ - AF26
598+ - B10
599+ - B11
600+ - B12
601+ - B13
602+ - B14
603+ - B15
604+ - B16
605+ - B18
606+ - B19
607+ - B21
608+ - B22
609+ - B23
610+ - B24
611+ - B25
612+ - B26
613+ - B6
614+ - B7
615+ - B8
616+ - B9
617+ - C10
618+ - C11
619+ - C12
620+ - C13
621+ - C14
622+ - C15
623+ - C16
624+ - C17
625+ - C18
626+ - C19
627+ - C20
628+ - C23
629+ - C26
630+ - C6
631+ - C7
632+ - C8
633+ - C9
634+ - D10
635+ - D12
636+ - D14
637+ - D15
638+ - D19
639+ - D20
640+ - D24
641+ - D26
642+ - D7
643+ - D8
644+ - D9
645+ - E10
646+ - E11
647+ - E12
648+ - E13
649+ - E14
650+ - E26
651+ - E7
652+ - E8
653+ - E9
654+ - F10
655+ - F11
656+ - F12
657+ - F13
658+ - F14
659+ - F26
660+ - F7
661+ - F8
662+ - F9
663+ - G10
664+ - G11
665+ - G7
666+ - G8
667+ - G9
668+ - H10
669+ - H11
670+ - H7
671+ - H8
672+ - H9
673+ - J10
674+ - J11
675+ - J12
676+ - J13
677+ - J9
678+ - K12
679+ - K13
680+ - L12
681+ - M13
682+ - M14
683+ - M15
684+ - M16
685+ - N13
686+ - N14
687+ - N15
688+ - N25
689+ - N26
690+ - P13
691+ - P14
692+ - P25
693+ - P26
694+ - R14
695+ - R25
696+ - R26
697+ - T23
698+ - T24
699+ - U21
700+ - U22
701+ - U25
702+ - U26
703+ - V14
704+ - V16
705+ - V17
706+ - V18
707+ - V19
708+ - V20
709+ - V21
710+ - V22
711+ - V23
712+ - V24
713+ - W14
714+ - W16
715+ - W17
716+ - W18
717+ - W20
718+ - W21
719+ - W22
720+ - W25
721+ - W26
722+ - Y11
723+ - Y15
724+ - Y16
725+ - Y17
726+ - Y18
727+ - Y20
728+ - Y21
729+ - Y22
730+ - Y23
731+ - Y24
732+ - Y25
733+ - Y26
734+
735+ drive-strength:
736+ enum: [4, 8, 12, 16]
737+
738+ bias-disable: true
739+ bias-pull-up: true
740+ bias-pull-down: true
741+
742+required:
743+ - compatible
744+ - reg
745+
746+allOf:
747+ - $ref: pinctrl.yaml#
748+
749+additionalProperties: false
750+
751+examples:
752+ - |
753+ pinctrl@400 {
754+ compatible = "aspeed,ast2700-soc1-pinctrl";
755+ reg = <0x400 0x2A0>;
756+ sgpm0-state {
757+ function = "SGPM0";
758+ groups = "SGPM0";
759+ };
760+ };
Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml+1−0
@@ -17,6 +17,7 @@ properties: · 16 unmodified lines
1717 enum:
1818 - mediatek,mt2701-pinctrl
1919 - mediatek,mt2712-pinctrl
20+ - mediatek,mt6392-pinctrl
2021 - mediatek,mt6397-pinctrl
2122 - mediatek,mt7623-pinctrl
2223 - mediatek,mt8127-pinctrl
Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml+8−0
@@ -152,6 +152,14 @@ patternProperties: · 151 unmodified lines
152152 $ref: /schemas/types.yaml#/definitions/uint32
153153 enum: [0, 1, 2, 3]
154154
155+ slew-rate:
156+ description: |
157+ Set the slew rate. Valid arguments are described as below:
158+ 0: Normal slew rate
159+ 1: Slower slew
160+ $ref: /schemas/types.yaml#/definitions/uint32
161+ enum: [0, 1]
162+
155163 required:
156164 - pinmux
157165
Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml+5−0
@@ -67,6 +67,11 @@ properties: · 66 unmodified lines
6767
6868 # PIN CONFIGURATION NODES
6969 patternProperties:
70+ "-hog(-[0-9]+)?$":
71+ type: object
72+ required:
73+ - gpio-hog
74+
7075 '-pins$':
7176 type: object
7277 additionalProperties: false
Documentation/devicetree/bindings/pinctrl/nvidia,tegra234-pinmux-aon.yaml+5−1
@@ -58,7 +58,11 @@ patternProperties: · 57 unmodified lines
5858 drive_soc_gpio27_pee6, drive_ao_retention_n_pee2,
5959 drive_vcomp_alert_pee1, drive_hdmi_cec_pgg0 ]
6060
61−unevaluatedProperties: false
61+required:
62+ - compatible
63+ - reg
64+
65+additionalProperties: false
6266
6367 examples:
6468 - |
Documentation/devicetree/bindings/pinctrl/nvidia,tegra234-pinmux.yaml+5−1
@@ -115,7 +115,11 @@ patternProperties: · 114 unmodified lines
115115 drive_sdmmc1_dat2_pj4, drive_sdmmc1_dat1_pj3,
116116 drive_sdmmc1_dat0_pj2 ]
117117
118−unevaluatedProperties: false
118+required:
119+ - compatible
120+ - reg
121+
122+additionalProperties: false
119123
120124 examples:
121125 - |
Documentation/devicetree/bindings/pinctrl/nvidia,tegra238-pinmux-aon.yaml+102−0
@@ -0,0 +1,102 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra238-pinmux-aon.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: NVIDIA Tegra238 AON Pinmux Controller
8+
9+maintainers:
10+ - Thierry Reding <thierry.reding@gmail.com>
11+ - Jon Hunter <jonathanh@nvidia.com>
12+
13+properties:
14+ compatible:
15+ const: nvidia,tegra238-pinmux-aon
16+
17+ reg:
18+ maxItems: 1
19+
20+patternProperties:
21+ "^pinmux(-[a-z0-9-]+)?$":
22+ type: object
23+
24+ # pin groups
25+ additionalProperties:
26+ $ref: nvidia,tegra238-pinmux-common.yaml
27+
28+ properties:
29+ nvidia,pins:
30+ items:
31+ enum: [ bootv_ctl_n_paa0, soc_gpio00_paa1, vcomp_alert_paa2,
32+ pwm1_paa3, batt_oc_paa4, soc_gpio04_paa5,
33+ soc_gpio25_paa6, soc_gpio26_paa7,
34+ hdmi_cec_pbb0,
35+ spi2_sck_pcc0, spi2_miso_pcc1, spi2_mosi_pcc2,
36+ spi2_cs0_pcc3, spi2_cs1_pcc4, uart3_tx_pcc5,
37+ uart3_rx_pcc6, gen2_i2c_scl_pcc7,
38+ gen2_i2c_sda_pdd0, gen8_i2c_scl_pdd1,
39+ gen8_i2c_sda_pdd2, touch_clk_pdd3, dmic1_clk_pdd4,
40+ dmic1_dat_pdd5, soc_gpio19_pdd6, pwm2_pdd7,
41+ pwm3_pee0, pwm7_pee1, soc_gpio49_pee2,
42+ soc_gpio82_pee3, soc_gpio50_pee4, soc_gpio83_pee5,
43+ soc_gpio69_pff0, soc_gpio70_pff1, soc_gpio71_pff2,
44+ soc_gpio72_pff3, soc_gpio73_pff4, soc_gpio74_pff5,
45+ soc_gpio80_pff6, soc_gpio76_pff7, soc_gpio77_pgg0,
46+ soc_gpio84_pgg1, uart2_tx_pgg2, uart2_rx_pgg3,
47+ uart2_rts_pgg4, uart2_cts_pgg5, soc_gpio85_pgg6,
48+ uart5_tx_pgg7, uart5_rx_phh0, uart5_rts_phh1,
49+ uart5_cts_phh2, soc_gpio86_phh3,
50+ # drive groups (ordered PAA, PBB, PCC, PDD, PEE, PFF, PGG, PHH)
51+ drive_bootv_ctl_n_paa0, drive_soc_gpio00_paa1,
52+ drive_vcomp_alert_paa2, drive_pwm1_paa3,
53+ drive_batt_oc_paa4, drive_soc_gpio04_paa5,
54+ drive_soc_gpio25_paa6, drive_soc_gpio26_paa7,
55+ drive_hdmi_cec_pbb0,
56+ drive_spi2_sck_pcc0, drive_spi2_miso_pcc1,
57+ drive_spi2_mosi_pcc2, drive_spi2_cs0_pcc3,
58+ drive_spi2_cs1_pcc4, drive_uart3_tx_pcc5,
59+ drive_uart3_rx_pcc6, drive_gen2_i2c_scl_pcc7,
60+ drive_gen2_i2c_sda_pdd0, drive_gen8_i2c_scl_pdd1,
61+ drive_gen8_i2c_sda_pdd2, drive_touch_clk_pdd3,
62+ drive_dmic1_clk_pdd4, drive_dmic1_dat_pdd5,
63+ drive_soc_gpio19_pdd6, drive_pwm2_pdd7,
64+ drive_pwm3_pee0, drive_pwm7_pee1,
65+ drive_soc_gpio49_pee2, drive_soc_gpio50_pee4,
66+ drive_soc_gpio82_pee3, drive_soc_gpio71_pff2,
67+ drive_soc_gpio76_pff7, drive_soc_gpio74_pff5,
68+ drive_soc_gpio86_phh3, drive_soc_gpio72_pff3,
69+ drive_soc_gpio77_pgg0, drive_soc_gpio80_pff6,
70+ drive_soc_gpio84_pgg1, drive_soc_gpio83_pee5,
71+ drive_soc_gpio73_pff4, drive_soc_gpio70_pff1,
72+ drive_soc_gpio85_pgg6, drive_soc_gpio69_pff0,
73+ drive_uart5_tx_pgg7, drive_uart5_rx_phh0,
74+ drive_uart2_tx_pgg2, drive_uart2_rx_pgg3,
75+ drive_uart2_cts_pgg5, drive_uart2_rts_pgg4,
76+ drive_uart5_cts_phh2, drive_uart5_rts_phh1 ]
77+
78+required:
79+ - compatible
80+ - reg
81+
82+additionalProperties: false
83+
84+examples:
85+ - |
86+ #include <dt-bindings/pinctrl/pinctrl-tegra.h>
87+
88+ pinmux@c300000 {
89+ compatible = "nvidia,tegra238-pinmux-aon";
90+ reg = <0x0c300000 0x4000>;
91+
92+ pinctrl-names = "cec";
93+ pinctrl-0 = <&cec_state>;
94+
95+ cec_state: pinmux-cec {
96+ cec {
97+ nvidia,pins = "hdmi_cec_pbb0";
98+ nvidia,function = "hdmi_cec";
99+ };
100+ };
101+ };
102+...
Documentation/devicetree/bindings/pinctrl/nvidia,tegra238-pinmux-common.yaml+73−0
@@ -0,0 +1,73 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra238-pinmux-common.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: NVIDIA Tegra238 Pinmux Controller
8+
9+maintainers:
10+ - Thierry Reding <thierry.reding@gmail.com>
11+ - Jon Hunter <jonathanh@nvidia.com>
12+
13+$ref: nvidia,tegra-pinmux-common.yaml
14+
15+properties:
16+ nvidia,function:
17+ enum: [ dca_vsync, dca_hsync, displaya, rsvd0, i2c7_clk, i2c7_dat,
18+ i2c4_dat, i2c4_clk, i2c9_dat, i2c9_clk, usb_vbus_en0,
19+ usb_vbus_en1, spi3_din, spi1_cs0, spi3_cs0, spi1_din,
20+ spi3_cs1, spi1_sck, spi3_sck, spi1_cs1, spi1_dout, spi3_dout,
21+ gp_pwm5, gp_pwm6, extperiph2_clk, extperiph1_clk, i2c3_dat,
22+ i2c3_clk, extperiph4_clk, extperiph3_clk, dmic2_dat,
23+ dmic2_clk, uarta_cts, uarta_rts, uarta_rxd, uarta_txd,
24+ i2c5_clk, i2c5_dat, uartd_cts, uartd_rts, uartd_rxd,
25+ uartd_txd, i2c1_clk, i2c1_dat, sdmmc1_cd, i2s2_sclk,
26+ i2s2_sdata_out, i2s2_sdata_in, i2s2_lrck, i2s4_sclk,
27+ i2s4_sdata_out, i2s4_sdata_in, i2s4_lrck, i2s1_sclk,
28+ i2s1_sdata_out, i2s1_sdata_in, i2s1_lrck, aud_mclk,
29+ i2s3_lrck, i2s3_sclk, i2s3_sdata_in, i2s3_sdata_out,
30+ pe2_clkreq_l, pe1_clkreq_l, pe1_rst_l, pe0_clkreq_l,
31+ pe0_rst_l, pe2_rst_l, pe3_clkreq_l, pe3_rst_l,
32+ dp_aux_ch0_hpd, qspi0_io0, qspi0_io1, qspi0_sck, qspi0_cs_n,
33+ uartg_cts, uartg_rts, uartg_txd, uartg_rxd, sdmmc1_clk,
34+ sdmmc1_cmd, sdmmc1_comp, sdmmc1_dat3, sdmmc1_dat2,
35+ sdmmc1_dat1, sdmmc1_dat0, ufs0, soc_therm_oc1, hdmi_cec,
36+ gp_pwm4, uartc_rxd, uartc_txd, i2c8_dat, i2c8_clk,
37+ spi2_dout, i2c2_clk, spi2_cs0, i2c2_dat, spi2_sck, spi2_din,
38+ ppc_mode_1, ppc_ready, ppc_mode_2, ppc_cc, ppc_mode_0,
39+ ppc_int_n, uarte_txd, uarte_rxd, uartb_txd, uartb_rxd,
40+ uartb_cts, uartb_rts, uarte_cts, uarte_rts, gp_pwm7,
41+ gp_pwm2, gp_pwm3, gp_pwm1, spi2_cs1, dmic1_clk, dmic1_dat,
42+ rsvd1, dcb_hsync, dcb_vsync, soc_therm_oc4, gp_pwm8,
43+ nv_therm_fan_tach0, wdt_reset_outa, ccla_la_trigger_mux,
44+ dspk1_dat, dspk1_clk, nv_therm_fan_tach1, dspk0_dat,
45+ dspk0_clk, i2s5_sclk, i2s6_lrck, i2s6_sdata_in, i2s6_sclk,
46+ i2s6_sdata_out, i2s5_lrck, i2s5_sdata_out, i2s5_sdata_in,
47+ sdmmc1_pe3_rst_l, sdmmc1_pe3_clkreq_l, touch_clk,
48+ ppc_i2c_dat, wdt_reset_outb, spi5_cs1, ppc_rst_n,
49+ ppc_i2c_clk, spi4_cs1, soc_therm_oc3, spi5_sck, spi5_miso,
50+ spi4_sck, spi4_miso, spi4_cs0, spi4_mosi, spi5_cs0,
51+ spi5_mosi, led_blink, rsvd2, dmic3_clk, dmic3_dat,
52+ dmic4_clk, dmic4_dat, tsc_edge_out0, tsc_edge_out3,
53+ tsc_edge_out1, tsc_edge_out2, dmic5_clk, dmic5_dat, rsvd3,
54+ sdmmc1_wp, tsc_edge_out0a, tsc_edge_out0d, tsc_edge_out0b,
55+ tsc_edge_out0c, soc_therm_oc2 ]
56+
57+ # out of the common properties, only these are allowed for Tegra238
58+ nvidia,pins: true
59+ nvidia,pull: true
60+ nvidia,tristate: true
61+ nvidia,schmitt: true
62+ nvidia,enable-input: true
63+ nvidia,open-drain: true
64+ nvidia,lock: true
65+ nvidia,drive-type: true
66+ nvidia,io-hv: true
67+
68+required:
69+ - nvidia,pins
70+
71+additionalProperties: false
72+
73+...
Documentation/devicetree/bindings/pinctrl/nvidia,tegra238-pinmux.yaml+219−0
@@ -0,0 +1,219 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra238-pinmux.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: NVIDIA Tegra238 Pinmux Controller
8+
9+maintainers:
10+ - Thierry Reding <thierry.reding@gmail.com>
11+ - Jon Hunter <jonathanh@nvidia.com>
12+
13+properties:
14+ compatible:
15+ const: nvidia,tegra238-pinmux
16+
17+ reg:
18+ maxItems: 1
19+
20+patternProperties:
21+ "^pinmux(-[a-z0-9-]+)?$":
22+ type: object
23+
24+ # pin groups
25+ additionalProperties:
26+ $ref: nvidia,tegra238-pinmux-common.yaml
27+
28+ properties:
29+ nvidia,pins:
30+ items:
31+ enum: [ gpu_pwr_req_pa0, gp_pwm5_pa1, gp_pwm6_pa2, spi3_sck_pa3,
32+ spi3_miso_pa4, spi3_mosi_pa5, spi3_cs0_pa6, spi3_cs1_pa7,
33+ spi1_sck_pb0, spi1_miso_pb1, spi1_mosi_pb2, spi1_cs0_pb3,
34+ spi1_cs1_pb4, pwr_i2c_scl_pc0, pwr_i2c_sda_pc1,
35+ extperiph1_clk_pc2, extperiph2_clk_pc3, cam_i2c_scl_pc4,
36+ cam_i2c_sda_pc5, soc_gpio23_pc6, soc_gpio24_pc7,
37+ soc_gpio27_pd0, soc_gpio55_pd1, soc_gpio29_pd2,
38+ soc_gpio33_pd3, soc_gpio32_pd4, soc_gpio35_pd5,
39+ soc_gpio37_pd6, soc_gpio56_pd7, uart1_tx_pe0,
40+ uart1_rx_pe1, uart1_rts_pe2, uart1_cts_pe3,
41+ soc_gpio13_pf0, soc_gpio14_pf1, soc_gpio15_pf2,
42+ soc_gpio16_pf3, soc_gpio17_pf4, soc_gpio18_pf5,
43+ soc_gpio20_pf6, soc_gpio21_pf7, soc_gpio22_pg0,
44+ soc_gpio06_pg1, uart4_tx_pg2, uart4_rx_pg3,
45+ uart4_rts_pg4, uart4_cts_pg5, soc_gpio41_pg6,
46+ soc_gpio42_pg7, soc_gpio43_ph0, soc_gpio44_ph1,
47+ gen1_i2c_scl_ph2, gen1_i2c_sda_ph3, cpu_pwr_req_ph4,
48+ soc_gpio07_ph5, dap3_clk_pj0, dap3_dout_pj1,
49+ dap3_din_pj2, dap3_fs_pj3, soc_gpio57_pj4,
50+ soc_gpio58_pj5, soc_gpio59_pj6, soc_gpio60_pj7,
51+ soc_gpio45_pk0, soc_gpio46_pk1, soc_gpio47_pk2,
52+ soc_gpio48_pk3, qspi0_sck_pl0, qspi0_io0_pl1,
53+ qspi0_io1_pl2, qspi0_cs_n_pl3, soc_gpio152_pl4,
54+ soc_gpio153_pl5, soc_gpio154_pl6, soc_gpio155_pl7,
55+ soc_gpio156_pm0, soc_gpio157_pm1, soc_gpio158_pm2,
56+ soc_gpio159_pm3, soc_gpio160_pm4, soc_gpio161_pm5,
57+ soc_gpio162_pm6, uart7_tx_pm7, uart7_rx_pn0,
58+ uart7_rts_pn1, uart7_cts_pn2, soc_gpio167_pp0,
59+ soc_gpio168_pp1, soc_gpio169_pp2, soc_gpio170_pp3,
60+ dap4_sclk_pp4, dap4_dout_pp5, dap4_din_pp6, dap4_fs_pp7,
61+ soc_gpio171_pq0, soc_gpio172_pq1, soc_gpio173_pq2,
62+ soc_gpio61_pr0, soc_gpio62_pr1, soc_gpio63_pr2,
63+ soc_gpio64_pr3, soc_gpio65_pr4, soc_gpio66_pr5,
64+ soc_gpio67_pr6, soc_gpio68_pr7, gen4_i2c_scl_ps0,
65+ gen4_i2c_sda_ps1, soc_gpio75_ps2, gen7_i2c_scl_ps3,
66+ gen7_i2c_sda_ps4, soc_gpio78_ps5, gen9_i2c_scl_ps6,
67+ gen9_i2c_sda_ps7, soc_gpio81_pt0, soc_gpio36_pt1,
68+ soc_gpio53_pt2, soc_gpio38_pt3, soc_gpio40_pt4,
69+ soc_gpio34_pt5, usb_vbus_en0_pt6, usb_vbus_en1_pt7,
70+ sdmmc1_clk_pu0, sdmmc1_cmd_pu1, sdmmc1_dat0_pu2,
71+ sdmmc1_dat1_pu3, sdmmc1_dat2_pu4, sdmmc1_dat3_pu5,
72+ ufs0_ref_clk_pv0, ufs0_rst_n_pv1, pex_l0_clkreq_n_pw0,
73+ pex_l0_rst_n_pw1, pex_l1_clkreq_n_pw2,
74+ pex_l1_rst_n_pw3, pex_l2_clkreq_n_pw4,
75+ pex_l2_rst_n_pw5, pex_l3_clkreq_n_pw6,
76+ pex_l3_rst_n_pw7, pex_wake_n_px0, dp_aux_ch0_hpd_px1,
77+ bootv_ctl_n_paa0, soc_gpio00_paa1, vcomp_alert_paa2,
78+ pwm1_paa3, batt_oc_paa4, soc_gpio04_paa5,
79+ soc_gpio25_paa6, soc_gpio26_paa7, hdmi_cec_pbb0,
80+ spi2_sck_pcc0, spi2_miso_pcc1, spi2_mosi_pcc2,
81+ spi2_cs0_pcc3, spi2_cs1_pcc4, uart3_tx_pcc5,
82+ uart3_rx_pcc6, gen2_i2c_scl_pcc7, gen2_i2c_sda_pdd0,
83+ gen8_i2c_scl_pdd1, gen8_i2c_sda_pdd2, touch_clk_pdd3,
84+ dmic1_clk_pdd4, dmic1_dat_pdd5, soc_gpio19_pdd6,
85+ pwm2_pdd7, pwm3_pee0, pwm7_pee1, soc_gpio49_pee2,
86+ soc_gpio82_pee3, soc_gpio50_pee4, soc_gpio83_pee5,
87+ soc_gpio69_pff0, soc_gpio70_pff1, soc_gpio71_pff2,
88+ soc_gpio72_pff3, soc_gpio73_pff4, soc_gpio74_pff5,
89+ soc_gpio80_pff6, soc_gpio76_pff7, soc_gpio77_pgg0,
90+ soc_gpio84_pgg1, uart2_tx_pgg2, uart2_rx_pgg3,
91+ uart2_rts_pgg4, uart2_cts_pgg5, soc_gpio85_pgg6,
92+ uart5_tx_pgg7, uart5_rx_phh0, uart5_rts_phh1,
93+ uart5_cts_phh2, soc_gpio86_phh3, sdmmc1_comp,
94+ # drive groups
95+ drive_soc_gpio36_pt1, drive_soc_gpio53_pt2,
96+ drive_soc_gpio38_pt3, drive_soc_gpio40_pt4,
97+ drive_soc_gpio75_ps2, drive_soc_gpio81_pt0,
98+ drive_soc_gpio78_ps5, drive_soc_gpio34_pt5,
99+ drive_gen7_i2c_scl_ps3, drive_gen7_i2c_sda_ps4,
100+ drive_gen4_i2c_sda_ps1, drive_gen4_i2c_scl_ps0,
101+ drive_gen9_i2c_sda_ps7, drive_gen9_i2c_scl_ps6,
102+ drive_usb_vbus_en0_pt6, drive_usb_vbus_en1_pt7,
103+ drive_soc_gpio61_pr0, drive_soc_gpio62_pr1,
104+ drive_soc_gpio63_pr2, drive_soc_gpio64_pr3,
105+ drive_soc_gpio65_pr4, drive_soc_gpio66_pr5,
106+ drive_soc_gpio67_pr6, drive_soc_gpio68_pr7,
107+ drive_spi3_miso_pa4, drive_spi1_cs0_pb3,
108+ drive_spi3_cs0_pa6, drive_spi1_miso_pb1,
109+ drive_spi3_cs1_pa7, drive_spi1_sck_pb0,
110+ drive_spi3_sck_pa3, drive_spi1_cs1_pb4,
111+ drive_spi1_mosi_pb2, drive_spi3_mosi_pa5,
112+ drive_gpu_pwr_req_pa0, drive_gp_pwm5_pa1,
113+ drive_gp_pwm6_pa2, drive_extperiph2_clk_pc3,
114+ drive_extperiph1_clk_pc2, drive_cam_i2c_sda_pc5,
115+ drive_cam_i2c_scl_pc4, drive_soc_gpio23_pc6,
116+ drive_soc_gpio24_pc7, drive_soc_gpio27_pd0,
117+ drive_soc_gpio29_pd2, drive_soc_gpio32_pd4,
118+ drive_soc_gpio33_pd3, drive_soc_gpio35_pd5,
119+ drive_soc_gpio37_pd6, drive_soc_gpio56_pd7,
120+ drive_soc_gpio55_pd1, drive_uart1_cts_pe3,
121+ drive_uart1_rts_pe2, drive_uart1_rx_pe1,
122+ drive_uart1_tx_pe0, drive_pwr_i2c_scl_pc0,
123+ drive_pwr_i2c_sda_pc1, drive_cpu_pwr_req_ph4,
124+ drive_uart4_cts_pg5, drive_uart4_rts_pg4,
125+ drive_uart4_rx_pg3, drive_uart4_tx_pg2,
126+ drive_gen1_i2c_scl_ph2, drive_gen1_i2c_sda_ph3,
127+ drive_soc_gpio20_pf6, drive_soc_gpio21_pf7,
128+ drive_soc_gpio22_pg0, drive_soc_gpio13_pf0,
129+ drive_soc_gpio14_pf1, drive_soc_gpio15_pf2,
130+ drive_soc_gpio16_pf3, drive_soc_gpio17_pf4,
131+ drive_soc_gpio18_pf5, drive_soc_gpio41_pg6,
132+ drive_soc_gpio42_pg7, drive_soc_gpio43_ph0,
133+ drive_soc_gpio44_ph1, drive_soc_gpio06_pg1,
134+ drive_soc_gpio07_ph5, drive_dap4_sclk_pp4,
135+ drive_dap4_dout_pp5, drive_dap4_din_pp6,
136+ drive_dap4_fs_pp7, drive_soc_gpio167_pp0,
137+ drive_soc_gpio168_pp1, drive_soc_gpio169_pp2,
138+ drive_soc_gpio170_pp3, drive_soc_gpio171_pq0,
139+ drive_soc_gpio172_pq1, drive_soc_gpio173_pq2,
140+ drive_soc_gpio45_pk0, drive_soc_gpio46_pk1,
141+ drive_soc_gpio47_pk2, drive_soc_gpio48_pk3,
142+ drive_soc_gpio57_pj4, drive_soc_gpio58_pj5,
143+ drive_soc_gpio59_pj6, drive_soc_gpio60_pj7,
144+ drive_dap3_fs_pj3, drive_dap3_clk_pj0,
145+ drive_dap3_din_pj2, drive_dap3_dout_pj1,
146+ drive_pex_l2_clkreq_n_pw4, drive_pex_wake_n_px0,
147+ drive_pex_l1_clkreq_n_pw2, drive_pex_l1_rst_n_pw3,
148+ drive_pex_l0_clkreq_n_pw0, drive_pex_l0_rst_n_pw1,
149+ drive_pex_l2_rst_n_pw5, drive_pex_l3_clkreq_n_pw6,
150+ drive_pex_l3_rst_n_pw7, drive_dp_aux_ch0_hpd_px1,
151+ drive_qspi0_io0_pl1, drive_qspi0_io1_pl2,
152+ drive_qspi0_sck_pl0, drive_qspi0_cs_n_pl3,
153+ drive_soc_gpio156_pm0, drive_soc_gpio155_pl7,
154+ drive_soc_gpio160_pm4, drive_soc_gpio154_pl6,
155+ drive_soc_gpio152_pl4, drive_soc_gpio153_pl5,
156+ drive_soc_gpio161_pm5, drive_soc_gpio162_pm6,
157+ drive_soc_gpio159_pm3, drive_soc_gpio157_pm1,
158+ drive_soc_gpio158_pm2, drive_uart7_cts_pn2,
159+ drive_uart7_rts_pn1, drive_uart7_tx_pm7,
160+ drive_uart7_rx_pn0, drive_sdmmc1_clk_pu0,
161+ drive_sdmmc1_cmd_pu1, drive_sdmmc1_dat3_pu5,
162+ drive_sdmmc1_dat2_pu4, drive_sdmmc1_dat1_pu3,
163+ drive_sdmmc1_dat0_pu2, drive_ufs0_rst_n_pv1,
164+ drive_ufs0_ref_clk_pv0, drive_batt_oc_paa4,
165+ drive_bootv_ctl_n_paa0, drive_vcomp_alert_paa2,
166+ drive_hdmi_cec_pbb0, drive_touch_clk_pdd3,
167+ drive_uart3_rx_pcc6, drive_uart3_tx_pcc5,
168+ drive_gen8_i2c_sda_pdd2, drive_gen8_i2c_scl_pdd1,
169+ drive_spi2_mosi_pcc2, drive_gen2_i2c_scl_pcc7,
170+ drive_spi2_cs0_pcc3, drive_gen2_i2c_sda_pdd0,
171+ drive_spi2_sck_pcc0, drive_spi2_miso_pcc1,
172+ drive_soc_gpio49_pee2, drive_soc_gpio50_pee4,
173+ drive_soc_gpio82_pee3, drive_soc_gpio71_pff2,
174+ drive_soc_gpio76_pff7, drive_soc_gpio74_pff5,
175+ drive_soc_gpio00_paa1, drive_soc_gpio19_pdd6,
176+ drive_soc_gpio86_phh3, drive_soc_gpio72_pff3,
177+ drive_soc_gpio77_pgg0, drive_soc_gpio80_pff6,
178+ drive_soc_gpio84_pgg1, drive_soc_gpio83_pee5,
179+ drive_soc_gpio73_pff4, drive_soc_gpio70_pff1,
180+ drive_soc_gpio04_paa5, drive_soc_gpio85_pgg6,
181+ drive_soc_gpio69_pff0, drive_soc_gpio25_paa6,
182+ drive_soc_gpio26_paa7, drive_uart5_tx_pgg7,
183+ drive_uart5_rx_phh0, drive_uart2_tx_pgg2,
184+ drive_uart2_rx_pgg3, drive_uart2_cts_pgg5,
185+ drive_uart2_rts_pgg4, drive_uart5_cts_phh2,
186+ drive_uart5_rts_phh1, drive_pwm7_pee1,
187+ drive_pwm2_pdd7, drive_pwm3_pee0, drive_pwm1_paa3,
188+ drive_spi2_cs1_pcc4, drive_dmic1_clk_pdd4,
189+ drive_dmic1_dat_pdd5, drive_sdmmc1_comp ]
190+
191+required:
192+ - compatible
193+ - reg
194+
195+additionalProperties: false
196+
197+examples:
198+ - |
199+ #include <dt-bindings/pinctrl/pinctrl-tegra.h>
200+
201+ pinmux@2430000 {
202+ compatible = "nvidia,tegra238-pinmux";
203+ reg = <0x2430000 0x17000>;
204+
205+ pinctrl-names = "pex_rst";
206+ pinctrl-0 = <&pex_rst_c5_out_state>;
207+
208+ pex_rst_c5_out_state: pinmux-pex-rst-c5-out {
209+ pexrst {
210+ nvidia,pins = "pex_l3_rst_n_pw7";
211+ nvidia,schmitt = <TEGRA_PIN_DISABLE>;
212+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
213+ nvidia,io-hv = <TEGRA_PIN_ENABLE>;
214+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
215+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
216+ };
217+ };
218+ };
219+...
Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-aon.yaml+80−0
@@ -0,0 +1,80 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra264-pinmux-aon.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: NVIDIA Tegra264 AON Pinmux Controller
8+
9+maintainers:
10+ - Thierry Reding <thierry.reding@gmail.com>
11+ - Jon Hunter <jonathanh@nvidia.com>
12+
13+properties:
14+ compatible:
15+ const: nvidia,tegra264-pinmux-aon
16+
17+ reg:
18+ maxItems: 1
19+
20+patternProperties:
21+ "^pinmux(-[a-z0-9-]+)?$":
22+ type: object
23+
24+ # pin groups
25+ additionalProperties:
26+ $ref: nvidia,tegra264-pinmux-common.yaml
27+
28+ properties:
29+ nvidia,pins:
30+ items:
31+ enum: [ soc_gpio00_paa0, vcomp_alert_paa1, ao_retention_n_paa2,
32+ batt_oc_paa3, bootv_ctl_n_paa4, power_on_paa5,
33+ hdmi_cec_paa6, soc_gpio07_paa7, soc_gpio08_pbb0,
34+ soc_gpio09_pbb1, gen2_i2c_scl_pcc0, gen2_i2c_sda_pcc1,
35+ gen3_i2c_scl_pcc2, gen3_i2c_sda_pcc3, gp_pwm4_pcc4,
36+ uart0_tx_pcc5, uart0_rx_pcc6, spi2_sck_pcc7,
37+ spi2_miso_pdd0, spi2_mosi_pdd1, spi2_cs0_n_pdd2,
38+ soc_gpio21_pdd3, soc_gpio22_pdd4, soc_gpio23_pdd5,
39+ soc_gpio24_pdd6, soc_gpio25_pdd7, soc_gpio26_pee0,
40+ soc_gpio27_pee1, soc_gpio28_pee2, soc_gpio29_pee3,
41+ drive_ao_retention_n_paa2, drive_batt_oc_paa3,
42+ drive_power_on_paa5, drive_vcomp_alert_paa1,
43+ drive_bootv_ctl_n_paa4, drive_soc_gpio00_paa0,
44+ drive_soc_gpio07_paa7, drive_soc_gpio08_pbb0,
45+ drive_soc_gpio09_pbb1, drive_hdmi_cec_paa6,
46+ drive_gen2_i2c_scl_pcc0, drive_gen2_i2c_sda_pcc1,
47+ drive_gen3_i2c_scl_pcc2, drive_gen3_i2c_sda_pcc3,
48+ drive_gp_pwm4_pcc4, drive_uart0_tx_pcc5,
49+ drive_uart0_rx_pcc6, drive_spi2_sck_pcc7,
50+ drive_spi2_miso_pdd0, drive_spi2_mosi_pdd1,
51+ drive_spi2_cs0_n_pdd2, drive_soc_gpio21_pdd3,
52+ drive_soc_gpio22_pdd4, drive_soc_gpio23_pdd5,
53+ drive_soc_gpio24_pdd6, drive_soc_gpio25_pdd7,
54+ drive_soc_gpio26_pee0, drive_soc_gpio27_pee1,
55+ drive_soc_gpio28_pee2, drive_soc_gpio29_pee3 ]
56+
57+required:
58+ - compatible
59+ - reg
60+
61+additionalProperties: false
62+
63+examples:
64+ - |
65+ #include <dt-bindings/pinctrl/pinctrl-tegra.h>
66+
67+ pinmux@c7a2000 {
68+ compatible = "nvidia,tegra264-pinmux-aon";
69+ reg = <0xc7a2000 0x2000>;
70+
71+ pinctrl-names = "default";
72+ pinctrl-0 = <&state_default>;
73+
74+ state_default: pinmux-default {
75+ uart0 {
76+ nvidia,pins = "uart0_tx_pcc5";
77+ nvidia,function = "uarta_txd";
78+ };
79+ };
80+ };
Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-common.yaml+84−0
@@ -0,0 +1,84 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra264-pinmux-common.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: NVIDIA Tegra264 Pinmux Common Properties
8+
9+maintainers:
10+ - Thierry Reding <thierry.reding@gmail.com>
11+ - Jon Hunter <jonathanh@nvidia.com>
12+
13+$ref: nvidia,tegra-pinmux-common.yaml
14+
15+properties:
16+ nvidia,function:
17+ enum: [ dca_vsync, dca_hsync, rsvd0, dp_aux_ch0_hpd, dp_aux_ch1_hpd,
18+ dp_aux_ch2_hpd, dp_aux_ch3_hpd, gp_pwm2, gp_pwm3, i2c7_clk,
19+ i2c7_dat, i2c9_clk, i2c9_dat, uartk_cts, uartk_rts, uartk_rxd,
20+ uartk_txd, spi3_cs0, spi3_cs3, spi3_din, spi3_dout, spi3_sck,
21+ uartf_cts, uartf_rts, uartf_rxd, uartf_txd, spi1_cs0, spi1_cs1,
22+ spi1_din, spi1_dout, spi1_sck, extperiph2_clk, extperiph1_clk,
23+ i2c12_clk, i2c12_dat, nv_therm_fan_tach0, gp_pwm9, uartj_cts,
24+ uartj_rts, uartj_rxd, uartj_txd, i2c0_clk, i2c0_dat, i2c1_clk,
25+ i2c1_dat, i2s2_lrck, i2s2_sclk, i2s2_sdata_out, i2s2_sdata_in,
26+ gp_pwm10, uarte_cts, uarte_rts, uarte_rxd, uarte_txd, i2c5_dat,
27+ i2c5_clk, i2s6_sdata_in, i2s6_sdata_out, i2s6_lrck, i2s6_sclk,
28+ i2s4_sdata_out, i2s4_sclk, i2s4_sdata_in, i2s4_lrck, spi5_cs0,
29+ spi5_din, spi5_dout, spi5_sck, aud_mclk, i2s1_sclk, i2s1_sdata_in,
30+ i2s1_sdata_out, i2s1_lrck, i2c11_clk, i2c11_dat, xhalt_trig,
31+ gp_pwm1, gp_pwm6, gp_pwm7, gp_pwm8, ufs0, pe1_clkreq_l, pe1_rst_l,
32+ pe2_rst_l, pe2_clkreq_l, pe3_clkreq_l, pe3_rst_l, sgmii0_sma_mdio,
33+ sgmii0_sma_mdc, usb_vbus_en0, usb_vbus_en1, eth1_mdio, pe4_clkreq_l,
34+ pe4_rst_l, pe5_clkreq_l, pe5_rst_l, eth0_mdio, eth0_mdc, eth1_mdc,
35+ eth2_mdio, eth2_mdc, eth3_mdio, eth3_mdc, qspi0_cs_n, qspi0_io0,
36+ qspi0_io1, qspi0_io2, qspi0_io3, qspi0_sck, sdmmc1_clk, sdmmc1_cmd,
37+ sdmmc1_comp, sdmmc1_dat3, sdmmc1_dat2, sdmmc1_dat1, sdmmc1_dat0,
38+ qspi3_sck, qspi3_cs0, qspi3_io0, qspi3_io1, dcb_vsync, dcb_hsync,
39+ dsa_lspii, dce_vsync, dce_hsync, dch_vsync, dch_hsync, bl_en,
40+ bl_pwm_dim0, rsvd1, soc_therm_oc3, i2s5_sclk, i2s5_sdata_in,
41+ extperiph3_clk, extperiph4_clk, i2s5_sdata_out, i2s5_lrck,
42+ sdmmc1_cd, i2s7_sdata_in, spi4_sck, spi4_din, spi4_dout, spi4_cs0,
43+ spi4_cs1, gp_pwm5, i2c14_clk, i2c14_dat, i2s8_sclk, i2s8_sdata_out,
44+ i2s8_lrck, i2s8_sdata_in, i2c16_clk, i2c16_dat, i2s3_sclk,
45+ i2s3_sdata_out, i2s3_sdata_in, i2s3_lrck, pm_trig1, pm_trig0,
46+ qspi2_sck, qspi2_cs0, qspi2_io0, qspi2_io1, dcc_vsync, dcc_hsync,
47+ rsvd2, dcf_vsync, dcf_hsync, soundwire1_clk, soundwire1_dat0,
48+ soundwire1_dat1, soundwire1_dat2, dmic2_clk, dmic2_dat,
49+ nv_therm_fan_tach1, i2c15_clk, i2c15_dat, i2s7_lrck,
50+ ccla_la_trigger_mux, i2s7_sclk, i2s7_sdata_out, dmic1_dat,
51+ dmic1_clk, dcd_vsync, dcd_hsync, rsvd3, dcg_vsync, dcg_hsync,
52+ dspk1_clk, dspk1_dat, soc_therm_oc2, istctrl_ist_done_n,
53+ soc_therm_oc1, tsc_edge_out0c, tsc_edge_out0d, tsc_edge_out0a,
54+ tsc_edge_out0b, touch_clk, hdmi_cec, i2c2_clk, i2c2_dat, i2c3_clk,
55+ i2c3_dat, gp_pwm4, uarta_txd, uarta_rxd, spi2_sck, spi2_din,
56+ spi2_dout, spi2_cs0, tsc_sync1, tsc_edge_out3, tsc_edge_out0,
57+ tsc_edge_out1, tsc_sync0, soundwire0_clk, soundwire0_dat0,
58+ l0l1_rst_out_n, l2_rst_out_n, uartl_txd, uartl_rxd, i2s9_sclk,
59+ i2s9_sdata_out, i2s9_sdata_in, i2s9_lrck, dmic5_dat, dmic5_clk,
60+ tsc_edge_out2 ]
61+
62+ # out of the common properties, only these are allowed for Tegra264
63+ nvidia,pins: true
64+ nvidia,pull: true
65+ nvidia,tristate: true
66+ nvidia,schmitt: true
67+ nvidia,enable-input: true
68+ nvidia,open-drain: true
69+ nvidia,lock: true
70+ nvidia,drive-type: true
71+ nvidia,io-hv: true
72+
73+required:
74+ - nvidia,pins
75+
76+# We would typically use unevaluatedProperties here but that has the
77+# downside that all the properties in the common bindings become valid
78+# for all chip generations. In this case, however, we want the per-SoC
79+# bindings to be able to override which of the common properties are
80+# allowed, since not all pinmux generations support the same sets of
81+# properties. This way, the common bindings define the format of the
82+# properties but the per-SoC bindings define which of them apply to a
83+# given chip.
84+additionalProperties: false
Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-main.yaml+167−0
@@ -0,0 +1,167 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra264-pinmux-main.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: NVIDIA Tegra264 Main Pinmux Controller
8+
9+maintainers:
10+ - Thierry Reding <thierry.reding@gmail.com>
11+ - Jon Hunter <jonathanh@nvidia.com>
12+
13+properties:
14+ compatible:
15+ const: nvidia,tegra264-pinmux-main
16+
17+ reg:
18+ maxItems: 1
19+
20+patternProperties:
21+ "^pinmux(-[a-z0-9-]+)?$":
22+ type: object
23+
24+ # pin groups
25+ additionalProperties:
26+ $ref: nvidia,tegra264-pinmux-common.yaml
27+
28+ properties:
29+ nvidia,pins:
30+ items:
31+ enum: [ pwm1_pa0, pwm6_pa1, pwm7_pa2, pwm8_pa3, ufs0_ref_clk_pa4,
32+ ufs0_rst_n_pa5, soc_gpio250_pf0, soc_gpio251_pf1,
33+ soc_gpio252_pf2, dp_aux_ch0_hpd_pf3, dp_aux_ch1_hpd_pf4,
34+ dp_aux_ch2_hpd_pf5, dp_aux_ch3_hpd_pf6, pwm2_pf7, pwm3_pg0,
35+ gen7_i2c_scl_pg1, gen7_i2c_sda_pg2, gen9_i2c_scl_pg3,
36+ gen9_i2c_sda_pg4, sdmmc1_clk_px0, sdmmc1_cmd_px1,
37+ sdmmc1_dat0_px2, sdmmc1_dat1_px3, sdmmc1_dat2_px4,
38+ sdmmc1_dat3_px5, sdmmc1_comp, soc_gpio124_pl0,
39+ soc_gpio125_pl1, fan_tach0_pl2, soc_gpio127_pl3,
40+ soc_gpio128_pl4, soc_gpio129_pl5, soc_gpio130_pl6,
41+ soc_gpio131_pl7, gp_pwm9_pm0, soc_gpio133_pm1, uart9_tx_pm2,
42+ uart9_rx_pm3, uart9_rts_n_pm4, uart9_cts_n_pm5,
43+ soc_gpio170_pu0, soc_gpio171_pu1, soc_gpio172_pu2,
44+ soc_gpio173_pu3, soc_gpio174_pu4, soc_gpio175_pu5,
45+ soc_gpio176_pu6, soc_gpio177_pu7, soc_gpio178_pv0,
46+ pwm10_pv1, uart4_tx_pv2, uart4_rx_pv3, uart4_rts_n_pv4,
47+ uart4_cts_n_pv5, dap2_clk_pv6, dap2_din_pv7, dap2_dout_pw0,
48+ dap2_fs_pw1, gen1_i2c_scl_pw2, gen1_i2c_sda_pw3,
49+ gen0_i2c_scl_pw4, gen0_i2c_sda_pw5, pwr_i2c_scl_pw6,
50+ pwr_i2c_sda_pw7, soc_gpio138_pp0, soc_gpio139_pp1,
51+ dap6_sclk_pp2, dap6_dout_pp3, dap6_din_pp4, dap6_fs_pp5,
52+ dap4_sclk_pp6, dap4_dout_pp7, dap4_din_pq0, dap4_fs_pq1,
53+ spi5_sck_pq2, spi5_miso_pq3, spi5_mosi_pq4, spi5_cs0_pq5,
54+ soc_gpio152_pq6, soc_gpio153_pq7, aud_mclk_pr0,
55+ soc_gpio155_pr1, dap1_sclk_pr2, dap1_out_pr3, dap1_in_pr4,
56+ dap1_fs_pr5, gen11_i2c_scl_pr6, gen11_i2c_sda_pr7,
57+ soc_gpio350_ps0, soc_gpio351_ps1, qspi0_sck_pt0,
58+ qspi0_cs_n_pt1, qspi0_io0_pt2, qspi0_io1_pt3, qspi0_io2_pt4,
59+ qspi0_io3_pt5, soc_gpio192_pt6, soc_gpio270_py0,
60+ soc_gpio271_py1, soc_gpio272_py2, soc_gpio273_py3,
61+ soc_gpio274_py4, soc_gpio275_py5, soc_gpio276_py6,
62+ soc_gpio277_py7, soc_gpio278_pz0, soc_gpio279_pz1,
63+ xhalt_trig_pz2, soc_gpio281_pz3, soc_gpio282_pz4,
64+ soc_gpio283_pz5, soc_gpio284_pz6, soc_gpio285_pz7,
65+ soc_gpio286_pal0, soc_gpio287_pal1, soc_gpio288_pal2,
66+ cpu_pwr_req_ph0, gpu_pwr_req_ph1, uart10_tx_ph2,
67+ uart10_rx_ph3, uart10_rts_n_ph4, uart10_cts_n_ph5,
68+ spi3_sck_ph6, spi3_miso_ph7, spi3_mosi_pj0, spi3_cs0_pj1,
69+ spi3_cs3_pj2, uart5_tx_pj3, uart5_rx_pj4, uart5_rts_n_pj5,
70+ uart5_cts_n_pj6, spi1_sck_pj7, spi1_miso_pk0, spi1_mosi_pk1,
71+ spi1_cs0_pk2, spi1_cs1_pk3, extperiph1_clk_pk4,
72+ extperiph2_clk_pk5, gen12_i2c_scl_pk6, gen12_i2c_sda_pk7,
73+ drive_cpu_pwr_req_ph0, drive_gpu_pwr_req_ph1,
74+ drive_uart10_cts_n_ph5, drive_uart10_rts_n_ph4,
75+ drive_uart10_rx_ph3, drive_uart10_tx_ph2,
76+ drive_spi3_cs0_pj1, drive_spi3_cs3_pj2,
77+ drive_spi3_miso_ph7, drive_spi3_mosi_pj0,
78+ drive_spi3_sck_ph6, drive_uart5_cts_n_pj6,
79+ drive_uart5_rts_n_pj5, drive_uart5_rx_pj4,
80+ drive_uart5_tx_pj3, drive_spi1_cs0_pk2,
81+ drive_spi1_cs1_pk3, drive_spi1_miso_pk0,
82+ drive_spi1_mosi_pk1, drive_spi1_sck_pj7,
83+ drive_extperiph2_clk_pk5, drive_extperiph1_clk_pk4,
84+ drive_gen12_i2c_scl_pk6, drive_gen12_i2c_sda_pk7,
85+ drive_soc_gpio124_pl0, drive_soc_gpio125_pl1,
86+ drive_fan_tach0_pl2, drive_soc_gpio127_pl3,
87+ drive_soc_gpio128_pl4, drive_soc_gpio129_pl5,
88+ drive_soc_gpio130_pl6, drive_soc_gpio131_pl7,
89+ drive_gp_pwm9_pm0, drive_soc_gpio133_pm1,
90+ drive_uart9_cts_n_pm5, drive_uart9_rts_n_pm4,
91+ drive_uart9_rx_pm3, drive_uart9_tx_pm2,
92+ drive_sdmmc1_clk_px0, drive_sdmmc1_cmd_px1,
93+ drive_sdmmc1_dat3_px5, drive_sdmmc1_dat2_px4,
94+ drive_sdmmc1_dat1_px3, drive_sdmmc1_dat0_px2,
95+ drive_qspi0_cs_n_pt1, drive_qspi0_io0_pt2,
96+ drive_qspi0_io1_pt3, drive_qspi0_io2_pt4,
97+ drive_qspi0_io3_pt5, drive_qspi0_sck_pt0,
98+ drive_soc_gpio192_pt6, drive_soc_gpio138_pp0,
99+ drive_soc_gpio139_pp1, drive_dap6_din_pp4,
100+ drive_dap6_dout_pp3, drive_dap6_fs_pp5,
101+ drive_dap6_sclk_pp2, drive_dap4_dout_pp7,
102+ drive_dap4_sclk_pp6, drive_dap4_din_pq0,
103+ drive_dap4_fs_pq1, drive_spi5_cs0_pq5,
104+ drive_spi5_miso_pq3, drive_spi5_mosi_pq4,
105+ drive_spi5_sck_pq2, drive_soc_gpio152_pq6,
106+ drive_soc_gpio153_pq7, drive_soc_gpio155_pr1,
107+ drive_aud_mclk_pr0, drive_dap1_sclk_pr2,
108+ drive_dap1_in_pr4, drive_dap1_out_pr3,
109+ drive_dap1_fs_pr5, drive_gen11_i2c_scl_pr6,
110+ drive_gen11_i2c_sda_pr7, drive_soc_gpio350_ps0,
111+ drive_soc_gpio351_ps1, drive_gen0_i2c_scl_pw4,
112+ drive_gen0_i2c_sda_pw5, drive_gen1_i2c_scl_pw2,
113+ drive_gen1_i2c_sda_pw3, drive_dap2_fs_pw1,
114+ drive_dap2_clk_pv6, drive_dap2_din_pv7,
115+ drive_dap2_dout_pw0, drive_pwm10_pv1,
116+ drive_soc_gpio170_pu0, drive_soc_gpio171_pu1,
117+ drive_soc_gpio172_pu2, drive_soc_gpio173_pu3,
118+ drive_soc_gpio174_pu4, drive_soc_gpio175_pu5,
119+ drive_soc_gpio176_pu6, drive_soc_gpio177_pu7,
120+ drive_soc_gpio178_pv0, drive_uart4_cts_n_pv5,
121+ drive_uart4_rts_n_pv4, drive_uart4_rx_pv3,
122+ drive_uart4_tx_pv2, drive_pwr_i2c_sda_pw7,
123+ drive_pwr_i2c_scl_pw6, drive_soc_gpio250_pf0,
124+ drive_soc_gpio251_pf1, drive_soc_gpio252_pf2,
125+ drive_dp_aux_ch0_hpd_pf3, drive_dp_aux_ch1_hpd_pf4,
126+ drive_dp_aux_ch2_hpd_pf5, drive_dp_aux_ch3_hpd_pf6,
127+ drive_pwm2_pf7, drive_pwm3_pg0,
128+ drive_gen7_i2c_scl_pg1, drive_gen7_i2c_sda_pg2,
129+ drive_gen9_i2c_scl_pg3, drive_gen9_i2c_sda_pg4,
130+ drive_soc_gpio270_py0, drive_soc_gpio271_py1,
131+ drive_soc_gpio272_py2, drive_soc_gpio273_py3,
132+ drive_soc_gpio274_py4, drive_soc_gpio275_py5,
133+ drive_soc_gpio276_py6, drive_soc_gpio277_py7,
134+ drive_soc_gpio278_pz0, drive_soc_gpio279_pz1,
135+ drive_soc_gpio282_pz4, drive_soc_gpio283_pz5,
136+ drive_soc_gpio284_pz6, drive_soc_gpio285_pz7,
137+ drive_soc_gpio286_pal0, drive_soc_gpio287_pal1,
138+ drive_soc_gpio288_pal2, drive_xhalt_trig_pz2,
139+ drive_soc_gpio281_pz3 ]
140+
141+required:
142+ - compatible
143+ - reg
144+
145+additionalProperties: false
146+
147+examples:
148+ - |
149+ #include <dt-bindings/pinctrl/pinctrl-tegra.h>
150+
151+ pinmux@c281000 {
152+ compatible = "nvidia,tegra264-pinmux-main";
153+ reg = <0xc281000 0xc000>;
154+
155+ pinctrl-names = "default";
156+ pinctrl-0 = <&state_default>;
157+
158+ state_default: pinmux-default {
159+ sdmmc1 {
160+ nvidia,pins = "sdmmc1_clk_px0";
161+ nvidia,function = "sdmmc1_cd";
162+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
163+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
164+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
165+ };
166+ };
167+ };
Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-uphy.yaml+78−0
@@ -0,0 +1,78 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra264-pinmux-uphy.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: NVIDIA Tegra264 UPHY Pinmux Controller
8+
9+maintainers:
10+ - Thierry Reding <thierry.reding@gmail.com>
11+ - Jon Hunter <jonathanh@nvidia.com>
12+
13+properties:
14+ compatible:
15+ const: nvidia,tegra264-pinmux-uphy
16+
17+ reg:
18+ maxItems: 1
19+
20+patternProperties:
21+ "^pinmux(-[a-z0-9-]+)?$":
22+ type: object
23+
24+ # pin groups
25+ additionalProperties:
26+ $ref: nvidia,tegra264-pinmux-common.yaml
27+
28+ properties:
29+ nvidia,pins:
30+ items:
31+ enum: [ eth1_mdio_pe0, pex_l4_clkreq_n_pd0, pex_l4_rst_n_pd1,
32+ pex_l5_clkreq_n_pd2, pex_l5_rst_n_pd3, eth0_mdio_pd4,
33+ eth0_mdc_pd5, eth1_mdc_pe1, eth2_mdio_pe2, eth2_mdc_pe3,
34+ eth3_mdio_pd6, eth3_mdc_pd7, pex_l1_clkreq_n_pb0,
35+ pex_l1_rst_n_pb1, pex_wake_n_pc2, pex_l2_rst_n_pb3,
36+ pex_l2_clkreq_n_pb2, pex_l3_clkreq_n_pb4, pex_l3_rst_n_pb5,
37+ sgmii0_sma_mdio_pc0, sgmii0_sma_mdc_pc1, soc_gpio113_pb6,
38+ soc_gpio114_pb7, pwm1_pa0, pwm6_pa1, pwm7_pa2, pwm8_pa3,
39+ ufs0_ref_clk_pa4, ufs0_rst_n_pa5, drive_eth1_mdio_pe0,
40+ drive_pex_l4_clkreq_n_pd0, drive_pex_l4_rst_n_pd1,
41+ drive_pex_l5_clkreq_n_pd2, drive_pex_l5_rst_n_pd3,
42+ drive_eth0_mdio_pd4, drive_eth0_mdc_pd5, drive_eth1_mdc_pe1,
43+ drive_eth2_mdio_pe2, drive_eth2_mdc_pe3, drive_eth3_mdio_pd6,
44+ drive_eth3_mdc_pd7, drive_pex_l1_clkreq_n_pb0,
45+ drive_pex_l1_rst_n_pb1, drive_pex_wake_n_pc2,
46+ drive_pex_l2_rst_n_pb3, drive_pex_l2_clkreq_n_pb2,
47+ drive_pex_l3_clkreq_n_pb4, drive_pex_l3_rst_n_pb5,
48+ drive_sgmii0_sma_mdio_pc0, drive_sgmii0_sma_mdc_pc1,
49+ drive_soc_gpio113_pb6, drive_soc_gpio114_pb7,
50+ drive_pwm1_pa0, drive_pwm6_pa1, drive_pwm7_pa2,
51+ drive_pwm8_pa3, drive_ufs0_ref_clk_pa4, drive_ufs0_rst_n_pa5 ]
52+
53+required:
54+ - compatible
55+ - reg
56+
57+additionalProperties: false
58+
59+examples:
60+ - |
61+ #include <dt-bindings/pinctrl/pinctrl-tegra.h>
62+
63+ pinmux@82e0000 {
64+ compatible = "nvidia,tegra264-pinmux-uphy";
65+ reg = <0x82e0000 0x4000>;
66+
67+ pinctrl-names = "default";
68+ pinctrl-0 = <&pinmux_default>;
69+
70+ pinmux_default: pinmux-default {
71+ pex {
72+ nvidia,pins = "pex_l1_rst_n_pb1";
73+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
74+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
75+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
76+ };
77+ };
78+ };
Documentation/devicetree/bindings/pinctrl/pinctrl-multiplexer.yaml+57−0
@@ -0,0 +1,57 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/pinctrl/pinctrl-multiplexer.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Generic pinctrl device for on-board MUX Chips
8+
9+maintainers:
10+ - Frank Li <Frank.Li@nxp.com>
11+
12+description:
13+ Generic pinctrl device for on-board MUX Chips, which switch SoC signals
14+ between different peripherals (e.g. MMC and UART).
15+
16+ The MUX select lines are often driven by a I2C GPIO expander.
17+
18+properties:
19+ compatible:
20+ const: pinctrl-multiplexer
21+
22+patternProperties:
23+ '-grp$':
24+ type: object
25+ additionalProperties: false
26+ properties:
27+ mux-states:
28+ maxItems: 1
29+
30+ required:
31+ - mux-states
32+
33+required:
34+ - compatible
35+
36+allOf:
37+ - $ref: pinctrl.yaml#
38+
39+unevaluatedProperties: false
40+
41+examples:
42+ - |
43+ pinctrl-mux {
44+ compatible = "pinctrl-multiplexer";
45+
46+ uart-grp {
47+ mux-states = <&mux 0>;
48+ };
49+
50+ spi-grp {
51+ mux-states = <&mux 1>;
52+ };
53+
54+ i2c-grp {
55+ mux-states = <&mux 2>;
56+ };
57+ };
Documentation/devicetree/bindings/pinctrl/pinctrl.yaml+1−1
@@ -27,7 +27,7 @@ description: | · 26 unmodified lines
2727
2828 properties:
2929 $nodename:
30− pattern: "^(pinctrl|pinmux)(@[0-9a-f]+)?$"
30+ pattern: "^(pinctrl|pinmux)(@[0-9a-f]+|-[a-z0-9]+)?$"
3131
3232 "#pinctrl-cells":
3333 description: >
Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml+16−10
@@ -86,16 +86,22 @@ $defs: · 85 unmodified lines
8686 qdss_gpio_tracectl, qdss_gpio_tracedata, qlink_big_enable,
8787 qlink_big_request, qlink_little_enable,
8888 qlink_little_request, qlink_wmss, qspi0, qspi_clk,
89− qspi_cs, qup1_se0, qup1_se1, qup1_se2, qup1_se3, qup1_se4,
90− qup1_se5, qup1_se6, qup1_se7, qup2_se0, qup2_se1,
91− qup2_se2, qup2_se3, qup2_se4, qup2_se5, qup2_se6,
92− qup2_se7, resout_gpio, sd_write_protect, sdc1, sdc2,
93− sdc2_fb_clk, tb_trig_sdc1, tb_trig_sdc2, tmess_prng0,
94− tmess_prng1, tmess_prng2, tmess_prng3, tsense_pwm1,
95− tsense_pwm2, tsense_pwm3, tsense_pwm4, uim0_clk,
96− uim0_data, uim0_present, uim0_reset, uim1_clk, uim1_data,
97− uim1_present, uim1_reset, usb0_hs, usb_phy, vfr_0, vfr_1,
98− vsense_trigger_mirnat, wcn_sw_ctrl ]
89+ qspi_cs, qup1_se0, qup1_se1, qup1_se2, qup1_se2_l2_mira,
90+ qup1_se2_l2_mirb, qup1_se2_l3_mira, qup1_se2_l3_mirb,
91+ qup1_se3, qup1_se4_01, qup1_se4_23,
92+ qup1_se5, qup1_se6, qup1_se6_l1_mira,
93+ qup1_se6_l1_mirb, qup1_se6_l3_mira, qup1_se6_l3_mirb,
94+ qup1_se7, qup1_se7_l0_mira, qup1_se7_l0_mirb,
95+ qup1_se7_l1_mira, qup1_se7_l1_mirb, qup2_se0, qup2_se1,
96+ qup2_se2, qup2_se3, qup2_se3_l0_mira, qup2_se3_l0_mirb,
97+ qup2_se3_l1_mira, qup2_se3_l1_mirb, qup2_se4, qup2_se5,
98+ qup2_se6, qup2_se7, resout_gpio, sd_write_protect, sdc1,
99+ sdc2, sdc2_fb_clk, tb_trig_sdc1, tb_trig_sdc2,
100+ tmess_prng0, tmess_prng1, tmess_prng2, tmess_prng3,
101+ tsense_pwm1, tsense_pwm2, tsense_pwm3, tsense_pwm4,
102+ uim0_clk, uim0_data, uim0_present, uim0_reset, uim1_clk,
103+ uim1_data, uim1_present, uim1_reset, usb0_hs, usb_phy,
104+ vfr_0, vfr_1, vsense_trigger_mirnat, wcn_sw_ctrl ]
99105 required:
100106 - pins
101107
Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.yaml+0−5
@@ -36,11 +36,6 @@ patternProperties: · 35 unmodified lines
3636 $ref: "#/$defs/qcom-ipq4019-tlmm-state"
3737 additionalProperties: false
3838
39− "-hog(-[0-9]+)?$":
40− type: object
41− required:
42− - gpio-hog
43−
4439 $defs:
4540 qcom-ipq4019-tlmm-state:
4641 type: object
Documentation/devicetree/bindings/pinctrl/qcom,ipq9650-tlmm.yaml+118−0
@@ -0,0 +1,118 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/pinctrl/qcom,ipq9650-tlmm.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm IPQ9650 TLMM pin controller
8+
9+maintainers:
10+ - Bjorn Andersson <andersson@kernel.org>
11+ - Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
12+
13+description:
14+ Top Level Mode Multiplexer pin controller in Qualcomm IPQ9650 SoC.
15+
16+allOf:
17+ - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
18+
19+properties:
20+ compatible:
21+ const: qcom,ipq9650-tlmm
22+
23+ reg:
24+ maxItems: 1
25+
26+ interrupts:
27+ maxItems: 1
28+
29+ gpio-reserved-ranges:
30+ minItems: 1
31+ maxItems: 27
32+
33+ gpio-line-names:
34+ maxItems: 54
35+
36+patternProperties:
37+ "-state$":
38+ oneOf:
39+ - $ref: "#/$defs/qcom-ipq9650-tlmm-state"
40+ - patternProperties:
41+ "-pins$":
42+ $ref: "#/$defs/qcom-ipq9650-tlmm-state"
43+ additionalProperties: false
44+
45+$defs:
46+ qcom-ipq9650-tlmm-state:
47+ type: object
48+ description:
49+ Pinctrl node's client devices use subnodes for desired pin configuration.
50+ Client device subnodes use below standard properties.
51+ $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
52+ unevaluatedProperties: false
53+
54+ properties:
55+ pins:
56+ description:
57+ List of gpio pins affected by the properties specified in this
58+ subnode.
59+ items:
60+ pattern: "^gpio([0-9]|[1-4][0-9]|5[0-3])$"
61+ minItems: 1
62+ maxItems: 36
63+
64+ function:
65+ description:
66+ Specify the alternative function to be configured for the specified
67+ pins.
68+
69+ enum: [ atest_char_start, atest_char_status0, atest_char_status1,
70+ atest_char_status2, atest_char_status3, atest_tic_en,
71+ audio_pri_mclk_in0, audio_pri_mclk_out0, audio_pri_mclk_in1,
72+ audio_pri_mclk_out1, audio_pri, audio_sec, audio_sec_mclk_in0,
73+ audio_sec_mclk_out0, audio_sec_mclk_in1, audio_sec_mclk_out1,
74+ core_voltage_0, core_voltage_1, core_voltage_2, core_voltage_3,
75+ core_voltage_4, cri_rng0, cri_rng1, cri_rng2, dbg_out_clk,
76+ gcc_plltest_bypassnl, gcc_plltest_resetn, gcc_tlmm, gpio,
77+ mdc_mst, mdc_slv0, mdc_slv1, mdio_mst, mdio_slv, mdio_slv0,
78+ mdio_slv1, pcie0_clk_req_n, pcie0_wake, pcie1_clk_req_n,
79+ pcie1_wake, pcie2_clk_req_n, pcie2_wake, pcie3_clk_req_n,
80+ pcie3_wake, pcie4_clk_req_n, pcie4_wake, pll_bist_sync,
81+ pll_test, pwm, qdss_cti_trig_in_a0, qdss_cti_trig_in_a1,
82+ qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, qdss_cti_trig_out_a0,
83+ qdss_cti_trig_out_a1, qdss_cti_trig_out_b0, qdss_cti_trig_out_b1,
84+ qdss_traceclk_a, qdss_tracectl_a, qdss_tracedata_a, qspi_data,
85+ qspi_clk, qspi_cs_n, qup_se0, qup_se1, qup_se2, qup_se3,
86+ qup_se4, qup_se5, qup_se6, qup_se7, resout, rx_los0, rx_los1,
87+ rx_los2, sdc_clk, sdc_cmd, sdc_data, tsens_max, tsn ]
88+
89+ required:
90+ - pins
91+
92+required:
93+ - compatible
94+ - reg
95+
96+unevaluatedProperties: false
97+
98+examples:
99+ - |
100+ #include <dt-bindings/interrupt-controller/arm-gic.h>
101+
102+ tlmm: pinctrl@1000000 {
103+ compatible = "qcom,ipq9650-tlmm";
104+ reg = <0x01000000 0x300000>;
105+ gpio-controller;
106+ #gpio-cells = <2>;
107+ gpio-ranges = <&tlmm 0 0 54>;
108+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
109+ interrupt-controller;
110+ #interrupt-cells = <2>;
111+
112+ qup-uart1-default-state {
113+ pins = "gpio43", "gpio44";
114+ function = "qup_se6";
115+ drive-strength = <8>;
116+ bias-pull-down;
117+ };
118+ };
Documentation/devicetree/bindings/pinctrl/qcom,nord-tlmm.yaml+141−0
@@ -0,0 +1,141 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/pinctrl/qcom,nord-tlmm.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm Technologies, Inc. SA8797P TLMM block
8+
9+maintainers:
10+ - Bartosz Golaszewski <brgl@kernel.org>
11+
12+description:
13+ Top Level Mode Multiplexer pin controller in Qualcomm SA8797P SoC.
14+
15+allOf:
16+ - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
17+
18+properties:
19+ compatible:
20+ const: qcom,nord-tlmm
21+
22+ reg:
23+ maxItems: 1
24+
25+ interrupts:
26+ maxItems: 1
27+
28+ gpio-reserved-ranges:
29+ minItems: 1
30+ maxItems: 90
31+
32+ gpio-line-names:
33+ maxItems: 181
34+
35+patternProperties:
36+ "-state$":
37+ oneOf:
38+ - $ref: "#/$defs/qcom-nord-tlmm-state"
39+ - patternProperties:
40+ "-pins$":
41+ $ref: "#/$defs/qcom-nord-tlmm-state"
42+ additionalProperties: false
43+
44+$defs:
45+ qcom-nord-tlmm-state:
46+ type: object
47+ description:
48+ Pinctrl node's client devices use subnodes for desired pin configuration.
49+ Client device subnodes use below standard properties.
50+ $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
51+ unevaluatedProperties: false
52+
53+ properties:
54+ pins:
55+ description:
56+ List of gpio pins affected by the properties specified in this
57+ subnode.
58+ items:
59+ oneOf:
60+ - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9]|180)$"
61+ - enum: [ ufs_reset ]
62+ minItems: 1
63+ maxItems: 16
64+
65+ function:
66+ description:
67+ Specify the alternative function to be configured for the specified
68+ pins.
69+
70+ enum: [ aoss_cti, atest_char, atest_usb20, atest_usb21,
71+ aud_intfc0_clk, aud_intfc0_data, aud_intfc0_ws,
72+ aud_intfc10_clk, aud_intfc10_data, aud_intfc10_ws,
73+ aud_intfc1_clk, aud_intfc1_data, aud_intfc1_ws,
74+ aud_intfc2_clk, aud_intfc2_data, aud_intfc2_ws,
75+ aud_intfc3_clk, aud_intfc3_data, aud_intfc3_ws,
76+ aud_intfc4_clk, aud_intfc4_data, aud_intfc4_ws,
77+ aud_intfc5_clk, aud_intfc5_data, aud_intfc5_ws,
78+ aud_intfc6_clk, aud_intfc6_data, aud_intfc6_ws,
79+ aud_intfc7_clk, aud_intfc7_data, aud_intfc7_ws,
80+ aud_intfc8_clk, aud_intfc8_data, aud_intfc8_ws,
81+ aud_intfc9_clk, aud_intfc9_data, aud_intfc9_ws,
82+ aud_mclk0_mira, aud_mclk0_mirb, aud_mclk1_mira, aud_mclk1_mirb,
83+ aud_mclk2_mira, aud_mclk2_mirb, aud_refclk0, aud_refclk1,
84+ bist_done, ccu_async_in, ccu_i2c_scl, ccu_i2c_sda, ccu_timer,
85+ clink_debug, dbg_out, dbg_out_clk,
86+ ddr_bist_complete, ddr_bist_fail, ddr_bist_start, ddr_bist_stop,
87+ ddr_pxi, dp_rx0, dp_rx00, dp_rx01, dp_rx0_mute, dp_rx1, dp_rx10,
88+ dp_rx11, dp_rx1_mute,
89+ edp0_hot, edp0_lcd, edp1_hot, edp1_lcd, edp2_hot, edp2_lcd,
90+ edp3_hot, edp3_lcd,
91+ emac0_mcg, emac0_mdc, emac0_mdio, emac0_ptp, emac1_mcg,
92+ emac1_mdc, emac1_mdio, emac1_ptp,
93+ gcc_gp1_clk, gcc_gp2_clk, gcc_gp3_clk, gcc_gp4_clk, gcc_gp5_clk,
94+ gcc_gp6_clk, gcc_gp7_clk, gcc_gp8_clk, jitter_bist, lbist_pass,
95+ mbist_pass, mdp0_vsync_out, mdp1_vsync_out, mdp_vsync_e,
96+ mdp_vsync_p, mdp_vsync_s,
97+ pcie0_clk_req_n, pcie1_clk_req_n, pcie2_clk_req_n,
98+ pcie3_clk_req_n, phase_flag, pll_bist_sync, pll_clk_aux,
99+ prng_rosc0, prng_rosc1, pwrbrk_i_n, qdss, qdss_cti, qspi,
100+ qup0_se0, qup0_se1, qup0_se2, qup0_se3, qup0_se4, qup0_se5,
101+ qup1_se0, qup1_se1, qup1_se3, qup1_se2, qup1_se4, qup1_se5,
102+ qup1_se6, qup2_se0, qup2_se1, qup2_se2, qup2_se3, qup2_se4,
103+ qup2_se5, qup2_se6,
104+ sailss_ospi, sdc4_clk, sdc4_cmd, sdc4_data, smb_alert,
105+ smb_alert_n, smb_clk, smb_dat, tb_trig_sdc4, tmess_prng0,
106+ tmess_prng1, tsc_timer, tsense_pwm, usb0_hs,
107+ usb0_phy_ps, usb1_hs, usb1_phy_ps, usb2_hs, usxgmii0_phy,
108+ usxgmii1_phy, vsense_trigger_mirnat, wcn_sw, wcn_sw_ctrl]
109+
110+ required:
111+ - pins
112+
113+required:
114+ - compatible
115+ - reg
116+
117+unevaluatedProperties: false
118+
119+examples:
120+ - |
121+ #include <dt-bindings/interrupt-controller/arm-gic.h>
122+
123+ tlmm: pinctrl@f100000 {
124+ compatible = "qcom,nord-tlmm";
125+ reg = <0x0f100000 0xc0000>;
126+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
127+ gpio-controller;
128+ #gpio-cells = <2>;
129+ interrupt-controller;
130+ #interrupt-cells = <2>;
131+ gpio-ranges = <&tlmm 0 0 181>;
132+ wakeup-parent = <&pdc>;
133+
134+ qup_uart15_default: qup-uart15-default-state {
135+ pins = "gpio147", "gpio148";
136+ function = "qup2_se2";
137+ drive-strength = <2>;
138+ bias-disable;
139+ };
140+ };
141+...
Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml+3−0
@@ -30,6 +30,7 @@ properties: · 29 unmodified lines
3030 - qcom,pm7550-gpio
3131 - qcom,pm7550ba-gpio
3232 - qcom,pm8005-gpio
33+ - qcom,pm8010-gpio
3334 - qcom,pm8018-gpio
3435 - qcom,pm8019-gpio
3536 - qcom,pm8038-gpio
@@ -134,6 +135,7 @@ allOf: · 98 unmodified lines
134135 compatible:
135136 contains:
136137 enum:
138+ - qcom,pm8010-gpio
137139 - qcom,pmi8950-gpio
138140 - qcom,pmr735d-gpio
139141 then:
@@ -465,6 +467,7 @@ $defs: · 325 unmodified lines
465467 - gpio1-gpio10 for pm7325
466468 - gpio1-gpio8 for pm7550ba
467469 - gpio1-gpio4 for pm8005
470+ - gpio1-gpio2 for pm8010
468471 - gpio1-gpio6 for pm8018
469472 - gpio1-gpio12 for pm8038
470473 - gpio1-gpio40 for pm8058
Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml+0−5
@@ -42,11 +42,6 @@ patternProperties: · 41 unmodified lines
4242 $ref: "#/$defs/qcom-sdm845-tlmm-state"
4343 additionalProperties: false
4444
45− "-hog(-[0-9]+)?$":
46− type: object
47− required:
48− - gpio-hog
49−
5045 $defs:
5146 qcom-sdm845-tlmm-state:
5247 type: object
Documentation/devicetree/bindings/pinctrl/qcom,shikra-tlmm.yaml+123−0
@@ -0,0 +1,123 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/pinctrl/qcom,shikra-tlmm.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm Technologies, Inc. Shikra TLMM block
8+
9+maintainers:
10+ - Komal Bajaj <komal.bajaj@oss.qualcomm.com>
11+
12+description: |
13+ Top Level Mode Multiplexer pin controller in Qualcomm Shikra SoC.
14+
15+allOf:
16+ - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
17+
18+properties:
19+ compatible:
20+ const: qcom,shikra-tlmm
21+
22+ reg:
23+ maxItems: 1
24+
25+ interrupts:
26+ maxItems: 1
27+
28+ gpio-reserved-ranges:
29+ minItems: 1
30+ maxItems: 83
31+
32+ gpio-line-names:
33+ maxItems: 166
34+
35+patternProperties:
36+ "-state$":
37+ oneOf:
38+ - $ref: "#/$defs/qcom-shikra-tlmm-state"
39+ - patternProperties:
40+ "-pins$":
41+ $ref: "#/$defs/qcom-shikra-tlmm-state"
42+ additionalProperties: false
43+
44+$defs:
45+ qcom-shikra-tlmm-state:
46+ type: object
47+ description:
48+ Pinctrl node's client devices use subnodes for desired pin configuration.
49+ Client device subnodes use below standard properties.
50+ $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
51+ unevaluatedProperties: false
52+
53+ properties:
54+ pins:
55+ description:
56+ List of gpio pins affected by the properties specified in this
57+ subnode.
58+ items:
59+ oneOf:
60+ - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-5][0-9]|16[0-5])$"
61+ - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data,
62+ sdc2_clk, sdc2_cmd, sdc2_data ]
63+ minItems: 1
64+ maxItems: 36
65+
66+ function:
67+ description:
68+ Specify the alternative function to be configured for the specified
69+ pins.
70+
71+ enum: [ gpio, agera_pll, atest_bbrx, atest_char, atest_gpsadc,
72+ atest_tsens, atest_usb, cam_mclk, cci_async, cci_i2c0,
73+ cci_i2c1, cci_timer, char_exec, cri_trng, dac_calib,
74+ dbg_out_clk, ddr_bist, ddr_pxi, dmic, emac_dll, emac_mcg,
75+ emac_phy, emac0_ptp_aux, emac0_ptp_pps, emac1_ptp_aux,
76+ emac1_ptp_pps, ext_mclk, gcc_gp, gsm0_tx, i2s0, i2s1,
77+ i2s2, i2s3, jitter_bist, m_voc, mdp_vsync_e, mdp_vsync_out0,
78+ mdp_vsync_out1, mdp_vsync_p, mdp_vsync_s, mpm_pwr, mss_lte,
79+ nav_gpio, pa_indicator_or, pbs_in, pbs_out, pcie0_clk_req_n,
80+ phase_flag, pll, prng_rosc, pwm, qdss_cti, qup0_se0,
81+ qup0_se1, qup0_se1_01, qup0_se1_23, qup0_se2, qup0_se3_01,
82+ qup0_se3_23, qup0_se4_01, qup0_se4_23, qup0_se5, qup0_se6,
83+ qup0_se7_01, qup0_se7_23, qup0_se8, qup0_se9, qup0_se9_01,
84+ qup0_se9_23, rgmii, sd_write_protect, sdc_cdc, sdc_tb_trig,
85+ ssbi_wtr, swr0_rx, swr0_tx, tgu_ch_trigout, tsc_async,
86+ tsense_pwm, uim1, uim2, unused_adsp, unused_gsm1, usb0_phy_ps,
87+ vfr, vsense_trigger_mirnat, wlan ]
88+
89+ required:
90+ - pins
91+
92+required:
93+ - compatible
94+ - reg
95+
96+unevaluatedProperties: false
97+
98+examples:
99+ - |
100+ #include <dt-bindings/interrupt-controller/arm-gic.h>
101+
102+ tlmm: pinctrl@500000 {
103+ compatible = "qcom,shikra-tlmm";
104+ reg = <0x00500000 0x800000>;
105+
106+ interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
107+
108+ gpio-controller;
109+ #gpio-cells = <2>;
110+
111+ interrupt-controller;
112+ #interrupt-cells = <2>;
113+
114+ gpio-ranges = <&tlmm 0 0 166>;
115+
116+ qup-uart0-default-state {
117+ pins = "gpio0", "gpio1";
118+ function = "qup0_se1";
119+ drive-strength = <2>;
120+ bias-disable;
121+ };
122+ };
123+...
Documentation/devicetree/bindings/pinctrl/qcom,sm6350-lpass-lpi-pinctrl.yaml+124−0
@@ -0,0 +1,124 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/pinctrl/qcom,sm6350-lpass-lpi-pinctrl.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm SM6350 SoC LPASS LPI TLMM
8+
9+maintainers:
10+ - Luca Weiss <luca.weiss@fairphone.com>
11+
12+description:
13+ Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
14+ (LPASS) Low Power Island (LPI) of Qualcomm SM6350 SoC.
15+
16+properties:
17+ compatible:
18+ const: qcom,sm6350-lpass-lpi-pinctrl
19+
20+ reg:
21+ items:
22+ - description: LPASS LPI TLMM Control and Status registers
23+ - description: LPASS LPI MCC registers
24+
25+ clocks:
26+ items:
27+ - description: LPASS Core voting clock
28+ - description: LPASS Audio voting clock
29+
30+ clock-names:
31+ items:
32+ - const: core
33+ - const: audio
34+
35+patternProperties:
36+ "-state$":
37+ oneOf:
38+ - $ref: "#/$defs/qcom-sm6350-lpass-state"
39+ - patternProperties:
40+ "-pins$":
41+ $ref: "#/$defs/qcom-sm6350-lpass-state"
42+ additionalProperties: false
43+
44+$defs:
45+ qcom-sm6350-lpass-state:
46+ type: object
47+ description:
48+ Pinctrl node's client devices use subnodes for desired pin configuration.
49+ Client device subnodes use below standard properties.
50+ $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
51+ unevaluatedProperties: false
52+
53+ properties:
54+ pins:
55+ description:
56+ List of gpio pins affected by the properties specified in this
57+ subnode.
58+ items:
59+ pattern: "^gpio([0-9]|1[0-4])$"
60+
61+ function:
62+ enum: [ dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic3_clk,
63+ dmic3_data, gpio, i2s1_clk, i2s1_data, i2s1_ws, i2s2_clk,
64+ i2s2_data, i2s2_ws, qua_mi2s_data, qua_mi2s_sclk, qua_mi2s_ws,
65+ swr_rx_clk, swr_rx_data, swr_tx_clk, swr_tx_data, wsa_swr_clk,
66+ wsa_swr_data ]
67+ description:
68+ Specify the alternative function to be configured for the specified
69+ pins.
70+
71+allOf:
72+ - $ref: qcom,lpass-lpi-common.yaml#
73+
74+required:
75+ - compatible
76+ - reg
77+ - clocks
78+ - clock-names
79+
80+unevaluatedProperties: false
81+
82+examples:
83+ - |
84+ #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
85+
86+ lpass_tlmm: pinctrl@33c0000 {
87+ compatible = "qcom,sm6350-lpass-lpi-pinctrl";
88+ reg = <0x033c0000 0x20000>,
89+ <0x03550000 0x10000>;
90+ gpio-controller;
91+ #gpio-cells = <2>;
92+ gpio-ranges = <&lpass_tlmm 0 0 15>;
93+
94+ clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
95+ <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
96+ clock-names = "core",
97+ "audio";
98+
99+ i2s1_active: i2s1-active-state {
100+ clk-pins {
101+ pins = "gpio6";
102+ function = "i2s1_clk";
103+ drive-strength = <8>;
104+ bias-disable;
105+ output-high;
106+ };
107+
108+ ws-pins {
109+ pins = "gpio7";
110+ function = "i2s1_ws";
111+ drive-strength = <8>;
112+ bias-disable;
113+ output-high;
114+ };
115+
116+ data-pins {
117+ pins = "gpio8", "gpio9";
118+ function = "i2s1_data";
119+ drive-strength = <8>;
120+ bias-disable;
121+ output-high;
122+ };
123+ };
124+ };
Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml+6−0
@@ -51,6 +51,12 @@ properties: · 50 unmodified lines
5151 should not be accessed by the OS. Please see the ../gpio/gpio.txt for more
5252 information.
5353
54+patternProperties:
55+ "-hog(-[0-9]+)?$":
56+ type: object
57+ required:
58+ - gpio-hog
59+
5460 allOf:
5561 - $ref: pinctrl.yaml#
5662
Documentation/devicetree/bindings/pinctrl/realtek,rtd1625-pinctrl.yaml+1−1
@@ -110,7 +110,7 @@ patternProperties: · 109 unmodified lines
110110
111111 input-schmitt-disable: true
112112
113− input-voltage-microvolt:
113+ input-threshold-voltage-microvolt:
114114 description: |
115115 Select the input receiver voltage domain for the pin.
116116 Valid arguments are:
Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml+35−0
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
2626 - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five
2727 - renesas,r9a07g044-pinctrl # RZ/G2{L,LC}
2828 - renesas,r9a08g045-pinctrl # RZ/G3S
29+ - renesas,r9a08g046-pinctrl # RZ/G3L
2930 - renesas,r9a09g047-pinctrl # RZ/G3E
3031 - renesas,r9a09g056-pinctrl # RZ/V2N
3132 - renesas,r9a09g057-pinctrl # RZ/V2H(P)
@@ -78,6 +79,26 @@ properties: · 46 unmodified lines
7879 - description: PFC main reset
7980 - description: Reset for the control register related to WDTUDFCA and WDTUDFFCM pins
8081
82+ reset-names:
83+ oneOf:
84+ - items:
85+ - const: rstn
86+ - const: port
87+ - const: spare
88+ - items:
89+ - const: main
90+ - const: error
91+
92+ renesas,clonech:
93+ $ref: /schemas/types.yaml#/definitions/phandle-array
94+ items:
95+ - items:
96+ - description: phandle to system controller
97+ - description: offset of clone channel control register
98+ description:
99+ Phandle and offset to the system controller containing the clone channel
100+ control values.
101+
81102 additionalProperties:
82103 anyOf:
83104 - type: object
@@ -140,6 +161,15 @@ additionalProperties: · 56 unmodified lines
140161 allOf:
141162 - $ref: pinctrl.yaml#
142163
164+ - if:
165+ properties:
166+ compatible:
167+ contains:
168+ const: renesas,r9a08g046-pinctrl
169+ then:
170+ required:
171+ - renesas,clonech
172+
143173 - if:
144174 properties:
145175 compatible:
@@ -152,10 +182,14 @@ allOf: · 6 unmodified lines
152182 properties:
153183 resets:
154184 maxItems: 2
185+ reset-names:
186+ maxItems: 2
155187 else:
156188 properties:
157189 resets:
158190 minItems: 3
191+ reset-names:
192+ minItems: 3
159193
160194 required:
161195 - compatible
@@ -187,6 +221,7 @@ examples: · 25 unmodified lines
187221 resets = <&cpg R9A07G044_GPIO_RSTN>,
188222 <&cpg R9A07G044_GPIO_PORT_RESETN>,
189223 <&cpg R9A07G044_GPIO_SPARE_RESETN>;
224+ reset-names = "rstn", "port", "spare";
190225 power-domains = <&cpg>;
191226
192227 scif0_pins: serial0 {
Documentation/devicetree/bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml+130−0
@@ -0,0 +1,130 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/pinctrl/ultrarisc,dp1000-pinctrl.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: UltraRISC DP1000 Pin Controller
8+
9+maintainers:
10+ - Jia Wang <wangjia@ultrarisc.com>
11+
12+description: |
13+ UltraRISC RISC-V SoC DP1000 pin controller.
14+ The controller manages ports A, B, C, D and LPC. Ports A-D default to
15+ GPIO and provide additional SPI, UART, I2C, and PWM mux functions.
16+ LPC pins default to the LPC interface and can be muxed to eSPI.
17+ All pins also support pin configuration, including drive strength,
18+ pull-up, and pull-down settings.
19+
20+properties:
21+ compatible:
22+ const: ultrarisc,dp1000-pinctrl
23+
24+ reg:

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drivers/accel/amdxdna/aie2_pm.c+15−7

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drivers/accel/amdxdna/aie2_solver.c+9−1

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drivers/accel/amdxdna/aie4_ctx.c+333−0

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drivers/accel/amdxdna/aie4_host_queue.h+24−0

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drivers/accel/amdxdna/aie4_message.c+83−0

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drivers/accel/amdxdna/aie4_msg_priv.h+147−0

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drivers/accel/amdxdna/aie4_pci.c+667−0

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drivers/accel/amdxdna/aie4_sriov.c+88−0

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drivers/accel/amdxdna/aie_psp.c+235−0

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drivers/accel/amdxdna/amdxdna_cbuf.c+280−0

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drivers/accel/amdxdna/amdxdna_ctx.c+121−4

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drivers/accel/amdxdna/amdxdna_ctx.h+8−3

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drivers/accel/amdxdna/amdxdna_debugfs.c+129−0

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drivers/accel/amdxdna/amdxdna_gem.c+343−97

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drivers/accel/amdxdna/amdxdna_gem.h+15−3

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drivers/accel/amdxdna/amdxdna_iommu.c+80−39

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drivers/accel/amdxdna/amdxdna_mailbox.c+25−5

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drivers/accel/amdxdna/amdxdna_pci_drv.c+159−53

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drivers/accel/amdxdna/amdxdna_pci_drv.h+33−4

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drivers/accel/amdxdna/amdxdna_sysfs.c+4−1

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drivers/accel/amdxdna/amdxdna_ubuf.c+8−54

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drivers/accel/amdxdna/npu6_regs.c+6−5

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drivers/ata/pata_cmd64x.c+5−6

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drivers/ata/pata_ep93xx.c+6−2

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drivers/ata/pata_imx.c+0−1

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drivers/ata/pata_isapnp.c+2−2

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drivers/ata/pata_jmicron.c+5−2

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drivers/ata/pata_macio.c+6−6

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drivers/ata/pata_ninja32.c+7−7

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drivers/ata/pata_opti.c+3−4

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drivers/ata/pata_pdc2027x.c+22−8

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drivers/ata/pata_pdc202xx_old.c+6−7

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drivers/ata/pata_pxa.c+1−0

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drivers/ata/pata_sch.c+1−1

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drivers/ata/pata_serverworks.c+17−7

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drivers/ata/pata_sis.c+0−1

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drivers/ata/pata_via.c+9−10

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drivers/ata/pdc_adma.c+1−2

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drivers/ata/sata_dwc_460ex.c+1−0

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drivers/ata/sata_fsl.c+1−0

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drivers/ata/sata_gemini.c+1−1

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drivers/ata/sata_inic162x.c+1−0

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drivers/ata/sata_mv.c+18−17

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drivers/ata/sata_nv.c+45−15

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drivers/ata/sata_promise.c+20−19

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drivers/ata/sata_qstor.c+2−2

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drivers/ata/sata_sil.c+7−8

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drivers/ata/sata_sil24.c+13−9

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drivers/ata/sata_sis.c+25−7

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drivers/ata/sata_svw.c+7−8

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drivers/ata/sata_sx4.c+2−2

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drivers/ata/sata_uli.c+3−4

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drivers/ata/sata_via.c+30−9

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drivers/ata/sata_vsc.c+9−5

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drivers/atm/solos-pci.c+2−6

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drivers/auxdisplay/Kconfig+1−1

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drivers/auxdisplay/arm-charlcd.c+0−1

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drivers/auxdisplay/hd44780.c+0−1

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drivers/auxdisplay/lcd2s.c+0−1

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drivers/auxdisplay/line-display.c+1−1

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drivers/auxdisplay/max6959.c+1−5

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drivers/auxdisplay/seg-led-gpio.c+0−1

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drivers/base/base.h+18−18

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drivers/base/bus.c+9−2

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drivers/base/cacheinfo.c+23−0

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drivers/base/core.c+125−59

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drivers/base/cpu.c+2−2

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drivers/base/dd.c+12−15

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drivers/base/devcoredump.c+0−7

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drivers/base/driver.c+2−77

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drivers/base/faux.c+15−17

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drivers/base/firmware_loader/main.c+66−5

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drivers/base/firmware_loader/sysfs_upload.c+3−5

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drivers/base/isa.c+6−6

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drivers/base/memory.c+21−26

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drivers/base/node.c+4−2

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drivers/base/pinctrl.c+1−1

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drivers/base/platform-msi.c+0−4

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drivers/base/platform.c+30−9

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drivers/base/power/main.c+62−5

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drivers/base/power/power.h+7−0

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drivers/base/power/wakeup.c+69−2

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drivers/base/property.c+3−1

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drivers/base/regmap/regcache.c+1−1

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drivers/base/regmap/regmap-i2c.c+1−1

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drivers/base/regmap/regmap.c+3−0

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drivers/base/swnode.c+24−16

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drivers/block/drbd/Makefile+1−0

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drivers/block/drbd/drbd_buildtag.c+1−1

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drivers/block/drbd/drbd_config.hrenamed from include/linux/drbd_config.h+0−0

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drivers/block/drbd/drbd_debugfs.c+1−1

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drivers/block/drbd/drbd_int.h+4−2

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drivers/block/drbd/drbd_main.c+3−3

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drivers/block/drbd/drbd_nl.c+237−179

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drivers/block/drbd/drbd_nl_gen.c+2606−0

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drivers/block/drbd/drbd_nl_gen.h+395−0

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drivers/block/drbd/drbd_proc.c+1−1

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drivers/block/floppy.c+3−3

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drivers/block/loop.c+10−14

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drivers/block/mtip32xx/mtip32xx.c+16−3

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drivers/block/n64cart.c+2−1

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drivers/block/nbd.c+38−1

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drivers/block/rbd.c+18−34

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drivers/block/ublk_drv.c+85−89

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drivers/block/virtio_blk.c+2−0

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drivers/block/zram/zram_drv.c+15−6

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drivers/bluetooth/Kconfig+1−41

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drivers/bluetooth/Makefile+0−3

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drivers/bluetooth/bluecard_cs.c+0−908

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drivers/bluetooth/bt3c_cs.c+0−749

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drivers/bluetooth/btintel.c+6−4

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drivers/bluetooth/btintel.h+9−0

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drivers/bluetooth/btintel_pcie.c+457−65

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drivers/bluetooth/btintel_pcie.h+25−4

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drivers/bluetooth/btmtk.c+41−4

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drivers/bluetooth/btmtk.h+7−0

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drivers/bluetooth/btmtksdio.c+1−1

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drivers/bluetooth/btqca.c+2−0

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drivers/bluetooth/btrsi.c+1−11

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drivers/bluetooth/btrtl.c+13−0

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drivers/bluetooth/btusb.c+81−21

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drivers/bluetooth/dtl1_cs.c+0−614

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drivers/bluetooth/hci_h5.c+1−1

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drivers/bluetooth/hci_ldisc.c+40−8

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drivers/bluetooth/hci_qca.c+25−24

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drivers/bluetooth/hci_vhci.c+10−0

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drivers/bus/Kconfig+1−1

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drivers/bus/fsl-mc/dprc-driver.c+5−9

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drivers/bus/fsl-mc/fsl-mc-bus.c+47−3

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drivers/bus/fsl-mc/fsl-mc-msi.c+25−141

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drivers/bus/fsl-mc/fsl-mc-private.h+1−1

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drivers/bus/imx-weim.c+0−6

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drivers/bus/mhi/ep/main.c+7−5

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drivers/bus/mhi/host/init.c+0−1

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drivers/bus/mhi/host/pci_generic.c+25−11

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drivers/bus/sunxi-rsb.c+3−0

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drivers/bus/tegra-aconnect.c+6−8

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drivers/cache/hisi_soc_hha.c+0−1

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drivers/cache/sifive_ccache.c+2−0

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drivers/cdx/cdx.c+5−35

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drivers/cdx/cdx_msi.c+5−5

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drivers/cdx/controller/cdx_controller.c+0−1

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drivers/char/Kconfig+0−26

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drivers/char/Makefile+0−2

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drivers/char/agp/amd64-agp.c+1−1

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drivers/char/agp/efficeon-agp.c+1−0

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drivers/char/applicom.c+0−857

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drivers/char/applicom.h+0−86

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drivers/char/dtlk.c+0−663

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drivers/char/hpet.c+5−1

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drivers/char/hw_random/Kconfig+21−0

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drivers/char/hw_random/Makefile+2−0

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drivers/char/hw_random/airoha-trng.c+0−1

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drivers/char/hw_random/amd-rng.c+3−3

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drivers/char/hw_random/atmel-rng.c+0−1

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drivers/char/hw_random/ba431-rng.c+0−1

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drivers/char/hw_random/bcm74110-rng.c+0−1

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drivers/char/hw_random/cavium-rng.c+2−2

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drivers/char/hw_random/core.c+11−19

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drivers/char/hw_random/exynos-trng.c+0−1

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drivers/char/hw_random/geode-rng.c+2−2

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drivers/char/hw_random/hisi-trng-v2.c+98−0

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drivers/char/hw_random/histb-rng.c+0−1

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drivers/char/hw_random/imx-rngc.c+0−1

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drivers/char/hw_random/ingenic-trng.c+0−1

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drivers/char/hw_random/iproc-rng200.c+0−1

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drivers/char/hw_random/jh7110-trng.c+8−5

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drivers/char/hw_random/mtk-rng.c+106−21

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drivers/char/hw_random/pasemi-rng.c+0−1

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drivers/char/hw_random/pic32-rng.c+0−1

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drivers/char/hw_random/powernv-rng.c+0−1

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drivers/char/hw_random/s390-trng.c+3−2

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drivers/char/hw_random/virtio-rng.c+21−2

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drivers/char/hw_random/xgene-rng.c+0−1

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drivers/char/hw_random/xilinx-trng.crenamed from drivers/crypto/xilinx/xilinx-trng.c+23−113

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drivers/char/hw_random/xiphera-trng.c+0−1

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drivers/char/ipmi/ipmb_dev_int.c+2−2

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drivers/char/ipmi/ipmi_ipmb.c+2−2

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drivers/char/ipmi/ipmi_kcs_sm.c+1−1

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drivers/char/ipmi/ipmi_msghandler.c+12−12

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drivers/char/ipmi/ipmi_si_platform.c+7−4

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drivers/char/ipmi/ipmi_ssif.c+2−2

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drivers/char/ipmi/ssif_bmc.c+1−1

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drivers/char/mem.c+6−19

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drivers/char/nvram.c+3−13

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drivers/char/sonypi.c+8−3

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drivers/char/tlclk.c+4−0

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drivers/char/tpm/eventlog/tpm1.c+2−2

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drivers/char/tpm/tpm2-cmd.c+3−3

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drivers/char/tpm/tpm2-sessions.c+41−15

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drivers/char/tpm/tpm_crb.c+5−1

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drivers/char/tpm/tpm_crb_ffa.c+3−15

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drivers/char/tpm/tpm_svsm.c+1−1

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drivers/char/tpm/tpm_tis_core.c+41−22

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drivers/char/tpm/tpm_tis_core.h+2−1

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drivers/char/virtio_console.c+31−21

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drivers/clk/Kconfig+6−0

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drivers/clk/Makefile+2−1

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drivers/clk/aspeed/clk-ast2600.c+0−1

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drivers/clk/aspeed/clk-ast2700.c+0−1

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drivers/clk/at91/pmc.c+1−1

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drivers/clk/at91/sam9x7.c+10−11

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drivers/clk/at91/sama7d65.c+1−0

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drivers/clk/bcm/clk-iproc-asiu.c+10−17

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drivers/clk/clk-axi-clkgen.c+4−2

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drivers/clk/clk-bm1880.c+0−1

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drivers/clk/clk-bulk.c+8−6

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drivers/clk/clk-cdce706.c+0−1

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drivers/clk/clk-eyeq.c+0−1

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drivers/clk/clk-k230.c+2452−0

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drivers/clk/clk-max77686.c+13−19

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drivers/clk/clk-renesas-pcie.c+0−1

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drivers/clk/clk-scmi.c+8−40

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drivers/clk/clk-scpi.c+1−1

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drivers/clk/clk-si521xx.c+0−1

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drivers/clk/clk-versaclock5.c+0−1

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drivers/clk/hisilicon/clk.c+3−1

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drivers/clk/hisilicon/clkdivider-hi6220.c+9−17

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drivers/clk/imx/clk-imx8mp-audiomix.c+0−1

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drivers/clk/keystone/sci-clk.c+46−9

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drivers/clk/mediatek/clk-mt2701-g3d.c+0−1

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drivers/clk/mediatek/clk-mt2701.c+0−1

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drivers/clk/mediatek/clk-mt2712.c+0−1

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drivers/clk/mediatek/clk-mt6765.c+0−1

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drivers/clk/mediatek/clk-mt6779-aud.c+0−1

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drivers/clk/mediatek/clk-mt7622-eth.c+0−1

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drivers/clk/mediatek/clk-mt7622-hif.c+0−1

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drivers/clk/mediatek/clk-mt7622.c+0−1

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drivers/clk/mediatek/clk-mt7629-hif.c+0−1

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drivers/clk/mediatek/clk-mt7981-apmixed.c+0−1

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drivers/clk/mediatek/clk-mt7981-eth.c+0−1

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drivers/clk/mediatek/clk-mt7981-infracfg.c+0−1

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drivers/clk/mediatek/clk-mt7981-topckgen.c+0−1

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drivers/clk/mediatek/clk-mt7986-apmixed.c+0−1

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drivers/clk/mediatek/clk-mt7986-eth.c+0−1

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drivers/clk/mediatek/clk-mt7986-infracfg.c+0−1

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drivers/clk/mediatek/clk-mt7986-topckgen.c+0−1

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drivers/clk/mediatek/clk-mt7988-infracfg.c+38−42

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drivers/clk/mediatek/clk-mt8167-aud.c+0−1

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drivers/clk/mediatek/clk-mt8167-img.c+0−1

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drivers/clk/mediatek/clk-mt8167-mfgcfg.c+0−1

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drivers/clk/mediatek/clk-mt8167-mm.c+0−1

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drivers/clk/mediatek/clk-mt8167-vdec.c+0−1

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drivers/clk/mediatek/clk-mt8173-mm.c+0−1

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drivers/clk/mediatek/clk-mt8183.c+0−1

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drivers/clk/mediatek/clk-mt8188-adsp_audio26m.c+0−1

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drivers/clk/mediatek/clk-mt8188-apmixedsys.c+0−1

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drivers/clk/mediatek/clk-mt8188-imp_iic_wrap.c+0−1

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drivers/clk/mediatek/clk-mt8188-topckgen.c+0−1

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drivers/clk/mediatek/clk-mt8188-vdo0.c+0−1

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drivers/clk/mediatek/clk-mt8188-vdo1.c+0−1

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drivers/clk/mediatek/clk-mt8188-venc.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8188-wpe.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8192-cam.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8192-img.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8192-imp_iic_wrap.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8192-ipe.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8192-mdp.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8192-mfg.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8192-msdc.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8192-scp_adsp.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8192-vdec.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8192-venc.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8192.c+2−3

This diff is large: its 19 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8195-apmixedsys.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8195-topckgen.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8365.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8516-aud.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/mediatek/clk-mux.h+5−0

This diff is large: its 12 lines aren’t shown here.

drivers/clk/meson/a1-peripherals.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/meson/a1-pll.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/meson/axg.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/meson/gxbb.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/microchip/Makefile+1−1

This diff is large: its 7 lines aren’t shown here.

drivers/clk/microchip/clk-mpfs-ccc.c+4−11

This diff is large: its 45 lines aren’t shown here.

drivers/clk/microchip/clk-pic32.crenamed from drivers/clk/microchip/clk-core.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/microchip/clk-pic32.hrenamed from drivers/clk/microchip/clk-core.h+0−0

File renamed without changes.

drivers/clk/microchip/clk-pic32mzda.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/mmp/clk-pxa1908-apbc.c+44−14

This diff is large: its 88 lines aren’t shown here.

drivers/clk/mmp/clk-pxa1908-apbcp.c+28−3

This diff is large: its 59 lines aren’t shown here.

drivers/clk/mvebu/common.c+8−13

This diff is large: its 53 lines aren’t shown here.

drivers/clk/nxp/clk-lpc18xx-ccu.c+5−9

This diff is large: its 41 lines aren’t shown here.

drivers/clk/qcom/Kconfig+48−0

This diff is large: its 76 lines aren’t shown here.

drivers/clk/qcom/Makefile+6−1

This diff is large: its 36 lines aren’t shown here.

drivers/clk/qcom/a53-pll.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/qcom/cambistmclkcc-kaanapali.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/cambistmclkcc-sm8750.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-kaanapali.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-milos.c+7−1

This diff is large: its 29 lines aren’t shown here.

drivers/clk/qcom/camcc-qcs615.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sa8775p.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sc7180.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sc7280.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sc8180x.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sc8280xp.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sdm845.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sm4450.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sm6350.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sm7150.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sm8150.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sm8250.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sm8450.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sm8550.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sm8650.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sm8750.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-x1e80100.c+64−1

This diff is large: its 93 lines aren’t shown here.

drivers/clk/qcom/camcc-x1p42100.c+2222−0

This diff is large: its 2223 lines aren’t shown here.

drivers/clk/qcom/clk-alpha-pll.h+6−0

This diff is large: its 37 lines aren’t shown here.

drivers/clk/qcom/clk-regmap-phy-mux.c+35−17

This diff is large: its 84 lines aren’t shown here.

drivers/clk/qcom/clk-rpmh.c+34−7

This diff is large: its 98 lines aren’t shown here.

drivers/clk/qcom/dispcc-eliza.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-glymur.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-kaanapali.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-milos.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-qcm2290.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-qcs615.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sc7180.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sc7280.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sc8280xp.c+2−3

This diff is large: its 26 lines aren’t shown here.

drivers/clk/qcom/dispcc-sdm845.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm4450.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm6115.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm6125.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm6350.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm6375.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm7150.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm8250.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm8450.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm8550.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm8750.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-x1e80100.c+2−3

This diff is large: its 26 lines aren’t shown here.

drivers/clk/qcom/dispcc0-sa8775p.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc1-sa8775p.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/ecpricc-qdu1000.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-eliza.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-glymur.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-hawi.c+3656−0

This diff is large: its 3657 lines aren’t shown here.

drivers/clk/qcom/gcc-ipq5018.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-ipq5332.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-ipq9650.c+3445−0

This diff is large: its 3446 lines aren’t shown here.

drivers/clk/qcom/gcc-kaanapali.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-milos.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-nord.c+1−2

This diff is large: its 17 lines aren’t shown here.

drivers/clk/qcom/gcc-qcs615.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-qcs8300.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-sa8775p.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-sdx75.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-sm4450.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-sm7150.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-sm8650.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-sm8750.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-x1e80100.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gdsc.c+33−0

This diff is large: its 68 lines aren’t shown here.

drivers/clk/qcom/gdsc.h+5−0

This diff is large: its 19 lines aren’t shown here.

drivers/clk/qcom/gpucc-glymur.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-kaanapali.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-milos.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-msm8998.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-qcm2290.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-qcs615.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sa8775p.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sar2130p.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sc7180.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sc7280.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sc8280xp.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sdm660.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sdm845.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sm4450.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sm6115.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sm6125.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sm6350.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sm6375.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sm8150.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sm8250.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sm8350.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sm8450.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sm8550.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sm8650.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-sm8750.c+2−3

This diff is large: its 26 lines aren’t shown here.

drivers/clk/qcom/gpucc-x1e80100.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gpucc-x1p42100.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gxclkctl-kaanapali.c+1−1

This diff is large: its 16 lines aren’t shown here.

drivers/clk/qcom/ipq-cmn-pll.c+27−4

This diff is large: its 87 lines aren’t shown here.

drivers/clk/qcom/lpasscc-sc8280xp.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/lpasscc-sm6115.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/mmcc-apq8084.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/mmcc-msm8960.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/mmcc-msm8974.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/mmcc-msm8994.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/mmcc-msm8996.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/mmcc-msm8998.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/mmcc-sdm660.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/negcc-nord.c+2−2

This diff is large: its 25 lines aren’t shown here.

drivers/clk/qcom/nwgcc-nord.c+2−3

This diff is large: its 26 lines aren’t shown here.

drivers/clk/qcom/segcc-nord.c+1−2

This diff is large: its 17 lines aren’t shown here.

drivers/clk/qcom/tcsrcc-eliza.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/tcsrcc-glymur.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/tcsrcc-hawi.c+157−0

This diff is large: its 158 lines aren’t shown here.

drivers/clk/qcom/tcsrcc-nord.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/tcsrcc-sm8650.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/tcsrcc-sm8750.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/tcsrcc-x1e80100.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/videocc-glymur.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/videocc-kaanapali.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/videocc-milos.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/videocc-qcs615.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/videocc-sa8775p.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/videocc-sm7150.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/videocc-sm8450.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/videocc-sm8550.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/videocc-sm8750.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/videocc-x1p42100.c+584−0

This diff is large: its 585 lines aren’t shown here.

drivers/clk/renesas/clk-r8a73a4.c+2−0

This diff is large: its 9 lines aren’t shown here.

drivers/clk/renesas/clk-r8a7740.c+2−0

This diff is large: its 9 lines aren’t shown here.

drivers/clk/renesas/clk-vbattb.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/renesas/r8a779g0-cpg-mssr.c+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/clk/renesas/r9a07g043-cpg.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/renesas/r9a07g044-cpg.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/renesas/r9a08g045-cpg.c+1−12

This diff is large: its 34 lines aren’t shown here.

drivers/clk/renesas/r9a08g046-cpg.c+355−0

This diff is large: its 458 lines aren’t shown here.

drivers/clk/renesas/r9a09g011-cpg.c+1−6

This diff is large: its 21 lines aren’t shown here.

drivers/clk/renesas/r9a09g047-cpg.c+84−0

This diff is large: its 166 lines aren’t shown here.

drivers/clk/renesas/r9a09g077-cpg.c+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/clk/renesas/renesas-cpg-mssr.c+3−1

This diff is large: its 18 lines aren’t shown here.

drivers/clk/renesas/rzg2l-cpg.c+75−14

This diff is large: its 151 lines aren’t shown here.

drivers/clk/renesas/rzg2l-cpg.h+11−7

This diff is large: its 49 lines aren’t shown here.

drivers/clk/renesas/rzv2h-cpg.c+181−1

This diff is large: its 217 lines aren’t shown here.

drivers/clk/renesas/rzv2h-cpg.h+12−0

This diff is large: its 47 lines aren’t shown here.

drivers/clk/rockchip/Kconfig+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/rockchip/clk-rk3588.c+16−0

This diff is large: its 70 lines aren’t shown here.

drivers/clk/rockchip/clk.c+21−4

This diff is large: its 39 lines aren’t shown here.

drivers/clk/rockchip/clk.h+3−0

This diff is large: its 10 lines aren’t shown here.

drivers/clk/samsung/Kconfig+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/samsung/clk-acpm.c+4−4

This diff is large: its 22 lines aren’t shown here.

drivers/clk/samsung/clk-exynos-audss.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-exynos-clkout.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-exynos2200.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-exynos3250.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-exynos4.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-exynos4412-isp.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-exynos5-subcmu.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-exynos5250.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-exynos5420.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-exynos5433.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-exynos7870.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-exynos7885.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-exynos850.c+3−3

This diff is large: its 22 lines aren’t shown here.

drivers/clk/samsung/clk-exynos8895.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-exynos990.c+143−165

This diff is large: its 355 lines aren’t shown here.

drivers/clk/samsung/clk-exynosautov9.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-exynosautov920.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-fsd.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-gs101.c+1−2

This diff is large: its 17 lines aren’t shown here.

drivers/clk/samsung/clk-s5pv210-audss.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/socfpga/clk-agilex.c+2−0

This diff is large: its 9 lines aren’t shown here.

drivers/clk/spacemit/ccu-k3.c+20−10

This diff is large: its 52 lines aren’t shown here.

drivers/clk/sprd/ums512-clk.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/starfive/clk-starfive-jh7100-audio.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/starfive/clk-starfive-jh7100.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/tegra/clk-device.c+0−1

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drivers/clk/visconti/pll.c+7−10

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drivers/crypto/marvell/octeontx/otx_cptpf_main.c+1−1

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drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c+2−3

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drivers/crypto/marvell/octeontx/otx_cptvf_main.c+3−3

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drivers/crypto/marvell/octeontx/otx_cptvf_reqmgr.c+2−2

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drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c+1−1

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drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c+4−4

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drivers/crypto/nx/nx.c+2−4

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drivers/crypto/nx/nx.h+1−1

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drivers/crypto/omap-aes.c+22−21

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drivers/crypto/omap-des.c+19−13

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drivers/crypto/omap-sham.c+16−11

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drivers/crypto/qce/core.c+0−1

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drivers/crypto/qcom-rng.c+1−1

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drivers/crypto/starfive/jh7110-cryp.c+6−12

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drivers/crypto/talitos.c+285−294

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drivers/crypto/talitos.h+15−2

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drivers/crypto/tegra/tegra-se-aes.c+18−15

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drivers/crypto/tegra/tegra-se-main.c+2−4

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drivers/crypto/ti/dthev2-common.c+0−1

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drivers/crypto/xilinx/Makefile+0−1

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drivers/crypto/xilinx/zynqmp-aes-gcm.c+0−1

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drivers/cxl/acpi.c+5−5

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drivers/cxl/core/core.h+2−0

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drivers/cxl/core/features.c+1−1

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drivers/cxl/core/memdev.c+16−4

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drivers/cxl/core/pci.c+13−13

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drivers/cxl/core/port.c+6−1

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drivers/cxl/core/ras.c+20−7

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drivers/cxl/core/region.c+210−60

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drivers/cxl/core/trace.h+16−8

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drivers/cxl/mem.c+85−20

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drivers/cxl/pci.c+1−1

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drivers/dax/bus.c+1−1

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drivers/devfreq/devfreq-event.c+13−10

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drivers/devfreq/hisi_uncore_freq.c+0−1

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drivers/devfreq/imx8m-ddrc.c+0−1

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drivers/dma-buf/dma-buf.c+5−1

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drivers/dma-buf/dma-fence-array.c+4−9

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drivers/dma-buf/dma-fence-unwrap.c+4−2

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drivers/dma-buf/dma-heap.c+1−0

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drivers/dma-buf/dma-resv.c+1−2

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drivers/dma-buf/heaps/Kconfig+10−2

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drivers/dma-buf/heaps/cma_heap.c+3−0

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drivers/dma-buf/heaps/system_heap.c+15−6

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drivers/dma-buf/selftest.c+0−167

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drivers/dma-buf/selftests.h+0−16

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drivers/dma-buf/st-dma-fence-chain.c+94−119

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