Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

Conflicts: drivers/net/can/dev.c commit 03f16c5075b2 ("can: dev: can_restart: fix use after free bug") commit 3e77f70e7345 ("can: dev: move driver related infrastructure into separate subdir") Code move. drivers/net/dsa/b53/b53_common.c commit 8e4052c32d6b ("net: dsa: b53: fix an off by one in checking "vlan->vid"") commit b7a9e0da2d1c ("net: switchdev: remove vid_begin -> vid_end range from VLAN objects") Field rename.

Jakub Kicinski committed 5 years ago

Commit 0fe2f272 parents 7b8fc01 75439bc285 files · +3212 −1446Browse files

Unified · Split

285 files

.mailmap +2 −0
Documentation/admin-guide/kernel-parameters.txt +4 −0
Documentation/firmware-guide/acpi/apei/einj.rst +2 −2
Documentation/networking/tls-offload.rst +3 −0
MAINTAINERS +5 −4
Makefile +1 −1
arch/arm/xen/enlighten.c +1 −1
arch/arm64/Kconfig +0 −2
arch/arm64/include/asm/atomic.h +5 −5
arch/arm64/include/asm/processor.h +1 −2
arch/arm64/kernel/asm-offsets.c +1 −1
arch/arm64/kernel/entry-ftrace.S +6 −6
arch/arm64/kernel/entry.S +7 −7
arch/arm64/kernel/perf_event.c +2 −39
arch/arm64/kernel/probes/kprobes_trampoline.S +3 −3
arch/arm64/kernel/signal.c +0 −7
arch/arm64/kernel/syscall.c +2 −8
arch/arm64/mm/init.c +18 −15
arch/ia64/include/asm/sparsemem.h +1 −0
arch/mips/boot/compressed/decompress.c +2 −1
arch/mips/cavium-octeon/octeon-irq.c +1 −1
arch/mips/kernel/binfmt_elfn32.c +7 −0
arch/mips/kernel/binfmt_elfo32.c +7 −0
arch/mips/kernel/relocate.c +8 −2
arch/powerpc/include/asm/vdso/gettimeofday.h +15 −1
arch/powerpc/kernel/vmlinux.lds.S +8 −0
arch/riscv/Kconfig +4 −2
arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts +2 −0
arch/riscv/configs/defconfig +2 −0
arch/riscv/include/asm/pgtable.h +0 −1
arch/riscv/include/asm/vdso.h +1 −1
arch/riscv/kernel/cacheinfo.c +10 −1
arch/riscv/kernel/entry.S +13 −11
arch/riscv/kernel/setup.c +13 −11
arch/riscv/kernel/stacktrace.c +2 −3
arch/riscv/kernel/time.c +3 −0
arch/riscv/kernel/vdso.c +1 −1
arch/riscv/mm/init.c +14 −2
arch/riscv/mm/kasan_init.c +2 −2
arch/x86/hyperv/hv_init.c +26 −3
arch/x86/xen/enlighten_hvm.c +12 −3
arch/x86/xen/smp_hvm.c +19 −10
crypto/asymmetric_keys/public_key.c +2 −1
crypto/xor.c +2 −0
drivers/acpi/internal.h +1 −1
drivers/acpi/scan.c +14 −1
drivers/crypto/Kconfig +1 −0
drivers/dma-buf/heaps/cma_heap.c +3 −0
drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c +36 −17
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +1 −1
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +2 −0
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +46 −2
drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h +1 −1
drivers/gpu/drm/amd/amdgpu/soc15.c +2 −1
drivers/gpu/drm/amd/amdkfd/kfd_crat.c +7 −4
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +9 −133
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h +0 −38
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c +1 −53
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h +1 −4
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +7 −1
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c +1 −1
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c +2 −2
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c +1 −0
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c +6 −5
drivers/gpu/drm/drm_plane.c +8 −1
drivers/gpu/drm/i915/Makefile +1 −0
drivers/gpu/drm/i915/display/icl_dsi.c +0 −4
drivers/gpu/drm/i915/display/intel_panel.c +5 −4
drivers/gpu/drm/i915/display/vlv_dsi.c +13 −3
drivers/gpu/drm/i915/gt/gen7_renderclear.c +94 −63
drivers/gpu/drm/i915/gt/intel_ring_submission.c +4 −2
drivers/gpu/drm/i915/gvt/display.c +57 −24
drivers/gpu/drm/i915/gvt/vgpu.c +2 −3
drivers/gpu/drm/i915/i915_drv.c +4 −0
drivers/gpu/drm/i915/i915_mitigations.c +146 −0
drivers/gpu/drm/i915/i915_mitigations.h +13 −0
drivers/gpu/drm/nouveau/dispnv50/Kbuild +1 −0
drivers/gpu/drm/nouveau/dispnv50/core.c +1 −0
drivers/gpu/drm/nouveau/dispnv50/curs.c +1 −0
drivers/gpu/drm/nouveau/dispnv50/disp.c +2 −2
drivers/gpu/drm/nouveau/dispnv50/disp.h +1 −1
drivers/gpu/drm/nouveau/dispnv50/wimm.c +1 −0
drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c +1 −1
drivers/gpu/drm/nouveau/dispnv50/wndw.c +1 −0
drivers/gpu/drm/nouveau/dispnv50/wndw.h +8 −0
drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c +5 −5
drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c +106 −0
drivers/gpu/drm/nouveau/include/nvif/cl0080.h +1 −0
drivers/gpu/drm/nouveau/include/nvif/class.h +5 −0
drivers/gpu/drm/nouveau/include/nvkm/core/device.h +1 −0
drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h +1 −0
drivers/gpu/drm/nouveau/include/nvkm/subdev/devinit.h +1 −0
drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h +2 −0
drivers/gpu/drm/nouveau/include/nvkm/subdev/gpio.h +1 −0
drivers/gpu/drm/nouveau/include/nvkm/subdev/i2c.h +1 −0
drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h +1 −0
drivers/gpu/drm/nouveau/nouveau_backlight.c +1 −0
drivers/gpu/drm/nouveau/nvif/disp.c +1 −0
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +78 −9
drivers/gpu/drm/nouveau/nvkm/engine/device/user.c +1 −0
drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild +3 −0
drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c +27 −6
drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.c +46 −0
drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h +4 −0
drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h +2 −0
drivers/gpu/drm/nouveau/nvkm/engine/disp/rootga102.c +52 −0
drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.h +1 −0
drivers/gpu/drm/nouveau/nvkm/engine/disp/sorga102.c +140 −0
drivers/gpu/drm/nouveau/nvkm/engine/disp/sortu102.c +1 −1
drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c +1 −1
drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c +1 −1
drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowramin.c +3 −0
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/Kbuild +1 −0
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ga100.c +76 −0
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/priv.h +1 −0
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.c +1 −1
drivers/gpu/drm/nouveau/nvkm/subdev/fb/Kbuild +3 −0
drivers/gpu/drm/nouveau/nvkm/subdev/fb/ga100.c +40 −0
drivers/gpu/drm/nouveau/nvkm/subdev/fb/ga102.c +40 −0
drivers/gpu/drm/nouveau/nvkm/subdev/fb/gv100.c +1 −1
drivers/gpu/drm/nouveau/nvkm/subdev/fb/priv.h +2 −0
drivers/gpu/drm/nouveau/nvkm/subdev/fb/ram.h +1 −0
drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramga102.c +40 −0
drivers/gpu/drm/nouveau/nvkm/subdev/gpio/Kbuild +1 −0
drivers/gpu/drm/nouveau/nvkm/subdev/gpio/ga102.c +118 −0
drivers/gpu/drm/nouveau/nvkm/subdev/i2c/Kbuild +1 −0
drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.h +7 −0
drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxg94.c +7 −3
drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c +11 −6
drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gk110.c +45 −0
drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gm200.c +7 −0
drivers/gpu/drm/nouveau/nvkm/subdev/i2c/pad.h +1 −1
drivers/gpu/drm/nouveau/nvkm/subdev/i2c/priv.h +4 −0
drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c +7 −3
drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c +7 −3
drivers/gpu/drm/nouveau/nvkm/subdev/mc/Kbuild +1 −0
drivers/gpu/drm/nouveau/nvkm/subdev/mc/ga100.c +74 −0
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c +3 −3
drivers/gpu/drm/ttm/ttm_pool.c +11 −11
drivers/infiniband/core/cma_configfs.c +3 −1
drivers/infiniband/core/restrack.c +1 −0
drivers/infiniband/core/ucma.c +72 −63
drivers/infiniband/core/umem.c +1 −1
drivers/infiniband/hw/mlx5/main.c +2 −2
drivers/infiniband/hw/ocrdma/ocrdma_verbs.c +1 −1
drivers/infiniband/hw/usnic/usnic_ib_verbs.c +3 −0
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +2 −0
drivers/iommu/intel/iommu.c +0 −1
drivers/iommu/intel/svm.c +20 −2
drivers/md/Kconfig +2 −0
drivers/md/dm-bufio.c +6 −0
drivers/md/dm-crypt.c +152 −18
drivers/md/dm-integrity.c +50 −12
drivers/md/dm-raid.c +3 −3
drivers/md/dm-snap.c +24 −0
drivers/md/dm.c +1 −1
drivers/net/can/dev/dev.c +2 −2
drivers/net/can/usb/peak_usb/pcan_usb_fd.c +4 −4
drivers/net/can/vxcan.c +4 −2
drivers/net/dsa/b53/b53_common.c +1 −1
drivers/net/dsa/mv88e6xxx/global1_vtu.c +4 −0
drivers/net/ethernet/broadcom/bcmsysport.c +4 −2
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c +6 −0
drivers/net/ethernet/mscc/ocelot.c +18 −5
drivers/net/ethernet/mscc/ocelot_net.c +1 −3
drivers/net/ethernet/renesas/sh_eth.c +28 −2
drivers/net/mdio/mdio-bitbang.c +4 −2
drivers/net/usb/cdc_ncm.c +11 −1
drivers/nvme/host/core.c +8 −3
drivers/nvme/host/tcp.c +2 −2
drivers/nvme/target/rdma.c +8 −8
drivers/perf/arm_pmu.c +0 −5
drivers/scsi/mpt3sas/Kconfig +1 −1
drivers/scsi/qedi/qedi_main.c +2 −2
drivers/scsi/scsi_debug.c +3 −2
drivers/scsi/sd.c +3 −3
drivers/scsi/ufs/ufshcd.c +10 −14
drivers/spi/spi-cadence.c +4 −2
drivers/spi/spi-fsl-spi.c +2 −3
drivers/tty/serial/sifive.c +1 −0
drivers/xen/events/events_base.c +0 −10
drivers/xen/platform-pci.c +7 −1
drivers/xen/privcmd.c +19 −6
drivers/xen/xenbus/xenbus.h +1 −0
drivers/xen/xenbus/xenbus_comms.c +0 −8
drivers/xen/xenbus/xenbus_probe.c +67 −14
fs/cachefiles/rdwr.c +0 −2
fs/cifs/connect.c +1 −1
fs/cifs/dfs_cache.c +2 −1
fs/cifs/fs_context.c +1 −3
fs/cifs/smb2pdu.c +1 −1
fs/cifs/smb2pdu.h +1 −1
fs/ext4/ext4_jbd2.c +0 −17
fs/ext4/ext4_jbd2.h +0 −5
fs/ext4/fast_commit.c +18 −17
fs/ext4/file.c +5 −2
fs/ext4/inode.c +5 −1
fs/ext4/ioctl.c +3 −0
fs/ext4/namei.c +17 −10
fs/ext4/resize.c +16 −4
fs/ext4/super.c +118 −72
fs/ext4/xattr.c +4 −1
fs/io_uring.c +41 −5
fs/namespace.c +5 −2
fs/nfsd/nfs3xdr.c +6 −1
fs/proc/task_mmu.c +30 −23
include/asm-generic/bitops/atomic.h +3 −3
include/linux/compiler-gcc.h +6 −0
include/linux/dm-bufio.h +1 −0
include/linux/kasan.h +5 −1
include/linux/mdio-bitbang.h +3 −0
include/linux/memcontrol.h +1 −1
include/linux/perf/arm_pmu.h +0 −2
include/linux/usb/usbnet.h +2 −0
include/net/cfg80211.h +4 −1
include/net/inet_connection_sock.h +3 −0
include/net/mac80211.h +1 −0
include/net/sock.h +12 −5
include/trace/events/sunrpc.h +53 −6
include/xen/xenbus.h +1 −1
kernel/bpf/bpf_inode_storage.c +6 −3
kernel/bpf/bpf_task_storage.c +4 −1
kernel/bpf/btf.c +1 −1
kernel/bpf/cgroup.c +3 −2
kernel/bpf/helpers.c +1 −1
kernel/bpf/syscall.c +4 −2
kernel/bpf/verifier.c +5 −3
kernel/signal.c +3 −0
lib/iov_iter.c +1 −1
mm/hugetlb.c +1 −1
mm/kasan/init.c +2 −1
mm/memory-failure.c +1 −1
mm/mempolicy.c +1 −1
mm/page_alloc.c +16 −15
mm/process_vm_access.c +1 −0
mm/slub.c +1 −1
mm/vmalloc.c +3 −1
mm/vmscan.c +2 −0
net/bpf/test_run.c +2 −1
net/core/dev.c +5 −0
net/core/devlink.c +2 −2
net/core/gen_estimator.c +7 −4
net/core/skbuff.c +5 −1
net/ipv4/inet_connection_sock.c +1 −0
net/ipv4/netfilter/ipt_rpfilter.c +1 −1
net/ipv4/tcp.c +1 −0
net/ipv4/tcp_input.c +3 −3
net/ipv4/tcp_ipv4.c +15 −14
net/ipv4/tcp_output.c +1 −0
net/ipv4/tcp_timer.c +15 −21
net/ipv4/udp.c +2 −1
net/ipv6/addrconf.c +2 −1
net/mac80211/debugfs.c +20 −24
net/mac80211/rx.c +2 −0
net/mac80211/tx.c +17 −14
net/nfc/nci/core.c +1 −1
net/sched/cls_flower.c +13 −9
net/sched/cls_tcindex.c +6 −2
net/sched/sch_api.c +2 −1
net/sunrpc/svc_xprt.c +2 −2
net/wireless/reg.c +10 −1
net/xdp/xsk.c +2 −2
security/lsm_audit.c +5 −2
tools/bootconfig/scripts/bconf2ftrace.sh +1 −0
tools/bootconfig/scripts/ftrace2bconf.sh +4 −0
tools/include/linux/build_bug.h +0 −5
tools/include/uapi/linux/kvm.h +2 −0
tools/lib/bpf/btf.c +0 −5
tools/lib/perf/tests/test-cpumap.c +1 −1
tools/lib/perf/tests/test-evlist.c +4 −3
tools/lib/perf/tests/test-evsel.c +1 −1
tools/lib/perf/tests/test-threadmap.c +1 −1
tools/perf/examples/bpf/5sec.c +1 −1
tools/perf/tests/shell/stat+shadow_stat.sh +14 −16
tools/perf/util/header.c +8 −0
tools/perf/util/machine.c +2 −2
tools/perf/util/session.c +1 −1
tools/perf/util/stat-shadow.c +189 −177
tools/testing/selftests/arm64/fp/fpsimd-test.S +1 −1
tools/testing/selftests/arm64/fp/sve-test.S +1 −1
tools/testing/selftests/bpf/prog_tests/test_local_storage.c +26 −70
tools/testing/selftests/bpf/progs/local_storage.c +35 −27
tools/testing/selftests/bpf/test_verifier.c +11 −1
tools/testing/selftests/bpf/verifier/spill_fill.c +30 −0
tools/testing/selftests/net/fib_tests.sh +0 −1

.mailmap+2−0

@@ -55,6 +55,8 @@ Bart Van Assche <bvanassche@acm.org> <bart.vanassche@wdc.com> · 54 unmodified lines
55	55	Ben Gardner <bgardner@wabtec.com>
56	56	Ben M Cahill <ben.m.cahill@intel.com>
57	57	Björn Steinbrink <B.Steinbrink@gmx.de>
	58	+Björn Töpel <bjorn@kernel.org> <bjorn.topel@gmail.com>
	59	+Björn Töpel <bjorn@kernel.org> <bjorn.topel@intel.com>
58	60	Boris Brezillon <bbrezillon@kernel.org> <b.brezillon.dev@gmail.com>
59	61	Boris Brezillon <bbrezillon@kernel.org> <b.brezillon@overkiz.com>
60	62	Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@bootlin.com>

Documentation/admin-guide/kernel-parameters.txt+4−0

@@ -5972,6 +5972,10 @@ · 5971 unmodified lines
5972	5972	This option is obsoleted by the "nopv" option, which
5973	5973	has equivalent effect for XEN platform.
5974	5974
	5975	+ xen_no_vector_callback
	5976	+ [KNL,X86,XEN] Disable the vector callback for Xen
	5977	+ event channel interrupts.
	5978	+
5975	5979	xen_scrub_pages= [XEN]
5976	5980	Boolean option to control scrubbing pages before giving them back
5977	5981	to Xen, for use by other domains. Can be also changed at runtime

Documentation/firmware-guide/acpi/apei/einj.rst+2−2

@@ -50,8 +50,8 @@ The following files belong to it: · 49 unmodified lines
50	50	0x00000010 Memory Uncorrectable non-fatal
51	51	0x00000020 Memory Uncorrectable fatal
52	52	0x00000040 PCI Express Correctable
53		− 0x00000080 PCI Express Uncorrectable fatal
54		− 0x00000100 PCI Express Uncorrectable non-fatal
	53	+ 0x00000080 PCI Express Uncorrectable non-fatal
	54	+ 0x00000100 PCI Express Uncorrectable fatal
55	55	0x00000200 Platform Correctable
56	56	0x00000400 Platform Uncorrectable non-fatal
57	57	0x00000800 Platform Uncorrectable fatal

Documentation/networking/tls-offload.rst+3−0

@@ -534,3 +534,6 @@ offload. Hence, TLS TX device feature flag requires TX csum offload being set. · 533 unmodified lines
534	534	Disabling the latter implies clearing the former. Disabling TX checksum offload
535	535	should not affect old connections, and drivers should make sure checksum
536	536	calculation does not break for them.
	537	+Similarly, device-offloaded TLS decryption implies doing RXCSUM. If the user
	538	+does not want to enable RX csum offload, TLS RX device feature is disabled
	539	+as well.

MAINTAINERS+5−4

@@ -906,7 +906,7 @@ AMD KFD · 905 unmodified lines
906	906	M: Felix Kuehling <Felix.Kuehling@amd.com>
907	907	L: amd-gfx@lists.freedesktop.org
908	908	S: Supported
909		−T: git git://people.freedesktop.org/~agd5f/linux
	909	+T: git https://gitlab.freedesktop.org/agd5f/linux.git
910	910	F: drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd*.[ch]
911	911	F: drivers/gpu/drm/amd/amdkfd/
912	912	F: drivers/gpu/drm/amd/include/cik_structs.h
@@ -3334,7 +3334,7 @@ F: arch/riscv/net/ · 2421 unmodified lines
3334	3334	X: arch/riscv/net/bpf_jit_comp64.c
3335	3335
3336	3336	BPF JIT for RISC-V (64-bit)
3337		−M: Björn Töpel <bjorn.topel@gmail.com>
	3337	+M: Björn Töpel <bjorn@kernel.org>
3338	3338	L: netdev@vger.kernel.org
3339	3339	L: bpf@vger.kernel.org
3340	3340	S: Maintained
@@ -14827,7 +14827,7 @@ M: Alex Deucher <alexander.deucher@amd.com> · 11486 unmodified lines
14827	14827	M: Christian König <christian.koenig@amd.com>
14828	14828	L: amd-gfx@lists.freedesktop.org
14829	14829	S: Supported
14830		−T: git git://people.freedesktop.org/~agd5f/linux
	14830	+T: git https://gitlab.freedesktop.org/agd5f/linux.git
14831	14831	F: drivers/gpu/drm/amd/
14832	14832	F: drivers/gpu/drm/radeon/
14833	14833	F: include/uapi/drm/amdgpu_drm.h
@@ -16328,6 +16328,7 @@ M: Pekka Enberg <penberg@kernel.org> · 1494 unmodified lines
16328	16328	M: David Rientjes <rientjes@google.com>
16329	16329	M: Joonsoo Kim <iamjoonsoo.kim@lge.com>
16330	16330	M: Andrew Morton <akpm@linux-foundation.org>
	16331	+M: Vlastimil Babka <vbabka@suse.cz>
16331	16332	L: linux-mm@kvack.org
16332	16333	S: Maintained
16333	16334	F: include/linux/sl?b*.h
@@ -19430,7 +19431,7 @@ F: drivers/net/ethernet///xdp · 3096 unmodified lines
19430	19431	K: (?:\b\|_)xdp(?:\b\|_)
19431	19432
19432	19433	XDP SOCKETS (AF_XDP)
19433		−M: Björn Töpel <bjorn.topel@intel.com>
	19434	+M: Björn Töpel <bjorn@kernel.org>
19434	19435	M: Magnus Karlsson <magnus.karlsson@intel.com>
19435	19436	R: Jonathan Lemon <jonathan.lemon@gmail.com>
19436	19437	L: netdev@vger.kernel.org

Makefile+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2	2	VERSION = 5
3	3	PATCHLEVEL = 11
4	4	SUBLEVEL = 0
5		−EXTRAVERSION = -rc3
	5	+EXTRAVERSION = -rc4
6	6	NAME = Kleptomaniac Octopus
7	7
8	8	# DOCUMENTATION

arch/arm/xen/enlighten.c+1−1

@@ -371,7 +371,7 @@ static int __init xen_guest_init(void) · 370 unmodified lines
371	371	}
372	372	gnttab_init();
373	373	if (!xen_initial_domain())
374		− xenbus_probe(NULL);
	374	+ xenbus_probe();
375	375
376	376	/*
377	377	* Making sure board specific code will not set up ops for

arch/arm64/Kconfig+0−2

@@ -174,8 +174,6 @@ config ARM64 · 173 unmodified lines
174	174	select HAVE_NMI
175	175	select HAVE_PATA_PLATFORM
176	176	select HAVE_PERF_EVENTS
177		− select HAVE_PERF_EVENTS_NMI if ARM64_PSEUDO_NMI && HW_PERF_EVENTS
178		− select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI
179	177	select HAVE_PERF_REGS
180	178	select HAVE_PERF_USER_STACK_DUMP
181	179	select HAVE_REGS_AND_STACK_ACCESS_API

arch/arm64/include/asm/atomic.h+5−5

@@ -17,7 +17,7 @@ · 16 unmodified lines
17	17	#include <asm/lse.h>
18	18
19	19	#define ATOMIC_OP(op) \
20		−static inline void arch_##op(int i, atomic_t *v) \
	20	+static __always_inline void arch_##op(int i, atomic_t *v) \
21	21	{ \
22	22	__lse_ll_sc_body(op, i, v); \
23	23	}
@@ -32,7 +32,7 @@ ATOMIC_OP(atomic_sub) · 8 unmodified lines
32	32	#undef ATOMIC_OP
33	33
34	34	#define ATOMIC_FETCH_OP(name, op) \
35		−static inline int arch_##op##name(int i, atomic_t *v) \
	35	+static __always_inline int arch_##op##name(int i, atomic_t *v) \
36	36	{ \
37	37	return __lse_ll_sc_body(op##name, i, v); \
38	38	}
@@ -56,7 +56,7 @@ ATOMIC_FETCH_OPS(atomic_sub_return) · 17 unmodified lines
56	56	#undef ATOMIC_FETCH_OPS
57	57
58	58	#define ATOMIC64_OP(op) \
59		−static inline void arch_##op(long i, atomic64_t *v) \
	59	+static __always_inline void arch_##op(long i, atomic64_t *v) \
60	60	{ \
61	61	__lse_ll_sc_body(op, i, v); \
62	62	}
@@ -71,7 +71,7 @@ ATOMIC64_OP(atomic64_sub) · 8 unmodified lines
71	71	#undef ATOMIC64_OP
72	72
73	73	#define ATOMIC64_FETCH_OP(name, op) \
74		−static inline long arch_##op##name(long i, atomic64_t *v) \
	74	+static __always_inline long arch_##op##name(long i, atomic64_t *v) \
75	75	{ \
76	76	return __lse_ll_sc_body(op##name, i, v); \
77	77	}
@@ -94,7 +94,7 @@ ATOMIC64_FETCH_OPS(atomic64_sub_return) · 16 unmodified lines
94	94	#undef ATOMIC64_FETCH_OP
95	95	#undef ATOMIC64_FETCH_OPS
96	96
97		−static inline long arch_atomic64_dec_if_positive(atomic64_t *v)
	97	+static __always_inline long arch_atomic64_dec_if_positive(atomic64_t *v)
98	98	{
99	99	return __lse_ll_sc_body(atomic64_dec_if_positive, v);
100	100	}

arch/arm64/include/asm/processor.h+1−2

@@ -94,8 +94,7 @@ · 93 unmodified lines
94	94	#endif /* CONFIG_ARM64_FORCE_52BIT */
95	95
96	96	extern phys_addr_t arm64_dma_phys_limit;
97		−extern phys_addr_t arm64_dma32_phys_limit;
98		−#define ARCH_LOW_ADDRESS_LIMIT ((arm64_dma_phys_limit ? : arm64_dma32_phys_limit) - 1)
	97	+#define ARCH_LOW_ADDRESS_LIMIT (arm64_dma_phys_limit - 1)
99	98
100	99	struct debug_info {
101	100	#ifdef CONFIG_HAVE_HW_BREAKPOINT

arch/arm64/kernel/asm-offsets.c+1−1

@@ -75,7 +75,7 @@ int main(void) · 74 unmodified lines
75	75	DEFINE(S_SDEI_TTBR1, offsetof(struct pt_regs, sdei_ttbr1));
76	76	DEFINE(S_PMR_SAVE, offsetof(struct pt_regs, pmr_save));
77	77	DEFINE(S_STACKFRAME, offsetof(struct pt_regs, stackframe));
78		− DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
	78	+ DEFINE(PT_REGS_SIZE, sizeof(struct pt_regs));
79	79	BLANK();
80	80	#ifdef CONFIG_COMPAT
81	81	DEFINE(COMPAT_SIGFRAME_REGS_OFFSET, offsetof(struct compat_sigframe, uc.uc_mcontext.arm_r0));

arch/arm64/kernel/entry-ftrace.S+6−6

@@ -35,7 +35,7 @@ · 34 unmodified lines
35	35	*/
36	36	.macro ftrace_regs_entry, allregs=0
37	37	/* Make room for pt_regs, plus a callee frame */
38		− sub sp, sp, #(S_FRAME_SIZE + 16)
	38	+ sub sp, sp, #(PT_REGS_SIZE + 16)
39	39
40	40	/* Save function arguments (and x9 for simplicity) */
41	41	stp x0, x1, [sp, #S_X0]
@@ -61,15 +61,15 @@ · 19 unmodified lines
61	61	.endif
62	62
63	63	/* Save the callsite's SP and LR */
64		− add x10, sp, #(S_FRAME_SIZE + 16)
	64	+ add x10, sp, #(PT_REGS_SIZE + 16)
65	65	stp x9, x10, [sp, #S_LR]
66	66
67	67	/* Save the PC after the ftrace callsite */
68	68	str x30, [sp, #S_PC]
69	69
70	70	/* Create a frame record for the callsite above pt_regs */
71		− stp x29, x9, [sp, #S_FRAME_SIZE]
72		− add x29, sp, #S_FRAME_SIZE
	71	+ stp x29, x9, [sp, #PT_REGS_SIZE]
	72	+ add x29, sp, #PT_REGS_SIZE
73	73
74	74	/* Create our frame record within pt_regs. */
75	75	stp x29, x30, [sp, #S_STACKFRAME]
@@ -120,7 +120,7 @@ ftrace_common_return: · 44 unmodified lines
120	120	ldr x9, [sp, #S_PC]
121	121
122	122	/* Restore the callsite's SP */
123		− add sp, sp, #S_FRAME_SIZE + 16
	123	+ add sp, sp, #PT_REGS_SIZE + 16
124	124
125	125	ret x9
126	126	SYM_CODE_END(ftrace_common)
@@ -130,7 +130,7 @@ SYM_CODE_START(ftrace_graph_caller) · 3 unmodified lines
130	130	ldr x0, [sp, #S_PC]
131	131	sub x0, x0, #AARCH64_INSN_SIZE // ip (callsite's BL insn)
132	132	add x1, sp, #S_LR // parent_ip (callsite's LR)
133		− ldr x2, [sp, #S_FRAME_SIZE] // parent fp (callsite's FP)
	133	+ ldr x2, [sp, #PT_REGS_SIZE] // parent fp (callsite's FP)
134	134	bl prepare_ftrace_return
135	135	b ftrace_common_return
136	136	SYM_CODE_END(ftrace_graph_caller)

arch/arm64/kernel/entry.S+7−7

@@ -75,7 +75,7 @@ alternative_else_nop_endif · 74 unmodified lines
75	75	.endif
76	76	#endif
77	77
78		− sub sp, sp, #S_FRAME_SIZE
	78	+ sub sp, sp, #PT_REGS_SIZE
79	79	#ifdef CONFIG_VMAP_STACK
80	80	/*
81	81	* Test whether the SP has overflowed, without corrupting a GPR.
@@ -96,7 +96,7 @@ alternative_else_nop_endif · 14 unmodified lines
96	96	* userspace, and can clobber EL0 registers to free up GPRs.
97	97	*/
98	98
99		− /* Stash the original SP (minus S_FRAME_SIZE) in tpidr_el0. */
	99	+ /* Stash the original SP (minus PT_REGS_SIZE) in tpidr_el0. */
100	100	msr tpidr_el0, x0
101	101
102	102	/* Recover the original x0 value and stash it in tpidrro_el0 */
@@ -253,7 +253,7 @@ alternative_else_nop_endif · 150 unmodified lines
253	253
254	254	scs_load tsk, x20
255	255	.else
256		− add x21, sp, #S_FRAME_SIZE
	256	+ add x21, sp, #PT_REGS_SIZE
257	257	get_current_task tsk
258	258	.endif /* \el == 0 */
259	259	mrs x22, elr_el1
@@ -377,7 +377,7 @@ alternative_else_nop_endif · 117 unmodified lines
377	377	ldp x26, x27, [sp, #16 * 13]
378	378	ldp x28, x29, [sp, #16 * 14]
379	379	ldr lr, [sp, #S_LR]
380		− add sp, sp, #S_FRAME_SIZE // restore sp
	380	+ add sp, sp, #PT_REGS_SIZE // restore sp
381	381
382	382	.if \el == 0
383	383	alternative_insn eret, nop, ARM64_UNMAP_KERNEL_AT_EL0
@@ -580,12 +580,12 @@ __bad_stack: · 196 unmodified lines
580	580
581	581	/*
582	582	* Store the original GPRs to the new stack. The orginal SP (minus
583		− * S_FRAME_SIZE) was stashed in tpidr_el0 by kernel_ventry.
	583	+ * PT_REGS_SIZE) was stashed in tpidr_el0 by kernel_ventry.
584	584	*/
585		− sub sp, sp, #S_FRAME_SIZE
	585	+ sub sp, sp, #PT_REGS_SIZE
586	586	kernel_entry 1
587	587	mrs x0, tpidr_el0
588		− add x0, x0, #S_FRAME_SIZE
	588	+ add x0, x0, #PT_REGS_SIZE
589	589	str x0, [sp, #S_SP]
590	590
591	591	/* Stash the regs for handle_bad_stack */

arch/arm64/kernel/perf_event.c+2−39

@@ -23,8 +23,6 @@ · 22 unmodified lines
23	23	#include <linux/platform_device.h>
24	24	#include <linux/sched_clock.h>
25	25	#include <linux/smp.h>
26		−#include <linux/nmi.h>
27		−#include <linux/cpufreq.h>
28	26
29	27	/* ARMv8 Cortex-A53 specific event types. */
30	28	#define ARMV8_A53_PERFCTR_PREF_LINEFILL 0xC2
@@ -1250,21 +1248,10 @@ static struct platform_driver armv8_pmu_driver = { · 1219 unmodified lines
1250	1248
1251	1249	static int __init armv8_pmu_driver_init(void)
1252	1250	{
1253		− int ret;
1254		−
1255	1251	if (acpi_disabled)
1256		− ret = platform_driver_register(&armv8_pmu_driver);
	1252	+ return platform_driver_register(&armv8_pmu_driver);
1257	1253	else
1258		− ret = arm_pmu_acpi_probe(armv8_pmuv3_init);
1259		−
1260		− /*
1261		− * Try to re-initialize lockup detector after PMU init in
1262		− * case PMU events are triggered via NMIs.
1263		− */
1264		− if (ret == 0 && arm_pmu_irq_is_nmi())
1265		− lockup_detector_init();
1266		−
1267		− return ret;
	1254	+ return arm_pmu_acpi_probe(armv8_pmuv3_init);
1268	1255	}
1269	1256	device_initcall(armv8_pmu_driver_init)
1270	1257
@@ -1322,27 +1309,3 @@ void arch_perf_update_userpage(struct perf_event *event, · 51 unmodified lines
1322	1309	userpg->cap_user_time_zero = 1;
1323	1310	userpg->cap_user_time_short = 1;
1324	1311	}
1325		−
1326		−#ifdef CONFIG_HARDLOCKUP_DETECTOR_PERF
1327		−/*
1328		− * Safe maximum CPU frequency in case a particular platform doesn't implement
1329		− * cpufreq driver. Although, architecture doesn't put any restrictions on
1330		− * maximum frequency but 5 GHz seems to be safe maximum given the available
1331		− * Arm CPUs in the market which are clocked much less than 5 GHz. On the other
1332		− * hand, we can't make it much higher as it would lead to a large hard-lockup
1333		− * detection timeout on parts which are running slower (eg. 1GHz on
1334		− * Developerbox) and doesn't possess a cpufreq driver.
1335		− */
1336		−#define SAFE_MAX_CPU_FREQ 5000000000UL // 5 GHz
1337		−u64 hw_nmi_get_sample_period(int watchdog_thresh)
1338		−{
1339		− unsigned int cpu = smp_processor_id();
1340		− unsigned long max_cpu_freq;
1341		−
1342		− max_cpu_freq = cpufreq_get_hw_max_freq(cpu) * 1000UL;
1343		− if (!max_cpu_freq)
1344		− max_cpu_freq = SAFE_MAX_CPU_FREQ;
1345		−
1346		− return (u64)max_cpu_freq * watchdog_thresh;
1347		−}
1348		−#endif

arch/arm64/kernel/probes/kprobes_trampoline.S+3−3

@@ -25,7 +25,7 @@ · 24 unmodified lines
25	25	stp x24, x25, [sp, #S_X24]
26	26	stp x26, x27, [sp, #S_X26]
27	27	stp x28, x29, [sp, #S_X28]
28		− add x0, sp, #S_FRAME_SIZE
	28	+ add x0, sp, #PT_REGS_SIZE
29	29	stp lr, x0, [sp, #S_LR]
30	30	/*
31	31	* Construct a useful saved PSTATE
@@ -62,7 +62,7 @@ · 30 unmodified lines
62	62	.endm
63	63
64	64	SYM_CODE_START(kretprobe_trampoline)
65		− sub sp, sp, #S_FRAME_SIZE
	65	+ sub sp, sp, #PT_REGS_SIZE
66	66
67	67	save_all_base_regs
68	68
@@ -76,7 +76,7 @@ SYM_CODE_START(kretprobe_trampoline) · 7 unmodified lines
76	76
77	77	restore_all_base_regs
78	78
79		− add sp, sp, #S_FRAME_SIZE
	79	+ add sp, sp, #PT_REGS_SIZE
80	80	ret
81	81
82	82	SYM_CODE_END(kretprobe_trampoline)

arch/arm64/kernel/signal.c+0−7

@@ -914,13 +914,6 @@ static void do_signal(struct pt_regs *regs) · 913 unmodified lines
914	914	asmlinkage void do_notify_resume(struct pt_regs *regs,
915	915	unsigned long thread_flags)
916	916	{
917		− /*
918		− * The assembly code enters us with IRQs off, but it hasn't
919		− * informed the tracing code of that for efficiency reasons.
920		− * Update the trace code with the current status.
921		− */
922		− trace_hardirqs_off();
923		−
924	917	do {
925	918	if (thread_flags & _TIF_NEED_RESCHED) {
926	919	/* Unmask Debug and SError for the next task */

arch/arm64/kernel/syscall.c+2−8

@@ -9,6 +9,7 @@ · 8 unmodified lines
9	9
10	10	#include <asm/daifflags.h>
11	11	#include <asm/debug-monitors.h>
	12	+#include <asm/exception.h>
12	13	#include <asm/fpsimd.h>
13	14	#include <asm/syscall.h>
14	15	#include <asm/thread_info.h>
@@ -165,15 +166,8 @@ static void el0_svc_common(struct pt_regs *regs, int scno, int sc_nr, · 150 unmodified lines
165	166	if (!has_syscall_work(flags) && !IS_ENABLED(CONFIG_DEBUG_RSEQ)) {
166	167	local_daif_mask();
167	168	flags = current_thread_info()->flags;
168		− if (!has_syscall_work(flags) && !(flags & _TIF_SINGLESTEP)) {
169		− /*
170		− * We're off to userspace, where interrupts are
171		− * always enabled after we restore the flags from
172		− * the SPSR.
173		− */
174		− trace_hardirqs_on();
	169	+ if (!has_syscall_work(flags) && !(flags & _TIF_SINGLESTEP))
175	170	return;
176		− }
177	171	local_daif_restore(DAIF_PROCCTX);
178	172	}
179	173

arch/arm64/mm/init.c+18−15

@@ -53,13 +53,13 @@ s64 memstart_addr __ro_after_init = -1; · 52 unmodified lines
53	53	EXPORT_SYMBOL(memstart_addr);
54	54
55	55	/*
56		− * We create both ZONE_DMA and ZONE_DMA32. ZONE_DMA covers the first 1G of
57		− * memory as some devices, namely the Raspberry Pi 4, have peripherals with
58		− * this limited view of the memory. ZONE_DMA32 will cover the rest of the 32
59		− * bit addressable memory area.
	56	+ * If the corresponding config options are enabled, we create both ZONE_DMA
	57	+ * and ZONE_DMA32. By default ZONE_DMA covers the 32-bit addressable memory
	58	+ * unless restricted on specific platforms (e.g. 30-bit on Raspberry Pi 4).
	59	+ * In such case, ZONE_DMA32 covers the rest of the 32-bit addressable memory,
	60	+ * otherwise it is empty.
60	61	*/
61	62	phys_addr_t arm64_dma_phys_limit __ro_after_init;
62		−phys_addr_t arm64_dma32_phys_limit __ro_after_init;
63	63
64	64	#ifdef CONFIG_KEXEC_CORE
65	65	/*
@@ -84,7 +84,7 @@ static void __init reserve_crashkernel(void) · 18 unmodified lines
84	84
85	85	if (crash_base == 0) {
86	86	/* Current arm64 boot protocol requires 2MB alignment */
87		− crash_base = memblock_find_in_range(0, arm64_dma32_phys_limit,
	87	+ crash_base = memblock_find_in_range(0, arm64_dma_phys_limit,
88	88	crash_size, SZ_2M);
89	89	if (crash_base == 0) {
90	90	pr_warn("cannot allocate crashkernel (size:0x%llx)\n",
@@ -196,6 +196,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max) · 105 unmodified lines
196	196	unsigned long max_zone_pfns[MAX_NR_ZONES] = {0};
197	197	unsigned int __maybe_unused acpi_zone_dma_bits;
198	198	unsigned int __maybe_unused dt_zone_dma_bits;
	199	+ phys_addr_t __maybe_unused dma32_phys_limit = max_zone_phys(32);
199	200
200	201	#ifdef CONFIG_ZONE_DMA
201	202	acpi_zone_dma_bits = fls64(acpi_iort_dma_get_max_cpu_address());
@@ -205,8 +206,12 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max) · 3 unmodified lines
205	206	max_zone_pfns[ZONE_DMA] = PFN_DOWN(arm64_dma_phys_limit);
206	207	#endif
207	208	#ifdef CONFIG_ZONE_DMA32
208		− max_zone_pfns[ZONE_DMA32] = PFN_DOWN(arm64_dma32_phys_limit);
	209	+ max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit);
	210	+ if (!arm64_dma_phys_limit)
	211	+ arm64_dma_phys_limit = dma32_phys_limit;
209	212	#endif
	213	+ if (!arm64_dma_phys_limit)
	214	+ arm64_dma_phys_limit = PHYS_MASK + 1;
210	215	max_zone_pfns[ZONE_NORMAL] = max;
211	216
212	217	free_area_init(max_zone_pfns);
@@ -394,16 +399,9 @@ void __init arm64_memblock_init(void) · 181 unmodified lines
394	399
395	400	early_init_fdt_scan_reserved_mem();
396	401
397		− if (IS_ENABLED(CONFIG_ZONE_DMA32))
398		− arm64_dma32_phys_limit = max_zone_phys(32);
399		− else
400		− arm64_dma32_phys_limit = PHYS_MASK + 1;
401		−
402	402	reserve_elfcorehdr();
403	403
404	404	high_memory = __va(memblock_end_of_DRAM() - 1) + 1;
405		−
406		− dma_contiguous_reserve(arm64_dma32_phys_limit);
407	405	}
408	406
409	407	void __init bootmem_init(void)
@@ -438,6 +436,11 @@ void __init bootmem_init(void) · 28 unmodified lines
438	436	sparse_init();
439	437	zone_sizes_init(min, max);
440	438
	439	+ /*
	440	+ * Reserve the CMA area after arm64_dma_phys_limit was initialised.
	441	+ */
	442	+ dma_contiguous_reserve(arm64_dma_phys_limit);
	443	+
441	444	/*
442	445	* request_standard_resources() depends on crashkernel's memory being
443	446	* reserved, so do it here.
@@ -455,7 +458,7 @@ void __init bootmem_init(void) · 11 unmodified lines
455	458	void __init mem_init(void)
456	459	{
457	460	if (swiotlb_force == SWIOTLB_FORCE \|\|
458		− max_pfn > PFN_DOWN(arm64_dma_phys_limit ? : arm64_dma32_phys_limit))
	461	+ max_pfn > PFN_DOWN(arm64_dma_phys_limit))
459	462	swiotlb_init(1);
460	463	else
461	464	swiotlb_force = SWIOTLB_NO_FORCE;

arch/ia64/include/asm/sparsemem.h+1−0

@@ -3,6 +3,7 @@ · 2 unmodified lines
3	3	#define _ASM_IA64_SPARSEMEM_H
4	4
5	5	#ifdef CONFIG_SPARSEMEM
	6	+#include <asm/page.h>
6	7	/*
7	8	* SECTION_SIZE_BITS 2^N: how big each section will be
8	9	* MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space

arch/mips/boot/compressed/decompress.c+2−1

@@ -13,6 +13,7 @@ · 12 unmodified lines
13	13	#include <linux/libfdt.h>
14	14
15	15	#include <asm/addrspace.h>
	16	+#include <asm/unaligned.h>
16	17
17	18	/*
18	19	* These two variables specify the free mem region
@@ -117,7 +118,7 @@ void decompress_kernel(unsigned long boot_heap_start) · 98 unmodified lines
117	118	dtb_size = fdt_totalsize((void *)&__appended_dtb);
118	119
119	120	/* last four bytes is always image size in little endian */
120		− image_size = le32_to_cpup((void *)&__image_end - 4);
	121	+ image_size = get_unaligned_le32((void *)&__image_end - 4);
121	122
122	123	/* copy dtb to where the booted kernel will expect it */
123	124	memcpy((void *)VMLINUX_LOAD_ADDRESS_ULL + image_size,

arch/mips/cavium-octeon/octeon-irq.c+1−1

@@ -1444,7 +1444,7 @@ static void octeon_irq_setup_secondary_ciu2(void) · 1443 unmodified lines
1444	1444	static int __init octeon_irq_init_ciu(
1445	1445	struct device_node ciu_node, struct device_node parent)
1446	1446	{
1447		− unsigned int i, r;
	1447	+ int i, r;
1448	1448	struct irq_chip *chip;
1449	1449	struct irq_chip *chip_edge;
1450	1450	struct irq_chip *chip_mbox;

arch/mips/kernel/binfmt_elfn32.c+7−0

@@ -103,4 +103,11 @@ jiffies_to_old_timeval32(unsigned long jiffies, struct old_timeval32 *value) · 102 unmodified lines
103	103	#undef ns_to_kernel_old_timeval
104	104	#define ns_to_kernel_old_timeval ns_to_old_timeval32
105	105
	106	+/*
	107	+ * Some data types as stored in coredump.
	108	+ */
	109	+#define user_long_t compat_long_t
	110	+#define user_siginfo_t compat_siginfo_t
	111	+#define copy_siginfo_to_external copy_siginfo_to_external32
	112	+
106	113	#include "../../../fs/binfmt_elf.c"

arch/mips/kernel/binfmt_elfo32.c+7−0

@@ -106,4 +106,11 @@ jiffies_to_old_timeval32(unsigned long jiffies, struct old_timeval32 *value) · 105 unmodified lines
106	106	#undef ns_to_kernel_old_timeval
107	107	#define ns_to_kernel_old_timeval ns_to_old_timeval32
108	108
	109	+/*
	110	+ * Some data types as stored in coredump.
	111	+ */
	112	+#define user_long_t compat_long_t
	113	+#define user_siginfo_t compat_siginfo_t
	114	+#define copy_siginfo_to_external copy_siginfo_to_external32
	115	+
109	116	#include "../../../fs/binfmt_elf.c"

arch/mips/kernel/relocate.c+8−2

@@ -187,8 +187,14 @@ static int __init relocate_exception_table(long offset) · 186 unmodified lines
187	187	static inline __init unsigned long rotate_xor(unsigned long hash,
188	188	const void *area, size_t size)
189	189	{
190		− size_t i;
191		− unsigned long ptr = (unsigned long )area;
	190	+ const typeof(hash) *ptr = PTR_ALIGN(area, sizeof(hash));
	191	+ size_t diff, i;
	192	+
	193	+ diff = (void *)ptr - area;
	194	+ if (unlikely(size < diff + sizeof(hash)))
	195	+ return hash;
	196	+
	197	+ size = ALIGN_DOWN(size - diff, sizeof(hash));
192	198
193	199	for (i = 0; i < size / sizeof(hash); i++) {
194	200	/* Rotate by odd number of bits and XOR. */

arch/powerpc/include/asm/vdso/gettimeofday.h+15−1

@@ -103,6 +103,8 @@ int gettimeofday_fallback(struct __kernel_old_timeval _tv, struct timezone _tz · 102 unmodified lines
103	103	return do_syscall_2(__NR_gettimeofday, (unsigned long)_tv, (unsigned long)_tz);
104	104	}
105	105
	106	+#ifdef __powerpc64__
	107	+
106	108	static __always_inline
107	109	int clock_gettime_fallback(clockid_t _clkid, struct __kernel_timespec *_ts)
108	110	{
@@ -115,10 +117,22 @@ int clock_getres_fallback(clockid_t _clkid, struct __kernel_timespec *_ts) · 6 unmodified lines
115	117	return do_syscall_2(__NR_clock_getres, _clkid, (unsigned long)_ts);
116	118	}
117	119
118		−#ifdef CONFIG_VDSO32
	120	+#else
119	121
120	122	#define BUILD_VDSO32 1
121	123
	124	+static __always_inline
	125	+int clock_gettime_fallback(clockid_t _clkid, struct __kernel_timespec *_ts)
	126	+{
	127	+ return do_syscall_2(__NR_clock_gettime64, _clkid, (unsigned long)_ts);
	128	+}
	129	+
	130	+static __always_inline
	131	+int clock_getres_fallback(clockid_t _clkid, struct __kernel_timespec *_ts)
	132	+{
	133	+ return do_syscall_2(__NR_clock_getres_time64, _clkid, (unsigned long)_ts);
	134	+}
	135	+
122	136	static __always_inline
123	137	int clock_gettime32_fallback(clockid_t _clkid, struct old_timespec32 *_ts)
124	138	{

arch/powerpc/kernel/vmlinux.lds.S+8−0

@@ -187,6 +187,12 @@ SECTIONS · 186 unmodified lines
187	187	.init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
188	188	_sinittext = .;
189	189	INIT_TEXT
	190	+
	191	+ /*
	192	+ *.init.text might be RO so we must ensure this section ends on
	193	+ * a page boundary.
	194	+ */
	195	+ . = ALIGN(PAGE_SIZE);
190	196	_einittext = .;
191	197	#ifdef CONFIG_PPC64
192	198	*(.tramp.ftrace.init);
@@ -200,6 +206,8 @@ SECTIONS · 7 unmodified lines
200	206	EXIT_TEXT
201	207	}
202	208
	209	+ . = ALIGN(PAGE_SIZE);
	210	+
203	211	INIT_DATA_SECTION(16)
204	212
205	213	. = ALIGN(8);

arch/riscv/Kconfig+4−2

@@ -137,7 +137,7 @@ config PA_BITS · 136 unmodified lines
137	137
138	138	config PAGE_OFFSET
139	139	hex
140		− default 0xC0000000 if 32BIT && MAXPHYSMEM_2GB
	140	+ default 0xC0000000 if 32BIT && MAXPHYSMEM_1GB
141	141	default 0x80000000 if 64BIT && !MMU
142	142	default 0xffffffff80000000 if 64BIT && MAXPHYSMEM_2GB
143	143	default 0xffffffe000000000 if 64BIT && MAXPHYSMEM_128GB
@@ -247,10 +247,12 @@ config MODULE_SECTIONS · 103 unmodified lines
247	247
248	248	choice
249	249	prompt "Maximum Physical Memory"
250		− default MAXPHYSMEM_2GB if 32BIT
	250	+ default MAXPHYSMEM_1GB if 32BIT
251	251	default MAXPHYSMEM_2GB if 64BIT && CMODEL_MEDLOW
252	252	default MAXPHYSMEM_128GB if 64BIT && CMODEL_MEDANY
253	253
	254	+ config MAXPHYSMEM_1GB
	255	+ bool "1GiB"
254	256	config MAXPHYSMEM_2GB
255	257	bool "2GiB"
256	258	config MAXPHYSMEM_128GB

arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts+2−0

@@ -88,7 +88,9 @@ · 87 unmodified lines
88	88	phy-mode = "gmii";
89	89	phy-handle = <&phy0>;
90	90	phy0: ethernet-phy@0 {
	91	+ compatible = "ethernet-phy-id0007.0771";
91	92	reg = <0>;
	93	+ reset-gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
92	94	};
93	95	};
94	96

arch/riscv/configs/defconfig+2−0

@@ -64,6 +64,8 @@ CONFIG_HW_RANDOM=y · 63 unmodified lines
64	64	CONFIG_HW_RANDOM_VIRTIO=y
65	65	CONFIG_SPI=y
66	66	CONFIG_SPI_SIFIVE=y
	67	+CONFIG_GPIOLIB=y
	68	+CONFIG_GPIO_SIFIVE=y
67	69	# CONFIG_PTP_1588_CLOCK is not set
68	70	CONFIG_POWER_RESET=y
69	71	CONFIG_DRM=y

arch/riscv/include/asm/pgtable.h+0−1

@@ -99,7 +99,6 @@ · 98 unmodified lines
99	99	\| _PAGE_DIRTY)
100	100
101	101	#define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
102		−#define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL \| _PAGE_EXEC)
103	102	#define PAGE_KERNEL_READ __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE)
104	103	#define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL \| _PAGE_EXEC)
105	104	#define PAGE_KERNEL_READ_EXEC __pgprot((_PAGE_KERNEL & ~_PAGE_WRITE) \

arch/riscv/include/asm/vdso.h+1−1

@@ -10,7 +10,7 @@ · 9 unmodified lines
10	10
11	11	#include <linux/types.h>
12	12
13		−#ifndef GENERIC_TIME_VSYSCALL
	13	+#ifndef CONFIG_GENERIC_TIME_VSYSCALL
14	14	struct vdso_data {
15	15	};
16	16	#endif

arch/riscv/kernel/cacheinfo.c+10−1

@@ -26,7 +26,16 @@ cache_get_priv_group(struct cacheinfo *this_leaf) · 25 unmodified lines
26	26
27	27	static struct cacheinfo *get_cacheinfo(u32 level, enum cache_type type)
28	28	{
29		− struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(smp_processor_id());
	29	+ /*
	30	+ * Using raw_smp_processor_id() elides a preemptability check, but this
	31	+ * is really indicative of a larger problem: the cacheinfo UABI assumes
	32	+ * that cores have a homonogenous view of the cache hierarchy. That
	33	+ * happens to be the case for the current set of RISC-V systems, but
	34	+ * likely won't be true in general. Since there's no way to provide
	35	+ * correct information for these systems via the current UABI we're
	36	+ * just eliding the check for now.
	37	+ */
	38	+ struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(raw_smp_processor_id());
30	39	struct cacheinfo *this_leaf;
31	40	int index;
32	41

arch/riscv/kernel/entry.S+13−11

@@ -124,15 +124,15 @@ skip_context_tracking: · 123 unmodified lines
124	124	REG_L a1, (a1)
125	125	jr a1
126	126	1:
127		−#ifdef CONFIG_TRACE_IRQFLAGS
128		− call trace_hardirqs_on
129		−#endif
130	127	/*
131	128	* Exceptions run with interrupts enabled or disabled depending on the
132	129	* state of SR_PIE in m/sstatus.
133	130	*/
134	131	andi t0, s1, SR_PIE
135	132	beqz t0, 1f
	133	+#ifdef CONFIG_TRACE_IRQFLAGS
	134	+ call trace_hardirqs_on
	135	+#endif
136	136	csrs CSR_STATUS, SR_IE
137	137
138	138	1:
@@ -155,6 +155,15 @@ skip_context_tracking: · 16 unmodified lines
155	155	tail do_trap_unknown
156	156
157	157	handle_syscall:
	158	+#ifdef CONFIG_RISCV_M_MODE
	159	+ /*
	160	+ * When running is M-Mode (no MMU config), MPIE does not get set.
	161	+ * As a result, we need to force enable interrupts here because
	162	+ * handle_exception did not do set SR_IE as it always sees SR_PIE
	163	+ * being cleared.
	164	+ */
	165	+ csrs CSR_STATUS, SR_IE
	166	+#endif
158	167	#if defined(CONFIG_TRACE_IRQFLAGS) \|\| defined(CONFIG_CONTEXT_TRACKING)
159	168	/* Recover a0 - a7 for system calls */
160	169	REG_L a0, PT_A0(sp)
@@ -186,14 +195,7 @@ check_syscall_nr: · 25 unmodified lines
186	195	* Syscall number held in a7.
187	196	* If syscall number is above allowed value, redirect to ni_syscall.
188	197	*/
189		− bge a7, t0, 1f
190		− /*
191		− * Check if syscall is rejected by tracer, i.e., a7 == -1.
192		− * If yes, we pretend it was executed.
193		− */
194		− li t1, -1
195		− beq a7, t1, ret_from_syscall_rejected
196		− blt a7, t1, 1f
	198	+ bgeu a7, t0, 1f
197	199	/* Call syscall */
198	200	la s0, sys_call_table
199	201	slli t0, a7, RISCV_LGPTR

arch/riscv/kernel/setup.c+13−11

@@ -127,7 +127,9 @@ static void __init init_resources(void) · 126 unmodified lines
127	127	{
128	128	struct memblock_region *region = NULL;
129	129	struct resource *res = NULL;
130		− int ret = 0;
	130	+ struct resource *mem_res = NULL;
	131	+ size_t mem_res_sz = 0;
	132	+ int ret = 0, i = 0;
131	133
132	134	code_res.start = __pa_symbol(_text);
133	135	code_res.end = __pa_symbol(_etext) - 1;
@@ -145,16 +147,17 @@ static void __init init_resources(void) · 11 unmodified lines
145	147	bss_res.end = __pa_symbol(__bss_stop) - 1;
146	148	bss_res.flags = IORESOURCE_SYSTEM_RAM \| IORESOURCE_BUSY;
147	149
	150	+ mem_res_sz = (memblock.memory.cnt + memblock.reserved.cnt) * sizeof(*mem_res);
	151	+ mem_res = memblock_alloc(mem_res_sz, SMP_CACHE_BYTES);
	152	+ if (!mem_res)
	153	+ panic("%s: Failed to allocate %zu bytes\n", __func__, mem_res_sz);
148	154	/*
149	155	* Start by adding the reserved regions, if they overlap
150	156	* with /memory regions, insert_resource later on will take
151	157	* care of it.
152	158	*/
153	159	for_each_reserved_mem_region(region) {
154		− res = memblock_alloc(sizeof(struct resource), SMP_CACHE_BYTES);
155		− if (!res)
156		− panic("%s: Failed to allocate %zu bytes\n", __func__,
157		− sizeof(struct resource));
	160	+ res = &mem_res[i++];
158	161
159	162	res->name = "Reserved";
160	163	res->flags = IORESOURCE_MEM \| IORESOURCE_BUSY;
@@ -171,8 +174,10 @@ static void __init init_resources(void) · 10 unmodified lines
171	174	* Ignore any other reserved regions within
172	175	* system memory.
173	176	*/
174		− if (memblock_is_memory(res->start))
	177	+ if (memblock_is_memory(res->start)) {
	178	+ memblock_free((phys_addr_t) res, sizeof(struct resource));
175	179	continue;
	180	+ }
176	181
177	182	ret = add_resource(&iomem_resource, res);
178	183	if (ret < 0)
@@ -181,10 +186,7 @@ static void __init init_resources(void) · 2 unmodified lines
181	186
182	187	/* Add /memory regions to the resource tree */
183	188	for_each_mem_region(region) {
184		− res = memblock_alloc(sizeof(struct resource), SMP_CACHE_BYTES);
185		− if (!res)
186		− panic("%s: Failed to allocate %zu bytes\n", __func__,
187		− sizeof(struct resource));
	189	+ res = &mem_res[i++];
188	190
189	191	if (unlikely(memblock_is_nomap(region))) {
190	192	res->name = "Reserved";
@@ -205,9 +207,9 @@ static void __init init_resources(void) · 14 unmodified lines
205	207	return;
206	208
207	209	error:
208		− memblock_free((phys_addr_t) res, sizeof(struct resource));
209	210	/* Better an empty resource tree than an inconsistent one */
210	211	release_child_resources(&iomem_resource);
	212	+ memblock_free((phys_addr_t) mem_res, mem_res_sz);
211	213	}
212	214
213	215

arch/riscv/kernel/stacktrace.c+2−3

@@ -14,7 +14,7 @@ · 13 unmodified lines
14	14
15	15	#include <asm/stacktrace.h>
16	16
17		−register unsigned long sp_in_global __asm__("sp");
	17	+register const unsigned long sp_in_global __asm__("sp");
18	18
19	19	#ifdef CONFIG_FRAME_POINTER
20	20
@@ -28,9 +28,8 @@ void notrace walk_stackframe(struct task_struct task, struct pt_regs regs, · 7 unmodified lines
28	28	sp = user_stack_pointer(regs);
29	29	pc = instruction_pointer(regs);
30	30	} else if (task == NULL \|\| task == current) {
31		− const register unsigned long current_sp = sp_in_global;
32	31	fp = (unsigned long)__builtin_frame_address(0);
33		− sp = current_sp;
	32	+ sp = sp_in_global;
34	33	pc = (unsigned long)walk_stackframe;
35	34	} else {
36	35	/* task blocked in __switch_to */

arch/riscv/kernel/time.c+3−0

@@ -4,6 +4,7 @@ · 3 unmodified lines
4	4	* Copyright (C) 2017 SiFive
5	5	*/
6	6
	7	+#include <linux/of_clk.h>
7	8	#include <linux/clocksource.h>
8	9	#include <linux/delay.h>
9	10	#include <asm/sbi.h>
@@ -24,6 +25,8 @@ void __init time_init(void) · 14 unmodified lines
24	25	riscv_timebase = prop;
25	26
26	27	lpj_fine = riscv_timebase / HZ;
	28	+
	29	+ of_clk_init(NULL);
27	30	timer_probe();
28	31	}
29	32

arch/riscv/kernel/vdso.c+1−1

@@ -12,7 +12,7 @@ · 11 unmodified lines
12	12	#include <linux/binfmts.h>
13	13	#include <linux/err.h>
14	14	#include <asm/page.h>
15		−#ifdef GENERIC_TIME_VSYSCALL
	15	+#ifdef CONFIG_GENERIC_TIME_VSYSCALL
16	16	#include <vdso/datapage.h>
17	17	#else
18	18	#include <asm/vdso.h>

arch/riscv/mm/init.c+14−2

@@ -157,9 +157,10 @@ disable: · 156 unmodified lines
157	157	void __init setup_bootmem(void)
158	158	{
159	159	phys_addr_t mem_start = 0;
160		− phys_addr_t start, end = 0;
	160	+ phys_addr_t start, dram_end, end = 0;
161	161	phys_addr_t vmlinux_end = __pa_symbol(&_end);
162	162	phys_addr_t vmlinux_start = __pa_symbol(&_start);
	163	+ phys_addr_t max_mapped_addr = __pa(~(ulong)0);
163	164	u64 i;
164	165
165	166	/* Find the memory region containing the kernel */
@@ -181,7 +182,18 @@ void __init setup_bootmem(void) · 15 unmodified lines
181	182	/* Reserve from the start of the kernel to the end of the kernel */
182	183	memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
183	184
184		− max_pfn = PFN_DOWN(memblock_end_of_DRAM());
	185	+ dram_end = memblock_end_of_DRAM();
	186	+
	187	+ /*
	188	+ * memblock allocator is not aware of the fact that last 4K bytes of
	189	+ * the addressable memory can not be mapped because of IS_ERR_VALUE
	190	+ * macro. Make sure that last 4k bytes are not usable by memblock
	191	+ * if end of dram is equal to maximum addressable memory.
	192	+ */
	193	+ if (max_mapped_addr == (dram_end - 1))
	194	+ memblock_set_current_limit(max_mapped_addr - 4096);
	195	+
	196	+ max_pfn = PFN_DOWN(dram_end);
185	197	max_low_pfn = max_pfn;
186	198	dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
187	199	set_max_mapnr(max_low_pfn);

arch/riscv/mm/kasan_init.c+2−2

@@ -93,8 +93,8 @@ void __init kasan_init(void) · 92 unmodified lines
93	93	VMALLOC_END));
94	94
95	95	for_each_mem_range(i, &_start, &_end) {
96		− void start = (void )_start;
97		− void end = (void )_end;
	96	+ void start = (void )__va(_start);
	97	+ void end = (void )__va(_end);
98	98
99	99	if (start >= end)
100	100	break;

arch/x86/hyperv/hv_init.c+26−3

@@ -315,6 +315,25 @@ static struct syscore_ops hv_syscore_ops = { · 314 unmodified lines
315	315	.resume = hv_resume,
316	316	};
317	317
	318	+static void (* __initdata old_setup_percpu_clockev)(void);
	319	+
	320	+static void __init hv_stimer_setup_percpu_clockev(void)
	321	+{
	322	+ /*
	323	+ * Ignore any errors in setting up stimer clockevents
	324	+ * as we can run with the LAPIC timer as a fallback.
	325	+ */
	326	+ (void)hv_stimer_alloc();
	327	+
	328	+ /*
	329	+ * Still register the LAPIC timer, because the direct-mode STIMER is
	330	+ * not supported by old versions of Hyper-V. This also allows users
	331	+ * to switch to LAPIC timer via /sys, if they want to.
	332	+ */
	333	+ if (old_setup_percpu_clockev)
	334	+ old_setup_percpu_clockev();
	335	+}
	336	+
318	337	/*
319	338	* This function is to be invoked early in the boot sequence after the
320	339	* hypervisor has been detected.
@@ -393,10 +412,14 @@ void __init hyperv_init(void) · 72 unmodified lines
393	412	wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
394	413
395	414	/*
396		− * Ignore any errors in setting up stimer clockevents
397		− * as we can run with the LAPIC timer as a fallback.
	415	+ * hyperv_init() is called before LAPIC is initialized: see
	416	+ * apic_intr_mode_init() -> x86_platform.apic_post_init() and
	417	+ * apic_bsp_setup() -> setup_local_APIC(). The direct-mode STIMER
	418	+ * depends on LAPIC, so hv_stimer_alloc() should be called from
	419	+ * x86_init.timers.setup_percpu_clockev.
398	420	*/
399		− (void)hv_stimer_alloc();
	421	+ old_setup_percpu_clockev = x86_init.timers.setup_percpu_clockev;
	422	+ x86_init.timers.setup_percpu_clockev = hv_stimer_setup_percpu_clockev;
400	423
401	424	hv_apic_init();
402	425

arch/x86/xen/enlighten_hvm.c+12−3

@@ -164,10 +164,10 @@ static int xen_cpu_up_prepare_hvm(unsigned int cpu) · 163 unmodified lines
164	164	else
165	165	per_cpu(xen_vcpu_id, cpu) = cpu;
166	166	rc = xen_vcpu_setup(cpu);
167		− if (rc)
	167	+ if (rc \|\| !xen_have_vector_callback)
168	168	return rc;
169	169
170		− if (xen_have_vector_callback && xen_feature(XENFEAT_hvm_safe_pvclock))
	170	+ if (xen_feature(XENFEAT_hvm_safe_pvclock))
171	171	xen_setup_timer(cpu);
172	172
173	173	rc = xen_smp_intr_init(cpu);
@@ -188,6 +188,8 @@ static int xen_cpu_dead_hvm(unsigned int cpu) · 14 unmodified lines
188	188	return 0;
189	189	}
190	190
	191	+static bool no_vector_callback __initdata;
	192	+
191	193	static void __init xen_hvm_guest_init(void)
192	194	{
193	195	if (xen_pv_domain())
@@ -207,7 +209,7 @@ static void __init xen_hvm_guest_init(void) · 13 unmodified lines
207	209
208	210	xen_panic_handler_init();
209	211
210		− if (xen_feature(XENFEAT_hvm_callback_vector))
	212	+ if (!no_vector_callback && xen_feature(XENFEAT_hvm_callback_vector))
211	213	xen_have_vector_callback = 1;
212	214
213	215	xen_hvm_smp_init();
@@ -233,6 +235,13 @@ static __init int xen_parse_nopv(char *arg) · 19 unmodified lines
233	235	}
234	236	early_param("xen_nopv", xen_parse_nopv);
235	237
	238	+static __init int xen_parse_no_vector_callback(char *arg)
	239	+{
	240	+ no_vector_callback = true;
	241	+ return 0;
	242	+}
	243	+early_param("xen_no_vector_callback", xen_parse_no_vector_callback);
	244	+
236	245	bool __init xen_hvm_need_lapic(void)
237	246	{
238	247	if (xen_pv_domain())

arch/x86/xen/smp_hvm.c+19−10

@@ -33,9 +33,11 @@ static void __init xen_hvm_smp_prepare_cpus(unsigned int max_cpus) · 32 unmodified lines
33	33	int cpu;
34	34
35	35	native_smp_prepare_cpus(max_cpus);
36		− WARN_ON(xen_smp_intr_init(0));
37	36
38		− xen_init_lock_cpu(0);
	37	+ if (xen_have_vector_callback) {
	38	+ WARN_ON(xen_smp_intr_init(0));
	39	+ xen_init_lock_cpu(0);
	40	+ }
39	41
40	42	for_each_possible_cpu(cpu) {
41	43	if (cpu == 0)
@@ -50,9 +52,11 @@ static void __init xen_hvm_smp_prepare_cpus(unsigned int max_cpus) · 8 unmodified lines
50	52	static void xen_hvm_cpu_die(unsigned int cpu)
51	53	{
52	54	if (common_cpu_die(cpu) == 0) {
53		− xen_smp_intr_free(cpu);
54		− xen_uninit_lock_cpu(cpu);
55		− xen_teardown_timer(cpu);
	55	+ if (xen_have_vector_callback) {
	56	+ xen_smp_intr_free(cpu);
	57	+ xen_uninit_lock_cpu(cpu);
	58	+ xen_teardown_timer(cpu);
	59	+ }
56	60	}
57	61	}
58	62	#else
@@ -64,14 +68,19 @@ static void xen_hvm_cpu_die(unsigned int cpu) · 5 unmodified lines
64	68
65	69	void __init xen_hvm_smp_init(void)
66	70	{
67		− if (!xen_have_vector_callback)
	71	+ smp_ops.smp_prepare_boot_cpu = xen_hvm_smp_prepare_boot_cpu;
	72	+ smp_ops.smp_prepare_cpus = xen_hvm_smp_prepare_cpus;
	73	+ smp_ops.smp_cpus_done = xen_smp_cpus_done;
	74	+ smp_ops.cpu_die = xen_hvm_cpu_die;
	75	+
	76	+ if (!xen_have_vector_callback) {
	77	+#ifdef CONFIG_PARAVIRT_SPINLOCKS
	78	+ nopvspin = true;
	79	+#endif
68	80	return;
	81	+ }
69	82
70		− smp_ops.smp_prepare_cpus = xen_hvm_smp_prepare_cpus;
71	83	smp_ops.smp_send_reschedule = xen_smp_send_reschedule;
72		− smp_ops.cpu_die = xen_hvm_cpu_die;
73	84	smp_ops.send_call_func_ipi = xen_smp_send_call_function_ipi;
74	85	smp_ops.send_call_func_single_ipi = xen_smp_send_call_function_single_ipi;
75		− smp_ops.smp_prepare_boot_cpu = xen_hvm_smp_prepare_boot_cpu;
76		− smp_ops.smp_cpus_done = xen_smp_cpus_done;
77	86	}

crypto/asymmetric_keys/public_key.c+2−1

@@ -356,7 +356,8 @@ int public_key_verify_signature(const struct public_key *pkey, · 355 unmodified lines
356	356	if (ret)
357	357	goto error_free_key;
358	358
359		− if (strcmp(sig->pkey_algo, "sm2") == 0 && sig->data_size) {
	359	+ if (sig->pkey_algo && strcmp(sig->pkey_algo, "sm2") == 0 &&
	360	+ sig->data_size) {
360	361	ret = cert_sig_digest_update(sig, tfm);
361	362	if (ret)
362	363	goto error_free_key;

crypto/xor.c+2−0

@@ -107,6 +107,8 @@ do_xor_speed(struct xor_block_template tmpl, void b1, void *b2) · 106 unmodified lines
107	107	preempt_enable();
108	108
109	109	// bytes/ns == GB/s, multiply by 1000 to get MB/s [not MiB/s]
	110	+ if (!min)
	111	+ min = 1;
110	112	speed = (1000 * REPS * BENCH_SIZE) / (unsigned int)ktime_to_ns(min);
111	113	tmpl->speed = speed;
112	114

drivers/acpi/internal.h+1−1

@@ -97,7 +97,7 @@ void acpi_scan_table_handler(u32 event, void table, void context); · 96 unmodified lines
97	97	extern struct list_head acpi_bus_id_list;
98	98
99	99	struct acpi_device_bus_id {
100		− char bus_id[15];
	100	+ const char *bus_id;
101	101	unsigned int instance_no;
102	102	struct list_head node;
103	103	};

drivers/acpi/scan.c+14−1

@@ -486,6 +486,7 @@ static void acpi_device_del(struct acpi_device *device) · 485 unmodified lines
486	486	acpi_device_bus_id->instance_no--;
487	487	else {
488	488	list_del(&acpi_device_bus_id->node);
	489	+ kfree_const(acpi_device_bus_id->bus_id);
489	490	kfree(acpi_device_bus_id);
490	491	}
491	492	break;
@@ -674,7 +675,14 @@ int acpi_device_add(struct acpi_device *device, · 182 unmodified lines
674	675	}
675	676	if (!found) {
676	677	acpi_device_bus_id = new_bus_id;
677		− strcpy(acpi_device_bus_id->bus_id, acpi_device_hid(device));
	678	+ acpi_device_bus_id->bus_id =
	679	+ kstrdup_const(acpi_device_hid(device), GFP_KERNEL);
	680	+ if (!acpi_device_bus_id->bus_id) {
	681	+ pr_err(PREFIX "Memory allocation error for bus id\n");
	682	+ result = -ENOMEM;
	683	+ goto err_free_new_bus_id;
	684	+ }
	685	+
678	686	acpi_device_bus_id->instance_no = 0;
679	687	list_add_tail(&acpi_device_bus_id->node, &acpi_bus_id_list);
680	688	}
@@ -709,6 +717,11 @@ int acpi_device_add(struct acpi_device *device, · 28 unmodified lines
709	717	if (device->parent)
710	718	list_del(&device->node);
711	719	list_del(&device->wakeup_list);
	720	+
	721	+ err_free_new_bus_id:
	722	+ if (!found)
	723	+ kfree(new_bus_id);
	724	+
712	725	mutex_unlock(&acpi_device_lock);
713	726
714	727	err_detach:

drivers/crypto/Kconfig+1−0

@@ -366,6 +366,7 @@ if CRYPTO_DEV_OMAP · 365 unmodified lines
366	366	config CRYPTO_DEV_OMAP_SHAM
367	367	tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
368	368	depends on ARCH_OMAP2PLUS
	369	+ select CRYPTO_ENGINE
369	370	select CRYPTO_SHA1
370	371	select CRYPTO_MD5
371	372	select CRYPTO_SHA256

drivers/dma-buf/heaps/cma_heap.c+3−0

@@ -251,6 +251,9 @@ static void cma_heap_dma_buf_release(struct dma_buf *dmabuf) · 250 unmodified lines
251	251	buffer->vaddr = NULL;
252	252	}
253	253
	254	+ /* free page list */
	255	+ kfree(buffer->pages);
	256	+ /* release memory */
254	257	cma_release(cma_heap->cma, buffer->cma_pages, buffer->pagecount);
255	258	kfree(buffer);
256	259	}

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c+36−17

@@ -112,6 +112,7 @@ int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev) · 111 unmodified lines
112	112	union igp_info {
113	113	struct atom_integrated_system_info_v1_11 v11;
114	114	struct atom_integrated_system_info_v1_12 v12;
	115	+ struct atom_integrated_system_info_v2_1 v21;
115	116	};
116	117
117	118	union umc_info {
@@ -209,24 +210,42 @@ amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev, · 91 unmodified lines
209	210	if (adev->flags & AMD_IS_APU) {
210	211	igp_info = (union igp_info *)
211	212	(mode_info->atom_context->bios + data_offset);
212		− switch (crev) {
213		− case 11:
214		− mem_channel_number = igp_info->v11.umachannelnumber;
215		− /* channel width is 64 */
216		− if (vram_width)
217		− vram_width = mem_channel_number 64;
218		− mem_type = igp_info->v11.memorytype;
219		− if (vram_type)
220		− *vram_type = convert_atom_mem_type_to_vram_type(adev, mem_type);
	213	+ switch (frev) {
	214	+ case 1:
	215	+ switch (crev) {
	216	+ case 11:
	217	+ case 12:
	218	+ mem_channel_number = igp_info->v11.umachannelnumber;
	219	+ if (!mem_channel_number)
	220	+ mem_channel_number = 1;
	221	+ /* channel width is 64 */
	222	+ if (vram_width)
	223	+ vram_width = mem_channel_number 64;
	224	+ mem_type = igp_info->v11.memorytype;
	225	+ if (vram_type)
	226	+ *vram_type = convert_atom_mem_type_to_vram_type(adev, mem_type);
	227	+ break;
	228	+ default:
	229	+ return -EINVAL;
	230	+ }
221	231	break;
222		− case 12:
223		− mem_channel_number = igp_info->v12.umachannelnumber;
224		− /* channel width is 64 */
225		− if (vram_width)
226		− vram_width = mem_channel_number 64;
227		− mem_type = igp_info->v12.memorytype;
228		− if (vram_type)
229		− *vram_type = convert_atom_mem_type_to_vram_type(adev, mem_type);
	232	+ case 2:
	233	+ switch (crev) {
	234	+ case 1:
	235	+ case 2:
	236	+ mem_channel_number = igp_info->v21.umachannelnumber;
	237	+ if (!mem_channel_number)
	238	+ mem_channel_number = 1;
	239	+ /* channel width is 64 */
	240	+ if (vram_width)
	241	+ vram_width = mem_channel_number 64;
	242	+ mem_type = igp_info->v21.memorytype;
	243	+ if (vram_type)
	244	+ *vram_type = convert_atom_mem_type_to_vram_type(adev, mem_type);
	245	+ break;
	246	+ default:
	247	+ return -EINVAL;
	248	+ }
230	249	break;
231	250	default:
232	251	return -EINVAL;

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+1−1

@@ -3034,7 +3034,7 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type) · 3033 unmodified lines
3034	3034	#endif
3035	3035	default:
3036	3036	if (amdgpu_dc > 0)
3037		− DRM_INFO("Display Core has been requested via kernel parameter "
	3037	+ DRM_INFO_ONCE("Display Core has been requested via kernel parameter "
3038	3038	"but isn't supported by ASIC, ignoring\n");
3039	3039	return false;
3040	3040	}

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c+2−0

@@ -1085,6 +1085,8 @@ static const struct pci_device_id pciidlist[] = { · 1084 unmodified lines
1085	1085
1086	1086	/* Renoir */
1087	1087	{0x1002, 0x1636, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR\|AMD_IS_APU},
	1088	+ {0x1002, 0x1638, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR\|AMD_IS_APU},
	1089	+ {0x1002, 0x164C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR\|AMD_IS_APU},
1088	1090
1089	1091	/* Navi12 */
1090	1092	{0x1002, 0x7360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI12},

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c+46−2

@@ -99,6 +99,10 @@ · 98 unmodified lines
99	99	#define mmGCR_GENERAL_CNTL_Sienna_Cichlid 0x1580
100	100	#define mmGCR_GENERAL_CNTL_Sienna_Cichlid_BASE_IDX 0
101	101
	102	+#define mmGOLDEN_TSC_COUNT_UPPER_Vangogh 0x0025
	103	+#define mmGOLDEN_TSC_COUNT_UPPER_Vangogh_BASE_IDX 1
	104	+#define mmGOLDEN_TSC_COUNT_LOWER_Vangogh 0x0026
	105	+#define mmGOLDEN_TSC_COUNT_LOWER_Vangogh_BASE_IDX 1
102	106	#define mmSPI_CONFIG_CNTL_1_Vangogh 0x2441
103	107	#define mmSPI_CONFIG_CNTL_1_Vangogh_BASE_IDX 1
104	108	#define mmVGT_TF_MEMORY_BASE_HI_Vangogh 0x2261
@@ -160,6 +164,9 @@ · 55 unmodified lines
160	164	#define mmGCVM_L2_CGTT_CLK_CTRL_Sienna_Cichlid 0x15db
161	165	#define mmGCVM_L2_CGTT_CLK_CTRL_Sienna_Cichlid_BASE_IDX 0
162	166
	167	+#define mmGC_THROTTLE_CTRL_Sienna_Cichlid 0x2030
	168	+#define mmGC_THROTTLE_CTRL_Sienna_Cichlid_BASE_IDX 0
	169	+
163	170	MODULE_FIRMWARE("amdgpu/navi10_ce.bin");
164	171	MODULE_FIRMWARE("amdgpu/navi10_pfp.bin");
165	172	MODULE_FIRMWARE("amdgpu/navi10_me.bin");
@@ -3324,6 +3331,7 @@ static void gfx_v10_0_ring_emit_de_meta(struct amdgpu_ring *ring, bool resume); · 3158 unmodified lines
3324	3331	static void gfx_v10_0_ring_emit_frame_cntl(struct amdgpu_ring *ring, bool start, bool secure);
3325	3332	static u32 gfx_v10_3_get_disabled_sa(struct amdgpu_device *adev);
3326	3333	static void gfx_v10_3_program_pbb_mode(struct amdgpu_device *adev);
	3334	+static void gfx_v10_3_set_power_brake_sequence(struct amdgpu_device *adev);
3327	3335
3328	3336	static void gfx10_kiq_set_resources(struct amdgpu_ring *kiq_ring, uint64_t queue_mask)
3329	3337	{
@@ -7192,6 +7200,9 @@ static int gfx_v10_0_hw_init(void *handle) · 3862 unmodified lines
7192	7200	if (adev->asic_type == CHIP_SIENNA_CICHLID)
7193	7201	gfx_v10_3_program_pbb_mode(adev);
7194	7202
	7203	+ if (adev->asic_type >= CHIP_SIENNA_CICHLID)
	7204	+ gfx_v10_3_set_power_brake_sequence(adev);
	7205	+
7195	7206	return r;
7196	7207	}
7197	7208
@@ -7377,8 +7388,16 @@ static uint64_t gfx_v10_0_get_gpu_clock_counter(struct amdgpu_device *adev) · 179 unmodified lines
7377	7388
7378	7389	amdgpu_gfx_off_ctrl(adev, false);
7379	7390	mutex_lock(&adev->gfx.gpu_clock_mutex);
7380		− clock = (uint64_t)RREG32_SOC15(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER) \|
7381		− ((uint64_t)RREG32_SOC15(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER) << 32ULL);
	7391	+ switch (adev->asic_type) {
	7392	+ case CHIP_VANGOGH:
	7393	+ clock = (uint64_t)RREG32_SOC15(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER_Vangogh) \|
	7394	+ ((uint64_t)RREG32_SOC15(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER_Vangogh) << 32ULL);
	7395	+ break;
	7396	+ default:
	7397	+ clock = (uint64_t)RREG32_SOC15(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER) \|
	7398	+ ((uint64_t)RREG32_SOC15(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER) << 32ULL);
	7399	+ break;
	7400	+ }
7382	7401	mutex_unlock(&adev->gfx.gpu_clock_mutex);
7383	7402	amdgpu_gfx_off_ctrl(adev, true);
7384	7403	return clock;
@@ -9169,6 +9188,31 @@ static void gfx_v10_3_program_pbb_mode(struct amdgpu_device *adev) · 1784 unmodified lines
9169	9188	}
9170	9189	}
9171	9190
	9191	+static void gfx_v10_3_set_power_brake_sequence(struct amdgpu_device *adev)
	9192	+{
	9193	+ WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX,
	9194	+ (0x1 << GRBM_GFX_INDEX__SA_BROADCAST_WRITES__SHIFT) \|
	9195	+ (0x1 << GRBM_GFX_INDEX__INSTANCE_BROADCAST_WRITES__SHIFT) \|
	9196	+ (0x1 << GRBM_GFX_INDEX__SE_BROADCAST_WRITES__SHIFT));
	9197	+
	9198	+ WREG32_SOC15(GC, 0, mmGC_CAC_IND_INDEX, ixPWRBRK_STALL_PATTERN_CTRL);
	9199	+ WREG32_SOC15(GC, 0, mmGC_CAC_IND_DATA,
	9200	+ (0x1 << PWRBRK_STALL_PATTERN_CTRL__PWRBRK_STEP_INTERVAL__SHIFT) \|
	9201	+ (0x12 << PWRBRK_STALL_PATTERN_CTRL__PWRBRK_BEGIN_STEP__SHIFT) \|
	9202	+ (0x13 << PWRBRK_STALL_PATTERN_CTRL__PWRBRK_END_STEP__SHIFT) \|
	9203	+ (0xf << PWRBRK_STALL_PATTERN_CTRL__PWRBRK_THROTTLE_PATTERN_BIT_NUMS__SHIFT));
	9204	+
	9205	+ WREG32_SOC15(GC, 0, mmGC_THROTTLE_CTRL_Sienna_Cichlid,
	9206	+ (0x1 << GC_THROTTLE_CTRL__PWRBRK_STALL_EN__SHIFT) \|
	9207	+ (0x1 << GC_THROTTLE_CTRL__PATTERN_MODE__SHIFT) \|
	9208	+ (0x5 << GC_THROTTLE_CTRL__RELEASE_STEP_INTERVAL__SHIFT));
	9209	+
	9210	+ WREG32_SOC15(GC, 0, mmDIDT_IND_INDEX, ixDIDT_SQ_THROTTLE_CTRL);
	9211	+
	9212	+ WREG32_SOC15(GC, 0, mmDIDT_IND_DATA,
	9213	+ (0x1 << DIDT_SQ_THROTTLE_CTRL__PWRBRK_STALL_EN__SHIFT));
	9214	+}
	9215	+
9172	9216	const struct amdgpu_ip_block_version gfx_v10_0_ip_block =
9173	9217	{
9174	9218	.type = AMD_IP_BLOCK_TYPE_GFX,

drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h+1−1

@@ -47,7 +47,7 @@ enum psp_gfx_crtl_cmd_id · 46 unmodified lines
47	47	GFX_CTRL_CMD_ID_DISABLE_INT = 0x00060000, /* disable PSP-to-Gfx interrupt */
48	48	GFX_CTRL_CMD_ID_MODE1_RST = 0x00070000, /* trigger the Mode 1 reset */
49	49	GFX_CTRL_CMD_ID_GBR_IH_SET = 0x00080000, /* set Gbr IH_RB_CNTL registers */
50		− GFX_CTRL_CMD_ID_CONSUME_CMD = 0x000A0000, /* send interrupt to psp for updating write pointer of vf */
	50	+ GFX_CTRL_CMD_ID_CONSUME_CMD = 0x00090000, /* send interrupt to psp for updating write pointer of vf */
51	51	GFX_CTRL_CMD_ID_DESTROY_GPCOM_RING = 0x000C0000, /* destroy GPCOM ring */
52	52
53	53	GFX_CTRL_CMD_ID_MAX = 0x000F0000, /* max command ID */

drivers/gpu/drm/amd/amdgpu/soc15.c+2−1

@@ -1239,7 +1239,8 @@ static int soc15_common_early_init(void *handle) · 1238 unmodified lines
1239	1239	break;
1240	1240	case CHIP_RENOIR:
1241	1241	adev->asic_funcs = &soc15_asic_funcs;
1242		− if (adev->pdev->device == 0x1636)
	1242	+ if ((adev->pdev->device == 0x1636) \|\|
	1243	+ (adev->pdev->device == 0x164c))
1243	1244	adev->apu_flags \|= AMD_APU_IS_RENOIR;
1244	1245	else
1245	1246	adev->apu_flags \|= AMD_APU_IS_GREEN_SARDINE;

drivers/gpu/drm/amd/amdkfd/kfd_crat.c+7−4

@@ -1040,11 +1040,14 @@ static int kfd_create_vcrat_image_cpu(void pcrat_image, size_t size) · 1039 unmodified lines
1040	1040	(struct crat_subtype_iolink *)sub_type_hdr);
1041	1041	if (ret < 0)
1042	1042	return ret;
1043		− crat_table->length += (sub_type_hdr->length * entries);
1044		− crat_table->total_entries += entries;
1045	1043
1046		− sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr +
1047		− sub_type_hdr->length * entries);
	1044	+ if (entries) {
	1045	+ crat_table->length += (sub_type_hdr->length * entries);
	1046	+ crat_table->total_entries += entries;
	1047	+
	1048	+ sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr +
	1049	+ sub_type_hdr->length * entries);
	1050	+ }
1048	1051	#else
1049	1052	pr_info("IO link not available for non x86 platforms\n");
1050	1053	#endif

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+9−133

@@ -939,41 +939,6 @@ static void mmhub_read_system_context(struct amdgpu_device *adev, struct dc_phy_ · 938 unmodified lines
939	939	}
940	940	#endif
941	941
942		−#ifdef CONFIG_DEBUG_FS
943		−static int create_crtc_crc_properties(struct amdgpu_display_manager *dm)
944		−{
945		− dm->crc_win_x_start_property =
946		− drm_property_create_range(adev_to_drm(dm->adev),
947		− DRM_MODE_PROP_ATOMIC,
948		− "AMD_CRC_WIN_X_START", 0, U16_MAX);
949		− if (!dm->crc_win_x_start_property)
950		− return -ENOMEM;
951		−
952		− dm->crc_win_y_start_property =
953		− drm_property_create_range(adev_to_drm(dm->adev),
954		− DRM_MODE_PROP_ATOMIC,
955		− "AMD_CRC_WIN_Y_START", 0, U16_MAX);
956		− if (!dm->crc_win_y_start_property)
957		− return -ENOMEM;
958		−
959		− dm->crc_win_x_end_property =
960		− drm_property_create_range(adev_to_drm(dm->adev),
961		− DRM_MODE_PROP_ATOMIC,
962		− "AMD_CRC_WIN_X_END", 0, U16_MAX);
963		− if (!dm->crc_win_x_end_property)
964		− return -ENOMEM;
965		−
966		− dm->crc_win_y_end_property =
967		− drm_property_create_range(adev_to_drm(dm->adev),
968		− DRM_MODE_PROP_ATOMIC,
969		− "AMD_CRC_WIN_Y_END", 0, U16_MAX);
970		− if (!dm->crc_win_y_end_property)
971		− return -ENOMEM;
972		−
973		− return 0;
974		−}
975		−#endif
976		−
977	942	static int amdgpu_dm_init(struct amdgpu_device *adev)
978	943	{
979	944	struct dc_init_data init_data;
@@ -1120,10 +1085,6 @@ static int amdgpu_dm_init(struct amdgpu_device *adev) · 140 unmodified lines
1120	1085
1121	1086	dc_init_callbacks(adev->dm.dc, &init_params);
1122	1087	}
1123		−#endif
1124		−#ifdef CONFIG_DEBUG_FS
1125		− if (create_crtc_crc_properties(&adev->dm))
1126		− DRM_ERROR("amdgpu: failed to create crc property.\n");
1127	1088	#endif
1128	1089	if (amdgpu_dm_initialize_drm_device(adev)) {
1129	1090	DRM_ERROR(
@@ -5333,64 +5294,12 @@ dm_crtc_duplicate_state(struct drm_crtc *crtc) · 4203 unmodified lines
5333	5294	state->crc_src = cur->crc_src;
5334	5295	state->cm_has_degamma = cur->cm_has_degamma;
5335	5296	state->cm_is_degamma_srgb = cur->cm_is_degamma_srgb;
5336		−#ifdef CONFIG_DEBUG_FS
5337		− state->crc_window = cur->crc_window;
5338		−#endif
	5297	+
5339	5298	/* TODO Duplicate dc_stream after objects are stream object is flattened */
5340	5299
5341	5300	return &state->base;
5342	5301	}
5343	5302
5344		−#ifdef CONFIG_DEBUG_FS
5345		−static int amdgpu_dm_crtc_atomic_set_property(struct drm_crtc *crtc,
5346		− struct drm_crtc_state *crtc_state,
5347		− struct drm_property *property,
5348		− uint64_t val)
5349		−{
5350		− struct drm_device *dev = crtc->dev;
5351		− struct amdgpu_device *adev = drm_to_adev(dev);
5352		− struct dm_crtc_state *dm_new_state =
5353		− to_dm_crtc_state(crtc_state);
5354		−
5355		− if (property == adev->dm.crc_win_x_start_property)
5356		− dm_new_state->crc_window.x_start = val;
5357		− else if (property == adev->dm.crc_win_y_start_property)
5358		− dm_new_state->crc_window.y_start = val;
5359		− else if (property == adev->dm.crc_win_x_end_property)
5360		− dm_new_state->crc_window.x_end = val;
5361		− else if (property == adev->dm.crc_win_y_end_property)
5362		− dm_new_state->crc_window.y_end = val;
5363		− else
5364		− return -EINVAL;
5365		−
5366		− return 0;
5367		−}
5368		−
5369		−static int amdgpu_dm_crtc_atomic_get_property(struct drm_crtc *crtc,
5370		− const struct drm_crtc_state *state,
5371		− struct drm_property *property,
5372		− uint64_t *val)
5373		−{
5374		− struct drm_device *dev = crtc->dev;
5375		− struct amdgpu_device *adev = drm_to_adev(dev);
5376		− struct dm_crtc_state *dm_state =
5377		− to_dm_crtc_state(state);
5378		−
5379		− if (property == adev->dm.crc_win_x_start_property)
5380		− *val = dm_state->crc_window.x_start;
5381		− else if (property == adev->dm.crc_win_y_start_property)
5382		− *val = dm_state->crc_window.y_start;
5383		− else if (property == adev->dm.crc_win_x_end_property)
5384		− *val = dm_state->crc_window.x_end;
5385		− else if (property == adev->dm.crc_win_y_end_property)
5386		− *val = dm_state->crc_window.y_end;
5387		− else
5388		− return -EINVAL;
5389		−
5390		− return 0;
5391		−}
5392		−#endif
5393		−
5394	5303	static inline int dm_set_vupdate_irq(struct drm_crtc *crtc, bool enable)
5395	5304	{
5396	5305	enum dc_irq_source irq_source;
@@ -5457,10 +5366,6 @@ static const struct drm_crtc_funcs amdgpu_dm_crtc_funcs = { · 60 unmodified lines
5457	5366	.enable_vblank = dm_enable_vblank,
5458	5367	.disable_vblank = dm_disable_vblank,
5459	5368	.get_vblank_timestamp = drm_crtc_vblank_helper_get_vblank_timestamp,
5460		−#ifdef CONFIG_DEBUG_FS
5461		− .atomic_set_property = amdgpu_dm_crtc_atomic_set_property,
5462		− .atomic_get_property = amdgpu_dm_crtc_atomic_get_property,
5463		−#endif
5464	5369	};
5465	5370
5466	5371	static enum drm_connector_status
@@ -6662,25 +6567,6 @@ static int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm, · 1195 unmodified lines
6662	6567	return 0;
6663	6568	}
6664	6569
6665		−#ifdef CONFIG_DEBUG_FS
6666		−static void attach_crtc_crc_properties(struct amdgpu_display_manager *dm,
6667		− struct amdgpu_crtc *acrtc)
6668		−{
6669		− drm_object_attach_property(&acrtc->base.base,
6670		− dm->crc_win_x_start_property,
6671		− 0);
6672		− drm_object_attach_property(&acrtc->base.base,
6673		− dm->crc_win_y_start_property,
6674		− 0);
6675		− drm_object_attach_property(&acrtc->base.base,
6676		− dm->crc_win_x_end_property,
6677		− 0);
6678		− drm_object_attach_property(&acrtc->base.base,
6679		− dm->crc_win_y_end_property,
6680		− 0);
6681		−}
6682		−#endif
6683		−
6684	6570	static int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm,
6685	6571	struct drm_plane *plane,
6686	6572	uint32_t crtc_index)
@@ -6728,9 +6614,7 @@ static int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm, · 41 unmodified lines
6728	6614	drm_crtc_enable_color_mgmt(&acrtc->base, MAX_COLOR_LUT_ENTRIES,
6729	6615	true, MAX_COLOR_LUT_ENTRIES);
6730	6616	drm_mode_crtc_set_gamma_size(&acrtc->base, MAX_COLOR_LEGACY_LUT_ENTRIES);
6731		−#ifdef CONFIG_DEBUG_FS
6732		− attach_crtc_crc_properties(dm, acrtc);
6733		−#endif
	6617	+
6734	6618	return 0;
6735	6619
6736	6620	fail:
@@ -8367,7 +8251,6 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) · 1630 unmodified lines
8367	8251	*/
8368	8252	for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
8369	8253	struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
8370		− bool configure_crc = false;
8371	8254
8372	8255	dm_new_crtc_state = to_dm_crtc_state(new_crtc_state);
8373	8256
@@ -8377,27 +8260,20 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) · 3 unmodified lines
8377	8260	dc_stream_retain(dm_new_crtc_state->stream);
8378	8261	acrtc->dm_irq_params.stream = dm_new_crtc_state->stream;
8379	8262	manage_dm_interrupts(adev, acrtc, true);
8380		− }
8381		− if (IS_ENABLED(CONFIG_DEBUG_FS) && new_crtc_state->active &&
8382		− amdgpu_dm_is_valid_crc_source(dm_new_crtc_state->crc_src)) {
	8263	+
	8264	+#ifdef CONFIG_DEBUG_FS
8383	8265	/**
8384	8266	* Frontend may have changed so reapply the CRC capture
8385	8267	* settings for the stream.
8386	8268	*/
8387	8269	dm_new_crtc_state = to_dm_crtc_state(new_crtc_state);
8388		− dm_old_crtc_state = to_dm_crtc_state(old_crtc_state);
8389	8270
8390		− if (amdgpu_dm_crc_window_is_default(dm_new_crtc_state)) {
8391		− if (!old_crtc_state->active \|\| drm_atomic_crtc_needs_modeset(new_crtc_state))
8392		− configure_crc = true;
8393		− } else {
8394		− if (amdgpu_dm_crc_window_changed(dm_new_crtc_state, dm_old_crtc_state))
8395		− configure_crc = true;
8396		− }
8397		−
8398		− if (configure_crc)
	8271	+ if (amdgpu_dm_is_valid_crc_source(dm_new_crtc_state->crc_src)) {
8399	8272	amdgpu_dm_crtc_configure_crc_source(
8400		− crtc, dm_new_crtc_state, dm_new_crtc_state->crc_src);
	8273	+ crtc, dm_new_crtc_state,
	8274	+ dm_new_crtc_state->crc_src);
	8275	+ }
	8276	+#endif
8401	8277	}
8402	8278	}
8403	8279

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h+0−38

@@ -336,32 +336,6 @@ struct amdgpu_display_manager { · 335 unmodified lines
336	336	*/
337	337	const struct gpu_info_soc_bounding_box_v1_0 *soc_bounding_box;
338	338
339		−#ifdef CONFIG_DEBUG_FS
340		− /**
341		− * @crc_win_x_start_property:
342		− *
343		− * X start of the crc calculation window
344		− */
345		− struct drm_property *crc_win_x_start_property;
346		− /**
347		− * @crc_win_y_start_property:
348		− *
349		− * Y start of the crc calculation window
350		− */
351		− struct drm_property *crc_win_y_start_property;
352		− /**
353		− * @crc_win_x_end_property:
354		− *
355		− * X end of the crc calculation window
356		− */
357		− struct drm_property *crc_win_x_end_property;
358		− /**
359		− * @crc_win_y_end_property:
360		− *
361		− * Y end of the crc calculation window
362		− */
363		− struct drm_property *crc_win_y_end_property;
364		−#endif
365	339	/**
366	340	* @mst_encoders:
367	341	*
@@ -448,15 +422,6 @@ struct dm_plane_state { · 80 unmodified lines
448	422	struct dc_plane_state *dc_state;
449	423	};
450	424
451		−#ifdef CONFIG_DEBUG_FS
452		−struct crc_rec {
453		− uint16_t x_start;
454		− uint16_t y_start;
455		− uint16_t x_end;
456		− uint16_t y_end;
457		− };
458		−#endif
459		−
460	425	struct dm_crtc_state {
461	426	struct drm_crtc_state base;
462	427	struct dc_stream_state *stream;
@@ -479,9 +444,6 @@ struct dm_crtc_state { · 16 unmodified lines
479	444	struct dc_info_packet vrr_infopacket;
480	445
481	446	int abm_level;
482		−#ifdef CONFIG_DEBUG_FS
483		− struct crc_rec crc_window;
484		−#endif
485	447	};
486	448
487	449	#define to_dm_crtc_state(x) container_of(x, struct dm_crtc_state, base)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c+1−53

@@ -81,41 +81,6 @@ const char const amdgpu_dm_crtc_get_crc_sources(struct drm_crtc *crtc, · 80 unmodified lines
81	81	return pipe_crc_sources;
82	82	}
83	83
84		−static void amdgpu_dm_set_crc_window_default(struct dm_crtc_state *dm_crtc_state)
85		−{
86		− dm_crtc_state->crc_window.x_start = 0;
87		− dm_crtc_state->crc_window.y_start = 0;
88		− dm_crtc_state->crc_window.x_end = 0;
89		− dm_crtc_state->crc_window.y_end = 0;
90		−}
91		−
92		−bool amdgpu_dm_crc_window_is_default(struct dm_crtc_state *dm_crtc_state)
93		−{
94		− bool ret = true;
95		−
96		− if ((dm_crtc_state->crc_window.x_start != 0) \|\|
97		− (dm_crtc_state->crc_window.y_start != 0) \|\|
98		− (dm_crtc_state->crc_window.x_end != 0) \|\|
99		− (dm_crtc_state->crc_window.y_end != 0))
100		− ret = false;
101		−
102		− return ret;
103		−}
104		−
105		−bool amdgpu_dm_crc_window_changed(struct dm_crtc_state *dm_new_crtc_state,
106		− struct dm_crtc_state *dm_old_crtc_state)
107		−{
108		− bool ret = false;
109		−
110		− if ((dm_new_crtc_state->crc_window.x_start != dm_old_crtc_state->crc_window.x_start) \|\|
111		− (dm_new_crtc_state->crc_window.y_start != dm_old_crtc_state->crc_window.y_start) \|\|
112		− (dm_new_crtc_state->crc_window.x_end != dm_old_crtc_state->crc_window.x_end) \|\|
113		− (dm_new_crtc_state->crc_window.y_end != dm_old_crtc_state->crc_window.y_end))
114		− ret = true;
115		−
116		− return ret;
117		−}
118		−
119	84	int
120	85	amdgpu_dm_crtc_verify_crc_source(struct drm_crtc crtc, const char src_name,
121	86	size_t *values_cnt)
@@ -140,7 +105,6 @@ int amdgpu_dm_crtc_configure_crc_source(struct drm_crtc *crtc, · 18 unmodified lines
140	105	struct dc_stream_state *stream_state = dm_crtc_state->stream;
141	106	bool enable = amdgpu_dm_is_valid_crc_source(source);
142	107	int ret = 0;
143		− struct crc_params *crc_window = NULL, tmp_window;
144	108
145	109	/* Configuration will be deferred to stream enable. */
146	110	if (!stream_state)
@@ -150,24 +114,8 @@ int amdgpu_dm_crtc_configure_crc_source(struct drm_crtc *crtc, · 3 unmodified lines
150	114
151	115	/* Enable CRTC CRC generation if necessary. */
152	116	if (dm_is_crc_source_crtc(source) \|\| source == AMDGPU_DM_PIPE_CRC_SOURCE_NONE) {
153		− if (!enable)
154		− amdgpu_dm_set_crc_window_default(dm_crtc_state);
155		−
156		− if (!amdgpu_dm_crc_window_is_default(dm_crtc_state)) {
157		− crc_window = &tmp_window;
158		−
159		− tmp_window.windowa_x_start = dm_crtc_state->crc_window.x_start;
160		− tmp_window.windowa_y_start = dm_crtc_state->crc_window.y_start;
161		− tmp_window.windowa_x_end = dm_crtc_state->crc_window.x_end;
162		− tmp_window.windowa_y_end = dm_crtc_state->crc_window.y_end;
163		− tmp_window.windowb_x_start = dm_crtc_state->crc_window.x_start;
164		− tmp_window.windowb_y_start = dm_crtc_state->crc_window.y_start;
165		− tmp_window.windowb_x_end = dm_crtc_state->crc_window.x_end;
166		− tmp_window.windowb_y_end = dm_crtc_state->crc_window.y_end;
167		− }
168		−
169	117	if (!dc_stream_configure_crc(stream_state->ctx->dc,
170		− stream_state, crc_window, enable, enable)) {
	118	+ stream_state, NULL, enable, enable)) {
171	119	ret = -EINVAL;
172	120	goto unlock;
173	121	}

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h+1−4

@@ -46,13 +46,10 @@ static inline bool amdgpu_dm_is_valid_crc_source(enum amdgpu_dm_pipe_crc_source · 45 unmodified lines
46	46	}
47	47
48	48	/* amdgpu_dm_crc.c */
49		−bool amdgpu_dm_crc_window_is_default(struct dm_crtc_state *dm_crtc_state);
50		−bool amdgpu_dm_crc_window_changed(struct dm_crtc_state *dm_new_crtc_state,
51		− struct dm_crtc_state *dm_old_crtc_state);
	49	+#ifdef CONFIG_DEBUG_FS
52	50	int amdgpu_dm_crtc_configure_crc_source(struct drm_crtc *crtc,
53	51	struct dm_crtc_state *dm_crtc_state,
54	52	enum amdgpu_dm_pipe_crc_source source);
55		−#ifdef CONFIG_DEBUG_FS
56	53	int amdgpu_dm_crtc_set_crc_source(struct drm_crtc crtc, const char src_name);
57	54	int amdgpu_dm_crtc_verify_crc_source(struct drm_crtc *crtc,
58	55	const char *src_name,

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c+7−1

@@ -3992,7 +3992,7 @@ bool dc_link_dp_set_test_pattern( · 3991 unmodified lines
3992	3992	unsigned int cust_pattern_size)
3993	3993	{
3994	3994	struct pipe_ctx *pipes = link->dc->current_state->res_ctx.pipe_ctx;
3995		− struct pipe_ctx *pipe_ctx = &pipes[0];
	3995	+ struct pipe_ctx *pipe_ctx = NULL;
3996	3996	unsigned int lane;
3997	3997	unsigned int i;
3998	3998	unsigned char link_qual_pattern[LANE_COUNT_DP_MAX] = {0};
@@ -4002,12 +4002,18 @@ bool dc_link_dp_set_test_pattern( · 3 unmodified lines
4002	4002	memset(&training_pattern, 0, sizeof(training_pattern));
4003	4003
4004	4004	for (i = 0; i < MAX_PIPES; i++) {
	4005	+ if (pipes[i].stream == NULL)
	4006	+ continue;
	4007	+
4005	4008	if (pipes[i].stream->link == link && !pipes[i].top_pipe && !pipes[i].prev_odm_pipe) {
4006	4009	pipe_ctx = &pipes[i];
4007	4010	break;
4008	4011	}
4009	4012	}
4010	4013
	4014	+ if (pipe_ctx == NULL)
	4015	+ return false;
	4016	+
4011	4017	/* Reset CRTC Test Pattern if it is currently running and request is VideoMode */
4012	4018	if (link->test_pattern_enabled && test_pattern ==
4013	4019	DP_TEST_PATTERN_VIDEO_MODE) {

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c+1−1

@@ -470,7 +470,7 @@ void mpc1_cursor_lock(struct mpc *mpc, int opp_id, bool lock) · 469 unmodified lines
470	470	unsigned int mpc1_get_mpc_out_mux(struct mpc *mpc, int opp_id)
471	471	{
472	472	struct dcn10_mpc *mpc10 = TO_DCN10_MPC(mpc);
473		− uint32_t val = 0;
	473	+ uint32_t val = 0xf;
474	474
475	475	if (opp_id < MAX_OPP && REG(MUX[opp_id]))
476	476	REG_GET(MUX[opp_id], MPC_OUT_MUX, &val);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c+2−2

@@ -608,8 +608,8 @@ static const struct dc_debug_options debug_defaults_drv = { · 607 unmodified lines
608	608	.disable_pplib_clock_request = false,
609	609	.disable_pplib_wm_range = false,
610	610	.pplib_wm_report_mode = WM_REPORT_DEFAULT,
611		− .pipe_split_policy = MPC_SPLIT_DYNAMIC,
612		− .force_single_disp_pipe_split = true,
	611	+ .pipe_split_policy = MPC_SPLIT_AVOID,
	612	+ .force_single_disp_pipe_split = false,
613	613	.disable_dcc = DCC_ENABLE,
614	614	.voltage_align_fclk = true,
615	615	.disable_stereo_support = true,

drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c+1−0

@@ -1731,6 +1731,7 @@ static struct resource_funcs dcn301_res_pool_funcs = { · 1730 unmodified lines
1731	1731	.populate_dml_pipes = dcn30_populate_dml_pipes_from_context,
1732	1732	.acquire_idle_pipe_for_layer = dcn20_acquire_idle_pipe_for_layer,
1733	1733	.add_stream_to_ctx = dcn30_add_stream_to_ctx,
	1734	+ .add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource,
1734	1735	.remove_stream_from_ctx = dcn20_remove_stream_from_ctx,
1735	1736	.populate_dml_writeback_from_context = dcn30_populate_dml_writeback_from_context,
1736	1737	.set_mcif_arb_params = dcn30_set_mcif_arb_params,

drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c+6−5

@@ -2635,14 +2635,15 @@ static void dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndP · 2634 unmodified lines
2635	2635	}
2636	2636
2637	2637	if (mode_lib->vba.DRAMClockChangeSupportsVActive &&
2638		− mode_lib->vba.MinActiveDRAMClockChangeMargin > 60 &&
2639		− mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb] == 0) {
	2638	+ mode_lib->vba.MinActiveDRAMClockChangeMargin > 60) {
2640	2639	mode_lib->vba.DRAMClockChangeWatermark += 25;
2641	2640
2642	2641	for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) {
2643		− if (mode_lib->vba.DRAMClockChangeWatermark >
2644		− dml_max(mode_lib->vba.StutterEnterPlusExitWatermark, mode_lib->vba.UrgentWatermark))
2645		− mode_lib->vba.MinTTUVBlank[k] += 25;
	2642	+ if (mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb] == 0) {
	2643	+ if (mode_lib->vba.DRAMClockChangeWatermark >
	2644	+ dml_max(mode_lib->vba.StutterEnterPlusExitWatermark, mode_lib->vba.UrgentWatermark))
	2645	+ mode_lib->vba.MinTTUVBlank[k] += 25;
	2646	+ }
2646	2647	}
2647	2648
2648	2649	mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;

drivers/gpu/drm/drm_plane.c+8−1

@@ -1163,7 +1163,14 @@ retry: · 1162 unmodified lines
1163	1163	if (ret)
1164	1164	goto out;
1165	1165
1166		− if (old_fb->format != fb->format) {
	1166	+ /*
	1167	+ * Only check the FOURCC format code, excluding modifiers. This is
	1168	+ * enough for all legacy drivers. Atomic drivers have their own
	1169	+ * checks in their ->atomic_check implementation, which will
	1170	+ * return -EINVAL if any hw or driver constraint is violated due
	1171	+ * to modifier changes.
	1172	+ */
	1173	+ if (old_fb->format->format != fb->format->format) {
1167	1174	DRM_DEBUG_KMS("Page flip is not allowed to change frame buffer format.\n");
1168	1175	ret = -EINVAL;
1169	1176	goto out;

drivers/gpu/drm/i915/Makefile+1−0

@@ -38,6 +38,7 @@ i915-y += i915_drv.o \ · 37 unmodified lines
38	38	i915_config.o \
39	39	i915_irq.o \
40	40	i915_getparam.o \
	41	+ i915_mitigations.o \
41	42	i915_params.o \
42	43	i915_pci.o \
43	44	i915_scatterlist.o \

drivers/gpu/drm/i915/display/icl_dsi.c+0−4

@@ -1616,10 +1616,6 @@ static void gen11_dsi_get_power_domains(struct intel_encoder *encoder, · 1615 unmodified lines
1616	1616
1617	1617	get_dsi_io_power_domains(i915,
1618	1618	enc_to_intel_dsi(encoder));
1619		−
1620		− if (crtc_state->dsc.compression_enable)
1621		− intel_display_power_get(i915,
1622		− intel_dsc_power_domain(crtc_state));
1623	1619	}
1624	1620
1625	1621	static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder,

drivers/gpu/drm/i915/display/intel_panel.c+5−4

@@ -1650,16 +1650,13 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus · 1649 unmodified lines
1650	1650	val = pch_get_backlight(connector);
1651	1651	else
1652	1652	val = lpt_get_backlight(connector);
1653		− val = intel_panel_compute_brightness(connector, val);
1654		− panel->backlight.level = clamp(val, panel->backlight.min,
1655		− panel->backlight.max);
1656	1653
1657	1654	if (cpu_mode) {
1658	1655	drm_dbg_kms(&dev_priv->drm,
1659	1656	"CPU backlight register was enabled, switching to PCH override\n");
1660	1657
1661	1658	/* Write converted CPU PWM value to PCH override register */
1662		− lpt_set_backlight(connector->base.state, panel->backlight.level);
	1659	+ lpt_set_backlight(connector->base.state, val);
1663	1660	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1,
1664	1661	pch_ctl1 \| BLM_PCH_OVERRIDE_ENABLE);
1665	1662
@@ -1667,6 +1664,10 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus · 1 unmodified line
1667	1664	cpu_ctl2 & ~BLM_PWM_ENABLE);
1668	1665	}
1669	1666
	1667	+ val = intel_panel_compute_brightness(connector, val);
	1668	+ panel->backlight.level = clamp(val, panel->backlight.min,
	1669	+ panel->backlight.max);
	1670	+
1670	1671	return 0;
1671	1672	}
1672	1673

drivers/gpu/drm/i915/display/vlv_dsi.c+13−3

@@ -812,10 +812,20 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state, · 811 unmodified lines
812	812	intel_dsi_prepare(encoder, pipe_config);
813	813
814	814	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_POWER_ON);
815		− intel_dsi_msleep(intel_dsi, intel_dsi->panel_on_delay);
816	815
817		− /* Deassert reset */
818		− intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET);
	816	+ /*
	817	+ * Give the panel time to power-on and then deassert its reset.
	818	+ * Depending on the VBT MIPI sequences version the deassert-seq
	819	+ * may contain the necessary delay, intel_dsi_msleep() will skip
	820	+ * the delay in that case. If there is no deassert-seq, then an
	821	+ * unconditional msleep is used to give the panel time to power-on.
	822	+ */
	823	+ if (dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) {
	824	+ intel_dsi_msleep(intel_dsi, intel_dsi->panel_on_delay);
	825	+ intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET);
	826	+ } else {
	827	+ msleep(intel_dsi->panel_on_delay);
	828	+ }
819	829
820	830	if (IS_GEMINILAKE(dev_priv)) {
821	831	glk_cold_boot = glk_dsi_enable_io(encoder);

drivers/gpu/drm/i915/gt/gen7_renderclear.c+94−63

@@ -7,8 +7,6 @@ · 6 unmodified lines
7	7	#include "i915_drv.h"
8	8	#include "intel_gpu_commands.h"
9	9
10		−#define MAX_URB_ENTRIES 64
11		−#define STATE_SIZE (4 * 1024)
12	10	#define GT3_INLINE_DATA_DELAYS 0x1E00
13	11	#define batch_advance(Y, CS) GEM_BUG_ON((Y)->end != (CS))
14	12
@@ -34,38 +32,59 @@ struct batch_chunk { · 19 unmodified lines
34	32	};
35	33
36	34	struct batch_vals {
37		− u32 max_primitives;
38		− u32 max_urb_entries;
39		− u32 cmd_size;
40		− u32 state_size;
	35	+ u32 max_threads;
41	36	u32 state_start;
42		− u32 batch_size;
	37	+ u32 surface_start;
43	38	u32 surface_height;
44	39	u32 surface_width;
45		− u32 scratch_size;
46		− u32 max_size;
	40	+ u32 size;
47	41	};
48	42
	43	+static inline int num_primitives(const struct batch_vals *bv)
	44	+{
	45	+ /*
	46	+ * We need to saturate the GPU with work in order to dispatch
	47	+ * a shader on every HW thread, and clear the thread-local registers.
	48	+ * In short, we have to dispatch work faster than the shaders can
	49	+ * run in order to fill the EU and occupy each HW thread.
	50	+ */
	51	+ return bv->max_threads;
	52	+}
	53	+
49	54	static void
50	55	batch_get_defaults(struct drm_i915_private i915, struct batch_vals bv)
51	56	{
52	57	if (IS_HASWELL(i915)) {
53		− bv->max_primitives = 280;
54		− bv->max_urb_entries = MAX_URB_ENTRIES;
	58	+ switch (INTEL_INFO(i915)->gt) {
	59	+ default:
	60	+ case 1:
	61	+ bv->max_threads = 70;
	62	+ break;
	63	+ case 2:
	64	+ bv->max_threads = 140;
	65	+ break;
	66	+ case 3:
	67	+ bv->max_threads = 280;
	68	+ break;
	69	+ }
55	70	bv->surface_height = 16 * 16;
56	71	bv->surface_width = 32 * 2 * 16;
57	72	} else {
58		− bv->max_primitives = 128;
59		− bv->max_urb_entries = MAX_URB_ENTRIES / 2;
	73	+ switch (INTEL_INFO(i915)->gt) {
	74	+ default:
	75	+ case 1: /* including vlv */
	76	+ bv->max_threads = 36;
	77	+ break;
	78	+ case 2:
	79	+ bv->max_threads = 128;
	80	+ break;
	81	+ }
60	82	bv->surface_height = 16 * 8;
61	83	bv->surface_width = 32 * 16;
62	84	}
63		− bv->cmd_size = bv->max_primitives * 4096;
64		− bv->state_size = STATE_SIZE;
65		− bv->state_start = bv->cmd_size;
66		− bv->batch_size = bv->cmd_size + bv->state_size;
67		− bv->scratch_size = bv->surface_height * bv->surface_width;
68		− bv->max_size = bv->batch_size + bv->scratch_size;
	85	+ bv->state_start = round_up(SZ_1K + num_primitives(bv) * 64, SZ_4K);
	86	+ bv->surface_start = bv->state_start + SZ_4K;
	87	+ bv->size = bv->surface_start + bv->surface_height * bv->surface_width;
69	88	}
70	89
71	90	static void batch_init(struct batch_chunk *bc,
@@ -155,7 +174,8 @@ static u32 · 83 unmodified lines
155	174	gen7_fill_binding_table(struct batch_chunk *state,
156	175	const struct batch_vals *bv)
157	176	{
158		− u32 surface_start = gen7_fill_surface_state(state, bv->batch_size, bv);
	177	+ u32 surface_start =
	178	+ gen7_fill_surface_state(state, bv->surface_start, bv);
159	179	u32 *cs = batch_alloc_items(state, 32, 8);
160	180	u32 offset = batch_offset(state, cs);
161	181
@@ -214,9 +234,9 @@ static void · 52 unmodified lines
214	234	gen7_emit_state_base_address(struct batch_chunk *batch,
215	235	u32 surface_state_base)
216	236	{
217		− u32 *cs = batch_alloc_items(batch, 0, 12);
	237	+ u32 *cs = batch_alloc_items(batch, 0, 10);
218	238
219		− *cs++ = STATE_BASE_ADDRESS \| (12 - 2);
	239	+ *cs++ = STATE_BASE_ADDRESS \| (10 - 2);
220	240	/* general */
221	241	*cs++ = batch_addr(batch) \| BASE_ADDRESS_MODIFY;
222	242	/* surface */
@@ -233,8 +253,6 @@ gen7_emit_state_base_address(struct batch_chunk *batch, · 10 unmodified lines
233	253	*cs++ = BASE_ADDRESS_MODIFY;
234	254	*cs++ = 0;
235	255	*cs++ = BASE_ADDRESS_MODIFY;
236		− *cs++ = 0;
237		− *cs++ = 0;
238	256	batch_advance(batch, cs);
239	257	}
240	258
@@ -244,8 +262,7 @@ gen7_emit_vfe_state(struct batch_chunk *batch, · 3 unmodified lines
244	262	u32 urb_size, u32 curbe_size,
245	263	u32 mode)
246	264	{
247		− u32 urb_entries = bv->max_urb_entries;
248		− u32 threads = bv->max_primitives - 1;
	265	+ u32 threads = bv->max_threads - 1;
249	266	u32 *cs = batch_alloc_items(batch, 32, 8);
250	267
251	268	*cs++ = MEDIA_VFE_STATE \| (8 - 2);
@@ -254,7 +271,7 @@ gen7_emit_vfe_state(struct batch_chunk *batch, · 2 unmodified lines
254	271	*cs++ = 0;
255	272
256	273	/* number of threads & urb entries for GPGPU vs Media Mode */
257		− *cs++ = threads << 16 \| urb_entries << 8 \| mode << 2;
	274	+ *cs++ = threads << 16 \| 1 << 8 \| mode << 2;
258	275
259	276	*cs++ = 0;
260	277
@@ -293,17 +310,12 @@ gen7_emit_media_object(struct batch_chunk *batch, · 32 unmodified lines
293	310	{
294	311	unsigned int x_offset = (media_object_index % 16) * 64;
295	312	unsigned int y_offset = (media_object_index / 16) * 16;
296		− unsigned int inline_data_size;
297		− unsigned int media_batch_size;
298		− unsigned int i;
	313	+ unsigned int pkt = 6 + 3;
299	314	u32 *cs;
300	315
301		− inline_data_size = 112 * 8;
302		− media_batch_size = inline_data_size + 6;
303		−
304		− cs = batch_alloc_items(batch, 8, media_batch_size);
	316	+ cs = batch_alloc_items(batch, 8, pkt);
305	317
306		− *cs++ = MEDIA_OBJECT \| (media_batch_size - 2);
	318	+ *cs++ = MEDIA_OBJECT \| (pkt - 2);
307	319
308	320	/* interface descriptor offset */
309	321	*cs++ = 0;
@@ -317,25 +329,44 @@ gen7_emit_media_object(struct batch_chunk *batch, · 7 unmodified lines
317	329	*cs++ = 0;
318	330
319	331	/* inline */
320		− *cs++ = (y_offset << 16) \| (x_offset);
	332	+ *cs++ = y_offset << 16 \| x_offset;
321	333	*cs++ = 0;
322	334	*cs++ = GT3_INLINE_DATA_DELAYS;
323		− for (i = 3; i < inline_data_size; i++)
324		− *cs++ = 0;
325	335
326	336	batch_advance(batch, cs);
327	337	}
328	338
329	339	static void gen7_emit_pipeline_flush(struct batch_chunk *batch)
330	340	{
331		− u32 *cs = batch_alloc_items(batch, 0, 5);
	341	+ u32 *cs = batch_alloc_items(batch, 0, 4);
332	342
333		− *cs++ = GFX_OP_PIPE_CONTROL(5);
334		− *cs++ = PIPE_CONTROL_STATE_CACHE_INVALIDATE \|
335		− PIPE_CONTROL_GLOBAL_GTT_IVB;
	343	+ *cs++ = GFX_OP_PIPE_CONTROL(4);
	344	+ *cs++ = PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH \|
	345	+ PIPE_CONTROL_DEPTH_CACHE_FLUSH \|
	346	+ PIPE_CONTROL_DC_FLUSH_ENABLE \|
	347	+ PIPE_CONTROL_CS_STALL;
336	348	*cs++ = 0;
337	349	*cs++ = 0;
	350	+
	351	+ batch_advance(batch, cs);
	352	+}
	353	+
	354	+static void gen7_emit_pipeline_invalidate(struct batch_chunk *batch)
	355	+{
	356	+ u32 *cs = batch_alloc_items(batch, 0, 8);
	357	+
	358	+ /* ivb: Stall before STATE_CACHE_INVALIDATE */
	359	+ *cs++ = GFX_OP_PIPE_CONTROL(4);
	360	+ *cs++ = PIPE_CONTROL_STALL_AT_SCOREBOARD \|
	361	+ PIPE_CONTROL_CS_STALL;
	362	+ *cs++ = 0;
	363	+ *cs++ = 0;
	364	+
	365	+ *cs++ = GFX_OP_PIPE_CONTROL(4);
	366	+ *cs++ = PIPE_CONTROL_STATE_CACHE_INVALIDATE;
338	367	*cs++ = 0;
	368	+ *cs++ = 0;
	369	+
339	370	batch_advance(batch, cs);
340	371	}
341	372
@@ -344,34 +375,34 @@ static void emit_batch(struct i915_vma * const vma, · 2 unmodified lines
344	375	const struct batch_vals *bv)
345	376	{
346	377	struct drm_i915_private *i915 = vma->vm->i915;
347		− unsigned int desc_count = 64;
348		− const u32 urb_size = 112;
	378	+ const unsigned int desc_count = 1;
	379	+ const unsigned int urb_size = 1;
349	380	struct batch_chunk cmds, state;
350		− u32 interface_descriptor;
	381	+ u32 descriptors;
351	382	unsigned int i;
352	383
353		− batch_init(&cmds, vma, start, 0, bv->cmd_size);
354		− batch_init(&state, vma, start, bv->state_start, bv->state_size);
	384	+ batch_init(&cmds, vma, start, 0, bv->state_start);
	385	+ batch_init(&state, vma, start, bv->state_start, SZ_4K);
355	386
356		− interface_descriptor =
357		− gen7_fill_interface_descriptor(&state, bv,
358		− IS_HASWELL(i915) ?
359		− &cb_kernel_hsw :
360		− &cb_kernel_ivb,
361		− desc_count);
362		− gen7_emit_pipeline_flush(&cmds);
	387	+ descriptors = gen7_fill_interface_descriptor(&state, bv,
	388	+ IS_HASWELL(i915) ?
	389	+ &cb_kernel_hsw :
	390	+ &cb_kernel_ivb,
	391	+ desc_count);
	392	+
	393	+ gen7_emit_pipeline_invalidate(&cmds);
363	394	batch_add(&cmds, PIPELINE_SELECT \| PIPELINE_SELECT_MEDIA);
364	395	batch_add(&cmds, MI_NOOP);
365		− gen7_emit_state_base_address(&cmds, interface_descriptor);
	396	+ gen7_emit_pipeline_invalidate(&cmds);
	397	+
366	398	gen7_emit_pipeline_flush(&cmds);
	399	+ gen7_emit_state_base_address(&cmds, descriptors);
	400	+ gen7_emit_pipeline_invalidate(&cmds);
367	401
368	402	gen7_emit_vfe_state(&cmds, bv, urb_size - 1, 0, 0);
	403	+ gen7_emit_interface_descriptor_load(&cmds, descriptors, desc_count);
369	404
370		− gen7_emit_interface_descriptor_load(&cmds,
371		− interface_descriptor,
372		− desc_count);
373		−
374		− for (i = 0; i < bv->max_primitives; i++)
	405	+ for (i = 0; i < num_primitives(bv); i++)
375	406	gen7_emit_media_object(&cmds, i);
376	407
377	408	batch_add(&cmds, MI_BATCH_BUFFER_END);
@@ -385,15 +416,15 @@ int gen7_setup_clear_gpr_bb(struct intel_engine_cs * const engine, · 7 unmodified lines
385	416
386	417	batch_get_defaults(engine->i915, &bv);
387	418	if (!vma)
388		− return bv.max_size;
	419	+ return bv.size;
389	420
390		− GEM_BUG_ON(vma->obj->base.size < bv.max_size);
	421	+ GEM_BUG_ON(vma->obj->base.size < bv.size);
391	422
392	423	batch = i915_gem_object_pin_map(vma->obj, I915_MAP_WC);
393	424	if (IS_ERR(batch))
394	425	return PTR_ERR(batch);
395	426
396		− emit_batch(vma, memset(batch, 0, bv.max_size), &bv);
	427	+ emit_batch(vma, memset(batch, 0, bv.size), &bv);
397	428
398	429	i915_gem_object_flush_map(vma->obj);
399	430	__i915_gem_object_release_map(vma->obj);

drivers/gpu/drm/i915/gt/intel_ring_submission.c+4−2

@@ -32,6 +32,7 @@ · 31 unmodified lines
32	32	#include "gen6_ppgtt.h"
33	33	#include "gen7_renderclear.h"
34	34	#include "i915_drv.h"
	35	+#include "i915_mitigations.h"
35	36	#include "intel_breadcrumbs.h"
36	37	#include "intel_context.h"
37	38	#include "intel_gt.h"
@@ -886,7 +887,8 @@ static int switch_context(struct i915_request *rq) · 848 unmodified lines
886	887	GEM_BUG_ON(HAS_EXECLISTS(engine->i915));
887	888
888	889	if (engine->wa_ctx.vma && ce != engine->kernel_context) {
889		− if (engine->wa_ctx.vma->private != ce) {
	890	+ if (engine->wa_ctx.vma->private != ce &&
	891	+ i915_mitigate_clear_residuals()) {
890	892	ret = clear_residuals(rq);
891	893	if (ret)
892	894	return ret;
@@ -1290,7 +1292,7 @@ int intel_ring_submission_setup(struct intel_engine_cs *engine) · 397 unmodified lines
1290	1292
1291	1293	GEM_BUG_ON(timeline->hwsp_ggtt != engine->status_page.vma);
1292	1294
1293		− if (IS_HASWELL(engine->i915) && engine->class == RENDER_CLASS) {
	1295	+ if (IS_GEN(engine->i915, 7) && engine->class == RENDER_CLASS) {
1294	1296	err = gen7_ctx_switch_bb_init(engine);
1295	1297	if (err)
1296	1298	goto err_ring_unpin;

drivers/gpu/drm/i915/gvt/display.c+57−24

@@ -217,6 +217,15 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) · 216 unmodified lines
217	217	DDI_BUF_CTL_ENABLE);
218	218	vgpu_vreg_t(vgpu, DDI_BUF_CTL(port)) \|= DDI_BUF_IS_IDLE;
219	219	}
	220	+ vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) &=
	221	+ ~(PORTA_HOTPLUG_ENABLE \| PORTA_HOTPLUG_STATUS_MASK);
	222	+ vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) &=
	223	+ ~(PORTB_HOTPLUG_ENABLE \| PORTB_HOTPLUG_STATUS_MASK);
	224	+ vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) &=
	225	+ ~(PORTC_HOTPLUG_ENABLE \| PORTC_HOTPLUG_STATUS_MASK);
	226	+ /* No hpd_invert set in vgpu vbt, need to clear invert mask */
	227	+ vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) &= ~BXT_DDI_HPD_INVERT_MASK;
	228	+ vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &= ~BXT_DE_PORT_HOTPLUG_MASK;
220	229
221	230	vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) &= ~(BIT(0) \| BIT(1));
222	231	vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) &=
@@ -273,6 +282,8 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) · 50 unmodified lines
273	282	vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_EDP)) \|=
274	283	(TRANS_DDI_BPC_8 \| TRANS_DDI_MODE_SELECT_DP_SST \|
275	284	TRANS_DDI_FUNC_ENABLE);
	285	+ vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) \|=
	286	+ PORTA_HOTPLUG_ENABLE;
276	287	vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) \|=
277	288	GEN8_DE_PORT_HOTPLUG(HPD_PORT_A);
278	289	}
@@ -301,6 +312,8 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) · 22 unmodified lines
301	312	(TRANS_DDI_BPC_8 \| TRANS_DDI_MODE_SELECT_DP_SST \|
302	313	(PORT_B << TRANS_DDI_PORT_SHIFT) \|
303	314	TRANS_DDI_FUNC_ENABLE);
	315	+ vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) \|=
	316	+ PORTB_HOTPLUG_ENABLE;
304	317	vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) \|=
305	318	GEN8_DE_PORT_HOTPLUG(HPD_PORT_B);
306	319	}
@@ -329,6 +342,8 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) · 22 unmodified lines
329	342	(TRANS_DDI_BPC_8 \| TRANS_DDI_MODE_SELECT_DP_SST \|
330	343	(PORT_B << TRANS_DDI_PORT_SHIFT) \|
331	344	TRANS_DDI_FUNC_ENABLE);
	345	+ vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) \|=
	346	+ PORTC_HOTPLUG_ENABLE;
332	347	vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) \|=
333	348	GEN8_DE_PORT_HOTPLUG(HPD_PORT_C);
334	349	}
@@ -661,44 +676,62 @@ void intel_vgpu_emulate_hotplug(struct intel_vgpu *vgpu, bool connected) · 326 unmodified lines
661	676	PORTD_HOTPLUG_STATUS_MASK;
662	677	intel_vgpu_trigger_virtual_event(vgpu, DP_D_HOTPLUG);
663	678	} else if (IS_BROXTON(i915)) {
664		− if (connected) {
665		− if (intel_vgpu_has_monitor_on_port(vgpu, PORT_A)) {
	679	+ if (intel_vgpu_has_monitor_on_port(vgpu, PORT_A)) {
	680	+ if (connected) {
666	681	vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) \|=
667	682	GEN8_DE_PORT_HOTPLUG(HPD_PORT_A);
	683	+ } else {
	684	+ vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &=
	685	+ ~GEN8_DE_PORT_HOTPLUG(HPD_PORT_A);
668	686	}
669		− if (intel_vgpu_has_monitor_on_port(vgpu, PORT_B)) {
670		− vgpu_vreg_t(vgpu, SFUSE_STRAP) \|=
671		− SFUSE_STRAP_DDIB_DETECTED;
	687	+ vgpu_vreg_t(vgpu, GEN8_DE_PORT_IIR) \|=
	688	+ GEN8_DE_PORT_HOTPLUG(HPD_PORT_A);
	689	+ vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) &=
	690	+ ~PORTA_HOTPLUG_STATUS_MASK;
	691	+ vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) \|=
	692	+ PORTA_HOTPLUG_LONG_DETECT;
	693	+ intel_vgpu_trigger_virtual_event(vgpu, DP_A_HOTPLUG);
	694	+ }
	695	+ if (intel_vgpu_has_monitor_on_port(vgpu, PORT_B)) {
	696	+ if (connected) {
672	697	vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) \|=
673	698	GEN8_DE_PORT_HOTPLUG(HPD_PORT_B);
674		− }
675		− if (intel_vgpu_has_monitor_on_port(vgpu, PORT_C)) {
676	699	vgpu_vreg_t(vgpu, SFUSE_STRAP) \|=
677		− SFUSE_STRAP_DDIC_DETECTED;
678		− vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) \|=
679		− GEN8_DE_PORT_HOTPLUG(HPD_PORT_C);
680		− }
681		− } else {
682		− if (intel_vgpu_has_monitor_on_port(vgpu, PORT_A)) {
	700	+ SFUSE_STRAP_DDIB_DETECTED;
	701	+ } else {
683	702	vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &=
684		− ~GEN8_DE_PORT_HOTPLUG(HPD_PORT_A);
685		− }
686		− if (intel_vgpu_has_monitor_on_port(vgpu, PORT_B)) {
	703	+ ~GEN8_DE_PORT_HOTPLUG(HPD_PORT_B);
687	704	vgpu_vreg_t(vgpu, SFUSE_STRAP) &=
688	705	~SFUSE_STRAP_DDIB_DETECTED;
689		− vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &=
690		− ~GEN8_DE_PORT_HOTPLUG(HPD_PORT_B);
691	706	}
692		− if (intel_vgpu_has_monitor_on_port(vgpu, PORT_C)) {
693		− vgpu_vreg_t(vgpu, SFUSE_STRAP) &=
694		− ~SFUSE_STRAP_DDIC_DETECTED;
	707	+ vgpu_vreg_t(vgpu, GEN8_DE_PORT_IIR) \|=
	708	+ GEN8_DE_PORT_HOTPLUG(HPD_PORT_B);
	709	+ vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) &=
	710	+ ~PORTB_HOTPLUG_STATUS_MASK;
	711	+ vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) \|=
	712	+ PORTB_HOTPLUG_LONG_DETECT;
	713	+ intel_vgpu_trigger_virtual_event(vgpu, DP_B_HOTPLUG);
	714	+ }
	715	+ if (intel_vgpu_has_monitor_on_port(vgpu, PORT_C)) {
	716	+ if (connected) {
	717	+ vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) \|=
	718	+ GEN8_DE_PORT_HOTPLUG(HPD_PORT_C);
	719	+ vgpu_vreg_t(vgpu, SFUSE_STRAP) \|=
	720	+ SFUSE_STRAP_DDIC_DETECTED;
	721	+ } else {
695	722	vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &=
696	723	~GEN8_DE_PORT_HOTPLUG(HPD_PORT_C);
	724	+ vgpu_vreg_t(vgpu, SFUSE_STRAP) &=
	725	+ ~SFUSE_STRAP_DDIC_DETECTED;
697	726	}
	727	+ vgpu_vreg_t(vgpu, GEN8_DE_PORT_IIR) \|=
	728	+ GEN8_DE_PORT_HOTPLUG(HPD_PORT_C);
	729	+ vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) &=
	730	+ ~PORTC_HOTPLUG_STATUS_MASK;
	731	+ vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) \|=
	732	+ PORTC_HOTPLUG_LONG_DETECT;
	733	+ intel_vgpu_trigger_virtual_event(vgpu, DP_C_HOTPLUG);
698	734	}
699		− vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) \|=
700		− PORTB_HOTPLUG_STATUS_MASK;
701		− intel_vgpu_trigger_virtual_event(vgpu, DP_B_HOTPLUG);
702	735	}
703	736	}
704	737

drivers/gpu/drm/i915/gvt/vgpu.c+2−3

@@ -437,10 +437,9 @@ static struct intel_vgpu __intel_gvt_create_vgpu(struct intel_gvt gvt, · 436 unmodified lines
437	437	if (ret)
438	438	goto out_clean_sched_policy;
439	439
440		− if (IS_BROADWELL(dev_priv))
	440	+ if (IS_BROADWELL(dev_priv) \|\| IS_BROXTON(dev_priv))
441	441	ret = intel_gvt_hypervisor_set_edid(vgpu, PORT_B);
442		− /* FixMe: Re-enable APL/BXT once vfio_edid enabled */
443		− else if (!IS_BROXTON(dev_priv))
	442	+ else
444	443	ret = intel_gvt_hypervisor_set_edid(vgpu, PORT_D);
445	444	if (ret)
446	445	goto out_clean_sched_policy;

drivers/gpu/drm/i915/i915_drv.c+4−0

@@ -1047,6 +1047,8 @@ static void intel_shutdown_encoders(struct drm_i915_private *dev_priv) · 1046 unmodified lines
1047	1047
1048	1048	void i915_driver_shutdown(struct drm_i915_private *i915)
1049	1049	{
	1050	+ disable_rpm_wakeref_asserts(&i915->runtime_pm);
	1051	+
1050	1052	i915_gem_suspend(i915);
1051	1053
1052	1054	drm_kms_helper_poll_disable(&i915->drm);
@@ -1060,6 +1062,8 @@ void i915_driver_shutdown(struct drm_i915_private *i915) · 7 unmodified lines
1060	1062
1061	1063	intel_suspend_encoders(i915);
1062	1064	intel_shutdown_encoders(i915);
	1065	+
	1066	+ enable_rpm_wakeref_asserts(&i915->runtime_pm);
1063	1067	}
1064	1068
1065	1069	static bool suspend_to_idle(struct drm_i915_private *dev_priv)

drivers/gpu/drm/i915/i915_mitigations.c+146−0

@@ -0,0 +1,146 @@
	1	+// SPDX-License-Identifier: MIT
	2	+/*
	3	+ * Copyright © 2021 Intel Corporation
	4	+ */
	5	+
	6	+#include <linux/kernel.h>
	7	+#include <linux/moduleparam.h>
	8	+#include <linux/slab.h>
	9	+#include <linux/string.h>
	10	+
	11	+#include "i915_drv.h"
	12	+#include "i915_mitigations.h"
	13	+
	14	+static unsigned long mitigations __read_mostly = ~0UL;
	15	+
	16	+enum {
	17	+ CLEAR_RESIDUALS = 0,
	18	+};
	19	+
	20	+static const char * const names[] = {
	21	+ [CLEAR_RESIDUALS] = "residuals",
	22	+};
	23	+
	24	+bool i915_mitigate_clear_residuals(void)
	25	+{
	26	+ return READ_ONCE(mitigations) & BIT(CLEAR_RESIDUALS);
	27	+}
	28	+
	29	+static int mitigations_set(const char val, const struct kernel_param kp)
	30	+{
	31	+ unsigned long new = ~0UL;
	32	+ char str, sep, *tok;
	33	+ bool first = true;
	34	+ int err = 0;
	35	+
	36	+ BUILD_BUG_ON(ARRAY_SIZE(names) >= BITS_PER_TYPE(mitigations));
	37	+
	38	+ str = kstrdup(val, GFP_KERNEL);
	39	+ if (!str)
	40	+ return -ENOMEM;
	41	+
	42	+ for (sep = str; (tok = strsep(&sep, ","));) {
	43	+ bool enable = true;
	44	+ int i;
	45	+
	46	+ /* Be tolerant of leading/trailing whitespace */
	47	+ tok = strim(tok);
	48	+
	49	+ if (first) {
	50	+ first = false;
	51	+
	52	+ if (!strcmp(tok, "auto"))
	53	+ continue;
	54	+
	55	+ new = 0;
	56	+ if (!strcmp(tok, "off"))
	57	+ continue;
	58	+ }
	59	+
	60	+ if (*tok == '!') {
	61	+ enable = !enable;
	62	+ tok++;
	63	+ }
	64	+
	65	+ if (!strncmp(tok, "no", 2)) {
	66	+ enable = !enable;
	67	+ tok += 2;
	68	+ }
	69	+
	70	+ if (*tok == '\0')
	71	+ continue;
	72	+
	73	+ for (i = 0; i < ARRAY_SIZE(names); i++) {
	74	+ if (!strcmp(tok, names[i])) {
	75	+ if (enable)
	76	+ new \|= BIT(i);
	77	+ else
	78	+ new &= ~BIT(i);
	79	+ break;
	80	+ }
	81	+ }
	82	+ if (i == ARRAY_SIZE(names)) {
	83	+ pr_err("Bad \"%s.mitigations=%s\", '%s' is unknown\n",
	84	+ DRIVER_NAME, val, tok);
	85	+ err = -EINVAL;
	86	+ break;
	87	+ }
	88	+ }
	89	+ kfree(str);
	90	+ if (err)
	91	+ return err;
	92	+
	93	+ WRITE_ONCE(mitigations, new);
	94	+ return 0;
	95	+}
	96	+
	97	+static int mitigations_get(char buffer, const struct kernel_param kp)
	98	+{
	99	+ unsigned long local = READ_ONCE(mitigations);
	100	+ int count, i;
	101	+ bool enable;
	102	+
	103	+ if (!local)
	104	+ return scnprintf(buffer, PAGE_SIZE, "%s\n", "off");
	105	+
	106	+ if (local & BIT(BITS_PER_LONG - 1)) {
	107	+ count = scnprintf(buffer, PAGE_SIZE, "%s,", "auto");
	108	+ enable = false;
	109	+ } else {
	110	+ enable = true;
	111	+ count = 0;
	112	+ }
	113	+
	114	+ for (i = 0; i < ARRAY_SIZE(names); i++) {
	115	+ if ((local & BIT(i)) != enable)
	116	+ continue;
	117	+
	118	+ count += scnprintf(buffer + count, PAGE_SIZE - count,
	119	+ "%s%s,", enable ? "" : "!", names[i]);
	120	+ }
	121	+
	122	+ buffer[count - 1] = '\n';
	123	+ return count;
	124	+}
	125	+
	126	+static const struct kernel_param_ops ops = {
	127	+ .set = mitigations_set,
	128	+ .get = mitigations_get,
	129	+};
	130	+
	131	+module_param_cb_unsafe(mitigations, &ops, NULL, 0600);
	132	+MODULE_PARM_DESC(mitigations,
	133	+"Selectively enable security mitigations for all Intel® GPUs in the system.\n"
	134	+"\n"
	135	+" auto -- enables all mitigations required for the platform [default]\n"
	136	+" off -- disables all mitigations\n"
	137	+"\n"
	138	+"Individual mitigations can be enabled by passing a comma-separated string,\n"
	139	+"e.g. mitigations=residuals to enable only clearing residuals or\n"
	140	+"mitigations=auto,noresiduals to disable only the clear residual mitigation.\n"
	141	+"Either '!' or 'no' may be used to switch from enabling the mitigation to\n"
	142	+"disabling it.\n"
	143	+"\n"
	144	+"Active mitigations for Ivybridge, Baytrail, Haswell:\n"
	145	+" residuals -- clear all thread-local registers between contexts"
	146	+);

drivers/gpu/drm/i915/i915_mitigations.h+13−0

@@ -0,0 +1,13 @@
	1	+/* SPDX-License-Identifier: MIT */
	2	+/*
	3	+ * Copyright © 2021 Intel Corporation
	4	+ */
	5	+
	6	+#ifndef __I915_MITIGATIONS_H__
	7	+#define __I915_MITIGATIONS_H__
	8	+
	9	+#include <linux/types.h>
	10	+
	11	+bool i915_mitigate_clear_residuals(void);
	12	+
	13	+#endif /* __I915_MITIGATIONS_H__ */

drivers/gpu/drm/nouveau/dispnv50/Kbuild+1−0

@@ -37,6 +37,7 @@ nouveau-y += dispnv50/wimmc37b.o · 36 unmodified lines
37	37	nouveau-y += dispnv50/wndw.o
38	38	nouveau-y += dispnv50/wndwc37e.o
39	39	nouveau-y += dispnv50/wndwc57e.o
	40	+nouveau-y += dispnv50/wndwc67e.o
40	41
41	42	nouveau-y += dispnv50/base.o
42	43	nouveau-y += dispnv50/base507c.o

drivers/gpu/drm/nouveau/dispnv50/core.c+1−0

@@ -42,6 +42,7 @@ nv50_core_new(struct nouveau_drm drm, struct nv50_core *pcore) · 41 unmodified lines
42	42	int version;
43	43	int (new)(struct nouveau_drm , s32, struct nv50_core **);
44	44	} cores[] = {
	45	+ { GA102_DISP_CORE_CHANNEL_DMA, 0, corec57d_new },
45	46	{ TU102_DISP_CORE_CHANNEL_DMA, 0, corec57d_new },
46	47	{ GV100_DISP_CORE_CHANNEL_DMA, 0, corec37d_new },
47	48	{ GP102_DISP_CORE_CHANNEL_DMA, 0, core917d_new },

drivers/gpu/drm/nouveau/dispnv50/curs.c+1−0

@@ -31,6 +31,7 @@ nv50_curs_new(struct nouveau_drm drm, int head, struct nv50_wndw *pwndw) · 30 unmodified lines
31	31	int version;
32	32	int (new)(struct nouveau_drm , int, s32, struct nv50_wndw **);
33	33	} curses[] = {
	34	+ { GA102_DISP_CURSOR, 0, cursc37a_new },
34	35	{ TU102_DISP_CURSOR, 0, cursc37a_new },
35	36	{ GV100_DISP_CURSOR, 0, cursc37a_new },
36	37	{ GK104_DISP_CURSOR, 0, curs907a_new },

drivers/gpu/drm/nouveau/dispnv50/disp.c+2−2

@@ -222,7 +222,7 @@ nv50_dmac_wait(struct nvif_push *push, u32 size) · 221 unmodified lines
222	222
223	223	int
224	224	nv50_dmac_create(struct nvif_device device, struct nvif_object disp,
225		− const s32 oclass, u8 head, void data, u32 size, u64 syncbuf,
	225	+ const s32 oclass, u8 head, void data, u32 size, s64 syncbuf,
226	226	struct nv50_dmac *dmac)
227	227	{
228	228	struct nouveau_cli cli = (void )device->object.client;
@@ -271,7 +271,7 @@ nv50_dmac_create(struct nvif_device device, struct nvif_object disp, · 42 unmodified lines
271	271	if (ret)
272	272	return ret;
273	273
274		− if (!syncbuf)
	274	+ if (syncbuf < 0)
275	275	return 0;
276	276
277	277	ret = nvif_object_ctor(&dmac->base.user, "kmsSyncCtxDma", NV50_DISP_HANDLE_SYNCBUF,

drivers/gpu/drm/nouveau/dispnv50/disp.h+1−1

@@ -95,7 +95,7 @@ struct nv50_outp_atom { · 94 unmodified lines
95	95
96	96	int nv50_dmac_create(struct nvif_device device, struct nvif_object disp,
97	97	const s32 oclass, u8 head, void data, u32 size,
98		− u64 syncbuf, struct nv50_dmac *dmac);
	98	+ s64 syncbuf, struct nv50_dmac *dmac);
99	99	void nv50_dmac_destroy(struct nv50_dmac *);
100	100
101	101	/*

drivers/gpu/drm/nouveau/dispnv50/wimm.c+1−0

@@ -31,6 +31,7 @@ nv50_wimm_init(struct nouveau_drm drm, struct nv50_wndw wndw) · 30 unmodified lines
31	31	int version;
32	32	int (init)(struct nouveau_drm , s32, struct nv50_wndw *);
33	33	} wimms[] = {
	34	+ { GA102_DISP_WINDOW_IMM_CHANNEL_DMA, 0, wimmc37b_init },
34	35	{ TU102_DISP_WINDOW_IMM_CHANNEL_DMA, 0, wimmc37b_init },
35	36	{ GV100_DISP_WINDOW_IMM_CHANNEL_DMA, 0, wimmc37b_init },
36	37	{}

drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c+1−1

@@ -76,7 +76,7 @@ wimmc37b_init_(const struct nv50_wimm_func func, struct nouveau_drm drm, · 75 unmodified lines
76	76	int ret;
77	77
78	78	ret = nv50_dmac_create(&drm->client.device, &disp->disp->object,
79		− &oclass, 0, &args, sizeof(args), 0,
	79	+ &oclass, 0, &args, sizeof(args), -1,
80	80	&wndw->wimm);
81	81	if (ret) {
82	82	NV_ERROR(drm, "wimm%04x allocation failed: %d\n", oclass, ret);

drivers/gpu/drm/nouveau/dispnv50/wndw.c+1−0

@@ -784,6 +784,7 @@ nv50_wndw_new(struct nouveau_drm *drm, enum drm_plane_type type, int index, · 783 unmodified lines
784	784	int (new)(struct nouveau_drm , enum drm_plane_type,
785	785	int, s32, struct nv50_wndw **);
786	786	} wndws[] = {
	787	+ { GA102_DISP_WINDOW_CHANNEL_DMA, 0, wndwc67e_new },
787	788	{ TU102_DISP_WINDOW_CHANNEL_DMA, 0, wndwc57e_new },
788	789	{ GV100_DISP_WINDOW_CHANNEL_DMA, 0, wndwc37e_new },
789	790	{}

drivers/gpu/drm/nouveau/dispnv50/wndw.h+8−0

@@ -129,6 +129,14 @@ int wndwc37e_update(struct nv50_wndw , u32 ); · 128 unmodified lines
129	129
130	130	int wndwc57e_new(struct nouveau_drm *, enum drm_plane_type, int, s32,
131	131	struct nv50_wndw **);
	132	+bool wndwc57e_ilut(struct nv50_wndw , struct nv50_wndw_atom , int);
	133	+int wndwc57e_ilut_set(struct nv50_wndw , struct nv50_wndw_atom );
	134	+int wndwc57e_ilut_clr(struct nv50_wndw *);
	135	+int wndwc57e_csc_set(struct nv50_wndw , struct nv50_wndw_atom );
	136	+int wndwc57e_csc_clr(struct nv50_wndw *);
	137	+
	138	+int wndwc67e_new(struct nouveau_drm *, enum drm_plane_type, int, s32,
	139	+ struct nv50_wndw **);
132	140
133	141	int nv50_wndw_new(struct nouveau_drm *, enum drm_plane_type, int index,
134	142	struct nv50_wndw **);

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c+5−5

@@ -80,7 +80,7 @@ wndwc57e_image_set(struct nv50_wndw wndw, struct nv50_wndw_atom asyw) · 79 unmodified lines
80	80	return 0;
81	81	}
82	82
83		−static int
	83	+int
84	84	wndwc57e_csc_clr(struct nv50_wndw *wndw)
85	85	{
86	86	struct nvif_push *push = wndw->wndw.push;
@@ -98,7 +98,7 @@ wndwc57e_csc_clr(struct nv50_wndw *wndw) · 11 unmodified lines
98	98	return 0;
99	99	}
100	100
101		−static int
	101	+int
102	102	wndwc57e_csc_set(struct nv50_wndw wndw, struct nv50_wndw_atom asyw)
103	103	{
104	104	struct nvif_push *push = wndw->wndw.push;
@@ -111,7 +111,7 @@ wndwc57e_csc_set(struct nv50_wndw wndw, struct nv50_wndw_atom asyw) · 6 unmodified lines
111	111	return 0;
112	112	}
113	113
114		−static int
	114	+int
115	115	wndwc57e_ilut_clr(struct nv50_wndw *wndw)
116	116	{
117	117	struct nvif_push *push = wndw->wndw.push;
@@ -124,7 +124,7 @@ wndwc57e_ilut_clr(struct nv50_wndw *wndw) · 6 unmodified lines
124	124	return 0;
125	125	}
126	126
127		−static int
	127	+int
128	128	wndwc57e_ilut_set(struct nv50_wndw wndw, struct nv50_wndw_atom asyw)
129	129	{
130	130	struct nvif_push *push = wndw->wndw.push;
@@ -179,7 +179,7 @@ wndwc57e_ilut_load(struct drm_color_lut in, int size, void __iomem mem) · 48 unmodified lines
179	179	writew(readw(mem - 4), mem + 4);
180	180	}
181	181
182		−static bool
	182	+bool
183	183	wndwc57e_ilut(struct nv50_wndw wndw, struct nv50_wndw_atom asyw, int size)
184	184	{
185	185	if (size = size ? size : 1024, size != 256 && size != 1024)

drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c+106−0

@@ -0,0 +1,106 @@
	1	+/*
	2	+ * Copyright 2021 Red Hat Inc.
	3	+ *
	4	+ * Permission is hereby granted, free of charge, to any person obtaining a
	5	+ * copy of this software and associated documentation files (the "Software"),
	6	+ * to deal in the Software without restriction, including without limitation
	7	+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	+ * and/or sell copies of the Software, and to permit persons to whom the
	9	+ * Software is furnished to do so, subject to the following conditions:
	10	+ *
	11	+ * The above copyright notice and this permission notice shall be included in
	12	+ * all copies or substantial portions of the Software.
	13	+ *
	14	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	+ * OTHER DEALINGS IN THE SOFTWARE.
	21	+ */
	22	+#include "wndw.h"
	23	+#include "atom.h"
	24	+
	25	+#include <nvif/pushc37b.h>
	26	+
	27	+#include <nvhw/class/clc57e.h>
	28	+
	29	+static int
	30	+wndwc67e_image_set(struct nv50_wndw wndw, struct nv50_wndw_atom asyw)
	31	+{
	32	+ struct nvif_push *push = wndw->wndw.push;
	33	+ int ret;
	34	+
	35	+ if ((ret = PUSH_WAIT(push, 17)))
	36	+ return ret;
	37	+
	38	+ PUSH_MTHD(push, NVC57E, SET_PRESENT_CONTROL,
	39	+ NVVAL(NVC57E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval) \|
	40	+ NVVAL(NVC57E, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) \|
	41	+ NVDEF(NVC57E, SET_PRESENT_CONTROL, TIMESTAMP_MODE, DISABLE));
	42	+
	43	+ PUSH_MTHD(push, NVC57E, SET_SIZE,
	44	+ NVVAL(NVC57E, SET_SIZE, WIDTH, asyw->image.w) \|
	45	+ NVVAL(NVC57E, SET_SIZE, HEIGHT, asyw->image.h),
	46	+
	47	+ SET_STORAGE,
	48	+ NVVAL(NVC57E, SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh),
	49	+
	50	+ SET_PARAMS,
	51	+ NVVAL(NVC57E, SET_PARAMS, FORMAT, asyw->image.format) \|
	52	+ NVDEF(NVC57E, SET_PARAMS, CLAMP_BEFORE_BLEND, DISABLE) \|
	53	+ NVDEF(NVC57E, SET_PARAMS, SWAP_UV, DISABLE) \|
	54	+ NVDEF(NVC57E, SET_PARAMS, FMT_ROUNDING_MODE, ROUND_TO_NEAREST),
	55	+
	56	+ SET_PLANAR_STORAGE(0),
	57	+ NVVAL(NVC57E, SET_PLANAR_STORAGE, PITCH, asyw->image.blocks[0]) \|
	58	+ NVVAL(NVC57E, SET_PLANAR_STORAGE, PITCH, asyw->image.pitch[0] >> 6));
	59	+
	60	+ PUSH_MTHD(push, NVC57E, SET_CONTEXT_DMA_ISO(0), asyw->image.handle, 1);
	61	+ PUSH_MTHD(push, NVC57E, SET_OFFSET(0), asyw->image.offset[0] >> 8);
	62	+
	63	+ PUSH_MTHD(push, NVC57E, SET_POINT_IN(0),
	64	+ NVVAL(NVC57E, SET_POINT_IN, X, asyw->state.src_x >> 16) \|
	65	+ NVVAL(NVC57E, SET_POINT_IN, Y, asyw->state.src_y >> 16));
	66	+
	67	+ PUSH_MTHD(push, NVC57E, SET_SIZE_IN,
	68	+ NVVAL(NVC57E, SET_SIZE_IN, WIDTH, asyw->state.src_w >> 16) \|
	69	+ NVVAL(NVC57E, SET_SIZE_IN, HEIGHT, asyw->state.src_h >> 16));
	70	+
	71	+ PUSH_MTHD(push, NVC57E, SET_SIZE_OUT,
	72	+ NVVAL(NVC57E, SET_SIZE_OUT, WIDTH, asyw->state.crtc_w) \|
	73	+ NVVAL(NVC57E, SET_SIZE_OUT, HEIGHT, asyw->state.crtc_h));
	74	+ return 0;
	75	+}
	76	+
	77	+static const struct nv50_wndw_func
	78	+wndwc67e = {
	79	+ .acquire = wndwc37e_acquire,
	80	+ .release = wndwc37e_release,
	81	+ .sema_set = wndwc37e_sema_set,
	82	+ .sema_clr = wndwc37e_sema_clr,
	83	+ .ntfy_set = wndwc37e_ntfy_set,
	84	+ .ntfy_clr = wndwc37e_ntfy_clr,
	85	+ .ntfy_reset = corec37d_ntfy_init,
	86	+ .ntfy_wait_begun = base507c_ntfy_wait_begun,
	87	+ .ilut = wndwc57e_ilut,
	88	+ .ilut_identity = true,
	89	+ .ilut_size = 1024,
	90	+ .xlut_set = wndwc57e_ilut_set,
	91	+ .xlut_clr = wndwc57e_ilut_clr,
	92	+ .csc = base907c_csc,
	93	+ .csc_set = wndwc57e_csc_set,
	94	+ .csc_clr = wndwc57e_csc_clr,
	95	+ .image_set = wndwc67e_image_set,
	96	+ .image_clr = wndwc37e_image_clr,
	97	+ .blend_set = wndwc37e_blend_set,
	98	+ .update = wndwc37e_update,
	99	+};
	100	+
	101	+int
	102	+wndwc67e_new(struct nouveau_drm *drm, enum drm_plane_type type, int index,
	103	+ s32 oclass, struct nv50_wndw **pwndw)
	104	+{
	105	+ return wndwc37e_new_(&wndwc67e, drm, type, index, oclass, BIT(index >> 1), pwndw);
	106	+}

drivers/gpu/drm/nouveau/include/nvif/cl0080.h+1−0

@@ -33,6 +33,7 @@ struct nv_device_info_v0 { · 32 unmodified lines
33	33	#define NV_DEVICE_INFO_V0_PASCAL 0x0a
34	34	#define NV_DEVICE_INFO_V0_VOLTA 0x0b
35	35	#define NV_DEVICE_INFO_V0_TURING 0x0c
	36	+#define NV_DEVICE_INFO_V0_AMPERE 0x0d
36	37	__u8 family;
37	38	__u8 pad06[2];
38	39	__u64 ram_size;

drivers/gpu/drm/nouveau/include/nvif/class.h+5−0

@@ -88,6 +88,7 @@ · 87 unmodified lines
88	88	#define GP102_DISP /* cl5070.h */ 0x00009870
89	89	#define GV100_DISP /* cl5070.h */ 0x0000c370
90	90	#define TU102_DISP /* cl5070.h */ 0x0000c570
	91	+#define GA102_DISP /* cl5070.h */ 0x0000c670
91	92
92	93	#define GV100_DISP_CAPS 0x0000c373
93	94
@@ -103,6 +104,7 @@ · 9 unmodified lines
103	104	#define GK104_DISP_CURSOR /* cl507a.h */ 0x0000917a
104	105	#define GV100_DISP_CURSOR /* cl507a.h */ 0x0000c37a
105	106	#define TU102_DISP_CURSOR /* cl507a.h */ 0x0000c57a
	107	+#define GA102_DISP_CURSOR /* cl507a.h */ 0x0000c67a
106	108
107	109	#define NV50_DISP_OVERLAY /* cl507b.h */ 0x0000507b
108	110	#define G82_DISP_OVERLAY /* cl507b.h */ 0x0000827b
@@ -112,6 +114,7 @@ · 3 unmodified lines
112	114
113	115	#define GV100_DISP_WINDOW_IMM_CHANNEL_DMA /* clc37b.h */ 0x0000c37b
114	116	#define TU102_DISP_WINDOW_IMM_CHANNEL_DMA /* clc37b.h */ 0x0000c57b
	117	+#define GA102_DISP_WINDOW_IMM_CHANNEL_DMA /* clc37b.h */ 0x0000c67b
115	118
116	119	#define NV50_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000507c
117	120	#define G82_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000827c
@@ -135,6 +138,7 @@ · 17 unmodified lines
135	138	#define GP102_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000987d
136	139	#define GV100_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000c37d
137	140	#define TU102_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000c57d
	141	+#define GA102_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000c67d
138	142
139	143	#define NV50_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000507e
140	144	#define G82_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000827e
@@ -145,6 +149,7 @@ · 4 unmodified lines
145	149
146	150	#define GV100_DISP_WINDOW_CHANNEL_DMA /* clc37e.h */ 0x0000c37e
147	151	#define TU102_DISP_WINDOW_CHANNEL_DMA /* clc37e.h */ 0x0000c57e
	152	+#define GA102_DISP_WINDOW_CHANNEL_DMA /* clc37e.h */ 0x0000c67e
148	153
149	154	#define NV50_TESLA 0x00005097
150	155	#define G82_TESLA 0x00008297

drivers/gpu/drm/nouveau/include/nvkm/core/device.h+1−0

@@ -120,6 +120,7 @@ struct nvkm_device { · 119 unmodified lines
120	120	GP100 = 0x130,
121	121	GV100 = 0x140,
122	122	TU100 = 0x160,
	123	+ GA100 = 0x170,
123	124	} card_type;
124	125	u32 chipset;
125	126	u8 chiprev;

drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h+1−0

@@ -37,4 +37,5 @@ int gp100_disp_new(struct nvkm_device , int, struct nvkm_disp *); · 36 unmodified lines
37	37	int gp102_disp_new(struct nvkm_device , int, struct nvkm_disp *);
38	38	int gv100_disp_new(struct nvkm_device , int, struct nvkm_disp *);
39	39	int tu102_disp_new(struct nvkm_device , int, struct nvkm_disp *);
	40	+int ga102_disp_new(struct nvkm_device , int, struct nvkm_disp *);
40	41	#endif

drivers/gpu/drm/nouveau/include/nvkm/subdev/devinit.h+1−0

@@ -32,4 +32,5 @@ int gm107_devinit_new(struct nvkm_device , int, struct nvkm_devinit *); · 31 unmodified lines
32	32	int gm200_devinit_new(struct nvkm_device , int, struct nvkm_devinit *);
33	33	int gv100_devinit_new(struct nvkm_device , int, struct nvkm_devinit *);
34	34	int tu102_devinit_new(struct nvkm_device , int, struct nvkm_devinit *);
	35	+int ga100_devinit_new(struct nvkm_device , int, struct nvkm_devinit *);
35	36	#endif

drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h+2−0

@@ -86,6 +86,8 @@ int gp100_fb_new(struct nvkm_device , int, struct nvkm_fb *); · 85 unmodified lines
86	86	int gp102_fb_new(struct nvkm_device , int, struct nvkm_fb *);
87	87	int gp10b_fb_new(struct nvkm_device , int, struct nvkm_fb *);
88	88	int gv100_fb_new(struct nvkm_device , int, struct nvkm_fb *);
	89	+int ga100_fb_new(struct nvkm_device , int, struct nvkm_fb *);
	90	+int ga102_fb_new(struct nvkm_device , int, struct nvkm_fb *);
89	91
90	92	#include <subdev/bios.h>
91	93	#include <subdev/bios/ramcfg.h>

drivers/gpu/drm/nouveau/include/nvkm/subdev/gpio.h+1−0

@@ -37,4 +37,5 @@ int nv50_gpio_new(struct nvkm_device , int, struct nvkm_gpio *); · 36 unmodified lines
37	37	int g94_gpio_new(struct nvkm_device , int, struct nvkm_gpio *);
38	38	int gf119_gpio_new(struct nvkm_device , int, struct nvkm_gpio *);
39	39	int gk104_gpio_new(struct nvkm_device , int, struct nvkm_gpio *);
	40	+int ga102_gpio_new(struct nvkm_device , int, struct nvkm_gpio *);
40	41	#endif

drivers/gpu/drm/nouveau/include/nvkm/subdev/i2c.h+1−0

@@ -92,6 +92,7 @@ int g94_i2c_new(struct nvkm_device , int, struct nvkm_i2c *); · 91 unmodified lines
92	92	int gf117_i2c_new(struct nvkm_device , int, struct nvkm_i2c *);
93	93	int gf119_i2c_new(struct nvkm_device , int, struct nvkm_i2c *);
94	94	int gk104_i2c_new(struct nvkm_device , int, struct nvkm_i2c *);
	95	+int gk110_i2c_new(struct nvkm_device , int, struct nvkm_i2c *);
95	96	int gm200_i2c_new(struct nvkm_device , int, struct nvkm_i2c *);
96	97
97	98	static inline int

drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h+1−0

@@ -32,4 +32,5 @@ int gk20a_mc_new(struct nvkm_device , int, struct nvkm_mc *); · 31 unmodified lines
32	32	int gp100_mc_new(struct nvkm_device , int, struct nvkm_mc *);
33	33	int gp10b_mc_new(struct nvkm_device , int, struct nvkm_mc *);
34	34	int tu102_mc_new(struct nvkm_device , int, struct nvkm_mc *);
	35	+int ga100_mc_new(struct nvkm_device , int, struct nvkm_mc *);
35	36	#endif

drivers/gpu/drm/nouveau/nouveau_backlight.c+1−0

@@ -256,6 +256,7 @@ nouveau_backlight_init(struct drm_connector *connector) · 255 unmodified lines
256	256	case NV_DEVICE_INFO_V0_PASCAL:
257	257	case NV_DEVICE_INFO_V0_VOLTA:
258	258	case NV_DEVICE_INFO_V0_TURING:
	259	+ case NV_DEVICE_INFO_V0_AMPERE: //XXX: not confirmed
259	260	ret = nv50_backlight_init(nv_encoder, &props, &ops);
260	261	break;
261	262	default:

drivers/gpu/drm/nouveau/nvif/disp.c+1−0

@@ -35,6 +35,7 @@ nvif_disp_ctor(struct nvif_device device, const char name, s32 oclass, · 34 unmodified lines
35	35	struct nvif_disp *disp)
36	36	{
37	37	static const struct nvif_mclass disps[] = {
	38	+ { GA102_DISP, -1 },
38	39	{ TU102_DISP, -1 },
39	40	{ GV100_DISP, -1 },
40	41	{ GP102_DISP, -1 },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c+78−9

@@ -1815,7 +1815,7 @@ nvf0_chipset = { · 1814 unmodified lines
1815	1815	.fb = gk110_fb_new,
1816	1816	.fuse = gf100_fuse_new,
1817	1817	.gpio = gk104_gpio_new,
1818		− .i2c = gk104_i2c_new,
	1818	+ .i2c = gk110_i2c_new,
1819	1819	.ibus = gk104_ibus_new,
1820	1820	.iccsense = gf100_iccsense_new,
1821	1821	.imem = nv50_instmem_new,
@@ -1853,7 +1853,7 @@ nvf1_chipset = { · 31 unmodified lines
1853	1853	.fb = gk110_fb_new,
1854	1854	.fuse = gf100_fuse_new,
1855	1855	.gpio = gk104_gpio_new,
1856		− .i2c = gk104_i2c_new,
	1856	+ .i2c = gk110_i2c_new,
1857	1857	.ibus = gk104_ibus_new,
1858	1858	.iccsense = gf100_iccsense_new,
1859	1859	.imem = nv50_instmem_new,
@@ -1891,7 +1891,7 @@ nv106_chipset = { · 31 unmodified lines
1891	1891	.fb = gk110_fb_new,
1892	1892	.fuse = gf100_fuse_new,
1893	1893	.gpio = gk104_gpio_new,
1894		− .i2c = gk104_i2c_new,
	1894	+ .i2c = gk110_i2c_new,
1895	1895	.ibus = gk104_ibus_new,
1896	1896	.iccsense = gf100_iccsense_new,
1897	1897	.imem = nv50_instmem_new,
@@ -1929,7 +1929,7 @@ nv108_chipset = { · 31 unmodified lines
1929	1929	.fb = gk110_fb_new,
1930	1930	.fuse = gf100_fuse_new,
1931	1931	.gpio = gk104_gpio_new,
1932		− .i2c = gk104_i2c_new,
	1932	+ .i2c = gk110_i2c_new,
1933	1933	.ibus = gk104_ibus_new,
1934	1934	.iccsense = gf100_iccsense_new,
1935	1935	.imem = nv50_instmem_new,
@@ -1967,7 +1967,7 @@ nv117_chipset = { · 31 unmodified lines
1967	1967	.fb = gm107_fb_new,
1968	1968	.fuse = gm107_fuse_new,
1969	1969	.gpio = gk104_gpio_new,
1970		− .i2c = gk104_i2c_new,
	1970	+ .i2c = gk110_i2c_new,
1971	1971	.ibus = gk104_ibus_new,
1972	1972	.iccsense = gf100_iccsense_new,
1973	1973	.imem = nv50_instmem_new,
@@ -2003,7 +2003,7 @@ nv118_chipset = { · 29 unmodified lines
2003	2003	.fb = gm107_fb_new,
2004	2004	.fuse = gm107_fuse_new,
2005	2005	.gpio = gk104_gpio_new,
2006		− .i2c = gk104_i2c_new,
	2006	+ .i2c = gk110_i2c_new,
2007	2007	.ibus = gk104_ibus_new,
2008	2008	.iccsense = gf100_iccsense_new,
2009	2009	.imem = nv50_instmem_new,
@@ -2652,6 +2652,61 @@ nv168_chipset = { · 642 unmodified lines
2652	2652	.sec2 = tu102_sec2_new,
2653	2653	};
2654	2654
	2655	+static const struct nvkm_device_chip
	2656	+nv170_chipset = {
	2657	+ .name = "GA100",
	2658	+ .bar = tu102_bar_new,
	2659	+ .bios = nvkm_bios_new,
	2660	+ .devinit = ga100_devinit_new,
	2661	+ .fb = ga100_fb_new,
	2662	+ .gpio = gk104_gpio_new,
	2663	+ .i2c = gm200_i2c_new,
	2664	+ .ibus = gm200_ibus_new,
	2665	+ .imem = nv50_instmem_new,
	2666	+ .mc = ga100_mc_new,
	2667	+ .mmu = tu102_mmu_new,
	2668	+ .pci = gp100_pci_new,
	2669	+ .timer = gk20a_timer_new,
	2670	+};
	2671	+
	2672	+static const struct nvkm_device_chip
	2673	+nv172_chipset = {
	2674	+ .name = "GA102",
	2675	+ .bar = tu102_bar_new,
	2676	+ .bios = nvkm_bios_new,
	2677	+ .devinit = ga100_devinit_new,
	2678	+ .fb = ga102_fb_new,
	2679	+ .gpio = ga102_gpio_new,
	2680	+ .i2c = gm200_i2c_new,
	2681	+ .ibus = gm200_ibus_new,
	2682	+ .imem = nv50_instmem_new,
	2683	+ .mc = ga100_mc_new,
	2684	+ .mmu = tu102_mmu_new,
	2685	+ .pci = gp100_pci_new,
	2686	+ .timer = gk20a_timer_new,
	2687	+ .disp = ga102_disp_new,
	2688	+ .dma = gv100_dma_new,
	2689	+};
	2690	+
	2691	+static const struct nvkm_device_chip
	2692	+nv174_chipset = {
	2693	+ .name = "GA104",
	2694	+ .bar = tu102_bar_new,
	2695	+ .bios = nvkm_bios_new,
	2696	+ .devinit = ga100_devinit_new,
	2697	+ .fb = ga102_fb_new,
	2698	+ .gpio = ga102_gpio_new,
	2699	+ .i2c = gm200_i2c_new,
	2700	+ .ibus = gm200_ibus_new,
	2701	+ .imem = nv50_instmem_new,
	2702	+ .mc = ga100_mc_new,
	2703	+ .mmu = tu102_mmu_new,
	2704	+ .pci = gp100_pci_new,
	2705	+ .timer = gk20a_timer_new,
	2706	+ .disp = ga102_disp_new,
	2707	+ .dma = gv100_dma_new,
	2708	+};
	2709	+
2655	2710	static int
2656	2711	nvkm_device_event_ctor(struct nvkm_object object, void data, u32 size,
2657	2712	struct nvkm_notify *notify)
@@ -3063,6 +3118,7 @@ nvkm_device_ctor(const struct nvkm_device_func *func, · 405 unmodified lines
3063	3118	case 0x130: device->card_type = GP100; break;
3064	3119	case 0x140: device->card_type = GV100; break;
3065	3120	case 0x160: device->card_type = TU100; break;
	3121	+ case 0x170: device->card_type = GA100; break;
3066	3122	default:
3067	3123	break;
3068	3124	}
@@ -3160,10 +3216,23 @@ nvkm_device_ctor(const struct nvkm_device_func *func, · 91 unmodified lines
3160	3216	case 0x166: device->chip = &nv166_chipset; break;
3161	3217	case 0x167: device->chip = &nv167_chipset; break;
3162	3218	case 0x168: device->chip = &nv168_chipset; break;
	3219	+ case 0x172: device->chip = &nv172_chipset; break;
	3220	+ case 0x174: device->chip = &nv174_chipset; break;
3163	3221	default:
3164		− nvdev_error(device, "unknown chipset (%08x)\n", boot0);
3165		− ret = -ENODEV;
3166		− goto done;
	3222	+ if (nvkm_boolopt(device->cfgopt, "NvEnableUnsupportedChipsets", false)) {
	3223	+ switch (device->chipset) {
	3224	+ case 0x170: device->chip = &nv170_chipset; break;
	3225	+ default:
	3226	+ break;
	3227	+ }
	3228	+ }
	3229	+
	3230	+ if (!device->chip) {
	3231	+ nvdev_error(device, "unknown chipset (%08x)\n", boot0);
	3232	+ ret = -ENODEV;
	3233	+ goto done;
	3234	+ }
	3235	+ break;
3167	3236	}
3168	3237
3169	3238	nvdev_info(device, "NVIDIA %s (%08x)\n",

drivers/gpu/drm/nouveau/nvkm/engine/device/user.c+1−0

@@ -176,6 +176,7 @@ nvkm_udevice_info(struct nvkm_udevice udev, void data, u32 size) · 175 unmodified lines
176	176	case GP100: args->v0.family = NV_DEVICE_INFO_V0_PASCAL; break;
177	177	case GV100: args->v0.family = NV_DEVICE_INFO_V0_VOLTA; break;
178	178	case TU100: args->v0.family = NV_DEVICE_INFO_V0_TURING; break;
	179	+ case GA100: args->v0.family = NV_DEVICE_INFO_V0_AMPERE; break;
179	180	default:
180	181	args->v0.family = 0;
181	182	break;

drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild+3−0

@@ -17,6 +17,7 @@ nvkm-y += nvkm/engine/disp/gp100.o · 16 unmodified lines
17	17	nvkm-y += nvkm/engine/disp/gp102.o
18	18	nvkm-y += nvkm/engine/disp/gv100.o
19	19	nvkm-y += nvkm/engine/disp/tu102.o
	20	+nvkm-y += nvkm/engine/disp/ga102.o
20	21	nvkm-y += nvkm/engine/disp/vga.o
21	22
22	23	nvkm-y += nvkm/engine/disp/head.o
@@ -42,6 +43,7 @@ nvkm-y += nvkm/engine/disp/sorgm200.o · 19 unmodified lines
42	43	nvkm-y += nvkm/engine/disp/sorgp100.o
43	44	nvkm-y += nvkm/engine/disp/sorgv100.o
44	45	nvkm-y += nvkm/engine/disp/sortu102.o
	46	+nvkm-y += nvkm/engine/disp/sorga102.o
45	47
46	48	nvkm-y += nvkm/engine/disp/outp.o
47	49	nvkm-y += nvkm/engine/disp/dp.o
@@ -75,6 +77,7 @@ nvkm-y += nvkm/engine/disp/rootgp100.o · 27 unmodified lines
75	77	nvkm-y += nvkm/engine/disp/rootgp102.o
76	78	nvkm-y += nvkm/engine/disp/rootgv100.o
77	79	nvkm-y += nvkm/engine/disp/roottu102.o
	80	+nvkm-y += nvkm/engine/disp/rootga102.o
78	81
79	82	nvkm-y += nvkm/engine/disp/capsgv100.o
80	83

drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c+27−6

@@ -33,6 +33,12 @@ · 32 unmodified lines
33	33
34	34	#include <nvif/event.h>
35	35
	36	+/* IED scripts are no longer used by UEFI/RM from Ampere, but have been updated for
	37	+ * the x86 option ROM. However, the relevant VBIOS table versions weren't modified,
	38	+ * so we're unable to detect this in a nice way.
	39	+ */
	40	+#define AMPERE_IED_HACK(disp) ((disp)->engine.subdev.device->card_type >= GA100)
	41	+
36	42	struct lt_state {
37	43	struct nvkm_dp *dp;
38	44	u8 stat[6];
@@ -238,6 +244,19 @@ nvkm_dp_train_links(struct nvkm_dp *dp) · 199 unmodified lines
238	244	dp->dpcd[DPCD_RC02] &= ~DPCD_RC02_TPS3_SUPPORTED;
239	245	lt.pc2 = dp->dpcd[DPCD_RC02] & DPCD_RC02_TPS3_SUPPORTED;
240	246
	247	+ if (AMPERE_IED_HACK(disp) && (lnkcmp = lt.dp->info.script[0])) {
	248	+ /* Execute BeforeLinkTraining script from DP Info table. */
	249	+ while (ior->dp.bw < nvbios_rd08(bios, lnkcmp))
	250	+ lnkcmp += 3;
	251	+ lnkcmp = nvbios_rd16(bios, lnkcmp + 1);
	252	+
	253	+ nvbios_init(&dp->outp.disp->engine.subdev, lnkcmp,
	254	+ init.outp = &dp->outp.info;
	255	+ init.or = ior->id;
	256	+ init.link = ior->asy.link;
	257	+ );
	258	+ }
	259	+
241	260	/* Set desired link configuration on the source. */
242	261	if ((lnkcmp = lt.dp->info.lnkcmp)) {
243	262	if (dp->version < 0x30) {
@@ -316,12 +335,14 @@ nvkm_dp_train_init(struct nvkm_dp *dp) · 72 unmodified lines
316	335	);
317	336	}
318	337
319		− /* Execute BeforeLinkTraining script from DP Info table. */
320		− nvbios_init(&dp->outp.disp->engine.subdev, dp->info.script[0],
321		− init.outp = &dp->outp.info;
322		− init.or = dp->outp.ior->id;
323		− init.link = dp->outp.ior->asy.link;
324		− );
	338	+ if (!AMPERE_IED_HACK(dp->outp.disp)) {
	339	+ /* Execute BeforeLinkTraining script from DP Info table. */
	340	+ nvbios_init(&dp->outp.disp->engine.subdev, dp->info.script[0],
	341	+ init.outp = &dp->outp.info;
	342	+ init.or = dp->outp.ior->id;
	343	+ init.link = dp->outp.ior->asy.link;
	344	+ );
	345	+ }
325	346	}
326	347
327	348	static const struct dp_rates {

drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.c+46−0

@@ -0,0 +1,46 @@
	1	+/*
	2	+ * Copyright 2021 Red Hat Inc.
	3	+ *
	4	+ * Permission is hereby granted, free of charge, to any person obtaining a
	5	+ * copy of this software and associated documentation files (the "Software"),
	6	+ * to deal in the Software without restriction, including without limitation
	7	+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	+ * and/or sell copies of the Software, and to permit persons to whom the
	9	+ * Software is furnished to do so, subject to the following conditions:
	10	+ *
	11	+ * The above copyright notice and this permission notice shall be included in
	12	+ * all copies or substantial portions of the Software.
	13	+ *
	14	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	+ * OTHER DEALINGS IN THE SOFTWARE.
	21	+ */
	22	+#include "nv50.h"
	23	+#include "head.h"
	24	+#include "ior.h"
	25	+#include "channv50.h"
	26	+#include "rootnv50.h"
	27	+
	28	+static const struct nv50_disp_func
	29	+ga102_disp = {
	30	+ .init = tu102_disp_init,
	31	+ .fini = gv100_disp_fini,
	32	+ .intr = gv100_disp_intr,
	33	+ .uevent = &gv100_disp_chan_uevent,
	34	+ .super = gv100_disp_super,
	35	+ .root = &ga102_disp_root_oclass,
	36	+ .wndw = { .cnt = gv100_disp_wndw_cnt },
	37	+ .head = { .cnt = gv100_head_cnt, .new = gv100_head_new },
	38	+ .sor = { .cnt = gv100_sor_cnt, .new = ga102_sor_new },
	39	+ .ramht_size = 0x2000,
	40	+};
	41	+
	42	+int
	43	+ga102_disp_new(struct nvkm_device device, int index, struct nvkm_disp *pdisp)
	44	+{
	45	+ return nv50_disp_new_(&ga102_disp, device, index, pdisp);
	46	+}

drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h+4−0

@@ -150,6 +150,8 @@ void gv100_sor_dp_audio(struct nvkm_ior *, int, bool); · 149 unmodified lines
150	150	void gv100_sor_dp_audio_sym(struct nvkm_ior *, int, u16, u32);
151	151	void gv100_sor_dp_watermark(struct nvkm_ior *, int, u8);
152	152
	153	+void tu102_sor_dp_vcpi(struct nvkm_ior *, int, u8, u8, u16, u16);
	154	+
153	155	void g84_hdmi_ctrl(struct nvkm_ior , int, bool, u8, u8, u8 , u8 , u8 *, u8);
154	156	void gt215_hdmi_ctrl(struct nvkm_ior , int, bool, u8, u8, u8 , u8 , u8 *, u8);
155	157	void gf119_hdmi_ctrl(struct nvkm_ior , int, bool, u8, u8, u8 , u8 , u8 *, u8);
@@ -207,4 +209,6 @@ int gv100_sor_cnt(struct nvkm_disp , unsigned long ); · 51 unmodified lines
207	209	int gv100_sor_new(struct nvkm_disp *, int);
208	210
209	211	int tu102_sor_new(struct nvkm_disp *, int);
	212	+
	213	+int ga102_sor_new(struct nvkm_disp *, int);
210	214	#endif

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h+2−0

@@ -86,6 +86,8 @@ void gv100_disp_intr(struct nv50_disp *); · 85 unmodified lines
86	86	void gv100_disp_super(struct work_struct *);
87	87	int gv100_disp_wndw_cnt(struct nvkm_disp , unsigned long );
88	88
	89	+int tu102_disp_init(struct nv50_disp *);
	90	+
89	91	void nv50_disp_dptmds_war_2(struct nv50_disp , struct dcb_output );
90	92	void nv50_disp_dptmds_war_3(struct nv50_disp , struct dcb_output );
91	93	void nv50_disp_update_sppll1(struct nv50_disp *);

drivers/gpu/drm/nouveau/nvkm/engine/disp/rootga102.c+52−0

@@ -0,0 +1,52 @@
	1	+/*
	2	+ * Copyright 2021 Red Hat Inc.
	3	+ *
	4	+ * Permission is hereby granted, free of charge, to any person obtaining a
	5	+ * copy of this software and associated documentation files (the "Software"),
	6	+ * to deal in the Software without restriction, including without limitation
	7	+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	+ * and/or sell copies of the Software, and to permit persons to whom the
	9	+ * Software is furnished to do so, subject to the following conditions:
	10	+ *
	11	+ * The above copyright notice and this permission notice shall be included in
	12	+ * all copies or substantial portions of the Software.
	13	+ *
	14	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	+ * OTHER DEALINGS IN THE SOFTWARE.
	21	+ */
	22	+#include "rootnv50.h"
	23	+#include "channv50.h"
	24	+
	25	+#include <nvif/class.h>
	26	+
	27	+static const struct nv50_disp_root_func
	28	+ga102_disp_root = {
	29	+ .user = {
	30	+ {{-1,-1,GV100_DISP_CAPS }, gv100_disp_caps_new },
	31	+ {{0,0,GA102_DISP_CURSOR }, gv100_disp_curs_new },
	32	+ {{0,0,GA102_DISP_WINDOW_IMM_CHANNEL_DMA}, gv100_disp_wimm_new },
	33	+ {{0,0,GA102_DISP_CORE_CHANNEL_DMA }, gv100_disp_core_new },
	34	+ {{0,0,GA102_DISP_WINDOW_CHANNEL_DMA }, gv100_disp_wndw_new },
	35	+ {}
	36	+ },
	37	+};
	38	+
	39	+static int
	40	+ga102_disp_root_new(struct nvkm_disp disp, const struct nvkm_oclass oclass,
	41	+ void data, u32 size, struct nvkm_object *pobject)
	42	+{
	43	+ return nv50_disp_root_new_(&ga102_disp_root, disp, oclass, data, size, pobject);
	44	+}
	45	+
	46	+const struct nvkm_disp_oclass
	47	+ga102_disp_root_oclass = {
	48	+ .base.oclass = GA102_DISP,
	49	+ .base.minver = -1,
	50	+ .base.maxver = -1,
	51	+ .ctor = ga102_disp_root_new,
	52	+};

drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.h+1−0

@@ -41,4 +41,5 @@ extern const struct nvkm_disp_oclass gp100_disp_root_oclass; · 40 unmodified lines
41	41	extern const struct nvkm_disp_oclass gp102_disp_root_oclass;
42	42	extern const struct nvkm_disp_oclass gv100_disp_root_oclass;
43	43	extern const struct nvkm_disp_oclass tu102_disp_root_oclass;
	44	+extern const struct nvkm_disp_oclass ga102_disp_root_oclass;
44	45	#endif

drivers/gpu/drm/nouveau/nvkm/engine/disp/sorga102.c+140−0

@@ -0,0 +1,140 @@
	1	+/*
	2	+ * Copyright 2021 Red Hat Inc.
	3	+ *
	4	+ * Permission is hereby granted, free of charge, to any person obtaining a
	5	+ * copy of this software and associated documentation files (the "Software"),
	6	+ * to deal in the Software without restriction, including without limitation
	7	+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	+ * and/or sell copies of the Software, and to permit persons to whom the
	9	+ * Software is furnished to do so, subject to the following conditions:
	10	+ *
	11	+ * The above copyright notice and this permission notice shall be included in
	12	+ * all copies or substantial portions of the Software.
	13	+ *
	14	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	+ * OTHER DEALINGS IN THE SOFTWARE.
	21	+ */
	22	+#include "ior.h"
	23	+
	24	+#include <subdev/timer.h>
	25	+
	26	+static int
	27	+ga102_sor_dp_links(struct nvkm_ior sor, struct nvkm_i2c_aux aux)
	28	+{
	29	+ struct nvkm_device *device = sor->disp->engine.subdev.device;
	30	+ const u32 soff = nv50_ior_base(sor);
	31	+ const u32 loff = nv50_sor_link(sor);
	32	+ u32 dpctrl = 0x00000000;
	33	+ u32 clksor = 0x00000000;
	34	+
	35	+ switch (sor->dp.bw) {
	36	+ case 0x06: clksor \|= 0x00000000; break;
	37	+ case 0x0a: clksor \|= 0x00040000; break;
	38	+ case 0x14: clksor \|= 0x00080000; break;
	39	+ case 0x1e: clksor \|= 0x000c0000; break;
	40	+ default:
	41	+ WARN_ON(1);
	42	+ return -EINVAL;
	43	+ }
	44	+
	45	+ dpctrl \|= ((1 << sor->dp.nr) - 1) << 16;
	46	+ if (sor->dp.mst)
	47	+ dpctrl \|= 0x40000000;
	48	+ if (sor->dp.ef)
	49	+ dpctrl \|= 0x00004000;
	50	+
	51	+ nvkm_mask(device, 0x612300 + soff, 0x007c0000, clksor);
	52	+
	53	+ /XXX/
	54	+ nvkm_msec(device, 40, NVKM_DELAY);
	55	+ nvkm_mask(device, 0x612300 + soff, 0x00030000, 0x00010000);
	56	+ nvkm_mask(device, 0x61c10c + loff, 0x00000003, 0x00000001);
	57	+
	58	+ nvkm_mask(device, 0x61c10c + loff, 0x401f4000, dpctrl);
	59	+ return 0;
	60	+}
	61	+
	62	+static void
	63	+ga102_sor_clock(struct nvkm_ior *sor)
	64	+{
	65	+ struct nvkm_device *device = sor->disp->engine.subdev.device;
	66	+ u32 div2 = 0;
	67	+ if (sor->asy.proto == TMDS) {
	68	+ if (sor->tmds.high_speed)
	69	+ div2 = 1;
	70	+ }
	71	+ nvkm_wr32(device, 0x00ec08 + (sor->id * 0x10), 0x00000000);
	72	+ nvkm_wr32(device, 0x00ec04 + (sor->id * 0x10), div2);
	73	+}
	74	+
	75	+static const struct nvkm_ior_func
	76	+ga102_sor_hda = {
	77	+ .route = {
	78	+ .get = gm200_sor_route_get,
	79	+ .set = gm200_sor_route_set,
	80	+ },
	81	+ .state = gv100_sor_state,
	82	+ .power = nv50_sor_power,
	83	+ .clock = ga102_sor_clock,
	84	+ .hdmi = {
	85	+ .ctrl = gv100_hdmi_ctrl,
	86	+ .scdc = gm200_hdmi_scdc,
	87	+ },
	88	+ .dp = {
	89	+ .lanes = { 0, 1, 2, 3 },
	90	+ .links = ga102_sor_dp_links,
	91	+ .power = g94_sor_dp_power,
	92	+ .pattern = gm107_sor_dp_pattern,
	93	+ .drive = gm200_sor_dp_drive,
	94	+ .vcpi = tu102_sor_dp_vcpi,
	95	+ .audio = gv100_sor_dp_audio,
	96	+ .audio_sym = gv100_sor_dp_audio_sym,
	97	+ .watermark = gv100_sor_dp_watermark,
	98	+ },
	99	+ .hda = {
	100	+ .hpd = gf119_hda_hpd,
	101	+ .eld = gf119_hda_eld,
	102	+ .device_entry = gv100_hda_device_entry,
	103	+ },
	104	+};
	105	+
	106	+static const struct nvkm_ior_func
	107	+ga102_sor = {
	108	+ .route = {
	109	+ .get = gm200_sor_route_get,
	110	+ .set = gm200_sor_route_set,
	111	+ },
	112	+ .state = gv100_sor_state,
	113	+ .power = nv50_sor_power,
	114	+ .clock = ga102_sor_clock,
	115	+ .hdmi = {
	116	+ .ctrl = gv100_hdmi_ctrl,
	117	+ .scdc = gm200_hdmi_scdc,
	118	+ },
	119	+ .dp = {
	120	+ .lanes = { 0, 1, 2, 3 },
	121	+ .links = ga102_sor_dp_links,
	122	+ .power = g94_sor_dp_power,
	123	+ .pattern = gm107_sor_dp_pattern,
	124	+ .drive = gm200_sor_dp_drive,
	125	+ .vcpi = tu102_sor_dp_vcpi,
	126	+ .audio = gv100_sor_dp_audio,
	127	+ .audio_sym = gv100_sor_dp_audio_sym,
	128	+ .watermark = gv100_sor_dp_watermark,
	129	+ },
	130	+};
	131	+
	132	+int
	133	+ga102_sor_new(struct nvkm_disp *disp, int id)
	134	+{
	135	+ struct nvkm_device *device = disp->engine.subdev.device;
	136	+ u32 hda = nvkm_rd32(device, 0x08a15c);
	137	+ if (hda & BIT(id))
	138	+ return nvkm_ior_new_(&ga102_sor_hda, disp, SOR, id);
	139	+ return nvkm_ior_new_(&ga102_sor, disp, SOR, id);
	140	+}

drivers/gpu/drm/nouveau/nvkm/engine/disp/sortu102.c+1−1

@@ -23,7 +23,7 @@ · 22 unmodified lines
23	23
24	24	#include <subdev/timer.h>
25	25
26		−static void
	26	+void
27	27	tu102_sor_dp_vcpi(struct nvkm_ior *sor, int head,
28	28	u8 slot, u8 slot_nr, u16 pbn, u16 aligned)
29	29	{

drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c+1−1

@@ -28,7 +28,7 @@ · 27 unmodified lines
28	28	#include <core/gpuobj.h>
29	29	#include <subdev/timer.h>
30	30
31		−static int
	31	+int
32	32	tu102_disp_init(struct nv50_disp *disp)
33	33	{
34	34	struct nvkm_device *device = disp->base.engine.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c+1−1

@@ -75,7 +75,7 @@ shadow_image(struct nvkm_bios bios, int idx, u32 offset, struct shadow mthd) · 74 unmodified lines
75	75	nvkm_debug(subdev, "%08x: type %02x, %d bytes\n",
76	76	image.base, image.type, image.size);
77	77
78		− if (!shadow_fetch(bios, mthd, image.size)) {
	78	+ if (!shadow_fetch(bios, mthd, image.base + image.size)) {
79	79	nvkm_debug(subdev, "%08x: fetch failed\n", image.base);
80	80	return 0;
81	81	}

drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowramin.c+3−0

@@ -64,6 +64,9 @@ pramin_init(struct nvkm_bios bios, const char name) · 63 unmodified lines
64	64	return NULL;
65	65
66	66	/* we can't get the bios image pointer without PDISP */
	67	+ if (device->card_type >= GA100)
	68	+ addr = device->chipset == 0x170; /XXX: find the fuse reg for this /
	69	+ else
67	70	if (device->card_type >= GM100)
68	71	addr = nvkm_rd32(device, 0x021c04);
69	72	else

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/Kbuild+1−0

@@ -15,3 +15,4 @@ nvkm-y += nvkm/subdev/devinit/gm107.o · 14 unmodified lines
15	15	nvkm-y += nvkm/subdev/devinit/gm200.o
16	16	nvkm-y += nvkm/subdev/devinit/gv100.o
17	17	nvkm-y += nvkm/subdev/devinit/tu102.o
	18	+nvkm-y += nvkm/subdev/devinit/ga100.o

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ga100.c+76−0

@@ -0,0 +1,76 @@
	1	+/*
	2	+ * Copyright 2021 Red Hat Inc.
	3	+ *
	4	+ * Permission is hereby granted, free of charge, to any person obtaining a
	5	+ * copy of this software and associated documentation files (the "Software"),
	6	+ * to deal in the Software without restriction, including without limitation
	7	+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	+ * and/or sell copies of the Software, and to permit persons to whom the
	9	+ * Software is furnished to do so, subject to the following conditions:
	10	+ *
	11	+ * The above copyright notice and this permission notice shall be included in
	12	+ * all copies or substantial portions of the Software.
	13	+ *
	14	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	+ * OTHER DEALINGS IN THE SOFTWARE.
	21	+ */
	22	+#include "nv50.h"
	23	+
	24	+#include <subdev/bios.h>
	25	+#include <subdev/bios/pll.h>
	26	+#include <subdev/clk/pll.h>
	27	+
	28	+static int
	29	+ga100_devinit_pll_set(struct nvkm_devinit *init, u32 type, u32 freq)
	30	+{
	31	+ struct nvkm_subdev *subdev = &init->subdev;
	32	+ struct nvkm_device *device = subdev->device;
	33	+ struct nvbios_pll info;
	34	+ int head = type - PLL_VPLL0;
	35	+ int N, fN, M, P;
	36	+ int ret;
	37	+
	38	+ ret = nvbios_pll_parse(device->bios, type, &info);
	39	+ if (ret)
	40	+ return ret;
	41	+
	42	+ ret = gt215_pll_calc(subdev, &info, freq, &N, &fN, &M, &P);
	43	+ if (ret < 0)
	44	+ return ret;
	45	+
	46	+ switch (info.type) {
	47	+ case PLL_VPLL0:
	48	+ case PLL_VPLL1:
	49	+ case PLL_VPLL2:
	50	+ case PLL_VPLL3:
	51	+ nvkm_wr32(device, 0x00ef00 + (head * 0x40), 0x02080004);
	52	+ nvkm_wr32(device, 0x00ef18 + (head * 0x40), (N << 16) \| fN);
	53	+ nvkm_wr32(device, 0x00ef04 + (head * 0x40), (P << 16) \| M);
	54	+ nvkm_wr32(device, 0x00e9c0 + (head * 0x04), 0x00000001);
	55	+ break;
	56	+ default:
	57	+ nvkm_warn(subdev, "%08x/%dKhz unimplemented\n", type, freq);
	58	+ ret = -EINVAL;
	59	+ break;
	60	+ }
	61	+
	62	+ return ret;
	63	+}
	64	+
	65	+static const struct nvkm_devinit_func
	66	+ga100_devinit = {
	67	+ .init = nv50_devinit_init,
	68	+ .post = tu102_devinit_post,
	69	+ .pll_set = ga100_devinit_pll_set,
	70	+};
	71	+
	72	+int
	73	+ga100_devinit_new(struct nvkm_device device, int index, struct nvkm_devinit *pinit)
	74	+{
	75	+ return nv50_devinit_new_(&ga100_devinit, device, index, pinit);
	76	+}

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/priv.h+1−0

@@ -19,4 +19,5 @@ void nvkm_devinit_ctor(const struct nvkm_devinit_func , struct nvkm_device , · 18 unmodified lines
19	19	int index, struct nvkm_devinit *);
20	20
21	21	int nv04_devinit_post(struct nvkm_devinit *, bool);
	22	+int tu102_devinit_post(struct nvkm_devinit *, bool);
22	23	#endif

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.c+1−1

@@ -65,7 +65,7 @@ tu102_devinit_pll_set(struct nvkm_devinit *init, u32 type, u32 freq) · 64 unmodified lines
65	65	return ret;
66	66	}
67	67
68		−static int
	68	+int
69	69	tu102_devinit_post(struct nvkm_devinit *base, bool post)
70	70	{
71	71	struct nv50_devinit *init = nv50_devinit(base);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/Kbuild+3−0

@@ -32,6 +32,8 @@ nvkm-y += nvkm/subdev/fb/gp100.o · 31 unmodified lines
32	32	nvkm-y += nvkm/subdev/fb/gp102.o
33	33	nvkm-y += nvkm/subdev/fb/gp10b.o
34	34	nvkm-y += nvkm/subdev/fb/gv100.o
	35	+nvkm-y += nvkm/subdev/fb/ga100.o
	36	+nvkm-y += nvkm/subdev/fb/ga102.o
35	37
36	38	nvkm-y += nvkm/subdev/fb/ram.o
37	39	nvkm-y += nvkm/subdev/fb/ramnv04.o
@@ -52,6 +54,7 @@ nvkm-y += nvkm/subdev/fb/ramgk104.o · 14 unmodified lines
52	54	nvkm-y += nvkm/subdev/fb/ramgm107.o
53	55	nvkm-y += nvkm/subdev/fb/ramgm200.o
54	56	nvkm-y += nvkm/subdev/fb/ramgp100.o
	57	+nvkm-y += nvkm/subdev/fb/ramga102.o
55	58	nvkm-y += nvkm/subdev/fb/sddr2.o
56	59	nvkm-y += nvkm/subdev/fb/sddr3.o
57	60	nvkm-y += nvkm/subdev/fb/gddr3.o

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ga100.c+40−0

@@ -0,0 +1,40 @@
	1	+/*
	2	+ * Copyright 2021 Red Hat Inc.
	3	+ *
	4	+ * Permission is hereby granted, free of charge, to any person obtaining a
	5	+ * copy of this software and associated documentation files (the "Software"),
	6	+ * to deal in the Software without restriction, including without limitation
	7	+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	+ * and/or sell copies of the Software, and to permit persons to whom the
	9	+ * Software is furnished to do so, subject to the following conditions:
	10	+ *
	11	+ * The above copyright notice and this permission notice shall be included in
	12	+ * all copies or substantial portions of the Software.
	13	+ *
	14	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	+ * OTHER DEALINGS IN THE SOFTWARE.
	21	+ */
	22	+#include "gf100.h"
	23	+#include "ram.h"
	24	+
	25	+static const struct nvkm_fb_func
	26	+ga100_fb = {
	27	+ .dtor = gf100_fb_dtor,
	28	+ .oneinit = gf100_fb_oneinit,
	29	+ .init = gp100_fb_init,
	30	+ .init_page = gv100_fb_init_page,
	31	+ .init_unkn = gp100_fb_init_unkn,
	32	+ .ram_new = gp100_ram_new,
	33	+ .default_bigpage = 16,
	34	+};
	35	+
	36	+int
	37	+ga100_fb_new(struct nvkm_device device, int index, struct nvkm_fb *pfb)
	38	+{
	39	+ return gp102_fb_new_(&ga100_fb, device, index, pfb);
	40	+}

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ga102.c+40−0

@@ -0,0 +1,40 @@
	1	+/*
	2	+ * Copyright 2021 Red Hat Inc.
	3	+ *
	4	+ * Permission is hereby granted, free of charge, to any person obtaining a
	5	+ * copy of this software and associated documentation files (the "Software"),
	6	+ * to deal in the Software without restriction, including without limitation
	7	+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	+ * and/or sell copies of the Software, and to permit persons to whom the
	9	+ * Software is furnished to do so, subject to the following conditions:
	10	+ *
	11	+ * The above copyright notice and this permission notice shall be included in
	12	+ * all copies or substantial portions of the Software.
	13	+ *
	14	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	+ * OTHER DEALINGS IN THE SOFTWARE.
	21	+ */
	22	+#include "gf100.h"
	23	+#include "ram.h"
	24	+
	25	+static const struct nvkm_fb_func
	26	+ga102_fb = {
	27	+ .dtor = gf100_fb_dtor,
	28	+ .oneinit = gf100_fb_oneinit,
	29	+ .init = gp100_fb_init,
	30	+ .init_page = gv100_fb_init_page,
	31	+ .init_unkn = gp100_fb_init_unkn,
	32	+ .ram_new = ga102_ram_new,
	33	+ .default_bigpage = 16,
	34	+};
	35	+
	36	+int
	37	+ga102_fb_new(struct nvkm_device device, int index, struct nvkm_fb *pfb)
	38	+{
	39	+ return gp102_fb_new_(&ga102_fb, device, index, pfb);
	40	+}

drivers/gpu/drm/nouveau/nvkm/subdev/fb/gv100.c+1−1

@@ -22,7 +22,7 @@ · 21 unmodified lines
22	22	#include "gf100.h"
23	23	#include "ram.h"
24	24
25		−static int
	25	+int
26	26	gv100_fb_init_page(struct nvkm_fb *fb)
27	27	{
28	28	return (fb->page == 16) ? 0 : -EINVAL;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/priv.h+2−0

@@ -82,4 +82,6 @@ int gp102_fb_new_(const struct nvkm_fb_func , struct nvkm_device , int, · 81 unmodified lines
82	82	struct nvkm_fb **);
83	83	bool gp102_fb_vpr_scrub_required(struct nvkm_fb *);
84	84	int gp102_fb_vpr_scrub(struct nvkm_fb *);
	85	+
	86	+int gv100_fb_init_page(struct nvkm_fb *);
85	87	#endif

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ram.h+1−0

@@ -70,4 +70,5 @@ int gk104_ram_new(struct nvkm_fb , struct nvkm_ram *); · 69 unmodified lines
70	70	int gm107_ram_new(struct nvkm_fb , struct nvkm_ram *);
71	71	int gm200_ram_new(struct nvkm_fb , struct nvkm_ram *);
72	72	int gp100_ram_new(struct nvkm_fb , struct nvkm_ram *);
	73	+int ga102_ram_new(struct nvkm_fb , struct nvkm_ram *);
73	74	#endif

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramga102.c+40−0

@@ -0,0 +1,40 @@
	1	+/*
	2	+ * Copyright 2021 Red Hat Inc.
	3	+ *
	4	+ * Permission is hereby granted, free of charge, to any person obtaining a
	5	+ * copy of this software and associated documentation files (the "Software"),
	6	+ * to deal in the Software without restriction, including without limitation
	7	+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	+ * and/or sell copies of the Software, and to permit persons to whom the
	9	+ * Software is furnished to do so, subject to the following conditions:
	10	+ *
	11	+ * The above copyright notice and this permission notice shall be included in
	12	+ * all copies or substantial portions of the Software.
	13	+ *
	14	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	+ * OTHER DEALINGS IN THE SOFTWARE.
	21	+ */
	22	+#include "ram.h"
	23	+
	24	+#include <subdev/bios.h>
	25	+#include <subdev/bios/init.h>
	26	+#include <subdev/bios/rammap.h>
	27	+
	28	+static const struct nvkm_ram_func
	29	+ga102_ram = {
	30	+};
	31	+
	32	+int
	33	+ga102_ram_new(struct nvkm_fb fb, struct nvkm_ram *pram)
	34	+{
	35	+ struct nvkm_device *device = fb->subdev.device;
	36	+ enum nvkm_ram_type type = nvkm_fb_bios_memtype(device->bios);
	37	+ u32 size = nvkm_rd32(device, 0x1183a4);
	38	+
	39	+ return nvkm_ram_new_(&ga102_ram, fb, type, (u64)size << 20, pram);
	40	+}

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/Kbuild+1−0

@@ -5,3 +5,4 @@ nvkm-y += nvkm/subdev/gpio/nv50.o · 4 unmodified lines
5	5	nvkm-y += nvkm/subdev/gpio/g94.o
6	6	nvkm-y += nvkm/subdev/gpio/gf119.o
7	7	nvkm-y += nvkm/subdev/gpio/gk104.o
	8	+nvkm-y += nvkm/subdev/gpio/ga102.o

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/ga102.c+118−0

@@ -0,0 +1,118 @@
	1	+/*
	2	+ * Copyright 2021 Red Hat Inc.
	3	+ *
	4	+ * Permission is hereby granted, free of charge, to any person obtaining a
	5	+ * copy of this software and associated documentation files (the "Software"),
	6	+ * to deal in the Software without restriction, including without limitation
	7	+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	+ * and/or sell copies of the Software, and to permit persons to whom the
	9	+ * Software is furnished to do so, subject to the following conditions:
	10	+ *
	11	+ * The above copyright notice and this permission notice shall be included in
	12	+ * all copies or substantial portions of the Software.
	13	+ *
	14	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	+ * OTHER DEALINGS IN THE SOFTWARE.
	21	+ */
	22	+#include "priv.h"
	23	+
	24	+static void
	25	+ga102_gpio_reset(struct nvkm_gpio *gpio, u8 match)
	26	+{
	27	+ struct nvkm_device *device = gpio->subdev.device;
	28	+ struct nvkm_bios *bios = device->bios;
	29	+ u8 ver, len;
	30	+ u16 entry;
	31	+ int ent = -1;
	32	+
	33	+ while ((entry = dcb_gpio_entry(bios, 0, ++ent, &ver, &len))) {
	34	+ u32 data = nvbios_rd32(bios, entry);
	35	+ u8 line = (data & 0x0000003f);
	36	+ u8 defs = !!(data & 0x00000080);
	37	+ u8 func = (data & 0x0000ff00) >> 8;
	38	+ u8 unk0 = (data & 0x00ff0000) >> 16;
	39	+ u8 unk1 = (data & 0x1f000000) >> 24;
	40	+
	41	+ if ( func == DCB_GPIO_UNUSED \|\|
	42	+ (match != DCB_GPIO_UNUSED && match != func))
	43	+ continue;
	44	+
	45	+ nvkm_gpio_set(gpio, 0, func, line, defs);
	46	+
	47	+ nvkm_mask(device, 0x021200 + (line * 4), 0xff, unk0);
	48	+ if (unk1--)
	49	+ nvkm_mask(device, 0x00d740 + (unk1 * 4), 0xff, line);
	50	+ }
	51	+}
	52	+
	53	+static int
	54	+ga102_gpio_drive(struct nvkm_gpio *gpio, int line, int dir, int out)
	55	+{
	56	+ struct nvkm_device *device = gpio->subdev.device;
	57	+ u32 data = ((dir ^ 1) << 13) \| (out << 12);
	58	+ nvkm_mask(device, 0x021200 + (line * 4), 0x00003000, data);
	59	+ nvkm_mask(device, 0x00d604, 0x00000001, 0x00000001); /* update? */
	60	+ return 0;
	61	+}
	62	+
	63	+static int
	64	+ga102_gpio_sense(struct nvkm_gpio *gpio, int line)
	65	+{
	66	+ struct nvkm_device *device = gpio->subdev.device;
	67	+ return !!(nvkm_rd32(device, 0x021200 + (line * 4)) & 0x00004000);
	68	+}
	69	+
	70	+static void
	71	+ga102_gpio_intr_stat(struct nvkm_gpio gpio, u32 hi, u32 *lo)
	72	+{
	73	+ struct nvkm_device *device = gpio->subdev.device;
	74	+ u32 intr0 = nvkm_rd32(device, 0x021640);
	75	+ u32 intr1 = nvkm_rd32(device, 0x02164c);
	76	+ u32 stat0 = nvkm_rd32(device, 0x021648) & intr0;
	77	+ u32 stat1 = nvkm_rd32(device, 0x021654) & intr1;
	78	+ *lo = (stat1 & 0xffff0000) \| (stat0 >> 16);
	79	+ *hi = (stat1 << 16) \| (stat0 & 0x0000ffff);
	80	+ nvkm_wr32(device, 0x021640, intr0);
	81	+ nvkm_wr32(device, 0x02164c, intr1);
	82	+}
	83	+
	84	+static void
	85	+ga102_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
	86	+{
	87	+ struct nvkm_device *device = gpio->subdev.device;
	88	+ u32 inte0 = nvkm_rd32(device, 0x021648);
	89	+ u32 inte1 = nvkm_rd32(device, 0x021654);
	90	+ if (type & NVKM_GPIO_LO)
	91	+ inte0 = (inte0 & ~(mask << 16)) \| (data << 16);
	92	+ if (type & NVKM_GPIO_HI)
	93	+ inte0 = (inte0 & ~(mask & 0xffff)) \| (data & 0xffff);
	94	+ mask >>= 16;
	95	+ data >>= 16;
	96	+ if (type & NVKM_GPIO_LO)
	97	+ inte1 = (inte1 & ~(mask << 16)) \| (data << 16);
	98	+ if (type & NVKM_GPIO_HI)
	99	+ inte1 = (inte1 & ~mask) \| data;
	100	+ nvkm_wr32(device, 0x021648, inte0);
	101	+ nvkm_wr32(device, 0x021654, inte1);
	102	+}
	103	+
	104	+static const struct nvkm_gpio_func
	105	+ga102_gpio = {
	106	+ .lines = 32,
	107	+ .intr_stat = ga102_gpio_intr_stat,
	108	+ .intr_mask = ga102_gpio_intr_mask,
	109	+ .drive = ga102_gpio_drive,
	110	+ .sense = ga102_gpio_sense,
	111	+ .reset = ga102_gpio_reset,
	112	+};
	113	+
	114	+int
	115	+ga102_gpio_new(struct nvkm_device device, int index, struct nvkm_gpio *pgpio)
	116	+{
	117	+ return nvkm_gpio_new_(&ga102_gpio, device, index, pgpio);
	118	+}

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/Kbuild+1−0

@@ -7,6 +7,7 @@ nvkm-y += nvkm/subdev/i2c/g94.o · 6 unmodified lines
7	7	nvkm-y += nvkm/subdev/i2c/gf117.o
8	8	nvkm-y += nvkm/subdev/i2c/gf119.o
9	9	nvkm-y += nvkm/subdev/i2c/gk104.o
	10	+nvkm-y += nvkm/subdev/i2c/gk110.o
10	11	nvkm-y += nvkm/subdev/i2c/gm200.o
11	12
12	13	nvkm-y += nvkm/subdev/i2c/pad.o

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.h+7−0

@@ -3,6 +3,13 @@ · 2 unmodified lines
3	3	#define __NVKM_I2C_AUX_H__
4	4	#include "pad.h"
5	5
	6	+static inline void
	7	+nvkm_i2c_aux_autodpcd(struct nvkm_i2c *i2c, int aux, bool enable)
	8	+{
	9	+ if (i2c->func->aux_autodpcd)
	10	+ i2c->func->aux_autodpcd(i2c, aux, false);
	11	+}
	12	+
6	13	struct nvkm_i2c_aux_func {
7	14	bool address_only;
8	15	int (xfer)(struct nvkm_i2c_aux , bool retry, u8 type,

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxg94.c+7−3

@@ -77,7 +77,8 @@ g94_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry, · 76 unmodified lines
77	77	u8 type, u32 addr, u8 data, u8 size)
78	78	{
79	79	struct g94_i2c_aux *aux = g94_i2c_aux(obj);
80		− struct nvkm_device *device = aux->base.pad->i2c->subdev.device;
	80	+ struct nvkm_i2c *i2c = aux->base.pad->i2c;
	81	+ struct nvkm_device *device = i2c->subdev.device;
81	82	const u32 base = aux->ch * 0x50;
82	83	u32 ctrl, stat, timeout, retries = 0;
83	84	u32 xbuf[4] = {};
@@ -96,6 +97,8 @@ g94_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry, · 12 unmodified lines
96	97	goto out;
97	98	}
98	99
	100	+ nvkm_i2c_aux_autodpcd(i2c, aux->ch, false);
	101	+
99	102	if (!(type & 1)) {
100	103	memcpy(xbuf, data, *size);
101	104	for (i = 0; i < 16; i += 4) {
@@ -128,7 +131,7 @@ g94_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry, · 26 unmodified lines
128	131	if (!timeout--) {
129	132	AUX_ERR(&aux->base, "timeout %08x", ctrl);
130	133	ret = -EIO;
131		− goto out;
	134	+ goto out_err;
132	135	}
133	136	} while (ctrl & 0x00010000);
134	137	ret = 0;
@@ -154,7 +157,8 @@ g94_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry, · 19 unmodified lines
154	157	memcpy(data, xbuf, *size);
155	158	*size = stat & 0x0000001f;
156	159	}
157		−
	160	+out_err:
	161	+ nvkm_i2c_aux_autodpcd(i2c, aux->ch, true);
158	162	out:
159	163	g94_i2c_aux_fini(aux);
160	164	return ret < 0 ? ret : (stat & 0x000f0000) >> 16;

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c+11−6

@@ -33,7 +33,7 @@ static void · 32 unmodified lines
33	33	gm200_i2c_aux_fini(struct gm200_i2c_aux *aux)
34	34	{
35	35	struct nvkm_device *device = aux->base.pad->i2c->subdev.device;
36		− nvkm_mask(device, 0x00d954 + (aux->ch * 0x50), 0x00310000, 0x00000000);
	36	+ nvkm_mask(device, 0x00d954 + (aux->ch * 0x50), 0x00710000, 0x00000000);
37	37	}
38	38
39	39	static int
@@ -54,10 +54,10 @@ gm200_i2c_aux_init(struct gm200_i2c_aux *aux) · 14 unmodified lines
54	54	AUX_ERR(&aux->base, "begin idle timeout %08x", ctrl);
55	55	return -EBUSY;
56	56	}
57		− } while (ctrl & 0x03010000);
	57	+ } while (ctrl & 0x07010000);
58	58
59	59	/* set some magic, and wait up to 1ms for it to appear */
60		− nvkm_mask(device, 0x00d954 + (aux->ch * 0x50), 0x00300000, ureq);
	60	+ nvkm_mask(device, 0x00d954 + (aux->ch * 0x50), 0x00700000, ureq);
61	61	timeout = 1000;
62	62	do {
63	63	ctrl = nvkm_rd32(device, 0x00d954 + (aux->ch * 0x50));
@@ -67,7 +67,7 @@ gm200_i2c_aux_init(struct gm200_i2c_aux *aux) · 3 unmodified lines
67	67	gm200_i2c_aux_fini(aux);
68	68	return -EBUSY;
69	69	}
70		− } while ((ctrl & 0x03000000) != urep);
	70	+ } while ((ctrl & 0x07000000) != urep);
71	71
72	72	return 0;
73	73	}
@@ -77,7 +77,8 @@ gm200_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry, · 3 unmodified lines
77	77	u8 type, u32 addr, u8 data, u8 size)
78	78	{
79	79	struct gm200_i2c_aux *aux = gm200_i2c_aux(obj);
80		− struct nvkm_device *device = aux->base.pad->i2c->subdev.device;
	80	+ struct nvkm_i2c *i2c = aux->base.pad->i2c;
	81	+ struct nvkm_device *device = i2c->subdev.device;
81	82	const u32 base = aux->ch * 0x50;
82	83	u32 ctrl, stat, timeout, retries = 0;
83	84	u32 xbuf[4] = {};
@@ -96,6 +97,8 @@ gm200_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry, · 12 unmodified lines
96	97	goto out;
97	98	}
98	99
	100	+ nvkm_i2c_aux_autodpcd(i2c, aux->ch, false);
	101	+
99	102	if (!(type & 1)) {
100	103	memcpy(xbuf, data, *size);
101	104	for (i = 0; i < 16; i += 4) {
@@ -128,7 +131,7 @@ gm200_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry, · 26 unmodified lines
128	131	if (!timeout--) {
129	132	AUX_ERR(&aux->base, "timeout %08x", ctrl);
130	133	ret = -EIO;
131		− goto out;
	134	+ goto out_err;
132	135	}
133	136	} while (ctrl & 0x00010000);
134	137	ret = 0;
@@ -155,6 +158,8 @@ gm200_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry, · 20 unmodified lines
155	158	*size = stat & 0x0000001f;
156	159	}
157	160
	161	+out_err:
	162	+ nvkm_i2c_aux_autodpcd(i2c, aux->ch, true);
158	163	out:
159	164	gm200_i2c_aux_fini(aux);
160	165	return ret < 0 ? ret : (stat & 0x000f0000) >> 16;

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gk110.c+45−0

@@ -0,0 +1,45 @@
	1	+/*
	2	+ * Copyright 2021 Red Hat Inc.
	3	+ *
	4	+ * Permission is hereby granted, free of charge, to any person obtaining a
	5	+ * copy of this software and associated documentation files (the "Software"),
	6	+ * to deal in the Software without restriction, including without limitation
	7	+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	+ * and/or sell copies of the Software, and to permit persons to whom the
	9	+ * Software is furnished to do so, subject to the following conditions:
	10	+ *
	11	+ * The above copyright notice and this permission notice shall be included in
	12	+ * all copies or substantial portions of the Software.
	13	+ *
	14	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	+ * OTHER DEALINGS IN THE SOFTWARE.
	21	+ */
	22	+#include "priv.h"
	23	+#include "pad.h"
	24	+
	25	+static void
	26	+gk110_aux_autodpcd(struct nvkm_i2c *i2c, int aux, bool enable)
	27	+{
	28	+ nvkm_mask(i2c->subdev.device, 0x00e4f8 + (aux * 0x50), 0x00010000, enable << 16);
	29	+}
	30	+
	31	+static const struct nvkm_i2c_func
	32	+gk110_i2c = {
	33	+ .pad_x_new = gf119_i2c_pad_x_new,
	34	+ .pad_s_new = gf119_i2c_pad_s_new,
	35	+ .aux = 4,
	36	+ .aux_stat = gk104_aux_stat,
	37	+ .aux_mask = gk104_aux_mask,
	38	+ .aux_autodpcd = gk110_aux_autodpcd,
	39	+};
	40	+
	41	+int
	42	+gk110_i2c_new(struct nvkm_device device, int index, struct nvkm_i2c *pi2c)
	43	+{
	44	+ return nvkm_i2c_new_(&gk110_i2c, device, index, pi2c);
	45	+}

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gm200.c+7−0

@@ -24,6 +24,12 @@ · 23 unmodified lines
24	24	#include "priv.h"
25	25	#include "pad.h"
26	26
	27	+static void
	28	+gm200_aux_autodpcd(struct nvkm_i2c *i2c, int aux, bool enable)
	29	+{
	30	+ nvkm_mask(i2c->subdev.device, 0x00d968 + (aux * 0x50), 0x00010000, enable << 16);
	31	+}
	32	+
27	33	static const struct nvkm_i2c_func
28	34	gm200_i2c = {
29	35	.pad_x_new = gf119_i2c_pad_x_new,
@@ -31,6 +37,7 @@ gm200_i2c = { · 1 unmodified line
31	37	.aux = 8,
32	38	.aux_stat = gk104_aux_stat,
33	39	.aux_mask = gk104_aux_mask,
	40	+ .aux_autodpcd = gm200_aux_autodpcd,
34	41	};
35	42
36	43	int

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/pad.h+1−1

@@ -1,7 +1,7 @@
1	1	/* SPDX-License-Identifier: MIT */
2	2	#ifndef __NVKM_I2C_PAD_H__
3	3	#define __NVKM_I2C_PAD_H__
4		−#include <subdev/i2c.h>
	4	+#include "priv.h"
5	5
6	6	struct nvkm_i2c_pad {
7	7	const struct nvkm_i2c_pad_func *func;

drivers/gpu/drm/nouveau/nvkm/subdev/i2c/priv.h+4−0

@@ -23,6 +23,10 @@ struct nvkm_i2c_func { · 22 unmodified lines
23	23	/* mask on/off interrupt types for a given set of auxch
24	24	*/
25	25	void (aux_mask)(struct nvkm_i2c , u32, u32, u32);
	26	+
	27	+ /* enable/disable HW-initiated DPCD reads
	28	+ */
	29	+ void (aux_autodpcd)(struct nvkm_i2c , int aux, bool enable);
26	30	};
27	31
28	32	void g94_aux_stat(struct nvkm_i2c , u32 , u32 , u32 , u32 *);

drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c+7−3

@@ -22,6 +22,7 @@ · 21 unmodified lines
22	22	* Authors: Ben Skeggs
23	23	*/
24	24	#include "priv.h"
	25	+#include <subdev/timer.h>
25	26
26	27	static void
27	28	gf100_ibus_intr_hub(struct nvkm_subdev *ibus, int i)
@@ -31,7 +32,6 @@ gf100_ibus_intr_hub(struct nvkm_subdev *ibus, int i) · 3 unmodified lines
31	32	u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0400));
32	33	u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0400));
33	34	nvkm_debug(ibus, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat);
34		− nvkm_mask(device, 0x122128 + (i * 0x0400), 0x00000200, 0x00000000);
35	35	}
36	36
37	37	static void
@@ -42,7 +42,6 @@ gf100_ibus_intr_rop(struct nvkm_subdev *ibus, int i) · 4 unmodified lines
42	42	u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0400));
43	43	u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0400));
44	44	nvkm_debug(ibus, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat);
45		− nvkm_mask(device, 0x124128 + (i * 0x0400), 0x00000200, 0x00000000);
46	45	}
47	46
48	47	static void
@@ -53,7 +52,6 @@ gf100_ibus_intr_gpc(struct nvkm_subdev *ibus, int i) · 4 unmodified lines
53	52	u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0400));
54	53	u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0400));
55	54	nvkm_debug(ibus, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat);
56		− nvkm_mask(device, 0x128128 + (i * 0x0400), 0x00000200, 0x00000000);
57	55	}
58	56
59	57	void
@@ -90,6 +88,12 @@ gf100_ibus_intr(struct nvkm_subdev *ibus) · 30 unmodified lines
90	88	intr1 &= ~stat;
91	89	}
92	90	}
	91	+
	92	+ nvkm_mask(device, 0x121c4c, 0x0000003f, 0x00000002);
	93	+ nvkm_msec(device, 2000,
	94	+ if (!(nvkm_rd32(device, 0x121c4c) & 0x0000003f))
	95	+ break;
	96	+ );
93	97	}
94	98
95	99	static int

drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c+7−3

@@ -22,6 +22,7 @@ · 21 unmodified lines
22	22	* Authors: Ben Skeggs
23	23	*/
24	24	#include "priv.h"
	25	+#include <subdev/timer.h>
25	26
26	27	static void
27	28	gk104_ibus_intr_hub(struct nvkm_subdev *ibus, int i)
@@ -31,7 +32,6 @@ gk104_ibus_intr_hub(struct nvkm_subdev *ibus, int i) · 3 unmodified lines
31	32	u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0800));
32	33	u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0800));
33	34	nvkm_debug(ibus, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat);
34		− nvkm_mask(device, 0x122128 + (i * 0x0800), 0x00000200, 0x00000000);
35	35	}
36	36
37	37	static void
@@ -42,7 +42,6 @@ gk104_ibus_intr_rop(struct nvkm_subdev *ibus, int i) · 4 unmodified lines
42	42	u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0800));
43	43	u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0800));
44	44	nvkm_debug(ibus, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat);
45		− nvkm_mask(device, 0x124128 + (i * 0x0800), 0x00000200, 0x00000000);
46	45	}
47	46
48	47	static void
@@ -53,7 +52,6 @@ gk104_ibus_intr_gpc(struct nvkm_subdev *ibus, int i) · 4 unmodified lines
53	52	u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0800));
54	53	u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0800));
55	54	nvkm_debug(ibus, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat);
56		− nvkm_mask(device, 0x128128 + (i * 0x0800), 0x00000200, 0x00000000);
57	55	}
58	56
59	57	void
@@ -90,6 +88,12 @@ gk104_ibus_intr(struct nvkm_subdev *ibus) · 30 unmodified lines
90	88	intr1 &= ~stat;
91	89	}
92	90	}
	91	+
	92	+ nvkm_mask(device, 0x12004c, 0x0000003f, 0x00000002);
	93	+ nvkm_msec(device, 2000,
	94	+ if (!(nvkm_rd32(device, 0x12004c) & 0x0000003f))
	95	+ break;
	96	+ );
93	97	}
94	98
95	99	static int

drivers/gpu/drm/nouveau/nvkm/subdev/mc/Kbuild+1−0

@@ -14,3 +14,4 @@ nvkm-y += nvkm/subdev/mc/gk20a.o · 13 unmodified lines
14	14	nvkm-y += nvkm/subdev/mc/gp100.o
15	15	nvkm-y += nvkm/subdev/mc/gp10b.o
16	16	nvkm-y += nvkm/subdev/mc/tu102.o
	17	+nvkm-y += nvkm/subdev/mc/ga100.o

drivers/gpu/drm/nouveau/nvkm/subdev/mc/ga100.c+74−0

@@ -0,0 +1,74 @@
	1	+/*
	2	+ * Copyright 2021 Red Hat Inc.
	3	+ *
	4	+ * Permission is hereby granted, free of charge, to any person obtaining a
	5	+ * copy of this software and associated documentation files (the "Software"),
	6	+ * to deal in the Software without restriction, including without limitation
	7	+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	+ * and/or sell copies of the Software, and to permit persons to whom the
	9	+ * Software is furnished to do so, subject to the following conditions:
	10	+ *
	11	+ * The above copyright notice and this permission notice shall be included in
	12	+ * all copies or substantial portions of the Software.
	13	+ *
	14	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	+ * OTHER DEALINGS IN THE SOFTWARE.
	21	+ */
	22	+#include "priv.h"
	23	+
	24	+static void
	25	+ga100_mc_intr_unarm(struct nvkm_mc *mc)
	26	+{
	27	+ nvkm_wr32(mc->subdev.device, 0xb81610, 0x00000004);
	28	+}
	29	+
	30	+static void
	31	+ga100_mc_intr_rearm(struct nvkm_mc *mc)
	32	+{
	33	+ nvkm_wr32(mc->subdev.device, 0xb81608, 0x00000004);
	34	+}
	35	+
	36	+static void
	37	+ga100_mc_intr_mask(struct nvkm_mc *mc, u32 mask, u32 intr)
	38	+{
	39	+ nvkm_wr32(mc->subdev.device, 0xb81210, mask & intr );
	40	+ nvkm_wr32(mc->subdev.device, 0xb81410, mask & ~(mask & intr));
	41	+}
	42	+
	43	+static u32
	44	+ga100_mc_intr_stat(struct nvkm_mc *mc)
	45	+{
	46	+ u32 intr_top = nvkm_rd32(mc->subdev.device, 0xb81600), intr = 0x00000000;
	47	+ if (intr_top & 0x00000004)
	48	+ intr = nvkm_mask(mc->subdev.device, 0xb81010, 0x00000000, 0x00000000);
	49	+ return intr;
	50	+}
	51	+
	52	+static void
	53	+ga100_mc_init(struct nvkm_mc *mc)
	54	+{
	55	+ nv50_mc_init(mc);
	56	+ nvkm_wr32(mc->subdev.device, 0xb81210, 0xffffffff);
	57	+}
	58	+
	59	+static const struct nvkm_mc_func
	60	+ga100_mc = {
	61	+ .init = ga100_mc_init,
	62	+ .intr = gp100_mc_intr,
	63	+ .intr_unarm = ga100_mc_intr_unarm,
	64	+ .intr_rearm = ga100_mc_intr_rearm,
	65	+ .intr_mask = ga100_mc_intr_mask,
	66	+ .intr_stat = ga100_mc_intr_stat,
	67	+ .reset = gk104_mc_reset,
	68	+};
	69	+
	70	+int
	71	+ga100_mc_new(struct nvkm_device device, int index, struct nvkm_mc *pmc)
	72	+{
	73	+ return nvkm_mc_new_(&ga100_mc, device, index, pmc);
	74	+}

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c+3−3

@@ -316,9 +316,9 @@ nvkm_mmu_vram(struct nvkm_mmu *mmu) · 315 unmodified lines
316	316	{
317	317	struct nvkm_device *device = mmu->subdev.device;
318	318	struct nvkm_mm *mm = &device->fb->ram->vram;
319		− const u32 sizeN = nvkm_mm_heap_size(mm, NVKM_RAM_MM_NORMAL);
320		− const u32 sizeU = nvkm_mm_heap_size(mm, NVKM_RAM_MM_NOMAP);
321		− const u32 sizeM = nvkm_mm_heap_size(mm, NVKM_RAM_MM_MIXED);
	319	+ const u64 sizeN = nvkm_mm_heap_size(mm, NVKM_RAM_MM_NORMAL);
	320	+ const u64 sizeU = nvkm_mm_heap_size(mm, NVKM_RAM_MM_NOMAP);
	321	+ const u64 sizeM = nvkm_mm_heap_size(mm, NVKM_RAM_MM_MIXED);
322	322	u8 type = NVKM_MEM_KIND * !!mmu->func->kind;
323	323	u8 heap = NVKM_MEM_VRAM;
324	324	int heapM, heapN, heapU;

drivers/gpu/drm/ttm/ttm_pool.c+11−11

@@ -66,7 +66,7 @@ static struct ttm_pool_type global_uncached[MAX_ORDER]; · 65 unmodified lines
66	66	static struct ttm_pool_type global_dma32_write_combined[MAX_ORDER];
67	67	static struct ttm_pool_type global_dma32_uncached[MAX_ORDER];
68	68
69		−static spinlock_t shrinker_lock;
	69	+static struct mutex shrinker_lock;
70	70	static struct list_head shrinker_list;
71	71	static struct shrinker mm_shrinker;
72	72
@@ -190,7 +190,7 @@ static int ttm_pool_map(struct ttm_pool *pool, unsigned int order, · 117 unmodified lines
190	190	size_t size = (1ULL << order) * PAGE_SIZE;
191	191
192	192	addr = dma_map_page(pool->dev, p, 0, size, DMA_BIDIRECTIONAL);
193		− if (dma_mapping_error(pool->dev, **dma_addr))
	193	+ if (dma_mapping_error(pool->dev, addr))
194	194	return -EFAULT;
195	195	}
196	196
@@ -249,9 +249,9 @@ static void ttm_pool_type_init(struct ttm_pool_type pt, struct ttm_pool pool, · 52 unmodified lines
249	249	spin_lock_init(&pt->lock);
250	250	INIT_LIST_HEAD(&pt->pages);
251	251
252		− spin_lock(&shrinker_lock);
	252	+ mutex_lock(&shrinker_lock);
253	253	list_add_tail(&pt->shrinker_list, &shrinker_list);
254		− spin_unlock(&shrinker_lock);
	254	+ mutex_unlock(&shrinker_lock);
255	255	}
256	256
257	257	/* Remove a pool_type from the global shrinker list and free all pages */
@@ -259,9 +259,9 @@ static void ttm_pool_type_fini(struct ttm_pool_type *pt) · 1 unmodified line
259	259	{
260	260	struct page p, tmp;
261	261
262		− spin_lock(&shrinker_lock);
	262	+ mutex_lock(&shrinker_lock);
263	263	list_del(&pt->shrinker_list);
264		− spin_unlock(&shrinker_lock);
	264	+ mutex_unlock(&shrinker_lock);
265	265
266	266	list_for_each_entry_safe(p, tmp, &pt->pages, lru)
267	267	ttm_pool_free_page(pt->pool, pt->caching, pt->order, p);
@@ -302,7 +302,7 @@ static unsigned int ttm_pool_shrink(void) · 34 unmodified lines
302	302	unsigned int num_freed;
303	303	struct page *p;
304	304
305		− spin_lock(&shrinker_lock);
	305	+ mutex_lock(&shrinker_lock);
306	306	pt = list_first_entry(&shrinker_list, typeof(*pt), shrinker_list);
307	307
308	308	p = ttm_pool_type_take(pt);
@@ -314,7 +314,7 @@ static unsigned int ttm_pool_shrink(void) · 5 unmodified lines
314	314	}
315	315
316	316	list_move_tail(&pt->shrinker_list, &shrinker_list);
317		− spin_unlock(&shrinker_lock);
	317	+ mutex_unlock(&shrinker_lock);
318	318
319	319	return num_freed;
320	320	}
@@ -564,7 +564,7 @@ int ttm_pool_debugfs(struct ttm_pool pool, struct seq_file m) · 243 unmodified lines
564	564	{
565	565	unsigned int i;
566	566
567		− spin_lock(&shrinker_lock);
	567	+ mutex_lock(&shrinker_lock);
568	568
569	569	seq_puts(m, "\t ");
570	570	for (i = 0; i < MAX_ORDER; ++i)
@@ -600,7 +600,7 @@ int ttm_pool_debugfs(struct ttm_pool pool, struct seq_file m) · 29 unmodified lines
600	600	seq_printf(m, "\ntotal\t: %8lu of %8lu\n",
601	601	atomic_long_read(&allocated_pages), page_pool_size);
602	602
603		− spin_unlock(&shrinker_lock);
	603	+ mutex_unlock(&shrinker_lock);
604	604
605	605	return 0;
606	606	}
@@ -644,7 +644,7 @@ int ttm_pool_mgr_init(unsigned long num_pages) · 37 unmodified lines
644	644	if (!page_pool_size)
645	645	page_pool_size = num_pages;
646	646
647		− spin_lock_init(&shrinker_lock);
	647	+ mutex_init(&shrinker_lock);
648	648	INIT_LIST_HEAD(&shrinker_list);
649	649
650	650	for (i = 0; i < MAX_ORDER; ++i) {

drivers/infiniband/core/cma_configfs.c+3−1

@@ -131,8 +131,10 @@ static ssize_t default_roce_mode_store(struct config_item *item, · 130 unmodified lines
131	131	return ret;
132	132
133	133	gid_type = ib_cache_gid_parse_type_str(buf);
134		− if (gid_type < 0)
	134	+ if (gid_type < 0) {
	135	+ cma_configfs_params_put(cma_dev);
135	136	return -EINVAL;
	137	+ }
136	138
137	139	ret = cma_set_default_gid_type(cma_dev, group->port_num, gid_type);
138	140

drivers/infiniband/core/restrack.c+1−0

@@ -254,6 +254,7 @@ void rdma_restrack_add(struct rdma_restrack_entry *res) · 253 unmodified lines
254	254	} else {
255	255	ret = xa_alloc_cyclic(&rt->xa, &res->id, res, xa_limit_32b,
256	256	&rt->next_id, GFP_KERNEL);
	257	+ ret = (ret < 0) ? ret : 0;
257	258	}
258	259
259	260	out:

drivers/infiniband/core/ucma.c+72−63

@@ -95,8 +95,6 @@ struct ucma_context { · 94 unmodified lines
95	95	u64 uid;
96	96
97	97	struct list_head list;
98		− /* sync between removal event and id destroy, protected by file mut */
99		− int destroying;
100	98	struct work_struct close_work;
101	99	};
102	100
@@ -122,7 +120,7 @@ static DEFINE_XARRAY_ALLOC(ctx_table); · 19 unmodified lines
122	120	static DEFINE_XARRAY_ALLOC(multicast_table);
123	121
124	122	static const struct file_operations ucma_fops;
125		−static int __destroy_id(struct ucma_context *ctx);
	123	+static int ucma_destroy_private_ctx(struct ucma_context *ctx);
126	124
127	125	static inline struct ucma_context *_ucma_find_context(int id,
128	126	struct ucma_file *file)
@@ -179,19 +177,14 @@ static void ucma_close_id(struct work_struct *work) · 50 unmodified lines
179	177
180	178	/* once all inflight tasks are finished, we close all underlying
181	179	* resources. The context is still alive till its explicit destryoing
182		− * by its creator.
	180	+ * by its creator. This puts back the xarray's reference.
183	181	*/
184	182	ucma_put_ctx(ctx);
185	183	wait_for_completion(&ctx->comp);
186	184	/* No new events will be generated after destroying the id. */
187	185	rdma_destroy_id(ctx->cm_id);
188	186
189		− /*
190		− * At this point ctx->ref is zero so the only place the ctx can be is in
191		− * a uevent or in __destroy_id(). Since the former doesn't touch
192		− * ctx->cm_id and the latter sync cancels this, there is no races with
193		− * this store.
194		− */
	187	+ /* Reading the cm_id without holding a positive ref is not allowed */
195	188	ctx->cm_id = NULL;
196	189	}
197	190
@@ -204,7 +197,6 @@ static struct ucma_context ucma_alloc_ctx(struct ucma_file file) · 6 unmodified lines
204	197	return NULL;
205	198
206	199	INIT_WORK(&ctx->close_work, ucma_close_id);
207		− refcount_set(&ctx->ref, 1);
208	200	init_completion(&ctx->comp);
209	201	/* So list_del() will work if we don't do ucma_finish_ctx() */
210	202	INIT_LIST_HEAD(&ctx->list);
@@ -218,6 +210,13 @@ static struct ucma_context ucma_alloc_ctx(struct ucma_file file) · 7 unmodified lines
218	210	return ctx;
219	211	}
220	212
	213	+static void ucma_set_ctx_cm_id(struct ucma_context *ctx,
	214	+ struct rdma_cm_id *cm_id)
	215	+{
	216	+ refcount_set(&ctx->ref, 1);
	217	+ ctx->cm_id = cm_id;
	218	+}
	219	+
221	220	static void ucma_finish_ctx(struct ucma_context *ctx)
222	221	{
223	222	lockdep_assert_held(&ctx->file->mut);
@@ -303,7 +302,7 @@ static int ucma_connect_event_handler(struct rdma_cm_id *cm_id, · 79 unmodified lines
303	302	ctx = ucma_alloc_ctx(listen_ctx->file);
304	303	if (!ctx)
305	304	goto err_backlog;
306		− ctx->cm_id = cm_id;
	305	+ ucma_set_ctx_cm_id(ctx, cm_id);
307	306
308	307	uevent = ucma_create_uevent(listen_ctx, event);
309	308	if (!uevent)
@@ -321,8 +320,7 @@ static int ucma_connect_event_handler(struct rdma_cm_id *cm_id, · 11 unmodified lines
321	320	return 0;
322	321
323	322	err_alloc:
324		− xa_erase(&ctx_table, ctx->id);
325		− kfree(ctx);
	323	+ ucma_destroy_private_ctx(ctx);
326	324	err_backlog:
327	325	atomic_inc(&listen_ctx->backlog);
328	326	/* Returning error causes the new ID to be destroyed */
@@ -356,8 +354,12 @@ static int ucma_event_handler(struct rdma_cm_id *cm_id, · 27 unmodified lines
356	354	wake_up_interruptible(&ctx->file->poll_wait);
357	355	}
358	356
359		− if (event->event == RDMA_CM_EVENT_DEVICE_REMOVAL && !ctx->destroying)
360		− queue_work(system_unbound_wq, &ctx->close_work);
	357	+ if (event->event == RDMA_CM_EVENT_DEVICE_REMOVAL) {
	358	+ xa_lock(&ctx_table);
	359	+ if (xa_load(&ctx_table, ctx->id) == ctx)
	360	+ queue_work(system_unbound_wq, &ctx->close_work);
	361	+ xa_unlock(&ctx_table);
	362	+ }
361	363	return 0;
362	364	}
363	365
@@ -461,13 +463,12 @@ static ssize_t ucma_create_id(struct ucma_file file, const char __user inbuf, · 97 unmodified lines
461	463	ret = PTR_ERR(cm_id);
462	464	goto err1;
463	465	}
464		− ctx->cm_id = cm_id;
	466	+ ucma_set_ctx_cm_id(ctx, cm_id);
465	467
466	468	resp.id = ctx->id;
467	469	if (copy_to_user(u64_to_user_ptr(cmd.response),
468	470	&resp, sizeof(resp))) {
469		− xa_erase(&ctx_table, ctx->id);
470		− __destroy_id(ctx);
	471	+ ucma_destroy_private_ctx(ctx);
471	472	return -EFAULT;
472	473	}
473	474
@@ -477,8 +478,7 @@ static ssize_t ucma_create_id(struct ucma_file file, const char __user inbuf, · 3 unmodified lines
477	478	return 0;
478	479
479	480	err1:
480		− xa_erase(&ctx_table, ctx->id);
481		− kfree(ctx);
	481	+ ucma_destroy_private_ctx(ctx);
482	482	return ret;
483	483	}
484	484
@@ -516,68 +516,73 @@ static void ucma_cleanup_mc_events(struct ucma_multicast *mc) · 31 unmodified lines
516	516	rdma_unlock_handler(mc->ctx->cm_id);
517	517	}
518	518
519		−/*
520		− * ucma_free_ctx is called after the underlying rdma CM-ID is destroyed. At
521		− * this point, no new events will be reported from the hardware. However, we
522		− * still need to cleanup the UCMA context for this ID. Specifically, there
523		− * might be events that have not yet been consumed by the user space software.
524		− * mutex. After that we release them as needed.
525		− */
526		−static int ucma_free_ctx(struct ucma_context *ctx)
	519	+static int ucma_cleanup_ctx_events(struct ucma_context *ctx)
527	520	{
528	521	int events_reported;
529	522	struct ucma_event uevent, tmp;
530	523	LIST_HEAD(list);
531	524
532		− ucma_cleanup_multicast(ctx);
533		−
534		− /* Cleanup events not yet reported to the user. */
	525	+ /* Cleanup events not yet reported to the user.*/
535	526	mutex_lock(&ctx->file->mut);
536	527	list_for_each_entry_safe(uevent, tmp, &ctx->file->event_list, list) {
537		− if (uevent->ctx == ctx \|\| uevent->conn_req_ctx == ctx)
	528	+ if (uevent->ctx != ctx)
	529	+ continue;
	530	+
	531	+ if (uevent->resp.event == RDMA_CM_EVENT_CONNECT_REQUEST &&
	532	+ xa_cmpxchg(&ctx_table, uevent->conn_req_ctx->id,
	533	+ uevent->conn_req_ctx, XA_ZERO_ENTRY,
	534	+ GFP_KERNEL) == uevent->conn_req_ctx) {
538	535	list_move_tail(&uevent->list, &list);
	536	+ continue;
	537	+ }
	538	+ list_del(&uevent->list);
	539	+ kfree(uevent);
539	540	}
540	541	list_del(&ctx->list);
541	542	events_reported = ctx->events_reported;
542	543	mutex_unlock(&ctx->file->mut);
543	544
544	545	/*
545		− * If this was a listening ID then any connections spawned from it
546		− * that have not been delivered to userspace are cleaned up too.
547		− * Must be done outside any locks.
	546	+ * If this was a listening ID then any connections spawned from it that
	547	+ * have not been delivered to userspace are cleaned up too. Must be done
	548	+ * outside any locks.
548	549	*/
549	550	list_for_each_entry_safe(uevent, tmp, &list, list) {
550		− list_del(&uevent->list);
551		− if (uevent->resp.event == RDMA_CM_EVENT_CONNECT_REQUEST &&
552		− uevent->conn_req_ctx != ctx)
553		− __destroy_id(uevent->conn_req_ctx);
	551	+ ucma_destroy_private_ctx(uevent->conn_req_ctx);
554	552	kfree(uevent);
555	553	}
556		−
557		− mutex_destroy(&ctx->mutex);
558		− kfree(ctx);
559	554	return events_reported;
560	555	}
561	556
562		−static int __destroy_id(struct ucma_context *ctx)
	557	+/*
	558	+ * When this is called the xarray must have a XA_ZERO_ENTRY in the ctx->id (ie
	559	+ * the ctx is not public to the user). This either because:
	560	+ * - ucma_finish_ctx() hasn't been called
	561	+ * - xa_cmpxchg() succeed to remove the entry (only one thread can succeed)
	562	+ */
	563	+static int ucma_destroy_private_ctx(struct ucma_context *ctx)
563	564	{
	565	+ int events_reported;
	566	+
564	567	/*
565		− * If the refcount is already 0 then ucma_close_id() has already
566		− * destroyed the cm_id, otherwise holding the refcount keeps cm_id
567		− * valid. Prevent queue_work() from being called.
	568	+ * Destroy the underlying cm_id. New work queuing is prevented now by
	569	+ * the removal from the xarray. Once the work is cancled ref will either
	570	+ * be 0 because the work ran to completion and consumed the ref from the
	571	+ * xarray, or it will be positive because we still have the ref from the
	572	+ * xarray. This can also be 0 in cases where cm_id was never set
568	573	*/
569		− if (refcount_inc_not_zero(&ctx->ref)) {
570		− rdma_lock_handler(ctx->cm_id);
571		− ctx->destroying = 1;
572		− rdma_unlock_handler(ctx->cm_id);
573		− ucma_put_ctx(ctx);
574		− }
575		−
576	574	cancel_work_sync(&ctx->close_work);
577		− /* At this point it's guaranteed that there is no inflight closing task */
578		− if (ctx->cm_id)
	575	+ if (refcount_read(&ctx->ref))
579	576	ucma_close_id(&ctx->close_work);
580		− return ucma_free_ctx(ctx);
	577	+
	578	+ events_reported = ucma_cleanup_ctx_events(ctx);
	579	+ ucma_cleanup_multicast(ctx);
	580	+
	581	+ WARN_ON(xa_cmpxchg(&ctx_table, ctx->id, XA_ZERO_ENTRY, NULL,
	582	+ GFP_KERNEL) != NULL);
	583	+ mutex_destroy(&ctx->mutex);
	584	+ kfree(ctx);
	585	+ return events_reported;
581	586	}
582	587
583	588	static ssize_t ucma_destroy_id(struct ucma_file file, const char __user inbuf,
@@ -596,14 +601,17 @@ static ssize_t ucma_destroy_id(struct ucma_file file, const char __user inbuf, · 12 unmodified lines
596	601
597	602	xa_lock(&ctx_table);
598	603	ctx = _ucma_find_context(cmd.id, file);
599		− if (!IS_ERR(ctx))
600		− __xa_erase(&ctx_table, ctx->id);
	604	+ if (!IS_ERR(ctx)) {
	605	+ if (__xa_cmpxchg(&ctx_table, ctx->id, ctx, XA_ZERO_ENTRY,
	606	+ GFP_KERNEL) != ctx)
	607	+ ctx = ERR_PTR(-ENOENT);
	608	+ }
601	609	xa_unlock(&ctx_table);
602	610
603	611	if (IS_ERR(ctx))
604	612	return PTR_ERR(ctx);
605	613
606		− resp.events_reported = __destroy_id(ctx);
	614	+ resp.events_reported = ucma_destroy_private_ctx(ctx);
607	615	if (copy_to_user(u64_to_user_ptr(cmd.response),
608	616	&resp, sizeof(resp)))
609	617	ret = -EFAULT;
@@ -1777,15 +1785,16 @@ static int ucma_close(struct inode inode, struct file filp) · 1167 unmodified lines
1777	1785	* prevented by this being a FD release function. The list_add_tail() in
1778	1786	* ucma_connect_event_handler() can run concurrently, however it only
1779	1787	* adds to the list after a listening ID. By only reading the first of
1780		− * the list, and relying on __destroy_id() to block
	1788	+ * the list, and relying on ucma_destroy_private_ctx() to block
1781	1789	* ucma_connect_event_handler(), no additional locking is needed.
1782	1790	*/
1783	1791	while (!list_empty(&file->ctx_list)) {
1784	1792	struct ucma_context *ctx = list_first_entry(
1785	1793	&file->ctx_list, struct ucma_context, list);
1786	1794
1787		− xa_erase(&ctx_table, ctx->id);
1788		− __destroy_id(ctx);
	1795	+ WARN_ON(xa_cmpxchg(&ctx_table, ctx->id, ctx, XA_ZERO_ENTRY,
	1796	+ GFP_KERNEL) != ctx);
	1797	+ ucma_destroy_private_ctx(ctx);
1789	1798	}
1790	1799	kfree(file);
1791	1800	return 0;

drivers/infiniband/core/umem.c+1−1

@@ -135,7 +135,7 @@ unsigned long ib_umem_find_best_pgsz(struct ib_umem *umem, · 134 unmodified lines
135	135	*/
136	136	if (mask)
137	137	pgsz_bitmap &= GENMASK(count_trailing_zeros(mask), 0);
138		− return rounddown_pow_of_two(pgsz_bitmap);
	138	+ return pgsz_bitmap ? rounddown_pow_of_two(pgsz_bitmap) : 0;
139	139	}
140	140	EXPORT_SYMBOL(ib_umem_find_best_pgsz);
141	141

drivers/infiniband/hw/mlx5/main.c+2−2

@@ -3956,7 +3956,7 @@ static int mlx5_ib_stage_init_init(struct mlx5_ib_dev *dev) · 3955 unmodified lines
3956	3956
3957	3957	err = set_has_smi_cap(dev);
3958	3958	if (err)
3959		− return err;
	3959	+ goto err_mp;
3960	3960
3961	3961	if (!mlx5_core_mp_enabled(mdev)) {
3962	3962	for (i = 1; i <= dev->num_ports; i++) {
@@ -4319,7 +4319,7 @@ static int mlx5_ib_stage_bfrag_init(struct mlx5_ib_dev *dev) · 356 unmodified lines
4319	4319
4320	4320	err = mlx5_alloc_bfreg(dev->mdev, &dev->fp_bfreg, false, true);
4321	4321	if (err)
4322		− mlx5_free_bfreg(dev->mdev, &dev->fp_bfreg);
	4322	+ mlx5_free_bfreg(dev->mdev, &dev->bfreg);
4323	4323
4324	4324	return err;
4325	4325	}

drivers/infiniband/hw/ocrdma/ocrdma_verbs.c+1−1

@@ -434,9 +434,9 @@ static void ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx) · 433 unmodified lines
434	434	pr_err("%s(%d) Freeing in use pdid=0x%x.\n",
435	435	__func__, dev->id, pd->id);
436	436	}
437		− kfree(uctx->cntxt_pd);
438	437	uctx->cntxt_pd = NULL;
439	438	_ocrdma_dealloc_pd(dev, pd);
	439	+ kfree(pd);
440	440	}
441	441
442	442	static struct ocrdma_pd ocrdma_get_ucontext_pd(struct ocrdma_ucontext uctx)

drivers/infiniband/hw/usnic/usnic_ib_verbs.c+3−0

@@ -214,6 +214,7 @@ find_free_vf_and_create_qp_grp(struct usnic_ib_dev *us_ibdev, · 213 unmodified lines
214	214
215	215	}
216	216	usnic_uiom_free_dev_list(dev_list);
	217	+ dev_list = NULL;
217	218	}
218	219
219	220	/* Try to find resources on an unused vf */
@@ -239,6 +240,8 @@ find_free_vf_and_create_qp_grp(struct usnic_ib_dev *us_ibdev, · 19 unmodified lines
239	240	qp_grp_check:
240	241	if (IS_ERR_OR_NULL(qp_grp)) {
241	242	usnic_err("Failed to allocate qp_grp\n");
	243	+ if (usnic_ib_share_vf)
	244	+ usnic_uiom_free_dev_list(dev_list);
242	245	return ERR_PTR(qp_grp ? PTR_ERR(qp_grp) : -ENOMEM);
243	246	}
244	247	return qp_grp;

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c+2−0

@@ -325,7 +325,9 @@ static struct arm_smmu_device qcom_smmu_create(struct arm_smmu_device smmu, · 324 unmodified lines
325	325	}
326	326
327	327	static const struct of_device_id __maybe_unused qcom_smmu_impl_of_match[] = {
	328	+ { .compatible = "qcom,msm8998-smmu-v2" },
328	329	{ .compatible = "qcom,sc7180-smmu-500" },
	330	+ { .compatible = "qcom,sdm630-smmu-v2" },
329	331	{ .compatible = "qcom,sdm845-smmu-500" },
330	332	{ .compatible = "qcom,sm8150-smmu-500" },
331	333	{ .compatible = "qcom,sm8250-smmu-500" },

drivers/iommu/intel/iommu.c+0−1

@@ -38,7 +38,6 @@ · 37 unmodified lines
38	38	#include <linux/dmi.h>
39	39	#include <linux/pci-ats.h>
40	40	#include <linux/memblock.h>
41		−#include <linux/dma-map-ops.h>
42	41	#include <linux/dma-direct.h>
43	42	#include <linux/crash_dump.h>
44	43	#include <linux/numa.h>

drivers/iommu/intel/svm.c+20−2

@@ -118,8 +118,10 @@ void intel_svm_check(struct intel_iommu *iommu) · 117 unmodified lines
118	118	iommu->flags \|= VTD_FLAG_SVM_CAPABLE;
119	119	}
120	120
121		−static void intel_flush_svm_range_dev (struct intel_svm svm, struct intel_svm_dev sdev,
122		− unsigned long address, unsigned long pages, int ih)
	121	+static void __flush_svm_range_dev(struct intel_svm *svm,
	122	+ struct intel_svm_dev *sdev,
	123	+ unsigned long address,
	124	+ unsigned long pages, int ih)
123	125	{
124	126	struct qi_desc desc;
125	127
@@ -170,6 +172,22 @@ static void intel_flush_svm_range_dev (struct intel_svm *svm, struct intel_svm_d · 44 unmodified lines
170	172	}
171	173	}
172	174
	175	+static void intel_flush_svm_range_dev(struct intel_svm *svm,
	176	+ struct intel_svm_dev *sdev,
	177	+ unsigned long address,
	178	+ unsigned long pages, int ih)
	179	+{
	180	+ unsigned long shift = ilog2(__roundup_pow_of_two(pages));
	181	+ unsigned long align = (1ULL << (VTD_PAGE_SHIFT + shift));
	182	+ unsigned long start = ALIGN_DOWN(address, align);
	183	+ unsigned long end = ALIGN(address + (pages << VTD_PAGE_SHIFT), align);
	184	+
	185	+ while (start < end) {
	186	+ __flush_svm_range_dev(svm, sdev, start, align >> VTD_PAGE_SHIFT, ih);
	187	+ start += align;
	188	+ }
	189	+}
	190	+
173	191	static void intel_flush_svm_range(struct intel_svm *svm, unsigned long address,
174	192	unsigned long pages, int ih)
175	193	{

drivers/md/Kconfig+2−0

@@ -605,6 +605,7 @@ config DM_INTEGRITY · 604 unmodified lines
605	605	select BLK_DEV_INTEGRITY
606	606	select DM_BUFIO
607	607	select CRYPTO
	608	+ select CRYPTO_SKCIPHER
608	609	select ASYNC_XOR
609	610	help
610	611	This device-mapper target emulates a block device that has
@@ -622,6 +623,7 @@ config DM_ZONED · 11 unmodified lines
622	623	tristate "Drive-managed zoned block device target support"
623	624	depends on BLK_DEV_DM
624	625	depends on BLK_DEV_ZONED
	626	+ select CRC32
625	627	help
626	628	This device-mapper target takes a host-managed or host-aware zoned
627	629	block device and exposes most of its capacity as a regular block

drivers/md/dm-bufio.c+6−0

@@ -1534,6 +1534,12 @@ sector_t dm_bufio_get_device_size(struct dm_bufio_client *c) · 1533 unmodified lines
1534	1534	}
1535	1535	EXPORT_SYMBOL_GPL(dm_bufio_get_device_size);
1536	1536
	1537	+struct dm_io_client dm_bufio_get_dm_io_client(struct dm_bufio_client c)
	1538	+{
	1539	+ return c->dm_io;
	1540	+}
	1541	+EXPORT_SYMBOL_GPL(dm_bufio_get_dm_io_client);
	1542	+
1537	1543	sector_t dm_bufio_get_block_number(struct dm_buffer *b)
1538	1544	{
1539	1545	return b->block;

drivers/md/dm-crypt.c+152−18

@@ -1454,13 +1454,16 @@ static int crypt_convert_block_skcipher(struct crypt_config *cc, · 1453 unmodified lines
1454	1454	static void kcryptd_async_done(struct crypto_async_request *async_req,
1455	1455	int error);
1456	1456
1457		−static void crypt_alloc_req_skcipher(struct crypt_config *cc,
	1457	+static int crypt_alloc_req_skcipher(struct crypt_config *cc,
1458	1458	struct convert_context *ctx)
1459	1459	{
1460	1460	unsigned key_index = ctx->cc_sector & (cc->tfms_count - 1);
1461	1461
1462		− if (!ctx->r.req)
1463		− ctx->r.req = mempool_alloc(&cc->req_pool, GFP_NOIO);
	1462	+ if (!ctx->r.req) {
	1463	+ ctx->r.req = mempool_alloc(&cc->req_pool, in_interrupt() ? GFP_ATOMIC : GFP_NOIO);
	1464	+ if (!ctx->r.req)
	1465	+ return -ENOMEM;
	1466	+ }
1464	1467
1465	1468	skcipher_request_set_tfm(ctx->r.req, cc->cipher_tfm.tfms[key_index]);
1466	1469
@@ -1471,13 +1474,18 @@ static void crypt_alloc_req_skcipher(struct crypt_config *cc, · 4 unmodified lines
1471	1474	skcipher_request_set_callback(ctx->r.req,
1472	1475	CRYPTO_TFM_REQ_MAY_BACKLOG,
1473	1476	kcryptd_async_done, dmreq_of_req(cc, ctx->r.req));
	1477	+
	1478	+ return 0;
1474	1479	}
1475	1480
1476		−static void crypt_alloc_req_aead(struct crypt_config *cc,
	1481	+static int crypt_alloc_req_aead(struct crypt_config *cc,
1477	1482	struct convert_context *ctx)
1478	1483	{
1479		− if (!ctx->r.req_aead)
1480		− ctx->r.req_aead = mempool_alloc(&cc->req_pool, GFP_NOIO);
	1484	+ if (!ctx->r.req) {
	1485	+ ctx->r.req = mempool_alloc(&cc->req_pool, in_interrupt() ? GFP_ATOMIC : GFP_NOIO);
	1486	+ if (!ctx->r.req)
	1487	+ return -ENOMEM;
	1488	+ }
1481	1489
1482	1490	aead_request_set_tfm(ctx->r.req_aead, cc->cipher_tfm.tfms_aead[0]);
1483	1491
@@ -1488,15 +1496,17 @@ static void crypt_alloc_req_aead(struct crypt_config *cc, · 4 unmodified lines
1488	1496	aead_request_set_callback(ctx->r.req_aead,
1489	1497	CRYPTO_TFM_REQ_MAY_BACKLOG,
1490	1498	kcryptd_async_done, dmreq_of_req(cc, ctx->r.req_aead));
	1499	+
	1500	+ return 0;
1491	1501	}
1492	1502
1493		−static void crypt_alloc_req(struct crypt_config *cc,
	1503	+static int crypt_alloc_req(struct crypt_config *cc,
1494	1504	struct convert_context *ctx)
1495	1505	{
1496	1506	if (crypt_integrity_aead(cc))
1497		− crypt_alloc_req_aead(cc, ctx);
	1507	+ return crypt_alloc_req_aead(cc, ctx);
1498	1508	else
1499		− crypt_alloc_req_skcipher(cc, ctx);
	1509	+ return crypt_alloc_req_skcipher(cc, ctx);
1500	1510	}
1501	1511
1502	1512	static void crypt_free_req_skcipher(struct crypt_config *cc,
@@ -1529,17 +1539,28 @@ static void crypt_free_req(struct crypt_config cc, void req, struct bio *base_ · 26 unmodified lines
1529	1539	* Encrypt / decrypt data from one bio to another one (can be the same one)
1530	1540	*/
1531	1541	static blk_status_t crypt_convert(struct crypt_config *cc,
1532		− struct convert_context *ctx, bool atomic)
	1542	+ struct convert_context *ctx, bool atomic, bool reset_pending)
1533	1543	{
1534	1544	unsigned int tag_offset = 0;
1535	1545	unsigned int sector_step = cc->sector_size >> SECTOR_SHIFT;
1536	1546	int r;
1537	1547
1538		− atomic_set(&ctx->cc_pending, 1);
	1548	+ /*
	1549	+ * if reset_pending is set we are dealing with the bio for the first time,
	1550	+ * else we're continuing to work on the previous bio, so don't mess with
	1551	+ * the cc_pending counter
	1552	+ */
	1553	+ if (reset_pending)
	1554	+ atomic_set(&ctx->cc_pending, 1);
1539	1555
1540	1556	while (ctx->iter_in.bi_size && ctx->iter_out.bi_size) {
1541	1557
1542		− crypt_alloc_req(cc, ctx);
	1558	+ r = crypt_alloc_req(cc, ctx);
	1559	+ if (r) {
	1560	+ complete(&ctx->restart);
	1561	+ return BLK_STS_DEV_RESOURCE;
	1562	+ }
	1563	+
1543	1564	atomic_inc(&ctx->cc_pending);
1544	1565
1545	1566	if (crypt_integrity_aead(cc))
@@ -1553,7 +1574,25 @@ static blk_status_t crypt_convert(struct crypt_config *cc, · 7 unmodified lines
1553	1574	* but the driver request queue is full, let's wait.
1554	1575	*/
1555	1576	case -EBUSY:
1556		− wait_for_completion(&ctx->restart);
	1577	+ if (in_interrupt()) {
	1578	+ if (try_wait_for_completion(&ctx->restart)) {
	1579	+ /*
	1580	+ * we don't have to block to wait for completion,
	1581	+ * so proceed
	1582	+ */
	1583	+ } else {
	1584	+ /*
	1585	+ * we can't wait for completion without blocking
	1586	+ * exit and continue processing in a workqueue
	1587	+ */
	1588	+ ctx->r.req = NULL;
	1589	+ ctx->cc_sector += sector_step;
	1590	+ tag_offset++;
	1591	+ return BLK_STS_DEV_RESOURCE;
	1592	+ }
	1593	+ } else {
	1594	+ wait_for_completion(&ctx->restart);
	1595	+ }
1557	1596	reinit_completion(&ctx->restart);
1558	1597	fallthrough;
1559	1598	/*
@@ -1691,6 +1730,12 @@ static void crypt_inc_pending(struct dm_crypt_io *io) · 131 unmodified lines
1691	1730	atomic_inc(&io->io_pending);
1692	1731	}
1693	1732
	1733	+static void kcryptd_io_bio_endio(struct work_struct *work)
	1734	+{
	1735	+ struct dm_crypt_io *io = container_of(work, struct dm_crypt_io, work);
	1736	+ bio_endio(io->base_bio);
	1737	+}
	1738	+
1694	1739	/*
1695	1740	* One of the bios was finished. Check for completion of
1696	1741	* the whole request and correctly clean up the buffer.
@@ -1713,7 +1758,23 @@ static void crypt_dec_pending(struct dm_crypt_io *io) · 16 unmodified lines
1713	1758	kfree(io->integrity_metadata);
1714	1759
1715	1760	base_bio->bi_status = error;
1716		− bio_endio(base_bio);
	1761	+
	1762	+ /*
	1763	+ * If we are running this function from our tasklet,
	1764	+ * we can't call bio_endio() here, because it will call
	1765	+ * clone_endio() from dm.c, which in turn will
	1766	+ * free the current struct dm_crypt_io structure with
	1767	+ * our tasklet. In this case we need to delay bio_endio()
	1768	+ * execution to after the tasklet is done and dequeued.
	1769	+ */
	1770	+ if (tasklet_trylock(&io->tasklet)) {
	1771	+ tasklet_unlock(&io->tasklet);
	1772	+ bio_endio(base_bio);
	1773	+ return;
	1774	+ }
	1775	+
	1776	+ INIT_WORK(&io->work, kcryptd_io_bio_endio);
	1777	+ queue_work(cc->io_queue, &io->work);
1717	1778	}
1718	1779
1719	1780	/*
@@ -1945,6 +2006,37 @@ static bool kcryptd_crypt_write_inline(struct crypt_config *cc, · 225 unmodified lines
1945	2006	}
1946	2007	}
1947	2008
	2009	+static void kcryptd_crypt_write_continue(struct work_struct *work)
	2010	+{
	2011	+ struct dm_crypt_io *io = container_of(work, struct dm_crypt_io, work);
	2012	+ struct crypt_config *cc = io->cc;
	2013	+ struct convert_context *ctx = &io->ctx;
	2014	+ int crypt_finished;
	2015	+ sector_t sector = io->sector;
	2016	+ blk_status_t r;
	2017	+
	2018	+ wait_for_completion(&ctx->restart);
	2019	+ reinit_completion(&ctx->restart);
	2020	+
	2021	+ r = crypt_convert(cc, &io->ctx, true, false);
	2022	+ if (r)
	2023	+ io->error = r;
	2024	+ crypt_finished = atomic_dec_and_test(&ctx->cc_pending);
	2025	+ if (!crypt_finished && kcryptd_crypt_write_inline(cc, ctx)) {
	2026	+ /* Wait for completion signaled by kcryptd_async_done() */
	2027	+ wait_for_completion(&ctx->restart);
	2028	+ crypt_finished = 1;
	2029	+ }
	2030	+
	2031	+ /* Encryption was already finished, submit io now */
	2032	+ if (crypt_finished) {
	2033	+ kcryptd_crypt_write_io_submit(io, 0);
	2034	+ io->sector = sector;
	2035	+ }
	2036	+
	2037	+ crypt_dec_pending(io);
	2038	+}
	2039	+
1948	2040	static void kcryptd_crypt_write_convert(struct dm_crypt_io *io)
1949	2041	{
1950	2042	struct crypt_config *cc = io->cc;
@@ -1973,7 +2065,17 @@ static void kcryptd_crypt_write_convert(struct dm_crypt_io *io) · 22 unmodified lines
1973	2065
1974	2066	crypt_inc_pending(io);
1975	2067	r = crypt_convert(cc, ctx,
1976		− test_bit(DM_CRYPT_NO_WRITE_WORKQUEUE, &cc->flags));
	2068	+ test_bit(DM_CRYPT_NO_WRITE_WORKQUEUE, &cc->flags), true);
	2069	+ /*
	2070	+ * Crypto API backlogged the request, because its queue was full
	2071	+ * and we're in softirq context, so continue from a workqueue
	2072	+ * (TODO: is it actually possible to be in softirq in the write path?)
	2073	+ */
	2074	+ if (r == BLK_STS_DEV_RESOURCE) {
	2075	+ INIT_WORK(&io->work, kcryptd_crypt_write_continue);
	2076	+ queue_work(cc->crypt_queue, &io->work);
	2077	+ return;
	2078	+ }
1977	2079	if (r)
1978	2080	io->error = r;
1979	2081	crypt_finished = atomic_dec_and_test(&ctx->cc_pending);
@@ -1998,6 +2100,25 @@ static void kcryptd_crypt_read_done(struct dm_crypt_io *io) · 18 unmodified lines
1998	2100	crypt_dec_pending(io);
1999	2101	}
2000	2102
	2103	+static void kcryptd_crypt_read_continue(struct work_struct *work)
	2104	+{
	2105	+ struct dm_crypt_io *io = container_of(work, struct dm_crypt_io, work);
	2106	+ struct crypt_config *cc = io->cc;
	2107	+ blk_status_t r;
	2108	+
	2109	+ wait_for_completion(&io->ctx.restart);
	2110	+ reinit_completion(&io->ctx.restart);
	2111	+
	2112	+ r = crypt_convert(cc, &io->ctx, true, false);
	2113	+ if (r)
	2114	+ io->error = r;
	2115	+
	2116	+ if (atomic_dec_and_test(&io->ctx.cc_pending))
	2117	+ kcryptd_crypt_read_done(io);
	2118	+
	2119	+ crypt_dec_pending(io);
	2120	+}
	2121	+
2001	2122	static void kcryptd_crypt_read_convert(struct dm_crypt_io *io)
2002	2123	{
2003	2124	struct crypt_config *cc = io->cc;
@@ -2009,7 +2130,16 @@ static void kcryptd_crypt_read_convert(struct dm_crypt_io *io) · 5 unmodified lines
2009	2130	io->sector);
2010	2131
2011	2132	r = crypt_convert(cc, &io->ctx,
2012		− test_bit(DM_CRYPT_NO_READ_WORKQUEUE, &cc->flags));
	2133	+ test_bit(DM_CRYPT_NO_READ_WORKQUEUE, &cc->flags), true);
	2134	+ /*
	2135	+ * Crypto API backlogged the request, because its queue was full
	2136	+ * and we're in softirq context, so continue from a workqueue
	2137	+ */
	2138	+ if (r == BLK_STS_DEV_RESOURCE) {
	2139	+ INIT_WORK(&io->work, kcryptd_crypt_read_continue);
	2140	+ queue_work(cc->crypt_queue, &io->work);
	2141	+ return;
	2142	+ }
2013	2143	if (r)
2014	2144	io->error = r;
2015	2145
@@ -2091,8 +2221,12 @@ static void kcryptd_queue_crypt(struct dm_crypt_io *io) · 75 unmodified lines
2091	2221
2092	2222	if ((bio_data_dir(io->base_bio) == READ && test_bit(DM_CRYPT_NO_READ_WORKQUEUE, &cc->flags)) \|\|
2093	2223	(bio_data_dir(io->base_bio) == WRITE && test_bit(DM_CRYPT_NO_WRITE_WORKQUEUE, &cc->flags))) {
2094		− if (in_irq()) {
2095		− /* Crypto API's "skcipher_walk_first() refuses to work in hard IRQ context */
	2224	+ /*
	2225	+ * in_irq(): Crypto API's skcipher_walk_first() refuses to work in hard IRQ context.
	2226	+ * irqs_disabled(): the kernel may run some IO completion from the idle thread, but
	2227	+ * it is being executed with irqs disabled.
	2228	+ */
	2229	+ if (in_irq() \|\| irqs_disabled()) {
2096	2230	tasklet_init(&io->tasklet, kcryptd_crypt_tasklet, (unsigned long)&io->work);
2097	2231	tasklet_schedule(&io->tasklet);
2098	2232	return;

drivers/md/dm-integrity.c+50−12

@@ -1379,12 +1379,52 @@ thorough_test: · 1378 unmodified lines
1379	1379	#undef MAY_BE_HASH
1380	1380	}
1381	1381
1382		−static void dm_integrity_flush_buffers(struct dm_integrity_c *ic)
	1382	+struct flush_request {
	1383	+ struct dm_io_request io_req;
	1384	+ struct dm_io_region io_reg;
	1385	+ struct dm_integrity_c *ic;
	1386	+ struct completion comp;
	1387	+};
	1388	+
	1389	+static void flush_notify(unsigned long error, void *fr_)
	1390	+{
	1391	+ struct flush_request *fr = fr_;
	1392	+ if (unlikely(error != 0))
	1393	+ dm_integrity_io_error(fr->ic, "flusing disk cache", -EIO);
	1394	+ complete(&fr->comp);
	1395	+}
	1396	+
	1397	+static void dm_integrity_flush_buffers(struct dm_integrity_c *ic, bool flush_data)
1383	1398	{
1384	1399	int r;
	1400	+
	1401	+ struct flush_request fr;
	1402	+
	1403	+ if (!ic->meta_dev)
	1404	+ flush_data = false;
	1405	+ if (flush_data) {
	1406	+ fr.io_req.bi_op = REQ_OP_WRITE,
	1407	+ fr.io_req.bi_op_flags = REQ_PREFLUSH \| REQ_SYNC,
	1408	+ fr.io_req.mem.type = DM_IO_KMEM,
	1409	+ fr.io_req.mem.ptr.addr = NULL,
	1410	+ fr.io_req.notify.fn = flush_notify,
	1411	+ fr.io_req.notify.context = &fr;
	1412	+ fr.io_req.client = dm_bufio_get_dm_io_client(ic->bufio),
	1413	+ fr.io_reg.bdev = ic->dev->bdev,
	1414	+ fr.io_reg.sector = 0,
	1415	+ fr.io_reg.count = 0,
	1416	+ fr.ic = ic;
	1417	+ init_completion(&fr.comp);
	1418	+ r = dm_io(&fr.io_req, 1, &fr.io_reg, NULL);
	1419	+ BUG_ON(r);
	1420	+ }
	1421	+
1385	1422	r = dm_bufio_write_dirty_buffers(ic->bufio);
1386	1423	if (unlikely(r))
1387	1424	dm_integrity_io_error(ic, "writing tags", r);
	1425	+
	1426	+ if (flush_data)
	1427	+ wait_for_completion(&fr.comp);
1388	1428	}
1389	1429
1390	1430	static void sleep_on_endio_wait(struct dm_integrity_c *ic)
@@ -2110,7 +2150,7 @@ offload_to_thread: · 719 unmodified lines
2110	2150
2111	2151	if (unlikely(dio->op == REQ_OP_DISCARD) && likely(ic->mode != 'D')) {
2112	2152	integrity_metadata(&dio->work);
2113		− dm_integrity_flush_buffers(ic);
	2153	+ dm_integrity_flush_buffers(ic, false);
2114	2154
2115	2155	dio->in_flight = (atomic_t)ATOMIC_INIT(1);
2116	2156	dio->completion = NULL;
@@ -2195,7 +2235,7 @@ static void integrity_commit(struct work_struct *w) · 78 unmodified lines
2195	2235	flushes = bio_list_get(&ic->flush_bio_list);
2196	2236	if (unlikely(ic->mode != 'J')) {
2197	2237	spin_unlock_irq(&ic->endio_wait.lock);
2198		− dm_integrity_flush_buffers(ic);
	2238	+ dm_integrity_flush_buffers(ic, true);
2199	2239	goto release_flush_bios;
2200	2240	}
2201	2241
@@ -2409,7 +2449,7 @@ skip_io: · 207 unmodified lines
2409	2449	complete_journal_op(&comp);
2410	2450	wait_for_completion_io(&comp.comp);
2411	2451
2412		− dm_integrity_flush_buffers(ic);
	2452	+ dm_integrity_flush_buffers(ic, true);
2413	2453	}
2414	2454
2415	2455	static void integrity_writer(struct work_struct *w)
@@ -2451,7 +2491,7 @@ static void recalc_write_super(struct dm_integrity_c *ic) · 35 unmodified lines
2451	2491	{
2452	2492	int r;
2453	2493
2454		− dm_integrity_flush_buffers(ic);
	2494	+ dm_integrity_flush_buffers(ic, false);
2455	2495	if (dm_integrity_failed(ic))
2456	2496	return;
2457	2497
@@ -2654,7 +2694,7 @@ static void bitmap_flush_work(struct work_struct *work) · 196 unmodified lines
2654	2694	unsigned long limit;
2655	2695	struct bio *bio;
2656	2696
2657		− dm_integrity_flush_buffers(ic);
	2697	+ dm_integrity_flush_buffers(ic, false);
2658	2698
2659	2699	range.logical_sector = 0;
2660	2700	range.n_sectors = ic->provided_data_sectors;
@@ -2663,9 +2703,7 @@ static void bitmap_flush_work(struct work_struct *work) · 2 unmodified lines
2663	2703	add_new_range_and_wait(ic, &range);
2664	2704	spin_unlock_irq(&ic->endio_wait.lock);
2665	2705
2666		− dm_integrity_flush_buffers(ic);
2667		− if (ic->meta_dev)
2668		− blkdev_issue_flush(ic->dev->bdev, GFP_NOIO);
	2706	+ dm_integrity_flush_buffers(ic, true);
2669	2707
2670	2708	limit = ic->provided_data_sectors;
2671	2709	if (ic->sb->flags & cpu_to_le32(SB_FLAG_RECALCULATING)) {
@@ -2934,11 +2972,11 @@ static void dm_integrity_postsuspend(struct dm_target *ti) · 262 unmodified lines
2934	2972	if (ic->meta_dev)
2935	2973	queue_work(ic->writer_wq, &ic->writer_work);
2936	2974	drain_workqueue(ic->writer_wq);
2937		− dm_integrity_flush_buffers(ic);
	2975	+ dm_integrity_flush_buffers(ic, true);
2938	2976	}
2939	2977
2940	2978	if (ic->mode == 'B') {
2941		− dm_integrity_flush_buffers(ic);
	2979	+ dm_integrity_flush_buffers(ic, true);
2942	2980	#if 1
2943	2981	/* set to 0 to test bitmap replay code */
2944	2982	init_journal(ic, 0, ic->journal_sections, 0);
@@ -3754,7 +3792,7 @@ static int dm_integrity_ctr(struct dm_target ti, unsigned argc, char *argv) · 809 unmodified lines
3754	3792	unsigned extra_args;
3755	3793	struct dm_arg_set as;
3756	3794	static const struct dm_arg _args[] = {
3757		− {0, 9, "Invalid number of feature args"},
	3795	+ {0, 15, "Invalid number of feature args"},
3758	3796	};
3759	3797	unsigned journal_sectors, interleave_sectors, buffer_sectors, journal_watermark, sync_msec;
3760	3798	bool should_write_sb;

drivers/md/dm-raid.c+3−3

@@ -3729,10 +3729,10 @@ static void raid_io_hints(struct dm_target ti, struct queue_limits limits) · 3728 unmodified lines
3729	3729	blk_limits_io_opt(limits, chunk_size_bytes * mddev_data_stripes(rs));
3730	3730
3731	3731	/*
3732		− * RAID1 and RAID10 personalities require bio splitting,
3733		− * RAID0/4/5/6 don't and process large discard bios properly.
	3732	+ * RAID0 and RAID10 personalities require bio splitting,
	3733	+ * RAID1/4/5/6 don't and process large discard bios properly.
3734	3734	*/
3735		− if (rs_is_raid1(rs) \|\| rs_is_raid10(rs)) {
	3735	+ if (rs_is_raid0(rs) \|\| rs_is_raid10(rs)) {
3736	3736	limits->discard_granularity = chunk_size_bytes;
3737	3737	limits->max_discard_sectors = rs->md.chunk_sectors;
3738	3738	}

drivers/md/dm-snap.c+24−0

@@ -141,6 +141,11 @@ struct dm_snapshot { · 140 unmodified lines
141	141	* for them to be committed.
142	142	*/
143	143	struct bio_list bios_queued_during_merge;
	144	+
	145	+ /*
	146	+ * Flush data after merge.
	147	+ */
	148	+ struct bio flush_bio;
144	149	};
145	150
146	151	/*
@@ -1121,6 +1126,17 @@ shut: · 974 unmodified lines
1121	1126
1122	1127	static void error_bios(struct bio *bio);
1123	1128
	1129	+static int flush_data(struct dm_snapshot *s)
	1130	+{
	1131	+ struct bio *flush_bio = &s->flush_bio;
	1132	+
	1133	+ bio_reset(flush_bio);
	1134	+ bio_set_dev(flush_bio, s->origin->bdev);
	1135	+ flush_bio->bi_opf = REQ_OP_WRITE \| REQ_PREFLUSH;
	1136	+
	1137	+ return submit_bio_wait(flush_bio);
	1138	+}
	1139	+
1124	1140	static void merge_callback(int read_err, unsigned long write_err, void *context)
1125	1141	{
1126	1142	struct dm_snapshot *s = context;
@@ -1134,6 +1150,11 @@ static void merge_callback(int read_err, unsigned long write_err, void *context) · 7 unmodified lines
1134	1150	goto shut;
1135	1151	}
1136	1152
	1153	+ if (flush_data(s) < 0) {
	1154	+ DMERR("Flush after merge failed: shutting down merge");
	1155	+ goto shut;
	1156	+ }
	1157	+
1137	1158	if (s->store->type->commit_merge(s->store,
1138	1159	s->num_merging_chunks) < 0) {
1139	1160	DMERR("Write error in exception store: shutting down merge");
@@ -1318,6 +1339,7 @@ static int snapshot_ctr(struct dm_target ti, unsigned int argc, char *argv) · 178 unmodified lines
1318	1339	s->first_merging_chunk = 0;
1319	1340	s->num_merging_chunks = 0;
1320	1341	bio_list_init(&s->bios_queued_during_merge);
	1342	+ bio_init(&s->flush_bio, NULL, 0);
1321	1343
1322	1344	/* Allocate hash table for COW data */
1323	1345	if (init_hash_tables(s)) {
@@ -1504,6 +1526,8 @@ static void snapshot_dtr(struct dm_target *ti) · 180 unmodified lines
1504	1526
1505	1527	dm_exception_store_destroy(s->store);
1506	1528
	1529	+ bio_uninit(&s->flush_bio);
	1530	+
1507	1531	dm_put_device(ti, s->cow);
1508	1532
1509	1533	dm_put_device(ti, s->origin);

drivers/md/dm.c+1−1

@@ -562,7 +562,7 @@ static int dm_blk_ioctl(struct block_device *bdev, fmode_t mode, · 561 unmodified lines
562	562	* subset of the parent bdev; require extra privileges.
563	563	*/
564	564	if (!capable(CAP_SYS_RAWIO)) {
565		− DMWARN_LIMIT(
	565	+ DMDEBUG_LIMIT(
566	566	"%s: sending ioctl %x to DM device without required privilege.",
567	567	current->comm, cmd);
568	568	r = -ENOIOCTLCMD;

drivers/net/can/dev/dev.c+2−2

@@ -153,11 +153,11 @@ static void can_restart(struct net_device *dev) · 152 unmodified lines
153	153
154	154	cf->can_id \|= CAN_ERR_RESTARTED;
155	155
156		− netif_rx_ni(skb);
157		−
158	156	stats->rx_packets++;
159	157	stats->rx_bytes += cf->len;
160	158
	159	+ netif_rx_ni(skb);
	160	+
161	161	restart:
162	162	netdev_dbg(dev, "restarted\n");
163	163	priv->can_stats.restarts++;

drivers/net/can/usb/peak_usb/pcan_usb_fd.c+4−4

@@ -514,11 +514,11 @@ static int pcan_usb_fd_decode_canmsg(struct pcan_usb_fd_if *usb_if, · 513 unmodified lines
514	514	else
515	515	memcpy(cfd->data, rm->d, cfd->len);
516	516
517		− peak_usb_netif_rx(skb, &usb_if->time_ref, le32_to_cpu(rm->ts_low));
518		−
519	517	netdev->stats.rx_packets++;
520	518	netdev->stats.rx_bytes += cfd->len;
521	519
	520	+ peak_usb_netif_rx(skb, &usb_if->time_ref, le32_to_cpu(rm->ts_low));
	521	+
522	522	return 0;
523	523	}
524	524
@@ -580,11 +580,11 @@ static int pcan_usb_fd_decode_status(struct pcan_usb_fd_if *usb_if, · 55 unmodified lines
580	580	if (!skb)
581	581	return -ENOMEM;
582	582
583		− peak_usb_netif_rx(skb, &usb_if->time_ref, le32_to_cpu(sm->ts_low));
584		−
585	583	netdev->stats.rx_packets++;
586	584	netdev->stats.rx_bytes += cf->len;
587	585
	586	+ peak_usb_netif_rx(skb, &usb_if->time_ref, le32_to_cpu(sm->ts_low));
	587	+
588	588	return 0;
589	589	}
590	590

drivers/net/can/vxcan.c+4−2

@@ -39,6 +39,7 @@ static netdev_tx_t vxcan_xmit(struct sk_buff skb, struct net_device dev) · 38 unmodified lines
39	39	struct net_device *peer;
40	40	struct canfd_frame cfd = (struct canfd_frame )skb->data;
41	41	struct net_device_stats peerstats, srcstats = &dev->stats;
	42	+ u8 len;
42	43
43	44	if (can_dropped_invalid_skb(dev, skb))
44	45	return NETDEV_TX_OK;
@@ -61,12 +62,13 @@ static netdev_tx_t vxcan_xmit(struct sk_buff skb, struct net_device dev) · 16 unmodified lines
61	62	skb->dev = peer;
62	63	skb->ip_summed = CHECKSUM_UNNECESSARY;
63	64
	65	+ len = cfd->len;
64	66	if (netif_rx_ni(skb) == NET_RX_SUCCESS) {
65	67	srcstats->tx_packets++;
66		− srcstats->tx_bytes += cfd->len;
	68	+ srcstats->tx_bytes += len;
67	69	peerstats = &peer->stats;
68	70	peerstats->rx_packets++;
69		− peerstats->rx_bytes += cfd->len;
	71	+ peerstats->rx_bytes += len;
70	72	}
71	73
72	74	out_unlock:

drivers/net/dsa/b53/b53_common.c+1−1

@@ -1400,7 +1400,7 @@ static int b53_vlan_prepare(struct dsa_switch *ds, int port, · 1399 unmodified lines
1400	1400	!(vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED))
1401	1401	return -EINVAL;
1402	1402
1403		− if (vlan->vid > dev->num_vlans)
	1403	+ if (vlan->vid >= dev->num_vlans)
1404	1404	return -ERANGE;
1405	1405
1406	1406	b53_enable_vlan(dev, true, ds->vlan_filtering);

drivers/net/dsa/mv88e6xxx/global1_vtu.c+4−0

@@ -351,6 +351,10 @@ int mv88e6250_g1_vtu_getnext(struct mv88e6xxx_chip *chip, · 350 unmodified lines
351	351	if (err)
352	352	return err;
353	353
	354	+ err = mv88e6185_g1_stu_data_read(chip, entry);
	355	+ if (err)
	356	+ return err;
	357	+
354	358	/* VTU DBNum[3:0] are located in VTU Operation 3:0
355	359	* VTU DBNum[5:4] are located in VTU Operation 9:8
356	360	*/

drivers/net/ethernet/broadcom/bcmsysport.c+4−2

@@ -2495,8 +2495,10 @@ static int bcm_sysport_probe(struct platform_device *pdev) · 2494 unmodified lines
2495	2495	priv = netdev_priv(dev);
2496	2496
2497	2497	priv->clk = devm_clk_get_optional(&pdev->dev, "sw_sysport");
2498		− if (IS_ERR(priv->clk))
2499		− return PTR_ERR(priv->clk);
	2498	+ if (IS_ERR(priv->clk)) {
	2499	+ ret = PTR_ERR(priv->clk);
	2500	+ goto err_free_netdev;
	2501	+ }
2500	2502
2501	2503	/* Allocate number of TX rings */
2502	2504	priv->tx_rings = devm_kcalloc(&pdev->dev, txq,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c+6−0

@@ -469,6 +469,9 @@ int rvu_mbox_handler_cgx_mac_addr_set(struct rvu *rvu, · 468 unmodified lines
469	469	int pf = rvu_get_pf(req->hdr.pcifunc);
470	470	u8 cgx_id, lmac_id;
471	471
	472	+ if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
	473	+ return -EPERM;
	474	+
472	475	rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
473	476
474	477	cgx_lmac_addr_set(cgx_id, lmac_id, req->mac_addr);
@@ -485,6 +488,9 @@ int rvu_mbox_handler_cgx_mac_addr_get(struct rvu *rvu, · 10 unmodified lines
485	488	int rc = 0, i;
486	489	u64 cfg;
487	490
	491	+ if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc))
	492	+ return -EPERM;
	493	+
488	494	rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
489	495
490	496	rsp->hdr.rc = rc;

drivers/net/ethernet/mscc/ocelot.c+18−5

@@ -60,14 +60,27 @@ int ocelot_mact_learn(struct ocelot *ocelot, int port, · 59 unmodified lines
60	60	const unsigned char mac[ETH_ALEN],
61	61	unsigned int vid, enum macaccess_entry_type type)
62	62	{
	63	+ u32 cmd = ANA_TABLES_MACACCESS_VALID \|
	64	+ ANA_TABLES_MACACCESS_DEST_IDX(port) \|
	65	+ ANA_TABLES_MACACCESS_ENTRYTYPE(type) \|
	66	+ ANA_TABLES_MACACCESS_MAC_TABLE_CMD(MACACCESS_CMD_LEARN);
	67	+ unsigned int mc_ports;
	68	+
	69	+ /* Set MAC_CPU_COPY if the CPU port is used by a multicast entry */
	70	+ if (type == ENTRYTYPE_MACv4)
	71	+ mc_ports = (mac[1] << 8) \| mac[2];
	72	+ else if (type == ENTRYTYPE_MACv6)
	73	+ mc_ports = (mac[0] << 8) \| mac[1];
	74	+ else
	75	+ mc_ports = 0;
	76	+
	77	+ if (mc_ports & BIT(ocelot->num_phys_ports))
	78	+ cmd \|= ANA_TABLES_MACACCESS_MAC_CPU_COPY;
	79	+
63	80	ocelot_mact_select(ocelot, mac, vid);
64	81
65	82	/* Issue a write command */
66		− ocelot_write(ocelot, ANA_TABLES_MACACCESS_VALID \|
67		− ANA_TABLES_MACACCESS_DEST_IDX(port) \|
68		− ANA_TABLES_MACACCESS_ENTRYTYPE(type) \|
69		− ANA_TABLES_MACACCESS_MAC_TABLE_CMD(MACACCESS_CMD_LEARN),
70		− ANA_TABLES_MACACCESS);
	83	+ ocelot_write(ocelot, cmd, ANA_TABLES_MACACCESS);
71	84
72	85	return ocelot_mact_wait_for_completion(ocelot);
73	86	}

drivers/net/ethernet/mscc/ocelot_net.c+1−3

@@ -1153,10 +1153,8 @@ static int ocelot_netdevice_event(struct notifier_block *unused, · 1152 unmodified lines
1153	1153	struct net_device *dev = netdev_notifier_info_to_dev(ptr);
1154	1154	int ret = 0;
1155	1155
1156		− if (!ocelot_netdevice_dev_check(dev))
1157		− return 0;
1158		−
1159	1156	if (event == NETDEV_PRECHANGEUPPER &&
	1157	+ ocelot_netdevice_dev_check(dev) &&
1160	1158	netif_is_lag_master(info->upper_dev)) {
1161	1159	struct netdev_lag_upper_info *lag_upper_info = info->upper_info;
1162	1160	struct netlink_ext_ack *extack;

drivers/net/ethernet/renesas/sh_eth.c+28−2

@@ -2606,10 +2606,10 @@ static int sh_eth_close(struct net_device *ndev) · 2605 unmodified lines
2606	2606	/* Free all the skbuffs in the Rx queue and the DMA buffer. */
2607	2607	sh_eth_ring_free(ndev);
2608	2608
2609		− pm_runtime_put_sync(&mdp->pdev->dev);
2610		−
2611	2609	mdp->is_opened = 0;
2612	2610
	2611	+ pm_runtime_put(&mdp->pdev->dev);
	2612	+
2613	2613	return 0;
2614	2614	}
2615	2615
@@ -3034,6 +3034,28 @@ static int sh_mdio_release(struct sh_eth_private *mdp) · 418 unmodified lines
3034	3034	return 0;
3035	3035	}
3036	3036
	3037	+static int sh_mdiobb_read(struct mii_bus *bus, int phy, int reg)
	3038	+{
	3039	+ int res;
	3040	+
	3041	+ pm_runtime_get_sync(bus->parent);
	3042	+ res = mdiobb_read(bus, phy, reg);
	3043	+ pm_runtime_put(bus->parent);
	3044	+
	3045	+ return res;
	3046	+}
	3047	+
	3048	+static int sh_mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val)
	3049	+{
	3050	+ int res;
	3051	+
	3052	+ pm_runtime_get_sync(bus->parent);
	3053	+ res = mdiobb_write(bus, phy, reg, val);
	3054	+ pm_runtime_put(bus->parent);
	3055	+
	3056	+ return res;
	3057	+}
	3058	+
3037	3059	/* MDIO bus init function */
3038	3060	static int sh_mdio_init(struct sh_eth_private *mdp,
3039	3061	struct sh_eth_plat_data *pd)
@@ -3058,6 +3080,10 @@ static int sh_mdio_init(struct sh_eth_private *mdp, · 18 unmodified lines
3058	3080	if (!mdp->mii_bus)
3059	3081	return -ENOMEM;
3060	3082
	3083	+ /* Wrap accessors with Runtime PM-aware ops */
	3084	+ mdp->mii_bus->read = sh_mdiobb_read;
	3085	+ mdp->mii_bus->write = sh_mdiobb_write;
	3086	+
3061	3087	/* Hook up MII support for ethtool */
3062	3088	mdp->mii_bus->name = "sh_mii";
3063	3089	mdp->mii_bus->parent = dev;

drivers/net/mdio/mdio-bitbang.c+4−2

@@ -149,7 +149,7 @@ static int mdiobb_cmd_addr(struct mdiobb_ctrl *ctrl, int phy, u32 addr) · 148 unmodified lines
149	149	return dev_addr;
150	150	}
151	151
152		−static int mdiobb_read(struct mii_bus *bus, int phy, int reg)
	152	+int mdiobb_read(struct mii_bus *bus, int phy, int reg)
153	153	{
154	154	struct mdiobb_ctrl *ctrl = bus->priv;
155	155	int ret, i;
@@ -180,8 +180,9 @@ static int mdiobb_read(struct mii_bus *bus, int phy, int reg) · 24 unmodified lines
180	180	mdiobb_get_bit(ctrl);
181	181	return ret;
182	182	}
	183	+EXPORT_SYMBOL(mdiobb_read);
183	184
184		−static int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val)
	185	+int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val)
185	186	{
186	187	struct mdiobb_ctrl *ctrl = bus->priv;
187	188
@@ -201,6 +202,7 @@ static int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val) · 13 unmodified lines
201	202	mdiobb_get_bit(ctrl);
202	203	return 0;
203	204	}
	205	+EXPORT_SYMBOL(mdiobb_write);
204	206
205	207	struct mii_bus alloc_mdio_bitbang(struct mdiobb_ctrl ctrl)
206	208	{

drivers/net/usb/cdc_ncm.c+11−1

@@ -1827,6 +1827,15 @@ cdc_ncm_speed_change(struct usbnet *dev, · 1826 unmodified lines
1827	1827	uint32_t rx_speed = le32_to_cpu(data->DLBitRRate);
1828	1828	uint32_t tx_speed = le32_to_cpu(data->ULBitRate);
1829	1829
	1830	+ /* if the speed hasn't changed, don't report it.
	1831	+ * RTL8156 shipped before 2021 sends notification about every 32ms.
	1832	+ */
	1833	+ if (dev->rx_speed == rx_speed && dev->tx_speed == tx_speed)
	1834	+ return;
	1835	+
	1836	+ dev->rx_speed = rx_speed;
	1837	+ dev->tx_speed = tx_speed;
	1838	+
1830	1839	/*
1831	1840	* Currently the USB-NET API does not support reporting the actual
1832	1841	* device speed. Do print it instead.
@@ -1867,7 +1876,8 @@ static void cdc_ncm_status(struct usbnet dev, struct urb urb) · 34 unmodified lines
1867	1876	* USB_CDC_NOTIFY_NETWORK_CONNECTION notification shall be
1868	1877	* sent by device after USB_CDC_NOTIFY_SPEED_CHANGE.
1869	1878	*/
1870		− usbnet_link_change(dev, !!event->wValue, 0);
	1879	+ if (netif_carrier_ok(dev->net) != !!event->wValue)
	1880	+ usbnet_link_change(dev, !!event->wValue, 0);
1871	1881	break;
1872	1882
1873	1883	case USB_CDC_NOTIFY_SPEED_CHANGE:

drivers/nvme/host/core.c+8−3

@@ -2856,6 +2856,11 @@ static const struct attribute_group *nvme_subsys_attrs_groups[] = { · 2855 unmodified lines
2856	2856	NULL,
2857	2857	};
2858	2858
	2859	+static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl)
	2860	+{
	2861	+ return ctrl->opts && ctrl->opts->discovery_nqn;
	2862	+}
	2863	+
2859	2864	static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
2860	2865	struct nvme_ctrl ctrl, struct nvme_id_ctrl id)
2861	2866	{
@@ -2875,7 +2880,7 @@ static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, · 13 unmodified lines
2875	2880	}
2876	2881
2877	2882	if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) \|\|
2878		− (ctrl->opts && ctrl->opts->discovery_nqn))
	2883	+ nvme_discovery_ctrl(ctrl))
2879	2884	continue;
2880	2885
2881	2886	dev_err(ctrl->device,
@@ -3144,7 +3149,7 @@ int nvme_init_identify(struct nvme_ctrl *ctrl) · 262 unmodified lines
3144	3149	goto out_free;
3145	3150	}
3146	3151
3147		− if (!ctrl->opts->discovery_nqn && !ctrl->kas) {
	3152	+ if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) {
3148	3153	dev_err(ctrl->device,
3149	3154	"keep-alive support is mandatory for fabrics\n");
3150	3155	ret = -EINVAL;
@@ -3184,7 +3189,7 @@ int nvme_init_identify(struct nvme_ctrl *ctrl) · 33 unmodified lines
3184	3189	if (ret < 0)
3185	3190	return ret;
3186	3191
3187		− if (!ctrl->identified) {
	3192	+ if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) {
3188	3193	ret = nvme_hwmon_init(ctrl);
3189	3194	if (ret < 0)
3190	3195	return ret;

drivers/nvme/host/tcp.c+2−2

@@ -201,7 +201,7 @@ static inline size_t nvme_tcp_req_cur_offset(struct nvme_tcp_request *req) · 200 unmodified lines
201	201
202	202	static inline size_t nvme_tcp_req_cur_length(struct nvme_tcp_request *req)
203	203	{
204		− return min_t(size_t, req->iter.bvec->bv_len - req->iter.iov_offset,
	204	+ return min_t(size_t, iov_iter_single_seg_count(&req->iter),
205	205	req->pdu_len - req->pdu_sent);
206	206	}
207	207
@@ -286,7 +286,7 @@ static inline void nvme_tcp_queue_request(struct nvme_tcp_request *req, · 78 unmodified lines
286	286	* directly, otherwise queue io_work. Also, only do that if we
287	287	* are on the same cpu, so we don't introduce contention.
288	288	*/
289		− if (queue->io_cpu == smp_processor_id() &&
	289	+ if (queue->io_cpu == __smp_processor_id() &&
290	290	sync && empty && mutex_trylock(&queue->send_mutex)) {
291	291	queue->more_requests = !last;
292	292	nvme_tcp_send_all(queue);

drivers/nvme/target/rdma.c+8−8

@@ -1220,6 +1220,14 @@ nvmet_rdma_find_get_device(struct rdma_cm_id *cm_id) · 1219 unmodified lines
1220	1220	}
1221	1221	ndev->inline_data_size = nport->inline_data_size;
1222	1222	ndev->inline_page_count = inline_page_count;
	1223	+
	1224	+ if (nport->pi_enable && !(cm_id->device->attrs.device_cap_flags &
	1225	+ IB_DEVICE_INTEGRITY_HANDOVER)) {
	1226	+ pr_warn("T10-PI is not supported by device %s. Disabling it\n",
	1227	+ cm_id->device->name);
	1228	+ nport->pi_enable = false;
	1229	+ }
	1230	+
1223	1231	ndev->device = cm_id->device;
1224	1232	kref_init(&ndev->ref);
1225	1233
@@ -1855,14 +1863,6 @@ static int nvmet_rdma_enable_port(struct nvmet_rdma_port *port) · 629 unmodified lines
1855	1863	goto out_destroy_id;
1856	1864	}
1857	1865
1858		− if (port->nport->pi_enable &&
1859		− !(cm_id->device->attrs.device_cap_flags &
1860		− IB_DEVICE_INTEGRITY_HANDOVER)) {
1861		− pr_err("T10-PI is not supported for %pISpcs\n", addr);
1862		− ret = -EINVAL;
1863		− goto out_destroy_id;
1864		− }
1865		−
1866	1866	port->cm_id = cm_id;
1867	1867	return 0;
1868	1868

drivers/perf/arm_pmu.c+0−5

@@ -726,11 +726,6 @@ static int armpmu_get_cpu_irq(struct arm_pmu *pmu, int cpu) · 725 unmodified lines
726	726	return per_cpu(hw_events->irq, cpu);
727	727	}
728	728
729		−bool arm_pmu_irq_is_nmi(void)
730		−{
731		− return has_nmi;
732		−}
733		−
734	729	/*
735	730	* PMU hardware loses all context when a CPU goes offline.
736	731	* When a CPU is hotplugged back in, since some hardware registers are

drivers/scsi/mpt3sas/Kconfig+1−1

@@ -79,5 +79,5 @@ config SCSI_MPT2SAS · 78 unmodified lines
79	79	select SCSI_MPT3SAS
80	80	depends on PCI && SCSI
81	81	help
82		− Dummy config option for backwards compatiblity: configure the MPT3SAS
	82	+ Dummy config option for backwards compatibility: configure the MPT3SAS
83	83	driver instead.

drivers/scsi/qedi/qedi_main.c+2−2

@@ -2245,7 +2245,7 @@ qedi_show_boot_tgt_info(struct qedi_ctx *qedi, int type, · 2244 unmodified lines
2245	2245	chap_name);
2246	2246	break;
2247	2247	case ISCSI_BOOT_TGT_CHAP_SECRET:
2248		− rc = sprintf(buf, "%.*s\n", NVM_ISCSI_CFG_CHAP_NAME_MAX_LEN,
	2248	+ rc = sprintf(buf, "%.*s\n", NVM_ISCSI_CFG_CHAP_PWD_MAX_LEN,
2249	2249	chap_secret);
2250	2250	break;
2251	2251	case ISCSI_BOOT_TGT_REV_CHAP_NAME:
@@ -2253,7 +2253,7 @@ qedi_show_boot_tgt_info(struct qedi_ctx *qedi, int type, · 1 unmodified line
2253	2253	mchap_name);
2254	2254	break;
2255	2255	case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
2256		− rc = sprintf(buf, "%.*s\n", NVM_ISCSI_CFG_CHAP_NAME_MAX_LEN,
	2256	+ rc = sprintf(buf, "%.*s\n", NVM_ISCSI_CFG_CHAP_PWD_MAX_LEN,
2257	2257	mchap_secret);
2258	2258	break;
2259	2259	case ISCSI_BOOT_TGT_FLAGS:

drivers/scsi/scsi_debug.c+3−2

@@ -6740,7 +6740,7 @@ static int __init scsi_debug_init(void) · 6739 unmodified lines
6740	6740	k = sdeb_zbc_model_str(sdeb_zbc_model_s);
6741	6741	if (k < 0) {
6742	6742	ret = k;
6743		− goto free_vm;
	6743	+ goto free_q_arr;
6744	6744	}
6745	6745	sdeb_zbc_model = k;
6746	6746	switch (sdeb_zbc_model) {
@@ -6753,7 +6753,8 @@ static int __init scsi_debug_init(void) · 6 unmodified lines
6753	6753	break;
6754	6754	default:
6755	6755	pr_err("Invalid ZBC model\n");
6756		− return -EINVAL;
	6756	+ ret = -EINVAL;
	6757	+ goto free_q_arr;
6757	6758	}
6758	6759	}
6759	6760	if (sdeb_zbc_model != BLK_ZONED_NONE) {

drivers/scsi/sd.c+3−3

@@ -984,8 +984,10 @@ static blk_status_t sd_setup_write_zeroes_cmnd(struct scsi_cmnd *cmd) · 983 unmodified lines
984	984	}
985	985	}
986	986
987		− if (sdp->no_write_same)
	987	+ if (sdp->no_write_same) {
	988	+ rq->rq_flags \|= RQF_QUIET;
988	989	return BLK_STS_TARGET;
	990	+ }
989	991
990	992	if (sdkp->ws16 \|\| lba > 0xffffffff \|\| nr_blocks > 0xffff)
991	993	return sd_setup_write_same16_cmnd(cmd, false);
@@ -3510,10 +3512,8 @@ static int sd_probe(struct device *dev) · 2518 unmodified lines
3510	3512	static int sd_remove(struct device *dev)
3511	3513	{
3512	3514	struct scsi_disk *sdkp;
3513		− dev_t devt;
3514	3515
3515	3516	sdkp = dev_get_drvdata(dev);
3516		− devt = disk_devt(sdkp->disk);
3517	3517	scsi_autopm_get_device(sdkp->device);
3518	3518
3519	3519	async_synchronize_full_domain(&scsi_sd_pm_domain);

drivers/scsi/ufs/ufshcd.c+10−14

@@ -289,7 +289,8 @@ static inline void ufshcd_wb_config(struct ufs_hba *hba) · 288 unmodified lines
289	289	if (ret)
290	290	dev_err(hba->dev, "%s: En WB flush during H8: failed: %d\n",
291	291	__func__, ret);
292		− ufshcd_wb_toggle_flush(hba, true);
	292	+ if (!(hba->quirks & UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL))
	293	+ ufshcd_wb_toggle_flush(hba, true);
293	294	}
294	295
295	296	static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
@@ -5436,9 +5437,6 @@ static int ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set) · 5140 unmodified lines
5436	5437
5437	5438	static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable)
5438	5439	{
5439		− if (hba->quirks & UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL)
5440		− return;
5441		−
5442	5440	if (enable)
5443	5441	ufshcd_wb_buf_flush_enable(hba);
5444	5442	else
@@ -6661,19 +6659,16 @@ static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd) · 1216 unmodified lines
6661	6659	{
6662	6660	struct Scsi_Host *host;
6663	6661	struct ufs_hba *hba;
6664		− unsigned int tag;
6665	6662	u32 pos;
6666	6663	int err;
6667		− u8 resp = 0xF;
6668		− struct ufshcd_lrb *lrbp;
	6664	+ u8 resp = 0xF, lun;
6669	6665	unsigned long flags;
6670	6666
6671	6667	host = cmd->device->host;
6672	6668	hba = shost_priv(host);
6673		− tag = cmd->request->tag;
6674	6669
6675		− lrbp = &hba->lrb[tag];
6676		− err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
	6670	+ lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
	6671	+ err = ufshcd_issue_tm_cmd(hba, lun, 0, UFS_LOGICAL_RESET, &resp);
6677	6672	if (err \|\| resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6678	6673	if (!err)
6679	6674	err = resp;
@@ -6682,7 +6677,7 @@ static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd) · 2 unmodified lines
6682	6677
6683	6678	/* clear the commands that were pending for corresponding LUN */
6684	6679	for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
6685		− if (hba->lrb[pos].lun == lrbp->lun) {
	6680	+ if (hba->lrb[pos].lun == lun) {
6686	6681	err = ufshcd_clear_cmd(hba, pos);
6687	6682	if (err)
6688	6683	break;
@@ -8698,6 +8693,8 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op) · 2009 unmodified lines
8698	8693	ufshcd_wb_need_flush(hba));
8699	8694	}
8700	8695
	8696	+ flush_work(&hba->eeh_work);
	8697	+
8701	8698	if (req_dev_pwr_mode != hba->curr_dev_pwr_mode) {
8702	8699	if (!ufshcd_is_runtime_pm(pm_op))
8703	8700	/* ensure that bkops is disabled */
@@ -8710,8 +8707,6 @@ static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op) · 6 unmodified lines
8710	8707	}
8711	8708	}
8712	8709
8713		− flush_work(&hba->eeh_work);
8714		−
8715	8710	/*
8716	8711	* In the case of DeepSleep, the device is expected to remain powered
8717	8712	* with the link off, so do not check for bkops.
@@ -8938,7 +8933,8 @@ int ufshcd_system_suspend(struct ufs_hba *hba) · 220 unmodified lines
8938	8933	if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
8939	8934	hba->curr_dev_pwr_mode) &&
8940	8935	(ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
8941		− hba->uic_link_state))
	8936	+ hba->uic_link_state) &&
	8937	+ !hba->dev_info.b_rpm_dev_flush_capable)
8942	8938	goto out;
8943	8939
8944	8940	if (pm_runtime_suspended(hba->dev)) {

drivers/spi/spi-cadence.c+4−2

@@ -115,6 +115,7 @@ struct cdns_spi { · 114 unmodified lines
115	115	void __iomem *regs;
116	116	struct clk *ref_clk;
117	117	struct clk *pclk;
	118	+ unsigned int clk_rate;
118	119	u32 speed_hz;
119	120	const u8 *txbuf;
120	121	u8 *rxbuf;
@@ -250,7 +251,7 @@ static void cdns_spi_config_clock_freq(struct spi_device *spi, · 129 unmodified lines
250	251	u32 ctrl_reg, baud_rate_val;
251	252	unsigned long frequency;
252	253
253		− frequency = clk_get_rate(xspi->ref_clk);
	254	+ frequency = xspi->clk_rate;
254	255
255	256	ctrl_reg = cdns_spi_read(xspi, CDNS_SPI_CR);
256	257
@@ -558,8 +559,9 @@ static int cdns_spi_probe(struct platform_device *pdev) · 301 unmodified lines
558	559	master->auto_runtime_pm = true;
559	560	master->mode_bits = SPI_CPOL \| SPI_CPHA \| SPI_CS_HIGH;
560	561
	562	+ xspi->clk_rate = clk_get_rate(xspi->ref_clk);
561	563	/* Set to default valid value */
562		− master->max_speed_hz = clk_get_rate(xspi->ref_clk) / 4;
	564	+ master->max_speed_hz = xspi->clk_rate / 4;
563	565	xspi->speed_hz = master->max_speed_hz;
564	566
565	567	master->bits_per_word_mask = SPI_BPW_MASK(8);

drivers/spi/spi-fsl-spi.c+2−3

@@ -115,14 +115,13 @@ static void fsl_spi_chipselect(struct spi_device *spi, int value) · 114 unmodified lines
115	115	{
116	116	struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
117	117	struct fsl_spi_platform_data *pdata;
118		− bool pol = spi->mode & SPI_CS_HIGH;
119	118	struct spi_mpc8xxx_cs *cs = spi->controller_state;
120	119
121	120	pdata = spi->dev.parent->parent->platform_data;
122	121
123	122	if (value == BITBANG_CS_INACTIVE) {
124	123	if (pdata->cs_control)
125		− pdata->cs_control(spi, !pol);
	124	+ pdata->cs_control(spi, false);
126	125	}
127	126
128	127	if (value == BITBANG_CS_ACTIVE) {
@@ -134,7 +133,7 @@ static void fsl_spi_chipselect(struct spi_device *spi, int value) · 5 unmodified lines
134	133	fsl_spi_change_mode(spi);
135	134
136	135	if (pdata->cs_control)
137		− pdata->cs_control(spi, pol);
	136	+ pdata->cs_control(spi, true);
138	137	}
139	138	}
140	139

drivers/tty/serial/sifive.c+1−0

@@ -1000,6 +1000,7 @@ static int sifive_serial_probe(struct platform_device *pdev) · 999 unmodified lines
1000	1000	/* Set up clock divider */
1001	1001	ssp->clkin_rate = clk_get_rate(ssp->clk);
1002	1002	ssp->baud_rate = SIFIVE_DEFAULT_BAUD_RATE;
	1003	+ ssp->port.uartclk = ssp->baud_rate * 16;
1003	1004	__ssp_update_div(ssp);
1004	1005
1005	1006	platform_set_drvdata(pdev, ssp);

drivers/xen/events/events_base.c+0−10

@@ -2060,16 +2060,6 @@ static struct irq_chip xen_percpu_chip __read_mostly = { · 2059 unmodified lines
2060	2060	.irq_ack = ack_dynirq,
2061	2061	};
2062	2062
2063		−int xen_set_callback_via(uint64_t via)
2064		−{
2065		− struct xen_hvm_param a;
2066		− a.domid = DOMID_SELF;
2067		− a.index = HVM_PARAM_CALLBACK_IRQ;
2068		− a.value = via;
2069		− return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
2070		−}
2071		−EXPORT_SYMBOL_GPL(xen_set_callback_via);
2072		−
2073	2063	#ifdef CONFIG_XEN_PVHVM
2074	2064	/* Vector callbacks are better than PCI interrupts to receive event
2075	2065	* channel notifications because we can receive vector callbacks on any

drivers/xen/platform-pci.c+7−1

@@ -132,6 +132,13 @@ static int platform_pci_probe(struct pci_dev *pdev, · 131 unmodified lines
132	132	dev_warn(&pdev->dev, "request_irq failed err=%d\n", ret);
133	133	goto out;
134	134	}
	135	+ /*
	136	+ * It doesn't strictly have to run on CPU0 but it sure
	137	+ * as hell better process the event channel ports delivered
	138	+ * to CPU0.
	139	+ */
	140	+ irq_set_affinity(pdev->irq, cpumask_of(0));
	141	+
135	142	callback_via = get_callback_via(pdev);
136	143	ret = xen_set_callback_via(callback_via);
137	144	if (ret) {
@@ -149,7 +156,6 @@ static int platform_pci_probe(struct pci_dev *pdev, · 11 unmodified lines
149	156	ret = gnttab_init();
150	157	if (ret)
151	158	goto grant_out;
152		− xenbus_probe(NULL);
153	159	return 0;
154	160	grant_out:
155	161	gnttab_free_auto_xlat_frames();

drivers/xen/privcmd.c+19−6

@@ -717,14 +717,15 @@ static long privcmd_ioctl_restrict(struct file file, void __user udata) · 716 unmodified lines
717	717	return 0;
718	718	}
719	719
720		−static long privcmd_ioctl_mmap_resource(struct file file, void __user udata)
	720	+static long privcmd_ioctl_mmap_resource(struct file *file,
	721	+ struct privcmd_mmap_resource __user *udata)
721	722	{
722	723	struct privcmd_data *data = file->private_data;
723	724	struct mm_struct *mm = current->mm;
724	725	struct vm_area_struct *vma;
725	726	struct privcmd_mmap_resource kdata;
726	727	xen_pfn_t *pfns = NULL;
727		− struct xen_mem_acquire_resource xdata;
	728	+ struct xen_mem_acquire_resource xdata = { };
728	729	int rc;
729	730
730	731	if (copy_from_user(&kdata, udata, sizeof(kdata)))
@@ -734,6 +735,22 @@ static long privcmd_ioctl_mmap_resource(struct file file, void __user udata) · 3 unmodified lines
734	735	if (data->domid != DOMID_INVALID && data->domid != kdata.dom)
735	736	return -EPERM;
736	737
	738	+ /* Both fields must be set or unset */
	739	+ if (!!kdata.addr != !!kdata.num)
	740	+ return -EINVAL;
	741	+
	742	+ xdata.domid = kdata.dom;
	743	+ xdata.type = kdata.type;
	744	+ xdata.id = kdata.id;
	745	+
	746	+ if (!kdata.addr && !kdata.num) {
	747	+ /* Query the size of the resource. */
	748	+ rc = HYPERVISOR_memory_op(XENMEM_acquire_resource, &xdata);
	749	+ if (rc)
	750	+ return rc;
	751	+ return __put_user(xdata.nr_frames, &udata->num);
	752	+ }
	753	+
737	754	mmap_write_lock(mm);
738	755
739	756	vma = find_vma(mm, kdata.addr);
@@ -768,10 +785,6 @@ static long privcmd_ioctl_mmap_resource(struct file file, void __user udata) · 28 unmodified lines
768	785	} else
769	786	vma->vm_private_data = PRIV_VMA_LOCKED;
770	787
771		− memset(&xdata, 0, sizeof(xdata));
772		− xdata.domid = kdata.dom;
773		− xdata.type = kdata.type;
774		− xdata.id = kdata.id;
775	788	xdata.frame = kdata.idx;
776	789	xdata.nr_frames = kdata.num;
777	790	set_xen_guest_handle(xdata.frame_list, pfns);

drivers/xen/xenbus/xenbus.h+1−0

@@ -115,6 +115,7 @@ int xenbus_probe_node(struct xen_bus_type *bus, · 114 unmodified lines
115	115	const char *type,
116	116	const char *nodename);
117	117	int xenbus_probe_devices(struct xen_bus_type *bus);
	118	+void xenbus_probe(void);
118	119
119	120	void xenbus_dev_changed(const char node, struct xen_bus_type bus);
120	121

drivers/xen/xenbus/xenbus_comms.c+0−8

@@ -57,16 +57,8 @@ DEFINE_MUTEX(xs_response_mutex); · 56 unmodified lines
57	57	static int xenbus_irq;
58	58	static struct task_struct *xenbus_task;
59	59
60		−static DECLARE_WORK(probe_work, xenbus_probe);
61		−
62		−
63	60	static irqreturn_t wake_waiting(int irq, void *unused)
64	61	{
65		− if (unlikely(xenstored_ready == 0)) {
66		− xenstored_ready = 1;
67		− schedule_work(&probe_work);
68		− }
69		−
70	62	wake_up(&xb_waitq);
71	63	return IRQ_HANDLED;
72	64	}

drivers/xen/xenbus/xenbus_probe.c+67−14

@@ -683,29 +683,76 @@ void unregister_xenstore_notifier(struct notifier_block *nb) · 682 unmodified lines
683	683	}
684	684	EXPORT_SYMBOL_GPL(unregister_xenstore_notifier);
685	685
686		−void xenbus_probe(struct work_struct *unused)
	686	+void xenbus_probe(void)
687	687	{
688	688	xenstored_ready = 1;
689	689
	690	+ /*
	691	+ * In the HVM case, xenbus_init() deferred its call to
	692	+ * xs_init() in case callbacks were not operational yet.
	693	+ * So do it now.
	694	+ */
	695	+ if (xen_store_domain_type == XS_HVM)
	696	+ xs_init();
	697	+
690	698	/* Notify others that xenstore is up */
691	699	blocking_notifier_call_chain(&xenstore_chain, 0, NULL);
692	700	}
693		−EXPORT_SYMBOL_GPL(xenbus_probe);
694	701
695		−static int __init xenbus_probe_initcall(void)
	702	+/*
	703	+ * Returns true when XenStore init must be deferred in order to
	704	+ * allow the PCI platform device to be initialised, before we
	705	+ * can actually have event channel interrupts working.
	706	+ */
	707	+static bool xs_hvm_defer_init_for_callback(void)
696	708	{
697		− if (!xen_domain())
698		− return -ENODEV;
	709	+#ifdef CONFIG_XEN_PVHVM
	710	+ return xen_store_domain_type == XS_HVM &&
	711	+ !xen_have_vector_callback;
	712	+#else
	713	+ return false;
	714	+#endif
	715	+}
699	716
700		− if (xen_initial_domain() \|\| xen_hvm_domain())
701		− return 0;
	717	+static int __init xenbus_probe_initcall(void)
	718	+{
	719	+ /*
	720	+ * Probe XenBus here in the XS_PV case, and also XS_HVM unless we
	721	+ * need to wait for the platform PCI device to come up.
	722	+ */
	723	+ if (xen_store_domain_type == XS_PV \|\|
	724	+ (xen_store_domain_type == XS_HVM &&
	725	+ !xs_hvm_defer_init_for_callback()))
	726	+ xenbus_probe();
702	727
703		− xenbus_probe(NULL);
704	728	return 0;
705	729	}
706		−
707	730	device_initcall(xenbus_probe_initcall);
708	731
	732	+int xen_set_callback_via(uint64_t via)
	733	+{
	734	+ struct xen_hvm_param a;
	735	+ int ret;
	736	+
	737	+ a.domid = DOMID_SELF;
	738	+ a.index = HVM_PARAM_CALLBACK_IRQ;
	739	+ a.value = via;
	740	+
	741	+ ret = HYPERVISOR_hvm_op(HVMOP_set_param, &a);
	742	+ if (ret)
	743	+ return ret;
	744	+
	745	+ /*
	746	+ * If xenbus_probe_initcall() deferred the xenbus_probe()
	747	+ * due to the callback not functioning yet, we can do it now.
	748	+ */
	749	+ if (!xenstored_ready && xs_hvm_defer_init_for_callback())
	750	+ xenbus_probe();
	751	+
	752	+ return ret;
	753	+}
	754	+EXPORT_SYMBOL_GPL(xen_set_callback_via);
	755	+
709	756	/* Set up event channel for xenstored which is run as a local process
710	757	* (this is normally used only in dom0)
711	758	*/
@@ -818,11 +865,17 @@ static int __init xenbus_init(void) · 106 unmodified lines
818	865	break;
819	866	}
820	867
821		− /* Initialize the interface to xenstore. */
822		− err = xs_init();
823		− if (err) {
824		− pr_warn("Error initializing xenstore comms: %i\n", err);
825		− goto out_error;
	868	+ /*
	869	+ * HVM domains may not have a functional callback yet. In that
	870	+ * case let xs_init() be called from xenbus_probe(), which will
	871	+ * get invoked at an appropriate time.
	872	+ */
	873	+ if (xen_store_domain_type != XS_HVM) {
	874	+ err = xs_init();
	875	+ if (err) {
	876	+ pr_warn("Error initializing xenstore comms: %i\n", err);
	877	+ goto out_error;
	878	+ }
826	879	}
827	880
828	881	if ((xen_store_domain_type != XS_LOCAL) &&

fs/cachefiles/rdwr.c+0−2

@@ -413,7 +413,6 @@ int cachefiles_read_or_alloc_page(struct fscache_retrieval *op, · 412 unmodified lines
413	413
414	414	inode = d_backing_inode(object->backer);
415	415	ASSERT(S_ISREG(inode->i_mode));
416		− ASSERT(inode->i_mapping->a_ops->readpages);
417	416
418	417	/* calculate the shift required to use bmap */
419	418	shift = PAGE_SHIFT - inode->i_sb->s_blocksize_bits;
@@ -713,7 +712,6 @@ int cachefiles_read_or_alloc_pages(struct fscache_retrieval *op, · 293 unmodified lines
713	712
714	713	inode = d_backing_inode(object->backer);
715	714	ASSERT(S_ISREG(inode->i_mode));
716		− ASSERT(inode->i_mapping->a_ops->readpages);
717	715
718	716	/* calculate the shift required to use bmap */
719	717	shift = PAGE_SHIFT - inode->i_sb->s_blocksize_bits;

fs/cifs/connect.c+1−1

@@ -3740,7 +3740,7 @@ cifs_setup_session(const unsigned int xid, struct cifs_ses *ses, · 3739 unmodified lines
3740	3740
3741	3741	if (!ses->binding) {
3742	3742	ses->capabilities = server->capabilities;
3743		− if (linuxExtEnabled == 0)
	3743	+ if (!linuxExtEnabled)
3744	3744	ses->capabilities &= (~server->vals->cap_unix);
3745	3745
3746	3746	if (ses->auth_key.response) {

fs/cifs/dfs_cache.c+2−1

@@ -1260,7 +1260,8 @@ void dfs_cache_del_vol(const char *fullpath) · 1259 unmodified lines
1260	1260	vi = find_vol(fullpath);
1261	1261	spin_unlock(&vol_list_lock);
1262	1262
1263		− kref_put(&vi->refcnt, vol_release);
	1263	+ if (!IS_ERR(vi))
	1264	+ kref_put(&vi->refcnt, vol_release);
1264	1265	}
1265	1266
1266	1267	/**

fs/cifs/fs_context.c+1−3

@@ -303,8 +303,6 @@ do { \ · 302 unmodified lines
303	303	int
304	304	smb3_fs_context_dup(struct smb3_fs_context new_ctx, struct smb3_fs_context ctx)
305	305	{
306		− int rc = 0;
307		−
308	306	memcpy(new_ctx, ctx, sizeof(*ctx));
309	307	new_ctx->prepath = NULL;
310	308	new_ctx->mount_options = NULL;
@@ -327,7 +325,7 @@ smb3_fs_context_dup(struct smb3_fs_context new_ctx, struct smb3_fs_context ctx · 16 unmodified lines
327	325	DUP_CTX_STR(nodename);
328	326	DUP_CTX_STR(iocharset);
329	327
330		− return rc;
	328	+ return 0;
331	329	}
332	330
333	331	static int

fs/cifs/smb2pdu.c+1−1

@@ -3248,7 +3248,7 @@ close_exit: · 3247 unmodified lines
3248	3248	free_rsp_buf(resp_buftype, rsp);
3249	3249
3250	3250	/* retry close in a worker thread if this one is interrupted */
3251		− if (rc == -EINTR) {
	3251	+ if (is_interrupt_error(rc)) {
3252	3252	int tmp_rc;
3253	3253
3254	3254	tmp_rc = smb2_handle_cancelled_close(tcon, persistent_fid,

fs/cifs/smb2pdu.h+1−1

@@ -424,7 +424,7 @@ struct smb2_rdma_transform_capabilities_context { · 423 unmodified lines
424	424	__le16 TransformCount;
425	425	__u16 Reserved1;
426	426	__u32 Reserved2;
427		− __le16 RDMATransformIds[1];
	427	+ __le16 RDMATransformIds[];
428	428	} __packed;
429	429
430	430	/* Signing algorithms */

fs/ext4/ext4_jbd2.c+0−17

@@ -372,20 +372,3 @@ int __ext4_handle_dirty_metadata(const char *where, unsigned int line, · 371 unmodified lines
372	372	}
373	373	return err;
374	374	}
375		−
376		−int __ext4_handle_dirty_super(const char *where, unsigned int line,
377		− handle_t handle, struct super_block sb)
378		−{
379		− struct buffer_head *bh = EXT4_SB(sb)->s_sbh;
380		− int err = 0;
381		−
382		− ext4_superblock_csum_set(sb);
383		− if (ext4_handle_valid(handle)) {
384		− err = jbd2_journal_dirty_metadata(handle, bh);
385		− if (err)
386		− ext4_journal_abort_handle(where, line, __func__,
387		− bh, handle, err);
388		− } else
389		− mark_buffer_dirty(bh);
390		− return err;
391		−}

fs/ext4/ext4_jbd2.h+0−5

@@ -244,9 +244,6 @@ int __ext4_handle_dirty_metadata(const char *where, unsigned int line, · 243 unmodified lines
244	244	handle_t handle, struct inode inode,
245	245	struct buffer_head *bh);
246	246
247		−int __ext4_handle_dirty_super(const char *where, unsigned int line,
248		− handle_t handle, struct super_block sb);
249		−
250	247	#define ext4_journal_get_write_access(handle, bh) \
251	248	__ext4_journal_get_write_access(__func__, __LINE__, (handle), (bh))
252	249	#define ext4_forget(handle, is_metadata, inode, bh, block_nr) \
@@ -257,8 +254,6 @@ int __ext4_handle_dirty_super(const char *where, unsigned int line, · 4 unmodified lines
257	254	#define ext4_handle_dirty_metadata(handle, inode, bh) \
258	255	__ext4_handle_dirty_metadata(__func__, __LINE__, (handle), (inode), \
259	256	(bh))
260		−#define ext4_handle_dirty_super(handle, sb) \
261		− __ext4_handle_dirty_super(__func__, __LINE__, (handle), (sb))
262	257
263	258	handle_t __ext4_journal_start_sb(struct super_block sb, unsigned int line,
264	259	int type, int blocks, int rsv_blocks,

fs/ext4/fast_commit.c+18−17

@@ -604,13 +604,13 @@ void ext4_fc_track_range(handle_t handle, struct inode inode, ext4_lblk_t star · 603 unmodified lines
604	604	trace_ext4_fc_track_range(inode, start, end, ret);
605	605	}
606	606
607		−static void ext4_fc_submit_bh(struct super_block *sb)
	607	+static void ext4_fc_submit_bh(struct super_block *sb, bool is_tail)
608	608	{
609	609	int write_flags = REQ_SYNC;
610	610	struct buffer_head *bh = EXT4_SB(sb)->s_fc_bh;
611	611
612		− /* TODO: REQ_FUA \| REQ_PREFLUSH is unnecessarily expensive. */
613		− if (test_opt(sb, BARRIER))
	612	+ /* Add REQ_FUA \| REQ_PREFLUSH only its tail */
	613	+ if (test_opt(sb, BARRIER) && is_tail)
614	614	write_flags \|= REQ_FUA \| REQ_PREFLUSH;
615	615	lock_buffer(bh);
616	616	set_buffer_dirty(bh);
@@ -684,7 +684,7 @@ static u8 ext4_fc_reserve_space(struct super_block sb, int len, u32 *crc) · 67 unmodified lines
684	684	crc = ext4_chksum(sbi, crc, tl, sizeof(*tl));
685	685	if (pad_len > 0)
686	686	ext4_fc_memzero(sb, tl + 1, pad_len, crc);
687		− ext4_fc_submit_bh(sb);
	687	+ ext4_fc_submit_bh(sb, false);
688	688
689	689	ret = jbd2_fc_get_buf(EXT4_SB(sb)->s_journal, &bh);
690	690	if (ret)
@@ -741,7 +741,7 @@ static int ext4_fc_write_tail(struct super_block *sb, u32 crc) · 50 unmodified lines
741	741	tail.fc_crc = cpu_to_le32(crc);
742	742	ext4_fc_memcpy(sb, dst, &tail.fc_crc, sizeof(tail.fc_crc), NULL);
743	743
744		− ext4_fc_submit_bh(sb);
	744	+ ext4_fc_submit_bh(sb, true);
745	745
746	746	return 0;
747	747	}
@@ -1268,7 +1268,7 @@ static void ext4_fc_cleanup(journal_t *journal, int full) · 520 unmodified lines
1268	1268	list_splice_init(&sbi->s_fc_dentry_q[FC_Q_STAGING],
1269	1269	&sbi->s_fc_dentry_q[FC_Q_MAIN]);
1270	1270	list_splice_init(&sbi->s_fc_q[FC_Q_STAGING],
1271		− &sbi->s_fc_q[FC_Q_STAGING]);
	1271	+ &sbi->s_fc_q[FC_Q_MAIN]);
1272	1272
1273	1273	ext4_clear_mount_flag(sb, EXT4_MF_FC_COMMITTING);
1274	1274	ext4_clear_mount_flag(sb, EXT4_MF_FC_INELIGIBLE);
@@ -1318,14 +1318,14 @@ static int ext4_fc_replay_unlink(struct super_block sb, struct ext4_fc_tl tl) · 43 unmodified lines
1318	1318	entry.len = darg.dname_len;
1319	1319	inode = ext4_iget(sb, darg.ino, EXT4_IGET_NORMAL);
1320	1320
1321		− if (IS_ERR_OR_NULL(inode)) {
	1321	+ if (IS_ERR(inode)) {
1322	1322	jbd_debug(1, "Inode %d not found", darg.ino);
1323	1323	return 0;
1324	1324	}
1325	1325
1326	1326	old_parent = ext4_iget(sb, darg.parent_ino,
1327	1327	EXT4_IGET_NORMAL);
1328		− if (IS_ERR_OR_NULL(old_parent)) {
	1328	+ if (IS_ERR(old_parent)) {
1329	1329	jbd_debug(1, "Dir with inode %d not found", darg.parent_ino);
1330	1330	iput(inode);
1331	1331	return 0;
@@ -1410,7 +1410,7 @@ static int ext4_fc_replay_link(struct super_block sb, struct ext4_fc_tl tl) · 78 unmodified lines
1410	1410	darg.parent_ino, darg.dname_len);
1411	1411
1412	1412	inode = ext4_iget(sb, darg.ino, EXT4_IGET_NORMAL);
1413		− if (IS_ERR_OR_NULL(inode)) {
	1413	+ if (IS_ERR(inode)) {
1414	1414	jbd_debug(1, "Inode not found.");
1415	1415	return 0;
1416	1416	}
@@ -1466,10 +1466,11 @@ static int ext4_fc_replay_inode(struct super_block sb, struct ext4_fc_tl tl) · 49 unmodified lines
1466	1466	trace_ext4_fc_replay(sb, tag, ino, 0, 0);
1467	1467
1468	1468	inode = ext4_iget(sb, ino, EXT4_IGET_NORMAL);
1469		− if (!IS_ERR_OR_NULL(inode)) {
	1469	+ if (!IS_ERR(inode)) {
1470	1470	ext4_ext_clear_bb(inode);
1471	1471	iput(inode);
1472	1472	}
	1473	+ inode = NULL;
1473	1474
1474	1475	ext4_fc_record_modified_inode(sb, ino);
1475	1476
@@ -1512,7 +1513,7 @@ static int ext4_fc_replay_inode(struct super_block sb, struct ext4_fc_tl tl) · 36 unmodified lines
1512	1513
1513	1514	/* Given that we just wrote the inode on disk, this SHOULD succeed. */
1514	1515	inode = ext4_iget(sb, ino, EXT4_IGET_NORMAL);
1515		− if (IS_ERR_OR_NULL(inode)) {
	1516	+ if (IS_ERR(inode)) {
1516	1517	jbd_debug(1, "Inode not found.");
1517	1518	return -EFSCORRUPTED;
1518	1519	}
@@ -1564,7 +1565,7 @@ static int ext4_fc_replay_create(struct super_block sb, struct ext4_fc_tl tl) · 45 unmodified lines
1564	1565	goto out;
1565	1566
1566	1567	inode = ext4_iget(sb, darg.ino, EXT4_IGET_NORMAL);
1567		− if (IS_ERR_OR_NULL(inode)) {
	1568	+ if (IS_ERR(inode)) {
1568	1569	jbd_debug(1, "inode %d not found.", darg.ino);
1569	1570	inode = NULL;
1570	1571	ret = -EINVAL;
@@ -1577,7 +1578,7 @@ static int ext4_fc_replay_create(struct super_block sb, struct ext4_fc_tl tl) · 6 unmodified lines
1577	1578	* dot and dot dot dirents are setup properly.
1578	1579	*/
1579	1580	dir = ext4_iget(sb, darg.parent_ino, EXT4_IGET_NORMAL);
1580		− if (IS_ERR_OR_NULL(dir)) {
	1581	+ if (IS_ERR(dir)) {
1581	1582	jbd_debug(1, "Dir %d not found.", darg.ino);
1582	1583	goto out;
1583	1584	}
@@ -1653,7 +1654,7 @@ static int ext4_fc_replay_add_range(struct super_block *sb, · 69 unmodified lines
1653	1654
1654	1655	inode = ext4_iget(sb, le32_to_cpu(fc_add_ex->fc_ino),
1655	1656	EXT4_IGET_NORMAL);
1656		− if (IS_ERR_OR_NULL(inode)) {
	1657	+ if (IS_ERR(inode)) {
1657	1658	jbd_debug(1, "Inode not found.");
1658	1659	return 0;
1659	1660	}
@@ -1777,7 +1778,7 @@ ext4_fc_replay_del_range(struct super_block sb, struct ext4_fc_tl tl) · 117 unmodified lines
1777	1778	le32_to_cpu(lrange->fc_ino), cur, remaining);
1778	1779
1779	1780	inode = ext4_iget(sb, le32_to_cpu(lrange->fc_ino), EXT4_IGET_NORMAL);
1780		− if (IS_ERR_OR_NULL(inode)) {
	1781	+ if (IS_ERR(inode)) {
1781	1782	jbd_debug(1, "Inode %d not found", le32_to_cpu(lrange->fc_ino));
1782	1783	return 0;
1783	1784	}
@@ -1832,7 +1833,7 @@ static void ext4_fc_set_bitmaps_and_counters(struct super_block *sb) · 48 unmodified lines
1832	1833	for (i = 0; i < state->fc_modified_inodes_used; i++) {
1833	1834	inode = ext4_iget(sb, state->fc_modified_inodes[i],
1834	1835	EXT4_IGET_NORMAL);
1835		− if (IS_ERR_OR_NULL(inode)) {
	1836	+ if (IS_ERR(inode)) {
1836	1837	jbd_debug(1, "Inode %d not found.",
1837	1838	state->fc_modified_inodes[i]);
1838	1839	continue;
@@ -1849,7 +1850,7 @@ static void ext4_fc_set_bitmaps_and_counters(struct super_block *sb) · 10 unmodified lines
1849	1850
1850	1851	if (ret > 0) {
1851	1852	path = ext4_find_extent(inode, map.m_lblk, NULL, 0);
1852		− if (!IS_ERR_OR_NULL(path)) {
	1853	+ if (!IS_ERR(path)) {
1853	1854	for (j = 0; j < path->p_depth; j++)
1854	1855	ext4_mb_mark_bb(inode->i_sb,
1855	1856	path[j].p_block, 1, 1);

fs/ext4/file.c+5−2

@@ -809,9 +809,12 @@ static int ext4_sample_last_mounted(struct super_block *sb, · 808 unmodified lines
809	809	err = ext4_journal_get_write_access(handle, sbi->s_sbh);
810	810	if (err)
811	811	goto out_journal;
812		− strlcpy(sbi->s_es->s_last_mounted, cp,
	812	+ lock_buffer(sbi->s_sbh);
	813	+ strncpy(sbi->s_es->s_last_mounted, cp,
813	814	sizeof(sbi->s_es->s_last_mounted));
814		− ext4_handle_dirty_super(handle, sb);
	815	+ ext4_superblock_csum_set(sb);
	816	+ unlock_buffer(sbi->s_sbh);
	817	+ ext4_handle_dirty_metadata(handle, NULL, sbi->s_sbh);
815	818	out_journal:
816	819	ext4_journal_stop(handle);
817	820	out:

fs/ext4/inode.c+5−1

@@ -5150,9 +5150,13 @@ static int ext4_do_update_inode(handle_t *handle, · 5149 unmodified lines
5150	5150	err = ext4_journal_get_write_access(handle, EXT4_SB(sb)->s_sbh);
5151	5151	if (err)
5152	5152	goto out_brelse;
	5153	+ lock_buffer(EXT4_SB(sb)->s_sbh);
5153	5154	ext4_set_feature_large_file(sb);
	5155	+ ext4_superblock_csum_set(sb);
	5156	+ unlock_buffer(EXT4_SB(sb)->s_sbh);
5154	5157	ext4_handle_sync(handle);
5155		− err = ext4_handle_dirty_super(handle, sb);
	5158	+ err = ext4_handle_dirty_metadata(handle, NULL,
	5159	+ EXT4_SB(sb)->s_sbh);
5156	5160	}
5157	5161	ext4_update_inode_fsync_trans(handle, inode, need_datasync);
5158	5162	out_brelse:

fs/ext4/ioctl.c+3−0

@@ -1157,7 +1157,10 @@ resizefs_out: · 1156 unmodified lines
1157	1157	err = ext4_journal_get_write_access(handle, sbi->s_sbh);
1158	1158	if (err)
1159	1159	goto pwsalt_err_journal;
	1160	+ lock_buffer(sbi->s_sbh);
1160	1161	generate_random_uuid(sbi->s_es->s_encrypt_pw_salt);
	1162	+ ext4_superblock_csum_set(sb);
	1163	+ unlock_buffer(sbi->s_sbh);
1161	1164	err = ext4_handle_dirty_metadata(handle, NULL,
1162	1165	sbi->s_sbh);
1163	1166	pwsalt_err_journal:

fs/ext4/namei.c+17−10

@@ -2976,14 +2976,17 @@ int ext4_orphan_add(handle_t handle, struct inode inode) · 2975 unmodified lines
2976	2976	(le32_to_cpu(sbi->s_es->s_inodes_count))) {
2977	2977	/* Insert this inode at the head of the on-disk orphan list */
2978	2978	NEXT_ORPHAN(inode) = le32_to_cpu(sbi->s_es->s_last_orphan);
	2979	+ lock_buffer(sbi->s_sbh);
2979	2980	sbi->s_es->s_last_orphan = cpu_to_le32(inode->i_ino);
	2981	+ ext4_superblock_csum_set(sb);
	2982	+ unlock_buffer(sbi->s_sbh);
2980	2983	dirty = true;
2981	2984	}
2982	2985	list_add(&EXT4_I(inode)->i_orphan, &sbi->s_orphan);
2983	2986	mutex_unlock(&sbi->s_orphan_lock);
2984	2987
2985	2988	if (dirty) {
2986		− err = ext4_handle_dirty_super(handle, sb);
	2989	+ err = ext4_handle_dirty_metadata(handle, NULL, sbi->s_sbh);
2987	2990	rc = ext4_mark_iloc_dirty(handle, inode, &iloc);
2988	2991	if (!err)
2989	2992	err = rc;
@@ -3059,9 +3062,12 @@ int ext4_orphan_del(handle_t handle, struct inode inode) · 69 unmodified lines
3059	3062	mutex_unlock(&sbi->s_orphan_lock);
3060	3063	goto out_brelse;
3061	3064	}
	3065	+ lock_buffer(sbi->s_sbh);
3062	3066	sbi->s_es->s_last_orphan = cpu_to_le32(ino_next);
	3067	+ ext4_superblock_csum_set(inode->i_sb);
	3068	+ unlock_buffer(sbi->s_sbh);
3063	3069	mutex_unlock(&sbi->s_orphan_lock);
3064		− err = ext4_handle_dirty_super(handle, inode->i_sb);
	3070	+ err = ext4_handle_dirty_metadata(handle, NULL, sbi->s_sbh);
3065	3071	} else {
3066	3072	struct ext4_iloc iloc2;
3067	3073	struct inode *i_prev =
@@ -3593,9 +3599,6 @@ static int ext4_setent(handle_t handle, struct ext4_renament ent, · 525 unmodified lines
3593	3599	return retval2;
3594	3600	}
3595	3601	}
3596		− brelse(ent->bh);
3597		− ent->bh = NULL;
3598		−
3599	3602	return retval;
3600	3603	}
3601	3604
@@ -3794,6 +3797,7 @@ static int ext4_rename(struct inode old_dir, struct dentry old_dentry, · 192 unmodified lines
3794	3797	}
3795	3798	}
3796	3799
	3800	+ old_file_type = old.de->file_type;
3797	3801	if (IS_DIRSYNC(old.dir) \|\| IS_DIRSYNC(new.dir))
3798	3802	ext4_handle_sync(handle);
3799	3803
@@ -3821,7 +3825,6 @@ static int ext4_rename(struct inode old_dir, struct dentry old_dentry, · 21 unmodified lines
3821	3825	force_reread = (new.dir->i_ino == old.dir->i_ino &&
3822	3826	ext4_test_inode_flag(new.dir, EXT4_INODE_INLINE_DATA));
3823	3827
3824		− old_file_type = old.de->file_type;
3825	3828	if (whiteout) {
3826	3829	/*
3827	3830	* Do this before adding a new entry, so the old entry is sure
@@ -3919,15 +3922,19 @@ static int ext4_rename(struct inode old_dir, struct dentry old_dentry, · 91 unmodified lines
3919	3922	retval = 0;
3920	3923
3921	3924	end_rename:
3922		− brelse(old.dir_bh);
3923		− brelse(old.bh);
3924		− brelse(new.bh);
3925	3925	if (whiteout) {
3926		− if (retval)
	3926	+ if (retval) {
	3927	+ ext4_setent(handle, &old,
	3928	+ old.inode->i_ino, old_file_type);
3927	3929	drop_nlink(whiteout);
	3930	+ }
3928	3931	unlock_new_inode(whiteout);
3929	3932	iput(whiteout);
	3933	+
3930	3934	}
	3935	+ brelse(old.dir_bh);
	3936	+ brelse(old.bh);
	3937	+ brelse(new.bh);
3931	3938	if (handle)
3932	3939	ext4_journal_stop(handle);
3933	3940	return retval;

fs/ext4/resize.c+16−4

@@ -899,8 +899,11 @@ static int add_new_gdb(handle_t handle, struct inode inode, · 898 unmodified lines
899	899	EXT4_SB(sb)->s_gdb_count++;
900	900	ext4_kvfree_array_rcu(o_group_desc);
901	901
	902	+ lock_buffer(EXT4_SB(sb)->s_sbh);
902	903	le16_add_cpu(&es->s_reserved_gdt_blocks, -1);
903		− err = ext4_handle_dirty_super(handle, sb);
	904	+ ext4_superblock_csum_set(sb);
	905	+ unlock_buffer(EXT4_SB(sb)->s_sbh);
	906	+ err = ext4_handle_dirty_metadata(handle, NULL, EXT4_SB(sb)->s_sbh);
904	907	if (err)
905	908	ext4_std_error(sb, err);
906	909	return err;
@@ -1384,6 +1387,7 @@ static void ext4_update_super(struct super_block *sb, · 477 unmodified lines
1384	1387	reserved_blocks *= blocks_count;
1385	1388	do_div(reserved_blocks, 100);
1386	1389
	1390	+ lock_buffer(sbi->s_sbh);
1387	1391	ext4_blocks_count_set(es, ext4_blocks_count(es) + blocks_count);
1388	1392	ext4_free_blocks_count_set(es, ext4_free_blocks_count(es) + free_blocks);
1389	1393	le32_add_cpu(&es->s_inodes_count, EXT4_INODES_PER_GROUP(sb) *
@@ -1421,6 +1425,8 @@ static void ext4_update_super(struct super_block *sb, · 31 unmodified lines
1421	1425	* active. */
1422	1426	ext4_r_blocks_count_set(es, ext4_r_blocks_count(es) +
1423	1427	reserved_blocks);
	1428	+ ext4_superblock_csum_set(sb);
	1429	+ unlock_buffer(sbi->s_sbh);
1424	1430
1425	1431	/* Update the free space counts */
1426	1432	percpu_counter_add(&sbi->s_freeclusters_counter,
@@ -1515,7 +1521,7 @@ static int ext4_flex_group_add(struct super_block *sb, · 88 unmodified lines
1515	1521
1516	1522	ext4_update_super(sb, flex_gd);
1517	1523
1518		− err = ext4_handle_dirty_super(handle, sb);
	1524	+ err = ext4_handle_dirty_metadata(handle, NULL, sbi->s_sbh);
1519	1525
1520	1526	exit_journal:
1521	1527	err2 = ext4_journal_stop(handle);
@@ -1717,15 +1723,18 @@ static int ext4_group_extend_no_check(struct super_block *sb, · 195 unmodified lines
1717	1723	goto errout;
1718	1724	}
1719	1725
	1726	+ lock_buffer(EXT4_SB(sb)->s_sbh);
1720	1727	ext4_blocks_count_set(es, o_blocks_count + add);
1721	1728	ext4_free_blocks_count_set(es, ext4_free_blocks_count(es) + add);
	1729	+ ext4_superblock_csum_set(sb);
	1730	+ unlock_buffer(EXT4_SB(sb)->s_sbh);
1722	1731	ext4_debug("freeing blocks %llu through %llu\n", o_blocks_count,
1723	1732	o_blocks_count + add);
1724	1733	/* We add the blocks to the bitmap and set the group need init bit */
1725	1734	err = ext4_group_add_blocks(handle, sb, o_blocks_count, add);
1726	1735	if (err)
1727	1736	goto errout;
1728		− ext4_handle_dirty_super(handle, sb);
	1737	+ ext4_handle_dirty_metadata(handle, NULL, EXT4_SB(sb)->s_sbh);
1729	1738	ext4_debug("freed blocks %llu through %llu\n", o_blocks_count,
1730	1739	o_blocks_count + add);
1731	1740	errout:
@@ -1874,12 +1883,15 @@ static int ext4_convert_meta_bg(struct super_block sb, struct inode inode) · 142 unmodified lines
1874	1883	if (err)
1875	1884	goto errout;
1876	1885
	1886	+ lock_buffer(sbi->s_sbh);
1877	1887	ext4_clear_feature_resize_inode(sb);
1878	1888	ext4_set_feature_meta_bg(sb);
1879	1889	sbi->s_es->s_first_meta_bg =
1880	1890	cpu_to_le32(num_desc_blocks(sb, sbi->s_groups_count));
	1891	+ ext4_superblock_csum_set(sb);
	1892	+ unlock_buffer(sbi->s_sbh);
1881	1893
1882		− err = ext4_handle_dirty_super(handle, sb);
	1894	+ err = ext4_handle_dirty_metadata(handle, NULL, sbi->s_sbh);
1883	1895	if (err) {
1884	1896	ext4_std_error(sb, err);
1885	1897	goto errout;

fs/ext4/super.c+118−72

@@ -65,7 +65,8 @@ static struct ratelimit_state ext4_mount_msg_ratelimit; · 64 unmodified lines
65	65	static int ext4_load_journal(struct super_block , struct ext4_super_block ,
66	66	unsigned long journal_devnum);
67	67	static int ext4_show_options(struct seq_file seq, struct dentry root);
68		−static int ext4_commit_super(struct super_block *sb, int sync);
	68	+static void ext4_update_super(struct super_block *sb);
	69	+static int ext4_commit_super(struct super_block *sb);
69	70	static int ext4_mark_recovery_complete(struct super_block *sb,
70	71	struct ext4_super_block *es);
71	72	static int ext4_clear_journal_err(struct super_block *sb,
@@ -586,15 +587,12 @@ static int ext4_errno_to_code(int errno) · 514 unmodified lines
586	587	return EXT4_ERR_UNKNOWN;
587	588	}
588	589
589		−static void __save_error_info(struct super_block *sb, int error,
590		− __u32 ino, __u64 block,
591		− const char *func, unsigned int line)
	590	+static void save_error_info(struct super_block *sb, int error,
	591	+ __u32 ino, __u64 block,
	592	+ const char *func, unsigned int line)
592	593	{
593	594	struct ext4_sb_info *sbi = EXT4_SB(sb);
594	595
595		− EXT4_SB(sb)->s_mount_state \|= EXT4_ERROR_FS;
596		− if (bdev_read_only(sb->s_bdev))
597		− return;
598	596	/* We default to EFSCORRUPTED error... */
599	597	if (error == 0)
600	598	error = EFSCORRUPTED;
@@ -618,15 +616,6 @@ static void __save_error_info(struct super_block *sb, int error, · 17 unmodified lines
618	616	spin_unlock(&sbi->s_error_lock);
619	617	}
620	618
621		−static void save_error_info(struct super_block *sb, int error,
622		− __u32 ino, __u64 block,
623		− const char *func, unsigned int line)
624		−{
625		− __save_error_info(sb, error, ino, block, func, line);
626		− if (!bdev_read_only(sb->s_bdev))
627		− ext4_commit_super(sb, 1);
628		−}
629		−
630	619	/* Deal with the reporting of failure conditions on a filesystem such as
631	620	* inconsistencies detected or read IO failures.
632	621	*
@@ -647,19 +636,40 @@ static void save_error_info(struct super_block *sb, int error, · 14 unmodified lines
647	636	* used to deal with unrecoverable failures such as journal IO errors or ENOMEM
648	637	* at a critical moment in log management.
649	638	*/
650		−static void ext4_handle_error(struct super_block *sb, bool force_ro)
	639	+static void ext4_handle_error(struct super_block *sb, bool force_ro, int error,
	640	+ __u32 ino, __u64 block,
	641	+ const char *func, unsigned int line)
651	642	{
652	643	journal_t *journal = EXT4_SB(sb)->s_journal;
	644	+ bool continue_fs = !force_ro && test_opt(sb, ERRORS_CONT);
653	645
	646	+ EXT4_SB(sb)->s_mount_state \|= EXT4_ERROR_FS;
654	647	if (test_opt(sb, WARN_ON_ERROR))
655	648	WARN_ON_ONCE(1);
656	649
657		− if (sb_rdonly(sb) \|\| (!force_ro && test_opt(sb, ERRORS_CONT)))
	650	+ if (!continue_fs && !sb_rdonly(sb)) {
	651	+ ext4_set_mount_flag(sb, EXT4_MF_FS_ABORTED);
	652	+ if (journal)
	653	+ jbd2_journal_abort(journal, -EIO);
	654	+ }
	655	+
	656	+ if (!bdev_read_only(sb->s_bdev)) {
	657	+ save_error_info(sb, error, ino, block, func, line);
	658	+ /*
	659	+ * In case the fs should keep running, we need to writeout
	660	+ * superblock through the journal. Due to lock ordering
	661	+ * constraints, it may not be safe to do it right here so we
	662	+ * defer superblock flushing to a workqueue.
	663	+ */
	664	+ if (continue_fs)
	665	+ schedule_work(&EXT4_SB(sb)->s_error_work);
	666	+ else
	667	+ ext4_commit_super(sb);
	668	+ }
	669	+
	670	+ if (sb_rdonly(sb) \|\| continue_fs)
658	671	return;
659	672
660		− ext4_set_mount_flag(sb, EXT4_MF_FS_ABORTED);
661		− if (journal)
662		− jbd2_journal_abort(journal, -EIO);
663	673	/*
664	674	* We force ERRORS_RO behavior when system is rebooting. Otherwise we
665	675	* could panic during 'reboot -f' as the underlying device got already
@@ -682,8 +692,39 @@ static void flush_stashed_error_work(struct work_struct *work) · 16 unmodified lines
682	692	{
683	693	struct ext4_sb_info *sbi = container_of(work, struct ext4_sb_info,
684	694	s_error_work);
	695	+ journal_t *journal = sbi->s_journal;
	696	+ handle_t *handle;
685	697
686		− ext4_commit_super(sbi->s_sb, 1);
	698	+ /*
	699	+ * If the journal is still running, we have to write out superblock
	700	+ * through the journal to avoid collisions of other journalled sb
	701	+ * updates.
	702	+ *
	703	+ * We use directly jbd2 functions here to avoid recursing back into
	704	+ * ext4 error handling code during handling of previous errors.
	705	+ */
	706	+ if (!sb_rdonly(sbi->s_sb) && journal) {
	707	+ handle = jbd2_journal_start(journal, 1);
	708	+ if (IS_ERR(handle))
	709	+ goto write_directly;
	710	+ if (jbd2_journal_get_write_access(handle, sbi->s_sbh)) {
	711	+ jbd2_journal_stop(handle);
	712	+ goto write_directly;
	713	+ }
	714	+ ext4_update_super(sbi->s_sb);
	715	+ if (jbd2_journal_dirty_metadata(handle, sbi->s_sbh)) {
	716	+ jbd2_journal_stop(handle);
	717	+ goto write_directly;
	718	+ }
	719	+ jbd2_journal_stop(handle);
	720	+ return;
	721	+ }
	722	+write_directly:
	723	+ /*
	724	+ * Write through journal failed. Write sb directly to get error info
	725	+ * out and hope for the best.
	726	+ */
	727	+ ext4_commit_super(sbi->s_sb);
687	728	}
688	729
689	730	#define ext4_error_ratelimit(sb) \
@@ -710,8 +751,7 @@ void __ext4_error(struct super_block sb, const char function, · 20 unmodified lines
710	751	sb->s_id, function, line, current->comm, &vaf);
711	752	va_end(args);
712	753	}
713		− save_error_info(sb, error, 0, block, function, line);
714		− ext4_handle_error(sb, force_ro);
	754	+ ext4_handle_error(sb, force_ro, error, 0, block, function, line);
715	755	}
716	756
717	757	void __ext4_error_inode(struct inode inode, const char function,
@@ -741,9 +781,8 @@ void __ext4_error_inode(struct inode inode, const char function, · 23 unmodified lines
741	781	current->comm, &vaf);
742	782	va_end(args);
743	783	}
744		− save_error_info(inode->i_sb, error, inode->i_ino, block,
745		− function, line);
746		− ext4_handle_error(inode->i_sb, false);
	784	+ ext4_handle_error(inode->i_sb, false, error, inode->i_ino, block,
	785	+ function, line);
747	786	}
748	787
749	788	void __ext4_error_file(struct file file, const char function,
@@ -780,9 +819,8 @@ void __ext4_error_file(struct file file, const char function, · 30 unmodified lines
780	819	current->comm, path, &vaf);
781	820	va_end(args);
782	821	}
783		− save_error_info(inode->i_sb, EFSCORRUPTED, inode->i_ino, block,
784		− function, line);
785		− ext4_handle_error(inode->i_sb, false);
	822	+ ext4_handle_error(inode->i_sb, false, EFSCORRUPTED, inode->i_ino, block,
	823	+ function, line);
786	824	}
787	825
788	826	const char ext4_decode_error(struct super_block sb, int errno,
@@ -849,8 +887,7 @@ void __ext4_std_error(struct super_block sb, const char function, · 60 unmodified lines
849	887	sb->s_id, function, line, errstr);
850	888	}
851	889
852		− save_error_info(sb, -errno, 0, 0, function, line);
853		− ext4_handle_error(sb, false);
	890	+ ext4_handle_error(sb, false, -errno, 0, 0, function, line);
854	891	}
855	892
856	893	void __ext4_msg(struct super_block *sb,
@@ -944,13 +981,16 @@ __acquires(bitlock) · 87 unmodified lines
944	981	if (test_opt(sb, ERRORS_CONT)) {
945	982	if (test_opt(sb, WARN_ON_ERROR))
946	983	WARN_ON_ONCE(1);
947		− __save_error_info(sb, EFSCORRUPTED, ino, block, function, line);
948		− schedule_work(&EXT4_SB(sb)->s_error_work);
	984	+ EXT4_SB(sb)->s_mount_state \|= EXT4_ERROR_FS;
	985	+ if (!bdev_read_only(sb->s_bdev)) {
	986	+ save_error_info(sb, EFSCORRUPTED, ino, block, function,
	987	+ line);
	988	+ schedule_work(&EXT4_SB(sb)->s_error_work);
	989	+ }
949	990	return;
950	991	}
951	992	ext4_unlock_group(sb, grp);
952		− save_error_info(sb, EFSCORRUPTED, ino, block, function, line);
953		− ext4_handle_error(sb, false);
	993	+ ext4_handle_error(sb, false, EFSCORRUPTED, ino, block, function, line);
954	994	/*
955	995	* We only get here in the ERRORS_RO case; relocking the group
956	996	* may be dangerous, but nothing bad will happen since the
@@ -1152,7 +1192,7 @@ static void ext4_put_super(struct super_block *sb) · 195 unmodified lines
1152	1192	es->s_state = cpu_to_le16(sbi->s_mount_state);
1153	1193	}
1154	1194	if (!sb_rdonly(sb))
1155		− ext4_commit_super(sb, 1);
	1195	+ ext4_commit_super(sb);
1156	1196
1157	1197	rcu_read_lock();
1158	1198	group_desc = rcu_dereference(sbi->s_group_desc);
@@ -2642,7 +2682,7 @@ static int ext4_setup_super(struct super_block sb, struct ext4_super_block es, · 1483 unmodified lines
2642	2682	if (sbi->s_journal)
2643	2683	ext4_set_feature_journal_needs_recovery(sb);
2644	2684
2645		− err = ext4_commit_super(sb, 1);
	2685	+ err = ext4_commit_super(sb);
2646	2686	done:
2647	2687	if (test_opt(sb, DEBUG))
2648	2688	printk(KERN_INFO "[EXT4 FS bs=%lu, gc=%u, "
@@ -4868,7 +4908,7 @@ no_journal: · 2219 unmodified lines
4868	4908	if (DUMMY_ENCRYPTION_ENABLED(sbi) && !sb_rdonly(sb) &&
4869	4909	!ext4_has_feature_encrypt(sb)) {
4870	4910	ext4_set_feature_encrypt(sb);
4871		− ext4_commit_super(sb, 1);
	4911	+ ext4_commit_super(sb);
4872	4912	}
4873	4913
4874	4914	/*
@@ -5418,7 +5458,7 @@ static int ext4_load_journal(struct super_block *sb, · 543 unmodified lines
5418	5458	es->s_journal_dev = cpu_to_le32(journal_devnum);
5419	5459
5420	5460	/* Make sure we flush the recovery flag to disk. */
5421		− ext4_commit_super(sb, 1);
	5461	+ ext4_commit_super(sb);
5422	5462	}
5423	5463
5424	5464	return 0;
@@ -5428,16 +5468,14 @@ err_out: · 3 unmodified lines
5428	5468	return err;
5429	5469	}
5430	5470
5431		−static int ext4_commit_super(struct super_block *sb, int sync)
	5471	+/* Copy state of EXT4_SB(sb) into buffer for on-disk superblock */
	5472	+static void ext4_update_super(struct super_block *sb)
5432	5473	{
5433	5474	struct ext4_sb_info *sbi = EXT4_SB(sb);
5434		− struct ext4_super_block *es = EXT4_SB(sb)->s_es;
5435		− struct buffer_head *sbh = EXT4_SB(sb)->s_sbh;
5436		− int error = 0;
5437		−
5438		− if (!sbh \|\| block_device_ejected(sb))
5439		− return error;
	5475	+ struct ext4_super_block *es = sbi->s_es;
	5476	+ struct buffer_head *sbh = sbi->s_sbh;
5440	5477
	5478	+ lock_buffer(sbh);
5441	5479	/*
5442	5480	* If the file system is mounted read-only, don't update the
5443	5481	* superblock write time. This avoids updating the superblock
@@ -5451,17 +5489,17 @@ static int ext4_commit_super(struct super_block *sb, int sync) · 7 unmodified lines
5451	5489	if (!(sb->s_flags & SB_RDONLY))
5452	5490	ext4_update_tstamp(es, s_wtime);
5453	5491	es->s_kbytes_written =
5454		− cpu_to_le64(EXT4_SB(sb)->s_kbytes_written +
	5492	+ cpu_to_le64(sbi->s_kbytes_written +
5455	5493	((part_stat_read(sb->s_bdev, sectors[STAT_WRITE]) -
5456		− EXT4_SB(sb)->s_sectors_written_start) >> 1));
5457		− if (percpu_counter_initialized(&EXT4_SB(sb)->s_freeclusters_counter))
	5494	+ sbi->s_sectors_written_start) >> 1));
	5495	+ if (percpu_counter_initialized(&sbi->s_freeclusters_counter))
5458	5496	ext4_free_blocks_count_set(es,
5459		− EXT4_C2B(EXT4_SB(sb), percpu_counter_sum_positive(
5460		− &EXT4_SB(sb)->s_freeclusters_counter)));
5461		− if (percpu_counter_initialized(&EXT4_SB(sb)->s_freeinodes_counter))
	5497	+ EXT4_C2B(sbi, percpu_counter_sum_positive(
	5498	+ &sbi->s_freeclusters_counter)));
	5499	+ if (percpu_counter_initialized(&sbi->s_freeinodes_counter))
5462	5500	es->s_free_inodes_count =
5463	5501	cpu_to_le32(percpu_counter_sum_positive(
5464		− &EXT4_SB(sb)->s_freeinodes_counter));
	5502	+ &sbi->s_freeinodes_counter));
5465	5503	/* Copy error information to the on-disk superblock */
5466	5504	spin_lock(&sbi->s_error_lock);
5467	5505	if (sbi->s_add_error_count > 0) {
@@ -5502,10 +5540,20 @@ static int ext4_commit_super(struct super_block *sb, int sync) · 34 unmodified lines
5502	5540	}
5503	5541	spin_unlock(&sbi->s_error_lock);
5504	5542
5505		− BUFFER_TRACE(sbh, "marking dirty");
5506	5543	ext4_superblock_csum_set(sb);
5507		− if (sync)
5508		− lock_buffer(sbh);
	5544	+ unlock_buffer(sbh);
	5545	+}
	5546	+
	5547	+static int ext4_commit_super(struct super_block *sb)
	5548	+{
	5549	+ struct buffer_head *sbh = EXT4_SB(sb)->s_sbh;
	5550	+ int error = 0;
	5551	+
	5552	+ if (!sbh \|\| block_device_ejected(sb))
	5553	+ return error;
	5554	+
	5555	+ ext4_update_super(sb);
	5556	+
5509	5557	if (buffer_write_io_error(sbh) \|\| !buffer_uptodate(sbh)) {
5510	5558	/*
5511	5559	* Oh, dear. A previous attempt to write the
@@ -5520,17 +5568,15 @@ static int ext4_commit_super(struct super_block *sb, int sync) · 8 unmodified lines
5520	5568	clear_buffer_write_io_error(sbh);
5521	5569	set_buffer_uptodate(sbh);
5522	5570	}
	5571	+ BUFFER_TRACE(sbh, "marking dirty");
5523	5572	mark_buffer_dirty(sbh);
5524		− if (sync) {
5525		− unlock_buffer(sbh);
5526		− error = __sync_dirty_buffer(sbh,
5527		− REQ_SYNC \| (test_opt(sb, BARRIER) ? REQ_FUA : 0));
5528		− if (buffer_write_io_error(sbh)) {
5529		− ext4_msg(sb, KERN_ERR, "I/O error while writing "
5530		− "superblock");
5531		− clear_buffer_write_io_error(sbh);
5532		− set_buffer_uptodate(sbh);
5533		− }
	5573	+ error = __sync_dirty_buffer(sbh,
	5574	+ REQ_SYNC \| (test_opt(sb, BARRIER) ? REQ_FUA : 0));
	5575	+ if (buffer_write_io_error(sbh)) {
	5576	+ ext4_msg(sb, KERN_ERR, "I/O error while writing "
	5577	+ "superblock");
	5578	+ clear_buffer_write_io_error(sbh);
	5579	+ set_buffer_uptodate(sbh);
5534	5580	}
5535	5581	return error;
5536	5582	}
@@ -5561,7 +5607,7 @@ static int ext4_mark_recovery_complete(struct super_block *sb, · 24 unmodified lines
5561	5607
5562	5608	if (ext4_has_feature_journal_needs_recovery(sb) && sb_rdonly(sb)) {
5563	5609	ext4_clear_feature_journal_needs_recovery(sb);
5564		− ext4_commit_super(sb, 1);
	5610	+ ext4_commit_super(sb);
5565	5611	}
5566	5612	out:
5567	5613	jbd2_journal_unlock_updates(journal);
@@ -5603,7 +5649,7 @@ static int ext4_clear_journal_err(struct super_block *sb, · 35 unmodified lines
5603	5649
5604	5650	EXT4_SB(sb)->s_mount_state \|= EXT4_ERROR_FS;
5605	5651	es->s_state \|= cpu_to_le16(EXT4_ERROR_FS);
5606		− ext4_commit_super(sb, 1);
	5652	+ ext4_commit_super(sb);
5607	5653
5608	5654	jbd2_journal_clear_err(journal);
5609	5655	jbd2_journal_update_sb_errno(journal);
@@ -5705,7 +5751,7 @@ static int ext4_freeze(struct super_block *sb) · 95 unmodified lines
5705	5751	ext4_clear_feature_journal_needs_recovery(sb);
5706	5752	}
5707	5753
5708		− error = ext4_commit_super(sb, 1);
	5754	+ error = ext4_commit_super(sb);
5709	5755	out:
5710	5756	if (journal)
5711	5757	/* we rely on upper layer to stop further updates */
@@ -5727,7 +5773,7 @@ static int ext4_unfreeze(struct super_block *sb) · 15 unmodified lines
5727	5773	ext4_set_feature_journal_needs_recovery(sb);
5728	5774	}
5729	5775
5730		− ext4_commit_super(sb, 1);
	5776	+ ext4_commit_super(sb);
5731	5777	return 0;
5732	5778	}
5733	5779
@@ -5987,7 +6033,7 @@ static int ext4_remount(struct super_block sb, int flags, char *data) · 253 unmodified lines
5987	6033	}
5988	6034
5989	6035	if (sbi->s_journal == NULL && !(old_sb_flags & SB_RDONLY)) {
5990		− err = ext4_commit_super(sb, 1);
	6036	+ err = ext4_commit_super(sb);
5991	6037	if (err)
5992	6038	goto restore_opts;
5993	6039	}

fs/ext4/xattr.c+4−1

@@ -792,8 +792,11 @@ static void ext4_xattr_update_super_block(handle_t *handle, · 791 unmodified lines
792	792
793	793	BUFFER_TRACE(EXT4_SB(sb)->s_sbh, "get_write_access");
794	794	if (ext4_journal_get_write_access(handle, EXT4_SB(sb)->s_sbh) == 0) {
	795	+ lock_buffer(EXT4_SB(sb)->s_sbh);
795	796	ext4_set_feature_xattr(sb);
796		− ext4_handle_dirty_super(handle, sb);
	797	+ ext4_superblock_csum_set(sb);
	798	+ unlock_buffer(EXT4_SB(sb)->s_sbh);
	799	+ ext4_handle_dirty_metadata(handle, NULL, EXT4_SB(sb)->s_sbh);
797	800	}
798	801	}
799	802

fs/io_uring.c+41−5

@@ -354,6 +354,7 @@ struct io_ring_ctx { · 353 unmodified lines
354	354	unsigned cq_entries;
355	355	unsigned cq_mask;
356	356	atomic_t cq_timeouts;
	357	+ unsigned cq_last_tm_flush;
357	358	unsigned long cq_check_overflow;
358	359	struct wait_queue_head cq_wait;
359	360	struct fasync_struct *cq_fasync;
@@ -1106,6 +1107,9 @@ static void io_sq_thread_drop_mm_files(void) · 746 unmodified lines
1106	1107
1107	1108	static int __io_sq_thread_acquire_files(struct io_ring_ctx *ctx)
1108	1109	{
	1110	+ if (current->flags & PF_EXITING)
	1111	+ return -EFAULT;
	1112	+
1109	1113	if (!current->files) {
1110	1114	struct files_struct *files;
1111	1115	struct nsproxy *nsproxy;
@@ -1133,6 +1137,8 @@ static int __io_sq_thread_acquire_mm(struct io_ring_ctx *ctx) · 21 unmodified lines
1133	1137	{
1134	1138	struct mm_struct *mm;
1135	1139
	1140	+ if (current->flags & PF_EXITING)
	1141	+ return -EFAULT;
1136	1142	if (current->mm)
1137	1143	return 0;
1138	1144
@@ -1634,19 +1640,38 @@ static void __io_queue_deferred(struct io_ring_ctx *ctx) · 495 unmodified lines
1634	1640
1635	1641	static void io_flush_timeouts(struct io_ring_ctx *ctx)
1636	1642	{
1637		− while (!list_empty(&ctx->timeout_list)) {
	1643	+ u32 seq;
	1644	+
	1645	+ if (list_empty(&ctx->timeout_list))
	1646	+ return;
	1647	+
	1648	+ seq = ctx->cached_cq_tail - atomic_read(&ctx->cq_timeouts);
	1649	+
	1650	+ do {
	1651	+ u32 events_needed, events_got;
1638	1652	struct io_kiocb *req = list_first_entry(&ctx->timeout_list,
1639	1653	struct io_kiocb, timeout.list);
1640	1654
1641	1655	if (io_is_timeout_noseq(req))
1642	1656	break;
1643		− if (req->timeout.target_seq != ctx->cached_cq_tail
1644		− - atomic_read(&ctx->cq_timeouts))
	1657	+
	1658	+ /*
	1659	+ * Since seq can easily wrap around over time, subtract
	1660	+ * the last seq at which timeouts were flushed before comparing.
	1661	+ * Assuming not more than 2^31-1 events have happened since,
	1662	+ * these subtractions won't have wrapped, so we can check if
	1663	+ * target is in [last_seq, current_seq] by comparing the two.
	1664	+ */
	1665	+ events_needed = req->timeout.target_seq - ctx->cq_last_tm_flush;
	1666	+ events_got = seq - ctx->cq_last_tm_flush;
	1667	+ if (events_got < events_needed)
1645	1668	break;
1646	1669
1647	1670	list_del_init(&req->timeout.list);
1648	1671	io_kill_timeout(req);
1649		− }
	1672	+ } while (!list_empty(&ctx->timeout_list));
	1673	+
	1674	+ ctx->cq_last_tm_flush = seq;
1650	1675	}
1651	1676
1652	1677	static void io_commit_cqring(struct io_ring_ctx *ctx)
@@ -5832,6 +5857,12 @@ static int io_timeout(struct io_kiocb *req) · 4179 unmodified lines
5832	5857	tail = ctx->cached_cq_tail - atomic_read(&ctx->cq_timeouts);
5833	5858	req->timeout.target_seq = tail + off;
5834	5859
	5860	+ /* Update the last seq here in case io_flush_timeouts() hasn't.
	5861	+ * This is safe because ->completion_lock is held, and submissions
	5862	+ * and completions are never mixed in the same ->completion_lock section.
	5863	+ */
	5864	+ ctx->cq_last_tm_flush = tail;
	5865	+
5835	5866	/*
5836	5867	* Insertion sort, ensuring the first entry in the list is always
5837	5868	* the one we need first.
@@ -7056,6 +7087,7 @@ static int io_sq_thread(void *data) · 1218 unmodified lines
7056	7087
7057	7088	if (sqt_spin \|\| !time_after(jiffies, timeout)) {
7058	7089	io_run_task_work();
	7090	+ io_sq_thread_drop_mm_files();
7059	7091	cond_resched();
7060	7092	if (sqt_spin)
7061	7093	timeout = jiffies + sqd->sq_thread_idle;
@@ -7093,6 +7125,7 @@ static int io_sq_thread(void *data) · 31 unmodified lines
7093	7125	}
7094	7126
7095	7127	io_run_task_work();
	7128	+ io_sq_thread_drop_mm_files();
7096	7129
7097	7130	if (cur_css)
7098	7131	io_sq_thread_unassociate_blkcg();
@@ -8888,7 +8921,8 @@ static void io_disable_sqo_submit(struct io_ring_ctx *ctx) · 1789 unmodified lines
8888	8921	mutex_unlock(&ctx->uring_lock);
8889	8922
8890	8923	/* make sure callers enter the ring to get error */
8891		− io_ring_set_wakeup_flag(ctx);
	8924	+ if (ctx->rings)
	8925	+ io_ring_set_wakeup_flag(ctx);
8892	8926	}
8893	8927
8894	8928	/*
@@ -9067,6 +9101,7 @@ void __io_uring_task_cancel(void) · 172 unmodified lines
9067	9101	finish_wait(&tctx->wait, &wait);
9068	9102	} while (1);
9069	9103
	9104	+ finish_wait(&tctx->wait, &wait);
9070	9105	atomic_dec(&tctx->in_idle);
9071	9106
9072	9107	io_uring_remove_task_files(tctx);
@@ -9700,6 +9735,7 @@ static int io_uring_create(unsigned entries, struct io_uring_params *p, · 627 unmodified lines
9700	9735	*/
9701	9736	ret = io_uring_install_fd(ctx, file);
9702	9737	if (ret < 0) {
	9738	+ io_disable_sqo_submit(ctx);
9703	9739	/* fput will clean it up */
9704	9740	fput(file);
9705	9741	return ret;

fs/namespace.c+5−2

@@ -1713,8 +1713,6 @@ static int can_umount(const struct path *path, int flags) · 1712 unmodified lines
1713	1713	{
1714	1714	struct mount *mnt = real_mount(path->mnt);
1715	1715
1716		− if (flags & ~(MNT_FORCE \| MNT_DETACH \| MNT_EXPIRE \| UMOUNT_NOFOLLOW))
1717		− return -EINVAL;
1718	1716	if (!may_mount())
1719	1717	return -EPERM;
1720	1718	if (path->dentry != path->mnt->mnt_root)
@@ -1728,6 +1726,7 @@ static int can_umount(const struct path *path, int flags) · 7 unmodified lines
1728	1726	return 0;
1729	1727	}
1730	1728
	1729	+// caller is responsible for flags being sane
1731	1730	int path_umount(struct path *path, int flags)
1732	1731	{
1733	1732	struct mount *mnt = real_mount(path->mnt);
@@ -1749,6 +1748,10 @@ static int ksys_umount(char __user *name, int flags) · 15 unmodified lines
1749	1748	struct path path;
1750	1749	int ret;
1751	1750
	1751	+ // basic validity checks done first
	1752	+ if (flags & ~(MNT_FORCE \| MNT_DETACH \| MNT_EXPIRE \| UMOUNT_NOFOLLOW))
	1753	+ return -EINVAL;
	1754	+
1752	1755	if (!(flags & UMOUNT_NOFOLLOW))
1753	1756	lookup_flags \|= LOOKUP_FOLLOW;
1754	1757	ret = user_path_at(AT_FDCWD, name, lookup_flags, &path);

fs/nfsd/nfs3xdr.c+6−1

@@ -865,9 +865,14 @@ compose_entry_fh(struct nfsd3_readdirres cd, struct svc_fh fhp, · 864 unmodified lines
865	865	if (isdotent(name, namlen)) {
866	866	if (namlen == 2) {
867	867	dchild = dget_parent(dparent);
868		− /* filesystem root - cannot return filehandle for ".." */
	868	+ /*
	869	+ * Don't return filehandle for ".." if we're at
	870	+ * the filesystem or export root:
	871	+ */
869	872	if (dchild == dparent)
870	873	goto out;
	874	+ if (dparent == exp->ex_path.dentry)
	875	+ goto out;
871	876	} else
872	877	dchild = dget(dparent);
873	878	} else

fs/proc/task_mmu.c+30−23

@@ -1035,6 +1035,25 @@ struct clear_refs_private { · 1034 unmodified lines
1035	1035	};
1036	1036
1037	1037	#ifdef CONFIG_MEM_SOFT_DIRTY
	1038	+
	1039	+#define is_cow_mapping(flags) (((flags) & (VM_SHARED \| VM_MAYWRITE)) == VM_MAYWRITE)
	1040	+
	1041	+static inline bool pte_is_pinned(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
	1042	+{
	1043	+ struct page *page;
	1044	+
	1045	+ if (!pte_write(pte))
	1046	+ return false;
	1047	+ if (!is_cow_mapping(vma->vm_flags))
	1048	+ return false;
	1049	+ if (likely(!atomic_read(&vma->vm_mm->has_pinned)))
	1050	+ return false;
	1051	+ page = vm_normal_page(vma, addr, pte);
	1052	+ if (!page)
	1053	+ return false;
	1054	+ return page_maybe_dma_pinned(page);
	1055	+}
	1056	+
1038	1057	static inline void clear_soft_dirty(struct vm_area_struct *vma,
1039	1058	unsigned long addr, pte_t *pte)
1040	1059	{
@@ -1049,6 +1068,8 @@ static inline void clear_soft_dirty(struct vm_area_struct *vma, · 8 unmodified lines
1049	1068	if (pte_present(ptent)) {
1050	1069	pte_t old_pte;
1051	1070
	1071	+ if (pte_is_pinned(vma, addr, ptent))
	1072	+ return;
1052	1073	old_pte = ptep_modify_prot_start(vma, addr, pte);
1053	1074	ptent = pte_wrprotect(old_pte);
1054	1075	ptent = pte_clear_soft_dirty(ptent);
@@ -1215,41 +1236,26 @@ static ssize_t clear_refs_write(struct file file, const char __user buf, · 160 unmodified lines
1215	1236	.type = type,
1216	1237	};
1217	1238
	1239	+ if (mmap_write_lock_killable(mm)) {
	1240	+ count = -EINTR;
	1241	+ goto out_mm;
	1242	+ }
1218	1243	if (type == CLEAR_REFS_MM_HIWATER_RSS) {
1219		− if (mmap_write_lock_killable(mm)) {
1220		− count = -EINTR;
1221		− goto out_mm;
1222		− }
1223		−
1224	1244	/*
1225	1245	* Writing 5 to /proc/pid/clear_refs resets the peak
1226	1246	* resident set size to this mm's current rss value.
1227	1247	*/
1228	1248	reset_mm_hiwater_rss(mm);
1229		− mmap_write_unlock(mm);
1230		− goto out_mm;
	1249	+ goto out_unlock;
1231	1250	}
1232	1251
1233		− if (mmap_read_lock_killable(mm)) {
1234		− count = -EINTR;
1235		− goto out_mm;
1236		− }
1237	1252	tlb_gather_mmu(&tlb, mm, 0, -1);
1238	1253	if (type == CLEAR_REFS_SOFT_DIRTY) {
1239	1254	for (vma = mm->mmap; vma; vma = vma->vm_next) {
1240	1255	if (!(vma->vm_flags & VM_SOFTDIRTY))
1241	1256	continue;
1242		− mmap_read_unlock(mm);
1243		− if (mmap_write_lock_killable(mm)) {
1244		− count = -EINTR;
1245		− goto out_mm;
1246		− }
1247		− for (vma = mm->mmap; vma; vma = vma->vm_next) {
1248		− vma->vm_flags &= ~VM_SOFTDIRTY;
1249		− vma_set_page_prot(vma);
1250		− }
1251		− mmap_write_downgrade(mm);
1252		− break;
	1257	+ vma->vm_flags &= ~VM_SOFTDIRTY;
	1258	+ vma_set_page_prot(vma);
1253	1259	}
1254	1260
1255	1261	mmu_notifier_range_init(&range, MMU_NOTIFY_SOFT_DIRTY,
@@ -1261,7 +1267,8 @@ static ssize_t clear_refs_write(struct file file, const char __user buf, · 5 unmodified lines
1261	1267	if (type == CLEAR_REFS_SOFT_DIRTY)
1262	1268	mmu_notifier_invalidate_range_end(&range);
1263	1269	tlb_finish_mmu(&tlb, 0, -1);
1264		− mmap_read_unlock(mm);
	1270	+out_unlock:
	1271	+ mmap_write_unlock(mm);
1265	1272	out_mm:
1266	1273	mmput(mm);
1267	1274	}

include/asm-generic/bitops/atomic.h+3−3

@@ -11,19 +11,19 @@ · 10 unmodified lines
11	11	* See Documentation/atomic_bitops.txt for details.
12	12	*/
13	13
14		−static inline void set_bit(unsigned int nr, volatile unsigned long *p)
	14	+static __always_inline void set_bit(unsigned int nr, volatile unsigned long *p)
15	15	{
16	16	p += BIT_WORD(nr);
17	17	atomic_long_or(BIT_MASK(nr), (atomic_long_t *)p);
18	18	}
19	19
20		−static inline void clear_bit(unsigned int nr, volatile unsigned long *p)
	20	+static __always_inline void clear_bit(unsigned int nr, volatile unsigned long *p)
21	21	{
22	22	p += BIT_WORD(nr);
23	23	atomic_long_andnot(BIT_MASK(nr), (atomic_long_t *)p);
24	24	}
25	25
26		−static inline void change_bit(unsigned int nr, volatile unsigned long *p)
	26	+static __always_inline void change_bit(unsigned int nr, volatile unsigned long *p)
27	27	{
28	28	p += BIT_WORD(nr);
29	29	atomic_long_xor(BIT_MASK(nr), (atomic_long_t *)p);

include/linux/compiler-gcc.h+6−0

@@ -13,6 +13,12 @@ · 12 unmodified lines
13	13	/* https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58145 */
14	14	#if GCC_VERSION < 40900
15	15	# error Sorry, your version of GCC is too old - please use 4.9 or newer.
	16	+#elif defined(CONFIG_ARM64) && GCC_VERSION < 50100
	17	+/*
	18	+ * https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63293
	19	+ * https://lore.kernel.org/r/20210107111841.GN1551@shell.armlinux.org.uk
	20	+ */
	21	+# error Sorry, your version of GCC is too old - please use 5.1 or newer.
16	22	#endif
17	23
18	24	/*

include/linux/dm-bufio.h+1−0

@@ -150,6 +150,7 @@ void dm_bufio_set_minimum_buffers(struct dm_bufio_client *c, unsigned n); · 149 unmodified lines
150	150
151	151	unsigned dm_bufio_get_block_size(struct dm_bufio_client *c);
152	152	sector_t dm_bufio_get_device_size(struct dm_bufio_client *c);
	153	+struct dm_io_client dm_bufio_get_dm_io_client(struct dm_bufio_client c);
153	154	sector_t dm_bufio_get_block_number(struct dm_buffer *b);
154	155	void dm_bufio_get_block_data(struct dm_buffer b);
155	156	void dm_bufio_get_aux_data(struct dm_buffer b);

include/linux/kasan.h+5−1

@@ -35,8 +35,12 @@ struct kunit_kasan_expectation { · 34 unmodified lines
35	35	#define KASAN_SHADOW_INIT 0
36	36	#endif
37	37
	38	+#ifndef PTE_HWTABLE_PTRS
	39	+#define PTE_HWTABLE_PTRS 0
	40	+#endif
	41	+
38	42	extern unsigned char kasan_early_shadow_page[PAGE_SIZE];
39		−extern pte_t kasan_early_shadow_pte[PTRS_PER_PTE];
	43	+extern pte_t kasan_early_shadow_pte[PTRS_PER_PTE + PTE_HWTABLE_PTRS];
40	44	extern pmd_t kasan_early_shadow_pmd[PTRS_PER_PMD];
41	45	extern pud_t kasan_early_shadow_pud[PTRS_PER_PUD];
42	46	extern p4d_t kasan_early_shadow_p4d[MAX_PTRS_PER_P4D];

include/linux/mdio-bitbang.h+3−0

@@ -35,6 +35,9 @@ struct mdiobb_ctrl { · 34 unmodified lines
35	35	const struct mdiobb_ops *ops;
36	36	};
37	37
	38	+int mdiobb_read(struct mii_bus *bus, int phy, int reg);
	39	+int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val);
	40	+
38	41	/* The returned bus is not yet registered with the phy layer. */
39	42	struct mii_bus alloc_mdio_bitbang(struct mdiobb_ctrl ctrl);
40	43

include/linux/memcontrol.h+1−1

@@ -665,7 +665,7 @@ static inline struct lruvec mem_cgroup_page_lruvec(struct page page, · 664 unmodified lines
665	665	{
666	666	struct mem_cgroup *memcg = page_memcg(page);
667	667
668		− VM_WARN_ON_ONCE_PAGE(!memcg, page);
	668	+ VM_WARN_ON_ONCE_PAGE(!memcg && !mem_cgroup_disabled(), page);
669	669	return mem_cgroup_lruvec(memcg, pgdat);
670	670	}
671	671

include/linux/perf/arm_pmu.h+0−2

@@ -163,8 +163,6 @@ int arm_pmu_acpi_probe(armpmu_init_fn init_fn); · 162 unmodified lines
163	163	static inline int arm_pmu_acpi_probe(armpmu_init_fn init_fn) { return 0; }
164	164	#endif
165	165
166		−bool arm_pmu_irq_is_nmi(void);
167		−
168	166	/* Internal functions only for core arm_pmu code */
169	167	struct arm_pmu *armpmu_alloc(void);
170	168	struct arm_pmu *armpmu_alloc_atomic(void);

include/linux/usb/usbnet.h+2−0

@@ -81,6 +81,8 @@ struct usbnet { · 80 unmodified lines
81	81	# define EVENT_LINK_CHANGE 11
82	82	# define EVENT_SET_RX_MODE 12
83	83	# define EVENT_NO_IP_ALIGN 13
	84	+ u32 rx_speed; /* in bps - NOT Mbps */
	85	+ u32 tx_speed; /* in bps - NOT Mbps */
84	86	};
85	87
86	88	static inline struct usb_driver driver_of(struct usb_interface intf)

include/net/cfg80211.h+4−1

@@ -1756,7 +1756,7 @@ struct cfg80211_sar_specs { · 1755 unmodified lines
1756	1756
1757	1757
1758	1758	/**
1759		− * @struct cfg80211_sar_chan_ranges - sar frequency ranges
	1759	+ * struct cfg80211_sar_freq_ranges - sar frequency ranges
1760	1760	* @start_freq: start range edge frequency
1761	1761	* @end_freq: end range edge frequency
1762	1762	*/
@@ -3972,6 +3972,8 @@ struct mgmt_frame_regs { · 2209 unmodified lines
3972	3972	* This callback may sleep.
3973	3973	* @reset_tid_config: Reset TID specific configuration for the peer, for the
3974	3974	* given TIDs. This callback may sleep.
	3975	+ *
	3976	+ * @set_sar_specs: Update the SAR (TX power) settings.
3975	3977	*/
3976	3978	struct cfg80211_ops {
3977	3979	int (suspend)(struct wiphy wiphy, struct cfg80211_wowlan *wow);
@@ -4929,6 +4931,7 @@ struct wiphy_iftype_akm_suites { · 951 unmodified lines
4929	4931	* @max_data_retry_count: maximum supported per TID retry count for
4930	4932	* configuration through the %NL80211_TID_CONFIG_ATTR_RETRY_SHORT and
4931	4933	* %NL80211_TID_CONFIG_ATTR_RETRY_LONG attributes
	4934	+ * @sar_capa: SAR control capabilities
4932	4935	*/
4933	4936	struct wiphy {
4934	4937	/* assign these fields before you register the wiphy */

include/net/inet_connection_sock.h+3−0

@@ -76,6 +76,8 @@ struct inet_connection_sock_af_ops { · 75 unmodified lines
76	76	* @icsk_ext_hdr_len: Network protocol overhead (IP/IPv6 options)
77	77	* @icsk_ack: Delayed ACK control data
78	78	* @icsk_mtup; MTU probing control data
	79	+ * @icsk_probes_tstamp: Probe timestamp (cleared by non-zero window ack)
	80	+ * @icsk_user_timeout: TCP_USER_TIMEOUT value
79	81	*/
80	82	struct inet_connection_sock {
81	83	/* inet_sock has to be the first member! */
@@ -129,6 +131,7 @@ struct inet_connection_sock { · 47 unmodified lines
129	131
130	132	u32 probe_timestamp;
131	133	} icsk_mtup;
	134	+ u32 icsk_probes_tstamp;
132	135	u32 icsk_user_timeout;
133	136
134	137	u64 icsk_ca_priv[104 / sizeof(u64)];

include/net/mac80211.h+1−0

@@ -3880,6 +3880,7 @@ enum ieee80211_reconfig_type { · 3879 unmodified lines
3880	3880	* This callback may sleep.
3881	3881	* @sta_set_4addr: Called to notify the driver when a station starts/stops using
3882	3882	* 4-address mode
	3883	+ * @set_sar_specs: Update the SAR (TX power) settings.
3883	3884	*/
3884	3885	struct ieee80211_ops {
3885	3886	void (tx)(struct ieee80211_hw hw,

include/net/sock.h+12−5

@@ -1921,10 +1921,13 @@ static inline void sk_set_txhash(struct sock *sk) · 1920 unmodified lines
1921	1921	sk->sk_txhash = net_tx_rndhash();
1922	1922	}
1923	1923
1924		−static inline void sk_rethink_txhash(struct sock *sk)
	1924	+static inline bool sk_rethink_txhash(struct sock *sk)
1925	1925	{
1926		− if (sk->sk_txhash)
	1926	+ if (sk->sk_txhash) {
1927	1927	sk_set_txhash(sk);
	1928	+ return true;
	1929	+ }
	1930	+ return false;
1928	1931	}
1929	1932
1930	1933	static inline struct dst_entry *
@@ -1947,12 +1950,10 @@ sk_dst_get(struct sock *sk) · 16 unmodified lines
1947	1950	return dst;
1948	1951	}
1949	1952
1950		−static inline void dst_negative_advice(struct sock *sk)
	1953	+static inline void __dst_negative_advice(struct sock *sk)
1951	1954	{
1952	1955	struct dst_entry ndst, dst = __sk_dst_get(sk);
1953	1956
1954		− sk_rethink_txhash(sk);
1955		−
1956	1957	if (dst && dst->ops->negative_advice) {
1957	1958	ndst = dst->ops->negative_advice(dst);
1958	1959
@@ -1964,6 +1965,12 @@ static inline void dst_negative_advice(struct sock *sk) · 5 unmodified lines
1964	1965	}
1965	1966	}
1966	1967
	1968	+static inline void dst_negative_advice(struct sock *sk)
	1969	+{
	1970	+ sk_rethink_txhash(sk);
	1971	+ __dst_negative_advice(sk);
	1972	+}
	1973	+
1967	1974	static inline void
1968	1975	__sk_dst_set(struct sock sk, struct dst_entry dst)
1969	1976	{

include/trace/events/sunrpc.h+53−6

@@ -1424,13 +1424,61 @@ TRACE_EVENT(rpcb_unregister, · 1423 unmodified lines
1424	1424	)
1425	1425	);
1426	1426
	1427	+/* Record an xdr_buf containing a fully-formed RPC message */
	1428	+DECLARE_EVENT_CLASS(svc_xdr_msg_class,
	1429	+ TP_PROTO(
	1430	+ const struct xdr_buf *xdr
	1431	+ ),
	1432	+
	1433	+ TP_ARGS(xdr),
	1434	+
	1435	+ TP_STRUCT__entry(
	1436	+ __field(u32, xid)
	1437	+ __field(const void *, head_base)
	1438	+ __field(size_t, head_len)
	1439	+ __field(const void *, tail_base)
	1440	+ __field(size_t, tail_len)
	1441	+ __field(unsigned int, page_len)
	1442	+ __field(unsigned int, msg_len)
	1443	+ ),
	1444	+
	1445	+ TP_fast_assign(
	1446	+ __be32 p = (__be32 )xdr->head[0].iov_base;
	1447	+
	1448	+ __entry->xid = be32_to_cpu(*p);
	1449	+ __entry->head_base = p;
	1450	+ __entry->head_len = xdr->head[0].iov_len;
	1451	+ __entry->tail_base = xdr->tail[0].iov_base;
	1452	+ __entry->tail_len = xdr->tail[0].iov_len;
	1453	+ __entry->page_len = xdr->page_len;
	1454	+ __entry->msg_len = xdr->len;
	1455	+ ),
	1456	+
	1457	+ TP_printk("xid=0x%08x head=[%p,%zu] page=%u tail=[%p,%zu] len=%u",
	1458	+ __entry->xid,
	1459	+ __entry->head_base, __entry->head_len, __entry->page_len,
	1460	+ __entry->tail_base, __entry->tail_len, __entry->msg_len
	1461	+ )
	1462	+);
	1463	+
	1464	+#define DEFINE_SVCXDRMSG_EVENT(name) \
	1465	+ DEFINE_EVENT(svc_xdr_msg_class, \
	1466	+ svc_xdr_##name, \
	1467	+ TP_PROTO( \
	1468	+ const struct xdr_buf *xdr \
	1469	+ ), \
	1470	+ TP_ARGS(xdr))
	1471	+
	1472	+DEFINE_SVCXDRMSG_EVENT(recvfrom);
	1473	+
	1474	+/* Record an xdr_buf containing arbitrary data, tagged with an XID */
1427	1475	DECLARE_EVENT_CLASS(svc_xdr_buf_class,
1428	1476	TP_PROTO(
1429		− const struct svc_rqst *rqst,
	1477	+ __be32 xid,
1430	1478	const struct xdr_buf *xdr
1431	1479	),
1432	1480
1433		− TP_ARGS(rqst, xdr),
	1481	+ TP_ARGS(xid, xdr),
1434	1482
1435	1483	TP_STRUCT__entry(
1436	1484	__field(u32, xid)
@@ -1443,7 +1491,7 @@ DECLARE_EVENT_CLASS(svc_xdr_buf_class, · 6 unmodified lines
1443	1491	),
1444	1492
1445	1493	TP_fast_assign(
1446		− __entry->xid = be32_to_cpu(rqst->rq_xid);
	1494	+ __entry->xid = be32_to_cpu(xid);
1447	1495	__entry->head_base = xdr->head[0].iov_base;
1448	1496	__entry->head_len = xdr->head[0].iov_len;
1449	1497	__entry->tail_base = xdr->tail[0].iov_base;
@@ -1463,12 +1511,11 @@ DECLARE_EVENT_CLASS(svc_xdr_buf_class, · 13 unmodified lines
1463	1511	DEFINE_EVENT(svc_xdr_buf_class, \
1464	1512	svc_xdr_##name, \
1465	1513	TP_PROTO( \
1466		− const struct svc_rqst *rqst, \
	1514	+ __be32 xid, \
1467	1515	const struct xdr_buf *xdr \
1468	1516	), \
1469		− TP_ARGS(rqst, xdr))
	1517	+ TP_ARGS(xid, xdr))
1470	1518
1471		−DEFINE_SVCXDRBUF_EVENT(recvfrom);
1472	1519	DEFINE_SVCXDRBUF_EVENT(sendto);
1473	1520
1474	1521	/*

include/xen/xenbus.h+1−1

@@ -192,7 +192,7 @@ void xs_suspend_cancel(void); · 191 unmodified lines
192	192
193	193	struct work_struct;
194	194
195		−void xenbus_probe(struct work_struct *);
	195	+void xenbus_probe(void);
196	196
197	197	#define XENBUS_IS_ERR_READ(str) ({ \
198	198	if (!IS_ERR(str) && strlen(str) == 0) { \

kernel/bpf/bpf_inode_storage.c+6−3

@@ -176,14 +176,14 @@ BPF_CALL_4(bpf_inode_storage_get, struct bpf_map , map, struct inode , inode, · 175 unmodified lines
176	176	* bpf_local_storage_update expects the owner to have a
177	177	* valid storage pointer.
178	178	*/
179		− if (!inode_storage_ptr(inode))
	179	+ if (!inode \|\| !inode_storage_ptr(inode))
180	180	return (unsigned long)NULL;
181	181
182	182	sdata = inode_storage_lookup(inode, map, true);
183	183	if (sdata)
184	184	return (unsigned long)sdata->data;
185	185
186		− /* This helper must only called from where the inode is gurranteed
	186	+ /* This helper must only called from where the inode is guaranteed
187	187	* to have a refcount and cannot be freed.
188	188	*/
189	189	if (flags & BPF_LOCAL_STORAGE_GET_F_CREATE) {
@@ -200,7 +200,10 @@ BPF_CALL_4(bpf_inode_storage_get, struct bpf_map , map, struct inode , inode, · 10 unmodified lines
200	200	BPF_CALL_2(bpf_inode_storage_delete,
201	201	struct bpf_map , map, struct inode , inode)
202	202	{
203		− /* This helper must only called from where the inode is gurranteed
	203	+ if (!inode)
	204	+ return -EINVAL;
	205	+
	206	+ /* This helper must only called from where the inode is guaranteed
204	207	* to have a refcount and cannot be freed.
205	208	*/
206	209	return inode_storage_delete(inode, map);

kernel/bpf/bpf_task_storage.c+4−1

@@ -218,7 +218,7 @@ BPF_CALL_4(bpf_task_storage_get, struct bpf_map , map, struct task_struct , · 217 unmodified lines
218	218	* bpf_local_storage_update expects the owner to have a
219	219	* valid storage pointer.
220	220	*/
221		− if (!task_storage_ptr(task))
	221	+ if (!task \|\| !task_storage_ptr(task))
222	222	return (unsigned long)NULL;
223	223
224	224	sdata = task_storage_lookup(task, map, true);
@@ -243,6 +243,9 @@ BPF_CALL_4(bpf_task_storage_get, struct bpf_map , map, struct task_struct , · 18 unmodified lines
243	243	BPF_CALL_2(bpf_task_storage_delete, struct bpf_map , map, struct task_struct ,
244	244	task)
245	245	{
	246	+ if (!task)
	247	+ return -EINVAL;
	248	+
246	249	/* This helper must only be called from places where the lifetime of the task
247	250	* is guaranteed. Either by being refcounted or by being protected
248	251	* by an RCU read-side critical section.

kernel/bpf/btf.c+1−1

@@ -4172,7 +4172,7 @@ static int btf_parse_hdr(struct btf_verifier_env *env) · 4171 unmodified lines
4172	4172	return -ENOTSUPP;
4173	4173	}
4174	4174
4175		− if (btf_data_size == hdr->hdr_len) {
	4175	+ if (!btf->base_btf && btf_data_size == hdr->hdr_len) {
4176	4176	btf_verifier_log(env, "No data");
4177	4177	return -EINVAL;
4178	4178	}

kernel/bpf/cgroup.c+3−2

@@ -1391,12 +1391,13 @@ int __cgroup_bpf_run_filter_setsockopt(struct sock sk, int level, · 1390 unmodified lines
1391	1391	if (ctx.optlen != 0) {
1392	1392	*optlen = ctx.optlen;
1393	1393	*kernel_optval = ctx.optval;
	1394	+ /* export and don't free sockopt buf */
	1395	+ return 0;
1394	1396	}
1395	1397	}
1396	1398
1397	1399	out:
1398		− if (ret)
1399		− sockopt_free_buf(&ctx);
	1400	+ sockopt_free_buf(&ctx);
1400	1401	return ret;
1401	1402	}
1402	1403

kernel/bpf/helpers.c+1−1

@@ -108,7 +108,7 @@ BPF_CALL_2(bpf_map_peek_elem, struct bpf_map , map, void , value) · 107 unmodified lines
108	108	}
109	109
110	110	const struct bpf_func_proto bpf_map_peek_elem_proto = {
111		− .func = bpf_map_pop_elem,
	111	+ .func = bpf_map_peek_elem,
112	112	.gpl_only = false,
113	113	.ret_type = RET_INTEGER,
114	114	.arg1_type = ARG_CONST_MAP_PTR,

kernel/bpf/syscall.c+4−2

@@ -2712,7 +2712,6 @@ out_unlock: · 2711 unmodified lines
2712	2712	out_put_prog:
2713	2713	if (tgt_prog_fd && tgt_prog)
2714	2714	bpf_prog_put(tgt_prog);
2715		− bpf_prog_put(prog);
2716	2715	return err;
2717	2716	}
2718	2717
@@ -2825,7 +2824,10 @@ static int bpf_raw_tracepoint_open(const union bpf_attr *attr) · 106 unmodified lines
2825	2824	tp_name = prog->aux->attach_func_name;
2826	2825	break;
2827	2826	}
2828		− return bpf_tracing_prog_attach(prog, 0, 0);
	2827	+ err = bpf_tracing_prog_attach(prog, 0, 0);
	2828	+ if (err >= 0)
	2829	+ return err;
	2830	+ goto out_put_prog;
2829	2831	case BPF_PROG_TYPE_RAW_TRACEPOINT:
2830	2832	case BPF_PROG_TYPE_RAW_TRACEPOINT_WRITABLE:
2831	2833	if (strncpy_from_user(buf,

kernel/bpf/verifier.c+5−3

@@ -2217,6 +2217,8 @@ static bool is_spillable_regtype(enum bpf_reg_type type) · 2216 unmodified lines
2217	2217	case PTR_TO_RDWR_BUF:
2218	2218	case PTR_TO_RDWR_BUF_OR_NULL:
2219	2219	case PTR_TO_PERCPU_BTF_ID:
	2220	+ case PTR_TO_MEM:
	2221	+ case PTR_TO_MEM_OR_NULL:
2220	2222	return true;
2221	2223	default:
2222	2224	return false;
@@ -5352,7 +5354,7 @@ static bool signed_add_overflows(s64 a, s64 b) · 3129 unmodified lines
5352	5354	return res < a;
5353	5355	}
5354	5356
5355		−static bool signed_add32_overflows(s64 a, s64 b)
	5357	+static bool signed_add32_overflows(s32 a, s32 b)
5356	5358	{
5357	5359	/* Do the add in u32, where overflow is well-defined */
5358	5360	s32 res = (s32)((u32)a + (u32)b);
@@ -5362,7 +5364,7 @@ static bool signed_add32_overflows(s64 a, s64 b) · 3 unmodified lines
5362	5364	return res < a;
5363	5365	}
5364	5366
5365		−static bool signed_sub_overflows(s32 a, s32 b)
	5367	+static bool signed_sub_overflows(s64 a, s64 b)
5366	5368	{
5367	5369	/* Do the sub in u64, where overflow is well-defined */
5368	5370	s64 res = (s64)((u64)a - (u64)b);
@@ -5374,7 +5376,7 @@ static bool signed_sub_overflows(s32 a, s32 b) · 5 unmodified lines
5374	5376
5375	5377	static bool signed_sub32_overflows(s32 a, s32 b)
5376	5378	{
5377		− /* Do the sub in u64, where overflow is well-defined */
	5379	+ /* Do the sub in u32, where overflow is well-defined */
5378	5380	s32 res = (s32)((u32)a - (u32)b);
5379	5381
5380	5382	if (b < 0)

kernel/signal.c+3−0

@@ -2550,6 +2550,9 @@ bool get_signal(struct ksignal *ksig) · 2549 unmodified lines
2550	2550	struct signal_struct *signal = current->signal;
2551	2551	int signr;
2552	2552
	2553	+ if (unlikely(current->task_works))
	2554	+ task_work_run();
	2555	+
2553	2556	/*
2554	2557	* For non-generic architectures, check for TIF_NOTIFY_SIGNAL so
2555	2558	* that the arch handlers don't all have to do it. If we get here

lib/iov_iter.c+1−1

@@ -1658,7 +1658,7 @@ static int copy_compat_iovec_from_user(struct iovec *iov, · 1657 unmodified lines
1658	1658	(const struct compat_iovec __user *)uvec;
1659	1659	int ret = -EFAULT, i;
1660	1660
1661		− if (!user_access_begin(uvec, nr_segs * sizeof(*uvec)))
	1661	+ if (!user_access_begin(uiov, nr_segs * sizeof(*uiov)))
1662	1662	return -EFAULT;
1663	1663
1664	1664	for (i = 0; i < nr_segs; i++) {

mm/hugetlb.c+1−1

@@ -4371,7 +4371,7 @@ retry: · 4370 unmodified lines
4371	4371	* So we need to block hugepage fault by PG_hwpoison bit check.
4372	4372	*/
4373	4373	if (unlikely(PageHWPoison(page))) {
4374		− ret = VM_FAULT_HWPOISON \|
	4374	+ ret = VM_FAULT_HWPOISON_LARGE \|
4375	4375	VM_FAULT_SET_HINDEX(hstate_index(h));
4376	4376	goto backout_unlocked;
4377	4377	}

mm/kasan/init.c+2−1

@@ -64,7 +64,8 @@ static inline bool kasan_pmd_table(pud_t pud) · 63 unmodified lines
64	64	return false;
65	65	}
66	66	#endif
67		−pte_t kasan_early_shadow_pte[PTRS_PER_PTE] __page_aligned_bss;
	67	+pte_t kasan_early_shadow_pte[PTRS_PER_PTE + PTE_HWTABLE_PTRS]
	68	+ __page_aligned_bss;
68	69
69	70	static inline bool kasan_pte_table(pmd_t pmd)
70	71	{

mm/memory-failure.c+1−1

@@ -1940,7 +1940,7 @@ retry: · 1939 unmodified lines
1940	1940	goto retry;
1941	1941	}
1942	1942	} else if (ret == -EIO) {
1943		− pr_info("%s: %#lx: unknown page type: %lx (%pGP)\n",
	1943	+ pr_info("%s: %#lx: unknown page type: %lx (%pGp)\n",
1944	1944	__func__, pfn, page->flags, &page->flags);
1945	1945	}
1946	1946

mm/mempolicy.c+1−1

@@ -1111,7 +1111,7 @@ int do_migrate_pages(struct mm_struct mm, const nodemask_t from, · 1110 unmodified lines
1111	1111	const nodemask_t *to, int flags)
1112	1112	{
1113	1113	int busy = 0;
1114		− int err;
	1114	+ int err = 0;
1115	1115	nodemask_t tmp;
1116	1116
1117	1117	migrate_prep();

mm/page_alloc.c+16−15

@@ -2862,20 +2862,20 @@ __rmqueue(struct zone *zone, unsigned int order, int migratetype, · 2861 unmodified lines
2862	2862	{
2863	2863	struct page *page;
2864	2864
2865		−#ifdef CONFIG_CMA
2866		− /*
2867		− * Balance movable allocations between regular and CMA areas by
2868		− * allocating from CMA when over half of the zone's free memory
2869		− * is in the CMA area.
2870		− */
2871		− if (alloc_flags & ALLOC_CMA &&
2872		− zone_page_state(zone, NR_FREE_CMA_PAGES) >
2873		− zone_page_state(zone, NR_FREE_PAGES) / 2) {
2874		− page = __rmqueue_cma_fallback(zone, order);
2875		− if (page)
2876		− return page;
	2865	+ if (IS_ENABLED(CONFIG_CMA)) {
	2866	+ /*
	2867	+ * Balance movable allocations between regular and CMA areas by
	2868	+ * allocating from CMA when over half of the zone's free memory
	2869	+ * is in the CMA area.
	2870	+ */
	2871	+ if (alloc_flags & ALLOC_CMA &&
	2872	+ zone_page_state(zone, NR_FREE_CMA_PAGES) >
	2873	+ zone_page_state(zone, NR_FREE_PAGES) / 2) {
	2874	+ page = __rmqueue_cma_fallback(zone, order);
	2875	+ if (page)
	2876	+ goto out;
	2877	+ }
2877	2878	}
2878		−#endif
2879	2879	retry:
2880	2880	page = __rmqueue_smallest(zone, order, migratetype);
2881	2881	if (unlikely(!page)) {
@@ -2886,8 +2886,9 @@ retry: · 4 unmodified lines
2886	2886	alloc_flags))
2887	2887	goto retry;
2888	2888	}
2889		−
2890		− trace_mm_page_alloc_zone_locked(page, order, migratetype);
	2889	+out:
	2890	+ if (page)
	2891	+ trace_mm_page_alloc_zone_locked(page, order, migratetype);
2891	2892	return page;
2892	2893	}
2893	2894

mm/process_vm_access.c+1−0

@@ -9,6 +9,7 @@ · 8 unmodified lines
9	9	#include <linux/mm.h>
10	10	#include <linux/uio.h>
11	11	#include <linux/sched.h>
	12	+#include <linux/compat.h>
12	13	#include <linux/sched/mm.h>
13	14	#include <linux/highmem.h>
14	15	#include <linux/ptrace.h>

mm/slub.c+1−1

@@ -1973,7 +1973,7 @@ static void get_partial_node(struct kmem_cache s, struct kmem_cache_node *n, · 1972 unmodified lines
1973	1973
1974	1974	t = acquire_slab(s, n, page, object == NULL, &objects);
1975	1975	if (!t)
1976		− break;
	1976	+ continue; /* cmpxchg raced */
1977	1977
1978	1978	available += objects;
1979	1979	if (!object) {

mm/vmalloc.c+3−1

@@ -2420,8 +2420,10 @@ void vmap(struct page *pages, unsigned int count, · 2419 unmodified lines
2420	2420	return NULL;
2421	2421	}
2422	2422
2423		− if (flags & VM_MAP_PUT_PAGES)
	2423	+ if (flags & VM_MAP_PUT_PAGES) {
2424	2424	area->pages = pages;
	2425	+ area->nr_pages = count;
	2426	+ }
2425	2427	return area->addr;
2426	2428	}
2427	2429	EXPORT_SYMBOL(vmap);

mm/vmscan.c+2−0

@@ -1238,6 +1238,8 @@ static unsigned int shrink_page_list(struct list_head *page_list, · 1237 unmodified lines
1238	1238	if (!PageSwapCache(page)) {
1239	1239	if (!(sc->gfp_mask & __GFP_IO))
1240	1240	goto keep_locked;
	1241	+ if (page_maybe_dma_pinned(page))
	1242	+ goto keep_locked;
1241	1243	if (PageTransHuge(page)) {
1242	1244	/* cannot split THP, skip it */
1243	1245	if (!can_split_huge_page(page, NULL))

net/bpf/test_run.c+2−1

@@ -272,7 +272,8 @@ int bpf_prog_test_run_raw_tp(struct bpf_prog *prog, · 271 unmodified lines
272	272	kattr->test.repeat)
273	273	return -EINVAL;
274	274
275		− if (ctx_size_in < prog->aux->max_ctx_offset)
	275	+ if (ctx_size_in < prog->aux->max_ctx_offset \|\|
	276	+ ctx_size_in > MAX_BPF_FUNC_ARGS * sizeof(u64))
276	277	return -EINVAL;
277	278
278	279	if ((kattr->test.flags & BPF_F_TEST_RUN_ON_CPU) == 0 && cpu != 0)

net/core/dev.c+5−0

@@ -9690,6 +9690,11 @@ static netdev_features_t netdev_fix_features(struct net_device *dev, · 9689 unmodified lines
9690	9690	}
9691	9691	}
9692	9692
	9693	+ if ((features & NETIF_F_HW_TLS_RX) && !(features & NETIF_F_RXCSUM)) {
	9694	+ netdev_dbg(dev, "Dropping TLS RX HW offload feature since no RXCSUM feature.\n");
	9695	+ features &= ~NETIF_F_HW_TLS_RX;
	9696	+ }
	9697	+
9693	9698	return features;
9694	9699	}
9695	9700

net/core/devlink.c+2−2

@@ -4146,7 +4146,7 @@ out: · 4145 unmodified lines
4146	4146	static int devlink_nl_cmd_port_param_get_doit(struct sk_buff *skb,
4147	4147	struct genl_info *info)
4148	4148	{
4149		− struct devlink_port *devlink_port = info->user_ptr[0];
	4149	+ struct devlink_port *devlink_port = info->user_ptr[1];
4150	4150	struct devlink_param_item *param_item;
4151	4151	struct sk_buff *msg;
4152	4152	int err;
@@ -4175,7 +4175,7 @@ static int devlink_nl_cmd_port_param_get_doit(struct sk_buff *skb, · 22 unmodified lines
4175	4175	static int devlink_nl_cmd_port_param_set_doit(struct sk_buff *skb,
4176	4176	struct genl_info *info)
4177	4177	{
4178		− struct devlink_port *devlink_port = info->user_ptr[0];
	4178	+ struct devlink_port *devlink_port = info->user_ptr[1];
4179	4179
4180	4180	return __devlink_nl_cmd_param_set_doit(devlink_port->devlink,
4181	4181	devlink_port->index,

net/core/gen_estimator.c+7−4

@@ -80,11 +80,11 @@ static void est_timer(struct timer_list *t) · 79 unmodified lines
80	80	u64 rate, brate;
81	81
82	82	est_fetch_counters(est, &b);
83		− brate = (b.bytes - est->last_bytes) << (10 - est->ewma_log - est->intvl_log);
84		− brate -= (est->avbps >> est->ewma_log);
	83	+ brate = (b.bytes - est->last_bytes) << (10 - est->intvl_log);
	84	+ brate = (brate >> est->ewma_log) - (est->avbps >> est->ewma_log);
85	85
86		− rate = (b.packets - est->last_packets) << (10 - est->ewma_log - est->intvl_log);
87		− rate -= (est->avpps >> est->ewma_log);
	86	+ rate = (b.packets - est->last_packets) << (10 - est->intvl_log);
	87	+ rate = (rate >> est->ewma_log) - (est->avpps >> est->ewma_log);
88	88
89	89	write_seqcount_begin(&est->seq);
90	90	est->avbps += brate;
@@ -143,6 +143,9 @@ int gen_new_estimator(struct gnet_stats_basic_packed *bstats, · 52 unmodified lines
143	143	if (parm->interval < -2 \|\| parm->interval > 3)
144	144	return -EINVAL;
145	145
	146	+ if (parm->ewma_log == 0 \|\| parm->ewma_log >= 31)
	147	+ return -EINVAL;
	148	+
146	149	est = kzalloc(sizeof(*est), GFP_KERNEL);
147	150	if (!est)
148	151	return -ENOBUFS;

net/core/skbuff.c+5−1

@@ -437,7 +437,11 @@ struct sk_buff __netdev_alloc_skb(struct net_device dev, unsigned int len, · 436 unmodified lines
437	437
438	438	len += NET_SKB_PAD;
439	439
440		− if ((len > SKB_WITH_OVERHEAD(PAGE_SIZE)) \|\|
	440	+ /* If requested length is either too small or too big,
	441	+ * we use kmalloc() for skb->head allocation.
	442	+ */
	443	+ if (len <= SKB_WITH_OVERHEAD(1024) \|\|
	444	+ len > SKB_WITH_OVERHEAD(PAGE_SIZE) \|\|
441	445	(gfp_mask & (__GFP_DIRECT_RECLAIM \| GFP_DMA))) {
442	446	skb = __alloc_skb(len, gfp_mask, SKB_ALLOC_RX, NUMA_NO_NODE);
443	447	if (!skb)

net/ipv4/inet_connection_sock.c+1−0

@@ -851,6 +851,7 @@ struct sock inet_csk_clone_lock(const struct sock sk, · 850 unmodified lines
851	851	newicsk->icsk_retransmits = 0;
852	852	newicsk->icsk_backoff = 0;
853	853	newicsk->icsk_probes_out = 0;
	854	+ newicsk->icsk_probes_tstamp = 0;
854	855
855	856	/* Deinitialize accept_queue to trap illegal accesses. */
856	857	memset(&newicsk->icsk_accept_queue, 0, sizeof(newicsk->icsk_accept_queue));

net/ipv4/netfilter/ipt_rpfilter.c+1−1

@@ -76,7 +76,7 @@ static bool rpfilter_mt(const struct sk_buff skb, struct xt_action_param par) · 75 unmodified lines
76	76	flow.daddr = iph->saddr;
77	77	flow.saddr = rpfilter_get_saddr(iph->daddr);
78	78	flow.flowi4_mark = info->flags & XT_RPFILTER_VALID_MARK ? skb->mark : 0;
79		− flow.flowi4_tos = RT_TOS(iph->tos);
	79	+ flow.flowi4_tos = iph->tos & IPTOS_RT_MASK;
80	80	flow.flowi4_scope = RT_SCOPE_UNIVERSE;
81	81	flow.flowi4_oif = l3mdev_master_ifindex_rcu(xt_in(par));
82	82

net/ipv4/tcp.c+1−0

@@ -2937,6 +2937,7 @@ int tcp_disconnect(struct sock *sk, int flags) · 2936 unmodified lines
2937	2937
2938	2938	icsk->icsk_backoff = 0;
2939	2939	icsk->icsk_probes_out = 0;
	2940	+ icsk->icsk_probes_tstamp = 0;
2940	2941	icsk->icsk_rto = TCP_TIMEOUT_INIT;
2941	2942	icsk->icsk_rto_min = TCP_RTO_MIN;
2942	2943	icsk->icsk_delack_max = TCP_DELACK_MAX;

net/ipv4/tcp_input.c+3−3

@@ -3384,6 +3384,7 @@ static void tcp_ack_probe(struct sock *sk) · 3383 unmodified lines
3384	3384	return;
3385	3385	if (!after(TCP_SKB_CB(head)->end_seq, tcp_wnd_end(tp))) {
3386	3386	icsk->icsk_backoff = 0;
	3387	+ icsk->icsk_probes_tstamp = 0;
3387	3388	inet_csk_clear_xmit_timer(sk, ICSK_TIME_PROBE0);
3388	3389	/* Socket must be waked up by subsequent tcp_data_snd_check().
3389	3390	* This function is not for random using!
@@ -4396,10 +4397,9 @@ static void tcp_rcv_spurious_retrans(struct sock sk, const struct sk_buff skb) · 1006 unmodified lines
4396	4397	* The receiver remembers and reflects via DSACKs. Leverage the
4397	4398	* DSACK state and change the txhash to re-route speculatively.
4398	4399	*/
4399		− if (TCP_SKB_CB(skb)->seq == tcp_sk(sk)->duplicate_sack[0].start_seq) {
4400		− sk_rethink_txhash(sk);
	4400	+ if (TCP_SKB_CB(skb)->seq == tcp_sk(sk)->duplicate_sack[0].start_seq &&
	4401	+ sk_rethink_txhash(sk))
4401	4402	NET_INC_STATS(sock_net(sk), LINUX_MIB_TCPDUPLICATEDATAREHASH);
4402		− }
4403	4403	}
4404	4404
4405	4405	static void tcp_send_dupack(struct sock sk, const struct sk_buff skb)

net/ipv4/tcp_ipv4.c+15−14

@@ -1595,6 +1595,8 @@ struct sock tcp_v4_syn_recv_sock(const struct sock sk, struct sk_buff *skb, · 1594 unmodified lines
1595	1595	tcp_move_syn(newtp, req);
1596	1596	ireq->ireq_opt = NULL;
1597	1597	} else {
	1598	+ newinet->inet_opt = NULL;
	1599	+
1598	1600	if (!req_unhash && found_dup_sk) {
1599	1601	/* This code path should only be executed in the
1600	1602	* syncookie case only
@@ -1602,8 +1604,6 @@ struct sock tcp_v4_syn_recv_sock(const struct sock sk, struct sk_buff *skb, · 1 unmodified line
1602	1604	bh_unlock_sock(newsk);
1603	1605	sock_put(newsk);
1604	1606	newsk = NULL;
1605		− } else {
1606		− newinet->inet_opt = NULL;
1607	1607	}
1608	1608	}
1609	1609	return newsk;
@@ -1760,6 +1760,7 @@ int tcp_v4_early_demux(struct sk_buff *skb) · 150 unmodified lines
1760	1760	bool tcp_add_backlog(struct sock sk, struct sk_buff skb)
1761	1761	{
1762	1762	u32 limit = READ_ONCE(sk->sk_rcvbuf) + READ_ONCE(sk->sk_sndbuf);
	1763	+ u32 tail_gso_size, tail_gso_segs;
1763	1764	struct skb_shared_info *shinfo;
1764	1765	const struct tcphdr *th;
1765	1766	struct tcphdr *thtail;
@@ -1767,6 +1768,7 @@ bool tcp_add_backlog(struct sock sk, struct sk_buff skb) · 1 unmodified line
1767	1768	unsigned int hdrlen;
1768	1769	bool fragstolen;
1769	1770	u32 gso_segs;
	1771	+ u32 gso_size;
1770	1772	int delta;
1771	1773
1772	1774	/* In case all data was pulled from skb frags (in __pskb_pull_tail()),
@@ -1792,13 +1794,6 @@ bool tcp_add_backlog(struct sock sk, struct sk_buff skb) · 19 unmodified lines
1792	1794	*/
1793	1795	th = (const struct tcphdr *)skb->data;
1794	1796	hdrlen = th->doff * 4;
1795		− shinfo = skb_shinfo(skb);
1796		−
1797		− if (!shinfo->gso_size)
1798		− shinfo->gso_size = skb->len - hdrlen;
1799		−
1800		− if (!shinfo->gso_segs)
1801		− shinfo->gso_segs = 1;
1802	1797
1803	1798	tail = sk->sk_backlog.tail;
1804	1799	if (!tail)
@@ -1821,6 +1816,15 @@ bool tcp_add_backlog(struct sock sk, struct sk_buff skb) · 16 unmodified lines
1821	1816	goto no_coalesce;
1822	1817
1823	1818	__skb_pull(skb, hdrlen);
	1819	+
	1820	+ shinfo = skb_shinfo(skb);
	1821	+ gso_size = shinfo->gso_size ?: skb->len;
	1822	+ gso_segs = shinfo->gso_segs ?: 1;
	1823	+
	1824	+ shinfo = skb_shinfo(tail);
	1825	+ tail_gso_size = shinfo->gso_size ?: (tail->len - hdrlen);
	1826	+ tail_gso_segs = shinfo->gso_segs ?: 1;
	1827	+
1824	1828	if (skb_try_coalesce(tail, skb, &fragstolen, &delta)) {
1825	1829	TCP_SKB_CB(tail)->end_seq = TCP_SKB_CB(skb)->end_seq;
1826	1830
@@ -1847,11 +1851,8 @@ bool tcp_add_backlog(struct sock sk, struct sk_buff skb) · 20 unmodified lines
1847	1851	}
1848	1852
1849	1853	/* Not as strict as GRO. We only need to carry mss max value */
1850		− skb_shinfo(tail)->gso_size = max(shinfo->gso_size,
1851		− skb_shinfo(tail)->gso_size);
1852		−
1853		− gso_segs = skb_shinfo(tail)->gso_segs + shinfo->gso_segs;
1854		− skb_shinfo(tail)->gso_segs = min_t(u32, gso_segs, 0xFFFF);
	1854	+ shinfo->gso_size = max(gso_size, tail_gso_size);
	1855	+ shinfo->gso_segs = min_t(u32, gso_segs + tail_gso_segs, 0xFFFF);
1855	1856
1856	1857	sk->sk_backlog.len += delta;
1857	1858	__NET_INC_STATS(sock_net(sk),

net/ipv4/tcp_output.c+1−0

@@ -4084,6 +4084,7 @@ void tcp_send_probe0(struct sock *sk) · 4083 unmodified lines
4084	4084	/* Cancel probe timer, if it is not required. */
4085	4085	icsk->icsk_probes_out = 0;
4086	4086	icsk->icsk_backoff = 0;
	4087	+ icsk->icsk_probes_tstamp = 0;
4087	4088	return;
4088	4089	}
4089	4090

net/ipv4/tcp_timer.c+15−21

@@ -219,14 +219,8 @@ static int tcp_write_timeout(struct sock *sk) · 218 unmodified lines
219	219	int retry_until;
220	220
221	221	if ((1 << sk->sk_state) & (TCPF_SYN_SENT \| TCPF_SYN_RECV)) {
222		− if (icsk->icsk_retransmits) {
223		− dst_negative_advice(sk);
224		− } else {
225		− sk_rethink_txhash(sk);
226		− tp->timeout_rehash++;
227		− __NET_INC_STATS(sock_net(sk),
228		− LINUX_MIB_TCPTIMEOUTREHASH);
229		− }
	222	+ if (icsk->icsk_retransmits)
	223	+ __dst_negative_advice(sk);
230	224	retry_until = icsk->icsk_syn_retries ? : net->ipv4.sysctl_tcp_syn_retries;
231	225	expired = icsk->icsk_retransmits >= retry_until;
232	226	} else {
@@ -234,12 +228,7 @@ static int tcp_write_timeout(struct sock *sk) · 1 unmodified line
234	228	/* Black hole detection */
235	229	tcp_mtu_probing(icsk, sk);
236	230
237		− dst_negative_advice(sk);
238		− } else {
239		− sk_rethink_txhash(sk);
240		− tp->timeout_rehash++;
241		− __NET_INC_STATS(sock_net(sk),
242		− LINUX_MIB_TCPTIMEOUTREHASH);
	231	+ __dst_negative_advice(sk);
243	232	}
244	233
245	234	retry_until = net->ipv4.sysctl_tcp_retries2;
@@ -270,6 +259,11 @@ static int tcp_write_timeout(struct sock *sk) · 24 unmodified lines
270	259	return 1;
271	260	}
272	261
	262	+ if (sk_rethink_txhash(sk)) {
	263	+ tp->timeout_rehash++;
	264	+ __NET_INC_STATS(sock_net(sk), LINUX_MIB_TCPTIMEOUTREHASH);
	265	+ }
	266	+
273	267	return 0;
274	268	}
275	269
@@ -349,6 +343,7 @@ static void tcp_probe_timer(struct sock *sk) · 73 unmodified lines
349	343
350	344	if (tp->packets_out \|\| !skb) {
351	345	icsk->icsk_probes_out = 0;
	346	+ icsk->icsk_probes_tstamp = 0;
352	347	return;
353	348	}
354	349
@@ -360,13 +355,12 @@ static void tcp_probe_timer(struct sock *sk) · 5 unmodified lines
360	355	* corresponding system limit. We also implement similar policy when
361	356	* we use RTO to probe window in tcp_retransmit_timer().
362	357	*/
363		− if (icsk->icsk_user_timeout) {
364		− u32 elapsed = tcp_model_timeout(sk, icsk->icsk_probes_out,
365		− tcp_probe0_base(sk));
366		−
367		− if (elapsed >= icsk->icsk_user_timeout)
368		− goto abort;
369		− }
	358	+ if (!icsk->icsk_probes_tstamp)
	359	+ icsk->icsk_probes_tstamp = tcp_jiffies32;
	360	+ else if (icsk->icsk_user_timeout &&
	361	+ (s32)(tcp_jiffies32 - icsk->icsk_probes_tstamp) >=
	362	+ msecs_to_jiffies(icsk->icsk_user_timeout))
	363	+ goto abort;
370	364
371	365	max_probes = sock_net(sk)->ipv4.sysctl_tcp_retries2;
372	366	if (sock_flag(sk, SOCK_DEAD)) {

net/ipv4/udp.c+2−1

@@ -2555,7 +2555,8 @@ int udp_v4_early_demux(struct sk_buff *skb) · 2554 unmodified lines
2555	2555	*/
2556	2556	if (!inet_sk(sk)->inet_daddr && in_dev)
2557	2557	return ip_mc_validate_source(skb, iph->daddr,
2558		− iph->saddr, iph->tos,
	2558	+ iph->saddr,
	2559	+ iph->tos & IPTOS_RT_MASK,
2559	2560	skb->dev, in_dev, &itag);
2560	2561	}
2561	2562	return 0;

net/ipv6/addrconf.c+2−1

@@ -2467,8 +2467,9 @@ static void addrconf_add_mroute(struct net_device *dev) · 2466 unmodified lines
2467	2467	.fc_ifindex = dev->ifindex,
2468	2468	.fc_dst_len = 8,
2469	2469	.fc_flags = RTF_UP,
2470		− .fc_type = RTN_UNICAST,
	2470	+ .fc_type = RTN_MULTICAST,
2471	2471	.fc_nlinfo.nl_net = dev_net(dev),
	2472	+ .fc_protocol = RTPROT_KERNEL,
2472	2473	};
2473	2474
2474	2475	ipv6_addr_set(&cfg.fc_dst, htonl(0xFF000000), 0, 0, 0);

net/mac80211/debugfs.c+20−24

@@ -120,18 +120,17 @@ static ssize_t aqm_write(struct file *file, · 119 unmodified lines
120	120	{
121	121	struct ieee80211_local *local = file->private_data;
122	122	char buf[100];
123		− size_t len;
124	123
125		− if (count > sizeof(buf))
	124	+ if (count >= sizeof(buf))
126	125	return -EINVAL;
127	126
128	127	if (copy_from_user(buf, user_buf, count))
129	128	return -EFAULT;
130	129
131		− buf[sizeof(buf) - 1] = '\0';
132		− len = strlen(buf);
133		− if (len > 0 && buf[len-1] == '\n')
134		− buf[len-1] = 0;
	130	+ if (count && buf[count - 1] == '\n')
	131	+ buf[count - 1] = '\0';
	132	+ else
	133	+ buf[count] = '\0';
135	134
136	135	if (sscanf(buf, "fq_limit %u", &local->fq.limit) == 1)
137	136	return count;
@@ -177,18 +176,17 @@ static ssize_t airtime_flags_write(struct file *file, · 39 unmodified lines
177	176	{
178	177	struct ieee80211_local *local = file->private_data;
179	178	char buf[16];
180		− size_t len;
181	179
182		− if (count > sizeof(buf))
	180	+ if (count >= sizeof(buf))
183	181	return -EINVAL;
184	182
185	183	if (copy_from_user(buf, user_buf, count))
186	184	return -EFAULT;
187	185
188		− buf[sizeof(buf) - 1] = 0;
189		− len = strlen(buf);
190		− if (len > 0 && buf[len - 1] == '\n')
191		− buf[len - 1] = 0;
	186	+ if (count && buf[count - 1] == '\n')
	187	+ buf[count - 1] = '\0';
	188	+ else
	189	+ buf[count] = '\0';
192	190
193	191	if (kstrtou16(buf, 0, &local->airtime_flags))
194	192	return -EINVAL;
@@ -237,20 +235,19 @@ static ssize_t aql_txq_limit_write(struct file *file, · 42 unmodified lines
237	235	{
238	236	struct ieee80211_local *local = file->private_data;
239	237	char buf[100];
240		− size_t len;
241	238	u32 ac, q_limit_low, q_limit_high, q_limit_low_old, q_limit_high_old;
242	239	struct sta_info *sta;
243	240
244		− if (count > sizeof(buf))
	241	+ if (count >= sizeof(buf))
245	242	return -EINVAL;
246	243
247	244	if (copy_from_user(buf, user_buf, count))
248	245	return -EFAULT;
249	246
250		− buf[sizeof(buf) - 1] = 0;
251		− len = strlen(buf);
252		− if (len > 0 && buf[len - 1] == '\n')
253		− buf[len - 1] = 0;
	247	+ if (count && buf[count - 1] == '\n')
	248	+ buf[count - 1] = '\0';
	249	+ else
	250	+ buf[count] = '\0';
254	251
255	252	if (sscanf(buf, "%u %u %u", &ac, &q_limit_low, &q_limit_high) != 3)
256	253	return -EINVAL;
@@ -306,18 +303,17 @@ static ssize_t force_tx_status_write(struct file *file, · 49 unmodified lines
306	303	{
307	304	struct ieee80211_local *local = file->private_data;
308	305	char buf[3];
309		− size_t len;
310	306
311		− if (count > sizeof(buf))
	307	+ if (count >= sizeof(buf))
312	308	return -EINVAL;
313	309
314	310	if (copy_from_user(buf, user_buf, count))
315	311	return -EFAULT;
316	312
317		− buf[sizeof(buf) - 1] = '\0';
318		− len = strlen(buf);
319		− if (len > 0 && buf[len - 1] == '\n')
320		− buf[len - 1] = 0;
	313	+ if (count && buf[count - 1] == '\n')
	314	+ buf[count - 1] = '\0';
	315	+ else
	316	+ buf[count] = '\0';
321	317
322	318	if (buf[0] == '0' && buf[1] == '\0')
323	319	local->force_tx_status = 0;

net/mac80211/rx.c+2−0

@@ -4176,6 +4176,8 @@ void ieee80211_check_fast_rx(struct sta_info *sta) · 4175 unmodified lines
4176	4176
4177	4177	rcu_read_lock();
4178	4178	key = rcu_dereference(sta->ptk[sta->ptk_idx]);
	4179	+ if (!key)
	4180	+ key = rcu_dereference(sdata->default_unicast_key);
4179	4181	if (key) {
4180	4182	switch (key->conf.cipher) {
4181	4183	case WLAN_CIPHER_SUITE_TKIP:

net/mac80211/tx.c+17−14

@@ -649,7 +649,7 @@ ieee80211_tx_h_select_key(struct ieee80211_tx_data *tx) · 648 unmodified lines
649	649	if (!skip_hw && tx->key &&
650	650	tx->key->flags & KEY_FLAG_UPLOADED_TO_HARDWARE)
651	651	info->control.hw_key = &tx->key->conf;
652		− } else if (!ieee80211_is_mgmt(hdr->frame_control) && tx->sta &&
	652	+ } else if (ieee80211_is_data_present(hdr->frame_control) && tx->sta &&
653	653	test_sta_flag(tx->sta, WLAN_STA_USES_ENCRYPTION)) {
654	654	return TX_DROP;
655	655	}
@@ -3809,7 +3809,7 @@ void __ieee80211_schedule_txq(struct ieee80211_hw *hw, · 3153 unmodified lines
3809	3809	* get immediately moved to the back of the list on the next
3810	3810	* call to ieee80211_next_txq().
3811	3811	*/
3812		− if (txqi->txq.sta &&
	3812	+ if (txqi->txq.sta && local->airtime_flags &&
3813	3813	wiphy_ext_feature_isset(local->hw.wiphy,
3814	3814	NL80211_EXT_FEATURE_AIRTIME_FAIRNESS))
3815	3815	list_add(&txqi->schedule_order,
@@ -4251,7 +4251,6 @@ netdev_tx_t ieee80211_subif_start_xmit_8023(struct sk_buff *skb, · 435 unmodified lines
4251	4251	struct ethhdr ehdr = (struct ethhdr )skb->data;
4252	4252	struct ieee80211_key *key;
4253	4253	struct sta_info *sta;
4254		− bool offload = true;
4255	4254
4256	4255	if (unlikely(skb->len < ETH_HLEN)) {
4257	4256	kfree_skb(skb);
@@ -4267,18 +4266,22 @@ netdev_tx_t ieee80211_subif_start_xmit_8023(struct sk_buff *skb, · 9 unmodified lines
4267	4266
4268	4267	if (unlikely(IS_ERR_OR_NULL(sta) \|\| !sta->uploaded \|\|
4269	4268	!test_sta_flag(sta, WLAN_STA_AUTHORIZED) \|\|
4270		− sdata->control_port_protocol == ehdr->h_proto))
4271		− offload = false;
4272		− else if ((key = rcu_dereference(sta->ptk[sta->ptk_idx])) &&
4273		− (!(key->flags & KEY_FLAG_UPLOADED_TO_HARDWARE) \|\|
4274		− key->conf.cipher == WLAN_CIPHER_SUITE_TKIP))
4275		− offload = false;
4276		−
4277		− if (offload)
4278		− ieee80211_8023_xmit(sdata, dev, sta, key, skb);
4279		− else
4280		− ieee80211_subif_start_xmit(skb, dev);
	4269	+ sdata->control_port_protocol == ehdr->h_proto))
	4270	+ goto skip_offload;
	4271	+
	4272	+ key = rcu_dereference(sta->ptk[sta->ptk_idx]);
	4273	+ if (!key)
	4274	+ key = rcu_dereference(sdata->default_unicast_key);
	4275	+
	4276	+ if (key && (!(key->flags & KEY_FLAG_UPLOADED_TO_HARDWARE) \|\|
	4277	+ key->conf.cipher == WLAN_CIPHER_SUITE_TKIP))
	4278	+ goto skip_offload;
	4279	+
	4280	+ ieee80211_8023_xmit(sdata, dev, sta, key, skb);
	4281	+ goto out;
4281	4282
	4283	+skip_offload:
	4284	+ ieee80211_subif_start_xmit(skb, dev);
4282	4285	out:
4283	4286	rcu_read_unlock();
4284	4287

net/nfc/nci/core.c+1−1

@@ -508,7 +508,7 @@ static int nci_open_device(struct nci_dev *ndev) · 507 unmodified lines
508	508	};
509	509	unsigned long opt = 0;
510	510
511		− if (!(ndev->nci_ver & NCI_VER_2_MASK))
	511	+ if (ndev->nci_ver & NCI_VER_2_MASK)
512	512	opt = (unsigned long)&nci_init_v2_cmd;
513	513
514	514	rc = __nci_request(ndev, nci_init_req, opt,

net/sched/cls_flower.c+13−9

@@ -1272,6 +1272,10 @@ static int fl_set_enc_opt(struct nlattr *tb, struct fl_flow_key key, · 1271 unmodified lines
1272	1272
1273	1273	nla_opt_msk = nla_data(tb[TCA_FLOWER_KEY_ENC_OPTS_MASK]);
1274	1274	msk_depth = nla_len(tb[TCA_FLOWER_KEY_ENC_OPTS_MASK]);
	1275	+ if (!nla_ok(nla_opt_msk, msk_depth)) {
	1276	+ NL_SET_ERR_MSG(extack, "Invalid nested attribute for masks");
	1277	+ return -EINVAL;
	1278	+ }
1275	1279	}
1276	1280
1277	1281	nla_for_each_attr(nla_opt_key, nla_enc_key,
@@ -1307,9 +1311,6 @@ static int fl_set_enc_opt(struct nlattr *tb, struct fl_flow_key key, · 29 unmodified lines
1307	1311	NL_SET_ERR_MSG(extack, "Key and mask miss aligned");
1308	1312	return -EINVAL;
1309	1313	}
1310		−
1311		− if (msk_depth)
1312		− nla_opt_msk = nla_next(nla_opt_msk, &msk_depth);
1313	1314	break;
1314	1315	case TCA_FLOWER_KEY_ENC_OPTS_VXLAN:
1315	1316	if (key->enc_opts.dst_opt_type) {
@@ -1340,9 +1341,6 @@ static int fl_set_enc_opt(struct nlattr *tb, struct fl_flow_key key, · 24 unmodified lines
1340	1341	NL_SET_ERR_MSG(extack, "Key and mask miss aligned");
1341	1342	return -EINVAL;
1342	1343	}
1343		−
1344		− if (msk_depth)
1345		− nla_opt_msk = nla_next(nla_opt_msk, &msk_depth);
1346	1344	break;
1347	1345	case TCA_FLOWER_KEY_ENC_OPTS_ERSPAN:
1348	1346	if (key->enc_opts.dst_opt_type) {
@@ -1373,14 +1371,20 @@ static int fl_set_enc_opt(struct nlattr *tb, struct fl_flow_key key, · 24 unmodified lines
1373	1371	NL_SET_ERR_MSG(extack, "Key and mask miss aligned");
1374	1372	return -EINVAL;
1375	1373	}
1376		−
1377		− if (msk_depth)
1378		− nla_opt_msk = nla_next(nla_opt_msk, &msk_depth);
1379	1374	break;
1380	1375	default:
1381	1376	NL_SET_ERR_MSG(extack, "Unknown tunnel option type");
1382	1377	return -EINVAL;
1383	1378	}
	1379	+
	1380	+ if (!msk_depth)
	1381	+ continue;
	1382	+
	1383	+ if (!nla_ok(nla_opt_msk, msk_depth)) {
	1384	+ NL_SET_ERR_MSG(extack, "A mask attribute is invalid");
	1385	+ return -EINVAL;
	1386	+ }
	1387	+ nla_opt_msk = nla_next(nla_opt_msk, &msk_depth);
1384	1388	}
1385	1389
1386	1390	return 0;

net/sched/cls_tcindex.c+6−2

@@ -366,9 +366,13 @@ tcindex_set_parms(struct net net, struct tcf_proto tp, unsigned long base, · 365 unmodified lines
366	366	if (tb[TCA_TCINDEX_MASK])
367	367	cp->mask = nla_get_u16(tb[TCA_TCINDEX_MASK]);
368	368
369		− if (tb[TCA_TCINDEX_SHIFT])
	369	+ if (tb[TCA_TCINDEX_SHIFT]) {
370	370	cp->shift = nla_get_u32(tb[TCA_TCINDEX_SHIFT]);
371		−
	371	+ if (cp->shift > 16) {
	372	+ err = -EINVAL;
	373	+ goto errout;
	374	+ }
	375	+ }
372	376	if (!cp->hash) {
373	377	/* Hash not specified, use perfect hash if the upper limit
374	378	* of the hashing index is below the threshold.

net/sched/sch_api.c+2−1

@@ -412,7 +412,8 @@ struct qdisc_rate_table qdisc_get_rtab(struct tc_ratespec r, · 411 unmodified lines
412	412	{
413	413	struct qdisc_rate_table *rtab;
414	414
415		− if (tab == NULL \|\| r->rate == 0 \|\| r->cell_log == 0 \|\|
	415	+ if (tab == NULL \|\| r->rate == 0 \|\|
	416	+ r->cell_log == 0 \|\| r->cell_log >= 32 \|\|
416	417	nla_len(tab) != TC_RTAB_SIZE) {
417	418	NL_SET_ERR_MSG(extack, "Invalid rate table parameters for searching");
418	419	return NULL;

net/sunrpc/svc_xprt.c+2−2

@@ -857,6 +857,7 @@ int svc_recv(struct svc_rqst *rqstp, long timeout) · 856 unmodified lines
857	857	err = -EAGAIN;
858	858	if (len <= 0)
859	859	goto out_release;
	860	+ trace_svc_xdr_recvfrom(&rqstp->rq_arg);
860	861
861	862	clear_bit(XPT_OLD, &xprt->xpt_flags);
862	863
@@ -866,7 +867,6 @@ int svc_recv(struct svc_rqst *rqstp, long timeout) · 3 unmodified lines
866	867
867	868	if (serv->sv_stats)
868	869	serv->sv_stats->netcnt++;
869		− trace_svc_xdr_recvfrom(rqstp, &rqstp->rq_arg);
870	870	return len;
871	871	out_release:
872	872	rqstp->rq_res.len = 0;
@@ -904,7 +904,7 @@ int svc_send(struct svc_rqst *rqstp) · 31 unmodified lines
904	904	xb->len = xb->head[0].iov_len +
905	905	xb->page_len +
906	906	xb->tail[0].iov_len;
907		− trace_svc_xdr_sendto(rqstp, xb);
	907	+ trace_svc_xdr_sendto(rqstp->rq_xid, xb);
908	908	trace_svc_stats_latency(rqstp);
909	909
910	910	len = xprt->xpt_ops->xpo_sendto(rqstp);

net/wireless/reg.c+10−1

@@ -5,7 +5,7 @@ · 4 unmodified lines
5	5	* Copyright 2008-2011 Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
6	6	* Copyright 2013-2014 Intel Mobile Communications GmbH
7	7	* Copyright 2017 Intel Deutschland GmbH
8		− * Copyright (C) 2018 - 2019 Intel Corporation
	8	+ * Copyright (C) 2018 - 2021 Intel Corporation
9	9	*
10	10	* Permission to use, copy, modify, and/or distribute this software for any
11	11	* purpose with or without fee is hereby granted, provided that the above
@@ -139,6 +139,11 @@ static const struct ieee80211_regdomain *get_cfg80211_regdom(void) · 127 unmodified lines
139	139	return rcu_dereference_rtnl(cfg80211_regdomain);
140	140	}
141	141
	142	+/*
	143	+ * Returns the regulatory domain associated with the wiphy.
	144	+ *
	145	+ * Requires either RTNL or RCU protection
	146	+ */
142	147	const struct ieee80211_regdomain get_wiphy_regdom(struct wiphy wiphy)
143	148	{
144	149	return rcu_dereference_rtnl(wiphy->regd);
@@ -2571,9 +2576,13 @@ void wiphy_apply_custom_regulatory(struct wiphy *wiphy, · 2426 unmodified lines
2571	2576	if (IS_ERR(new_regd))
2572	2577	return;
2573	2578
	2579	+ rtnl_lock();
	2580	+
2574	2581	tmp = get_wiphy_regdom(wiphy);
2575	2582	rcu_assign_pointer(wiphy->regd, new_regd);
2576	2583	rcu_free_regdom(tmp);
	2584	+
	2585	+ rtnl_unlock();
2577	2586	}
2578	2587	EXPORT_SYMBOL(wiphy_apply_custom_regulatory);
2579	2588

net/xdp/xsk.c+2−2

@@ -108,9 +108,9 @@ EXPORT_SYMBOL(xsk_get_pool_from_qid); · 107 unmodified lines
108	108
109	109	void xsk_clear_pool_at_qid(struct net_device *dev, u16 queue_id)
110	110	{
111		− if (queue_id < dev->real_num_rx_queues)
	111	+ if (queue_id < dev->num_rx_queues)
112	112	dev->_rx[queue_id].pool = NULL;
113		− if (queue_id < dev->real_num_tx_queues)
	113	+ if (queue_id < dev->num_tx_queues)
114	114	dev->_tx[queue_id].pool = NULL;
115	115	}
116	116

security/lsm_audit.c+5−2

@@ -275,7 +275,9 @@ static void dump_common_audit_data(struct audit_buffer *ab, · 274 unmodified lines
275	275	struct inode *inode;
276	276
277	277	audit_log_format(ab, " name=");
	278	+ spin_lock(&a->u.dentry->d_lock);
278	279	audit_log_untrustedstring(ab, a->u.dentry->d_name.name);
	280	+ spin_unlock(&a->u.dentry->d_lock);
279	281
280	282	inode = d_backing_inode(a->u.dentry);
281	283	if (inode) {
@@ -293,8 +295,9 @@ static void dump_common_audit_data(struct audit_buffer *ab, · 11 unmodified lines
293	295	dentry = d_find_alias(inode);
294	296	if (dentry) {
295	297	audit_log_format(ab, " name=");
296		− audit_log_untrustedstring(ab,
297		− dentry->d_name.name);
	298	+ spin_lock(&dentry->d_lock);
	299	+ audit_log_untrustedstring(ab, dentry->d_name.name);
	300	+ spin_unlock(&dentry->d_lock);
298	301	dput(dentry);
299	302	}
300	303	audit_log_format(ab, " dev=");

tools/bootconfig/scripts/bconf2ftrace.sh+1−0

@@ -152,6 +152,7 @@ setup_instance() { # [instance] · 151 unmodified lines
152	152	set_array_of ${instance}.options ${instancedir}/trace_options
153	153	set_value_of ${instance}.trace_clock ${instancedir}/trace_clock
154	154	set_value_of ${instance}.cpumask ${instancedir}/tracing_cpumask
	155	+ set_value_of ${instance}.tracing_on ${instancedir}/tracing_on
155	156	set_value_of ${instance}.tracer ${instancedir}/current_tracer
156	157	set_array_of ${instance}.ftrace.filters \
157	158	${instancedir}/set_ftrace_filter

tools/bootconfig/scripts/ftrace2bconf.sh+4−0

@@ -221,6 +221,10 @@ instance_options() { # [instance-name] · 220 unmodified lines
221	221	if [ `echo $val \| sed -e s/f//g`x != x ]; then
222	222	emit_kv $PREFIX.cpumask = $val
223	223	fi
	224	+ val=`cat $INSTANCE/tracing_on`
	225	+ if [ `echo $val \| sed -e s/f//g`x != x ]; then
	226	+ emit_kv $PREFIX.tracing_on = $val
	227	+ fi
224	228
225	229	val=
226	230	for i in `cat $INSTANCE/set_event`; do

tools/include/linux/build_bug.h+0−5

@@ -79,9 +79,4 @@ · 78 unmodified lines
79	79	#define __static_assert(expr, msg, ...) _Static_assert(expr, msg)
80	80	#endif // static_assert
81	81
82		−#ifdef __GENKSYMS__
83		−/* genksyms gets confused by _Static_assert */
84		−#define _Static_assert(expr, ...)
85		−#endif
86		−
87	82	#endif /* _LINUX_BUILD_BUG_H */

tools/include/uapi/linux/kvm.h+2−0

@@ -251,6 +251,7 @@ struct kvm_hyperv_exit { · 250 unmodified lines
251	251	#define KVM_EXIT_X86_RDMSR 29
252	252	#define KVM_EXIT_X86_WRMSR 30
253	253	#define KVM_EXIT_DIRTY_RING_FULL 31
	254	+#define KVM_EXIT_AP_RESET_HOLD 32
254	255
255	256	/* For KVM_EXIT_INTERNAL_ERROR */
256	257	/* Emulate instruction failed. */
@@ -573,6 +574,7 @@ struct kvm_vapic_addr { · 316 unmodified lines
573	574	#define KVM_MP_STATE_CHECK_STOP 6
574	575	#define KVM_MP_STATE_OPERATING 7
575	576	#define KVM_MP_STATE_LOAD 8
	577	+#define KVM_MP_STATE_AP_RESET_HOLD 9
576	578
577	579	struct kvm_mp_state {
578	580	__u32 mp_state;

tools/lib/bpf/btf.c+0−5

@@ -240,11 +240,6 @@ static int btf_parse_hdr(struct btf *btf) · 239 unmodified lines
240	240	}
241	241
242	242	meta_left = btf->raw_size - sizeof(*hdr);
243		− if (!meta_left) {
244		− pr_debug("BTF has no data\n");
245		− return -EINVAL;
246		− }
247		−
248	243	if (meta_left < hdr->str_off + hdr->str_len) {
249	244	pr_debug("Invalid BTF total size:%u\n", btf->raw_size);
250	245	return -EINVAL;

tools/lib/perf/tests/test-cpumap.c+1−1

@@ -27,5 +27,5 @@ int main(int argc, char **argv) · 26 unmodified lines
27	27	perf_cpu_map__put(cpus);
28	28
29	29	__T_END;
30		− return 0;
	30	+ return tests_failed == 0 ? 0 : -1;
31	31	}

tools/lib/perf/tests/test-evlist.c+4−3

@@ -208,13 +208,13 @@ static int test_mmap_thread(void) · 207 unmodified lines
208	208	char path[PATH_MAX];
209	209	int id, err, pid, go_pipe[2];
210	210	union perf_event *event;
211		− char bf;
212	211	int count = 0;
213	212
214	213	snprintf(path, PATH_MAX, "%s/kernel/debug/tracing/events/syscalls/sys_enter_prctl/id",
215	214	sysfs__mountpoint());
216	215
217	216	if (filename__read_int(path, &id)) {
	217	+ tests_failed++;
218	218	fprintf(stderr, "error: failed to get tracepoint id: %s\n", path);
219	219	return -1;
220	220	}
@@ -229,6 +229,7 @@ static int test_mmap_thread(void) · 8 unmodified lines
229	229	pid = fork();
230	230	if (!pid) {
231	231	int i;
	232	+ char bf;
232	233
233	234	read(go_pipe[0], &bf, 1);
234	235
@@ -266,7 +267,7 @@ static int test_mmap_thread(void) · 31 unmodified lines
266	267	perf_evlist__enable(evlist);
267	268
268	269	/* kick the child and wait for it to finish */
269		− write(go_pipe[1], &bf, 1);
	270	+ write(go_pipe[1], "A", 1);
270	271	waitpid(pid, NULL, 0);
271	272
272	273	/*
@@ -409,5 +410,5 @@ int main(int argc, char **argv) · 136 unmodified lines
409	410	test_mmap_cpus();
410	411
411	412	__T_END;
412		− return 0;
	413	+ return tests_failed == 0 ? 0 : -1;
413	414	}

tools/lib/perf/tests/test-evsel.c+1−1

@@ -131,5 +131,5 @@ int main(int argc, char **argv) · 130 unmodified lines
131	131	test_stat_thread_enable();
132	132
133	133	__T_END;
134		− return 0;
	134	+ return tests_failed == 0 ? 0 : -1;
135	135	}

tools/lib/perf/tests/test-threadmap.c+1−1

@@ -27,5 +27,5 @@ int main(int argc, char **argv) · 26 unmodified lines
27	27	perf_thread_map__put(threads);
28	28
29	29	__T_END;
30		− return 0;
	30	+ return tests_failed == 0 ? 0 : -1;
31	31	}

tools/perf/examples/bpf/5sec.c+1−1

@@ -39,7 +39,7 @@ · 38 unmodified lines
39	39	Copyright (C) 2018 Red Hat, Inc., Arnaldo Carvalho de Melo <acme@redhat.com>
40	40	*/
41	41
42		−#include <bpf/bpf.h>
	42	+#include <bpf.h>
43	43
44	44	#define NSEC_PER_SEC 1000000000L
45	45

tools/perf/tests/shell/stat+shadow_stat.sh+14−16

@@ -9,31 +9,29 @@ perf stat -a true > /dev/null 2>&1 \|\| exit 2 · 8 unmodified lines
9	9
10	10	test_global_aggr()
11	11	{
12		− local cyc
13		−
14	12	perf stat -a --no-big-num -e cycles,instructions sleep 1 2>&1 \| \
15	13	grep -e cycles -e instructions \| \
16	14	while read num evt hash ipc rest
17	15	do
18	16	# skip not counted events
19		− if [[ $num == "<not" ]]; then
	17	+ if [ "$num" = "<not" ]; then
20	18	continue
21	19	fi
22	20
23	21	# save cycles count
24		− if [[ $evt == "cycles" ]]; then
	22	+ if [ "$evt" = "cycles" ]; then
25	23	cyc=$num
26	24	continue
27	25	fi
28	26
29	27	# skip if no cycles
30		− if [[ -z $cyc ]]; then
	28	+ if [ -z "$cyc" ]; then
31	29	continue
32	30	fi
33	31
34	32	# use printf for rounding and a leading zero
35		− local res=`printf "%.2f" $(echo "scale=6; $num / $cyc" \| bc -q)`
36		− if [[ $ipc != $res ]]; then
	33	+ res=`printf "%.2f" $(echo "scale=6; $num / $cyc" \| bc -q)`
	34	+ if [ "$ipc" != "$res" ]; then
37	35	echo "IPC is different: $res != $ipc ($num / $cyc)"
38	36	exit 1
39	37	fi
@@ -42,32 +40,32 @@ test_global_aggr() · 2 unmodified lines
42	40
43	41	test_no_aggr()
44	42	{
45		− declare -A results
46		−
47	43	perf stat -a -A --no-big-num -e cycles,instructions sleep 1 2>&1 \| \
48	44	grep ^CPU \| \
49	45	while read cpu num evt hash ipc rest
50	46	do
51	47	# skip not counted events
52		− if [[ $num == "<not" ]]; then
	48	+ if [ "$num" = "<not" ]; then
53	49	continue
54	50	fi
55	51
56	52	# save cycles count
57		− if [[ $evt == "cycles" ]]; then
58		− results[$cpu]=$num
	53	+ if [ "$evt" = "cycles" ]; then
	54	+ results="$results $cpu:$num"
59	55	continue
60	56	fi
61	57
	58	+ cyc=${results##* $cpu:}
	59	+ cyc=${cyc%% *}
	60	+
62	61	# skip if no cycles
63		− local cyc=${results[$cpu]}
64		− if [[ -z $cyc ]]; then
	62	+ if [ -z "$cyc" ]; then
65	63	continue
66	64	fi
67	65
68	66	# use printf for rounding and a leading zero
69		− local res=`printf "%.2f" $(echo "scale=6; $num / $cyc" \| bc -q)`
70		− if [[ $ipc != $res ]]; then
	67	+ res=`printf "%.2f" $(echo "scale=6; $num / $cyc" \| bc -q)`
	68	+ if [ "$ipc" != "$res" ]; then
71	69	echo "IPC is different for $cpu: $res != $ipc ($num / $cyc)"
72	70	exit 1
73	71	fi

tools/perf/util/header.c+8−0

@@ -3323,6 +3323,14 @@ int perf_session__write_header(struct perf_session *session, · 3322 unmodified lines
3323	3323	attr_offset = lseek(ff.fd, 0, SEEK_CUR);
3324	3324
3325	3325	evlist__for_each_entry(evlist, evsel) {
	3326	+ if (evsel->core.attr.size < sizeof(evsel->core.attr)) {
	3327	+ /*
	3328	+ * We are likely in "perf inject" and have read
	3329	+ * from an older file. Update attr size so that
	3330	+ * reader gets the right offset to the ids.
	3331	+ */
	3332	+ evsel->core.attr.size = sizeof(evsel->core.attr);
	3333	+ }
3326	3334	f_attr = (struct perf_file_attr){
3327	3335	.attr = evsel->core.attr,
3328	3336	.ids = {

tools/perf/util/machine.c+2−2

@@ -2980,7 +2980,7 @@ int machines__for_each_thread(struct machines *machines, · 2979 unmodified lines
2980	2980
2981	2981	pid_t machine__get_current_tid(struct machine *machine, int cpu)
2982	2982	{
2983		− int nr_cpus = min(machine->env->nr_cpus_online, MAX_NR_CPUS);
	2983	+ int nr_cpus = min(machine->env->nr_cpus_avail, MAX_NR_CPUS);
2984	2984
2985	2985	if (cpu < 0 \|\| cpu >= nr_cpus \|\| !machine->current_tid)
2986	2986	return -1;
@@ -2992,7 +2992,7 @@ int machine__set_current_tid(struct machine *machine, int cpu, pid_t pid, · 5 unmodified lines
2992	2992	pid_t tid)
2993	2993	{
2994	2994	struct thread *thread;
2995		− int nr_cpus = min(machine->env->nr_cpus_online, MAX_NR_CPUS);
	2995	+ int nr_cpus = min(machine->env->nr_cpus_avail, MAX_NR_CPUS);
2996	2996
2997	2997	if (cpu < 0)
2998	2998	return -EINVAL;

tools/perf/util/session.c+1−1

@@ -2404,7 +2404,7 @@ int perf_session__cpu_bitmap(struct perf_session *session, · 2403 unmodified lines
2404	2404	{
2405	2405	int i, err = -1;
2406	2406	struct perf_cpu_map *map;
2407		− int nr_cpus = min(session->header.env.nr_cpus_online, MAX_NR_CPUS);
	2407	+ int nr_cpus = min(session->header.env.nr_cpus_avail, MAX_NR_CPUS);
2408	2408
2409	2409	for (i = 0; i < PERF_TYPE_MAX; ++i) {
2410	2410	struct evsel *evsel;

tools/perf/util/stat-shadow.c+189−177

@@ -8,6 +8,7 @@ · 7 unmodified lines
8	8	#include "evlist.h"
9	9	#include "expr.h"
10	10	#include "metricgroup.h"
	11	+#include "cgroup.h"
11	12	#include <linux/zalloc.h>
12	13
13	14	/*
@@ -28,6 +29,7 @@ struct saved_value { · 14 unmodified lines
28	29	enum stat_type type;
29	30	int ctx;
30	31	int cpu;
	32	+ struct cgroup *cgrp;
31	33	struct runtime_stat *stat;
32	34	struct stats stats;
33	35	u64 metric_total;
@@ -57,6 +59,9 @@ static int saved_value_cmp(struct rb_node rb_node, const void entry) · 23 unmodified lines
57	59	if (a->ctx != b->ctx)
58	60	return a->ctx - b->ctx;
59	61
	62	+ if (a->cgrp != b->cgrp)
	63	+ return (char )a->cgrp < (char )b->cgrp ? -1 : +1;
	64	+
60	65	if (a->evsel == NULL && b->evsel == NULL) {
61	66	if (a->stat == b->stat)
62	67	return 0;
@@ -100,7 +105,8 @@ static struct saved_value saved_value_lookup(struct evsel evsel, · 37 unmodified lines
100	105	bool create,
101	106	enum stat_type type,
102	107	int ctx,
103		− struct runtime_stat *st)
	108	+ struct runtime_stat *st,
	109	+ struct cgroup *cgrp)
104	110	{
105	111	struct rblist *rblist;
106	112	struct rb_node *nd;
@@ -110,10 +116,15 @@ static struct saved_value saved_value_lookup(struct evsel evsel, · 3 unmodified lines
110	116	.type = type,
111	117	.ctx = ctx,
112	118	.stat = st,
	119	+ .cgrp = cgrp,
113	120	};
114	121
115	122	rblist = &st->value_list;
116	123
	124	+ /* don't use context info for clock events */
	125	+ if (type == STAT_NSECS)
	126	+ dm.ctx = 0;
	127	+
117	128	nd = rblist__find(rblist, &dm);
118	129	if (nd)
119	130	return container_of(nd, struct saved_value, rb_node);
@@ -191,12 +202,18 @@ void perf_stat__reset_shadow_per_stat(struct runtime_stat *st) · 71 unmodified lines
191	202	reset_stat(st);
192	203	}
193	204
	205	+struct runtime_stat_data {
	206	+ int ctx;
	207	+ struct cgroup *cgrp;
	208	+};
	209	+
194	210	static void update_runtime_stat(struct runtime_stat *st,
195	211	enum stat_type type,
196		− int ctx, int cpu, u64 count)
	212	+ int cpu, u64 count,
	213	+ struct runtime_stat_data *rsd)
197	214	{
198		− struct saved_value *v = saved_value_lookup(NULL, cpu, true,
199		− type, ctx, st);
	215	+ struct saved_value *v = saved_value_lookup(NULL, cpu, true, type,
	216	+ rsd->ctx, st, rsd->cgrp);
200	217
201	218	if (v)
202	219	update_stats(&v->stats, count);
@@ -210,82 +227,86 @@ static void update_runtime_stat(struct runtime_stat *st, · 7 unmodified lines
210	227	void perf_stat__update_shadow_stats(struct evsel *counter, u64 count,
211	228	int cpu, struct runtime_stat *st)
212	229	{
213		− int ctx = evsel_context(counter);
214	230	u64 count_ns = count;
215	231	struct saved_value *v;
	232	+ struct runtime_stat_data rsd = {
	233	+ .ctx = evsel_context(counter),
	234	+ .cgrp = counter->cgrp,
	235	+ };
216	236
217	237	count *= counter->scale;
218	238
219	239	if (evsel__is_clock(counter))
220		− update_runtime_stat(st, STAT_NSECS, 0, cpu, count_ns);
	240	+ update_runtime_stat(st, STAT_NSECS, cpu, count_ns, &rsd);
221	241	else if (evsel__match(counter, HARDWARE, HW_CPU_CYCLES))
222		− update_runtime_stat(st, STAT_CYCLES, ctx, cpu, count);
	242	+ update_runtime_stat(st, STAT_CYCLES, cpu, count, &rsd);
223	243	else if (perf_stat_evsel__is(counter, CYCLES_IN_TX))
224		− update_runtime_stat(st, STAT_CYCLES_IN_TX, ctx, cpu, count);
	244	+ update_runtime_stat(st, STAT_CYCLES_IN_TX, cpu, count, &rsd);
225	245	else if (perf_stat_evsel__is(counter, TRANSACTION_START))
226		− update_runtime_stat(st, STAT_TRANSACTION, ctx, cpu, count);
	246	+ update_runtime_stat(st, STAT_TRANSACTION, cpu, count, &rsd);
227	247	else if (perf_stat_evsel__is(counter, ELISION_START))
228		− update_runtime_stat(st, STAT_ELISION, ctx, cpu, count);
	248	+ update_runtime_stat(st, STAT_ELISION, cpu, count, &rsd);
229	249	else if (perf_stat_evsel__is(counter, TOPDOWN_TOTAL_SLOTS))
230	250	update_runtime_stat(st, STAT_TOPDOWN_TOTAL_SLOTS,
231		− ctx, cpu, count);
	251	+ cpu, count, &rsd);
232	252	else if (perf_stat_evsel__is(counter, TOPDOWN_SLOTS_ISSUED))
233	253	update_runtime_stat(st, STAT_TOPDOWN_SLOTS_ISSUED,
234		− ctx, cpu, count);
	254	+ cpu, count, &rsd);
235	255	else if (perf_stat_evsel__is(counter, TOPDOWN_SLOTS_RETIRED))
236	256	update_runtime_stat(st, STAT_TOPDOWN_SLOTS_RETIRED,
237		− ctx, cpu, count);
	257	+ cpu, count, &rsd);
238	258	else if (perf_stat_evsel__is(counter, TOPDOWN_FETCH_BUBBLES))
239	259	update_runtime_stat(st, STAT_TOPDOWN_FETCH_BUBBLES,
240		− ctx, cpu, count);
	260	+ cpu, count, &rsd);
241	261	else if (perf_stat_evsel__is(counter, TOPDOWN_RECOVERY_BUBBLES))
242	262	update_runtime_stat(st, STAT_TOPDOWN_RECOVERY_BUBBLES,
243		− ctx, cpu, count);
	263	+ cpu, count, &rsd);
244	264	else if (perf_stat_evsel__is(counter, TOPDOWN_RETIRING))
245	265	update_runtime_stat(st, STAT_TOPDOWN_RETIRING,
246		− ctx, cpu, count);
	266	+ cpu, count, &rsd);
247	267	else if (perf_stat_evsel__is(counter, TOPDOWN_BAD_SPEC))
248	268	update_runtime_stat(st, STAT_TOPDOWN_BAD_SPEC,
249		− ctx, cpu, count);
	269	+ cpu, count, &rsd);
250	270	else if (perf_stat_evsel__is(counter, TOPDOWN_FE_BOUND))
251	271	update_runtime_stat(st, STAT_TOPDOWN_FE_BOUND,
252		− ctx, cpu, count);
	272	+ cpu, count, &rsd);
253	273	else if (perf_stat_evsel__is(counter, TOPDOWN_BE_BOUND))
254	274	update_runtime_stat(st, STAT_TOPDOWN_BE_BOUND,
255		− ctx, cpu, count);
	275	+ cpu, count, &rsd);
256	276	else if (evsel__match(counter, HARDWARE, HW_STALLED_CYCLES_FRONTEND))
257	277	update_runtime_stat(st, STAT_STALLED_CYCLES_FRONT,
258		− ctx, cpu, count);
	278	+ cpu, count, &rsd);
259	279	else if (evsel__match(counter, HARDWARE, HW_STALLED_CYCLES_BACKEND))
260	280	update_runtime_stat(st, STAT_STALLED_CYCLES_BACK,
261		− ctx, cpu, count);
	281	+ cpu, count, &rsd);
262	282	else if (evsel__match(counter, HARDWARE, HW_BRANCH_INSTRUCTIONS))
263		− update_runtime_stat(st, STAT_BRANCHES, ctx, cpu, count);
	283	+ update_runtime_stat(st, STAT_BRANCHES, cpu, count, &rsd);
264	284	else if (evsel__match(counter, HARDWARE, HW_CACHE_REFERENCES))
265		− update_runtime_stat(st, STAT_CACHEREFS, ctx, cpu, count);
	285	+ update_runtime_stat(st, STAT_CACHEREFS, cpu, count, &rsd);
266	286	else if (evsel__match(counter, HW_CACHE, HW_CACHE_L1D))
267		− update_runtime_stat(st, STAT_L1_DCACHE, ctx, cpu, count);
	287	+ update_runtime_stat(st, STAT_L1_DCACHE, cpu, count, &rsd);
268	288	else if (evsel__match(counter, HW_CACHE, HW_CACHE_L1I))
269		− update_runtime_stat(st, STAT_L1_ICACHE, ctx, cpu, count);
	289	+ update_runtime_stat(st, STAT_L1_ICACHE, cpu, count, &rsd);
270	290	else if (evsel__match(counter, HW_CACHE, HW_CACHE_LL))
271		− update_runtime_stat(st, STAT_LL_CACHE, ctx, cpu, count);
	291	+ update_runtime_stat(st, STAT_LL_CACHE, cpu, count, &rsd);
272	292	else if (evsel__match(counter, HW_CACHE, HW_CACHE_DTLB))
273		− update_runtime_stat(st, STAT_DTLB_CACHE, ctx, cpu, count);
	293	+ update_runtime_stat(st, STAT_DTLB_CACHE, cpu, count, &rsd);
274	294	else if (evsel__match(counter, HW_CACHE, HW_CACHE_ITLB))
275		− update_runtime_stat(st, STAT_ITLB_CACHE, ctx, cpu, count);
	295	+ update_runtime_stat(st, STAT_ITLB_CACHE, cpu, count, &rsd);
276	296	else if (perf_stat_evsel__is(counter, SMI_NUM))
277		− update_runtime_stat(st, STAT_SMI_NUM, ctx, cpu, count);
	297	+ update_runtime_stat(st, STAT_SMI_NUM, cpu, count, &rsd);
278	298	else if (perf_stat_evsel__is(counter, APERF))
279		− update_runtime_stat(st, STAT_APERF, ctx, cpu, count);
	299	+ update_runtime_stat(st, STAT_APERF, cpu, count, &rsd);
280	300
281	301	if (counter->collect_stat) {
282		− v = saved_value_lookup(counter, cpu, true, STAT_NONE, 0, st);
	302	+ v = saved_value_lookup(counter, cpu, true, STAT_NONE, 0, st,
	303	+ rsd.cgrp);
283	304	update_stats(&v->stats, count);
284	305	if (counter->metric_leader)
285	306	v->metric_total += count;
286	307	} else if (counter->metric_leader) {
287	308	v = saved_value_lookup(counter->metric_leader,
288		− cpu, true, STAT_NONE, 0, st);
	309	+ cpu, true, STAT_NONE, 0, st, rsd.cgrp);
289	310	v->metric_total += count;
290	311	v->metric_other++;
291	312	}
@@ -422,11 +443,12 @@ void perf_stat__collect_metric_expr(struct evlist *evsel_list) · 130 unmodified lines
422	443	}
423	444
424	445	static double runtime_stat_avg(struct runtime_stat *st,
425		− enum stat_type type, int ctx, int cpu)
	446	+ enum stat_type type, int cpu,
	447	+ struct runtime_stat_data *rsd)
426	448	{
427	449	struct saved_value *v;
428	450
429		− v = saved_value_lookup(NULL, cpu, false, type, ctx, st);
	451	+ v = saved_value_lookup(NULL, cpu, false, type, rsd->ctx, st, rsd->cgrp);
430	452	if (!v)
431	453	return 0.0;
432	454
@@ -434,11 +456,12 @@ static double runtime_stat_avg(struct runtime_stat *st, · 1 unmodified line
434	456	}
435	457
436	458	static double runtime_stat_n(struct runtime_stat *st,
437		− enum stat_type type, int ctx, int cpu)
	459	+ enum stat_type type, int cpu,
	460	+ struct runtime_stat_data *rsd)
438	461	{
439	462	struct saved_value *v;
440	463
441		− v = saved_value_lookup(NULL, cpu, false, type, ctx, st);
	464	+ v = saved_value_lookup(NULL, cpu, false, type, rsd->ctx, st, rsd->cgrp);
442	465	if (!v)
443	466	return 0.0;
444	467
@@ -446,16 +469,15 @@ static double runtime_stat_n(struct runtime_stat *st, · 1 unmodified line
446	469	}
447	470
448	471	static void print_stalled_cycles_frontend(struct perf_stat_config *config,
449		− int cpu,
450		− struct evsel *evsel, double avg,
	472	+ int cpu, double avg,
451	473	struct perf_stat_output_ctx *out,
452		− struct runtime_stat *st)
	474	+ struct runtime_stat *st,
	475	+ struct runtime_stat_data *rsd)
453	476	{
454	477	double total, ratio = 0.0;
455	478	const char *color;
456		− int ctx = evsel_context(evsel);
457	479
458		− total = runtime_stat_avg(st, STAT_CYCLES, ctx, cpu);
	480	+ total = runtime_stat_avg(st, STAT_CYCLES, cpu, rsd);
459	481
460	482	if (total)
461	483	ratio = avg / total * 100.0;
@@ -470,16 +492,15 @@ static void print_stalled_cycles_frontend(struct perf_stat_config *config, · 8 unmodified lines
470	492	}
471	493
472	494	static void print_stalled_cycles_backend(struct perf_stat_config *config,
473		− int cpu,
474		− struct evsel *evsel, double avg,
	495	+ int cpu, double avg,
475	496	struct perf_stat_output_ctx *out,
476		− struct runtime_stat *st)
	497	+ struct runtime_stat *st,
	498	+ struct runtime_stat_data *rsd)
477	499	{
478	500	double total, ratio = 0.0;
479	501	const char *color;
480		− int ctx = evsel_context(evsel);
481	502
482		− total = runtime_stat_avg(st, STAT_CYCLES, ctx, cpu);
	503	+ total = runtime_stat_avg(st, STAT_CYCLES, cpu, rsd);
483	504
484	505	if (total)
485	506	ratio = avg / total * 100.0;
@@ -490,17 +511,15 @@ static void print_stalled_cycles_backend(struct perf_stat_config *config, · 4 unmodified lines
490	511	}
491	512
492	513	static void print_branch_misses(struct perf_stat_config *config,
493		− int cpu,
494		− struct evsel *evsel,
495		− double avg,
	514	+ int cpu, double avg,
496	515	struct perf_stat_output_ctx *out,
497		− struct runtime_stat *st)
	516	+ struct runtime_stat *st,
	517	+ struct runtime_stat_data *rsd)
498	518	{
499	519	double total, ratio = 0.0;
500	520	const char *color;
501		− int ctx = evsel_context(evsel);
502	521
503		− total = runtime_stat_avg(st, STAT_BRANCHES, ctx, cpu);
	522	+ total = runtime_stat_avg(st, STAT_BRANCHES, cpu, rsd);
504	523
505	524	if (total)
506	525	ratio = avg / total * 100.0;
@@ -511,18 +530,15 @@ static void print_branch_misses(struct perf_stat_config *config, · 4 unmodified lines
511	530	}
512	531
513	532	static void print_l1_dcache_misses(struct perf_stat_config *config,
514		− int cpu,
515		− struct evsel *evsel,
516		− double avg,
	533	+ int cpu, double avg,
517	534	struct perf_stat_output_ctx *out,
518		− struct runtime_stat *st)
519		−
	535	+ struct runtime_stat *st,
	536	+ struct runtime_stat_data *rsd)
520	537	{
521	538	double total, ratio = 0.0;
522	539	const char *color;
523		− int ctx = evsel_context(evsel);
524	540
525		− total = runtime_stat_avg(st, STAT_L1_DCACHE, ctx, cpu);
	541	+ total = runtime_stat_avg(st, STAT_L1_DCACHE, cpu, rsd);
526	542
527	543	if (total)
528	544	ratio = avg / total * 100.0;
@@ -533,18 +549,15 @@ static void print_l1_dcache_misses(struct perf_stat_config *config, · 4 unmodified lines
533	549	}
534	550
535	551	static void print_l1_icache_misses(struct perf_stat_config *config,
536		− int cpu,
537		− struct evsel *evsel,
538		− double avg,
	552	+ int cpu, double avg,
539	553	struct perf_stat_output_ctx *out,
540		− struct runtime_stat *st)
541		−
	554	+ struct runtime_stat *st,
	555	+ struct runtime_stat_data *rsd)
542	556	{
543	557	double total, ratio = 0.0;
544	558	const char *color;
545		− int ctx = evsel_context(evsel);
546	559
547		− total = runtime_stat_avg(st, STAT_L1_ICACHE, ctx, cpu);
	560	+ total = runtime_stat_avg(st, STAT_L1_ICACHE, cpu, rsd);
548	561
549	562	if (total)
550	563	ratio = avg / total * 100.0;
@@ -554,17 +567,15 @@ static void print_l1_icache_misses(struct perf_stat_config *config, · 3 unmodified lines
554	567	}
555	568
556	569	static void print_dtlb_cache_misses(struct perf_stat_config *config,
557		− int cpu,
558		− struct evsel *evsel,
559		− double avg,
	570	+ int cpu, double avg,
560	571	struct perf_stat_output_ctx *out,
561		− struct runtime_stat *st)
	572	+ struct runtime_stat *st,
	573	+ struct runtime_stat_data *rsd)
562	574	{
563	575	double total, ratio = 0.0;
564	576	const char *color;
565		− int ctx = evsel_context(evsel);
566	577
567		− total = runtime_stat_avg(st, STAT_DTLB_CACHE, ctx, cpu);
	578	+ total = runtime_stat_avg(st, STAT_DTLB_CACHE, cpu, rsd);
568	579
569	580	if (total)
570	581	ratio = avg / total * 100.0;
@@ -574,17 +585,15 @@ static void print_dtlb_cache_misses(struct perf_stat_config *config, · 3 unmodified lines
574	585	}
575	586
576	587	static void print_itlb_cache_misses(struct perf_stat_config *config,
577		− int cpu,
578		− struct evsel *evsel,
579		− double avg,
	588	+ int cpu, double avg,
580	589	struct perf_stat_output_ctx *out,
581		− struct runtime_stat *st)
	590	+ struct runtime_stat *st,
	591	+ struct runtime_stat_data *rsd)
582	592	{
583	593	double total, ratio = 0.0;
584	594	const char *color;
585		− int ctx = evsel_context(evsel);
586	595
587		− total = runtime_stat_avg(st, STAT_ITLB_CACHE, ctx, cpu);
	596	+ total = runtime_stat_avg(st, STAT_ITLB_CACHE, cpu, rsd);
588	597
589	598	if (total)
590	599	ratio = avg / total * 100.0;
@@ -594,17 +603,15 @@ static void print_itlb_cache_misses(struct perf_stat_config *config, · 3 unmodified lines
594	603	}
595	604
596	605	static void print_ll_cache_misses(struct perf_stat_config *config,
597		− int cpu,
598		− struct evsel *evsel,
599		− double avg,
	606	+ int cpu, double avg,
600	607	struct perf_stat_output_ctx *out,
601		− struct runtime_stat *st)
	608	+ struct runtime_stat *st,
	609	+ struct runtime_stat_data *rsd)
602	610	{
603	611	double total, ratio = 0.0;
604	612	const char *color;
605		− int ctx = evsel_context(evsel);
606	613
607		− total = runtime_stat_avg(st, STAT_LL_CACHE, ctx, cpu);
	614	+ total = runtime_stat_avg(st, STAT_LL_CACHE, cpu, rsd);
608	615
609	616	if (total)
610	617	ratio = avg / total * 100.0;
@@ -662,56 +669,61 @@ static double sanitize_val(double x) · 51 unmodified lines
662	669	return x;
663	670	}
664	671
665		−static double td_total_slots(int ctx, int cpu, struct runtime_stat *st)
	672	+static double td_total_slots(int cpu, struct runtime_stat *st,
	673	+ struct runtime_stat_data *rsd)
666	674	{
667		− return runtime_stat_avg(st, STAT_TOPDOWN_TOTAL_SLOTS, ctx, cpu);
	675	+ return runtime_stat_avg(st, STAT_TOPDOWN_TOTAL_SLOTS, cpu, rsd);
668	676	}
669	677
670		−static double td_bad_spec(int ctx, int cpu, struct runtime_stat *st)
	678	+static double td_bad_spec(int cpu, struct runtime_stat *st,
	679	+ struct runtime_stat_data *rsd)
671	680	{
672	681	double bad_spec = 0;
673	682	double total_slots;
674	683	double total;
675	684
676		− total = runtime_stat_avg(st, STAT_TOPDOWN_SLOTS_ISSUED, ctx, cpu) -
677		− runtime_stat_avg(st, STAT_TOPDOWN_SLOTS_RETIRED, ctx, cpu) +
678		− runtime_stat_avg(st, STAT_TOPDOWN_RECOVERY_BUBBLES, ctx, cpu);
	685	+ total = runtime_stat_avg(st, STAT_TOPDOWN_SLOTS_ISSUED, cpu, rsd) -
	686	+ runtime_stat_avg(st, STAT_TOPDOWN_SLOTS_RETIRED, cpu, rsd) +
	687	+ runtime_stat_avg(st, STAT_TOPDOWN_RECOVERY_BUBBLES, cpu, rsd);
679	688
680		− total_slots = td_total_slots(ctx, cpu, st);
	689	+ total_slots = td_total_slots(cpu, st, rsd);
681	690	if (total_slots)
682	691	bad_spec = total / total_slots;
683	692	return sanitize_val(bad_spec);
684	693	}
685	694
686		−static double td_retiring(int ctx, int cpu, struct runtime_stat *st)
	695	+static double td_retiring(int cpu, struct runtime_stat *st,
	696	+ struct runtime_stat_data *rsd)
687	697	{
688	698	double retiring = 0;
689		− double total_slots = td_total_slots(ctx, cpu, st);
	699	+ double total_slots = td_total_slots(cpu, st, rsd);
690	700	double ret_slots = runtime_stat_avg(st, STAT_TOPDOWN_SLOTS_RETIRED,
691		− ctx, cpu);
	701	+ cpu, rsd);
692	702
693	703	if (total_slots)
694	704	retiring = ret_slots / total_slots;
695	705	return retiring;
696	706	}
697	707
698		−static double td_fe_bound(int ctx, int cpu, struct runtime_stat *st)
	708	+static double td_fe_bound(int cpu, struct runtime_stat *st,
	709	+ struct runtime_stat_data *rsd)
699	710	{
700	711	double fe_bound = 0;
701		− double total_slots = td_total_slots(ctx, cpu, st);
	712	+ double total_slots = td_total_slots(cpu, st, rsd);
702	713	double fetch_bub = runtime_stat_avg(st, STAT_TOPDOWN_FETCH_BUBBLES,
703		− ctx, cpu);
	714	+ cpu, rsd);
704	715
705	716	if (total_slots)
706	717	fe_bound = fetch_bub / total_slots;
707	718	return fe_bound;
708	719	}
709	720
710		−static double td_be_bound(int ctx, int cpu, struct runtime_stat *st)
	721	+static double td_be_bound(int cpu, struct runtime_stat *st,
	722	+ struct runtime_stat_data *rsd)
711	723	{
712		− double sum = (td_fe_bound(ctx, cpu, st) +
713		− td_bad_spec(ctx, cpu, st) +
714		− td_retiring(ctx, cpu, st));
	724	+ double sum = (td_fe_bound(cpu, st, rsd) +
	725	+ td_bad_spec(cpu, st, rsd) +
	726	+ td_retiring(cpu, st, rsd));
715	727	if (sum == 0)
716	728	return 0;
717	729	return sanitize_val(1.0 - sum);
@@ -722,15 +734,15 @@ static double td_be_bound(int ctx, int cpu, struct runtime_stat *st) · 4 unmodified lines
722	734	* the ratios we need to recreate the sum.
723	735	*/
724	736
725		−static double td_metric_ratio(int ctx, int cpu,
726		− enum stat_type type,
727		− struct runtime_stat *stat)
	737	+static double td_metric_ratio(int cpu, enum stat_type type,
	738	+ struct runtime_stat *stat,
	739	+ struct runtime_stat_data *rsd)
728	740	{
729		− double sum = runtime_stat_avg(stat, STAT_TOPDOWN_RETIRING, ctx, cpu) +
730		− runtime_stat_avg(stat, STAT_TOPDOWN_FE_BOUND, ctx, cpu) +
731		− runtime_stat_avg(stat, STAT_TOPDOWN_BE_BOUND, ctx, cpu) +
732		− runtime_stat_avg(stat, STAT_TOPDOWN_BAD_SPEC, ctx, cpu);
733		− double d = runtime_stat_avg(stat, type, ctx, cpu);
	741	+ double sum = runtime_stat_avg(stat, STAT_TOPDOWN_RETIRING, cpu, rsd) +
	742	+ runtime_stat_avg(stat, STAT_TOPDOWN_FE_BOUND, cpu, rsd) +
	743	+ runtime_stat_avg(stat, STAT_TOPDOWN_BE_BOUND, cpu, rsd) +
	744	+ runtime_stat_avg(stat, STAT_TOPDOWN_BAD_SPEC, cpu, rsd);
	745	+ double d = runtime_stat_avg(stat, type, cpu, rsd);
734	746
735	747	if (sum)
736	748	return d / sum;
@@ -742,34 +754,33 @@ static double td_metric_ratio(int ctx, int cpu, · 5 unmodified lines
742	754	* We allow two missing.
743	755	*/
744	756
745		−static bool full_td(int ctx, int cpu,
746		− struct runtime_stat *stat)
	757	+static bool full_td(int cpu, struct runtime_stat *stat,
	758	+ struct runtime_stat_data *rsd)
747	759	{
748	760	int c = 0;
749	761
750		− if (runtime_stat_avg(stat, STAT_TOPDOWN_RETIRING, ctx, cpu) > 0)
	762	+ if (runtime_stat_avg(stat, STAT_TOPDOWN_RETIRING, cpu, rsd) > 0)
751	763	c++;
752		− if (runtime_stat_avg(stat, STAT_TOPDOWN_BE_BOUND, ctx, cpu) > 0)
	764	+ if (runtime_stat_avg(stat, STAT_TOPDOWN_BE_BOUND, cpu, rsd) > 0)
753	765	c++;
754		− if (runtime_stat_avg(stat, STAT_TOPDOWN_FE_BOUND, ctx, cpu) > 0)
	766	+ if (runtime_stat_avg(stat, STAT_TOPDOWN_FE_BOUND, cpu, rsd) > 0)
755	767	c++;
756		− if (runtime_stat_avg(stat, STAT_TOPDOWN_BAD_SPEC, ctx, cpu) > 0)
	768	+ if (runtime_stat_avg(stat, STAT_TOPDOWN_BAD_SPEC, cpu, rsd) > 0)
757	769	c++;
758	770	return c >= 2;
759	771	}
760	772
761		−static void print_smi_cost(struct perf_stat_config *config,
762		− int cpu, struct evsel *evsel,
	773	+static void print_smi_cost(struct perf_stat_config *config, int cpu,
763	774	struct perf_stat_output_ctx *out,
764		− struct runtime_stat *st)
	775	+ struct runtime_stat *st,
	776	+ struct runtime_stat_data *rsd)
765	777	{
766	778	double smi_num, aperf, cycles, cost = 0.0;
767		− int ctx = evsel_context(evsel);
768	779	const char *color = NULL;
769	780
770		− smi_num = runtime_stat_avg(st, STAT_SMI_NUM, ctx, cpu);
771		− aperf = runtime_stat_avg(st, STAT_APERF, ctx, cpu);
772		− cycles = runtime_stat_avg(st, STAT_CYCLES, ctx, cpu);
	781	+ smi_num = runtime_stat_avg(st, STAT_SMI_NUM, cpu, rsd);
	782	+ aperf = runtime_stat_avg(st, STAT_APERF, cpu, rsd);
	783	+ cycles = runtime_stat_avg(st, STAT_CYCLES, cpu, rsd);
773	784
774	785	if ((cycles == 0) \|\| (aperf == 0))
775	786	return;
@@ -804,7 +815,8 @@ static int prepare_metric(struct evsel **metric_events, · 28 unmodified lines
804	815	scale = 1e-9;
805	816	} else {
806	817	v = saved_value_lookup(metric_events[i], cpu, false,
807		− STAT_NONE, 0, st);
	818	+ STAT_NONE, 0, st,
	819	+ metric_events[i]->cgrp);
808	820	if (!v)
809	821	break;
810	822	stats = &v->stats;
@@ -930,12 +942,15 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, · 119 unmodified lines
930	942	print_metric_t print_metric = out->print_metric;
931	943	double total, ratio = 0.0, total2;
932	944	const char *color = NULL;
933		− int ctx = evsel_context(evsel);
	945	+ struct runtime_stat_data rsd = {
	946	+ .ctx = evsel_context(evsel),
	947	+ .cgrp = evsel->cgrp,
	948	+ };
934	949	struct metric_event *me;
935	950	int num = 1;
936	951
937	952	if (evsel__match(evsel, HARDWARE, HW_INSTRUCTIONS)) {
938		− total = runtime_stat_avg(st, STAT_CYCLES, ctx, cpu);
	953	+ total = runtime_stat_avg(st, STAT_CYCLES, cpu, &rsd);
939	954
940	955	if (total) {
941	956	ratio = avg / total;
@@ -945,12 +960,11 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, · 3 unmodified lines
945	960	print_metric(config, ctxp, NULL, NULL, "insn per cycle", 0);
946	961	}
947	962
948		− total = runtime_stat_avg(st, STAT_STALLED_CYCLES_FRONT,
949		− ctx, cpu);
	963	+ total = runtime_stat_avg(st, STAT_STALLED_CYCLES_FRONT, cpu, &rsd);
950	964
951	965	total = max(total, runtime_stat_avg(st,
952	966	STAT_STALLED_CYCLES_BACK,
953		− ctx, cpu));
	967	+ cpu, &rsd));
954	968
955	969	if (total && avg) {
956	970	out->new_line(config, ctxp);
@@ -960,8 +974,8 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, · 3 unmodified lines
960	974	ratio);
961	975	}
962	976	} else if (evsel__match(evsel, HARDWARE, HW_BRANCH_MISSES)) {
963		− if (runtime_stat_n(st, STAT_BRANCHES, ctx, cpu) != 0)
964		− print_branch_misses(config, cpu, evsel, avg, out, st);
	977	+ if (runtime_stat_n(st, STAT_BRANCHES, cpu, &rsd) != 0)
	978	+ print_branch_misses(config, cpu, avg, out, st, &rsd);
965	979	else
966	980	print_metric(config, ctxp, NULL, NULL, "of all branches", 0);
967	981	} else if (
@@ -970,8 +984,8 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, · 2 unmodified lines
970	984	((PERF_COUNT_HW_CACHE_OP_READ) << 8) \|
971	985	((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))) {
972	986
973		− if (runtime_stat_n(st, STAT_L1_DCACHE, ctx, cpu) != 0)
974		− print_l1_dcache_misses(config, cpu, evsel, avg, out, st);
	987	+ if (runtime_stat_n(st, STAT_L1_DCACHE, cpu, &rsd) != 0)
	988	+ print_l1_dcache_misses(config, cpu, avg, out, st, &rsd);
975	989	else
976	990	print_metric(config, ctxp, NULL, NULL, "of all L1-dcache accesses", 0);
977	991	} else if (
@@ -980,8 +994,8 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, · 2 unmodified lines
980	994	((PERF_COUNT_HW_CACHE_OP_READ) << 8) \|
981	995	((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))) {
982	996
983		− if (runtime_stat_n(st, STAT_L1_ICACHE, ctx, cpu) != 0)
984		− print_l1_icache_misses(config, cpu, evsel, avg, out, st);
	997	+ if (runtime_stat_n(st, STAT_L1_ICACHE, cpu, &rsd) != 0)
	998	+ print_l1_icache_misses(config, cpu, avg, out, st, &rsd);
985	999	else
986	1000	print_metric(config, ctxp, NULL, NULL, "of all L1-icache accesses", 0);
987	1001	} else if (
@@ -990,8 +1004,8 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, · 2 unmodified lines
990	1004	((PERF_COUNT_HW_CACHE_OP_READ) << 8) \|
991	1005	((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))) {
992	1006
993		− if (runtime_stat_n(st, STAT_DTLB_CACHE, ctx, cpu) != 0)
994		− print_dtlb_cache_misses(config, cpu, evsel, avg, out, st);
	1007	+ if (runtime_stat_n(st, STAT_DTLB_CACHE, cpu, &rsd) != 0)
	1008	+ print_dtlb_cache_misses(config, cpu, avg, out, st, &rsd);
995	1009	else
996	1010	print_metric(config, ctxp, NULL, NULL, "of all dTLB cache accesses", 0);
997	1011	} else if (
@@ -1000,8 +1014,8 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, · 2 unmodified lines
1000	1014	((PERF_COUNT_HW_CACHE_OP_READ) << 8) \|
1001	1015	((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))) {
1002	1016
1003		− if (runtime_stat_n(st, STAT_ITLB_CACHE, ctx, cpu) != 0)
1004		− print_itlb_cache_misses(config, cpu, evsel, avg, out, st);
	1017	+ if (runtime_stat_n(st, STAT_ITLB_CACHE, cpu, &rsd) != 0)
	1018	+ print_itlb_cache_misses(config, cpu, avg, out, st, &rsd);
1005	1019	else
1006	1020	print_metric(config, ctxp, NULL, NULL, "of all iTLB cache accesses", 0);
1007	1021	} else if (
@@ -1010,27 +1024,27 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, · 2 unmodified lines
1010	1024	((PERF_COUNT_HW_CACHE_OP_READ) << 8) \|
1011	1025	((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))) {
1012	1026
1013		− if (runtime_stat_n(st, STAT_LL_CACHE, ctx, cpu) != 0)
1014		− print_ll_cache_misses(config, cpu, evsel, avg, out, st);
	1027	+ if (runtime_stat_n(st, STAT_LL_CACHE, cpu, &rsd) != 0)
	1028	+ print_ll_cache_misses(config, cpu, avg, out, st, &rsd);
1015	1029	else
1016	1030	print_metric(config, ctxp, NULL, NULL, "of all LL-cache accesses", 0);
1017	1031	} else if (evsel__match(evsel, HARDWARE, HW_CACHE_MISSES)) {
1018		− total = runtime_stat_avg(st, STAT_CACHEREFS, ctx, cpu);
	1032	+ total = runtime_stat_avg(st, STAT_CACHEREFS, cpu, &rsd);
1019	1033
1020	1034	if (total)
1021	1035	ratio = avg * 100 / total;
1022	1036
1023		− if (runtime_stat_n(st, STAT_CACHEREFS, ctx, cpu) != 0)
	1037	+ if (runtime_stat_n(st, STAT_CACHEREFS, cpu, &rsd) != 0)
1024	1038	print_metric(config, ctxp, NULL, "%8.3f %%",
1025	1039	"of all cache refs", ratio);
1026	1040	else
1027	1041	print_metric(config, ctxp, NULL, NULL, "of all cache refs", 0);
1028	1042	} else if (evsel__match(evsel, HARDWARE, HW_STALLED_CYCLES_FRONTEND)) {
1029		− print_stalled_cycles_frontend(config, cpu, evsel, avg, out, st);
	1043	+ print_stalled_cycles_frontend(config, cpu, avg, out, st, &rsd);
1030	1044	} else if (evsel__match(evsel, HARDWARE, HW_STALLED_CYCLES_BACKEND)) {
1031		− print_stalled_cycles_backend(config, cpu, evsel, avg, out, st);
	1045	+ print_stalled_cycles_backend(config, cpu, avg, out, st, &rsd);
1032	1046	} else if (evsel__match(evsel, HARDWARE, HW_CPU_CYCLES)) {
1033		− total = runtime_stat_avg(st, STAT_NSECS, 0, cpu);
	1047	+ total = runtime_stat_avg(st, STAT_NSECS, cpu, &rsd);
1034	1048
1035	1049	if (total) {
1036	1050	ratio = avg / total;
@@ -1039,7 +1053,7 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, · 2 unmodified lines
1039	1053	print_metric(config, ctxp, NULL, NULL, "Ghz", 0);
1040	1054	}
1041	1055	} else if (perf_stat_evsel__is(evsel, CYCLES_IN_TX)) {
1042		− total = runtime_stat_avg(st, STAT_CYCLES, ctx, cpu);
	1056	+ total = runtime_stat_avg(st, STAT_CYCLES, cpu, &rsd);
1043	1057
1044	1058	if (total)
1045	1059	print_metric(config, ctxp, NULL,
@@ -1049,8 +1063,8 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, · 3 unmodified lines
1049	1063	print_metric(config, ctxp, NULL, NULL, "transactional cycles",
1050	1064	0);
1051	1065	} else if (perf_stat_evsel__is(evsel, CYCLES_IN_TX_CP)) {
1052		− total = runtime_stat_avg(st, STAT_CYCLES, ctx, cpu);
1053		− total2 = runtime_stat_avg(st, STAT_CYCLES_IN_TX, ctx, cpu);
	1066	+ total = runtime_stat_avg(st, STAT_CYCLES, cpu, &rsd);
	1067	+ total2 = runtime_stat_avg(st, STAT_CYCLES_IN_TX, cpu, &rsd);
1054	1068
1055	1069	if (total2 < avg)
1056	1070	total2 = avg;
@@ -1060,21 +1074,19 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, · 3 unmodified lines
1060	1074	else
1061	1075	print_metric(config, ctxp, NULL, NULL, "aborted cycles", 0);
1062	1076	} else if (perf_stat_evsel__is(evsel, TRANSACTION_START)) {
1063		− total = runtime_stat_avg(st, STAT_CYCLES_IN_TX,
1064		− ctx, cpu);
	1077	+ total = runtime_stat_avg(st, STAT_CYCLES_IN_TX, cpu, &rsd);
1065	1078
1066	1079	if (avg)
1067	1080	ratio = total / avg;
1068	1081
1069		− if (runtime_stat_n(st, STAT_CYCLES_IN_TX, ctx, cpu) != 0)
	1082	+ if (runtime_stat_n(st, STAT_CYCLES_IN_TX, cpu, &rsd) != 0)
1070	1083	print_metric(config, ctxp, NULL, "%8.0f",
1071	1084	"cycles / transaction", ratio);
1072	1085	else
1073	1086	print_metric(config, ctxp, NULL, NULL, "cycles / transaction",
1074	1087	0);
1075	1088	} else if (perf_stat_evsel__is(evsel, ELISION_START)) {
1076		− total = runtime_stat_avg(st, STAT_CYCLES_IN_TX,
1077		− ctx, cpu);
	1089	+ total = runtime_stat_avg(st, STAT_CYCLES_IN_TX, cpu, &rsd);
1078	1090
1079	1091	if (avg)
1080	1092	ratio = total / avg;
@@ -1087,28 +1099,28 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, · 6 unmodified lines
1087	1099	else
1088	1100	print_metric(config, ctxp, NULL, NULL, "CPUs utilized", 0);
1089	1101	} else if (perf_stat_evsel__is(evsel, TOPDOWN_FETCH_BUBBLES)) {
1090		− double fe_bound = td_fe_bound(ctx, cpu, st);
	1102	+ double fe_bound = td_fe_bound(cpu, st, &rsd);
1091	1103
1092	1104	if (fe_bound > 0.2)
1093	1105	color = PERF_COLOR_RED;
1094	1106	print_metric(config, ctxp, color, "%8.1f%%", "frontend bound",
1095	1107	fe_bound * 100.);
1096	1108	} else if (perf_stat_evsel__is(evsel, TOPDOWN_SLOTS_RETIRED)) {
1097		− double retiring = td_retiring(ctx, cpu, st);
	1109	+ double retiring = td_retiring(cpu, st, &rsd);
1098	1110
1099	1111	if (retiring > 0.7)
1100	1112	color = PERF_COLOR_GREEN;
1101	1113	print_metric(config, ctxp, color, "%8.1f%%", "retiring",
1102	1114	retiring * 100.);
1103	1115	} else if (perf_stat_evsel__is(evsel, TOPDOWN_RECOVERY_BUBBLES)) {
1104		− double bad_spec = td_bad_spec(ctx, cpu, st);
	1116	+ double bad_spec = td_bad_spec(cpu, st, &rsd);
1105	1117
1106	1118	if (bad_spec > 0.1)
1107	1119	color = PERF_COLOR_RED;
1108	1120	print_metric(config, ctxp, color, "%8.1f%%", "bad speculation",
1109	1121	bad_spec * 100.);
1110	1122	} else if (perf_stat_evsel__is(evsel, TOPDOWN_SLOTS_ISSUED)) {
1111		− double be_bound = td_be_bound(ctx, cpu, st);
	1123	+ double be_bound = td_be_bound(cpu, st, &rsd);
1112	1124	const char *name = "backend bound";
1113	1125	static int have_recovery_bubbles = -1;
1114	1126
@@ -1121,43 +1133,43 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, · 6 unmodified lines
1121	1133
1122	1134	if (be_bound > 0.2)
1123	1135	color = PERF_COLOR_RED;
1124		− if (td_total_slots(ctx, cpu, st) > 0)
	1136	+ if (td_total_slots(cpu, st, &rsd) > 0)
1125	1137	print_metric(config, ctxp, color, "%8.1f%%", name,
1126	1138	be_bound * 100.);
1127	1139	else
1128	1140	print_metric(config, ctxp, NULL, NULL, name, 0);
1129	1141	} else if (perf_stat_evsel__is(evsel, TOPDOWN_RETIRING) &&
1130		− full_td(ctx, cpu, st)) {
1131		− double retiring = td_metric_ratio(ctx, cpu,
1132		− STAT_TOPDOWN_RETIRING, st);
1133		−
	1142	+ full_td(cpu, st, &rsd)) {
	1143	+ double retiring = td_metric_ratio(cpu,
	1144	+ STAT_TOPDOWN_RETIRING, st,
	1145	+ &rsd);
1134	1146	if (retiring > 0.7)
1135	1147	color = PERF_COLOR_GREEN;
1136	1148	print_metric(config, ctxp, color, "%8.1f%%", "retiring",
1137	1149	retiring * 100.);
1138	1150	} else if (perf_stat_evsel__is(evsel, TOPDOWN_FE_BOUND) &&
1139		− full_td(ctx, cpu, st)) {
1140		− double fe_bound = td_metric_ratio(ctx, cpu,
1141		− STAT_TOPDOWN_FE_BOUND, st);
1142		−
	1151	+ full_td(cpu, st, &rsd)) {
	1152	+ double fe_bound = td_metric_ratio(cpu,
	1153	+ STAT_TOPDOWN_FE_BOUND, st,
	1154	+ &rsd);
1143	1155	if (fe_bound > 0.2)
1144	1156	color = PERF_COLOR_RED;
1145	1157	print_metric(config, ctxp, color, "%8.1f%%", "frontend bound",
1146	1158	fe_bound * 100.);
1147	1159	} else if (perf_stat_evsel__is(evsel, TOPDOWN_BE_BOUND) &&
1148		− full_td(ctx, cpu, st)) {
1149		− double be_bound = td_metric_ratio(ctx, cpu,
1150		− STAT_TOPDOWN_BE_BOUND, st);
1151		−
	1160	+ full_td(cpu, st, &rsd)) {
	1161	+ double be_bound = td_metric_ratio(cpu,
	1162	+ STAT_TOPDOWN_BE_BOUND, st,
	1163	+ &rsd);
1152	1164	if (be_bound > 0.2)
1153	1165	color = PERF_COLOR_RED;
1154	1166	print_metric(config, ctxp, color, "%8.1f%%", "backend bound",
1155	1167	be_bound * 100.);
1156	1168	} else if (perf_stat_evsel__is(evsel, TOPDOWN_BAD_SPEC) &&
1157		− full_td(ctx, cpu, st)) {
1158		− double bad_spec = td_metric_ratio(ctx, cpu,
1159		− STAT_TOPDOWN_BAD_SPEC, st);
1160		−
	1169	+ full_td(cpu, st, &rsd)) {
	1170	+ double bad_spec = td_metric_ratio(cpu,
	1171	+ STAT_TOPDOWN_BAD_SPEC, st,
	1172	+ &rsd);
1161	1173	if (bad_spec > 0.1)
1162	1174	color = PERF_COLOR_RED;
1163	1175	print_metric(config, ctxp, color, "%8.1f%%", "bad speculation",
@@ -1165,11 +1177,11 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, · 1 unmodified line
1165	1177	} else if (evsel->metric_expr) {
1166	1178	generic_metric(config, evsel->metric_expr, evsel->metric_events, NULL,
1167	1179	evsel->name, evsel->metric_name, NULL, 1, cpu, out, st);
1168		− } else if (runtime_stat_n(st, STAT_NSECS, 0, cpu) != 0) {
	1180	+ } else if (runtime_stat_n(st, STAT_NSECS, cpu, &rsd) != 0) {
1169	1181	char unit = 'M';
1170	1182	char unit_buf[10];
1171	1183
1172		− total = runtime_stat_avg(st, STAT_NSECS, 0, cpu);
	1184	+ total = runtime_stat_avg(st, STAT_NSECS, cpu, &rsd);
1173	1185
1174	1186	if (total)
1175	1187	ratio = 1000.0 * avg / total;
@@ -1180,7 +1192,7 @@ void perf_stat__print_shadow_stats(struct perf_stat_config *config, · 4 unmodified lines
1180	1192	snprintf(unit_buf, sizeof(unit_buf), "%c/sec", unit);
1181	1193	print_metric(config, ctxp, NULL, "%8.3f", unit_buf, ratio);
1182	1194	} else if (perf_stat_evsel__is(evsel, SMI_NUM)) {
1183		− print_smi_cost(config, cpu, evsel, out, st);
	1195	+ print_smi_cost(config, cpu, out, st, &rsd);
1184	1196	} else {
1185	1197	num = 0;
1186	1198	}

tools/testing/selftests/arm64/fp/fpsimd-test.S+1−1

@@ -457,7 +457,7 @@ function barf · 456 unmodified lines
457	457	mov x11, x1 // actual data
458	458	mov x12, x2 // data size
459	459
460		− puts "Mistatch: PID="
	460	+ puts "Mismatch: PID="
461	461	mov x0, x20
462	462	bl putdec
463	463	puts ", iteration="

tools/testing/selftests/arm64/fp/sve-test.S+1−1

@@ -625,7 +625,7 @@ function barf · 624 unmodified lines
625	625	mov x11, x1 // actual data
626	626	mov x12, x2 // data size
627	627
628		− puts "Mistatch: PID="
	628	+ puts "Mismatch: PID="
629	629	mov x0, x20
630	630	bl putdec
631	631	puts ", iteration="

tools/testing/selftests/bpf/prog_tests/test_local_storage.c+26−70

@@ -34,61 +34,6 @@ struct storage { · 33 unmodified lines
34	34	struct bpf_spin_lock lock;
35	35	};
36	36
37		−/* Copies an rm binary to a temp file. dest is a mkstemp template */
38		−static int copy_rm(char *dest)
39		−{
40		− int fd_in, fd_out = -1, ret = 0;
41		− struct stat stat;
42		− char *buf = NULL;
43		−
44		− fd_in = open("/bin/rm", O_RDONLY);
45		− if (fd_in < 0)
46		− return -errno;
47		−
48		− fd_out = mkstemp(dest);
49		− if (fd_out < 0) {
50		− ret = -errno;
51		− goto out;
52		− }
53		−
54		− ret = fstat(fd_in, &stat);
55		− if (ret == -1) {
56		− ret = -errno;
57		− goto out;
58		− }
59		−
60		− buf = malloc(stat.st_blksize);
61		− if (!buf) {
62		− ret = -errno;
63		− goto out;
64		− }
65		−
66		− while (ret = read(fd_in, buf, stat.st_blksize), ret > 0) {
67		− ret = write(fd_out, buf, ret);
68		− if (ret < 0) {
69		− ret = -errno;
70		− goto out;
71		−
72		− }
73		− }
74		− if (ret < 0) {
75		− ret = -errno;
76		− goto out;
77		−
78		− }
79		−
80		− /* Set executable permission on the copied file */
81		− ret = chmod(dest, 0100);
82		− if (ret == -1)
83		− ret = -errno;
84		−
85		−out:
86		− free(buf);
87		− close(fd_in);
88		− close(fd_out);
89		− return ret;
90		−}
91		−
92	37	/* Fork and exec the provided rm binary and return the exit code of the
93	38	* forked process and its pid.
94	39	*/
@@ -168,9 +113,11 @@ static bool check_syscall_operations(int map_fd, int obj_fd) · 73 unmodified lines
168	113
169	114	void test_test_local_storage(void)
170	115	{
171		− char tmp_exec_path[PATH_MAX] = "/tmp/copy_of_rmXXXXXX";
	116	+ char tmp_dir_path[64] = "/tmp/local_storageXXXXXX";
172	117	int err, serv_sk = -1, task_fd = -1, rm_fd = -1;
173	118	struct local_storage *skel = NULL;
	119	+ char tmp_exec_path[64];
	120	+ char cmd[256];
174	121
175	122	skel = local_storage__open_and_load();
176	123	if (CHECK(!skel, "skel_load", "lsm skeleton failed\n"))
@@ -189,18 +136,24 @@ void test_test_local_storage(void) · 12 unmodified lines
189	136	task_fd))
190	137	goto close_prog;
191	138
192		− err = copy_rm(tmp_exec_path);
193		− if (CHECK(err < 0, "copy_rm", "err %d errno %d\n", err, errno))
	139	+ if (CHECK(!mkdtemp(tmp_dir_path), "mkdtemp",
	140	+ "unable to create tmpdir: %d\n", errno))
194	141	goto close_prog;
195	142
	143	+ snprintf(tmp_exec_path, sizeof(tmp_exec_path), "%s/copy_of_rm",
	144	+ tmp_dir_path);
	145	+ snprintf(cmd, sizeof(cmd), "cp /bin/rm %s", tmp_exec_path);
	146	+ if (CHECK_FAIL(system(cmd)))
	147	+ goto close_prog_rmdir;
	148	+
196	149	rm_fd = open(tmp_exec_path, O_RDONLY);
197	150	if (CHECK(rm_fd < 0, "open", "failed to open %s err:%d, errno:%d",
198	151	tmp_exec_path, rm_fd, errno))
199		− goto close_prog;
	152	+ goto close_prog_rmdir;
200	153
201	154	if (!check_syscall_operations(bpf_map__fd(skel->maps.inode_storage_map),
202	155	rm_fd))
203		− goto close_prog;
	156	+ goto close_prog_rmdir;
204	157
205	158	/* Sets skel->bss->monitored_pid to the pid of the forked child
206	159	* forks a child process that executes tmp_exec_path and tries to
@@ -209,33 +162,36 @@ void test_test_local_storage(void) · 2 unmodified lines
209	162	*/
210	163	err = run_self_unlink(&skel->bss->monitored_pid, tmp_exec_path);
211	164	if (CHECK(err != EPERM, "run_self_unlink", "err %d want EPERM\n", err))
212		− goto close_prog_unlink;
	165	+ goto close_prog_rmdir;
213	166
214	167	/* Set the process being monitored to be the current process */
215	168	skel->bss->monitored_pid = getpid();
216	169
217		− /* Remove the temporary created executable */
218		− err = unlink(tmp_exec_path);
219		− if (CHECK(err != 0, "unlink", "unable to unlink %s: %d", tmp_exec_path,
220		− errno))
221		− goto close_prog_unlink;
	170	+ /* Move copy_of_rm to a new location so that it triggers the
	171	+ * inode_rename LSM hook with a new_dentry that has a NULL inode ptr.
	172	+ */
	173	+ snprintf(cmd, sizeof(cmd), "mv %s/copy_of_rm %s/check_null_ptr",
	174	+ tmp_dir_path, tmp_dir_path);
	175	+ if (CHECK_FAIL(system(cmd)))
	176	+ goto close_prog_rmdir;
222	177
223	178	CHECK(skel->data->inode_storage_result != 0, "inode_storage_result",
224	179	"inode_local_storage not set\n");
225	180
226	181	serv_sk = start_server(AF_INET6, SOCK_STREAM, NULL, 0, 0);
227	182	if (CHECK(serv_sk < 0, "start_server", "failed to start server\n"))
228		− goto close_prog;
	183	+ goto close_prog_rmdir;
229	184
230	185	CHECK(skel->data->sk_storage_result != 0, "sk_storage_result",
231	186	"sk_local_storage not set\n");
232	187
233	188	if (!check_syscall_operations(bpf_map__fd(skel->maps.sk_storage_map),
234	189	serv_sk))
235		− goto close_prog;
	190	+ goto close_prog_rmdir;
236	191
237		−close_prog_unlink:
238		− unlink(tmp_exec_path);
	192	+close_prog_rmdir:
	193	+ snprintf(cmd, sizeof(cmd), "rm -rf %s", tmp_dir_path);
	194	+ system(cmd);
239	195	close_prog:
240	196	close(serv_sk);
241	197	close(rm_fd);

tools/testing/selftests/bpf/progs/local_storage.c+35−27

@@ -50,7 +50,6 @@ int BPF_PROG(unlink_hook, struct inode dir, struct dentry victim) · 49 unmodified lines
50	50	__u32 pid = bpf_get_current_pid_tgid() >> 32;
51	51	struct local_storage *storage;
52	52	bool is_self_unlink;
53		− int err;
54	53
55	54	if (pid != monitored_pid)
56	55	return 0;
@@ -66,8 +65,27 @@ int BPF_PROG(unlink_hook, struct inode dir, struct dentry victim) · 9 unmodified lines
66	65	return -EPERM;
67	66	}
68	67
69		− storage = bpf_inode_storage_get(&inode_storage_map, victim->d_inode, 0,
70		− BPF_LOCAL_STORAGE_GET_F_CREATE);
	68	+ return 0;
	69	+}
	70	+
	71	+SEC("lsm/inode_rename")
	72	+int BPF_PROG(inode_rename, struct inode old_dir, struct dentry old_dentry,
	73	+ struct inode new_dir, struct dentry new_dentry,
	74	+ unsigned int flags)
	75	+{
	76	+ __u32 pid = bpf_get_current_pid_tgid() >> 32;
	77	+ struct local_storage *storage;
	78	+ int err;
	79	+
	80	+ /* new_dentry->d_inode can be NULL when the inode is renamed to a file
	81	+ * that did not exist before. The helper should be able to handle this
	82	+ * NULL pointer.
	83	+ */
	84	+ bpf_inode_storage_get(&inode_storage_map, new_dentry->d_inode, 0,
	85	+ BPF_LOCAL_STORAGE_GET_F_CREATE);
	86	+
	87	+ storage = bpf_inode_storage_get(&inode_storage_map, old_dentry->d_inode,
	88	+ 0, 0);
71	89	if (!storage)
72	90	return 0;
73	91
@@ -76,7 +94,7 @@ int BPF_PROG(unlink_hook, struct inode dir, struct dentry victim) · 2 unmodified lines
76	94	inode_storage_result = -1;
77	95	bpf_spin_unlock(&storage->lock);
78	96
79		− err = bpf_inode_storage_delete(&inode_storage_map, victim->d_inode);
	97	+ err = bpf_inode_storage_delete(&inode_storage_map, old_dentry->d_inode);
80	98	if (!err)
81	99	inode_storage_result = err;
82	100
@@ -133,37 +151,18 @@ int BPF_PROG(socket_post_create, struct socket *sock, int family, int type, · 50 unmodified lines
133	151	return 0;
134	152	}
135	153
136		−SEC("lsm/file_open")
137		−int BPF_PROG(file_open, struct file *file)
138		−{
139		− __u32 pid = bpf_get_current_pid_tgid() >> 32;
140		− struct local_storage *storage;
141		−
142		− if (pid != monitored_pid)
143		− return 0;
144		−
145		− if (!file->f_inode)
146		− return 0;
147		−
148		− storage = bpf_inode_storage_get(&inode_storage_map, file->f_inode, 0,
149		− BPF_LOCAL_STORAGE_GET_F_CREATE);
150		− if (!storage)
151		− return 0;
152		−
153		− bpf_spin_lock(&storage->lock);
154		− storage->value = DUMMY_STORAGE_VALUE;
155		− bpf_spin_unlock(&storage->lock);
156		− return 0;
157		−}
158		−
159	154	/* This uses the local storage to remember the inode of the binary that a
160	155	* process was originally executing.
161	156	*/
162	157	SEC("lsm/bprm_committed_creds")
163	158	void BPF_PROG(exec, struct linux_binprm *bprm)
164	159	{
	160	+ __u32 pid = bpf_get_current_pid_tgid() >> 32;
165	161	struct local_storage *storage;
166	162
	163	+ if (pid != monitored_pid)
	164	+ return;
	165	+
167	166	storage = bpf_task_storage_get(&task_storage_map,
168	167	bpf_get_current_task_btf(), 0,
169	168	BPF_LOCAL_STORAGE_GET_F_CREATE);
@@ -172,4 +171,13 @@ void BPF_PROG(exec, struct linux_binprm *bprm) · 2 unmodified lines
172	171	storage->exec_inode = bprm->file->f_inode;
173	172	bpf_spin_unlock(&storage->lock);
174	173	}
	174	+
	175	+ storage = bpf_inode_storage_get(&inode_storage_map, bprm->file->f_inode,
	176	+ 0, BPF_LOCAL_STORAGE_GET_F_CREATE);
	177	+ if (!storage)
	178	+ return;
	179	+
	180	+ bpf_spin_lock(&storage->lock);
	181	+ storage->value = DUMMY_STORAGE_VALUE;
	182	+ bpf_spin_unlock(&storage->lock);
175	183	}

tools/testing/selftests/bpf/test_verifier.c+11−1

@@ -50,7 +50,7 @@ · 49 unmodified lines
50	50	#define MAX_INSNS BPF_MAXINSNS
51	51	#define MAX_TEST_INSNS 1000000
52	52	#define MAX_FIXUPS 8
53		−#define MAX_NR_MAPS 20
	53	+#define MAX_NR_MAPS 21
54	54	#define MAX_TEST_RUNS 8
55	55	#define POINTER_VALUE 0xcafe4all
56	56	#define TEST_DATA_LEN 64
@@ -87,6 +87,7 @@ struct bpf_test { · 30 unmodified lines
87	87	int fixup_sk_storage_map[MAX_FIXUPS];
88	88	int fixup_map_event_output[MAX_FIXUPS];
89	89	int fixup_map_reuseport_array[MAX_FIXUPS];
	90	+ int fixup_map_ringbuf[MAX_FIXUPS];
90	91	const char *errstr;
91	92	const char *errstr_unpriv;
92	93	uint32_t insn_processed;
@@ -640,6 +641,7 @@ static void do_test_fixup(struct bpf_test *test, enum bpf_prog_type prog_type, · 547 unmodified lines
640	641	int *fixup_sk_storage_map = test->fixup_sk_storage_map;
641	642	int *fixup_map_event_output = test->fixup_map_event_output;
642	643	int *fixup_map_reuseport_array = test->fixup_map_reuseport_array;
	644	+ int *fixup_map_ringbuf = test->fixup_map_ringbuf;
643	645
644	646	if (test->fill_helper) {
645	647	test->fill_insns = calloc(MAX_TEST_INSNS, sizeof(struct bpf_insn));
@@ -817,6 +819,14 @@ static void do_test_fixup(struct bpf_test *test, enum bpf_prog_type prog_type, · 171 unmodified lines
817	819	fixup_map_reuseport_array++;
818	820	} while (*fixup_map_reuseport_array);
819	821	}
	822	+ if (*fixup_map_ringbuf) {
	823	+ map_fds[20] = create_map(BPF_MAP_TYPE_RINGBUF, 0,
	824	+ 0, 4096);
	825	+ do {
	826	+ prog[*fixup_map_ringbuf].imm = map_fds[20];
	827	+ fixup_map_ringbuf++;
	828	+ } while (*fixup_map_ringbuf);
	829	+ }
820	830	}
821	831
822	832	struct libcap {

tools/testing/selftests/bpf/verifier/spill_fill.c+30−0

@@ -28,6 +28,36 @@ · 27 unmodified lines
28	28	.result = ACCEPT,
29	29	.result_unpriv = ACCEPT,
30	30	},
	31	+{
	32	+ "check valid spill/fill, ptr to mem",
	33	+ .insns = {
	34	+ /* reserve 8 byte ringbuf memory */
	35	+ BPF_ST_MEM(BPF_DW, BPF_REG_10, -8, 0),
	36	+ BPF_LD_MAP_FD(BPF_REG_1, 0),
	37	+ BPF_MOV64_IMM(BPF_REG_2, 8),
	38	+ BPF_MOV64_IMM(BPF_REG_3, 0),
	39	+ BPF_RAW_INSN(BPF_JMP \| BPF_CALL, 0, 0, 0, BPF_FUNC_ringbuf_reserve),
	40	+ /* store a pointer to the reserved memory in R6 */
	41	+ BPF_MOV64_REG(BPF_REG_6, BPF_REG_0),
	42	+ /* check whether the reservation was successful */
	43	+ BPF_JMP_IMM(BPF_JEQ, BPF_REG_0, 0, 6),
	44	+ /* spill R6(mem) into the stack */
	45	+ BPF_STX_MEM(BPF_DW, BPF_REG_10, BPF_REG_6, -8),
	46	+ /* fill it back in R7 */
	47	+ BPF_LDX_MEM(BPF_DW, BPF_REG_7, BPF_REG_10, -8),
	48	+ /* should be able to access (R7) = 0 /
	49	+ BPF_ST_MEM(BPF_DW, BPF_REG_7, 0, 0),
	50	+ /* submit the reserved ringbuf memory */
	51	+ BPF_MOV64_REG(BPF_REG_1, BPF_REG_7),
	52	+ BPF_MOV64_IMM(BPF_REG_2, 0),
	53	+ BPF_RAW_INSN(BPF_JMP \| BPF_CALL, 0, 0, 0, BPF_FUNC_ringbuf_submit),
	54	+ BPF_MOV64_IMM(BPF_REG_0, 0),
	55	+ BPF_EXIT_INSN(),
	56	+ },
	57	+ .fixup_map_ringbuf = { 1 },
	58	+ .result = ACCEPT,
	59	+ .result_unpriv = ACCEPT,
	60	+},
31	61	{
32	62	"check corrupted spill/fill",
33	63	.insns = {

tools/testing/selftests/net/fib_tests.sh+0−1

@@ -1055,7 +1055,6 @@ ipv6_addr_metric_test() · 1054 unmodified lines
1055	1055
1056	1056	check_route6 "2001:db8:104::1 dev dummy2 proto kernel metric 260"
1057	1057	log_test $? 0 "Set metric with peer route on local side"
1058		− log_test $? 0 "User specified metric on local address"
1059	1058	check_route6 "2001:db8:104::2 dev dummy2 proto kernel metric 260"
1060	1059	log_test $? 0 "Set metric with peer route on peer side"
1061	1060