Get the noinstr section and annotation markers to base the RCU parts on.
Unified · Split
| @@ -142,10 +142,13 @@ ForEachMacros: · 141 unmodified lines | ||
| 142 | 142 | - 'for_each_card_auxs' |
| 143 | 143 | - 'for_each_card_auxs_safe' |
| 144 | 144 | - 'for_each_card_components' |
| 145 | + - 'for_each_card_dapms' | |
| 145 | 146 | - 'for_each_card_pre_auxs' |
| 146 | 147 | - 'for_each_card_prelinks' |
| 147 | 148 | - 'for_each_card_rtds' |
| 148 | 149 | - 'for_each_card_rtds_safe' |
| 150 | + - 'for_each_card_widgets' | |
| 151 | + - 'for_each_card_widgets_safe' | |
| 149 | 152 | - 'for_each_cgroup_storage_type' |
| 150 | 153 | - 'for_each_child_of_node' |
| 151 | 154 | - 'for_each_clear_bit' |
| @@ -160,6 +163,7 @@ ForEachMacros: · 8 unmodified lines | ||
| 160 | 163 | - 'for_each_cpu_and' |
| 161 | 164 | - 'for_each_cpu_not' |
| 162 | 165 | - 'for_each_cpu_wrap' |
| 166 | + - 'for_each_dapm_widgets' | |
| 163 | 167 | - 'for_each_dev_addr' |
| 164 | 168 | - 'for_each_dev_scope' |
| 165 | 169 | - 'for_each_displayid_db' |
| @@ -170,7 +174,6 @@ ForEachMacros: · 4 unmodified lines | ||
| 170 | 174 | - 'for_each_dpcm_fe' |
| 171 | 175 | - 'for_each_drhd_unit' |
| 172 | 176 | - 'for_each_dss_dev' |
| 173 | − - 'for_each_efi_handle' | |
| 174 | 177 | - 'for_each_efi_memory_desc' |
| 175 | 178 | - 'for_each_efi_memory_desc_in_map' |
| 176 | 179 | - 'for_each_element' |
| @@ -191,6 +194,7 @@ ForEachMacros: · 14 unmodified lines | ||
| 191 | 194 | - 'for_each_ip_tunnel_rcu' |
| 192 | 195 | - 'for_each_irq_nr' |
| 193 | 196 | - 'for_each_link_codecs' |
| 197 | + - 'for_each_link_cpus' | |
| 194 | 198 | - 'for_each_link_platforms' |
| 195 | 199 | - 'for_each_lru' |
| 196 | 200 | - 'for_each_matching_node' |
| @@ -250,6 +254,7 @@ ForEachMacros: · 53 unmodified lines | ||
| 250 | 254 | - 'for_each_pci_bridge' |
| 251 | 255 | - 'for_each_pci_dev' |
| 252 | 256 | - 'for_each_pci_msi_entry' |
| 257 | + - 'for_each_pcm_streams' | |
| 253 | 258 | - 'for_each_populated_zone' |
| 254 | 259 | - 'for_each_possible_cpu' |
| 255 | 260 | - 'for_each_present_cpu' |
| @@ -260,9 +265,12 @@ ForEachMacros: · 4 unmodified lines | ||
| 260 | 265 | - 'for_each_property_of_node' |
| 261 | 266 | - 'for_each_registered_fb' |
| 262 | 267 | - 'for_each_reserved_mem_region' |
| 263 | − - 'for_each_rtd_codec_dai' | |
| 264 | − - 'for_each_rtd_codec_dai_rollback' | |
| 268 | + - 'for_each_rtd_codec_dais' | |
| 269 | + - 'for_each_rtd_codec_dais_rollback' | |
| 265 | 270 | - 'for_each_rtd_components' |
| 271 | + - 'for_each_rtd_cpu_dais' | |
| 272 | + - 'for_each_rtd_cpu_dais_rollback' | |
| 273 | + - 'for_each_rtd_dais' | |
| 266 | 274 | - 'for_each_set_bit' |
| 267 | 275 | - 'for_each_set_bit_from' |
| 268 | 276 | - 'for_each_set_clump8' |
| @@ -334,6 +342,7 @@ ForEachMacros: · 65 unmodified lines | ||
| 334 | 342 | - 'klp_for_each_object' |
| 335 | 343 | - 'klp_for_each_object_safe' |
| 336 | 344 | - 'klp_for_each_object_static' |
| 345 | + - 'kunit_suite_for_each_test_case' | |
| 337 | 346 | - 'kvm_for_each_memslot' |
| 338 | 347 | - 'kvm_for_each_vcpu' |
| 339 | 348 | - 'list_for_each' |
| @@ -387,6 +396,7 @@ ForEachMacros: · 47 unmodified lines | ||
| 387 | 396 | - 'of_property_for_each_string' |
| 388 | 397 | - 'of_property_for_each_u32' |
| 389 | 398 | - 'pci_bus_for_each_resource' |
| 399 | + - 'pcm_for_each_format' | |
| 390 | 400 | - 'ping_portaddr_for_each_entry' |
| 391 | 401 | - 'plist_for_each' |
| 392 | 402 | - 'plist_for_each_continue' |
| @@ -482,7 +492,7 @@ KeepEmptyLinesAtTheStartOfBlocks: false · 89 unmodified lines | ||
| 482 | 492 | MacroBlockBegin: '' |
| 483 | 493 | MacroBlockEnd: '' |
| 484 | 494 | MaxEmptyLinesToKeep: 1 |
| 485 | −NamespaceIndentation: Inner | |
| 495 | +NamespaceIndentation: None | |
| 486 | 496 | #ObjCBinPackProtocolList: Auto # Unknown to clang-format-5.0 |
| 487 | 497 | ObjCBlockIndentWidth: 8 |
| 488 | 498 | ObjCSpaceAfterProperty: true |
| @@ -182,12 +182,15 @@ fix_padding · 181 unmodified lines | ||
| 182 | 182 | space-efficient. If this option is not present, large padding is |
| 183 | 183 | used - that is for compatibility with older kernels. |
| 184 | 184 | |
| 185 | − | |
| 186 | −The journal mode (D/J), buffer_sectors, journal_watermark, commit_time can | |
| 187 | −be changed when reloading the target (load an inactive table and swap the | |
| 188 | −tables with suspend and resume). The other arguments should not be changed | |
| 189 | −when reloading the target because the layout of disk data depend on them | |
| 190 | −and the reloaded target would be non-functional. | |
| 185 | +allow_discards | |
| 186 | + Allow block discard requests (a.k.a. TRIM) for the integrity device. | |
| 187 | + Discards are only allowed to devices using internal hash. | |
| 188 | + | |
| 189 | +The journal mode (D/J), buffer_sectors, journal_watermark, commit_time and | |
| 190 | +allow_discards can be changed when reloading the target (load an inactive | |
| 191 | +table and swap the tables with suspend and resume). The other arguments | |
| 192 | +should not be changed when reloading the target because the layout of disk | |
| 193 | +data depend on them and the reloaded target would be non-functional. | |
| 191 | 194 | |
| 192 | 195 | |
| 193 | 196 | The layout of the formatted block device: |
| @@ -5206,8 +5206,7 @@ · 5205 unmodified lines | ||
| 5206 | 5206 | |
| 5207 | 5207 | usbcore.old_scheme_first= |
| 5208 | 5208 | [USB] Start with the old device initialization |
| 5209 | − scheme, applies only to low and full-speed devices | |
| 5210 | − (default 0 = off). | |
| 5209 | + scheme (default 0 = off). | |
| 5211 | 5210 | |
| 5212 | 5211 | usbcore.usbfs_memory_mb= |
| 5213 | 5212 | [USB] Memory limit (in MB) for buffers allocated by |
| @@ -23,13 +23,14 @@ optional external memory-mapped interface. · 22 unmodified lines | ||
| 23 | 23 | |
| 24 | 24 | Version 1 of the Activity Monitors architecture implements a counter group |
| 25 | 25 | of four fixed and architecturally defined 64-bit event counters. |
| 26 | − - CPU cycle counter: increments at the frequency of the CPU. | |
| 27 | − - Constant counter: increments at the fixed frequency of the system | |
| 28 | − clock. | |
| 29 | − - Instructions retired: increments with every architecturally executed | |
| 30 | − instruction. | |
| 31 | − - Memory stall cycles: counts instruction dispatch stall cycles caused by | |
| 32 | − misses in the last level cache within the clock domain. | |
| 26 | + | |
| 27 | +- CPU cycle counter: increments at the frequency of the CPU. | |
| 28 | +- Constant counter: increments at the fixed frequency of the system | |
| 29 | + clock. | |
| 30 | +- Instructions retired: increments with every architecturally executed | |
| 31 | + instruction. | |
| 32 | +- Memory stall cycles: counts instruction dispatch stall cycles caused by | |
| 33 | + misses in the last level cache within the clock domain. | |
| 33 | 34 | |
| 34 | 35 | When in WFI or WFE these counters do not increment. |
| 35 | 36 | |
| @@ -57,11 +58,12 @@ counters, only the presence of the extension. · 21 unmodified lines | ||
| 57 | 58 | |
| 58 | 59 | Firmware (code running at higher exception levels, e.g. arm-tf) support is |
| 59 | 60 | needed to: |
| 60 | − - Enable access for lower exception levels (EL2 and EL1) to the AMU | |
| 61 | − registers. | |
| 62 | − - Enable the counters. If not enabled these will read as 0. | |
| 63 | − - Save/restore the counters before/after the CPU is being put/brought up | |
| 64 | − from the 'off' power state. | |
| 61 | + | |
| 62 | +- Enable access for lower exception levels (EL2 and EL1) to the AMU | |
| 63 | + registers. | |
| 64 | +- Enable the counters. If not enabled these will read as 0. | |
| 65 | +- Save/restore the counters before/after the CPU is being put/brought up | |
| 66 | + from the 'off' power state. | |
| 65 | 67 | |
| 66 | 68 | When using kernels that have this feature enabled but boot with broken |
| 67 | 69 | firmware the user may experience panics or lockups when accessing the |
| @@ -78,10 +80,11 @@ are not trapped in EL2/EL3. · 10 unmodified lines | ||
| 78 | 80 | |
| 79 | 81 | The fixed counters of AMUv1 are accessible though the following system |
| 80 | 82 | register definitions: |
| 81 | − - SYS_AMEVCNTR0_CORE_EL0 | |
| 82 | − - SYS_AMEVCNTR0_CONST_EL0 | |
| 83 | − - SYS_AMEVCNTR0_INST_RET_EL0 | |
| 84 | − - SYS_AMEVCNTR0_MEM_STALL_EL0 | |
| 83 | + | |
| 84 | +- SYS_AMEVCNTR0_CORE_EL0 | |
| 85 | +- SYS_AMEVCNTR0_CONST_EL0 | |
| 86 | +- SYS_AMEVCNTR0_INST_RET_EL0 | |
| 87 | +- SYS_AMEVCNTR0_MEM_STALL_EL0 | |
| 85 | 88 | |
| 86 | 89 | Auxiliary platform specific counters can be accessed using |
| 87 | 90 | SYS_AMEVCNTR1_EL0(n), where n is a value between 0 and 15. |
| @@ -93,9 +96,10 @@ Userspace access · 5 unmodified lines | ||
| 93 | 96 | ---------------- |
| 94 | 97 | |
| 95 | 98 | Currently, access from userspace to the AMU registers is disabled due to: |
| 96 | − - Security reasons: they might expose information about code executed in | |
| 97 | − secure mode. | |
| 98 | − - Purpose: AMU counters are intended for system management use. | |
| 99 | + | |
| 100 | +- Security reasons: they might expose information about code executed in | |
| 101 | + secure mode. | |
| 102 | +- Purpose: AMU counters are intended for system management use. | |
| 99 | 103 | |
| 100 | 104 | Also, the presence of the feature is not visible to userspace. |
| 101 | 105 | |
| @@ -105,8 +109,9 @@ Virtualization · 3 unmodified lines | ||
| 105 | 109 | |
| 106 | 110 | Currently, access from userspace (EL0) and kernelspace (EL1) on the KVM |
| 107 | 111 | guest side is disabled due to: |
| 108 | − - Security reasons: they might expose information about code executed | |
| 109 | − by other guests or the host. | |
| 112 | + | |
| 113 | +- Security reasons: they might expose information about code executed | |
| 114 | + by other guests or the host. | |
| 110 | 115 | |
| 111 | 116 | Any attempt to access the AMU registers will result in an UNDEFINED |
| 112 | 117 | exception being injected into the guest. |
| @@ -2,6 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | DT_DOC_CHECKER ?= dt-doc-validate |
| 3 | 3 | DT_EXTRACT_EX ?= dt-extract-example |
| 4 | 4 | DT_MK_SCHEMA ?= dt-mk-schema |
| 5 | +DT_MK_SCHEMA_USERONLY_FLAG := $(if $(DT_SCHEMA_FILES), -u) | |
| 5 | 6 | |
| 6 | 7 | quiet_cmd_chk_binding = CHKDT $(patsubst $(srctree)/%,%,$<) |
| 7 | 8 | cmd_chk_binding = $(DT_DOC_CHECKER) -u $(srctree)/$(src) $< ; \ |
| @@ -13,16 +14,18 @@ $(obj)/%.example.dts: $(src)/%.yaml FORCE · 5 unmodified lines | ||
| 13 | 14 | # Use full schemas when checking %.example.dts |
| 14 | 15 | DT_TMP_SCHEMA := $(obj)/processed-schema-examples.yaml |
| 15 | 16 | |
| 17 | +find_cmd = find $(srctree)/$(src) \( -name '*.yaml' ! \ | |
| 18 | + -name 'processed-schema*' ! \ | |
| 19 | + -name '*.example.dt.yaml' \) | |
| 20 | + | |
| 16 | 21 | quiet_cmd_mk_schema = SCHEMA $@ |
| 17 | − cmd_mk_schema = $(DT_MK_SCHEMA) $(DT_MK_SCHEMA_FLAGS) -o $@ $(real-prereqs) | |
| 22 | + cmd_mk_schema = rm -f $@ ; \ | |
| 23 | + $(if $(DT_MK_SCHEMA_FLAGS), \ | |
| 24 | + echo $(real-prereqs), \ | |
| 25 | + $(find_cmd)) | \ | |
| 26 | + xargs $(DT_MK_SCHEMA) $(DT_MK_SCHEMA_FLAGS) >> $@ | |
| 18 | 27 | |
| 19 | −DT_DOCS = $(addprefix $(src)/, \ | |
| 20 | − $(shell \ | |
| 21 | − cd $(srctree)/$(src) && \ | |
| 22 | − find * \( -name '*.yaml' ! \ | |
| 23 | − -name 'processed-schema*' ! \ | |
| 24 | − -name '*.example.dt.yaml' \) \ | |
| 25 | − )) | |
| 28 | +DT_DOCS = $(shell $(find_cmd) | sed -e 's|^$(srctree)/||') | |
| 26 | 29 | |
| 27 | 30 | DT_SCHEMA_FILES ?= $(DT_DOCS) |
| 28 | 31 | |
| @@ -37,7 +40,7 @@ override DTC_FLAGS := \ · 8 unmodified lines | ||
| 37 | 40 | $(obj)/processed-schema-examples.yaml: $(DT_DOCS) FORCE |
| 38 | 41 | $(call if_changed,mk_schema) |
| 39 | 42 | |
| 40 | −$(obj)/processed-schema.yaml: DT_MK_SCHEMA_FLAGS := -u | |
| 43 | +$(obj)/processed-schema.yaml: DT_MK_SCHEMA_FLAGS := $(DT_MK_SCHEMA_USERONLY_FLAG) | |
| 41 | 44 | $(obj)/processed-schema.yaml: $(DT_SCHEMA_FILES) FORCE |
| 42 | 45 | $(call if_changed,mk_schema) |
| 43 | 46 | |
| @@ -37,7 +37,6 @@ examples: · 36 unmodified lines | ||
| 37 | 37 | dsi { |
| 38 | 38 | #address-cells = <1>; |
| 39 | 39 | #size-cells = <0>; |
| 40 | − reg = <0xff450000 0x1000>; | |
| 41 | 40 | |
| 42 | 41 | panel@0 { |
| 43 | 42 | compatible = "leadtek,ltk500hd1829"; |
| @@ -96,12 +96,20 @@ properties: · 95 unmodified lines | ||
| 96 | 96 | If set, reverse the bit order described in the data mappings below on all |
| 97 | 97 | data lanes, transmitting bits for slots 6 to 0 instead of 0 to 6. |
| 98 | 98 | |
| 99 | + port: true | |
| 100 | + ports: true | |
| 101 | + | |
| 99 | 102 | required: |
| 100 | 103 | - compatible |
| 101 | 104 | - data-mapping |
| 102 | 105 | - width-mm |
| 103 | 106 | - height-mm |
| 104 | 107 | - panel-timing |
| 105 | − - port | |
| 108 | + | |
| 109 | +oneOf: | |
| 110 | + - required: | |
| 111 | + - port | |
| 112 | + - required: | |
| 113 | + - ports | |
| 106 | 114 | |
| 107 | 115 | ... |
| @@ -37,7 +37,6 @@ examples: · 36 unmodified lines | ||
| 37 | 37 | dsi { |
| 38 | 38 | #address-cells = <1>; |
| 39 | 39 | #size-cells = <0>; |
| 40 | − reg = <0xff450000 0x1000>; | |
| 41 | 40 | |
| 42 | 41 | panel@0 { |
| 43 | 42 | compatible = "xinpeng,xpp055c272"; |
| @@ -22,9 +22,7 @@ properties: · 21 unmodified lines | ||
| 22 | 22 | const: socionext,uniphier-xdmac |
| 23 | 23 | |
| 24 | 24 | reg: |
| 25 | − items: | |
| 26 | − - description: XDMAC base register region (offset and length) | |
| 27 | − - description: XDMAC extension register region (offset and length) | |
| 25 | + maxItems: 1 | |
| 28 | 26 | |
| 29 | 27 | interrupts: |
| 30 | 28 | maxItems: 1 |
| @@ -49,12 +47,13 @@ required: · 18 unmodified lines | ||
| 49 | 47 | - reg |
| 50 | 48 | - interrupts |
| 51 | 49 | - "#dma-cells" |
| 50 | + - dma-channels | |
| 52 | 51 | |
| 53 | 52 | examples: |
| 54 | 53 | - | |
| 55 | 54 | xdmac: dma-controller@5fc10000 { |
| 56 | 55 | compatible = "socionext,uniphier-xdmac"; |
| 57 | − reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>; | |
| 56 | + reg = <0x5fc10000 0x5300>; | |
| 58 | 57 | interrupts = <0 188 4>; |
| 59 | 58 | #dma-cells = <2>; |
| 60 | 59 | dma-channels = <16>; |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | 2 | %YAML 1.2 |
| 3 | 3 | --- |
| 4 | −$id: "http://devicetree.org/schemas/bindings/iio/adc/st,stm32-adc.yaml#" | |
| 4 | +$id: "http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#" | |
| 5 | 5 | $schema: "http://devicetree.org/meta-schemas/core.yaml#" |
| 6 | 6 | |
| 7 | 7 | title: STMicroelectronics STM32 ADC bindings |
| @@ -259,8 +259,6 @@ properties: · 258 unmodified lines | ||
| 259 | 259 | |
| 260 | 260 | additionalProperties: false |
| 261 | 261 | |
| 262 | − additionalProperties: false | |
| 263 | − | |
| 264 | 262 | additionalProperties: false |
| 265 | 263 | |
| 266 | 264 | required: |
| @@ -97,7 +97,7 @@ then: · 96 unmodified lines | ||
| 97 | 97 | - $ref: /schemas/types.yaml#/definitions/uint32 |
| 98 | 98 | - minimum: 0 |
| 99 | 99 | maximum: 63 |
| 100 | − default: 0 | |
| 100 | + default: 32 | |
| 101 | 101 | |
| 102 | 102 | qcom,charge-ctrl-value: |
| 103 | 103 | description: |
| @@ -130,7 +130,7 @@ then: · 26 unmodified lines | ||
| 130 | 130 | - $ref: /schemas/types.yaml#/definitions/uint32 |
| 131 | 131 | - minimum: 0 |
| 132 | 132 | maximum: 3 |
| 133 | − default: 2 | |
| 133 | + default: 0 | |
| 134 | 134 | |
| 135 | 135 | qcom,preemphasis-width: |
| 136 | 136 | description: |
| @@ -152,7 +152,7 @@ then: · 15 unmodified lines | ||
| 152 | 152 | - $ref: /schemas/types.yaml#/definitions/uint32 |
| 153 | 153 | - minimum: 0 |
| 154 | 154 | maximum: 3 |
| 155 | − default: 0 | |
| 155 | + default: 1 | |
| 156 | 156 | |
| 157 | 157 | required: |
| 158 | 158 | - compatible |
| @@ -37,7 +37,6 @@ properties: · 36 unmodified lines | ||
| 37 | 37 | type: object |
| 38 | 38 | |
| 39 | 39 | additionalProperties: false |
| 40 | − additionalProperties: false | |
| 41 | 40 | |
| 42 | 41 | required: |
| 43 | 42 | - compatible |
| @@ -75,7 +75,8 @@ properties: · 74 unmodified lines | ||
| 75 | 75 | description: | |
| 76 | 76 | disables over voltage protection of this buck |
| 77 | 77 | |
| 78 | − additionalProperties: false | |
| 78 | + unevaluatedProperties: false | |
| 79 | + | |
| 79 | 80 | additionalProperties: false |
| 80 | 81 | |
| 81 | 82 | required: |
| @@ -35,6 +35,8 @@ patternProperties: · 34 unmodified lines | ||
| 35 | 35 | description: |
| 36 | 36 | should be "ldo1", ..., "ldo7" |
| 37 | 37 | |
| 38 | + unevaluatedProperties: false | |
| 39 | + | |
| 38 | 40 | "^BUCK[1-7]$": |
| 39 | 41 | type: object |
| 40 | 42 | allOf: |
| @@ -103,5 +105,7 @@ patternProperties: · 62 unmodified lines | ||
| 103 | 105 | |
| 104 | 106 | required: |
| 105 | 107 | - regulator-name |
| 106 | − additionalProperties: false | |
| 108 | + | |
| 109 | + unevaluatedProperties: false | |
| 110 | + | |
| 107 | 111 | additionalProperties: false |
| @@ -41,6 +41,8 @@ patternProperties: · 40 unmodified lines | ||
| 41 | 41 | description: |
| 42 | 42 | should be "ldo1", ..., "ldo7" |
| 43 | 43 | |
| 44 | + unevaluatedProperties: false | |
| 45 | + | |
| 44 | 46 | "^BUCK[1-8]$": |
| 45 | 47 | type: object |
| 46 | 48 | allOf: |
| @@ -99,5 +101,7 @@ patternProperties: · 52 unmodified lines | ||
| 99 | 101 | |
| 100 | 102 | required: |
| 101 | 103 | - regulator-name |
| 102 | − additionalProperties: false | |
| 104 | + | |
| 105 | + unevaluatedProperties: false | |
| 106 | + | |
| 103 | 107 | additionalProperties: false |
| @@ -40,6 +40,8 @@ patternProperties: · 39 unmodified lines | ||
| 40 | 40 | description: |
| 41 | 41 | should be "ldo1", ..., "ldo6" |
| 42 | 42 | |
| 43 | + unevaluatedProperties: false | |
| 44 | + | |
| 43 | 45 | "^BUCK[1-6]$": |
| 44 | 46 | type: object |
| 45 | 47 | allOf: |
| @@ -93,5 +95,7 @@ patternProperties: · 47 unmodified lines | ||
| 93 | 95 | |
| 94 | 96 | required: |
| 95 | 97 | - regulator-name |
| 96 | − additionalProperties: false | |
| 98 | + | |
| 99 | + unevaluatedProperties: false | |
| 100 | + | |
| 97 | 101 | additionalProperties: false |
| @@ -56,6 +56,9 @@ properties: · 55 unmodified lines | ||
| 56 | 56 | - const: tx |
| 57 | 57 | - const: rx |
| 58 | 58 | |
| 59 | + power-domains: | |
| 60 | + maxItems: 1 | |
| 61 | + | |
| 59 | 62 | rockchip,capture-channels: |
| 60 | 63 | allOf: |
| 61 | 64 | - $ref: /schemas/types.yaml#/definitions/uint32 |
| @@ -1,45 +0,0 @@ | ||
| 1 | −* Rockchip SPDIF transceiver | |
| 2 | − | |
| 3 | −The S/PDIF audio block is a stereo transceiver that allows the | |
| 4 | −processor to receive and transmit digital audio via an coaxial cable or | |
| 5 | −a fibre cable. | |
| 6 | − | |
| 7 | −Required properties: | |
| 8 | − | |
| 9 | −- compatible: should be one of the following: | |
| 10 | − - "rockchip,rk3066-spdif" | |
| 11 | − - "rockchip,rk3188-spdif" | |
| 12 | − - "rockchip,rk3228-spdif" | |
| 13 | − - "rockchip,rk3288-spdif" | |
| 14 | − - "rockchip,rk3328-spdif" | |
| 15 | − - "rockchip,rk3366-spdif" | |
| 16 | − - "rockchip,rk3368-spdif" | |
| 17 | − - "rockchip,rk3399-spdif" | |
| 18 | −- reg: physical base address of the controller and length of memory mapped | |
| 19 | − region. | |
| 20 | −- interrupts: should contain the SPDIF interrupt. | |
| 21 | −- dmas: DMA specifiers for tx dma. See the DMA client binding, | |
| 22 | − Documentation/devicetree/bindings/dma/dma.txt | |
| 23 | −- dma-names: should be "tx" | |
| 24 | −- clocks: a list of phandle + clock-specifier pairs, one for each entry | |
| 25 | − in clock-names. | |
| 26 | −- clock-names: should contain following: | |
| 27 | − - "hclk": clock for SPDIF controller | |
| 28 | − - "mclk" : clock for SPDIF bus | |
| 29 | − | |
| 30 | −Required properties on RK3288: | |
| 31 | − - rockchip,grf: the phandle of the syscon node for the general register | |
| 32 | − file (GRF) | |
| 33 | − | |
| 34 | −Example for the rk3188 SPDIF controller: | |
| 35 | − | |
| 36 | −spdif: spdif@1011e000 { | |
| 37 | − compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif"; | |
| 38 | − reg = <0x1011e000 0x2000>; | |
| 39 | − interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; | |
| 40 | − dmas = <&dmac1_s 8>; | |
| 41 | − dma-names = "tx"; | |
| 42 | − clock-names = "hclk", "mclk"; | |
| 43 | − clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>; | |
| 44 | − #sound-dai-cells = <0>; | |
| 45 | −}; | |
| @@ -0,0 +1,101 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0 | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/sound/rockchip-spdif.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Rockchip SPDIF transceiver | |
| 8 | + | |
| 9 | +description: | |
| 10 | + The S/PDIF audio block is a stereo transceiver that allows the | |
| 11 | + processor to receive and transmit digital audio via a coaxial or | |
| 12 | + fibre cable. | |
| 13 | + | |
| 14 | +maintainers: | |
| 15 | + - Heiko Stuebner <heiko@sntech.de> | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + compatible: | |
| 19 | + oneOf: | |
| 20 | + - const: rockchip,rk3066-spdif | |
| 21 | + - const: rockchip,rk3228-spdif | |
| 22 | + - const: rockchip,rk3328-spdif | |
| 23 | + - const: rockchip,rk3366-spdif | |
| 24 | + - const: rockchip,rk3368-spdif | |
| 25 | + - const: rockchip,rk3399-spdif | |
| 26 | + - items: | |
| 27 | + - enum: | |
| 28 | + - rockchip,rk3188-spdif | |
| 29 | + - rockchip,rk3288-spdif | |
| 30 | + - const: rockchip,rk3066-spdif | |
| 31 | + | |
| 32 | + reg: | |
| 33 | + maxItems: 1 | |
| 34 | + | |
| 35 | + interrupts: | |
| 36 | + maxItems: 1 | |
| 37 | + | |
| 38 | + clocks: | |
| 39 | + items: | |
| 40 | + - description: clock for SPDIF bus | |
| 41 | + - description: clock for SPDIF controller | |
| 42 | + | |
| 43 | + clock-names: | |
| 44 | + items: | |
| 45 | + - const: mclk | |
| 46 | + - const: hclk | |
| 47 | + | |
| 48 | + dmas: | |
| 49 | + maxItems: 1 | |
| 50 | + | |
| 51 | + dma-names: | |
| 52 | + const: tx | |
| 53 | + | |
| 54 | + power-domains: | |
| 55 | + maxItems: 1 | |
| 56 | + | |
| 57 | + rockchip,grf: | |
| 58 | + $ref: /schemas/types.yaml#/definitions/phandle | |
| 59 | + description: | |
| 60 | + The phandle of the syscon node for the GRF register. | |
| 61 | + Required property on RK3288. | |
| 62 | + | |
| 63 | + "#sound-dai-cells": | |
| 64 | + const: 0 | |
| 65 | + | |
| 66 | +required: | |
| 67 | + - compatible | |
| 68 | + - reg | |
| 69 | + - interrupts | |
| 70 | + - clocks | |
| 71 | + - clock-names | |
| 72 | + - dmas | |
| 73 | + - dma-names | |
| 74 | + - "#sound-dai-cells" | |
| 75 | + | |
| 76 | +if: | |
| 77 | + properties: | |
| 78 | + compatible: | |
| 79 | + contains: | |
| 80 | + const: rockchip,rk3288-spdif | |
| 81 | + | |
| 82 | +then: | |
| 83 | + required: | |
| 84 | + - rockchip,grf | |
| 85 | + | |
| 86 | +additionalProperties: false | |
| 87 | + | |
| 88 | +examples: | |
| 89 | + - | | |
| 90 | + #include <dt-bindings/clock/rk3188-cru.h> | |
| 91 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 92 | + spdif: spdif@1011e000 { | |
| 93 | + compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif"; | |
| 94 | + reg = <0x1011e000 0x2000>; | |
| 95 | + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; | |
| 96 | + clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>; | |
| 97 | + clock-names = "mclk", "hclk"; | |
| 98 | + dmas = <&dmac1_s 8>; | |
| 99 | + dma-names = "tx"; | |
| 100 | + #sound-dai-cells = <0>; | |
| 101 | + }; | |
| @@ -18,6 +18,7 @@ properties: · 17 unmodified lines | ||
| 18 | 18 | - renesas,r8a774c0-usb3-peri # RZ/G2E |
| 19 | 19 | - renesas,r8a7795-usb3-peri # R-Car H3 |
| 20 | 20 | - renesas,r8a7796-usb3-peri # R-Car M3-W |
| 21 | + - renesas,r8a77961-usb3-peri # R-Car M3-W+ | |
| 21 | 22 | - renesas,r8a77965-usb3-peri # R-Car M3-N |
| 22 | 23 | - renesas,r8a77990-usb3-peri # R-Car E3 |
| 23 | 24 | - const: renesas,rcar-gen3-usb3-peri |
| @@ -40,6 +40,7 @@ properties: · 39 unmodified lines | ||
| 40 | 40 | - renesas,usbhs-r8a774c0 # RZ/G2E |
| 41 | 41 | - renesas,usbhs-r8a7795 # R-Car H3 |
| 42 | 42 | - renesas,usbhs-r8a7796 # R-Car M3-W |
| 43 | + - renesas,usbhs-r8a77961 # R-Car M3-W+ | |
| 43 | 44 | - renesas,usbhs-r8a77965 # R-Car M3-N |
| 44 | 45 | - renesas,usbhs-r8a77990 # R-Car E3 |
| 45 | 46 | - renesas,usbhs-r8a77995 # R-Car D3 |
| @@ -16,7 +16,8 @@ Required properties: · 15 unmodified lines | ||
| 16 | 16 | - "renesas,xhci-r8a7791" for r8a7791 SoC |
| 17 | 17 | - "renesas,xhci-r8a7793" for r8a7793 SoC |
| 18 | 18 | - "renesas,xhci-r8a7795" for r8a7795 SoC |
| 19 | − - "renesas,xhci-r8a7796" for r8a7796 SoC | |
| 19 | + - "renesas,xhci-r8a7796" for r8a77960 SoC | |
| 20 | + - "renesas,xhci-r8a77961" for r8a77961 SoC | |
| 20 | 21 | - "renesas,xhci-r8a77965" for r8a77965 SoC |
| 21 | 22 | - "renesas,xhci-r8a77990" for r8a77990 SoC |
| 22 | 23 | - "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 or RZ/G1 compatible |
| @@ -79,8 +79,8 @@ created with any of:: · 78 unmodified lines | ||
| 79 | 79 | struct dentry *parent, u8 *value); |
| 80 | 80 | void debugfs_create_u16(const char *name, umode_t mode, |
| 81 | 81 | struct dentry *parent, u16 *value); |
| 82 | − struct dentry *debugfs_create_u32(const char *name, umode_t mode, | |
| 83 | − struct dentry *parent, u32 *value); | |
| 82 | + void debugfs_create_u32(const char *name, umode_t mode, | |
| 83 | + struct dentry *parent, u32 *value); | |
| 84 | 84 | void debugfs_create_u64(const char *name, umode_t mode, |
| 85 | 85 | struct dentry *parent, u64 *value); |
| 86 | 86 | |
| @@ -1241,7 +1241,8 @@ When kbuild executes, the following steps are followed (roughly): · 1240 unmodified lines | ||
| 1241 | 1241 | will be displayed with "make KBUILD_VERBOSE=0". |
| 1242 | 1242 | |
| 1243 | 1243 | |
| 1244 | −--- 6.9 Preprocessing linker scripts | |
| 1244 | +6.9 Preprocessing linker scripts | |
| 1245 | +-------------------------------- | |
| 1245 | 1246 | |
| 1246 | 1247 | When the vmlinux image is built, the linker script |
| 1247 | 1248 | arch/$(ARCH)/kernel/vmlinux.lds is used. |
| @@ -61,8 +61,8 @@ The ``ice`` driver reports the following versions · 60 unmodified lines | ||
| 61 | 61 | - running |
| 62 | 62 | - ICE OS Default Package |
| 63 | 63 | - The name of the DDP package that is active in the device. The DDP |
| 64 | − package is loaded by the driver during initialization. Each varation | |
| 65 | − of DDP package shall have a unique name. | |
| 64 | + package is loaded by the driver during initialization. Each | |
| 65 | + variation of the DDP package has a unique name. | |
| 66 | 66 | * - ``fw.app`` |
| 67 | 67 | - running |
| 68 | 68 | - 1.3.1.0 |
| @@ -983,6 +983,13 @@ ip_early_demux - BOOLEAN · 982 unmodified lines | ||
| 983 | 983 | reduces overall throughput, in such case you should disable it. |
| 984 | 984 | Default: 1 |
| 985 | 985 | |
| 986 | +ping_group_range - 2 INTEGERS | |
| 987 | + Restrict ICMP_PROTO datagram sockets to users in the group range. | |
| 988 | + The default is "1 0", meaning, that nobody (not even root) may | |
| 989 | + create ping sockets. Setting it to "100 100" would grant permissions | |
| 990 | + to the single group. "0 4294967295" would enable it for the world, "100 | |
| 991 | + 4294967295" would enable it for the users, but not daemons. | |
| 992 | + | |
| 986 | 993 | tcp_early_demux - BOOLEAN |
| 987 | 994 | Enable early demux for established TCP sockets. |
| 988 | 995 | Default: 1 |
| @@ -28,3 +28,5 @@ KVM · 27 unmodified lines | ||
| 28 | 28 | arm/index |
| 29 | 29 | |
| 30 | 30 | devices/index |
| 31 | + | |
| 32 | + running-nested-guests | |
| @@ -0,0 +1,276 @@ | ||
| 1 | +============================== | |
| 2 | +Running nested guests with KVM | |
| 3 | +============================== | |
| 4 | + | |
| 5 | +A nested guest is the ability to run a guest inside another guest (it | |
| 6 | +can be KVM-based or a different hypervisor). The straightforward | |
| 7 | +example is a KVM guest that in turn runs on a KVM guest (the rest of | |
| 8 | +this document is built on this example):: | |
| 9 | + | |
| 10 | + .----------------. .----------------. | |
| 11 | + | | | | | |
| 12 | + | L2 | | L2 | | |
| 13 | + | (Nested Guest) | | (Nested Guest) | | |
| 14 | + | | | | | |
| 15 | + |----------------'--'----------------| | |
| 16 | + | | | |
| 17 | + | L1 (Guest Hypervisor) | | |
| 18 | + | KVM (/dev/kvm) | | |
| 19 | + | | | |
| 20 | + .------------------------------------------------------. | |
| 21 | + | L0 (Host Hypervisor) | | |
| 22 | + | KVM (/dev/kvm) | | |
| 23 | + |------------------------------------------------------| | |
| 24 | + | Hardware (with virtualization extensions) | | |
| 25 | + '------------------------------------------------------' | |
| 26 | + | |
| 27 | +Terminology: | |
| 28 | + | |
| 29 | +- L0 – level-0; the bare metal host, running KVM | |
| 30 | + | |
| 31 | +- L1 – level-1 guest; a VM running on L0; also called the "guest | |
| 32 | + hypervisor", as it itself is capable of running KVM. | |
| 33 | + | |
| 34 | +- L2 – level-2 guest; a VM running on L1, this is the "nested guest" | |
| 35 | + | |
| 36 | +.. note:: The above diagram is modelled after the x86 architecture; | |
| 37 | + s390x, ppc64 and other architectures are likely to have | |
| 38 | + a different design for nesting. | |
| 39 | + | |
| 40 | + For example, s390x always has an LPAR (LogicalPARtition) | |
| 41 | + hypervisor running on bare metal, adding another layer and | |
| 42 | + resulting in at least four levels in a nested setup — L0 (bare | |
| 43 | + metal, running the LPAR hypervisor), L1 (host hypervisor), L2 | |
| 44 | + (guest hypervisor), L3 (nested guest). | |
| 45 | + | |
| 46 | + This document will stick with the three-level terminology (L0, | |
| 47 | + L1, and L2) for all architectures; and will largely focus on | |
| 48 | + x86. | |
| 49 | + | |
| 50 | + | |
| 51 | +Use Cases | |
| 52 | +--------- | |
| 53 | + | |
| 54 | +There are several scenarios where nested KVM can be useful, to name a | |
| 55 | +few: | |
| 56 | + | |
| 57 | +- As a developer, you want to test your software on different operating | |
| 58 | + systems (OSes). Instead of renting multiple VMs from a Cloud | |
| 59 | + Provider, using nested KVM lets you rent a large enough "guest | |
| 60 | + hypervisor" (level-1 guest). This in turn allows you to create | |
| 61 | + multiple nested guests (level-2 guests), running different OSes, on | |
| 62 | + which you can develop and test your software. | |
| 63 | + | |
| 64 | +- Live migration of "guest hypervisors" and their nested guests, for | |
| 65 | + load balancing, disaster recovery, etc. | |
| 66 | + | |
| 67 | +- VM image creation tools (e.g. ``virt-install``, etc) often run | |
| 68 | + their own VM, and users expect these to work inside a VM. | |
| 69 | + | |
| 70 | +- Some OSes use virtualization internally for security (e.g. to let | |
| 71 | + applications run safely in isolation). | |
| 72 | + | |
| 73 | + | |
| 74 | +Enabling "nested" (x86) | |
| 75 | +----------------------- | |
| 76 | + | |
| 77 | +From Linux kernel v4.19 onwards, the ``nested`` KVM parameter is enabled | |
| 78 | +by default for Intel and AMD. (Though your Linux distribution might | |
| 79 | +override this default.) | |
| 80 | + | |
| 81 | +In case you are running a Linux kernel older than v4.19, to enable | |
| 82 | +nesting, set the ``nested`` KVM module parameter to ``Y`` or ``1``. To | |
| 83 | +persist this setting across reboots, you can add it in a config file, as | |
| 84 | +shown below: | |
| 85 | + | |
| 86 | +1. On the bare metal host (L0), list the kernel modules and ensure that | |
| 87 | + the KVM modules:: | |
| 88 | + | |
| 89 | + $ lsmod | grep -i kvm | |
| 90 | + kvm_intel 133627 0 | |
| 91 | + kvm 435079 1 kvm_intel | |
| 92 | + | |
| 93 | +2. Show information for ``kvm_intel`` module:: | |
| 94 | + | |
| 95 | + $ modinfo kvm_intel | grep -i nested | |
| 96 | + parm: nested:bool | |
| 97 | + | |
| 98 | +3. For the nested KVM configuration to persist across reboots, place the | |
| 99 | + below in ``/etc/modprobed/kvm_intel.conf`` (create the file if it | |
| 100 | + doesn't exist):: | |
| 101 | + | |
| 102 | + $ cat /etc/modprobe.d/kvm_intel.conf | |
| 103 | + options kvm-intel nested=y | |
| 104 | + | |
| 105 | +4. Unload and re-load the KVM Intel module:: | |
| 106 | + | |
| 107 | + $ sudo rmmod kvm-intel | |
| 108 | + $ sudo modprobe kvm-intel | |
| 109 | + | |
| 110 | +5. Verify if the ``nested`` parameter for KVM is enabled:: | |
| 111 | + | |
| 112 | + $ cat /sys/module/kvm_intel/parameters/nested | |
| 113 | + Y | |
| 114 | + | |
| 115 | +For AMD hosts, the process is the same as above, except that the module | |
| 116 | +name is ``kvm-amd``. | |
| 117 | + | |
| 118 | + | |
| 119 | +Additional nested-related kernel parameters (x86) | |
| 120 | +------------------------------------------------- | |
| 121 | + | |
| 122 | +If your hardware is sufficiently advanced (Intel Haswell processor or | |
| 123 | +higher, which has newer hardware virt extensions), the following | |
| 124 | +additional features will also be enabled by default: "Shadow VMCS | |
| 125 | +(Virtual Machine Control Structure)", APIC Virtualization on your bare | |
| 126 | +metal host (L0). Parameters for Intel hosts:: | |
| 127 | + | |
| 128 | + $ cat /sys/module/kvm_intel/parameters/enable_shadow_vmcs | |
| 129 | + Y | |
| 130 | + | |
| 131 | + $ cat /sys/module/kvm_intel/parameters/enable_apicv | |
| 132 | + Y | |
| 133 | + | |
| 134 | + $ cat /sys/module/kvm_intel/parameters/ept | |
| 135 | + Y | |
| 136 | + | |
| 137 | +.. note:: If you suspect your L2 (i.e. nested guest) is running slower, | |
| 138 | + ensure the above are enabled (particularly | |
| 139 | + ``enable_shadow_vmcs`` and ``ept``). | |
| 140 | + | |
| 141 | + | |
| 142 | +Starting a nested guest (x86) | |
| 143 | +----------------------------- | |
| 144 | + | |
| 145 | +Once your bare metal host (L0) is configured for nesting, you should be | |
| 146 | +able to start an L1 guest with:: | |
| 147 | + | |
| 148 | + $ qemu-kvm -cpu host [...] | |
| 149 | + | |
| 150 | +The above will pass through the host CPU's capabilities as-is to the | |
| 151 | +gues); or for better live migration compatibility, use a named CPU | |
| 152 | +model supported by QEMU. e.g.:: | |
| 153 | + | |
| 154 | + $ qemu-kvm -cpu Haswell-noTSX-IBRS,vmx=on | |
| 155 | + | |
| 156 | +then the guest hypervisor will subsequently be capable of running a | |
| 157 | +nested guest with accelerated KVM. | |
| 158 | + | |
| 159 | + | |
| 160 | +Enabling "nested" (s390x) | |
| 161 | +------------------------- | |
| 162 | + | |
| 163 | +1. On the host hypervisor (L0), enable the ``nested`` parameter on | |
| 164 | + s390x:: | |
| 165 | + | |
| 166 | + $ rmmod kvm | |
| 167 | + $ modprobe kvm nested=1 | |
| 168 | + | |
| 169 | +.. note:: On s390x, the kernel parameter ``hpage`` is mutually exclusive | |
| 170 | + with the ``nested`` paramter — i.e. to be able to enable | |
| 171 | + ``nested``, the ``hpage`` parameter *must* be disabled. | |
| 172 | + | |
| 173 | +2. The guest hypervisor (L1) must be provided with the ``sie`` CPU | |
| 174 | + feature — with QEMU, this can be done by using "host passthrough" | |
| 175 | + (via the command-line ``-cpu host``). | |
| 176 | + | |
| 177 | +3. Now the KVM module can be loaded in the L1 (guest hypervisor):: | |
| 178 | + | |
| 179 | + $ modprobe kvm | |
| 180 | + | |
| 181 | + | |
| 182 | +Live migration with nested KVM | |
| 183 | +------------------------------ | |
| 184 | + | |
| 185 | +Migrating an L1 guest, with a *live* nested guest in it, to another | |
| 186 | +bare metal host, works as of Linux kernel 5.3 and QEMU 4.2.0 for | |
| 187 | +Intel x86 systems, and even on older versions for s390x. | |
| 188 | + | |
| 189 | +On AMD systems, once an L1 guest has started an L2 guest, the L1 guest | |
| 190 | +should no longer be migrated or saved (refer to QEMU documentation on | |
| 191 | +"savevm"/"loadvm") until the L2 guest shuts down. Attempting to migrate | |
| 192 | +or save-and-load an L1 guest while an L2 guest is running will result in | |
| 193 | +undefined behavior. You might see a ``kernel BUG!`` entry in ``dmesg``, a | |
| 194 | +kernel 'oops', or an outright kernel panic. Such a migrated or loaded L1 | |
| 195 | +guest can no longer be considered stable or secure, and must be restarted. | |
| 196 | +Migrating an L1 guest merely configured to support nesting, while not | |
| 197 | +actually running L2 guests, is expected to function normally even on AMD | |
| 198 | +systems but may fail once guests are started. | |
| 199 | + | |
| 200 | +Migrating an L2 guest is always expected to succeed, so all the following | |
| 201 | +scenarios should work even on AMD systems: | |
| 202 | + | |
| 203 | +- Migrating a nested guest (L2) to another L1 guest on the *same* bare | |
| 204 | + metal host. | |
| 205 | + | |
| 206 | +- Migrating a nested guest (L2) to another L1 guest on a *different* | |
| 207 | + bare metal host. | |
| 208 | + | |
| 209 | +- Migrating a nested guest (L2) to a bare metal host. | |
| 210 | + | |
| 211 | +Reporting bugs from nested setups | |
| 212 | +----------------------------------- | |
| 213 | + | |
| 214 | +Debugging "nested" problems can involve sifting through log files across | |
| 215 | +L0, L1 and L2; this can result in tedious back-n-forth between the bug | |
| 216 | +reporter and the bug fixer. | |
| 217 | + | |
| 218 | +- Mention that you are in a "nested" setup. If you are running any kind | |
| 219 | + of "nesting" at all, say so. Unfortunately, this needs to be called | |
| 220 | + out because when reporting bugs, people tend to forget to even | |
| 221 | + *mention* that they're using nested virtualization. | |
| 222 | + | |
| 223 | +- Ensure you are actually running KVM on KVM. Sometimes people do not | |
| 224 | + have KVM enabled for their guest hypervisor (L1), which results in | |
| 225 | + them running with pure emulation or what QEMU calls it as "TCG", but | |
| 226 | + they think they're running nested KVM. Thus confusing "nested Virt" | |
| 227 | + (which could also mean, QEMU on KVM) with "nested KVM" (KVM on KVM). | |
| 228 | + | |
| 229 | +Information to collect (generic) | |
| 230 | +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 231 | + | |
| 232 | +The following is not an exhaustive list, but a very good starting point: | |
| 233 | + | |
| 234 | + - Kernel, libvirt, and QEMU version from L0 | |
| 235 | + | |
| 236 | + - Kernel, libvirt and QEMU version from L1 | |
| 237 | + | |
| 238 | + - QEMU command-line of L1 -- when using libvirt, you'll find it here: | |
| 239 | + ``/var/log/libvirt/qemu/instance.log`` | |
| 240 | + | |
| 241 | + - QEMU command-line of L2 -- as above, when using libvirt, get the | |
| 242 | + complete libvirt-generated QEMU command-line | |
| 243 | + | |
| 244 | + - ``cat /sys/cpuinfo`` from L0 | |
| 245 | + | |
| 246 | + - ``cat /sys/cpuinfo`` from L1 | |
| 247 | + | |
| 248 | + - ``lscpu`` from L0 | |
| 249 | + | |
| 250 | + - ``lscpu`` from L1 | |
| 251 | + | |
| 252 | + - Full ``dmesg`` output from L0 | |
| 253 | + | |
| 254 | + - Full ``dmesg`` output from L1 | |
| 255 | + | |
| 256 | +x86-specific info to collect | |
| 257 | +~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 258 | + | |
| 259 | +Both the below commands, ``x86info`` and ``dmidecode``, should be | |
| 260 | +available on most Linux distributions with the same name: | |
| 261 | + | |
| 262 | + - Output of: ``x86info -a`` from L0 | |
| 263 | + | |
| 264 | + - Output of: ``x86info -a`` from L1 | |
| 265 | + | |
| 266 | + - Output of: ``dmidecode`` from L0 | |
| 267 | + | |
| 268 | + - Output of: ``dmidecode`` from L1 | |
| 269 | + | |
| 270 | +s390x-specific info to collect | |
| 271 | +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 272 | + | |
| 273 | +Along with the earlier mentioned generic details, the below is | |
| 274 | +also recommended: | |
| 275 | + | |
| 276 | + - ``/proc/sysinfo`` from L1; this will also include the info from L0 | |
| @@ -189,7 +189,7 @@ F: drivers/net/hamradio/6pack.c · 188 unmodified lines | ||
| 189 | 189 | M: Johannes Berg <johannes@sipsolutions.net> |
| 190 | 190 | L: linux-wireless@vger.kernel.org |
| 191 | 191 | S: Maintained |
| 192 | −W: http://wireless.kernel.org/ | |
| 192 | +W: https://wireless.wiki.kernel.org/ | |
| 193 | 193 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git |
| 194 | 194 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git |
| 195 | 195 | F: Documentation/driver-api/80211/cfg80211.rst |
| @@ -505,7 +505,7 @@ F: drivers/hwmon/adm1029.c · 309 unmodified lines | ||
| 505 | 505 | ADM8211 WIRELESS DRIVER |
| 506 | 506 | L: linux-wireless@vger.kernel.org |
| 507 | 507 | S: Orphan |
| 508 | −W: http://wireless.kernel.org/ | |
| 508 | +W: https://wireless.wiki.kernel.org/ | |
| 509 | 509 | F: drivers/net/wireless/admtek/adm8211.* |
| 510 | 510 | |
| 511 | 511 | ADP1653 FLASH CONTROLLER DRIVER |
| @@ -570,7 +570,7 @@ F: Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml · 58 unmodified lines | ||
| 570 | 570 | F: drivers/input/misc/adxl34x.c |
| 571 | 571 | |
| 572 | 572 | ADXL372 THREE-AXIS DIGITAL ACCELEROMETER DRIVER |
| 573 | −M: Stefan Popa <stefan.popa@analog.com> | |
| 573 | +M: Michael Hennerich <michael.hennerich@analog.com> | |
| 574 | 574 | S: Supported |
| 575 | 575 | W: http://ez.analog.com/community/linux-device-drivers |
| 576 | 576 | F: Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml |
| @@ -922,7 +922,7 @@ F: arch/arm64/boot/dts/amd/amd-seattle-xgbe*.dtsi · 345 unmodified lines | ||
| 922 | 922 | F: drivers/net/ethernet/amd/xgbe/ |
| 923 | 923 | |
| 924 | 924 | ANALOG DEVICES INC AD5686 DRIVER |
| 925 | −M: Stefan Popa <stefan.popa@analog.com> | |
| 925 | +M: Michael Hennerich <Michael.Hennerich@analog.com> | |
| 926 | 926 | L: linux-pm@vger.kernel.org |
| 927 | 927 | S: Supported |
| 928 | 928 | W: http://ez.analog.com/community/linux-device-drivers |
| @@ -930,7 +930,7 @@ F: drivers/iio/dac/ad5686* · 1 unmodified line | ||
| 930 | 930 | F: drivers/iio/dac/ad5696* |
| 931 | 931 | |
| 932 | 932 | ANALOG DEVICES INC AD5758 DRIVER |
| 933 | −M: Stefan Popa <stefan.popa@analog.com> | |
| 933 | +M: Michael Hennerich <Michael.Hennerich@analog.com> | |
| 934 | 934 | L: linux-iio@vger.kernel.org |
| 935 | 935 | S: Supported |
| 936 | 936 | W: http://ez.analog.com/community/linux-device-drivers |
| @@ -946,7 +946,7 @@ F: Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml · 9 unmodified lines | ||
| 946 | 946 | F: drivers/iio/adc/ad7091r5.c |
| 947 | 947 | |
| 948 | 948 | ANALOG DEVICES INC AD7124 DRIVER |
| 949 | −M: Stefan Popa <stefan.popa@analog.com> | |
| 949 | +M: Michael Hennerich <Michael.Hennerich@analog.com> | |
| 950 | 950 | L: linux-iio@vger.kernel.org |
| 951 | 951 | S: Supported |
| 952 | 952 | W: http://ez.analog.com/community/linux-device-drivers |
| @@ -970,7 +970,7 @@ F: Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml · 17 unmodified lines | ||
| 970 | 970 | F: drivers/iio/adc/ad7292.c |
| 971 | 971 | |
| 972 | 972 | ANALOG DEVICES INC AD7606 DRIVER |
| 973 | −M: Stefan Popa <stefan.popa@analog.com> | |
| 973 | +M: Michael Hennerich <Michael.Hennerich@analog.com> | |
| 974 | 974 | M: Beniamin Bia <beniamin.bia@analog.com> |
| 975 | 975 | L: linux-iio@vger.kernel.org |
| 976 | 976 | S: Supported |
| @@ -979,7 +979,7 @@ F: Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml · 2 unmodified lines | ||
| 979 | 979 | F: drivers/iio/adc/ad7606.c |
| 980 | 980 | |
| 981 | 981 | ANALOG DEVICES INC AD7768-1 DRIVER |
| 982 | −M: Stefan Popa <stefan.popa@analog.com> | |
| 982 | +M: Michael Hennerich <Michael.Hennerich@analog.com> | |
| 983 | 983 | L: linux-iio@vger.kernel.org |
| 984 | 984 | S: Supported |
| 985 | 985 | W: http://ez.analog.com/community/linux-device-drivers |
| @@ -1040,7 +1040,7 @@ F: Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml · 54 unmodified lines | ||
| 1040 | 1040 | F: drivers/hwmon/adm1177.c |
| 1041 | 1041 | |
| 1042 | 1042 | ANALOG DEVICES INC ADP5061 DRIVER |
| 1043 | −M: Stefan Popa <stefan.popa@analog.com> | |
| 1043 | +M: Michael Hennerich <Michael.Hennerich@analog.com> | |
| 1044 | 1044 | L: linux-pm@vger.kernel.org |
| 1045 | 1045 | S: Supported |
| 1046 | 1046 | W: http://ez.analog.com/community/linux-device-drivers |
| @@ -1109,7 +1109,6 @@ F: drivers/iio/amplifiers/hmc425a.c · 62 unmodified lines | ||
| 1109 | 1109 | ANALOG DEVICES INC IIO DRIVERS |
| 1110 | 1110 | M: Lars-Peter Clausen <lars@metafoo.de> |
| 1111 | 1111 | M: Michael Hennerich <Michael.Hennerich@analog.com> |
| 1112 | −M: Stefan Popa <stefan.popa@analog.com> | |
| 1113 | 1112 | S: Supported |
| 1114 | 1113 | W: http://wiki.analog.com/ |
| 1115 | 1114 | W: http://ez.analog.com/community/linux-device-drivers |
| @@ -2850,14 +2849,14 @@ M: Nick Kossifidis <mickflemm@gmail.com> · 1734 unmodified lines | ||
| 2850 | 2849 | M: Luis Chamberlain <mcgrof@kernel.org> |
| 2851 | 2850 | L: linux-wireless@vger.kernel.org |
| 2852 | 2851 | S: Maintained |
| 2853 | −W: http://wireless.kernel.org/en/users/Drivers/ath5k | |
| 2852 | +W: https://wireless.wiki.kernel.org/en/users/Drivers/ath5k | |
| 2854 | 2853 | F: drivers/net/wireless/ath/ath5k/ |
| 2855 | 2854 | |
| 2856 | 2855 | ATHEROS ATH6KL WIRELESS DRIVER |
| 2857 | 2856 | M: Kalle Valo <kvalo@codeaurora.org> |
| 2858 | 2857 | L: linux-wireless@vger.kernel.org |
| 2859 | 2858 | S: Supported |
| 2860 | −W: http://wireless.kernel.org/en/users/Drivers/ath6kl | |
| 2859 | +W: https://wireless.wiki.kernel.org/en/users/Drivers/ath6kl | |
| 2861 | 2860 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git |
| 2862 | 2861 | F: drivers/net/wireless/ath/ath6kl/ |
| 2863 | 2862 | |
| @@ -3020,7 +3019,7 @@ B43 WIRELESS DRIVER · 156 unmodified lines | ||
| 3020 | 3019 | L: linux-wireless@vger.kernel.org |
| 3021 | 3020 | L: b43-dev@lists.infradead.org |
| 3022 | 3021 | S: Odd Fixes |
| 3023 | −W: http://wireless.kernel.org/en/users/Drivers/b43 | |
| 3022 | +W: https://wireless.wiki.kernel.org/en/users/Drivers/b43 | |
| 3024 | 3023 | F: drivers/net/wireless/broadcom/b43/ |
| 3025 | 3024 | |
| 3026 | 3025 | B43LEGACY WIRELESS DRIVER |
| @@ -3028,7 +3027,7 @@ M: Larry Finger <Larry.Finger@lwfinger.net> · 1 unmodified line | ||
| 3028 | 3027 | L: linux-wireless@vger.kernel.org |
| 3029 | 3028 | L: b43-dev@lists.infradead.org |
| 3030 | 3029 | S: Maintained |
| 3031 | −W: http://wireless.kernel.org/en/users/Drivers/b43 | |
| 3030 | +W: https://wireless.wiki.kernel.org/en/users/Drivers/b43 | |
| 3032 | 3031 | F: drivers/net/wireless/broadcom/b43legacy/ |
| 3033 | 3032 | |
| 3034 | 3033 | BACKLIGHT CLASS/SUBSYSTEM |
| @@ -3658,7 +3657,7 @@ L: linux-btrfs@vger.kernel.org · 623 unmodified lines | ||
| 3658 | 3657 | S: Maintained |
| 3659 | 3658 | W: http://btrfs.wiki.kernel.org/ |
| 3660 | 3659 | Q: http://patchwork.kernel.org/project/linux-btrfs/list/ |
| 3661 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux-btrfs.git | |
| 3660 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux.git | |
| 3662 | 3661 | F: Documentation/filesystems/btrfs.rst |
| 3663 | 3662 | F: fs/btrfs/ |
| 3664 | 3663 | F: include/linux/btrfs* |
| @@ -3843,7 +3842,7 @@ CARL9170 LINUX COMMUNITY WIRELESS DRIVER · 178 unmodified lines | ||
| 3843 | 3842 | M: Christian Lamparter <chunkeey@googlemail.com> |
| 3844 | 3843 | L: linux-wireless@vger.kernel.org |
| 3845 | 3844 | S: Maintained |
| 3846 | −W: http://wireless.kernel.org/en/users/Drivers/carl9170 | |
| 3845 | +W: https://wireless.wiki.kernel.org/en/users/Drivers/carl9170 | |
| 3847 | 3846 | F: drivers/net/wireless/ath/carl9170/ |
| 3848 | 3847 | |
| 3849 | 3848 | CAVIUM I2C DRIVER |
| @@ -3937,11 +3936,9 @@ F: arch/powerpc/platforms/cell/ · 87 unmodified lines | ||
| 3937 | 3936 | CEPH COMMON CODE (LIBCEPH) |
| 3938 | 3937 | M: Ilya Dryomov <idryomov@gmail.com> |
| 3939 | 3938 | M: Jeff Layton <jlayton@kernel.org> |
| 3940 | −M: Sage Weil <sage@redhat.com> | |
| 3941 | 3939 | L: ceph-devel@vger.kernel.org |
| 3942 | 3940 | S: Supported |
| 3943 | 3941 | W: http://ceph.com/ |
| 3944 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client.git | |
| 3945 | 3942 | T: git git://github.com/ceph/ceph-client.git |
| 3946 | 3943 | F: include/linux/ceph/ |
| 3947 | 3944 | F: include/linux/crush/ |
| @@ -3949,12 +3946,10 @@ F: net/ceph/ · 1 unmodified line | ||
| 3949 | 3946 | |
| 3950 | 3947 | CEPH DISTRIBUTED FILE SYSTEM CLIENT (CEPH) |
| 3951 | 3948 | M: Jeff Layton <jlayton@kernel.org> |
| 3952 | −M: Sage Weil <sage@redhat.com> | |
| 3953 | 3949 | M: Ilya Dryomov <idryomov@gmail.com> |
| 3954 | 3950 | L: ceph-devel@vger.kernel.org |
| 3955 | 3951 | S: Supported |
| 3956 | 3952 | W: http://ceph.com/ |
| 3957 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client.git | |
| 3958 | 3953 | T: git git://github.com/ceph/ceph-client.git |
| 3959 | 3954 | F: Documentation/filesystems/ceph.rst |
| 3960 | 3955 | F: fs/ceph/ |
| @@ -5176,6 +5171,7 @@ S: Maintained · 1215 unmodified lines | ||
| 5176 | 5171 | F: drivers/soc/fsl/dpio |
| 5177 | 5172 | |
| 5178 | 5173 | DPAA2 ETHERNET DRIVER |
| 5174 | +M: Ioana Ciornei <ioana.ciornei@nxp.com> | |
| 5179 | 5175 | M: Ioana Radulescu <ruxandra.radulescu@nxp.com> |
| 5180 | 5176 | L: netdev@vger.kernel.org |
| 5181 | 5177 | S: Maintained |
| @@ -5935,9 +5931,9 @@ F: lib/dynamic_debug.c · 753 unmodified lines | ||
| 5935 | 5931 | DYNAMIC INTERRUPT MODERATION |
| 5936 | 5932 | M: Tal Gilboa <talgi@mellanox.com> |
| 5937 | 5933 | S: Maintained |
| 5934 | +F: Documentation/networking/net_dim.rst | |
| 5938 | 5935 | F: include/linux/dim.h |
| 5939 | 5936 | F: lib/dim/ |
| 5940 | −F: Documentation/networking/net_dim.rst | |
| 5941 | 5937 | |
| 5942 | 5938 | DZ DECSTATION DZ11 SERIAL DRIVER |
| 5943 | 5939 | M: "Maciej W. Rozycki" <macro@linux-mips.org> |
| @@ -7119,9 +7115,10 @@ F: include/uapi/asm-generic/ · 1175 unmodified lines | ||
| 7119 | 7115 | |
| 7120 | 7116 | GENERIC PHY FRAMEWORK |
| 7121 | 7117 | M: Kishon Vijay Abraham I <kishon@ti.com> |
| 7118 | +M: Vinod Koul <vkoul@kernel.org> | |
| 7122 | 7119 | L: linux-kernel@vger.kernel.org |
| 7123 | 7120 | S: Supported |
| 7124 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy.git | |
| 7121 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy.git | |
| 7125 | 7122 | F: Documentation/devicetree/bindings/phy/ |
| 7126 | 7123 | F: drivers/phy/ |
| 7127 | 7124 | F: include/linux/phy/ |
| @@ -7746,11 +7743,6 @@ L: platform-driver-x86@vger.kernel.org · 618 unmodified lines | ||
| 7746 | 7743 | S: Orphan |
| 7747 | 7744 | F: drivers/platform/x86/tc1100-wmi.c |
| 7748 | 7745 | |
| 7749 | −HP100: Driver for HP 10/100 Mbit/s Voice Grade Network Adapter Series | |
| 7750 | −M: Jaroslav Kysela <perex@perex.cz> | |
| 7751 | −S: Obsolete | |
| 7752 | −F: drivers/staging/hp/hp100.* | |
| 7753 | − | |
| 7754 | 7746 | HPET: High Precision Event Timers driver |
| 7755 | 7747 | M: Clemens Ladisch <clemens@ladisch.de> |
| 7756 | 7748 | S: Maintained |
| @@ -9329,6 +9321,7 @@ M: Christian Borntraeger <borntraeger@de.ibm.com> · 1572 unmodified lines | ||
| 9329 | 9321 | M: Janosch Frank <frankja@linux.ibm.com> |
| 9330 | 9322 | R: David Hildenbrand <david@redhat.com> |
| 9331 | 9323 | R: Cornelia Huck <cohuck@redhat.com> |
| 9324 | +R: Claudio Imbrenda <imbrenda@linux.ibm.com> | |
| 9332 | 9325 | L: kvm@vger.kernel.org |
| 9333 | 9326 | S: Supported |
| 9334 | 9327 | W: http://www.ibm.com/developerworks/linux/linux390/ |
| @@ -9416,6 +9409,13 @@ F: include/linux/keyctl.h · 81 unmodified lines | ||
| 9416 | 9409 | F: include/uapi/linux/keyctl.h |
| 9417 | 9410 | F: security/keys/ |
| 9418 | 9411 | |
| 9412 | +KFIFO | |
| 9413 | +M: Stefani Seibold <stefani@seibold.net> | |
| 9414 | +S: Maintained | |
| 9415 | +F: include/linux/kfifo.h | |
| 9416 | +F: lib/kfifo.c | |
| 9417 | +F: samples/kfifo/ | |
| 9418 | + | |
| 9419 | 9419 | KGDB / KDB /debug_core |
| 9420 | 9420 | M: Jason Wessel <jason.wessel@windriver.com> |
| 9421 | 9421 | M: Daniel Thompson <daniel.thompson@linaro.org> |
| @@ -10067,7 +10067,7 @@ MAC80211 · 645 unmodified lines | ||
| 10067 | 10067 | M: Johannes Berg <johannes@sipsolutions.net> |
| 10068 | 10068 | L: linux-wireless@vger.kernel.org |
| 10069 | 10069 | S: Maintained |
| 10070 | −W: http://wireless.kernel.org/ | |
| 10070 | +W: https://wireless.wiki.kernel.org/ | |
| 10071 | 10071 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git |
| 10072 | 10072 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git |
| 10073 | 10073 | F: Documentation/networking/mac80211-injection.txt |
| @@ -10697,7 +10697,6 @@ MEDIATEK MT76 WIRELESS LAN DRIVER · 623 unmodified lines | ||
| 10697 | 10697 | M: Felix Fietkau <nbd@nbd.name> |
| 10698 | 10698 | M: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com> |
| 10699 | 10699 | R: Ryder Lee <ryder.lee@mediatek.com> |
| 10700 | −R: Roy Luo <royluo@google.com> | |
| 10701 | 10700 | L: linux-wireless@vger.kernel.org |
| 10702 | 10701 | S: Maintained |
| 10703 | 10702 | F: drivers/net/wireless/mediatek/mt76/ |
| @@ -12648,7 +12647,7 @@ F: fs/orangefs/ · 1944 unmodified lines | ||
| 12648 | 12647 | ORINOCO DRIVER |
| 12649 | 12648 | L: linux-wireless@vger.kernel.org |
| 12650 | 12649 | S: Orphan |
| 12651 | −W: http://wireless.kernel.org/en/users/Drivers/orinoco | |
| 12650 | +W: https://wireless.wiki.kernel.org/en/users/Drivers/orinoco | |
| 12652 | 12651 | W: http://www.nongnu.org/orinoco/ |
| 12653 | 12652 | F: drivers/net/wireless/intersil/orinoco/ |
| 12654 | 12653 | |
| @@ -12674,7 +12673,7 @@ P54 WIRELESS DRIVER · 19 unmodified lines | ||
| 12674 | 12673 | M: Christian Lamparter <chunkeey@googlemail.com> |
| 12675 | 12674 | L: linux-wireless@vger.kernel.org |
| 12676 | 12675 | S: Maintained |
| 12677 | −W: http://wireless.kernel.org/en/users/Drivers/p54 | |
| 12676 | +W: https://wireless.wiki.kernel.org/en/users/Drivers/p54 | |
| 12678 | 12677 | F: drivers/net/wireless/intersil/p54/ |
| 12679 | 12678 | |
| 12680 | 12679 | PACKING |
| @@ -13042,7 +13041,7 @@ F: drivers/pci/controller/pci-xgene-msi.c · 361 unmodified lines | ||
| 13042 | 13041 | |
| 13043 | 13042 | PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS |
| 13044 | 13043 | M: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> |
| 13045 | −R: Andrew Murray <amurray@thegoodpenguin.co.uk> | |
| 13044 | +R: Rob Herring <robh@kernel.org> | |
| 13046 | 13045 | L: linux-pci@vger.kernel.org |
| 13047 | 13046 | S: Supported |
| 13048 | 13047 | Q: http://patchwork.ozlabs.org/project/linux-pci/list/ |
| @@ -13595,7 +13594,7 @@ PRISM54 WIRELESS DRIVER · 546 unmodified lines | ||
| 13595 | 13594 | M: Luis Chamberlain <mcgrof@kernel.org> |
| 13596 | 13595 | L: linux-wireless@vger.kernel.org |
| 13597 | 13596 | S: Obsolete |
| 13598 | −W: http://wireless.kernel.org/en/users/Drivers/p54 | |
| 13597 | +W: https://wireless.wiki.kernel.org/en/users/Drivers/p54 | |
| 13599 | 13598 | F: drivers/net/wireless/intersil/prism54/ |
| 13600 | 13599 | |
| 13601 | 13600 | PROC FILESYSTEM |
| @@ -13936,7 +13935,7 @@ QUALCOMM ATHEROS ATH10K WIRELESS DRIVER · 334 unmodified lines | ||
| 13936 | 13935 | M: Kalle Valo <kvalo@codeaurora.org> |
| 13937 | 13936 | L: ath10k@lists.infradead.org |
| 13938 | 13937 | S: Supported |
| 13939 | −W: http://wireless.kernel.org/en/users/Drivers/ath10k | |
| 13938 | +W: https://wireless.wiki.kernel.org/en/users/Drivers/ath10k | |
| 13940 | 13939 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git |
| 13941 | 13940 | F: drivers/net/wireless/ath/ath10k/ |
| 13942 | 13941 | |
| @@ -13951,7 +13950,7 @@ QUALCOMM ATHEROS ATH9K WIRELESS DRIVER · 8 unmodified lines | ||
| 13951 | 13950 | M: QCA ath9k Development <ath9k-devel@qca.qualcomm.com> |
| 13952 | 13951 | L: linux-wireless@vger.kernel.org |
| 13953 | 13952 | S: Supported |
| 13954 | −W: http://wireless.kernel.org/en/users/Drivers/ath9k | |
| 13953 | +W: https://wireless.wiki.kernel.org/en/users/Drivers/ath9k | |
| 13955 | 13954 | F: drivers/net/wireless/ath/ath9k/ |
| 13956 | 13955 | |
| 13957 | 13956 | QUALCOMM CAMERA SUBSYSTEM DRIVER |
| @@ -14048,13 +14047,12 @@ QUALCOMM WCN36XX WIRELESS DRIVER · 90 unmodified lines | ||
| 14048 | 14047 | M: Kalle Valo <kvalo@codeaurora.org> |
| 14049 | 14048 | L: wcn36xx@lists.infradead.org |
| 14050 | 14049 | S: Supported |
| 14051 | −W: http://wireless.kernel.org/en/users/Drivers/wcn36xx | |
| 14050 | +W: https://wireless.wiki.kernel.org/en/users/Drivers/wcn36xx | |
| 14052 | 14051 | T: git git://github.com/KrasnikovEugene/wcn36xx.git |
| 14053 | 14052 | F: drivers/net/wireless/ath/wcn36xx/ |
| 14054 | 14053 | |
| 14055 | 14054 | QUANTENNA QTNFMAC WIRELESS DRIVER |
| 14056 | 14055 | M: Igor Mitsyanko <imitsyanko@quantenna.com> |
| 14057 | −M: Avinash Patil <avinashp@quantenna.com> | |
| 14058 | 14056 | M: Sergey Matyukevich <smatyukevich@quantenna.com> |
| 14059 | 14057 | L: linux-wireless@vger.kernel.org |
| 14060 | 14058 | S: Maintained |
| @@ -14096,12 +14094,10 @@ F: drivers/media/radio/radio-tea5777.c · 35 unmodified lines | ||
| 14096 | 14094 | |
| 14097 | 14095 | RADOS BLOCK DEVICE (RBD) |
| 14098 | 14096 | M: Ilya Dryomov <idryomov@gmail.com> |
| 14099 | −M: Sage Weil <sage@redhat.com> | |
| 14100 | 14097 | R: Dongsheng Yang <dongsheng.yang@easystack.cn> |
| 14101 | 14098 | L: ceph-devel@vger.kernel.org |
| 14102 | 14099 | S: Supported |
| 14103 | 14100 | W: http://ceph.com/ |
| 14104 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client.git | |
| 14105 | 14101 | T: git git://github.com/ceph/ceph-client.git |
| 14106 | 14102 | F: Documentation/ABI/testing/sysfs-bus-rbd |
| 14107 | 14103 | F: drivers/block/rbd.c |
| @@ -14276,7 +14272,7 @@ REALTEK WIRELESS DRIVER (rtlwifi family) · 168 unmodified lines | ||
| 14276 | 14272 | M: Ping-Ke Shih <pkshih@realtek.com> |
| 14277 | 14273 | L: linux-wireless@vger.kernel.org |
| 14278 | 14274 | S: Maintained |
| 14279 | −W: http://wireless.kernel.org/ | |
| 14275 | +W: https://wireless.wiki.kernel.org/ | |
| 14280 | 14276 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git |
| 14281 | 14277 | F: drivers/net/wireless/realtek/rtlwifi/ |
| 14282 | 14278 | |
| @@ -14411,7 +14407,7 @@ RFKILL · 128 unmodified lines | ||
| 14411 | 14407 | M: Johannes Berg <johannes@sipsolutions.net> |
| 14412 | 14408 | L: linux-wireless@vger.kernel.org |
| 14413 | 14409 | S: Maintained |
| 14414 | −W: http://wireless.kernel.org/ | |
| 14410 | +W: https://wireless.wiki.kernel.org/ | |
| 14415 | 14411 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git |
| 14416 | 14412 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git |
| 14417 | 14413 | F: Documentation/ABI/stable/sysfs-class-rfkill |
| @@ -14560,7 +14556,7 @@ F: drivers/media/dvb-frontends/rtl2832_sdr* · 142 unmodified lines | ||
| 14560 | 14556 | RTL8180 WIRELESS DRIVER |
| 14561 | 14557 | L: linux-wireless@vger.kernel.org |
| 14562 | 14558 | S: Orphan |
| 14563 | −W: http://wireless.kernel.org/ | |
| 14559 | +W: https://wireless.wiki.kernel.org/ | |
| 14564 | 14560 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git |
| 14565 | 14561 | F: drivers/net/wireless/realtek/rtl818x/rtl8180/ |
| 14566 | 14562 | |
| @@ -14570,7 +14566,7 @@ M: Hin-Tak Leung <htl10@users.sourceforge.net> · 3 unmodified lines | ||
| 14570 | 14566 | M: Larry Finger <Larry.Finger@lwfinger.net> |
| 14571 | 14567 | L: linux-wireless@vger.kernel.org |
| 14572 | 14568 | S: Maintained |
| 14573 | −W: http://wireless.kernel.org/ | |
| 14569 | +W: https://wireless.wiki.kernel.org/ | |
| 14574 | 14570 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git |
| 14575 | 14571 | F: drivers/net/wireless/realtek/rtl818x/rtl8187/ |
| 14576 | 14572 | |
| @@ -16925,8 +16921,8 @@ F: drivers/media/platform/ti-vpe/ · 2348 unmodified lines | ||
| 16925 | 16921 | TI WILINK WIRELESS DRIVERS |
| 16926 | 16922 | L: linux-wireless@vger.kernel.org |
| 16927 | 16923 | S: Orphan |
| 16928 | −W: http://wireless.kernel.org/en/users/Drivers/wl12xx | |
| 16929 | −W: http://wireless.kernel.org/en/users/Drivers/wl1251 | |
| 16924 | +W: https://wireless.wiki.kernel.org/en/users/Drivers/wl12xx | |
| 16925 | +W: https://wireless.wiki.kernel.org/en/users/Drivers/wl1251 | |
| 16930 | 16926 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/luca/wl12xx.git |
| 16931 | 16927 | F: drivers/net/wireless/ti/ |
| 16932 | 16928 | F: include/linux/wl12xx.h |
| @@ -18208,7 +18204,7 @@ M: Maya Erez <merez@codeaurora.org> · 1275 unmodified lines | ||
| 18208 | 18204 | L: linux-wireless@vger.kernel.org |
| 18209 | 18205 | L: wil6210@qti.qualcomm.com |
| 18210 | 18206 | S: Supported |
| 18211 | −W: http://wireless.kernel.org/en/users/Drivers/wil6210 | |
| 18207 | +W: https://wireless.wiki.kernel.org/en/users/Drivers/wil6210 | |
| 18212 | 18208 | F: drivers/net/wireless/ath/wil6210/ |
| 18213 | 18209 | |
| 18214 | 18210 | WIMAX STACK |
| @@ -2,7 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | VERSION = 5 |
| 3 | 3 | PATCHLEVEL = 7 |
| 4 | 4 | SUBLEVEL = 0 |
| 5 | −EXTRAVERSION = -rc2 | |
| 5 | +EXTRAVERSION = -rc5 | |
| 6 | 6 | NAME = Kleptomaniac Octopus |
| 7 | 7 | |
| 8 | 8 | # *DOCUMENTATION* |
| @@ -729,10 +729,6 @@ else ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE · 720 unmodified lines | ||
| 729 | 729 | KBUILD_CFLAGS += -Os |
| 730 | 730 | endif |
| 731 | 731 | |
| 732 | −ifdef CONFIG_CC_DISABLE_WARN_MAYBE_UNINITIALIZED | |
| 733 | −KBUILD_CFLAGS += -Wno-maybe-uninitialized | |
| 734 | −endif | |
| 735 | − | |
| 736 | 732 | # Tell gcc to never replace conditional load with a non-conditional one |
| 737 | 733 | KBUILD_CFLAGS += $(call cc-option,--param=allow-store-data-races=0) |
| 738 | 734 | KBUILD_CFLAGS += $(call cc-option,-fno-allow-store-data-races) |
| @@ -881,6 +877,17 @@ KBUILD_CFLAGS += -Wno-pointer-sign · 142 unmodified lines | ||
| 881 | 877 | # disable stringop warnings in gcc 8+ |
| 882 | 878 | KBUILD_CFLAGS += $(call cc-disable-warning, stringop-truncation) |
| 883 | 879 | |
| 880 | +# We'll want to enable this eventually, but it's not going away for 5.7 at least | |
| 881 | +KBUILD_CFLAGS += $(call cc-disable-warning, zero-length-bounds) | |
| 882 | +KBUILD_CFLAGS += $(call cc-disable-warning, array-bounds) | |
| 883 | +KBUILD_CFLAGS += $(call cc-disable-warning, stringop-overflow) | |
| 884 | + | |
| 885 | +# Another good warning that we'll want to enable eventually | |
| 886 | +KBUILD_CFLAGS += $(call cc-disable-warning, restrict) | |
| 887 | + | |
| 888 | +# Enabled with W=2, disabled by default as noisy | |
| 889 | +KBUILD_CFLAGS += $(call cc-disable-warning, maybe-uninitialized) | |
| 890 | + | |
| 884 | 891 | # disable invalid "can't wrap" optimizations for signed / pointers |
| 885 | 892 | KBUILD_CFLAGS += $(call cc-option,-fno-strict-overflow) |
| 886 | 893 | |
| @@ -3,7 +3,6 @@ · 2 unmodified lines | ||
| 3 | 3 | * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) |
| 4 | 4 | * |
| 5 | 5 | * Amit Bhor, Sameer Dhavale: Codito Technologies 2004 |
| 6 | − | |
| 7 | 6 | */ |
| 8 | 7 | |
| 9 | 8 | #ifndef _ASM_ARC_MODULE_H |
| @@ -19,8 +18,4 @@ struct mod_arch_specific { · 9 unmodified lines | ||
| 19 | 18 | const char *secstr; |
| 20 | 19 | }; |
| 21 | 20 | |
| 22 | −#define MODULE_PROC_FAMILY "ARC700" | |
| 23 | − | |
| 24 | −#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY | |
| 25 | − | |
| 26 | 21 | #endif /* _ASM_ARC_MODULE_H */ |
| @@ -0,0 +1,8 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0 */ | |
| 2 | + | |
| 3 | +#ifndef _ASM_VERMAGIC_H | |
| 4 | +#define _ASM_VERMAGIC_H | |
| 5 | + | |
| 6 | +#define MODULE_ARCH_VERMAGIC "ARC700" | |
| 7 | + | |
| 8 | +#endif /* _ASM_VERMAGIC_H */ | |
| @@ -14,6 +14,9 @@ · 13 unmodified lines | ||
| 14 | 14 | soc { |
| 15 | 15 | firmware: firmware { |
| 16 | 16 | compatible = "raspberrypi,bcm2835-firmware", "simple-bus"; |
| 17 | + #address-cells = <1>; | |
| 18 | + #size-cells = <1>; | |
| 19 | + | |
| 17 | 20 | mboxes = <&mailbox>; |
| 18 | 21 | dma-ranges; |
| 19 | 22 | }; |
| @@ -372,6 +372,7 @@ · 371 unmodified lines | ||
| 372 | 372 | "dsi0_ddr2", |
| 373 | 373 | "dsi0_ddr"; |
| 374 | 374 | |
| 375 | + status = "disabled"; | |
| 375 | 376 | }; |
| 376 | 377 | |
| 377 | 378 | aux: aux@7e215000 { |
| @@ -341,6 +341,11 @@ · 340 unmodified lines | ||
| 341 | 341 | status = "disabled"; |
| 342 | 342 | }; |
| 343 | 343 | |
| 344 | +/* RNG not directly accessible on N950/N9. */ | |
| 345 | +&rng_target { | |
| 346 | + status = "disabled"; | |
| 347 | +}; | |
| 348 | + | |
| 344 | 349 | &usb_otg_hs { |
| 345 | 350 | interface-type = <0>; |
| 346 | 351 | usb-phy = <&usb2_phy>; |
| @@ -91,9 +91,17 @@ void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src, unsigned int bytes, · 90 unmodified lines | ||
| 91 | 91 | return; |
| 92 | 92 | } |
| 93 | 93 | |
| 94 | − kernel_neon_begin(); | |
| 95 | − chacha_doneon(state, dst, src, bytes, nrounds); | |
| 96 | − kernel_neon_end(); | |
| 94 | + do { | |
| 95 | + unsigned int todo = min_t(unsigned int, bytes, SZ_4K); | |
| 96 | + | |
| 97 | + kernel_neon_begin(); | |
| 98 | + chacha_doneon(state, dst, src, todo, nrounds); | |
| 99 | + kernel_neon_end(); | |
| 100 | + | |
| 101 | + bytes -= todo; | |
| 102 | + src += todo; | |
| 103 | + dst += todo; | |
| 104 | + } while (bytes); | |
| 97 | 105 | } |
| 98 | 106 | EXPORT_SYMBOL(chacha_crypt_arch); |
| 99 | 107 | |
| @@ -30,7 +30,7 @@ static int nhpoly1305_neon_update(struct shash_desc *desc, · 29 unmodified lines | ||
| 30 | 30 | return crypto_nhpoly1305_update(desc, src, srclen); |
| 31 | 31 | |
| 32 | 32 | do { |
| 33 | − unsigned int n = min_t(unsigned int, srclen, PAGE_SIZE); | |
| 33 | + unsigned int n = min_t(unsigned int, srclen, SZ_4K); | |
| 34 | 34 | |
| 35 | 35 | kernel_neon_begin(); |
| 36 | 36 | crypto_nhpoly1305_update_helper(desc, src, n, _nh_neon); |
| @@ -160,13 +160,20 @@ void poly1305_update_arch(struct poly1305_desc_ctx *dctx, const u8 *src, · 159 unmodified lines | ||
| 160 | 160 | unsigned int len = round_down(nbytes, POLY1305_BLOCK_SIZE); |
| 161 | 161 | |
| 162 | 162 | if (static_branch_likely(&have_neon) && do_neon) { |
| 163 | − kernel_neon_begin(); | |
| 164 | − poly1305_blocks_neon(&dctx->h, src, len, 1); | |
| 165 | − kernel_neon_end(); | |
| 163 | + do { | |
| 164 | + unsigned int todo = min_t(unsigned int, len, SZ_4K); | |
| 165 | + | |
| 166 | + kernel_neon_begin(); | |
| 167 | + poly1305_blocks_neon(&dctx->h, src, todo, 1); | |
| 168 | + kernel_neon_end(); | |
| 169 | + | |
| 170 | + len -= todo; | |
| 171 | + src += todo; | |
| 172 | + } while (len); | |
| 166 | 173 | } else { |
| 167 | 174 | poly1305_blocks_arm(&dctx->h, src, len, 1); |
| 175 | + src += len; | |
| 168 | 176 | } |
| 169 | − src += len; | |
| 170 | 177 | nbytes %= POLY1305_BLOCK_SIZE; |
| 171 | 178 | } |
| 172 | 179 | |
| @@ -165,8 +165,13 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr) · 164 unmodified lines | ||
| 165 | 165 | preempt_enable(); |
| 166 | 166 | #endif |
| 167 | 167 | |
| 168 | − if (!ret) | |
| 169 | − *oval = oldval; | |
| 168 | + /* | |
| 169 | + * Store unconditionally. If ret != 0 the extra store is the least | |
| 170 | + * of the worries but GCC cannot figure out that __futex_atomic_op() | |
| 171 | + * is either setting ret to -EFAULT or storing the old value in | |
| 172 | + * oldval which results in a uninitialized warning at the call site. | |
| 173 | + */ | |
| 174 | + *oval = oldval; | |
| 170 | 175 | |
| 171 | 176 | return ret; |
| 172 | 177 | } |
| @@ -37,30 +37,6 @@ struct mod_arch_specific { · 36 unmodified lines | ||
| 37 | 37 | struct module; |
| 38 | 38 | u32 get_module_plt(struct module *mod, unsigned long loc, Elf32_Addr val); |
| 39 | 39 | |
| 40 | −/* | |
| 41 | − * Add the ARM architecture version to the version magic string | |
| 42 | − */ | |
| 43 | −#define MODULE_ARCH_VERMAGIC_ARMVSN "ARMv" __stringify(__LINUX_ARM_ARCH__) " " | |
| 44 | − | |
| 45 | −/* Add __virt_to_phys patching state as well */ | |
| 46 | −#ifdef CONFIG_ARM_PATCH_PHYS_VIRT | |
| 47 | −#define MODULE_ARCH_VERMAGIC_P2V "p2v8 " | |
| 48 | −#else | |
| 49 | −#define MODULE_ARCH_VERMAGIC_P2V "" | |
| 50 | −#endif | |
| 51 | − | |
| 52 | −/* Add instruction set architecture tag to distinguish ARM/Thumb kernels */ | |
| 53 | −#ifdef CONFIG_THUMB2_KERNEL | |
| 54 | −#define MODULE_ARCH_VERMAGIC_ARMTHUMB "thumb2 " | |
| 55 | −#else | |
| 56 | −#define MODULE_ARCH_VERMAGIC_ARMTHUMB "" | |
| 57 | −#endif | |
| 58 | − | |
| 59 | −#define MODULE_ARCH_VERMAGIC \ | |
| 60 | − MODULE_ARCH_VERMAGIC_ARMVSN \ | |
| 61 | − MODULE_ARCH_VERMAGIC_ARMTHUMB \ | |
| 62 | − MODULE_ARCH_VERMAGIC_P2V | |
| 63 | − | |
| 64 | 40 | #ifdef CONFIG_THUMB2_KERNEL |
| 65 | 41 | #define HAVE_ARCH_KALLSYMS_SYMBOL_VALUE |
| 66 | 42 | static inline unsigned long kallsyms_symbol_value(const Elf_Sym *sym) |
| @@ -0,0 +1,31 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0 */ | |
| 2 | +#ifndef _ASM_VERMAGIC_H | |
| 3 | +#define _ASM_VERMAGIC_H | |
| 4 | + | |
| 5 | +#include <linux/stringify.h> | |
| 6 | + | |
| 7 | +/* | |
| 8 | + * Add the ARM architecture version to the version magic string | |
| 9 | + */ | |
| 10 | +#define MODULE_ARCH_VERMAGIC_ARMVSN "ARMv" __stringify(__LINUX_ARM_ARCH__) " " | |
| 11 | + | |
| 12 | +/* Add __virt_to_phys patching state as well */ | |
| 13 | +#ifdef CONFIG_ARM_PATCH_PHYS_VIRT | |
| 14 | +#define MODULE_ARCH_VERMAGIC_P2V "p2v8 " | |
| 15 | +#else | |
| 16 | +#define MODULE_ARCH_VERMAGIC_P2V "" | |
| 17 | +#endif | |
| 18 | + | |
| 19 | +/* Add instruction set architecture tag to distinguish ARM/Thumb kernels */ | |
| 20 | +#ifdef CONFIG_THUMB2_KERNEL | |
| 21 | +#define MODULE_ARCH_VERMAGIC_ARMTHUMB "thumb2 " | |
| 22 | +#else | |
| 23 | +#define MODULE_ARCH_VERMAGIC_ARMTHUMB "" | |
| 24 | +#endif | |
| 25 | + | |
| 26 | +#define MODULE_ARCH_VERMAGIC \ | |
| 27 | + MODULE_ARCH_VERMAGIC_ARMVSN \ | |
| 28 | + MODULE_ARCH_VERMAGIC_ARMTHUMB \ | |
| 29 | + MODULE_ARCH_VERMAGIC_P2V | |
| 30 | + | |
| 31 | +#endif /* _ASM_VERMAGIC_H */ | |
| @@ -91,8 +91,10 @@ AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a · 90 unmodified lines | ||
| 91 | 91 | obj-$(CONFIG_SOC_IMX6) += suspend-imx6.o |
| 92 | 92 | obj-$(CONFIG_SOC_IMX53) += suspend-imx53.o |
| 93 | 93 | endif |
| 94 | +ifeq ($(CONFIG_ARM_CPU_SUSPEND),y) | |
| 94 | 95 | AFLAGS_resume-imx6.o :=-Wa,-march=armv7-a |
| 95 | 96 | obj-$(CONFIG_SOC_IMX6) += resume-imx6.o |
| 97 | +endif | |
| 96 | 98 | obj-$(CONFIG_SOC_IMX6) += pm-imx6.o |
| 97 | 99 | |
| 98 | 100 | obj-$(CONFIG_SOC_IMX1) += mach-imx1.o |
| @@ -87,9 +87,17 @@ void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src, unsigned int bytes, · 86 unmodified lines | ||
| 87 | 87 | !crypto_simd_usable()) |
| 88 | 88 | return chacha_crypt_generic(state, dst, src, bytes, nrounds); |
| 89 | 89 | |
| 90 | − kernel_neon_begin(); | |
| 91 | − chacha_doneon(state, dst, src, bytes, nrounds); | |
| 92 | − kernel_neon_end(); | |
| 90 | + do { | |
| 91 | + unsigned int todo = min_t(unsigned int, bytes, SZ_4K); | |
| 92 | + | |
| 93 | + kernel_neon_begin(); | |
| 94 | + chacha_doneon(state, dst, src, todo, nrounds); | |
| 95 | + kernel_neon_end(); | |
| 96 | + | |
| 97 | + bytes -= todo; | |
| 98 | + src += todo; | |
| 99 | + dst += todo; | |
| 100 | + } while (bytes); | |
| 93 | 101 | } |
| 94 | 102 | EXPORT_SYMBOL(chacha_crypt_arch); |
| 95 | 103 | |
| @@ -30,7 +30,7 @@ static int nhpoly1305_neon_update(struct shash_desc *desc, · 29 unmodified lines | ||
| 30 | 30 | return crypto_nhpoly1305_update(desc, src, srclen); |
| 31 | 31 | |
| 32 | 32 | do { |
| 33 | − unsigned int n = min_t(unsigned int, srclen, PAGE_SIZE); | |
| 33 | + unsigned int n = min_t(unsigned int, srclen, SZ_4K); | |
| 34 | 34 | |
| 35 | 35 | kernel_neon_begin(); |
| 36 | 36 | crypto_nhpoly1305_update_helper(desc, src, n, _nh_neon); |
| @@ -143,13 +143,20 @@ void poly1305_update_arch(struct poly1305_desc_ctx *dctx, const u8 *src, · 142 unmodified lines | ||
| 143 | 143 | unsigned int len = round_down(nbytes, POLY1305_BLOCK_SIZE); |
| 144 | 144 | |
| 145 | 145 | if (static_branch_likely(&have_neon) && crypto_simd_usable()) { |
| 146 | − kernel_neon_begin(); | |
| 147 | − poly1305_blocks_neon(&dctx->h, src, len, 1); | |
| 148 | − kernel_neon_end(); | |
| 146 | + do { | |
| 147 | + unsigned int todo = min_t(unsigned int, len, SZ_4K); | |
| 148 | + | |
| 149 | + kernel_neon_begin(); | |
| 150 | + poly1305_blocks_neon(&dctx->h, src, todo, 1); | |
| 151 | + kernel_neon_end(); | |
| 152 | + | |
| 153 | + len -= todo; | |
| 154 | + src += todo; | |
| 155 | + } while (len); | |
| 149 | 156 | } else { |
| 150 | 157 | poly1305_blocks(&dctx->h, src, len, 1); |
| 158 | + src += len; | |
| 151 | 159 | } |
| 152 | − src += len; | |
| 153 | 160 | nbytes %= POLY1305_BLOCK_SIZE; |
| 154 | 161 | } |
| 155 | 162 | |
| @@ -7,8 +7,6 @@ · 6 unmodified lines | ||
| 7 | 7 | |
| 8 | 8 | #include <asm-generic/module.h> |
| 9 | 9 | |
| 10 | −#define MODULE_ARCH_VERMAGIC "aarch64" | |
| 11 | − | |
| 12 | 10 | #ifdef CONFIG_ARM64_MODULE_PLTS |
| 13 | 11 | struct mod_plt_sec { |
| 14 | 12 | int plt_shndx; |
| @@ -47,7 +47,7 @@ static inline void ptrauth_keys_init_user(struct ptrauth_keys_user *keys) · 46 unmodified lines | ||
| 47 | 47 | get_random_bytes(&keys->apga, sizeof(keys->apga)); |
| 48 | 48 | } |
| 49 | 49 | |
| 50 | −#define __ptrauth_key_install(k, v) \ | |
| 50 | +#define __ptrauth_key_install_nosync(k, v) \ | |
| 51 | 51 | do { \ |
| 52 | 52 | struct ptrauth_key __pki_v = (v); \ |
| 53 | 53 | write_sysreg_s(__pki_v.lo, SYS_ ## k ## KEYLO_EL1); \ |
| @@ -62,8 +62,11 @@ static __always_inline void ptrauth_keys_init_kernel(struct ptrauth_keys_kernel · 8 unmodified lines | ||
| 62 | 62 | |
| 63 | 63 | static __always_inline void ptrauth_keys_switch_kernel(struct ptrauth_keys_kernel *keys) |
| 64 | 64 | { |
| 65 | − if (system_supports_address_auth()) | |
| 66 | − __ptrauth_key_install(APIA, keys->apia); | |
| 65 | + if (!system_supports_address_auth()) | |
| 66 | + return; | |
| 67 | + | |
| 68 | + __ptrauth_key_install_nosync(APIA, keys->apia); | |
| 69 | + isb(); | |
| 67 | 70 | } |
| 68 | 71 | |
| 69 | 72 | extern int ptrauth_prctl_reset_keys(struct task_struct *tsk, unsigned long arg); |
| @@ -0,0 +1,10 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 2 | +/* | |
| 3 | + * Copyright (C) 2012 ARM Ltd. | |
| 4 | + */ | |
| 5 | +#ifndef _ASM_VERMAGIC_H | |
| 6 | +#define _ASM_VERMAGIC_H | |
| 7 | + | |
| 8 | +#define MODULE_ARCH_VERMAGIC "aarch64" | |
| 9 | + | |
| 10 | +#endif /* _ASM_VERMAGIC_H */ | |
| @@ -32,7 +32,7 @@ UBSAN_SANITIZE := n · 31 unmodified lines | ||
| 32 | 32 | OBJECT_FILES_NON_STANDARD := y |
| 33 | 33 | KCOV_INSTRUMENT := n |
| 34 | 34 | |
| 35 | −CFLAGS_vgettimeofday.o = -O2 -mcmodel=tiny | |
| 35 | +CFLAGS_vgettimeofday.o = -O2 -mcmodel=tiny -fasynchronous-unwind-tables | |
| 36 | 36 | |
| 37 | 37 | ifneq ($(c-gettimeofday-y),) |
| 38 | 38 | CFLAGS_vgettimeofday.o += -include $(c-gettimeofday-y) |
| @@ -200,6 +200,13 @@ static int set_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) · 199 unmodified lines | ||
| 200 | 200 | } |
| 201 | 201 | |
| 202 | 202 | memcpy((u32 *)regs + off, valp, KVM_REG_SIZE(reg->id)); |
| 203 | + | |
| 204 | + if (*vcpu_cpsr(vcpu) & PSR_MODE32_BIT) { | |
| 205 | + int i; | |
| 206 | + | |
| 207 | + for (i = 0; i < 16; i++) | |
| 208 | + *vcpu_reg32(vcpu, i) = (u32)*vcpu_reg32(vcpu, i); | |
| 209 | + } | |
| 203 | 210 | out: |
| 204 | 211 | return err; |
| 205 | 212 | } |
| @@ -18,6 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | #define CPU_GP_REG_OFFSET(x) (CPU_GP_REGS + x) |
| 20 | 20 | #define CPU_XREG_OFFSET(x) CPU_GP_REG_OFFSET(CPU_USER_PT_REGS + 8*x) |
| 21 | +#define CPU_SP_EL0_OFFSET (CPU_XREG_OFFSET(30) + 8) | |
| 21 | 22 | |
| 22 | 23 | .text |
| 23 | 24 | .pushsection .hyp.text, "ax" |
| @@ -47,6 +48,16 @@ · 23 unmodified lines | ||
| 47 | 48 | ldp x29, lr, [\ctxt, #CPU_XREG_OFFSET(29)] |
| 48 | 49 | .endm |
| 49 | 50 | |
| 51 | +.macro save_sp_el0 ctxt, tmp | |
| 52 | + mrs \tmp, sp_el0 | |
| 53 | + str \tmp, [\ctxt, #CPU_SP_EL0_OFFSET] | |
| 54 | +.endm | |
| 55 | + | |
| 56 | +.macro restore_sp_el0 ctxt, tmp | |
| 57 | + ldr \tmp, [\ctxt, #CPU_SP_EL0_OFFSET] | |
| 58 | + msr sp_el0, \tmp | |
| 59 | +.endm | |
| 60 | + | |
| 50 | 61 | /* |
| 51 | 62 | * u64 __guest_enter(struct kvm_vcpu *vcpu, |
| 52 | 63 | * struct kvm_cpu_context *host_ctxt); |
| @@ -60,6 +71,9 @@ SYM_FUNC_START(__guest_enter) · 7 unmodified lines | ||
| 60 | 71 | // Store the host regs |
| 61 | 72 | save_callee_saved_regs x1 |
| 62 | 73 | |
| 74 | + // Save the host's sp_el0 | |
| 75 | + save_sp_el0 x1, x2 | |
| 76 | + | |
| 63 | 77 | // Now the host state is stored if we have a pending RAS SError it must |
| 64 | 78 | // affect the host. If any asynchronous exception is pending we defer |
| 65 | 79 | // the guest entry. The DSB isn't necessary before v8.2 as any SError |
| @@ -83,6 +97,9 @@ alternative_else_nop_endif · 17 unmodified lines | ||
| 83 | 97 | // when this feature is enabled for kernel code. |
| 84 | 98 | ptrauth_switch_to_guest x29, x0, x1, x2 |
| 85 | 99 | |
| 100 | + // Restore the guest's sp_el0 | |
| 101 | + restore_sp_el0 x29, x0 | |
| 102 | + | |
| 86 | 103 | // Restore guest regs x0-x17 |
| 87 | 104 | ldp x0, x1, [x29, #CPU_XREG_OFFSET(0)] |
| 88 | 105 | ldp x2, x3, [x29, #CPU_XREG_OFFSET(2)] |
| @@ -130,6 +147,9 @@ SYM_INNER_LABEL(__guest_exit, SYM_L_GLOBAL) · 41 unmodified lines | ||
| 130 | 147 | // Store the guest regs x18-x29, lr |
| 131 | 148 | save_callee_saved_regs x1 |
| 132 | 149 | |
| 150 | + // Store the guest's sp_el0 | |
| 151 | + save_sp_el0 x1, x2 | |
| 152 | + | |
| 133 | 153 | get_host_ctxt x2, x3 |
| 134 | 154 | |
| 135 | 155 | // Macro ptrauth_switch_to_guest format: |
| @@ -139,6 +159,9 @@ SYM_INNER_LABEL(__guest_exit, SYM_L_GLOBAL) · 3 unmodified lines | ||
| 139 | 159 | // when this feature is enabled for kernel code. |
| 140 | 160 | ptrauth_switch_to_host x1, x2, x3, x4, x5 |
| 141 | 161 | |
| 162 | + // Restore the hosts's sp_el0 | |
| 163 | + restore_sp_el0 x2, x3 | |
| 164 | + | |
| 142 | 165 | // Now restore the host regs |
| 143 | 166 | restore_callee_saved_regs x2 |
| 144 | 167 | |
| @@ -198,7 +198,6 @@ SYM_CODE_END(__hyp_panic) · 197 unmodified lines | ||
| 198 | 198 | .macro invalid_vector label, target = __hyp_panic |
| 199 | 199 | .align 2 |
| 200 | 200 | SYM_CODE_START(\label) |
| 201 | −\label: | |
| 202 | 201 | b \target |
| 203 | 202 | SYM_CODE_END(\label) |
| 204 | 203 | .endm |
| @@ -15,8 +15,9 @@ · 14 unmodified lines | ||
| 15 | 15 | /* |
| 16 | 16 | * Non-VHE: Both host and guest must save everything. |
| 17 | 17 | * |
| 18 | − * VHE: Host and guest must save mdscr_el1 and sp_el0 (and the PC and pstate, | |
| 19 | − * which are handled as part of the el2 return state) on every switch. | |
| 18 | + * VHE: Host and guest must save mdscr_el1 and sp_el0 (and the PC and | |
| 19 | + * pstate, which are handled as part of the el2 return state) on every | |
| 20 | + * switch (sp_el0 is being dealt with in the assembly code). | |
| 20 | 21 | * tpidr_el0 and tpidrro_el0 only need to be switched when going |
| 21 | 22 | * to host userspace or a different VCPU. EL1 registers only need to be |
| 22 | 23 | * switched when potentially going to run a different VCPU. The latter two |
| @@ -26,12 +27,6 @@ · 3 unmodified lines | ||
| 26 | 27 | static void __hyp_text __sysreg_save_common_state(struct kvm_cpu_context *ctxt) |
| 27 | 28 | { |
| 28 | 29 | ctxt->sys_regs[MDSCR_EL1] = read_sysreg(mdscr_el1); |
| 29 | − | |
| 30 | − /* | |
| 31 | − * The host arm64 Linux uses sp_el0 to point to 'current' and it must | |
| 32 | − * therefore be saved/restored on every entry/exit to/from the guest. | |
| 33 | − */ | |
| 34 | − ctxt->gp_regs.regs.sp = read_sysreg(sp_el0); | |
| 35 | 30 | } |
| 36 | 31 | |
| 37 | 32 | static void __hyp_text __sysreg_save_user_state(struct kvm_cpu_context *ctxt) |
| @@ -99,12 +94,6 @@ NOKPROBE_SYMBOL(sysreg_save_guest_state_vhe); · 61 unmodified lines | ||
| 99 | 94 | static void __hyp_text __sysreg_restore_common_state(struct kvm_cpu_context *ctxt) |
| 100 | 95 | { |
| 101 | 96 | write_sysreg(ctxt->sys_regs[MDSCR_EL1], mdscr_el1); |
| 102 | − | |
| 103 | − /* | |
| 104 | − * The host arm64 Linux uses sp_el0 to point to 'current' and it must | |
| 105 | − * therefore be saved/restored on every entry/exit to/from the guest. | |
| 106 | − */ | |
| 107 | − write_sysreg(ctxt->gp_regs.regs.sp, sp_el0); | |
| 108 | 97 | } |
| 109 | 98 | |
| 110 | 99 | static void __hyp_text __sysreg_restore_user_state(struct kvm_cpu_context *ctxt) |
| @@ -230,6 +230,8 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, · 229 unmodified lines | ||
| 230 | 230 | ptep = (pte_t *)pudp; |
| 231 | 231 | } else if (sz == (CONT_PTE_SIZE)) { |
| 232 | 232 | pmdp = pmd_alloc(mm, pudp, addr); |
| 233 | + if (!pmdp) | |
| 234 | + return NULL; | |
| 233 | 235 | |
| 234 | 236 | WARN_ON(addr & (sz - 1)); |
| 235 | 237 | /* |
| @@ -0,0 +1,2 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only | |
| 2 | +vmlinux.lds | |
| @@ -3,11 +3,11 @@ · 2 unmodified lines | ||
| 3 | 3 | * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. |
| 4 | 4 | */ |
| 5 | 5 | |
| 6 | −#ifndef _ASM_MODULE_H | |
| 7 | −#define _ASM_MODULE_H | |
| 6 | +#ifndef _ASM_VERMAGIC_H | |
| 7 | +#define _ASM_VERMAGIC_H | |
| 8 | 8 | |
| 9 | −#include <asm-generic/module.h> | |
| 9 | +#include <linux/stringify.h> | |
| 10 | 10 | |
| 11 | 11 | #define MODULE_ARCH_VERMAGIC __stringify(PROCESSOR_MODEL_NAME) " " |
| 12 | 12 | |
| 13 | −#endif | |
| 13 | +#endif /* _ASM_VERMAGIC_H */ | |
| @@ -26,10 +26,6 @@ struct mod_arch_specific { · 25 unmodified lines | ||
| 26 | 26 | unsigned int next_got_entry; /* index of next available got entry */ |
| 27 | 27 | }; |
| 28 | 28 | |
| 29 | −#define MODULE_PROC_FAMILY "ia64" | |
| 30 | −#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY \ | |
| 31 | − "gcc-" __stringify(__GNUC__) "." __stringify(__GNUC_MINOR__) | |
| 32 | − | |
| 33 | 29 | #define ARCH_SHF_SMALL SHF_IA_64_SHORT |
| 34 | 30 | |
| 35 | 31 | #endif /* _ASM_IA64_MODULE_H */ |
| @@ -0,0 +1,15 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0 */ | |
| 2 | +/* | |
| 3 | + * Copyright (C) 2003 Hewlett-Packard Co | |
| 4 | + * David Mosberger-Tang <davidm@hpl.hp.com> | |
| 5 | + */ | |
| 6 | + | |
| 7 | +#ifndef _ASM_VERMAGIC_H | |
| 8 | +#define _ASM_VERMAGIC_H | |
| 9 | + | |
| 10 | +#include <linux/stringify.h> | |
| 11 | + | |
| 12 | +#define MODULE_ARCH_VERMAGIC "ia64" \ | |
| 13 | + "gcc-" __stringify(__GNUC__) "." __stringify(__GNUC_MINOR__) | |
| 14 | + | |
| 15 | +#endif /* _ASM_VERMAGIC_H */ | |
| @@ -83,65 +83,4 @@ search_module_dbetables(unsigned long addr) · 82 unmodified lines | ||
| 83 | 83 | } |
| 84 | 84 | #endif |
| 85 | 85 | |
| 86 | −#ifdef CONFIG_CPU_BMIPS | |
| 87 | −#define MODULE_PROC_FAMILY "BMIPS " | |
| 88 | −#elif defined CONFIG_CPU_MIPS32_R1 | |
| 89 | −#define MODULE_PROC_FAMILY "MIPS32_R1 " | |
| 90 | −#elif defined CONFIG_CPU_MIPS32_R2 | |
| 91 | −#define MODULE_PROC_FAMILY "MIPS32_R2 " | |
| 92 | −#elif defined CONFIG_CPU_MIPS32_R6 | |
| 93 | −#define MODULE_PROC_FAMILY "MIPS32_R6 " | |
| 94 | −#elif defined CONFIG_CPU_MIPS64_R1 | |
| 95 | −#define MODULE_PROC_FAMILY "MIPS64_R1 " | |
| 96 | −#elif defined CONFIG_CPU_MIPS64_R2 | |
| 97 | −#define MODULE_PROC_FAMILY "MIPS64_R2 " | |
| 98 | −#elif defined CONFIG_CPU_MIPS64_R6 | |
| 99 | −#define MODULE_PROC_FAMILY "MIPS64_R6 " | |
| 100 | −#elif defined CONFIG_CPU_R3000 | |
| 101 | −#define MODULE_PROC_FAMILY "R3000 " | |
| 102 | −#elif defined CONFIG_CPU_TX39XX | |
| 103 | −#define MODULE_PROC_FAMILY "TX39XX " | |
| 104 | −#elif defined CONFIG_CPU_VR41XX | |
| 105 | −#define MODULE_PROC_FAMILY "VR41XX " | |
| 106 | −#elif defined CONFIG_CPU_R4X00 | |
| 107 | −#define MODULE_PROC_FAMILY "R4X00 " | |
| 108 | −#elif defined CONFIG_CPU_TX49XX | |
| 109 | −#define MODULE_PROC_FAMILY "TX49XX " | |
| 110 | −#elif defined CONFIG_CPU_R5000 | |
| 111 | −#define MODULE_PROC_FAMILY "R5000 " | |
| 112 | −#elif defined CONFIG_CPU_R5500 | |
| 113 | −#define MODULE_PROC_FAMILY "R5500 " | |
| 114 | −#elif defined CONFIG_CPU_NEVADA | |
| 115 | −#define MODULE_PROC_FAMILY "NEVADA " | |
| 116 | −#elif defined CONFIG_CPU_R10000 | |
| 117 | −#define MODULE_PROC_FAMILY "R10000 " | |
| 118 | −#elif defined CONFIG_CPU_RM7000 | |
| 119 | −#define MODULE_PROC_FAMILY "RM7000 " | |
| 120 | −#elif defined CONFIG_CPU_SB1 | |
| 121 | −#define MODULE_PROC_FAMILY "SB1 " | |
| 122 | −#elif defined CONFIG_CPU_LOONGSON32 | |
| 123 | −#define MODULE_PROC_FAMILY "LOONGSON32 " | |
| 124 | −#elif defined CONFIG_CPU_LOONGSON2EF | |
| 125 | −#define MODULE_PROC_FAMILY "LOONGSON2EF " | |
| 126 | −#elif defined CONFIG_CPU_LOONGSON64 | |
| 127 | −#define MODULE_PROC_FAMILY "LOONGSON64 " | |
| 128 | −#elif defined CONFIG_CPU_CAVIUM_OCTEON | |
| 129 | −#define MODULE_PROC_FAMILY "OCTEON " | |
| 130 | −#elif defined CONFIG_CPU_XLR | |
| 131 | −#define MODULE_PROC_FAMILY "XLR " | |
| 132 | −#elif defined CONFIG_CPU_XLP | |
| 133 | −#define MODULE_PROC_FAMILY "XLP " | |
| 134 | −#else | |
| 135 | −#error MODULE_PROC_FAMILY undefined for your processor configuration | |
| 136 | −#endif | |
| 137 | − | |
| 138 | −#ifdef CONFIG_32BIT | |
| 139 | −#define MODULE_KERNEL_TYPE "32BIT " | |
| 140 | −#elif defined CONFIG_64BIT | |
| 141 | −#define MODULE_KERNEL_TYPE "64BIT " | |
| 142 | −#endif | |
| 143 | − | |
| 144 | −#define MODULE_ARCH_VERMAGIC \ | |
| 145 | − MODULE_PROC_FAMILY MODULE_KERNEL_TYPE | |
| 146 | − | |
| 147 | 86 | #endif /* _ASM_MODULE_H */ |
| @@ -0,0 +1,66 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0 */ | |
| 2 | +#ifndef _ASM_VERMAGIC_H | |
| 3 | +#define _ASM_VERMAGIC_H | |
| 4 | + | |
| 5 | +#ifdef CONFIG_CPU_BMIPS | |
| 6 | +#define MODULE_PROC_FAMILY "BMIPS " | |
| 7 | +#elif defined CONFIG_CPU_MIPS32_R1 | |
| 8 | +#define MODULE_PROC_FAMILY "MIPS32_R1 " | |
| 9 | +#elif defined CONFIG_CPU_MIPS32_R2 | |
| 10 | +#define MODULE_PROC_FAMILY "MIPS32_R2 " | |
| 11 | +#elif defined CONFIG_CPU_MIPS32_R6 | |
| 12 | +#define MODULE_PROC_FAMILY "MIPS32_R6 " | |
| 13 | +#elif defined CONFIG_CPU_MIPS64_R1 | |
| 14 | +#define MODULE_PROC_FAMILY "MIPS64_R1 " | |
| 15 | +#elif defined CONFIG_CPU_MIPS64_R2 | |
| 16 | +#define MODULE_PROC_FAMILY "MIPS64_R2 " | |
| 17 | +#elif defined CONFIG_CPU_MIPS64_R6 | |
| 18 | +#define MODULE_PROC_FAMILY "MIPS64_R6 " | |
| 19 | +#elif defined CONFIG_CPU_R3000 | |
| 20 | +#define MODULE_PROC_FAMILY "R3000 " | |
| 21 | +#elif defined CONFIG_CPU_TX39XX | |
| 22 | +#define MODULE_PROC_FAMILY "TX39XX " | |
| 23 | +#elif defined CONFIG_CPU_VR41XX | |
| 24 | +#define MODULE_PROC_FAMILY "VR41XX " | |
| 25 | +#elif defined CONFIG_CPU_R4X00 | |
| 26 | +#define MODULE_PROC_FAMILY "R4X00 " | |
| 27 | +#elif defined CONFIG_CPU_TX49XX | |
| 28 | +#define MODULE_PROC_FAMILY "TX49XX " | |
| 29 | +#elif defined CONFIG_CPU_R5000 | |
| 30 | +#define MODULE_PROC_FAMILY "R5000 " | |
| 31 | +#elif defined CONFIG_CPU_R5500 | |
| 32 | +#define MODULE_PROC_FAMILY "R5500 " | |
| 33 | +#elif defined CONFIG_CPU_NEVADA | |
| 34 | +#define MODULE_PROC_FAMILY "NEVADA " | |
| 35 | +#elif defined CONFIG_CPU_R10000 | |
| 36 | +#define MODULE_PROC_FAMILY "R10000 " | |
| 37 | +#elif defined CONFIG_CPU_RM7000 | |
| 38 | +#define MODULE_PROC_FAMILY "RM7000 " | |
| 39 | +#elif defined CONFIG_CPU_SB1 | |
| 40 | +#define MODULE_PROC_FAMILY "SB1 " | |
| 41 | +#elif defined CONFIG_CPU_LOONGSON32 | |
| 42 | +#define MODULE_PROC_FAMILY "LOONGSON32 " | |
| 43 | +#elif defined CONFIG_CPU_LOONGSON2EF | |
| 44 | +#define MODULE_PROC_FAMILY "LOONGSON2EF " | |
| 45 | +#elif defined CONFIG_CPU_LOONGSON64 | |
| 46 | +#define MODULE_PROC_FAMILY "LOONGSON64 " | |
| 47 | +#elif defined CONFIG_CPU_CAVIUM_OCTEON | |
| 48 | +#define MODULE_PROC_FAMILY "OCTEON " | |
| 49 | +#elif defined CONFIG_CPU_XLR | |
| 50 | +#define MODULE_PROC_FAMILY "XLR " | |
| 51 | +#elif defined CONFIG_CPU_XLP | |
| 52 | +#define MODULE_PROC_FAMILY "XLP " | |
| 53 | +#else | |
| 54 | +#error MODULE_PROC_FAMILY undefined for your processor configuration | |
| 55 | +#endif | |
| 56 | + | |
| 57 | +#ifdef CONFIG_32BIT | |
| 58 | +#define MODULE_KERNEL_TYPE "32BIT " | |
| 59 | +#elif defined CONFIG_64BIT | |
| 60 | +#define MODULE_KERNEL_TYPE "64BIT " | |
| 61 | +#endif | |
| 62 | + | |
| 63 | +#define MODULE_ARCH_VERMAGIC \ | |
| 64 | + MODULE_PROC_FAMILY MODULE_KERNEL_TYPE | |
| 65 | + | |
| 66 | +#endif /* _ASM_VERMAGIC_H */ | |
| @@ -1,11 +1,9 @@ | ||
| 1 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | 2 | // Copyright (C) 2005-2017 Andes Technology Corporation |
| 3 | 3 | |
| 4 | −#ifndef _ASM_NDS32_MODULE_H | |
| 5 | −#define _ASM_NDS32_MODULE_H | |
| 6 | − | |
| 7 | −#include <asm-generic/module.h> | |
| 4 | +#ifndef _ASM_VERMAGIC_H | |
| 5 | +#define _ASM_VERMAGIC_H | |
| 8 | 6 | |
| 9 | 7 | #define MODULE_ARCH_VERMAGIC "NDS32v3" |
| 10 | 8 | |
| 11 | −#endif /* _ASM_NDS32_MODULE_H */ | |
| 9 | +#endif /* _ASM_VERMAGIC_H */ | |
| @@ -3,28 +3,10 @@ · 2 unmodified lines | ||
| 3 | 3 | #define _ASM_POWERPC_MODULE_H |
| 4 | 4 | #ifdef __KERNEL__ |
| 5 | 5 | |
| 6 | −/* | |
| 7 | − */ | |
| 8 | − | |
| 9 | 6 | #include <linux/list.h> |
| 10 | 7 | #include <asm/bug.h> |
| 11 | 8 | #include <asm-generic/module.h> |
| 12 | 9 | |
| 13 | − | |
| 14 | −#ifdef CONFIG_MPROFILE_KERNEL | |
| 15 | −#define MODULE_ARCH_VERMAGIC_FTRACE "mprofile-kernel " | |
| 16 | −#else | |
| 17 | −#define MODULE_ARCH_VERMAGIC_FTRACE "" | |
| 18 | −#endif | |
| 19 | − | |
| 20 | −#ifdef CONFIG_RELOCATABLE | |
| 21 | −#define MODULE_ARCH_VERMAGIC_RELOCATABLE "relocatable " | |
| 22 | −#else | |
| 23 | −#define MODULE_ARCH_VERMAGIC_RELOCATABLE "" | |
| 24 | −#endif | |
| 25 | − | |
| 26 | −#define MODULE_ARCH_VERMAGIC MODULE_ARCH_VERMAGIC_FTRACE MODULE_ARCH_VERMAGIC_RELOCATABLE | |
| 27 | − | |
| 28 | 10 | #ifndef __powerpc64__ |
| 29 | 11 | /* |
| 30 | 12 | * Thanks to Paul M for explaining this. |
| @@ -0,0 +1,20 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0 */ | |
| 2 | +#ifndef _ASM_VERMAGIC_H | |
| 3 | +#define _ASM_VERMAGIC_H | |
| 4 | + | |
| 5 | +#ifdef CONFIG_MPROFILE_KERNEL | |
| 6 | +#define MODULE_ARCH_VERMAGIC_FTRACE "mprofile-kernel " | |
| 7 | +#else | |
| 8 | +#define MODULE_ARCH_VERMAGIC_FTRACE "" | |
| 9 | +#endif | |
| 10 | + | |
| 11 | +#ifdef CONFIG_RELOCATABLE | |
| 12 | +#define MODULE_ARCH_VERMAGIC_RELOCATABLE "relocatable " | |
| 13 | +#else | |
| 14 | +#define MODULE_ARCH_VERMAGIC_RELOCATABLE "" | |
| 15 | +#endif | |
| 16 | + | |
| 17 | +#define MODULE_ARCH_VERMAGIC \ | |
| 18 | + MODULE_ARCH_VERMAGIC_FTRACE MODULE_ARCH_VERMAGIC_RELOCATABLE | |
| 19 | + | |
| 20 | +#endif /* _ASM_VERMAGIC_H */ | |
| @@ -732,7 +732,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_SPE) · 731 unmodified lines | ||
| 732 | 732 | stw r10,_CCR(r1) |
| 733 | 733 | stw r1,KSP(r3) /* Set old stack pointer */ |
| 734 | 734 | |
| 735 | − kuap_check r2, r4 | |
| 735 | + kuap_check r2, r0 | |
| 736 | 736 | #ifdef CONFIG_SMP |
| 737 | 737 | /* We need a sync somewhere here to make sure that if the |
| 738 | 738 | * previous task gets rescheduled on another CPU, it sees all |
| @@ -534,6 +534,8 @@ static bool __init parse_cache_info(struct device_node *np, · 533 unmodified lines | ||
| 534 | 534 | lsizep = of_get_property(np, propnames[3], NULL); |
| 535 | 535 | if (bsizep == NULL) |
| 536 | 536 | bsizep = lsizep; |
| 537 | + if (lsizep == NULL) | |
| 538 | + lsizep = bsizep; | |
| 537 | 539 | if (lsizep != NULL) |
| 538 | 540 | lsize = be32_to_cpu(*lsizep); |
| 539 | 541 | if (bsizep != NULL) |
| @@ -90,6 +90,7 @@ SECTIONS · 89 unmodified lines | ||
| 90 | 90 | #ifdef CONFIG_PPC64 |
| 91 | 91 | *(.tramp.ftrace.text); |
| 92 | 92 | #endif |
| 93 | + NOINSTR_TEXT | |
| 93 | 94 | SCHED_TEXT |
| 94 | 95 | CPUIDLE_TEXT |
| 95 | 96 | LOCK_TEXT |
| @@ -604,18 +604,19 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu, · 603 unmodified lines | ||
| 604 | 604 | */ |
| 605 | 605 | local_irq_disable(); |
| 606 | 606 | ptep = __find_linux_pte(vcpu->arch.pgdir, hva, NULL, &shift); |
| 607 | + pte = __pte(0); | |
| 608 | + if (ptep) | |
| 609 | + pte = *ptep; | |
| 610 | + local_irq_enable(); | |
| 607 | 611 | /* |
| 608 | 612 | * If the PTE disappeared temporarily due to a THP |
| 609 | 613 | * collapse, just return and let the guest try again. |
| 610 | 614 | */ |
| 611 | − if (!ptep) { | |
| 612 | − local_irq_enable(); | |
| 615 | + if (!pte_present(pte)) { | |
| 613 | 616 | if (page) |
| 614 | 617 | put_page(page); |
| 615 | 618 | return RESUME_GUEST; |
| 616 | 619 | } |
| 617 | − pte = *ptep; | |
| 618 | − local_irq_enable(); | |
| 619 | 620 | hpa = pte_pfn(pte) << PAGE_SHIFT; |
| 620 | 621 | pte_size = PAGE_SIZE; |
| 621 | 622 | if (shift) |
| @@ -815,18 +815,19 @@ int kvmppc_book3s_instantiate_page(struct kvm_vcpu *vcpu, · 814 unmodified lines | ||
| 815 | 815 | */ |
| 816 | 816 | local_irq_disable(); |
| 817 | 817 | ptep = __find_linux_pte(vcpu->arch.pgdir, hva, NULL, &shift); |
| 818 | + pte = __pte(0); | |
| 819 | + if (ptep) | |
| 820 | + pte = *ptep; | |
| 821 | + local_irq_enable(); | |
| 818 | 822 | /* |
| 819 | 823 | * If the PTE disappeared temporarily due to a THP |
| 820 | 824 | * collapse, just return and let the guest try again. |
| 821 | 825 | */ |
| 822 | − if (!ptep) { | |
| 823 | − local_irq_enable(); | |
| 826 | + if (!pte_present(pte)) { | |
| 824 | 827 | if (page) |
| 825 | 828 | put_page(page); |
| 826 | 829 | return RESUME_GUEST; |
| 827 | 830 | } |
| 828 | − pte = *ptep; | |
| 829 | − local_irq_enable(); | |
| 830 | 831 | |
| 831 | 832 | /* If we're logging dirty pages, always map single pages */ |
| 832 | 833 | large_enable = !(memslot->flags & KVM_MEM_LOG_DIRTY_PAGES); |
| @@ -521,6 +521,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) · 520 unmodified lines | ||
| 521 | 521 | case KVM_CAP_IOEVENTFD: |
| 522 | 522 | case KVM_CAP_DEVICE_CTRL: |
| 523 | 523 | case KVM_CAP_IMMEDIATE_EXIT: |
| 524 | + case KVM_CAP_SET_GUEST_DEBUG: | |
| 524 | 525 | r = 1; |
| 525 | 526 | break; |
| 526 | 527 | case KVM_CAP_PPC_GUEST_DEBUG_SSTEP: |
| @@ -185,6 +185,7 @@ void mmu_mark_initmem_nx(void) · 184 unmodified lines | ||
| 185 | 185 | mmu_mapin_ram_chunk(etext8, einittext8, PAGE_KERNEL); |
| 186 | 186 | } |
| 187 | 187 | } |
| 188 | + _tlbil_all(); | |
| 188 | 189 | } |
| 189 | 190 | |
| 190 | 191 | #ifdef CONFIG_STRICT_KERNEL_RWX |
| @@ -199,6 +200,8 @@ void mmu_mark_rodata_ro(void) · 8 unmodified lines | ||
| 199 | 200 | ~(LARGE_PAGE_SIZE_8M - 1))); |
| 200 | 201 | mmu_patch_addis(&patch__dtlbmiss_romem_top, -__pa(_sinittext)); |
| 201 | 202 | |
| 203 | + _tlbil_all(); | |
| 204 | + | |
| 202 | 205 | /* Update page tables for PTDUMP and BDI */ |
| 203 | 206 | mmu_mapin_ram_chunk(0, sinittext, __pgprot(0)); |
| 204 | 207 | mmu_mapin_ram_chunk(0, etext, PAGE_KERNEL_ROX); |
| @@ -397,7 +397,7 @@ config PPC_KUAP · 396 unmodified lines | ||
| 397 | 397 | |
| 398 | 398 | config PPC_KUAP_DEBUG |
| 399 | 399 | bool "Extra debugging for Kernel Userspace Access Protection" |
| 400 | − depends on PPC_KUAP && (PPC_RADIX_MMU || PPC_32) | |
| 400 | + depends on PPC_KUAP && (PPC_RADIX_MMU || PPC32) | |
| 401 | 401 | help |
| 402 | 402 | Add extra debugging for Kernel Userspace Access Protection (KUAP) |
| 403 | 403 | If you're unsure, say N. |
| @@ -60,7 +60,7 @@ config RISCV · 59 unmodified lines | ||
| 60 | 60 | select ARCH_HAS_GIGANTIC_PAGE |
| 61 | 61 | select ARCH_HAS_SET_DIRECT_MAP |
| 62 | 62 | select ARCH_HAS_SET_MEMORY |
| 63 | − select ARCH_HAS_STRICT_KERNEL_RWX | |
| 63 | + select ARCH_HAS_STRICT_KERNEL_RWX if MMU | |
| 64 | 64 | select ARCH_WANT_HUGE_PMD_SHARE if 64BIT |
| 65 | 65 | select SPARSEMEM_STATIC if 32BIT |
| 66 | 66 | select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU |
| @@ -51,13 +51,10 @@ · 50 unmodified lines | ||
| 51 | 51 | #define CAUSE_IRQ_FLAG (_AC(1, UL) << (__riscv_xlen - 1)) |
| 52 | 52 | |
| 53 | 53 | /* Interrupt causes (minus the high bit) */ |
| 54 | −#define IRQ_U_SOFT 0 | |
| 55 | 54 | #define IRQ_S_SOFT 1 |
| 56 | 55 | #define IRQ_M_SOFT 3 |
| 57 | −#define IRQ_U_TIMER 4 | |
| 58 | 56 | #define IRQ_S_TIMER 5 |
| 59 | 57 | #define IRQ_M_TIMER 7 |
| 60 | −#define IRQ_U_EXT 8 | |
| 61 | 58 | #define IRQ_S_EXT 9 |
| 62 | 59 | #define IRQ_M_EXT 11 |
| 63 | 60 | |
| @@ -8,6 +8,7 @@ · 7 unmodified lines | ||
| 8 | 8 | #ifndef _ASM_RISCV_HWCAP_H |
| 9 | 9 | #define _ASM_RISCV_HWCAP_H |
| 10 | 10 | |
| 11 | +#include <linux/bits.h> | |
| 11 | 12 | #include <uapi/asm/hwcap.h> |
| 12 | 13 | |
| 13 | 14 | #ifndef __ASSEMBLY__ |
| @@ -22,6 +23,27 @@ enum { · 8 unmodified lines | ||
| 22 | 23 | }; |
| 23 | 24 | |
| 24 | 25 | extern unsigned long elf_hwcap; |
| 26 | + | |
| 27 | +#define RISCV_ISA_EXT_a ('a' - 'a') | |
| 28 | +#define RISCV_ISA_EXT_c ('c' - 'a') | |
| 29 | +#define RISCV_ISA_EXT_d ('d' - 'a') | |
| 30 | +#define RISCV_ISA_EXT_f ('f' - 'a') | |
| 31 | +#define RISCV_ISA_EXT_h ('h' - 'a') | |
| 32 | +#define RISCV_ISA_EXT_i ('i' - 'a') | |
| 33 | +#define RISCV_ISA_EXT_m ('m' - 'a') | |
| 34 | +#define RISCV_ISA_EXT_s ('s' - 'a') | |
| 35 | +#define RISCV_ISA_EXT_u ('u' - 'a') | |
| 36 | + | |
| 37 | +#define RISCV_ISA_EXT_MAX 64 | |
| 38 | + | |
| 39 | +unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap); | |
| 40 | + | |
| 41 | +#define riscv_isa_extension_mask(ext) BIT_MASK(RISCV_ISA_EXT_##ext) | |
| 42 | + | |
| 43 | +bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit); | |
| 44 | +#define riscv_isa_extension_available(isa_bitmap, ext) \ | |
| 45 | + __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext) | |
| 46 | + | |
| 25 | 47 | #endif |
| 26 | 48 | |
| 27 | 49 | #endif /* _ASM_RISCV_HWCAP_H */ |
| @@ -6,8 +6,6 @@ · 5 unmodified lines | ||
| 6 | 6 | |
| 7 | 7 | #include <asm-generic/module.h> |
| 8 | 8 | |
| 9 | −#define MODULE_ARCH_VERMAGIC "riscv" | |
| 10 | − | |
| 11 | 9 | struct module; |
| 12 | 10 | unsigned long module_emit_got_entry(struct module *mod, unsigned long val); |
| 13 | 11 | unsigned long module_emit_plt_entry(struct module *mod, unsigned long val); |
| @@ -22,14 +22,6 @@ static inline int set_memory_x(unsigned long addr, int numpages) { return 0; } · 21 unmodified lines | ||
| 22 | 22 | static inline int set_memory_nx(unsigned long addr, int numpages) { return 0; } |
| 23 | 23 | #endif |
| 24 | 24 | |
| 25 | −#ifdef CONFIG_STRICT_KERNEL_RWX | |
| 26 | −void set_kernel_text_ro(void); | |
| 27 | −void set_kernel_text_rw(void); | |
| 28 | −#else | |
| 29 | −static inline void set_kernel_text_ro(void) { } | |
| 30 | −static inline void set_kernel_text_rw(void) { } | |
| 31 | −#endif | |
| 32 | − | |
| 33 | 25 | int set_direct_map_invalid_noflush(struct page *page); |
| 34 | 26 | int set_direct_map_default_noflush(struct page *page); |
| 35 | 27 | |
| @@ -0,0 +1,9 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0 */ | |
| 2 | +/* Copyright (C) 2017 Andes Technology Corporation */ | |
| 3 | + | |
| 4 | +#ifndef _ASM_VERMAGIC_H | |
| 5 | +#define _ASM_VERMAGIC_H | |
| 6 | + | |
| 7 | +#define MODULE_ARCH_VERMAGIC "riscv" | |
| 8 | + | |
| 9 | +#endif /* _ASM_VERMAGIC_H */ | |
| @@ -15,8 +15,8 @@ · 14 unmodified lines | ||
| 15 | 15 | |
| 16 | 16 | const struct cpu_operations *cpu_ops[NR_CPUS] __ro_after_init; |
| 17 | 17 | |
| 18 | −void *__cpu_up_stack_pointer[NR_CPUS]; | |
| 19 | −void *__cpu_up_task_pointer[NR_CPUS]; | |
| 18 | +void *__cpu_up_stack_pointer[NR_CPUS] __section(.data); | |
| 19 | +void *__cpu_up_task_pointer[NR_CPUS] __section(.data); | |
| 20 | 20 | |
| 21 | 21 | extern const struct cpu_operations cpu_ops_sbi; |
| 22 | 22 | extern const struct cpu_operations cpu_ops_spinwait; |
| @@ -6,6 +6,7 @@ · 5 unmodified lines | ||
| 6 | 6 | * Copyright (C) 2017 SiFive |
| 7 | 7 | */ |
| 8 | 8 | |
| 9 | +#include <linux/bitmap.h> | |
| 9 | 10 | #include <linux/of.h> |
| 10 | 11 | #include <asm/processor.h> |
| 11 | 12 | #include <asm/hwcap.h> |
| @@ -13,15 +14,57 @@ · 1 unmodified line | ||
| 13 | 14 | #include <asm/switch_to.h> |
| 14 | 15 | |
| 15 | 16 | unsigned long elf_hwcap __read_mostly; |
| 17 | + | |
| 18 | +/* Host ISA bitmap */ | |
| 19 | +static DECLARE_BITMAP(riscv_isa, RISCV_ISA_EXT_MAX) __read_mostly; | |
| 20 | + | |
| 16 | 21 | #ifdef CONFIG_FPU |
| 17 | 22 | bool has_fpu __read_mostly; |
| 18 | 23 | #endif |
| 19 | 24 | |
| 25 | +/** | |
| 26 | + * riscv_isa_extension_base() - Get base extension word | |
| 27 | + * | |
| 28 | + * @isa_bitmap: ISA bitmap to use | |
| 29 | + * Return: base extension word as unsigned long value | |
| 30 | + * | |
| 31 | + * NOTE: If isa_bitmap is NULL then Host ISA bitmap will be used. | |
| 32 | + */ | |
| 33 | +unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap) | |
| 34 | +{ | |
| 35 | + if (!isa_bitmap) | |
| 36 | + return riscv_isa[0]; | |
| 37 | + return isa_bitmap[0]; | |
| 38 | +} | |
| 39 | +EXPORT_SYMBOL_GPL(riscv_isa_extension_base); | |
| 40 | + | |
| 41 | +/** | |
| 42 | + * __riscv_isa_extension_available() - Check whether given extension | |
| 43 | + * is available or not | |
| 44 | + * | |
| 45 | + * @isa_bitmap: ISA bitmap to use | |
| 46 | + * @bit: bit position of the desired extension | |
| 47 | + * Return: true or false | |
| 48 | + * | |
| 49 | + * NOTE: If isa_bitmap is NULL then Host ISA bitmap will be used. | |
| 50 | + */ | |
| 51 | +bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit) | |
| 52 | +{ | |
| 53 | + const unsigned long *bmap = (isa_bitmap) ? isa_bitmap : riscv_isa; | |
| 54 | + | |
| 55 | + if (bit >= RISCV_ISA_EXT_MAX) | |
| 56 | + return false; | |
| 57 | + | |
| 58 | + return test_bit(bit, bmap) ? true : false; | |
| 59 | +} | |
| 60 | +EXPORT_SYMBOL_GPL(__riscv_isa_extension_available); | |
| 61 | + | |
| 20 | 62 | void riscv_fill_hwcap(void) |
| 21 | 63 | { |
| 22 | 64 | struct device_node *node; |
| 23 | 65 | const char *isa; |
| 24 | − size_t i; | |
| 66 | + char print_str[BITS_PER_LONG + 1]; | |
| 67 | + size_t i, j, isa_len; | |
| 25 | 68 | static unsigned long isa2hwcap[256] = {0}; |
| 26 | 69 | |
| 27 | 70 | isa2hwcap['i'] = isa2hwcap['I'] = COMPAT_HWCAP_ISA_I; |
| @@ -33,8 +76,11 @@ void riscv_fill_hwcap(void) · 5 unmodified lines | ||
| 33 | 76 | |
| 34 | 77 | elf_hwcap = 0; |
| 35 | 78 | |
| 79 | + bitmap_zero(riscv_isa, RISCV_ISA_EXT_MAX); | |
| 80 | + | |
| 36 | 81 | for_each_of_cpu_node(node) { |
| 37 | 82 | unsigned long this_hwcap = 0; |
| 83 | + unsigned long this_isa = 0; | |
| 38 | 84 | |
| 39 | 85 | if (riscv_of_processor_hartid(node) < 0) |
| 40 | 86 | continue; |
| @@ -44,8 +90,24 @@ void riscv_fill_hwcap(void) · 3 unmodified lines | ||
| 44 | 90 | continue; |
| 45 | 91 | } |
| 46 | 92 | |
| 47 | − for (i = 0; i < strlen(isa); ++i) | |
| 93 | + i = 0; | |
| 94 | + isa_len = strlen(isa); | |
| 95 | +#if IS_ENABLED(CONFIG_32BIT) | |
| 96 | + if (!strncmp(isa, "rv32", 4)) | |
| 97 | + i += 4; | |
| 98 | +#elif IS_ENABLED(CONFIG_64BIT) | |
| 99 | + if (!strncmp(isa, "rv64", 4)) | |
| 100 | + i += 4; | |
| 101 | +#endif | |
| 102 | + for (; i < isa_len; ++i) { | |
| 48 | 103 | this_hwcap |= isa2hwcap[(unsigned char)(isa[i])]; |
| 104 | + /* | |
| 105 | + * TODO: X, Y and Z extension parsing for Host ISA | |
| 106 | + * bitmap will be added in-future. | |
| 107 | + */ | |
| 108 | + if ('a' <= isa[i] && isa[i] < 'x') | |
| 109 | + this_isa |= (1UL << (isa[i] - 'a')); | |
| 110 | + } | |
| 49 | 111 | |
| 50 | 112 | /* |
| 51 | 113 | * All "okay" hart should have same isa. Set HWCAP based on |
| @@ -56,6 +118,11 @@ void riscv_fill_hwcap(void) · 4 unmodified lines | ||
| 56 | 118 | elf_hwcap &= this_hwcap; |
| 57 | 119 | else |
| 58 | 120 | elf_hwcap = this_hwcap; |
| 121 | + | |
| 122 | + if (riscv_isa[0]) | |
| 123 | + riscv_isa[0] &= this_isa; | |
| 124 | + else | |
| 125 | + riscv_isa[0] = this_isa; | |
| 59 | 126 | } |
| 60 | 127 | |
| 61 | 128 | /* We don't support systems with F but without D, so mask those out |
| @@ -65,7 +132,17 @@ void riscv_fill_hwcap(void) · 3 unmodified lines | ||
| 65 | 132 | elf_hwcap &= ~COMPAT_HWCAP_ISA_F; |
| 66 | 133 | } |
| 67 | 134 | |
| 68 | − pr_info("elf_hwcap is 0x%lx\n", elf_hwcap); | |
| 135 | + memset(print_str, 0, sizeof(print_str)); | |
| 136 | + for (i = 0, j = 0; i < BITS_PER_LONG; i++) | |
| 137 | + if (riscv_isa[0] & BIT_MASK(i)) | |
| 138 | + print_str[j++] = (char)('a' + i); | |
| 139 | + pr_info("riscv: ISA extensions %s\n", print_str); | |
| 140 | + | |
| 141 | + memset(print_str, 0, sizeof(print_str)); | |
| 142 | + for (i = 0, j = 0; i < BITS_PER_LONG; i++) | |
| 143 | + if (elf_hwcap & BIT_MASK(i)) | |
| 144 | + print_str[j++] = (char)('a' + i); | |
| 145 | + pr_info("riscv: ELF capabilities %s\n", print_str); | |
| 69 | 146 | |
| 70 | 147 | #ifdef CONFIG_FPU |
| 71 | 148 | if (elf_hwcap & (COMPAT_HWCAP_ISA_F | COMPAT_HWCAP_ISA_D)) |
| @@ -102,7 +102,7 @@ void sbi_shutdown(void) · 101 unmodified lines | ||
| 102 | 102 | { |
| 103 | 103 | sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0); |
| 104 | 104 | } |
| 105 | −EXPORT_SYMBOL(sbi_set_timer); | |
| 105 | +EXPORT_SYMBOL(sbi_shutdown); | |
| 106 | 106 | |
| 107 | 107 | /** |
| 108 | 108 | * sbi_clear_ipi() - Clear any pending IPIs for the calling hart. |
| @@ -113,7 +113,7 @@ void sbi_clear_ipi(void) · 4 unmodified lines | ||
| 113 | 113 | { |
| 114 | 114 | sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0, 0, 0); |
| 115 | 115 | } |
| 116 | −EXPORT_SYMBOL(sbi_shutdown); | |
| 116 | +EXPORT_SYMBOL(sbi_clear_ipi); | |
| 117 | 117 | |
| 118 | 118 | /** |
| 119 | 119 | * sbi_set_timer_v01() - Program the timer for next timer event. |
| @@ -167,6 +167,11 @@ static int __sbi_rfence_v01(int fid, const unsigned long *hart_mask, · 47 unmodified lines | ||
| 167 | 167 | |
| 168 | 168 | return result; |
| 169 | 169 | } |
| 170 | + | |
| 171 | +static void sbi_set_power_off(void) | |
| 172 | +{ | |
| 173 | + pm_power_off = sbi_shutdown; | |
| 174 | +} | |
| 170 | 175 | #else |
| 171 | 176 | static void __sbi_set_timer_v01(uint64_t stime_value) |
| 172 | 177 | { |
| @@ -191,6 +196,8 @@ static int __sbi_rfence_v01(int fid, const unsigned long *hart_mask, · 18 unmodified lines | ||
| 191 | 196 | |
| 192 | 197 | return 0; |
| 193 | 198 | } |
| 199 | + | |
| 200 | +static void sbi_set_power_off(void) {} | |
| 194 | 201 | #endif /* CONFIG_RISCV_SBI_V01 */ |
| 195 | 202 | |
| 196 | 203 | static void __sbi_set_timer_v02(uint64_t stime_value) |
| @@ -540,16 +547,12 @@ static inline long sbi_get_firmware_version(void) · 343 unmodified lines | ||
| 540 | 547 | return __sbi_base_ecall(SBI_EXT_BASE_GET_IMP_VERSION); |
| 541 | 548 | } |
| 542 | 549 | |
| 543 | −static void sbi_power_off(void) | |
| 544 | −{ | |
| 545 | − sbi_shutdown(); | |
| 546 | −} | |
| 547 | 550 | |
| 548 | 551 | int __init sbi_init(void) |
| 549 | 552 | { |
| 550 | 553 | int ret; |
| 551 | 554 | |
| 552 | − pm_power_off = sbi_power_off; | |
| 555 | + sbi_set_power_off(); | |
| 553 | 556 | ret = sbi_get_spec_version(); |
| 554 | 557 | if (ret > 0) |
| 555 | 558 | sbi_spec_version = ret; |
| @@ -10,6 +10,7 @@ · 9 unmodified lines | ||
| 10 | 10 | |
| 11 | 11 | #include <linux/cpu.h> |
| 12 | 12 | #include <linux/interrupt.h> |
| 13 | +#include <linux/module.h> | |
| 13 | 14 | #include <linux/profile.h> |
| 14 | 15 | #include <linux/smp.h> |
| 15 | 16 | #include <linux/sched.h> |
| @@ -63,6 +64,7 @@ void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out) · 47 unmodified lines | ||
| 63 | 64 | for_each_cpu(cpu, in) |
| 64 | 65 | cpumask_set_cpu(cpuid_to_hartid_map(cpu), out); |
| 65 | 66 | } |
| 67 | +EXPORT_SYMBOL_GPL(riscv_cpuid_to_hartid_mask); | |
| 66 | 68 | |
| 67 | 69 | bool arch_match_cpu_phys_id(int cpu, u64 phys_id) |
| 68 | 70 | { |
| @@ -12,6 +12,8 @@ · 11 unmodified lines | ||
| 12 | 12 | #include <linux/stacktrace.h> |
| 13 | 13 | #include <linux/ftrace.h> |
| 14 | 14 | |
| 15 | +register unsigned long sp_in_global __asm__("sp"); | |
| 16 | + | |
| 15 | 17 | #ifdef CONFIG_FRAME_POINTER |
| 16 | 18 | |
| 17 | 19 | struct stackframe { |
| @@ -19,8 +21,6 @@ struct stackframe { · 1 unmodified line | ||
| 19 | 21 | unsigned long ra; |
| 20 | 22 | }; |
| 21 | 23 | |
| 22 | −register unsigned long sp_in_global __asm__("sp"); | |
| 23 | − | |
| 24 | 24 | void notrace walk_stackframe(struct task_struct *task, struct pt_regs *regs, |
| 25 | 25 | bool (*fn)(unsigned long, void *), void *arg) |
| 26 | 26 | { |
| @@ -12,7 +12,7 @@ vdso-syms += getcpu · 11 unmodified lines | ||
| 12 | 12 | vdso-syms += flush_icache |
| 13 | 13 | |
| 14 | 14 | # Files to link into the vdso |
| 15 | −obj-vdso = $(patsubst %, %.o, $(vdso-syms)) | |
| 15 | +obj-vdso = $(patsubst %, %.o, $(vdso-syms)) note.o | |
| 16 | 16 | |
| 17 | 17 | # Build rules |
| 18 | 18 | targets := $(obj-vdso) vdso.so vdso.so.dbg vdso.lds vdso-dummy.o |
| @@ -33,15 +33,15 @@ $(obj)/vdso.so.dbg: $(src)/vdso.lds $(obj-vdso) FORCE · 14 unmodified lines | ||
| 33 | 33 | $(call if_changed,vdsold) |
| 34 | 34 | |
| 35 | 35 | # We also create a special relocatable object that should mirror the symbol |
| 36 | −# table and layout of the linked DSO. With ld -R we can then refer to | |
| 37 | −# these symbols in the kernel code rather than hand-coded addresses. | |
| 36 | +# table and layout of the linked DSO. With ld --just-symbols we can then | |
| 37 | +# refer to these symbols in the kernel code rather than hand-coded addresses. | |
| 38 | 38 | |
| 39 | 39 | SYSCFLAGS_vdso.so.dbg = -shared -s -Wl,-soname=linux-vdso.so.1 \ |
| 40 | 40 | -Wl,--build-id -Wl,--hash-style=both |
| 41 | 41 | $(obj)/vdso-dummy.o: $(src)/vdso.lds $(obj)/rt_sigreturn.o FORCE |
| 42 | 42 | $(call if_changed,vdsold) |
| 43 | 43 | |
| 44 | −LDFLAGS_vdso-syms.o := -r -R | |
| 44 | +LDFLAGS_vdso-syms.o := -r --just-symbols | |
| 45 | 45 | $(obj)/vdso-syms.o: $(obj)/vdso-dummy.o FORCE |
| 46 | 46 | $(call if_changed,ld) |
| 47 | 47 | |
| @@ -0,0 +1,12 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ | |
| 2 | +/* | |
| 3 | + * This supplies .note.* sections to go into the PT_NOTE inside the vDSO text. | |
| 4 | + * Here we can supply some information useful to userland. | |
| 5 | + */ | |
| 6 | + | |
| 7 | +#include <linux/elfnote.h> | |
| 8 | +#include <linux/version.h> | |
| 9 | + | |
| 10 | +ELFNOTE_START(Linux, 0, "a") | |
| 11 | + .long LINUX_VERSION_CODE | |
| 12 | +ELFNOTE_END | |
| @@ -150,7 +150,8 @@ void __init setup_bootmem(void) · 149 unmodified lines | ||
| 150 | 150 | memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start); |
| 151 | 151 | |
| 152 | 152 | set_max_mapnr(PFN_DOWN(mem_size)); |
| 153 | − max_low_pfn = PFN_DOWN(memblock_end_of_DRAM()); | |
| 153 | + max_pfn = PFN_DOWN(memblock_end_of_DRAM()); | |
| 154 | + max_low_pfn = max_pfn; | |
| 154 | 155 | |
| 155 | 156 | #ifdef CONFIG_BLK_DEV_INITRD |
| 156 | 157 | setup_initrd(); |
| @@ -501,22 +502,6 @@ static inline void setup_vm_final(void) · 344 unmodified lines | ||
| 501 | 502 | #endif /* CONFIG_MMU */ |
| 502 | 503 | |
| 503 | 504 | #ifdef CONFIG_STRICT_KERNEL_RWX |
| 504 | −void set_kernel_text_rw(void) | |
| 505 | −{ | |
| 506 | − unsigned long text_start = (unsigned long)_text; | |
| 507 | − unsigned long text_end = (unsigned long)_etext; | |
| 508 | − | |
| 509 | − set_memory_rw(text_start, (text_end - text_start) >> PAGE_SHIFT); | |
| 510 | −} | |
| 511 | − | |
| 512 | −void set_kernel_text_ro(void) | |
| 513 | −{ | |
| 514 | − unsigned long text_start = (unsigned long)_text; | |
| 515 | − unsigned long text_end = (unsigned long)_etext; | |
| 516 | − | |
| 517 | − set_memory_ro(text_start, (text_end - text_start) >> PAGE_SHIFT); | |
| 518 | −} | |
| 519 | − | |
| 520 | 505 | void mark_rodata_ro(void) |
| 521 | 506 | { |
| 522 | 507 | unsigned long text_start = (unsigned long)_text; |
| @@ -7,9 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | #ifdef CONFIG_PROTECTED_VIRTUALIZATION_GUEST |
| 8 | 8 | int __bootdata_preserved(prot_virt_guest); |
| 9 | 9 | #endif |
| 10 | −#if IS_ENABLED(CONFIG_KVM) | |
| 11 | 10 | struct uv_info __bootdata_preserved(uv_info); |
| 12 | −#endif | |
| 13 | 11 | |
| 14 | 12 | void uv_query_info(void) |
| 15 | 13 | { |
| @@ -133,7 +133,7 @@ void diag_stat_inc(enum diag_stat_enum nr) · 132 unmodified lines | ||
| 133 | 133 | } |
| 134 | 134 | EXPORT_SYMBOL(diag_stat_inc); |
| 135 | 135 | |
| 136 | −void diag_stat_inc_norecursion(enum diag_stat_enum nr) | |
| 136 | +void notrace diag_stat_inc_norecursion(enum diag_stat_enum nr) | |
| 137 | 137 | { |
| 138 | 138 | this_cpu_inc(diag_stat.counter[nr]); |
| 139 | 139 | trace_s390_diagnose_norecursion(diag_map[nr].code); |
| @@ -403,7 +403,7 @@ int smp_find_processor_id(u16 address) · 402 unmodified lines | ||
| 403 | 403 | return -1; |
| 404 | 404 | } |
| 405 | 405 | |
| 406 | −bool arch_vcpu_is_preempted(int cpu) | |
| 406 | +bool notrace arch_vcpu_is_preempted(int cpu) | |
| 407 | 407 | { |
| 408 | 408 | if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu)) |
| 409 | 409 | return false; |
| @@ -413,7 +413,7 @@ bool arch_vcpu_is_preempted(int cpu) · 3 unmodified lines | ||
| 413 | 413 | } |
| 414 | 414 | EXPORT_SYMBOL(arch_vcpu_is_preempted); |
| 415 | 415 | |
| 416 | −void smp_yield_cpu(int cpu) | |
| 416 | +void notrace smp_yield_cpu(int cpu) | |
| 417 | 417 | { |
| 418 | 418 | if (!MACHINE_HAS_DIAG9C) |
| 419 | 419 | return; |
| @@ -14,7 +14,7 @@ EXPORT_TRACEPOINT_SYMBOL(s390_diagnose); · 13 unmodified lines | ||
| 14 | 14 | |
| 15 | 15 | static DEFINE_PER_CPU(unsigned int, diagnose_trace_depth); |
| 16 | 16 | |
| 17 | −void trace_s390_diagnose_norecursion(int diag_nr) | |
| 17 | +void notrace trace_s390_diagnose_norecursion(int diag_nr) | |
| 18 | 18 | { |
| 19 | 19 | unsigned long flags; |
| 20 | 20 | unsigned int *depth; |
| @@ -23,10 +23,11 @@ · 22 unmodified lines | ||
| 23 | 23 | int __bootdata_preserved(prot_virt_guest); |
| 24 | 24 | #endif |
| 25 | 25 | |
| 26 | +struct uv_info __bootdata_preserved(uv_info); | |
| 27 | + | |
| 26 | 28 | #if IS_ENABLED(CONFIG_KVM) |
| 27 | 29 | int prot_virt_host; |
| 28 | 30 | EXPORT_SYMBOL(prot_virt_host); |
| 29 | −struct uv_info __bootdata_preserved(uv_info); | |
| 30 | 31 | EXPORT_SYMBOL(uv_info); |
| 31 | 32 | |
| 32 | 33 | static int __init prot_virt_setup(char *val) |
| @@ -393,7 +393,7 @@ static unsigned long deliverable_irqs(struct kvm_vcpu *vcpu) · 392 unmodified lines | ||
| 393 | 393 | if (psw_mchk_disabled(vcpu)) |
| 394 | 394 | active_mask &= ~IRQ_PEND_MCHK_MASK; |
| 395 | 395 | /* PV guest cpus can have a single interruption injected at a time. */ |
| 396 | − if (kvm_s390_pv_cpu_is_protected(vcpu) && | |
| 396 | + if (kvm_s390_pv_cpu_get_handle(vcpu) && | |
| 397 | 397 | vcpu->arch.sie_block->iictl != IICTL_CODE_NONE) |
| 398 | 398 | active_mask &= ~(IRQ_PEND_EXT_II_MASK | |
| 399 | 399 | IRQ_PEND_IO_MASK | |
| @@ -545,6 +545,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) · 544 unmodified lines | ||
| 545 | 545 | case KVM_CAP_S390_AIS: |
| 546 | 546 | case KVM_CAP_S390_AIS_MIGRATION: |
| 547 | 547 | case KVM_CAP_S390_VCPU_RESETS: |
| 548 | + case KVM_CAP_SET_GUEST_DEBUG: | |
| 548 | 549 | r = 1; |
| 549 | 550 | break; |
| 550 | 551 | case KVM_CAP_S390_HPAGE_1M: |
| @@ -1939,6 +1940,9 @@ static int gfn_to_memslot_approx(struct kvm_memslots *slots, gfn_t gfn) · 1388 unmodified lines | ||
| 1939 | 1940 | start = slot + 1; |
| 1940 | 1941 | } |
| 1941 | 1942 | |
| 1943 | + if (start >= slots->used_slots) | |
| 1944 | + return slots->used_slots - 1; | |
| 1945 | + | |
| 1942 | 1946 | if (gfn >= memslots[start].base_gfn && |
| 1943 | 1947 | gfn < memslots[start].base_gfn + memslots[start].npages) { |
| 1944 | 1948 | atomic_set(&slots->lru_slot, start); |
| @@ -626,10 +626,12 @@ static int handle_pqap(struct kvm_vcpu *vcpu) · 625 unmodified lines | ||
| 626 | 626 | * available for the guest are AQIC and TAPQ with the t bit set |
| 627 | 627 | * since we do not set IC.3 (FIII) we currently will only intercept |
| 628 | 628 | * the AQIC function code. |
| 629 | + * Note: running nested under z/VM can result in intercepts for other | |
| 630 | + * function codes, e.g. PQAP(QCI). We do not support this and bail out. | |
| 629 | 631 | */ |
| 630 | 632 | reg0 = vcpu->run->s.regs.gprs[0]; |
| 631 | 633 | fc = (reg0 >> 24) & 0xff; |
| 632 | − if (WARN_ON_ONCE(fc != 0x03)) | |
| 634 | + if (fc != 0x03) | |
| 633 | 635 | return -EOPNOTSUPP; |
| 634 | 636 | |
| 635 | 637 | /* PQAP instruction is allowed for guest kernel only */ |
| @@ -64,10 +64,13 @@ mm_segment_t enable_sacf_uaccess(void) · 63 unmodified lines | ||
| 64 | 64 | { |
| 65 | 65 | mm_segment_t old_fs; |
| 66 | 66 | unsigned long asce, cr; |
| 67 | + unsigned long flags; | |
| 67 | 68 | |
| 68 | 69 | old_fs = current->thread.mm_segment; |
| 69 | 70 | if (old_fs & 1) |
| 70 | 71 | return old_fs; |
| 72 | + /* protect against a concurrent page table upgrade */ | |
| 73 | + local_irq_save(flags); | |
| 71 | 74 | current->thread.mm_segment |= 1; |
| 72 | 75 | asce = S390_lowcore.kernel_asce; |
| 73 | 76 | if (likely(old_fs == USER_DS)) { |
| @@ -83,6 +86,7 @@ mm_segment_t enable_sacf_uaccess(void) · 9 unmodified lines | ||
| 83 | 86 | __ctl_load(asce, 7, 7); |
| 84 | 87 | set_cpu_flag(CIF_ASCE_SECONDARY); |
| 85 | 88 | } |
| 89 | + local_irq_restore(flags); | |
| 86 | 90 | return old_fs; |
| 87 | 91 | } |
| 88 | 92 | EXPORT_SYMBOL(enable_sacf_uaccess); |
| @@ -70,8 +70,20 @@ static void __crst_table_upgrade(void *arg) · 69 unmodified lines | ||
| 70 | 70 | { |
| 71 | 71 | struct mm_struct *mm = arg; |
| 72 | 72 | |
| 73 | − if (current->active_mm == mm) | |
| 74 | − set_user_asce(mm); | |
| 73 | + /* we must change all active ASCEs to avoid the creation of new TLBs */ | |
| 74 | + if (current->active_mm == mm) { | |
| 75 | + S390_lowcore.user_asce = mm->context.asce; | |
| 76 | + if (current->thread.mm_segment == USER_DS) { | |
| 77 | + __ctl_load(S390_lowcore.user_asce, 1, 1); | |
| 78 | + /* Mark user-ASCE present in CR1 */ | |
| 79 | + clear_cpu_flag(CIF_ASCE_PRIMARY); | |
| 80 | + } | |
| 81 | + if (current->thread.mm_segment == USER_DS_SACF) { | |
| 82 | + __ctl_load(S390_lowcore.user_asce, 7, 7); | |
| 83 | + /* enable_sacf_uaccess does all or nothing */ | |
| 84 | + WARN_ON(!test_cpu_flag(CIF_ASCE_SECONDARY)); | |
| 85 | + } | |
| 86 | + } | |
| 75 | 87 | __tlb_flush_local(); |
| 76 | 88 | } |
| 77 | 89 | |
| @@ -115,7 +115,6 @@ static struct irq_chip zpci_irq_chip = { · 114 unmodified lines | ||
| 115 | 115 | .name = "PCI-MSI", |
| 116 | 116 | .irq_unmask = pci_msi_unmask_irq, |
| 117 | 117 | .irq_mask = pci_msi_mask_irq, |
| 118 | − .irq_set_affinity = zpci_set_irq_affinity, | |
| 119 | 118 | }; |
| 120 | 119 | |
| 121 | 120 | static void zpci_handle_cpu_local_irq(bool rescan) |
| @@ -276,7 +275,9 @@ int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) · 154 unmodified lines | ||
| 276 | 275 | rc = -EIO; |
| 277 | 276 | if (hwirq - bit >= msi_vecs) |
| 278 | 277 | break; |
| 279 | − irq = __irq_alloc_descs(-1, 0, 1, 0, THIS_MODULE, msi->affinity); | |
| 278 | + irq = __irq_alloc_descs(-1, 0, 1, 0, THIS_MODULE, | |
| 279 | + (irq_delivery == DIRECTED) ? | |
| 280 | + msi->affinity : NULL); | |
| 280 | 281 | if (irq < 0) |
| 281 | 282 | return -ENOMEM; |
| 282 | 283 | rc = irq_set_msi_desc(irq, msi); |
| @@ -11,32 +11,4 @@ struct mod_arch_specific { · 10 unmodified lines | ||
| 11 | 11 | }; |
| 12 | 12 | #endif |
| 13 | 13 | |
| 14 | −#ifdef CONFIG_CPU_LITTLE_ENDIAN | |
| 15 | −# ifdef CONFIG_CPU_SH2 | |
| 16 | −# define MODULE_PROC_FAMILY "SH2LE " | |
| 17 | −# elif defined CONFIG_CPU_SH3 | |
| 18 | −# define MODULE_PROC_FAMILY "SH3LE " | |
| 19 | −# elif defined CONFIG_CPU_SH4 | |
| 20 | −# define MODULE_PROC_FAMILY "SH4LE " | |
| 21 | −# elif defined CONFIG_CPU_SH5 | |
| 22 | −# define MODULE_PROC_FAMILY "SH5LE " | |
| 23 | −# else | |
| 24 | −# error unknown processor family | |
| 25 | −# endif | |
| 26 | −#else | |
| 27 | −# ifdef CONFIG_CPU_SH2 | |
| 28 | −# define MODULE_PROC_FAMILY "SH2BE " | |
| 29 | −# elif defined CONFIG_CPU_SH3 | |
| 30 | −# define MODULE_PROC_FAMILY "SH3BE " | |
| 31 | −# elif defined CONFIG_CPU_SH4 | |
| 32 | −# define MODULE_PROC_FAMILY "SH4BE " | |
| 33 | −# elif defined CONFIG_CPU_SH5 | |
| 34 | −# define MODULE_PROC_FAMILY "SH5BE " | |
| 35 | −# else | |
| 36 | −# error unknown processor family | |
| 37 | −# endif | |
| 38 | −#endif | |
| 39 | − | |
| 40 | −#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY | |
| 41 | − | |
| 42 | 14 | #endif /* _ASM_SH_MODULE_H */ |
| @@ -0,0 +1,34 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0 */ | |
| 2 | + | |
| 3 | +#ifndef _ASM_VERMAGIC_H | |
| 4 | +#define _ASM_VERMAGIC_H | |
| 5 | + | |
| 6 | +#ifdef CONFIG_CPU_LITTLE_ENDIAN | |
| 7 | +# ifdef CONFIG_CPU_SH2 | |
| 8 | +# define MODULE_PROC_FAMILY "SH2LE " | |
| 9 | +# elif defined CONFIG_CPU_SH3 | |
| 10 | +# define MODULE_PROC_FAMILY "SH3LE " | |
| 11 | +# elif defined CONFIG_CPU_SH4 | |
| 12 | +# define MODULE_PROC_FAMILY "SH4LE " | |
| 13 | +# elif defined CONFIG_CPU_SH5 | |
| 14 | +# define MODULE_PROC_FAMILY "SH5LE " | |
| 15 | +# else | |
| 16 | +# error unknown processor family | |
| 17 | +# endif | |
| 18 | +#else | |
| 19 | +# ifdef CONFIG_CPU_SH2 | |
| 20 | +# define MODULE_PROC_FAMILY "SH2BE " | |
| 21 | +# elif defined CONFIG_CPU_SH3 | |
| 22 | +# define MODULE_PROC_FAMILY "SH3BE " | |
| 23 | +# elif defined CONFIG_CPU_SH4 | |
| 24 | +# define MODULE_PROC_FAMILY "SH4BE " | |
| 25 | +# elif defined CONFIG_CPU_SH5 | |
| 26 | +# define MODULE_PROC_FAMILY "SH5BE " | |
| 27 | +# else | |
| 28 | +# error unknown processor family | |
| 29 | +# endif | |
| 30 | +#endif | |
| 31 | + | |
| 32 | +#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY | |
| 33 | + | |
| 34 | +#endif /* _ASM_VERMAGIC_H */ | |
| @@ -412,7 +412,7 @@ int arch_add_memory(int nid, u64 start, u64 size, · 411 unmodified lines | ||
| 412 | 412 | unsigned long nr_pages = size >> PAGE_SHIFT; |
| 413 | 413 | int ret; |
| 414 | 414 | |
| 415 | − if (WARN_ON_ONCE(params->pgprot.pgprot != PAGE_KERNEL.pgprot) | |
| 415 | + if (WARN_ON_ONCE(params->pgprot.pgprot != PAGE_KERNEL.pgprot)) | |
| 416 | 416 | return -EINVAL; |
| 417 | 417 | |
| 418 | 418 | /* We only have ZONE_NORMAL, so this is easy.. */ |
| @@ -140,6 +140,7 @@ export CFLAGS_vmlinux := $(LINK-y) $(LINK_WRAPS) $(LD_FLAGS_CMDLINE) · 139 unmodified lines | ||
| 140 | 140 | # When cleaning we don't include .config, so we don't include |
| 141 | 141 | # TT or skas makefiles and don't clean skas_ptregs.h. |
| 142 | 142 | CLEAN_FILES += linux x.i gmon.out |
| 143 | +MRPROPER_DIRS += arch/$(SUBARCH)/include/generated | |
| 143 | 144 | |
| 144 | 145 | archclean: |
| 145 | 146 | @find . \( -name '*.bb' -o -name '*.bbg' -o -name '*.da' \ |
| @@ -149,7 +149,7 @@ config X86 · 148 unmodified lines | ||
| 149 | 149 | select HAVE_ARCH_TRACEHOOK |
| 150 | 150 | select HAVE_ARCH_TRANSPARENT_HUGEPAGE |
| 151 | 151 | select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64 |
| 152 | − select HAVE_ARCH_USERFAULTFD_WP if USERFAULTFD | |
| 152 | + select HAVE_ARCH_USERFAULTFD_WP if X86_64 && USERFAULTFD | |
| 153 | 153 | select HAVE_ARCH_VMAP_STACK if X86_64 |
| 154 | 154 | select HAVE_ARCH_WITHIN_STACK_FRAMES |
| 155 | 155 | select HAVE_ASM_MODVERSIONS |
| @@ -32,16 +32,16 @@ void blake2s_compress_arch(struct blake2s_state *state, · 31 unmodified lines | ||
| 32 | 32 | const u32 inc) |
| 33 | 33 | { |
| 34 | 34 | /* SIMD disables preemption, so relax after processing each page. */ |
| 35 | − BUILD_BUG_ON(PAGE_SIZE / BLAKE2S_BLOCK_SIZE < 8); | |
| 35 | + BUILD_BUG_ON(SZ_4K / BLAKE2S_BLOCK_SIZE < 8); | |
| 36 | 36 | |
| 37 | 37 | if (!static_branch_likely(&blake2s_use_ssse3) || !crypto_simd_usable()) { |
| 38 | 38 | blake2s_compress_generic(state, block, nblocks, inc); |
| 39 | 39 | return; |
| 40 | 40 | } |
| 41 | 41 | |
| 42 | − for (;;) { | |
| 42 | + do { | |
| 43 | 43 | const size_t blocks = min_t(size_t, nblocks, |
| 44 | − PAGE_SIZE / BLAKE2S_BLOCK_SIZE); | |
| 44 | + SZ_4K / BLAKE2S_BLOCK_SIZE); | |
| 45 | 45 | |
| 46 | 46 | kernel_fpu_begin(); |
| 47 | 47 | if (IS_ENABLED(CONFIG_AS_AVX512) && |
| @@ -52,10 +52,8 @@ void blake2s_compress_arch(struct blake2s_state *state, · 4 unmodified lines | ||
| 52 | 52 | kernel_fpu_end(); |
| 53 | 53 | |
| 54 | 54 | nblocks -= blocks; |
| 55 | − if (!nblocks) | |
| 56 | − break; | |
| 57 | 55 | block += blocks * BLAKE2S_BLOCK_SIZE; |
| 58 | − } | |
| 56 | + } while (nblocks); | |
| 59 | 57 | } |
| 60 | 58 | EXPORT_SYMBOL(blake2s_compress_arch); |
| 61 | 59 | |
| @@ -153,9 +153,17 @@ void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src, unsigned int bytes, · 152 unmodified lines | ||
| 153 | 153 | bytes <= CHACHA_BLOCK_SIZE) |
| 154 | 154 | return chacha_crypt_generic(state, dst, src, bytes, nrounds); |
| 155 | 155 | |
| 156 | − kernel_fpu_begin(); | |
| 157 | − chacha_dosimd(state, dst, src, bytes, nrounds); | |
| 158 | − kernel_fpu_end(); | |
| 156 | + do { | |
| 157 | + unsigned int todo = min_t(unsigned int, bytes, SZ_4K); | |
| 158 | + | |
| 159 | + kernel_fpu_begin(); | |
| 160 | + chacha_dosimd(state, dst, src, todo, nrounds); | |
| 161 | + kernel_fpu_end(); | |
| 162 | + | |
| 163 | + bytes -= todo; | |
| 164 | + src += todo; | |
| 165 | + dst += todo; | |
| 166 | + } while (bytes); | |
| 159 | 167 | } |
| 160 | 168 | EXPORT_SYMBOL(chacha_crypt_arch); |
| 161 | 169 | |
| @@ -29,7 +29,7 @@ static int nhpoly1305_avx2_update(struct shash_desc *desc, · 28 unmodified lines | ||
| 29 | 29 | return crypto_nhpoly1305_update(desc, src, srclen); |
| 30 | 30 | |
| 31 | 31 | do { |
| 32 | − unsigned int n = min_t(unsigned int, srclen, PAGE_SIZE); | |
| 32 | + unsigned int n = min_t(unsigned int, srclen, SZ_4K); | |
| 33 | 33 | |
| 34 | 34 | kernel_fpu_begin(); |
| 35 | 35 | crypto_nhpoly1305_update_helper(desc, src, n, _nh_avx2); |
| @@ -29,7 +29,7 @@ static int nhpoly1305_sse2_update(struct shash_desc *desc, · 28 unmodified lines | ||
| 29 | 29 | return crypto_nhpoly1305_update(desc, src, srclen); |
| 30 | 30 | |
| 31 | 31 | do { |
| 32 | − unsigned int n = min_t(unsigned int, srclen, PAGE_SIZE); | |
| 32 | + unsigned int n = min_t(unsigned int, srclen, SZ_4K); | |
| 33 | 33 | |
| 34 | 34 | kernel_fpu_begin(); |
| 35 | 35 | crypto_nhpoly1305_update_helper(desc, src, n, _nh_sse2); |
| @@ -91,8 +91,8 @@ static void poly1305_simd_blocks(void *ctx, const u8 *inp, size_t len, · 90 unmodified lines | ||
| 91 | 91 | struct poly1305_arch_internal *state = ctx; |
| 92 | 92 | |
| 93 | 93 | /* SIMD disables preemption, so relax after processing each page. */ |
| 94 | − BUILD_BUG_ON(PAGE_SIZE < POLY1305_BLOCK_SIZE || | |
| 95 | − PAGE_SIZE % POLY1305_BLOCK_SIZE); | |
| 94 | + BUILD_BUG_ON(SZ_4K < POLY1305_BLOCK_SIZE || | |
| 95 | + SZ_4K % POLY1305_BLOCK_SIZE); | |
| 96 | 96 | |
| 97 | 97 | if (!static_branch_likely(&poly1305_use_avx) || |
| 98 | 98 | (len < (POLY1305_BLOCK_SIZE * 18) && !state->is_base2_26) || |
| @@ -102,8 +102,8 @@ static void poly1305_simd_blocks(void *ctx, const u8 *inp, size_t len, · 3 unmodified lines | ||
| 102 | 102 | return; |
| 103 | 103 | } |
| 104 | 104 | |
| 105 | − for (;;) { | |
| 106 | − const size_t bytes = min_t(size_t, len, PAGE_SIZE); | |
| 105 | + do { | |
| 106 | + const size_t bytes = min_t(size_t, len, SZ_4K); | |
| 107 | 107 | |
| 108 | 108 | kernel_fpu_begin(); |
| 109 | 109 | if (IS_ENABLED(CONFIG_AS_AVX512) && static_branch_likely(&poly1305_use_avx512)) |
| @@ -113,11 +113,10 @@ static void poly1305_simd_blocks(void *ctx, const u8 *inp, size_t len, · 3 unmodified lines | ||
| 113 | 113 | else |
| 114 | 114 | poly1305_blocks_avx(ctx, inp, bytes, padbit); |
| 115 | 115 | kernel_fpu_end(); |
| 116 | + | |
| 116 | 117 | len -= bytes; |
| 117 | − if (!len) | |
| 118 | − break; | |
| 119 | 118 | inp += bytes; |
| 120 | − } | |
| 119 | + } while (len); | |
| 121 | 120 | } |
| 122 | 121 | |
| 123 | 122 | static void poly1305_simd_emit(void *ctx, u8 mac[POLY1305_DIGEST_SIZE], |
| @@ -98,13 +98,6 @@ For 32-bit we have the following conventions - kernel is built with · 97 unmodified lines | ||
| 98 | 98 | #define SIZEOF_PTREGS 21*8 |
| 99 | 99 | |
| 100 | 100 | .macro PUSH_AND_CLEAR_REGS rdx=%rdx rax=%rax save_ret=0 |
| 101 | − /* | |
| 102 | − * Push registers and sanitize registers of values that a | |
| 103 | − * speculation attack might otherwise want to exploit. The | |
| 104 | − * lower registers are likely clobbered well before they | |
| 105 | − * could be put to use in a speculative execution gadget. | |
| 106 | − * Interleave XOR with PUSH for better uop scheduling: | |
| 107 | − */ | |
| 108 | 101 | .if \save_ret |
| 109 | 102 | pushq %rsi /* pt_regs->si */ |
| 110 | 103 | movq 8(%rsp), %rsi /* temporarily store the return address in %rsi */ |
| @@ -114,34 +107,43 @@ For 32-bit we have the following conventions - kernel is built with · 3 unmodified lines | ||
| 114 | 107 | pushq %rsi /* pt_regs->si */ |
| 115 | 108 | .endif |
| 116 | 109 | pushq \rdx /* pt_regs->dx */ |
| 117 | − xorl %edx, %edx /* nospec dx */ | |
| 118 | 110 | pushq %rcx /* pt_regs->cx */ |
| 119 | − xorl %ecx, %ecx /* nospec cx */ | |
| 120 | 111 | pushq \rax /* pt_regs->ax */ |
| 121 | 112 | pushq %r8 /* pt_regs->r8 */ |
| 122 | − xorl %r8d, %r8d /* nospec r8 */ | |
| 123 | 113 | pushq %r9 /* pt_regs->r9 */ |
| 124 | − xorl %r9d, %r9d /* nospec r9 */ | |
| 125 | 114 | pushq %r10 /* pt_regs->r10 */ |
| 126 | − xorl %r10d, %r10d /* nospec r10 */ | |
| 127 | 115 | pushq %r11 /* pt_regs->r11 */ |
| 128 | − xorl %r11d, %r11d /* nospec r11*/ | |
| 129 | 116 | pushq %rbx /* pt_regs->rbx */ |
| 130 | − xorl %ebx, %ebx /* nospec rbx*/ | |
| 131 | 117 | pushq %rbp /* pt_regs->rbp */ |
| 132 | − xorl %ebp, %ebp /* nospec rbp*/ | |
| 133 | 118 | pushq %r12 /* pt_regs->r12 */ |
| 134 | − xorl %r12d, %r12d /* nospec r12*/ | |
| 135 | 119 | pushq %r13 /* pt_regs->r13 */ |
| 136 | − xorl %r13d, %r13d /* nospec r13*/ | |
| 137 | 120 | pushq %r14 /* pt_regs->r14 */ |
| 138 | − xorl %r14d, %r14d /* nospec r14*/ | |
| 139 | 121 | pushq %r15 /* pt_regs->r15 */ |
| 140 | − xorl %r15d, %r15d /* nospec r15*/ | |
| 141 | 122 | UNWIND_HINT_REGS |
| 123 | + | |
| 142 | 124 | .if \save_ret |
| 143 | 125 | pushq %rsi /* return address on top of stack */ |
| 144 | 126 | .endif |
| 127 | + | |
| 128 | + /* | |
| 129 | + * Sanitize registers of values that a speculation attack might | |
| 130 | + * otherwise want to exploit. The lower registers are likely clobbered | |
| 131 | + * well before they could be put to use in a speculative execution | |
| 132 | + * gadget. | |
| 133 | + */ | |
| 134 | + xorl %edx, %edx /* nospec dx */ | |
| 135 | + xorl %ecx, %ecx /* nospec cx */ | |
| 136 | + xorl %r8d, %r8d /* nospec r8 */ | |
| 137 | + xorl %r9d, %r9d /* nospec r9 */ | |
| 138 | + xorl %r10d, %r10d /* nospec r10 */ | |
| 139 | + xorl %r11d, %r11d /* nospec r11 */ | |
| 140 | + xorl %ebx, %ebx /* nospec rbx */ | |
| 141 | + xorl %ebp, %ebp /* nospec rbp */ | |
| 142 | + xorl %r12d, %r12d /* nospec r12 */ | |
| 143 | + xorl %r13d, %r13d /* nospec r13 */ | |
| 144 | + xorl %r14d, %r14d /* nospec r14 */ | |
| 145 | + xorl %r15d, %r15d /* nospec r15 */ | |
| 146 | + | |
| 145 | 147 | .endm |
| 146 | 148 | |
| 147 | 149 | .macro POP_REGS pop_rdi=1 skip_r11rcx=0 |
| @@ -249,7 +249,6 @@ SYM_INNER_LABEL(entry_SYSCALL_64_after_hwframe, SYM_L_GLOBAL) · 248 unmodified lines | ||
| 249 | 249 | */ |
| 250 | 250 | syscall_return_via_sysret: |
| 251 | 251 | /* rcx and r11 are already restored (see code above) */ |
| 252 | − UNWIND_HINT_EMPTY | |
| 253 | 252 | POP_REGS pop_rdi=0 skip_r11rcx=1 |
| 254 | 253 | |
| 255 | 254 | /* |
| @@ -258,6 +257,7 @@ syscall_return_via_sysret: · 2 unmodified lines | ||
| 258 | 257 | */ |
| 259 | 258 | movq %rsp, %rdi |
| 260 | 259 | movq PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %rsp |
| 260 | + UNWIND_HINT_EMPTY | |
| 261 | 261 | |
| 262 | 262 | pushq RSP-RDI(%rdi) /* RSP */ |
| 263 | 263 | pushq (%rdi) /* RDI */ |
| @@ -279,8 +279,7 @@ SYM_CODE_END(entry_SYSCALL_64) · 15 unmodified lines | ||
| 279 | 279 | * %rdi: prev task |
| 280 | 280 | * %rsi: next task |
| 281 | 281 | */ |
| 282 | −SYM_CODE_START(__switch_to_asm) | |
| 283 | − UNWIND_HINT_FUNC | |
| 282 | +SYM_FUNC_START(__switch_to_asm) | |
| 284 | 283 | /* |
| 285 | 284 | * Save callee-saved registers |
| 286 | 285 | * This must match the order in inactive_task_frame |
| @@ -321,7 +320,7 @@ SYM_CODE_START(__switch_to_asm) · 34 unmodified lines | ||
| 321 | 320 | popq %rbp |
| 322 | 321 | |
| 323 | 322 | jmp __switch_to |
| 324 | −SYM_CODE_END(__switch_to_asm) | |
| 323 | +SYM_FUNC_END(__switch_to_asm) | |
| 325 | 324 | |
| 326 | 325 | /* |
| 327 | 326 | * A newly forked process directly context switches into this address. |
| @@ -512,7 +511,7 @@ SYM_CODE_END(spurious_entries_start) · 184 unmodified lines | ||
| 512 | 511 | * +----------------------------------------------------+ |
| 513 | 512 | */ |
| 514 | 513 | SYM_CODE_START(interrupt_entry) |
| 515 | − UNWIND_HINT_FUNC | |
| 514 | + UNWIND_HINT_IRET_REGS offset=16 | |
| 516 | 515 | ASM_CLAC |
| 517 | 516 | cld |
| 518 | 517 | |
| @@ -544,9 +543,9 @@ SYM_CODE_START(interrupt_entry) · 25 unmodified lines | ||
| 544 | 543 | pushq 5*8(%rdi) /* regs->eflags */ |
| 545 | 544 | pushq 4*8(%rdi) /* regs->cs */ |
| 546 | 545 | pushq 3*8(%rdi) /* regs->ip */ |
| 546 | + UNWIND_HINT_IRET_REGS | |
| 547 | 547 | pushq 2*8(%rdi) /* regs->orig_ax */ |
| 548 | 548 | pushq 8(%rdi) /* return address */ |
| 549 | − UNWIND_HINT_FUNC | |
| 550 | 549 | |
| 551 | 550 | movq (%rdi), %rdi |
| 552 | 551 | jmp 2f |
| @@ -637,6 +636,7 @@ SYM_INNER_LABEL(swapgs_restore_regs_and_return_to_usermode, SYM_L_GLOBAL) · 84 unmodified lines | ||
| 637 | 636 | */ |
| 638 | 637 | movq %rsp, %rdi |
| 639 | 638 | movq PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %rsp |
| 639 | + UNWIND_HINT_EMPTY | |
| 640 | 640 | |
| 641 | 641 | /* Copy the IRET frame to the trampoline stack. */ |
| 642 | 642 | pushq 6*8(%rdi) /* SS */ |
| @@ -1739,7 +1739,7 @@ SYM_CODE_START(rewind_stack_do_exit) · 1096 unmodified lines | ||
| 1739 | 1739 | |
| 1740 | 1740 | movq PER_CPU_VAR(cpu_current_top_of_stack), %rax |
| 1741 | 1741 | leaq -PTREGS_SIZE(%rax), %rsp |
| 1742 | − UNWIND_HINT_FUNC sp_offset=PTREGS_SIZE | |
| 1742 | + UNWIND_HINT_REGS | |
| 1743 | 1743 | |
| 1744 | 1744 | call do_exit |
| 1745 | 1745 | SYM_CODE_END(rewind_stack_do_exit) |
| @@ -643,6 +643,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = { · 642 unmodified lines | ||
| 643 | 643 | X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &glm_cstates), |
| 644 | 644 | X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &glm_cstates), |
| 645 | 645 | X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &glm_cstates), |
| 646 | + X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &glm_cstates), | |
| 646 | 647 | |
| 647 | 648 | X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_cstates), |
| 648 | 649 | X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_cstates), |
| @@ -73,7 +73,8 @@ static int hv_cpu_init(unsigned int cpu) · 72 unmodified lines | ||
| 73 | 73 | struct page *pg; |
| 74 | 74 | |
| 75 | 75 | input_arg = (void **)this_cpu_ptr(hyperv_pcpu_input_arg); |
| 76 | − pg = alloc_page(GFP_KERNEL); | |
| 76 | + /* hv_cpu_init() can be called with IRQs disabled from hv_resume() */ | |
| 77 | + pg = alloc_page(irqs_disabled() ? GFP_ATOMIC : GFP_KERNEL); | |
| 77 | 78 | if (unlikely(!pg)) |
| 78 | 79 | return -ENOMEM; |
| 79 | 80 | *input_arg = page_address(pg); |
| @@ -254,6 +255,7 @@ static int __init hv_pci_init(void) · 174 unmodified lines | ||
| 254 | 255 | static int hv_suspend(void) |
| 255 | 256 | { |
| 256 | 257 | union hv_x64_msr_hypercall_contents hypercall_msr; |
| 258 | + int ret; | |
| 257 | 259 | |
| 258 | 260 | /* |
| 259 | 261 | * Reset the hypercall page as it is going to be invalidated |
| @@ -270,12 +272,17 @@ static int hv_suspend(void) · 10 unmodified lines | ||
| 270 | 272 | hypercall_msr.enable = 0; |
| 271 | 273 | wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); |
| 272 | 274 | |
| 273 | − return 0; | |
| 275 | + ret = hv_cpu_die(0); | |
| 276 | + return ret; | |
| 274 | 277 | } |
| 275 | 278 | |
| 276 | 279 | static void hv_resume(void) |
| 277 | 280 | { |
| 278 | 281 | union hv_x64_msr_hypercall_contents hypercall_msr; |
| 282 | + int ret; | |
| 283 | + | |
| 284 | + ret = hv_cpu_init(0); | |
| 285 | + WARN_ON(ret); | |
| 279 | 286 | |
| 280 | 287 | /* Re-enable the hypercall page */ |
| 281 | 288 | rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); |
| @@ -288,6 +295,7 @@ static void hv_resume(void) · 6 unmodified lines | ||
| 288 | 295 | hv_hypercall_pg_saved = NULL; |
| 289 | 296 | } |
| 290 | 297 | |
| 298 | +/* Note: when the ops are called, only CPU0 is online and IRQs are disabled. */ | |
| 291 | 299 | static struct syscore_ops hv_syscore_ops = { |
| 292 | 300 | .suspend = hv_suspend, |
| 293 | 301 | .resume = hv_resume, |
| @@ -61,11 +61,12 @@ static inline bool arch_syscall_match_sym_name(const char *sym, const char *name · 60 unmodified lines | ||
| 61 | 61 | { |
| 62 | 62 | /* |
| 63 | 63 | * Compare the symbol name with the system call name. Skip the |
| 64 | − * "__x64_sys", "__ia32_sys" or simple "sys" prefix. | |
| 64 | + * "__x64_sys", "__ia32_sys", "__do_sys" or simple "sys" prefix. | |
| 65 | 65 | */ |
| 66 | 66 | return !strcmp(sym + 3, name + 3) || |
| 67 | 67 | (!strncmp(sym, "__x64_", 6) && !strcmp(sym + 9, name + 3)) || |
| 68 | − (!strncmp(sym, "__ia32_", 7) && !strcmp(sym + 10, name + 3)); | |
| 68 | + (!strncmp(sym, "__ia32_", 7) && !strcmp(sym + 10, name + 3)) || | |
| 69 | + (!strncmp(sym, "__do_sys", 8) && !strcmp(sym + 8, name + 3)); | |
| 69 | 70 | } |
| 70 | 71 | |
| 71 | 72 | #ifndef COMPILE_OFFSETS |
| @@ -1663,8 +1663,8 @@ void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, · 1662 unmodified lines | ||
| 1663 | 1663 | static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq) |
| 1664 | 1664 | { |
| 1665 | 1665 | /* We can only post Fixed and LowPrio IRQs */ |
| 1666 | − return (irq->delivery_mode == dest_Fixed || | |
| 1667 | − irq->delivery_mode == dest_LowestPrio); | |
| 1666 | + return (irq->delivery_mode == APIC_DM_FIXED || | |
| 1667 | + irq->delivery_mode == APIC_DM_LOWEST); | |
| 1668 | 1668 | } |
| 1669 | 1669 | |
| 1670 | 1670 | static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) |
| @@ -13,64 +13,4 @@ struct mod_arch_specific { · 12 unmodified lines | ||
| 13 | 13 | #endif |
| 14 | 14 | }; |
| 15 | 15 | |
| 16 | −#ifdef CONFIG_X86_64 | |
| 17 | −/* X86_64 does not define MODULE_PROC_FAMILY */ | |
| 18 | −#elif defined CONFIG_M486SX | |
| 19 | −#define MODULE_PROC_FAMILY "486SX " | |
| 20 | −#elif defined CONFIG_M486 | |
| 21 | −#define MODULE_PROC_FAMILY "486 " | |
| 22 | −#elif defined CONFIG_M586 | |
| 23 | −#define MODULE_PROC_FAMILY "586 " | |
| 24 | −#elif defined CONFIG_M586TSC | |
| 25 | −#define MODULE_PROC_FAMILY "586TSC " | |
| 26 | −#elif defined CONFIG_M586MMX | |
| 27 | −#define MODULE_PROC_FAMILY "586MMX " | |
| 28 | −#elif defined CONFIG_MCORE2 | |
| 29 | −#define MODULE_PROC_FAMILY "CORE2 " | |
| 30 | −#elif defined CONFIG_MATOM | |
| 31 | −#define MODULE_PROC_FAMILY "ATOM " | |
| 32 | −#elif defined CONFIG_M686 | |
| 33 | −#define MODULE_PROC_FAMILY "686 " | |
| 34 | −#elif defined CONFIG_MPENTIUMII | |
| 35 | −#define MODULE_PROC_FAMILY "PENTIUMII " | |
| 36 | −#elif defined CONFIG_MPENTIUMIII | |
| 37 | −#define MODULE_PROC_FAMILY "PENTIUMIII " | |
| 38 | −#elif defined CONFIG_MPENTIUMM | |
| 39 | −#define MODULE_PROC_FAMILY "PENTIUMM " | |
| 40 | −#elif defined CONFIG_MPENTIUM4 | |
| 41 | −#define MODULE_PROC_FAMILY "PENTIUM4 " | |
| 42 | −#elif defined CONFIG_MK6 | |
| 43 | −#define MODULE_PROC_FAMILY "K6 " | |
| 44 | −#elif defined CONFIG_MK7 | |
| 45 | −#define MODULE_PROC_FAMILY "K7 " | |
| 46 | −#elif defined CONFIG_MK8 | |
| 47 | −#define MODULE_PROC_FAMILY "K8 " | |
| 48 | −#elif defined CONFIG_MELAN | |
| 49 | −#define MODULE_PROC_FAMILY "ELAN " | |
| 50 | −#elif defined CONFIG_MCRUSOE | |
| 51 | −#define MODULE_PROC_FAMILY "CRUSOE " | |
| 52 | −#elif defined CONFIG_MEFFICEON | |
| 53 | −#define MODULE_PROC_FAMILY "EFFICEON " | |
| 54 | −#elif defined CONFIG_MWINCHIPC6 | |
| 55 | −#define MODULE_PROC_FAMILY "WINCHIPC6 " | |
| 56 | −#elif defined CONFIG_MWINCHIP3D | |
| 57 | −#define MODULE_PROC_FAMILY "WINCHIP3D " | |
| 58 | −#elif defined CONFIG_MCYRIXIII | |
| 59 | −#define MODULE_PROC_FAMILY "CYRIXIII " | |
| 60 | −#elif defined CONFIG_MVIAC3_2 | |
| 61 | −#define MODULE_PROC_FAMILY "VIAC3-2 " | |
| 62 | −#elif defined CONFIG_MVIAC7 | |
| 63 | −#define MODULE_PROC_FAMILY "VIAC7 " | |
| 64 | −#elif defined CONFIG_MGEODEGX1 | |
| 65 | −#define MODULE_PROC_FAMILY "GEODEGX1 " | |
| 66 | −#elif defined CONFIG_MGEODE_LX | |
| 67 | −#define MODULE_PROC_FAMILY "GEODE " | |
| 68 | −#else | |
| 69 | −#error unknown processor family | |
| 70 | −#endif | |
| 71 | − | |
| 72 | −#ifdef CONFIG_X86_32 | |
| 73 | −# define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY | |
| 74 | −#endif | |
| 75 | − | |
| 76 | 16 | #endif /* _ASM_X86_MODULE_H */ |
| @@ -35,6 +35,8 @@ typedef int (*hyperv_fill_flush_list_func)( · 34 unmodified lines | ||
| 35 | 35 | rdmsrl(HV_X64_MSR_SINT0 + int_num, val) |
| 36 | 36 | #define hv_set_synint_state(int_num, val) \ |
| 37 | 37 | wrmsrl(HV_X64_MSR_SINT0 + int_num, val) |
| 38 | +#define hv_recommend_using_aeoi() \ | |
| 39 | + (!(ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED)) | |
| 38 | 40 | |
| 39 | 41 | #define hv_get_crash_ctl(val) \ |
| 40 | 42 | rdmsrl(HV_X64_MSR_CRASH_CTL, val) |
| @@ -237,27 +237,6 @@ enum ssb_mitigation { · 236 unmodified lines | ||
| 237 | 237 | extern char __indirect_thunk_start[]; |
| 238 | 238 | extern char __indirect_thunk_end[]; |
| 239 | 239 | |
| 240 | −/* | |
| 241 | − * On VMEXIT we must ensure that no RSB predictions learned in the guest | |
| 242 | − * can be followed in the host, by overwriting the RSB completely. Both | |
| 243 | − * retpoline and IBRS mitigations for Spectre v2 need this; only on future | |
| 244 | − * CPUs with IBRS_ALL *might* it be avoided. | |
| 245 | − */ | |
| 246 | −static inline void vmexit_fill_RSB(void) | |
| 247 | −{ | |
| 248 | −#ifdef CONFIG_RETPOLINE | |
| 249 | − unsigned long loops; | |
| 250 | − | |
| 251 | − asm volatile (ANNOTATE_NOSPEC_ALTERNATIVE | |
| 252 | − ALTERNATIVE("jmp 910f", | |
| 253 | − __stringify(__FILL_RETURN_BUFFER(%0, RSB_CLEAR_LOOPS, %1)), | |
| 254 | − X86_FEATURE_RETPOLINE) | |
| 255 | − "910:" | |
| 256 | − : "=r" (loops), ASM_CALL_CONSTRAINT | |
| 257 | − : : "memory" ); | |
| 258 | −#endif | |
| 259 | −} | |
| 260 | − | |
| 261 | 240 | static __always_inline |
| 262 | 241 | void alternative_msr_write(unsigned int msr, u64 val, unsigned int feature) |
| 263 | 242 | { |
| @@ -19,7 +19,7 @@ struct unwind_state { · 18 unmodified lines | ||
| 19 | 19 | #if defined(CONFIG_UNWINDER_ORC) |
| 20 | 20 | bool signal, full_regs; |
| 21 | 21 | unsigned long sp, bp, ip; |
| 22 | − struct pt_regs *regs; | |
| 22 | + struct pt_regs *regs, *prev_regs; | |
| 23 | 23 | #elif defined(CONFIG_UNWINDER_FRAME_POINTER) |
| 24 | 24 | bool got_irq; |
| 25 | 25 | unsigned long *bp, *orig_sp, ip; |
| @@ -0,0 +1,68 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0 */ | |
| 2 | + | |
| 3 | +#ifndef _ASM_VERMAGIC_H | |
| 4 | +#define _ASM_VERMAGIC_H | |
| 5 | + | |
| 6 | +#ifdef CONFIG_X86_64 | |
| 7 | +/* X86_64 does not define MODULE_PROC_FAMILY */ | |
| 8 | +#elif defined CONFIG_M486SX | |
| 9 | +#define MODULE_PROC_FAMILY "486SX " | |
| 10 | +#elif defined CONFIG_M486 | |
| 11 | +#define MODULE_PROC_FAMILY "486 " | |
| 12 | +#elif defined CONFIG_M586 | |
| 13 | +#define MODULE_PROC_FAMILY "586 " | |
| 14 | +#elif defined CONFIG_M586TSC | |
| 15 | +#define MODULE_PROC_FAMILY "586TSC " | |
| 16 | +#elif defined CONFIG_M586MMX | |
| 17 | +#define MODULE_PROC_FAMILY "586MMX " | |
| 18 | +#elif defined CONFIG_MCORE2 | |
| 19 | +#define MODULE_PROC_FAMILY "CORE2 " | |
| 20 | +#elif defined CONFIG_MATOM | |
| 21 | +#define MODULE_PROC_FAMILY "ATOM " | |
| 22 | +#elif defined CONFIG_M686 | |
| 23 | +#define MODULE_PROC_FAMILY "686 " | |
| 24 | +#elif defined CONFIG_MPENTIUMII | |
| 25 | +#define MODULE_PROC_FAMILY "PENTIUMII " | |
| 26 | +#elif defined CONFIG_MPENTIUMIII | |
| 27 | +#define MODULE_PROC_FAMILY "PENTIUMIII " | |
| 28 | +#elif defined CONFIG_MPENTIUMM | |
| 29 | +#define MODULE_PROC_FAMILY "PENTIUMM " | |
| 30 | +#elif defined CONFIG_MPENTIUM4 | |
| 31 | +#define MODULE_PROC_FAMILY "PENTIUM4 " | |
| 32 | +#elif defined CONFIG_MK6 | |
| 33 | +#define MODULE_PROC_FAMILY "K6 " | |
| 34 | +#elif defined CONFIG_MK7 | |
| 35 | +#define MODULE_PROC_FAMILY "K7 " | |
| 36 | +#elif defined CONFIG_MK8 | |
| 37 | +#define MODULE_PROC_FAMILY "K8 " | |
| 38 | +#elif defined CONFIG_MELAN | |
| 39 | +#define MODULE_PROC_FAMILY "ELAN " | |
| 40 | +#elif defined CONFIG_MCRUSOE | |
| 41 | +#define MODULE_PROC_FAMILY "CRUSOE " | |
| 42 | +#elif defined CONFIG_MEFFICEON | |
| 43 | +#define MODULE_PROC_FAMILY "EFFICEON " | |
| 44 | +#elif defined CONFIG_MWINCHIPC6 | |
| 45 | +#define MODULE_PROC_FAMILY "WINCHIPC6 " | |
| 46 | +#elif defined CONFIG_MWINCHIP3D | |
| 47 | +#define MODULE_PROC_FAMILY "WINCHIP3D " | |
| 48 | +#elif defined CONFIG_MCYRIXIII | |
| 49 | +#define MODULE_PROC_FAMILY "CYRIXIII " | |
| 50 | +#elif defined CONFIG_MVIAC3_2 | |
| 51 | +#define MODULE_PROC_FAMILY "VIAC3-2 " | |
| 52 | +#elif defined CONFIG_MVIAC7 | |
| 53 | +#define MODULE_PROC_FAMILY "VIAC7 " | |
| 54 | +#elif defined CONFIG_MGEODEGX1 | |
| 55 | +#define MODULE_PROC_FAMILY "GEODEGX1 " | |
| 56 | +#elif defined CONFIG_MGEODE_LX | |
| 57 | +#define MODULE_PROC_FAMILY "GEODE " | |
| 58 | +#else | |
| 59 | +#error unknown processor family | |
| 60 | +#endif | |
| 61 | + | |
| 62 | +#ifdef CONFIG_X86_32 | |
| 63 | +# define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY | |
| 64 | +#else | |
| 65 | +# define MODULE_ARCH_VERMAGIC "" | |
| 66 | +#endif | |
| 67 | + | |
| 68 | +#endif /* _ASM_VERMAGIC_H */ | |
| @@ -352,8 +352,6 @@ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen) · 351 unmodified lines | ||
| 352 | 352 | * According to Intel, MFENCE can do the serialization here. |
| 353 | 353 | */ |
| 354 | 354 | asm volatile("mfence" : : : "memory"); |
| 355 | − | |
| 356 | − printk_once(KERN_DEBUG "TSC deadline timer enabled\n"); | |
| 357 | 355 | return; |
| 358 | 356 | } |
| 359 | 357 | |
| @@ -546,7 +544,7 @@ static struct clock_event_device lapic_clockevent = { · 186 unmodified lines | ||
| 546 | 544 | }; |
| 547 | 545 | static DEFINE_PER_CPU(struct clock_event_device, lapic_events); |
| 548 | 546 | |
| 549 | −static u32 hsx_deadline_rev(void) | |
| 547 | +static __init u32 hsx_deadline_rev(void) | |
| 550 | 548 | { |
| 551 | 549 | switch (boot_cpu_data.x86_stepping) { |
| 552 | 550 | case 0x02: return 0x3a; /* EP */ |
| @@ -556,7 +554,7 @@ static u32 hsx_deadline_rev(void) · 3 unmodified lines | ||
| 556 | 554 | return ~0U; |
| 557 | 555 | } |
| 558 | 556 | |
| 559 | −static u32 bdx_deadline_rev(void) | |
| 557 | +static __init u32 bdx_deadline_rev(void) | |
| 560 | 558 | { |
| 561 | 559 | switch (boot_cpu_data.x86_stepping) { |
| 562 | 560 | case 0x02: return 0x00000011; |
| @@ -568,7 +566,7 @@ static u32 bdx_deadline_rev(void) · 5 unmodified lines | ||
| 568 | 566 | return ~0U; |
| 569 | 567 | } |
| 570 | 568 | |
| 571 | −static u32 skx_deadline_rev(void) | |
| 569 | +static __init u32 skx_deadline_rev(void) | |
| 572 | 570 | { |
| 573 | 571 | switch (boot_cpu_data.x86_stepping) { |
| 574 | 572 | case 0x03: return 0x01000136; |
| @@ -581,7 +579,7 @@ static u32 skx_deadline_rev(void) · 6 unmodified lines | ||
| 581 | 579 | return ~0U; |
| 582 | 580 | } |
| 583 | 581 | |
| 584 | −static const struct x86_cpu_id deadline_match[] = { | |
| 582 | +static const struct x86_cpu_id deadline_match[] __initconst = { | |
| 585 | 583 | X86_MATCH_INTEL_FAM6_MODEL( HASWELL_X, &hsx_deadline_rev), |
| 586 | 584 | X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_X, 0x0b000020), |
| 587 | 585 | X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_D, &bdx_deadline_rev), |
| @@ -603,18 +601,19 @@ static const struct x86_cpu_id deadline_match[] = { · 15 unmodified lines | ||
| 603 | 601 | {}, |
| 604 | 602 | }; |
| 605 | 603 | |
| 606 | −static void apic_check_deadline_errata(void) | |
| 604 | +static __init bool apic_validate_deadline_timer(void) | |
| 607 | 605 | { |
| 608 | 606 | const struct x86_cpu_id *m; |
| 609 | 607 | u32 rev; |
| 610 | 608 | |
| 611 | − if (!boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER) || | |
| 612 | − boot_cpu_has(X86_FEATURE_HYPERVISOR)) | |
| 613 | − return; | |
| 609 | + if (!boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER)) | |
| 610 | + return false; | |
| 611 | + if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) | |
| 612 | + return true; | |
| 614 | 613 | |
| 615 | 614 | m = x86_match_cpu(deadline_match); |
| 616 | 615 | if (!m) |
| 617 | − return; | |
| 616 | + return true; | |
| 618 | 617 | |
| 619 | 618 | /* |
| 620 | 619 | * Function pointers will have the MSB set due to address layout, |
| @@ -626,11 +625,12 @@ static void apic_check_deadline_errata(void) · 5 unmodified lines | ||
| 626 | 625 | rev = (u32)m->driver_data; |
| 627 | 626 | |
| 628 | 627 | if (boot_cpu_data.microcode >= rev) |
| 629 | − return; | |
| 628 | + return true; | |
| 630 | 629 | |
| 631 | 630 | setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER); |
| 632 | 631 | pr_err(FW_BUG "TSC_DEADLINE disabled due to Errata; " |
| 633 | 632 | "please update microcode to version: 0x%x (or later)\n", rev); |
| 633 | + return false; | |
| 634 | 634 | } |
| 635 | 635 | |
| 636 | 636 | /* |
| @@ -2092,7 +2092,8 @@ void __init init_apic_mappings(void) · 1455 unmodified lines | ||
| 2092 | 2092 | { |
| 2093 | 2093 | unsigned int new_apicid; |
| 2094 | 2094 | |
| 2095 | − apic_check_deadline_errata(); | |
| 2095 | + if (apic_validate_deadline_timer()) | |
| 2096 | + pr_debug("TSC deadline timer available\n"); | |
| 2096 | 2097 | |
| 2097 | 2098 | if (x2apic_mode) { |
| 2098 | 2099 | boot_cpu_physical_apicid = read_apic_id(); |
| @@ -183,7 +183,8 @@ recursion_check: · 182 unmodified lines | ||
| 183 | 183 | */ |
| 184 | 184 | if (visit_mask) { |
| 185 | 185 | if (*visit_mask & (1UL << info->type)) { |
| 186 | − printk_deferred_once(KERN_WARNING "WARNING: stack recursion on stack type %d\n", info->type); | |
| 186 | + if (task == current) | |
| 187 | + printk_deferred_once(KERN_WARNING "WARNING: stack recursion on stack type %d\n", info->type); | |
| 187 | 188 | goto unknown; |
| 188 | 189 | } |
| 189 | 190 | *visit_mask |= 1UL << info->type; |
| @@ -147,7 +147,7 @@ static inline void smpboot_restore_warm_reset_vector(void) · 146 unmodified lines | ||
| 147 | 147 | *((volatile u32 *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0; |
| 148 | 148 | } |
| 149 | 149 | |
| 150 | −static void init_freq_invariance(void); | |
| 150 | +static void init_freq_invariance(bool secondary); | |
| 151 | 151 | |
| 152 | 152 | /* |
| 153 | 153 | * Report back to the Boot Processor during boot time or to the caller processor |
| @@ -185,7 +185,7 @@ static void smp_callin(void) · 31 unmodified lines | ||
| 185 | 185 | */ |
| 186 | 186 | set_cpu_sibling_map(raw_smp_processor_id()); |
| 187 | 187 | |
| 188 | − init_freq_invariance(); | |
| 188 | + init_freq_invariance(true); | |
| 189 | 189 | |
| 190 | 190 | /* |
| 191 | 191 | * Get our bogomips. |
| @@ -1341,7 +1341,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus) · 1149 unmodified lines | ||
| 1341 | 1341 | set_sched_topology(x86_topology); |
| 1342 | 1342 | |
| 1343 | 1343 | set_cpu_sibling_map(0); |
| 1344 | − init_freq_invariance(); | |
| 1344 | + init_freq_invariance(false); | |
| 1345 | 1345 | smp_sanity_check(); |
| 1346 | 1346 | |
| 1347 | 1347 | switch (apic_intr_mode) { |
| @@ -1877,9 +1877,6 @@ static bool knl_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq, · 529 unmodified lines | ||
| 1877 | 1877 | int err, i; |
| 1878 | 1878 | u64 msr; |
| 1879 | 1879 | |
| 1880 | − if (!x86_match_cpu(has_knl_turbo_ratio_limits)) | |
| 1881 | − return false; | |
| 1882 | − | |
| 1883 | 1880 | err = rdmsrl_safe(MSR_PLATFORM_INFO, base_freq); |
| 1884 | 1881 | if (err) |
| 1885 | 1882 | return false; |
| @@ -1945,18 +1942,23 @@ static bool skx_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq, int size) · 59 unmodified lines | ||
| 1945 | 1942 | |
| 1946 | 1943 | static bool core_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq) |
| 1947 | 1944 | { |
| 1945 | + u64 msr; | |
| 1948 | 1946 | int err; |
| 1949 | 1947 | |
| 1950 | 1948 | err = rdmsrl_safe(MSR_PLATFORM_INFO, base_freq); |
| 1951 | 1949 | if (err) |
| 1952 | 1950 | return false; |
| 1953 | 1951 | |
| 1954 | − err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT, turbo_freq); | |
| 1952 | + err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT, &msr); | |
| 1955 | 1953 | if (err) |
| 1956 | 1954 | return false; |
| 1957 | 1955 | |
| 1958 | − *base_freq = (*base_freq >> 8) & 0xFF; /* max P state */ | |
| 1959 | − *turbo_freq = (*turbo_freq >> 24) & 0xFF; /* 4C turbo */ | |
| 1956 | + *base_freq = (*base_freq >> 8) & 0xFF; /* max P state */ | |
| 1957 | + *turbo_freq = (msr >> 24) & 0xFF; /* 4C turbo */ | |
| 1958 | + | |
| 1959 | + /* The CPU may have less than 4 cores */ | |
| 1960 | + if (!*turbo_freq) | |
| 1961 | + *turbo_freq = msr & 0xFF; /* 1C turbo */ | |
| 1960 | 1962 | |
| 1961 | 1963 | return true; |
| 1962 | 1964 | } |
| @@ -1972,7 +1974,8 @@ static bool intel_set_max_freq_ratio(void) · 9 unmodified lines | ||
| 1972 | 1974 | skx_set_max_freq_ratio(&base_freq, &turbo_freq, 1)) |
| 1973 | 1975 | goto out; |
| 1974 | 1976 | |
| 1975 | − if (knl_set_max_freq_ratio(&base_freq, &turbo_freq, 1)) | |
| 1977 | + if (x86_match_cpu(has_knl_turbo_ratio_limits) && | |
| 1978 | + knl_set_max_freq_ratio(&base_freq, &turbo_freq, 1)) | |
| 1976 | 1979 | goto out; |
| 1977 | 1980 | |
| 1978 | 1981 | if (x86_match_cpu(has_skx_turbo_ratio_limits) && |
| @@ -1985,13 +1988,22 @@ static bool intel_set_max_freq_ratio(void) · 6 unmodified lines | ||
| 1985 | 1988 | return false; |
| 1986 | 1989 | |
| 1987 | 1990 | out: |
| 1991 | + /* | |
| 1992 | + * Some hypervisors advertise X86_FEATURE_APERFMPERF | |
| 1993 | + * but then fill all MSR's with zeroes. | |
| 1994 | + */ | |
| 1995 | + if (!base_freq) { | |
| 1996 | + pr_debug("Couldn't determine cpu base frequency, necessary for scale-invariant accounting.\n"); | |
| 1997 | + return false; | |
| 1998 | + } | |
| 1999 | + | |
| 1988 | 2000 | arch_turbo_freq_ratio = div_u64(turbo_freq * SCHED_CAPACITY_SCALE, |
| 1989 | 2001 | base_freq); |
| 1990 | 2002 | arch_set_max_freq_ratio(turbo_disabled()); |
| 1991 | 2003 | return true; |
| 1992 | 2004 | } |
| 1993 | 2005 | |
| 1994 | −static void init_counter_refs(void *arg) | |
| 2006 | +static void init_counter_refs(void) | |
| 1995 | 2007 | { |
| 1996 | 2008 | u64 aperf, mperf; |
| 1997 | 2009 | |
| @@ -2002,18 +2014,25 @@ static void init_counter_refs(void *arg) · 4 unmodified lines | ||
| 2002 | 2014 | this_cpu_write(arch_prev_mperf, mperf); |
| 2003 | 2015 | } |
| 2004 | 2016 | |
| 2005 | −static void init_freq_invariance(void) | |
| 2017 | +static void init_freq_invariance(bool secondary) | |
| 2006 | 2018 | { |
| 2007 | 2019 | bool ret = false; |
| 2008 | 2020 | |
| 2009 | − if (smp_processor_id() != 0 || !boot_cpu_has(X86_FEATURE_APERFMPERF)) | |
| 2021 | + if (!boot_cpu_has(X86_FEATURE_APERFMPERF)) | |
| 2010 | 2022 | return; |
| 2011 | 2023 | |
| 2024 | + if (secondary) { | |
| 2025 | + if (static_branch_likely(&arch_scale_freq_key)) { | |
| 2026 | + init_counter_refs(); | |
| 2027 | + } | |
| 2028 | + return; | |
| 2029 | + } | |
| 2030 | + | |
| 2012 | 2031 | if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) |
| 2013 | 2032 | ret = intel_set_max_freq_ratio(); |
| 2014 | 2033 | |
| 2015 | 2034 | if (ret) { |
| 2016 | − on_each_cpu(init_counter_refs, NULL, 1); | |
| 2035 | + init_counter_refs(); | |
| 2017 | 2036 | static_branch_enable(&arch_scale_freq_key); |
| 2018 | 2037 | } else { |
| 2019 | 2038 | pr_debug("Couldn't determine max cpu frequency, necessary for scale-invariant accounting.\n"); |
| @@ -344,6 +344,9 @@ bad_address: · 343 unmodified lines | ||
| 344 | 344 | if (IS_ENABLED(CONFIG_X86_32)) |
| 345 | 345 | goto the_end; |
| 346 | 346 | |
| 347 | + if (state->task != current) | |
| 348 | + goto the_end; | |
| 349 | + | |
| 347 | 350 | if (state->regs) { |
| 348 | 351 | printk_deferred_once(KERN_WARNING |
| 349 | 352 | "WARNING: kernel stack regs at %p in %s:%d has bad 'bp' value %p\n", |
| @@ -8,19 +8,21 @@ · 7 unmodified lines | ||
| 8 | 8 | #include <asm/orc_lookup.h> |
| 9 | 9 | |
| 10 | 10 | #define orc_warn(fmt, ...) \ |
| 11 | − printk_deferred_once(KERN_WARNING pr_fmt("WARNING: " fmt), ##__VA_ARGS__) | |
| 11 | + printk_deferred_once(KERN_WARNING "WARNING: " fmt, ##__VA_ARGS__) | |
| 12 | + | |
| 13 | +#define orc_warn_current(args...) \ | |
| 14 | +({ \ | |
| 15 | + if (state->task == current) \ | |
| 16 | + orc_warn(args); \ | |
| 17 | +}) | |
| 12 | 18 | |
| 13 | 19 | extern int __start_orc_unwind_ip[]; |
| 14 | 20 | extern int __stop_orc_unwind_ip[]; |
| 15 | 21 | extern struct orc_entry __start_orc_unwind[]; |
| 16 | 22 | extern struct orc_entry __stop_orc_unwind[]; |
| 17 | 23 | |
| 18 | −static DEFINE_MUTEX(sort_mutex); | |
| 19 | −int *cur_orc_ip_table = __start_orc_unwind_ip; | |
| 20 | −struct orc_entry *cur_orc_table = __start_orc_unwind; | |
| 21 | − | |
| 22 | −unsigned int lookup_num_blocks; | |
| 23 | −bool orc_init; | |
| 24 | +static bool orc_init __ro_after_init; | |
| 25 | +static unsigned int lookup_num_blocks __ro_after_init; | |
| 24 | 26 | |
| 25 | 27 | static inline unsigned long orc_ip(const int *ip) |
| 26 | 28 | { |
| @@ -142,9 +144,6 @@ static struct orc_entry *orc_find(unsigned long ip) · 115 unmodified lines | ||
| 142 | 144 | { |
| 143 | 145 | static struct orc_entry *orc; |
| 144 | 146 | |
| 145 | − if (!orc_init) | |
| 146 | − return NULL; | |
| 147 | − | |
| 148 | 147 | if (ip == 0) |
| 149 | 148 | return &null_orc_entry; |
| 150 | 149 | |
| @@ -189,6 +188,10 @@ static struct orc_entry *orc_find(unsigned long ip) · 38 unmodified lines | ||
| 189 | 188 | |
| 190 | 189 | #ifdef CONFIG_MODULES |
| 191 | 190 | |
| 191 | +static DEFINE_MUTEX(sort_mutex); | |
| 192 | +static int *cur_orc_ip_table = __start_orc_unwind_ip; | |
| 193 | +static struct orc_entry *cur_orc_table = __start_orc_unwind; | |
| 194 | + | |
| 192 | 195 | static void orc_sort_swap(void *_a, void *_b, int size) |
| 193 | 196 | { |
| 194 | 197 | struct orc_entry *orc_a, *orc_b; |
| @@ -381,9 +384,38 @@ static bool deref_stack_iret_regs(struct unwind_state *state, unsigned long addr · 186 unmodified lines | ||
| 381 | 384 | return true; |
| 382 | 385 | } |
| 383 | 386 | |
| 387 | +/* | |
| 388 | + * If state->regs is non-NULL, and points to a full pt_regs, just get the reg | |
| 389 | + * value from state->regs. | |
| 390 | + * | |
| 391 | + * Otherwise, if state->regs just points to IRET regs, and the previous frame | |
| 392 | + * had full regs, it's safe to get the value from the previous regs. This can | |
| 393 | + * happen when early/late IRQ entry code gets interrupted by an NMI. | |
| 394 | + */ | |
| 395 | +static bool get_reg(struct unwind_state *state, unsigned int reg_off, | |
| 396 | + unsigned long *val) | |
| 397 | +{ | |
| 398 | + unsigned int reg = reg_off/8; | |
| 399 | + | |
| 400 | + if (!state->regs) | |
| 401 | + return false; | |
| 402 | + | |
| 403 | + if (state->full_regs) { | |
| 404 | + *val = ((unsigned long *)state->regs)[reg]; | |
| 405 | + return true; | |
| 406 | + } | |
| 407 | + | |
| 408 | + if (state->prev_regs) { | |
| 409 | + *val = ((unsigned long *)state->prev_regs)[reg]; | |
| 410 | + return true; | |
| 411 | + } | |
| 412 | + | |
| 413 | + return false; | |
| 414 | +} | |
| 415 | + | |
| 384 | 416 | bool unwind_next_frame(struct unwind_state *state) |
| 385 | 417 | { |
| 386 | − unsigned long ip_p, sp, orig_ip = state->ip, prev_sp = state->sp; | |
| 418 | + unsigned long ip_p, sp, tmp, orig_ip = state->ip, prev_sp = state->sp; | |
| 387 | 419 | enum stack_type prev_type = state->stack_info.type; |
| 388 | 420 | struct orc_entry *orc; |
| 389 | 421 | bool indirect = false; |
| @@ -445,43 +477,39 @@ bool unwind_next_frame(struct unwind_state *state) · 55 unmodified lines | ||
| 445 | 477 | break; |
| 446 | 478 | |
| 447 | 479 | case ORC_REG_R10: |
| 448 | − if (!state->regs || !state->full_regs) { | |
| 449 | − orc_warn("missing regs for base reg R10 at ip %pB\n", | |
| 450 | − (void *)state->ip); | |
| 480 | + if (!get_reg(state, offsetof(struct pt_regs, r10), &sp)) { | |
| 481 | + orc_warn_current("missing R10 value at %pB\n", | |
| 482 | + (void *)state->ip); | |
| 451 | 483 | goto err; |
| 452 | 484 | } |
| 453 | − sp = state->regs->r10; | |
| 454 | 485 | break; |
| 455 | 486 | |
| 456 | 487 | case ORC_REG_R13: |
| 457 | − if (!state->regs || !state->full_regs) { | |
| 458 | − orc_warn("missing regs for base reg R13 at ip %pB\n", | |
| 459 | − (void *)state->ip); | |
| 488 | + if (!get_reg(state, offsetof(struct pt_regs, r13), &sp)) { | |
| 489 | + orc_warn_current("missing R13 value at %pB\n", | |
| 490 | + (void *)state->ip); | |
| 460 | 491 | goto err; |
| 461 | 492 | } |
| 462 | − sp = state->regs->r13; | |
| 463 | 493 | break; |
| 464 | 494 | |
| 465 | 495 | case ORC_REG_DI: |
| 466 | − if (!state->regs || !state->full_regs) { | |
| 467 | − orc_warn("missing regs for base reg DI at ip %pB\n", | |
| 468 | − (void *)state->ip); | |
| 496 | + if (!get_reg(state, offsetof(struct pt_regs, di), &sp)) { | |
| 497 | + orc_warn_current("missing RDI value at %pB\n", | |
| 498 | + (void *)state->ip); | |
| 469 | 499 | goto err; |
| 470 | 500 | } |
| 471 | − sp = state->regs->di; | |
| 472 | 501 | break; |
| 473 | 502 | |
| 474 | 503 | case ORC_REG_DX: |
| 475 | − if (!state->regs || !state->full_regs) { | |
| 476 | − orc_warn("missing regs for base reg DX at ip %pB\n", | |
| 477 | − (void *)state->ip); | |
| 504 | + if (!get_reg(state, offsetof(struct pt_regs, dx), &sp)) { | |
| 505 | + orc_warn_current("missing DX value at %pB\n", | |
| 506 | + (void *)state->ip); | |
| 478 | 507 | goto err; |
| 479 | 508 | } |
| 480 | − sp = state->regs->dx; | |
| 481 | 509 | break; |
| 482 | 510 | |
| 483 | 511 | default: |
| 484 | − orc_warn("unknown SP base reg %d for ip %pB\n", | |
| 512 | + orc_warn("unknown SP base reg %d at %pB\n", | |
| 485 | 513 | orc->sp_reg, (void *)state->ip); |
| 486 | 514 | goto err; |
| 487 | 515 | } |
| @@ -504,44 +532,48 @@ bool unwind_next_frame(struct unwind_state *state) · 16 unmodified lines | ||
| 504 | 532 | |
| 505 | 533 | state->sp = sp; |
| 506 | 534 | state->regs = NULL; |
| 535 | + state->prev_regs = NULL; | |
| 507 | 536 | state->signal = false; |
| 508 | 537 | break; |
| 509 | 538 | |
| 510 | 539 | case ORC_TYPE_REGS: |
| 511 | 540 | if (!deref_stack_regs(state, sp, &state->ip, &state->sp)) { |
| 512 | − orc_warn("can't dereference registers at %p for ip %pB\n", | |
| 513 | − (void *)sp, (void *)orig_ip); | |
| 541 | + orc_warn_current("can't access registers at %pB\n", | |
| 542 | + (void *)orig_ip); | |
| 514 | 543 | goto err; |
| 515 | 544 | } |
| 516 | 545 | |
| 517 | 546 | state->regs = (struct pt_regs *)sp; |
| 547 | + state->prev_regs = NULL; | |
| 518 | 548 | state->full_regs = true; |
| 519 | 549 | state->signal = true; |
| 520 | 550 | break; |
| 521 | 551 | |
| 522 | 552 | case ORC_TYPE_REGS_IRET: |
| 523 | 553 | if (!deref_stack_iret_regs(state, sp, &state->ip, &state->sp)) { |
| 524 | − orc_warn("can't dereference iret registers at %p for ip %pB\n", | |
| 525 | − (void *)sp, (void *)orig_ip); | |
| 554 | + orc_warn_current("can't access iret registers at %pB\n", | |
| 555 | + (void *)orig_ip); | |
| 526 | 556 | goto err; |
| 527 | 557 | } |
| 528 | 558 | |
| 559 | + if (state->full_regs) | |
| 560 | + state->prev_regs = state->regs; | |
| 529 | 561 | state->regs = (void *)sp - IRET_FRAME_OFFSET; |
| 530 | 562 | state->full_regs = false; |
| 531 | 563 | state->signal = true; |
| 532 | 564 | break; |
| 533 | 565 | |
| 534 | 566 | default: |
| 535 | − orc_warn("unknown .orc_unwind entry type %d for ip %pB\n", | |
| 567 | + orc_warn("unknown .orc_unwind entry type %d at %pB\n", | |
| 536 | 568 | orc->type, (void *)orig_ip); |
| 537 | − break; | |
| 569 | + goto err; | |
| 538 | 570 | } |
| 539 | 571 | |
| 540 | 572 | /* Find BP: */ |
| 541 | 573 | switch (orc->bp_reg) { |
| 542 | 574 | case ORC_REG_UNDEFINED: |
| 543 | − if (state->regs && state->full_regs) | |
| 544 | − state->bp = state->regs->bp; | |
| 575 | + if (get_reg(state, offsetof(struct pt_regs, bp), &tmp)) | |
| 576 | + state->bp = tmp; | |
| 545 | 577 | break; |
| 546 | 578 | |
| 547 | 579 | case ORC_REG_PREV_SP: |
| @@ -564,8 +596,8 @@ bool unwind_next_frame(struct unwind_state *state) · 16 unmodified lines | ||
| 564 | 596 | if (state->stack_info.type == prev_type && |
| 565 | 597 | on_stack(&state->stack_info, (void *)state->sp, sizeof(long)) && |
| 566 | 598 | state->sp <= prev_sp) { |
| 567 | − orc_warn("stack going in the wrong direction? ip=%pB\n", | |
| 568 | − (void *)orig_ip); | |
| 599 | + orc_warn_current("stack going in the wrong direction? at %pB\n", | |
| 600 | + (void *)orig_ip); | |
| 569 | 601 | goto err; |
| 570 | 602 | } |
| 571 | 603 | |
| @@ -585,6 +617,9 @@ EXPORT_SYMBOL_GPL(unwind_next_frame); · 13 unmodified lines | ||
| 585 | 617 | void __unwind_start(struct unwind_state *state, struct task_struct *task, |
| 586 | 618 | struct pt_regs *regs, unsigned long *first_frame) |
| 587 | 619 | { |
| 620 | + if (!orc_init) | |
| 621 | + goto done; | |
| 622 | + | |
| 588 | 623 | memset(state, 0, sizeof(*state)); |
| 589 | 624 | state->task = task; |
| 590 | 625 | |
| @@ -651,7 +686,7 @@ void __unwind_start(struct unwind_state *state, struct task_struct *task, · 60 unmodified lines | ||
| 651 | 686 | /* Otherwise, skip ahead to the user-specified starting frame: */ |
| 652 | 687 | while (!unwind_done(state) && |
| 653 | 688 | (!on_stack(&state->stack_info, first_frame, sizeof(long)) || |
| 654 | − state->sp <= (unsigned long)first_frame)) | |
| 689 | + state->sp < (unsigned long)first_frame)) | |
| 655 | 690 | unwind_next_frame(state); |
| 656 | 691 | |
| 657 | 692 | return; |
| @@ -3,6 +3,10 @@ · 2 unmodified lines | ||
| 3 | 3 | ccflags-y += -Iarch/x86/kvm |
| 4 | 4 | ccflags-$(CONFIG_KVM_WERROR) += -Werror |
| 5 | 5 | |
| 6 | +ifeq ($(CONFIG_FRAME_POINTER),y) | |
| 7 | +OBJECT_FILES_NON_STANDARD_vmenter.o := y | |
| 8 | +endif | |
| 9 | + | |
| 6 | 10 | KVM := ../../../virt/kvm |
| 7 | 11 | |
| 8 | 12 | kvm-y += $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o \ |
| @@ -225,12 +225,12 @@ static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq, · 224 unmodified lines | ||
| 225 | 225 | } |
| 226 | 226 | |
| 227 | 227 | /* |
| 228 | − * AMD SVM AVIC accelerate EOI write and do not trap, | |
| 229 | − * in-kernel IOAPIC will not be able to receive the EOI. | |
| 230 | − * In this case, we do lazy update of the pending EOI when | |
| 231 | − * trying to set IOAPIC irq. | |
| 228 | + * AMD SVM AVIC accelerate EOI write iff the interrupt is edge | |
| 229 | + * triggered, in which case the in-kernel IOAPIC will not be able | |
| 230 | + * to receive the EOI. In this case, we do a lazy update of the | |
| 231 | + * pending EOI when trying to set IOAPIC irq. | |
| 232 | 232 | */ |
| 233 | − if (kvm_apicv_activated(ioapic->kvm)) | |
| 233 | + if (edge && kvm_apicv_activated(ioapic->kvm)) | |
| 234 | 234 | ioapic_lazy_update_eoi(ioapic, irq); |
| 235 | 235 | |
| 236 | 236 | /* |
| @@ -12,6 +12,7 @@ · 11 unmodified lines | ||
| 12 | 12 | #include <linux/kernel.h> |
| 13 | 13 | #include <linux/highmem.h> |
| 14 | 14 | #include <linux/psp-sev.h> |
| 15 | +#include <linux/pagemap.h> | |
| 15 | 16 | #include <linux/swap.h> |
| 16 | 17 | |
| 17 | 18 | #include "x86.h" |
| @@ -344,7 +345,7 @@ static struct page **sev_pin_memory(struct kvm *kvm, unsigned long uaddr, · 326 unmodified lines | ||
| 344 | 345 | return NULL; |
| 345 | 346 | |
| 346 | 347 | /* Pin the user virtual address. */ |
| 347 | − npinned = get_user_pages_fast(uaddr, npages, FOLL_WRITE, pages); | |
| 348 | + npinned = get_user_pages_fast(uaddr, npages, write ? FOLL_WRITE : 0, pages); | |
| 348 | 349 | if (npinned != npages) { |
| 349 | 350 | pr_err("SEV: Failure locking %lu pages.\n", npages); |
| 350 | 351 | goto err; |
| @@ -1117,7 +1118,7 @@ int __init sev_hardware_setup(void) · 766 unmodified lines | ||
| 1117 | 1118 | /* Maximum number of encrypted guests supported simultaneously */ |
| 1118 | 1119 | max_sev_asid = cpuid_ecx(0x8000001F); |
| 1119 | 1120 | |
| 1120 | − if (!max_sev_asid) | |
| 1121 | + if (!svm_sev_enabled()) | |
| 1121 | 1122 | return 1; |
| 1122 | 1123 | |
| 1123 | 1124 | /* Minimum ASID value that should be used for SEV guest */ |
| @@ -1156,6 +1157,9 @@ err: · 32 unmodified lines | ||
| 1156 | 1157 | |
| 1157 | 1158 | void sev_hardware_teardown(void) |
| 1158 | 1159 | { |
| 1160 | + if (!svm_sev_enabled()) | |
| 1161 | + return; | |
| 1162 | + | |
| 1159 | 1163 | bitmap_free(sev_asid_bitmap); |
| 1160 | 1164 | bitmap_free(sev_reclaim_asid_bitmap); |
| 1161 | 1165 | |
| @@ -1752,6 +1752,8 @@ static int db_interception(struct vcpu_svm *svm) · 1751 unmodified lines | ||
| 1752 | 1752 | if (svm->vcpu.guest_debug & |
| 1753 | 1753 | (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP)) { |
| 1754 | 1754 | kvm_run->exit_reason = KVM_EXIT_DEBUG; |
| 1755 | + kvm_run->debug.arch.dr6 = svm->vmcb->save.dr6; | |
| 1756 | + kvm_run->debug.arch.dr7 = svm->vmcb->save.dr7; | |
| 1755 | 1757 | kvm_run->debug.arch.pc = |
| 1756 | 1758 | svm->vmcb->save.cs.base + svm->vmcb->save.rip; |
| 1757 | 1759 | kvm_run->debug.arch.exception = DB_VECTOR; |
| @@ -3276,7 +3278,7 @@ static void svm_cancel_injection(struct kvm_vcpu *vcpu) · 1518 unmodified lines | ||
| 3276 | 3278 | svm_complete_interrupts(svm); |
| 3277 | 3279 | } |
| 3278 | 3280 | |
| 3279 | −bool __svm_vcpu_run(unsigned long vmcb_pa, unsigned long *regs); | |
| 3281 | +void __svm_vcpu_run(unsigned long vmcb_pa, unsigned long *regs); | |
| 3280 | 3282 | |
| 3281 | 3283 | static void svm_vcpu_run(struct kvm_vcpu *vcpu) |
| 3282 | 3284 | { |
| @@ -3330,13 +3332,8 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu) · 47 unmodified lines | ||
| 3330 | 3332 | */ |
| 3331 | 3333 | x86_spec_ctrl_set_guest(svm->spec_ctrl, svm->virt_spec_ctrl); |
| 3332 | 3334 | |
| 3333 | − local_irq_enable(); | |
| 3334 | − | |
| 3335 | 3335 | __svm_vcpu_run(svm->vmcb_pa, (unsigned long *)&svm->vcpu.arch.regs); |
| 3336 | 3336 | |
| 3337 | − /* Eliminate branch target predictions from guest mode */ | |
| 3338 | − vmexit_fill_RSB(); | |
| 3339 | − | |
| 3340 | 3337 | #ifdef CONFIG_X86_64 |
| 3341 | 3338 | wrmsrl(MSR_GS_BASE, svm->host.gs_base); |
| 3342 | 3339 | #else |
| @@ -3366,8 +3363,6 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu) · 23 unmodified lines | ||
| 3366 | 3363 | |
| 3367 | 3364 | reload_tss(vcpu); |
| 3368 | 3365 | |
| 3369 | − local_irq_disable(); | |
| 3370 | − | |
| 3371 | 3366 | x86_spec_ctrl_restore_host(svm->spec_ctrl, svm->virt_spec_ctrl); |
| 3372 | 3367 | |
| 3373 | 3368 | vcpu->arch.cr2 = svm->vmcb->save.cr2; |
| @@ -3411,7 +3406,6 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu) · 37 unmodified lines | ||
| 3411 | 3406 | |
| 3412 | 3407 | mark_all_clean(svm->vmcb); |
| 3413 | 3408 | } |
| 3414 | −STACK_FRAME_NON_STANDARD(svm_vcpu_run); | |
| 3415 | 3409 | |
| 3416 | 3410 | static void svm_load_mmu_pgd(struct kvm_vcpu *vcpu, unsigned long root) |
| 3417 | 3411 | { |
| @@ -3,6 +3,7 @@ · 2 unmodified lines | ||
| 3 | 3 | #include <asm/asm.h> |
| 4 | 4 | #include <asm/bitsperlong.h> |
| 5 | 5 | #include <asm/kvm_vcpu_regs.h> |
| 6 | +#include <asm/nospec-branch.h> | |
| 6 | 7 | |
| 7 | 8 | #define WORD_SIZE (BITS_PER_LONG / 8) |
| 8 | 9 | |
| @@ -35,7 +36,6 @@ · 26 unmodified lines | ||
| 35 | 36 | */ |
| 36 | 37 | SYM_FUNC_START(__svm_vcpu_run) |
| 37 | 38 | push %_ASM_BP |
| 38 | − mov %_ASM_SP, %_ASM_BP | |
| 39 | 39 | #ifdef CONFIG_X86_64 |
| 40 | 40 | push %r15 |
| 41 | 41 | push %r14 |
| @@ -78,6 +78,7 @@ SYM_FUNC_START(__svm_vcpu_run) · 36 unmodified lines | ||
| 78 | 78 | pop %_ASM_AX |
| 79 | 79 | |
| 80 | 80 | /* Enter guest mode */ |
| 81 | + sti | |
| 81 | 82 | 1: vmload %_ASM_AX |
| 82 | 83 | jmp 3f |
| 83 | 84 | 2: cmpb $0, kvm_rebooting |
| @@ -99,6 +100,13 @@ SYM_FUNC_START(__svm_vcpu_run) · 15 unmodified lines | ||
| 99 | 100 | ud2 |
| 100 | 101 | _ASM_EXTABLE(5b, 6b) |
| 101 | 102 | 7: |
| 103 | + cli | |
| 104 | + | |
| 105 | +#ifdef CONFIG_RETPOLINE | |
| 106 | + /* IMPORTANT: Stuff the RSB immediately after VM-Exit, before RET! */ | |
| 107 | + FILL_RETURN_BUFFER %_ASM_AX, RSB_CLEAR_LOOPS, X86_FEATURE_RETPOLINE | |
| 108 | +#endif | |
| 109 | + | |
| 102 | 110 | /* "POP" @regs to RAX. */ |
| 103 | 111 | pop %_ASM_AX |
| 104 | 112 | |
| @@ -5165,7 +5165,7 @@ static int handle_invept(struct kvm_vcpu *vcpu) · 5164 unmodified lines | ||
| 5165 | 5165 | */ |
| 5166 | 5166 | break; |
| 5167 | 5167 | default: |
| 5168 | − BUG_ON(1); | |
| 5168 | + BUG(); | |
| 5169 | 5169 | break; |
| 5170 | 5170 | } |
| 5171 | 5171 | |
| @@ -5533,8 +5533,25 @@ static bool nested_vmx_exit_handled_vmcs_access(struct kvm_vcpu *vcpu, · 361 unmodified lines | ||
| 5533 | 5533 | return 1 & (b >> (field & 7)); |
| 5534 | 5534 | } |
| 5535 | 5535 | |
| 5536 | +static bool nested_vmx_exit_handled_mtf(struct vmcs12 *vmcs12) | |
| 5537 | +{ | |
| 5538 | + u32 entry_intr_info = vmcs12->vm_entry_intr_info_field; | |
| 5539 | + | |
| 5540 | + if (nested_cpu_has_mtf(vmcs12)) | |
| 5541 | + return true; | |
| 5542 | + | |
| 5543 | + /* | |
| 5544 | + * An MTF VM-exit may be injected into the guest by setting the | |
| 5545 | + * interruption-type to 7 (other event) and the vector field to 0. Such | |
| 5546 | + * is the case regardless of the 'monitor trap flag' VM-execution | |
| 5547 | + * control. | |
| 5548 | + */ | |
| 5549 | + return entry_intr_info == (INTR_INFO_VALID_MASK | |
| 5550 | + | INTR_TYPE_OTHER_EVENT); | |
| 5551 | +} | |
| 5552 | + | |
| 5536 | 5553 | /* |
| 5537 | − * Return 1 if we should exit from L2 to L1 to handle an exit, or 0 if we | |
| 5554 | + * Return true if we should exit from L2 to L1 to handle an exit, or false if we | |
| 5538 | 5555 | * should handle it ourselves in L0 (and then continue L2). Only call this |
| 5539 | 5556 | * when in is_guest_mode (L2). |
| 5540 | 5557 | */ |
| @@ -5633,7 +5650,7 @@ bool nested_vmx_exit_reflected(struct kvm_vcpu *vcpu, u32 exit_reason) · 92 unmodified lines | ||
| 5633 | 5650 | case EXIT_REASON_MWAIT_INSTRUCTION: |
| 5634 | 5651 | return nested_cpu_has(vmcs12, CPU_BASED_MWAIT_EXITING); |
| 5635 | 5652 | case EXIT_REASON_MONITOR_TRAP_FLAG: |
| 5636 | − return nested_cpu_has_mtf(vmcs12); | |
| 5653 | + return nested_vmx_exit_handled_mtf(vmcs12); | |
| 5637 | 5654 | case EXIT_REASON_MONITOR_INSTRUCTION: |
| 5638 | 5655 | return nested_cpu_has(vmcs12, CPU_BASED_MONITOR_EXITING); |
| 5639 | 5656 | case EXIT_REASON_PAUSE_INSTRUCTION: |
| @@ -82,6 +82,9 @@ SYM_FUNC_START(vmx_vmexit) · 81 unmodified lines | ||
| 82 | 82 | /* IMPORTANT: Stuff the RSB immediately after VM-Exit, before RET! */ |
| 83 | 83 | FILL_RETURN_BUFFER %_ASM_AX, RSB_CLEAR_LOOPS, X86_FEATURE_RETPOLINE |
| 84 | 84 | |
| 85 | + /* Clear RFLAGS.CF and RFLAGS.ZF to preserve VM-Exit, i.e. !VM-Fail. */ | |
| 86 | + or $1, %_ASM_AX | |
| 87 | + | |
| 85 | 88 | pop %_ASM_AX |
| 86 | 89 | .Lvmexit_skip_rsb: |
| 87 | 90 | #endif |
| @@ -4572,7 +4572,7 @@ static int handle_rmode_exception(struct kvm_vcpu *vcpu, · 4571 unmodified lines | ||
| 4572 | 4572 | */ |
| 4573 | 4573 | static void kvm_machine_check(void) |
| 4574 | 4574 | { |
| 4575 | −#if defined(CONFIG_X86_MCE) && defined(CONFIG_X86_64) | |
| 4575 | +#if defined(CONFIG_X86_MCE) | |
| 4576 | 4576 | struct pt_regs regs = { |
| 4577 | 4577 | .cs = 3, /* Fake ring 3 no matter what the guest ran on */ |
| 4578 | 4578 | .flags = X86_EFLAGS_IF, |
| @@ -926,19 +926,6 @@ EXPORT_SYMBOL_GPL(kvm_set_xcr); · 925 unmodified lines | ||
| 926 | 926 | __reserved_bits; \ |
| 927 | 927 | }) |
| 928 | 928 | |
| 929 | −static u64 kvm_host_cr4_reserved_bits(struct cpuinfo_x86 *c) | |
| 930 | −{ | |
| 931 | − u64 reserved_bits = __cr4_reserved_bits(cpu_has, c); | |
| 932 | − | |
| 933 | − if (kvm_cpu_cap_has(X86_FEATURE_LA57)) | |
| 934 | − reserved_bits &= ~X86_CR4_LA57; | |
| 935 | − | |
| 936 | − if (kvm_cpu_cap_has(X86_FEATURE_UMIP)) | |
| 937 | − reserved_bits &= ~X86_CR4_UMIP; | |
| 938 | − | |
| 939 | − return reserved_bits; | |
| 940 | −} | |
| 941 | − | |
| 942 | 929 | static int kvm_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) |
| 943 | 930 | { |
| 944 | 931 | if (cr4 & cr4_reserved_bits) |
| @@ -3060,6 +3047,17 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) · 2115 unmodified lines | ||
| 3060 | 3047 | case MSR_IA32_PERF_CTL: |
| 3061 | 3048 | case MSR_AMD64_DC_CFG: |
| 3062 | 3049 | case MSR_F15H_EX_CFG: |
| 3050 | + /* | |
| 3051 | + * Intel Sandy Bridge CPUs must support the RAPL (running average power | |
| 3052 | + * limit) MSRs. Just return 0, as we do not want to expose the host | |
| 3053 | + * data here. Do not conditionalize this on CPUID, as KVM does not do | |
| 3054 | + * so for existing CPU-specific MSRs. | |
| 3055 | + */ | |
| 3056 | + case MSR_RAPL_POWER_UNIT: | |
| 3057 | + case MSR_PP0_ENERGY_STATUS: /* Power plane 0 (core) */ | |
| 3058 | + case MSR_PP1_ENERGY_STATUS: /* Power plane 1 (graphics uncore) */ | |
| 3059 | + case MSR_PKG_ENERGY_STATUS: /* Total package */ | |
| 3060 | + case MSR_DRAM_ENERGY_STATUS: /* DRAM controller */ | |
| 3063 | 3061 | msr_info->data = 0; |
| 3064 | 3062 | break; |
| 3065 | 3063 | case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5: |
| @@ -3374,6 +3372,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) · 308 unmodified lines | ||
| 3374 | 3372 | case KVM_CAP_GET_MSR_FEATURES: |
| 3375 | 3373 | case KVM_CAP_MSR_PLATFORM_INFO: |
| 3376 | 3374 | case KVM_CAP_EXCEPTION_PAYLOAD: |
| 3375 | + case KVM_CAP_SET_GUEST_DEBUG: | |
| 3377 | 3376 | r = 1; |
| 3378 | 3377 | break; |
| 3379 | 3378 | case KVM_CAP_SYNC_REGS: |
| @@ -5049,10 +5048,13 @@ set_identity_unlock: · 1669 unmodified lines | ||
| 5049 | 5048 | r = -EFAULT; |
| 5050 | 5049 | if (copy_from_user(&u.ps, argp, sizeof(u.ps))) |
| 5051 | 5050 | goto out; |
| 5051 | + mutex_lock(&kvm->lock); | |
| 5052 | 5052 | r = -ENXIO; |
| 5053 | 5053 | if (!kvm->arch.vpit) |
| 5054 | − goto out; | |
| 5054 | + goto set_pit_out; | |
| 5055 | 5055 | r = kvm_vm_ioctl_set_pit(kvm, &u.ps); |
| 5056 | +set_pit_out: | |
| 5057 | + mutex_unlock(&kvm->lock); | |
| 5056 | 5058 | break; |
| 5057 | 5059 | } |
| 5058 | 5060 | case KVM_GET_PIT2: { |
| @@ -5072,10 +5074,13 @@ set_identity_unlock: · 13 unmodified lines | ||
| 5072 | 5074 | r = -EFAULT; |
| 5073 | 5075 | if (copy_from_user(&u.ps2, argp, sizeof(u.ps2))) |
| 5074 | 5076 | goto out; |
| 5077 | + mutex_lock(&kvm->lock); | |
| 5075 | 5078 | r = -ENXIO; |
| 5076 | 5079 | if (!kvm->arch.vpit) |
| 5077 | − goto out; | |
| 5080 | + goto set_pit2_out; | |
| 5078 | 5081 | r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2); |
| 5082 | +set_pit2_out: | |
| 5083 | + mutex_unlock(&kvm->lock); | |
| 5079 | 5084 | break; |
| 5080 | 5085 | } |
| 5081 | 5086 | case KVM_REINJECT_CONTROL: { |
| @@ -9658,7 +9663,9 @@ int kvm_arch_hardware_setup(void *opaque) · 4576 unmodified lines | ||
| 9658 | 9663 | if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES)) |
| 9659 | 9664 | supported_xss = 0; |
| 9660 | 9665 | |
| 9661 | − cr4_reserved_bits = kvm_host_cr4_reserved_bits(&boot_cpu_data); | |
| 9666 | +#define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f) | |
| 9667 | + cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_); | |
| 9668 | +#undef __kvm_cpu_cap_has | |
| 9662 | 9669 | |
| 9663 | 9670 | if (kvm_has_tsc_control) { |
| 9664 | 9671 | /* |
| @@ -9690,7 +9697,8 @@ int kvm_arch_check_processor_compat(void *opaque) · 25 unmodified lines | ||
| 9690 | 9697 | |
| 9691 | 9698 | WARN_ON(!irqs_disabled()); |
| 9692 | 9699 | |
| 9693 | − if (kvm_host_cr4_reserved_bits(c) != cr4_reserved_bits) | |
| 9700 | + if (__cr4_reserved_bits(cpu_has, c) != | |
| 9701 | + __cr4_reserved_bits(cpu_has, &boot_cpu_data)) | |
| 9694 | 9702 | return -EIO; |
| 9695 | 9703 | |
| 9696 | 9704 | return ops->check_processor_compatibility(); |
| @@ -43,7 +43,8 @@ struct cpa_data { · 42 unmodified lines | ||
| 43 | 43 | unsigned long pfn; |
| 44 | 44 | unsigned int flags; |
| 45 | 45 | unsigned int force_split : 1, |
| 46 | − force_static_prot : 1; | |
| 46 | + force_static_prot : 1, | |
| 47 | + force_flush_all : 1; | |
| 47 | 48 | struct page **pages; |
| 48 | 49 | }; |
| 49 | 50 | |
| @@ -355,10 +356,10 @@ static void cpa_flush(struct cpa_data *data, int cache) · 305 unmodified lines | ||
| 355 | 356 | return; |
| 356 | 357 | } |
| 357 | 358 | |
| 358 | − if (cpa->numpages <= tlb_single_page_flush_ceiling) | |
| 359 | − on_each_cpu(__cpa_flush_tlb, cpa, 1); | |
| 360 | − else | |
| 359 | + if (cpa->force_flush_all || cpa->numpages > tlb_single_page_flush_ceiling) | |
| 361 | 360 | flush_tlb_all(); |
| 361 | + else | |
| 362 | + on_each_cpu(__cpa_flush_tlb, cpa, 1); | |
| 362 | 363 | |
| 363 | 364 | if (!cache) |
| 364 | 365 | return; |
| @@ -1598,6 +1599,8 @@ static int cpa_process_alias(struct cpa_data *cpa) · 1233 unmodified lines | ||
| 1598 | 1599 | alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY); |
| 1599 | 1600 | alias_cpa.curpage = 0; |
| 1600 | 1601 | |
| 1602 | + cpa->force_flush_all = 1; | |
| 1603 | + | |
| 1601 | 1604 | ret = __change_page_attr_set_clr(&alias_cpa, 0); |
| 1602 | 1605 | if (ret) |
| 1603 | 1606 | return ret; |
| @@ -1618,6 +1621,7 @@ static int cpa_process_alias(struct cpa_data *cpa) · 14 unmodified lines | ||
| 1618 | 1621 | alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY); |
| 1619 | 1622 | alias_cpa.curpage = 0; |
| 1620 | 1623 | |
| 1624 | + cpa->force_flush_all = 1; | |
| 1621 | 1625 | /* |
| 1622 | 1626 | * The high mapping range is imprecise, so ignore the |
| 1623 | 1627 | * return value. |
| @@ -158,6 +158,19 @@ static bool is_ereg(u32 reg) · 157 unmodified lines | ||
| 158 | 158 | BIT(BPF_REG_AX)); |
| 159 | 159 | } |
| 160 | 160 | |
| 161 | +/* | |
| 162 | + * is_ereg_8l() == true if BPF register 'reg' is mapped to access x86-64 | |
| 163 | + * lower 8-bit registers dil,sil,bpl,spl,r8b..r15b, which need extra byte | |
| 164 | + * of encoding. al,cl,dl,bl have simpler encoding. | |
| 165 | + */ | |
| 166 | +static bool is_ereg_8l(u32 reg) | |
| 167 | +{ | |
| 168 | + return is_ereg(reg) || | |
| 169 | + (1 << reg) & (BIT(BPF_REG_1) | | |
| 170 | + BIT(BPF_REG_2) | | |
| 171 | + BIT(BPF_REG_FP)); | |
| 172 | +} | |
| 173 | + | |
| 161 | 174 | static bool is_axreg(u32 reg) |
| 162 | 175 | { |
| 163 | 176 | return reg == BPF_REG_0; |
| @@ -598,9 +611,8 @@ static void emit_stx(u8 **pprog, u32 size, u32 dst_reg, u32 src_reg, int off) · 434 unmodified lines | ||
| 598 | 611 | switch (size) { |
| 599 | 612 | case BPF_B: |
| 600 | 613 | /* Emit 'mov byte ptr [rax + off], al' */ |
| 601 | − if (is_ereg(dst_reg) || is_ereg(src_reg) || | |
| 602 | − /* We have to add extra byte for x86 SIL, DIL regs */ | |
| 603 | − src_reg == BPF_REG_1 || src_reg == BPF_REG_2) | |
| 614 | + if (is_ereg(dst_reg) || is_ereg_8l(src_reg)) | |
| 615 | + /* Add extra byte for eregs or SIL,DIL,BPL in src_reg */ | |
| 604 | 616 | EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88); |
| 605 | 617 | else |
| 606 | 618 | EMIT1(0x88); |
| @@ -1847,14 +1847,16 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image, · 1846 unmodified lines | ||
| 1847 | 1847 | case BPF_B: |
| 1848 | 1848 | case BPF_H: |
| 1849 | 1849 | case BPF_W: |
| 1850 | − if (!bpf_prog->aux->verifier_zext) | |
| 1850 | + if (bpf_prog->aux->verifier_zext) | |
| 1851 | 1851 | break; |
| 1852 | 1852 | if (dstk) { |
| 1853 | 1853 | EMIT3(0xC7, add_1reg(0x40, IA32_EBP), |
| 1854 | 1854 | STACK_VAR(dst_hi)); |
| 1855 | 1855 | EMIT(0x0, 4); |
| 1856 | 1856 | } else { |
| 1857 | − EMIT3(0xC7, add_1reg(0xC0, dst_hi), 0); | |
| 1857 | + /* xor dst_hi,dst_hi */ | |
| 1858 | + EMIT2(0x33, | |
| 1859 | + add_2reg(0xC0, dst_hi, dst_hi)); | |
| 1858 | 1860 | } |
| 1859 | 1861 | break; |
| 1860 | 1862 | case BPF_DW: |
| @@ -2013,8 +2015,8 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image, · 152 unmodified lines | ||
| 2013 | 2015 | case BPF_JMP | BPF_JSET | BPF_X: |
| 2014 | 2016 | case BPF_JMP32 | BPF_JSET | BPF_X: { |
| 2015 | 2017 | bool is_jmp64 = BPF_CLASS(insn->code) == BPF_JMP; |
| 2016 | − u8 dreg_lo = dstk ? IA32_EAX : dst_lo; | |
| 2017 | − u8 dreg_hi = dstk ? IA32_EDX : dst_hi; | |
| 2018 | + u8 dreg_lo = IA32_EAX; | |
| 2019 | + u8 dreg_hi = IA32_EDX; | |
| 2018 | 2020 | u8 sreg_lo = sstk ? IA32_ECX : src_lo; |
| 2019 | 2021 | u8 sreg_hi = sstk ? IA32_EBX : src_hi; |
| 2020 | 2022 | |
| @@ -2026,6 +2028,13 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image, · 5 unmodified lines | ||
| 2026 | 2028 | add_2reg(0x40, IA32_EBP, |
| 2027 | 2029 | IA32_EDX), |
| 2028 | 2030 | STACK_VAR(dst_hi)); |
| 2031 | + } else { | |
| 2032 | + /* mov dreg_lo,dst_lo */ | |
| 2033 | + EMIT2(0x89, add_2reg(0xC0, dreg_lo, dst_lo)); | |
| 2034 | + if (is_jmp64) | |
| 2035 | + /* mov dreg_hi,dst_hi */ | |
| 2036 | + EMIT2(0x89, | |
| 2037 | + add_2reg(0xC0, dreg_hi, dst_hi)); | |
| 2029 | 2038 | } |
| 2030 | 2039 | |
| 2031 | 2040 | if (sstk) { |
| @@ -2050,8 +2059,8 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image, · 18 unmodified lines | ||
| 2050 | 2059 | case BPF_JMP | BPF_JSET | BPF_K: |
| 2051 | 2060 | case BPF_JMP32 | BPF_JSET | BPF_K: { |
| 2052 | 2061 | bool is_jmp64 = BPF_CLASS(insn->code) == BPF_JMP; |
| 2053 | − u8 dreg_lo = dstk ? IA32_EAX : dst_lo; | |
| 2054 | − u8 dreg_hi = dstk ? IA32_EDX : dst_hi; | |
| 2062 | + u8 dreg_lo = IA32_EAX; | |
| 2063 | + u8 dreg_hi = IA32_EDX; | |
| 2055 | 2064 | u8 sreg_lo = IA32_ECX; |
| 2056 | 2065 | u8 sreg_hi = IA32_EBX; |
| 2057 | 2066 | u32 hi; |
| @@ -2064,6 +2073,13 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image, · 6 unmodified lines | ||
| 2064 | 2073 | add_2reg(0x40, IA32_EBP, |
| 2065 | 2074 | IA32_EDX), |
| 2066 | 2075 | STACK_VAR(dst_hi)); |
| 2076 | + } else { | |
| 2077 | + /* mov dreg_lo,dst_lo */ | |
| 2078 | + EMIT2(0x89, add_2reg(0xC0, dreg_lo, dst_lo)); | |
| 2079 | + if (is_jmp64) | |
| 2080 | + /* mov dreg_hi,dst_hi */ | |
| 2081 | + EMIT2(0x89, | |
| 2082 | + add_2reg(0xC0, dreg_hi, dst_hi)); | |
| 2067 | 2083 | } |
| 2068 | 2084 | |
| 2069 | 2085 | /* mov ecx,imm32 */ |
| @@ -1,8 +1,4 @@ | ||
| 1 | 1 | /* |
| 2 | − * include/asm-xtensa/module.h | |
| 3 | − * | |
| 4 | − * This file contains the module code specific to the Xtensa architecture. | |
| 5 | − * | |
| 6 | 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 7 | 3 | * License. See the file "COPYING" in the main directory of this archive |
| 8 | 4 | * for more details. |
| @@ -10,11 +6,12 @@ · 1 unmodified line | ||
| 10 | 6 | * Copyright (C) 2001 - 2005 Tensilica Inc. |
| 11 | 7 | */ |
| 12 | 8 | |
| 13 | −#ifndef _XTENSA_MODULE_H | |
| 14 | −#define _XTENSA_MODULE_H | |
| 9 | +#ifndef _ASM_VERMAGIC_H | |
| 10 | +#define _ASM_VERMAGIC_H | |
| 15 | 11 | |
| 16 | −#define MODULE_ARCH_VERMAGIC "xtensa-" __stringify(XCHAL_CORE_ID) " " | |
| 12 | +#include <linux/stringify.h> | |
| 13 | +#include <variant/core.h> | |
| 17 | 14 | |
| 18 | −#include <asm-generic/module.h> | |
| 15 | +#define MODULE_ARCH_VERMAGIC "xtensa-" __stringify(XCHAL_CORE_ID) " " | |
| 19 | 16 | |
| 20 | −#endif /* _XTENSA_MODULE_H */ | |
| 17 | +#endif /* _ASM_VERMAGIC_H */ | |
| @@ -123,6 +123,7 @@ · 122 unmodified lines | ||
| 123 | 123 | #include <linux/ioprio.h> |
| 124 | 124 | #include <linux/sbitmap.h> |
| 125 | 125 | #include <linux/delay.h> |
| 126 | +#include <linux/backing-dev.h> | |
| 126 | 127 | |
| 127 | 128 | #include "blk.h" |
| 128 | 129 | #include "blk-mq.h" |
| @@ -4976,8 +4977,9 @@ bfq_set_next_ioprio_data(struct bfq_queue *bfqq, struct bfq_io_cq *bic) · 4847 unmodified lines | ||
| 4976 | 4977 | ioprio_class = IOPRIO_PRIO_CLASS(bic->ioprio); |
| 4977 | 4978 | switch (ioprio_class) { |
| 4978 | 4979 | default: |
| 4979 | − dev_err(bfqq->bfqd->queue->backing_dev_info->dev, | |
| 4980 | − "bfq: bad prio class %d\n", ioprio_class); | |
| 4980 | + pr_err("bdi %s: bfq: bad prio class %d\n", | |
| 4981 | + bdi_dev_name(bfqq->bfqd->queue->backing_dev_info), | |
| 4982 | + ioprio_class); | |
| 4981 | 4983 | /* fall through */ |
| 4982 | 4984 | case IOPRIO_CLASS_NONE: |
| 4983 | 4985 | /* |
| @@ -496,7 +496,7 @@ const char *blkg_dev_name(struct blkcg_gq *blkg) · 495 unmodified lines | ||
| 496 | 496 | { |
| 497 | 497 | /* some drivers (floppy) instantiate a queue w/o disk registered */ |
| 498 | 498 | if (blkg->q->backing_dev_info->dev) |
| 499 | − return dev_name(blkg->q->backing_dev_info->dev); | |
| 499 | + return bdi_dev_name(blkg->q->backing_dev_info); | |
| 500 | 500 | return NULL; |
| 501 | 501 | } |
| 502 | 502 | |
| @@ -466,7 +466,7 @@ struct ioc_gq { · 465 unmodified lines | ||
| 466 | 466 | */ |
| 467 | 467 | atomic64_t vtime; |
| 468 | 468 | atomic64_t done_vtime; |
| 469 | − atomic64_t abs_vdebt; | |
| 469 | + u64 abs_vdebt; | |
| 470 | 470 | u64 last_vtime; |
| 471 | 471 | |
| 472 | 472 | /* |
| @@ -1142,7 +1142,7 @@ static void iocg_kick_waitq(struct ioc_gq *iocg, struct ioc_now *now) · 669 unmodified lines | ||
| 1142 | 1142 | struct iocg_wake_ctx ctx = { .iocg = iocg }; |
| 1143 | 1143 | u64 margin_ns = (u64)(ioc->period_us * |
| 1144 | 1144 | WAITQ_TIMER_MARGIN_PCT / 100) * NSEC_PER_USEC; |
| 1145 | − u64 abs_vdebt, vdebt, vshortage, expires, oexpires; | |
| 1145 | + u64 vdebt, vshortage, expires, oexpires; | |
| 1146 | 1146 | s64 vbudget; |
| 1147 | 1147 | u32 hw_inuse; |
| 1148 | 1148 | |
| @@ -1152,18 +1152,15 @@ static void iocg_kick_waitq(struct ioc_gq *iocg, struct ioc_now *now) · 3 unmodified lines | ||
| 1152 | 1152 | vbudget = now->vnow - atomic64_read(&iocg->vtime); |
| 1153 | 1153 | |
| 1154 | 1154 | /* pay off debt */ |
| 1155 | − abs_vdebt = atomic64_read(&iocg->abs_vdebt); | |
| 1156 | − vdebt = abs_cost_to_cost(abs_vdebt, hw_inuse); | |
| 1155 | + vdebt = abs_cost_to_cost(iocg->abs_vdebt, hw_inuse); | |
| 1157 | 1156 | if (vdebt && vbudget > 0) { |
| 1158 | 1157 | u64 delta = min_t(u64, vbudget, vdebt); |
| 1159 | 1158 | u64 abs_delta = min(cost_to_abs_cost(delta, hw_inuse), |
| 1160 | − abs_vdebt); | |
| 1159 | + iocg->abs_vdebt); | |
| 1161 | 1160 | |
| 1162 | 1161 | atomic64_add(delta, &iocg->vtime); |
| 1163 | 1162 | atomic64_add(delta, &iocg->done_vtime); |
| 1164 | − atomic64_sub(abs_delta, &iocg->abs_vdebt); | |
| 1165 | − if (WARN_ON_ONCE(atomic64_read(&iocg->abs_vdebt) < 0)) | |
| 1166 | − atomic64_set(&iocg->abs_vdebt, 0); | |
| 1163 | + iocg->abs_vdebt -= abs_delta; | |
| 1167 | 1164 | } |
| 1168 | 1165 | |
| 1169 | 1166 | /* |
| @@ -1219,12 +1216,18 @@ static bool iocg_kick_delay(struct ioc_gq *iocg, struct ioc_now *now, u64 cost) · 49 unmodified lines | ||
| 1219 | 1216 | u64 expires, oexpires; |
| 1220 | 1217 | u32 hw_inuse; |
| 1221 | 1218 | |
| 1219 | + lockdep_assert_held(&iocg->waitq.lock); | |
| 1220 | + | |
| 1222 | 1221 | /* debt-adjust vtime */ |
| 1223 | 1222 | current_hweight(iocg, NULL, &hw_inuse); |
| 1224 | − vtime += abs_cost_to_cost(atomic64_read(&iocg->abs_vdebt), hw_inuse); | |
| 1223 | + vtime += abs_cost_to_cost(iocg->abs_vdebt, hw_inuse); | |
| 1225 | 1224 | |
| 1226 | − /* clear or maintain depending on the overage */ | |
| 1227 | − if (time_before_eq64(vtime, now->vnow)) { | |
| 1225 | + /* | |
| 1226 | + * Clear or maintain depending on the overage. Non-zero vdebt is what | |
| 1227 | + * guarantees that @iocg is online and future iocg_kick_delay() will | |
| 1228 | + * clear use_delay. Don't leave it on when there's no vdebt. | |
| 1229 | + */ | |
| 1230 | + if (!iocg->abs_vdebt || time_before_eq64(vtime, now->vnow)) { | |
| 1228 | 1231 | blkcg_clear_delay(blkg); |
| 1229 | 1232 | return false; |
| 1230 | 1233 | } |
| @@ -1258,9 +1261,12 @@ static enum hrtimer_restart iocg_delay_timer_fn(struct hrtimer *timer) · 27 unmodified lines | ||
| 1258 | 1261 | { |
| 1259 | 1262 | struct ioc_gq *iocg = container_of(timer, struct ioc_gq, delay_timer); |
| 1260 | 1263 | struct ioc_now now; |
| 1264 | + unsigned long flags; | |
| 1261 | 1265 | |
| 1266 | + spin_lock_irqsave(&iocg->waitq.lock, flags); | |
| 1262 | 1267 | ioc_now(iocg->ioc, &now); |
| 1263 | 1268 | iocg_kick_delay(iocg, &now, 0); |
| 1269 | + spin_unlock_irqrestore(&iocg->waitq.lock, flags); | |
| 1264 | 1270 | |
| 1265 | 1271 | return HRTIMER_NORESTART; |
| 1266 | 1272 | } |
| @@ -1368,14 +1374,13 @@ static void ioc_timer_fn(struct timer_list *timer) · 101 unmodified lines | ||
| 1368 | 1374 | * should have woken up in the last period and expire idle iocgs. |
| 1369 | 1375 | */ |
| 1370 | 1376 | list_for_each_entry_safe(iocg, tiocg, &ioc->active_iocgs, active_list) { |
| 1371 | − if (!waitqueue_active(&iocg->waitq) && | |
| 1372 | − !atomic64_read(&iocg->abs_vdebt) && !iocg_is_idle(iocg)) | |
| 1377 | + if (!waitqueue_active(&iocg->waitq) && iocg->abs_vdebt && | |
| 1378 | + !iocg_is_idle(iocg)) | |
| 1373 | 1379 | continue; |
| 1374 | 1380 | |
| 1375 | 1381 | spin_lock(&iocg->waitq.lock); |
| 1376 | 1382 | |
| 1377 | − if (waitqueue_active(&iocg->waitq) || | |
| 1378 | − atomic64_read(&iocg->abs_vdebt)) { | |
| 1383 | + if (waitqueue_active(&iocg->waitq) || iocg->abs_vdebt) { | |
| 1379 | 1384 | /* might be oversleeping vtime / hweight changes, kick */ |
| 1380 | 1385 | iocg_kick_waitq(iocg, &now); |
| 1381 | 1386 | iocg_kick_delay(iocg, &now, 0); |
| @@ -1591,7 +1596,7 @@ skip_surplus_transfers: · 209 unmodified lines | ||
| 1591 | 1596 | vrate_min, vrate_max); |
| 1592 | 1597 | } |
| 1593 | 1598 | |
| 1594 | − trace_iocost_ioc_vrate_adj(ioc, vrate, &missed_ppm, rq_wait_pct, | |
| 1599 | + trace_iocost_ioc_vrate_adj(ioc, vrate, missed_ppm, rq_wait_pct, | |
| 1595 | 1600 | nr_lagging, nr_shortages, |
| 1596 | 1601 | nr_surpluses); |
| 1597 | 1602 | |
| @@ -1600,7 +1605,7 @@ skip_surplus_transfers: · 2 unmodified lines | ||
| 1600 | 1605 | ioc->period_us * vrate * INUSE_MARGIN_PCT, 100); |
| 1601 | 1606 | } else if (ioc->busy_level != prev_busy_level || nr_lagging) { |
| 1602 | 1607 | trace_iocost_ioc_vrate_adj(ioc, atomic64_read(&ioc->vtime_rate), |
| 1603 | − &missed_ppm, rq_wait_pct, nr_lagging, | |
| 1608 | + missed_ppm, rq_wait_pct, nr_lagging, | |
| 1604 | 1609 | nr_shortages, nr_surpluses); |
| 1605 | 1610 | } |
| 1606 | 1611 | |
| @@ -1718,28 +1723,49 @@ static void ioc_rqos_throttle(struct rq_qos *rqos, struct bio *bio) · 111 unmodified lines | ||
| 1718 | 1723 | * tests are racy but the races aren't systemic - we only miss once |
| 1719 | 1724 | * in a while which is fine. |
| 1720 | 1725 | */ |
| 1721 | − if (!waitqueue_active(&iocg->waitq) && | |
| 1722 | − !atomic64_read(&iocg->abs_vdebt) && | |
| 1726 | + if (!waitqueue_active(&iocg->waitq) && !iocg->abs_vdebt && | |
| 1723 | 1727 | time_before_eq64(vtime + cost, now.vnow)) { |
| 1724 | 1728 | iocg_commit_bio(iocg, bio, cost); |
| 1725 | 1729 | return; |
| 1726 | 1730 | } |
| 1727 | 1731 | |
| 1728 | 1732 | /* |
| 1729 | − * We're over budget. If @bio has to be issued regardless, | |
| 1730 | − * remember the abs_cost instead of advancing vtime. | |
| 1731 | − * iocg_kick_waitq() will pay off the debt before waking more IOs. | |
| 1733 | + * We activated above but w/o any synchronization. Deactivation is | |
| 1734 | + * synchronized with waitq.lock and we won't get deactivated as long | |
| 1735 | + * as we're waiting or has debt, so we're good if we're activated | |
| 1736 | + * here. In the unlikely case that we aren't, just issue the IO. | |
| 1737 | + */ | |
| 1738 | + spin_lock_irq(&iocg->waitq.lock); | |
| 1739 | + | |
| 1740 | + if (unlikely(list_empty(&iocg->active_list))) { | |
| 1741 | + spin_unlock_irq(&iocg->waitq.lock); | |
| 1742 | + iocg_commit_bio(iocg, bio, cost); | |
| 1743 | + return; | |
| 1744 | + } | |
| 1745 | + | |
| 1746 | + /* | |
| 1747 | + * We're over budget. If @bio has to be issued regardless, remember | |
| 1748 | + * the abs_cost instead of advancing vtime. iocg_kick_waitq() will pay | |
| 1749 | + * off the debt before waking more IOs. | |
| 1750 | + * | |
| 1732 | 1751 | * This way, the debt is continuously paid off each period with the |
| 1733 | − * actual budget available to the cgroup. If we just wound vtime, | |
| 1734 | − * we would incorrectly use the current hw_inuse for the entire | |
| 1735 | − * amount which, for example, can lead to the cgroup staying | |
| 1736 | − * blocked for a long time even with substantially raised hw_inuse. | |
| 1752 | + * actual budget available to the cgroup. If we just wound vtime, we | |
| 1753 | + * would incorrectly use the current hw_inuse for the entire amount | |
| 1754 | + * which, for example, can lead to the cgroup staying blocked for a | |
| 1755 | + * long time even with substantially raised hw_inuse. | |
| 1756 | + * | |
| 1757 | + * An iocg with vdebt should stay online so that the timer can keep | |
| 1758 | + * deducting its vdebt and [de]activate use_delay mechanism | |
| 1759 | + * accordingly. We don't want to race against the timer trying to | |
| 1760 | + * clear them and leave @iocg inactive w/ dangling use_delay heavily | |
| 1761 | + * penalizing the cgroup and its descendants. | |
| 1737 | 1762 | */ |
| 1738 | 1763 | if (bio_issue_as_root_blkg(bio) || fatal_signal_pending(current)) { |
| 1739 | − atomic64_add(abs_cost, &iocg->abs_vdebt); | |
| 1764 | + iocg->abs_vdebt += abs_cost; | |
| 1740 | 1765 | if (iocg_kick_delay(iocg, &now, cost)) |
| 1741 | 1766 | blkcg_schedule_throttle(rqos->q, |
| 1742 | 1767 | (bio->bi_opf & REQ_SWAP) == REQ_SWAP); |
| 1768 | + spin_unlock_irq(&iocg->waitq.lock); | |
| 1743 | 1769 | return; |
| 1744 | 1770 | } |
| 1745 | 1771 | |
| @@ -1756,20 +1782,6 @@ static void ioc_rqos_throttle(struct rq_qos *rqos, struct bio *bio) · 10 unmodified lines | ||
| 1756 | 1782 | * All waiters are on iocg->waitq and the wait states are |
| 1757 | 1783 | * synchronized using waitq.lock. |
| 1758 | 1784 | */ |
| 1759 | − spin_lock_irq(&iocg->waitq.lock); | |
| 1760 | − | |
| 1761 | − /* | |
| 1762 | − * We activated above but w/o any synchronization. Deactivation is | |
| 1763 | − * synchronized with waitq.lock and we won't get deactivated as | |
| 1764 | − * long as we're waiting, so we're good if we're activated here. | |
| 1765 | − * In the unlikely case that we are deactivated, just issue the IO. | |
| 1766 | − */ | |
| 1767 | − if (unlikely(list_empty(&iocg->active_list))) { | |
| 1768 | − spin_unlock_irq(&iocg->waitq.lock); | |
| 1769 | − iocg_commit_bio(iocg, bio, cost); | |
| 1770 | − return; | |
| 1771 | − } | |
| 1772 | − | |
| 1773 | 1785 | init_waitqueue_func_entry(&wait.wait, iocg_wake_fn); |
| 1774 | 1786 | wait.wait.private = current; |
| 1775 | 1787 | wait.bio = bio; |
| @@ -1801,6 +1813,7 @@ static void ioc_rqos_merge(struct rq_qos *rqos, struct request *rq, · 25 unmodified lines | ||
| 1801 | 1813 | struct ioc_now now; |
| 1802 | 1814 | u32 hw_inuse; |
| 1803 | 1815 | u64 abs_cost, cost; |
| 1816 | + unsigned long flags; | |
| 1804 | 1817 | |
| 1805 | 1818 | /* bypass if disabled or for root cgroup */ |
| 1806 | 1819 | if (!ioc->enabled || !iocg->level) |
| @@ -1820,15 +1833,28 @@ static void ioc_rqos_merge(struct rq_qos *rqos, struct request *rq, · 13 unmodified lines | ||
| 1820 | 1833 | iocg->cursor = bio_end; |
| 1821 | 1834 | |
| 1822 | 1835 | /* |
| 1823 | − * Charge if there's enough vtime budget and the existing request | |
| 1824 | − * has cost assigned. Otherwise, account it as debt. See debt | |
| 1825 | − * handling in ioc_rqos_throttle() for details. | |
| 1836 | + * Charge if there's enough vtime budget and the existing request has | |
| 1837 | + * cost assigned. | |
| 1826 | 1838 | */ |
| 1827 | 1839 | if (rq->bio && rq->bio->bi_iocost_cost && |
| 1828 | − time_before_eq64(atomic64_read(&iocg->vtime) + cost, now.vnow)) | |
| 1840 | + time_before_eq64(atomic64_read(&iocg->vtime) + cost, now.vnow)) { | |
| 1829 | 1841 | iocg_commit_bio(iocg, bio, cost); |
| 1830 | − else | |
| 1831 | − atomic64_add(abs_cost, &iocg->abs_vdebt); | |
| 1842 | + return; | |
| 1843 | + } | |
| 1844 | + | |
| 1845 | + /* | |
| 1846 | + * Otherwise, account it as debt if @iocg is online, which it should | |
| 1847 | + * be for the vast majority of cases. See debt handling in | |
| 1848 | + * ioc_rqos_throttle() for details. | |
| 1849 | + */ | |
| 1850 | + spin_lock_irqsave(&iocg->waitq.lock, flags); | |
| 1851 | + if (likely(!list_empty(&iocg->active_list))) { | |
| 1852 | + iocg->abs_vdebt += abs_cost; | |
| 1853 | + iocg_kick_delay(iocg, &now, cost); | |
| 1854 | + } else { | |
| 1855 | + iocg_commit_bio(iocg, bio, cost); | |
| 1856 | + } | |
| 1857 | + spin_unlock_irqrestore(&iocg->waitq.lock, flags); | |
| 1832 | 1858 | } |
| 1833 | 1859 | |
| 1834 | 1860 | static void ioc_rqos_done_bio(struct rq_qos *rqos, struct bio *bio) |
| @@ -1998,7 +2024,6 @@ static void ioc_pd_init(struct blkg_policy_data *pd) · 163 unmodified lines | ||
| 1998 | 2024 | iocg->ioc = ioc; |
| 1999 | 2025 | atomic64_set(&iocg->vtime, now.vnow); |
| 2000 | 2026 | atomic64_set(&iocg->done_vtime, now.vnow); |
| 2001 | − atomic64_set(&iocg->abs_vdebt, 0); | |
| 2002 | 2027 | atomic64_set(&iocg->active_period, atomic64_read(&ioc->cur_period)); |
| 2003 | 2028 | INIT_LIST_HEAD(&iocg->active_list); |
| 2004 | 2029 | iocg->hweight_active = HWEIGHT_WHOLE; |
| @@ -496,7 +496,7 @@ int blk_drop_partitions(struct gendisk *disk, struct block_device *bdev) · 495 unmodified lines | ||
| 496 | 496 | |
| 497 | 497 | if (!disk_part_scan_enabled(disk)) |
| 498 | 498 | return 0; |
| 499 | − if (bdev->bd_part_count || bdev->bd_openers > 1) | |
| 499 | + if (bdev->bd_part_count) | |
| 500 | 500 | return -EBUSY; |
| 501 | 501 | res = invalidate_partition(disk, 0); |
| 502 | 502 | if (res) |
| @@ -287,7 +287,7 @@ static void exit_tfm(struct crypto_skcipher *tfm) · 286 unmodified lines | ||
| 287 | 287 | crypto_free_skcipher(ctx->child); |
| 288 | 288 | } |
| 289 | 289 | |
| 290 | −static void free(struct skcipher_instance *inst) | |
| 290 | +static void free_inst(struct skcipher_instance *inst) | |
| 291 | 291 | { |
| 292 | 292 | crypto_drop_skcipher(skcipher_instance_ctx(inst)); |
| 293 | 293 | kfree(inst); |
| @@ -400,12 +400,12 @@ static int create(struct crypto_template *tmpl, struct rtattr **tb) · 106 unmodified lines | ||
| 400 | 400 | inst->alg.encrypt = encrypt; |
| 401 | 401 | inst->alg.decrypt = decrypt; |
| 402 | 402 | |
| 403 | − inst->free = free; | |
| 403 | + inst->free = free_inst; | |
| 404 | 404 | |
| 405 | 405 | err = skcipher_register_instance(tmpl, inst); |
| 406 | 406 | if (err) { |
| 407 | 407 | err_free_inst: |
| 408 | − free(inst); | |
| 408 | + free_inst(inst); | |
| 409 | 409 | } |
| 410 | 410 | return err; |
| 411 | 411 | } |
| @@ -322,7 +322,7 @@ static void exit_tfm(struct crypto_skcipher *tfm) · 321 unmodified lines | ||
| 322 | 322 | crypto_free_cipher(ctx->tweak); |
| 323 | 323 | } |
| 324 | 324 | |
| 325 | −static void free(struct skcipher_instance *inst) | |
| 325 | +static void free_inst(struct skcipher_instance *inst) | |
| 326 | 326 | { |
| 327 | 327 | crypto_drop_skcipher(skcipher_instance_ctx(inst)); |
| 328 | 328 | kfree(inst); |
| @@ -434,12 +434,12 @@ static int create(struct crypto_template *tmpl, struct rtattr **tb) · 105 unmodified lines | ||
| 434 | 434 | inst->alg.encrypt = encrypt; |
| 435 | 435 | inst->alg.decrypt = decrypt; |
| 436 | 436 | |
| 437 | − inst->free = free; | |
| 437 | + inst->free = free_inst; | |
| 438 | 438 | |
| 439 | 439 | err = skcipher_register_instance(tmpl, inst); |
| 440 | 440 | if (err) { |
| 441 | 441 | err_free_inst: |
| 442 | − free(inst); | |
| 442 | + free_inst(inst); | |
| 443 | 443 | } |
| 444 | 444 | return err; |
| 445 | 445 | } |
| @@ -87,18 +87,6 @@ static const struct dmi_system_id dmi_lid_quirks[] = { · 86 unmodified lines | ||
| 87 | 87 | }, |
| 88 | 88 | .driver_data = (void *)(long)ACPI_BUTTON_LID_INIT_DISABLED, |
| 89 | 89 | }, |
| 90 | − { | |
| 91 | − /* | |
| 92 | − * Asus T200TA, _LID keeps reporting closed after every second | |
| 93 | − * openening of the lid. Causing immediate re-suspend after | |
| 94 | − * opening every other open. Using LID_INIT_OPEN fixes this. | |
| 95 | − */ | |
| 96 | − .matches = { | |
| 97 | − DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), | |
| 98 | − DMI_MATCH(DMI_PRODUCT_NAME, "T200TA"), | |
| 99 | − }, | |
| 100 | − .driver_data = (void *)(long)ACPI_BUTTON_LID_INIT_OPEN, | |
| 101 | − }, | |
| 102 | 90 | { |
| 103 | 91 | /* GP-electronic T701, _LID method points to a floating GPIO */ |
| 104 | 92 | .matches = { |
| @@ -273,13 +273,13 @@ int acpi_device_set_power(struct acpi_device *device, int state) · 272 unmodified lines | ||
| 273 | 273 | end: |
| 274 | 274 | if (result) { |
| 275 | 275 | dev_warn(&device->dev, "Failed to change power state to %s\n", |
| 276 | − acpi_power_state_string(state)); | |
| 276 | + acpi_power_state_string(target_state)); | |
| 277 | 277 | } else { |
| 278 | 278 | device->power.state = target_state; |
| 279 | 279 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
| 280 | 280 | "Device [%s] transitioned to %s\n", |
| 281 | 281 | device->pnp.bus_id, |
| 282 | − acpi_power_state_string(state))); | |
| 282 | + acpi_power_state_string(target_state))); | |
| 283 | 283 | } |
| 284 | 284 | |
| 285 | 285 | return result; |
| @@ -322,10 +322,10 @@ static int acpi_pci_link_set(struct acpi_pci_link *link, int irq) · 321 unmodified lines | ||
| 322 | 322 | resource->res.data.extended_irq.polarity = |
| 323 | 323 | link->irq.polarity; |
| 324 | 324 | if (link->irq.triggering == ACPI_EDGE_SENSITIVE) |
| 325 | − resource->res.data.irq.shareable = | |
| 325 | + resource->res.data.extended_irq.shareable = | |
| 326 | 326 | ACPI_EXCLUSIVE; |
| 327 | 327 | else |
| 328 | − resource->res.data.irq.shareable = ACPI_SHARED; | |
| 328 | + resource->res.data.extended_irq.shareable = ACPI_SHARED; | |
| 329 | 329 | resource->res.data.extended_irq.interrupt_count = 1; |
| 330 | 330 | resource->res.data.extended_irq.interrupts[0] = irq; |
| 331 | 331 | /* ignore resource_source, it's optional */ |
| @@ -645,6 +645,7 @@ static void amba_device_initialize(struct amba_device *dev, const char *name) · 644 unmodified lines | ||
| 645 | 645 | dev->dev.release = amba_device_release; |
| 646 | 646 | dev->dev.bus = &amba_bustype; |
| 647 | 647 | dev->dev.dma_mask = &dev->dev.coherent_dma_mask; |
| 648 | + dev->dev.dma_parms = &dev->dma_parms; | |
| 648 | 649 | dev->res.name = dev_name(&dev->dev); |
| 649 | 650 | } |
| 650 | 651 | |
| @@ -145,7 +145,7 @@ enum { · 144 unmodified lines | ||
| 145 | 145 | |
| 146 | 146 | /* PORT_IDMA_CTL bits */ |
| 147 | 147 | IDMA_CTL_RST_ATA = (1 << 2), /* hardreset ATA bus */ |
| 148 | − IDMA_CTL_RST_IDMA = (1 << 5), /* reset IDMA machinary */ | |
| 148 | + IDMA_CTL_RST_IDMA = (1 << 5), /* reset IDMA machinery */ | |
| 149 | 149 | IDMA_CTL_GO = (1 << 7), /* IDMA mode go */ |
| 150 | 150 | IDMA_CTL_ATA_NIEN = (1 << 8), /* ATA IRQ disable */ |
| 151 | 151 | |
| @@ -256,7 +256,8 @@ static int try_to_bring_up_master(struct master *master, · 255 unmodified lines | ||
| 256 | 256 | ret = master->ops->bind(master->dev); |
| 257 | 257 | if (ret < 0) { |
| 258 | 258 | devres_release_group(master->dev, NULL); |
| 259 | − dev_info(master->dev, "master bind failed: %d\n", ret); | |
| 259 | + if (ret != -EPROBE_DEFER) | |
| 260 | + dev_info(master->dev, "master bind failed: %d\n", ret); | |
| 260 | 261 | return ret; |
| 261 | 262 | } |
| 262 | 263 | |
| @@ -611,8 +612,9 @@ static int component_bind(struct component *component, struct master *master, · 348 unmodified lines | ||
| 611 | 612 | devres_release_group(component->dev, NULL); |
| 612 | 613 | devres_release_group(master->dev, NULL); |
| 613 | 614 | |
| 614 | − dev_err(master->dev, "failed to bind %s (ops %ps): %d\n", | |
| 615 | − dev_name(component->dev), component->ops, ret); | |
| 615 | + if (ret != -EPROBE_DEFER) | |
| 616 | + dev_err(master->dev, "failed to bind %s (ops %ps): %d\n", | |
| 617 | + dev_name(component->dev), component->ops, ret); | |
| 616 | 618 | } |
| 617 | 619 | |
| 618 | 620 | return ret; |
| @@ -2370,6 +2370,11 @@ u32 fw_devlink_get_flags(void) · 2369 unmodified lines | ||
| 2370 | 2370 | return fw_devlink_flags; |
| 2371 | 2371 | } |
| 2372 | 2372 | |
| 2373 | +static bool fw_devlink_is_permissive(void) | |
| 2374 | +{ | |
| 2375 | + return fw_devlink_flags == DL_FLAG_SYNC_STATE_ONLY; | |
| 2376 | +} | |
| 2377 | + | |
| 2373 | 2378 | /** |
| 2374 | 2379 | * device_add - add device to device hierarchy. |
| 2375 | 2380 | * @dev: device. |
| @@ -2524,7 +2529,7 @@ int device_add(struct device *dev) · 148 unmodified lines | ||
| 2524 | 2529 | if (fw_devlink_flags && is_fwnode_dev && |
| 2525 | 2530 | fwnode_has_op(dev->fwnode, add_links)) { |
| 2526 | 2531 | fw_ret = fwnode_call_int_op(dev->fwnode, add_links, dev); |
| 2527 | − if (fw_ret == -ENODEV) | |
| 2532 | + if (fw_ret == -ENODEV && !fw_devlink_is_permissive()) | |
| 2528 | 2533 | device_link_wait_for_mandatory_supplier(dev); |
| 2529 | 2534 | else if (fw_ret) |
| 2530 | 2535 | device_link_wait_for_optional_supplier(dev); |
| @@ -224,17 +224,9 @@ static int deferred_devs_show(struct seq_file *s, void *data) · 223 unmodified lines | ||
| 224 | 224 | } |
| 225 | 225 | DEFINE_SHOW_ATTRIBUTE(deferred_devs); |
| 226 | 226 | |
| 227 | −#ifdef CONFIG_MODULES | |
| 228 | −/* | |
| 229 | − * In the case of modules, set the default probe timeout to | |
| 230 | − * 30 seconds to give userland some time to load needed modules | |
| 231 | − */ | |
| 232 | −int driver_deferred_probe_timeout = 30; | |
| 233 | −#else | |
| 234 | −/* In the case of !modules, no probe timeout needed */ | |
| 235 | −int driver_deferred_probe_timeout = -1; | |
| 236 | −#endif | |
| 227 | +int driver_deferred_probe_timeout; | |
| 237 | 228 | EXPORT_SYMBOL_GPL(driver_deferred_probe_timeout); |
| 229 | +static DECLARE_WAIT_QUEUE_HEAD(probe_timeout_waitqueue); | |
| 238 | 230 | |
| 239 | 231 | static int __init deferred_probe_timeout_setup(char *str) |
| 240 | 232 | { |
| @@ -266,8 +258,8 @@ int driver_deferred_probe_check_state(struct device *dev) · 25 unmodified lines | ||
| 266 | 258 | return -ENODEV; |
| 267 | 259 | } |
| 268 | 260 | |
| 269 | − if (!driver_deferred_probe_timeout) { | |
| 270 | − dev_WARN(dev, "deferred probe timeout, ignoring dependency"); | |
| 261 | + if (!driver_deferred_probe_timeout && initcalls_done) { | |
| 262 | + dev_warn(dev, "deferred probe timeout, ignoring dependency"); | |
| 271 | 263 | return -ETIMEDOUT; |
| 272 | 264 | } |
| 273 | 265 | |
| @@ -284,6 +276,7 @@ static void deferred_probe_timeout_work_func(struct work_struct *work) · 10 unmodified lines | ||
| 284 | 276 | |
| 285 | 277 | list_for_each_entry_safe(private, p, &deferred_probe_pending_list, deferred_probe) |
| 286 | 278 | dev_info(private->device, "deferred probe pending"); |
| 279 | + wake_up(&probe_timeout_waitqueue); | |
| 287 | 280 | } |
| 288 | 281 | static DECLARE_DELAYED_WORK(deferred_probe_timeout_work, deferred_probe_timeout_work_func); |
| 289 | 282 | |
| @@ -658,6 +651,9 @@ int driver_probe_done(void) · 368 unmodified lines | ||
| 658 | 651 | */ |
| 659 | 652 | void wait_for_device_probe(void) |
| 660 | 653 | { |
| 654 | + /* wait for probe timeout */ | |
| 655 | + wait_event(probe_timeout_waitqueue, !driver_deferred_probe_timeout); | |
| 656 | + | |
| 661 | 657 | /* wait for the deferred probe workqueue to finish */ |
| 662 | 658 | flush_work(&deferred_probe_work); |
| 663 | 659 | |
| @@ -45,5 +45,4 @@ struct ctl_table firmware_config_table[] = { · 44 unmodified lines | ||
| 45 | 45 | }, |
| 46 | 46 | { } |
| 47 | 47 | }; |
| 48 | −EXPORT_SYMBOL_GPL(firmware_config_table); | |
| 49 | 48 | #endif |
| @@ -380,6 +380,8 @@ struct platform_object { · 379 unmodified lines | ||
| 380 | 380 | */ |
| 381 | 381 | static void setup_pdev_dma_masks(struct platform_device *pdev) |
| 382 | 382 | { |
| 383 | + pdev->dev.dma_parms = &pdev->dma_parms; | |
| 384 | + | |
| 383 | 385 | if (!pdev->dev.coherent_dma_mask) |
| 384 | 386 | pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); |
| 385 | 387 | if (!pdev->dev.dma_mask) { |
| @@ -730,7 +730,7 @@ static bool dpm_async_fn(struct device *dev, async_func_t func) · 729 unmodified lines | ||
| 730 | 730 | |
| 731 | 731 | if (is_async(dev)) { |
| 732 | 732 | get_device(dev); |
| 733 | − async_schedule(func, dev); | |
| 733 | + async_schedule_dev(func, dev); | |
| 734 | 734 | return true; |
| 735 | 735 | } |
| 736 | 736 | |
| @@ -85,26 +85,35 @@ struct nullb { · 84 unmodified lines | ||
| 85 | 85 | char disk_name[DISK_NAME_LEN]; |
| 86 | 86 | }; |
| 87 | 87 | |
| 88 | +blk_status_t null_process_cmd(struct nullb_cmd *cmd, | |
| 89 | + enum req_opf op, sector_t sector, | |
| 90 | + unsigned int nr_sectors); | |
| 91 | + | |
| 88 | 92 | #ifdef CONFIG_BLK_DEV_ZONED |
| 89 | −int null_zone_init(struct nullb_device *dev); | |
| 90 | −void null_zone_exit(struct nullb_device *dev); | |
| 93 | +int null_init_zoned_dev(struct nullb_device *dev, struct request_queue *q); | |
| 94 | +int null_register_zoned_dev(struct nullb *nullb); | |
| 95 | +void null_free_zoned_dev(struct nullb_device *dev); | |
| 91 | 96 | int null_report_zones(struct gendisk *disk, sector_t sector, |
| 92 | 97 | unsigned int nr_zones, report_zones_cb cb, void *data); |
| 93 | −blk_status_t null_handle_zoned(struct nullb_cmd *cmd, | |
| 94 | − enum req_opf op, sector_t sector, | |
| 95 | − sector_t nr_sectors); | |
| 98 | +blk_status_t null_process_zoned_cmd(struct nullb_cmd *cmd, | |
| 99 | + enum req_opf op, sector_t sector, | |
| 100 | + sector_t nr_sectors); | |
| 96 | 101 | size_t null_zone_valid_read_len(struct nullb *nullb, |
| 97 | 102 | sector_t sector, unsigned int len); |
| 98 | 103 | #else |
| 99 | −static inline int null_zone_init(struct nullb_device *dev) | |
| 104 | +static inline int null_init_zoned_dev(struct nullb_device *dev, | |
| 105 | + struct request_queue *q) | |
| 100 | 106 | { |
| 101 | 107 | pr_err("CONFIG_BLK_DEV_ZONED not enabled\n"); |
| 102 | 108 | return -EINVAL; |
| 103 | 109 | } |
| 104 | −static inline void null_zone_exit(struct nullb_device *dev) {} | |
| 105 | −static inline blk_status_t null_handle_zoned(struct nullb_cmd *cmd, | |
| 106 | − enum req_opf op, sector_t sector, | |
| 107 | − sector_t nr_sectors) | |
| 110 | +static inline int null_register_zoned_dev(struct nullb *nullb) | |
| 111 | +{ | |
| 112 | + return -ENODEV; | |
| 113 | +} | |
| 114 | +static inline void null_free_zoned_dev(struct nullb_device *dev) {} | |
| 115 | +static inline blk_status_t null_process_zoned_cmd(struct nullb_cmd *cmd, | |
| 116 | + enum req_opf op, sector_t sector, sector_t nr_sectors) | |
| 108 | 117 | { |
| 109 | 118 | return BLK_STS_NOTSUPP; |
| 110 | 119 | } |
| @@ -580,7 +580,7 @@ static void null_free_dev(struct nullb_device *dev) · 579 unmodified lines | ||
| 580 | 580 | if (!dev) |
| 581 | 581 | return; |
| 582 | 582 | |
| 583 | − null_zone_exit(dev); | |
| 583 | + null_free_zoned_dev(dev); | |
| 584 | 584 | badblocks_exit(&dev->badblocks); |
| 585 | 585 | kfree(dev); |
| 586 | 586 | } |
| @@ -1276,6 +1276,25 @@ static inline void nullb_complete_cmd(struct nullb_cmd *cmd) · 689 unmodified lines | ||
| 1276 | 1276 | } |
| 1277 | 1277 | } |
| 1278 | 1278 | |
| 1279 | +blk_status_t null_process_cmd(struct nullb_cmd *cmd, | |
| 1280 | + enum req_opf op, sector_t sector, | |
| 1281 | + unsigned int nr_sectors) | |
| 1282 | +{ | |
| 1283 | + struct nullb_device *dev = cmd->nq->dev; | |
| 1284 | + blk_status_t ret; | |
| 1285 | + | |
| 1286 | + if (dev->badblocks.shift != -1) { | |
| 1287 | + ret = null_handle_badblocks(cmd, sector, nr_sectors); | |
| 1288 | + if (ret != BLK_STS_OK) | |
| 1289 | + return ret; | |
| 1290 | + } | |
| 1291 | + | |
| 1292 | + if (dev->memory_backed) | |
| 1293 | + return null_handle_memory_backed(cmd, op); | |
| 1294 | + | |
| 1295 | + return BLK_STS_OK; | |
| 1296 | +} | |
| 1297 | + | |
| 1279 | 1298 | static blk_status_t null_handle_cmd(struct nullb_cmd *cmd, sector_t sector, |
| 1280 | 1299 | sector_t nr_sectors, enum req_opf op) |
| 1281 | 1300 | { |
| @@ -1294,17 +1313,11 @@ static blk_status_t null_handle_cmd(struct nullb_cmd *cmd, sector_t sector, · 12 unmodified lines | ||
| 1294 | 1313 | goto out; |
| 1295 | 1314 | } |
| 1296 | 1315 | |
| 1297 | − if (nullb->dev->badblocks.shift != -1) { | |
| 1298 | − cmd->error = null_handle_badblocks(cmd, sector, nr_sectors); | |
| 1299 | − if (cmd->error != BLK_STS_OK) | |
| 1300 | − goto out; | |
| 1301 | − } | |
| 1302 | − | |
| 1303 | − if (dev->memory_backed) | |
| 1304 | − cmd->error = null_handle_memory_backed(cmd, op); | |
| 1305 | − | |
| 1306 | − if (!cmd->error && dev->zoned) | |
| 1307 | − cmd->error = null_handle_zoned(cmd, op, sector, nr_sectors); | |
| 1316 | + if (dev->zoned) | |
| 1317 | + cmd->error = null_process_zoned_cmd(cmd, op, | |
| 1318 | + sector, nr_sectors); | |
| 1319 | + else | |
| 1320 | + cmd->error = null_process_cmd(cmd, op, sector, nr_sectors); | |
| 1308 | 1321 | |
| 1309 | 1322 | out: |
| 1310 | 1323 | nullb_complete_cmd(cmd); |
| @@ -1605,19 +1618,12 @@ static int null_gendisk_register(struct nullb *nullb) · 294 unmodified lines | ||
| 1605 | 1618 | disk->queue = nullb->q; |
| 1606 | 1619 | strncpy(disk->disk_name, nullb->disk_name, DISK_NAME_LEN); |
| 1607 | 1620 | |
| 1608 | −#ifdef CONFIG_BLK_DEV_ZONED | |
| 1609 | 1621 | if (nullb->dev->zoned) { |
| 1610 | − if (queue_is_mq(nullb->q)) { | |
| 1611 | − int ret = blk_revalidate_disk_zones(disk); | |
| 1612 | − if (ret) | |
| 1613 | − return ret; | |
| 1614 | − } else { | |
| 1615 | − blk_queue_chunk_sectors(nullb->q, | |
| 1616 | − nullb->dev->zone_size_sects); | |
| 1617 | − nullb->q->nr_zones = blkdev_nr_zones(disk); | |
| 1618 | − } | |
| 1622 | + int ret = null_register_zoned_dev(nullb); | |
| 1623 | + | |
| 1624 | + if (ret) | |
| 1625 | + return ret; | |
| 1619 | 1626 | } |
| 1620 | −#endif | |
| 1621 | 1627 | |
| 1622 | 1628 | add_disk(disk); |
| 1623 | 1629 | return 0; |
| @@ -1773,14 +1779,9 @@ static int null_add_dev(struct nullb_device *dev) · 149 unmodified lines | ||
| 1773 | 1779 | } |
| 1774 | 1780 | |
| 1775 | 1781 | if (dev->zoned) { |
| 1776 | − rv = null_zone_init(dev); | |
| 1782 | + rv = null_init_zoned_dev(dev, nullb->q); | |
| 1777 | 1783 | if (rv) |
| 1778 | 1784 | goto out_cleanup_blk_queue; |
| 1779 | − | |
| 1780 | − nullb->q->limits.zoned = BLK_ZONED_HM; | |
| 1781 | − blk_queue_flag_set(QUEUE_FLAG_ZONE_RESETALL, nullb->q); | |
| 1782 | − blk_queue_required_elevator_features(nullb->q, | |
| 1783 | − ELEVATOR_F_ZBD_SEQ_WRITE); | |
| 1784 | 1785 | } |
| 1785 | 1786 | |
| 1786 | 1787 | nullb->q->queuedata = nullb; |
| @@ -1809,8 +1810,7 @@ static int null_add_dev(struct nullb_device *dev) · 22 unmodified lines | ||
| 1809 | 1810 | |
| 1810 | 1811 | return 0; |
| 1811 | 1812 | out_cleanup_zone: |
| 1812 | − if (dev->zoned) | |
| 1813 | − null_zone_exit(dev); | |
| 1813 | + null_free_zoned_dev(dev); | |
| 1814 | 1814 | out_cleanup_blk_queue: |
| 1815 | 1815 | blk_cleanup_queue(nullb->q); |
| 1816 | 1816 | out_cleanup_tags: |
| @@ -13,7 +13,7 @@ static inline unsigned int null_zone_no(struct nullb_device *dev, sector_t sect) · 12 unmodified lines | ||
| 13 | 13 | return sect >> ilog2(dev->zone_size_sects); |
| 14 | 14 | } |
| 15 | 15 | |
| 16 | −int null_zone_init(struct nullb_device *dev) | |
| 16 | +int null_init_zoned_dev(struct nullb_device *dev, struct request_queue *q) | |
| 17 | 17 | { |
| 18 | 18 | sector_t dev_size = (sector_t)dev->size * 1024 * 1024; |
| 19 | 19 | sector_t sector = 0; |
| @@ -61,10 +61,27 @@ int null_zone_init(struct nullb_device *dev) · 41 unmodified lines | ||
| 61 | 61 | sector += dev->zone_size_sects; |
| 62 | 62 | } |
| 63 | 63 | |
| 64 | + q->limits.zoned = BLK_ZONED_HM; | |
| 65 | + blk_queue_flag_set(QUEUE_FLAG_ZONE_RESETALL, q); | |
| 66 | + blk_queue_required_elevator_features(q, ELEVATOR_F_ZBD_SEQ_WRITE); | |
| 67 | + | |
| 68 | + return 0; | |
| 69 | +} | |
| 70 | + | |
| 71 | +int null_register_zoned_dev(struct nullb *nullb) | |
| 72 | +{ | |
| 73 | + struct request_queue *q = nullb->q; | |
| 74 | + | |
| 75 | + if (queue_is_mq(q)) | |
| 76 | + return blk_revalidate_disk_zones(nullb->disk); | |
| 77 | + | |
| 78 | + blk_queue_chunk_sectors(q, nullb->dev->zone_size_sects); | |
| 79 | + q->nr_zones = blkdev_nr_zones(nullb->disk); | |
| 80 | + | |
| 64 | 81 | return 0; |
| 65 | 82 | } |
| 66 | 83 | |
| 67 | −void null_zone_exit(struct nullb_device *dev) | |
| 84 | +void null_free_zoned_dev(struct nullb_device *dev) | |
| 68 | 85 | { |
| 69 | 86 | kvfree(dev->zones); |
| 70 | 87 | } |
| @@ -126,11 +143,16 @@ static blk_status_t null_zone_write(struct nullb_cmd *cmd, sector_t sector, · 55 unmodified lines | ||
| 126 | 143 | struct nullb_device *dev = cmd->nq->dev; |
| 127 | 144 | unsigned int zno = null_zone_no(dev, sector); |
| 128 | 145 | struct blk_zone *zone = &dev->zones[zno]; |
| 146 | + blk_status_t ret; | |
| 147 | + | |
| 148 | + trace_nullb_zone_op(cmd, zno, zone->cond); | |
| 149 | + | |
| 150 | + if (zone->type == BLK_ZONE_TYPE_CONVENTIONAL) | |
| 151 | + return null_process_cmd(cmd, REQ_OP_WRITE, sector, nr_sectors); | |
| 129 | 152 | |
| 130 | 153 | switch (zone->cond) { |
| 131 | 154 | case BLK_ZONE_COND_FULL: |
| 132 | 155 | /* Cannot write to a full zone */ |
| 133 | − cmd->error = BLK_STS_IOERR; | |
| 134 | 156 | return BLK_STS_IOERR; |
| 135 | 157 | case BLK_ZONE_COND_EMPTY: |
| 136 | 158 | case BLK_ZONE_COND_IMP_OPEN: |
| @@ -143,19 +165,18 @@ static blk_status_t null_zone_write(struct nullb_cmd *cmd, sector_t sector, · 6 unmodified lines | ||
| 143 | 165 | if (zone->cond != BLK_ZONE_COND_EXP_OPEN) |
| 144 | 166 | zone->cond = BLK_ZONE_COND_IMP_OPEN; |
| 145 | 167 | |
| 168 | + ret = null_process_cmd(cmd, REQ_OP_WRITE, sector, nr_sectors); | |
| 169 | + if (ret != BLK_STS_OK) | |
| 170 | + return ret; | |
| 171 | + | |
| 146 | 172 | zone->wp += nr_sectors; |
| 147 | 173 | if (zone->wp == zone->start + zone->len) |
| 148 | 174 | zone->cond = BLK_ZONE_COND_FULL; |
| 149 | − break; | |
| 150 | − case BLK_ZONE_COND_NOT_WP: | |
| 151 | − break; | |
| 175 | + return BLK_STS_OK; | |
| 152 | 176 | default: |
| 153 | 177 | /* Invalid zone condition */ |
| 154 | 178 | return BLK_STS_IOERR; |
| 155 | 179 | } |
| 156 | − | |
| 157 | − trace_nullb_zone_op(cmd, zno, zone->cond); | |
| 158 | − return BLK_STS_OK; | |
| 159 | 180 | } |
| 160 | 181 | |
| 161 | 182 | static blk_status_t null_zone_mgmt(struct nullb_cmd *cmd, enum req_opf op, |
| @@ -216,8 +237,8 @@ static blk_status_t null_zone_mgmt(struct nullb_cmd *cmd, enum req_opf op, · 54 unmodified lines | ||
| 216 | 237 | return BLK_STS_OK; |
| 217 | 238 | } |
| 218 | 239 | |
| 219 | −blk_status_t null_handle_zoned(struct nullb_cmd *cmd, enum req_opf op, | |
| 220 | − sector_t sector, sector_t nr_sectors) | |
| 240 | +blk_status_t null_process_zoned_cmd(struct nullb_cmd *cmd, enum req_opf op, | |
| 241 | + sector_t sector, sector_t nr_sectors) | |
| 221 | 242 | { |
| 222 | 243 | switch (op) { |
| 223 | 244 | case REQ_OP_WRITE: |
| @@ -229,6 +250,6 @@ blk_status_t null_handle_zoned(struct nullb_cmd *cmd, enum req_opf op, · 5 unmodified lines | ||
| 229 | 250 | case REQ_OP_ZONE_FINISH: |
| 230 | 251 | return null_zone_mgmt(cmd, op, sector); |
| 231 | 252 | default: |
| 232 | − return BLK_STS_OK; | |
| 253 | + return null_process_cmd(cmd, op, sector, nr_sectors); | |
| 233 | 254 | } |
| 234 | 255 | } |
| @@ -15,6 +15,7 @@ · 14 unmodified lines | ||
| 15 | 15 | #include <linux/blk-mq.h> |
| 16 | 16 | #include <linux/blk-mq-virtio.h> |
| 17 | 17 | #include <linux/numa.h> |
| 18 | +#include <uapi/linux/virtio_ring.h> | |
| 18 | 19 | |
| 19 | 20 | #define PART_BITS 4 |
| 20 | 21 | #define VQ_NAME_LEN 16 |
| @@ -32,6 +33,15 @@ struct virtio_blk_vq { · 11 unmodified lines | ||
| 32 | 33 | } ____cacheline_aligned_in_smp; |
| 33 | 34 | |
| 34 | 35 | struct virtio_blk { |
| 36 | + /* | |
| 37 | + * This mutex must be held by anything that may run after | |
| 38 | + * virtblk_remove() sets vblk->vdev to NULL. | |
| 39 | + * | |
| 40 | + * blk-mq, virtqueue processing, and sysfs attribute code paths are | |
| 41 | + * shut down before vblk->vdev is set to NULL and therefore do not need | |
| 42 | + * to hold this mutex. | |
| 43 | + */ | |
| 44 | + struct mutex vdev_mutex; | |
| 35 | 45 | struct virtio_device *vdev; |
| 36 | 46 | |
| 37 | 47 | /* The disk structure for the kernel. */ |
| @@ -43,6 +53,13 @@ struct virtio_blk { · 5 unmodified lines | ||
| 43 | 53 | /* Process context for config space updates */ |
| 44 | 54 | struct work_struct config_work; |
| 45 | 55 | |
| 56 | + /* | |
| 57 | + * Tracks references from block_device_operations open/release and | |
| 58 | + * virtio_driver probe/remove so this object can be freed once no | |
| 59 | + * longer in use. | |
| 60 | + */ | |
| 61 | + refcount_t refs; | |
| 62 | + | |
| 46 | 63 | /* What host tells us, plus 2 for header & tailer. */ |
| 47 | 64 | unsigned int sg_elems; |
| 48 | 65 | |
| @@ -294,10 +311,55 @@ out: · 245 unmodified lines | ||
| 294 | 311 | return err; |
| 295 | 312 | } |
| 296 | 313 | |
| 314 | +static void virtblk_get(struct virtio_blk *vblk) | |
| 315 | +{ | |
| 316 | + refcount_inc(&vblk->refs); | |
| 317 | +} | |
| 318 | + | |
| 319 | +static void virtblk_put(struct virtio_blk *vblk) | |
| 320 | +{ | |
| 321 | + if (refcount_dec_and_test(&vblk->refs)) { | |
| 322 | + ida_simple_remove(&vd_index_ida, vblk->index); | |
| 323 | + mutex_destroy(&vblk->vdev_mutex); | |
| 324 | + kfree(vblk); | |
| 325 | + } | |
| 326 | +} | |
| 327 | + | |
| 328 | +static int virtblk_open(struct block_device *bd, fmode_t mode) | |
| 329 | +{ | |
| 330 | + struct virtio_blk *vblk = bd->bd_disk->private_data; | |
| 331 | + int ret = 0; | |
| 332 | + | |
| 333 | + mutex_lock(&vblk->vdev_mutex); | |
| 334 | + | |
| 335 | + if (vblk->vdev) | |
| 336 | + virtblk_get(vblk); | |
| 337 | + else | |
| 338 | + ret = -ENXIO; | |
| 339 | + | |
| 340 | + mutex_unlock(&vblk->vdev_mutex); | |
| 341 | + return ret; | |
| 342 | +} | |
| 343 | + | |
| 344 | +static void virtblk_release(struct gendisk *disk, fmode_t mode) | |
| 345 | +{ | |
| 346 | + struct virtio_blk *vblk = disk->private_data; | |
| 347 | + | |
| 348 | + virtblk_put(vblk); | |
| 349 | +} | |
| 350 | + | |
| 297 | 351 | /* We provide getgeo only to please some old bootloader/partitioning tools */ |
| 298 | 352 | static int virtblk_getgeo(struct block_device *bd, struct hd_geometry *geo) |
| 299 | 353 | { |
| 300 | 354 | struct virtio_blk *vblk = bd->bd_disk->private_data; |
| 355 | + int ret = 0; | |
| 356 | + | |
| 357 | + mutex_lock(&vblk->vdev_mutex); | |
| 358 | + | |
| 359 | + if (!vblk->vdev) { | |
| 360 | + ret = -ENXIO; | |
| 361 | + goto out; | |
| 362 | + } | |
| 301 | 363 | |
| 302 | 364 | /* see if the host passed in geometry config */ |
| 303 | 365 | if (virtio_has_feature(vblk->vdev, VIRTIO_BLK_F_GEOMETRY)) { |
| @@ -313,11 +375,15 @@ static int virtblk_getgeo(struct block_device *bd, struct hd_geometry *geo) · 9 unmodified lines | ||
| 313 | 375 | geo->sectors = 1 << 5; |
| 314 | 376 | geo->cylinders = get_capacity(bd->bd_disk) >> 11; |
| 315 | 377 | } |
| 316 | − return 0; | |
| 378 | +out: | |
| 379 | + mutex_unlock(&vblk->vdev_mutex); | |
| 380 | + return ret; | |
| 317 | 381 | } |
| 318 | 382 | |
| 319 | 383 | static const struct block_device_operations virtblk_fops = { |
| 320 | 384 | .owner = THIS_MODULE, |
| 385 | + .open = virtblk_open, | |
| 386 | + .release = virtblk_release, | |
| 321 | 387 | .getgeo = virtblk_getgeo, |
| 322 | 388 | }; |
| 323 | 389 | |
| @@ -654,6 +720,10 @@ static int virtblk_probe(struct virtio_device *vdev) · 330 unmodified lines | ||
| 654 | 720 | goto out_free_index; |
| 655 | 721 | } |
| 656 | 722 | |
| 723 | + /* This reference is dropped in virtblk_remove(). */ | |
| 724 | + refcount_set(&vblk->refs, 1); | |
| 725 | + mutex_init(&vblk->vdev_mutex); | |
| 726 | + | |
| 657 | 727 | vblk->vdev = vdev; |
| 658 | 728 | vblk->sg_elems = sg_elems; |
| 659 | 729 | |
| @@ -819,8 +889,6 @@ out: · 159 unmodified lines | ||
| 819 | 889 | static void virtblk_remove(struct virtio_device *vdev) |
| 820 | 890 | { |
| 821 | 891 | struct virtio_blk *vblk = vdev->priv; |
| 822 | − int index = vblk->index; | |
| 823 | − int refc; | |
| 824 | 892 | |
| 825 | 893 | /* Make sure no work handler is accessing the device. */ |
| 826 | 894 | flush_work(&vblk->config_work); |
| @@ -830,18 +898,21 @@ static void virtblk_remove(struct virtio_device *vdev) · 3 unmodified lines | ||
| 830 | 898 | |
| 831 | 899 | blk_mq_free_tag_set(&vblk->tag_set); |
| 832 | 900 | |
| 901 | + mutex_lock(&vblk->vdev_mutex); | |
| 902 | + | |
| 833 | 903 | /* Stop all the virtqueues. */ |
| 834 | 904 | vdev->config->reset(vdev); |
| 835 | 905 | |
| 836 | − refc = kref_read(&disk_to_dev(vblk->disk)->kobj.kref); | |
| 906 | + /* Virtqueues are stopped, nothing can use vblk->vdev anymore. */ | |
| 907 | + vblk->vdev = NULL; | |
| 908 | + | |
| 837 | 909 | put_disk(vblk->disk); |
| 838 | 910 | vdev->config->del_vqs(vdev); |
| 839 | 911 | kfree(vblk->vqs); |
| 840 | − kfree(vblk); | |
| 841 | 912 | |
| 842 | − /* Only free device id if we don't have any users */ | |
| 843 | − if (refc == 1) | |
| 844 | − ida_simple_remove(&vd_index_ida, index); | |
| 913 | + mutex_unlock(&vblk->vdev_mutex); | |
| 914 | + | |
| 915 | + virtblk_put(vblk); | |
| 845 | 916 | } |
| 846 | 917 | |
| 847 | 918 | #ifdef CONFIG_PM_SLEEP |
| @@ -812,10 +812,9 @@ int mhi_register_controller(struct mhi_controller *mhi_cntrl, · 811 unmodified lines | ||
| 812 | 812 | if (!mhi_cntrl) |
| 813 | 813 | return -EINVAL; |
| 814 | 814 | |
| 815 | − if (!mhi_cntrl->runtime_get || !mhi_cntrl->runtime_put) | |
| 816 | − return -EINVAL; | |
| 817 | − | |
| 818 | − if (!mhi_cntrl->status_cb || !mhi_cntrl->link_status) | |
| 815 | + if (!mhi_cntrl->runtime_get || !mhi_cntrl->runtime_put || | |
| 816 | + !mhi_cntrl->status_cb || !mhi_cntrl->read_reg || | |
| 817 | + !mhi_cntrl->write_reg) | |
| 819 | 818 | return -EINVAL; |
| 820 | 819 | |
| 821 | 820 | ret = parse_config(mhi_cntrl, config); |
| @@ -11,9 +11,6 @@ · 10 unmodified lines | ||
| 11 | 11 | |
| 12 | 12 | extern struct bus_type mhi_bus_type; |
| 13 | 13 | |
| 14 | −/* MHI MMIO register mapping */ | |
| 15 | −#define PCI_INVALID_READ(val) (val == U32_MAX) | |
| 16 | − | |
| 17 | 14 | #define MHIREGLEN (0x0) |
| 18 | 15 | #define MHIREGLEN_MHIREGLEN_MASK (0xFFFFFFFF) |
| 19 | 16 | #define MHIREGLEN_MHIREGLEN_SHIFT (0) |
| @@ -18,16 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | int __must_check mhi_read_reg(struct mhi_controller *mhi_cntrl, |
| 19 | 19 | void __iomem *base, u32 offset, u32 *out) |
| 20 | 20 | { |
| 21 | − u32 tmp = readl(base + offset); | |
| 22 | − | |
| 23 | − /* If there is any unexpected value, query the link status */ | |
| 24 | − if (PCI_INVALID_READ(tmp) && | |
| 25 | − mhi_cntrl->link_status(mhi_cntrl)) | |
| 26 | − return -EIO; | |
| 27 | − | |
| 28 | − *out = tmp; | |
| 29 | − | |
| 30 | − return 0; | |
| 21 | + return mhi_cntrl->read_reg(mhi_cntrl, base + offset, out); | |
| 31 | 22 | } |
| 32 | 23 | |
| 33 | 24 | int __must_check mhi_read_reg_field(struct mhi_controller *mhi_cntrl, |
| @@ -49,7 +40,7 @@ int __must_check mhi_read_reg_field(struct mhi_controller *mhi_cntrl, · 15 unmodified lines | ||
| 49 | 40 | void mhi_write_reg(struct mhi_controller *mhi_cntrl, void __iomem *base, |
| 50 | 41 | u32 offset, u32 val) |
| 51 | 42 | { |
| 52 | − writel(val, base + offset); | |
| 43 | + mhi_cntrl->write_reg(mhi_cntrl, base + offset, val); | |
| 53 | 44 | } |
| 54 | 45 | |
| 55 | 46 | void mhi_write_reg_field(struct mhi_controller *mhi_cntrl, void __iomem *base, |
| @@ -294,7 +285,7 @@ void mhi_create_devices(struct mhi_controller *mhi_cntrl) · 238 unmodified lines | ||
| 294 | 285 | !(mhi_chan->ee_mask & BIT(mhi_cntrl->ee))) |
| 295 | 286 | continue; |
| 296 | 287 | mhi_dev = mhi_alloc_device(mhi_cntrl); |
| 297 | − if (!mhi_dev) | |
| 288 | + if (IS_ERR(mhi_dev)) | |
| 298 | 289 | return; |
| 299 | 290 | |
| 300 | 291 | mhi_dev->dev_type = MHI_DEVICE_XFER; |
| @@ -336,7 +327,8 @@ void mhi_create_devices(struct mhi_controller *mhi_cntrl) · 35 unmodified lines | ||
| 336 | 327 | |
| 337 | 328 | /* Channel name is same for both UL and DL */ |
| 338 | 329 | mhi_dev->chan_name = mhi_chan->name; |
| 339 | − dev_set_name(&mhi_dev->dev, "%04x_%s", mhi_chan->chan, | |
| 330 | + dev_set_name(&mhi_dev->dev, "%s_%s", | |
| 331 | + dev_name(mhi_cntrl->cntrl_dev), | |
| 340 | 332 | mhi_dev->chan_name); |
| 341 | 333 | |
| 342 | 334 | /* Init wakeup source if available */ |
| @@ -902,7 +902,11 @@ int mhi_sync_power_up(struct mhi_controller *mhi_cntrl) · 901 unmodified lines | ||
| 902 | 902 | MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state), |
| 903 | 903 | msecs_to_jiffies(mhi_cntrl->timeout_ms)); |
| 904 | 904 | |
| 905 | − return (MHI_IN_MISSION_MODE(mhi_cntrl->ee)) ? 0 : -EIO; | |
| 905 | + ret = (MHI_IN_MISSION_MODE(mhi_cntrl->ee)) ? 0 : -ETIMEDOUT; | |
| 906 | + if (ret) | |
| 907 | + mhi_power_down(mhi_cntrl, false); | |
| 908 | + | |
| 909 | + return ret; | |
| 906 | 910 | } |
| 907 | 911 | EXPORT_SYMBOL(mhi_sync_power_up); |
| 908 | 912 | |
| @@ -11,6 +11,7 @@ · 10 unmodified lines | ||
| 11 | 11 | #include <linux/virtio.h> |
| 12 | 12 | #include <linux/virtio_rng.h> |
| 13 | 13 | #include <linux/module.h> |
| 14 | +#include <linux/slab.h> | |
| 14 | 15 | |
| 15 | 16 | static DEFINE_IDA(rng_index_ida); |
| 16 | 17 | |
| @@ -323,7 +323,7 @@ int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx, · 322 unmodified lines | ||
| 323 | 323 | |
| 324 | 324 | for (i = 0; i < chip->nr_allocated_banks; i++) { |
| 325 | 325 | if (digests[i].alg_id != chip->allocated_banks[i].alg_id) { |
| 326 | − rc = EINVAL; | |
| 326 | + rc = -EINVAL; | |
| 327 | 327 | goto out; |
| 328 | 328 | } |
| 329 | 329 | } |
| @@ -681,6 +681,7 @@ out: · 680 unmodified lines | ||
| 681 | 681 | rc = -ENODEV; |
| 682 | 682 | return rc; |
| 683 | 683 | } |
| 684 | +EXPORT_SYMBOL_GPL(tpm2_get_cc_attrs_tbl); | |
| 684 | 685 | |
| 685 | 686 | /** |
| 686 | 687 | * tpm2_startup - turn on the TPM |
| @@ -1,6 +1,6 @@ | ||
| 1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | 2 | /* |
| 3 | − * Copyright (C) 2012 IBM Corporation | |
| 3 | + * Copyright (C) 2012-2020 IBM Corporation | |
| 4 | 4 | * |
| 5 | 5 | * Author: Ashley Lai <ashleydlai@gmail.com> |
| 6 | 6 | * |
| @@ -134,6 +134,64 @@ static int tpm_ibmvtpm_recv(struct tpm_chip *chip, u8 *buf, size_t count) · 127 unmodified lines | ||
| 134 | 134 | return len; |
| 135 | 135 | } |
| 136 | 136 | |
| 137 | +/** | |
| 138 | + * ibmvtpm_crq_send_init - Send a CRQ initialize message | |
| 139 | + * @ibmvtpm: vtpm device struct | |
| 140 | + * | |
| 141 | + * Return: | |
| 142 | + * 0 on success. | |
| 143 | + * Non-zero on failure. | |
| 144 | + */ | |
| 145 | +static int ibmvtpm_crq_send_init(struct ibmvtpm_dev *ibmvtpm) | |
| 146 | +{ | |
| 147 | + int rc; | |
| 148 | + | |
| 149 | + rc = ibmvtpm_send_crq_word(ibmvtpm->vdev, INIT_CRQ_CMD); | |
| 150 | + if (rc != H_SUCCESS) | |
| 151 | + dev_err(ibmvtpm->dev, | |
| 152 | + "%s failed rc=%d\n", __func__, rc); | |
| 153 | + | |
| 154 | + return rc; | |
| 155 | +} | |
| 156 | + | |
| 157 | +/** | |
| 158 | + * tpm_ibmvtpm_resume - Resume from suspend | |
| 159 | + * | |
| 160 | + * @dev: device struct | |
| 161 | + * | |
| 162 | + * Return: Always 0. | |
| 163 | + */ | |
| 164 | +static int tpm_ibmvtpm_resume(struct device *dev) | |
| 165 | +{ | |
| 166 | + struct tpm_chip *chip = dev_get_drvdata(dev); | |
| 167 | + struct ibmvtpm_dev *ibmvtpm = dev_get_drvdata(&chip->dev); | |
| 168 | + int rc = 0; | |
| 169 | + | |
| 170 | + do { | |
| 171 | + if (rc) | |
| 172 | + msleep(100); | |
| 173 | + rc = plpar_hcall_norets(H_ENABLE_CRQ, | |
| 174 | + ibmvtpm->vdev->unit_address); | |
| 175 | + } while (rc == H_IN_PROGRESS || rc == H_BUSY || H_IS_LONG_BUSY(rc)); | |
| 176 | + | |
| 177 | + if (rc) { | |
| 178 | + dev_err(dev, "Error enabling ibmvtpm rc=%d\n", rc); | |
| 179 | + return rc; | |
| 180 | + } | |
| 181 | + | |
| 182 | + rc = vio_enable_interrupts(ibmvtpm->vdev); | |
| 183 | + if (rc) { | |
| 184 | + dev_err(dev, "Error vio_enable_interrupts rc=%d\n", rc); | |
| 185 | + return rc; | |
| 186 | + } | |
| 187 | + | |
| 188 | + rc = ibmvtpm_crq_send_init(ibmvtpm); | |
| 189 | + if (rc) | |
| 190 | + dev_err(dev, "Error send_init rc=%d\n", rc); | |
| 191 | + | |
| 192 | + return rc; | |
| 193 | +} | |
| 194 | + | |
| 137 | 195 | /** |
| 138 | 196 | * tpm_ibmvtpm_send() - Send a TPM command |
| 139 | 197 | * @chip: tpm chip struct |
| @@ -147,6 +205,7 @@ static int tpm_ibmvtpm_recv(struct tpm_chip *chip, u8 *buf, size_t count) · 7 unmodified lines | ||
| 147 | 205 | static int tpm_ibmvtpm_send(struct tpm_chip *chip, u8 *buf, size_t count) |
| 148 | 206 | { |
| 149 | 207 | struct ibmvtpm_dev *ibmvtpm = dev_get_drvdata(&chip->dev); |
| 208 | + bool retry = true; | |
| 150 | 209 | int rc, sig; |
| 151 | 210 | |
| 152 | 211 | if (!ibmvtpm->rtce_buf) { |
| @@ -180,18 +239,27 @@ static int tpm_ibmvtpm_send(struct tpm_chip *chip, u8 *buf, size_t count) · 27 unmodified lines | ||
| 180 | 239 | */ |
| 181 | 240 | ibmvtpm->tpm_processing_cmd = true; |
| 182 | 241 | |
| 242 | +again: | |
| 183 | 243 | rc = ibmvtpm_send_crq(ibmvtpm->vdev, |
| 184 | 244 | IBMVTPM_VALID_CMD, VTPM_TPM_COMMAND, |
| 185 | 245 | count, ibmvtpm->rtce_dma_handle); |
| 186 | 246 | if (rc != H_SUCCESS) { |
| 247 | + /* | |
| 248 | + * H_CLOSED can be returned after LPM resume. Call | |
| 249 | + * tpm_ibmvtpm_resume() to re-enable the CRQ then retry | |
| 250 | + * ibmvtpm_send_crq() once before failing. | |
| 251 | + */ | |
| 252 | + if (rc == H_CLOSED && retry) { | |
| 253 | + tpm_ibmvtpm_resume(ibmvtpm->dev); | |
| 254 | + retry = false; | |
| 255 | + goto again; | |
| 256 | + } | |
| 187 | 257 | dev_err(ibmvtpm->dev, "tpm_ibmvtpm_send failed rc=%d\n", rc); |
| 188 | − rc = 0; | |
| 189 | 258 | ibmvtpm->tpm_processing_cmd = false; |
| 190 | − } else | |
| 191 | − rc = 0; | |
| 259 | + } | |
| 192 | 260 | |
| 193 | 261 | spin_unlock(&ibmvtpm->rtce_lock); |
| 194 | − return rc; | |
| 262 | + return 0; | |
| 195 | 263 | } |
| 196 | 264 | |
| 197 | 265 | static void tpm_ibmvtpm_cancel(struct tpm_chip *chip) |
| @@ -269,26 +337,6 @@ static int ibmvtpm_crq_send_init_complete(struct ibmvtpm_dev *ibmvtpm) · 71 unmodified lines | ||
| 269 | 337 | return rc; |
| 270 | 338 | } |
| 271 | 339 | |
| 272 | −/** | |
| 273 | − * ibmvtpm_crq_send_init - Send a CRQ initialize message | |
| 274 | − * @ibmvtpm: vtpm device struct | |
| 275 | − * | |
| 276 | − * Return: | |
| 277 | − * 0 on success. | |
| 278 | − * Non-zero on failure. | |
| 279 | − */ | |
| 280 | −static int ibmvtpm_crq_send_init(struct ibmvtpm_dev *ibmvtpm) | |
| 281 | −{ | |
| 282 | − int rc; | |
| 283 | − | |
| 284 | − rc = ibmvtpm_send_crq_word(ibmvtpm->vdev, INIT_CRQ_CMD); | |
| 285 | − if (rc != H_SUCCESS) | |
| 286 | − dev_err(ibmvtpm->dev, | |
| 287 | − "ibmvtpm_crq_send_init failed rc=%d\n", rc); | |
| 288 | − | |
| 289 | − return rc; | |
| 290 | −} | |
| 291 | − | |
| 292 | 340 | /** |
| 293 | 341 | * tpm_ibmvtpm_remove - ibm vtpm remove entry point |
| 294 | 342 | * @vdev: vio device struct |
| @@ -401,44 +449,6 @@ static int ibmvtpm_reset_crq(struct ibmvtpm_dev *ibmvtpm) · 106 unmodified lines | ||
| 401 | 449 | ibmvtpm->crq_dma_handle, CRQ_RES_BUF_SIZE); |
| 402 | 450 | } |
| 403 | 451 | |
| 404 | −/** | |
| 405 | − * tpm_ibmvtpm_resume - Resume from suspend | |
| 406 | − * | |
| 407 | − * @dev: device struct | |
| 408 | − * | |
| 409 | − * Return: Always 0. | |
| 410 | − */ | |
| 411 | −static int tpm_ibmvtpm_resume(struct device *dev) | |
| 412 | −{ | |
| 413 | − struct tpm_chip *chip = dev_get_drvdata(dev); | |
| 414 | − struct ibmvtpm_dev *ibmvtpm = dev_get_drvdata(&chip->dev); | |
| 415 | − int rc = 0; | |
| 416 | − | |
| 417 | − do { | |
| 418 | − if (rc) | |
| 419 | − msleep(100); | |
| 420 | − rc = plpar_hcall_norets(H_ENABLE_CRQ, | |
| 421 | − ibmvtpm->vdev->unit_address); | |
| 422 | − } while (rc == H_IN_PROGRESS || rc == H_BUSY || H_IS_LONG_BUSY(rc)); | |
| 423 | − | |
| 424 | − if (rc) { | |
| 425 | − dev_err(dev, "Error enabling ibmvtpm rc=%d\n", rc); | |
| 426 | − return rc; | |
| 427 | − } | |
| 428 | − | |
| 429 | − rc = vio_enable_interrupts(ibmvtpm->vdev); | |
| 430 | − if (rc) { | |
| 431 | − dev_err(dev, "Error vio_enable_interrupts rc=%d\n", rc); | |
| 432 | − return rc; | |
| 433 | − } | |
| 434 | − | |
| 435 | − rc = ibmvtpm_crq_send_init(ibmvtpm); | |
| 436 | − if (rc) | |
| 437 | − dev_err(dev, "Error send_init rc=%d\n", rc); | |
| 438 | − | |
| 439 | − return rc; | |
| 440 | −} | |
| 441 | − | |
| 442 | 452 | static bool tpm_ibmvtpm_req_canceled(struct tpm_chip *chip, u8 status) |
| 443 | 453 | { |
| 444 | 454 | return (status == 0); |
| @@ -433,6 +433,9 @@ static void disable_interrupts(struct tpm_chip *chip) · 432 unmodified lines | ||
| 433 | 433 | u32 intmask; |
| 434 | 434 | int rc; |
| 435 | 435 | |
| 436 | + if (priv->irq == 0) | |
| 437 | + return; | |
| 438 | + | |
| 436 | 439 | rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); |
| 437 | 440 | if (rc < 0) |
| 438 | 441 | intmask = 0; |
| @@ -1062,9 +1065,12 @@ int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq, · 623 unmodified lines | ||
| 1062 | 1065 | if (irq) { |
| 1063 | 1066 | tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED, |
| 1064 | 1067 | irq); |
| 1065 | − if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) | |
| 1068 | + if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) { | |
| 1066 | 1069 | dev_err(&chip->dev, FW_BUG |
| 1067 | 1070 | "TPM interrupt not working, polling instead\n"); |
| 1071 | + | |
| 1072 | + disable_interrupts(chip); | |
| 1073 | + } | |
| 1068 | 1074 | } else { |
| 1069 | 1075 | tpm_tis_probe_irq(chip, intmask); |
| 1070 | 1076 | } |
| @@ -44,6 +44,7 @@ MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses"); · 43 unmodified lines | ||
| 44 | 44 | * @base: base port address of the IIO device |
| 45 | 45 | */ |
| 46 | 46 | struct quad8_iio { |
| 47 | + struct mutex lock; | |
| 47 | 48 | struct counter_device counter; |
| 48 | 49 | unsigned int fck_prescaler[QUAD8_NUM_COUNTERS]; |
| 49 | 50 | unsigned int preset[QUAD8_NUM_COUNTERS]; |
| @@ -123,6 +124,8 @@ static int quad8_read_raw(struct iio_dev *indio_dev, · 73 unmodified lines | ||
| 123 | 124 | /* Borrow XOR Carry effectively doubles count range */ |
| 124 | 125 | *val = (borrow ^ carry) << 24; |
| 125 | 126 | |
| 127 | + mutex_lock(&priv->lock); | |
| 128 | + | |
| 126 | 129 | /* Reset Byte Pointer; transfer Counter to Output Latch */ |
| 127 | 130 | outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_CNTR_OUT, |
| 128 | 131 | base_offset + 1); |
| @@ -130,6 +133,8 @@ static int quad8_read_raw(struct iio_dev *indio_dev, · 1 unmodified line | ||
| 130 | 133 | for (i = 0; i < 3; i++) |
| 131 | 134 | *val |= (unsigned int)inb(base_offset) << (8 * i); |
| 132 | 135 | |
| 136 | + mutex_unlock(&priv->lock); | |
| 137 | + | |
| 133 | 138 | return IIO_VAL_INT; |
| 134 | 139 | case IIO_CHAN_INFO_ENABLE: |
| 135 | 140 | *val = priv->ab_enable[chan->channel]; |
| @@ -160,6 +165,8 @@ static int quad8_write_raw(struct iio_dev *indio_dev, · 24 unmodified lines | ||
| 160 | 165 | if ((unsigned int)val > 0xFFFFFF) |
| 161 | 166 | return -EINVAL; |
| 162 | 167 | |
| 168 | + mutex_lock(&priv->lock); | |
| 169 | + | |
| 163 | 170 | /* Reset Byte Pointer */ |
| 164 | 171 | outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1); |
| 165 | 172 | |
| @@ -183,12 +190,16 @@ static int quad8_write_raw(struct iio_dev *indio_dev, · 17 unmodified lines | ||
| 183 | 190 | /* Reset Error flag */ |
| 184 | 191 | outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_E, base_offset + 1); |
| 185 | 192 | |
| 193 | + mutex_unlock(&priv->lock); | |
| 194 | + | |
| 186 | 195 | return 0; |
| 187 | 196 | case IIO_CHAN_INFO_ENABLE: |
| 188 | 197 | /* only boolean values accepted */ |
| 189 | 198 | if (val < 0 || val > 1) |
| 190 | 199 | return -EINVAL; |
| 191 | 200 | |
| 201 | + mutex_lock(&priv->lock); | |
| 202 | + | |
| 192 | 203 | priv->ab_enable[chan->channel] = val; |
| 193 | 204 | |
| 194 | 205 | ior_cfg = val | priv->preset_enable[chan->channel] << 1; |
| @@ -196,11 +207,18 @@ static int quad8_write_raw(struct iio_dev *indio_dev, · 1 unmodified line | ||
| 196 | 207 | /* Load I/O control configuration */ |
| 197 | 208 | outb(QUAD8_CTR_IOR | ior_cfg, base_offset + 1); |
| 198 | 209 | |
| 210 | + mutex_unlock(&priv->lock); | |
| 211 | + | |
| 199 | 212 | return 0; |
| 200 | 213 | case IIO_CHAN_INFO_SCALE: |
| 214 | + mutex_lock(&priv->lock); | |
| 215 | + | |
| 201 | 216 | /* Quadrature scaling only available in quadrature mode */ |
| 202 | − if (!priv->quadrature_mode[chan->channel] && (val2 || val != 1)) | |
| 217 | + if (!priv->quadrature_mode[chan->channel] && | |
| 218 | + (val2 || val != 1)) { | |
| 219 | + mutex_unlock(&priv->lock); | |
| 203 | 220 | return -EINVAL; |
| 221 | + } | |
| 204 | 222 | |
| 205 | 223 | /* Only three gain states (1, 0.5, 0.25) */ |
| 206 | 224 | if (val == 1 && !val2) |
| @@ -214,11 +232,15 @@ static int quad8_write_raw(struct iio_dev *indio_dev, · 7 unmodified lines | ||
| 214 | 232 | priv->quadrature_scale[chan->channel] = 2; |
| 215 | 233 | break; |
| 216 | 234 | default: |
| 235 | + mutex_unlock(&priv->lock); | |
| 217 | 236 | return -EINVAL; |
| 218 | 237 | } |
| 219 | − else | |
| 238 | + else { | |
| 239 | + mutex_unlock(&priv->lock); | |
| 220 | 240 | return -EINVAL; |
| 241 | + } | |
| 221 | 242 | |
| 243 | + mutex_unlock(&priv->lock); | |
| 222 | 244 | return 0; |
| 223 | 245 | } |
| 224 | 246 | |
| @@ -255,6 +277,8 @@ static ssize_t quad8_write_preset(struct iio_dev *indio_dev, uintptr_t private, · 30 unmodified lines | ||
| 255 | 277 | if (preset > 0xFFFFFF) |
| 256 | 278 | return -EINVAL; |
| 257 | 279 | |
| 280 | + mutex_lock(&priv->lock); | |
| 281 | + | |
| 258 | 282 | priv->preset[chan->channel] = preset; |
| 259 | 283 | |
| 260 | 284 | /* Reset Byte Pointer */ |
| @@ -264,6 +288,8 @@ static ssize_t quad8_write_preset(struct iio_dev *indio_dev, uintptr_t private, · 3 unmodified lines | ||
| 264 | 288 | for (i = 0; i < 3; i++) |
| 265 | 289 | outb(preset >> (8 * i), base_offset); |
| 266 | 290 | |
| 291 | + mutex_unlock(&priv->lock); | |
| 292 | + | |
| 267 | 293 | return len; |
| 268 | 294 | } |
| 269 | 295 | |
| @@ -293,6 +319,8 @@ static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev, · 23 unmodified lines | ||
| 293 | 319 | /* Preset enable is active low in Input/Output Control register */ |
| 294 | 320 | preset_enable = !preset_enable; |
| 295 | 321 | |
| 322 | + mutex_lock(&priv->lock); | |
| 323 | + | |
| 296 | 324 | priv->preset_enable[chan->channel] = preset_enable; |
| 297 | 325 | |
| 298 | 326 | ior_cfg = priv->ab_enable[chan->channel] | |
| @@ -301,6 +329,8 @@ static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev, · 2 unmodified lines | ||
| 301 | 329 | /* Load I/O control configuration to Input / Output Control Register */ |
| 302 | 330 | outb(QUAD8_CTR_IOR | ior_cfg, base_offset); |
| 303 | 331 | |
| 332 | + mutex_unlock(&priv->lock); | |
| 333 | + | |
| 304 | 334 | return len; |
| 305 | 335 | } |
| 306 | 336 | |
| @@ -358,6 +388,8 @@ static int quad8_set_count_mode(struct iio_dev *indio_dev, · 51 unmodified lines | ||
| 358 | 388 | unsigned int mode_cfg = cnt_mode << 1; |
| 359 | 389 | const int base_offset = priv->base + 2 * chan->channel + 1; |
| 360 | 390 | |
| 391 | + mutex_lock(&priv->lock); | |
| 392 | + | |
| 361 | 393 | priv->count_mode[chan->channel] = cnt_mode; |
| 362 | 394 | |
| 363 | 395 | /* Add quadrature mode configuration */ |
| @@ -367,6 +399,8 @@ static int quad8_set_count_mode(struct iio_dev *indio_dev, · 3 unmodified lines | ||
| 367 | 399 | /* Load mode configuration to Counter Mode Register */ |
| 368 | 400 | outb(QUAD8_CTR_CMR | mode_cfg, base_offset); |
| 369 | 401 | |
| 402 | + mutex_unlock(&priv->lock); | |
| 403 | + | |
| 370 | 404 | return 0; |
| 371 | 405 | } |
| 372 | 406 | |
| @@ -394,19 +428,26 @@ static int quad8_set_synchronous_mode(struct iio_dev *indio_dev, · 21 unmodified lines | ||
| 394 | 428 | const struct iio_chan_spec *chan, unsigned int synchronous_mode) |
| 395 | 429 | { |
| 396 | 430 | struct quad8_iio *const priv = iio_priv(indio_dev); |
| 397 | − const unsigned int idr_cfg = synchronous_mode | | |
| 398 | − priv->index_polarity[chan->channel] << 1; | |
| 399 | 431 | const int base_offset = priv->base + 2 * chan->channel + 1; |
| 432 | + unsigned int idr_cfg = synchronous_mode; | |
| 433 | + | |
| 434 | + mutex_lock(&priv->lock); | |
| 435 | + | |
| 436 | + idr_cfg |= priv->index_polarity[chan->channel] << 1; | |
| 400 | 437 | |
| 401 | 438 | /* Index function must be non-synchronous in non-quadrature mode */ |
| 402 | − if (synchronous_mode && !priv->quadrature_mode[chan->channel]) | |
| 439 | + if (synchronous_mode && !priv->quadrature_mode[chan->channel]) { | |
| 440 | + mutex_unlock(&priv->lock); | |
| 403 | 441 | return -EINVAL; |
| 442 | + } | |
| 404 | 443 | |
| 405 | 444 | priv->synchronous_mode[chan->channel] = synchronous_mode; |
| 406 | 445 | |
| 407 | 446 | /* Load Index Control configuration to Index Control Register */ |
| 408 | 447 | outb(QUAD8_CTR_IDR | idr_cfg, base_offset); |
| 409 | 448 | |
| 449 | + mutex_unlock(&priv->lock); | |
| 450 | + | |
| 410 | 451 | return 0; |
| 411 | 452 | } |
| 412 | 453 | |
| @@ -434,8 +475,12 @@ static int quad8_set_quadrature_mode(struct iio_dev *indio_dev, · 21 unmodified lines | ||
| 434 | 475 | const struct iio_chan_spec *chan, unsigned int quadrature_mode) |
| 435 | 476 | { |
| 436 | 477 | struct quad8_iio *const priv = iio_priv(indio_dev); |
| 437 | − unsigned int mode_cfg = priv->count_mode[chan->channel] << 1; | |
| 438 | 478 | const int base_offset = priv->base + 2 * chan->channel + 1; |
| 479 | + unsigned int mode_cfg; | |
| 480 | + | |
| 481 | + mutex_lock(&priv->lock); | |
| 482 | + | |
| 483 | + mode_cfg = priv->count_mode[chan->channel] << 1; | |
| 439 | 484 | |
| 440 | 485 | if (quadrature_mode) |
| 441 | 486 | mode_cfg |= (priv->quadrature_scale[chan->channel] + 1) << 3; |
| @@ -453,6 +498,8 @@ static int quad8_set_quadrature_mode(struct iio_dev *indio_dev, · 11 unmodified lines | ||
| 453 | 498 | /* Load mode configuration to Counter Mode Register */ |
| 454 | 499 | outb(QUAD8_CTR_CMR | mode_cfg, base_offset); |
| 455 | 500 | |
| 501 | + mutex_unlock(&priv->lock); | |
| 502 | + | |
| 456 | 503 | return 0; |
| 457 | 504 | } |
| 458 | 505 | |
| @@ -480,15 +527,20 @@ static int quad8_set_index_polarity(struct iio_dev *indio_dev, · 21 unmodified lines | ||
| 480 | 527 | const struct iio_chan_spec *chan, unsigned int index_polarity) |
| 481 | 528 | { |
| 482 | 529 | struct quad8_iio *const priv = iio_priv(indio_dev); |
| 483 | − const unsigned int idr_cfg = priv->synchronous_mode[chan->channel] | | |
| 484 | − index_polarity << 1; | |
| 485 | 530 | const int base_offset = priv->base + 2 * chan->channel + 1; |
| 531 | + unsigned int idr_cfg = index_polarity << 1; | |
| 532 | + | |
| 533 | + mutex_lock(&priv->lock); | |
| 534 | + | |
| 535 | + idr_cfg |= priv->synchronous_mode[chan->channel]; | |
| 486 | 536 | |
| 487 | 537 | priv->index_polarity[chan->channel] = index_polarity; |
| 488 | 538 | |
| 489 | 539 | /* Load Index Control configuration to Index Control Register */ |
| 490 | 540 | outb(QUAD8_CTR_IDR | idr_cfg, base_offset); |
| 491 | 541 | |
| 542 | + mutex_unlock(&priv->lock); | |
| 543 | + | |
| 492 | 544 | return 0; |
| 493 | 545 | } |
| 494 | 546 | |
| @@ -589,7 +641,7 @@ static int quad8_signal_read(struct counter_device *counter, · 94 unmodified lines | ||
| 589 | 641 | static int quad8_count_read(struct counter_device *counter, |
| 590 | 642 | struct counter_count *count, unsigned long *val) |
| 591 | 643 | { |
| 592 | − const struct quad8_iio *const priv = counter->priv; | |
| 644 | + struct quad8_iio *const priv = counter->priv; | |
| 593 | 645 | const int base_offset = priv->base + 2 * count->id; |
| 594 | 646 | unsigned int flags; |
| 595 | 647 | unsigned int borrow; |
| @@ -603,6 +655,8 @@ static int quad8_count_read(struct counter_device *counter, · 7 unmodified lines | ||
| 603 | 655 | /* Borrow XOR Carry effectively doubles count range */ |
| 604 | 656 | *val = (unsigned long)(borrow ^ carry) << 24; |
| 605 | 657 | |
| 658 | + mutex_lock(&priv->lock); | |
| 659 | + | |
| 606 | 660 | /* Reset Byte Pointer; transfer Counter to Output Latch */ |
| 607 | 661 | outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_CNTR_OUT, |
| 608 | 662 | base_offset + 1); |
| @@ -610,13 +664,15 @@ static int quad8_count_read(struct counter_device *counter, · 1 unmodified line | ||
| 610 | 664 | for (i = 0; i < 3; i++) |
| 611 | 665 | *val |= (unsigned long)inb(base_offset) << (8 * i); |
| 612 | 666 | |
| 667 | + mutex_unlock(&priv->lock); | |
| 668 | + | |
| 613 | 669 | return 0; |
| 614 | 670 | } |
| 615 | 671 | |
| 616 | 672 | static int quad8_count_write(struct counter_device *counter, |
| 617 | 673 | struct counter_count *count, unsigned long val) |
| 618 | 674 | { |
| 619 | − const struct quad8_iio *const priv = counter->priv; | |
| 675 | + struct quad8_iio *const priv = counter->priv; | |
| 620 | 676 | const int base_offset = priv->base + 2 * count->id; |
| 621 | 677 | int i; |
| 622 | 678 | |
| @@ -624,6 +680,8 @@ static int quad8_count_write(struct counter_device *counter, · 1 unmodified line | ||
| 624 | 680 | if (val > 0xFFFFFF) |
| 625 | 681 | return -EINVAL; |
| 626 | 682 | |
| 683 | + mutex_lock(&priv->lock); | |
| 684 | + | |
| 627 | 685 | /* Reset Byte Pointer */ |
| 628 | 686 | outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1); |
| 629 | 687 | |
| @@ -647,6 +705,8 @@ static int quad8_count_write(struct counter_device *counter, · 17 unmodified lines | ||
| 647 | 705 | /* Reset Error flag */ |
| 648 | 706 | outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_E, base_offset + 1); |
| 649 | 707 | |
| 708 | + mutex_unlock(&priv->lock); | |
| 709 | + | |
| 650 | 710 | return 0; |
| 651 | 711 | } |
| 652 | 712 | |
| @@ -667,13 +727,13 @@ static enum counter_count_function quad8_count_functions_list[] = { · 14 unmodified lines | ||
| 667 | 727 | static int quad8_function_get(struct counter_device *counter, |
| 668 | 728 | struct counter_count *count, size_t *function) |
| 669 | 729 | { |
| 670 | − const struct quad8_iio *const priv = counter->priv; | |
| 730 | + struct quad8_iio *const priv = counter->priv; | |
| 671 | 731 | const int id = count->id; |
| 672 | − const unsigned int quadrature_mode = priv->quadrature_mode[id]; | |
| 673 | − const unsigned int scale = priv->quadrature_scale[id]; | |
| 674 | 732 | |
| 675 | − if (quadrature_mode) | |
| 676 | − switch (scale) { | |
| 733 | + mutex_lock(&priv->lock); | |
| 734 | + | |
| 735 | + if (priv->quadrature_mode[id]) | |
| 736 | + switch (priv->quadrature_scale[id]) { | |
| 677 | 737 | case 0: |
| 678 | 738 | *function = QUAD8_COUNT_FUNCTION_QUADRATURE_X1; |
| 679 | 739 | break; |
| @@ -687,6 +747,8 @@ static int quad8_function_get(struct counter_device *counter, · 7 unmodified lines | ||
| 687 | 747 | else |
| 688 | 748 | *function = QUAD8_COUNT_FUNCTION_PULSE_DIRECTION; |
| 689 | 749 | |
| 750 | + mutex_unlock(&priv->lock); | |
| 751 | + | |
| 690 | 752 | return 0; |
| 691 | 753 | } |
| 692 | 754 | |
| @@ -697,10 +759,15 @@ static int quad8_function_set(struct counter_device *counter, · 4 unmodified lines | ||
| 697 | 759 | const int id = count->id; |
| 698 | 760 | unsigned int *const quadrature_mode = priv->quadrature_mode + id; |
| 699 | 761 | unsigned int *const scale = priv->quadrature_scale + id; |
| 700 | − unsigned int mode_cfg = priv->count_mode[id] << 1; | |
| 701 | 762 | unsigned int *const synchronous_mode = priv->synchronous_mode + id; |
| 702 | − const unsigned int idr_cfg = priv->index_polarity[id] << 1; | |
| 703 | 763 | const int base_offset = priv->base + 2 * id + 1; |
| 764 | + unsigned int mode_cfg; | |
| 765 | + unsigned int idr_cfg; | |
| 766 | + | |
| 767 | + mutex_lock(&priv->lock); | |
| 768 | + | |
| 769 | + mode_cfg = priv->count_mode[id] << 1; | |
| 770 | + idr_cfg = priv->index_polarity[id] << 1; | |
| 704 | 771 | |
| 705 | 772 | if (function == QUAD8_COUNT_FUNCTION_PULSE_DIRECTION) { |
| 706 | 773 | *quadrature_mode = 0; |
| @@ -736,6 +803,8 @@ static int quad8_function_set(struct counter_device *counter, · 29 unmodified lines | ||
| 736 | 803 | /* Load mode configuration to Counter Mode Register */ |
| 737 | 804 | outb(QUAD8_CTR_CMR | mode_cfg, base_offset); |
| 738 | 805 | |
| 806 | + mutex_unlock(&priv->lock); | |
| 807 | + | |
| 739 | 808 | return 0; |
| 740 | 809 | } |
| 741 | 810 | |
| @@ -852,15 +921,20 @@ static int quad8_index_polarity_set(struct counter_device *counter, · 110 unmodified lines | ||
| 852 | 921 | { |
| 853 | 922 | struct quad8_iio *const priv = counter->priv; |
| 854 | 923 | const size_t channel_id = signal->id - 16; |
| 855 | − const unsigned int idr_cfg = priv->synchronous_mode[channel_id] | | |
| 856 | − index_polarity << 1; | |
| 857 | 924 | const int base_offset = priv->base + 2 * channel_id + 1; |
| 925 | + unsigned int idr_cfg = index_polarity << 1; | |
| 926 | + | |
| 927 | + mutex_lock(&priv->lock); | |
| 928 | + | |
| 929 | + idr_cfg |= priv->synchronous_mode[channel_id]; | |
| 858 | 930 | |
| 859 | 931 | priv->index_polarity[channel_id] = index_polarity; |
| 860 | 932 | |
| 861 | 933 | /* Load Index Control configuration to Index Control Register */ |
| 862 | 934 | outb(QUAD8_CTR_IDR | idr_cfg, base_offset); |
| 863 | 935 | |
| 936 | + mutex_unlock(&priv->lock); | |
| 937 | + | |
| 864 | 938 | return 0; |
| 865 | 939 | } |
| 866 | 940 | |
| @@ -887,19 +961,26 @@ static int quad8_synchronous_mode_set(struct counter_device *counter, · 20 unmodified lines | ||
| 887 | 961 | { |
| 888 | 962 | struct quad8_iio *const priv = counter->priv; |
| 889 | 963 | const size_t channel_id = signal->id - 16; |
| 890 | − const unsigned int idr_cfg = synchronous_mode | | |
| 891 | − priv->index_polarity[channel_id] << 1; | |
| 892 | 964 | const int base_offset = priv->base + 2 * channel_id + 1; |
| 965 | + unsigned int idr_cfg = synchronous_mode; | |
| 966 | + | |
| 967 | + mutex_lock(&priv->lock); | |
| 968 | + | |
| 969 | + idr_cfg |= priv->index_polarity[channel_id] << 1; | |
| 893 | 970 | |
| 894 | 971 | /* Index function must be non-synchronous in non-quadrature mode */ |
| 895 | − if (synchronous_mode && !priv->quadrature_mode[channel_id]) | |
| 972 | + if (synchronous_mode && !priv->quadrature_mode[channel_id]) { | |
| 973 | + mutex_unlock(&priv->lock); | |
| 896 | 974 | return -EINVAL; |
| 975 | + } | |
| 897 | 976 | |
| 898 | 977 | priv->synchronous_mode[channel_id] = synchronous_mode; |
| 899 | 978 | |
| 900 | 979 | /* Load Index Control configuration to Index Control Register */ |
| 901 | 980 | outb(QUAD8_CTR_IDR | idr_cfg, base_offset); |
| 902 | 981 | |
| 982 | + mutex_unlock(&priv->lock); | |
| 983 | + | |
| 903 | 984 | return 0; |
| 904 | 985 | } |
| 905 | 986 | |
| @@ -964,6 +1045,8 @@ static int quad8_count_mode_set(struct counter_device *counter, · 58 unmodified lines | ||
| 964 | 1045 | break; |
| 965 | 1046 | } |
| 966 | 1047 | |
| 1048 | + mutex_lock(&priv->lock); | |
| 1049 | + | |
| 967 | 1050 | priv->count_mode[count->id] = cnt_mode; |
| 968 | 1051 | |
| 969 | 1052 | /* Set count mode configuration value */ |
| @@ -976,6 +1059,8 @@ static int quad8_count_mode_set(struct counter_device *counter, · 6 unmodified lines | ||
| 976 | 1059 | /* Load mode configuration to Counter Mode Register */ |
| 977 | 1060 | outb(QUAD8_CTR_CMR | mode_cfg, base_offset); |
| 978 | 1061 | |
| 1062 | + mutex_unlock(&priv->lock); | |
| 1063 | + | |
| 979 | 1064 | return 0; |
| 980 | 1065 | } |
| 981 | 1066 | |
| @@ -1017,6 +1102,8 @@ static ssize_t quad8_count_enable_write(struct counter_device *counter, · 35 unmodified lines | ||
| 1017 | 1102 | if (err) |
| 1018 | 1103 | return err; |
| 1019 | 1104 | |
| 1105 | + mutex_lock(&priv->lock); | |
| 1106 | + | |
| 1020 | 1107 | priv->ab_enable[count->id] = ab_enable; |
| 1021 | 1108 | |
| 1022 | 1109 | ior_cfg = ab_enable | priv->preset_enable[count->id] << 1; |
| @@ -1024,6 +1111,8 @@ static ssize_t quad8_count_enable_write(struct counter_device *counter, · 1 unmodified line | ||
| 1024 | 1111 | /* Load I/O control configuration */ |
| 1025 | 1112 | outb(QUAD8_CTR_IOR | ior_cfg, base_offset + 1); |
| 1026 | 1113 | |
| 1114 | + mutex_unlock(&priv->lock); | |
| 1115 | + | |
| 1027 | 1116 | return len; |
| 1028 | 1117 | } |
| 1029 | 1118 | |
| @@ -1052,14 +1141,28 @@ static ssize_t quad8_count_preset_read(struct counter_device *counter, · 22 unmodified lines | ||
| 1052 | 1141 | return sprintf(buf, "%u\n", priv->preset[count->id]); |
| 1053 | 1142 | } |
| 1054 | 1143 | |
| 1144 | +static void quad8_preset_register_set(struct quad8_iio *quad8iio, int id, | |
| 1145 | + unsigned int preset) | |
| 1146 | +{ | |
| 1147 | + const unsigned int base_offset = quad8iio->base + 2 * id; | |
| 1148 | + int i; | |
| 1149 | + | |
| 1150 | + quad8iio->preset[id] = preset; | |
| 1151 | + | |
| 1152 | + /* Reset Byte Pointer */ | |
| 1153 | + outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1); | |
| 1154 | + | |
| 1155 | + /* Set Preset Register */ | |
| 1156 | + for (i = 0; i < 3; i++) | |
| 1157 | + outb(preset >> (8 * i), base_offset); | |
| 1158 | +} | |
| 1159 | + | |
| 1055 | 1160 | static ssize_t quad8_count_preset_write(struct counter_device *counter, |
| 1056 | 1161 | struct counter_count *count, void *private, const char *buf, size_t len) |
| 1057 | 1162 | { |
| 1058 | 1163 | struct quad8_iio *const priv = counter->priv; |
| 1059 | − const int base_offset = priv->base + 2 * count->id; | |
| 1060 | 1164 | unsigned int preset; |
| 1061 | 1165 | int ret; |
| 1062 | − int i; | |
| 1063 | 1166 | |
| 1064 | 1167 | ret = kstrtouint(buf, 0, &preset); |
| 1065 | 1168 | if (ret) |
| @@ -1069,14 +1172,11 @@ static ssize_t quad8_count_preset_write(struct counter_device *counter, · 3 unmodified lines | ||
| 1069 | 1172 | if (preset > 0xFFFFFF) |
| 1070 | 1173 | return -EINVAL; |
| 1071 | 1174 | |
| 1072 | − priv->preset[count->id] = preset; | |
| 1175 | + mutex_lock(&priv->lock); | |
| 1073 | 1176 | |
| 1074 | − /* Reset Byte Pointer */ | |
| 1075 | − outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1); | |
| 1177 | + quad8_preset_register_set(priv, count->id, preset); | |
| 1076 | 1178 | |
| 1077 | − /* Set Preset Register */ | |
| 1078 | − for (i = 0; i < 3; i++) | |
| 1079 | − outb(preset >> (8 * i), base_offset); | |
| 1179 | + mutex_unlock(&priv->lock); | |
| 1080 | 1180 | |
| 1081 | 1181 | return len; |
| 1082 | 1182 | } |
| @@ -1084,15 +1184,20 @@ static ssize_t quad8_count_preset_write(struct counter_device *counter, · 1 unmodified line | ||
| 1084 | 1184 | static ssize_t quad8_count_ceiling_read(struct counter_device *counter, |
| 1085 | 1185 | struct counter_count *count, void *private, char *buf) |
| 1086 | 1186 | { |
| 1087 | − const struct quad8_iio *const priv = counter->priv; | |
| 1187 | + struct quad8_iio *const priv = counter->priv; | |
| 1188 | + | |
| 1189 | + mutex_lock(&priv->lock); | |
| 1088 | 1190 | |
| 1089 | 1191 | /* Range Limit and Modulo-N count modes use preset value as ceiling */ |
| 1090 | 1192 | switch (priv->count_mode[count->id]) { |
| 1091 | 1193 | case 1: |
| 1092 | 1194 | case 3: |
| 1093 | − return quad8_count_preset_read(counter, count, private, buf); | |
| 1195 | + mutex_unlock(&priv->lock); | |
| 1196 | + return sprintf(buf, "%u\n", priv->preset[count->id]); | |
| 1094 | 1197 | } |
| 1095 | 1198 | |
| 1199 | + mutex_unlock(&priv->lock); | |
| 1200 | + | |
| 1096 | 1201 | /* By default 0x1FFFFFF (25 bits unsigned) is maximum count */ |
| 1097 | 1202 | return sprintf(buf, "33554431\n"); |
| 1098 | 1203 | } |
| @@ -1101,15 +1206,29 @@ static ssize_t quad8_count_ceiling_write(struct counter_device *counter, · 2 unmodified lines | ||
| 1101 | 1206 | struct counter_count *count, void *private, const char *buf, size_t len) |
| 1102 | 1207 | { |
| 1103 | 1208 | struct quad8_iio *const priv = counter->priv; |
| 1209 | + unsigned int ceiling; | |
| 1210 | + int ret; | |
| 1211 | + | |
| 1212 | + ret = kstrtouint(buf, 0, &ceiling); | |
| 1213 | + if (ret) | |
| 1214 | + return ret; | |
| 1215 | + | |
| 1216 | + /* Only 24-bit values are supported */ | |
| 1217 | + if (ceiling > 0xFFFFFF) | |
| 1218 | + return -EINVAL; | |
| 1219 | + | |
| 1220 | + mutex_lock(&priv->lock); | |
| 1104 | 1221 | |
| 1105 | 1222 | /* Range Limit and Modulo-N count modes use preset value as ceiling */ |
| 1106 | 1223 | switch (priv->count_mode[count->id]) { |
| 1107 | 1224 | case 1: |
| 1108 | 1225 | case 3: |
| 1109 | − return quad8_count_preset_write(counter, count, private, buf, | |
| 1110 | − len); | |
| 1226 | + quad8_preset_register_set(priv, count->id, ceiling); | |
| 1227 | + break; | |
| 1111 | 1228 | } |
| 1112 | 1229 | |
| 1230 | + mutex_unlock(&priv->lock); | |
| 1231 | + | |
| 1113 | 1232 | return len; |
| 1114 | 1233 | } |
| 1115 | 1234 | |
| @@ -1137,6 +1256,8 @@ static ssize_t quad8_count_preset_enable_write(struct counter_device *counter, · 21 unmodified lines | ||
| 1137 | 1256 | /* Preset enable is active low in Input/Output Control register */ |
| 1138 | 1257 | preset_enable = !preset_enable; |
| 1139 | 1258 | |
| 1259 | + mutex_lock(&priv->lock); | |
| 1260 | + | |
| 1140 | 1261 | priv->preset_enable[count->id] = preset_enable; |
| 1141 | 1262 | |
| 1142 | 1263 | ior_cfg = priv->ab_enable[count->id] | (unsigned int)preset_enable << 1; |
| @@ -1144,6 +1265,8 @@ static ssize_t quad8_count_preset_enable_write(struct counter_device *counter, · 1 unmodified line | ||
| 1144 | 1265 | /* Load I/O control configuration to Input / Output Control Register */ |
| 1145 | 1266 | outb(QUAD8_CTR_IOR | ior_cfg, base_offset); |
| 1146 | 1267 | |
| 1268 | + mutex_unlock(&priv->lock); | |
| 1269 | + | |
| 1147 | 1270 | return len; |
| 1148 | 1271 | } |
| 1149 | 1272 | |
| @@ -1429,6 +1552,9 @@ static int quad8_probe(struct device *dev, unsigned int id) · 279 unmodified lines | ||
| 1429 | 1552 | quad8iio->counter.priv = quad8iio; |
| 1430 | 1553 | quad8iio->base = base[id]; |
| 1431 | 1554 | |
| 1555 | + /* Initialize mutex */ | |
| 1556 | + mutex_init(&quad8iio->lock); | |
| 1557 | + | |
| 1432 | 1558 | /* Reset all counters and disable interrupt function */ |
| 1433 | 1559 | outb(QUAD8_CHAN_OP_RESET_COUNTERS, base[id] + QUAD8_REG_CHAN_OP); |
| 1434 | 1560 | /* Set initial configuration for all counters */ |
| @@ -1059,7 +1059,7 @@ static ssize_t store_no_turbo(struct kobject *a, struct kobj_attribute *b, · 1058 unmodified lines | ||
| 1059 | 1059 | |
| 1060 | 1060 | update_turbo_state(); |
| 1061 | 1061 | if (global.turbo_disabled) { |
| 1062 | − pr_warn("Turbo disabled by BIOS or unavailable on processor\n"); | |
| 1062 | + pr_notice_once("Turbo disabled by BIOS or unavailable on processor\n"); | |
| 1063 | 1063 | mutex_unlock(&intel_pstate_limits_lock); |
| 1064 | 1064 | mutex_unlock(&intel_pstate_driver_lock); |
| 1065 | 1065 | return -EPERM; |
| @@ -963,10 +963,12 @@ static void aead_crypt_done(struct device *jrdev, u32 *desc, u32 err, · 962 unmodified lines | ||
| 963 | 963 | struct caam_drv_private_jr *jrp = dev_get_drvdata(jrdev); |
| 964 | 964 | struct aead_edesc *edesc; |
| 965 | 965 | int ecode = 0; |
| 966 | + bool has_bklog; | |
| 966 | 967 | |
| 967 | 968 | dev_dbg(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err); |
| 968 | 969 | |
| 969 | 970 | edesc = rctx->edesc; |
| 971 | + has_bklog = edesc->bklog; | |
| 970 | 972 | |
| 971 | 973 | if (err) |
| 972 | 974 | ecode = caam_jr_strstatus(jrdev, err); |
| @@ -979,7 +981,7 @@ static void aead_crypt_done(struct device *jrdev, u32 *desc, u32 err, · 6 unmodified lines | ||
| 979 | 981 | * If no backlog flag, the completion of the request is done |
| 980 | 982 | * by CAAM, not crypto engine. |
| 981 | 983 | */ |
| 982 | − if (!edesc->bklog) | |
| 984 | + if (!has_bklog) | |
| 983 | 985 | aead_request_complete(req, ecode); |
| 984 | 986 | else |
| 985 | 987 | crypto_finalize_aead_request(jrp->engine, req, ecode); |
| @@ -995,10 +997,12 @@ static void skcipher_crypt_done(struct device *jrdev, u32 *desc, u32 err, · 9 unmodified lines | ||
| 995 | 997 | struct caam_drv_private_jr *jrp = dev_get_drvdata(jrdev); |
| 996 | 998 | int ivsize = crypto_skcipher_ivsize(skcipher); |
| 997 | 999 | int ecode = 0; |
| 1000 | + bool has_bklog; | |
| 998 | 1001 | |
| 999 | 1002 | dev_dbg(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err); |
| 1000 | 1003 | |
| 1001 | 1004 | edesc = rctx->edesc; |
| 1005 | + has_bklog = edesc->bklog; | |
| 1002 | 1006 | if (err) |
| 1003 | 1007 | ecode = caam_jr_strstatus(jrdev, err); |
| 1004 | 1008 | |
| @@ -1028,7 +1032,7 @@ static void skcipher_crypt_done(struct device *jrdev, u32 *desc, u32 err, · 23 unmodified lines | ||
| 1028 | 1032 | * If no backlog flag, the completion of the request is done |
| 1029 | 1033 | * by CAAM, not crypto engine. |
| 1030 | 1034 | */ |
| 1031 | − if (!edesc->bklog) | |
| 1035 | + if (!has_bklog) | |
| 1032 | 1036 | skcipher_request_complete(req, ecode); |
| 1033 | 1037 | else |
| 1034 | 1038 | crypto_finalize_skcipher_request(jrp->engine, req, ecode); |
| @@ -1711,7 +1715,7 @@ static struct skcipher_edesc *skcipher_edesc_alloc(struct skcipher_request *req, · 676 unmodified lines | ||
| 1711 | 1715 | |
| 1712 | 1716 | if (ivsize || mapped_dst_nents > 1) |
| 1713 | 1717 | sg_to_sec4_set_last(edesc->sec4_sg + dst_sg_idx + |
| 1714 | − mapped_dst_nents); | |
| 1718 | + mapped_dst_nents - 1 + !!ivsize); | |
| 1715 | 1719 | |
| 1716 | 1720 | if (sec4_sg_bytes) { |
| 1717 | 1721 | edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg, |
| @@ -583,10 +583,12 @@ static inline void ahash_done_cpy(struct device *jrdev, u32 *desc, u32 err, · 582 unmodified lines | ||
| 583 | 583 | struct caam_hash_state *state = ahash_request_ctx(req); |
| 584 | 584 | struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); |
| 585 | 585 | int ecode = 0; |
| 586 | + bool has_bklog; | |
| 586 | 587 | |
| 587 | 588 | dev_dbg(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err); |
| 588 | 589 | |
| 589 | 590 | edesc = state->edesc; |
| 591 | + has_bklog = edesc->bklog; | |
| 590 | 592 | |
| 591 | 593 | if (err) |
| 592 | 594 | ecode = caam_jr_strstatus(jrdev, err); |
| @@ -603,7 +605,7 @@ static inline void ahash_done_cpy(struct device *jrdev, u32 *desc, u32 err, · 10 unmodified lines | ||
| 603 | 605 | * If no backlog flag, the completion of the request is done |
| 604 | 606 | * by CAAM, not crypto engine. |
| 605 | 607 | */ |
| 606 | − if (!edesc->bklog) | |
| 608 | + if (!has_bklog) | |
| 607 | 609 | req->base.complete(&req->base, ecode); |
| 608 | 610 | else |
| 609 | 611 | crypto_finalize_hash_request(jrp->engine, req, ecode); |
| @@ -632,10 +634,12 @@ static inline void ahash_done_switch(struct device *jrdev, u32 *desc, u32 err, · 22 unmodified lines | ||
| 632 | 634 | struct caam_hash_state *state = ahash_request_ctx(req); |
| 633 | 635 | int digestsize = crypto_ahash_digestsize(ahash); |
| 634 | 636 | int ecode = 0; |
| 637 | + bool has_bklog; | |
| 635 | 638 | |
| 636 | 639 | dev_dbg(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err); |
| 637 | 640 | |
| 638 | 641 | edesc = state->edesc; |
| 642 | + has_bklog = edesc->bklog; | |
| 639 | 643 | if (err) |
| 640 | 644 | ecode = caam_jr_strstatus(jrdev, err); |
| 641 | 645 | |
| @@ -663,7 +667,7 @@ static inline void ahash_done_switch(struct device *jrdev, u32 *desc, u32 err, · 21 unmodified lines | ||
| 663 | 667 | * If no backlog flag, the completion of the request is done |
| 664 | 668 | * by CAAM, not crypto engine. |
| 665 | 669 | */ |
| 666 | − if (!edesc->bklog) | |
| 670 | + if (!has_bklog) | |
| 667 | 671 | req->base.complete(&req->base, ecode); |
| 668 | 672 | else |
| 669 | 673 | crypto_finalize_hash_request(jrp->engine, req, ecode); |
| @@ -121,11 +121,13 @@ static void rsa_pub_done(struct device *dev, u32 *desc, u32 err, void *context) · 120 unmodified lines | ||
| 121 | 121 | struct caam_drv_private_jr *jrp = dev_get_drvdata(dev); |
| 122 | 122 | struct rsa_edesc *edesc; |
| 123 | 123 | int ecode = 0; |
| 124 | + bool has_bklog; | |
| 124 | 125 | |
| 125 | 126 | if (err) |
| 126 | 127 | ecode = caam_jr_strstatus(dev, err); |
| 127 | 128 | |
| 128 | 129 | edesc = req_ctx->edesc; |
| 130 | + has_bklog = edesc->bklog; | |
| 129 | 131 | |
| 130 | 132 | rsa_pub_unmap(dev, edesc, req); |
| 131 | 133 | rsa_io_unmap(dev, edesc, req); |
| @@ -135,7 +137,7 @@ static void rsa_pub_done(struct device *dev, u32 *desc, u32 err, void *context) · 3 unmodified lines | ||
| 135 | 137 | * If no backlog flag, the completion of the request is done |
| 136 | 138 | * by CAAM, not crypto engine. |
| 137 | 139 | */ |
| 138 | − if (!edesc->bklog) | |
| 140 | + if (!has_bklog) | |
| 139 | 141 | akcipher_request_complete(req, ecode); |
| 140 | 142 | else |
| 141 | 143 | crypto_finalize_akcipher_request(jrp->engine, req, ecode); |
| @@ -152,11 +154,13 @@ static void rsa_priv_f_done(struct device *dev, u32 *desc, u32 err, · 10 unmodified lines | ||
| 152 | 154 | struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); |
| 153 | 155 | struct rsa_edesc *edesc; |
| 154 | 156 | int ecode = 0; |
| 157 | + bool has_bklog; | |
| 155 | 158 | |
| 156 | 159 | if (err) |
| 157 | 160 | ecode = caam_jr_strstatus(dev, err); |
| 158 | 161 | |
| 159 | 162 | edesc = req_ctx->edesc; |
| 163 | + has_bklog = edesc->bklog; | |
| 160 | 164 | |
| 161 | 165 | switch (key->priv_form) { |
| 162 | 166 | case FORM1: |
| @@ -176,7 +180,7 @@ static void rsa_priv_f_done(struct device *dev, u32 *desc, u32 err, · 13 unmodified lines | ||
| 176 | 180 | * If no backlog flag, the completion of the request is done |
| 177 | 181 | * by CAAM, not crypto engine. |
| 178 | 182 | */ |
| 179 | − if (!edesc->bklog) | |
| 183 | + if (!has_bklog) | |
| 180 | 184 | akcipher_request_complete(req, ecode); |
| 181 | 185 | else |
| 182 | 186 | crypto_finalize_akcipher_request(jrp->engine, req, ecode); |
| @@ -120,12 +120,10 @@ out: · 119 unmodified lines | ||
| 120 | 120 | static int chcr_ktls_update_connection_state(struct chcr_ktls_info *tx_info, |
| 121 | 121 | int new_state) |
| 122 | 122 | { |
| 123 | − unsigned long flags; | |
| 124 | − | |
| 125 | 123 | /* This function can be called from both rx (interrupt context) and tx |
| 126 | 124 | * queue contexts. |
| 127 | 125 | */ |
| 128 | − spin_lock_irqsave(&tx_info->lock, flags); | |
| 126 | + spin_lock_bh(&tx_info->lock); | |
| 129 | 127 | switch (tx_info->connection_state) { |
| 130 | 128 | case KTLS_CONN_CLOSED: |
| 131 | 129 | tx_info->connection_state = new_state; |
| @@ -169,7 +167,7 @@ static int chcr_ktls_update_connection_state(struct chcr_ktls_info *tx_info, · 37 unmodified lines | ||
| 169 | 167 | pr_err("unknown KTLS connection state\n"); |
| 170 | 168 | break; |
| 171 | 169 | } |
| 172 | − spin_unlock_irqrestore(&tx_info->lock, flags); | |
| 170 | + spin_unlock_bh(&tx_info->lock); | |
| 173 | 171 | |
| 174 | 172 | return tx_info->connection_state; |
| 175 | 173 | } |
| @@ -675,41 +673,14 @@ int chcr_ktls_cpl_set_tcb_rpl(struct adapter *adap, unsigned char *input) · 499 unmodified lines | ||
| 675 | 673 | return 0; |
| 676 | 674 | } |
| 677 | 675 | |
| 678 | −/* | |
| 679 | − * chcr_write_cpl_set_tcb_ulp: update tcb values. | |
| 680 | − * TCB is responsible to create tcp headers, so all the related values | |
| 681 | − * should be correctly updated. | |
| 682 | − * @tx_info - driver specific tls info. | |
| 683 | − * @q - tx queue on which packet is going out. | |
| 684 | − * @tid - TCB identifier. | |
| 685 | − * @pos - current index where should we start writing. | |
| 686 | − * @word - TCB word. | |
| 687 | − * @mask - TCB word related mask. | |
| 688 | − * @val - TCB word related value. | |
| 689 | − * @reply - set 1 if looking for TP response. | |
| 690 | − * return - next position to write. | |
| 691 | − */ | |
| 692 | −static void *chcr_write_cpl_set_tcb_ulp(struct chcr_ktls_info *tx_info, | |
| 693 | − struct sge_eth_txq *q, u32 tid, | |
| 694 | − void *pos, u16 word, u64 mask, | |
| 676 | +static void *__chcr_write_cpl_set_tcb_ulp(struct chcr_ktls_info *tx_info, | |
| 677 | + u32 tid, void *pos, u16 word, u64 mask, | |
| 695 | 678 | u64 val, u32 reply) |
| 696 | 679 | { |
| 697 | 680 | struct cpl_set_tcb_field_core *cpl; |
| 698 | 681 | struct ulptx_idata *idata; |
| 699 | 682 | struct ulp_txpkt *txpkt; |
| 700 | − void *save_pos = NULL; | |
| 701 | − u8 buf[48] = {0}; | |
| 702 | − int left; | |
| 703 | 683 | |
| 704 | − left = (void *)q->q.stat - pos; | |
| 705 | − if (unlikely(left < CHCR_SET_TCB_FIELD_LEN)) { | |
| 706 | − if (!left) { | |
| 707 | − pos = q->q.desc; | |
| 708 | − } else { | |
| 709 | − save_pos = pos; | |
| 710 | − pos = buf; | |
| 711 | − } | |
| 712 | − } | |
| 713 | 684 | /* ULP_TXPKT */ |
| 714 | 685 | txpkt = pos; |
| 715 | 686 | txpkt->cmd_dest = htonl(ULPTX_CMD_V(ULP_TX_PKT) | ULP_TXPKT_DEST_V(0)); |
| @@ -734,18 +705,54 @@ static void *chcr_write_cpl_set_tcb_ulp(struct chcr_ktls_info *tx_info, · 18 unmodified lines | ||
| 734 | 705 | idata = (struct ulptx_idata *)(cpl + 1); |
| 735 | 706 | idata->cmd_more = htonl(ULPTX_CMD_V(ULP_TX_SC_NOOP)); |
| 736 | 707 | idata->len = htonl(0); |
| 708 | + pos = idata + 1; | |
| 737 | 709 | |
| 738 | − if (save_pos) { | |
| 739 | − pos = chcr_copy_to_txd(buf, &q->q, save_pos, | |
| 740 | − CHCR_SET_TCB_FIELD_LEN); | |
| 741 | − } else { | |
| 742 | − /* check again if we are at the end of the queue */ | |
| 743 | − if (left == CHCR_SET_TCB_FIELD_LEN) | |
| 710 | + return pos; | |
| 711 | +} | |
| 712 | + | |
| 713 | + | |
| 714 | +/* | |
| 715 | + * chcr_write_cpl_set_tcb_ulp: update tcb values. | |
| 716 | + * TCB is responsible to create tcp headers, so all the related values | |
| 717 | + * should be correctly updated. | |
| 718 | + * @tx_info - driver specific tls info. | |
| 719 | + * @q - tx queue on which packet is going out. | |
| 720 | + * @tid - TCB identifier. | |
| 721 | + * @pos - current index where should we start writing. | |
| 722 | + * @word - TCB word. | |
| 723 | + * @mask - TCB word related mask. | |
| 724 | + * @val - TCB word related value. | |
| 725 | + * @reply - set 1 if looking for TP response. | |
| 726 | + * return - next position to write. | |
| 727 | + */ | |
| 728 | +static void *chcr_write_cpl_set_tcb_ulp(struct chcr_ktls_info *tx_info, | |
| 729 | + struct sge_eth_txq *q, u32 tid, | |
| 730 | + void *pos, u16 word, u64 mask, | |
| 731 | + u64 val, u32 reply) | |
| 732 | +{ | |
| 733 | + int left = (void *)q->q.stat - pos; | |
| 734 | + | |
| 735 | + if (unlikely(left < CHCR_SET_TCB_FIELD_LEN)) { | |
| 736 | + if (!left) { | |
| 744 | 737 | pos = q->q.desc; |
| 745 | − else | |
| 746 | − pos = idata + 1; | |
| 738 | + } else { | |
| 739 | + u8 buf[48] = {0}; | |
| 740 | + | |
| 741 | + __chcr_write_cpl_set_tcb_ulp(tx_info, tid, buf, word, | |
| 742 | + mask, val, reply); | |
| 743 | + | |
| 744 | + return chcr_copy_to_txd(buf, &q->q, pos, | |
| 745 | + CHCR_SET_TCB_FIELD_LEN); | |
| 746 | + } | |
| 747 | 747 | } |
| 748 | 748 | |
| 749 | + pos = __chcr_write_cpl_set_tcb_ulp(tx_info, tid, pos, word, | |
| 750 | + mask, val, reply); | |
| 751 | + | |
| 752 | + /* check again if we are at the end of the queue */ | |
| 753 | + if (left == CHCR_SET_TCB_FIELD_LEN) | |
| 754 | + pos = q->q.desc; | |
| 755 | + | |
| 749 | 756 | return pos; |
| 750 | 757 | } |
| 751 | 758 | |
| @@ -388,7 +388,8 @@ static long dma_buf_ioctl(struct file *file, · 387 unmodified lines | ||
| 388 | 388 | |
| 389 | 389 | return ret; |
| 390 | 390 | |
| 391 | − case DMA_BUF_SET_NAME: | |
| 391 | + case DMA_BUF_SET_NAME_A: | |
| 392 | + case DMA_BUF_SET_NAME_B: | |
| 392 | 393 | return dma_buf_set_name(dmabuf, (const char __user *)arg); |
| 393 | 394 | |
| 394 | 395 | default: |
| @@ -655,8 +656,8 @@ EXPORT_SYMBOL_GPL(dma_buf_put); · 260 unmodified lines | ||
| 655 | 656 | * calls attach() of dma_buf_ops to allow device-specific attach functionality |
| 656 | 657 | * @dmabuf: [in] buffer to attach device to. |
| 657 | 658 | * @dev: [in] device to be attached. |
| 658 | − * @importer_ops [in] importer operations for the attachment | |
| 659 | − * @importer_priv [in] importer private pointer for the attachment | |
| 659 | + * @importer_ops: [in] importer operations for the attachment | |
| 660 | + * @importer_priv: [in] importer private pointer for the attachment | |
| 660 | 661 | * |
| 661 | 662 | * Returns struct dma_buf_attachment pointer for this attachment. Attachments |
| 662 | 663 | * must be cleaned up by calling dma_buf_detach(). |
| @@ -241,7 +241,8 @@ config FSL_RAID · 240 unmodified lines | ||
| 241 | 241 | |
| 242 | 242 | config HISI_DMA |
| 243 | 243 | tristate "HiSilicon DMA Engine support" |
| 244 | − depends on ARM64 || (COMPILE_TEST && PCI_MSI) | |
| 244 | + depends on ARM64 || COMPILE_TEST | |
| 245 | + depends on PCI_MSI | |
| 245 | 246 | select DMA_ENGINE |
| 246 | 247 | select DMA_VIRTUAL_CHANNELS |
| 247 | 248 | help |
| @@ -232,10 +232,6 @@ static void chan_dev_release(struct device *dev) · 231 unmodified lines | ||
| 232 | 232 | struct dma_chan_dev *chan_dev; |
| 233 | 233 | |
| 234 | 234 | chan_dev = container_of(dev, typeof(*chan_dev), device); |
| 235 | − if (atomic_dec_and_test(chan_dev->idr_ref)) { | |
| 236 | − ida_free(&dma_ida, chan_dev->dev_id); | |
| 237 | − kfree(chan_dev->idr_ref); | |
| 238 | − } | |
| 239 | 235 | kfree(chan_dev); |
| 240 | 236 | } |
| 241 | 237 | |
| @@ -1043,27 +1039,9 @@ static int get_dma_id(struct dma_device *device) · 801 unmodified lines | ||
| 1043 | 1039 | } |
| 1044 | 1040 | |
| 1045 | 1041 | static int __dma_async_device_channel_register(struct dma_device *device, |
| 1046 | − struct dma_chan *chan, | |
| 1047 | − int chan_id) | |
| 1042 | + struct dma_chan *chan) | |
| 1048 | 1043 | { |
| 1049 | 1044 | int rc = 0; |
| 1050 | − int chancnt = device->chancnt; | |
| 1051 | − atomic_t *idr_ref; | |
| 1052 | − struct dma_chan *tchan; | |
| 1053 | − | |
| 1054 | − tchan = list_first_entry_or_null(&device->channels, | |
| 1055 | − struct dma_chan, device_node); | |
| 1056 | − if (!tchan) | |
| 1057 | − return -ENODEV; | |
| 1058 | − | |
| 1059 | − if (tchan->dev) { | |
| 1060 | − idr_ref = tchan->dev->idr_ref; | |
| 1061 | − } else { | |
| 1062 | − idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL); | |
| 1063 | − if (!idr_ref) | |
| 1064 | − return -ENOMEM; | |
| 1065 | − atomic_set(idr_ref, 0); | |
| 1066 | − } | |
| 1067 | 1045 | |
| 1068 | 1046 | chan->local = alloc_percpu(typeof(*chan->local)); |
| 1069 | 1047 | if (!chan->local) |
| @@ -1079,29 +1057,36 @@ static int __dma_async_device_channel_register(struct dma_device *device, · 9 unmodified lines | ||
| 1079 | 1057 | * When the chan_id is a negative value, we are dynamically adding |
| 1080 | 1058 | * the channel. Otherwise we are static enumerating. |
| 1081 | 1059 | */ |
| 1082 | − chan->chan_id = chan_id < 0 ? chancnt : chan_id; | |
| 1060 | + mutex_lock(&device->chan_mutex); | |
| 1061 | + chan->chan_id = ida_alloc(&device->chan_ida, GFP_KERNEL); | |
| 1062 | + mutex_unlock(&device->chan_mutex); | |
| 1063 | + if (chan->chan_id < 0) { | |
| 1064 | + pr_err("%s: unable to alloc ida for chan: %d\n", | |
| 1065 | + __func__, chan->chan_id); | |
| 1066 | + goto err_out; | |
| 1067 | + } | |
| 1068 | + | |
| 1083 | 1069 | chan->dev->device.class = &dma_devclass; |
| 1084 | 1070 | chan->dev->device.parent = device->dev; |
| 1085 | 1071 | chan->dev->chan = chan; |
| 1086 | − chan->dev->idr_ref = idr_ref; | |
| 1087 | 1072 | chan->dev->dev_id = device->dev_id; |
| 1088 | − atomic_inc(idr_ref); | |
| 1089 | 1073 | dev_set_name(&chan->dev->device, "dma%dchan%d", |
| 1090 | 1074 | device->dev_id, chan->chan_id); |
| 1091 | − | |
| 1092 | 1075 | rc = device_register(&chan->dev->device); |
| 1093 | 1076 | if (rc) |
| 1094 | − goto err_out; | |
| 1077 | + goto err_out_ida; | |
| 1095 | 1078 | chan->client_count = 0; |
| 1096 | − device->chancnt = chan->chan_id + 1; | |
| 1079 | + device->chancnt++; | |
| 1097 | 1080 | |
| 1098 | 1081 | return 0; |
| 1099 | 1082 | |
| 1083 | + err_out_ida: | |
| 1084 | + mutex_lock(&device->chan_mutex); | |
| 1085 | + ida_free(&device->chan_ida, chan->chan_id); | |
| 1086 | + mutex_unlock(&device->chan_mutex); | |
| 1100 | 1087 | err_out: |
| 1101 | 1088 | free_percpu(chan->local); |
| 1102 | 1089 | kfree(chan->dev); |
| 1103 | − if (atomic_dec_return(idr_ref) == 0) | |
| 1104 | − kfree(idr_ref); | |
| 1105 | 1090 | return rc; |
| 1106 | 1091 | } |
| 1107 | 1092 | |
| @@ -1110,7 +1095,7 @@ int dma_async_device_channel_register(struct dma_device *device, · 2 unmodified lines | ||
| 1110 | 1095 | { |
| 1111 | 1096 | int rc; |
| 1112 | 1097 | |
| 1113 | − rc = __dma_async_device_channel_register(device, chan, -1); | |
| 1098 | + rc = __dma_async_device_channel_register(device, chan); | |
| 1114 | 1099 | if (rc < 0) |
| 1115 | 1100 | return rc; |
| 1116 | 1101 | |
| @@ -1130,6 +1115,9 @@ static void __dma_async_device_channel_unregister(struct dma_device *device, · 13 unmodified lines | ||
| 1130 | 1115 | device->chancnt--; |
| 1131 | 1116 | chan->dev->chan = NULL; |
| 1132 | 1117 | mutex_unlock(&dma_list_mutex); |
| 1118 | + mutex_lock(&device->chan_mutex); | |
| 1119 | + ida_free(&device->chan_ida, chan->chan_id); | |
| 1120 | + mutex_unlock(&device->chan_mutex); | |
| 1133 | 1121 | device_unregister(&chan->dev->device); |
| 1134 | 1122 | free_percpu(chan->local); |
| 1135 | 1123 | } |
| @@ -1152,7 +1140,7 @@ EXPORT_SYMBOL_GPL(dma_async_device_channel_unregister); · 16 unmodified lines | ||
| 1152 | 1140 | */ |
| 1153 | 1141 | int dma_async_device_register(struct dma_device *device) |
| 1154 | 1142 | { |
| 1155 | − int rc, i = 0; | |
| 1143 | + int rc; | |
| 1156 | 1144 | struct dma_chan* chan; |
| 1157 | 1145 | |
| 1158 | 1146 | if (!device) |
| @@ -1257,9 +1245,12 @@ int dma_async_device_register(struct dma_device *device) · 98 unmodified lines | ||
| 1257 | 1245 | if (rc != 0) |
| 1258 | 1246 | return rc; |
| 1259 | 1247 | |
| 1248 | + mutex_init(&device->chan_mutex); | |
| 1249 | + ida_init(&device->chan_ida); | |
| 1250 | + | |
| 1260 | 1251 | /* represent channels in sysfs. Probably want devs too */ |
| 1261 | 1252 | list_for_each_entry(chan, &device->channels, device_node) { |
| 1262 | − rc = __dma_async_device_channel_register(device, chan, i++); | |
| 1253 | + rc = __dma_async_device_channel_register(device, chan); | |
| 1263 | 1254 | if (rc < 0) |
| 1264 | 1255 | goto err_out; |
| 1265 | 1256 | } |
| @@ -1334,6 +1325,7 @@ void dma_async_device_unregister(struct dma_device *device) · 68 unmodified lines | ||
| 1334 | 1325 | */ |
| 1335 | 1326 | dma_cap_set(DMA_PRIVATE, device->cap_mask); |
| 1336 | 1327 | dma_channel_rebalance(); |
| 1328 | + ida_free(&dma_ida, device->dev_id); | |
| 1337 | 1329 | dma_device_put(device); |
| 1338 | 1330 | mutex_unlock(&dma_list_mutex); |
| 1339 | 1331 | } |
| @@ -240,7 +240,7 @@ static bool is_threaded_test_run(struct dmatest_info *info) · 239 unmodified lines | ||
| 240 | 240 | struct dmatest_thread *thread; |
| 241 | 241 | |
| 242 | 242 | list_for_each_entry(thread, &dtc->threads, node) { |
| 243 | − if (!thread->done) | |
| 243 | + if (!thread->done && !thread->pending) | |
| 244 | 244 | return true; |
| 245 | 245 | } |
| 246 | 246 | } |
| @@ -662,8 +662,8 @@ static int dmatest_func(void *data) · 415 unmodified lines | ||
| 662 | 662 | flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT; |
| 663 | 663 | |
| 664 | 664 | ktime = ktime_get(); |
| 665 | − while (!kthread_should_stop() | |
| 666 | − && !(params->iterations && total_tests >= params->iterations)) { | |
| 665 | + while (!(kthread_should_stop() || | |
| 666 | + (params->iterations && total_tests >= params->iterations))) { | |
| 667 | 667 | struct dma_async_tx_descriptor *tx = NULL; |
| 668 | 668 | struct dmaengine_unmap_data *um; |
| 669 | 669 | dma_addr_t *dsts; |
| @@ -363,6 +363,8 @@ static void mmp_tdma_free_descriptor(struct mmp_tdma_chan *tdmac) · 362 unmodified lines | ||
| 363 | 363 | gen_pool_free(gpool, (unsigned long)tdmac->desc_arr, |
| 364 | 364 | size); |
| 365 | 365 | tdmac->desc_arr = NULL; |
| 366 | + if (tdmac->status == DMA_ERROR) | |
| 367 | + tdmac->status = DMA_COMPLETE; | |
| 366 | 368 | |
| 367 | 369 | return; |
| 368 | 370 | } |
| @@ -443,7 +445,8 @@ static struct dma_async_tx_descriptor *mmp_tdma_prep_dma_cyclic( · 74 unmodified lines | ||
| 443 | 445 | if (!desc) |
| 444 | 446 | goto err_out; |
| 445 | 447 | |
| 446 | − mmp_tdma_config_write(chan, direction, &tdmac->slave_config); | |
| 448 | + if (mmp_tdma_config_write(chan, direction, &tdmac->slave_config)) | |
| 449 | + goto err_out; | |
| 447 | 450 | |
| 448 | 451 | while (buf < buf_len) { |
| 449 | 452 | desc = &tdmac->desc_arr[i]; |
| @@ -865,6 +865,7 @@ static int pch_dma_probe(struct pci_dev *pdev, · 864 unmodified lines | ||
| 865 | 865 | } |
| 866 | 866 | |
| 867 | 867 | pci_set_master(pdev); |
| 868 | + pd->dma.dev = &pdev->dev; | |
| 868 | 869 | |
| 869 | 870 | err = request_irq(pdev->irq, pd_irq, IRQF_SHARED, DRV_NAME, pd); |
| 870 | 871 | if (err) { |
| @@ -880,7 +881,6 @@ static int pch_dma_probe(struct pci_dev *pdev, · 9 unmodified lines | ||
| 880 | 881 | goto err_free_irq; |
| 881 | 882 | } |
| 882 | 883 | |
| 883 | − pd->dma.dev = &pdev->dev; | |
| 884 | 884 | |
| 885 | 885 | INIT_LIST_HEAD(&pd->dma.channels); |
| 886 | 886 | |
| @@ -816,6 +816,13 @@ static bool tegra_dma_eoc_interrupt_deasserted(struct tegra_dma_channel *tdc) · 815 unmodified lines | ||
| 816 | 816 | static void tegra_dma_synchronize(struct dma_chan *dc) |
| 817 | 817 | { |
| 818 | 818 | struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc); |
| 819 | + int err; | |
| 820 | + | |
| 821 | + err = pm_runtime_get_sync(tdc->tdma->dev); | |
| 822 | + if (err < 0) { | |
| 823 | + dev_err(tdc2dev(tdc), "Failed to synchronize DMA: %d\n", err); | |
| 824 | + return; | |
| 825 | + } | |
| 819 | 826 | |
| 820 | 827 | /* |
| 821 | 828 | * CPU, which handles interrupt, could be busy in |
| @@ -825,6 +832,8 @@ static void tegra_dma_synchronize(struct dma_chan *dc) · 3 unmodified lines | ||
| 825 | 832 | wait_event(tdc->wq, tegra_dma_eoc_interrupt_deasserted(tdc)); |
| 826 | 833 | |
| 827 | 834 | tasklet_kill(&tdc->tasklet); |
| 835 | + | |
| 836 | + pm_runtime_put(tdc->tdma->dev); | |
| 828 | 837 | } |
| 829 | 838 | |
| 830 | 839 | static unsigned int tegra_dma_sg_bytes_xferred(struct tegra_dma_channel *tdc, |
| @@ -27,6 +27,7 @@ struct psil_endpoint_config *psil_get_ep_config(u32 thread_id) · 26 unmodified lines | ||
| 27 | 27 | soc_ep_map = &j721e_ep_map; |
| 28 | 28 | } else { |
| 29 | 29 | pr_err("PSIL: No compatible machine found for map\n"); |
| 30 | + mutex_unlock(&ep_map_mutex); | |
| 30 | 31 | return ERR_PTR(-ENOTSUPP); |
| 31 | 32 | } |
| 32 | 33 | pr_debug("%s: Using map for %s\n", __func__, soc_ep_map->name); |
| @@ -1230,16 +1230,16 @@ static enum dma_status xilinx_dma_tx_status(struct dma_chan *dchan, · 1229 unmodified lines | ||
| 1230 | 1230 | return ret; |
| 1231 | 1231 | |
| 1232 | 1232 | spin_lock_irqsave(&chan->lock, flags); |
| 1233 | − | |
| 1234 | − desc = list_last_entry(&chan->active_list, | |
| 1235 | − struct xilinx_dma_tx_descriptor, node); | |
| 1236 | − /* | |
| 1237 | − * VDMA and simple mode do not support residue reporting, so the | |
| 1238 | − * residue field will always be 0. | |
| 1239 | − */ | |
| 1240 | − if (chan->has_sg && chan->xdev->dma_config->dmatype != XDMA_TYPE_VDMA) | |
| 1241 | − residue = xilinx_dma_get_residue(chan, desc); | |
| 1242 | − | |
| 1233 | + if (!list_empty(&chan->active_list)) { | |
| 1234 | + desc = list_last_entry(&chan->active_list, | |
| 1235 | + struct xilinx_dma_tx_descriptor, node); | |
| 1236 | + /* | |
| 1237 | + * VDMA and simple mode do not support residue reporting, so the | |
| 1238 | + * residue field will always be 0. | |
| 1239 | + */ | |
| 1240 | + if (chan->has_sg && chan->xdev->dma_config->dmatype != XDMA_TYPE_VDMA) | |
| 1241 | + residue = xilinx_dma_get_residue(chan, desc); | |
| 1242 | + } | |
| 1243 | 1243 | spin_unlock_irqrestore(&chan->lock, flags); |
| 1244 | 1244 | |
| 1245 | 1245 | dma_set_residue(txstate, residue); |
| @@ -16,7 +16,7 @@ · 15 unmodified lines | ||
| 16 | 16 | int efi_tpm_final_log_size; |
| 17 | 17 | EXPORT_SYMBOL(efi_tpm_final_log_size); |
| 18 | 18 | |
| 19 | −static int tpm2_calc_event_log_size(void *data, int count, void *size_info) | |
| 19 | +static int __init tpm2_calc_event_log_size(void *data, int count, void *size_info) | |
| 20 | 20 | { |
| 21 | 21 | struct tcg_pcr_event2_head *header; |
| 22 | 22 | int event_size, size = 0; |
| @@ -12,7 +12,7 @@ config IMX_DSP · 11 unmodified lines | ||
| 12 | 12 | |
| 13 | 13 | config IMX_SCU |
| 14 | 14 | bool "IMX SCU Protocol driver" |
| 15 | − depends on IMX_MBOX || COMPILE_TEST | |
| 15 | + depends on IMX_MBOX | |
| 16 | 16 | help |
| 17 | 17 | The System Controller Firmware (SCFW) is a low-level system function |
| 18 | 18 | which runs on a dedicated Cortex-M core to provide power, clock, and |
| @@ -24,6 +24,6 @@ config IMX_SCU · 5 unmodified lines | ||
| 24 | 24 | |
| 25 | 25 | config IMX_SCU_PD |
| 26 | 26 | bool "IMX SCU Power Domain driver" |
| 27 | − depends on IMX_SCU || COMPILE_TEST | |
| 27 | + depends on IMX_SCU | |
| 28 | 28 | help |
| 29 | 29 | The System Controller Firmware (SCFW) based power domain driver. |
| @@ -35,7 +35,7 @@ static struct pm_api_info pm_api_list[] = { · 34 unmodified lines | ||
| 35 | 35 | PM_API(PM_QUERY_DATA), |
| 36 | 36 | }; |
| 37 | 37 | |
| 38 | −struct dentry *firmware_debugfs_root; | |
| 38 | +static struct dentry *firmware_debugfs_root; | |
| 39 | 39 | |
| 40 | 40 | /** |
| 41 | 41 | * zynqmp_pm_argument_value() - Extract argument value from a PM-API request |
| @@ -248,11 +248,13 @@ static int cci_pci_sriov_configure(struct pci_dev *pcidev, int num_vfs) · 247 unmodified lines | ||
| 248 | 248 | return ret; |
| 249 | 249 | |
| 250 | 250 | ret = pci_enable_sriov(pcidev, num_vfs); |
| 251 | − if (ret) | |
| 251 | + if (ret) { | |
| 252 | 252 | dfl_fpga_cdev_config_ports_pf(cdev); |
| 253 | + return ret; | |
| 254 | + } | |
| 253 | 255 | } |
| 254 | 256 | |
| 255 | − return ret; | |
| 257 | + return num_vfs; | |
| 256 | 258 | } |
| 257 | 259 | |
| 258 | 260 | static void cci_pci_remove(struct pci_dev *pcidev) |
| @@ -583,7 +583,8 @@ static int zynq_fpga_probe(struct platform_device *pdev) · 582 unmodified lines | ||
| 583 | 583 | |
| 584 | 584 | priv->clk = devm_clk_get(dev, "ref_clk"); |
| 585 | 585 | if (IS_ERR(priv->clk)) { |
| 586 | − dev_err(dev, "input clock not found\n"); | |
| 586 | + if (PTR_ERR(priv->clk) != -EPROBE_DEFER) | |
| 587 | + dev_err(dev, "input clock not found\n"); | |
| 587 | 588 | return PTR_ERR(priv->clk); |
| 588 | 589 | } |
| 589 | 590 | |
| @@ -3372,15 +3372,12 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon) · 3371 unmodified lines | ||
| 3372 | 3372 | } |
| 3373 | 3373 | } |
| 3374 | 3374 | |
| 3375 | − amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE); | |
| 3376 | − amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE); | |
| 3377 | − | |
| 3378 | − amdgpu_amdkfd_suspend(adev, !fbcon); | |
| 3379 | − | |
| 3380 | 3375 | amdgpu_ras_suspend(adev); |
| 3381 | 3376 | |
| 3382 | 3377 | r = amdgpu_device_ip_suspend_phase1(adev); |
| 3383 | 3378 | |
| 3379 | + amdgpu_amdkfd_suspend(adev, !fbcon); | |
| 3380 | + | |
| 3384 | 3381 | /* evict vram memory */ |
| 3385 | 3382 | amdgpu_bo_evict_vram(adev); |
| 3386 | 3383 | |
| @@ -85,9 +85,10 @@ · 84 unmodified lines | ||
| 85 | 85 | * - 3.34.0 - Non-DC can flip correctly between buffers with different pitches |
| 86 | 86 | * - 3.35.0 - Add drm_amdgpu_info_device::tcc_disabled_mask |
| 87 | 87 | * - 3.36.0 - Allow reading more status registers on si/cik |
| 88 | + * - 3.37.0 - L2 is invalidated before SDMA IBs, needed for correctness | |
| 88 | 89 | */ |
| 89 | 90 | #define KMS_DRIVER_MAJOR 3 |
| 90 | −#define KMS_DRIVER_MINOR 36 | |
| 91 | +#define KMS_DRIVER_MINOR 37 | |
| 91 | 92 | #define KMS_DRIVER_PATCHLEVEL 0 |
| 92 | 93 | |
| 93 | 94 | int amdgpu_vram_limit = 0; |
| @@ -73,6 +73,22 @@ · 72 unmodified lines | ||
| 73 | 73 | #define SDMA_OP_AQL_COPY 0 |
| 74 | 74 | #define SDMA_OP_AQL_BARRIER_OR 0 |
| 75 | 75 | |
| 76 | +#define SDMA_GCR_RANGE_IS_PA (1 << 18) | |
| 77 | +#define SDMA_GCR_SEQ(x) (((x) & 0x3) << 16) | |
| 78 | +#define SDMA_GCR_GL2_WB (1 << 15) | |
| 79 | +#define SDMA_GCR_GL2_INV (1 << 14) | |
| 80 | +#define SDMA_GCR_GL2_DISCARD (1 << 13) | |
| 81 | +#define SDMA_GCR_GL2_RANGE(x) (((x) & 0x3) << 11) | |
| 82 | +#define SDMA_GCR_GL2_US (1 << 10) | |
| 83 | +#define SDMA_GCR_GL1_INV (1 << 9) | |
| 84 | +#define SDMA_GCR_GLV_INV (1 << 8) | |
| 85 | +#define SDMA_GCR_GLK_INV (1 << 7) | |
| 86 | +#define SDMA_GCR_GLK_WB (1 << 6) | |
| 87 | +#define SDMA_GCR_GLM_INV (1 << 5) | |
| 88 | +#define SDMA_GCR_GLM_WB (1 << 4) | |
| 89 | +#define SDMA_GCR_GL1_RANGE(x) (((x) & 0x3) << 2) | |
| 90 | +#define SDMA_GCR_GLI_INV(x) (((x) & 0x3) << 0) | |
| 91 | + | |
| 76 | 92 | /*define for op field*/ |
| 77 | 93 | #define SDMA_PKT_HEADER_op_offset 0 |
| 78 | 94 | #define SDMA_PKT_HEADER_op_mask 0x000000FF |
| @@ -382,6 +382,18 @@ static void sdma_v5_0_ring_emit_ib(struct amdgpu_ring *ring, · 381 unmodified lines | ||
| 382 | 382 | unsigned vmid = AMDGPU_JOB_GET_VMID(job); |
| 383 | 383 | uint64_t csa_mc_addr = amdgpu_sdma_get_csa_mc_addr(ring, vmid); |
| 384 | 384 | |
| 385 | + /* Invalidate L2, because if we don't do it, we might get stale cache | |
| 386 | + * lines from previous IBs. | |
| 387 | + */ | |
| 388 | + amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_GCR_REQ)); | |
| 389 | + amdgpu_ring_write(ring, 0); | |
| 390 | + amdgpu_ring_write(ring, (SDMA_GCR_GL2_INV | | |
| 391 | + SDMA_GCR_GL2_WB | | |
| 392 | + SDMA_GCR_GLM_INV | | |
| 393 | + SDMA_GCR_GLM_WB) << 16); | |
| 394 | + amdgpu_ring_write(ring, 0xffffff80); | |
| 395 | + amdgpu_ring_write(ring, 0xffff); | |
| 396 | + | |
| 385 | 397 | /* An IB packet must end on a 8 DW boundary--the next dword |
| 386 | 398 | * must be on a 8-dword boundary. Our IB packet below is 6 |
| 387 | 399 | * dwords long, thus add x number of NOPs, such that, in |
| @@ -1595,7 +1607,7 @@ static const struct amdgpu_ring_funcs sdma_v5_0_ring_funcs = { · 1207 unmodified lines | ||
| 1595 | 1607 | SOC15_FLUSH_GPU_TLB_NUM_WREG * 3 + |
| 1596 | 1608 | SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 6 * 2 + |
| 1597 | 1609 | 10 + 10 + 10, /* sdma_v5_0_ring_emit_fence x3 for user fence, vm fence */ |
| 1598 | − .emit_ib_size = 7 + 6, /* sdma_v5_0_ring_emit_ib */ | |
| 1610 | + .emit_ib_size = 5 + 7 + 6, /* sdma_v5_0_ring_emit_ib */ | |
| 1599 | 1611 | .emit_ib = sdma_v5_0_ring_emit_ib, |
| 1600 | 1612 | .emit_fence = sdma_v5_0_ring_emit_fence, |
| 1601 | 1613 | .emit_pipeline_sync = sdma_v5_0_ring_emit_pipeline_sync, |
| @@ -2008,17 +2008,22 @@ void amdgpu_dm_update_connector_after_detect( · 2007 unmodified lines | ||
| 2008 | 2008 | dc_sink_retain(aconnector->dc_sink); |
| 2009 | 2009 | if (sink->dc_edid.length == 0) { |
| 2010 | 2010 | aconnector->edid = NULL; |
| 2011 | − drm_dp_cec_unset_edid(&aconnector->dm_dp_aux.aux); | |
| 2011 | + if (aconnector->dc_link->aux_mode) { | |
| 2012 | + drm_dp_cec_unset_edid( | |
| 2013 | + &aconnector->dm_dp_aux.aux); | |
| 2014 | + } | |
| 2012 | 2015 | } else { |
| 2013 | 2016 | aconnector->edid = |
| 2014 | − (struct edid *) sink->dc_edid.raw_edid; | |
| 2015 | − | |
| 2017 | + (struct edid *)sink->dc_edid.raw_edid; | |
| 2016 | 2018 | |
| 2017 | 2019 | drm_connector_update_edid_property(connector, |
| 2018 | − aconnector->edid); | |
| 2019 | − drm_dp_cec_set_edid(&aconnector->dm_dp_aux.aux, | |
| 2020 | − aconnector->edid); | |
| 2020 | + aconnector->edid); | |
| 2021 | + | |
| 2022 | + if (aconnector->dc_link->aux_mode) | |
| 2023 | + drm_dp_cec_set_edid(&aconnector->dm_dp_aux.aux, | |
| 2024 | + aconnector->edid); | |
| 2021 | 2025 | } |
| 2026 | + | |
| 2022 | 2027 | amdgpu_dm_update_freesync_caps(connector, aconnector->edid); |
| 2023 | 2028 | update_connector_ext_caps(aconnector); |
| 2024 | 2029 | } else { |
| @@ -3340,7 +3345,8 @@ fill_plane_dcc_attributes(struct amdgpu_device *adev, · 1315 unmodified lines | ||
| 3340 | 3345 | const union dc_tiling_info *tiling_info, |
| 3341 | 3346 | const uint64_t info, |
| 3342 | 3347 | struct dc_plane_dcc_param *dcc, |
| 3343 | − struct dc_plane_address *address) | |
| 3348 | + struct dc_plane_address *address, | |
| 3349 | + bool force_disable_dcc) | |
| 3344 | 3350 | { |
| 3345 | 3351 | struct dc *dc = adev->dm.dc; |
| 3346 | 3352 | struct dc_dcc_surface_param input; |
| @@ -3352,6 +3358,9 @@ fill_plane_dcc_attributes(struct amdgpu_device *adev, · 5 unmodified lines | ||
| 3352 | 3358 | memset(&input, 0, sizeof(input)); |
| 3353 | 3359 | memset(&output, 0, sizeof(output)); |
| 3354 | 3360 | |
| 3361 | + if (force_disable_dcc) | |
| 3362 | + return 0; | |
| 3363 | + | |
| 3355 | 3364 | if (!offset) |
| 3356 | 3365 | return 0; |
| 3357 | 3366 | |
| @@ -3401,7 +3410,8 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev, · 43 unmodified lines | ||
| 3401 | 3410 | union dc_tiling_info *tiling_info, |
| 3402 | 3411 | struct plane_size *plane_size, |
| 3403 | 3412 | struct dc_plane_dcc_param *dcc, |
| 3404 | − struct dc_plane_address *address) | |
| 3413 | + struct dc_plane_address *address, | |
| 3414 | + bool force_disable_dcc) | |
| 3405 | 3415 | { |
| 3406 | 3416 | const struct drm_framebuffer *fb = &afb->base; |
| 3407 | 3417 | int ret; |
| @@ -3507,7 +3517,8 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev, · 99 unmodified lines | ||
| 3507 | 3517 | |
| 3508 | 3518 | ret = fill_plane_dcc_attributes(adev, afb, format, rotation, |
| 3509 | 3519 | plane_size, tiling_info, |
| 3510 | − tiling_flags, dcc, address); | |
| 3520 | + tiling_flags, dcc, address, | |
| 3521 | + force_disable_dcc); | |
| 3511 | 3522 | if (ret) |
| 3512 | 3523 | return ret; |
| 3513 | 3524 | } |
| @@ -3599,7 +3610,8 @@ fill_dc_plane_info_and_addr(struct amdgpu_device *adev, · 85 unmodified lines | ||
| 3599 | 3610 | const struct drm_plane_state *plane_state, |
| 3600 | 3611 | const uint64_t tiling_flags, |
| 3601 | 3612 | struct dc_plane_info *plane_info, |
| 3602 | − struct dc_plane_address *address) | |
| 3613 | + struct dc_plane_address *address, | |
| 3614 | + bool force_disable_dcc) | |
| 3603 | 3615 | { |
| 3604 | 3616 | const struct drm_framebuffer *fb = plane_state->fb; |
| 3605 | 3617 | const struct amdgpu_framebuffer *afb = |
| @@ -3681,7 +3693,8 @@ fill_dc_plane_info_and_addr(struct amdgpu_device *adev, · 75 unmodified lines | ||
| 3681 | 3693 | plane_info->rotation, tiling_flags, |
| 3682 | 3694 | &plane_info->tiling_info, |
| 3683 | 3695 | &plane_info->plane_size, |
| 3684 | − &plane_info->dcc, address); | |
| 3696 | + &plane_info->dcc, address, | |
| 3697 | + force_disable_dcc); | |
| 3685 | 3698 | if (ret) |
| 3686 | 3699 | return ret; |
| 3687 | 3700 | |
| @@ -3704,6 +3717,7 @@ static int fill_dc_plane_attributes(struct amdgpu_device *adev, · 16 unmodified lines | ||
| 3704 | 3717 | struct dc_plane_info plane_info; |
| 3705 | 3718 | uint64_t tiling_flags; |
| 3706 | 3719 | int ret; |
| 3720 | + bool force_disable_dcc = false; | |
| 3707 | 3721 | |
| 3708 | 3722 | ret = fill_dc_scaling_info(plane_state, &scaling_info); |
| 3709 | 3723 | if (ret) |
| @@ -3718,9 +3732,11 @@ static int fill_dc_plane_attributes(struct amdgpu_device *adev, · 8 unmodified lines | ||
| 3718 | 3732 | if (ret) |
| 3719 | 3733 | return ret; |
| 3720 | 3734 | |
| 3735 | + force_disable_dcc = adev->asic_type == CHIP_RAVEN && adev->in_suspend; | |
| 3721 | 3736 | ret = fill_dc_plane_info_and_addr(adev, plane_state, tiling_flags, |
| 3722 | 3737 | &plane_info, |
| 3723 | − &dc_plane_state->address); | |
| 3738 | + &dc_plane_state->address, | |
| 3739 | + force_disable_dcc); | |
| 3724 | 3740 | if (ret) |
| 3725 | 3741 | return ret; |
| 3726 | 3742 | |
| @@ -4664,6 +4680,7 @@ static void amdgpu_dm_connector_destroy(struct drm_connector *connector) · 937 unmodified lines | ||
| 4664 | 4680 | i2c_del_adapter(&aconnector->i2c->base); |
| 4665 | 4681 | kfree(aconnector->i2c); |
| 4666 | 4682 | } |
| 4683 | + kfree(aconnector->dm_dp_aux.aux.name); | |
| 4667 | 4684 | |
| 4668 | 4685 | kfree(connector); |
| 4669 | 4686 | } |
| @@ -4723,10 +4740,19 @@ amdgpu_dm_connector_atomic_duplicate_state(struct drm_connector *connector) · 53 unmodified lines | ||
| 4723 | 4740 | static int |
| 4724 | 4741 | amdgpu_dm_connector_late_register(struct drm_connector *connector) |
| 4725 | 4742 | { |
| 4726 | −#if defined(CONFIG_DEBUG_FS) | |
| 4727 | 4743 | struct amdgpu_dm_connector *amdgpu_dm_connector = |
| 4728 | 4744 | to_amdgpu_dm_connector(connector); |
| 4745 | + int r; | |
| 4729 | 4746 | |
| 4747 | + if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) || | |
| 4748 | + (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) { | |
| 4749 | + amdgpu_dm_connector->dm_dp_aux.aux.dev = connector->kdev; | |
| 4750 | + r = drm_dp_aux_register(&amdgpu_dm_connector->dm_dp_aux.aux); | |
| 4751 | + if (r) | |
| 4752 | + return r; | |
| 4753 | + } | |
| 4754 | + | |
| 4755 | +#if defined(CONFIG_DEBUG_FS) | |
| 4730 | 4756 | connector_debugfs_init(amdgpu_dm_connector); |
| 4731 | 4757 | #endif |
| 4732 | 4758 | |
| @@ -5332,6 +5358,7 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane, · 599 unmodified lines | ||
| 5332 | 5358 | uint64_t tiling_flags; |
| 5333 | 5359 | uint32_t domain; |
| 5334 | 5360 | int r; |
| 5361 | + bool force_disable_dcc = false; | |
| 5335 | 5362 | |
| 5336 | 5363 | dm_plane_state_old = to_dm_plane_state(plane->state); |
| 5337 | 5364 | dm_plane_state_new = to_dm_plane_state(new_state); |
| @@ -5390,11 +5417,13 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane, · 52 unmodified lines | ||
| 5390 | 5417 | dm_plane_state_old->dc_state != dm_plane_state_new->dc_state) { |
| 5391 | 5418 | struct dc_plane_state *plane_state = dm_plane_state_new->dc_state; |
| 5392 | 5419 | |
| 5420 | + force_disable_dcc = adev->asic_type == CHIP_RAVEN && adev->in_suspend; | |
| 5393 | 5421 | fill_plane_buffer_attributes( |
| 5394 | 5422 | adev, afb, plane_state->format, plane_state->rotation, |
| 5395 | 5423 | tiling_flags, &plane_state->tiling_info, |
| 5396 | 5424 | &plane_state->plane_size, &plane_state->dcc, |
| 5397 | − &plane_state->address); | |
| 5425 | + &plane_state->address, | |
| 5426 | + force_disable_dcc); | |
| 5398 | 5427 | } |
| 5399 | 5428 | |
| 5400 | 5429 | return 0; |
| @@ -6092,7 +6121,7 @@ static int amdgpu_dm_connector_init(struct amdgpu_display_manager *dm, · 691 unmodified lines | ||
| 6092 | 6121 | |
| 6093 | 6122 | if (connector_type == DRM_MODE_CONNECTOR_DisplayPort |
| 6094 | 6123 | || connector_type == DRM_MODE_CONNECTOR_eDP) |
| 6095 | − amdgpu_dm_initialize_dp_connector(dm, aconnector); | |
| 6124 | + amdgpu_dm_initialize_dp_connector(dm, aconnector, link->link_index); | |
| 6096 | 6125 | |
| 6097 | 6126 | out_free: |
| 6098 | 6127 | if (res) { |
| @@ -6666,7 +6695,12 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, · 567 unmodified lines | ||
| 6666 | 6695 | fill_dc_plane_info_and_addr( |
| 6667 | 6696 | dm->adev, new_plane_state, tiling_flags, |
| 6668 | 6697 | &bundle->plane_infos[planes_count], |
| 6669 | − &bundle->flip_addrs[planes_count].address); | |
| 6698 | + &bundle->flip_addrs[planes_count].address, | |
| 6699 | + false); | |
| 6700 | + | |
| 6701 | + DRM_DEBUG_DRIVER("plane: id=%d dcc_en=%d\n", | |
| 6702 | + new_plane_state->plane->index, | |
| 6703 | + bundle->plane_infos[planes_count].dcc.enable); | |
| 6670 | 6704 | |
| 6671 | 6705 | bundle->surface_updates[planes_count].plane_info = |
| 6672 | 6706 | &bundle->plane_infos[planes_count]; |
| @@ -8086,7 +8120,8 @@ dm_determine_update_type_for_commit(struct amdgpu_display_manager *dm, · 1413 unmodified lines | ||
| 8086 | 8120 | ret = fill_dc_plane_info_and_addr( |
| 8087 | 8121 | dm->adev, new_plane_state, tiling_flags, |
| 8088 | 8122 | plane_info, |
| 8089 | − &flip_addr->address); | |
| 8123 | + &flip_addr->address, | |
| 8124 | + false); | |
| 8090 | 8125 | if (ret) |
| 8091 | 8126 | goto cleanup; |
| 8092 | 8127 | |
| @@ -156,16 +156,16 @@ amdgpu_dm_mst_connector_late_register(struct drm_connector *connector) · 155 unmodified lines | ||
| 156 | 156 | to_amdgpu_dm_connector(connector); |
| 157 | 157 | int r; |
| 158 | 158 | |
| 159 | − amdgpu_dm_connector->dm_dp_aux.aux.dev = connector->kdev; | |
| 160 | − r = drm_dp_aux_register(&amdgpu_dm_connector->dm_dp_aux.aux); | |
| 161 | − if (r) | |
| 159 | + r = drm_dp_mst_connector_late_register(connector, | |
| 160 | + amdgpu_dm_connector->port); | |
| 161 | + if (r < 0) | |
| 162 | 162 | return r; |
| 163 | 163 | |
| 164 | 164 | #if defined(CONFIG_DEBUG_FS) |
| 165 | 165 | connector_debugfs_init(amdgpu_dm_connector); |
| 166 | 166 | #endif |
| 167 | 167 | |
| 168 | − return r; | |
| 168 | + return 0; | |
| 169 | 169 | } |
| 170 | 170 | |
| 171 | 171 | static void |
| @@ -472,9 +472,12 @@ static const struct drm_dp_mst_topology_cbs dm_mst_cbs = { · 300 unmodified lines | ||
| 472 | 472 | }; |
| 473 | 473 | |
| 474 | 474 | void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm, |
| 475 | − struct amdgpu_dm_connector *aconnector) | |
| 475 | + struct amdgpu_dm_connector *aconnector, | |
| 476 | + int link_index) | |
| 476 | 477 | { |
| 477 | − aconnector->dm_dp_aux.aux.name = "dmdc"; | |
| 478 | + aconnector->dm_dp_aux.aux.name = | |
| 479 | + kasprintf(GFP_KERNEL, "AMDGPU DM aux hw bus %d", | |
| 480 | + link_index); | |
| 478 | 481 | aconnector->dm_dp_aux.aux.transfer = dm_dp_aux_transfer; |
| 479 | 482 | aconnector->dm_dp_aux.ddc_service = aconnector->dc_link->ddc; |
| 480 | 483 | |
| @@ -32,7 +32,8 @@ struct amdgpu_dm_connector; · 31 unmodified lines | ||
| 32 | 32 | int dm_mst_get_pbn_divider(struct dc_link *link); |
| 33 | 33 | |
| 34 | 34 | void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm, |
| 35 | − struct amdgpu_dm_connector *aconnector); | |
| 35 | + struct amdgpu_dm_connector *aconnector, | |
| 36 | + int link_index); | |
| 36 | 37 | |
| 37 | 38 | #if defined(CONFIG_DRM_AMD_DC_DCN) |
| 38 | 39 | bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state, |
| @@ -834,11 +834,10 @@ static void disable_dangling_plane(struct dc *dc, struct dc_state *context) · 833 unmodified lines | ||
| 834 | 834 | static void wait_for_no_pipes_pending(struct dc *dc, struct dc_state *context) |
| 835 | 835 | { |
| 836 | 836 | int i; |
| 837 | − int count = 0; | |
| 838 | − struct pipe_ctx *pipe; | |
| 839 | 837 | PERF_TRACE(); |
| 840 | 838 | for (i = 0; i < MAX_PIPES; i++) { |
| 841 | − pipe = &context->res_ctx.pipe_ctx[i]; | |
| 839 | + int count = 0; | |
| 840 | + struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; | |
| 842 | 841 | |
| 843 | 842 | if (!pipe->plane_state) |
| 844 | 843 | continue; |
| @@ -2908,6 +2908,12 @@ bool dc_link_handle_hpd_rx_irq(struct dc_link *link, union hpd_irq_data *out_hpd · 2907 unmodified lines | ||
| 2908 | 2908 | sizeof(hpd_irq_dpcd_data), |
| 2909 | 2909 | "Status: "); |
| 2910 | 2910 | |
| 2911 | + for (i = 0; i < MAX_PIPES; i++) { | |
| 2912 | + pipe_ctx = &link->dc->current_state->res_ctx.pipe_ctx[i]; | |
| 2913 | + if (pipe_ctx && pipe_ctx->stream && pipe_ctx->stream->link == link) | |
| 2914 | + link->dc->hwss.blank_stream(pipe_ctx); | |
| 2915 | + } | |
| 2916 | + | |
| 2911 | 2917 | for (i = 0; i < MAX_PIPES; i++) { |
| 2912 | 2918 | pipe_ctx = &link->dc->current_state->res_ctx.pipe_ctx[i]; |
| 2913 | 2919 | if (pipe_ctx && pipe_ctx->stream && pipe_ctx->stream->link == link) |
| @@ -2927,6 +2933,12 @@ bool dc_link_handle_hpd_rx_irq(struct dc_link *link, union hpd_irq_data *out_hpd · 13 unmodified lines | ||
| 2927 | 2933 | if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) |
| 2928 | 2934 | dc_link_reallocate_mst_payload(link); |
| 2929 | 2935 | |
| 2936 | + for (i = 0; i < MAX_PIPES; i++) { | |
| 2937 | + pipe_ctx = &link->dc->current_state->res_ctx.pipe_ctx[i]; | |
| 2938 | + if (pipe_ctx && pipe_ctx->stream && pipe_ctx->stream->link == link) | |
| 2939 | + link->dc->hwss.unblank_stream(pipe_ctx, &previous_link_settings); | |
| 2940 | + } | |
| 2941 | + | |
| 2930 | 2942 | status = false; |
| 2931 | 2943 | if (out_link_loss) |
| 2932 | 2944 | *out_link_loss = true; |
| @@ -4227,6 +4239,21 @@ void dp_set_fec_enable(struct dc_link *link, bool enable) · 1294 unmodified lines | ||
| 4227 | 4239 | void dpcd_set_source_specific_data(struct dc_link *link) |
| 4228 | 4240 | { |
| 4229 | 4241 | const uint32_t post_oui_delay = 30; // 30ms |
| 4242 | + uint8_t dspc = 0; | |
| 4243 | + enum dc_status ret = DC_ERROR_UNEXPECTED; | |
| 4244 | + | |
| 4245 | + ret = core_link_read_dpcd(link, DP_DOWN_STREAM_PORT_COUNT, &dspc, | |
| 4246 | + sizeof(dspc)); | |
| 4247 | + | |
| 4248 | + if (ret != DC_OK) { | |
| 4249 | + DC_LOG_ERROR("Error in DP aux read transaction," | |
| 4250 | + " not writing source specific data\n"); | |
| 4251 | + return; | |
| 4252 | + } | |
| 4253 | + | |
| 4254 | + /* Return if OUI unsupported */ | |
| 4255 | + if (!(dspc & DP_OUI_SUPPORT)) | |
| 4256 | + return; | |
| 4230 | 4257 | |
| 4231 | 4258 | if (!link->dc->vendor_signature.is_valid) { |
| 4232 | 4259 | struct dpcd_amd_signature amd_signature; |
| @@ -231,34 +231,6 @@ struct dc_stream_status *dc_stream_get_status( · 230 unmodified lines | ||
| 231 | 231 | return dc_stream_get_status_from_state(dc->current_state, stream); |
| 232 | 232 | } |
| 233 | 233 | |
| 234 | −static void delay_cursor_until_vupdate(struct pipe_ctx *pipe_ctx, struct dc *dc) | |
| 235 | −{ | |
| 236 | −#if defined(CONFIG_DRM_AMD_DC_DCN) | |
| 237 | − unsigned int vupdate_line; | |
| 238 | − unsigned int lines_to_vupdate, us_to_vupdate, vpos, nvpos; | |
| 239 | − struct dc_stream_state *stream = pipe_ctx->stream; | |
| 240 | − unsigned int us_per_line; | |
| 241 | − | |
| 242 | − if (stream->ctx->asic_id.chip_family == FAMILY_RV && | |
| 243 | − ASICREV_IS_RAVEN(stream->ctx->asic_id.hw_internal_rev)) { | |
| 244 | − | |
| 245 | − vupdate_line = dc->hwss.get_vupdate_offset_from_vsync(pipe_ctx); | |
| 246 | − if (!dc_stream_get_crtc_position(dc, &stream, 1, &vpos, &nvpos)) | |
| 247 | − return; | |
| 248 | − | |
| 249 | − if (vpos >= vupdate_line) | |
| 250 | − return; | |
| 251 | − | |
| 252 | − us_per_line = stream->timing.h_total * 10000 / stream->timing.pix_clk_100hz; | |
| 253 | − lines_to_vupdate = vupdate_line - vpos; | |
| 254 | − us_to_vupdate = lines_to_vupdate * us_per_line; | |
| 255 | − | |
| 256 | − /* 70 us is a conservative estimate of cursor update time*/ | |
| 257 | − if (us_to_vupdate < 70) | |
| 258 | − udelay(us_to_vupdate); | |
| 259 | − } | |
| 260 | −#endif | |
| 261 | −} | |
| 262 | 234 | |
| 263 | 235 | /** |
| 264 | 236 | * dc_stream_set_cursor_attributes() - Update cursor attributes and set cursor surface address |
| @@ -298,9 +270,7 @@ bool dc_stream_set_cursor_attributes( · 33 unmodified lines | ||
| 298 | 270 | |
| 299 | 271 | if (!pipe_to_program) { |
| 300 | 272 | pipe_to_program = pipe_ctx; |
| 301 | − | |
| 302 | − delay_cursor_until_vupdate(pipe_ctx, dc); | |
| 303 | − dc->hwss.pipe_control_lock(dc, pipe_to_program, true); | |
| 273 | + dc->hwss.cursor_lock(dc, pipe_to_program, true); | |
| 304 | 274 | } |
| 305 | 275 | |
| 306 | 276 | dc->hwss.set_cursor_attribute(pipe_ctx); |
| @@ -309,7 +279,7 @@ bool dc_stream_set_cursor_attributes( · 2 unmodified lines | ||
| 309 | 279 | } |
| 310 | 280 | |
| 311 | 281 | if (pipe_to_program) |
| 312 | − dc->hwss.pipe_control_lock(dc, pipe_to_program, false); | |
| 282 | + dc->hwss.cursor_lock(dc, pipe_to_program, false); | |
| 313 | 283 | |
| 314 | 284 | return true; |
| 315 | 285 | } |
| @@ -349,16 +319,14 @@ bool dc_stream_set_cursor_position( · 33 unmodified lines | ||
| 349 | 319 | |
| 350 | 320 | if (!pipe_to_program) { |
| 351 | 321 | pipe_to_program = pipe_ctx; |
| 352 | − | |
| 353 | − delay_cursor_until_vupdate(pipe_ctx, dc); | |
| 354 | − dc->hwss.pipe_control_lock(dc, pipe_to_program, true); | |
| 322 | + dc->hwss.cursor_lock(dc, pipe_to_program, true); | |
| 355 | 323 | } |
| 356 | 324 | |
| 357 | 325 | dc->hwss.set_cursor_position(pipe_ctx); |
| 358 | 326 | } |
| 359 | 327 | |
| 360 | 328 | if (pipe_to_program) |
| 361 | − dc->hwss.pipe_control_lock(dc, pipe_to_program, false); | |
| 329 | + dc->hwss.cursor_lock(dc, pipe_to_program, false); | |
| 362 | 330 | |
| 363 | 331 | return true; |
| 364 | 332 | } |
| @@ -2757,6 +2757,7 @@ static const struct hw_sequencer_funcs dce110_funcs = { · 2756 unmodified lines | ||
| 2757 | 2757 | .disable_plane = dce110_power_down_fe, |
| 2758 | 2758 | .pipe_control_lock = dce_pipe_control_lock, |
| 2759 | 2759 | .interdependent_update_lock = NULL, |
| 2760 | + .cursor_lock = dce_pipe_control_lock, | |
| 2760 | 2761 | .prepare_bandwidth = dce110_prepare_bandwidth, |
| 2761 | 2762 | .optimize_bandwidth = dce110_optimize_bandwidth, |
| 2762 | 2763 | .set_drr = set_drr, |
| @@ -1625,6 +1625,16 @@ void dcn10_pipe_control_lock( · 1624 unmodified lines | ||
| 1625 | 1625 | hws->funcs.verify_allow_pstate_change_high(dc); |
| 1626 | 1626 | } |
| 1627 | 1627 | |
| 1628 | +void dcn10_cursor_lock(struct dc *dc, struct pipe_ctx *pipe, bool lock) | |
| 1629 | +{ | |
| 1630 | + /* cursor lock is per MPCC tree, so only need to lock one pipe per stream */ | |
| 1631 | + if (!pipe || pipe->top_pipe) | |
| 1632 | + return; | |
| 1633 | + | |
| 1634 | + dc->res_pool->mpc->funcs->cursor_lock(dc->res_pool->mpc, | |
| 1635 | + pipe->stream_res.opp->inst, lock); | |
| 1636 | +} | |
| 1637 | + | |
| 1628 | 1638 | static bool wait_for_reset_trigger_to_occur( |
| 1629 | 1639 | struct dc_context *dc_ctx, |
| 1630 | 1640 | struct timing_generator *tg) |
| @@ -49,6 +49,7 @@ void dcn10_pipe_control_lock( · 48 unmodified lines | ||
| 49 | 49 | struct dc *dc, |
| 50 | 50 | struct pipe_ctx *pipe, |
| 51 | 51 | bool lock); |
| 52 | +void dcn10_cursor_lock(struct dc *dc, struct pipe_ctx *pipe, bool lock); | |
| 52 | 53 | void dcn10_blank_pixel_data( |
| 53 | 54 | struct dc *dc, |
| 54 | 55 | struct pipe_ctx *pipe_ctx, |
| @@ -50,6 +50,7 @@ static const struct hw_sequencer_funcs dcn10_funcs = { · 49 unmodified lines | ||
| 50 | 50 | .disable_audio_stream = dce110_disable_audio_stream, |
| 51 | 51 | .disable_plane = dcn10_disable_plane, |
| 52 | 52 | .pipe_control_lock = dcn10_pipe_control_lock, |
| 53 | + .cursor_lock = dcn10_cursor_lock, | |
| 53 | 54 | .interdependent_update_lock = dcn10_lock_all_pipes, |
| 54 | 55 | .prepare_bandwidth = dcn10_prepare_bandwidth, |
| 55 | 56 | .optimize_bandwidth = dcn10_optimize_bandwidth, |
| @@ -223,6 +223,9 @@ struct mpcc *mpc1_insert_plane( · 222 unmodified lines | ||
| 223 | 223 | REG_SET(MPCC_TOP_SEL[mpcc_id], 0, MPCC_TOP_SEL, dpp_id); |
| 224 | 224 | REG_SET(MPCC_OPP_ID[mpcc_id], 0, MPCC_OPP_ID, tree->opp_id); |
| 225 | 225 | |
| 226 | + /* Configure VUPDATE lock set for this MPCC to map to the OPP */ | |
| 227 | + REG_SET(MPCC_UPDATE_LOCK_SEL[mpcc_id], 0, MPCC_UPDATE_LOCK_SEL, tree->opp_id); | |
| 228 | + | |
| 226 | 229 | /* update mpc tree mux setting */ |
| 227 | 230 | if (tree->opp_list == insert_above_mpcc) { |
| 228 | 231 | /* insert the toppest mpcc */ |
| @@ -318,6 +321,7 @@ void mpc1_remove_mpcc( · 89 unmodified lines | ||
| 318 | 321 | REG_SET(MPCC_TOP_SEL[mpcc_id], 0, MPCC_TOP_SEL, 0xf); |
| 319 | 322 | REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf); |
| 320 | 323 | REG_SET(MPCC_OPP_ID[mpcc_id], 0, MPCC_OPP_ID, 0xf); |
| 324 | + REG_SET(MPCC_UPDATE_LOCK_SEL[mpcc_id], 0, MPCC_UPDATE_LOCK_SEL, 0xf); | |
| 321 | 325 | |
| 322 | 326 | /* mark this mpcc as not in use */ |
| 323 | 327 | mpc10->mpcc_in_use_mask &= ~(1 << mpcc_id); |
| @@ -328,6 +332,7 @@ void mpc1_remove_mpcc( · 4 unmodified lines | ||
| 328 | 332 | REG_SET(MPCC_TOP_SEL[mpcc_id], 0, MPCC_TOP_SEL, 0xf); |
| 329 | 333 | REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf); |
| 330 | 334 | REG_SET(MPCC_OPP_ID[mpcc_id], 0, MPCC_OPP_ID, 0xf); |
| 335 | + REG_SET(MPCC_UPDATE_LOCK_SEL[mpcc_id], 0, MPCC_UPDATE_LOCK_SEL, 0xf); | |
| 331 | 336 | } |
| 332 | 337 | } |
| 333 | 338 | |
| @@ -361,6 +366,7 @@ void mpc1_mpc_init(struct mpc *mpc) · 27 unmodified lines | ||
| 361 | 366 | REG_SET(MPCC_TOP_SEL[mpcc_id], 0, MPCC_TOP_SEL, 0xf); |
| 362 | 367 | REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf); |
| 363 | 368 | REG_SET(MPCC_OPP_ID[mpcc_id], 0, MPCC_OPP_ID, 0xf); |
| 369 | + REG_SET(MPCC_UPDATE_LOCK_SEL[mpcc_id], 0, MPCC_UPDATE_LOCK_SEL, 0xf); | |
| 364 | 370 | |
| 365 | 371 | mpc1_init_mpcc(&(mpc->mpcc_array[mpcc_id]), mpcc_id); |
| 366 | 372 | } |
| @@ -381,6 +387,7 @@ void mpc1_mpc_init_single_inst(struct mpc *mpc, unsigned int mpcc_id) · 14 unmodified lines | ||
| 381 | 387 | REG_SET(MPCC_TOP_SEL[mpcc_id], 0, MPCC_TOP_SEL, 0xf); |
| 382 | 388 | REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf); |
| 383 | 389 | REG_SET(MPCC_OPP_ID[mpcc_id], 0, MPCC_OPP_ID, 0xf); |
| 390 | + REG_SET(MPCC_UPDATE_LOCK_SEL[mpcc_id], 0, MPCC_UPDATE_LOCK_SEL, 0xf); | |
| 384 | 391 | |
| 385 | 392 | mpc1_init_mpcc(&(mpc->mpcc_array[mpcc_id]), mpcc_id); |
| 386 | 393 | |
| @@ -453,6 +460,13 @@ void mpc1_read_mpcc_state( · 66 unmodified lines | ||
| 453 | 460 | MPCC_BUSY, &s->busy); |
| 454 | 461 | } |
| 455 | 462 | |
| 463 | +void mpc1_cursor_lock(struct mpc *mpc, int opp_id, bool lock) | |
| 464 | +{ | |
| 465 | + struct dcn10_mpc *mpc10 = TO_DCN10_MPC(mpc); | |
| 466 | + | |
| 467 | + REG_SET(CUR[opp_id], 0, CUR_VUPDATE_LOCK_SET, lock ? 1 : 0); | |
| 468 | +} | |
| 469 | + | |
| 456 | 470 | static const struct mpc_funcs dcn10_mpc_funcs = { |
| 457 | 471 | .read_mpcc_state = mpc1_read_mpcc_state, |
| 458 | 472 | .insert_plane = mpc1_insert_plane, |
| @@ -464,6 +478,7 @@ static const struct mpc_funcs dcn10_mpc_funcs = { · 5 unmodified lines | ||
| 464 | 478 | .assert_mpcc_idle_before_connect = mpc1_assert_mpcc_idle_before_connect, |
| 465 | 479 | .init_mpcc_list_from_hw = mpc1_init_mpcc_list_from_hw, |
| 466 | 480 | .update_blending = mpc1_update_blending, |
| 481 | + .cursor_lock = mpc1_cursor_lock, | |
| 467 | 482 | .set_denorm = NULL, |
| 468 | 483 | .set_denorm_clamp = NULL, |
| 469 | 484 | .set_output_csc = NULL, |
| @@ -39,11 +39,12 @@ · 38 unmodified lines | ||
| 39 | 39 | SRII(MPCC_BG_G_Y, MPCC, inst),\ |
| 40 | 40 | SRII(MPCC_BG_R_CR, MPCC, inst),\ |
| 41 | 41 | SRII(MPCC_BG_B_CB, MPCC, inst),\ |
| 42 | − SRII(MPCC_BG_B_CB, MPCC, inst),\ | |
| 43 | − SRII(MPCC_SM_CONTROL, MPCC, inst) | |
| 42 | + SRII(MPCC_SM_CONTROL, MPCC, inst),\ | |
| 43 | + SRII(MPCC_UPDATE_LOCK_SEL, MPCC, inst) | |
| 44 | 44 | |
| 45 | 45 | #define MPC_OUT_MUX_COMMON_REG_LIST_DCN1_0(inst) \ |
| 46 | − SRII(MUX, MPC_OUT, inst) | |
| 46 | + SRII(MUX, MPC_OUT, inst),\ | |
| 47 | + VUPDATE_SRII(CUR, VUPDATE_LOCK_SET, inst) | |
| 47 | 48 | |
| 48 | 49 | #define MPC_COMMON_REG_VARIABLE_LIST \ |
| 49 | 50 | uint32_t MPCC_TOP_SEL[MAX_MPCC]; \ |
| @@ -55,7 +56,9 @@ · 5 unmodified lines | ||
| 55 | 56 | uint32_t MPCC_BG_R_CR[MAX_MPCC]; \ |
| 56 | 57 | uint32_t MPCC_BG_B_CB[MAX_MPCC]; \ |
| 57 | 58 | uint32_t MPCC_SM_CONTROL[MAX_MPCC]; \ |
| 58 | − uint32_t MUX[MAX_OPP]; | |
| 59 | + uint32_t MUX[MAX_OPP]; \ | |
| 60 | + uint32_t MPCC_UPDATE_LOCK_SEL[MAX_MPCC]; \ | |
| 61 | + uint32_t CUR[MAX_OPP]; | |
| 59 | 62 | |
| 60 | 63 | #define MPC_COMMON_MASK_SH_LIST_DCN1_0(mask_sh)\ |
| 61 | 64 | SF(MPCC0_MPCC_TOP_SEL, MPCC_TOP_SEL, mask_sh),\ |
| @@ -78,7 +81,8 @@ · 16 unmodified lines | ||
| 78 | 81 | SF(MPCC0_MPCC_SM_CONTROL, MPCC_SM_FIELD_ALT, mask_sh),\ |
| 79 | 82 | SF(MPCC0_MPCC_SM_CONTROL, MPCC_SM_FORCE_NEXT_FRAME_POL, mask_sh),\ |
| 80 | 83 | SF(MPCC0_MPCC_SM_CONTROL, MPCC_SM_FORCE_NEXT_TOP_POL, mask_sh),\ |
| 81 | − SF(MPC_OUT0_MUX, MPC_OUT_MUX, mask_sh) | |
| 84 | + SF(MPC_OUT0_MUX, MPC_OUT_MUX, mask_sh),\ | |
| 85 | + SF(MPCC0_MPCC_UPDATE_LOCK_SEL, MPCC_UPDATE_LOCK_SEL, mask_sh) | |
| 82 | 86 | |
| 83 | 87 | #define MPC_REG_FIELD_LIST(type) \ |
| 84 | 88 | type MPCC_TOP_SEL;\ |
| @@ -101,7 +105,9 @@ · 16 unmodified lines | ||
| 101 | 105 | type MPCC_SM_FIELD_ALT;\ |
| 102 | 106 | type MPCC_SM_FORCE_NEXT_FRAME_POL;\ |
| 103 | 107 | type MPCC_SM_FORCE_NEXT_TOP_POL;\ |
| 104 | − type MPC_OUT_MUX; | |
| 108 | + type MPC_OUT_MUX;\ | |
| 109 | + type MPCC_UPDATE_LOCK_SEL;\ | |
| 110 | + type CUR_VUPDATE_LOCK_SET; | |
| 105 | 111 | |
| 106 | 112 | struct dcn_mpc_registers { |
| 107 | 113 | MPC_COMMON_REG_VARIABLE_LIST |
| @@ -192,4 +198,6 @@ void mpc1_read_mpcc_state( · 84 unmodified lines | ||
| 192 | 198 | int mpcc_inst, |
| 193 | 199 | struct mpcc_state *s); |
| 194 | 200 | |
| 201 | +void mpc1_cursor_lock(struct mpc *mpc, int opp_id, bool lock); | |
| 202 | + | |
| 195 | 203 | #endif |
| @@ -181,6 +181,14 @@ enum dcn10_clk_src_array_id { · 180 unmodified lines | ||
| 181 | 181 | .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ |
| 182 | 182 | mm ## block ## id ## _ ## reg_name |
| 183 | 183 | |
| 184 | +#define VUPDATE_SRII(reg_name, block, id)\ | |
| 185 | + .reg_name[id] = BASE(mm ## reg_name ## 0 ## _ ## block ## id ## _BASE_IDX) + \ | |
| 186 | + mm ## reg_name ## 0 ## _ ## block ## id | |
| 187 | + | |
| 188 | +/* set field/register/bitfield name */ | |
| 189 | +#define SFRB(field_name, reg_name, bitfield, post_fix)\ | |
| 190 | + .field_name = reg_name ## __ ## bitfield ## post_fix | |
| 191 | + | |
| 184 | 192 | /* NBIO */ |
| 185 | 193 | #define NBIO_BASE_INNER(seg) \ |
| 186 | 194 | NBIF_BASE__INST0_SEG ## seg |
| @@ -419,11 +427,13 @@ static const struct dcn_mpc_registers mpc_regs = { · 232 unmodified lines | ||
| 419 | 427 | }; |
| 420 | 428 | |
| 421 | 429 | static const struct dcn_mpc_shift mpc_shift = { |
| 422 | − MPC_COMMON_MASK_SH_LIST_DCN1_0(__SHIFT) | |
| 430 | + MPC_COMMON_MASK_SH_LIST_DCN1_0(__SHIFT),\ | |
| 431 | + SFRB(CUR_VUPDATE_LOCK_SET, CUR0_VUPDATE_LOCK_SET0, CUR0_VUPDATE_LOCK_SET, __SHIFT) | |
| 423 | 432 | }; |
| 424 | 433 | |
| 425 | 434 | static const struct dcn_mpc_mask mpc_mask = { |
| 426 | − MPC_COMMON_MASK_SH_LIST_DCN1_0(_MASK), | |
| 435 | + MPC_COMMON_MASK_SH_LIST_DCN1_0(_MASK),\ | |
| 436 | + SFRB(CUR_VUPDATE_LOCK_SET, CUR0_VUPDATE_LOCK_SET0, CUR0_VUPDATE_LOCK_SET, _MASK) | |
| 427 | 437 | }; |
| 428 | 438 | |
| 429 | 439 | #define tg_regs(id)\ |
| @@ -2294,7 +2294,8 @@ void dcn20_fpga_init_hw(struct dc *dc) · 2293 unmodified lines | ||
| 2294 | 2294 | |
| 2295 | 2295 | REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, 2); |
| 2296 | 2296 | REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1); |
| 2297 | − REG_WRITE(REFCLK_CNTL, 0); | |
| 2297 | + if (REG(REFCLK_CNTL)) | |
| 2298 | + REG_WRITE(REFCLK_CNTL, 0); | |
| 2298 | 2299 | // |
| 2299 | 2300 | |
| 2300 | 2301 | |
| @@ -52,6 +52,7 @@ static const struct hw_sequencer_funcs dcn20_funcs = { · 51 unmodified lines | ||
| 52 | 52 | .disable_plane = dcn20_disable_plane, |
| 53 | 53 | .pipe_control_lock = dcn20_pipe_control_lock, |
| 54 | 54 | .interdependent_update_lock = dcn10_lock_all_pipes, |
| 55 | + .cursor_lock = dcn10_cursor_lock, | |
| 55 | 56 | .prepare_bandwidth = dcn20_prepare_bandwidth, |
| 56 | 57 | .optimize_bandwidth = dcn20_optimize_bandwidth, |
| 57 | 58 | .update_bandwidth = dcn20_update_bandwidth, |
| @@ -545,6 +545,7 @@ const struct mpc_funcs dcn20_mpc_funcs = { · 544 unmodified lines | ||
| 545 | 545 | .mpc_init = mpc1_mpc_init, |
| 546 | 546 | .mpc_init_single_inst = mpc1_mpc_init_single_inst, |
| 547 | 547 | .update_blending = mpc2_update_blending, |
| 548 | + .cursor_lock = mpc1_cursor_lock, | |
| 548 | 549 | .get_mpcc_for_dpp = mpc2_get_mpcc_for_dpp, |
| 549 | 550 | .wait_for_idle = mpc2_assert_idle_mpcc, |
| 550 | 551 | .assert_mpcc_idle_before_connect = mpc2_assert_mpcc_idle_before_connect, |
| @@ -179,7 +179,8 @@ · 178 unmodified lines | ||
| 179 | 179 | SF(MPC_OUT0_DENORM_CLAMP_G_Y, MPC_OUT_DENORM_CLAMP_MAX_G_Y, mask_sh),\ |
| 180 | 180 | SF(MPC_OUT0_DENORM_CLAMP_G_Y, MPC_OUT_DENORM_CLAMP_MIN_G_Y, mask_sh),\ |
| 181 | 181 | SF(MPC_OUT0_DENORM_CLAMP_B_CB, MPC_OUT_DENORM_CLAMP_MAX_B_CB, mask_sh),\ |
| 182 | − SF(MPC_OUT0_DENORM_CLAMP_B_CB, MPC_OUT_DENORM_CLAMP_MIN_B_CB, mask_sh) | |
| 182 | + SF(MPC_OUT0_DENORM_CLAMP_B_CB, MPC_OUT_DENORM_CLAMP_MIN_B_CB, mask_sh),\ | |
| 183 | + SF(CUR_VUPDATE_LOCK_SET0, CUR_VUPDATE_LOCK_SET, mask_sh) | |
| 183 | 184 | |
| 184 | 185 | /* |
| 185 | 186 | * DCN2 MPC_OCSC debug status register: |
| @@ -508,6 +508,10 @@ enum dcn20_clk_src_array_id { · 507 unmodified lines | ||
| 508 | 508 | .block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ |
| 509 | 509 | mm ## block ## id ## _ ## reg_name |
| 510 | 510 | |
| 511 | +#define VUPDATE_SRII(reg_name, block, id)\ | |
| 512 | + .reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \ | |
| 513 | + mm ## reg_name ## _ ## block ## id | |
| 514 | + | |
| 511 | 515 | /* NBIO */ |
| 512 | 516 | #define NBIO_BASE_INNER(seg) \ |
| 513 | 517 | NBIO_BASE__INST0_SEG ## seg |
| @@ -3064,25 +3068,32 @@ validate_out: · 2550 unmodified lines | ||
| 3064 | 3068 | return out; |
| 3065 | 3069 | } |
| 3066 | 3070 | |
| 3067 | − | |
| 3068 | −bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, | |
| 3069 | − bool fast_validate) | |
| 3071 | +/* | |
| 3072 | + * This must be noinline to ensure anything that deals with FP registers | |
| 3073 | + * is contained within this call; previously our compiling with hard-float | |
| 3074 | + * would result in fp instructions being emitted outside of the boundaries | |
| 3075 | + * of the DC_FP_START/END macros, which makes sense as the compiler has no | |
| 3076 | + * idea about what is wrapped and what is not | |
| 3077 | + * | |
| 3078 | + * This is largely just a workaround to avoid breakage introduced with 5.6, | |
| 3079 | + * ideally all fp-using code should be moved into its own file, only that | |
| 3080 | + * should be compiled with hard-float, and all code exported from there | |
| 3081 | + * should be strictly wrapped with DC_FP_START/END | |
| 3082 | + */ | |
| 3083 | +static noinline bool dcn20_validate_bandwidth_fp(struct dc *dc, | |
| 3084 | + struct dc_state *context, bool fast_validate) | |
| 3070 | 3085 | { |
| 3071 | 3086 | bool voltage_supported = false; |
| 3072 | 3087 | bool full_pstate_supported = false; |
| 3073 | 3088 | bool dummy_pstate_supported = false; |
| 3074 | 3089 | double p_state_latency_us; |
| 3075 | 3090 | |
| 3076 | − DC_FP_START(); | |
| 3077 | 3091 | p_state_latency_us = context->bw_ctx.dml.soc.dram_clock_change_latency_us; |
| 3078 | 3092 | context->bw_ctx.dml.soc.disable_dram_clock_change_vactive_support = |
| 3079 | 3093 | dc->debug.disable_dram_clock_change_vactive_support; |
| 3080 | 3094 | |
| 3081 | 3095 | if (fast_validate) { |
| 3082 | − voltage_supported = dcn20_validate_bandwidth_internal(dc, context, true); | |
| 3083 | − | |
| 3084 | − DC_FP_END(); | |
| 3085 | − return voltage_supported; | |
| 3096 | + return dcn20_validate_bandwidth_internal(dc, context, true); | |
| 3086 | 3097 | } |
| 3087 | 3098 | |
| 3088 | 3099 | // Best case, we support full UCLK switch latency |
| @@ -3111,7 +3122,15 @@ bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, · 22 unmodified lines | ||
| 3111 | 3122 | |
| 3112 | 3123 | restore_dml_state: |
| 3113 | 3124 | context->bw_ctx.dml.soc.dram_clock_change_latency_us = p_state_latency_us; |
| 3125 | + return voltage_supported; | |
| 3126 | +} | |
| 3114 | 3127 | |
| 3128 | +bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, | |
| 3129 | + bool fast_validate) | |
| 3130 | +{ | |
| 3131 | + bool voltage_supported = false; | |
| 3132 | + DC_FP_START(); | |
| 3133 | + voltage_supported = dcn20_validate_bandwidth_fp(dc, context, fast_validate); | |
| 3115 | 3134 | DC_FP_END(); |
| 3116 | 3135 | return voltage_supported; |
| 3117 | 3136 | } |
| @@ -53,6 +53,7 @@ static const struct hw_sequencer_funcs dcn21_funcs = { · 52 unmodified lines | ||
| 53 | 53 | .disable_plane = dcn20_disable_plane, |
| 54 | 54 | .pipe_control_lock = dcn20_pipe_control_lock, |
| 55 | 55 | .interdependent_update_lock = dcn10_lock_all_pipes, |
| 56 | + .cursor_lock = dcn10_cursor_lock, | |
| 56 | 57 | .prepare_bandwidth = dcn20_prepare_bandwidth, |
| 57 | 58 | .optimize_bandwidth = dcn20_optimize_bandwidth, |
| 58 | 59 | .update_bandwidth = dcn20_update_bandwidth, |
| @@ -284,7 +284,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn2_1_soc = { · 283 unmodified lines | ||
| 284 | 284 | .dram_channel_width_bytes = 4, |
| 285 | 285 | .fabric_datapath_to_dcn_data_return_bytes = 32, |
| 286 | 286 | .dcn_downspread_percent = 0.5, |
| 287 | − .downspread_percent = 0.5, | |
| 287 | + .downspread_percent = 0.38, | |
| 288 | 288 | .dram_page_open_time_ns = 50.0, |
| 289 | 289 | .dram_rw_turnaround_time_ns = 17.5, |
| 290 | 290 | .dram_return_buffer_per_channel_bytes = 8192, |
| @@ -340,6 +340,10 @@ struct _vcs_dpi_soc_bounding_box_st dcn2_1_soc = { · 49 unmodified lines | ||
| 340 | 340 | .block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ |
| 341 | 341 | mm ## block ## id ## _ ## reg_name |
| 342 | 342 | |
| 343 | +#define VUPDATE_SRII(reg_name, block, id)\ | |
| 344 | + .reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \ | |
| 345 | + mm ## reg_name ## _ ## block ## id | |
| 346 | + | |
| 343 | 347 | /* NBIO */ |
| 344 | 348 | #define NBIO_BASE_INNER(seg) \ |
| 345 | 349 | NBIF0_BASE__INST0_SEG ## seg |
| @@ -1374,64 +1378,49 @@ static void update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_param · 1028 unmodified lines | ||
| 1374 | 1378 | { |
| 1375 | 1379 | struct dcn21_resource_pool *pool = TO_DCN21_RES_POOL(dc->res_pool); |
| 1376 | 1380 | struct clk_limit_table *clk_table = &bw_params->clk_table; |
| 1377 | − unsigned int i, j, k; | |
| 1378 | − int closest_clk_lvl; | |
| 1381 | + struct _vcs_dpi_voltage_scaling_st clock_limits[DC__VOLTAGE_STATES]; | |
| 1382 | + unsigned int i, j, closest_clk_lvl; | |
| 1379 | 1383 | |
| 1380 | 1384 | // Default clock levels are used for diags, which may lead to overclocking. |
| 1381 | − if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment) && !IS_DIAG_DC(dc->ctx->dce_environment)) { | |
| 1385 | + if (!IS_DIAG_DC(dc->ctx->dce_environment)) { | |
| 1382 | 1386 | dcn2_1_ip.max_num_otg = pool->base.res_cap->num_timing_generator; |
| 1383 | 1387 | dcn2_1_ip.max_num_dpp = pool->base.pipe_count; |
| 1384 | 1388 | dcn2_1_soc.num_chans = bw_params->num_channels; |
| 1385 | 1389 | |
| 1386 | − /* Vmin: leave lowest DCN clocks, override with dcfclk, fclk, memclk from fuse */ | |
| 1387 | − dcn2_1_soc.clock_limits[0].state = 0; | |
| 1388 | − dcn2_1_soc.clock_limits[0].dcfclk_mhz = clk_table->entries[0].dcfclk_mhz; | |
| 1389 | − dcn2_1_soc.clock_limits[0].fabricclk_mhz = clk_table->entries[0].fclk_mhz; | |
| 1390 | − dcn2_1_soc.clock_limits[0].socclk_mhz = clk_table->entries[0].socclk_mhz; | |
| 1391 | − dcn2_1_soc.clock_limits[0].dram_speed_mts = clk_table->entries[0].memclk_mhz * 2; | |
| 1392 | − | |
| 1393 | − /* | |
| 1394 | − * Other levels: find closest DCN clocks that fit the given clock limit using dcfclk | |
| 1395 | − * as indicator | |
| 1396 | − */ | |
| 1397 | − | |
| 1398 | − closest_clk_lvl = -1; | |
| 1399 | − /* index currently being filled */ | |
| 1400 | − k = 1; | |
| 1401 | − for (i = 1; i < clk_table->num_entries; i++) { | |
| 1402 | − /* loop backwards, skip duplicate state*/ | |
| 1403 | − for (j = dcn2_1_soc.num_states - 1; j >= k; j--) { | |
| 1390 | + ASSERT(clk_table->num_entries); | |
| 1391 | + for (i = 0; i < clk_table->num_entries; i++) { | |
| 1392 | + /* loop backwards*/ | |
| 1393 | + for (closest_clk_lvl = 0, j = dcn2_1_soc.num_states - 1; j >= 0; j--) { | |
| 1404 | 1394 | if ((unsigned int) dcn2_1_soc.clock_limits[j].dcfclk_mhz <= clk_table->entries[i].dcfclk_mhz) { |
| 1405 | 1395 | closest_clk_lvl = j; |
| 1406 | 1396 | break; |
| 1407 | 1397 | } |
| 1408 | 1398 | } |
| 1409 | 1399 | |
| 1410 | − /* if found a lvl that fits, use the DCN clks from it, if not, go to next clk limit*/ | |
| 1411 | − if (closest_clk_lvl != -1) { | |
| 1412 | − dcn2_1_soc.clock_limits[k].state = i; | |
| 1413 | − dcn2_1_soc.clock_limits[k].dcfclk_mhz = clk_table->entries[i].dcfclk_mhz; | |
| 1414 | − dcn2_1_soc.clock_limits[k].fabricclk_mhz = clk_table->entries[i].fclk_mhz; | |
| 1415 | − dcn2_1_soc.clock_limits[k].socclk_mhz = clk_table->entries[i].socclk_mhz; | |
| 1416 | − dcn2_1_soc.clock_limits[k].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2; | |
| 1417 | − | |
| 1418 | − dcn2_1_soc.clock_limits[k].dispclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dispclk_mhz; | |
| 1419 | − dcn2_1_soc.clock_limits[k].dppclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dppclk_mhz; | |
| 1420 | − dcn2_1_soc.clock_limits[k].dram_bw_per_chan_gbps = dcn2_1_soc.clock_limits[closest_clk_lvl].dram_bw_per_chan_gbps; | |
| 1421 | − dcn2_1_soc.clock_limits[k].dscclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dscclk_mhz; | |
| 1422 | − dcn2_1_soc.clock_limits[k].dtbclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; | |
| 1423 | − dcn2_1_soc.clock_limits[k].phyclk_d18_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz; | |
| 1424 | − dcn2_1_soc.clock_limits[k].phyclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_mhz; | |
| 1425 | − k++; | |
| 1426 | − } | |
| 1400 | + clock_limits[i].state = i; | |
| 1401 | + clock_limits[i].dcfclk_mhz = clk_table->entries[i].dcfclk_mhz; | |
| 1402 | + clock_limits[i].fabricclk_mhz = clk_table->entries[i].fclk_mhz; | |
| 1403 | + clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz; | |
| 1404 | + clock_limits[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2; | |
| 1405 | + | |
| 1406 | + clock_limits[i].dispclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dispclk_mhz; | |
| 1407 | + clock_limits[i].dppclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dppclk_mhz; | |
| 1408 | + clock_limits[i].dram_bw_per_chan_gbps = dcn2_1_soc.clock_limits[closest_clk_lvl].dram_bw_per_chan_gbps; | |
| 1409 | + clock_limits[i].dscclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dscclk_mhz; | |
| 1410 | + clock_limits[i].dtbclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; | |
| 1411 | + clock_limits[i].phyclk_d18_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz; | |
| 1412 | + clock_limits[i].phyclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_mhz; | |
| 1413 | + } | |
| 1414 | + for (i = 0; i < clk_table->num_entries; i++) | |
| 1415 | + dcn2_1_soc.clock_limits[i] = clock_limits[i]; | |
| 1416 | + if (clk_table->num_entries) { | |
| 1417 | + dcn2_1_soc.num_states = clk_table->num_entries; | |
| 1418 | + /* duplicate last level */ | |
| 1419 | + dcn2_1_soc.clock_limits[dcn2_1_soc.num_states] = dcn2_1_soc.clock_limits[dcn2_1_soc.num_states - 1]; | |
| 1420 | + dcn2_1_soc.clock_limits[dcn2_1_soc.num_states].state = dcn2_1_soc.num_states; | |
| 1427 | 1421 | } |
| 1428 | − dcn2_1_soc.num_states = k; | |
| 1429 | 1422 | } |
| 1430 | 1423 | |
| 1431 | − /* duplicate last level */ | |
| 1432 | − dcn2_1_soc.clock_limits[dcn2_1_soc.num_states] = dcn2_1_soc.clock_limits[dcn2_1_soc.num_states - 1]; | |
| 1433 | − dcn2_1_soc.clock_limits[dcn2_1_soc.num_states].state = dcn2_1_soc.num_states; | |
| 1434 | − | |
| 1435 | 1424 | dml_init_instance(&dc->dml, &dcn2_1_soc, &dcn2_1_ip, DML_PROJECT_DCN21); |
| 1436 | 1425 | } |
| 1437 | 1426 | |
| @@ -1200,7 +1200,7 @@ static void dml_rq_dlg_get_dlg_params( · 1199 unmodified lines | ||
| 1200 | 1200 | min_hratio_fact_l = 1.0; |
| 1201 | 1201 | min_hratio_fact_c = 1.0; |
| 1202 | 1202 | |
| 1203 | − if (htaps_l <= 1) | |
| 1203 | + if (hratio_l <= 1) | |
| 1204 | 1204 | min_hratio_fact_l = 2.0; |
| 1205 | 1205 | else if (htaps_l <= 6) { |
| 1206 | 1206 | if ((hratio_l * 2.0) > 4.0) |
| @@ -1216,7 +1216,7 @@ static void dml_rq_dlg_get_dlg_params( · 9 unmodified lines | ||
| 1216 | 1216 | |
| 1217 | 1217 | hscale_pixel_rate_l = min_hratio_fact_l * dppclk_freq_in_mhz; |
| 1218 | 1218 | |
| 1219 | − if (htaps_c <= 1) | |
| 1219 | + if (hratio_c <= 1) | |
| 1220 | 1220 | min_hratio_fact_c = 2.0; |
| 1221 | 1221 | else if (htaps_c <= 6) { |
| 1222 | 1222 | if ((hratio_c * 2.0) > 4.0) |
| @@ -1522,8 +1522,8 @@ static void dml_rq_dlg_get_dlg_params( · 299 unmodified lines | ||
| 1522 | 1522 | |
| 1523 | 1523 | disp_dlg_regs->refcyc_per_vm_group_vblank = get_refcyc_per_vm_group_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; |
| 1524 | 1524 | disp_dlg_regs->refcyc_per_vm_group_flip = get_refcyc_per_vm_group_flip(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; |
| 1525 | − disp_dlg_regs->refcyc_per_vm_req_vblank = get_refcyc_per_vm_req_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; | |
| 1526 | − disp_dlg_regs->refcyc_per_vm_req_flip = get_refcyc_per_vm_req_flip(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; | |
| 1525 | + disp_dlg_regs->refcyc_per_vm_req_vblank = get_refcyc_per_vm_req_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz * dml_pow(2, 10); | |
| 1526 | + disp_dlg_regs->refcyc_per_vm_req_flip = get_refcyc_per_vm_req_flip(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz * dml_pow(2, 10); | |
| 1527 | 1527 | |
| 1528 | 1528 | // Clamp to max for now |
| 1529 | 1529 | if (disp_dlg_regs->refcyc_per_vm_group_vblank >= (unsigned int)dml_pow(2, 23)) |
| @@ -210,6 +210,22 @@ struct mpc_funcs { · 209 unmodified lines | ||
| 210 | 210 | struct mpcc_blnd_cfg *blnd_cfg, |
| 211 | 211 | int mpcc_id); |
| 212 | 212 | |
| 213 | + /* | |
| 214 | + * Lock cursor updates for the specified OPP. | |
| 215 | + * OPP defines the set of MPCC that are locked together for cursor. | |
| 216 | + * | |
| 217 | + * Parameters: | |
| 218 | + * [in] mpc - MPC context. | |
| 219 | + * [in] opp_id - The OPP to lock cursor updates on | |
| 220 | + * [in] lock - lock/unlock the OPP | |
| 221 | + * | |
| 222 | + * Return: void | |
| 223 | + */ | |
| 224 | + void (*cursor_lock)( | |
| 225 | + struct mpc *mpc, | |
| 226 | + int opp_id, | |
| 227 | + bool lock); | |
| 228 | + | |
| 213 | 229 | struct mpcc* (*get_mpcc_for_dpp)( |
| 214 | 230 | struct mpc_tree *tree, |
| 215 | 231 | int dpp_id); |
| @@ -86,6 +86,7 @@ struct hw_sequencer_funcs { · 85 unmodified lines | ||
| 86 | 86 | struct dc_state *context, bool lock); |
| 87 | 87 | void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx, |
| 88 | 88 | bool flip_immediate); |
| 89 | + void (*cursor_lock)(struct dc *dc, struct pipe_ctx *pipe, bool lock); | |
| 89 | 90 | |
| 90 | 91 | /* Timing Related */ |
| 91 | 92 | void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes, |
| @@ -108,7 +108,7 @@ · 107 unmodified lines | ||
| 108 | 108 | #define ASSERT(expr) ASSERT_CRITICAL(expr) |
| 109 | 109 | |
| 110 | 110 | #else |
| 111 | −#define ASSERT(expr) WARN_ON(!(expr)) | |
| 111 | +#define ASSERT(expr) WARN_ON_ONCE(!(expr)) | |
| 112 | 112 | #endif |
| 113 | 113 | |
| 114 | 114 | #define BREAK_TO_DEBUGGER() ASSERT(0) |
| @@ -1435,7 +1435,8 @@ static int pp_get_asic_baco_capability(void *handle, bool *cap) · 1434 unmodified lines | ||
| 1435 | 1435 | if (!hwmgr) |
| 1436 | 1436 | return -EINVAL; |
| 1437 | 1437 | |
| 1438 | − if (!hwmgr->pm_en || !hwmgr->hwmgr_func->get_asic_baco_capability) | |
| 1438 | + if (!(hwmgr->not_vf && amdgpu_dpm) || | |
| 1439 | + !hwmgr->hwmgr_func->get_asic_baco_capability) | |
| 1439 | 1440 | return 0; |
| 1440 | 1441 | |
| 1441 | 1442 | mutex_lock(&hwmgr->smu_lock); |
| @@ -1452,8 +1453,7 @@ static int pp_get_asic_baco_state(void *handle, int *state) · 10 unmodified lines | ||
| 1452 | 1453 | if (!hwmgr) |
| 1453 | 1454 | return -EINVAL; |
| 1454 | 1455 | |
| 1455 | − if (!(hwmgr->not_vf && amdgpu_dpm) || | |
| 1456 | − !hwmgr->hwmgr_func->get_asic_baco_state) | |
| 1456 | + if (!hwmgr->pm_en || !hwmgr->hwmgr_func->get_asic_baco_state) | |
| 1457 | 1457 | return 0; |
| 1458 | 1458 | |
| 1459 | 1459 | mutex_lock(&hwmgr->smu_lock); |
| @@ -1470,7 +1470,8 @@ static int pp_set_asic_baco_state(void *handle, int state) · 10 unmodified lines | ||
| 1470 | 1470 | if (!hwmgr) |
| 1471 | 1471 | return -EINVAL; |
| 1472 | 1472 | |
| 1473 | − if (!hwmgr->pm_en || !hwmgr->hwmgr_func->set_asic_baco_state) | |
| 1473 | + if (!(hwmgr->not_vf && amdgpu_dpm) || | |
| 1474 | + !hwmgr->hwmgr_func->set_asic_baco_state) | |
| 1474 | 1475 | return 0; |
| 1475 | 1476 | |
| 1476 | 1477 | mutex_lock(&hwmgr->smu_lock); |
| @@ -984,6 +984,32 @@ static int init_thermal_controller( · 983 unmodified lines | ||
| 984 | 984 | struct pp_hwmgr *hwmgr, |
| 985 | 985 | const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) |
| 986 | 986 | { |
| 987 | + hwmgr->thermal_controller.ucType = | |
| 988 | + powerplay_table->sThermalController.ucType; | |
| 989 | + hwmgr->thermal_controller.ucI2cLine = | |
| 990 | + powerplay_table->sThermalController.ucI2cLine; | |
| 991 | + hwmgr->thermal_controller.ucI2cAddress = | |
| 992 | + powerplay_table->sThermalController.ucI2cAddress; | |
| 993 | + | |
| 994 | + hwmgr->thermal_controller.fanInfo.bNoFan = | |
| 995 | + (0 != (powerplay_table->sThermalController.ucFanParameters & | |
| 996 | + ATOM_PP_FANPARAMETERS_NOFAN)); | |
| 997 | + | |
| 998 | + hwmgr->thermal_controller.fanInfo.ucTachometerPulsesPerRevolution = | |
| 999 | + powerplay_table->sThermalController.ucFanParameters & | |
| 1000 | + ATOM_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK; | |
| 1001 | + | |
| 1002 | + hwmgr->thermal_controller.fanInfo.ulMinRPM | |
| 1003 | + = powerplay_table->sThermalController.ucFanMinRPM * 100UL; | |
| 1004 | + hwmgr->thermal_controller.fanInfo.ulMaxRPM | |
| 1005 | + = powerplay_table->sThermalController.ucFanMaxRPM * 100UL; | |
| 1006 | + | |
| 1007 | + set_hw_cap(hwmgr, | |
| 1008 | + ATOM_PP_THERMALCONTROLLER_NONE != hwmgr->thermal_controller.ucType, | |
| 1009 | + PHM_PlatformCaps_ThermalController); | |
| 1010 | + | |
| 1011 | + hwmgr->thermal_controller.use_hw_fan_control = 1; | |
| 1012 | + | |
| 987 | 1013 | return 0; |
| 988 | 1014 | } |
| 989 | 1015 | |
| @@ -895,12 +895,17 @@ static int renoir_read_sensor(struct smu_context *smu, · 894 unmodified lines | ||
| 895 | 895 | |
| 896 | 896 | static bool renoir_is_dpm_running(struct smu_context *smu) |
| 897 | 897 | { |
| 898 | + struct amdgpu_device *adev = smu->adev; | |
| 899 | + | |
| 898 | 900 | /* |
| 899 | 901 | * Util now, the pmfw hasn't exported the interface of SMU |
| 900 | 902 | * feature mask to APU SKU so just force on all the feature |
| 901 | 903 | * at early initial stage. |
| 902 | 904 | */ |
| 903 | − return true; | |
| 905 | + if (adev->in_suspend) | |
| 906 | + return false; | |
| 907 | + else | |
| 908 | + return true; | |
| 904 | 909 | |
| 905 | 910 | } |
| 906 | 911 | |
| @@ -485,6 +485,9 @@ static int anx6345_get_modes(struct drm_connector *connector) · 484 unmodified lines | ||
| 485 | 485 | |
| 486 | 486 | num_modes += drm_add_edid_modes(connector, anx6345->edid); |
| 487 | 487 | |
| 488 | + /* Driver currently supports only 6bpc */ | |
| 489 | + connector->display_info.bpc = 6; | |
| 490 | + | |
| 488 | 491 | unlock: |
| 489 | 492 | if (power_off) |
| 490 | 493 | anx6345_poweroff(anx6345); |
| @@ -3442,8 +3442,12 @@ static int drm_dp_send_dpcd_write(struct drm_dp_mst_topology_mgr *mgr, · 3441 unmodified lines | ||
| 3442 | 3442 | drm_dp_queue_down_tx(mgr, txmsg); |
| 3443 | 3443 | |
| 3444 | 3444 | ret = drm_dp_mst_wait_tx_reply(mstb, txmsg); |
| 3445 | − if (ret > 0 && txmsg->reply.reply_type == DP_SIDEBAND_REPLY_NAK) | |
| 3446 | − ret = -EIO; | |
| 3445 | + if (ret > 0) { | |
| 3446 | + if (txmsg->reply.reply_type == DP_SIDEBAND_REPLY_NAK) | |
| 3447 | + ret = -EIO; | |
| 3448 | + else | |
| 3449 | + ret = size; | |
| 3450 | + } | |
| 3447 | 3451 | |
| 3448 | 3452 | kfree(txmsg); |
| 3449 | 3453 | fail_put: |
| @@ -4295,6 +4299,7 @@ int drm_dp_atomic_release_vcpi_slots(struct drm_atomic_state *state, · 845 unmodified lines | ||
| 4295 | 4299 | if (pos->vcpi) { |
| 4296 | 4300 | drm_dp_mst_put_port_malloc(port); |
| 4297 | 4301 | pos->vcpi = 0; |
| 4302 | + pos->pbn = 0; | |
| 4298 | 4303 | } |
| 4299 | 4304 | |
| 4300 | 4305 | return 0; |
| @@ -5111,7 +5111,7 @@ static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device *d · 5110 unmodified lines | ||
| 5111 | 5111 | struct drm_display_mode *mode; |
| 5112 | 5112 | unsigned pixel_clock = (timings->pixel_clock[0] | |
| 5113 | 5113 | (timings->pixel_clock[1] << 8) | |
| 5114 | − (timings->pixel_clock[2] << 16)); | |
| 5114 | + (timings->pixel_clock[2] << 16)) + 1; | |
| 5115 | 5115 | unsigned hactive = (timings->hactive[0] | timings->hactive[1] << 8) + 1; |
| 5116 | 5116 | unsigned hblank = (timings->hblank[0] | timings->hblank[1] << 8) + 1; |
| 5117 | 5117 | unsigned hsync = (timings->hsync[0] | (timings->hsync[1] & 0x7f) << 8) + 1; |
| @@ -241,8 +241,12 @@ static int drm_hdcp_request_srm(struct drm_device *drm_dev, · 240 unmodified lines | ||
| 241 | 241 | |
| 242 | 242 | ret = request_firmware_direct(&fw, (const char *)fw_name, |
| 243 | 243 | drm_dev->dev); |
| 244 | − if (ret < 0) | |
| 244 | + if (ret < 0) { | |
| 245 | + *revoked_ksv_cnt = 0; | |
| 246 | + *revoked_ksv_list = NULL; | |
| 247 | + ret = 0; | |
| 245 | 248 | goto exit; |
| 249 | + } | |
| 246 | 250 | |
| 247 | 251 | if (fw->size && fw->data) |
| 248 | 252 | ret = drm_hdcp_srm_update(fw->data, fw->size, revoked_ksv_list, |
| @@ -287,6 +291,8 @@ int drm_hdcp_check_ksvs_revoked(struct drm_device *drm_dev, u8 *ksvs, · 38 unmodified lines | ||
| 287 | 291 | |
| 288 | 292 | ret = drm_hdcp_request_srm(drm_dev, &revoked_ksv_list, |
| 289 | 293 | &revoked_ksv_cnt); |
| 294 | + if (ret) | |
| 295 | + return ret; | |
| 290 | 296 | |
| 291 | 297 | /* revoked_ksv_cnt will be zero when above function failed */ |
| 292 | 298 | for (i = 0; i < revoked_ksv_cnt; i++) |
| @@ -3141,9 +3141,6 @@ static void hsw_ddi_pre_enable_dp(struct intel_encoder *encoder, · 3140 unmodified lines | ||
| 3141 | 3141 | intel_dp_set_link_params(intel_dp, crtc_state->port_clock, |
| 3142 | 3142 | crtc_state->lane_count, is_mst); |
| 3143 | 3143 | |
| 3144 | − intel_dp->regs.dp_tp_ctl = DP_TP_CTL(port); | |
| 3145 | − intel_dp->regs.dp_tp_status = DP_TP_STATUS(port); | |
| 3146 | − | |
| 3147 | 3144 | intel_edp_panel_on(intel_dp); |
| 3148 | 3145 | |
| 3149 | 3146 | intel_ddi_clk_select(encoder, crtc_state); |
| @@ -3848,12 +3845,18 @@ void intel_ddi_get_config(struct intel_encoder *encoder, · 698 unmodified lines | ||
| 3848 | 3845 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
| 3849 | 3846 | struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); |
| 3850 | 3847 | enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; |
| 3848 | + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); | |
| 3851 | 3849 | u32 temp, flags = 0; |
| 3852 | 3850 | |
| 3853 | 3851 | /* XXX: DSI transcoder paranoia */ |
| 3854 | 3852 | if (drm_WARN_ON(&dev_priv->drm, transcoder_is_dsi(cpu_transcoder))) |
| 3855 | 3853 | return; |
| 3856 | 3854 | |
| 3855 | + if (INTEL_GEN(dev_priv) >= 12) { | |
| 3856 | + intel_dp->regs.dp_tp_ctl = TGL_DP_TP_CTL(cpu_transcoder); | |
| 3857 | + intel_dp->regs.dp_tp_status = TGL_DP_TP_STATUS(cpu_transcoder); | |
| 3858 | + } | |
| 3859 | + | |
| 3857 | 3860 | intel_dsc_get_config(encoder, pipe_config); |
| 3858 | 3861 | |
| 3859 | 3862 | temp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder)); |
| @@ -4173,6 +4176,7 @@ static const struct drm_encoder_funcs intel_ddi_funcs = { · 313 unmodified lines | ||
| 4173 | 4176 | static struct intel_connector * |
| 4174 | 4177 | intel_ddi_init_dp_connector(struct intel_digital_port *intel_dig_port) |
| 4175 | 4178 | { |
| 4179 | + struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); | |
| 4176 | 4180 | struct intel_connector *connector; |
| 4177 | 4181 | enum port port = intel_dig_port->base.port; |
| 4178 | 4182 | |
| @@ -4183,6 +4187,10 @@ intel_ddi_init_dp_connector(struct intel_digital_port *intel_dig_port) · 4 unmodified lines | ||
| 4183 | 4187 | intel_dig_port->dp.output_reg = DDI_BUF_CTL(port); |
| 4184 | 4188 | intel_dig_port->dp.prepare_link_retrain = |
| 4185 | 4189 | intel_ddi_prepare_link_retrain; |
| 4190 | + if (INTEL_GEN(dev_priv) < 12) { | |
| 4191 | + intel_dig_port->dp.regs.dp_tp_ctl = DP_TP_CTL(port); | |
| 4192 | + intel_dig_port->dp.regs.dp_tp_status = DP_TP_STATUS(port); | |
| 4193 | + } | |
| 4186 | 4194 | |
| 4187 | 4195 | if (!intel_dp_init_connector(intel_dig_port, connector)) { |
| 4188 | 4196 | kfree(connector); |
| @@ -4140,7 +4140,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4139 unmodified lines | ||
| 4140 | 4140 | { |
| 4141 | 4141 | .name = "AUX D TBT1", |
| 4142 | 4142 | .domains = TGL_AUX_D_TBT1_IO_POWER_DOMAINS, |
| 4143 | − .ops = &hsw_power_well_ops, | |
| 4143 | + .ops = &icl_tc_phy_aux_power_well_ops, | |
| 4144 | 4144 | .id = DISP_PW_ID_NONE, |
| 4145 | 4145 | { |
| 4146 | 4146 | .hsw.regs = &icl_aux_power_well_regs, |
| @@ -4151,7 +4151,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4 unmodified lines | ||
| 4151 | 4151 | { |
| 4152 | 4152 | .name = "AUX E TBT2", |
| 4153 | 4153 | .domains = TGL_AUX_E_TBT2_IO_POWER_DOMAINS, |
| 4154 | − .ops = &hsw_power_well_ops, | |
| 4154 | + .ops = &icl_tc_phy_aux_power_well_ops, | |
| 4155 | 4155 | .id = DISP_PW_ID_NONE, |
| 4156 | 4156 | { |
| 4157 | 4157 | .hsw.regs = &icl_aux_power_well_regs, |
| @@ -4162,7 +4162,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4 unmodified lines | ||
| 4162 | 4162 | { |
| 4163 | 4163 | .name = "AUX F TBT3", |
| 4164 | 4164 | .domains = TGL_AUX_F_TBT3_IO_POWER_DOMAINS, |
| 4165 | − .ops = &hsw_power_well_ops, | |
| 4165 | + .ops = &icl_tc_phy_aux_power_well_ops, | |
| 4166 | 4166 | .id = DISP_PW_ID_NONE, |
| 4167 | 4167 | { |
| 4168 | 4168 | .hsw.regs = &icl_aux_power_well_regs, |
| @@ -4173,7 +4173,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4 unmodified lines | ||
| 4173 | 4173 | { |
| 4174 | 4174 | .name = "AUX G TBT4", |
| 4175 | 4175 | .domains = TGL_AUX_G_TBT4_IO_POWER_DOMAINS, |
| 4176 | − .ops = &hsw_power_well_ops, | |
| 4176 | + .ops = &icl_tc_phy_aux_power_well_ops, | |
| 4177 | 4177 | .id = DISP_PW_ID_NONE, |
| 4178 | 4178 | { |
| 4179 | 4179 | .hsw.regs = &icl_aux_power_well_regs, |
| @@ -4184,7 +4184,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4 unmodified lines | ||
| 4184 | 4184 | { |
| 4185 | 4185 | .name = "AUX H TBT5", |
| 4186 | 4186 | .domains = TGL_AUX_H_TBT5_IO_POWER_DOMAINS, |
| 4187 | − .ops = &hsw_power_well_ops, | |
| 4187 | + .ops = &icl_tc_phy_aux_power_well_ops, | |
| 4188 | 4188 | .id = DISP_PW_ID_NONE, |
| 4189 | 4189 | { |
| 4190 | 4190 | .hsw.regs = &icl_aux_power_well_regs, |
| @@ -4195,7 +4195,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4 unmodified lines | ||
| 4195 | 4195 | { |
| 4196 | 4196 | .name = "AUX I TBT6", |
| 4197 | 4197 | .domains = TGL_AUX_I_TBT6_IO_POWER_DOMAINS, |
| 4198 | − .ops = &hsw_power_well_ops, | |
| 4198 | + .ops = &icl_tc_phy_aux_power_well_ops, | |
| 4199 | 4199 | .id = DISP_PW_ID_NONE, |
| 4200 | 4200 | { |
| 4201 | 4201 | .hsw.regs = &icl_aux_power_well_regs, |
| @@ -2517,9 +2517,6 @@ static void intel_dp_prepare(struct intel_encoder *encoder, · 2516 unmodified lines | ||
| 2517 | 2517 | intel_crtc_has_type(pipe_config, |
| 2518 | 2518 | INTEL_OUTPUT_DP_MST)); |
| 2519 | 2519 | |
| 2520 | − intel_dp->regs.dp_tp_ctl = DP_TP_CTL(port); | |
| 2521 | − intel_dp->regs.dp_tp_status = DP_TP_STATUS(port); | |
| 2522 | − | |
| 2523 | 2520 | /* |
| 2524 | 2521 | * There are four kinds of DP registers: |
| 2525 | 2522 | * |
| @@ -7836,6 +7833,8 @@ bool intel_dp_init(struct drm_i915_private *dev_priv, · 5310 unmodified lines | ||
| 7836 | 7833 | |
| 7837 | 7834 | intel_dig_port->dp.output_reg = output_reg; |
| 7838 | 7835 | intel_dig_port->max_lanes = 4; |
| 7836 | + intel_dig_port->dp.regs.dp_tp_ctl = DP_TP_CTL(port); | |
| 7837 | + intel_dig_port->dp.regs.dp_tp_status = DP_TP_STATUS(port); | |
| 7839 | 7838 | |
| 7840 | 7839 | intel_encoder->type = INTEL_OUTPUT_DP; |
| 7841 | 7840 | intel_encoder->power_domain = intel_port_to_power_domain(port); |
| @@ -342,6 +342,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector) · 341 unmodified lines | ||
| 342 | 342 | */ |
| 343 | 343 | if (dev_priv->vbt.backlight.type != |
| 344 | 344 | INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE && |
| 345 | + i915_modparams.enable_dpcd_backlight != 1 && | |
| 345 | 346 | !drm_dp_has_quirk(&intel_dp->desc, intel_dp->edid_quirks, |
| 346 | 347 | DP_QUIRK_FORCE_DPCD_BACKLIGHT)) { |
| 347 | 348 | DRM_DEV_INFO(dev->dev, |
| @@ -1536,7 +1536,8 @@ bool intel_hdmi_hdcp_check_link(struct intel_digital_port *intel_dig_port) · 1535 unmodified lines | ||
| 1536 | 1536 | intel_de_write(i915, HDCP_RPRIME(i915, cpu_transcoder, port), ri.reg); |
| 1537 | 1537 | |
| 1538 | 1538 | /* Wait for Ri prime match */ |
| 1539 | − if (wait_for(intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder, port)) & | |
| 1539 | + if (wait_for((intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder, port)) & | |
| 1540 | + (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC)) == | |
| 1540 | 1541 | (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1)) { |
| 1541 | 1542 | DRM_ERROR("Ri' mismatch detected, link check failed (%x)\n", |
| 1542 | 1543 | intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder, port))); |
| @@ -2817,19 +2817,25 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane, · 2816 unmodified lines | ||
| 2817 | 2817 | } |
| 2818 | 2818 | } |
| 2819 | 2819 | |
| 2820 | −static bool gen12_plane_supports_mc_ccs(enum plane_id plane_id) | |
| 2820 | +static bool gen12_plane_supports_mc_ccs(struct drm_i915_private *dev_priv, | |
| 2821 | + enum plane_id plane_id) | |
| 2821 | 2822 | { |
| 2823 | + /* Wa_14010477008:tgl[a0..c0] */ | |
| 2824 | + if (IS_TGL_REVID(dev_priv, TGL_REVID_A0, TGL_REVID_C0)) | |
| 2825 | + return false; | |
| 2826 | + | |
| 2822 | 2827 | return plane_id < PLANE_SPRITE4; |
| 2823 | 2828 | } |
| 2824 | 2829 | |
| 2825 | 2830 | static bool gen12_plane_format_mod_supported(struct drm_plane *_plane, |
| 2826 | 2831 | u32 format, u64 modifier) |
| 2827 | 2832 | { |
| 2833 | + struct drm_i915_private *dev_priv = to_i915(_plane->dev); | |
| 2828 | 2834 | struct intel_plane *plane = to_intel_plane(_plane); |
| 2829 | 2835 | |
| 2830 | 2836 | switch (modifier) { |
| 2831 | 2837 | case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS: |
| 2832 | − if (!gen12_plane_supports_mc_ccs(plane->id)) | |
| 2838 | + if (!gen12_plane_supports_mc_ccs(dev_priv, plane->id)) | |
| 2833 | 2839 | return false; |
| 2834 | 2840 | /* fall through */ |
| 2835 | 2841 | case DRM_FORMAT_MOD_LINEAR: |
| @@ -2998,9 +3004,10 @@ static const u32 *icl_get_plane_formats(struct drm_i915_private *dev_priv, · 162 unmodified lines | ||
| 2998 | 3004 | } |
| 2999 | 3005 | } |
| 3000 | 3006 | |
| 3001 | −static const u64 *gen12_get_plane_modifiers(enum plane_id plane_id) | |
| 3007 | +static const u64 *gen12_get_plane_modifiers(struct drm_i915_private *dev_priv, | |
| 3008 | + enum plane_id plane_id) | |
| 3002 | 3009 | { |
| 3003 | − if (gen12_plane_supports_mc_ccs(plane_id)) | |
| 3010 | + if (gen12_plane_supports_mc_ccs(dev_priv, plane_id)) | |
| 3004 | 3011 | return gen12_plane_format_modifiers_mc_ccs; |
| 3005 | 3012 | else |
| 3006 | 3013 | return gen12_plane_format_modifiers_rc_ccs; |
| @@ -3070,7 +3077,7 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv, · 63 unmodified lines | ||
| 3070 | 3077 | |
| 3071 | 3078 | plane->has_ccs = skl_plane_has_ccs(dev_priv, pipe, plane_id); |
| 3072 | 3079 | if (INTEL_GEN(dev_priv) >= 12) { |
| 3073 | − modifiers = gen12_get_plane_modifiers(plane_id); | |
| 3080 | + modifiers = gen12_get_plane_modifiers(dev_priv, plane_id); | |
| 3074 | 3081 | plane_funcs = &gen12_plane_funcs; |
| 3075 | 3082 | } else { |
| 3076 | 3083 | if (plane->has_ccs) |
| @@ -182,21 +182,35 @@ i915_gem_object_fence_prepare(struct drm_i915_gem_object *obj, · 181 unmodified lines | ||
| 182 | 182 | int tiling_mode, unsigned int stride) |
| 183 | 183 | { |
| 184 | 184 | struct i915_ggtt *ggtt = &to_i915(obj->base.dev)->ggtt; |
| 185 | − struct i915_vma *vma; | |
| 185 | + struct i915_vma *vma, *vn; | |
| 186 | + LIST_HEAD(unbind); | |
| 186 | 187 | int ret = 0; |
| 187 | 188 | |
| 188 | 189 | if (tiling_mode == I915_TILING_NONE) |
| 189 | 190 | return 0; |
| 190 | 191 | |
| 191 | 192 | mutex_lock(&ggtt->vm.mutex); |
| 193 | + | |
| 194 | + spin_lock(&obj->vma.lock); | |
| 192 | 195 | for_each_ggtt_vma(vma, obj) { |
| 196 | + GEM_BUG_ON(vma->vm != &ggtt->vm); | |
| 197 | + | |
| 193 | 198 | if (i915_vma_fence_prepare(vma, tiling_mode, stride)) |
| 194 | 199 | continue; |
| 195 | 200 | |
| 201 | + list_move(&vma->vm_link, &unbind); | |
| 202 | + } | |
| 203 | + spin_unlock(&obj->vma.lock); | |
| 204 | + | |
| 205 | + list_for_each_entry_safe(vma, vn, &unbind, vm_link) { | |
| 196 | 206 | ret = __i915_vma_unbind(vma); |
| 197 | − if (ret) | |
| 207 | + if (ret) { | |
| 208 | + /* Restore the remaining vma on an error */ | |
| 209 | + list_splice(&unbind, &ggtt->vm.bound_list); | |
| 198 | 210 | break; |
| 211 | + } | |
| 199 | 212 | } |
| 213 | + | |
| 200 | 214 | mutex_unlock(&ggtt->vm.mutex); |
| 201 | 215 | |
| 202 | 216 | return ret; |
| @@ -268,6 +282,7 @@ i915_gem_object_set_tiling(struct drm_i915_gem_object *obj, · 65 unmodified lines | ||
| 268 | 282 | } |
| 269 | 283 | mutex_unlock(&obj->mm.lock); |
| 270 | 284 | |
| 285 | + spin_lock(&obj->vma.lock); | |
| 271 | 286 | for_each_ggtt_vma(vma, obj) { |
| 272 | 287 | vma->fence_size = |
| 273 | 288 | i915_gem_fence_size(i915, vma->size, tiling, stride); |
| @@ -278,6 +293,7 @@ i915_gem_object_set_tiling(struct drm_i915_gem_object *obj, · 4 unmodified lines | ||
| 278 | 293 | if (vma->fence) |
| 279 | 294 | vma->fence->dirty = true; |
| 280 | 295 | } |
| 296 | + spin_unlock(&obj->vma.lock); | |
| 281 | 297 | |
| 282 | 298 | obj->tiling_and_stride = tiling | stride; |
| 283 | 299 | i915_gem_object_unlock(obj); |
| @@ -1477,8 +1477,10 @@ static int igt_ppgtt_pin_update(void *arg) · 1476 unmodified lines | ||
| 1477 | 1477 | unsigned int page_size = BIT(first); |
| 1478 | 1478 | |
| 1479 | 1479 | obj = i915_gem_object_create_internal(dev_priv, page_size); |
| 1480 | − if (IS_ERR(obj)) | |
| 1481 | − return PTR_ERR(obj); | |
| 1480 | + if (IS_ERR(obj)) { | |
| 1481 | + err = PTR_ERR(obj); | |
| 1482 | + goto out_vm; | |
| 1483 | + } | |
| 1482 | 1484 | |
| 1483 | 1485 | vma = i915_vma_instance(obj, vm, NULL); |
| 1484 | 1486 | if (IS_ERR(vma)) { |
| @@ -1531,8 +1533,10 @@ static int igt_ppgtt_pin_update(void *arg) · 46 unmodified lines | ||
| 1531 | 1533 | } |
| 1532 | 1534 | |
| 1533 | 1535 | obj = i915_gem_object_create_internal(dev_priv, PAGE_SIZE); |
| 1534 | − if (IS_ERR(obj)) | |
| 1535 | − return PTR_ERR(obj); | |
| 1536 | + if (IS_ERR(obj)) { | |
| 1537 | + err = PTR_ERR(obj); | |
| 1538 | + goto out_vm; | |
| 1539 | + } | |
| 1536 | 1540 | |
| 1537 | 1541 | vma = i915_vma_instance(obj, vm, NULL); |
| 1538 | 1542 | if (IS_ERR(vma)) { |
| @@ -81,13 +81,14 @@ static void rps_enable_interrupts(struct intel_rps *rps) · 80 unmodified lines | ||
| 81 | 81 | events = (GEN6_PM_RP_UP_THRESHOLD | |
| 82 | 82 | GEN6_PM_RP_DOWN_THRESHOLD | |
| 83 | 83 | GEN6_PM_RP_DOWN_TIMEOUT); |
| 84 | − | |
| 85 | 84 | WRITE_ONCE(rps->pm_events, events); |
| 85 | + | |
| 86 | 86 | spin_lock_irq(>->irq_lock); |
| 87 | 87 | gen6_gt_pm_enable_irq(gt, rps->pm_events); |
| 88 | 88 | spin_unlock_irq(>->irq_lock); |
| 89 | 89 | |
| 90 | − set(gt->uncore, GEN6_PMINTRMSK, rps_pm_mask(rps, rps->cur_freq)); | |
| 90 | + intel_uncore_write(gt->uncore, | |
| 91 | + GEN6_PMINTRMSK, rps_pm_mask(rps, rps->last_freq)); | |
| 91 | 92 | } |
| 92 | 93 | |
| 93 | 94 | static void gen6_rps_reset_interrupts(struct intel_rps *rps) |
| @@ -120,7 +121,9 @@ static void rps_disable_interrupts(struct intel_rps *rps) · 26 unmodified lines | ||
| 120 | 121 | struct intel_gt *gt = rps_to_gt(rps); |
| 121 | 122 | |
| 122 | 123 | WRITE_ONCE(rps->pm_events, 0); |
| 123 | − set(gt->uncore, GEN6_PMINTRMSK, rps_pm_sanitize_mask(rps, ~0u)); | |
| 124 | + | |
| 125 | + intel_uncore_write(gt->uncore, | |
| 126 | + GEN6_PMINTRMSK, rps_pm_sanitize_mask(rps, ~0u)); | |
| 124 | 127 | |
| 125 | 128 | spin_lock_irq(>->irq_lock); |
| 126 | 129 | gen6_gt_pm_disable_irq(gt, GEN6_PM_RPS_EVENTS); |
| @@ -521,6 +521,8 @@ int intel_timeline_read_hwsp(struct i915_request *from, · 520 unmodified lines | ||
| 521 | 521 | |
| 522 | 522 | rcu_read_lock(); |
| 523 | 523 | cl = rcu_dereference(from->hwsp_cacheline); |
| 524 | + if (i915_request_completed(from)) /* confirm cacheline is valid */ | |
| 525 | + goto unlock; | |
| 524 | 526 | if (unlikely(!i915_active_acquire_if_busy(&cl->active))) |
| 525 | 527 | goto unlock; /* seqno wrapped and completed! */ |
| 526 | 528 | if (unlikely(i915_request_completed(from))) |
| @@ -1507,6 +1507,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, · 1506 unmodified lines | ||
| 1507 | 1507 | (IS_ICELAKE(p) && IS_REVID(p, since, until)) |
| 1508 | 1508 | |
| 1509 | 1509 | #define TGL_REVID_A0 0x0 |
| 1510 | +#define TGL_REVID_B0 0x1 | |
| 1511 | +#define TGL_REVID_C0 0x2 | |
| 1510 | 1512 | |
| 1511 | 1513 | #define IS_TGL_REVID(p, since, until) \ |
| 1512 | 1514 | (IS_TIGERLAKE(p) && IS_REVID(p, since, until)) |
| @@ -3358,7 +3358,8 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) · 3357 unmodified lines | ||
| 3358 | 3358 | { |
| 3359 | 3359 | struct intel_uncore *uncore = &dev_priv->uncore; |
| 3360 | 3360 | |
| 3361 | − u32 de_pipe_masked = GEN8_PIPE_CDCLK_CRC_DONE; | |
| 3361 | + u32 de_pipe_masked = gen8_de_pipe_fault_mask(dev_priv) | | |
| 3362 | + GEN8_PIPE_CDCLK_CRC_DONE; | |
| 3362 | 3363 | u32 de_pipe_enables; |
| 3363 | 3364 | u32 de_port_masked = GEN8_AUX_CHANNEL_A; |
| 3364 | 3365 | u32 de_port_enables; |
| @@ -3369,13 +3370,10 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) · 4 unmodified lines | ||
| 3369 | 3370 | de_misc_masked |= GEN8_DE_MISC_GSE; |
| 3370 | 3371 | |
| 3371 | 3372 | if (INTEL_GEN(dev_priv) >= 9) { |
| 3372 | − de_pipe_masked |= GEN9_DE_PIPE_IRQ_FAULT_ERRORS; | |
| 3373 | 3373 | de_port_masked |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C | |
| 3374 | 3374 | GEN9_AUX_CHANNEL_D; |
| 3375 | 3375 | if (IS_GEN9_LP(dev_priv)) |
| 3376 | 3376 | de_port_masked |= BXT_DE_PORT_GMBUS; |
| 3377 | − } else { | |
| 3378 | − de_pipe_masked |= GEN8_DE_PIPE_IRQ_FAULT_ERRORS; | |
| 3379 | 3377 | } |
| 3380 | 3378 | |
| 3381 | 3379 | if (INTEL_GEN(dev_priv) >= 11) |
| @@ -34,8 +34,8 @@ · 33 unmodified lines | ||
| 34 | 34 | * Follow the style described here for new macros, and while changing existing |
| 35 | 35 | * macros. Do **not** mass change existing definitions just to update the style. |
| 36 | 36 | * |
| 37 | − * Layout | |
| 38 | − * ~~~~~~ | |
| 37 | + * File Layout | |
| 38 | + * ~~~~~~~~~~~ | |
| 39 | 39 | * |
| 40 | 40 | * Keep helper macros near the top. For example, _PIPE() and friends. |
| 41 | 41 | * |
| @@ -158,16 +158,18 @@ vma_create(struct drm_i915_gem_object *obj, · 157 unmodified lines | ||
| 158 | 158 | |
| 159 | 159 | GEM_BUG_ON(!IS_ALIGNED(vma->size, I915_GTT_PAGE_SIZE)); |
| 160 | 160 | |
| 161 | + spin_lock(&obj->vma.lock); | |
| 162 | + | |
| 161 | 163 | if (i915_is_ggtt(vm)) { |
| 162 | 164 | if (unlikely(overflows_type(vma->size, u32))) |
| 163 | − goto err_vma; | |
| 165 | + goto err_unlock; | |
| 164 | 166 | |
| 165 | 167 | vma->fence_size = i915_gem_fence_size(vm->i915, vma->size, |
| 166 | 168 | i915_gem_object_get_tiling(obj), |
| 167 | 169 | i915_gem_object_get_stride(obj)); |
| 168 | 170 | if (unlikely(vma->fence_size < vma->size || /* overflow */ |
| 169 | 171 | vma->fence_size > vm->total)) |
| 170 | − goto err_vma; | |
| 172 | + goto err_unlock; | |
| 171 | 173 | |
| 172 | 174 | GEM_BUG_ON(!IS_ALIGNED(vma->fence_size, I915_GTT_MIN_ALIGNMENT)); |
| 173 | 175 | |
| @@ -179,8 +181,6 @@ vma_create(struct drm_i915_gem_object *obj, · 5 unmodified lines | ||
| 179 | 181 | __set_bit(I915_VMA_GGTT_BIT, __i915_vma_flags(vma)); |
| 180 | 182 | } |
| 181 | 183 | |
| 182 | − spin_lock(&obj->vma.lock); | |
| 183 | − | |
| 184 | 184 | rb = NULL; |
| 185 | 185 | p = &obj->vma.tree.rb_node; |
| 186 | 186 | while (*p) { |
| @@ -225,6 +225,8 @@ vma_create(struct drm_i915_gem_object *obj, · 38 unmodified lines | ||
| 225 | 225 | |
| 226 | 226 | return vma; |
| 227 | 227 | |
| 228 | +err_unlock: | |
| 229 | + spin_unlock(&obj->vma.lock); | |
| 228 | 230 | err_vma: |
| 229 | 231 | i915_vma_free(vma); |
| 230 | 232 | return ERR_PTR(-E2BIG); |
| @@ -843,6 +843,7 @@ static const struct of_device_id ingenic_drm_of_match[] = { · 842 unmodified lines | ||
| 843 | 843 | { .compatible = "ingenic,jz4770-lcd", .data = &jz4770_soc_info }, |
| 844 | 844 | { /* sentinel */ }, |
| 845 | 845 | }; |
| 846 | +MODULE_DEVICE_TABLE(of, ingenic_drm_of_match); | |
| 846 | 847 | |
| 847 | 848 | static struct platform_driver ingenic_drm_driver = { |
| 848 | 849 | .driver = { |
| @@ -1034,10 +1034,8 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master, · 1033 unmodified lines | ||
| 1034 | 1034 | return PTR_ERR(dw_plat_data->regm); |
| 1035 | 1035 | |
| 1036 | 1036 | irq = platform_get_irq(pdev, 0); |
| 1037 | − if (irq < 0) { | |
| 1038 | − dev_err(dev, "Failed to get hdmi top irq\n"); | |
| 1037 | + if (irq < 0) | |
| 1039 | 1038 | return irq; |
| 1040 | − } | |
| 1041 | 1039 | |
| 1042 | 1040 | ret = devm_request_threaded_irq(dev, irq, dw_hdmi_top_irq, |
| 1043 | 1041 | dw_hdmi_top_thread_irq, IRQF_SHARED, |
| @@ -480,9 +480,10 @@ int qxl_hw_surface_alloc(struct qxl_device *qdev, · 479 unmodified lines | ||
| 480 | 480 | return ret; |
| 481 | 481 | |
| 482 | 482 | ret = qxl_release_reserve_list(release, true); |
| 483 | − if (ret) | |
| 483 | + if (ret) { | |
| 484 | + qxl_release_free(qdev, release); | |
| 484 | 485 | return ret; |
| 485 | − | |
| 486 | + } | |
| 486 | 487 | cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release); |
| 487 | 488 | cmd->type = QXL_SURFACE_CMD_CREATE; |
| 488 | 489 | cmd->flags = QXL_SURF_FLAG_KEEP_DATA; |
| @@ -499,8 +500,8 @@ int qxl_hw_surface_alloc(struct qxl_device *qdev, · 10 unmodified lines | ||
| 499 | 500 | /* no need to add a release to the fence for this surface bo, |
| 500 | 501 | since it is only released when we ask to destroy the surface |
| 501 | 502 | and it would never signal otherwise */ |
| 502 | − qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false); | |
| 503 | 503 | qxl_release_fence_buffer_objects(release); |
| 504 | + qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false); | |
| 504 | 505 | |
| 505 | 506 | surf->hw_surf_alloc = true; |
| 506 | 507 | spin_lock(&qdev->surf_id_idr_lock); |
| @@ -542,9 +543,8 @@ int qxl_hw_surface_dealloc(struct qxl_device *qdev, · 35 unmodified lines | ||
| 542 | 543 | cmd->surface_id = id; |
| 543 | 544 | qxl_release_unmap(qdev, release, &cmd->release_info); |
| 544 | 545 | |
| 545 | − qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false); | |
| 546 | − | |
| 547 | 546 | qxl_release_fence_buffer_objects(release); |
| 547 | + qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false); | |
| 548 | 548 | |
| 549 | 549 | return 0; |
| 550 | 550 | } |
| @@ -510,8 +510,8 @@ static int qxl_primary_apply_cursor(struct drm_plane *plane) · 509 unmodified lines | ||
| 510 | 510 | cmd->u.set.visible = 1; |
| 511 | 511 | qxl_release_unmap(qdev, release, &cmd->release_info); |
| 512 | 512 | |
| 513 | − qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false); | |
| 514 | 513 | qxl_release_fence_buffer_objects(release); |
| 514 | + qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false); | |
| 515 | 515 | |
| 516 | 516 | return ret; |
| 517 | 517 | |
| @@ -652,8 +652,8 @@ static void qxl_cursor_atomic_update(struct drm_plane *plane, · 134 unmodified lines | ||
| 652 | 652 | cmd->u.position.y = plane->state->crtc_y + fb->hot_y; |
| 653 | 653 | |
| 654 | 654 | qxl_release_unmap(qdev, release, &cmd->release_info); |
| 655 | − qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false); | |
| 656 | 655 | qxl_release_fence_buffer_objects(release); |
| 656 | + qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false); | |
| 657 | 657 | |
| 658 | 658 | if (old_cursor_bo != NULL) |
| 659 | 659 | qxl_bo_unpin(old_cursor_bo); |
| @@ -700,8 +700,8 @@ static void qxl_cursor_atomic_disable(struct drm_plane *plane, · 40 unmodified lines | ||
| 700 | 700 | cmd->type = QXL_CURSOR_HIDE; |
| 701 | 701 | qxl_release_unmap(qdev, release, &cmd->release_info); |
| 702 | 702 | |
| 703 | − qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false); | |
| 704 | 703 | qxl_release_fence_buffer_objects(release); |
| 704 | + qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false); | |
| 705 | 705 | } |
| 706 | 706 | |
| 707 | 707 | static void qxl_update_dumb_head(struct qxl_device *qdev, |
| @@ -209,9 +209,10 @@ void qxl_draw_dirty_fb(struct qxl_device *qdev, · 208 unmodified lines | ||
| 209 | 209 | goto out_release_backoff; |
| 210 | 210 | |
| 211 | 211 | rects = drawable_set_clipping(qdev, num_clips, clips_bo); |
| 212 | − if (!rects) | |
| 212 | + if (!rects) { | |
| 213 | + ret = -EINVAL; | |
| 213 | 214 | goto out_release_backoff; |
| 214 | − | |
| 215 | + } | |
| 215 | 216 | drawable = (struct qxl_drawable *)qxl_release_map(qdev, release); |
| 216 | 217 | |
| 217 | 218 | drawable->clip.type = SPICE_CLIP_TYPE_RECTS; |
| @@ -242,8 +243,8 @@ void qxl_draw_dirty_fb(struct qxl_device *qdev, · 24 unmodified lines | ||
| 242 | 243 | } |
| 243 | 244 | qxl_bo_kunmap(clips_bo); |
| 244 | 245 | |
| 245 | − qxl_push_command_ring_release(qdev, release, QXL_CMD_DRAW, false); | |
| 246 | 246 | qxl_release_fence_buffer_objects(release); |
| 247 | + qxl_push_command_ring_release(qdev, release, QXL_CMD_DRAW, false); | |
| 247 | 248 | |
| 248 | 249 | out_release_backoff: |
| 249 | 250 | if (ret) |
| @@ -212,7 +212,8 @@ qxl_image_init_helper(struct qxl_device *qdev, · 211 unmodified lines | ||
| 212 | 212 | break; |
| 213 | 213 | default: |
| 214 | 214 | DRM_ERROR("unsupported image bit depth\n"); |
| 215 | − return -EINVAL; /* TODO: cleanup */ | |
| 215 | + qxl_bo_kunmap_atomic_page(qdev, image_bo, ptr); | |
| 216 | + return -EINVAL; | |
| 216 | 217 | } |
| 217 | 218 | image->u.bitmap.flags = QXL_BITMAP_TOP_DOWN; |
| 218 | 219 | image->u.bitmap.x = width; |
| @@ -261,11 +261,8 @@ static int qxl_process_single_command(struct qxl_device *qdev, · 260 unmodified lines | ||
| 261 | 261 | apply_surf_reloc(qdev, &reloc_info[i]); |
| 262 | 262 | } |
| 263 | 263 | |
| 264 | + qxl_release_fence_buffer_objects(release); | |
| 264 | 265 | ret = qxl_push_command_ring_release(qdev, release, cmd->type, true); |
| 265 | − if (ret) | |
| 266 | − qxl_release_backoff_reserve_list(release); | |
| 267 | − else | |
| 268 | − qxl_release_fence_buffer_objects(release); | |
| 269 | 266 | |
| 270 | 267 | out_free_bos: |
| 271 | 268 | out_free_release: |
| @@ -676,7 +676,7 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) · 675 unmodified lines | ||
| 676 | 676 | */ |
| 677 | 677 | if ((sched->timeout != MAX_SCHEDULE_TIMEOUT && |
| 678 | 678 | !cancel_delayed_work(&sched->work_tdr)) || |
| 679 | − __kthread_should_park(sched->thread)) | |
| 679 | + kthread_should_park()) | |
| 680 | 680 | return NULL; |
| 681 | 681 | |
| 682 | 682 | spin_lock(&sched->job_list_lock); |
| @@ -717,7 +717,7 @@ static void sun6i_dsi_encoder_enable(struct drm_encoder *encoder) · 716 unmodified lines | ||
| 717 | 717 | struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; |
| 718 | 718 | struct sun6i_dsi *dsi = encoder_to_sun6i_dsi(encoder); |
| 719 | 719 | struct mipi_dsi_device *device = dsi->device; |
| 720 | − union phy_configure_opts opts = { 0 }; | |
| 720 | + union phy_configure_opts opts = { }; | |
| 721 | 721 | struct phy_configure_opts_mipi_dphy *cfg = &opts.mipi_dphy; |
| 722 | 722 | u16 delay; |
| 723 | 723 | int err; |
| @@ -379,9 +379,17 @@ static struct drm_crtc_state *tidss_crtc_duplicate_state(struct drm_crtc *crtc) · 378 unmodified lines | ||
| 379 | 379 | return &state->base; |
| 380 | 380 | } |
| 381 | 381 | |
| 382 | +static void tidss_crtc_destroy(struct drm_crtc *crtc) | |
| 383 | +{ | |
| 384 | + struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); | |
| 385 | + | |
| 386 | + drm_crtc_cleanup(crtc); | |
| 387 | + kfree(tcrtc); | |
| 388 | +} | |
| 389 | + | |
| 382 | 390 | static const struct drm_crtc_funcs tidss_crtc_funcs = { |
| 383 | 391 | .reset = tidss_crtc_reset, |
| 384 | − .destroy = drm_crtc_cleanup, | |
| 392 | + .destroy = tidss_crtc_destroy, | |
| 385 | 393 | .set_config = drm_atomic_helper_set_config, |
| 386 | 394 | .page_flip = drm_atomic_helper_page_flip, |
| 387 | 395 | .atomic_duplicate_state = tidss_crtc_duplicate_state, |
| @@ -400,7 +408,7 @@ struct tidss_crtc *tidss_crtc_create(struct tidss_device *tidss, · 12 unmodified lines | ||
| 400 | 408 | bool has_ctm = tidss->feat->vp_feat.color.has_ctm; |
| 401 | 409 | int ret; |
| 402 | 410 | |
| 403 | − tcrtc = devm_kzalloc(tidss->dev, sizeof(*tcrtc), GFP_KERNEL); | |
| 411 | + tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL); | |
| 404 | 412 | if (!tcrtc) |
| 405 | 413 | return ERR_PTR(-ENOMEM); |
| 406 | 414 | |
| @@ -411,8 +419,10 @@ struct tidss_crtc *tidss_crtc_create(struct tidss_device *tidss, · 4 unmodified lines | ||
| 411 | 419 | |
| 412 | 420 | ret = drm_crtc_init_with_planes(&tidss->ddev, crtc, primary, |
| 413 | 421 | NULL, &tidss_crtc_funcs, NULL); |
| 414 | − if (ret < 0) | |
| 422 | + if (ret < 0) { | |
| 423 | + kfree(tcrtc); | |
| 415 | 424 | return ERR_PTR(ret); |
| 425 | + } | |
| 416 | 426 | |
| 417 | 427 | drm_crtc_helper_add(crtc, &tidss_crtc_helper_funcs); |
| 418 | 428 | |
| @@ -55,12 +55,18 @@ static int tidss_encoder_atomic_check(struct drm_encoder *encoder, · 54 unmodified lines | ||
| 55 | 55 | return 0; |
| 56 | 56 | } |
| 57 | 57 | |
| 58 | +static void tidss_encoder_destroy(struct drm_encoder *encoder) | |
| 59 | +{ | |
| 60 | + drm_encoder_cleanup(encoder); | |
| 61 | + kfree(encoder); | |
| 62 | +} | |
| 63 | + | |
| 58 | 64 | static const struct drm_encoder_helper_funcs encoder_helper_funcs = { |
| 59 | 65 | .atomic_check = tidss_encoder_atomic_check, |
| 60 | 66 | }; |
| 61 | 67 | |
| 62 | 68 | static const struct drm_encoder_funcs encoder_funcs = { |
| 63 | − .destroy = drm_encoder_cleanup, | |
| 69 | + .destroy = tidss_encoder_destroy, | |
| 64 | 70 | }; |
| 65 | 71 | |
| 66 | 72 | struct drm_encoder *tidss_encoder_create(struct tidss_device *tidss, |
| @@ -69,7 +75,7 @@ struct drm_encoder *tidss_encoder_create(struct tidss_device *tidss, · 2 unmodified lines | ||
| 69 | 75 | struct drm_encoder *enc; |
| 70 | 76 | int ret; |
| 71 | 77 | |
| 72 | − enc = devm_kzalloc(tidss->dev, sizeof(*enc), GFP_KERNEL); | |
| 78 | + enc = kzalloc(sizeof(*enc), GFP_KERNEL); | |
| 73 | 79 | if (!enc) |
| 74 | 80 | return ERR_PTR(-ENOMEM); |
| 75 | 81 | |
| @@ -77,8 +83,10 @@ struct drm_encoder *tidss_encoder_create(struct tidss_device *tidss, · 1 unmodified line | ||
| 77 | 83 | |
| 78 | 84 | ret = drm_encoder_init(&tidss->ddev, enc, &encoder_funcs, |
| 79 | 85 | encoder_type, NULL); |
| 80 | − if (ret < 0) | |
| 86 | + if (ret < 0) { | |
| 87 | + kfree(enc); | |
| 81 | 88 | return ERR_PTR(ret); |
| 89 | + } | |
| 82 | 90 | |
| 83 | 91 | drm_encoder_helper_add(enc, &encoder_helper_funcs); |
| 84 | 92 | |
| @@ -141,6 +141,14 @@ static void tidss_plane_atomic_disable(struct drm_plane *plane, · 140 unmodified lines | ||
| 141 | 141 | dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false); |
| 142 | 142 | } |
| 143 | 143 | |
| 144 | +static void drm_plane_destroy(struct drm_plane *plane) | |
| 145 | +{ | |
| 146 | + struct tidss_plane *tplane = to_tidss_plane(plane); | |
| 147 | + | |
| 148 | + drm_plane_cleanup(plane); | |
| 149 | + kfree(tplane); | |
| 150 | +} | |
| 151 | + | |
| 144 | 152 | static const struct drm_plane_helper_funcs tidss_plane_helper_funcs = { |
| 145 | 153 | .atomic_check = tidss_plane_atomic_check, |
| 146 | 154 | .atomic_update = tidss_plane_atomic_update, |
| @@ -151,7 +159,7 @@ static const struct drm_plane_funcs tidss_plane_funcs = { · 4 unmodified lines | ||
| 151 | 159 | .update_plane = drm_atomic_helper_update_plane, |
| 152 | 160 | .disable_plane = drm_atomic_helper_disable_plane, |
| 153 | 161 | .reset = drm_atomic_helper_plane_reset, |
| 154 | − .destroy = drm_plane_cleanup, | |
| 162 | + .destroy = drm_plane_destroy, | |
| 155 | 163 | .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, |
| 156 | 164 | .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, |
| 157 | 165 | }; |
| @@ -175,7 +183,7 @@ struct tidss_plane *tidss_plane_create(struct tidss_device *tidss, · 17 unmodified lines | ||
| 175 | 183 | BIT(DRM_MODE_BLEND_COVERAGE)); |
| 176 | 184 | int ret; |
| 177 | 185 | |
| 178 | − tplane = devm_kzalloc(tidss->dev, sizeof(*tplane), GFP_KERNEL); | |
| 186 | + tplane = kzalloc(sizeof(*tplane), GFP_KERNEL); | |
| 179 | 187 | if (!tplane) |
| 180 | 188 | return ERR_PTR(-ENOMEM); |
| 181 | 189 | |
| @@ -190,7 +198,7 @@ struct tidss_plane *tidss_plane_create(struct tidss_device *tidss, · 8 unmodified lines | ||
| 190 | 198 | formats, num_formats, |
| 191 | 199 | NULL, type, NULL); |
| 192 | 200 | if (ret < 0) |
| 193 | − return ERR_PTR(ret); | |
| 201 | + goto err; | |
| 194 | 202 | |
| 195 | 203 | drm_plane_helper_add(&tplane->plane, &tidss_plane_helper_funcs); |
| 196 | 204 | |
| @@ -203,15 +211,19 @@ struct tidss_plane *tidss_plane_create(struct tidss_device *tidss, · 6 unmodified lines | ||
| 203 | 211 | default_encoding, |
| 204 | 212 | default_range); |
| 205 | 213 | if (ret) |
| 206 | − return ERR_PTR(ret); | |
| 214 | + goto err; | |
| 207 | 215 | |
| 208 | 216 | ret = drm_plane_create_alpha_property(&tplane->plane); |
| 209 | 217 | if (ret) |
| 210 | − return ERR_PTR(ret); | |
| 218 | + goto err; | |
| 211 | 219 | |
| 212 | 220 | ret = drm_plane_create_blend_mode_property(&tplane->plane, blend_modes); |
| 213 | 221 | if (ret) |
| 214 | − return ERR_PTR(ret); | |
| 222 | + goto err; | |
| 215 | 223 | |
| 216 | 224 | return tplane; |
| 225 | + | |
| 226 | +err: | |
| 227 | + kfree(tplane); | |
| 228 | + return ERR_PTR(ret); | |
| 217 | 229 | } |
| @@ -221,6 +221,7 @@ struct virtio_gpu_fpriv { · 220 unmodified lines | ||
| 221 | 221 | /* virtio_ioctl.c */ |
| 222 | 222 | #define DRM_VIRTIO_NUM_IOCTLS 10 |
| 223 | 223 | extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS]; |
| 224 | +void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file); | |
| 224 | 225 | |
| 225 | 226 | /* virtio_kms.c */ |
| 226 | 227 | int virtio_gpu_init(struct drm_device *dev); |
| @@ -39,6 +39,9 @@ int virtio_gpu_gem_create(struct drm_file *file, · 38 unmodified lines | ||
| 39 | 39 | int ret; |
| 40 | 40 | u32 handle; |
| 41 | 41 | |
| 42 | + if (vgdev->has_virgl_3d) | |
| 43 | + virtio_gpu_create_context(dev, file); | |
| 44 | + | |
| 42 | 45 | ret = virtio_gpu_object_create(vgdev, params, &obj, NULL); |
| 43 | 46 | if (ret < 0) |
| 44 | 47 | return ret; |
| @@ -27,14 +27,14 @@ · 26 unmodified lines | ||
| 27 | 27 | |
| 28 | 28 | #include <linux/file.h> |
| 29 | 29 | #include <linux/sync_file.h> |
| 30 | +#include <linux/uaccess.h> | |
| 30 | 31 | |
| 31 | 32 | #include <drm/drm_file.h> |
| 32 | 33 | #include <drm/virtgpu_drm.h> |
| 33 | 34 | |
| 34 | 35 | #include "virtgpu_drv.h" |
| 35 | 36 | |
| 36 | −static void virtio_gpu_create_context(struct drm_device *dev, | |
| 37 | − struct drm_file *file) | |
| 37 | +void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file) | |
| 38 | 38 | { |
| 39 | 39 | struct virtio_gpu_device *vgdev = dev->dev_private; |
| 40 | 40 | struct virtio_gpu_fpriv *vfpriv = file->driver_priv; |
| @@ -25,6 +25,7 @@ · 24 unmodified lines | ||
| 25 | 25 | |
| 26 | 26 | #include <linux/virtio.h> |
| 27 | 27 | #include <linux/virtio_config.h> |
| 28 | +#include <linux/virtio_ring.h> | |
| 28 | 29 | |
| 29 | 30 | #include <drm/drm_file.h> |
| 30 | 31 | |
| @@ -52,14 +53,6 @@ static void virtio_gpu_config_changed_work_func(struct work_struct *work) · 21 unmodified lines | ||
| 52 | 53 | events_clear, &events_clear); |
| 53 | 54 | } |
| 54 | 55 | |
| 55 | −static void virtio_gpu_context_destroy(struct virtio_gpu_device *vgdev, | |
| 56 | − uint32_t ctx_id) | |
| 57 | −{ | |
| 58 | − virtio_gpu_cmd_context_destroy(vgdev, ctx_id); | |
| 59 | − virtio_gpu_notify(vgdev); | |
| 60 | − ida_free(&vgdev->ctx_id_ida, ctx_id - 1); | |
| 61 | −} | |
| 62 | − | |
| 63 | 56 | static void virtio_gpu_init_vq(struct virtio_gpu_queue *vgvq, |
| 64 | 57 | void (*work_func)(struct work_struct *work)) |
| 65 | 58 | { |
| @@ -274,14 +267,17 @@ int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file) · 208 unmodified lines | ||
| 274 | 267 | void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file) |
| 275 | 268 | { |
| 276 | 269 | struct virtio_gpu_device *vgdev = dev->dev_private; |
| 277 | − struct virtio_gpu_fpriv *vfpriv; | |
| 270 | + struct virtio_gpu_fpriv *vfpriv = file->driver_priv; | |
| 278 | 271 | |
| 279 | 272 | if (!vgdev->has_virgl_3d) |
| 280 | 273 | return; |
| 281 | 274 | |
| 282 | − vfpriv = file->driver_priv; | |
| 275 | + if (vfpriv->context_created) { | |
| 276 | + virtio_gpu_cmd_context_destroy(vgdev, vfpriv->ctx_id); | |
| 277 | + virtio_gpu_notify(vgdev); | |
| 278 | + } | |
| 283 | 279 | |
| 284 | − virtio_gpu_context_destroy(vgdev, vfpriv->ctx_id); | |
| 280 | + ida_free(&vgdev->ctx_id_ida, vfpriv->ctx_id - 1); | |
| 285 | 281 | mutex_destroy(&vfpriv->context_lock); |
| 286 | 282 | kfree(vfpriv); |
| 287 | 283 | file->driver_priv = NULL; |
| @@ -1155,6 +1155,7 @@ config HID_ALPS · 1154 unmodified lines | ||
| 1155 | 1155 | config HID_MCP2221 |
| 1156 | 1156 | tristate "Microchip MCP2221 HID USB-to-I2C/SMbus host support" |
| 1157 | 1157 | depends on USB_HID && I2C |
| 1158 | + depends on GPIOLIB | |
| 1158 | 1159 | ---help--- |
| 1159 | 1160 | Provides I2C and SMBUS host adapter functionality over USB-HID |
| 1160 | 1161 | through MCP2221 device. |
| @@ -802,6 +802,7 @@ static int alps_probe(struct hid_device *hdev, const struct hid_device_id *id) · 801 unmodified lines | ||
| 802 | 802 | break; |
| 803 | 803 | case HID_DEVICE_ID_ALPS_U1_DUAL: |
| 804 | 804 | case HID_DEVICE_ID_ALPS_U1: |
| 805 | + case HID_DEVICE_ID_ALPS_U1_UNICORN_LEGACY: | |
| 805 | 806 | data->dev_type = U1; |
| 806 | 807 | break; |
| 807 | 808 | default: |
| @@ -79,10 +79,10 @@ · 78 unmodified lines | ||
| 79 | 79 | #define HID_DEVICE_ID_ALPS_U1_DUAL_PTP 0x121F |
| 80 | 80 | #define HID_DEVICE_ID_ALPS_U1_DUAL_3BTN_PTP 0x1220 |
| 81 | 81 | #define HID_DEVICE_ID_ALPS_U1 0x1215 |
| 82 | +#define HID_DEVICE_ID_ALPS_U1_UNICORN_LEGACY 0x121E | |
| 82 | 83 | #define HID_DEVICE_ID_ALPS_T4_BTNLESS 0x120C |
| 83 | 84 | #define HID_DEVICE_ID_ALPS_1222 0x1222 |
| 84 | 85 | |
| 85 | − | |
| 86 | 86 | #define USB_VENDOR_ID_AMI 0x046b |
| 87 | 87 | #define USB_DEVICE_ID_AMI_VIRT_KEYBOARD_AND_MOUSE 0xff10 |
| 88 | 88 | |
| @@ -385,6 +385,7 @@ · 296 unmodified lines | ||
| 385 | 385 | #define USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_7349 0x7349 |
| 386 | 386 | #define USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_73F7 0x73f7 |
| 387 | 387 | #define USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_A001 0xa001 |
| 388 | +#define USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_C002 0xc002 | |
| 388 | 389 | |
| 389 | 390 | #define USB_VENDOR_ID_ELAN 0x04f3 |
| 390 | 391 | #define USB_DEVICE_ID_TOSHIBA_CLICK_L9W 0x0401 |
| @@ -759,6 +760,7 @@ · 368 unmodified lines | ||
| 759 | 760 | #define USB_DEVICE_ID_LOGITECH_RUMBLEPAD2 0xc218 |
| 760 | 761 | #define USB_DEVICE_ID_LOGITECH_RUMBLEPAD2_2 0xc219 |
| 761 | 762 | #define USB_DEVICE_ID_LOGITECH_G15_LCD 0xc222 |
| 763 | +#define USB_DEVICE_ID_LOGITECH_G11 0xc225 | |
| 762 | 764 | #define USB_DEVICE_ID_LOGITECH_G15_V2_LCD 0xc227 |
| 763 | 765 | #define USB_DEVICE_ID_LOGITECH_G510 0xc22d |
| 764 | 766 | #define USB_DEVICE_ID_LOGITECH_G510_USB_AUDIO 0xc22e |
| @@ -1097,6 +1099,9 @@ · 332 unmodified lines | ||
| 1097 | 1099 | #define USB_DEVICE_ID_SYMBOL_SCANNER_2 0x1300 |
| 1098 | 1100 | #define USB_DEVICE_ID_SYMBOL_SCANNER_3 0x1200 |
| 1099 | 1101 | |
| 1102 | +#define I2C_VENDOR_ID_SYNAPTICS 0x06cb | |
| 1103 | +#define I2C_PRODUCT_ID_SYNAPTICS_SYNA2393 0x7a13 | |
| 1104 | + | |
| 1100 | 1105 | #define USB_VENDOR_ID_SYNAPTICS 0x06cb |
| 1101 | 1106 | #define USB_DEVICE_ID_SYNAPTICS_TP 0x0001 |
| 1102 | 1107 | #define USB_DEVICE_ID_SYNAPTICS_INT_TP 0x0002 |
| @@ -1111,6 +1116,7 @@ · 8 unmodified lines | ||
| 1111 | 1116 | #define USB_DEVICE_ID_SYNAPTICS_LTS2 0x1d10 |
| 1112 | 1117 | #define USB_DEVICE_ID_SYNAPTICS_HD 0x0ac3 |
| 1113 | 1118 | #define USB_DEVICE_ID_SYNAPTICS_QUAD_HD 0x1ac3 |
| 1119 | +#define USB_DEVICE_ID_SYNAPTICS_DELL_K12A 0x2819 | |
| 1114 | 1120 | #define USB_DEVICE_ID_SYNAPTICS_ACER_SWITCH5_012 0x2968 |
| 1115 | 1121 | #define USB_DEVICE_ID_SYNAPTICS_TP_V103 0x5710 |
| 1116 | 1122 | #define USB_DEVICE_ID_SYNAPTICS_ACER_SWITCH5 0x81a7 |
| @@ -872,6 +872,10 @@ error_hw_stop: · 871 unmodified lines | ||
| 872 | 872 | } |
| 873 | 873 | |
| 874 | 874 | static const struct hid_device_id lg_g15_devices[] = { |
| 875 | + /* The G11 is a G15 without the LCD, treat it as a G15 */ | |
| 876 | + { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, | |
| 877 | + USB_DEVICE_ID_LOGITECH_G11), | |
| 878 | + .driver_data = LG_G15 }, | |
| 875 | 879 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, |
| 876 | 880 | USB_DEVICE_ID_LOGITECH_G15_LCD), |
| 877 | 881 | .driver_data = LG_G15 }, |
| @@ -1922,6 +1922,9 @@ static const struct hid_device_id mt_devices[] = { · 1921 unmodified lines | ||
| 1922 | 1922 | { .driver_data = MT_CLS_EGALAX_SERIAL, |
| 1923 | 1923 | MT_USB_DEVICE(USB_VENDOR_ID_DWAV, |
| 1924 | 1924 | USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_A001) }, |
| 1925 | + { .driver_data = MT_CLS_EGALAX, | |
| 1926 | + MT_USB_DEVICE(USB_VENDOR_ID_DWAV, | |
| 1927 | + USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_C002) }, | |
| 1925 | 1928 | |
| 1926 | 1929 | /* Elitegroup panel */ |
| 1927 | 1930 | { .driver_data = MT_CLS_SERIAL, |
| @@ -163,6 +163,7 @@ static const struct hid_device_id hid_quirks[] = { · 162 unmodified lines | ||
| 163 | 163 | { HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_LTS2), HID_QUIRK_NO_INIT_REPORTS }, |
| 164 | 164 | { HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_QUAD_HD), HID_QUIRK_NO_INIT_REPORTS }, |
| 165 | 165 | { HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_TP_V103), HID_QUIRK_NO_INIT_REPORTS }, |
| 166 | + { HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_DELL_K12A), HID_QUIRK_NO_INIT_REPORTS }, | |
| 166 | 167 | { HID_USB_DEVICE(USB_VENDOR_ID_TOPMAX, USB_DEVICE_ID_TOPMAX_COBRAPAD), HID_QUIRK_BADPAD }, |
| 167 | 168 | { HID_USB_DEVICE(USB_VENDOR_ID_TOUCHPACK, USB_DEVICE_ID_TOUCHPACK_RTS), HID_QUIRK_MULTI_INPUT }, |
| 168 | 169 | { HID_USB_DEVICE(USB_VENDOR_ID_TPV, USB_DEVICE_ID_TPV_OPTICAL_TOUCHSCREEN_8882), HID_QUIRK_NOGET }, |
| @@ -177,6 +177,8 @@ static const struct i2c_hid_quirks { · 176 unmodified lines | ||
| 177 | 177 | I2C_HID_QUIRK_BOGUS_IRQ }, |
| 178 | 178 | { USB_VENDOR_ID_ALPS_JP, HID_ANY_ID, |
| 179 | 179 | I2C_HID_QUIRK_RESET_ON_RESUME }, |
| 180 | + { I2C_VENDOR_ID_SYNAPTICS, I2C_PRODUCT_ID_SYNAPTICS_SYNA2393, | |
| 181 | + I2C_HID_QUIRK_RESET_ON_RESUME }, | |
| 180 | 182 | { USB_VENDOR_ID_ITE, I2C_DEVICE_ID_ITE_LENOVO_LEGION_Y720, |
| 181 | 183 | I2C_HID_QUIRK_BAD_INPUT_SIZE }, |
| 182 | 184 | { 0, 0 } |
| @@ -682,16 +682,21 @@ static int usbhid_open(struct hid_device *hid) · 681 unmodified lines | ||
| 682 | 682 | struct usbhid_device *usbhid = hid->driver_data; |
| 683 | 683 | int res; |
| 684 | 684 | |
| 685 | + mutex_lock(&usbhid->mutex); | |
| 686 | + | |
| 685 | 687 | set_bit(HID_OPENED, &usbhid->iofl); |
| 686 | 688 | |
| 687 | − if (hid->quirks & HID_QUIRK_ALWAYS_POLL) | |
| 688 | − return 0; | |
| 689 | + if (hid->quirks & HID_QUIRK_ALWAYS_POLL) { | |
| 690 | + res = 0; | |
| 691 | + goto Done; | |
| 692 | + } | |
| 689 | 693 | |
| 690 | 694 | res = usb_autopm_get_interface(usbhid->intf); |
| 691 | 695 | /* the device must be awake to reliably request remote wakeup */ |
| 692 | 696 | if (res < 0) { |
| 693 | 697 | clear_bit(HID_OPENED, &usbhid->iofl); |
| 694 | − return -EIO; | |
| 698 | + res = -EIO; | |
| 699 | + goto Done; | |
| 695 | 700 | } |
| 696 | 701 | |
| 697 | 702 | usbhid->intf->needs_remote_wakeup = 1; |
| @@ -725,6 +730,9 @@ static int usbhid_open(struct hid_device *hid) · 27 unmodified lines | ||
| 725 | 730 | msleep(50); |
| 726 | 731 | |
| 727 | 732 | clear_bit(HID_RESUME_RUNNING, &usbhid->iofl); |
| 733 | + | |
| 734 | + Done: | |
| 735 | + mutex_unlock(&usbhid->mutex); | |
| 728 | 736 | return res; |
| 729 | 737 | } |
| 730 | 738 | |
| @@ -732,6 +740,8 @@ static void usbhid_close(struct hid_device *hid) · 1 unmodified line | ||
| 732 | 740 | { |
| 733 | 741 | struct usbhid_device *usbhid = hid->driver_data; |
| 734 | 742 | |
| 743 | + mutex_lock(&usbhid->mutex); | |
| 744 | + | |
| 735 | 745 | /* |
| 736 | 746 | * Make sure we don't restart data acquisition due to |
| 737 | 747 | * a resumption we no longer care about by avoiding racing |
| @@ -743,12 +753,13 @@ static void usbhid_close(struct hid_device *hid) · 5 unmodified lines | ||
| 743 | 753 | clear_bit(HID_IN_POLLING, &usbhid->iofl); |
| 744 | 754 | spin_unlock_irq(&usbhid->lock); |
| 745 | 755 | |
| 746 | − if (hid->quirks & HID_QUIRK_ALWAYS_POLL) | |
| 747 | − return; | |
| 756 | + if (!(hid->quirks & HID_QUIRK_ALWAYS_POLL)) { | |
| 757 | + hid_cancel_delayed_stuff(usbhid); | |
| 758 | + usb_kill_urb(usbhid->urbin); | |
| 759 | + usbhid->intf->needs_remote_wakeup = 0; | |
| 760 | + } | |
| 748 | 761 | |
| 749 | − hid_cancel_delayed_stuff(usbhid); | |
| 750 | − usb_kill_urb(usbhid->urbin); | |
| 751 | − usbhid->intf->needs_remote_wakeup = 0; | |
| 762 | + mutex_unlock(&usbhid->mutex); | |
| 752 | 763 | } |
| 753 | 764 | |
| 754 | 765 | /* |
| @@ -1057,6 +1068,8 @@ static int usbhid_start(struct hid_device *hid) · 302 unmodified lines | ||
| 1057 | 1068 | unsigned int n, insize = 0; |
| 1058 | 1069 | int ret; |
| 1059 | 1070 | |
| 1071 | + mutex_lock(&usbhid->mutex); | |
| 1072 | + | |
| 1060 | 1073 | clear_bit(HID_DISCONNECTED, &usbhid->iofl); |
| 1061 | 1074 | |
| 1062 | 1075 | usbhid->bufsize = HID_MIN_BUFFER_SIZE; |
| @@ -1177,6 +1190,8 @@ static int usbhid_start(struct hid_device *hid) · 114 unmodified lines | ||
| 1177 | 1190 | usbhid_set_leds(hid); |
| 1178 | 1191 | device_set_wakeup_enable(&dev->dev, 1); |
| 1179 | 1192 | } |
| 1193 | + | |
| 1194 | + mutex_unlock(&usbhid->mutex); | |
| 1180 | 1195 | return 0; |
| 1181 | 1196 | |
| 1182 | 1197 | fail: |
| @@ -1187,6 +1202,7 @@ fail: · 4 unmodified lines | ||
| 1187 | 1202 | usbhid->urbout = NULL; |
| 1188 | 1203 | usbhid->urbctrl = NULL; |
| 1189 | 1204 | hid_free_buffers(dev, hid); |
| 1205 | + mutex_unlock(&usbhid->mutex); | |
| 1190 | 1206 | return ret; |
| 1191 | 1207 | } |
| 1192 | 1208 | |
| @@ -1202,6 +1218,8 @@ static void usbhid_stop(struct hid_device *hid) · 9 unmodified lines | ||
| 1202 | 1218 | usbhid->intf->needs_remote_wakeup = 0; |
| 1203 | 1219 | } |
| 1204 | 1220 | |
| 1221 | + mutex_lock(&usbhid->mutex); | |
| 1222 | + | |
| 1205 | 1223 | clear_bit(HID_STARTED, &usbhid->iofl); |
| 1206 | 1224 | spin_lock_irq(&usbhid->lock); /* Sync with error and led handlers */ |
| 1207 | 1225 | set_bit(HID_DISCONNECTED, &usbhid->iofl); |
| @@ -1222,6 +1240,8 @@ static void usbhid_stop(struct hid_device *hid) · 14 unmodified lines | ||
| 1222 | 1240 | usbhid->urbout = NULL; |
| 1223 | 1241 | |
| 1224 | 1242 | hid_free_buffers(hid_to_usb_dev(hid), hid); |
| 1243 | + | |
| 1244 | + mutex_unlock(&usbhid->mutex); | |
| 1225 | 1245 | } |
| 1226 | 1246 | |
| 1227 | 1247 | static int usbhid_power(struct hid_device *hid, int lvl) |
| @@ -1382,6 +1402,7 @@ static int usbhid_probe(struct usb_interface *intf, const struct usb_device_id * · 154 unmodified lines | ||
| 1382 | 1402 | INIT_WORK(&usbhid->reset_work, hid_reset); |
| 1383 | 1403 | timer_setup(&usbhid->io_retry, hid_retry_timeout, 0); |
| 1384 | 1404 | spin_lock_init(&usbhid->lock); |
| 1405 | + mutex_init(&usbhid->mutex); | |
| 1385 | 1406 | |
| 1386 | 1407 | ret = hid_add_device(hid); |
| 1387 | 1408 | if (ret) { |
| @@ -80,6 +80,7 @@ struct usbhid_device { · 79 unmodified lines | ||
| 80 | 80 | dma_addr_t outbuf_dma; /* Output buffer dma */ |
| 81 | 81 | unsigned long last_out; /* record of last output for timeouts */ |
| 82 | 82 | |
| 83 | + struct mutex mutex; /* start/stop/open/close */ | |
| 83 | 84 | spinlock_t lock; /* fifo spinlock */ |
| 84 | 85 | unsigned long iofl; /* I/O flags (CTRL_RUNNING, OUT_RUNNING) */ |
| 85 | 86 | struct timer_list io_retry; /* Retry timer */ |
| @@ -319,9 +319,11 @@ static void wacom_feature_mapping(struct hid_device *hdev, · 318 unmodified lines | ||
| 319 | 319 | data[0] = field->report->id; |
| 320 | 320 | ret = wacom_get_report(hdev, HID_FEATURE_REPORT, |
| 321 | 321 | data, n, WAC_CMD_RETRIES); |
| 322 | − if (ret == n) { | |
| 322 | + if (ret == n && features->type == HID_GENERIC) { | |
| 323 | 323 | ret = hid_report_raw_event(hdev, |
| 324 | 324 | HID_FEATURE_REPORT, data, n, 0); |
| 325 | + } else if (ret == 2 && features->type != HID_GENERIC) { | |
| 326 | + features->touch_max = data[1]; | |
| 325 | 327 | } else { |
| 326 | 328 | features->touch_max = 16; |
| 327 | 329 | hid_warn(hdev, "wacom_feature_mapping: " |
| @@ -1427,11 +1427,13 @@ static void wacom_intuos_pro2_bt_pad(struct wacom_wac *wacom) · 1426 unmodified lines | ||
| 1427 | 1427 | { |
| 1428 | 1428 | struct input_dev *pad_input = wacom->pad_input; |
| 1429 | 1429 | unsigned char *data = wacom->data; |
| 1430 | + int nbuttons = wacom->features.numbered_buttons; | |
| 1430 | 1431 | |
| 1431 | − int buttons = data[282] | ((data[281] & 0x40) << 2); | |
| 1432 | + int expresskeys = data[282]; | |
| 1433 | + int center = (data[281] & 0x40) >> 6; | |
| 1432 | 1434 | int ring = data[285] & 0x7F; |
| 1433 | 1435 | bool ringstatus = data[285] & 0x80; |
| 1434 | − bool prox = buttons || ringstatus; | |
| 1436 | + bool prox = expresskeys || center || ringstatus; | |
| 1435 | 1437 | |
| 1436 | 1438 | /* Fix touchring data: userspace expects 0 at left and increasing clockwise */ |
| 1437 | 1439 | ring = 71 - ring; |
| @@ -1439,7 +1441,8 @@ static void wacom_intuos_pro2_bt_pad(struct wacom_wac *wacom) · 1 unmodified line | ||
| 1439 | 1441 | if (ring > 71) |
| 1440 | 1442 | ring -= 72; |
| 1441 | 1443 | |
| 1442 | − wacom_report_numbered_buttons(pad_input, 9, buttons); | |
| 1444 | + wacom_report_numbered_buttons(pad_input, nbuttons, | |
| 1445 | + expresskeys | (center << (nbuttons - 1))); | |
| 1443 | 1446 | |
| 1444 | 1447 | input_report_abs(pad_input, ABS_WHEEL, ringstatus ? ring : 0); |
| 1445 | 1448 | |
| @@ -2637,9 +2640,25 @@ static void wacom_wac_finger_pre_report(struct hid_device *hdev, · 1191 unmodified lines | ||
| 2637 | 2640 | case HID_DG_TIPSWITCH: |
| 2638 | 2641 | hid_data->last_slot_field = equivalent_usage; |
| 2639 | 2642 | break; |
| 2643 | + case HID_DG_CONTACTCOUNT: | |
| 2644 | + hid_data->cc_report = report->id; | |
| 2645 | + hid_data->cc_index = i; | |
| 2646 | + hid_data->cc_value_index = j; | |
| 2647 | + break; | |
| 2640 | 2648 | } |
| 2641 | 2649 | } |
| 2642 | 2650 | } |
| 2651 | + | |
| 2652 | + if (hid_data->cc_report != 0 && | |
| 2653 | + hid_data->cc_index >= 0) { | |
| 2654 | + struct hid_field *field = report->field[hid_data->cc_index]; | |
| 2655 | + int value = field->value[hid_data->cc_value_index]; | |
| 2656 | + if (value) | |
| 2657 | + hid_data->num_expected = value; | |
| 2658 | + } | |
| 2659 | + else { | |
| 2660 | + hid_data->num_expected = wacom_wac->features.touch_max; | |
| 2661 | + } | |
| 2643 | 2662 | } |
| 2644 | 2663 | |
| 2645 | 2664 | static void wacom_wac_finger_report(struct hid_device *hdev, |
| @@ -2649,7 +2668,6 @@ static void wacom_wac_finger_report(struct hid_device *hdev, · 3 unmodified lines | ||
| 2649 | 2668 | struct wacom_wac *wacom_wac = &wacom->wacom_wac; |
| 2650 | 2669 | struct input_dev *input = wacom_wac->touch_input; |
| 2651 | 2670 | unsigned touch_max = wacom_wac->features.touch_max; |
| 2652 | − struct hid_data *hid_data = &wacom_wac->hid_data; | |
| 2653 | 2671 | |
| 2654 | 2672 | /* If more packets of data are expected, give us a chance to |
| 2655 | 2673 | * process them rather than immediately syncing a partial |
| @@ -2663,7 +2681,6 @@ static void wacom_wac_finger_report(struct hid_device *hdev, · 7 unmodified lines | ||
| 2663 | 2681 | |
| 2664 | 2682 | input_sync(input); |
| 2665 | 2683 | wacom_wac->hid_data.num_received = 0; |
| 2666 | − hid_data->num_expected = 0; | |
| 2667 | 2684 | |
| 2668 | 2685 | /* keep touch state for pen event */ |
| 2669 | 2686 | wacom_wac->shared->touch_down = wacom_wac_finger_count_touches(wacom_wac); |
| @@ -2738,73 +2755,12 @@ static void wacom_report_events(struct hid_device *hdev, · 68 unmodified lines | ||
| 2738 | 2755 | } |
| 2739 | 2756 | } |
| 2740 | 2757 | |
| 2741 | −static void wacom_set_num_expected(struct hid_device *hdev, | |
| 2742 | − struct hid_report *report, | |
| 2743 | − int collection_index, | |
| 2744 | − struct hid_field *field, | |
| 2745 | − int field_index) | |
| 2746 | −{ | |
| 2747 | − struct wacom *wacom = hid_get_drvdata(hdev); | |
| 2748 | − struct wacom_wac *wacom_wac = &wacom->wacom_wac; | |
| 2749 | − struct hid_data *hid_data = &wacom_wac->hid_data; | |
| 2750 | − unsigned int original_collection_level = | |
| 2751 | − hdev->collection[collection_index].level; | |
| 2752 | − bool end_collection = false; | |
| 2753 | − int i; | |
| 2754 | − | |
| 2755 | − if (hid_data->num_expected) | |
| 2756 | − return; | |
| 2757 | − | |
| 2758 | − // find the contact count value for this segment | |
| 2759 | − for (i = field_index; i < report->maxfield && !end_collection; i++) { | |
| 2760 | − struct hid_field *field = report->field[i]; | |
| 2761 | − unsigned int field_level = | |
| 2762 | − hdev->collection[field->usage[0].collection_index].level; | |
| 2763 | − unsigned int j; | |
| 2764 | − | |
| 2765 | − if (field_level != original_collection_level) | |
| 2766 | − continue; | |
| 2767 | − | |
| 2768 | − for (j = 0; j < field->maxusage; j++) { | |
| 2769 | − struct hid_usage *usage = &field->usage[j]; | |
| 2770 | − | |
| 2771 | − if (usage->collection_index != collection_index) { | |
| 2772 | − end_collection = true; | |
| 2773 | − break; | |
| 2774 | − } | |
| 2775 | − if (wacom_equivalent_usage(usage->hid) == HID_DG_CONTACTCOUNT) { | |
| 2776 | − hid_data->cc_report = report->id; | |
| 2777 | − hid_data->cc_index = i; | |
| 2778 | − hid_data->cc_value_index = j; | |
| 2779 | − | |
| 2780 | − if (hid_data->cc_report != 0 && | |
| 2781 | − hid_data->cc_index >= 0) { | |
| 2782 | − | |
| 2783 | − struct hid_field *field = | |
| 2784 | − report->field[hid_data->cc_index]; | |
| 2785 | − int value = | |
| 2786 | − field->value[hid_data->cc_value_index]; | |
| 2787 | − | |
| 2788 | − if (value) | |
| 2789 | − hid_data->num_expected = value; | |
| 2790 | − } | |
| 2791 | − } | |
| 2792 | − } | |
| 2793 | − } | |
| 2794 | − | |
| 2795 | − if (hid_data->cc_report == 0 || hid_data->cc_index < 0) | |
| 2796 | − hid_data->num_expected = wacom_wac->features.touch_max; | |
| 2797 | −} | |
| 2798 | − | |
| 2799 | 2758 | static int wacom_wac_collection(struct hid_device *hdev, struct hid_report *report, |
| 2800 | 2759 | int collection_index, struct hid_field *field, |
| 2801 | 2760 | int field_index) |
| 2802 | 2761 | { |
| 2803 | 2762 | struct wacom *wacom = hid_get_drvdata(hdev); |
| 2804 | 2763 | |
| 2805 | − if (WACOM_FINGER_FIELD(field)) | |
| 2806 | − wacom_set_num_expected(hdev, report, collection_index, field, | |
| 2807 | − field_index); | |
| 2808 | 2764 | wacom_report_events(hdev, report, collection_index, field_index); |
| 2809 | 2765 | |
| 2810 | 2766 | /* |
| @@ -184,11 +184,7 @@ void hv_synic_enable_regs(unsigned int cpu) · 183 unmodified lines | ||
| 184 | 184 | |
| 185 | 185 | shared_sint.vector = HYPERVISOR_CALLBACK_VECTOR; |
| 186 | 186 | shared_sint.masked = false; |
| 187 | − if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED) | |
| 188 | − shared_sint.auto_eoi = false; | |
| 189 | − else | |
| 190 | − shared_sint.auto_eoi = true; | |
| 191 | − | |
| 187 | + shared_sint.auto_eoi = hv_recommend_using_aeoi(); | |
| 192 | 188 | hv_set_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64); |
| 193 | 189 | |
| 194 | 190 | /* Enable the global synic bit */ |
| @@ -286,8 +286,8 @@ TRACE_EVENT(vmbus_send_tl_connect_request, · 285 unmodified lines | ||
| 286 | 286 | __field(int, ret) |
| 287 | 287 | ), |
| 288 | 288 | TP_fast_assign( |
| 289 | − memcpy(__entry->guest_id, &msg->guest_endpoint_id.b, 16); | |
| 290 | − memcpy(__entry->host_id, &msg->host_service_id.b, 16); | |
| 289 | + export_guid(__entry->guest_id, &msg->guest_endpoint_id); | |
| 290 | + export_guid(__entry->host_id, &msg->host_service_id); | |
| 291 | 291 | __entry->ret = ret; |
| 292 | 292 | ), |
| 293 | 293 | TP_printk("sending guest_endpoint_id %pUl, host_service_id %pUl, " |
| @@ -978,6 +978,9 @@ static int vmbus_resume(struct device *child_device) · 977 unmodified lines | ||
| 978 | 978 | |
| 979 | 979 | return drv->resume(dev); |
| 980 | 980 | } |
| 981 | +#else | |
| 982 | +#define vmbus_suspend NULL | |
| 983 | +#define vmbus_resume NULL | |
| 981 | 984 | #endif /* CONFIG_PM_SLEEP */ |
| 982 | 985 | |
| 983 | 986 | /* |
| @@ -997,11 +1000,22 @@ static void vmbus_device_release(struct device *device) · 13 unmodified lines | ||
| 997 | 1000 | } |
| 998 | 1001 | |
| 999 | 1002 | /* |
| 1000 | − * Note: we must use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS rather than | |
| 1001 | − * SET_SYSTEM_SLEEP_PM_OPS: see the comment before vmbus_bus_pm. | |
| 1003 | + * Note: we must use the "noirq" ops: see the comment before vmbus_bus_pm. | |
| 1004 | + * | |
| 1005 | + * suspend_noirq/resume_noirq are set to NULL to support Suspend-to-Idle: we | |
| 1006 | + * shouldn't suspend the vmbus devices upon Suspend-to-Idle, otherwise there | |
| 1007 | + * is no way to wake up a Generation-2 VM. | |
| 1008 | + * | |
| 1009 | + * The other 4 ops are for hibernation. | |
| 1002 | 1010 | */ |
| 1011 | + | |
| 1003 | 1012 | static const struct dev_pm_ops vmbus_pm = { |
| 1004 | − SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(vmbus_suspend, vmbus_resume) | |
| 1013 | + .suspend_noirq = NULL, | |
| 1014 | + .resume_noirq = NULL, | |
| 1015 | + .freeze_noirq = vmbus_suspend, | |
| 1016 | + .thaw_noirq = vmbus_resume, | |
| 1017 | + .poweroff_noirq = vmbus_suspend, | |
| 1018 | + .restore_noirq = vmbus_resume, | |
| 1005 | 1019 | }; |
| 1006 | 1020 | |
| 1007 | 1021 | /* The one and only one */ |
| @@ -2281,6 +2295,9 @@ static int vmbus_bus_resume(struct device *dev) · 1273 unmodified lines | ||
| 2281 | 2295 | |
| 2282 | 2296 | return 0; |
| 2283 | 2297 | } |
| 2298 | +#else | |
| 2299 | +#define vmbus_bus_suspend NULL | |
| 2300 | +#define vmbus_bus_resume NULL | |
| 2284 | 2301 | #endif /* CONFIG_PM_SLEEP */ |
| 2285 | 2302 | |
| 2286 | 2303 | static const struct acpi_device_id vmbus_acpi_device_ids[] = { |
| @@ -2291,16 +2308,24 @@ static const struct acpi_device_id vmbus_acpi_device_ids[] = { · 4 unmodified lines | ||
| 2291 | 2308 | MODULE_DEVICE_TABLE(acpi, vmbus_acpi_device_ids); |
| 2292 | 2309 | |
| 2293 | 2310 | /* |
| 2294 | − * Note: we must use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS rather than | |
| 2295 | − * SET_SYSTEM_SLEEP_PM_OPS, otherwise NIC SR-IOV can not work, because the | |
| 2296 | − * "pci_dev_pm_ops" uses the "noirq" callbacks: in the resume path, the | |
| 2297 | − * pci "noirq" restore callback runs before "non-noirq" callbacks (see | |
| 2311 | + * Note: we must use the "no_irq" ops, otherwise hibernation can not work with | |
| 2312 | + * PCI device assignment, because "pci_dev_pm_ops" uses the "noirq" ops: in | |
| 2313 | + * the resume path, the pci "noirq" restore op runs before "non-noirq" op (see | |
| 2298 | 2314 | * resume_target_kernel() -> dpm_resume_start(), and hibernation_restore() -> |
| 2299 | 2315 | * dpm_resume_end()). This means vmbus_bus_resume() and the pci-hyperv's |
| 2300 | − * resume callback must also run via the "noirq" callbacks. | |
| 2316 | + * resume callback must also run via the "noirq" ops. | |
| 2317 | + * | |
| 2318 | + * Set suspend_noirq/resume_noirq to NULL for Suspend-to-Idle: see the comment | |
| 2319 | + * earlier in this file before vmbus_pm. | |
| 2301 | 2320 | */ |
| 2321 | + | |
| 2302 | 2322 | static const struct dev_pm_ops vmbus_bus_pm = { |
| 2303 | − SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(vmbus_bus_suspend, vmbus_bus_resume) | |
| 2323 | + .suspend_noirq = NULL, | |
| 2324 | + .resume_noirq = NULL, | |
| 2325 | + .freeze_noirq = vmbus_bus_suspend, | |
| 2326 | + .thaw_noirq = vmbus_bus_resume, | |
| 2327 | + .poweroff_noirq = vmbus_bus_suspend, | |
| 2328 | + .restore_noirq = vmbus_bus_resume | |
| 2304 | 2329 | }; |
| 2305 | 2330 | |
| 2306 | 2331 | static struct acpi_driver vmbus_acpi_driver = { |
| @@ -349,12 +349,12 @@ static int amd_mp2_pci_probe(struct pci_dev *pci_dev, · 348 unmodified lines | ||
| 349 | 349 | if (!privdata) |
| 350 | 350 | return -ENOMEM; |
| 351 | 351 | |
| 352 | + privdata->pci_dev = pci_dev; | |
| 352 | 353 | rc = amd_mp2_pci_init(privdata, pci_dev); |
| 353 | 354 | if (rc) |
| 354 | 355 | return rc; |
| 355 | 356 | |
| 356 | 357 | mutex_init(&privdata->c2p_lock); |
| 357 | − privdata->pci_dev = pci_dev; | |
| 358 | 358 | |
| 359 | 359 | pm_runtime_set_autosuspend_delay(&pci_dev->dev, 1000); |
| 360 | 360 | pm_runtime_use_autosuspend(&pci_dev->dev); |
| @@ -603,6 +603,7 @@ static irqreturn_t aspeed_i2c_bus_irq(int irq, void *dev_id) · 602 unmodified lines | ||
| 603 | 603 | /* Ack all interrupts except for Rx done */ |
| 604 | 604 | writel(irq_received & ~ASPEED_I2CD_INTR_RX_DONE, |
| 605 | 605 | bus->base + ASPEED_I2C_INTR_STS_REG); |
| 606 | + readl(bus->base + ASPEED_I2C_INTR_STS_REG); | |
| 606 | 607 | irq_remaining = irq_received; |
| 607 | 608 | |
| 608 | 609 | #if IS_ENABLED(CONFIG_I2C_SLAVE) |
| @@ -645,9 +646,11 @@ static irqreturn_t aspeed_i2c_bus_irq(int irq, void *dev_id) · 36 unmodified lines | ||
| 645 | 646 | irq_received, irq_handled); |
| 646 | 647 | |
| 647 | 648 | /* Ack Rx done */ |
| 648 | − if (irq_received & ASPEED_I2CD_INTR_RX_DONE) | |
| 649 | + if (irq_received & ASPEED_I2CD_INTR_RX_DONE) { | |
| 649 | 650 | writel(ASPEED_I2CD_INTR_RX_DONE, |
| 650 | 651 | bus->base + ASPEED_I2C_INTR_STS_REG); |
| 652 | + readl(bus->base + ASPEED_I2C_INTR_STS_REG); | |
| 653 | + } | |
| 651 | 654 | spin_unlock(&bus->lock); |
| 652 | 655 | return irq_remaining ? IRQ_NONE : IRQ_HANDLED; |
| 653 | 656 | } |
| @@ -360,6 +360,9 @@ static bool bcm_iproc_i2c_slave_isr(struct bcm_iproc_i2c_dev *iproc_i2c, · 359 unmodified lines | ||
| 360 | 360 | value = (u8)((val >> S_RX_DATA_SHIFT) & S_RX_DATA_MASK); |
| 361 | 361 | i2c_slave_event(iproc_i2c->slave, |
| 362 | 362 | I2C_SLAVE_WRITE_RECEIVED, &value); |
| 363 | + if (rx_status == I2C_SLAVE_RX_END) | |
| 364 | + i2c_slave_event(iproc_i2c->slave, | |
| 365 | + I2C_SLAVE_STOP, &value); | |
| 363 | 366 | } |
| 364 | 367 | } else if (status & BIT(IS_S_TX_UNDERRUN_SHIFT)) { |
| 365 | 368 | /* Master read other than start */ |
| @@ -996,13 +996,14 @@ tegra_i2c_poll_completion_timeout(struct tegra_i2c_dev *i2c_dev, · 995 unmodified lines | ||
| 996 | 996 | do { |
| 997 | 997 | u32 status = i2c_readl(i2c_dev, I2C_INT_STATUS); |
| 998 | 998 | |
| 999 | − if (status) | |
| 999 | + if (status) { | |
| 1000 | 1000 | tegra_i2c_isr(i2c_dev->irq, i2c_dev); |
| 1001 | 1001 | |
| 1002 | − if (completion_done(complete)) { | |
| 1003 | − s64 delta = ktime_ms_delta(ktimeout, ktime); | |
| 1002 | + if (completion_done(complete)) { | |
| 1003 | + s64 delta = ktime_ms_delta(ktimeout, ktime); | |
| 1004 | 1004 | |
| 1005 | − return msecs_to_jiffies(delta) ?: 1; | |
| 1005 | + return msecs_to_jiffies(delta) ?: 1; | |
| 1006 | + } | |
| 1006 | 1007 | } |
| 1007 | 1008 | |
| 1008 | 1009 | ktime = ktime_get(); |
| @@ -1029,18 +1030,14 @@ tegra_i2c_wait_completion_timeout(struct tegra_i2c_dev *i2c_dev, · 20 unmodified lines | ||
| 1029 | 1030 | disable_irq(i2c_dev->irq); |
| 1030 | 1031 | |
| 1031 | 1032 | /* |
| 1032 | − * Under some rare circumstances (like running KASAN + | |
| 1033 | − * NFS root) CPU, which handles interrupt, may stuck in | |
| 1034 | − * uninterruptible state for a significant time. In this | |
| 1035 | − * case we will get timeout if I2C transfer is running on | |
| 1036 | − * a sibling CPU, despite of IRQ being raised. | |
| 1037 | − * | |
| 1038 | − * In order to handle this rare condition, the IRQ status | |
| 1039 | − * needs to be checked after timeout. | |
| 1033 | + * There is a chance that completion may happen after IRQ | |
| 1034 | + * synchronization, which is done by disable_irq(). | |
| 1040 | 1035 | */ |
| 1041 | − if (ret == 0) | |
| 1042 | − ret = tegra_i2c_poll_completion_timeout(i2c_dev, | |
| 1043 | − complete, 0); | |
| 1036 | + if (ret == 0 && completion_done(complete)) { | |
| 1037 | + dev_warn(i2c_dev->dev, | |
| 1038 | + "completion done after timeout\n"); | |
| 1039 | + ret = 1; | |
| 1040 | + } | |
| 1044 | 1041 | } |
| 1045 | 1042 | |
| 1046 | 1043 | return ret; |
| @@ -1219,15 +1216,6 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev, · 172 unmodified lines | ||
| 1219 | 1216 | time_left = tegra_i2c_wait_completion_timeout( |
| 1220 | 1217 | i2c_dev, &i2c_dev->dma_complete, xfer_time); |
| 1221 | 1218 | |
| 1222 | − /* | |
| 1223 | − * Synchronize DMA first, since dmaengine_terminate_sync() | |
| 1224 | − * performs synchronization after the transfer's termination | |
| 1225 | − * and we want to get a completion if transfer succeeded. | |
| 1226 | − */ | |
| 1227 | − dmaengine_synchronize(i2c_dev->msg_read ? | |
| 1228 | − i2c_dev->rx_dma_chan : | |
| 1229 | − i2c_dev->tx_dma_chan); | |
| 1230 | − | |
| 1231 | 1219 | dmaengine_terminate_sync(i2c_dev->msg_read ? |
| 1232 | 1220 | i2c_dev->rx_dma_chan : |
| 1233 | 1221 | i2c_dev->tx_dma_chan); |
| @@ -125,10 +125,10 @@ · 124 unmodified lines | ||
| 125 | 125 | #define AD7193_CH_AINCOM 0x600 /* AINCOM - AINCOM */ |
| 126 | 126 | |
| 127 | 127 | /* ID Register Bit Designations (AD7192_REG_ID) */ |
| 128 | −#define ID_AD7190 0x4 | |
| 129 | −#define ID_AD7192 0x0 | |
| 130 | −#define ID_AD7193 0x2 | |
| 131 | −#define ID_AD7195 0x6 | |
| 128 | +#define CHIPID_AD7190 0x4 | |
| 129 | +#define CHIPID_AD7192 0x0 | |
| 130 | +#define CHIPID_AD7193 0x2 | |
| 131 | +#define CHIPID_AD7195 0x6 | |
| 132 | 132 | #define AD7192_ID_MASK 0x0F |
| 133 | 133 | |
| 134 | 134 | /* GPOCON Register Bit Designations (AD7192_REG_GPOCON) */ |
| @@ -161,7 +161,20 @@ enum { · 26 unmodified lines | ||
| 161 | 161 | AD7192_SYSCALIB_FULL_SCALE, |
| 162 | 162 | }; |
| 163 | 163 | |
| 164 | +enum { | |
| 165 | + ID_AD7190, | |
| 166 | + ID_AD7192, | |
| 167 | + ID_AD7193, | |
| 168 | + ID_AD7195, | |
| 169 | +}; | |
| 170 | + | |
| 171 | +struct ad7192_chip_info { | |
| 172 | + unsigned int chip_id; | |
| 173 | + const char *name; | |
| 174 | +}; | |
| 175 | + | |
| 164 | 176 | struct ad7192_state { |
| 177 | + const struct ad7192_chip_info *chip_info; | |
| 165 | 178 | struct regulator *avdd; |
| 166 | 179 | struct regulator *dvdd; |
| 167 | 180 | struct clk *mclk; |
| @@ -172,7 +185,6 @@ struct ad7192_state { · 4 unmodified lines | ||
| 172 | 185 | u32 conf; |
| 173 | 186 | u32 scale_avail[8][2]; |
| 174 | 187 | u8 gpocon; |
| 175 | − u8 devid; | |
| 176 | 188 | u8 clock_sel; |
| 177 | 189 | struct mutex lock; /* protect sensor state */ |
| 178 | 190 | u8 syscalib_mode[8]; |
| @@ -348,7 +360,7 @@ static int ad7192_setup(struct ad7192_state *st, struct device_node *np) · 169 unmodified lines | ||
| 348 | 360 | |
| 349 | 361 | id &= AD7192_ID_MASK; |
| 350 | 362 | |
| 351 | − if (id != st->devid) | |
| 363 | + if (id != st->chip_info->chip_id) | |
| 352 | 364 | dev_warn(&st->sd.spi->dev, "device ID query failed (0x%X)\n", |
| 353 | 365 | id); |
| 354 | 366 | |
| @@ -363,7 +375,7 @@ static int ad7192_setup(struct ad7192_state *st, struct device_node *np) · 8 unmodified lines | ||
| 363 | 375 | st->mode |= AD7192_MODE_REJ60; |
| 364 | 376 | |
| 365 | 377 | refin2_en = of_property_read_bool(np, "adi,refin2-pins-enable"); |
| 366 | − if (refin2_en && st->devid != ID_AD7195) | |
| 378 | + if (refin2_en && st->chip_info->chip_id != CHIPID_AD7195) | |
| 367 | 379 | st->conf |= AD7192_CONF_REFSEL; |
| 368 | 380 | |
| 369 | 381 | st->conf &= ~AD7192_CONF_CHOP; |
| @@ -859,12 +871,31 @@ static const struct iio_chan_spec ad7193_channels[] = { · 489 unmodified lines | ||
| 859 | 871 | IIO_CHAN_SOFT_TIMESTAMP(14), |
| 860 | 872 | }; |
| 861 | 873 | |
| 874 | +static const struct ad7192_chip_info ad7192_chip_info_tbl[] = { | |
| 875 | + [ID_AD7190] = { | |
| 876 | + .chip_id = CHIPID_AD7190, | |
| 877 | + .name = "ad7190", | |
| 878 | + }, | |
| 879 | + [ID_AD7192] = { | |
| 880 | + .chip_id = CHIPID_AD7192, | |
| 881 | + .name = "ad7192", | |
| 882 | + }, | |
| 883 | + [ID_AD7193] = { | |
| 884 | + .chip_id = CHIPID_AD7193, | |
| 885 | + .name = "ad7193", | |
| 886 | + }, | |
| 887 | + [ID_AD7195] = { | |
| 888 | + .chip_id = CHIPID_AD7195, | |
| 889 | + .name = "ad7195", | |
| 890 | + }, | |
| 891 | +}; | |
| 892 | + | |
| 862 | 893 | static int ad7192_channels_config(struct iio_dev *indio_dev) |
| 863 | 894 | { |
| 864 | 895 | struct ad7192_state *st = iio_priv(indio_dev); |
| 865 | 896 | |
| 866 | − switch (st->devid) { | |
| 867 | − case ID_AD7193: | |
| 897 | + switch (st->chip_info->chip_id) { | |
| 898 | + case CHIPID_AD7193: | |
| 868 | 899 | indio_dev->channels = ad7193_channels; |
| 869 | 900 | indio_dev->num_channels = ARRAY_SIZE(ad7193_channels); |
| 870 | 901 | break; |
| @@ -878,10 +909,10 @@ static int ad7192_channels_config(struct iio_dev *indio_dev) · 7 unmodified lines | ||
| 878 | 909 | } |
| 879 | 910 | |
| 880 | 911 | static const struct of_device_id ad7192_of_match[] = { |
| 881 | − { .compatible = "adi,ad7190", .data = (void *)ID_AD7190 }, | |
| 882 | − { .compatible = "adi,ad7192", .data = (void *)ID_AD7192 }, | |
| 883 | − { .compatible = "adi,ad7193", .data = (void *)ID_AD7193 }, | |
| 884 | − { .compatible = "adi,ad7195", .data = (void *)ID_AD7195 }, | |
| 912 | + { .compatible = "adi,ad7190", .data = &ad7192_chip_info_tbl[ID_AD7190] }, | |
| 913 | + { .compatible = "adi,ad7192", .data = &ad7192_chip_info_tbl[ID_AD7192] }, | |
| 914 | + { .compatible = "adi,ad7193", .data = &ad7192_chip_info_tbl[ID_AD7193] }, | |
| 915 | + { .compatible = "adi,ad7195", .data = &ad7192_chip_info_tbl[ID_AD7195] }, | |
| 885 | 916 | {} |
| 886 | 917 | }; |
| 887 | 918 | MODULE_DEVICE_TABLE(of, ad7192_of_match); |
| @@ -938,16 +969,16 @@ static int ad7192_probe(struct spi_device *spi) · 50 unmodified lines | ||
| 938 | 969 | } |
| 939 | 970 | |
| 940 | 971 | spi_set_drvdata(spi, indio_dev); |
| 941 | − st->devid = (unsigned long)of_device_get_match_data(&spi->dev); | |
| 972 | + st->chip_info = of_device_get_match_data(&spi->dev); | |
| 942 | 973 | indio_dev->dev.parent = &spi->dev; |
| 943 | − indio_dev->name = spi_get_device_id(spi)->name; | |
| 974 | + indio_dev->name = st->chip_info->name; | |
| 944 | 975 | indio_dev->modes = INDIO_DIRECT_MODE; |
| 945 | 976 | |
| 946 | 977 | ret = ad7192_channels_config(indio_dev); |
| 947 | 978 | if (ret < 0) |
| 948 | 979 | goto error_disable_dvdd; |
| 949 | 980 | |
| 950 | − if (st->devid == ID_AD7195) | |
| 981 | + if (st->chip_info->chip_id == CHIPID_AD7195) | |
| 951 | 982 | indio_dev->info = &ad7195_info; |
| 952 | 983 | else |
| 953 | 984 | indio_dev->info = &ad7192_info; |
| @@ -542,7 +542,7 @@ static const struct iio_info ad7797_info = { · 541 unmodified lines | ||
| 542 | 542 | .read_raw = &ad7793_read_raw, |
| 543 | 543 | .write_raw = &ad7793_write_raw, |
| 544 | 544 | .write_raw_get_fmt = &ad7793_write_raw_get_fmt, |
| 545 | − .attrs = &ad7793_attribute_group, | |
| 545 | + .attrs = &ad7797_attribute_group, | |
| 546 | 546 | .validate_trigger = ad_sd_validate_trigger, |
| 547 | 547 | }; |
| 548 | 548 | |
| @@ -1418,8 +1418,30 @@ static unsigned int stm32_adc_dma_residue(struct stm32_adc *adc) · 1417 unmodified lines | ||
| 1418 | 1418 | static void stm32_adc_dma_buffer_done(void *data) |
| 1419 | 1419 | { |
| 1420 | 1420 | struct iio_dev *indio_dev = data; |
| 1421 | + struct stm32_adc *adc = iio_priv(indio_dev); | |
| 1422 | + int residue = stm32_adc_dma_residue(adc); | |
| 1423 | + | |
| 1424 | + /* | |
| 1425 | + * In DMA mode the trigger services of IIO are not used | |
| 1426 | + * (e.g. no call to iio_trigger_poll). | |
| 1427 | + * Calling irq handler associated to the hardware trigger is not | |
| 1428 | + * relevant as the conversions have already been done. Data | |
| 1429 | + * transfers are performed directly in DMA callback instead. | |
| 1430 | + * This implementation avoids to call trigger irq handler that | |
| 1431 | + * may sleep, in an atomic context (DMA irq handler context). | |
| 1432 | + */ | |
| 1433 | + dev_dbg(&indio_dev->dev, "%s bufi=%d\n", __func__, adc->bufi); | |
| 1421 | 1434 | |
| 1422 | − iio_trigger_poll_chained(indio_dev->trig); | |
| 1435 | + while (residue >= indio_dev->scan_bytes) { | |
| 1436 | + u16 *buffer = (u16 *)&adc->rx_buf[adc->bufi]; | |
| 1437 | + | |
| 1438 | + iio_push_to_buffers(indio_dev, buffer); | |
| 1439 | + | |
| 1440 | + residue -= indio_dev->scan_bytes; | |
| 1441 | + adc->bufi += indio_dev->scan_bytes; | |
| 1442 | + if (adc->bufi >= adc->rx_buf_sz) | |
| 1443 | + adc->bufi = 0; | |
| 1444 | + } | |
| 1423 | 1445 | } |
| 1424 | 1446 | |
| 1425 | 1447 | static int stm32_adc_dma_start(struct iio_dev *indio_dev) |
| @@ -1845,6 +1867,7 @@ static int stm32_adc_probe(struct platform_device *pdev) · 419 unmodified lines | ||
| 1845 | 1867 | { |
| 1846 | 1868 | struct iio_dev *indio_dev; |
| 1847 | 1869 | struct device *dev = &pdev->dev; |
| 1870 | + irqreturn_t (*handler)(int irq, void *p) = NULL; | |
| 1848 | 1871 | struct stm32_adc *adc; |
| 1849 | 1872 | int ret; |
| 1850 | 1873 | |
| @@ -1911,9 +1934,11 @@ static int stm32_adc_probe(struct platform_device *pdev) · 60 unmodified lines | ||
| 1911 | 1934 | if (ret < 0) |
| 1912 | 1935 | return ret; |
| 1913 | 1936 | |
| 1937 | + if (!adc->dma_chan) | |
| 1938 | + handler = &stm32_adc_trigger_handler; | |
| 1939 | + | |
| 1914 | 1940 | ret = iio_triggered_buffer_setup(indio_dev, |
| 1915 | − &iio_pollfunc_store_time, | |
| 1916 | − &stm32_adc_trigger_handler, | |
| 1941 | + &iio_pollfunc_store_time, handler, | |
| 1917 | 1942 | &stm32_adc_buffer_setup_ops); |
| 1918 | 1943 | if (ret) { |
| 1919 | 1944 | dev_err(&pdev->dev, "buffer setup failed\n"); |
| @@ -29,7 +29,7 @@ struct ads8344 { · 28 unmodified lines | ||
| 29 | 29 | struct mutex lock; |
| 30 | 30 | |
| 31 | 31 | u8 tx_buf ____cacheline_aligned; |
| 32 | − u16 rx_buf; | |
| 32 | + u8 rx_buf[3]; | |
| 33 | 33 | }; |
| 34 | 34 | |
| 35 | 35 | #define ADS8344_VOLTAGE_CHANNEL(chan, si) \ |
| @@ -89,11 +89,11 @@ static int ads8344_adc_conversion(struct ads8344 *adc, int channel, · 53 unmodified lines | ||
| 89 | 89 | |
| 90 | 90 | udelay(9); |
| 91 | 91 | |
| 92 | − ret = spi_read(spi, &adc->rx_buf, 2); | |
| 92 | + ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf)); | |
| 93 | 93 | if (ret) |
| 94 | 94 | return ret; |
| 95 | 95 | |
| 96 | − return adc->rx_buf; | |
| 96 | + return adc->rx_buf[0] << 9 | adc->rx_buf[1] << 1 | adc->rx_buf[2] >> 7; | |
| 97 | 97 | } |
| 98 | 98 | |
| 99 | 99 | static int ads8344_read_raw(struct iio_dev *iio, |
| @@ -102,6 +102,16 @@ static const unsigned int XADC_ZYNQ_UNMASK_TIMEOUT = 500; · 101 unmodified lines | ||
| 102 | 102 | |
| 103 | 103 | #define XADC_FLAGS_BUFFERED BIT(0) |
| 104 | 104 | |
| 105 | +/* | |
| 106 | + * The XADC hardware supports a samplerate of up to 1MSPS. Unfortunately it does | |
| 107 | + * not have a hardware FIFO. Which means an interrupt is generated for each | |
| 108 | + * conversion sequence. At 1MSPS sample rate the CPU in ZYNQ7000 is completely | |
| 109 | + * overloaded by the interrupts that it soft-lockups. For this reason the driver | |
| 110 | + * limits the maximum samplerate 150kSPS. At this rate the CPU is fairly busy, | |
| 111 | + * but still responsive. | |
| 112 | + */ | |
| 113 | +#define XADC_MAX_SAMPLERATE 150000 | |
| 114 | + | |
| 105 | 115 | static void xadc_write_reg(struct xadc *xadc, unsigned int reg, |
| 106 | 116 | uint32_t val) |
| 107 | 117 | { |
| @@ -674,7 +684,7 @@ static int xadc_trigger_set_state(struct iio_trigger *trigger, bool state) · 566 unmodified lines | ||
| 674 | 684 | |
| 675 | 685 | spin_lock_irqsave(&xadc->lock, flags); |
| 676 | 686 | xadc_read_reg(xadc, XADC_AXI_REG_IPIER, &val); |
| 677 | − xadc_write_reg(xadc, XADC_AXI_REG_IPISR, val & XADC_AXI_INT_EOS); | |
| 687 | + xadc_write_reg(xadc, XADC_AXI_REG_IPISR, XADC_AXI_INT_EOS); | |
| 678 | 688 | if (state) |
| 679 | 689 | val |= XADC_AXI_INT_EOS; |
| 680 | 690 | else |
| @@ -722,13 +732,14 @@ static int xadc_power_adc_b(struct xadc *xadc, unsigned int seq_mode) · 41 unmodified lines | ||
| 722 | 732 | { |
| 723 | 733 | uint16_t val; |
| 724 | 734 | |
| 735 | + /* Powerdown the ADC-B when it is not needed. */ | |
| 725 | 736 | switch (seq_mode) { |
| 726 | 737 | case XADC_CONF1_SEQ_SIMULTANEOUS: |
| 727 | 738 | case XADC_CONF1_SEQ_INDEPENDENT: |
| 728 | − val = XADC_CONF2_PD_ADC_B; | |
| 739 | + val = 0; | |
| 729 | 740 | break; |
| 730 | 741 | default: |
| 731 | − val = 0; | |
| 742 | + val = XADC_CONF2_PD_ADC_B; | |
| 732 | 743 | break; |
| 733 | 744 | } |
| 734 | 745 | |
| @@ -797,6 +808,16 @@ static int xadc_preenable(struct iio_dev *indio_dev) · 62 unmodified lines | ||
| 797 | 808 | if (ret) |
| 798 | 809 | goto err; |
| 799 | 810 | |
| 811 | + /* | |
| 812 | + * In simultaneous mode the upper and lower aux channels are samples at | |
| 813 | + * the same time. In this mode the upper 8 bits in the sequencer | |
| 814 | + * register are don't care and the lower 8 bits control two channels | |
| 815 | + * each. As such we must set the bit if either the channel in the lower | |
| 816 | + * group or the upper group is enabled. | |
| 817 | + */ | |
| 818 | + if (seq_mode == XADC_CONF1_SEQ_SIMULTANEOUS) | |
| 819 | + scan_mask = ((scan_mask >> 8) | scan_mask) & 0xff0000; | |
| 820 | + | |
| 800 | 821 | ret = xadc_write_adc_reg(xadc, XADC_REG_SEQ(1), scan_mask >> 16); |
| 801 | 822 | if (ret) |
| 802 | 823 | goto err; |
| @@ -823,11 +844,27 @@ static const struct iio_buffer_setup_ops xadc_buffer_ops = { · 20 unmodified lines | ||
| 823 | 844 | .postdisable = &xadc_postdisable, |
| 824 | 845 | }; |
| 825 | 846 | |
| 847 | +static int xadc_read_samplerate(struct xadc *xadc) | |
| 848 | +{ | |
| 849 | + unsigned int div; | |
| 850 | + uint16_t val16; | |
| 851 | + int ret; | |
| 852 | + | |
| 853 | + ret = xadc_read_adc_reg(xadc, XADC_REG_CONF2, &val16); | |
| 854 | + if (ret) | |
| 855 | + return ret; | |
| 856 | + | |
| 857 | + div = (val16 & XADC_CONF2_DIV_MASK) >> XADC_CONF2_DIV_OFFSET; | |
| 858 | + if (div < 2) | |
| 859 | + div = 2; | |
| 860 | + | |
| 861 | + return xadc_get_dclk_rate(xadc) / div / 26; | |
| 862 | +} | |
| 863 | + | |
| 826 | 864 | static int xadc_read_raw(struct iio_dev *indio_dev, |
| 827 | 865 | struct iio_chan_spec const *chan, int *val, int *val2, long info) |
| 828 | 866 | { |
| 829 | 867 | struct xadc *xadc = iio_priv(indio_dev); |
| 830 | − unsigned int div; | |
| 831 | 868 | uint16_t val16; |
| 832 | 869 | int ret; |
| 833 | 870 | |
| @@ -880,41 +917,31 @@ static int xadc_read_raw(struct iio_dev *indio_dev, · 46 unmodified lines | ||
| 880 | 917 | *val = -((273150 << 12) / 503975); |
| 881 | 918 | return IIO_VAL_INT; |
| 882 | 919 | case IIO_CHAN_INFO_SAMP_FREQ: |
| 883 | − ret = xadc_read_adc_reg(xadc, XADC_REG_CONF2, &val16); | |
| 884 | − if (ret) | |
| 920 | + ret = xadc_read_samplerate(xadc); | |
| 921 | + if (ret < 0) | |
| 885 | 922 | return ret; |
| 886 | 923 | |
| 887 | − div = (val16 & XADC_CONF2_DIV_MASK) >> XADC_CONF2_DIV_OFFSET; | |
| 888 | − if (div < 2) | |
| 889 | − div = 2; | |
| 890 | − | |
| 891 | − *val = xadc_get_dclk_rate(xadc) / div / 26; | |
| 892 | − | |
| 924 | + *val = ret; | |
| 893 | 925 | return IIO_VAL_INT; |
| 894 | 926 | default: |
| 895 | 927 | return -EINVAL; |
| 896 | 928 | } |
| 897 | 929 | } |
| 898 | 930 | |
| 899 | −static int xadc_write_raw(struct iio_dev *indio_dev, | |
| 900 | − struct iio_chan_spec const *chan, int val, int val2, long info) | |
| 931 | +static int xadc_write_samplerate(struct xadc *xadc, int val) | |
| 901 | 932 | { |
| 902 | − struct xadc *xadc = iio_priv(indio_dev); | |
| 903 | 933 | unsigned long clk_rate = xadc_get_dclk_rate(xadc); |
| 904 | 934 | unsigned int div; |
| 905 | 935 | |
| 906 | 936 | if (!clk_rate) |
| 907 | 937 | return -EINVAL; |
| 908 | 938 | |
| 909 | − if (info != IIO_CHAN_INFO_SAMP_FREQ) | |
| 910 | − return -EINVAL; | |
| 911 | − | |
| 912 | 939 | if (val <= 0) |
| 913 | 940 | return -EINVAL; |
| 914 | 941 | |
| 915 | 942 | /* Max. 150 kSPS */ |
| 916 | − if (val > 150000) | |
| 917 | − val = 150000; | |
| 943 | + if (val > XADC_MAX_SAMPLERATE) | |
| 944 | + val = XADC_MAX_SAMPLERATE; | |
| 918 | 945 | |
| 919 | 946 | val *= 26; |
| 920 | 947 | |
| @@ -927,7 +954,7 @@ static int xadc_write_raw(struct iio_dev *indio_dev, · 6 unmodified lines | ||
| 927 | 954 | * limit. |
| 928 | 955 | */ |
| 929 | 956 | div = clk_rate / val; |
| 930 | − if (clk_rate / div / 26 > 150000) | |
| 957 | + if (clk_rate / div / 26 > XADC_MAX_SAMPLERATE) | |
| 931 | 958 | div++; |
| 932 | 959 | if (div < 2) |
| 933 | 960 | div = 2; |
| @@ -938,6 +965,17 @@ static int xadc_write_raw(struct iio_dev *indio_dev, · 4 unmodified lines | ||
| 938 | 965 | div << XADC_CONF2_DIV_OFFSET); |
| 939 | 966 | } |
| 940 | 967 | |
| 968 | +static int xadc_write_raw(struct iio_dev *indio_dev, | |
| 969 | + struct iio_chan_spec const *chan, int val, int val2, long info) | |
| 970 | +{ | |
| 971 | + struct xadc *xadc = iio_priv(indio_dev); | |
| 972 | + | |
| 973 | + if (info != IIO_CHAN_INFO_SAMP_FREQ) | |
| 974 | + return -EINVAL; | |
| 975 | + | |
| 976 | + return xadc_write_samplerate(xadc, val); | |
| 977 | +} | |
| 978 | + | |
| 941 | 979 | static const struct iio_event_spec xadc_temp_events[] = { |
| 942 | 980 | { |
| 943 | 981 | .type = IIO_EV_TYPE_THRESH, |
| @@ -1223,6 +1261,21 @@ static int xadc_probe(struct platform_device *pdev) · 279 unmodified lines | ||
| 1223 | 1261 | if (ret) |
| 1224 | 1262 | goto err_free_samplerate_trigger; |
| 1225 | 1263 | |
| 1264 | + /* | |
| 1265 | + * Make sure not to exceed the maximum samplerate since otherwise the | |
| 1266 | + * resulting interrupt storm will soft-lock the system. | |
| 1267 | + */ | |
| 1268 | + if (xadc->ops->flags & XADC_FLAGS_BUFFERED) { | |
| 1269 | + ret = xadc_read_samplerate(xadc); | |
| 1270 | + if (ret < 0) | |
| 1271 | + goto err_free_samplerate_trigger; | |
| 1272 | + if (ret > XADC_MAX_SAMPLERATE) { | |
| 1273 | + ret = xadc_write_samplerate(xadc, XADC_MAX_SAMPLERATE); | |
| 1274 | + if (ret < 0) | |
| 1275 | + goto err_free_samplerate_trigger; | |
| 1276 | + } | |
| 1277 | + } | |
| 1278 | + | |
| 1226 | 1279 | ret = request_irq(xadc->irq, xadc->ops->interrupt_handler, 0, |
| 1227 | 1280 | dev_name(&pdev->dev), indio_dev); |
| 1228 | 1281 | if (ret) |
| @@ -79,7 +79,7 @@ int st_sensors_set_odr(struct iio_dev *indio_dev, unsigned int odr) · 78 unmodified lines | ||
| 79 | 79 | struct st_sensor_odr_avl odr_out = {0, 0}; |
| 80 | 80 | struct st_sensor_data *sdata = iio_priv(indio_dev); |
| 81 | 81 | |
| 82 | − if (!sdata->sensor_settings->odr.addr) | |
| 82 | + if (!sdata->sensor_settings->odr.mask) | |
| 83 | 83 | return 0; |
| 84 | 84 | |
| 85 | 85 | err = st_sensors_match_odr(sdata->sensor_settings, odr, &odr_out); |
| @@ -525,7 +525,7 @@ static int ad5770r_channel_config(struct ad5770r_state *st) · 524 unmodified lines | ||
| 525 | 525 | ret = fwnode_property_read_u32(child, "num", &num); |
| 526 | 526 | if (ret) |
| 527 | 527 | return ret; |
| 528 | − if (num > AD5770R_MAX_CHANNELS) | |
| 528 | + if (num >= AD5770R_MAX_CHANNELS) | |
| 529 | 529 | return -EINVAL; |
| 530 | 530 | |
| 531 | 531 | ret = fwnode_property_read_u32_array(child, |
| @@ -1617,6 +1617,10 @@ static int __maybe_unused inv_mpu_resume(struct device *dev) · 1616 unmodified lines | ||
| 1617 | 1617 | if (result) |
| 1618 | 1618 | goto out_unlock; |
| 1619 | 1619 | |
| 1620 | + pm_runtime_disable(dev); | |
| 1621 | + pm_runtime_set_active(dev); | |
| 1622 | + pm_runtime_enable(dev); | |
| 1623 | + | |
| 1620 | 1624 | result = inv_mpu6050_switch_engine(st, true, st->suspended_sensors); |
| 1621 | 1625 | if (result) |
| 1622 | 1626 | goto out_unlock; |
| @@ -1638,13 +1642,18 @@ static int __maybe_unused inv_mpu_suspend(struct device *dev) · 15 unmodified lines | ||
| 1638 | 1642 | |
| 1639 | 1643 | mutex_lock(&st->lock); |
| 1640 | 1644 | |
| 1645 | + st->suspended_sensors = 0; | |
| 1646 | + if (pm_runtime_suspended(dev)) { | |
| 1647 | + result = 0; | |
| 1648 | + goto out_unlock; | |
| 1649 | + } | |
| 1650 | + | |
| 1641 | 1651 | if (iio_buffer_enabled(indio_dev)) { |
| 1642 | 1652 | result = inv_mpu6050_prepare_fifo(st, false); |
| 1643 | 1653 | if (result) |
| 1644 | 1654 | goto out_unlock; |
| 1645 | 1655 | } |
| 1646 | 1656 | |
| 1647 | − st->suspended_sensors = 0; | |
| 1648 | 1657 | if (st->chip_config.accl_en) |
| 1649 | 1658 | st->suspended_sensors |= INV_MPU6050_SENSOR_ACCL; |
| 1650 | 1659 | if (st->chip_config.gyro_en) |
| @@ -337,6 +337,7 @@ enum st_lsm6dsx_fifo_mode { · 336 unmodified lines | ||
| 337 | 337 | * @gain: Configured sensor sensitivity. |
| 338 | 338 | * @odr: Output data rate of the sensor [Hz]. |
| 339 | 339 | * @watermark: Sensor watermark level. |
| 340 | + * @decimator: Sensor decimation factor. | |
| 340 | 341 | * @sip: Number of samples in a given pattern. |
| 341 | 342 | * @ts_ref: Sensor timestamp reference for hw one. |
| 342 | 343 | * @ext_info: Sensor settings if it is connected to i2c controller |
| @@ -350,11 +351,13 @@ struct st_lsm6dsx_sensor { · 7 unmodified lines | ||
| 350 | 351 | u32 odr; |
| 351 | 352 | |
| 352 | 353 | u16 watermark; |
| 354 | + u8 decimator; | |
| 353 | 355 | u8 sip; |
| 354 | 356 | s64 ts_ref; |
| 355 | 357 | |
| 356 | 358 | struct { |
| 357 | 359 | const struct st_lsm6dsx_ext_dev_settings *settings; |
| 360 | + u32 slv_odr; | |
| 358 | 361 | u8 addr; |
| 359 | 362 | } ext_info; |
| 360 | 363 | }; |
| @@ -93,6 +93,7 @@ st_lsm6dsx_get_decimator_val(struct st_lsm6dsx_sensor *sensor, u32 max_odr) · 92 unmodified lines | ||
| 93 | 93 | break; |
| 94 | 94 | } |
| 95 | 95 | |
| 96 | + sensor->decimator = decimator; | |
| 96 | 97 | return i == max_size ? 0 : st_lsm6dsx_decimator_table[i].val; |
| 97 | 98 | } |
| 98 | 99 | |
| @@ -337,7 +338,7 @@ static inline int st_lsm6dsx_read_block(struct st_lsm6dsx_hw *hw, u8 addr, · 238 unmodified lines | ||
| 337 | 338 | int st_lsm6dsx_read_fifo(struct st_lsm6dsx_hw *hw) |
| 338 | 339 | { |
| 339 | 340 | struct st_lsm6dsx_sensor *acc_sensor, *gyro_sensor, *ext_sensor = NULL; |
| 340 | − int err, acc_sip, gyro_sip, ts_sip, ext_sip, read_len, offset; | |
| 341 | + int err, sip, acc_sip, gyro_sip, ts_sip, ext_sip, read_len, offset; | |
| 341 | 342 | u16 fifo_len, pattern_len = hw->sip * ST_LSM6DSX_SAMPLE_SIZE; |
| 342 | 343 | u16 fifo_diff_mask = hw->settings->fifo_ops.fifo_diff.mask; |
| 343 | 344 | u8 gyro_buff[ST_LSM6DSX_IIO_BUFF_SIZE]; |
| @@ -399,19 +400,20 @@ int st_lsm6dsx_read_fifo(struct st_lsm6dsx_hw *hw) · 55 unmodified lines | ||
| 399 | 400 | acc_sip = acc_sensor->sip; |
| 400 | 401 | ts_sip = hw->ts_sip; |
| 401 | 402 | offset = 0; |
| 403 | + sip = 0; | |
| 402 | 404 | |
| 403 | 405 | while (acc_sip > 0 || gyro_sip > 0 || ext_sip > 0) { |
| 404 | − if (gyro_sip > 0) { | |
| 406 | + if (gyro_sip > 0 && !(sip % gyro_sensor->decimator)) { | |
| 405 | 407 | memcpy(gyro_buff, &hw->buff[offset], |
| 406 | 408 | ST_LSM6DSX_SAMPLE_SIZE); |
| 407 | 409 | offset += ST_LSM6DSX_SAMPLE_SIZE; |
| 408 | 410 | } |
| 409 | − if (acc_sip > 0) { | |
| 411 | + if (acc_sip > 0 && !(sip % acc_sensor->decimator)) { | |
| 410 | 412 | memcpy(acc_buff, &hw->buff[offset], |
| 411 | 413 | ST_LSM6DSX_SAMPLE_SIZE); |
| 412 | 414 | offset += ST_LSM6DSX_SAMPLE_SIZE; |
| 413 | 415 | } |
| 414 | − if (ext_sip > 0) { | |
| 416 | + if (ext_sip > 0 && !(sip % ext_sensor->decimator)) { | |
| 415 | 417 | memcpy(ext_buff, &hw->buff[offset], |
| 416 | 418 | ST_LSM6DSX_SAMPLE_SIZE); |
| 417 | 419 | offset += ST_LSM6DSX_SAMPLE_SIZE; |
| @@ -441,18 +443,25 @@ int st_lsm6dsx_read_fifo(struct st_lsm6dsx_hw *hw) · 23 unmodified lines | ||
| 441 | 443 | offset += ST_LSM6DSX_SAMPLE_SIZE; |
| 442 | 444 | } |
| 443 | 445 | |
| 444 | − if (gyro_sip-- > 0) | |
| 446 | + if (gyro_sip > 0 && !(sip % gyro_sensor->decimator)) { | |
| 445 | 447 | iio_push_to_buffers_with_timestamp( |
| 446 | 448 | hw->iio_devs[ST_LSM6DSX_ID_GYRO], |
| 447 | 449 | gyro_buff, gyro_sensor->ts_ref + ts); |
| 448 | − if (acc_sip-- > 0) | |
| 450 | + gyro_sip--; | |
| 451 | + } | |
| 452 | + if (acc_sip > 0 && !(sip % acc_sensor->decimator)) { | |
| 449 | 453 | iio_push_to_buffers_with_timestamp( |
| 450 | 454 | hw->iio_devs[ST_LSM6DSX_ID_ACC], |
| 451 | 455 | acc_buff, acc_sensor->ts_ref + ts); |
| 452 | − if (ext_sip-- > 0) | |
| 456 | + acc_sip--; | |
| 457 | + } | |
| 458 | + if (ext_sip > 0 && !(sip % ext_sensor->decimator)) { | |
| 453 | 459 | iio_push_to_buffers_with_timestamp( |
| 454 | 460 | hw->iio_devs[ST_LSM6DSX_ID_EXT0], |
| 455 | 461 | ext_buff, ext_sensor->ts_ref + ts); |
| 462 | + ext_sip--; | |
| 463 | + } | |
| 464 | + sip++; | |
| 456 | 465 | } |
| 457 | 466 | } |
| 458 | 467 | |
| @@ -2036,11 +2036,21 @@ static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw) · 2035 unmodified lines | ||
| 2036 | 2036 | return 0; |
| 2037 | 2037 | } |
| 2038 | 2038 | |
| 2039 | −static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw) | |
| 2039 | +static int st_lsm6dsx_reset_device(struct st_lsm6dsx_hw *hw) | |
| 2040 | 2040 | { |
| 2041 | 2041 | const struct st_lsm6dsx_reg *reg; |
| 2042 | 2042 | int err; |
| 2043 | 2043 | |
| 2044 | + /* | |
| 2045 | + * flush hw FIFO before device reset in order to avoid | |
| 2046 | + * possible races on interrupt line 1. If the first interrupt | |
| 2047 | + * line is asserted during hw reset the device will work in | |
| 2048 | + * I3C-only mode (if it is supported) | |
| 2049 | + */ | |
| 2050 | + err = st_lsm6dsx_flush_fifo(hw); | |
| 2051 | + if (err < 0 && err != -ENOTSUPP) | |
| 2052 | + return err; | |
| 2053 | + | |
| 2044 | 2054 | /* device sw reset */ |
| 2045 | 2055 | reg = &hw->settings->reset; |
| 2046 | 2056 | err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, |
| @@ -2059,6 +2069,18 @@ static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw) · 12 unmodified lines | ||
| 2059 | 2069 | |
| 2060 | 2070 | msleep(50); |
| 2061 | 2071 | |
| 2072 | + return 0; | |
| 2073 | +} | |
| 2074 | + | |
| 2075 | +static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw) | |
| 2076 | +{ | |
| 2077 | + const struct st_lsm6dsx_reg *reg; | |
| 2078 | + int err; | |
| 2079 | + | |
| 2080 | + err = st_lsm6dsx_reset_device(hw); | |
| 2081 | + if (err < 0) | |
| 2082 | + return err; | |
| 2083 | + | |
| 2062 | 2084 | /* enable Block Data Update */ |
| 2063 | 2085 | reg = &hw->settings->bdu; |
| 2064 | 2086 | err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, |
| @@ -421,7 +421,8 @@ int st_lsm6dsx_shub_set_enable(struct st_lsm6dsx_sensor *sensor, bool enable) · 420 unmodified lines | ||
| 421 | 421 | |
| 422 | 422 | settings = sensor->ext_info.settings; |
| 423 | 423 | if (enable) { |
| 424 | − err = st_lsm6dsx_shub_set_odr(sensor, sensor->odr); | |
| 424 | + err = st_lsm6dsx_shub_set_odr(sensor, | |
| 425 | + sensor->ext_info.slv_odr); | |
| 425 | 426 | if (err < 0) |
| 426 | 427 | return err; |
| 427 | 428 | } else { |
| @@ -459,7 +460,7 @@ st_lsm6dsx_shub_read_oneshot(struct st_lsm6dsx_sensor *sensor, · 31 unmodified lines | ||
| 459 | 460 | if (err < 0) |
| 460 | 461 | return err; |
| 461 | 462 | |
| 462 | − delay = 1000000000 / sensor->odr; | |
| 463 | + delay = 1000000000 / sensor->ext_info.slv_odr; | |
| 463 | 464 | usleep_range(delay, 2 * delay); |
| 464 | 465 | |
| 465 | 466 | len = min_t(int, sizeof(data), ch->scan_type.realbits >> 3); |
| @@ -500,8 +501,8 @@ st_lsm6dsx_shub_read_raw(struct iio_dev *iio_dev, · 34 unmodified lines | ||
| 500 | 501 | iio_device_release_direct_mode(iio_dev); |
| 501 | 502 | break; |
| 502 | 503 | case IIO_CHAN_INFO_SAMP_FREQ: |
| 503 | − *val = sensor->odr / 1000; | |
| 504 | − *val2 = (sensor->odr % 1000) * 1000; | |
| 504 | + *val = sensor->ext_info.slv_odr / 1000; | |
| 505 | + *val2 = (sensor->ext_info.slv_odr % 1000) * 1000; | |
| 505 | 506 | ret = IIO_VAL_INT_PLUS_MICRO; |
| 506 | 507 | break; |
| 507 | 508 | case IIO_CHAN_INFO_SCALE: |
| @@ -535,8 +536,20 @@ st_lsm6dsx_shub_write_raw(struct iio_dev *iio_dev, · 27 unmodified lines | ||
| 535 | 536 | |
| 536 | 537 | val = val * 1000 + val2 / 1000; |
| 537 | 538 | err = st_lsm6dsx_shub_get_odr_val(sensor, val, &data); |
| 538 | − if (!err) | |
| 539 | − sensor->odr = val; | |
| 539 | + if (!err) { | |
| 540 | + struct st_lsm6dsx_hw *hw = sensor->hw; | |
| 541 | + struct st_lsm6dsx_sensor *ref_sensor; | |
| 542 | + u8 odr_val; | |
| 543 | + int odr; | |
| 544 | + | |
| 545 | + ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]); | |
| 546 | + odr = st_lsm6dsx_check_odr(ref_sensor, val, &odr_val); | |
| 547 | + if (odr < 0) | |
| 548 | + return odr; | |
| 549 | + | |
| 550 | + sensor->ext_info.slv_odr = val; | |
| 551 | + sensor->odr = odr; | |
| 552 | + } | |
| 540 | 553 | break; |
| 541 | 554 | } |
| 542 | 555 | default: |
| @@ -613,6 +626,7 @@ st_lsm6dsx_shub_alloc_iiodev(struct st_lsm6dsx_hw *hw, · 70 unmodified lines | ||
| 613 | 626 | const struct st_lsm6dsx_ext_dev_settings *info, |
| 614 | 627 | u8 i2c_addr, const char *name) |
| 615 | 628 | { |
| 629 | + enum st_lsm6dsx_sensor_id ref_id = ST_LSM6DSX_ID_ACC; | |
| 616 | 630 | struct iio_chan_spec *ext_channels; |
| 617 | 631 | struct st_lsm6dsx_sensor *sensor; |
| 618 | 632 | struct iio_dev *iio_dev; |
| @@ -628,7 +642,8 @@ st_lsm6dsx_shub_alloc_iiodev(struct st_lsm6dsx_hw *hw, · 9 unmodified lines | ||
| 628 | 642 | sensor = iio_priv(iio_dev); |
| 629 | 643 | sensor->id = id; |
| 630 | 644 | sensor->hw = hw; |
| 631 | − sensor->odr = info->odr_table.odr_avl[0].milli_hz; | |
| 645 | + sensor->odr = hw->settings->odr_table[ref_id].odr_avl[0].milli_hz; | |
| 646 | + sensor->ext_info.slv_odr = info->odr_table.odr_avl[0].milli_hz; | |
| 632 | 647 | sensor->gain = info->fs_table.fs_avl[0].gain; |
| 633 | 648 | sensor->ext_info.settings = info; |
| 634 | 649 | sensor->ext_info.addr = i2c_addr; |
| @@ -915,14 +915,11 @@ static ssize_t iio_write_channel_info(struct device *dev, · 914 unmodified lines | ||
| 915 | 915 | return -EINVAL; |
| 916 | 916 | integer = ch; |
| 917 | 917 | } else { |
| 918 | − ret = iio_str_to_fixpoint(buf, fract_mult, &integer, &fract); | |
| 918 | + ret = __iio_str_to_fixpoint(buf, fract_mult, &integer, &fract, | |
| 919 | + scale_db); | |
| 919 | 920 | if (ret) |
| 920 | 921 | return ret; |
| 921 | 922 | } |
| 922 | − ret = __iio_str_to_fixpoint(buf, fract_mult, &integer, &fract, | |
| 923 | − scale_db); | |
| 924 | − if (ret) | |
| 925 | − return ret; | |
| 926 | 923 | |
| 927 | 924 | ret = indio_dev->info->write_raw(indio_dev, this_attr->c, |
| 928 | 925 | integer, fract, this_attr->address); |
| @@ -862,7 +862,7 @@ static struct cm_id_private *cm_alloc_id_priv(struct ib_device *device, · 861 unmodified lines | ||
| 862 | 862 | |
| 863 | 863 | ret = xa_alloc_cyclic_irq(&cm.local_id_table, &id, NULL, xa_limit_32b, |
| 864 | 864 | &cm.local_id_next, GFP_KERNEL); |
| 865 | − if (ret) | |
| 865 | + if (ret < 0) | |
| 866 | 866 | goto error; |
| 867 | 867 | cm_id_priv->id.local_id = (__force __be32)id ^ cm.random_id_operand; |
| 868 | 868 | |
| @@ -1828,11 +1828,9 @@ static void cm_format_mra(struct cm_mra_msg *mra_msg, · 959 unmodified lines | ||
| 1828 | 1828 | |
| 1829 | 1829 | static void cm_format_rej(struct cm_rej_msg *rej_msg, |
| 1830 | 1830 | struct cm_id_private *cm_id_priv, |
| 1831 | − enum ib_cm_rej_reason reason, | |
| 1832 | − void *ari, | |
| 1833 | − u8 ari_length, | |
| 1834 | − const void *private_data, | |
| 1835 | − u8 private_data_len) | |
| 1831 | + enum ib_cm_rej_reason reason, void *ari, | |
| 1832 | + u8 ari_length, const void *private_data, | |
| 1833 | + u8 private_data_len, enum ib_cm_state state) | |
| 1836 | 1834 | { |
| 1837 | 1835 | lockdep_assert_held(&cm_id_priv->lock); |
| 1838 | 1836 | |
| @@ -1840,7 +1838,7 @@ static void cm_format_rej(struct cm_rej_msg *rej_msg, · 1 unmodified line | ||
| 1840 | 1838 | IBA_SET(CM_REJ_REMOTE_COMM_ID, rej_msg, |
| 1841 | 1839 | be32_to_cpu(cm_id_priv->id.remote_id)); |
| 1842 | 1840 | |
| 1843 | − switch(cm_id_priv->id.state) { | |
| 1841 | + switch (state) { | |
| 1844 | 1842 | case IB_CM_REQ_RCVD: |
| 1845 | 1843 | IBA_SET(CM_REJ_LOCAL_COMM_ID, rej_msg, be32_to_cpu(0)); |
| 1846 | 1844 | IBA_SET(CM_REJ_MESSAGE_REJECTED, rej_msg, CM_MSG_RESPONSE_REQ); |
| @@ -1905,8 +1903,9 @@ static void cm_dup_req_handler(struct cm_work *work, · 58 unmodified lines | ||
| 1905 | 1903 | cm_id_priv->private_data_len); |
| 1906 | 1904 | break; |
| 1907 | 1905 | case IB_CM_TIMEWAIT: |
| 1908 | − cm_format_rej((struct cm_rej_msg *) msg->mad, cm_id_priv, | |
| 1909 | − IB_CM_REJ_STALE_CONN, NULL, 0, NULL, 0); | |
| 1906 | + cm_format_rej((struct cm_rej_msg *)msg->mad, cm_id_priv, | |
| 1907 | + IB_CM_REJ_STALE_CONN, NULL, 0, NULL, 0, | |
| 1908 | + IB_CM_TIMEWAIT); | |
| 1910 | 1909 | break; |
| 1911 | 1910 | default: |
| 1912 | 1911 | goto unlock; |
| @@ -2904,6 +2903,7 @@ static int cm_send_rej_locked(struct cm_id_private *cm_id_priv, · 991 unmodified lines | ||
| 2904 | 2903 | u8 ari_length, const void *private_data, |
| 2905 | 2904 | u8 private_data_len) |
| 2906 | 2905 | { |
| 2906 | + enum ib_cm_state state = cm_id_priv->id.state; | |
| 2907 | 2907 | struct ib_mad_send_buf *msg; |
| 2908 | 2908 | int ret; |
| 2909 | 2909 | |
| @@ -2913,7 +2913,7 @@ static int cm_send_rej_locked(struct cm_id_private *cm_id_priv, · 3 unmodified lines | ||
| 2913 | 2913 | (ari && ari_length > IB_CM_REJ_ARI_LENGTH)) |
| 2914 | 2914 | return -EINVAL; |
| 2915 | 2915 | |
| 2916 | − switch (cm_id_priv->id.state) { | |
| 2916 | + switch (state) { | |
| 2917 | 2917 | case IB_CM_REQ_SENT: |
| 2918 | 2918 | case IB_CM_MRA_REQ_RCVD: |
| 2919 | 2919 | case IB_CM_REQ_RCVD: |
| @@ -2925,7 +2925,8 @@ static int cm_send_rej_locked(struct cm_id_private *cm_id_priv, · 5 unmodified lines | ||
| 2925 | 2925 | if (ret) |
| 2926 | 2926 | return ret; |
| 2927 | 2927 | cm_format_rej((struct cm_rej_msg *)msg->mad, cm_id_priv, reason, |
| 2928 | − ari, ari_length, private_data, private_data_len); | |
| 2928 | + ari, ari_length, private_data, private_data_len, | |
| 2929 | + state); | |
| 2929 | 2930 | break; |
| 2930 | 2931 | case IB_CM_REP_SENT: |
| 2931 | 2932 | case IB_CM_MRA_REP_RCVD: |
| @@ -2934,7 +2935,8 @@ static int cm_send_rej_locked(struct cm_id_private *cm_id_priv, · 2 unmodified lines | ||
| 2934 | 2935 | if (ret) |
| 2935 | 2936 | return ret; |
| 2936 | 2937 | cm_format_rej((struct cm_rej_msg *)msg->mad, cm_id_priv, reason, |
| 2937 | − ari, ari_length, private_data, private_data_len); | |
| 2938 | + ari, ari_length, private_data, private_data_len, | |
| 2939 | + state); | |
| 2938 | 2940 | break; |
| 2939 | 2941 | default: |
| 2940 | 2942 | pr_debug("%s: local_id %d, cm_id->state: %d\n", __func__, |
| @@ -360,7 +360,7 @@ lookup_get_fd_uobject(const struct uverbs_api_object *obj, · 359 unmodified lines | ||
| 360 | 360 | * uverbs_uobject_fd_release(), and the caller is expected to ensure |
| 361 | 361 | * that release is never done while a call to lookup is possible. |
| 362 | 362 | */ |
| 363 | − if (f->f_op != fd_type->fops) { | |
| 363 | + if (f->f_op != fd_type->fops || uobject->ufile != ufile) { | |
| 364 | 364 | fput(f); |
| 365 | 365 | return ERR_PTR(-EBADF); |
| 366 | 366 | } |
| @@ -474,16 +474,15 @@ alloc_begin_fd_uobject(const struct uverbs_api_object *obj, · 107 unmodified lines | ||
| 474 | 474 | filp = anon_inode_getfile(fd_type->name, fd_type->fops, NULL, |
| 475 | 475 | fd_type->flags); |
| 476 | 476 | if (IS_ERR(filp)) { |
| 477 | + uverbs_uobject_put(uobj); | |
| 477 | 478 | uobj = ERR_CAST(filp); |
| 478 | − goto err_uobj; | |
| 479 | + goto err_fd; | |
| 479 | 480 | } |
| 480 | 481 | uobj->object = filp; |
| 481 | 482 | |
| 482 | 483 | uobj->id = new_fd; |
| 483 | 484 | return uobj; |
| 484 | 485 | |
| 485 | −err_uobj: | |
| 486 | − uverbs_uobject_put(uobj); | |
| 487 | 486 | err_fd: |
| 488 | 487 | put_unused_fd(new_fd); |
| 489 | 488 | return uobj; |
| @@ -679,7 +678,6 @@ void rdma_lookup_put_uobject(struct ib_uobject *uobj, · 189 unmodified lines | ||
| 679 | 678 | enum rdma_lookup_mode mode) |
| 680 | 679 | { |
| 681 | 680 | assert_uverbs_usecnt(uobj, mode); |
| 682 | − uobj->uapi_object->type_class->lookup_put(uobj, mode); | |
| 683 | 681 | /* |
| 684 | 682 | * In order to unlock an object, either decrease its usecnt for |
| 685 | 683 | * read access or zero it in case of exclusive access. See |
| @@ -696,6 +694,7 @@ void rdma_lookup_put_uobject(struct ib_uobject *uobj, · 10 unmodified lines | ||
| 696 | 694 | break; |
| 697 | 695 | } |
| 698 | 696 | |
| 697 | + uobj->uapi_object->type_class->lookup_put(uobj, mode); | |
| 699 | 698 | /* Pairs with the kref obtained by type->lookup_get */ |
| 700 | 699 | uverbs_uobject_put(uobj); |
| 701 | 700 | } |
| @@ -820,6 +820,10 @@ void uverbs_user_mmap_disassociate(struct ib_uverbs_file *ufile) · 819 unmodified lines | ||
| 820 | 820 | ret = mmget_not_zero(mm); |
| 821 | 821 | if (!ret) { |
| 822 | 822 | list_del_init(&priv->list); |
| 823 | + if (priv->entry) { | |
| 824 | + rdma_user_mmap_entry_put(priv->entry); | |
| 825 | + priv->entry = NULL; | |
| 826 | + } | |
| 823 | 827 | mm = NULL; |
| 824 | 828 | continue; |
| 825 | 829 | } |
| @@ -1046,7 +1046,7 @@ i40iw_sc_query_rdma_features(struct i40iw_sc_cqp *cqp, · 1045 unmodified lines | ||
| 1046 | 1046 | u64 header; |
| 1047 | 1047 | |
| 1048 | 1048 | wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch); |
| 1049 | − if (wqe) | |
| 1049 | + if (!wqe) | |
| 1050 | 1050 | return I40IW_ERR_RING_FULL; |
| 1051 | 1051 | |
| 1052 | 1052 | set_64bit_val(wqe, 32, feat_mem->pa); |
| @@ -1499,8 +1499,9 @@ static int __mlx4_ib_create_default_rules( · 1498 unmodified lines | ||
| 1499 | 1499 | int i; |
| 1500 | 1500 | |
| 1501 | 1501 | for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) { |
| 1502 | + union ib_flow_spec ib_spec = {}; | |
| 1502 | 1503 | int ret; |
| 1503 | − union ib_flow_spec ib_spec; | |
| 1504 | + | |
| 1504 | 1505 | switch (pdefault_rules->rules_create_list[i]) { |
| 1505 | 1506 | case 0: |
| 1506 | 1507 | /* no rule */ |
| @@ -5558,7 +5558,9 @@ static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, · 5557 unmodified lines | ||
| 5558 | 5558 | rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); |
| 5559 | 5559 | rdma_ah_set_static_rate(ah_attr, |
| 5560 | 5560 | path->static_rate ? path->static_rate - 5 : 0); |
| 5561 | − if (path->grh_mlid & (1 << 7)) { | |
| 5561 | + | |
| 5562 | + if (path->grh_mlid & (1 << 7) || | |
| 5563 | + ah_attr->type == RDMA_AH_ATTR_TYPE_ROCE) { | |
| 5562 | 5564 | u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); |
| 5563 | 5565 | |
| 5564 | 5566 | rdma_ah_set_grh(ah_attr, NULL, |
| @@ -248,8 +248,8 @@ int rvt_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr, · 247 unmodified lines | ||
| 248 | 248 | */ |
| 249 | 249 | if (udata && udata->outlen >= sizeof(__u64)) { |
| 250 | 250 | cq->ip = rvt_create_mmap_info(rdi, sz, udata, u_wc); |
| 251 | − if (!cq->ip) { | |
| 252 | − err = -ENOMEM; | |
| 251 | + if (IS_ERR(cq->ip)) { | |
| 252 | + err = PTR_ERR(cq->ip); | |
| 253 | 253 | goto bail_wc; |
| 254 | 254 | } |
| 255 | 255 | |
| @@ -154,7 +154,7 @@ done: · 153 unmodified lines | ||
| 154 | 154 | * @udata: user data (must be valid!) |
| 155 | 155 | * @obj: opaque pointer to a cq, wq etc |
| 156 | 156 | * |
| 157 | − * Return: rvt_mmap struct on success | |
| 157 | + * Return: rvt_mmap struct on success, ERR_PTR on failure | |
| 158 | 158 | */ |
| 159 | 159 | struct rvt_mmap_info *rvt_create_mmap_info(struct rvt_dev_info *rdi, u32 size, |
| 160 | 160 | struct ib_udata *udata, void *obj) |
| @@ -166,7 +166,7 @@ struct rvt_mmap_info *rvt_create_mmap_info(struct rvt_dev_info *rdi, u32 size, · 5 unmodified lines | ||
| 166 | 166 | |
| 167 | 167 | ip = kmalloc_node(sizeof(*ip), GFP_KERNEL, rdi->dparms.node); |
| 168 | 168 | if (!ip) |
| 169 | − return ip; | |
| 169 | + return ERR_PTR(-ENOMEM); | |
| 170 | 170 | |
| 171 | 171 | size = PAGE_ALIGN(size); |
| 172 | 172 | |
| @@ -1244,8 +1244,8 @@ struct ib_qp *rvt_create_qp(struct ib_pd *ibpd, · 1243 unmodified lines | ||
| 1244 | 1244 | |
| 1245 | 1245 | qp->ip = rvt_create_mmap_info(rdi, s, udata, |
| 1246 | 1246 | qp->r_rq.wq); |
| 1247 | − if (!qp->ip) { | |
| 1248 | − ret = ERR_PTR(-ENOMEM); | |
| 1247 | + if (IS_ERR(qp->ip)) { | |
| 1248 | + ret = ERR_CAST(qp->ip); | |
| 1249 | 1249 | goto bail_qpn; |
| 1250 | 1250 | } |
| 1251 | 1251 | |
| @@ -111,8 +111,8 @@ int rvt_create_srq(struct ib_srq *ibsrq, struct ib_srq_init_attr *srq_init_attr, · 110 unmodified lines | ||
| 111 | 111 | u32 s = sizeof(struct rvt_rwq) + srq->rq.size * sz; |
| 112 | 112 | |
| 113 | 113 | srq->ip = rvt_create_mmap_info(dev, s, udata, srq->rq.wq); |
| 114 | − if (!srq->ip) { | |
| 115 | − ret = -ENOMEM; | |
| 114 | + if (IS_ERR(srq->ip)) { | |
| 115 | + ret = PTR_ERR(srq->ip); | |
| 116 | 116 | goto bail_wq; |
| 117 | 117 | } |
| 118 | 118 | |
| @@ -920,20 +920,27 @@ static int siw_fastreg_mr(struct ib_pd *pd, struct siw_sqe *sqe) · 919 unmodified lines | ||
| 920 | 920 | { |
| 921 | 921 | struct ib_mr *base_mr = (struct ib_mr *)(uintptr_t)sqe->base_mr; |
| 922 | 922 | struct siw_device *sdev = to_siw_dev(pd->device); |
| 923 | − struct siw_mem *mem = siw_mem_id2obj(sdev, sqe->rkey >> 8); | |
| 923 | + struct siw_mem *mem; | |
| 924 | 924 | int rv = 0; |
| 925 | 925 | |
| 926 | 926 | siw_dbg_pd(pd, "STag 0x%08x\n", sqe->rkey); |
| 927 | 927 | |
| 928 | − if (unlikely(!mem || !base_mr)) { | |
| 928 | + if (unlikely(!base_mr)) { | |
| 929 | 929 | pr_warn("siw: fastreg: STag 0x%08x unknown\n", sqe->rkey); |
| 930 | 930 | return -EINVAL; |
| 931 | 931 | } |
| 932 | + | |
| 932 | 933 | if (unlikely(base_mr->rkey >> 8 != sqe->rkey >> 8)) { |
| 933 | 934 | pr_warn("siw: fastreg: STag 0x%08x: bad MR\n", sqe->rkey); |
| 934 | − rv = -EINVAL; | |
| 935 | − goto out; | |
| 935 | + return -EINVAL; | |
| 936 | 936 | } |
| 937 | + | |
| 938 | + mem = siw_mem_id2obj(sdev, sqe->rkey >> 8); | |
| 939 | + if (unlikely(!mem)) { | |
| 940 | + pr_warn("siw: fastreg: STag 0x%08x unknown\n", sqe->rkey); | |
| 941 | + return -EINVAL; | |
| 942 | + } | |
| 943 | + | |
| 937 | 944 | if (unlikely(mem->pd != pd)) { |
| 938 | 945 | pr_warn("siw: fastreg: PD mismatch\n"); |
| 939 | 946 | rv = -EINVAL; |
| @@ -96,6 +96,8 @@ static inline void tcs_cmd_gen(struct tcs_cmd *cmd, u64 vote_x, u64 vote_y, · 95 unmodified lines | ||
| 96 | 96 | if (!cmd) |
| 97 | 97 | return; |
| 98 | 98 | |
| 99 | + memset(cmd, 0, sizeof(*cmd)); | |
| 100 | + | |
| 99 | 101 | if (vote_x == 0 && vote_y == 0) |
| 100 | 102 | valid = false; |
| 101 | 103 | |
| @@ -112,8 +114,7 @@ static inline void tcs_cmd_gen(struct tcs_cmd *cmd, u64 vote_x, u64 vote_y, · 10 unmodified lines | ||
| 112 | 114 | * Set the wait for completion flag on command that need to be completed |
| 113 | 115 | * before the next command. |
| 114 | 116 | */ |
| 115 | − if (commit) | |
| 116 | − cmd->wait = true; | |
| 117 | + cmd->wait = commit; | |
| 117 | 118 | } |
| 118 | 119 | |
| 119 | 120 | static void tcs_list_gen(struct list_head *bcm_list, int bucket, |
| @@ -78,7 +78,7 @@ static struct qcom_icc_node *sdm845_osm_l3_nodes[] = { · 77 unmodified lines | ||
| 78 | 78 | [SLAVE_OSM_L3] = &sdm845_osm_l3, |
| 79 | 79 | }; |
| 80 | 80 | |
| 81 | −const static struct qcom_icc_desc sdm845_icc_osm_l3 = { | |
| 81 | +static const struct qcom_icc_desc sdm845_icc_osm_l3 = { | |
| 82 | 82 | .nodes = sdm845_osm_l3_nodes, |
| 83 | 83 | .num_nodes = ARRAY_SIZE(sdm845_osm_l3_nodes), |
| 84 | 84 | }; |
| @@ -91,7 +91,7 @@ static struct qcom_icc_node *sc7180_osm_l3_nodes[] = { · 6 unmodified lines | ||
| 91 | 91 | [SLAVE_OSM_L3] = &sc7180_osm_l3, |
| 92 | 92 | }; |
| 93 | 93 | |
| 94 | −const static struct qcom_icc_desc sc7180_icc_osm_l3 = { | |
| 94 | +static const struct qcom_icc_desc sc7180_icc_osm_l3 = { | |
| 95 | 95 | .nodes = sc7180_osm_l3_nodes, |
| 96 | 96 | .num_nodes = ARRAY_SIZE(sc7180_osm_l3_nodes), |
| 97 | 97 | }; |
| @@ -192,7 +192,7 @@ static struct qcom_icc_node *aggre1_noc_nodes[] = { · 191 unmodified lines | ||
| 192 | 192 | [SLAVE_ANOC_PCIE_A1NOC_SNOC] = &qns_pcie_a1noc_snoc, |
| 193 | 193 | }; |
| 194 | 194 | |
| 195 | −const static struct qcom_icc_desc sdm845_aggre1_noc = { | |
| 195 | +static const struct qcom_icc_desc sdm845_aggre1_noc = { | |
| 196 | 196 | .nodes = aggre1_noc_nodes, |
| 197 | 197 | .num_nodes = ARRAY_SIZE(aggre1_noc_nodes), |
| 198 | 198 | .bcms = aggre1_noc_bcms, |
| @@ -220,7 +220,7 @@ static struct qcom_icc_node *aggre2_noc_nodes[] = { · 21 unmodified lines | ||
| 220 | 220 | [SLAVE_SERVICE_A2NOC] = &srvc_aggre2_noc, |
| 221 | 221 | }; |
| 222 | 222 | |
| 223 | −const static struct qcom_icc_desc sdm845_aggre2_noc = { | |
| 223 | +static const struct qcom_icc_desc sdm845_aggre2_noc = { | |
| 224 | 224 | .nodes = aggre2_noc_nodes, |
| 225 | 225 | .num_nodes = ARRAY_SIZE(aggre2_noc_nodes), |
| 226 | 226 | .bcms = aggre2_noc_bcms, |
| @@ -281,7 +281,7 @@ static struct qcom_icc_node *config_noc_nodes[] = { · 54 unmodified lines | ||
| 281 | 281 | [SLAVE_SERVICE_CNOC] = &srvc_cnoc, |
| 282 | 282 | }; |
| 283 | 283 | |
| 284 | −const static struct qcom_icc_desc sdm845_config_noc = { | |
| 284 | +static const struct qcom_icc_desc sdm845_config_noc = { | |
| 285 | 285 | .nodes = config_noc_nodes, |
| 286 | 286 | .num_nodes = ARRAY_SIZE(config_noc_nodes), |
| 287 | 287 | .bcms = config_noc_bcms, |
| @@ -297,7 +297,7 @@ static struct qcom_icc_node *dc_noc_nodes[] = { · 9 unmodified lines | ||
| 297 | 297 | [SLAVE_MEM_NOC_CFG] = &qhs_memnoc, |
| 298 | 298 | }; |
| 299 | 299 | |
| 300 | −const static struct qcom_icc_desc sdm845_dc_noc = { | |
| 300 | +static const struct qcom_icc_desc sdm845_dc_noc = { | |
| 301 | 301 | .nodes = dc_noc_nodes, |
| 302 | 302 | .num_nodes = ARRAY_SIZE(dc_noc_nodes), |
| 303 | 303 | .bcms = dc_noc_bcms, |
| @@ -315,7 +315,7 @@ static struct qcom_icc_node *gladiator_noc_nodes[] = { · 11 unmodified lines | ||
| 315 | 315 | [SLAVE_SERVICE_GNOC] = &srvc_gnoc, |
| 316 | 316 | }; |
| 317 | 317 | |
| 318 | −const static struct qcom_icc_desc sdm845_gladiator_noc = { | |
| 318 | +static const struct qcom_icc_desc sdm845_gladiator_noc = { | |
| 319 | 319 | .nodes = gladiator_noc_nodes, |
| 320 | 320 | .num_nodes = ARRAY_SIZE(gladiator_noc_nodes), |
| 321 | 321 | .bcms = gladiator_noc_bcms, |
| @@ -350,7 +350,7 @@ static struct qcom_icc_node *mem_noc_nodes[] = { · 28 unmodified lines | ||
| 350 | 350 | [SLAVE_EBI1] = &ebi, |
| 351 | 351 | }; |
| 352 | 352 | |
| 353 | −const static struct qcom_icc_desc sdm845_mem_noc = { | |
| 353 | +static const struct qcom_icc_desc sdm845_mem_noc = { | |
| 354 | 354 | .nodes = mem_noc_nodes, |
| 355 | 355 | .num_nodes = ARRAY_SIZE(mem_noc_nodes), |
| 356 | 356 | .bcms = mem_noc_bcms, |
| @@ -384,7 +384,7 @@ static struct qcom_icc_node *mmss_noc_nodes[] = { · 27 unmodified lines | ||
| 384 | 384 | [SLAVE_CAMNOC_UNCOMP] = &qns_camnoc_uncomp, |
| 385 | 385 | }; |
| 386 | 386 | |
| 387 | −const static struct qcom_icc_desc sdm845_mmss_noc = { | |
| 387 | +static const struct qcom_icc_desc sdm845_mmss_noc = { | |
| 388 | 388 | .nodes = mmss_noc_nodes, |
| 389 | 389 | .num_nodes = ARRAY_SIZE(mmss_noc_nodes), |
| 390 | 390 | .bcms = mmss_noc_bcms, |
| @@ -430,7 +430,7 @@ static struct qcom_icc_node *system_noc_nodes[] = { · 39 unmodified lines | ||
| 430 | 430 | [SLAVE_TCU] = &xs_sys_tcu_cfg, |
| 431 | 431 | }; |
| 432 | 432 | |
| 433 | −const static struct qcom_icc_desc sdm845_system_noc = { | |
| 433 | +static const struct qcom_icc_desc sdm845_system_noc = { | |
| 434 | 434 | .nodes = system_noc_nodes, |
| 435 | 435 | .num_nodes = ARRAY_SIZE(system_noc_nodes), |
| 436 | 436 | .bcms = system_noc_bcms, |
| @@ -362,7 +362,7 @@ config IPMMU_VMSA · 361 unmodified lines | ||
| 362 | 362 | |
| 363 | 363 | config SPAPR_TCE_IOMMU |
| 364 | 364 | bool "sPAPR TCE IOMMU Support" |
| 365 | − depends on PPC_POWERNV || PPC_PSERIES || (PPC && COMPILE_TEST) | |
| 365 | + depends on PPC_POWERNV || PPC_PSERIES | |
| 366 | 366 | select IOMMU_API |
| 367 | 367 | help |
| 368 | 368 | Enables bits of IOMMU API required by VFIO. The iommu_ops |
| @@ -457,7 +457,7 @@ config S390_AP_IOMMU · 88 unmodified lines | ||
| 457 | 457 | |
| 458 | 458 | config MTK_IOMMU |
| 459 | 459 | bool "MTK IOMMU Support" |
| 460 | − depends on ARM || ARM64 || COMPILE_TEST | |
| 460 | + depends on HAS_DMA | |
| 461 | 461 | depends on ARCH_MEDIATEK || COMPILE_TEST |
| 462 | 462 | select ARM_DMA_USE_IOMMU |
| 463 | 463 | select IOMMU_API |
| @@ -101,6 +101,8 @@ struct kmem_cache *amd_iommu_irq_cache; · 100 unmodified lines | ||
| 101 | 101 | static void update_domain(struct protection_domain *domain); |
| 102 | 102 | static int protection_domain_init(struct protection_domain *domain); |
| 103 | 103 | static void detach_device(struct device *dev); |
| 104 | +static void update_and_flush_device_table(struct protection_domain *domain, | |
| 105 | + struct domain_pgtable *pgtable); | |
| 104 | 106 | |
| 105 | 107 | /**************************************************************************** |
| 106 | 108 | * |
| @@ -151,6 +153,26 @@ static struct protection_domain *to_pdomain(struct iommu_domain *dom) · 44 unmodified lines | ||
| 151 | 153 | return container_of(dom, struct protection_domain, domain); |
| 152 | 154 | } |
| 153 | 155 | |
| 156 | +static void amd_iommu_domain_get_pgtable(struct protection_domain *domain, | |
| 157 | + struct domain_pgtable *pgtable) | |
| 158 | +{ | |
| 159 | + u64 pt_root = atomic64_read(&domain->pt_root); | |
| 160 | + | |
| 161 | + pgtable->root = (u64 *)(pt_root & PAGE_MASK); | |
| 162 | + pgtable->mode = pt_root & 7; /* lowest 3 bits encode pgtable mode */ | |
| 163 | +} | |
| 164 | + | |
| 165 | +static u64 amd_iommu_domain_encode_pgtable(u64 *root, int mode) | |
| 166 | +{ | |
| 167 | + u64 pt_root; | |
| 168 | + | |
| 169 | + /* lowest 3 bits encode pgtable mode */ | |
| 170 | + pt_root = mode & 7; | |
| 171 | + pt_root |= (u64)root; | |
| 172 | + | |
| 173 | + return pt_root; | |
| 174 | +} | |
| 175 | + | |
| 154 | 176 | static struct iommu_dev_data *alloc_dev_data(u16 devid) |
| 155 | 177 | { |
| 156 | 178 | struct iommu_dev_data *dev_data; |
| @@ -1397,13 +1419,18 @@ static struct page *free_sub_pt(unsigned long root, int mode, · 1240 unmodified lines | ||
| 1397 | 1419 | |
| 1398 | 1420 | static void free_pagetable(struct protection_domain *domain) |
| 1399 | 1421 | { |
| 1400 | − unsigned long root = (unsigned long)domain->pt_root; | |
| 1422 | + struct domain_pgtable pgtable; | |
| 1401 | 1423 | struct page *freelist = NULL; |
| 1424 | + unsigned long root; | |
| 1402 | 1425 | |
| 1403 | − BUG_ON(domain->mode < PAGE_MODE_NONE || | |
| 1404 | − domain->mode > PAGE_MODE_6_LEVEL); | |
| 1426 | + amd_iommu_domain_get_pgtable(domain, &pgtable); | |
| 1427 | + atomic64_set(&domain->pt_root, 0); | |
| 1405 | 1428 | |
| 1406 | − freelist = free_sub_pt(root, domain->mode, freelist); | |
| 1429 | + BUG_ON(pgtable.mode < PAGE_MODE_NONE || | |
| 1430 | + pgtable.mode > PAGE_MODE_6_LEVEL); | |
| 1431 | + | |
| 1432 | + root = (unsigned long)pgtable.root; | |
| 1433 | + freelist = free_sub_pt(root, pgtable.mode, freelist); | |
| 1407 | 1434 | |
| 1408 | 1435 | free_page_list(freelist); |
| 1409 | 1436 | } |
| @@ -1417,24 +1444,39 @@ static bool increase_address_space(struct protection_domain *domain, · 7 unmodified lines | ||
| 1417 | 1444 | unsigned long address, |
| 1418 | 1445 | gfp_t gfp) |
| 1419 | 1446 | { |
| 1447 | + struct domain_pgtable pgtable; | |
| 1420 | 1448 | unsigned long flags; |
| 1421 | − bool ret = false; | |
| 1422 | − u64 *pte; | |
| 1449 | + bool ret = true; | |
| 1450 | + u64 *pte, root; | |
| 1423 | 1451 | |
| 1424 | 1452 | spin_lock_irqsave(&domain->lock, flags); |
| 1425 | 1453 | |
| 1426 | − if (address <= PM_LEVEL_SIZE(domain->mode) || | |
| 1427 | − WARN_ON_ONCE(domain->mode == PAGE_MODE_6_LEVEL)) | |
| 1454 | + amd_iommu_domain_get_pgtable(domain, &pgtable); | |
| 1455 | + | |
| 1456 | + if (address <= PM_LEVEL_SIZE(pgtable.mode)) | |
| 1457 | + goto out; | |
| 1458 | + | |
| 1459 | + ret = false; | |
| 1460 | + if (WARN_ON_ONCE(pgtable.mode == PAGE_MODE_6_LEVEL)) | |
| 1428 | 1461 | goto out; |
| 1429 | 1462 | |
| 1430 | 1463 | pte = (void *)get_zeroed_page(gfp); |
| 1431 | 1464 | if (!pte) |
| 1432 | 1465 | goto out; |
| 1433 | 1466 | |
| 1434 | − *pte = PM_LEVEL_PDE(domain->mode, | |
| 1435 | − iommu_virt_to_phys(domain->pt_root)); | |
| 1436 | − domain->pt_root = pte; | |
| 1437 | − domain->mode += 1; | |
| 1467 | + *pte = PM_LEVEL_PDE(pgtable.mode, iommu_virt_to_phys(pgtable.root)); | |
| 1468 | + | |
| 1469 | + pgtable.root = pte; | |
| 1470 | + pgtable.mode += 1; | |
| 1471 | + update_and_flush_device_table(domain, &pgtable); | |
| 1472 | + domain_flush_complete(domain); | |
| 1473 | + | |
| 1474 | + /* | |
| 1475 | + * Device Table needs to be updated and flushed before the new root can | |
| 1476 | + * be published. | |
| 1477 | + */ | |
| 1478 | + root = amd_iommu_domain_encode_pgtable(pte, pgtable.mode); | |
| 1479 | + atomic64_set(&domain->pt_root, root); | |
| 1438 | 1480 | |
| 1439 | 1481 | ret = true; |
| 1440 | 1482 | |
| @@ -1451,16 +1493,29 @@ static u64 *alloc_pte(struct protection_domain *domain, · 10 unmodified lines | ||
| 1451 | 1493 | gfp_t gfp, |
| 1452 | 1494 | bool *updated) |
| 1453 | 1495 | { |
| 1496 | + struct domain_pgtable pgtable; | |
| 1454 | 1497 | int level, end_lvl; |
| 1455 | 1498 | u64 *pte, *page; |
| 1456 | 1499 | |
| 1457 | 1500 | BUG_ON(!is_power_of_2(page_size)); |
| 1458 | 1501 | |
| 1459 | − while (address > PM_LEVEL_SIZE(domain->mode)) | |
| 1460 | − *updated = increase_address_space(domain, address, gfp) || *updated; | |
| 1502 | + amd_iommu_domain_get_pgtable(domain, &pgtable); | |
| 1503 | + | |
| 1504 | + while (address > PM_LEVEL_SIZE(pgtable.mode)) { | |
| 1505 | + /* | |
| 1506 | + * Return an error if there is no memory to update the | |
| 1507 | + * page-table. | |
| 1508 | + */ | |
| 1509 | + if (!increase_address_space(domain, address, gfp)) | |
| 1510 | + return NULL; | |
| 1511 | + | |
| 1512 | + /* Read new values to check if update was successful */ | |
| 1513 | + amd_iommu_domain_get_pgtable(domain, &pgtable); | |
| 1514 | + } | |
| 1515 | + | |
| 1461 | 1516 | |
| 1462 | − level = domain->mode - 1; | |
| 1463 | − pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)]; | |
| 1517 | + level = pgtable.mode - 1; | |
| 1518 | + pte = &pgtable.root[PM_LEVEL_INDEX(level, address)]; | |
| 1464 | 1519 | address = PAGE_SIZE_ALIGN(address, page_size); |
| 1465 | 1520 | end_lvl = PAGE_SIZE_LEVEL(page_size); |
| 1466 | 1521 | |
| @@ -1536,16 +1591,19 @@ static u64 *fetch_pte(struct protection_domain *domain, · 69 unmodified lines | ||
| 1536 | 1591 | unsigned long address, |
| 1537 | 1592 | unsigned long *page_size) |
| 1538 | 1593 | { |
| 1594 | + struct domain_pgtable pgtable; | |
| 1539 | 1595 | int level; |
| 1540 | 1596 | u64 *pte; |
| 1541 | 1597 | |
| 1542 | 1598 | *page_size = 0; |
| 1543 | 1599 | |
| 1544 | − if (address > PM_LEVEL_SIZE(domain->mode)) | |
| 1600 | + amd_iommu_domain_get_pgtable(domain, &pgtable); | |
| 1601 | + | |
| 1602 | + if (address > PM_LEVEL_SIZE(pgtable.mode)) | |
| 1545 | 1603 | return NULL; |
| 1546 | 1604 | |
| 1547 | − level = domain->mode - 1; | |
| 1548 | − pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)]; | |
| 1605 | + level = pgtable.mode - 1; | |
| 1606 | + pte = &pgtable.root[PM_LEVEL_INDEX(level, address)]; | |
| 1549 | 1607 | *page_size = PTE_LEVEL_PAGE_SIZE(level); |
| 1550 | 1608 | |
| 1551 | 1609 | while (level > 0) { |
| @@ -1660,7 +1718,13 @@ out: · 108 unmodified lines | ||
| 1660 | 1718 | unsigned long flags; |
| 1661 | 1719 | |
| 1662 | 1720 | spin_lock_irqsave(&dom->lock, flags); |
| 1663 | − update_domain(dom); | |
| 1721 | + /* | |
| 1722 | + * Flush domain TLB(s) and wait for completion. Any Device-Table | |
| 1723 | + * Updates and flushing already happened in | |
| 1724 | + * increase_address_space(). | |
| 1725 | + */ | |
| 1726 | + domain_flush_tlb_pde(dom); | |
| 1727 | + domain_flush_complete(dom); | |
| 1664 | 1728 | spin_unlock_irqrestore(&dom->lock, flags); |
| 1665 | 1729 | } |
| 1666 | 1730 | |
| @@ -1806,6 +1870,7 @@ static void dma_ops_domain_free(struct protection_domain *domain) · 139 unmodified lines | ||
| 1806 | 1870 | static struct protection_domain *dma_ops_domain_alloc(void) |
| 1807 | 1871 | { |
| 1808 | 1872 | struct protection_domain *domain; |
| 1873 | + u64 *pt_root, root; | |
| 1809 | 1874 | |
| 1810 | 1875 | domain = kzalloc(sizeof(struct protection_domain), GFP_KERNEL); |
| 1811 | 1876 | if (!domain) |
| @@ -1814,12 +1879,14 @@ static struct protection_domain *dma_ops_domain_alloc(void) · 2 unmodified lines | ||
| 1814 | 1879 | if (protection_domain_init(domain)) |
| 1815 | 1880 | goto free_domain; |
| 1816 | 1881 | |
| 1817 | − domain->mode = PAGE_MODE_3_LEVEL; | |
| 1818 | − domain->pt_root = (void *)get_zeroed_page(GFP_KERNEL); | |
| 1819 | − domain->flags = PD_DMA_OPS_MASK; | |
| 1820 | − if (!domain->pt_root) | |
| 1882 | + pt_root = (void *)get_zeroed_page(GFP_KERNEL); | |
| 1883 | + if (!pt_root) | |
| 1821 | 1884 | goto free_domain; |
| 1822 | 1885 | |
| 1886 | + root = amd_iommu_domain_encode_pgtable(pt_root, PAGE_MODE_3_LEVEL); | |
| 1887 | + atomic64_set(&domain->pt_root, root); | |
| 1888 | + domain->flags = PD_DMA_OPS_MASK; | |
| 1889 | + | |
| 1823 | 1890 | if (iommu_get_dma_cookie(&domain->domain) == -ENOMEM) |
| 1824 | 1891 | goto free_domain; |
| 1825 | 1892 | |
| @@ -1841,16 +1908,17 @@ static bool dma_ops_domain(struct protection_domain *domain) · 15 unmodified lines | ||
| 1841 | 1908 | } |
| 1842 | 1909 | |
| 1843 | 1910 | static void set_dte_entry(u16 devid, struct protection_domain *domain, |
| 1911 | + struct domain_pgtable *pgtable, | |
| 1844 | 1912 | bool ats, bool ppr) |
| 1845 | 1913 | { |
| 1846 | 1914 | u64 pte_root = 0; |
| 1847 | 1915 | u64 flags = 0; |
| 1848 | 1916 | u32 old_domid; |
| 1849 | 1917 | |
| 1850 | − if (domain->mode != PAGE_MODE_NONE) | |
| 1851 | − pte_root = iommu_virt_to_phys(domain->pt_root); | |
| 1918 | + if (pgtable->mode != PAGE_MODE_NONE) | |
| 1919 | + pte_root = iommu_virt_to_phys(pgtable->root); | |
| 1852 | 1920 | |
| 1853 | − pte_root |= (domain->mode & DEV_ENTRY_MODE_MASK) | |
| 1921 | + pte_root |= (pgtable->mode & DEV_ENTRY_MODE_MASK) | |
| 1854 | 1922 | << DEV_ENTRY_MODE_SHIFT; |
| 1855 | 1923 | pte_root |= DTE_FLAG_IR | DTE_FLAG_IW | DTE_FLAG_V | DTE_FLAG_TV; |
| 1856 | 1924 | |
| @@ -1923,6 +1991,7 @@ static void clear_dte_entry(u16 devid) · 66 unmodified lines | ||
| 1923 | 1991 | static void do_attach(struct iommu_dev_data *dev_data, |
| 1924 | 1992 | struct protection_domain *domain) |
| 1925 | 1993 | { |
| 1994 | + struct domain_pgtable pgtable; | |
| 1926 | 1995 | struct amd_iommu *iommu; |
| 1927 | 1996 | bool ats; |
| 1928 | 1997 | |
| @@ -1938,7 +2007,9 @@ static void do_attach(struct iommu_dev_data *dev_data, · 9 unmodified lines | ||
| 1938 | 2007 | domain->dev_cnt += 1; |
| 1939 | 2008 | |
| 1940 | 2009 | /* Update device table */ |
| 1941 | − set_dte_entry(dev_data->devid, domain, ats, dev_data->iommu_v2); | |
| 2010 | + amd_iommu_domain_get_pgtable(domain, &pgtable); | |
| 2011 | + set_dte_entry(dev_data->devid, domain, &pgtable, | |
| 2012 | + ats, dev_data->iommu_v2); | |
| 1942 | 2013 | clone_aliases(dev_data->pdev); |
| 1943 | 2014 | |
| 1944 | 2015 | device_flush_dte(dev_data); |
| @@ -2249,23 +2320,36 @@ static int amd_iommu_domain_get_attr(struct iommu_domain *domain, · 304 unmodified lines | ||
| 2249 | 2320 | * |
| 2250 | 2321 | *****************************************************************************/ |
| 2251 | 2322 | |
| 2252 | −static void update_device_table(struct protection_domain *domain) | |
| 2323 | +static void update_device_table(struct protection_domain *domain, | |
| 2324 | + struct domain_pgtable *pgtable) | |
| 2253 | 2325 | { |
| 2254 | 2326 | struct iommu_dev_data *dev_data; |
| 2255 | 2327 | |
| 2256 | 2328 | list_for_each_entry(dev_data, &domain->dev_list, list) { |
| 2257 | − set_dte_entry(dev_data->devid, domain, dev_data->ats.enabled, | |
| 2258 | − dev_data->iommu_v2); | |
| 2329 | + set_dte_entry(dev_data->devid, domain, pgtable, | |
| 2330 | + dev_data->ats.enabled, dev_data->iommu_v2); | |
| 2259 | 2331 | clone_aliases(dev_data->pdev); |
| 2260 | 2332 | } |
| 2261 | 2333 | } |
| 2262 | 2334 | |
| 2335 | +static void update_and_flush_device_table(struct protection_domain *domain, | |
| 2336 | + struct domain_pgtable *pgtable) | |
| 2337 | +{ | |
| 2338 | + update_device_table(domain, pgtable); | |
| 2339 | + domain_flush_devices(domain); | |
| 2340 | +} | |
| 2341 | + | |
| 2263 | 2342 | static void update_domain(struct protection_domain *domain) |
| 2264 | 2343 | { |
| 2265 | − update_device_table(domain); | |
| 2344 | + struct domain_pgtable pgtable; | |
| 2266 | 2345 | |
| 2267 | − domain_flush_devices(domain); | |
| 2346 | + /* Update device table */ | |
| 2347 | + amd_iommu_domain_get_pgtable(domain, &pgtable); | |
| 2348 | + update_and_flush_device_table(domain, &pgtable); | |
| 2349 | + | |
| 2350 | + /* Flush domain TLB(s) and wait for completion */ | |
| 2268 | 2351 | domain_flush_tlb_pde(domain); |
| 2352 | + domain_flush_complete(domain); | |
| 2269 | 2353 | } |
| 2270 | 2354 | |
| 2271 | 2355 | int __init amd_iommu_init_api(void) |
| @@ -2375,6 +2459,7 @@ out_err: · 103 unmodified lines | ||
| 2375 | 2459 | static struct iommu_domain *amd_iommu_domain_alloc(unsigned type) |
| 2376 | 2460 | { |
| 2377 | 2461 | struct protection_domain *pdomain; |
| 2462 | + u64 *pt_root, root; | |
| 2378 | 2463 | |
| 2379 | 2464 | switch (type) { |
| 2380 | 2465 | case IOMMU_DOMAIN_UNMANAGED: |
| @@ -2382,13 +2467,15 @@ static struct iommu_domain *amd_iommu_domain_alloc(unsigned type) · 1 unmodified line | ||
| 2382 | 2467 | if (!pdomain) |
| 2383 | 2468 | return NULL; |
| 2384 | 2469 | |
| 2385 | − pdomain->mode = PAGE_MODE_3_LEVEL; | |
| 2386 | − pdomain->pt_root = (void *)get_zeroed_page(GFP_KERNEL); | |
| 2387 | − if (!pdomain->pt_root) { | |
| 2470 | + pt_root = (void *)get_zeroed_page(GFP_KERNEL); | |
| 2471 | + if (!pt_root) { | |
| 2388 | 2472 | protection_domain_free(pdomain); |
| 2389 | 2473 | return NULL; |
| 2390 | 2474 | } |
| 2391 | 2475 | |
| 2476 | + root = amd_iommu_domain_encode_pgtable(pt_root, PAGE_MODE_3_LEVEL); | |
| 2477 | + atomic64_set(&pdomain->pt_root, root); | |
| 2478 | + | |
| 2392 | 2479 | pdomain->domain.geometry.aperture_start = 0; |
| 2393 | 2480 | pdomain->domain.geometry.aperture_end = ~0ULL; |
| 2394 | 2481 | pdomain->domain.geometry.force_aperture = true; |
| @@ -2406,7 +2493,7 @@ static struct iommu_domain *amd_iommu_domain_alloc(unsigned type) · 11 unmodified lines | ||
| 2406 | 2493 | if (!pdomain) |
| 2407 | 2494 | return NULL; |
| 2408 | 2495 | |
| 2409 | − pdomain->mode = PAGE_MODE_NONE; | |
| 2496 | + atomic64_set(&pdomain->pt_root, PAGE_MODE_NONE); | |
| 2410 | 2497 | break; |
| 2411 | 2498 | default: |
| 2412 | 2499 | return NULL; |
| @@ -2418,6 +2505,7 @@ static struct iommu_domain *amd_iommu_domain_alloc(unsigned type) · 5 unmodified lines | ||
| 2418 | 2505 | static void amd_iommu_domain_free(struct iommu_domain *dom) |
| 2419 | 2506 | { |
| 2420 | 2507 | struct protection_domain *domain; |
| 2508 | + struct domain_pgtable pgtable; | |
| 2421 | 2509 | |
| 2422 | 2510 | domain = to_pdomain(dom); |
| 2423 | 2511 | |
| @@ -2435,7 +2523,9 @@ static void amd_iommu_domain_free(struct iommu_domain *dom) · 11 unmodified lines | ||
| 2435 | 2523 | dma_ops_domain_free(domain); |
| 2436 | 2524 | break; |
| 2437 | 2525 | default: |
| 2438 | − if (domain->mode != PAGE_MODE_NONE) | |
| 2526 | + amd_iommu_domain_get_pgtable(domain, &pgtable); | |
| 2527 | + | |
| 2528 | + if (pgtable.mode != PAGE_MODE_NONE) | |
| 2439 | 2529 | free_pagetable(domain); |
| 2440 | 2530 | |
| 2441 | 2531 | if (domain->flags & PD_IOMMUV2_MASK) |
| @@ -2518,10 +2608,12 @@ static int amd_iommu_map(struct iommu_domain *dom, unsigned long iova, · 76 unmodified lines | ||
| 2518 | 2608 | gfp_t gfp) |
| 2519 | 2609 | { |
| 2520 | 2610 | struct protection_domain *domain = to_pdomain(dom); |
| 2611 | + struct domain_pgtable pgtable; | |
| 2521 | 2612 | int prot = 0; |
| 2522 | 2613 | int ret; |
| 2523 | 2614 | |
| 2524 | − if (domain->mode == PAGE_MODE_NONE) | |
| 2615 | + amd_iommu_domain_get_pgtable(domain, &pgtable); | |
| 2616 | + if (pgtable.mode == PAGE_MODE_NONE) | |
| 2525 | 2617 | return -EINVAL; |
| 2526 | 2618 | |
| 2527 | 2619 | if (iommu_prot & IOMMU_READ) |
| @@ -2541,8 +2633,10 @@ static size_t amd_iommu_unmap(struct iommu_domain *dom, unsigned long iova, · 13 unmodified lines | ||
| 2541 | 2633 | struct iommu_iotlb_gather *gather) |
| 2542 | 2634 | { |
| 2543 | 2635 | struct protection_domain *domain = to_pdomain(dom); |
| 2636 | + struct domain_pgtable pgtable; | |
| 2544 | 2637 | |
| 2545 | − if (domain->mode == PAGE_MODE_NONE) | |
| 2638 | + amd_iommu_domain_get_pgtable(domain, &pgtable); | |
| 2639 | + if (pgtable.mode == PAGE_MODE_NONE) | |
| 2546 | 2640 | return 0; |
| 2547 | 2641 | |
| 2548 | 2642 | return iommu_unmap_page(domain, iova, page_size); |
| @@ -2553,9 +2647,11 @@ static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom, · 4 unmodified lines | ||
| 2553 | 2647 | { |
| 2554 | 2648 | struct protection_domain *domain = to_pdomain(dom); |
| 2555 | 2649 | unsigned long offset_mask, pte_pgsize; |
| 2650 | + struct domain_pgtable pgtable; | |
| 2556 | 2651 | u64 *pte, __pte; |
| 2557 | 2652 | |
| 2558 | − if (domain->mode == PAGE_MODE_NONE) | |
| 2653 | + amd_iommu_domain_get_pgtable(domain, &pgtable); | |
| 2654 | + if (pgtable.mode == PAGE_MODE_NONE) | |
| 2559 | 2655 | return iova; |
| 2560 | 2656 | |
| 2561 | 2657 | pte = fetch_pte(domain, iova, &pte_pgsize); |
| @@ -2708,16 +2804,26 @@ EXPORT_SYMBOL(amd_iommu_unregister_ppr_notifier); · 146 unmodified lines | ||
| 2708 | 2804 | void amd_iommu_domain_direct_map(struct iommu_domain *dom) |
| 2709 | 2805 | { |
| 2710 | 2806 | struct protection_domain *domain = to_pdomain(dom); |
| 2807 | + struct domain_pgtable pgtable; | |
| 2711 | 2808 | unsigned long flags; |
| 2809 | + u64 pt_root; | |
| 2712 | 2810 | |
| 2713 | 2811 | spin_lock_irqsave(&domain->lock, flags); |
| 2714 | 2812 | |
| 2813 | + /* First save pgtable configuration*/ | |
| 2814 | + amd_iommu_domain_get_pgtable(domain, &pgtable); | |
| 2815 | + | |
| 2715 | 2816 | /* Update data structure */ |
| 2716 | − domain->mode = PAGE_MODE_NONE; | |
| 2817 | + pt_root = amd_iommu_domain_encode_pgtable(NULL, PAGE_MODE_NONE); | |
| 2818 | + atomic64_set(&domain->pt_root, pt_root); | |
| 2717 | 2819 | |
| 2718 | 2820 | /* Make changes visible to IOMMUs */ |
| 2719 | 2821 | update_domain(domain); |
| 2720 | 2822 | |
| 2823 | + /* Restore old pgtable in domain->ptroot to free page-table */ | |
| 2824 | + pt_root = amd_iommu_domain_encode_pgtable(pgtable.root, pgtable.mode); | |
| 2825 | + atomic64_set(&domain->pt_root, pt_root); | |
| 2826 | + | |
| 2721 | 2827 | /* Page-table is not visible to IOMMU anymore, so free it */ |
| 2722 | 2828 | free_pagetable(domain); |
| 2723 | 2829 | |
| @@ -2908,9 +3014,11 @@ static u64 *__get_gcr3_pte(u64 *root, int level, int pasid, bool alloc) · 184 unmodified lines | ||
| 2908 | 3014 | static int __set_gcr3(struct protection_domain *domain, int pasid, |
| 2909 | 3015 | unsigned long cr3) |
| 2910 | 3016 | { |
| 3017 | + struct domain_pgtable pgtable; | |
| 2911 | 3018 | u64 *pte; |
| 2912 | 3019 | |
| 2913 | − if (domain->mode != PAGE_MODE_NONE) | |
| 3020 | + amd_iommu_domain_get_pgtable(domain, &pgtable); | |
| 3021 | + if (pgtable.mode != PAGE_MODE_NONE) | |
| 2914 | 3022 | return -EINVAL; |
| 2915 | 3023 | |
| 2916 | 3024 | pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, true); |
| @@ -2924,9 +3032,11 @@ static int __set_gcr3(struct protection_domain *domain, int pasid, · 7 unmodified lines | ||
| 2924 | 3032 | |
| 2925 | 3033 | static int __clear_gcr3(struct protection_domain *domain, int pasid) |
| 2926 | 3034 | { |
| 3035 | + struct domain_pgtable pgtable; | |
| 2927 | 3036 | u64 *pte; |
| 2928 | 3037 | |
| 2929 | − if (domain->mode != PAGE_MODE_NONE) | |
| 3038 | + amd_iommu_domain_get_pgtable(domain, &pgtable); | |
| 3039 | + if (pgtable.mode != PAGE_MODE_NONE) | |
| 2930 | 3040 | return -EINVAL; |
| 2931 | 3041 | |
| 2932 | 3042 | pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, false); |
| @@ -2936,7 +2936,7 @@ static int __init parse_amd_iommu_intr(char *str) · 2935 unmodified lines | ||
| 2936 | 2936 | { |
| 2937 | 2937 | for (; *str; ++str) { |
| 2938 | 2938 | if (strncmp(str, "legacy", 6) == 0) { |
| 2939 | − amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY; | |
| 2939 | + amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY_GA; | |
| 2940 | 2940 | break; |
| 2941 | 2941 | } |
| 2942 | 2942 | if (strncmp(str, "vapic", 5) == 0) { |
| @@ -468,8 +468,7 @@ struct protection_domain { · 467 unmodified lines | ||
| 468 | 468 | iommu core code */ |
| 469 | 469 | spinlock_t lock; /* mostly used to lock the page table*/ |
| 470 | 470 | u16 id; /* the domain id written to the device table */ |
| 471 | − int mode; /* paging mode (0-6 levels) */ | |
| 472 | − u64 *pt_root; /* page table root pointer */ | |
| 471 | + atomic64_t pt_root; /* pgtable root and pgtable mode */ | |
| 473 | 472 | int glx; /* Number of levels for GCR3 table */ |
| 474 | 473 | u64 *gcr3_tbl; /* Guest CR3 table */ |
| 475 | 474 | unsigned long flags; /* flags to find out type of domain */ |
| @@ -477,6 +476,12 @@ struct protection_domain { · 1 unmodified line | ||
| 477 | 476 | unsigned dev_iommu[MAX_IOMMUS]; /* per-IOMMU reference count */ |
| 478 | 477 | }; |
| 479 | 478 | |
| 479 | +/* For decocded pt_root */ | |
| 480 | +struct domain_pgtable { | |
| 481 | + int mode; | |
| 482 | + u64 *root; | |
| 483 | +}; | |
| 484 | + | |
| 480 | 485 | /* |
| 481 | 486 | * Structure where we save information about one hardware AMD IOMMU in the |
| 482 | 487 | * system. |
| @@ -371,11 +371,11 @@ int dmar_disabled = 0; · 370 unmodified lines | ||
| 371 | 371 | int dmar_disabled = 1; |
| 372 | 372 | #endif /* CONFIG_INTEL_IOMMU_DEFAULT_ON */ |
| 373 | 373 | |
| 374 | −#ifdef INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON | |
| 374 | +#ifdef CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON | |
| 375 | 375 | int intel_iommu_sm = 1; |
| 376 | 376 | #else |
| 377 | 377 | int intel_iommu_sm; |
| 378 | −#endif /* INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON */ | |
| 378 | +#endif /* CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON */ | |
| 379 | 379 | |
| 380 | 380 | int intel_iommu_enabled = 0; |
| 381 | 381 | EXPORT_SYMBOL_GPL(intel_iommu_enabled); |
| @@ -170,6 +170,7 @@ static struct dev_iommu *dev_iommu_get(struct device *dev) · 169 unmodified lines | ||
| 170 | 170 | |
| 171 | 171 | static void dev_iommu_free(struct device *dev) |
| 172 | 172 | { |
| 173 | + iommu_fwspec_free(dev); | |
| 173 | 174 | kfree(dev->iommu); |
| 174 | 175 | dev->iommu = NULL; |
| 175 | 176 | } |
| @@ -1428,7 +1429,7 @@ struct iommu_group *iommu_group_get_for_dev(struct device *dev) · 1252 unmodified lines | ||
| 1428 | 1429 | |
| 1429 | 1430 | return group; |
| 1430 | 1431 | } |
| 1431 | −EXPORT_SYMBOL(iommu_group_get_for_dev); | |
| 1432 | +EXPORT_SYMBOL_GPL(iommu_group_get_for_dev); | |
| 1432 | 1433 | |
| 1433 | 1434 | struct iommu_domain *iommu_group_default_domain(struct iommu_group *group) |
| 1434 | 1435 | { |
| @@ -824,8 +824,11 @@ static int qcom_iommu_device_probe(struct platform_device *pdev) · 823 unmodified lines | ||
| 824 | 824 | qcom_iommu->dev = dev; |
| 825 | 825 | |
| 826 | 826 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 827 | − if (res) | |
| 827 | + if (res) { | |
| 828 | 828 | qcom_iommu->local_base = devm_ioremap_resource(dev, res); |
| 829 | + if (IS_ERR(qcom_iommu->local_base)) | |
| 830 | + return PTR_ERR(qcom_iommu->local_base); | |
| 831 | + } | |
| 829 | 832 | |
| 830 | 833 | qcom_iommu->iface_clk = devm_clk_get(dev, "iface"); |
| 831 | 834 | if (IS_ERR(qcom_iommu->iface_clk)) { |
| @@ -453,7 +453,7 @@ static int viommu_add_resv_mem(struct viommu_endpoint *vdev, · 452 unmodified lines | ||
| 453 | 453 | if (!region) |
| 454 | 454 | return -ENOMEM; |
| 455 | 455 | |
| 456 | − list_add(&vdev->resv_regions, ®ion->list); | |
| 456 | + list_add(®ion->list, &vdev->resv_regions); | |
| 457 | 457 | return 0; |
| 458 | 458 | } |
| 459 | 459 | |
| @@ -585,10 +585,12 @@ static struct pgpath *__map_bio(struct multipath *m, struct bio *bio) · 584 unmodified lines | ||
| 585 | 585 | |
| 586 | 586 | /* Do we need to select a new pgpath? */ |
| 587 | 587 | pgpath = READ_ONCE(m->current_pgpath); |
| 588 | − queue_io = test_bit(MPATHF_QUEUE_IO, &m->flags); | |
| 589 | − if (!pgpath || !queue_io) | |
| 588 | + if (!pgpath || !test_bit(MPATHF_QUEUE_IO, &m->flags)) | |
| 590 | 589 | pgpath = choose_pgpath(m, bio->bi_iter.bi_size); |
| 591 | 590 | |
| 591 | + /* MPATHF_QUEUE_IO might have been cleared by choose_pgpath. */ | |
| 592 | + queue_io = test_bit(MPATHF_QUEUE_IO, &m->flags); | |
| 593 | + | |
| 592 | 594 | if ((pgpath && queue_io) || |
| 593 | 595 | (!pgpath && test_bit(MPATHF_QUEUE_IF_NO_PATH, &m->flags))) { |
| 594 | 596 | /* Queue for the daemon to resubmit */ |
| @@ -435,7 +435,7 @@ int verity_fec_decode(struct dm_verity *v, struct dm_verity_io *io, · 434 unmodified lines | ||
| 435 | 435 | fio->level++; |
| 436 | 436 | |
| 437 | 437 | if (type == DM_VERITY_BLOCK_TYPE_METADATA) |
| 438 | − block += v->data_blocks; | |
| 438 | + block = block - v->hash_start + v->data_blocks; | |
| 439 | 439 | |
| 440 | 440 | /* |
| 441 | 441 | * For RS(M, N), the continuous FEC data is divided into blocks of N |
| @@ -931,6 +931,24 @@ static int writecache_alloc_entries(struct dm_writecache *wc) · 930 unmodified lines | ||
| 931 | 931 | return 0; |
| 932 | 932 | } |
| 933 | 933 | |
| 934 | +static int writecache_read_metadata(struct dm_writecache *wc, sector_t n_sectors) | |
| 935 | +{ | |
| 936 | + struct dm_io_region region; | |
| 937 | + struct dm_io_request req; | |
| 938 | + | |
| 939 | + region.bdev = wc->ssd_dev->bdev; | |
| 940 | + region.sector = wc->start_sector; | |
| 941 | + region.count = n_sectors; | |
| 942 | + req.bi_op = REQ_OP_READ; | |
| 943 | + req.bi_op_flags = REQ_SYNC; | |
| 944 | + req.mem.type = DM_IO_VMA; | |
| 945 | + req.mem.ptr.vma = (char *)wc->memory_map; | |
| 946 | + req.client = wc->dm_io; | |
| 947 | + req.notify.fn = NULL; | |
| 948 | + | |
| 949 | + return dm_io(&req, 1, ®ion, NULL); | |
| 950 | +} | |
| 951 | + | |
| 934 | 952 | static void writecache_resume(struct dm_target *ti) |
| 935 | 953 | { |
| 936 | 954 | struct dm_writecache *wc = ti->private; |
| @@ -941,8 +959,18 @@ static void writecache_resume(struct dm_target *ti) · 4 unmodified lines | ||
| 941 | 959 | |
| 942 | 960 | wc_lock(wc); |
| 943 | 961 | |
| 944 | − if (WC_MODE_PMEM(wc)) | |
| 962 | + if (WC_MODE_PMEM(wc)) { | |
| 945 | 963 | persistent_memory_invalidate_cache(wc->memory_map, wc->memory_map_size); |
| 964 | + } else { | |
| 965 | + r = writecache_read_metadata(wc, wc->metadata_sectors); | |
| 966 | + if (r) { | |
| 967 | + size_t sb_entries_offset; | |
| 968 | + writecache_error(wc, r, "unable to read metadata: %d", r); | |
| 969 | + sb_entries_offset = offsetof(struct wc_memory_superblock, entries); | |
| 970 | + memset((char *)wc->memory_map + sb_entries_offset, -1, | |
| 971 | + (wc->metadata_sectors << SECTOR_SHIFT) - sb_entries_offset); | |
| 972 | + } | |
| 973 | + } | |
| 946 | 974 | |
| 947 | 975 | wc->tree = RB_ROOT; |
| 948 | 976 | INIT_LIST_HEAD(&wc->lru); |
| @@ -2102,6 +2130,12 @@ static int writecache_ctr(struct dm_target *ti, unsigned argc, char **argv) · 1153 unmodified lines | ||
| 2102 | 2130 | ti->error = "Invalid block size"; |
| 2103 | 2131 | goto bad; |
| 2104 | 2132 | } |
| 2133 | + if (wc->block_size < bdev_logical_block_size(wc->dev->bdev) || | |
| 2134 | + wc->block_size < bdev_logical_block_size(wc->ssd_dev->bdev)) { | |
| 2135 | + r = -EINVAL; | |
| 2136 | + ti->error = "Block size is smaller than device logical block size"; | |
| 2137 | + goto bad; | |
| 2138 | + } | |
| 2105 | 2139 | wc->block_size_bits = __ffs(wc->block_size); |
| 2106 | 2140 | |
| 2107 | 2141 | wc->max_writeback_jobs = MAX_WRITEBACK_JOBS; |
| @@ -2200,8 +2234,6 @@ invalid_optional: · 92 unmodified lines | ||
| 2200 | 2234 | goto bad; |
| 2201 | 2235 | } |
| 2202 | 2236 | } else { |
| 2203 | − struct dm_io_region region; | |
| 2204 | − struct dm_io_request req; | |
| 2205 | 2237 | size_t n_blocks, n_metadata_blocks; |
| 2206 | 2238 | uint64_t n_bitmap_bits; |
| 2207 | 2239 | |
| @@ -2258,19 +2290,9 @@ invalid_optional: · 50 unmodified lines | ||
| 2258 | 2290 | goto bad; |
| 2259 | 2291 | } |
| 2260 | 2292 | |
| 2261 | − region.bdev = wc->ssd_dev->bdev; | |
| 2262 | − region.sector = wc->start_sector; | |
| 2263 | − region.count = wc->metadata_sectors; | |
| 2264 | − req.bi_op = REQ_OP_READ; | |
| 2265 | − req.bi_op_flags = REQ_SYNC; | |
| 2266 | − req.mem.type = DM_IO_VMA; | |
| 2267 | − req.mem.ptr.vma = (char *)wc->memory_map; | |
| 2268 | − req.client = wc->dm_io; | |
| 2269 | − req.notify.fn = NULL; | |
| 2270 | − | |
| 2271 | − r = dm_io(&req, 1, ®ion, NULL); | |
| 2293 | + r = writecache_read_metadata(wc, wc->block_size >> SECTOR_SHIFT); | |
| 2272 | 2294 | if (r) { |
| 2273 | − ti->error = "Unable to read metadata"; | |
| 2295 | + ti->error = "Unable to read first block of metadata"; | |
| 2274 | 2296 | goto bad; |
| 2275 | 2297 | } |
| 2276 | 2298 | } |
| @@ -1465,6 +1465,13 @@ static const struct mei_cfg mei_me_pch12_cfg = { · 1464 unmodified lines | ||
| 1465 | 1465 | MEI_CFG_DMA_128, |
| 1466 | 1466 | }; |
| 1467 | 1467 | |
| 1468 | +/* LBG with quirk for SPS Firmware exclusion */ | |
| 1469 | +static const struct mei_cfg mei_me_pch12_sps_cfg = { | |
| 1470 | + MEI_CFG_PCH8_HFS, | |
| 1471 | + MEI_CFG_FW_VER_SUPP, | |
| 1472 | + MEI_CFG_FW_SPS, | |
| 1473 | +}; | |
| 1474 | + | |
| 1468 | 1475 | /* Tiger Lake and newer devices */ |
| 1469 | 1476 | static const struct mei_cfg mei_me_pch15_cfg = { |
| 1470 | 1477 | MEI_CFG_PCH8_HFS, |
| @@ -1487,6 +1494,7 @@ static const struct mei_cfg *const mei_cfg_list[] = { · 16 unmodified lines | ||
| 1487 | 1494 | [MEI_ME_PCH8_CFG] = &mei_me_pch8_cfg, |
| 1488 | 1495 | [MEI_ME_PCH8_SPS_CFG] = &mei_me_pch8_sps_cfg, |
| 1489 | 1496 | [MEI_ME_PCH12_CFG] = &mei_me_pch12_cfg, |
| 1497 | + [MEI_ME_PCH12_SPS_CFG] = &mei_me_pch12_sps_cfg, | |
| 1490 | 1498 | [MEI_ME_PCH15_CFG] = &mei_me_pch15_cfg, |
| 1491 | 1499 | }; |
| 1492 | 1500 | |
| @@ -80,6 +80,9 @@ struct mei_me_hw { · 79 unmodified lines | ||
| 80 | 80 | * servers platforms with quirk for |
| 81 | 81 | * SPS firmware exclusion. |
| 82 | 82 | * @MEI_ME_PCH12_CFG: Platform Controller Hub Gen12 and newer |
| 83 | + * @MEI_ME_PCH12_SPS_CFG: Platform Controller Hub Gen12 and newer | |
| 84 | + * servers platforms with quirk for | |
| 85 | + * SPS firmware exclusion. | |
| 83 | 86 | * @MEI_ME_PCH15_CFG: Platform Controller Hub Gen15 and newer |
| 84 | 87 | * @MEI_ME_NUM_CFG: Upper Sentinel. |
| 85 | 88 | */ |
| @@ -93,6 +96,7 @@ enum mei_cfg_idx { · 7 unmodified lines | ||
| 93 | 96 | MEI_ME_PCH8_CFG, |
| 94 | 97 | MEI_ME_PCH8_SPS_CFG, |
| 95 | 98 | MEI_ME_PCH12_CFG, |
| 99 | + MEI_ME_PCH12_SPS_CFG, | |
| 96 | 100 | MEI_ME_PCH15_CFG, |
| 97 | 101 | MEI_ME_NUM_CFG, |
| 98 | 102 | }; |
| @@ -70,7 +70,7 @@ static const struct pci_device_id mei_me_pci_tbl[] = { · 69 unmodified lines | ||
| 70 | 70 | {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, MEI_ME_PCH8_CFG)}, |
| 71 | 71 | {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, MEI_ME_PCH8_SPS_CFG)}, |
| 72 | 72 | {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, MEI_ME_PCH8_SPS_CFG)}, |
| 73 | − {MEI_PCI_DEVICE(MEI_DEV_ID_LBG, MEI_ME_PCH12_CFG)}, | |
| 73 | + {MEI_PCI_DEVICE(MEI_DEV_ID_LBG, MEI_ME_PCH12_SPS_CFG)}, | |
| 74 | 74 | |
| 75 | 75 | {MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, MEI_ME_PCH8_CFG)}, |
| 76 | 76 | {MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, MEI_ME_PCH8_CFG)}, |
| @@ -203,11 +203,12 @@ static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 126 unmodified lines | ||
| 203 | 203 | } |
| 204 | 204 | hw = to_me_hw(dev); |
| 205 | 205 | hw->mem_addr = pcim_iomap_table(pdev)[0]; |
| 206 | − hw->irq = pdev->irq; | |
| 207 | 206 | hw->read_fws = mei_me_read_fws; |
| 208 | 207 | |
| 209 | 208 | pci_enable_msi(pdev); |
| 210 | 209 | |
| 210 | + hw->irq = pdev->irq; | |
| 211 | + | |
| 211 | 212 | /* request and enable interrupt */ |
| 212 | 213 | irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED; |
| 213 | 214 | |
| @@ -116,7 +116,7 @@ config MIC_COSM · 115 unmodified lines | ||
| 116 | 116 | |
| 117 | 117 | config VOP |
| 118 | 118 | tristate "VOP Driver" |
| 119 | − depends on VOP_BUS | |
| 119 | + depends on VOP_BUS && VHOST_DPN | |
| 120 | 120 | select VHOST_RING |
| 121 | 121 | select VIRTIO |
| 122 | 122 | help |
| @@ -878,7 +878,7 @@ static int mmc_send_hpi_cmd(struct mmc_card *card) · 877 unmodified lines | ||
| 878 | 878 | * Issued High Priority Interrupt, and check for card status |
| 879 | 879 | * until out-of prg-state. |
| 880 | 880 | */ |
| 881 | −int mmc_interrupt_hpi(struct mmc_card *card) | |
| 881 | +static int mmc_interrupt_hpi(struct mmc_card *card) | |
| 882 | 882 | { |
| 883 | 883 | int err; |
| 884 | 884 | u32 status; |
| @@ -5,6 +5,7 @@ · 4 unmodified lines | ||
| 5 | 5 | #include <linux/delay.h> |
| 6 | 6 | #include <linux/highmem.h> |
| 7 | 7 | #include <linux/io.h> |
| 8 | +#include <linux/iopoll.h> | |
| 8 | 9 | #include <linux/module.h> |
| 9 | 10 | #include <linux/dma-mapping.h> |
| 10 | 11 | #include <linux/slab.h> |
| @@ -349,12 +350,16 @@ static int cqhci_enable(struct mmc_host *mmc, struct mmc_card *card) · 338 unmodified lines | ||
| 349 | 350 | /* CQHCI is idle and should halt immediately, so set a small timeout */ |
| 350 | 351 | #define CQHCI_OFF_TIMEOUT 100 |
| 351 | 352 | |
| 353 | +static u32 cqhci_read_ctl(struct cqhci_host *cq_host) | |
| 354 | +{ | |
| 355 | + return cqhci_readl(cq_host, CQHCI_CTL); | |
| 356 | +} | |
| 357 | + | |
| 352 | 358 | static void cqhci_off(struct mmc_host *mmc) |
| 353 | 359 | { |
| 354 | 360 | struct cqhci_host *cq_host = mmc->cqe_private; |
| 355 | − ktime_t timeout; | |
| 356 | − bool timed_out; | |
| 357 | 361 | u32 reg; |
| 362 | + int err; | |
| 358 | 363 | |
| 359 | 364 | if (!cq_host->enabled || !mmc->cqe_on || cq_host->recovery_halt) |
| 360 | 365 | return; |
| @@ -364,15 +369,9 @@ static void cqhci_off(struct mmc_host *mmc) · 3 unmodified lines | ||
| 364 | 369 | |
| 365 | 370 | cqhci_writel(cq_host, CQHCI_HALT, CQHCI_CTL); |
| 366 | 371 | |
| 367 | − timeout = ktime_add_us(ktime_get(), CQHCI_OFF_TIMEOUT); | |
| 368 | − while (1) { | |
| 369 | − timed_out = ktime_compare(ktime_get(), timeout) > 0; | |
| 370 | − reg = cqhci_readl(cq_host, CQHCI_CTL); | |
| 371 | − if ((reg & CQHCI_HALT) || timed_out) | |
| 372 | − break; | |
| 373 | − } | |
| 374 | − | |
| 375 | − if (timed_out) | |
| 372 | + err = readx_poll_timeout(cqhci_read_ctl, cq_host, reg, | |
| 373 | + reg & CQHCI_HALT, 0, CQHCI_OFF_TIMEOUT); | |
| 374 | + if (err < 0) | |
| 376 | 375 | pr_err("%s: cqhci: CQE stuck on\n", mmc_hostname(mmc)); |
| 377 | 376 | else |
| 378 | 377 | pr_debug("%s: cqhci: CQE off\n", mmc_hostname(mmc)); |
| @@ -357,14 +357,6 @@ static void meson_mx_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) · 356 unmodified lines | ||
| 357 | 357 | meson_mx_mmc_start_cmd(mmc, mrq->cmd); |
| 358 | 358 | } |
| 359 | 359 | |
| 360 | −static int meson_mx_mmc_card_busy(struct mmc_host *mmc) | |
| 361 | −{ | |
| 362 | − struct meson_mx_mmc_host *host = mmc_priv(mmc); | |
| 363 | − u32 irqc = readl(host->base + MESON_MX_SDIO_IRQC); | |
| 364 | − | |
| 365 | − return !!(irqc & MESON_MX_SDIO_IRQC_FORCE_DATA_DAT_MASK); | |
| 366 | −} | |
| 367 | − | |
| 368 | 360 | static void meson_mx_mmc_read_response(struct mmc_host *mmc, |
| 369 | 361 | struct mmc_command *cmd) |
| 370 | 362 | { |
| @@ -506,7 +498,6 @@ static void meson_mx_mmc_timeout(struct timer_list *t) · 135 unmodified lines | ||
| 506 | 498 | static struct mmc_host_ops meson_mx_mmc_ops = { |
| 507 | 499 | .request = meson_mx_mmc_request, |
| 508 | 500 | .set_ios = meson_mx_mmc_set_ios, |
| 509 | − .card_busy = meson_mx_mmc_card_busy, | |
| 510 | 501 | .get_cd = mmc_gpio_get_cd, |
| 511 | 502 | .get_ro = mmc_gpio_get_ro, |
| 512 | 503 | }; |
| @@ -570,7 +561,7 @@ static int meson_mx_mmc_add_host(struct meson_mx_mmc_host *host) · 57 unmodified lines | ||
| 570 | 561 | mmc->f_max = clk_round_rate(host->cfg_div_clk, |
| 571 | 562 | clk_get_rate(host->parent_clk)); |
| 572 | 563 | |
| 573 | − mmc->caps |= MMC_CAP_ERASE | MMC_CAP_CMD23; | |
| 564 | + mmc->caps |= MMC_CAP_ERASE | MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY; | |
| 574 | 565 | mmc->ops = &meson_mx_mmc_ops; |
| 575 | 566 | |
| 576 | 567 | ret = mmc_of_parse(mmc); |
| @@ -2087,6 +2087,8 @@ static int sdhci_msm_probe(struct platform_device *pdev) · 2086 unmodified lines | ||
| 2087 | 2087 | goto clk_disable; |
| 2088 | 2088 | } |
| 2089 | 2089 | |
| 2090 | + msm_host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_NEED_RSP_BUSY; | |
| 2091 | + | |
| 2090 | 2092 | pm_runtime_get_noresume(&pdev->dev); |
| 2091 | 2093 | pm_runtime_set_active(&pdev->dev); |
| 2092 | 2094 | pm_runtime_enable(&pdev->dev); |
| @@ -601,6 +601,9 @@ static int intel_select_drive_strength(struct mmc_card *card, · 600 unmodified lines | ||
| 601 | 601 | struct sdhci_pci_slot *slot = sdhci_priv(host); |
| 602 | 602 | struct intel_host *intel_host = sdhci_pci_priv(slot); |
| 603 | 603 | |
| 604 | + if (!(mmc_driver_type_mask(intel_host->drv_strength) & card_drv)) | |
| 605 | + return 0; | |
| 606 | + | |
| 604 | 607 | return intel_host->drv_strength; |
| 605 | 608 | } |
| 606 | 609 | |
| @@ -235,6 +235,16 @@ static void xenon_voltage_switch(struct sdhci_host *host) · 234 unmodified lines | ||
| 235 | 235 | { |
| 236 | 236 | /* Wait for 5ms after set 1.8V signal enable bit */ |
| 237 | 237 | usleep_range(5000, 5500); |
| 238 | + | |
| 239 | + /* | |
| 240 | + * For some reason the controller's Host Control2 register reports | |
| 241 | + * the bit representing 1.8V signaling as 0 when read after it was | |
| 242 | + * written as 1. Subsequent read reports 1. | |
| 243 | + * | |
| 244 | + * Since this may cause some issues, do an empty read of the Host | |
| 245 | + * Control2 register here to circumvent this. | |
| 246 | + */ | |
| 247 | + sdhci_readw(host, SDHCI_HOST_CONTROL2); | |
| 238 | 248 | } |
| 239 | 249 | |
| 240 | 250 | static const struct sdhci_ops sdhci_xenon_ops = { |
| @@ -1483,7 +1483,7 @@ static void __exit most_exit(void) · 1482 unmodified lines | ||
| 1483 | 1483 | ida_destroy(&mdev_id); |
| 1484 | 1484 | } |
| 1485 | 1485 | |
| 1486 | −module_init(most_init); | |
| 1486 | +subsys_initcall(most_init); | |
| 1487 | 1487 | module_exit(most_exit); |
| 1488 | 1488 | MODULE_LICENSE("GPL"); |
| 1489 | 1489 | MODULE_AUTHOR("Christian Gromm <christian.gromm@microchip.com>"); |
| @@ -50,7 +50,7 @@ config CAIF_HSI · 49 unmodified lines | ||
| 50 | 50 | |
| 51 | 51 | config CAIF_VIRTIO |
| 52 | 52 | tristate "CAIF virtio transport driver" |
| 53 | − depends on CAIF && HAS_DMA | |
| 53 | + depends on CAIF && HAS_DMA && VHOST_DPN | |
| 54 | 54 | select VHOST_RING |
| 55 | 55 | select VIRTIO |
| 56 | 56 | select GENERIC_ALLOCATOR |
| @@ -1474,6 +1474,10 @@ static int b53_arl_rw_op(struct b53_device *dev, unsigned int op) · 1473 unmodified lines | ||
| 1474 | 1474 | reg |= ARLTBL_RW; |
| 1475 | 1475 | else |
| 1476 | 1476 | reg &= ~ARLTBL_RW; |
| 1477 | + if (dev->vlan_enabled) | |
| 1478 | + reg &= ~ARLTBL_IVL_SVL_SELECT; | |
| 1479 | + else | |
| 1480 | + reg |= ARLTBL_IVL_SVL_SELECT; | |
| 1477 | 1481 | b53_write8(dev, B53_ARLIO_PAGE, B53_ARLTBL_RW_CTRL, reg); |
| 1478 | 1482 | |
| 1479 | 1483 | return b53_arl_op_wait(dev); |
| @@ -1483,6 +1487,7 @@ static int b53_arl_read(struct b53_device *dev, u64 mac, · 3 unmodified lines | ||
| 1483 | 1487 | u16 vid, struct b53_arl_entry *ent, u8 *idx, |
| 1484 | 1488 | bool is_valid) |
| 1485 | 1489 | { |
| 1490 | + DECLARE_BITMAP(free_bins, B53_ARLTBL_MAX_BIN_ENTRIES); | |
| 1486 | 1491 | unsigned int i; |
| 1487 | 1492 | int ret; |
| 1488 | 1493 | |
| @@ -1490,6 +1495,8 @@ static int b53_arl_read(struct b53_device *dev, u64 mac, · 1 unmodified line | ||
| 1490 | 1495 | if (ret) |
| 1491 | 1496 | return ret; |
| 1492 | 1497 | |
| 1498 | + bitmap_zero(free_bins, dev->num_arl_entries); | |
| 1499 | + | |
| 1493 | 1500 | /* Read the bins */ |
| 1494 | 1501 | for (i = 0; i < dev->num_arl_entries; i++) { |
| 1495 | 1502 | u64 mac_vid; |
| @@ -1501,13 +1508,24 @@ static int b53_arl_read(struct b53_device *dev, u64 mac, · 5 unmodified lines | ||
| 1501 | 1508 | B53_ARLTBL_DATA_ENTRY(i), &fwd_entry); |
| 1502 | 1509 | b53_arl_to_entry(ent, mac_vid, fwd_entry); |
| 1503 | 1510 | |
| 1504 | − if (!(fwd_entry & ARLTBL_VALID)) | |
| 1511 | + if (!(fwd_entry & ARLTBL_VALID)) { | |
| 1512 | + set_bit(i, free_bins); | |
| 1505 | 1513 | continue; |
| 1514 | + } | |
| 1506 | 1515 | if ((mac_vid & ARLTBL_MAC_MASK) != mac) |
| 1507 | 1516 | continue; |
| 1517 | + if (dev->vlan_enabled && | |
| 1518 | + ((mac_vid >> ARLTBL_VID_S) & ARLTBL_VID_MASK) != vid) | |
| 1519 | + continue; | |
| 1508 | 1520 | *idx = i; |
| 1521 | + return 0; | |
| 1509 | 1522 | } |
| 1510 | 1523 | |
| 1524 | + if (bitmap_weight(free_bins, dev->num_arl_entries) == 0) | |
| 1525 | + return -ENOSPC; | |
| 1526 | + | |
| 1527 | + *idx = find_first_bit(free_bins, dev->num_arl_entries); | |
| 1528 | + | |
| 1511 | 1529 | return -ENOENT; |
| 1512 | 1530 | } |
| 1513 | 1531 | |
| @@ -1537,10 +1555,21 @@ static int b53_arl_op(struct b53_device *dev, int op, int port, · 23 unmodified lines | ||
| 1537 | 1555 | if (op) |
| 1538 | 1556 | return ret; |
| 1539 | 1557 | |
| 1540 | − /* We could not find a matching MAC, so reset to a new entry */ | |
| 1541 | − if (ret) { | |
| 1558 | + switch (ret) { | |
| 1559 | + case -ENOSPC: | |
| 1560 | + dev_dbg(dev->dev, "{%pM,%.4d} no space left in ARL\n", | |
| 1561 | + addr, vid); | |
| 1562 | + return is_valid ? ret : 0; | |
| 1563 | + case -ENOENT: | |
| 1564 | + /* We could not find a matching MAC, so reset to a new entry */ | |
| 1565 | + dev_dbg(dev->dev, "{%pM,%.4d} not found, using idx: %d\n", | |
| 1566 | + addr, vid, idx); | |
| 1542 | 1567 | fwd_entry = 0; |
| 1543 | − idx = 1; | |
| 1568 | + break; | |
| 1569 | + default: | |
| 1570 | + dev_dbg(dev->dev, "{%pM,%.4d} found, using idx: %d\n", | |
| 1571 | + addr, vid, idx); | |
| 1572 | + break; | |
| 1544 | 1573 | } |
| 1545 | 1574 | |
| 1546 | 1575 | /* For multicast address, the port is a bitmask and the validity |
| @@ -1558,7 +1587,6 @@ static int b53_arl_op(struct b53_device *dev, int op, int port, · 11 unmodified lines | ||
| 1558 | 1587 | ent.is_valid = !!(ent.port); |
| 1559 | 1588 | } |
| 1560 | 1589 | |
| 1561 | − ent.is_valid = is_valid; | |
| 1562 | 1590 | ent.vid = vid; |
| 1563 | 1591 | ent.is_static = true; |
| 1564 | 1592 | ent.is_age = false; |
| @@ -292,6 +292,7 @@ · 291 unmodified lines | ||
| 292 | 292 | /* ARL Table Read/Write Register (8 bit) */ |
| 293 | 293 | #define B53_ARLTBL_RW_CTRL 0x00 |
| 294 | 294 | #define ARLTBL_RW BIT(0) |
| 295 | +#define ARLTBL_IVL_SVL_SELECT BIT(6) | |
| 295 | 296 | #define ARLTBL_START_DONE BIT(7) |
| 296 | 297 | |
| 297 | 298 | /* MAC Address Index Register (48 bit) */ |
| @@ -304,7 +305,7 @@ · 6 unmodified lines | ||
| 304 | 305 | * |
| 305 | 306 | * BCM5325 and BCM5365 share most definitions below |
| 306 | 307 | */ |
| 307 | −#define B53_ARLTBL_MAC_VID_ENTRY(n) (0x10 * (n)) | |
| 308 | +#define B53_ARLTBL_MAC_VID_ENTRY(n) ((0x10 * (n)) + 0x10) | |
| 308 | 309 | #define ARLTBL_MAC_MASK 0xffffffffffffULL |
| 309 | 310 | #define ARLTBL_VID_S 48 |
| 310 | 311 | #define ARLTBL_VID_MASK_25 0xff |
| @@ -316,13 +317,16 @@ · 5 unmodified lines | ||
| 316 | 317 | #define ARLTBL_VALID_25 BIT(63) |
| 317 | 318 | |
| 318 | 319 | /* ARL Table Data Entry N Registers (32 bit) */ |
| 319 | −#define B53_ARLTBL_DATA_ENTRY(n) ((0x10 * (n)) + 0x08) | |
| 320 | +#define B53_ARLTBL_DATA_ENTRY(n) ((0x10 * (n)) + 0x18) | |
| 320 | 321 | #define ARLTBL_DATA_PORT_ID_MASK 0x1ff |
| 321 | 322 | #define ARLTBL_TC(tc) ((3 & tc) << 11) |
| 322 | 323 | #define ARLTBL_AGE BIT(14) |
| 323 | 324 | #define ARLTBL_STATIC BIT(15) |
| 324 | 325 | #define ARLTBL_VALID BIT(16) |
| 325 | 326 | |
| 327 | +/* Maximum number of bin entries in the ARL for all switches */ | |
| 328 | +#define B53_ARLTBL_MAX_BIN_ENTRIES 4 | |
| 329 | + | |
| 326 | 330 | /* ARL Search Control Register (8 bit) */ |
| 327 | 331 | #define B53_ARL_SRCH_CTL 0x50 |
| 328 | 332 | #define B53_ARL_SRCH_CTL_25 0x20 |
| @@ -24,8 +24,8 @@ config NET_DSA_MV88E6XXX_PTP · 23 unmodified lines | ||
| 24 | 24 | bool "PTP support for Marvell 88E6xxx" |
| 25 | 25 | default n |
| 26 | 26 | depends on NET_DSA_MV88E6XXX_GLOBAL2 |
| 27 | + depends on PTP_1588_CLOCK | |
| 27 | 28 | imply NETWORK_PHY_TIMESTAMPING |
| 28 | − imply PTP_1588_CLOCK | |
| 29 | 29 | help |
| 30 | 30 | Say Y to enable PTP hardware timestamping on Marvell 88E6xxx switch |
| 31 | 31 | chips that support it. |
| @@ -3962,7 +3962,6 @@ static const struct mv88e6xxx_ops mv88e6190_ops = { · 3961 unmodified lines | ||
| 3962 | 3962 | .serdes_get_stats = mv88e6390_serdes_get_stats, |
| 3963 | 3963 | .serdes_get_regs_len = mv88e6390_serdes_get_regs_len, |
| 3964 | 3964 | .serdes_get_regs = mv88e6390_serdes_get_regs, |
| 3965 | − .phylink_validate = mv88e6390_phylink_validate, | |
| 3966 | 3965 | .gpio_ops = &mv88e6352_gpio_ops, |
| 3967 | 3966 | .phylink_validate = mv88e6390_phylink_validate, |
| 3968 | 3967 | }; |
| @@ -4021,7 +4020,6 @@ static const struct mv88e6xxx_ops mv88e6190x_ops = { · 52 unmodified lines | ||
| 4021 | 4020 | .serdes_get_stats = mv88e6390_serdes_get_stats, |
| 4022 | 4021 | .serdes_get_regs_len = mv88e6390_serdes_get_regs_len, |
| 4023 | 4022 | .serdes_get_regs = mv88e6390_serdes_get_regs, |
| 4024 | − .phylink_validate = mv88e6390_phylink_validate, | |
| 4025 | 4023 | .gpio_ops = &mv88e6352_gpio_ops, |
| 4026 | 4024 | .phylink_validate = mv88e6390x_phylink_validate, |
| 4027 | 4025 | }; |
| @@ -4079,7 +4077,6 @@ static const struct mv88e6xxx_ops mv88e6191_ops = { · 51 unmodified lines | ||
| 4079 | 4077 | .serdes_get_stats = mv88e6390_serdes_get_stats, |
| 4080 | 4078 | .serdes_get_regs_len = mv88e6390_serdes_get_regs_len, |
| 4081 | 4079 | .serdes_get_regs = mv88e6390_serdes_get_regs, |
| 4082 | − .phylink_validate = mv88e6390_phylink_validate, | |
| 4083 | 4080 | .avb_ops = &mv88e6390_avb_ops, |
| 4084 | 4081 | .ptp_ops = &mv88e6352_ptp_ops, |
| 4085 | 4082 | .phylink_validate = mv88e6390_phylink_validate, |
| @@ -4235,7 +4232,6 @@ static const struct mv88e6xxx_ops mv88e6290_ops = { · 149 unmodified lines | ||
| 4235 | 4232 | .serdes_get_stats = mv88e6390_serdes_get_stats, |
| 4236 | 4233 | .serdes_get_regs_len = mv88e6390_serdes_get_regs_len, |
| 4237 | 4234 | .serdes_get_regs = mv88e6390_serdes_get_regs, |
| 4238 | − .phylink_validate = mv88e6390_phylink_validate, | |
| 4239 | 4235 | .gpio_ops = &mv88e6352_gpio_ops, |
| 4240 | 4236 | .avb_ops = &mv88e6390_avb_ops, |
| 4241 | 4237 | .ptp_ops = &mv88e6352_ptp_ops, |
| @@ -400,6 +400,7 @@ static int felix_init_structs(struct felix *felix, int num_phys_ports) · 399 unmodified lines | ||
| 400 | 400 | ocelot->stats_layout = felix->info->stats_layout; |
| 401 | 401 | ocelot->num_stats = felix->info->num_stats; |
| 402 | 402 | ocelot->shared_queue_sz = felix->info->shared_queue_sz; |
| 403 | + ocelot->num_mact_rows = felix->info->num_mact_rows; | |
| 403 | 404 | ocelot->vcap_is2_keys = felix->info->vcap_is2_keys; |
| 404 | 405 | ocelot->vcap_is2_actions= felix->info->vcap_is2_actions; |
| 405 | 406 | ocelot->vcap = felix->info->vcap; |
| @@ -15,6 +15,7 @@ struct felix_info { · 14 unmodified lines | ||
| 15 | 15 | const u32 *const *map; |
| 16 | 16 | const struct ocelot_ops *ops; |
| 17 | 17 | int shared_queue_sz; |
| 18 | + int num_mact_rows; | |
| 18 | 19 | const struct ocelot_stat_layout *stats_layout; |
| 19 | 20 | unsigned int num_stats; |
| 20 | 21 | int num_ports; |
| @@ -1220,6 +1220,7 @@ struct felix_info felix_info_vsc9959 = { · 1219 unmodified lines | ||
| 1220 | 1220 | .vcap_is2_actions = vsc9959_vcap_is2_actions, |
| 1221 | 1221 | .vcap = vsc9959_vcap_props, |
| 1222 | 1222 | .shared_queue_sz = 128 * 1024, |
| 1223 | + .num_mact_rows = 2048, | |
| 1223 | 1224 | .num_ports = 6, |
| 1224 | 1225 | .switch_pci_bar = 4, |
| 1225 | 1226 | .imdio_pci_bar = 0, |
| @@ -20,6 +20,7 @@ tristate "NXP SJA1105 Ethernet switch family support" · 19 unmodified lines | ||
| 20 | 20 | config NET_DSA_SJA1105_PTP |
| 21 | 21 | bool "Support for the PTP clock on the NXP SJA1105 Ethernet switch" |
| 22 | 22 | depends on NET_DSA_SJA1105 |
| 23 | + depends on PTP_1588_CLOCK | |
| 23 | 24 | help |
| 24 | 25 | This enables support for timestamping and PTP clock manipulations in |
| 25 | 26 | the SJA1105 DSA driver. |
| @@ -16,14 +16,15 @@ · 15 unmodified lines | ||
| 16 | 16 | |
| 17 | 17 | /* PTPSYNCTS has no interrupt or update mechanism, because the intended |
| 18 | 18 | * hardware use case is for the timestamp to be collected synchronously, |
| 19 | − * immediately after the CAS_MASTER SJA1105 switch has triggered a CASSYNC | |
| 20 | − * pulse on the PTP_CLK pin. When used as a generic extts source, it needs | |
| 21 | − * polling and a comparison with the old value. The polling interval is just | |
| 22 | − * the Nyquist rate of a canonical PPS input (e.g. from a GPS module). | |
| 23 | − * Anything of higher frequency than 1 Hz will be lost, since there is no | |
| 24 | − * timestamp FIFO. | |
| 19 | + * immediately after the CAS_MASTER SJA1105 switch has performed a CASSYNC | |
| 20 | + * one-shot toggle (no return to level) on the PTP_CLK pin. When used as a | |
| 21 | + * generic extts source, the PTPSYNCTS register needs polling and a comparison | |
| 22 | + * with the old value. The polling interval is configured as the Nyquist rate | |
| 23 | + * of a signal with 50% duty cycle and 1Hz frequency, which is sadly all that | |
| 24 | + * this hardware can do (but may be enough for some setups). Anything of higher | |
| 25 | + * frequency than 1 Hz will be lost, since there is no timestamp FIFO. | |
| 25 | 26 | */ |
| 26 | −#define SJA1105_EXTTS_INTERVAL (HZ / 2) | |
| 27 | +#define SJA1105_EXTTS_INTERVAL (HZ / 4) | |
| 27 | 28 | |
| 28 | 29 | /* This range is actually +/- SJA1105_MAX_ADJ_PPB |
| 29 | 30 | * divided by 1000 (ppb -> ppm) and with a 16-bit |
| @@ -754,7 +755,16 @@ static int sja1105_extts_enable(struct sja1105_private *priv, · 724 unmodified lines | ||
| 754 | 755 | return -EOPNOTSUPP; |
| 755 | 756 | |
| 756 | 757 | /* Reject requests with unsupported flags */ |
| 757 | − if (extts->flags) | |
| 758 | + if (extts->flags & ~(PTP_ENABLE_FEATURE | | |
| 759 | + PTP_RISING_EDGE | | |
| 760 | + PTP_FALLING_EDGE | | |
| 761 | + PTP_STRICT_FLAGS)) | |
| 762 | + return -EOPNOTSUPP; | |
| 763 | + | |
| 764 | + /* We can only enable time stamping on both edges, sadly. */ | |
| 765 | + if ((extts->flags & PTP_STRICT_FLAGS) && | |
| 766 | + (extts->flags & PTP_ENABLE_FEATURE) && | |
| 767 | + (extts->flags & PTP_EXTTS_EDGES) != PTP_EXTTS_EDGES) | |
| 758 | 768 | return -EOPNOTSUPP; |
| 759 | 769 | |
| 760 | 770 | rc = sja1105_change_ptp_clk_pin_func(priv, PTP_PF_EXTTS); |
| @@ -69,7 +69,7 @@ · 68 unmodified lines | ||
| 69 | 69 | * 16kB. |
| 70 | 70 | */ |
| 71 | 71 | #if PAGE_SIZE > SZ_16K |
| 72 | −#define ENA_PAGE_SIZE SZ_16K | |
| 72 | +#define ENA_PAGE_SIZE (_AC(SZ_16K, UL)) | |
| 73 | 73 | #else |
| 74 | 74 | #define ENA_PAGE_SIZE PAGE_SIZE |
| 75 | 75 | #endif |
| @@ -57,7 +57,7 @@ static const struct aq_board_revision_s hw_atl_boards[] = { · 56 unmodified lines | ||
| 57 | 57 | { AQ_DEVICE_ID_D108, AQ_HWREV_2, &hw_atl_ops_b0, &hw_atl_b0_caps_aqc108, }, |
| 58 | 58 | { AQ_DEVICE_ID_D109, AQ_HWREV_2, &hw_atl_ops_b0, &hw_atl_b0_caps_aqc109, }, |
| 59 | 59 | |
| 60 | − { AQ_DEVICE_ID_AQC100, AQ_HWREV_ANY, &hw_atl_ops_b1, &hw_atl_b0_caps_aqc107, }, | |
| 60 | + { AQ_DEVICE_ID_AQC100, AQ_HWREV_ANY, &hw_atl_ops_b1, &hw_atl_b0_caps_aqc100, }, | |
| 61 | 61 | { AQ_DEVICE_ID_AQC107, AQ_HWREV_ANY, &hw_atl_ops_b1, &hw_atl_b0_caps_aqc107, }, |
| 62 | 62 | { AQ_DEVICE_ID_AQC108, AQ_HWREV_ANY, &hw_atl_ops_b1, &hw_atl_b0_caps_aqc108, }, |
| 63 | 63 | { AQ_DEVICE_ID_AQC109, AQ_HWREV_ANY, &hw_atl_ops_b1, &hw_atl_b0_caps_aqc109, }, |
| @@ -664,7 +664,8 @@ static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv, · 663 unmodified lines | ||
| 664 | 664 | dma_addr_t mapping; |
| 665 | 665 | |
| 666 | 666 | /* Allocate a new SKB for a new packet */ |
| 667 | − skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH); | |
| 667 | + skb = __netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH, | |
| 668 | + GFP_ATOMIC | __GFP_NOWARN); | |
| 668 | 669 | if (!skb) { |
| 669 | 670 | priv->mib.alloc_rx_buff_failed++; |
| 670 | 671 | netif_err(priv, rx_err, ndev, "SKB alloc failed\n"); |
| @@ -2475,7 +2476,6 @@ static int bcm_sysport_probe(struct platform_device *pdev) · 1804 unmodified lines | ||
| 2475 | 2476 | priv->wol_irq = platform_get_irq(pdev, 1); |
| 2476 | 2477 | } |
| 2477 | 2478 | if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) { |
| 2478 | − dev_err(&pdev->dev, "invalid interrupts\n"); | |
| 2479 | 2479 | ret = -EINVAL; |
| 2480 | 2480 | goto err_free_netdev; |
| 2481 | 2481 | } |
| @@ -202,13 +202,8 @@ static int bgmac_probe(struct platform_device *pdev) · 201 unmodified lines | ||
| 202 | 202 | if (bgmac->irq < 0) |
| 203 | 203 | return bgmac->irq; |
| 204 | 204 | |
| 205 | − regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "amac_base"); | |
| 206 | − if (!regs) { | |
| 207 | − dev_err(&pdev->dev, "Unable to obtain base resource\n"); | |
| 208 | − return -EINVAL; | |
| 209 | − } | |
| 210 | − | |
| 211 | − bgmac->plat.base = devm_ioremap_resource(&pdev->dev, regs); | |
| 205 | + bgmac->plat.base = | |
| 206 | + devm_platform_ioremap_resource_byname(pdev, "amac_base"); | |
| 212 | 207 | if (IS_ERR(bgmac->plat.base)) |
| 213 | 208 | return PTR_ERR(bgmac->plat.base); |
| 214 | 209 | |
| @@ -6642,7 +6642,7 @@ static int bnxt_alloc_ctx_pg_tbls(struct bnxt *bp, · 6641 unmodified lines | ||
| 6642 | 6642 | int rc; |
| 6643 | 6643 | |
| 6644 | 6644 | if (!mem_size) |
| 6645 | − return 0; | |
| 6645 | + return -EINVAL; | |
| 6646 | 6646 | |
| 6647 | 6647 | ctx_pg->nr_pages = DIV_ROUND_UP(mem_size, BNXT_PAGE_SIZE); |
| 6648 | 6648 | if (ctx_pg->nr_pages > MAX_CTX_TOTAL_PAGES) { |
| @@ -9780,6 +9780,7 @@ static netdev_features_t bnxt_fix_features(struct net_device *dev, · 3131 unmodified lines | ||
| 9780 | 9780 | netdev_features_t features) |
| 9781 | 9781 | { |
| 9782 | 9782 | struct bnxt *bp = netdev_priv(dev); |
| 9783 | + netdev_features_t vlan_features; | |
| 9783 | 9784 | |
| 9784 | 9785 | if ((features & NETIF_F_NTUPLE) && !bnxt_rfs_capable(bp)) |
| 9785 | 9786 | features &= ~NETIF_F_NTUPLE; |
| @@ -9796,12 +9797,14 @@ static netdev_features_t bnxt_fix_features(struct net_device *dev, · 10 unmodified lines | ||
| 9796 | 9797 | /* Both CTAG and STAG VLAN accelaration on the RX side have to be |
| 9797 | 9798 | * turned on or off together. |
| 9798 | 9799 | */ |
| 9799 | − if ((features & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_STAG_RX)) != | |
| 9800 | − (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_STAG_RX)) { | |
| 9800 | + vlan_features = features & (NETIF_F_HW_VLAN_CTAG_RX | | |
| 9801 | + NETIF_F_HW_VLAN_STAG_RX); | |
| 9802 | + if (vlan_features != (NETIF_F_HW_VLAN_CTAG_RX | | |
| 9803 | + NETIF_F_HW_VLAN_STAG_RX)) { | |
| 9801 | 9804 | if (dev->features & NETIF_F_HW_VLAN_CTAG_RX) |
| 9802 | 9805 | features &= ~(NETIF_F_HW_VLAN_CTAG_RX | |
| 9803 | 9806 | NETIF_F_HW_VLAN_STAG_RX); |
| 9804 | − else | |
| 9807 | + else if (vlan_features) | |
| 9805 | 9808 | features |= NETIF_F_HW_VLAN_CTAG_RX | |
| 9806 | 9809 | NETIF_F_HW_VLAN_STAG_RX; |
| 9807 | 9810 | } |
| @@ -12212,12 +12215,15 @@ static pci_ers_result_t bnxt_io_slot_reset(struct pci_dev *pdev) · 2404 unmodified lines | ||
| 12212 | 12215 | bnxt_ulp_start(bp, err); |
| 12213 | 12216 | } |
| 12214 | 12217 | |
| 12215 | − if (result != PCI_ERS_RESULT_RECOVERED && netif_running(netdev)) | |
| 12216 | − dev_close(netdev); | |
| 12218 | + if (result != PCI_ERS_RESULT_RECOVERED) { | |
| 12219 | + if (netif_running(netdev)) | |
| 12220 | + dev_close(netdev); | |
| 12221 | + pci_disable_device(pdev); | |
| 12222 | + } | |
| 12217 | 12223 | |
| 12218 | 12224 | rtnl_unlock(); |
| 12219 | 12225 | |
| 12220 | − return PCI_ERS_RESULT_RECOVERED; | |
| 12226 | + return result; | |
| 12221 | 12227 | } |
| 12222 | 12228 | |
| 12223 | 12229 | /** |
| @@ -1066,7 +1066,6 @@ struct bnxt_vf_info { · 1065 unmodified lines | ||
| 1066 | 1066 | #define BNXT_VF_LINK_FORCED 0x4 |
| 1067 | 1067 | #define BNXT_VF_LINK_UP 0x8 |
| 1068 | 1068 | #define BNXT_VF_TRUST 0x10 |
| 1069 | − u32 func_flags; /* func cfg flags */ | |
| 1070 | 1069 | u32 min_tx_rate; |
| 1071 | 1070 | u32 max_tx_rate; |
| 1072 | 1071 | void *hwrm_cmd_req_addr; |
| @@ -43,7 +43,7 @@ static inline void bnxt_link_bp_to_dl(struct bnxt *bp, struct devlink *dl) · 42 unmodified lines | ||
| 43 | 43 | #define BNXT_NVM_CFG_VER_BITS 24 |
| 44 | 44 | #define BNXT_NVM_CFG_VER_BYTES 4 |
| 45 | 45 | |
| 46 | −#define BNXT_MSIX_VEC_MAX 1280 | |
| 46 | +#define BNXT_MSIX_VEC_MAX 512 | |
| 47 | 47 | #define BNXT_MSIX_VEC_MIN_MAX 128 |
| 48 | 48 | |
| 49 | 49 | enum bnxt_nvm_dir_type { |
| @@ -85,11 +85,10 @@ int bnxt_set_vf_spoofchk(struct net_device *dev, int vf_id, bool setting) · 84 unmodified lines | ||
| 85 | 85 | if (old_setting == setting) |
| 86 | 86 | return 0; |
| 87 | 87 | |
| 88 | − func_flags = vf->func_flags; | |
| 89 | 88 | if (setting) |
| 90 | − func_flags |= FUNC_CFG_REQ_FLAGS_SRC_MAC_ADDR_CHECK_ENABLE; | |
| 89 | + func_flags = FUNC_CFG_REQ_FLAGS_SRC_MAC_ADDR_CHECK_ENABLE; | |
| 91 | 90 | else |
| 92 | − func_flags |= FUNC_CFG_REQ_FLAGS_SRC_MAC_ADDR_CHECK_DISABLE; | |
| 91 | + func_flags = FUNC_CFG_REQ_FLAGS_SRC_MAC_ADDR_CHECK_DISABLE; | |
| 93 | 92 | /*TODO: if the driver supports VLAN filter on guest VLAN, |
| 94 | 93 | * the spoof check should also include vlan anti-spoofing |
| 95 | 94 | */ |
| @@ -98,7 +97,6 @@ int bnxt_set_vf_spoofchk(struct net_device *dev, int vf_id, bool setting) · 2 unmodified lines | ||
| 98 | 97 | req.flags = cpu_to_le32(func_flags); |
| 99 | 98 | rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); |
| 100 | 99 | if (!rc) { |
| 101 | − vf->func_flags = func_flags; | |
| 102 | 100 | if (setting) |
| 103 | 101 | vf->flags |= BNXT_VF_SPOOFCHK; |
| 104 | 102 | else |
| @@ -228,7 +226,6 @@ int bnxt_set_vf_mac(struct net_device *dev, int vf_id, u8 *mac) · 123 unmodified lines | ||
| 228 | 226 | memcpy(vf->mac_addr, mac, ETH_ALEN); |
| 229 | 227 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1); |
| 230 | 228 | req.fid = cpu_to_le16(vf->fw_fid); |
| 231 | − req.flags = cpu_to_le32(vf->func_flags); | |
| 232 | 229 | req.enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_MAC_ADDR); |
| 233 | 230 | memcpy(req.dflt_mac_addr, mac, ETH_ALEN); |
| 234 | 231 | return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); |
| @@ -266,7 +263,6 @@ int bnxt_set_vf_vlan(struct net_device *dev, int vf_id, u16 vlan_id, u8 qos, · 31 unmodified lines | ||
| 266 | 263 | |
| 267 | 264 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1); |
| 268 | 265 | req.fid = cpu_to_le16(vf->fw_fid); |
| 269 | − req.flags = cpu_to_le32(vf->func_flags); | |
| 270 | 266 | req.dflt_vlan = cpu_to_le16(vlan_tag); |
| 271 | 267 | req.enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_VLAN); |
| 272 | 268 | rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); |
| @@ -305,7 +301,6 @@ int bnxt_set_vf_bw(struct net_device *dev, int vf_id, int min_tx_rate, · 32 unmodified lines | ||
| 305 | 301 | return 0; |
| 306 | 302 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1); |
| 307 | 303 | req.fid = cpu_to_le16(vf->fw_fid); |
| 308 | − req.flags = cpu_to_le32(vf->func_flags); | |
| 309 | 304 | req.enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_MAX_BW); |
| 310 | 305 | req.max_bw = cpu_to_le32(max_tx_rate); |
| 311 | 306 | req.enables |= cpu_to_le32(FUNC_CFG_REQ_ENABLES_MIN_BW); |
| @@ -477,7 +472,6 @@ static void __bnxt_set_vf_params(struct bnxt *bp, int vf_id) · 165 unmodified lines | ||
| 477 | 472 | vf = &bp->pf.vf[vf_id]; |
| 478 | 473 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1); |
| 479 | 474 | req.fid = cpu_to_le16(vf->fw_fid); |
| 480 | − req.flags = cpu_to_le32(vf->func_flags); | |
| 481 | 475 | |
| 482 | 476 | if (is_valid_ether_addr(vf->mac_addr)) { |
| 483 | 477 | req.enables |= cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_MAC_ADDR); |
| @@ -934,6 +934,8 @@ static void bcmgenet_get_ethtool_stats(struct net_device *dev, · 933 unmodified lines | ||
| 934 | 934 | if (netif_running(dev)) |
| 935 | 935 | bcmgenet_update_mib_counters(priv); |
| 936 | 936 | |
| 937 | + dev->netdev_ops->ndo_get_stats(dev); | |
| 938 | + | |
| 937 | 939 | for (i = 0; i < BCMGENET_STATS_LEN; i++) { |
| 938 | 940 | const struct bcmgenet_stats *s; |
| 939 | 941 | char *p; |
| @@ -1622,7 +1624,8 @@ static struct sk_buff *bcmgenet_rx_refill(struct bcmgenet_priv *priv, · 682 unmodified lines | ||
| 1622 | 1624 | dma_addr_t mapping; |
| 1623 | 1625 | |
| 1624 | 1626 | /* Allocate a new Rx skb */ |
| 1625 | − skb = netdev_alloc_skb(priv->dev, priv->rx_buf_len + SKB_ALIGNMENT); | |
| 1627 | + skb = __netdev_alloc_skb(priv->dev, priv->rx_buf_len + SKB_ALIGNMENT, | |
| 1628 | + GFP_ATOMIC | __GFP_NOWARN); | |
| 1626 | 1629 | if (!skb) { |
| 1627 | 1630 | priv->mib.alloc_rx_buff_failed++; |
| 1628 | 1631 | netif_err(priv, rx_err, priv->dev, |
| @@ -3156,6 +3159,7 @@ static struct net_device_stats *bcmgenet_get_stats(struct net_device *dev) · 1527 unmodified lines | ||
| 3156 | 3159 | dev->stats.rx_packets = rx_packets; |
| 3157 | 3160 | dev->stats.rx_errors = rx_errors; |
| 3158 | 3161 | dev->stats.rx_missed_errors = rx_errors; |
| 3162 | + dev->stats.rx_dropped = rx_dropped; | |
| 3159 | 3163 | return &dev->stats; |
| 3160 | 3164 | } |
| 3161 | 3165 | |
| @@ -35,8 +35,8 @@ config MACB · 34 unmodified lines | ||
| 35 | 35 | config MACB_USE_HWSTAMP |
| 36 | 36 | bool "Use IEEE 1588 hwstamp" |
| 37 | 37 | depends on MACB |
| 38 | + depends on PTP_1588_CLOCK | |
| 38 | 39 | default y |
| 39 | − imply PTP_1588_CLOCK | |
| 40 | 40 | ---help--- |
| 41 | 41 | Enable IEEE 1588 Precision Time Protocol (PTP) support for MACB. |
| 42 | 42 | |
| @@ -334,8 +334,10 @@ static int macb_mdio_read(struct mii_bus *bus, int mii_id, int regnum) · 333 unmodified lines | ||
| 334 | 334 | int status; |
| 335 | 335 | |
| 336 | 336 | status = pm_runtime_get_sync(&bp->pdev->dev); |
| 337 | − if (status < 0) | |
| 337 | + if (status < 0) { | |
| 338 | + pm_runtime_put_noidle(&bp->pdev->dev); | |
| 338 | 339 | goto mdio_pm_exit; |
| 340 | + } | |
| 339 | 341 | |
| 340 | 342 | status = macb_mdio_wait_for_idle(bp); |
| 341 | 343 | if (status < 0) |
| @@ -386,8 +388,10 @@ static int macb_mdio_write(struct mii_bus *bus, int mii_id, int regnum, · 44 unmodified lines | ||
| 386 | 388 | int status; |
| 387 | 389 | |
| 388 | 390 | status = pm_runtime_get_sync(&bp->pdev->dev); |
| 389 | − if (status < 0) | |
| 391 | + if (status < 0) { | |
| 392 | + pm_runtime_put_noidle(&bp->pdev->dev); | |
| 390 | 393 | goto mdio_pm_exit; |
| 394 | + } | |
| 391 | 395 | |
| 392 | 396 | status = macb_mdio_wait_for_idle(bp); |
| 393 | 397 | if (status < 0) |
| @@ -3816,8 +3820,10 @@ static int at91ether_open(struct net_device *dev) · 3422 unmodified lines | ||
| 3816 | 3820 | int ret; |
| 3817 | 3821 | |
| 3818 | 3822 | ret = pm_runtime_get_sync(&lp->pdev->dev); |
| 3819 | − if (ret < 0) | |
| 3823 | + if (ret < 0) { | |
| 3824 | + pm_runtime_put_noidle(&lp->pdev->dev); | |
| 3820 | 3825 | return ret; |
| 3826 | + } | |
| 3821 | 3827 | |
| 3822 | 3828 | /* Clear internal statistics */ |
| 3823 | 3829 | ctl = macb_readl(lp, NCR); |
| @@ -4172,15 +4178,9 @@ static int fu540_c000_clk_init(struct platform_device *pdev, struct clk **pclk, · 348 unmodified lines | ||
| 4172 | 4178 | |
| 4173 | 4179 | static int fu540_c000_init(struct platform_device *pdev) |
| 4174 | 4180 | { |
| 4175 | − struct resource *res; | |
| 4176 | − | |
| 4177 | − res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | |
| 4178 | − if (!res) | |
| 4179 | − return -ENODEV; | |
| 4180 | − | |
| 4181 | − mgmt->reg = ioremap(res->start, resource_size(res)); | |
| 4182 | − if (!mgmt->reg) | |
| 4183 | − return -ENOMEM; | |
| 4181 | + mgmt->reg = devm_platform_ioremap_resource(pdev, 1); | |
| 4182 | + if (IS_ERR(mgmt->reg)) | |
| 4183 | + return PTR_ERR(mgmt->reg); | |
| 4184 | 4184 | |
| 4185 | 4185 | return macb_init(pdev); |
| 4186 | 4186 | } |
| @@ -54,7 +54,7 @@ config THUNDER_NIC_RGX · 53 unmodified lines | ||
| 54 | 54 | config CAVIUM_PTP |
| 55 | 55 | tristate "Cavium PTP coprocessor as PTP clock" |
| 56 | 56 | depends on 64BIT && PCI |
| 57 | − imply PTP_1588_CLOCK | |
| 57 | + depends on PTP_1588_CLOCK | |
| 58 | 58 | ---help--- |
| 59 | 59 | This driver adds support for the Precision Time Protocol Clocks and |
| 60 | 60 | Timestamping coprocessor (PTP) found on Cavium processors. |
| @@ -1049,9 +1049,9 @@ static void cudbg_t4_fwcache(struct cudbg_init *pdbg_init, · 1048 unmodified lines | ||
| 1049 | 1049 | } |
| 1050 | 1050 | } |
| 1051 | 1051 | |
| 1052 | −static unsigned long cudbg_mem_region_size(struct cudbg_init *pdbg_init, | |
| 1053 | − struct cudbg_error *cudbg_err, | |
| 1054 | − u8 mem_type) | |
| 1052 | +static int cudbg_mem_region_size(struct cudbg_init *pdbg_init, | |
| 1053 | + struct cudbg_error *cudbg_err, | |
| 1054 | + u8 mem_type, unsigned long *region_size) | |
| 1055 | 1055 | { |
| 1056 | 1056 | struct adapter *padap = pdbg_init->adap; |
| 1057 | 1057 | struct cudbg_meminfo mem_info; |
| @@ -1060,15 +1060,23 @@ static unsigned long cudbg_mem_region_size(struct cudbg_init *pdbg_init, · 2 unmodified lines | ||
| 1060 | 1060 | |
| 1061 | 1061 | memset(&mem_info, 0, sizeof(struct cudbg_meminfo)); |
| 1062 | 1062 | rc = cudbg_fill_meminfo(padap, &mem_info); |
| 1063 | − if (rc) | |
| 1063 | + if (rc) { | |
| 1064 | + cudbg_err->sys_err = rc; | |
| 1064 | 1065 | return rc; |
| 1066 | + } | |
| 1065 | 1067 | |
| 1066 | 1068 | cudbg_t4_fwcache(pdbg_init, cudbg_err); |
| 1067 | 1069 | rc = cudbg_meminfo_get_mem_index(padap, &mem_info, mem_type, &mc_idx); |
| 1068 | − if (rc) | |
| 1070 | + if (rc) { | |
| 1071 | + cudbg_err->sys_err = rc; | |
| 1069 | 1072 | return rc; |
| 1073 | + } | |
| 1074 | + | |
| 1075 | + if (region_size) | |
| 1076 | + *region_size = mem_info.avail[mc_idx].limit - | |
| 1077 | + mem_info.avail[mc_idx].base; | |
| 1070 | 1078 | |
| 1071 | − return mem_info.avail[mc_idx].limit - mem_info.avail[mc_idx].base; | |
| 1079 | + return 0; | |
| 1072 | 1080 | } |
| 1073 | 1081 | |
| 1074 | 1082 | static int cudbg_collect_mem_region(struct cudbg_init *pdbg_init, |
| @@ -1076,7 +1084,12 @@ static int cudbg_collect_mem_region(struct cudbg_init *pdbg_init, · 1 unmodified line | ||
| 1076 | 1084 | struct cudbg_error *cudbg_err, |
| 1077 | 1085 | u8 mem_type) |
| 1078 | 1086 | { |
| 1079 | − unsigned long size = cudbg_mem_region_size(pdbg_init, cudbg_err, mem_type); | |
| 1087 | + unsigned long size = 0; | |
| 1088 | + int rc; | |
| 1089 | + | |
| 1090 | + rc = cudbg_mem_region_size(pdbg_init, cudbg_err, mem_type, &size); | |
| 1091 | + if (rc) | |
| 1092 | + return rc; | |
| 1080 | 1093 | |
| 1081 | 1094 | return cudbg_read_fw_mem(pdbg_init, dbg_buff, mem_type, size, |
| 1082 | 1095 | cudbg_err); |
| @@ -311,32 +311,17 @@ static int cxgb4_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) · 310 unmodified lines | ||
| 311 | 311 | */ |
| 312 | 312 | static int cxgb4_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts) |
| 313 | 313 | { |
| 314 | − struct adapter *adapter = (struct adapter *)container_of(ptp, | |
| 315 | − struct adapter, ptp_clock_info); | |
| 316 | − struct fw_ptp_cmd c; | |
| 314 | + struct adapter *adapter = container_of(ptp, struct adapter, | |
| 315 | + ptp_clock_info); | |
| 317 | 316 | u64 ns; |
| 318 | − int err; | |
| 319 | − | |
| 320 | − memset(&c, 0, sizeof(c)); | |
| 321 | − c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) | | |
| 322 | − FW_CMD_REQUEST_F | | |
| 323 | − FW_CMD_READ_F | | |
| 324 | − FW_PTP_CMD_PORTID_V(0)); | |
| 325 | − c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16)); | |
| 326 | − c.u.ts.sc = FW_PTP_SC_GET_TIME; | |
| 327 | 317 | |
| 328 | − err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), &c); | |
| 329 | − if (err < 0) { | |
| 330 | − dev_err(adapter->pdev_dev, | |
| 331 | − "PTP: %s error %d\n", __func__, -err); | |
| 332 | − return err; | |
| 333 | − } | |
| 318 | + ns = t4_read_reg(adapter, T5_PORT_REG(0, MAC_PORT_PTP_SUM_LO_A)); | |
| 319 | + ns |= (u64)t4_read_reg(adapter, | |
| 320 | + T5_PORT_REG(0, MAC_PORT_PTP_SUM_HI_A)) << 32; | |
| 334 | 321 | |
| 335 | 322 | /* convert to timespec*/ |
| 336 | − ns = be64_to_cpu(c.u.ts.tm); | |
| 337 | 323 | *ts = ns_to_timespec64(ns); |
| 338 | − | |
| 339 | − return err; | |
| 324 | + return 0; | |
| 340 | 325 | } |
| 341 | 326 | |
| 342 | 327 | /** |
| @@ -2207,6 +2207,9 @@ static void ethofld_hard_xmit(struct net_device *dev, · 2206 unmodified lines | ||
| 2207 | 2207 | if (unlikely(skip_eotx_wr)) { |
| 2208 | 2208 | start = (u64 *)wr; |
| 2209 | 2209 | eosw_txq->state = next_state; |
| 2210 | + eosw_txq->cred -= wrlen16; | |
| 2211 | + eosw_txq->ncompl++; | |
| 2212 | + eosw_txq->last_compl = 0; | |
| 2210 | 2213 | goto write_wr_headers; |
| 2211 | 2214 | } |
| 2212 | 2215 | |
| @@ -2365,6 +2368,34 @@ netdev_tx_t t4_start_xmit(struct sk_buff *skb, struct net_device *dev) · 152 unmodified lines | ||
| 2365 | 2368 | return cxgb4_eth_xmit(skb, dev); |
| 2366 | 2369 | } |
| 2367 | 2370 | |
| 2371 | +static void eosw_txq_flush_pending_skbs(struct sge_eosw_txq *eosw_txq) | |
| 2372 | +{ | |
| 2373 | + int pktcount = eosw_txq->pidx - eosw_txq->last_pidx; | |
| 2374 | + int pidx = eosw_txq->pidx; | |
| 2375 | + struct sk_buff *skb; | |
| 2376 | + | |
| 2377 | + if (!pktcount) | |
| 2378 | + return; | |
| 2379 | + | |
| 2380 | + if (pktcount < 0) | |
| 2381 | + pktcount += eosw_txq->ndesc; | |
| 2382 | + | |
| 2383 | + while (pktcount--) { | |
| 2384 | + pidx--; | |
| 2385 | + if (pidx < 0) | |
| 2386 | + pidx += eosw_txq->ndesc; | |
| 2387 | + | |
| 2388 | + skb = eosw_txq->desc[pidx].skb; | |
| 2389 | + if (skb) { | |
| 2390 | + dev_consume_skb_any(skb); | |
| 2391 | + eosw_txq->desc[pidx].skb = NULL; | |
| 2392 | + eosw_txq->inuse--; | |
| 2393 | + } | |
| 2394 | + } | |
| 2395 | + | |
| 2396 | + eosw_txq->pidx = eosw_txq->last_pidx + 1; | |
| 2397 | +} | |
| 2398 | + | |
| 2368 | 2399 | /** |
| 2369 | 2400 | * cxgb4_ethofld_send_flowc - Send ETHOFLD flowc request to bind eotid to tc. |
| 2370 | 2401 | * @dev - netdevice |
| @@ -2440,9 +2471,11 @@ int cxgb4_ethofld_send_flowc(struct net_device *dev, u32 eotid, u32 tc) · 69 unmodified lines | ||
| 2440 | 2471 | FW_FLOWC_MNEM_EOSTATE_CLOSING : |
| 2441 | 2472 | FW_FLOWC_MNEM_EOSTATE_ESTABLISHED); |
| 2442 | 2473 | |
| 2443 | − eosw_txq->cred -= len16; | |
| 2444 | − eosw_txq->ncompl++; | |
| 2445 | − eosw_txq->last_compl = 0; | |
| 2474 | + /* Free up any pending skbs to ensure there's room for | |
| 2475 | + * termination FLOWC. | |
| 2476 | + */ | |
| 2477 | + if (tc == FW_SCHED_CLS_NONE) | |
| 2478 | + eosw_txq_flush_pending_skbs(eosw_txq); | |
| 2446 | 2479 | |
| 2447 | 2480 | ret = eosw_txq_enqueue(eosw_txq, skb); |
| 2448 | 2481 | if (ret) { |
| @@ -2695,6 +2728,7 @@ static void ofldtxq_stop(struct sge_uld_txq *q, struct fw_wr_hdr *wr) · 246 unmodified lines | ||
| 2695 | 2728 | * is ever running at a time ... |
| 2696 | 2729 | */ |
| 2697 | 2730 | static void service_ofldq(struct sge_uld_txq *q) |
| 2731 | + __must_hold(&q->sendq.lock) | |
| 2698 | 2732 | { |
| 2699 | 2733 | u64 *pos, *before, *end; |
| 2700 | 2734 | int credits; |
| @@ -1906,6 +1906,9 @@ · 1905 unmodified lines | ||
| 1906 | 1906 | |
| 1907 | 1907 | #define MAC_PORT_CFG2_A 0x818 |
| 1908 | 1908 | |
| 1909 | +#define MAC_PORT_PTP_SUM_LO_A 0x990 | |
| 1910 | +#define MAC_PORT_PTP_SUM_HI_A 0x994 | |
| 1911 | + | |
| 1909 | 1912 | #define MPS_CMN_CTL_A 0x9000 |
| 1910 | 1913 | |
| 1911 | 1914 | #define COUNTPAUSEMCRX_S 5 |
| @@ -74,8 +74,8 @@ err_pci_mem_reg: · 73 unmodified lines | ||
| 74 | 74 | pci_disable_device(pdev); |
| 75 | 75 | err_pci_enable: |
| 76 | 76 | err_mdiobus_alloc: |
| 77 | − iounmap(port_regs); | |
| 78 | 77 | err_hw_alloc: |
| 78 | + iounmap(port_regs); | |
| 79 | 79 | err_ioremap: |
| 80 | 80 | return err; |
| 81 | 81 | } |
| @@ -2189,7 +2189,8 @@ static void __ibmvnic_reset(struct work_struct *work) · 2188 unmodified lines | ||
| 2189 | 2189 | rc = do_hard_reset(adapter, rwi, reset_state); |
| 2190 | 2190 | rtnl_unlock(); |
| 2191 | 2191 | } |
| 2192 | − } else { | |
| 2192 | + } else if (!(rwi->reset_reason == VNIC_RESET_FATAL && | |
| 2193 | + adapter->from_passive_init)) { | |
| 2193 | 2194 | rc = do_reset(adapter, rwi, reset_state); |
| 2194 | 2195 | } |
| 2195 | 2196 | kfree(rwi); |
| @@ -1476,7 +1476,7 @@ static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start, · 1475 unmodified lines | ||
| 1476 | 1476 | if (hw->mac_type == e1000_82545 || |
| 1477 | 1477 | hw->mac_type == e1000_ce4100 || |
| 1478 | 1478 | hw->mac_type == e1000_82546) { |
| 1479 | − return ((begin ^ (end - 1)) >> 16) != 0 ? false : true; | |
| 1479 | + return ((begin ^ (end - 1)) >> 16) == 0; | |
| 1480 | 1480 | } |
| 1481 | 1481 | |
| 1482 | 1482 | return true; |
| @@ -1611,7 +1611,7 @@ static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed, · 1610 unmodified lines | ||
| 1611 | 1611 | } |
| 1612 | 1612 | } |
| 1613 | 1613 | if (lut) { |
| 1614 | − bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false; | |
| 1614 | + bool pf_lut = vsi->type == I40E_VSI_MAIN; | |
| 1615 | 1615 | |
| 1616 | 1616 | ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size); |
| 1617 | 1617 | if (ret) { |
| @@ -11436,7 +11436,7 @@ static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed, · 9818 unmodified lines | ||
| 11436 | 11436 | } |
| 11437 | 11437 | |
| 11438 | 11438 | if (lut) { |
| 11439 | − bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false; | |
| 11439 | + bool pf_lut = vsi->type == I40E_VSI_MAIN; | |
| 11440 | 11440 | |
| 11441 | 11441 | ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size); |
| 11442 | 11442 | if (ret) { |
| @@ -1428,6 +1428,9 @@ int mvpp2_ethtool_cls_rule_del(struct mvpp2_port *port, · 1427 unmodified lines | ||
| 1428 | 1428 | struct mvpp2_ethtool_fs *efs; |
| 1429 | 1429 | int ret; |
| 1430 | 1430 | |
| 1431 | + if (info->fs.location >= MVPP2_N_RFS_ENTRIES_PER_FLOW) | |
| 1432 | + return -EINVAL; | |
| 1433 | + | |
| 1431 | 1434 | efs = port->rfs_rules[info->fs.location]; |
| 1432 | 1435 | if (!efs) |
| 1433 | 1436 | return -EINVAL; |
| @@ -4329,6 +4329,8 @@ static int mvpp2_ethtool_get_rxfh_context(struct net_device *dev, u32 *indir, · 4328 unmodified lines | ||
| 4329 | 4329 | |
| 4330 | 4330 | if (!mvpp22_rss_is_supported()) |
| 4331 | 4331 | return -EOPNOTSUPP; |
| 4332 | + if (rss_context >= MVPP22_N_RSS_TABLES) | |
| 4333 | + return -EINVAL; | |
| 4332 | 4334 | |
| 4333 | 4335 | if (hfunc) |
| 4334 | 4336 | *hfunc = ETH_RSS_HASH_CRC32; |
| @@ -43,6 +43,7 @@ · 42 unmodified lines | ||
| 43 | 43 | #include <linux/ip.h> |
| 44 | 44 | #include <linux/ipv6.h> |
| 45 | 45 | #include <linux/moduleparam.h> |
| 46 | +#include <linux/indirect_call_wrapper.h> | |
| 46 | 47 | |
| 47 | 48 | #include "mlx4_en.h" |
| 48 | 49 | |
| @@ -261,6 +262,10 @@ static void mlx4_en_stamp_wqe(struct mlx4_en_priv *priv, · 212 unmodified lines | ||
| 261 | 262 | } |
| 262 | 263 | } |
| 263 | 264 | |
| 265 | +INDIRECT_CALLABLE_DECLARE(u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv, | |
| 266 | + struct mlx4_en_tx_ring *ring, | |
| 267 | + int index, u64 timestamp, | |
| 268 | + int napi_mode)); | |
| 264 | 269 | |
| 265 | 270 | u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv, |
| 266 | 271 | struct mlx4_en_tx_ring *ring, |
| @@ -329,6 +334,11 @@ u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv, · 62 unmodified lines | ||
| 329 | 334 | return tx_info->nr_txbb; |
| 330 | 335 | } |
| 331 | 336 | |
| 337 | +INDIRECT_CALLABLE_DECLARE(u32 mlx4_en_recycle_tx_desc(struct mlx4_en_priv *priv, | |
| 338 | + struct mlx4_en_tx_ring *ring, | |
| 339 | + int index, u64 timestamp, | |
| 340 | + int napi_mode)); | |
| 341 | + | |
| 332 | 342 | u32 mlx4_en_recycle_tx_desc(struct mlx4_en_priv *priv, |
| 333 | 343 | struct mlx4_en_tx_ring *ring, |
| 334 | 344 | int index, u64 timestamp, |
| @@ -449,7 +459,9 @@ bool mlx4_en_process_tx_cq(struct net_device *dev, · 114 unmodified lines | ||
| 449 | 459 | timestamp = mlx4_en_get_cqe_ts(cqe); |
| 450 | 460 | |
| 451 | 461 | /* free next descriptor */ |
| 452 | − last_nr_txbb = ring->free_tx_desc( | |
| 462 | + last_nr_txbb = INDIRECT_CALL_2(ring->free_tx_desc, | |
| 463 | + mlx4_en_free_tx_desc, | |
| 464 | + mlx4_en_recycle_tx_desc, | |
| 453 | 465 | priv, ring, ring_index, |
| 454 | 466 | timestamp, napi_budget); |
| 455 | 467 | |
| @@ -2550,6 +2550,7 @@ static int mlx4_allocate_default_counters(struct mlx4_dev *dev) · 2549 unmodified lines | ||
| 2550 | 2550 | |
| 2551 | 2551 | if (!err || err == -ENOSPC) { |
| 2552 | 2552 | priv->def_counter[port] = idx; |
| 2553 | + err = 0; | |
| 2553 | 2554 | } else if (err == -ENOENT) { |
| 2554 | 2555 | err = 0; |
| 2555 | 2556 | continue; |
| @@ -2600,7 +2601,8 @@ int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx, u8 usage) · 44 unmodified lines | ||
| 2600 | 2601 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); |
| 2601 | 2602 | if (!err) |
| 2602 | 2603 | *idx = get_param_l(&out_param); |
| 2603 | − | |
| 2604 | + if (WARN_ON(err == -ENOSPC)) | |
| 2605 | + err = -EINVAL; | |
| 2604 | 2606 | return err; |
| 2605 | 2607 | } |
| 2606 | 2608 | return __mlx4_counter_alloc(dev, idx); |
| @@ -7,10 +7,10 @@ config MLX5_CORE · 6 unmodified lines | ||
| 7 | 7 | tristate "Mellanox 5th generation network adapters (ConnectX series) core driver" |
| 8 | 8 | depends on PCI |
| 9 | 9 | select NET_DEVLINK |
| 10 | − imply PTP_1588_CLOCK | |
| 11 | − imply VXLAN | |
| 12 | − imply MLXFW | |
| 13 | − imply PCI_HYPERV_INTERFACE | |
| 10 | + depends on VXLAN || !VXLAN | |
| 11 | + depends on MLXFW || !MLXFW | |
| 12 | + depends on PTP_1588_CLOCK || !PTP_1588_CLOCK | |
| 13 | + depends on PCI_HYPERV_INTERFACE || !PCI_HYPERV_INTERFACE | |
| 14 | 14 | default n |
| 15 | 15 | ---help--- |
| 16 | 16 | Core driver for low level functionality of the ConnectX-4 and |
| @@ -888,7 +888,6 @@ static void cmd_work_handler(struct work_struct *work) · 887 unmodified lines | ||
| 888 | 888 | } |
| 889 | 889 | |
| 890 | 890 | cmd->ent_arr[ent->idx] = ent; |
| 891 | − set_bit(MLX5_CMD_ENT_STATE_PENDING_COMP, &ent->state); | |
| 892 | 891 | lay = get_inst(cmd, ent->idx); |
| 893 | 892 | ent->lay = lay; |
| 894 | 893 | memset(lay, 0, sizeof(*lay)); |
| @@ -910,6 +909,7 @@ static void cmd_work_handler(struct work_struct *work) · 15 unmodified lines | ||
| 910 | 909 | |
| 911 | 910 | if (ent->callback) |
| 912 | 911 | schedule_delayed_work(&ent->cb_timeout_work, cb_timeout); |
| 912 | + set_bit(MLX5_CMD_ENT_STATE_PENDING_COMP, &ent->state); | |
| 913 | 913 | |
| 914 | 914 | /* Skip sending command to fw if internal error */ |
| 915 | 915 | if (pci_channel_offline(dev->pdev) || |
| @@ -922,6 +922,10 @@ static void cmd_work_handler(struct work_struct *work) · 6 unmodified lines | ||
| 922 | 922 | MLX5_SET(mbox_out, ent->out, syndrome, drv_synd); |
| 923 | 923 | |
| 924 | 924 | mlx5_cmd_comp_handler(dev, 1UL << ent->idx, true); |
| 925 | + /* no doorbell, no need to keep the entry */ | |
| 926 | + free_ent(cmd, ent->idx); | |
| 927 | + if (ent->callback) | |
| 928 | + free_cmd(ent); | |
| 925 | 929 | return; |
| 926 | 930 | } |
| 927 | 931 | |
| @@ -935,7 +935,7 @@ struct mlx5_fw_tracer *mlx5_fw_tracer_create(struct mlx5_core_dev *dev) · 934 unmodified lines | ||
| 935 | 935 | return NULL; |
| 936 | 936 | } |
| 937 | 937 | |
| 938 | − tracer = kzalloc(sizeof(*tracer), GFP_KERNEL); | |
| 938 | + tracer = kvzalloc(sizeof(*tracer), GFP_KERNEL); | |
| 939 | 939 | if (!tracer) |
| 940 | 940 | return ERR_PTR(-ENOMEM); |
| 941 | 941 | |
| @@ -982,7 +982,7 @@ destroy_workqueue: · 40 unmodified lines | ||
| 982 | 982 | tracer->dev = NULL; |
| 983 | 983 | destroy_workqueue(tracer->work_queue); |
| 984 | 984 | free_tracer: |
| 985 | − kfree(tracer); | |
| 985 | + kvfree(tracer); | |
| 986 | 986 | return ERR_PTR(err); |
| 987 | 987 | } |
| 988 | 988 | |
| @@ -1061,7 +1061,7 @@ void mlx5_fw_tracer_destroy(struct mlx5_fw_tracer *tracer) · 72 unmodified lines | ||
| 1061 | 1061 | mlx5_fw_tracer_destroy_log_buf(tracer); |
| 1062 | 1062 | flush_workqueue(tracer->work_queue); |
| 1063 | 1063 | destroy_workqueue(tracer->work_queue); |
| 1064 | − kfree(tracer); | |
| 1064 | + kvfree(tracer); | |
| 1065 | 1065 | } |
| 1066 | 1066 | |
| 1067 | 1067 | static int fw_tracer_event(struct notifier_block *nb, unsigned long action, void *data) |
| @@ -367,6 +367,7 @@ enum { · 366 unmodified lines | ||
| 367 | 367 | MLX5E_SQ_STATE_AM, |
| 368 | 368 | MLX5E_SQ_STATE_TLS, |
| 369 | 369 | MLX5E_SQ_STATE_VLAN_NEED_L2_INLINE, |
| 370 | + MLX5E_SQ_STATE_PENDING_XSK_TX, | |
| 370 | 371 | }; |
| 371 | 372 | |
| 372 | 373 | struct mlx5e_sq_wqe_info { |
| @@ -960,7 +961,7 @@ void mlx5e_page_release_dynamic(struct mlx5e_rq *rq, · 587 unmodified lines | ||
| 960 | 961 | void mlx5e_handle_rx_cqe(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe); |
| 961 | 962 | void mlx5e_handle_rx_cqe_mpwrq(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe); |
| 962 | 963 | bool mlx5e_post_rx_wqes(struct mlx5e_rq *rq); |
| 963 | −void mlx5e_poll_ico_cq(struct mlx5e_cq *cq); | |
| 964 | +int mlx5e_poll_ico_cq(struct mlx5e_cq *cq); | |
| 964 | 965 | bool mlx5e_post_rx_mpwqes(struct mlx5e_rq *rq); |
| 965 | 966 | void mlx5e_dealloc_rx_wqe(struct mlx5e_rq *rq, u16 ix); |
| 966 | 967 | void mlx5e_dealloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix); |
| @@ -12,6 +12,7 @@ · 11 unmodified lines | ||
| 12 | 12 | #include <net/flow_offload.h> |
| 13 | 13 | #include <net/netfilter/nf_flow_table.h> |
| 14 | 14 | #include <linux/workqueue.h> |
| 15 | +#include <linux/xarray.h> | |
| 15 | 16 | |
| 16 | 17 | #include "esw/chains.h" |
| 17 | 18 | #include "en/tc_ct.h" |
| @@ -35,7 +36,7 @@ struct mlx5_tc_ct_priv { · 17 unmodified lines | ||
| 35 | 36 | struct mlx5_eswitch *esw; |
| 36 | 37 | const struct net_device *netdev; |
| 37 | 38 | struct idr fte_ids; |
| 38 | − struct idr tuple_ids; | |
| 39 | + struct xarray tuple_ids; | |
| 39 | 40 | struct rhashtable zone_ht; |
| 40 | 41 | struct mlx5_flow_table *ct; |
| 41 | 42 | struct mlx5_flow_table *ct_nat; |
| @@ -238,7 +239,7 @@ mlx5_tc_ct_entry_del_rule(struct mlx5_tc_ct_priv *ct_priv, · 196 unmodified lines | ||
| 238 | 239 | |
| 239 | 240 | mlx5_eswitch_del_offloaded_rule(esw, zone_rule->rule, attr); |
| 240 | 241 | mlx5_modify_header_dealloc(esw->dev, attr->modify_hdr); |
| 241 | − idr_remove(&ct_priv->tuple_ids, zone_rule->tupleid); | |
| 242 | + xa_erase(&ct_priv->tuple_ids, zone_rule->tupleid); | |
| 242 | 243 | } |
| 243 | 244 | |
| 244 | 245 | static void |
| @@ -483,7 +484,7 @@ mlx5_tc_ct_entry_add_rule(struct mlx5_tc_ct_priv *ct_priv, · 238 unmodified lines | ||
| 483 | 484 | struct mlx5_esw_flow_attr *attr = &zone_rule->attr; |
| 484 | 485 | struct mlx5_eswitch *esw = ct_priv->esw; |
| 485 | 486 | struct mlx5_flow_spec *spec = NULL; |
| 486 | − u32 tupleid = 1; | |
| 487 | + u32 tupleid; | |
| 487 | 488 | int err; |
| 488 | 489 | |
| 489 | 490 | zone_rule->nat = nat; |
| @@ -493,12 +494,12 @@ mlx5_tc_ct_entry_add_rule(struct mlx5_tc_ct_priv *ct_priv, · 3 unmodified lines | ||
| 493 | 494 | return -ENOMEM; |
| 494 | 495 | |
| 495 | 496 | /* Get tuple unique id */ |
| 496 | − err = idr_alloc_u32(&ct_priv->tuple_ids, zone_rule, &tupleid, | |
| 497 | − TUPLE_ID_MAX, GFP_KERNEL); | |
| 497 | + err = xa_alloc(&ct_priv->tuple_ids, &tupleid, zone_rule, | |
| 498 | + XA_LIMIT(1, TUPLE_ID_MAX), GFP_KERNEL); | |
| 498 | 499 | if (err) { |
| 499 | 500 | netdev_warn(ct_priv->netdev, |
| 500 | 501 | "Failed to allocate tuple id, err: %d\n", err); |
| 501 | − goto err_idr_alloc; | |
| 502 | + goto err_xa_alloc; | |
| 502 | 503 | } |
| 503 | 504 | zone_rule->tupleid = tupleid; |
| 504 | 505 | |
| @@ -539,8 +540,8 @@ mlx5_tc_ct_entry_add_rule(struct mlx5_tc_ct_priv *ct_priv, · 34 unmodified lines | ||
| 539 | 540 | err_rule: |
| 540 | 541 | mlx5_modify_header_dealloc(esw->dev, attr->modify_hdr); |
| 541 | 542 | err_mod_hdr: |
| 542 | − idr_remove(&ct_priv->tuple_ids, zone_rule->tupleid); | |
| 543 | −err_idr_alloc: | |
| 543 | + xa_erase(&ct_priv->tuple_ids, zone_rule->tupleid); | |
| 544 | +err_xa_alloc: | |
| 544 | 545 | kfree(spec); |
| 545 | 546 | return err; |
| 546 | 547 | } |
| @@ -1299,7 +1300,7 @@ mlx5_tc_ct_init(struct mlx5_rep_uplink_priv *uplink_priv) · 752 unmodified lines | ||
| 1299 | 1300 | } |
| 1300 | 1301 | |
| 1301 | 1302 | idr_init(&ct_priv->fte_ids); |
| 1302 | − idr_init(&ct_priv->tuple_ids); | |
| 1303 | + xa_init_flags(&ct_priv->tuple_ids, XA_FLAGS_ALLOC1); | |
| 1303 | 1304 | mutex_init(&ct_priv->control_lock); |
| 1304 | 1305 | rhashtable_init(&ct_priv->zone_ht, &zone_params); |
| 1305 | 1306 | |
| @@ -1334,7 +1335,7 @@ mlx5_tc_ct_clean(struct mlx5_rep_uplink_priv *uplink_priv) · 28 unmodified lines | ||
| 1334 | 1335 | |
| 1335 | 1336 | rhashtable_destroy(&ct_priv->zone_ht); |
| 1336 | 1337 | mutex_destroy(&ct_priv->control_lock); |
| 1337 | − idr_destroy(&ct_priv->tuple_ids); | |
| 1338 | + xa_destroy(&ct_priv->tuple_ids); | |
| 1338 | 1339 | idr_destroy(&ct_priv->fte_ids); |
| 1339 | 1340 | kfree(ct_priv); |
| 1340 | 1341 | |
| @@ -1352,7 +1353,7 @@ mlx5e_tc_ct_restore_flow(struct mlx5_rep_uplink_priv *uplink_priv, · 11 unmodified lines | ||
| 1352 | 1353 | if (!ct_priv || !tupleid) |
| 1353 | 1354 | return true; |
| 1354 | 1355 | |
| 1355 | − zone_rule = idr_find(&ct_priv->tuple_ids, tupleid); | |
| 1356 | + zone_rule = xa_load(&ct_priv->tuple_ids, tupleid); | |
| 1356 | 1357 | if (!zone_rule) |
| 1357 | 1358 | return false; |
| 1358 | 1359 | |
| @@ -33,6 +33,9 @@ int mlx5e_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags) · 32 unmodified lines | ||
| 33 | 33 | if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &c->xskicosq.state))) |
| 34 | 34 | return 0; |
| 35 | 35 | |
| 36 | + if (test_and_set_bit(MLX5E_SQ_STATE_PENDING_XSK_TX, &c->xskicosq.state)) | |
| 37 | + return 0; | |
| 38 | + | |
| 36 | 39 | spin_lock(&c->xskicosq_lock); |
| 37 | 40 | mlx5e_trigger_irq(&c->xskicosq); |
| 38 | 41 | spin_unlock(&c->xskicosq_lock); |
| @@ -3583,7 +3583,12 @@ mlx5e_get_stats(struct net_device *dev, struct rtnl_link_stats64 *stats) · 3582 unmodified lines | ||
| 3583 | 3583 | struct mlx5e_vport_stats *vstats = &priv->stats.vport; |
| 3584 | 3584 | struct mlx5e_pport_stats *pstats = &priv->stats.pport; |
| 3585 | 3585 | |
| 3586 | − if (!mlx5e_monitor_counter_supported(priv)) { | |
| 3586 | + /* In switchdev mode, monitor counters doesn't monitor | |
| 3587 | + * rx/tx stats of 802_3. The update stats mechanism | |
| 3588 | + * should keep the 802_3 layout counters updated | |
| 3589 | + */ | |
| 3590 | + if (!mlx5e_monitor_counter_supported(priv) || | |
| 3591 | + mlx5e_is_uplink_rep(priv)) { | |
| 3587 | 3592 | /* update HW stats in background for next time */ |
| 3588 | 3593 | mlx5e_queue_update_stats(priv); |
| 3589 | 3594 | } |
| @@ -1773,19 +1773,14 @@ static void mlx5e_cleanup_rep_rx(struct mlx5e_priv *priv) · 1772 unmodified lines | ||
| 1773 | 1773 | |
| 1774 | 1774 | static int mlx5e_init_ul_rep_rx(struct mlx5e_priv *priv) |
| 1775 | 1775 | { |
| 1776 | − int err = mlx5e_init_rep_rx(priv); | |
| 1777 | − | |
| 1778 | − if (err) | |
| 1779 | − return err; | |
| 1780 | − | |
| 1781 | 1776 | mlx5e_create_q_counters(priv); |
| 1782 | − return 0; | |
| 1777 | + return mlx5e_init_rep_rx(priv); | |
| 1783 | 1778 | } |
| 1784 | 1779 | |
| 1785 | 1780 | static void mlx5e_cleanup_ul_rep_rx(struct mlx5e_priv *priv) |
| 1786 | 1781 | { |
| 1787 | − mlx5e_destroy_q_counters(priv); | |
| 1788 | 1782 | mlx5e_cleanup_rep_rx(priv); |
| 1783 | + mlx5e_destroy_q_counters(priv); | |
| 1789 | 1784 | } |
| 1790 | 1785 | |
| 1791 | 1786 | static int mlx5e_init_uplink_rep_tx(struct mlx5e_rep_priv *rpriv) |
| @@ -589,7 +589,7 @@ bool mlx5e_post_rx_wqes(struct mlx5e_rq *rq) · 588 unmodified lines | ||
| 589 | 589 | return !!err; |
| 590 | 590 | } |
| 591 | 591 | |
| 592 | −void mlx5e_poll_ico_cq(struct mlx5e_cq *cq) | |
| 592 | +int mlx5e_poll_ico_cq(struct mlx5e_cq *cq) | |
| 593 | 593 | { |
| 594 | 594 | struct mlx5e_icosq *sq = container_of(cq, struct mlx5e_icosq, cq); |
| 595 | 595 | struct mlx5_cqe64 *cqe; |
| @@ -597,11 +597,11 @@ void mlx5e_poll_ico_cq(struct mlx5e_cq *cq) · 1 unmodified line | ||
| 597 | 597 | int i; |
| 598 | 598 | |
| 599 | 599 | if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state))) |
| 600 | − return; | |
| 600 | + return 0; | |
| 601 | 601 | |
| 602 | 602 | cqe = mlx5_cqwq_get_cqe(&cq->wq); |
| 603 | 603 | if (likely(!cqe)) |
| 604 | − return; | |
| 604 | + return 0; | |
| 605 | 605 | |
| 606 | 606 | /* sq->cc must be updated only after mlx5_cqwq_update_db_record(), |
| 607 | 607 | * otherwise a cq overrun may occur |
| @@ -650,6 +650,8 @@ void mlx5e_poll_ico_cq(struct mlx5e_cq *cq) · 42 unmodified lines | ||
| 650 | 650 | sq->cc = sqcc; |
| 651 | 651 | |
| 652 | 652 | mlx5_cqwq_update_db_record(&cq->wq); |
| 653 | + | |
| 654 | + return i; | |
| 653 | 655 | } |
| 654 | 656 | |
| 655 | 657 | bool mlx5e_post_rx_mpwqes(struct mlx5e_rq *rq) |
| @@ -152,7 +152,11 @@ int mlx5e_napi_poll(struct napi_struct *napi, int budget) · 151 unmodified lines | ||
| 152 | 152 | mlx5e_post_rx_wqes, |
| 153 | 153 | rq); |
| 154 | 154 | if (xsk_open) { |
| 155 | − mlx5e_poll_ico_cq(&c->xskicosq.cq); | |
| 155 | + if (mlx5e_poll_ico_cq(&c->xskicosq.cq)) | |
| 156 | + /* Don't clear the flag if nothing was polled to prevent | |
| 157 | + * queueing more WQEs and overflowing XSKICOSQ. | |
| 158 | + */ | |
| 159 | + clear_bit(MLX5E_SQ_STATE_PENDING_XSK_TX, &c->xskicosq.state); | |
| 156 | 160 | busy |= mlx5e_poll_xdpsq_cq(&xsksq->cq); |
| 157 | 161 | busy_xsk |= mlx5e_napi_xsk_post(xsksq, xskrq); |
| 158 | 162 | } |
| @@ -1550,9 +1550,9 @@ static int esw_create_restore_table(struct mlx5_eswitch *esw) · 1549 unmodified lines | ||
| 1550 | 1550 | MLX5_FLOW_NAMESPACE_KERNEL, 1, |
| 1551 | 1551 | modact); |
| 1552 | 1552 | if (IS_ERR(mod_hdr)) { |
| 1553 | + err = PTR_ERR(mod_hdr); | |
| 1553 | 1554 | esw_warn(dev, "Failed to create restore mod header, err: %d\n", |
| 1554 | 1555 | err); |
| 1555 | − err = PTR_ERR(mod_hdr); | |
| 1556 | 1556 | goto err_mod_hdr; |
| 1557 | 1557 | } |
| 1558 | 1558 | |
| @@ -2219,10 +2219,12 @@ static int esw_offloads_steering_init(struct mlx5_eswitch *esw) · 660 unmodified lines | ||
| 2219 | 2219 | total_vports = num_vfs + MLX5_SPECIAL_VPORTS(esw->dev); |
| 2220 | 2220 | |
| 2221 | 2221 | memset(&esw->fdb_table.offloads, 0, sizeof(struct offloads_fdb)); |
| 2222 | + mutex_init(&esw->fdb_table.offloads.vports.lock); | |
| 2223 | + hash_init(esw->fdb_table.offloads.vports.table); | |
| 2222 | 2224 | |
| 2223 | 2225 | err = esw_create_uplink_offloads_acl_tables(esw); |
| 2224 | 2226 | if (err) |
| 2225 | − return err; | |
| 2227 | + goto create_acl_err; | |
| 2226 | 2228 | |
| 2227 | 2229 | err = esw_create_offloads_table(esw, total_vports); |
| 2228 | 2230 | if (err) |
| @@ -2240,9 +2242,6 @@ static int esw_offloads_steering_init(struct mlx5_eswitch *esw) · 11 unmodified lines | ||
| 2240 | 2242 | if (err) |
| 2241 | 2243 | goto create_fg_err; |
| 2242 | 2244 | |
| 2243 | − mutex_init(&esw->fdb_table.offloads.vports.lock); | |
| 2244 | − hash_init(esw->fdb_table.offloads.vports.table); | |
| 2245 | − | |
| 2246 | 2245 | return 0; |
| 2247 | 2246 | |
| 2248 | 2247 | create_fg_err: |
| @@ -2253,18 +2252,19 @@ create_restore_err: · 4 unmodified lines | ||
| 2253 | 2252 | esw_destroy_offloads_table(esw); |
| 2254 | 2253 | create_offloads_err: |
| 2255 | 2254 | esw_destroy_uplink_offloads_acl_tables(esw); |
| 2256 | − | |
| 2255 | +create_acl_err: | |
| 2256 | + mutex_destroy(&esw->fdb_table.offloads.vports.lock); | |
| 2257 | 2257 | return err; |
| 2258 | 2258 | } |
| 2259 | 2259 | |
| 2260 | 2260 | static void esw_offloads_steering_cleanup(struct mlx5_eswitch *esw) |
| 2261 | 2261 | { |
| 2262 | − mutex_destroy(&esw->fdb_table.offloads.vports.lock); | |
| 2263 | 2262 | esw_destroy_vport_rx_group(esw); |
| 2264 | 2263 | esw_destroy_offloads_fdb_tables(esw); |
| 2265 | 2264 | esw_destroy_restore_table(esw); |
| 2266 | 2265 | esw_destroy_offloads_table(esw); |
| 2267 | 2266 | esw_destroy_uplink_offloads_acl_tables(esw); |
| 2267 | + mutex_destroy(&esw->fdb_table.offloads.vports.lock); | |
| 2268 | 2268 | } |
| 2269 | 2269 | |
| 2270 | 2270 | static void |
| @@ -2377,9 +2377,9 @@ int esw_offloads_enable(struct mlx5_eswitch *esw) · 106 unmodified lines | ||
| 2377 | 2377 | err_vports: |
| 2378 | 2378 | esw_offloads_unload_rep(esw, MLX5_VPORT_UPLINK); |
| 2379 | 2379 | err_uplink: |
| 2380 | − esw_set_passing_vport_metadata(esw, false); | |
| 2381 | −err_steering_init: | |
| 2382 | 2380 | esw_offloads_steering_cleanup(esw); |
| 2381 | +err_steering_init: | |
| 2382 | + esw_set_passing_vport_metadata(esw, false); | |
| 2383 | 2383 | err_vport_metadata: |
| 2384 | 2384 | mlx5_rdma_disable_roce(esw->dev); |
| 2385 | 2385 | mutex_destroy(&esw->offloads.termtbl_mutex); |
| @@ -695,6 +695,12 @@ static void dr_cq_event(struct mlx5_core_cq *mcq, · 694 unmodified lines | ||
| 695 | 695 | pr_info("CQ event %u on CQ #%u\n", event, mcq->cqn); |
| 696 | 696 | } |
| 697 | 697 | |
| 698 | +static void dr_cq_complete(struct mlx5_core_cq *mcq, | |
| 699 | + struct mlx5_eqe *eqe) | |
| 700 | +{ | |
| 701 | + pr_err("CQ completion CQ: #%u\n", mcq->cqn); | |
| 702 | +} | |
| 703 | + | |
| 698 | 704 | static struct mlx5dr_cq *dr_create_cq(struct mlx5_core_dev *mdev, |
| 699 | 705 | struct mlx5_uars_page *uar, |
| 700 | 706 | size_t ncqe) |
| @@ -756,6 +762,7 @@ static struct mlx5dr_cq *dr_create_cq(struct mlx5_core_dev *mdev, · 55 unmodified lines | ||
| 756 | 762 | mlx5_fill_page_frag_array(&cq->wq_ctrl.buf, pas); |
| 757 | 763 | |
| 758 | 764 | cq->mcq.event = dr_cq_event; |
| 765 | + cq->mcq.comp = dr_cq_complete; | |
| 759 | 766 | |
| 760 | 767 | err = mlx5_core_create_cq(mdev, &cq->mcq, in, inlen, out, sizeof(out)); |
| 761 | 768 | kvfree(in); |
| @@ -767,7 +774,12 @@ static struct mlx5dr_cq *dr_create_cq(struct mlx5_core_dev *mdev, · 5 unmodified lines | ||
| 767 | 774 | cq->mcq.set_ci_db = cq->wq_ctrl.db.db; |
| 768 | 775 | cq->mcq.arm_db = cq->wq_ctrl.db.db + 1; |
| 769 | 776 | *cq->mcq.set_ci_db = 0; |
| 770 | − *cq->mcq.arm_db = 0; | |
| 777 | + | |
| 778 | + /* set no-zero value, in order to avoid the HW to run db-recovery on | |
| 779 | + * CQ that used in polling mode. | |
| 780 | + */ | |
| 781 | + *cq->mcq.arm_db = cpu_to_be32(2 << 28); | |
| 782 | + | |
| 771 | 783 | cq->mcq.vector = 0; |
| 772 | 784 | cq->mcq.irqn = irqn; |
| 773 | 785 | cq->mcq.uar = uar; |
| @@ -380,7 +380,7 @@ struct mlxsw_afa_block *mlxsw_afa_block_create(struct mlxsw_afa *mlxsw_afa) · 379 unmodified lines | ||
| 380 | 380 | |
| 381 | 381 | block = kzalloc(sizeof(*block), GFP_KERNEL); |
| 382 | 382 | if (!block) |
| 383 | − return NULL; | |
| 383 | + return ERR_PTR(-ENOMEM); | |
| 384 | 384 | INIT_LIST_HEAD(&block->resource_list); |
| 385 | 385 | block->afa = mlxsw_afa; |
| 386 | 386 | |
| @@ -408,7 +408,7 @@ err_second_set_create: · 21 unmodified lines | ||
| 408 | 408 | mlxsw_afa_set_destroy(block->first_set); |
| 409 | 409 | err_first_set_create: |
| 410 | 410 | kfree(block); |
| 411 | − return NULL; | |
| 411 | + return ERR_PTR(-ENOMEM); | |
| 412 | 412 | } |
| 413 | 413 | EXPORT_SYMBOL(mlxsw_afa_block_create); |
| 414 | 414 | |
| @@ -88,8 +88,8 @@ static int mlxsw_sp2_acl_tcam_init(struct mlxsw_sp *mlxsw_sp, void *priv, · 87 unmodified lines | ||
| 88 | 88 | * to be written using PEFA register to all indexes for all regions. |
| 89 | 89 | */ |
| 90 | 90 | afa_block = mlxsw_afa_block_create(mlxsw_sp->afa); |
| 91 | − if (!afa_block) { | |
| 92 | − err = -ENOMEM; | |
| 91 | + if (IS_ERR(afa_block)) { | |
| 92 | + err = PTR_ERR(afa_block); | |
| 93 | 93 | goto err_afa_block; |
| 94 | 94 | } |
| 95 | 95 | err = mlxsw_afa_block_continue(afa_block); |
| @@ -464,7 +464,7 @@ mlxsw_sp_acl_rulei_create(struct mlxsw_sp_acl *acl, · 463 unmodified lines | ||
| 464 | 464 | |
| 465 | 465 | rulei = kzalloc(sizeof(*rulei), GFP_KERNEL); |
| 466 | 466 | if (!rulei) |
| 467 | − return NULL; | |
| 467 | + return ERR_PTR(-ENOMEM); | |
| 468 | 468 | |
| 469 | 469 | if (afa_block) { |
| 470 | 470 | rulei->act_block = afa_block; |
| @@ -986,8 +986,9 @@ mlxsw_sp_acl_tcam_vchunk_create(struct mlxsw_sp *mlxsw_sp, · 985 unmodified lines | ||
| 986 | 986 | unsigned int priority, |
| 987 | 987 | struct mlxsw_afk_element_usage *elusage) |
| 988 | 988 | { |
| 989 | + struct mlxsw_sp_acl_tcam_vchunk *vchunk, *vchunk2; | |
| 989 | 990 | struct mlxsw_sp_acl_tcam_vregion *vregion; |
| 990 | − struct mlxsw_sp_acl_tcam_vchunk *vchunk; | |
| 991 | + struct list_head *pos; | |
| 991 | 992 | int err; |
| 992 | 993 | |
| 993 | 994 | if (priority == MLXSW_SP_ACL_TCAM_CATCHALL_PRIO) |
| @@ -1025,7 +1026,14 @@ mlxsw_sp_acl_tcam_vchunk_create(struct mlxsw_sp *mlxsw_sp, · 31 unmodified lines | ||
| 1025 | 1026 | } |
| 1026 | 1027 | |
| 1027 | 1028 | mlxsw_sp_acl_tcam_rehash_ctx_vregion_changed(vregion); |
| 1028 | − list_add_tail(&vchunk->list, &vregion->vchunk_list); | |
| 1029 | + | |
| 1030 | + /* Position the vchunk inside the list according to priority */ | |
| 1031 | + list_for_each(pos, &vregion->vchunk_list) { | |
| 1032 | + vchunk2 = list_entry(pos, typeof(*vchunk2), list); | |
| 1033 | + if (vchunk2->priority > priority) | |
| 1034 | + break; | |
| 1035 | + } | |
| 1036 | + list_add_tail(&vchunk->list, pos); | |
| 1029 | 1037 | mutex_unlock(&vregion->lock); |
| 1030 | 1038 | |
| 1031 | 1039 | return vchunk; |
| @@ -36,7 +36,8 @@ static int mlxsw_sp_flower_parse_actions(struct mlxsw_sp *mlxsw_sp, · 35 unmodified lines | ||
| 36 | 36 | err = mlxsw_sp_acl_rulei_act_count(mlxsw_sp, rulei, extack); |
| 37 | 37 | if (err) |
| 38 | 38 | return err; |
| 39 | − } else if (act->hw_stats != FLOW_ACTION_HW_STATS_DISABLED) { | |
| 39 | + } else if (act->hw_stats != FLOW_ACTION_HW_STATS_DISABLED && | |
| 40 | + act->hw_stats != FLOW_ACTION_HW_STATS_DONT_CARE) { | |
| 40 | 41 | NL_SET_ERR_MSG_MOD(extack, "Unsupported action HW stats type"); |
| 41 | 42 | return -EOPNOTSUPP; |
| 42 | 43 | } |
| @@ -199,8 +199,8 @@ mlxsw_sp_mr_tcam_afa_block_create(struct mlxsw_sp *mlxsw_sp, · 198 unmodified lines | ||
| 199 | 199 | int err; |
| 200 | 200 | |
| 201 | 201 | afa_block = mlxsw_afa_block_create(mlxsw_sp->afa); |
| 202 | − if (!afa_block) | |
| 203 | − return ERR_PTR(-ENOMEM); | |
| 202 | + if (IS_ERR(afa_block)) | |
| 203 | + return afa_block; | |
| 204 | 204 | |
| 205 | 205 | err = mlxsw_afa_block_append_allocated_counter(afa_block, |
| 206 | 206 | counter_index); |
| @@ -564,7 +564,7 @@ static int moxart_remove(struct platform_device *pdev) · 563 unmodified lines | ||
| 564 | 564 | struct net_device *ndev = platform_get_drvdata(pdev); |
| 565 | 565 | |
| 566 | 566 | unregister_netdev(ndev); |
| 567 | − free_irq(ndev->irq, ndev); | |
| 567 | + devm_free_irq(&pdev->dev, ndev->irq, ndev); | |
| 568 | 568 | moxart_mac_free_memory(ndev); |
| 569 | 569 | free_netdev(ndev); |
| 570 | 570 | |
| @@ -1031,10 +1031,8 @@ int ocelot_fdb_dump(struct ocelot *ocelot, int port, · 1030 unmodified lines | ||
| 1031 | 1031 | { |
| 1032 | 1032 | int i, j; |
| 1033 | 1033 | |
| 1034 | − /* Loop through all the mac tables entries. There are 1024 rows of 4 | |
| 1035 | − * entries. | |
| 1036 | − */ | |
| 1037 | − for (i = 0; i < 1024; i++) { | |
| 1034 | + /* Loop through all the mac tables entries. */ | |
| 1035 | + for (i = 0; i < ocelot->num_mact_rows; i++) { | |
| 1038 | 1036 | for (j = 0; j < 4; j++) { |
| 1039 | 1037 | struct ocelot_mact_entry entry; |
| 1040 | 1038 | bool is_static; |
| @@ -1453,8 +1451,15 @@ static void ocelot_port_attr_stp_state_set(struct ocelot *ocelot, int port, · 412 unmodified lines | ||
| 1453 | 1451 | |
| 1454 | 1452 | void ocelot_set_ageing_time(struct ocelot *ocelot, unsigned int msecs) |
| 1455 | 1453 | { |
| 1456 | − ocelot_write(ocelot, ANA_AUTOAGE_AGE_PERIOD(msecs / 2), | |
| 1457 | − ANA_AUTOAGE); | |
| 1454 | + unsigned int age_period = ANA_AUTOAGE_AGE_PERIOD(msecs / 2000); | |
| 1455 | + | |
| 1456 | + /* Setting AGE_PERIOD to zero effectively disables automatic aging, | |
| 1457 | + * which is clearly not what our intention is. So avoid that. | |
| 1458 | + */ | |
| 1459 | + if (!age_period) | |
| 1460 | + age_period = 1; | |
| 1461 | + | |
| 1462 | + ocelot_rmw(ocelot, age_period, ANA_AUTOAGE_AGE_PERIOD_M, ANA_AUTOAGE); | |
| 1458 | 1463 | } |
| 1459 | 1464 | EXPORT_SYMBOL(ocelot_set_ageing_time); |
| 1460 | 1465 | |
| @@ -431,6 +431,7 @@ int ocelot_chip_init(struct ocelot *ocelot, const struct ocelot_ops *ops) · 430 unmodified lines | ||
| 431 | 431 | ocelot->stats_layout = ocelot_stats_layout; |
| 432 | 432 | ocelot->num_stats = ARRAY_SIZE(ocelot_stats_layout); |
| 433 | 433 | ocelot->shared_queue_sz = 224 * 1024; |
| 434 | + ocelot->num_mact_rows = 1024; | |
| 434 | 435 | ocelot->ops = ops; |
| 435 | 436 | |
| 436 | 437 | ret = ocelot_regfields_init(ocelot, ocelot_regfields); |
| @@ -208,11 +208,13 @@ static int jazz_sonic_probe(struct platform_device *pdev) · 207 unmodified lines | ||
| 208 | 208 | |
| 209 | 209 | err = register_netdev(dev); |
| 210 | 210 | if (err) |
| 211 | − goto out1; | |
| 211 | + goto undo_probe1; | |
| 212 | 212 | |
| 213 | 213 | return 0; |
| 214 | 214 | |
| 215 | −out1: | |
| 215 | +undo_probe1: | |
| 216 | + dma_free_coherent(lp->device, SIZEOF_SONIC_DESC * SONIC_BUS_SCALE(lp->dma_bitmode), | |
| 217 | + lp->descriptors, lp->descriptors_laddr); | |
| 216 | 218 | release_mem_region(dev->base_addr, SONIC_MEM_SIZE); |
| 217 | 219 | out: |
| 218 | 220 | free_netdev(dev); |
| @@ -283,6 +283,7 @@ nfp_abm_vnic_set_mac(struct nfp_pf *pf, struct nfp_abm *abm, struct nfp_net *nn, · 282 unmodified lines | ||
| 283 | 283 | if (!nfp_nsp_has_hwinfo_lookup(nsp)) { |
| 284 | 284 | nfp_warn(pf->cpp, "NSP doesn't support PF MAC generation\n"); |
| 285 | 285 | eth_hw_addr_random(nn->dp.netdev); |
| 286 | + nfp_nsp_close(nsp); | |
| 286 | 287 | return; |
| 287 | 288 | } |
| 288 | 289 | |
| @@ -170,8 +170,7 @@ void ionic_debugfs_add_qcq(struct ionic_lif *lif, struct ionic_qcq *qcq) · 169 unmodified lines | ||
| 170 | 170 | debugfs_create_x64("base_pa", 0400, cq_dentry, &cq->base_pa); |
| 171 | 171 | debugfs_create_u32("num_descs", 0400, cq_dentry, &cq->num_descs); |
| 172 | 172 | debugfs_create_u32("desc_size", 0400, cq_dentry, &cq->desc_size); |
| 173 | − debugfs_create_u8("done_color", 0400, cq_dentry, | |
| 174 | − (u8 *)&cq->done_color); | |
| 173 | + debugfs_create_bool("done_color", 0400, cq_dentry, &cq->done_color); | |
| 175 | 174 | |
| 176 | 175 | debugfs_create_file("tail", 0400, cq_dentry, cq, &cq_tail_fops); |
| 177 | 176 | |
| @@ -2101,6 +2101,7 @@ static void ionic_lif_handle_fw_down(struct ionic_lif *lif) · 2100 unmodified lines | ||
| 2101 | 2101 | ionic_txrx_free(lif); |
| 2102 | 2102 | } |
| 2103 | 2103 | ionic_lifs_deinit(ionic); |
| 2104 | + ionic_reset(ionic); | |
| 2104 | 2105 | ionic_qcqs_free(lif); |
| 2105 | 2106 | |
| 2106 | 2107 | dev_info(ionic->dev, "FW Down: LIFs stopped\n"); |
| @@ -2116,6 +2117,7 @@ static void ionic_lif_handle_fw_up(struct ionic_lif *lif) · 9 unmodified lines | ||
| 2116 | 2117 | |
| 2117 | 2118 | dev_info(ionic->dev, "FW Up: restarting LIFs\n"); |
| 2118 | 2119 | |
| 2120 | + ionic_init_devinfo(ionic); | |
| 2119 | 2121 | err = ionic_qcqs_alloc(lif); |
| 2120 | 2122 | if (err) |
| 2121 | 2123 | goto err_out; |
| @@ -2549,8 +2551,6 @@ int ionic_lifs_register(struct ionic *ionic) · 427 unmodified lines | ||
| 2549 | 2551 | dev_err(ionic->dev, "Cannot register net device, aborting\n"); |
| 2550 | 2552 | return err; |
| 2551 | 2553 | } |
| 2552 | − | |
| 2553 | − ionic_link_status_check_request(ionic->master_lif); | |
| 2554 | 2554 | ionic->master_lif->registered = true; |
| 2555 | 2555 | |
| 2556 | 2556 | return 0; |
| @@ -1,19 +1,3 @@ | ||
| 1 | − | |
| 2 | −/* | |
| 3 | − * snull.h -- definitions for the network module | |
| 4 | − * | |
| 5 | − * Copyright (C) 2001 Alessandro Rubini and Jonathan Corbet | |
| 6 | − * Copyright (C) 2001 O'Reilly & Associates | |
| 7 | − * | |
| 8 | − * The source code in this file can be freely used, adapted, | |
| 9 | − * and redistributed in source or binary form, so long as an | |
| 10 | − * acknowledgment appears in derived source files. The citation | |
| 11 | − * should list that the code comes from the book "Linux Device | |
| 12 | − * Drivers" by Alessandro Rubini and Jonathan Corbet, published | |
| 13 | − * by O'Reilly & Associates. No warranty is attached; | |
| 14 | − * we cannot take responsibility for errors or fitness for use. | |
| 15 | − */ | |
| 16 | − | |
| 17 | 1 | /* version dependencies have been confined to a separate file */ |
| 18 | 2 | |
| 19 | 3 | /* Tunable parameters */ |
| @@ -5,8 +5,13 @@ · 4 unmodified lines | ||
| 5 | 5 | #include <linux/clk-provider.h> |
| 6 | 6 | #include <linux/pci.h> |
| 7 | 7 | #include <linux/dmi.h> |
| 8 | +#include "dwmac-intel.h" | |
| 8 | 9 | #include "stmmac.h" |
| 9 | 10 | |
| 11 | +struct intel_priv_data { | |
| 12 | + int mdio_adhoc_addr; /* mdio address for serdes & etc */ | |
| 13 | +}; | |
| 14 | + | |
| 10 | 15 | /* This struct is used to associate PCI Function of MAC controller on a board, |
| 11 | 16 | * discovered via DMI, with the address of PHY connected to the MAC. The |
| 12 | 17 | * negative value of the address means that MAC controller is not connected |
| @@ -49,6 +54,172 @@ static int stmmac_pci_find_phy_addr(struct pci_dev *pdev, · 36 unmodified lines | ||
| 49 | 54 | return -ENODEV; |
| 50 | 55 | } |
| 51 | 56 | |
| 57 | +static int serdes_status_poll(struct stmmac_priv *priv, int phyaddr, | |
| 58 | + int phyreg, u32 mask, u32 val) | |
| 59 | +{ | |
| 60 | + unsigned int retries = 10; | |
| 61 | + int val_rd; | |
| 62 | + | |
| 63 | + do { | |
| 64 | + val_rd = mdiobus_read(priv->mii, phyaddr, phyreg); | |
| 65 | + if ((val_rd & mask) == (val & mask)) | |
| 66 | + return 0; | |
| 67 | + udelay(POLL_DELAY_US); | |
| 68 | + } while (--retries); | |
| 69 | + | |
| 70 | + return -ETIMEDOUT; | |
| 71 | +} | |
| 72 | + | |
| 73 | +static int intel_serdes_powerup(struct net_device *ndev, void *priv_data) | |
| 74 | +{ | |
| 75 | + struct intel_priv_data *intel_priv = priv_data; | |
| 76 | + struct stmmac_priv *priv = netdev_priv(ndev); | |
| 77 | + int serdes_phy_addr = 0; | |
| 78 | + u32 data = 0; | |
| 79 | + | |
| 80 | + if (!intel_priv->mdio_adhoc_addr) | |
| 81 | + return 0; | |
| 82 | + | |
| 83 | + serdes_phy_addr = intel_priv->mdio_adhoc_addr; | |
| 84 | + | |
| 85 | + /* assert clk_req */ | |
| 86 | + data = mdiobus_read(priv->mii, serdes_phy_addr, | |
| 87 | + SERDES_GCR0); | |
| 88 | + | |
| 89 | + data |= SERDES_PLL_CLK; | |
| 90 | + | |
| 91 | + mdiobus_write(priv->mii, serdes_phy_addr, | |
| 92 | + SERDES_GCR0, data); | |
| 93 | + | |
| 94 | + /* check for clk_ack assertion */ | |
| 95 | + data = serdes_status_poll(priv, serdes_phy_addr, | |
| 96 | + SERDES_GSR0, | |
| 97 | + SERDES_PLL_CLK, | |
| 98 | + SERDES_PLL_CLK); | |
| 99 | + | |
| 100 | + if (data) { | |
| 101 | + dev_err(priv->device, "Serdes PLL clk request timeout\n"); | |
| 102 | + return data; | |
| 103 | + } | |
| 104 | + | |
| 105 | + /* assert lane reset */ | |
| 106 | + data = mdiobus_read(priv->mii, serdes_phy_addr, | |
| 107 | + SERDES_GCR0); | |
| 108 | + | |
| 109 | + data |= SERDES_RST; | |
| 110 | + | |
| 111 | + mdiobus_write(priv->mii, serdes_phy_addr, | |
| 112 | + SERDES_GCR0, data); | |
| 113 | + | |
| 114 | + /* check for assert lane reset reflection */ | |
| 115 | + data = serdes_status_poll(priv, serdes_phy_addr, | |
| 116 | + SERDES_GSR0, | |
| 117 | + SERDES_RST, | |
| 118 | + SERDES_RST); | |
| 119 | + | |
| 120 | + if (data) { | |
| 121 | + dev_err(priv->device, "Serdes assert lane reset timeout\n"); | |
| 122 | + return data; | |
| 123 | + } | |
| 124 | + | |
| 125 | + /* move power state to P0 */ | |
| 126 | + data = mdiobus_read(priv->mii, serdes_phy_addr, | |
| 127 | + SERDES_GCR0); | |
| 128 | + | |
| 129 | + data &= ~SERDES_PWR_ST_MASK; | |
| 130 | + data |= SERDES_PWR_ST_P0 << SERDES_PWR_ST_SHIFT; | |
| 131 | + | |
| 132 | + mdiobus_write(priv->mii, serdes_phy_addr, | |
| 133 | + SERDES_GCR0, data); | |
| 134 | + | |
| 135 | + /* Check for P0 state */ | |
| 136 | + data = serdes_status_poll(priv, serdes_phy_addr, | |
| 137 | + SERDES_GSR0, | |
| 138 | + SERDES_PWR_ST_MASK, | |
| 139 | + SERDES_PWR_ST_P0 << SERDES_PWR_ST_SHIFT); | |
| 140 | + | |
| 141 | + if (data) { | |
| 142 | + dev_err(priv->device, "Serdes power state P0 timeout.\n"); | |
| 143 | + return data; | |
| 144 | + } | |
| 145 | + | |
| 146 | + return 0; | |
| 147 | +} | |
| 148 | + | |
| 149 | +static void intel_serdes_powerdown(struct net_device *ndev, void *intel_data) | |
| 150 | +{ | |
| 151 | + struct intel_priv_data *intel_priv = intel_data; | |
| 152 | + struct stmmac_priv *priv = netdev_priv(ndev); | |
| 153 | + int serdes_phy_addr = 0; | |
| 154 | + u32 data = 0; | |
| 155 | + | |
| 156 | + if (!intel_priv->mdio_adhoc_addr) | |
| 157 | + return; | |
| 158 | + | |
| 159 | + serdes_phy_addr = intel_priv->mdio_adhoc_addr; | |
| 160 | + | |
| 161 | + /* move power state to P3 */ | |
| 162 | + data = mdiobus_read(priv->mii, serdes_phy_addr, | |
| 163 | + SERDES_GCR0); | |
| 164 | + | |
| 165 | + data &= ~SERDES_PWR_ST_MASK; | |
| 166 | + data |= SERDES_PWR_ST_P3 << SERDES_PWR_ST_SHIFT; | |
| 167 | + | |
| 168 | + mdiobus_write(priv->mii, serdes_phy_addr, | |
| 169 | + SERDES_GCR0, data); | |
| 170 | + | |
| 171 | + /* Check for P3 state */ | |
| 172 | + data = serdes_status_poll(priv, serdes_phy_addr, | |
| 173 | + SERDES_GSR0, | |
| 174 | + SERDES_PWR_ST_MASK, | |
| 175 | + SERDES_PWR_ST_P3 << SERDES_PWR_ST_SHIFT); | |
| 176 | + | |
| 177 | + if (data) { | |
| 178 | + dev_err(priv->device, "Serdes power state P3 timeout\n"); | |
| 179 | + return; | |
| 180 | + } | |
| 181 | + | |
| 182 | + /* de-assert clk_req */ | |
| 183 | + data = mdiobus_read(priv->mii, serdes_phy_addr, | |
| 184 | + SERDES_GCR0); | |
| 185 | + | |
| 186 | + data &= ~SERDES_PLL_CLK; | |
| 187 | + | |
| 188 | + mdiobus_write(priv->mii, serdes_phy_addr, | |
| 189 | + SERDES_GCR0, data); | |
| 190 | + | |
| 191 | + /* check for clk_ack de-assert */ | |
| 192 | + data = serdes_status_poll(priv, serdes_phy_addr, | |
| 193 | + SERDES_GSR0, | |
| 194 | + SERDES_PLL_CLK, | |
| 195 | + (u32)~SERDES_PLL_CLK); | |
| 196 | + | |
| 197 | + if (data) { | |
| 198 | + dev_err(priv->device, "Serdes PLL clk de-assert timeout\n"); | |
| 199 | + return; | |
| 200 | + } | |
| 201 | + | |
| 202 | + /* de-assert lane reset */ | |
| 203 | + data = mdiobus_read(priv->mii, serdes_phy_addr, | |
| 204 | + SERDES_GCR0); | |
| 205 | + | |
| 206 | + data &= ~SERDES_RST; | |
| 207 | + | |
| 208 | + mdiobus_write(priv->mii, serdes_phy_addr, | |
| 209 | + SERDES_GCR0, data); | |
| 210 | + | |
| 211 | + /* check for de-assert lane reset reflection */ | |
| 212 | + data = serdes_status_poll(priv, serdes_phy_addr, | |
| 213 | + SERDES_GSR0, | |
| 214 | + SERDES_RST, | |
| 215 | + (u32)~SERDES_RST); | |
| 216 | + | |
| 217 | + if (data) { | |
| 218 | + dev_err(priv->device, "Serdes de-assert lane reset timeout\n"); | |
| 219 | + return; | |
| 220 | + } | |
| 221 | +} | |
| 222 | + | |
| 52 | 223 | static void common_default_data(struct plat_stmmacenet_data *plat) |
| 53 | 224 | { |
| 54 | 225 | plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ |
| @@ -189,6 +360,9 @@ static int ehl_sgmii_data(struct pci_dev *pdev, · 134 unmodified lines | ||
| 189 | 360 | plat->phy_addr = 0; |
| 190 | 361 | plat->phy_interface = PHY_INTERFACE_MODE_SGMII; |
| 191 | 362 | |
| 363 | + plat->serdes_powerup = intel_serdes_powerup; | |
| 364 | + plat->serdes_powerdown = intel_serdes_powerdown; | |
| 365 | + | |
| 192 | 366 | return ehl_common_data(pdev, plat); |
| 193 | 367 | } |
| 194 | 368 | |
| @@ -233,6 +407,8 @@ static int ehl_pse0_sgmii1g_data(struct pci_dev *pdev, · 38 unmodified lines | ||
| 233 | 407 | struct plat_stmmacenet_data *plat) |
| 234 | 408 | { |
| 235 | 409 | plat->phy_interface = PHY_INTERFACE_MODE_SGMII; |
| 410 | + plat->serdes_powerup = intel_serdes_powerup; | |
| 411 | + plat->serdes_powerdown = intel_serdes_powerdown; | |
| 236 | 412 | return ehl_pse0_common_data(pdev, plat); |
| 237 | 413 | } |
| 238 | 414 | |
| @@ -263,6 +439,8 @@ static int ehl_pse1_sgmii1g_data(struct pci_dev *pdev, · 24 unmodified lines | ||
| 263 | 439 | struct plat_stmmacenet_data *plat) |
| 264 | 440 | { |
| 265 | 441 | plat->phy_interface = PHY_INTERFACE_MODE_SGMII; |
| 442 | + plat->serdes_powerup = intel_serdes_powerup; | |
| 443 | + plat->serdes_powerdown = intel_serdes_powerdown; | |
| 266 | 444 | return ehl_pse1_common_data(pdev, plat); |
| 267 | 445 | } |
| 268 | 446 | |
| @@ -291,6 +469,8 @@ static int tgl_sgmii_data(struct pci_dev *pdev, · 22 unmodified lines | ||
| 291 | 469 | plat->bus_id = 1; |
| 292 | 470 | plat->phy_addr = 0; |
| 293 | 471 | plat->phy_interface = PHY_INTERFACE_MODE_SGMII; |
| 472 | + plat->serdes_powerup = intel_serdes_powerup; | |
| 473 | + plat->serdes_powerdown = intel_serdes_powerdown; | |
| 294 | 474 | return tgl_common_data(pdev, plat); |
| 295 | 475 | } |
| 296 | 476 | |
| @@ -417,11 +597,17 @@ static int intel_eth_pci_probe(struct pci_dev *pdev, · 120 unmodified lines | ||
| 417 | 597 | const struct pci_device_id *id) |
| 418 | 598 | { |
| 419 | 599 | struct stmmac_pci_info *info = (struct stmmac_pci_info *)id->driver_data; |
| 600 | + struct intel_priv_data *intel_priv; | |
| 420 | 601 | struct plat_stmmacenet_data *plat; |
| 421 | 602 | struct stmmac_resources res; |
| 422 | 603 | int i; |
| 423 | 604 | int ret; |
| 424 | 605 | |
| 606 | + intel_priv = devm_kzalloc(&pdev->dev, sizeof(*intel_priv), | |
| 607 | + GFP_KERNEL); | |
| 608 | + if (!intel_priv) | |
| 609 | + return -ENOMEM; | |
| 610 | + | |
| 425 | 611 | plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL); |
| 426 | 612 | if (!plat) |
| 427 | 613 | return -ENOMEM; |
| @@ -457,6 +643,9 @@ static int intel_eth_pci_probe(struct pci_dev *pdev, · 29 unmodified lines | ||
| 457 | 643 | |
| 458 | 644 | pci_set_master(pdev); |
| 459 | 645 | |
| 646 | + plat->bsp_priv = intel_priv; | |
| 647 | + intel_priv->mdio_adhoc_addr = 0x15; | |
| 648 | + | |
| 460 | 649 | ret = info->setup(pdev, plat); |
| 461 | 650 | if (ret) |
| 462 | 651 | return ret; |
| @@ -0,0 +1,23 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0 */ | |
| 2 | +/* Copyright (c) 2020, Intel Corporation | |
| 3 | + * DWMAC Intel header file | |
| 4 | + */ | |
| 5 | + | |
| 6 | +#ifndef __DWMAC_INTEL_H__ | |
| 7 | +#define __DWMAC_INTEL_H__ | |
| 8 | + | |
| 9 | +#define POLL_DELAY_US 8 | |
| 10 | + | |
| 11 | +/* SERDES Register */ | |
| 12 | +#define SERDES_GSR0 0x5 /* Global Status Reg0 */ | |
| 13 | +#define SERDES_GCR0 0xb /* Global Configuration Reg0 */ | |
| 14 | + | |
| 15 | +/* SERDES defines */ | |
| 16 | +#define SERDES_PLL_CLK BIT(0) /* PLL clk valid signal */ | |
| 17 | +#define SERDES_RST BIT(2) /* Serdes Reset */ | |
| 18 | +#define SERDES_PWR_ST_MASK GENMASK(6, 4) /* Serdes Power state*/ | |
| 19 | +#define SERDES_PWR_ST_SHIFT 4 | |
| 20 | +#define SERDES_PWR_ST_P0 0x0 | |
| 21 | +#define SERDES_PWR_ST_P3 0x3 | |
| 22 | + | |
| 23 | +#endif /* __DWMAC_INTEL_H__ */ | |
| @@ -119,6 +119,7 @@ static int meson8b_init_rgmii_tx_clk(struct meson8b_dwmac *dwmac) · 118 unmodified lines | ||
| 119 | 119 | { .div = 5, .val = 5, }, |
| 120 | 120 | { .div = 6, .val = 6, }, |
| 121 | 121 | { .div = 7, .val = 7, }, |
| 122 | + { /* end of array */ } | |
| 122 | 123 | }; |
| 123 | 124 | |
| 124 | 125 | clk_configs = devm_kzalloc(dev, sizeof(*clk_configs), GFP_KERNEL); |
| @@ -291,16 +291,19 @@ static int socfpga_gen5_set_phy_mode(struct socfpga_dwmac *dwmac) · 290 unmodified lines | ||
| 291 | 291 | phymode == PHY_INTERFACE_MODE_MII || |
| 292 | 292 | phymode == PHY_INTERFACE_MODE_GMII || |
| 293 | 293 | phymode == PHY_INTERFACE_MODE_SGMII) { |
| 294 | − ctrl |= SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2); | |
| 295 | 294 | regmap_read(sys_mgr_base_addr, SYSMGR_FPGAGRP_MODULE_REG, |
| 296 | 295 | &module); |
| 297 | 296 | module |= (SYSMGR_FPGAGRP_MODULE_EMAC << (reg_shift / 2)); |
| 298 | 297 | regmap_write(sys_mgr_base_addr, SYSMGR_FPGAGRP_MODULE_REG, |
| 299 | 298 | module); |
| 300 | − } else { | |
| 301 | − ctrl &= ~(SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2)); | |
| 302 | 299 | } |
| 303 | 300 | |
| 301 | + if (dwmac->f2h_ptp_ref_clk) | |
| 302 | + ctrl |= SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2); | |
| 303 | + else | |
| 304 | + ctrl &= ~(SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << | |
| 305 | + (reg_shift / 2)); | |
| 306 | + | |
| 304 | 307 | regmap_write(sys_mgr_base_addr, reg_offset, ctrl); |
| 305 | 308 | |
| 306 | 309 | /* Deassert reset for the phy configuration to be sampled by |
| @@ -624,7 +624,7 @@ int dwmac5_est_configure(void __iomem *ioaddr, struct stmmac_est *cfg, · 623 unmodified lines | ||
| 624 | 624 | total_offset += offset; |
| 625 | 625 | } |
| 626 | 626 | |
| 627 | − total_ctr = cfg->ctr[0] + cfg->ctr[1] * 1000000000; | |
| 627 | + total_ctr = cfg->ctr[0] + cfg->ctr[1] * 1000000000ULL; | |
| 628 | 628 | total_ctr += total_offset; |
| 629 | 629 | |
| 630 | 630 | ctr_low = do_div(total_ctr, 1000000000); |
| @@ -27,12 +27,16 @@ static void config_sub_second_increment(void __iomem *ioaddr, · 26 unmodified lines | ||
| 27 | 27 | unsigned long data; |
| 28 | 28 | u32 reg_value; |
| 29 | 29 | |
| 30 | − /* For GMAC3.x, 4.x versions, convert the ptp_clock to nano second | |
| 31 | − * formula = (1/ptp_clock) * 1000000000 | |
| 32 | − * where ptp_clock is 50MHz if fine method is used to update system | |
| 30 | + /* For GMAC3.x, 4.x versions, in "fine adjustement mode" set sub-second | |
| 31 | + * increment to twice the number of nanoseconds of a clock cycle. | |
| 32 | + * The calculation of the default_addend value by the caller will set it | |
| 33 | + * to mid-range = 2^31 when the remainder of this division is zero, | |
| 34 | + * which will make the accumulator overflow once every 2 ptp_clock | |
| 35 | + * cycles, adding twice the number of nanoseconds of a clock cycle : | |
| 36 | + * 2000000000ULL / ptp_clock. | |
| 33 | 37 | */ |
| 34 | 38 | if (value & PTP_TCR_TSCFUPDT) |
| 35 | − data = (1000000000ULL / 50000000); | |
| 39 | + data = (2000000000ULL / ptp_clock); | |
| 36 | 40 | else |
| 37 | 41 | data = (1000000000ULL / ptp_clock); |
| 38 | 42 | |
| @@ -4060,7 +4060,7 @@ static int stmmac_set_features(struct net_device *netdev, · 4059 unmodified lines | ||
| 4060 | 4060 | /** |
| 4061 | 4061 | * stmmac_interrupt - main ISR |
| 4062 | 4062 | * @irq: interrupt number. |
| 4063 | − * @dev_id: to pass the net device pointer. | |
| 4063 | + * @dev_id: to pass the net device pointer (must be valid). | |
| 4064 | 4064 | * Description: this is the main driver interrupt service routine. |
| 4065 | 4065 | * It can call: |
| 4066 | 4066 | * o DMA service routine (to manage incoming frame reception and transmission |
| @@ -4084,11 +4084,6 @@ static irqreturn_t stmmac_interrupt(int irq, void *dev_id) · 17 unmodified lines | ||
| 4084 | 4084 | if (priv->irq_wake) |
| 4085 | 4085 | pm_wakeup_event(priv->device, 0); |
| 4086 | 4086 | |
| 4087 | − if (unlikely(!dev)) { | |
| 4088 | − netdev_err(priv->dev, "%s: invalid dev pointer\n", __func__); | |
| 4089 | − return IRQ_NONE; | |
| 4090 | − } | |
| 4091 | − | |
| 4092 | 4087 | /* Check if adapter is up */ |
| 4093 | 4088 | if (test_bit(STMMAC_DOWN, &priv->state)) |
| 4094 | 4089 | return IRQ_HANDLED; |
| @@ -4986,12 +4981,22 @@ int stmmac_dvr_probe(struct device *device, · 891 unmodified lines | ||
| 4986 | 4981 | goto error_netdev_register; |
| 4987 | 4982 | } |
| 4988 | 4983 | |
| 4984 | + if (priv->plat->serdes_powerup) { | |
| 4985 | + ret = priv->plat->serdes_powerup(ndev, | |
| 4986 | + priv->plat->bsp_priv); | |
| 4987 | + | |
| 4988 | + if (ret < 0) | |
| 4989 | + goto error_serdes_powerup; | |
| 4990 | + } | |
| 4991 | + | |
| 4989 | 4992 | #ifdef CONFIG_DEBUG_FS |
| 4990 | 4993 | stmmac_init_fs(ndev); |
| 4991 | 4994 | #endif |
| 4992 | 4995 | |
| 4993 | 4996 | return ret; |
| 4994 | 4997 | |
| 4998 | +error_serdes_powerup: | |
| 4999 | + unregister_netdev(ndev); | |
| 4995 | 5000 | error_netdev_register: |
| 4996 | 5001 | phylink_destroy(priv->phylink); |
| 4997 | 5002 | error_phy_setup: |
| @@ -5029,6 +5034,9 @@ int stmmac_dvr_remove(struct device *dev) · 31 unmodified lines | ||
| 5029 | 5034 | |
| 5030 | 5035 | stmmac_stop_all_dma(priv); |
| 5031 | 5036 | |
| 5037 | + if (priv->plat->serdes_powerdown) | |
| 5038 | + priv->plat->serdes_powerdown(ndev, priv->plat->bsp_priv); | |
| 5039 | + | |
| 5032 | 5040 | stmmac_mac_set(priv, priv->ioaddr, false); |
| 5033 | 5041 | netif_carrier_off(ndev); |
| 5034 | 5042 | unregister_netdev(ndev); |
| @@ -5081,6 +5089,9 @@ int stmmac_suspend(struct device *dev) · 46 unmodified lines | ||
| 5081 | 5089 | /* Stop TX/RX DMA */ |
| 5082 | 5090 | stmmac_stop_all_dma(priv); |
| 5083 | 5091 | |
| 5092 | + if (priv->plat->serdes_powerdown) | |
| 5093 | + priv->plat->serdes_powerdown(ndev, priv->plat->bsp_priv); | |
| 5094 | + | |
| 5084 | 5095 | /* Enable Power down mode by programming the PMT regs */ |
| 5085 | 5096 | if (device_may_wakeup(priv->device)) { |
| 5086 | 5097 | stmmac_pmt(priv, priv->hw, priv->wolopts); |
| @@ -5143,6 +5154,7 @@ int stmmac_resume(struct device *dev) · 56 unmodified lines | ||
| 5143 | 5154 | { |
| 5144 | 5155 | struct net_device *ndev = dev_get_drvdata(dev); |
| 5145 | 5156 | struct stmmac_priv *priv = netdev_priv(ndev); |
| 5157 | + int ret; | |
| 5146 | 5158 | |
| 5147 | 5159 | if (!netif_running(ndev)) |
| 5148 | 5160 | return 0; |
| @@ -5170,6 +5182,14 @@ int stmmac_resume(struct device *dev) · 21 unmodified lines | ||
| 5170 | 5182 | stmmac_mdio_reset(priv->mii); |
| 5171 | 5183 | } |
| 5172 | 5184 | |
| 5185 | + if (priv->plat->serdes_powerup) { | |
| 5186 | + ret = priv->plat->serdes_powerup(ndev, | |
| 5187 | + priv->plat->bsp_priv); | |
| 5188 | + | |
| 5189 | + if (ret < 0) | |
| 5190 | + return ret; | |
| 5191 | + } | |
| 5192 | + | |
| 5173 | 5193 | netif_device_attach(ndev); |
| 5174 | 5194 | |
| 5175 | 5195 | mutex_lock(&priv->lock); |
| @@ -90,9 +90,8 @@ config TI_CPTS · 89 unmodified lines | ||
| 90 | 90 | config TI_CPTS_MOD |
| 91 | 91 | tristate |
| 92 | 92 | depends on TI_CPTS |
| 93 | + depends on PTP_1588_CLOCK | |
| 93 | 94 | default y if TI_CPSW=y || TI_KEYSTONE_NETCP=y || TI_CPSW_SWITCHDEV=y |
| 94 | − select NET_PTP_CLASSIFY | |
| 95 | − imply PTP_1588_CLOCK | |
| 96 | 95 | default m |
| 97 | 96 | |
| 98 | 97 | config TI_K3_AM65_CPSW_NUSS |
| @@ -1719,7 +1719,8 @@ static int am65_cpsw_nuss_ndev_add_napi_2g(struct am65_cpsw_common *common) · 1718 unmodified lines | ||
| 1719 | 1719 | |
| 1720 | 1720 | ret = devm_request_irq(dev, tx_chn->irq, |
| 1721 | 1721 | am65_cpsw_nuss_tx_irq, |
| 1722 | − 0, tx_chn->tx_chn_name, tx_chn); | |
| 1722 | + IRQF_TRIGGER_HIGH, | |
| 1723 | + tx_chn->tx_chn_name, tx_chn); | |
| 1723 | 1724 | if (ret) { |
| 1724 | 1725 | dev_err(dev, "failure requesting tx%u irq %u, %d\n", |
| 1725 | 1726 | tx_chn->id, tx_chn->irq, ret); |
| @@ -1744,7 +1745,7 @@ static int am65_cpsw_nuss_ndev_reg_2g(struct am65_cpsw_common *common) · 18 unmodified lines | ||
| 1744 | 1745 | |
| 1745 | 1746 | ret = devm_request_irq(dev, common->rx_chns.irq, |
| 1746 | 1747 | am65_cpsw_nuss_rx_irq, |
| 1747 | − 0, dev_name(dev), common); | |
| 1748 | + IRQF_TRIGGER_HIGH, dev_name(dev), common); | |
| 1748 | 1749 | if (ret) { |
| 1749 | 1750 | dev_err(dev, "failure requesting rx irq %u, %d\n", |
| 1750 | 1751 | common->rx_chns.irq, ret); |
| @@ -643,7 +643,7 @@ static int tc_mii_probe(struct net_device *dev) · 642 unmodified lines | ||
| 643 | 643 | linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, mask); |
| 644 | 644 | linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, mask); |
| 645 | 645 | } |
| 646 | − linkmode_and(phydev->supported, phydev->supported, mask); | |
| 646 | + linkmode_andnot(phydev->supported, phydev->supported, mask); | |
| 647 | 647 | linkmode_copy(phydev->advertising, phydev->supported); |
| 648 | 648 | |
| 649 | 649 | lp->link = 0; |
| @@ -1387,6 +1387,8 @@ static int ixp4xx_eth_probe(struct platform_device *pdev) · 1386 unmodified lines | ||
| 1387 | 1387 | return -ENODEV; |
| 1388 | 1388 | regs_phys = res->start; |
| 1389 | 1389 | port->regs = devm_ioremap_resource(dev, res); |
| 1390 | + if (IS_ERR(port->regs)) | |
| 1391 | + return PTR_ERR(port->regs); | |
| 1390 | 1392 | |
| 1391 | 1393 | switch (port->id) { |
| 1392 | 1394 | case IXP4XX_ETH_NPEA: |
| @@ -1207,7 +1207,7 @@ static int geneve_validate(struct nlattr *tb[], struct nlattr *data[], · 1206 unmodified lines | ||
| 1207 | 1207 | enum ifla_geneve_df df = nla_get_u8(data[IFLA_GENEVE_DF]); |
| 1208 | 1208 | |
| 1209 | 1209 | if (df < 0 || df > GENEVE_DF_MAX) { |
| 1210 | − NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_GENEVE_DF], | |
| 1210 | + NL_SET_ERR_MSG_ATTR(extack, data[IFLA_GENEVE_DF], | |
| 1211 | 1211 | "Invalid DF attribute"); |
| 1212 | 1212 | return -EINVAL; |
| 1213 | 1213 | } |
| @@ -1169,11 +1169,11 @@ out_unlock: · 1168 unmodified lines | ||
| 1169 | 1169 | static struct genl_family gtp_genl_family; |
| 1170 | 1170 | |
| 1171 | 1171 | static int gtp_genl_fill_info(struct sk_buff *skb, u32 snd_portid, u32 snd_seq, |
| 1172 | − u32 type, struct pdp_ctx *pctx) | |
| 1172 | + int flags, u32 type, struct pdp_ctx *pctx) | |
| 1173 | 1173 | { |
| 1174 | 1174 | void *genlh; |
| 1175 | 1175 | |
| 1176 | − genlh = genlmsg_put(skb, snd_portid, snd_seq, >p_genl_family, 0, | |
| 1176 | + genlh = genlmsg_put(skb, snd_portid, snd_seq, >p_genl_family, flags, | |
| 1177 | 1177 | type); |
| 1178 | 1178 | if (genlh == NULL) |
| 1179 | 1179 | goto nlmsg_failure; |
| @@ -1227,8 +1227,8 @@ static int gtp_genl_get_pdp(struct sk_buff *skb, struct genl_info *info) · 47 unmodified lines | ||
| 1227 | 1227 | goto err_unlock; |
| 1228 | 1228 | } |
| 1229 | 1229 | |
| 1230 | − err = gtp_genl_fill_info(skb2, NETLINK_CB(skb).portid, | |
| 1231 | − info->snd_seq, info->nlhdr->nlmsg_type, pctx); | |
| 1230 | + err = gtp_genl_fill_info(skb2, NETLINK_CB(skb).portid, info->snd_seq, | |
| 1231 | + 0, info->nlhdr->nlmsg_type, pctx); | |
| 1232 | 1232 | if (err < 0) |
| 1233 | 1233 | goto err_unlock_free; |
| 1234 | 1234 | |
| @@ -1271,6 +1271,7 @@ static int gtp_genl_dump_pdp(struct sk_buff *skb, · 36 unmodified lines | ||
| 1271 | 1271 | gtp_genl_fill_info(skb, |
| 1272 | 1272 | NETLINK_CB(cb->skb).portid, |
| 1273 | 1273 | cb->nlh->nlmsg_seq, |
| 1274 | + NLM_F_MULTI, | |
| 1274 | 1275 | cb->nlh->nlmsg_type, pctx)) { |
| 1275 | 1276 | cb->args[0] = i; |
| 1276 | 1277 | cb->args[1] = j; |
| @@ -707,7 +707,8 @@ no_memory: · 706 unmodified lines | ||
| 707 | 707 | goto drop; |
| 708 | 708 | } |
| 709 | 709 | |
| 710 | −static int netvsc_start_xmit(struct sk_buff *skb, struct net_device *ndev) | |
| 710 | +static netdev_tx_t netvsc_start_xmit(struct sk_buff *skb, | |
| 711 | + struct net_device *ndev) | |
| 711 | 712 | { |
| 712 | 713 | return netvsc_xmit(skb, ndev, false); |
| 713 | 714 | } |
| @@ -1041,6 +1041,7 @@ static void gsi_isr_gp_int1(struct gsi *gsi) · 1040 unmodified lines | ||
| 1041 | 1041 | |
| 1042 | 1042 | complete(&gsi->completion); |
| 1043 | 1043 | } |
| 1044 | + | |
| 1044 | 1045 | /* Inter-EE interrupt handler */ |
| 1045 | 1046 | static void gsi_isr_glob_ee(struct gsi *gsi) |
| 1046 | 1047 | { |
| @@ -1493,6 +1494,12 @@ static int gsi_generic_command(struct gsi *gsi, u32 channel_id, · 446 unmodified lines | ||
| 1493 | 1494 | struct completion *completion = &gsi->completion; |
| 1494 | 1495 | u32 val; |
| 1495 | 1496 | |
| 1497 | + /* First zero the result code field */ | |
| 1498 | + val = ioread32(gsi->virt + GSI_CNTXT_SCRATCH_0_OFFSET); | |
| 1499 | + val &= ~GENERIC_EE_RESULT_FMASK; | |
| 1500 | + iowrite32(val, gsi->virt + GSI_CNTXT_SCRATCH_0_OFFSET); | |
| 1501 | + | |
| 1502 | + /* Now issue the command */ | |
| 1496 | 1503 | val = u32_encode_bits(opcode, GENERIC_OPCODE_FMASK); |
| 1497 | 1504 | val |= u32_encode_bits(channel_id, GENERIC_CHID_FMASK); |
| 1498 | 1505 | val |= u32_encode_bits(GSI_EE_MODEM, GENERIC_EE_FMASK); |
| @@ -1798,9 +1805,9 @@ static int gsi_channel_init_one(struct gsi *gsi, · 299 unmodified lines | ||
| 1798 | 1805 | |
| 1799 | 1806 | /* Worst case we need an event for every outstanding TRE */ |
| 1800 | 1807 | if (data->channel.tre_count > data->channel.event_count) { |
| 1801 | − dev_warn(gsi->dev, "channel %u limited to %u TREs\n", | |
| 1802 | − data->channel_id, data->channel.tre_count); | |
| 1803 | 1808 | tre_count = data->channel.event_count; |
| 1809 | + dev_warn(gsi->dev, "channel %u limited to %u TREs\n", | |
| 1810 | + data->channel_id, tre_count); | |
| 1804 | 1811 | } else { |
| 1805 | 1812 | tre_count = data->channel.tre_count; |
| 1806 | 1813 | } |
| @@ -410,6 +410,8 @@ · 409 unmodified lines | ||
| 410 | 410 | #define INTER_EE_RESULT_FMASK GENMASK(2, 0) |
| 411 | 411 | #define GENERIC_EE_RESULT_FMASK GENMASK(7, 5) |
| 412 | 412 | #define GENERIC_EE_SUCCESS_FVAL 1 |
| 413 | +#define GENERIC_EE_INCORRECT_DIRECTION_FVAL 3 | |
| 414 | +#define GENERIC_EE_INCORRECT_CHANNEL_FVAL 5 | |
| 413 | 415 | #define GENERIC_EE_NO_RESOURCES_FVAL 7 |
| 414 | 416 | #define USB_MAX_PACKET_FMASK GENMASK(15, 15) /* 0: HS; 1: SS */ |
| 415 | 417 | #define MHI_BASE_CHANNEL_FMASK GENMASK(31, 24) |
| @@ -1283,7 +1283,7 @@ static int ipa_endpoint_stop_rx_dma(struct ipa *ipa) · 1282 unmodified lines | ||
| 1283 | 1283 | */ |
| 1284 | 1284 | int ipa_endpoint_stop(struct ipa_endpoint *endpoint) |
| 1285 | 1285 | { |
| 1286 | − u32 retries = endpoint->toward_ipa ? 0 : IPA_ENDPOINT_STOP_RX_RETRIES; | |
| 1286 | + u32 retries = IPA_ENDPOINT_STOP_RX_RETRIES; | |
| 1287 | 1287 | int ret; |
| 1288 | 1288 | |
| 1289 | 1289 | do { |
| @@ -1291,12 +1291,9 @@ int ipa_endpoint_stop(struct ipa_endpoint *endpoint) · 1 unmodified line | ||
| 1291 | 1291 | struct gsi *gsi = &ipa->gsi; |
| 1292 | 1292 | |
| 1293 | 1293 | ret = gsi_channel_stop(gsi, endpoint->channel_id); |
| 1294 | − if (ret != -EAGAIN) | |
| 1294 | + if (ret != -EAGAIN || endpoint->toward_ipa) | |
| 1295 | 1295 | break; |
| 1296 | 1296 | |
| 1297 | − if (endpoint->toward_ipa) | |
| 1298 | − continue; | |
| 1299 | − | |
| 1300 | 1297 | /* For IPA v3.5.1, send a DMA read task and check again */ |
| 1301 | 1298 | if (ipa->version == IPA_VERSION_3_5_1) { |
| 1302 | 1299 | ret = ipa_endpoint_stop_rx_dma(ipa); |
| @@ -1305,7 +1305,8 @@ static struct crypto_aead *macsec_alloc_tfm(char *key, int key_len, int icv_len) · 1304 unmodified lines | ||
| 1305 | 1305 | struct crypto_aead *tfm; |
| 1306 | 1306 | int ret; |
| 1307 | 1307 | |
| 1308 | − tfm = crypto_alloc_aead("gcm(aes)", 0, 0); | |
| 1308 | + /* Pick a sync gcm(aes) cipher to ensure order is preserved. */ | |
| 1309 | + tfm = crypto_alloc_aead("gcm(aes)", 0, CRYPTO_ALG_ASYNC); | |
| 1309 | 1310 | |
| 1310 | 1311 | if (IS_ERR(tfm)) |
| 1311 | 1312 | return tfm; |
| @@ -2640,11 +2641,12 @@ static int macsec_upd_offload(struct sk_buff *skb, struct genl_info *info) · 1328 unmodified lines | ||
| 2640 | 2641 | if (ret) |
| 2641 | 2642 | goto rollback; |
| 2642 | 2643 | |
| 2643 | − rtnl_unlock(); | |
| 2644 | 2644 | /* Force features update, since they are different for SW MACSec and |
| 2645 | 2645 | * HW offloading cases. |
| 2646 | 2646 | */ |
| 2647 | 2647 | netdev_update_features(dev); |
| 2648 | + | |
| 2649 | + rtnl_unlock(); | |
| 2648 | 2650 | return 0; |
| 2649 | 2651 | |
| 2650 | 2652 | rollback: |
| @@ -4002,11 +4004,11 @@ static int macsec_newlink(struct net *net, struct net_device *dev, · 1351 unmodified lines | ||
| 4002 | 4004 | struct netlink_ext_ack *extack) |
| 4003 | 4005 | { |
| 4004 | 4006 | struct macsec_dev *macsec = macsec_priv(dev); |
| 4007 | + rx_handler_func_t *rx_handler; | |
| 4008 | + u8 icv_len = DEFAULT_ICV_LEN; | |
| 4005 | 4009 | struct net_device *real_dev; |
| 4006 | − int err; | |
| 4010 | + int err, mtu; | |
| 4007 | 4011 | sci_t sci; |
| 4008 | − u8 icv_len = DEFAULT_ICV_LEN; | |
| 4009 | − rx_handler_func_t *rx_handler; | |
| 4010 | 4012 | |
| 4011 | 4013 | if (!tb[IFLA_LINK]) |
| 4012 | 4014 | return -EINVAL; |
| @@ -4033,7 +4035,11 @@ static int macsec_newlink(struct net *net, struct net_device *dev, · 20 unmodified lines | ||
| 4033 | 4035 | |
| 4034 | 4036 | if (data && data[IFLA_MACSEC_ICV_LEN]) |
| 4035 | 4037 | icv_len = nla_get_u8(data[IFLA_MACSEC_ICV_LEN]); |
| 4036 | − dev->mtu = real_dev->mtu - icv_len - macsec_extra_len(true); | |
| 4038 | + mtu = real_dev->mtu - icv_len - macsec_extra_len(true); | |
| 4039 | + if (mtu < 0) | |
| 4040 | + dev->mtu = 0; | |
| 4041 | + else | |
| 4042 | + dev->mtu = mtu; | |
| 4037 | 4043 | |
| 4038 | 4044 | rx_handler = rtnl_dereference(real_dev->rx_handler); |
| 4039 | 4045 | if (rx_handler && rx_handler != macsec_handle_frame) |
| @@ -1704,7 +1704,7 @@ static int macvlan_device_event(struct notifier_block *unused, · 1703 unmodified lines | ||
| 1704 | 1704 | struct macvlan_dev, |
| 1705 | 1705 | list); |
| 1706 | 1706 | |
| 1707 | − if (macvlan_sync_address(vlan->dev, dev->dev_addr)) | |
| 1707 | + if (vlan && macvlan_sync_address(vlan->dev, dev->dev_addr)) | |
| 1708 | 1708 | return NOTIFY_BAD; |
| 1709 | 1709 | |
| 1710 | 1710 | break; |
| @@ -155,9 +155,6 @@ static int bcm84881_read_status(struct phy_device *phydev) · 154 unmodified lines | ||
| 155 | 155 | if (phydev->autoneg == AUTONEG_ENABLE && !phydev->autoneg_complete) |
| 156 | 156 | phydev->link = false; |
| 157 | 157 | |
| 158 | − if (!phydev->link) | |
| 159 | − return 0; | |
| 160 | − | |
| 161 | 158 | linkmode_zero(phydev->lp_advertising); |
| 162 | 159 | phydev->speed = SPEED_UNKNOWN; |
| 163 | 160 | phydev->duplex = DUPLEX_UNKNOWN; |
| @@ -165,6 +162,9 @@ static int bcm84881_read_status(struct phy_device *phydev) · 1 unmodified line | ||
| 165 | 162 | phydev->asym_pause = 0; |
| 166 | 163 | phydev->mdix = 0; |
| 167 | 164 | |
| 165 | + if (!phydev->link) | |
| 166 | + return 0; | |
| 167 | + | |
| 168 | 168 | if (phydev->autoneg_complete) { |
| 169 | 169 | val = genphy_c45_read_lpa(phydev); |
| 170 | 170 | if (val < 0) |
| @@ -1120,7 +1120,7 @@ static struct dp83640_clock *dp83640_clock_get_bus(struct mii_bus *bus) · 1119 unmodified lines | ||
| 1120 | 1120 | goto out; |
| 1121 | 1121 | } |
| 1122 | 1122 | dp83640_clock_init(clock, bus); |
| 1123 | − list_add_tail(&phyter_clocks, &clock->list); | |
| 1123 | + list_add_tail(&clock->list, &phyter_clocks); | |
| 1124 | 1124 | out: |
| 1125 | 1125 | mutex_unlock(&phyter_clocks_lock); |
| 1126 | 1126 | |
| @@ -137,19 +137,18 @@ static int dp83822_set_wol(struct phy_device *phydev, · 136 unmodified lines | ||
| 137 | 137 | value &= ~DP83822_WOL_SECURE_ON; |
| 138 | 138 | } |
| 139 | 139 | |
| 140 | − value |= (DP83822_WOL_EN | DP83822_WOL_INDICATION_SEL | | |
| 141 | − DP83822_WOL_CLR_INDICATION); | |
| 142 | − phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG, | |
| 143 | − value); | |
| 140 | + /* Clear any pending WoL interrupt */ | |
| 141 | + phy_read(phydev, MII_DP83822_MISR2); | |
| 142 | + | |
| 143 | + value |= DP83822_WOL_EN | DP83822_WOL_INDICATION_SEL | | |
| 144 | + DP83822_WOL_CLR_INDICATION; | |
| 145 | + | |
| 146 | + return phy_write_mmd(phydev, DP83822_DEVADDR, | |
| 147 | + MII_DP83822_WOL_CFG, value); | |
| 144 | 148 | } else { |
| 145 | − value = phy_read_mmd(phydev, DP83822_DEVADDR, | |
| 146 | − MII_DP83822_WOL_CFG); | |
| 147 | − value &= ~DP83822_WOL_EN; | |
| 148 | − phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG, | |
| 149 | − value); | |
| 149 | + return phy_clear_bits_mmd(phydev, DP83822_DEVADDR, | |
| 150 | + MII_DP83822_WOL_CFG, DP83822_WOL_EN); | |
| 150 | 151 | } |
| 151 | − | |
| 152 | − return 0; | |
| 153 | 152 | } |
| 154 | 153 | |
| 155 | 154 | static void dp83822_get_wol(struct phy_device *phydev, |
| @@ -258,12 +257,11 @@ static int dp83822_config_intr(struct phy_device *phydev) · 102 unmodified lines | ||
| 258 | 257 | |
| 259 | 258 | static int dp83822_config_init(struct phy_device *phydev) |
| 260 | 259 | { |
| 261 | − int value; | |
| 262 | − | |
| 263 | − value = DP83822_WOL_MAGIC_EN | DP83822_WOL_SECURE_ON | DP83822_WOL_EN; | |
| 260 | + int value = DP83822_WOL_EN | DP83822_WOL_MAGIC_EN | | |
| 261 | + DP83822_WOL_SECURE_ON; | |
| 264 | 262 | |
| 265 | − return phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG, | |
| 266 | − value); | |
| 263 | + return phy_clear_bits_mmd(phydev, DP83822_DEVADDR, | |
| 264 | + MII_DP83822_WOL_CFG, value); | |
| 267 | 265 | } |
| 268 | 266 | |
| 269 | 267 | static int dp83822_phy_reset(struct phy_device *phydev) |
| @@ -139,16 +139,19 @@ static int dp83811_set_wol(struct phy_device *phydev, · 138 unmodified lines | ||
| 139 | 139 | value &= ~DP83811_WOL_SECURE_ON; |
| 140 | 140 | } |
| 141 | 141 | |
| 142 | − value |= (DP83811_WOL_EN | DP83811_WOL_INDICATION_SEL | | |
| 143 | − DP83811_WOL_CLR_INDICATION); | |
| 144 | − phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG, | |
| 145 | − value); | |
| 142 | + /* Clear any pending WoL interrupt */ | |
| 143 | + phy_read(phydev, MII_DP83811_INT_STAT1); | |
| 144 | + | |
| 145 | + value |= DP83811_WOL_EN | DP83811_WOL_INDICATION_SEL | | |
| 146 | + DP83811_WOL_CLR_INDICATION; | |
| 147 | + | |
| 148 | + return phy_write_mmd(phydev, DP83811_DEVADDR, | |
| 149 | + MII_DP83811_WOL_CFG, value); | |
| 146 | 150 | } else { |
| 147 | − phy_clear_bits_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG, | |
| 148 | − DP83811_WOL_EN); | |
| 151 | + return phy_clear_bits_mmd(phydev, DP83811_DEVADDR, | |
| 152 | + MII_DP83811_WOL_CFG, DP83811_WOL_EN); | |
| 149 | 153 | } |
| 150 | 154 | |
| 151 | − return 0; | |
| 152 | 155 | } |
| 153 | 156 | |
| 154 | 157 | static void dp83811_get_wol(struct phy_device *phydev, |
| @@ -292,8 +295,8 @@ static int dp83811_config_init(struct phy_device *phydev) · 137 unmodified lines | ||
| 292 | 295 | |
| 293 | 296 | value = DP83811_WOL_MAGIC_EN | DP83811_WOL_SECURE_ON | DP83811_WOL_EN; |
| 294 | 297 | |
| 295 | − return phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG, | |
| 296 | − value); | |
| 298 | + return phy_clear_bits_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG, | |
| 299 | + value); | |
| 297 | 300 | } |
| 298 | 301 | |
| 299 | 302 | static int dp83811_phy_reset(struct phy_device *phydev) |
| @@ -66,6 +66,9 @@ enum { · 65 unmodified lines | ||
| 66 | 66 | MV_PCS_CSSR1_SPD2_2500 = 0x0004, |
| 67 | 67 | MV_PCS_CSSR1_SPD2_10000 = 0x0000, |
| 68 | 68 | |
| 69 | + /* Temperature read register (88E2110 only) */ | |
| 70 | + MV_PCS_TEMP = 0x8042, | |
| 71 | + | |
| 69 | 72 | /* These registers appear at 0x800X and 0xa00X - the 0xa00X control |
| 70 | 73 | * registers appear to set themselves to the 0x800X when AN is |
| 71 | 74 | * restarted, but status registers appear readable from either. |
| @@ -77,6 +80,7 @@ enum { · 5 unmodified lines | ||
| 77 | 80 | MV_V2_PORT_CTRL = 0xf001, |
| 78 | 81 | MV_V2_PORT_CTRL_SWRST = BIT(15), |
| 79 | 82 | MV_V2_PORT_CTRL_PWRDOWN = BIT(11), |
| 83 | + /* Temperature control/read registers (88X3310 only) */ | |
| 80 | 84 | MV_V2_TEMP_CTRL = 0xf08a, |
| 81 | 85 | MV_V2_TEMP_CTRL_MASK = 0xc000, |
| 82 | 86 | MV_V2_TEMP_CTRL_SAMPLE = 0x0000, |
| @@ -104,6 +108,24 @@ static umode_t mv3310_hwmon_is_visible(const void *data, · 21 unmodified lines | ||
| 104 | 108 | return 0; |
| 105 | 109 | } |
| 106 | 110 | |
| 111 | +static int mv3310_hwmon_read_temp_reg(struct phy_device *phydev) | |
| 112 | +{ | |
| 113 | + return phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP); | |
| 114 | +} | |
| 115 | + | |
| 116 | +static int mv2110_hwmon_read_temp_reg(struct phy_device *phydev) | |
| 117 | +{ | |
| 118 | + return phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_TEMP); | |
| 119 | +} | |
| 120 | + | |
| 121 | +static int mv10g_hwmon_read_temp_reg(struct phy_device *phydev) | |
| 122 | +{ | |
| 123 | + if (phydev->drv->phy_id == MARVELL_PHY_ID_88X3310) | |
| 124 | + return mv3310_hwmon_read_temp_reg(phydev); | |
| 125 | + else /* MARVELL_PHY_ID_88E2110 */ | |
| 126 | + return mv2110_hwmon_read_temp_reg(phydev); | |
| 127 | +} | |
| 128 | + | |
| 107 | 129 | static int mv3310_hwmon_read(struct device *dev, enum hwmon_sensor_types type, |
| 108 | 130 | u32 attr, int channel, long *value) |
| 109 | 131 | { |
| @@ -116,7 +138,7 @@ static int mv3310_hwmon_read(struct device *dev, enum hwmon_sensor_types type, · 6 unmodified lines | ||
| 116 | 138 | } |
| 117 | 139 | |
| 118 | 140 | if (type == hwmon_temp && attr == hwmon_temp_input) { |
| 119 | − temp = phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP); | |
| 141 | + temp = mv10g_hwmon_read_temp_reg(phydev); | |
| 120 | 142 | if (temp < 0) |
| 121 | 143 | return temp; |
| 122 | 144 | |
| @@ -169,6 +191,9 @@ static int mv3310_hwmon_config(struct phy_device *phydev, bool enable) · 46 unmodified lines | ||
| 169 | 191 | u16 val; |
| 170 | 192 | int ret; |
| 171 | 193 | |
| 194 | + if (phydev->drv->phy_id != MARVELL_PHY_ID_88X3310) | |
| 195 | + return 0; | |
| 196 | + | |
| 172 | 197 | ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP, |
| 173 | 198 | MV_V2_TEMP_UNKNOWN); |
| 174 | 199 | if (ret < 0) |
| @@ -246,7 +271,8 @@ static int mv3310_power_up(struct phy_device *phydev) · 71 unmodified lines | ||
| 246 | 271 | ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL, |
| 247 | 272 | MV_V2_PORT_CTRL_PWRDOWN); |
| 248 | 273 | |
| 249 | − if (priv->firmware_ver < 0x00030000) | |
| 274 | + if (phydev->drv->phy_id != MARVELL_PHY_ID_88X3310 || | |
| 275 | + priv->firmware_ver < 0x00030000) | |
| 250 | 276 | return ret; |
| 251 | 277 | |
| 252 | 278 | return phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL, |
| @@ -3,9 +3,21 @@ · 2 unmodified lines | ||
| 3 | 3 | |
| 4 | 4 | #include <linux/kernel.h> |
| 5 | 5 | #include <linux/module.h> |
| 6 | +#include <linux/delay.h> | |
| 6 | 7 | #include <linux/mii.h> |
| 7 | 8 | #include <linux/phy.h> |
| 8 | 9 | |
| 10 | +/* External Register Control Register */ | |
| 11 | +#define LAN87XX_EXT_REG_CTL (0x14) | |
| 12 | +#define LAN87XX_EXT_REG_CTL_RD_CTL (0x1000) | |
| 13 | +#define LAN87XX_EXT_REG_CTL_WR_CTL (0x0800) | |
| 14 | + | |
| 15 | +/* External Register Read Data Register */ | |
| 16 | +#define LAN87XX_EXT_REG_RD_DATA (0x15) | |
| 17 | + | |
| 18 | +/* External Register Write Data Register */ | |
| 19 | +#define LAN87XX_EXT_REG_WR_DATA (0x16) | |
| 20 | + | |
| 9 | 21 | /* Interrupt Source Register */ |
| 10 | 22 | #define LAN87XX_INTERRUPT_SOURCE (0x18) |
| 11 | 23 | |
| @@ -14,9 +26,160 @@ · 2 unmodified lines | ||
| 14 | 26 | #define LAN87XX_MASK_LINK_UP (0x0004) |
| 15 | 27 | #define LAN87XX_MASK_LINK_DOWN (0x0002) |
| 16 | 28 | |
| 29 | +/* phyaccess nested types */ | |
| 30 | +#define PHYACC_ATTR_MODE_READ 0 | |
| 31 | +#define PHYACC_ATTR_MODE_WRITE 1 | |
| 32 | +#define PHYACC_ATTR_MODE_MODIFY 2 | |
| 33 | + | |
| 34 | +#define PHYACC_ATTR_BANK_SMI 0 | |
| 35 | +#define PHYACC_ATTR_BANK_MISC 1 | |
| 36 | +#define PHYACC_ATTR_BANK_PCS 2 | |
| 37 | +#define PHYACC_ATTR_BANK_AFE 3 | |
| 38 | +#define PHYACC_ATTR_BANK_MAX 7 | |
| 39 | + | |
| 17 | 40 | #define DRIVER_AUTHOR "Nisar Sayed <nisar.sayed@microchip.com>" |
| 18 | 41 | #define DRIVER_DESC "Microchip LAN87XX T1 PHY driver" |
| 19 | 42 | |
| 43 | +struct access_ereg_val { | |
| 44 | + u8 mode; | |
| 45 | + u8 bank; | |
| 46 | + u8 offset; | |
| 47 | + u16 val; | |
| 48 | + u16 mask; | |
| 49 | +}; | |
| 50 | + | |
| 51 | +static int access_ereg(struct phy_device *phydev, u8 mode, u8 bank, | |
| 52 | + u8 offset, u16 val) | |
| 53 | +{ | |
| 54 | + u16 ereg = 0; | |
| 55 | + int rc = 0; | |
| 56 | + | |
| 57 | + if (mode > PHYACC_ATTR_MODE_WRITE || bank > PHYACC_ATTR_BANK_MAX) | |
| 58 | + return -EINVAL; | |
| 59 | + | |
| 60 | + if (bank == PHYACC_ATTR_BANK_SMI) { | |
| 61 | + if (mode == PHYACC_ATTR_MODE_WRITE) | |
| 62 | + rc = phy_write(phydev, offset, val); | |
| 63 | + else | |
| 64 | + rc = phy_read(phydev, offset); | |
| 65 | + return rc; | |
| 66 | + } | |
| 67 | + | |
| 68 | + if (mode == PHYACC_ATTR_MODE_WRITE) { | |
| 69 | + ereg = LAN87XX_EXT_REG_CTL_WR_CTL; | |
| 70 | + rc = phy_write(phydev, LAN87XX_EXT_REG_WR_DATA, val); | |
| 71 | + if (rc < 0) | |
| 72 | + return rc; | |
| 73 | + } else { | |
| 74 | + ereg = LAN87XX_EXT_REG_CTL_RD_CTL; | |
| 75 | + } | |
| 76 | + | |
| 77 | + ereg |= (bank << 8) | offset; | |
| 78 | + | |
| 79 | + rc = phy_write(phydev, LAN87XX_EXT_REG_CTL, ereg); | |
| 80 | + if (rc < 0) | |
| 81 | + return rc; | |
| 82 | + | |
| 83 | + if (mode == PHYACC_ATTR_MODE_READ) | |
| 84 | + rc = phy_read(phydev, LAN87XX_EXT_REG_RD_DATA); | |
| 85 | + | |
| 86 | + return rc; | |
| 87 | +} | |
| 88 | + | |
| 89 | +static int access_ereg_modify_changed(struct phy_device *phydev, | |
| 90 | + u8 bank, u8 offset, u16 val, u16 mask) | |
| 91 | +{ | |
| 92 | + int new = 0, rc = 0; | |
| 93 | + | |
| 94 | + if (bank > PHYACC_ATTR_BANK_MAX) | |
| 95 | + return -EINVAL; | |
| 96 | + | |
| 97 | + rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, bank, offset, val); | |
| 98 | + if (rc < 0) | |
| 99 | + return rc; | |
| 100 | + | |
| 101 | + new = val | (rc & (mask ^ 0xFFFF)); | |
| 102 | + rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE, bank, offset, new); | |
| 103 | + | |
| 104 | + return rc; | |
| 105 | +} | |
| 106 | + | |
| 107 | +static int lan87xx_phy_init(struct phy_device *phydev) | |
| 108 | +{ | |
| 109 | + static const struct access_ereg_val init[] = { | |
| 110 | + /* TX Amplitude = 5 */ | |
| 111 | + {PHYACC_ATTR_MODE_MODIFY, PHYACC_ATTR_BANK_AFE, 0x0B, | |
| 112 | + 0x000A, 0x001E}, | |
| 113 | + /* Clear SMI interrupts */ | |
| 114 | + {PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_SMI, 0x18, | |
| 115 | + 0, 0}, | |
| 116 | + /* Clear MISC interrupts */ | |
| 117 | + {PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_MISC, 0x08, | |
| 118 | + 0, 0}, | |
| 119 | + /* Turn on TC10 Ring Oscillator (ROSC) */ | |
| 120 | + {PHYACC_ATTR_MODE_MODIFY, PHYACC_ATTR_BANK_MISC, 0x20, | |
| 121 | + 0x0020, 0x0020}, | |
| 122 | + /* WUR Detect Length to 1.2uS, LPC Detect Length to 1.09uS */ | |
| 123 | + {PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_PCS, 0x20, | |
| 124 | + 0x283C, 0}, | |
| 125 | + /* Wake_In Debounce Length to 39uS, Wake_Out Length to 79uS */ | |
| 126 | + {PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_MISC, 0x21, | |
| 127 | + 0x274F, 0}, | |
| 128 | + /* Enable Auto Wake Forward to Wake_Out, ROSC on, Sleep, | |
| 129 | + * and Wake_In to wake PHY | |
| 130 | + */ | |
| 131 | + {PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_MISC, 0x20, | |
| 132 | + 0x80A7, 0}, | |
| 133 | + /* Enable WUP Auto Fwd, Enable Wake on MDI, Wakeup Debouncer | |
| 134 | + * to 128 uS | |
| 135 | + */ | |
| 136 | + {PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_MISC, 0x24, | |
| 137 | + 0xF110, 0}, | |
| 138 | + /* Enable HW Init */ | |
| 139 | + {PHYACC_ATTR_MODE_MODIFY, PHYACC_ATTR_BANK_SMI, 0x1A, | |
| 140 | + 0x0100, 0x0100}, | |
| 141 | + }; | |
| 142 | + int rc, i; | |
| 143 | + | |
| 144 | + /* Start manual initialization procedures in Managed Mode */ | |
| 145 | + rc = access_ereg_modify_changed(phydev, PHYACC_ATTR_BANK_SMI, | |
| 146 | + 0x1a, 0x0000, 0x0100); | |
| 147 | + if (rc < 0) | |
| 148 | + return rc; | |
| 149 | + | |
| 150 | + /* Soft Reset the SMI block */ | |
| 151 | + rc = access_ereg_modify_changed(phydev, PHYACC_ATTR_BANK_SMI, | |
| 152 | + 0x00, 0x8000, 0x8000); | |
| 153 | + if (rc < 0) | |
| 154 | + return rc; | |
| 155 | + | |
| 156 | + /* Check to see if the self-clearing bit is cleared */ | |
| 157 | + usleep_range(1000, 2000); | |
| 158 | + rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, | |
| 159 | + PHYACC_ATTR_BANK_SMI, 0x00, 0); | |
| 160 | + if (rc < 0) | |
| 161 | + return rc; | |
| 162 | + if ((rc & 0x8000) != 0) | |
| 163 | + return -ETIMEDOUT; | |
| 164 | + | |
| 165 | + /* PHY Initialization */ | |
| 166 | + for (i = 0; i < ARRAY_SIZE(init); i++) { | |
| 167 | + if (init[i].mode == PHYACC_ATTR_MODE_MODIFY) { | |
| 168 | + rc = access_ereg_modify_changed(phydev, init[i].bank, | |
| 169 | + init[i].offset, | |
| 170 | + init[i].val, | |
| 171 | + init[i].mask); | |
| 172 | + } else { | |
| 173 | + rc = access_ereg(phydev, init[i].mode, init[i].bank, | |
| 174 | + init[i].offset, init[i].val); | |
| 175 | + } | |
| 176 | + if (rc < 0) | |
| 177 | + return rc; | |
| 178 | + } | |
| 179 | + | |
| 180 | + return 0; | |
| 181 | +} | |
| 182 | + | |
| 20 | 183 | static int lan87xx_phy_config_intr(struct phy_device *phydev) |
| 21 | 184 | { |
| 22 | 185 | int rc, val = 0; |
| @@ -40,6 +203,13 @@ static int lan87xx_phy_ack_interrupt(struct phy_device *phydev) · 17 unmodified lines | ||
| 40 | 203 | return rc < 0 ? rc : 0; |
| 41 | 204 | } |
| 42 | 205 | |
| 206 | +static int lan87xx_config_init(struct phy_device *phydev) | |
| 207 | +{ | |
| 208 | + int rc = lan87xx_phy_init(phydev); | |
| 209 | + | |
| 210 | + return rc < 0 ? rc : 0; | |
| 211 | +} | |
| 212 | + | |
| 43 | 213 | static struct phy_driver microchip_t1_phy_driver[] = { |
| 44 | 214 | { |
| 45 | 215 | .phy_id = 0x0007c150, |
| @@ -48,6 +218,7 @@ static struct phy_driver microchip_t1_phy_driver[] = { · 2 unmodified lines | ||
| 48 | 218 | |
| 49 | 219 | .features = PHY_BASIC_T1_FEATURES, |
| 50 | 220 | |
| 221 | + .config_init = lan87xx_config_init, | |
| 51 | 222 | .config_aneg = genphy_config_aneg, |
| 52 | 223 | |
| 53 | 224 | .ack_interrupt = lan87xx_phy_ack_interrupt, |
| @@ -468,6 +468,9 @@ static const struct team_mode *team_mode_get(const char *kind) · 467 unmodified lines | ||
| 468 | 468 | struct team_mode_item *mitem; |
| 469 | 469 | const struct team_mode *mode = NULL; |
| 470 | 470 | |
| 471 | + if (!try_module_get(THIS_MODULE)) | |
| 472 | + return NULL; | |
| 473 | + | |
| 471 | 474 | spin_lock(&mode_list_lock); |
| 472 | 475 | mitem = __find_mode(kind); |
| 473 | 476 | if (!mitem) { |
| @@ -483,6 +486,7 @@ static const struct team_mode *team_mode_get(const char *kind) · 9 unmodified lines | ||
| 483 | 486 | } |
| 484 | 487 | |
| 485 | 488 | spin_unlock(&mode_list_lock); |
| 489 | + module_put(THIS_MODULE); | |
| 486 | 490 | return mode; |
| 487 | 491 | } |
| 488 | 492 | |
| @@ -1359,6 +1359,7 @@ static const struct usb_device_id products[] = { · 1358 unmodified lines | ||
| 1359 | 1359 | {QMI_FIXED_INTF(0x413c, 0x81b3, 8)}, /* Dell Wireless 5809e Gobi(TM) 4G LTE Mobile Broadband Card (rev3) */ |
| 1360 | 1360 | {QMI_FIXED_INTF(0x413c, 0x81b6, 8)}, /* Dell Wireless 5811e */ |
| 1361 | 1361 | {QMI_FIXED_INTF(0x413c, 0x81b6, 10)}, /* Dell Wireless 5811e */ |
| 1362 | + {QMI_FIXED_INTF(0x413c, 0x81cc, 8)}, /* Dell Wireless 5816e */ | |
| 1362 | 1363 | {QMI_FIXED_INTF(0x413c, 0x81d7, 0)}, /* Dell Wireless 5821e */ |
| 1363 | 1364 | {QMI_FIXED_INTF(0x413c, 0x81d7, 1)}, /* Dell Wireless 5821e preproduction config */ |
| 1364 | 1365 | {QMI_FIXED_INTF(0x413c, 0x81e0, 0)}, /* Dell Wireless 5821e with eSIM support*/ |
| @@ -188,8 +188,8 @@ static netdev_tx_t vrf_process_v6_outbound(struct sk_buff *skb, · 187 unmodified lines | ||
| 188 | 188 | fl6.flowi6_proto = iph->nexthdr; |
| 189 | 189 | fl6.flowi6_flags = FLOWI_FLAG_SKIP_NH_OIF; |
| 190 | 190 | |
| 191 | − dst = ip6_route_output(net, NULL, &fl6); | |
| 192 | − if (dst == dst_null) | |
| 191 | + dst = ip6_dst_lookup_flow(net, NULL, &fl6, NULL); | |
| 192 | + if (IS_ERR(dst) || dst == dst_null) | |
| 193 | 193 | goto err; |
| 194 | 194 | |
| 195 | 195 | skb_dst_drop(skb); |
| @@ -474,7 +474,8 @@ static struct sk_buff *vrf_ip6_out(struct net_device *vrf_dev, · 278 unmodified lines | ||
| 474 | 474 | if (rt6_need_strict(&ipv6_hdr(skb)->daddr)) |
| 475 | 475 | return skb; |
| 476 | 476 | |
| 477 | − if (qdisc_tx_is_default(vrf_dev)) | |
| 477 | + if (qdisc_tx_is_default(vrf_dev) || | |
| 478 | + IP6CB(skb)->flags & IP6SKB_XFRM_TRANSFORMED) | |
| 478 | 479 | return vrf_ip6_out_direct(vrf_dev, sk, skb); |
| 479 | 480 | |
| 480 | 481 | return vrf_ip6_out_redirect(vrf_dev, skb); |
| @@ -686,7 +687,8 @@ static struct sk_buff *vrf_ip_out(struct net_device *vrf_dev, · 205 unmodified lines | ||
| 686 | 687 | ipv4_is_lbcast(ip_hdr(skb)->daddr)) |
| 687 | 688 | return skb; |
| 688 | 689 | |
| 689 | − if (qdisc_tx_is_default(vrf_dev)) | |
| 690 | + if (qdisc_tx_is_default(vrf_dev) || | |
| 691 | + IPCB(skb)->flags & IPSKB_XFRM_TRANSFORMED) | |
| 690 | 692 | return vrf_ip_out_direct(vrf_dev, sk, skb); |
| 691 | 693 | |
| 692 | 694 | return vrf_ip_out_redirect(vrf_dev, skb); |
| @@ -3144,7 +3144,7 @@ static int vxlan_validate(struct nlattr *tb[], struct nlattr *data[], · 3143 unmodified lines | ||
| 3144 | 3144 | u32 id = nla_get_u32(data[IFLA_VXLAN_ID]); |
| 3145 | 3145 | |
| 3146 | 3146 | if (id >= VXLAN_N_VID) { |
| 3147 | − NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_VXLAN_ID], | |
| 3147 | + NL_SET_ERR_MSG_ATTR(extack, data[IFLA_VXLAN_ID], | |
| 3148 | 3148 | "VXLAN ID must be lower than 16777216"); |
| 3149 | 3149 | return -ERANGE; |
| 3150 | 3150 | } |
| @@ -3155,7 +3155,7 @@ static int vxlan_validate(struct nlattr *tb[], struct nlattr *data[], · 4 unmodified lines | ||
| 3155 | 3155 | = nla_data(data[IFLA_VXLAN_PORT_RANGE]); |
| 3156 | 3156 | |
| 3157 | 3157 | if (ntohs(p->high) < ntohs(p->low)) { |
| 3158 | − NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_VXLAN_PORT_RANGE], | |
| 3158 | + NL_SET_ERR_MSG_ATTR(extack, data[IFLA_VXLAN_PORT_RANGE], | |
| 3159 | 3159 | "Invalid source port range"); |
| 3160 | 3160 | return -EINVAL; |
| 3161 | 3161 | } |
| @@ -3165,7 +3165,7 @@ static int vxlan_validate(struct nlattr *tb[], struct nlattr *data[], · 3 unmodified lines | ||
| 3165 | 3165 | enum ifla_vxlan_df df = nla_get_u8(data[IFLA_VXLAN_DF]); |
| 3166 | 3166 | |
| 3167 | 3167 | if (df < 0 || df > VXLAN_DF_MAX) { |
| 3168 | − NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_VXLAN_DF], | |
| 3168 | + NL_SET_ERR_MSG_ATTR(extack, data[IFLA_VXLAN_DF], | |
| 3169 | 3169 | "Invalid DF attribute"); |
| 3170 | 3170 | return -EINVAL; |
| 3171 | 3171 | } |
| @@ -354,6 +354,7 @@ out: · 353 unmodified lines | ||
| 354 | 354 | usb_autopm_put_interface(i2400mu->usb_iface); |
| 355 | 355 | d_fnend(8, dev, "(i2400m %p ack %p size %zu) = %ld\n", |
| 356 | 356 | i2400m, ack, ack_size, (long) result); |
| 357 | + usb_put_urb(¬if_urb); | |
| 357 | 358 | return result; |
| 358 | 359 | |
| 359 | 360 | error_exceeded: |
| @@ -35,8 +35,10 @@ int wg_packet_queue_init(struct crypt_queue *queue, work_func_t function, · 34 unmodified lines | ||
| 35 | 35 | if (multicore) { |
| 36 | 36 | queue->worker = wg_packet_percpu_multicore_worker_alloc( |
| 37 | 37 | function, queue); |
| 38 | − if (!queue->worker) | |
| 38 | + if (!queue->worker) { | |
| 39 | + ptr_ring_cleanup(&queue->ring, NULL); | |
| 39 | 40 | return -ENOMEM; |
| 41 | + } | |
| 40 | 42 | } else { |
| 41 | 43 | INIT_WORK(&queue->work, function); |
| 42 | 44 | } |
| @@ -226,21 +226,20 @@ void wg_packet_handshake_receive_worker(struct work_struct *work) · 225 unmodified lines | ||
| 226 | 226 | static void keep_key_fresh(struct wg_peer *peer) |
| 227 | 227 | { |
| 228 | 228 | struct noise_keypair *keypair; |
| 229 | − bool send = false; | |
| 229 | + bool send; | |
| 230 | 230 | |
| 231 | 231 | if (peer->sent_lastminute_handshake) |
| 232 | 232 | return; |
| 233 | 233 | |
| 234 | 234 | rcu_read_lock_bh(); |
| 235 | 235 | keypair = rcu_dereference_bh(peer->keypairs.current_keypair); |
| 236 | − if (likely(keypair && READ_ONCE(keypair->sending.is_valid)) && | |
| 237 | − keypair->i_am_the_initiator && | |
| 238 | − unlikely(wg_birthdate_has_expired(keypair->sending.birthdate, | |
| 239 | − REJECT_AFTER_TIME - KEEPALIVE_TIMEOUT - REKEY_TIMEOUT))) | |
| 240 | − send = true; | |
| 236 | + send = keypair && READ_ONCE(keypair->sending.is_valid) && | |
| 237 | + keypair->i_am_the_initiator && | |
| 238 | + wg_birthdate_has_expired(keypair->sending.birthdate, | |
| 239 | + REJECT_AFTER_TIME - KEEPALIVE_TIMEOUT - REKEY_TIMEOUT); | |
| 241 | 240 | rcu_read_unlock_bh(); |
| 242 | 241 | |
| 243 | − if (send) { | |
| 242 | + if (unlikely(send)) { | |
| 244 | 243 | peer->sent_lastminute_handshake = true; |
| 245 | 244 | wg_packet_send_queued_handshake_initiation(peer, false); |
| 246 | 245 | } |
| @@ -393,13 +392,11 @@ static void wg_packet_consume_data_done(struct wg_peer *peer, · 146 unmodified lines | ||
| 393 | 392 | len = ntohs(ip_hdr(skb)->tot_len); |
| 394 | 393 | if (unlikely(len < sizeof(struct iphdr))) |
| 395 | 394 | goto dishonest_packet_size; |
| 396 | − if (INET_ECN_is_ce(PACKET_CB(skb)->ds)) | |
| 397 | − IP_ECN_set_ce(ip_hdr(skb)); | |
| 395 | + INET_ECN_decapsulate(skb, PACKET_CB(skb)->ds, ip_hdr(skb)->tos); | |
| 398 | 396 | } else if (skb->protocol == htons(ETH_P_IPV6)) { |
| 399 | 397 | len = ntohs(ipv6_hdr(skb)->payload_len) + |
| 400 | 398 | sizeof(struct ipv6hdr); |
| 401 | − if (INET_ECN_is_ce(PACKET_CB(skb)->ds)) | |
| 402 | − IP6_ECN_set_ce(skb, ipv6_hdr(skb)); | |
| 399 | + INET_ECN_decapsulate(skb, PACKET_CB(skb)->ds, ipv6_get_dsfield(ipv6_hdr(skb))); | |
| 403 | 400 | } else { |
| 404 | 401 | goto dishonest_packet_type; |
| 405 | 402 | } |
| @@ -518,6 +515,8 @@ void wg_packet_decrypt_worker(struct work_struct *work) · 112 unmodified lines | ||
| 518 | 515 | &PACKET_CB(skb)->keypair->receiving)) ? |
| 519 | 516 | PACKET_STATE_CRYPTED : PACKET_STATE_DEAD; |
| 520 | 517 | wg_queue_enqueue_per_peer_napi(skb, state); |
| 518 | + if (need_resched()) | |
| 519 | + cond_resched(); | |
| 521 | 520 | } |
| 522 | 521 | } |
| 523 | 522 | |
| @@ -120,9 +120,9 @@ bool __init wg_ratelimiter_selftest(void) · 119 unmodified lines | ||
| 120 | 120 | enum { TRIALS_BEFORE_GIVING_UP = 5000 }; |
| 121 | 121 | bool success = false; |
| 122 | 122 | int test = 0, trials; |
| 123 | − struct sk_buff *skb4, *skb6; | |
| 123 | + struct sk_buff *skb4, *skb6 = NULL; | |
| 124 | 124 | struct iphdr *hdr4; |
| 125 | − struct ipv6hdr *hdr6; | |
| 125 | + struct ipv6hdr *hdr6 = NULL; | |
| 126 | 126 | |
| 127 | 127 | if (IS_ENABLED(CONFIG_KASAN) || IS_ENABLED(CONFIG_UBSAN)) |
| 128 | 128 | return true; |
| @@ -124,20 +124,17 @@ void wg_packet_send_handshake_cookie(struct wg_device *wg, · 123 unmodified lines | ||
| 124 | 124 | static void keep_key_fresh(struct wg_peer *peer) |
| 125 | 125 | { |
| 126 | 126 | struct noise_keypair *keypair; |
| 127 | − bool send = false; | |
| 127 | + bool send; | |
| 128 | 128 | |
| 129 | 129 | rcu_read_lock_bh(); |
| 130 | 130 | keypair = rcu_dereference_bh(peer->keypairs.current_keypair); |
| 131 | − if (likely(keypair && READ_ONCE(keypair->sending.is_valid)) && | |
| 132 | − (unlikely(atomic64_read(&keypair->sending.counter.counter) > | |
| 133 | − REKEY_AFTER_MESSAGES) || | |
| 134 | − (keypair->i_am_the_initiator && | |
| 135 | − unlikely(wg_birthdate_has_expired(keypair->sending.birthdate, | |
| 136 | − REKEY_AFTER_TIME))))) | |
| 137 | − send = true; | |
| 131 | + send = keypair && READ_ONCE(keypair->sending.is_valid) && | |
| 132 | + (atomic64_read(&keypair->sending.counter.counter) > REKEY_AFTER_MESSAGES || | |
| 133 | + (keypair->i_am_the_initiator && | |
| 134 | + wg_birthdate_has_expired(keypair->sending.birthdate, REKEY_AFTER_TIME))); | |
| 138 | 135 | rcu_read_unlock_bh(); |
| 139 | 136 | |
| 140 | − if (send) | |
| 137 | + if (unlikely(send)) | |
| 141 | 138 | wg_packet_send_queued_handshake_initiation(peer, false); |
| 142 | 139 | } |
| 143 | 140 | |
| @@ -281,6 +278,8 @@ void wg_packet_tx_worker(struct work_struct *work) · 137 unmodified lines | ||
| 281 | 278 | |
| 282 | 279 | wg_noise_keypair_put(keypair, false); |
| 283 | 280 | wg_peer_put(peer); |
| 281 | + if (need_resched()) | |
| 282 | + cond_resched(); | |
| 284 | 283 | } |
| 285 | 284 | } |
| 286 | 285 | |
| @@ -304,7 +303,8 @@ void wg_packet_encrypt_worker(struct work_struct *work) · 17 unmodified lines | ||
| 304 | 303 | } |
| 305 | 304 | wg_queue_enqueue_per_peer(&PACKET_PEER(first)->tx_queue, first, |
| 306 | 305 | state); |
| 307 | − | |
| 306 | + if (need_resched()) | |
| 307 | + cond_resched(); | |
| 308 | 308 | } |
| 309 | 309 | } |
| 310 | 310 | |
| @@ -76,12 +76,6 @@ static int send4(struct wg_device *wg, struct sk_buff *skb, · 75 unmodified lines | ||
| 76 | 76 | net_dbg_ratelimited("%s: No route to %pISpfsc, error %d\n", |
| 77 | 77 | wg->dev->name, &endpoint->addr, ret); |
| 78 | 78 | goto err; |
| 79 | − } else if (unlikely(rt->dst.dev == skb->dev)) { | |
| 80 | − ip_rt_put(rt); | |
| 81 | − ret = -ELOOP; | |
| 82 | − net_dbg_ratelimited("%s: Avoiding routing loop to %pISpfsc\n", | |
| 83 | − wg->dev->name, &endpoint->addr); | |
| 84 | − goto err; | |
| 85 | 79 | } |
| 86 | 80 | if (cache) |
| 87 | 81 | dst_cache_set_ip4(cache, &rt->dst, fl.saddr); |
| @@ -149,12 +143,6 @@ static int send6(struct wg_device *wg, struct sk_buff *skb, · 61 unmodified lines | ||
| 149 | 143 | net_dbg_ratelimited("%s: No route to %pISpfsc, error %d\n", |
| 150 | 144 | wg->dev->name, &endpoint->addr, ret); |
| 151 | 145 | goto err; |
| 152 | − } else if (unlikely(dst->dev == skb->dev)) { | |
| 153 | − dst_release(dst); | |
| 154 | − ret = -ELOOP; | |
| 155 | − net_dbg_ratelimited("%s: Avoiding routing loop to %pISpfsc\n", | |
| 156 | − wg->dev->name, &endpoint->addr); | |
| 157 | − goto err; | |
| 158 | 146 | } |
| 159 | 147 | if (cache) |
| 160 | 148 | dst_cache_set_ip6(cache, dst, &fl.saddr); |
| @@ -374,7 +374,7 @@ out: · 373 unmodified lines | ||
| 374 | 374 | } |
| 375 | 375 | |
| 376 | 376 | static void * |
| 377 | −il3945_rs_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir) | |
| 377 | +il3945_rs_alloc(struct ieee80211_hw *hw) | |
| 378 | 378 | { |
| 379 | 379 | return hw->priv; |
| 380 | 380 | } |
| @@ -2474,7 +2474,7 @@ il4965_rs_fill_link_cmd(struct il_priv *il, struct il_lq_sta *lq_sta, · 2473 unmodified lines | ||
| 2474 | 2474 | } |
| 2475 | 2475 | |
| 2476 | 2476 | static void * |
| 2477 | −il4965_rs_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir) | |
| 2477 | +il4965_rs_alloc(struct ieee80211_hw *hw) | |
| 2478 | 2478 | { |
| 2479 | 2479 | return hw->priv; |
| 2480 | 2480 | } |
| @@ -3019,7 +3019,7 @@ static void rs_fill_link_cmd(struct iwl_priv *priv, · 3018 unmodified lines | ||
| 3019 | 3019 | cpu_to_le16(priv->lib->bt_params->agg_time_limit); |
| 3020 | 3020 | } |
| 3021 | 3021 | |
| 3022 | −static void *rs_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir) | |
| 3022 | +static void *rs_alloc(struct ieee80211_hw *hw) | |
| 3023 | 3023 | { |
| 3024 | 3024 | return hw->priv; |
| 3025 | 3025 | } |
| @@ -296,9 +296,14 @@ int iwl_sar_select_profile(struct iwl_fw_runtime *fwrt, · 295 unmodified lines | ||
| 296 | 296 | if (!prof->enabled) { |
| 297 | 297 | IWL_DEBUG_RADIO(fwrt, "SAR profile %d is disabled.\n", |
| 298 | 298 | profs[i]); |
| 299 | − /* if one of the profiles is disabled, we fail all */ | |
| 300 | − return -ENOENT; | |
| 299 | + /* | |
| 300 | + * if one of the profiles is disabled, we | |
| 301 | + * ignore all of them and return 1 to | |
| 302 | + * differentiate disabled from other failures. | |
| 303 | + */ | |
| 304 | + return 1; | |
| 301 | 305 | } |
| 306 | + | |
| 302 | 307 | IWL_DEBUG_INFO(fwrt, |
| 303 | 308 | "SAR EWRD: chain %d profile index %d\n", |
| 304 | 309 | i, profs[i]); |
| @@ -8,7 +8,7 @@ · 7 unmodified lines | ||
| 8 | 8 | * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved. |
| 9 | 9 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
| 10 | 10 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
| 11 | − * Copyright(c) 2019 Intel Corporation | |
| 11 | + * Copyright(c) 2019 - 2020 Intel Corporation | |
| 12 | 12 | * |
| 13 | 13 | * This program is free software; you can redistribute it and/or modify |
| 14 | 14 | * it under the terms of version 2 of the GNU General Public License as |
| @@ -31,7 +31,7 @@ · 16 unmodified lines | ||
| 31 | 31 | * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. |
| 32 | 32 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
| 33 | 33 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
| 34 | − * Copyright(c) 2019 Intel Corporation | |
| 34 | + * Copyright(c) 2019 - 2020 Intel Corporation | |
| 35 | 35 | * All rights reserved. |
| 36 | 36 | * |
| 37 | 37 | * Redistribution and use in source and binary forms, with or without |
| @@ -99,7 +99,7 @@ enum iwl_mvm_dqa_txq { · 61 unmodified lines | ||
| 99 | 99 | IWL_MVM_DQA_MAX_MGMT_QUEUE = 8, |
| 100 | 100 | IWL_MVM_DQA_AP_PROBE_RESP_QUEUE = 9, |
| 101 | 101 | IWL_MVM_DQA_MIN_DATA_QUEUE = 10, |
| 102 | − IWL_MVM_DQA_MAX_DATA_QUEUE = 31, | |
| 102 | + IWL_MVM_DQA_MAX_DATA_QUEUE = 30, | |
| 103 | 103 | }; |
| 104 | 104 | |
| 105 | 105 | enum iwl_mvm_tx_fifo { |
| @@ -1467,7 +1467,7 @@ static void iwl_req_fw_callback(const struct firmware *ucode_raw, void *context) · 1466 unmodified lines | ||
| 1467 | 1467 | kmemdup(pieces->dbg_conf_tlv[i], |
| 1468 | 1468 | pieces->dbg_conf_tlv_len[i], |
| 1469 | 1469 | GFP_KERNEL); |
| 1470 | − if (!pieces->dbg_conf_tlv[i]) | |
| 1470 | + if (!drv->fw.dbg.conf_tlv[i]) | |
| 1471 | 1471 | goto out_free_fw; |
| 1472 | 1472 | } |
| 1473 | 1473 | } |
| @@ -532,8 +532,7 @@ static struct ieee80211_sband_iftype_data iwl_he_capa[] = { · 531 unmodified lines | ||
| 532 | 532 | IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US | |
| 533 | 533 | IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8, |
| 534 | 534 | .mac_cap_info[2] = |
| 535 | − IEEE80211_HE_MAC_CAP2_32BIT_BA_BITMAP | | |
| 536 | − IEEE80211_HE_MAC_CAP2_ACK_EN, | |
| 535 | + IEEE80211_HE_MAC_CAP2_32BIT_BA_BITMAP, | |
| 537 | 536 | .mac_cap_info[3] = |
| 538 | 537 | IEEE80211_HE_MAC_CAP3_OMI_CONTROL | |
| 539 | 538 | IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2, |
| @@ -617,8 +616,7 @@ static struct ieee80211_sband_iftype_data iwl_he_capa[] = { · 77 unmodified lines | ||
| 617 | 616 | IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US | |
| 618 | 617 | IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8, |
| 619 | 618 | .mac_cap_info[2] = |
| 620 | − IEEE80211_HE_MAC_CAP2_BSR | | |
| 621 | − IEEE80211_HE_MAC_CAP2_ACK_EN, | |
| 619 | + IEEE80211_HE_MAC_CAP2_BSR, | |
| 622 | 620 | .mac_cap_info[3] = |
| 623 | 621 | IEEE80211_HE_MAC_CAP3_OMI_CONTROL | |
| 624 | 622 | IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2, |
| @@ -727,6 +727,7 @@ int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) · 726 unmodified lines | ||
| 727 | 727 | struct iwl_dev_tx_power_cmd_v4 v4; |
| 728 | 728 | } cmd; |
| 729 | 729 | |
| 730 | + int ret; | |
| 730 | 731 | u16 len = 0; |
| 731 | 732 | |
| 732 | 733 | cmd.v5.v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS); |
| @@ -741,9 +742,14 @@ int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) · 8 unmodified lines | ||
| 741 | 742 | len = sizeof(cmd.v4.v3); |
| 742 | 743 | |
| 743 | 744 | |
| 744 | − if (iwl_sar_select_profile(&mvm->fwrt, cmd.v5.v3.per_chain_restriction, | |
| 745 | − prof_a, prof_b)) | |
| 746 | − return -ENOENT; | |
| 745 | + ret = iwl_sar_select_profile(&mvm->fwrt, | |
| 746 | + cmd.v5.v3.per_chain_restriction, | |
| 747 | + prof_a, prof_b); | |
| 748 | + | |
| 749 | + /* return on error or if the profile is disabled (positive number) */ | |
| 750 | + if (ret) | |
| 751 | + return ret; | |
| 752 | + | |
| 747 | 753 | IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); |
| 748 | 754 | return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd); |
| 749 | 755 | } |
| @@ -1034,16 +1040,7 @@ static int iwl_mvm_sar_init(struct iwl_mvm *mvm) · 284 unmodified lines | ||
| 1034 | 1040 | "EWRD SAR BIOS table invalid or unavailable. (%d)\n", |
| 1035 | 1041 | ret); |
| 1036 | 1042 | |
| 1037 | − ret = iwl_mvm_sar_select_profile(mvm, 1, 1); | |
| 1038 | − /* | |
| 1039 | − * If we don't have profile 0 from BIOS, just skip it. This | |
| 1040 | − * means that SAR Geo will not be enabled either, even if we | |
| 1041 | − * have other valid profiles. | |
| 1042 | − */ | |
| 1043 | − if (ret == -ENOENT) | |
| 1044 | − return 1; | |
| 1045 | − | |
| 1046 | − return ret; | |
| 1043 | + return iwl_mvm_sar_select_profile(mvm, 1, 1); | |
| 1047 | 1044 | } |
| 1048 | 1045 | |
| 1049 | 1046 | static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm) |
| @@ -1272,7 +1269,7 @@ int iwl_mvm_up(struct iwl_mvm *mvm) · 222 unmodified lines | ||
| 1272 | 1269 | ret = iwl_mvm_sar_init(mvm); |
| 1273 | 1270 | if (ret == 0) { |
| 1274 | 1271 | ret = iwl_mvm_sar_geo_init(mvm); |
| 1275 | − } else if (ret > 0 && !iwl_sar_get_wgds_table(&mvm->fwrt)) { | |
| 1272 | + } else if (ret == -ENOENT && !iwl_sar_get_wgds_table(&mvm->fwrt)) { | |
| 1276 | 1273 | /* |
| 1277 | 1274 | * If basic SAR is not available, we check for WGDS, |
| 1278 | 1275 | * which should *not* be available either. If it is |
| @@ -3665,7 +3665,7 @@ static void rs_fill_lq_cmd(struct iwl_mvm *mvm, · 3664 unmodified lines | ||
| 3665 | 3665 | cpu_to_le16(iwl_mvm_coex_agg_time_limit(mvm, sta)); |
| 3666 | 3666 | } |
| 3667 | 3667 | |
| 3668 | −static void *rs_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir) | |
| 3668 | +static void *rs_alloc(struct ieee80211_hw *hw) | |
| 3669 | 3669 | { |
| 3670 | 3670 | return hw->priv; |
| 3671 | 3671 | } |
| @@ -8,7 +8,7 @@ · 7 unmodified lines | ||
| 8 | 8 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
| 9 | 9 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
| 10 | 10 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
| 11 | − * Copyright(c) 2018 - 2019 Intel Corporation | |
| 11 | + * Copyright(c) 2018 - 2020 Intel Corporation | |
| 12 | 12 | * |
| 13 | 13 | * This program is free software; you can redistribute it and/or modify |
| 14 | 14 | * it under the terms of version 2 of the GNU General Public License as |
| @@ -31,7 +31,7 @@ · 16 unmodified lines | ||
| 31 | 31 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
| 32 | 32 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
| 33 | 33 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
| 34 | − * Copyright(c) 2018 - 2019 Intel Corporation | |
| 34 | + * Copyright(c) 2018 - 2020 Intel Corporation | |
| 35 | 35 | * All rights reserved. |
| 36 | 36 | * |
| 37 | 37 | * Redistribution and use in source and binary forms, with or without |
| @@ -566,6 +566,7 @@ void iwl_mvm_rx_rx_mpdu(struct iwl_mvm *mvm, struct napi_struct *napi, · 528 unmodified lines | ||
| 566 | 566 | |
| 567 | 567 | struct iwl_mvm_stat_data { |
| 568 | 568 | struct iwl_mvm *mvm; |
| 569 | + __le32 flags; | |
| 569 | 570 | __le32 mac_id; |
| 570 | 571 | u8 beacon_filter_average_energy; |
| 571 | 572 | void *general; |
| @@ -606,6 +607,13 @@ static void iwl_mvm_stat_iterator(void *_data, u8 *mac, · 34 unmodified lines | ||
| 606 | 607 | -general->beacon_average_energy[vif_id]; |
| 607 | 608 | } |
| 608 | 609 | |
| 610 | + /* make sure that beacon statistics don't go backwards with TCM | |
| 611 | + * request to clear statistics | |
| 612 | + */ | |
| 613 | + if (le32_to_cpu(data->flags) & IWL_STATISTICS_REPLY_FLG_CLEAR) | |
| 614 | + mvmvif->beacon_stats.accu_num_beacons += | |
| 615 | + mvmvif->beacon_stats.num_beacons; | |
| 616 | + | |
| 609 | 617 | if (mvmvif->id != id) |
| 610 | 618 | return; |
| 611 | 619 | |
| @@ -763,6 +771,7 @@ void iwl_mvm_handle_rx_statistics(struct iwl_mvm *mvm, · 151 unmodified lines | ||
| 763 | 771 | |
| 764 | 772 | flags = stats->flag; |
| 765 | 773 | } |
| 774 | + data.flags = flags; | |
| 766 | 775 | |
| 767 | 776 | iwl_mvm_rx_stats_check_trigger(mvm, pkt); |
| 768 | 777 | |
| @@ -722,6 +722,11 @@ static int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 sta_id, · 721 unmodified lines | ||
| 722 | 722 | |
| 723 | 723 | lockdep_assert_held(&mvm->mutex); |
| 724 | 724 | |
| 725 | + if (WARN(maxq >= mvm->trans->trans_cfg->base_params->num_of_queues, | |
| 726 | + "max queue %d >= num_of_queues (%d)", maxq, | |
| 727 | + mvm->trans->trans_cfg->base_params->num_of_queues)) | |
| 728 | + maxq = mvm->trans->trans_cfg->base_params->num_of_queues - 1; | |
| 729 | + | |
| 725 | 730 | /* This should not be hit with new TX path */ |
| 726 | 731 | if (WARN_ON(iwl_mvm_has_new_tx_api(mvm))) |
| 727 | 732 | return -ENOSPC; |
| @@ -1164,9 +1169,9 @@ static int iwl_mvm_inactivity_check(struct iwl_mvm *mvm, u8 alloc_for_sta) · 436 unmodified lines | ||
| 1164 | 1169 | inactive_tid_bitmap, |
| 1165 | 1170 | &unshare_queues, |
| 1166 | 1171 | &changetid_queues); |
| 1167 | − if (ret >= 0 && free_queue < 0) { | |
| 1172 | + if (ret && free_queue < 0) { | |
| 1168 | 1173 | queue_owner = sta; |
| 1169 | − free_queue = ret; | |
| 1174 | + free_queue = i; | |
| 1170 | 1175 | } |
| 1171 | 1176 | /* only unlock sta lock - we still need the queue info lock */ |
| 1172 | 1177 | spin_unlock_bh(&mvmsta->lock); |
| @@ -129,6 +129,18 @@ int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans, · 128 unmodified lines | ||
| 129 | 129 | int cmdq_size = max_t(u32, IWL_CMD_QUEUE_SIZE, |
| 130 | 130 | trans->cfg->min_txq_size); |
| 131 | 131 | |
| 132 | + switch (trans_pcie->rx_buf_size) { | |
| 133 | + case IWL_AMSDU_DEF: | |
| 134 | + return -EINVAL; | |
| 135 | + case IWL_AMSDU_2K: | |
| 136 | + break; | |
| 137 | + case IWL_AMSDU_4K: | |
| 138 | + case IWL_AMSDU_8K: | |
| 139 | + case IWL_AMSDU_12K: | |
| 140 | + control_flags |= IWL_PRPH_SCRATCH_RB_SIZE_4K; | |
| 141 | + break; | |
| 142 | + } | |
| 143 | + | |
| 132 | 144 | /* Allocate prph scratch */ |
| 133 | 145 | prph_scratch = dma_alloc_coherent(trans->dev, sizeof(*prph_scratch), |
| 134 | 146 | &trans_pcie->prph_scratch_dma_addr, |
| @@ -143,10 +155,8 @@ int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans, · 8 unmodified lines | ||
| 143 | 155 | cpu_to_le16((u16)iwl_read32(trans, CSR_HW_REV)); |
| 144 | 156 | prph_sc_ctrl->version.size = cpu_to_le16(sizeof(*prph_scratch) / 4); |
| 145 | 157 | |
| 146 | − control_flags = IWL_PRPH_SCRATCH_RB_SIZE_4K | | |
| 147 | − IWL_PRPH_SCRATCH_MTR_MODE | | |
| 148 | − (IWL_PRPH_MTR_FORMAT_256B & | |
| 149 | − IWL_PRPH_SCRATCH_MTR_FORMAT); | |
| 158 | + control_flags |= IWL_PRPH_SCRATCH_MTR_MODE; | |
| 159 | + control_flags |= IWL_PRPH_MTR_FORMAT_256B & IWL_PRPH_SCRATCH_MTR_FORMAT; | |
| 150 | 160 | |
| 151 | 161 | /* initialize RX default queue */ |
| 152 | 162 | prph_sc_ctrl->rbd_cfg.free_rbd_addr = |
| @@ -1418,6 +1418,9 @@ void iwl_trans_pcie_dyn_txq_free(struct iwl_trans *trans, int queue) · 1417 unmodified lines | ||
| 1418 | 1418 | |
| 1419 | 1419 | iwl_pcie_gen2_txq_unmap(trans, queue); |
| 1420 | 1420 | |
| 1421 | + iwl_pcie_gen2_txq_free_memory(trans, trans_pcie->txq[queue]); | |
| 1422 | + trans_pcie->txq[queue] = NULL; | |
| 1423 | + | |
| 1421 | 1424 | IWL_DEBUG_TX_QUEUES(trans, "Deactivate queue %d\n", queue); |
| 1422 | 1425 | } |
| 1423 | 1426 | |
| @@ -4068,7 +4068,7 @@ static void hwsim_virtio_rx_work(struct work_struct *work) · 4067 unmodified lines | ||
| 4068 | 4068 | } |
| 4069 | 4069 | vq = hwsim_vqs[HWSIM_VQ_RX]; |
| 4070 | 4070 | sg_init_one(sg, skb->head, skb_end_offset(skb)); |
| 4071 | − err = virtqueue_add_inbuf(vq, sg, 1, skb, GFP_KERNEL); | |
| 4071 | + err = virtqueue_add_inbuf(vq, sg, 1, skb, GFP_ATOMIC); | |
| 4072 | 4072 | if (WARN(err, "virtqueue_add_inbuf returned %d\n", err)) |
| 4073 | 4073 | nlmsg_free(skb); |
| 4074 | 4074 | else |
| @@ -261,7 +261,7 @@ static void rtl_rate_update(void *ppriv, · 260 unmodified lines | ||
| 261 | 261 | { |
| 262 | 262 | } |
| 263 | 263 | |
| 264 | −static void *rtl_rate_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir) | |
| 264 | +static void *rtl_rate_alloc(struct ieee80211_hw *hw) | |
| 265 | 265 | { |
| 266 | 266 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 267 | 267 | return rtlpriv; |
| @@ -1110,7 +1110,7 @@ static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, unsigned nsid, · 1109 unmodified lines | ||
| 1110 | 1110 | * Don't treat an error as fatal, as we potentially already |
| 1111 | 1111 | * have a NGUID or EUI-64. |
| 1112 | 1112 | */ |
| 1113 | − if (status > 0) | |
| 1113 | + if (status > 0 && !(status & NVME_SC_DNR)) | |
| 1114 | 1114 | status = 0; |
| 1115 | 1115 | goto free_data; |
| 1116 | 1116 | } |
| @@ -3642,6 +3642,8 @@ static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid) · 2525 unmodified lines | ||
| 3642 | 3642 | |
| 3643 | 3643 | return; |
| 3644 | 3644 | out_put_disk: |
| 3645 | + /* prevent double queue cleanup */ | |
| 3646 | + ns->disk->queue = NULL; | |
| 3645 | 3647 | put_disk(ns->disk); |
| 3646 | 3648 | out_unlink_ns: |
| 3647 | 3649 | mutex_lock(&ctrl->subsys->lock); |
| @@ -973,9 +973,13 @@ static inline void nvme_handle_cqe(struct nvme_queue *nvmeq, u16 idx) · 972 unmodified lines | ||
| 973 | 973 | |
| 974 | 974 | static inline void nvme_update_cq_head(struct nvme_queue *nvmeq) |
| 975 | 975 | { |
| 976 | − if (++nvmeq->cq_head == nvmeq->q_depth) { | |
| 976 | + u16 tmp = nvmeq->cq_head + 1; | |
| 977 | + | |
| 978 | + if (tmp == nvmeq->q_depth) { | |
| 977 | 979 | nvmeq->cq_head = 0; |
| 978 | 980 | nvmeq->cq_phase ^= 1; |
| 981 | + } else { | |
| 982 | + nvmeq->cq_head = tmp; | |
| 979 | 983 | } |
| 980 | 984 | } |
| 981 | 985 | |
| @@ -5567,3 +5567,10 @@ static void pci_fixup_no_d0_pme(struct pci_dev *dev) · 5566 unmodified lines | ||
| 5567 | 5567 | dev->pme_support &= ~(PCI_PM_CAP_PME_D0 >> PCI_PM_CAP_PME_SHIFT); |
| 5568 | 5568 | } |
| 5569 | 5569 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ASMEDIA, 0x2142, pci_fixup_no_d0_pme); |
| 5570 | + | |
| 5571 | +static void apex_pci_fixup_class(struct pci_dev *pdev) | |
| 5572 | +{ | |
| 5573 | + pdev->class = (PCI_CLASS_SYSTEM_OTHER << 8) | pdev->class; | |
| 5574 | +} | |
| 5575 | +DECLARE_PCI_FIXUP_CLASS_HEADER(0x1ac1, 0x089a, | |
| 5576 | + PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class); | |
| @@ -815,6 +815,13 @@ static const struct of_device_id qusb2_phy_of_match_table[] = { · 814 unmodified lines | ||
| 815 | 815 | }, { |
| 816 | 816 | .compatible = "qcom,msm8998-qusb2-phy", |
| 817 | 817 | .data = &msm8998_phy_cfg, |
| 818 | + }, { | |
| 819 | + /* | |
| 820 | + * Deprecated. Only here to support legacy device | |
| 821 | + * trees that didn't include "qcom,qusb2-v2-phy" | |
| 822 | + */ | |
| 823 | + .compatible = "qcom,sdm845-qusb2-phy", | |
| 824 | + .data = &qusb2_v2_phy_cfg, | |
| 818 | 825 | }, { |
| 819 | 826 | .compatible = "qcom,qusb2-v2-phy", |
| 820 | 827 | .data = &qusb2_v2_phy_cfg, |
| @@ -160,18 +160,11 @@ static int qcom_snps_hsphy_power_on(struct phy *phy) · 159 unmodified lines | ||
| 160 | 160 | ret = regulator_bulk_enable(VREG_NUM, priv->vregs); |
| 161 | 161 | if (ret) |
| 162 | 162 | return ret; |
| 163 | − ret = clk_bulk_prepare_enable(priv->num_clks, priv->clks); | |
| 164 | − if (ret) | |
| 165 | − goto err_disable_regulator; | |
| 163 | + | |
| 166 | 164 | qcom_snps_hsphy_disable_hv_interrupts(priv); |
| 167 | 165 | qcom_snps_hsphy_exit_retention(priv); |
| 168 | 166 | |
| 169 | 167 | return 0; |
| 170 | − | |
| 171 | −err_disable_regulator: | |
| 172 | − regulator_bulk_disable(VREG_NUM, priv->vregs); | |
| 173 | − | |
| 174 | − return ret; | |
| 175 | 168 | } |
| 176 | 169 | |
| 177 | 170 | static int qcom_snps_hsphy_power_off(struct phy *phy) |
| @@ -180,7 +173,6 @@ static int qcom_snps_hsphy_power_off(struct phy *phy) · 2 unmodified lines | ||
| 180 | 173 | |
| 181 | 174 | qcom_snps_hsphy_enter_retention(priv); |
| 182 | 175 | qcom_snps_hsphy_enable_hv_interrupts(priv); |
| 183 | − clk_bulk_disable_unprepare(priv->num_clks, priv->clks); | |
| 184 | 176 | regulator_bulk_disable(VREG_NUM, priv->vregs); |
| 185 | 177 | |
| 186 | 178 | return 0; |
| @@ -266,21 +258,39 @@ static int qcom_snps_hsphy_init(struct phy *phy) · 79 unmodified lines | ||
| 266 | 258 | struct hsphy_priv *priv = phy_get_drvdata(phy); |
| 267 | 259 | int ret; |
| 268 | 260 | |
| 269 | − ret = qcom_snps_hsphy_reset(priv); | |
| 261 | + ret = clk_bulk_prepare_enable(priv->num_clks, priv->clks); | |
| 270 | 262 | if (ret) |
| 271 | 263 | return ret; |
| 272 | 264 | |
| 265 | + ret = qcom_snps_hsphy_reset(priv); | |
| 266 | + if (ret) | |
| 267 | + goto disable_clocks; | |
| 268 | + | |
| 273 | 269 | qcom_snps_hsphy_init_sequence(priv); |
| 274 | 270 | |
| 275 | 271 | ret = qcom_snps_hsphy_por_reset(priv); |
| 276 | 272 | if (ret) |
| 277 | − return ret; | |
| 273 | + goto disable_clocks; | |
| 274 | + | |
| 275 | + return 0; | |
| 276 | + | |
| 277 | +disable_clocks: | |
| 278 | + clk_bulk_disable_unprepare(priv->num_clks, priv->clks); | |
| 279 | + return ret; | |
| 280 | +} | |
| 281 | + | |
| 282 | +static int qcom_snps_hsphy_exit(struct phy *phy) | |
| 283 | +{ | |
| 284 | + struct hsphy_priv *priv = phy_get_drvdata(phy); | |
| 285 | + | |
| 286 | + clk_bulk_disable_unprepare(priv->num_clks, priv->clks); | |
| 278 | 287 | |
| 279 | 288 | return 0; |
| 280 | 289 | } |
| 281 | 290 | |
| 282 | 291 | static const struct phy_ops qcom_snps_hsphy_ops = { |
| 283 | 292 | .init = qcom_snps_hsphy_init, |
| 293 | + .exit = qcom_snps_hsphy_exit, | |
| 284 | 294 | .power_on = qcom_snps_hsphy_power_on, |
| 285 | 295 | .power_off = qcom_snps_hsphy_power_off, |
| 286 | 296 | .set_mode = qcom_snps_hsphy_set_mode, |
| @@ -1,7 +1,8 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | 2 | config PHY_TEGRA_XUSB |
| 3 | 3 | tristate "NVIDIA Tegra XUSB pad controller driver" |
| 4 | − depends on ARCH_TEGRA | |
| 4 | + depends on ARCH_TEGRA && USB_SUPPORT | |
| 5 | + select USB_COMMON | |
| 5 | 6 | select USB_CONN_GPIO |
| 6 | 7 | select USB_PHY |
| 7 | 8 | help |
| @@ -52,28 +52,15 @@ static int cros_ec_sensorhub_register(struct device *dev, · 51 unmodified lines | ||
| 52 | 52 | int sensor_type[MOTIONSENSE_TYPE_MAX] = { 0 }; |
| 53 | 53 | struct cros_ec_command *msg = sensorhub->msg; |
| 54 | 54 | struct cros_ec_dev *ec = sensorhub->ec; |
| 55 | − int ret, i, sensor_num; | |
| 55 | + int ret, i; | |
| 56 | 56 | char *name; |
| 57 | 57 | |
| 58 | − sensor_num = cros_ec_get_sensor_count(ec); | |
| 59 | − if (sensor_num < 0) { | |
| 60 | − dev_err(dev, | |
| 61 | − "Unable to retrieve sensor information (err:%d)\n", | |
| 62 | − sensor_num); | |
| 63 | − return sensor_num; | |
| 64 | − } | |
| 65 | − | |
| 66 | − sensorhub->sensor_num = sensor_num; | |
| 67 | − if (sensor_num == 0) { | |
| 68 | − dev_err(dev, "Zero sensors reported.\n"); | |
| 69 | − return -EINVAL; | |
| 70 | − } | |
| 71 | 58 | |
| 72 | 59 | msg->version = 1; |
| 73 | 60 | msg->insize = sizeof(struct ec_response_motion_sense); |
| 74 | 61 | msg->outsize = sizeof(struct ec_params_motion_sense); |
| 75 | 62 | |
| 76 | − for (i = 0; i < sensor_num; i++) { | |
| 63 | + for (i = 0; i < sensorhub->sensor_num; i++) { | |
| 77 | 64 | sensorhub->params->cmd = MOTIONSENSE_CMD_INFO; |
| 78 | 65 | sensorhub->params->info.sensor_num = i; |
| 79 | 66 | |
| @@ -140,8 +127,7 @@ static int cros_ec_sensorhub_probe(struct platform_device *pdev) · 60 unmodified lines | ||
| 140 | 127 | struct cros_ec_dev *ec = dev_get_drvdata(dev->parent); |
| 141 | 128 | struct cros_ec_sensorhub *data; |
| 142 | 129 | struct cros_ec_command *msg; |
| 143 | − int ret; | |
| 144 | − int i; | |
| 130 | + int ret, i, sensor_num; | |
| 145 | 131 | |
| 146 | 132 | msg = devm_kzalloc(dev, sizeof(struct cros_ec_command) + |
| 147 | 133 | max((u16)sizeof(struct ec_params_motion_sense), |
| @@ -166,10 +152,52 @@ static int cros_ec_sensorhub_probe(struct platform_device *pdev) · 18 unmodified lines | ||
| 166 | 152 | dev_set_drvdata(dev, data); |
| 167 | 153 | |
| 168 | 154 | /* Check whether this EC is a sensor hub. */ |
| 169 | − if (cros_ec_check_features(data->ec, EC_FEATURE_MOTION_SENSE)) { | |
| 155 | + if (cros_ec_check_features(ec, EC_FEATURE_MOTION_SENSE)) { | |
| 156 | + sensor_num = cros_ec_get_sensor_count(ec); | |
| 157 | + if (sensor_num < 0) { | |
| 158 | + dev_err(dev, | |
| 159 | + "Unable to retrieve sensor information (err:%d)\n", | |
| 160 | + sensor_num); | |
| 161 | + return sensor_num; | |
| 162 | + } | |
| 163 | + if (sensor_num == 0) { | |
| 164 | + dev_err(dev, "Zero sensors reported.\n"); | |
| 165 | + return -EINVAL; | |
| 166 | + } | |
| 167 | + data->sensor_num = sensor_num; | |
| 168 | + | |
| 169 | + /* | |
| 170 | + * Prepare the ring handler before enumering the | |
| 171 | + * sensors. | |
| 172 | + */ | |
| 173 | + if (cros_ec_check_features(ec, EC_FEATURE_MOTION_SENSE_FIFO)) { | |
| 174 | + ret = cros_ec_sensorhub_ring_allocate(data); | |
| 175 | + if (ret) | |
| 176 | + return ret; | |
| 177 | + } | |
| 178 | + | |
| 179 | + /* Enumerate the sensors.*/ | |
| 170 | 180 | ret = cros_ec_sensorhub_register(dev, data); |
| 171 | 181 | if (ret) |
| 172 | 182 | return ret; |
| 183 | + | |
| 184 | + /* | |
| 185 | + * When the EC does not have a FIFO, the sensors will query | |
| 186 | + * their data themselves via sysfs or a software trigger. | |
| 187 | + */ | |
| 188 | + if (cros_ec_check_features(ec, EC_FEATURE_MOTION_SENSE_FIFO)) { | |
| 189 | + ret = cros_ec_sensorhub_ring_add(data); | |
| 190 | + if (ret) | |
| 191 | + return ret; | |
| 192 | + /* | |
| 193 | + * The msg and its data is not under the control of the | |
| 194 | + * ring handler. | |
| 195 | + */ | |
| 196 | + return devm_add_action_or_reset(dev, | |
| 197 | + cros_ec_sensorhub_ring_remove, | |
| 198 | + data); | |
| 199 | + } | |
| 200 | + | |
| 173 | 201 | } else { |
| 174 | 202 | /* |
| 175 | 203 | * If the device has sensors but does not claim to |
| @@ -184,22 +212,6 @@ static int cros_ec_sensorhub_probe(struct platform_device *pdev) · 8 unmodified lines | ||
| 184 | 212 | } |
| 185 | 213 | } |
| 186 | 214 | |
| 187 | − /* | |
| 188 | − * If the EC does not have a FIFO, the sensors will query their data | |
| 189 | − * themselves via sysfs or a software trigger. | |
| 190 | − */ | |
| 191 | − if (cros_ec_check_features(ec, EC_FEATURE_MOTION_SENSE_FIFO)) { | |
| 192 | − ret = cros_ec_sensorhub_ring_add(data); | |
| 193 | − if (ret) | |
| 194 | − return ret; | |
| 195 | − /* | |
| 196 | − * The msg and its data is not under the control of the ring | |
| 197 | − * handler. | |
| 198 | − */ | |
| 199 | − return devm_add_action_or_reset(dev, | |
| 200 | − cros_ec_sensorhub_ring_remove, | |
| 201 | − data); | |
| 202 | − } | |
| 203 | 215 | |
| 204 | 216 | return 0; |
| 205 | 217 | } |
| @@ -957,17 +957,15 @@ static int cros_ec_sensorhub_event(struct notifier_block *nb, · 956 unmodified lines | ||
| 957 | 957 | } |
| 958 | 958 | |
| 959 | 959 | /** |
| 960 | − * cros_ec_sensorhub_ring_add() - Add the FIFO functionality if the EC | |
| 961 | − * supports it. | |
| 960 | + * cros_ec_sensorhub_ring_allocate() - Prepare the FIFO functionality if the EC | |
| 961 | + * supports it. | |
| 962 | 962 | * |
| 963 | 963 | * @sensorhub : Sensor Hub object. |
| 964 | 964 | * |
| 965 | 965 | * Return: 0 on success. |
| 966 | 966 | */ |
| 967 | −int cros_ec_sensorhub_ring_add(struct cros_ec_sensorhub *sensorhub) | |
| 967 | +int cros_ec_sensorhub_ring_allocate(struct cros_ec_sensorhub *sensorhub) | |
| 968 | 968 | { |
| 969 | − struct cros_ec_dev *ec = sensorhub->ec; | |
| 970 | − int ret; | |
| 971 | 969 | int fifo_info_length = |
| 972 | 970 | sizeof(struct ec_response_motion_sense_fifo_info) + |
| 973 | 971 | sizeof(u16) * sensorhub->sensor_num; |
| @@ -978,6 +976,49 @@ int cros_ec_sensorhub_ring_add(struct cros_ec_sensorhub *sensorhub) · 4 unmodified lines | ||
| 978 | 976 | if (!sensorhub->fifo_info) |
| 979 | 977 | return -ENOMEM; |
| 980 | 978 | |
| 979 | + /* | |
| 980 | + * Allocate the callback area based on the number of sensors. | |
| 981 | + * Add one for the sensor ring. | |
| 982 | + */ | |
| 983 | + sensorhub->push_data = devm_kcalloc(sensorhub->dev, | |
| 984 | + sensorhub->sensor_num, | |
| 985 | + sizeof(*sensorhub->push_data), | |
| 986 | + GFP_KERNEL); | |
| 987 | + if (!sensorhub->push_data) | |
| 988 | + return -ENOMEM; | |
| 989 | + | |
| 990 | + sensorhub->tight_timestamps = cros_ec_check_features( | |
| 991 | + sensorhub->ec, | |
| 992 | + EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS); | |
| 993 | + | |
| 994 | + if (sensorhub->tight_timestamps) { | |
| 995 | + sensorhub->batch_state = devm_kcalloc(sensorhub->dev, | |
| 996 | + sensorhub->sensor_num, | |
| 997 | + sizeof(*sensorhub->batch_state), | |
| 998 | + GFP_KERNEL); | |
| 999 | + if (!sensorhub->batch_state) | |
| 1000 | + return -ENOMEM; | |
| 1001 | + } | |
| 1002 | + | |
| 1003 | + return 0; | |
| 1004 | +} | |
| 1005 | + | |
| 1006 | +/** | |
| 1007 | + * cros_ec_sensorhub_ring_add() - Add the FIFO functionality if the EC | |
| 1008 | + * supports it. | |
| 1009 | + * | |
| 1010 | + * @sensorhub : Sensor Hub object. | |
| 1011 | + * | |
| 1012 | + * Return: 0 on success. | |
| 1013 | + */ | |
| 1014 | +int cros_ec_sensorhub_ring_add(struct cros_ec_sensorhub *sensorhub) | |
| 1015 | +{ | |
| 1016 | + struct cros_ec_dev *ec = sensorhub->ec; | |
| 1017 | + int ret; | |
| 1018 | + int fifo_info_length = | |
| 1019 | + sizeof(struct ec_response_motion_sense_fifo_info) + | |
| 1020 | + sizeof(u16) * sensorhub->sensor_num; | |
| 1021 | + | |
| 981 | 1022 | /* Retrieve FIFO information */ |
| 982 | 1023 | sensorhub->msg->version = 2; |
| 983 | 1024 | sensorhub->params->cmd = MOTIONSENSE_CMD_FIFO_INFO; |
| @@ -998,31 +1039,9 @@ int cros_ec_sensorhub_ring_add(struct cros_ec_sensorhub *sensorhub) · 14 unmodified lines | ||
| 998 | 1039 | if (!sensorhub->ring) |
| 999 | 1040 | return -ENOMEM; |
| 1000 | 1041 | |
| 1001 | − /* | |
| 1002 | − * Allocate the callback area based on the number of sensors. | |
| 1003 | − */ | |
| 1004 | − sensorhub->push_data = devm_kcalloc( | |
| 1005 | − sensorhub->dev, sensorhub->sensor_num, | |
| 1006 | − sizeof(*sensorhub->push_data), | |
| 1007 | − GFP_KERNEL); | |
| 1008 | − if (!sensorhub->push_data) | |
| 1009 | − return -ENOMEM; | |
| 1010 | − | |
| 1011 | 1042 | sensorhub->fifo_timestamp[CROS_EC_SENSOR_LAST_TS] = |
| 1012 | 1043 | cros_ec_get_time_ns(); |
| 1013 | 1044 | |
| 1014 | − sensorhub->tight_timestamps = cros_ec_check_features( | |
| 1015 | − ec, EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS); | |
| 1016 | − | |
| 1017 | − if (sensorhub->tight_timestamps) { | |
| 1018 | − sensorhub->batch_state = devm_kcalloc(sensorhub->dev, | |
| 1019 | − sensorhub->sensor_num, | |
| 1020 | − sizeof(*sensorhub->batch_state), | |
| 1021 | − GFP_KERNEL); | |
| 1022 | − if (!sensorhub->batch_state) | |
| 1023 | − return -ENOMEM; | |
| 1024 | − } | |
| 1025 | − | |
| 1026 | 1045 | /* Register the notifier that will act as a top half interrupt. */ |
| 1027 | 1046 | sensorhub->notifier.notifier_call = cros_ec_sensorhub_event; |
| 1028 | 1047 | ret = blocking_notifier_chain_register(&ec->ec_dev->event_notifier, |
| @@ -515,9 +515,33 @@ static struct asus_wmi_driver asus_nb_wmi_driver = { · 514 unmodified lines | ||
| 515 | 515 | .detect_quirks = asus_nb_wmi_quirks, |
| 516 | 516 | }; |
| 517 | 517 | |
| 518 | +static const struct dmi_system_id asus_nb_wmi_blacklist[] __initconst = { | |
| 519 | + { | |
| 520 | + /* | |
| 521 | + * asus-nb-wm adds no functionality. The T100TA has a detachable | |
| 522 | + * USB kbd, so no hotkeys and it has no WMI rfkill; and loading | |
| 523 | + * asus-nb-wm causes the camera LED to turn and _stay_ on. | |
| 524 | + */ | |
| 525 | + .matches = { | |
| 526 | + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), | |
| 527 | + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T100TA"), | |
| 528 | + }, | |
| 529 | + }, | |
| 530 | + { | |
| 531 | + /* The Asus T200TA has the same issue as the T100TA */ | |
| 532 | + .matches = { | |
| 533 | + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), | |
| 534 | + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T200TA"), | |
| 535 | + }, | |
| 536 | + }, | |
| 537 | + {} /* Terminating entry */ | |
| 538 | +}; | |
| 518 | 539 | |
| 519 | 540 | static int __init asus_nb_wmi_init(void) |
| 520 | 541 | { |
| 542 | + if (dmi_check_system(asus_nb_wmi_blacklist)) | |
| 543 | + return -ENODEV; | |
| 544 | + | |
| 521 | 545 | return asus_wmi_register_driver(&asus_nb_wmi_driver); |
| 522 | 546 | } |
| 523 | 547 | |
| @@ -53,7 +53,7 @@ static int uncore_max_entries __read_mostly; · 52 unmodified lines | ||
| 53 | 53 | /* Storage for uncore data for all instances */ |
| 54 | 54 | static struct uncore_data *uncore_instances; |
| 55 | 55 | /* Root of the all uncore sysfs kobjs */ |
| 56 | −struct kobject *uncore_root_kobj; | |
| 56 | +static struct kobject *uncore_root_kobj; | |
| 57 | 57 | /* Stores the CPU mask of the target CPUs to use during uncore read/write */ |
| 58 | 58 | static cpumask_t uncore_cpu_mask; |
| 59 | 59 | /* CPU online callback register instance */ |
| @@ -255,7 +255,7 @@ static const struct pmc_bit_map *ext_cnp_pfear_map[] = { · 254 unmodified lines | ||
| 255 | 255 | }; |
| 256 | 256 | |
| 257 | 257 | static const struct pmc_bit_map icl_pfear_map[] = { |
| 258 | − /* Ice Lake generation onwards only */ | |
| 258 | + /* Ice Lake and Jasper Lake generation onwards only */ | |
| 259 | 259 | {"RES_65", BIT(0)}, |
| 260 | 260 | {"RES_66", BIT(1)}, |
| 261 | 261 | {"RES_67", BIT(2)}, |
| @@ -274,7 +274,7 @@ static const struct pmc_bit_map *ext_icl_pfear_map[] = { · 12 unmodified lines | ||
| 274 | 274 | }; |
| 275 | 275 | |
| 276 | 276 | static const struct pmc_bit_map tgl_pfear_map[] = { |
| 277 | − /* Tiger Lake, Elkhart Lake and Jasper Lake generation onwards only */ | |
| 277 | + /* Tiger Lake and Elkhart Lake generation onwards only */ | |
| 278 | 278 | {"PSF9", BIT(0)}, |
| 279 | 279 | {"RES_66", BIT(1)}, |
| 280 | 280 | {"RES_67", BIT(2)}, |
| @@ -692,7 +692,6 @@ static void pmc_core_lpm_display(struct pmc_dev *pmcdev, struct device *dev, · 411 unmodified lines | ||
| 692 | 692 | kfree(lpm_regs); |
| 693 | 693 | } |
| 694 | 694 | |
| 695 | −#if IS_ENABLED(CONFIG_DEBUG_FS) | |
| 696 | 695 | static bool slps0_dbg_latch; |
| 697 | 696 | |
| 698 | 697 | static inline u8 pmc_core_reg_read_byte(struct pmc_dev *pmcdev, int offset) |
| @@ -1133,15 +1132,6 @@ static void pmc_core_dbgfs_register(struct pmc_dev *pmcdev) · 434 unmodified lines | ||
| 1133 | 1132 | &pmc_core_substate_l_sts_regs_fops); |
| 1134 | 1133 | } |
| 1135 | 1134 | } |
| 1136 | −#else | |
| 1137 | −static inline void pmc_core_dbgfs_register(struct pmc_dev *pmcdev) | |
| 1138 | −{ | |
| 1139 | −} | |
| 1140 | − | |
| 1141 | −static inline void pmc_core_dbgfs_unregister(struct pmc_dev *pmcdev) | |
| 1142 | −{ | |
| 1143 | −} | |
| 1144 | −#endif /* CONFIG_DEBUG_FS */ | |
| 1145 | 1135 | |
| 1146 | 1136 | static const struct x86_cpu_id intel_pmc_core_ids[] = { |
| 1147 | 1137 | X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &spt_reg_map), |
| @@ -1156,7 +1146,7 @@ static const struct x86_cpu_id intel_pmc_core_ids[] = { · 8 unmodified lines | ||
| 1156 | 1146 | X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &tgl_reg_map), |
| 1157 | 1147 | X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &tgl_reg_map), |
| 1158 | 1148 | X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &tgl_reg_map), |
| 1159 | − X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &tgl_reg_map), | |
| 1149 | + X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &icl_reg_map), | |
| 1160 | 1150 | {} |
| 1161 | 1151 | }; |
| 1162 | 1152 | |
| @@ -1260,13 +1250,11 @@ static int pmc_core_remove(struct platform_device *pdev) · 97 unmodified lines | ||
| 1260 | 1250 | return 0; |
| 1261 | 1251 | } |
| 1262 | 1252 | |
| 1263 | −#ifdef CONFIG_PM_SLEEP | |
| 1264 | − | |
| 1265 | 1253 | static bool warn_on_s0ix_failures; |
| 1266 | 1254 | module_param(warn_on_s0ix_failures, bool, 0644); |
| 1267 | 1255 | MODULE_PARM_DESC(warn_on_s0ix_failures, "Check and warn for S0ix failures"); |
| 1268 | 1256 | |
| 1269 | −static int pmc_core_suspend(struct device *dev) | |
| 1257 | +static __maybe_unused int pmc_core_suspend(struct device *dev) | |
| 1270 | 1258 | { |
| 1271 | 1259 | struct pmc_dev *pmcdev = dev_get_drvdata(dev); |
| 1272 | 1260 | |
| @@ -1318,7 +1306,7 @@ static inline bool pmc_core_is_s0ix_failed(struct pmc_dev *pmcdev) · 45 unmodified lines | ||
| 1318 | 1306 | return false; |
| 1319 | 1307 | } |
| 1320 | 1308 | |
| 1321 | −static int pmc_core_resume(struct device *dev) | |
| 1309 | +static __maybe_unused int pmc_core_resume(struct device *dev) | |
| 1322 | 1310 | { |
| 1323 | 1311 | struct pmc_dev *pmcdev = dev_get_drvdata(dev); |
| 1324 | 1312 | const struct pmc_bit_map **maps = pmcdev->map->lpm_sts; |
| @@ -1348,8 +1336,6 @@ static int pmc_core_resume(struct device *dev) · 23 unmodified lines | ||
| 1348 | 1336 | return 0; |
| 1349 | 1337 | } |
| 1350 | 1338 | |
| 1351 | −#endif | |
| 1352 | − | |
| 1353 | 1339 | static const struct dev_pm_ops pmc_core_pm_ops = { |
| 1354 | 1340 | SET_LATE_SYSTEM_SLEEP_PM_OPS(pmc_core_suspend, pmc_core_resume) |
| 1355 | 1341 | }; |
| @@ -282,9 +282,7 @@ struct pmc_dev { · 281 unmodified lines | ||
| 282 | 282 | u32 base_addr; |
| 283 | 283 | void __iomem *regbase; |
| 284 | 284 | const struct pmc_reg_map *map; |
| 285 | −#if IS_ENABLED(CONFIG_DEBUG_FS) | |
| 286 | 285 | struct dentry *dbgfs_dir; |
| 287 | −#endif /* CONFIG_DEBUG_FS */ | |
| 288 | 286 | int pmc_xram_read_bit; |
| 289 | 287 | struct mutex lock; /* generic mutex lock for PMC Core */ |
| 290 | 288 | |
| @@ -522,8 +522,8 @@ static int mshw0011_probe(struct i2c_client *client) · 521 unmodified lines | ||
| 522 | 522 | strlcpy(board_info.type, "MSHW0011-bat0", I2C_NAME_SIZE); |
| 523 | 523 | |
| 524 | 524 | bat0 = i2c_acpi_new_device(dev, 1, &board_info); |
| 525 | − if (!bat0) | |
| 526 | − return -ENOMEM; | |
| 525 | + if (IS_ERR(bat0)) | |
| 526 | + return PTR_ERR(bat0); | |
| 527 | 527 | |
| 528 | 528 | data->bat0 = bat0; |
| 529 | 529 | i2c_set_clientdata(bat0, data); |
| @@ -9548,7 +9548,7 @@ static ssize_t tpacpi_battery_store(int what, · 9547 unmodified lines | ||
| 9548 | 9548 | if (!battery_info.batteries[battery].start_support) |
| 9549 | 9549 | return -ENODEV; |
| 9550 | 9550 | /* valid values are [0, 99] */ |
| 9551 | − if (value < 0 || value > 99) | |
| 9551 | + if (value > 99) | |
| 9552 | 9552 | return -EINVAL; |
| 9553 | 9553 | if (value > battery_info.batteries[battery].charge_stop) |
| 9554 | 9554 | return -EINVAL; |
| @@ -23,7 +23,7 @@ struct xiaomi_wmi { · 22 unmodified lines | ||
| 23 | 23 | unsigned int key_code; |
| 24 | 24 | }; |
| 25 | 25 | |
| 26 | −int xiaomi_wmi_probe(struct wmi_device *wdev, const void *context) | |
| 26 | +static int xiaomi_wmi_probe(struct wmi_device *wdev, const void *context) | |
| 27 | 27 | { |
| 28 | 28 | struct xiaomi_wmi *data; |
| 29 | 29 | |
| @@ -48,7 +48,7 @@ int xiaomi_wmi_probe(struct wmi_device *wdev, const void *context) · 18 unmodified lines | ||
| 48 | 48 | return input_register_device(data->input_dev); |
| 49 | 49 | } |
| 50 | 50 | |
| 51 | −void xiaomi_wmi_notify(struct wmi_device *wdev, union acpi_object *dummy) | |
| 51 | +static void xiaomi_wmi_notify(struct wmi_device *wdev, union acpi_object *dummy) | |
| 52 | 52 | { |
| 53 | 53 | struct xiaomi_wmi *data; |
| 54 | 54 | |
| @@ -400,8 +400,8 @@ static int ines_hwtstamp(struct mii_timestamper *mii_ts, struct ifreq *ifr) · 399 unmodified lines | ||
| 400 | 400 | ines_write32(port, ts_stat_rx, ts_stat_rx); |
| 401 | 401 | ines_write32(port, ts_stat_tx, ts_stat_tx); |
| 402 | 402 | |
| 403 | − port->rxts_enabled = ts_stat_rx == TS_ENABLE ? true : false; | |
| 404 | − port->txts_enabled = ts_stat_tx == TS_ENABLE ? true : false; | |
| 403 | + port->rxts_enabled = ts_stat_rx == TS_ENABLE; | |
| 404 | + port->txts_enabled = ts_stat_tx == TS_ENABLE; | |
| 405 | 405 | |
| 406 | 406 | spin_unlock_irqrestore(&port->lock, flags); |
| 407 | 407 | |
| @@ -5754,10 +5754,6 @@ static DECLARE_DELAYED_WORK(regulator_init_complete_work, · 5753 unmodified lines | ||
| 5754 | 5754 | |
| 5755 | 5755 | static int __init regulator_init_complete(void) |
| 5756 | 5756 | { |
| 5757 | − int delay = driver_deferred_probe_timeout; | |
| 5758 | − | |
| 5759 | − if (delay < 0) | |
| 5760 | − delay = 0; | |
| 5761 | 5757 | /* |
| 5762 | 5758 | * Since DT doesn't provide an idiomatic mechanism for |
| 5763 | 5759 | * enabling full constraints and since it's much more natural |
| @@ -5768,17 +5764,18 @@ static int __init regulator_init_complete(void) · 4 unmodified lines | ||
| 5768 | 5764 | has_full_constraints = true; |
| 5769 | 5765 | |
| 5770 | 5766 | /* |
| 5771 | − * If driver_deferred_probe_timeout is set, we punt | |
| 5772 | − * completion for that many seconds since systems like | |
| 5773 | − * distros will load many drivers from userspace so consumers | |
| 5774 | − * might not always be ready yet, this is particularly an | |
| 5775 | − * issue with laptops where this might bounce the display off | |
| 5776 | − * then on. Ideally we'd get a notification from userspace | |
| 5777 | − * when this happens but we don't so just wait a bit and hope | |
| 5778 | − * we waited long enough. It'd be better if we'd only do | |
| 5779 | − * this on systems that need it. | |
| 5767 | + * We punt completion for an arbitrary amount of time since | |
| 5768 | + * systems like distros will load many drivers from userspace | |
| 5769 | + * so consumers might not always be ready yet, this is | |
| 5770 | + * particularly an issue with laptops where this might bounce | |
| 5771 | + * the display off then on. Ideally we'd get a notification | |
| 5772 | + * from userspace when this happens but we don't so just wait | |
| 5773 | + * a bit and hope we waited long enough. It'd be better if | |
| 5774 | + * we'd only do this on systems that need it, and a kernel | |
| 5775 | + * command line option might be useful. | |
| 5780 | 5776 | */ |
| 5781 | − schedule_delayed_work(®ulator_init_complete_work, delay * HZ); | |
| 5777 | + schedule_delayed_work(®ulator_init_complete_work, | |
| 5778 | + msecs_to_jiffies(30000)); | |
| 5782 | 5779 | |
| 5783 | 5780 | return 0; |
| 5784 | 5781 | } |
| @@ -68,7 +68,7 @@ struct mtk_scp { · 67 unmodified lines | ||
| 68 | 68 | wait_queue_head_t ack_wq; |
| 69 | 69 | |
| 70 | 70 | void __iomem *cpu_addr; |
| 71 | − phys_addr_t phys_addr; | |
| 71 | + dma_addr_t dma_addr; | |
| 72 | 72 | size_t dram_size; |
| 73 | 73 | |
| 74 | 74 | struct rproc_subdev *rpmsg_subdev; |
| @@ -330,7 +330,7 @@ static void *scp_da_to_va(struct rproc *rproc, u64 da, size_t len) · 329 unmodified lines | ||
| 330 | 330 | if (offset >= 0 && (offset + len) < scp->sram_size) |
| 331 | 331 | return (void __force *)scp->sram_base + offset; |
| 332 | 332 | } else { |
| 333 | − offset = da - scp->phys_addr; | |
| 333 | + offset = da - scp->dma_addr; | |
| 334 | 334 | if (offset >= 0 && (offset + len) < scp->dram_size) |
| 335 | 335 | return (void __force *)scp->cpu_addr + offset; |
| 336 | 336 | } |
| @@ -451,7 +451,7 @@ static int scp_map_memory_region(struct mtk_scp *scp) · 114 unmodified lines | ||
| 451 | 451 | /* Reserved SCP code size */ |
| 452 | 452 | scp->dram_size = MAX_CODE_SIZE; |
| 453 | 453 | scp->cpu_addr = dma_alloc_coherent(scp->dev, scp->dram_size, |
| 454 | − &scp->phys_addr, GFP_KERNEL); | |
| 454 | + &scp->dma_addr, GFP_KERNEL); | |
| 455 | 455 | if (!scp->cpu_addr) |
| 456 | 456 | return -ENOMEM; |
| 457 | 457 | |
| @@ -461,7 +461,7 @@ static int scp_map_memory_region(struct mtk_scp *scp) · 3 unmodified lines | ||
| 461 | 461 | static void scp_unmap_memory_region(struct mtk_scp *scp) |
| 462 | 462 | { |
| 463 | 463 | dma_free_coherent(scp->dev, scp->dram_size, scp->cpu_addr, |
| 464 | − scp->phys_addr); | |
| 464 | + scp->dma_addr); | |
| 465 | 465 | of_reserved_mem_device_release(scp->dev); |
| 466 | 466 | } |
| 467 | 467 | |
| @@ -367,7 +367,7 @@ unroll_pd_votes: · 366 unmodified lines | ||
| 367 | 367 | } |
| 368 | 368 | |
| 369 | 369 | return ret; |
| 370 | −}; | |
| 370 | +} | |
| 371 | 371 | |
| 372 | 372 | static void q6v5_pds_disable(struct q6v5 *qproc, struct device **pds, |
| 373 | 373 | size_t pd_count) |
| @@ -1527,7 +1527,7 @@ unroll_attach: · 1153 unmodified lines | ||
| 1527 | 1527 | dev_pm_domain_detach(devs[i], false); |
| 1528 | 1528 | |
| 1529 | 1529 | return ret; |
| 1530 | −}; | |
| 1530 | +} | |
| 1531 | 1531 | |
| 1532 | 1532 | static void q6v5_pds_detach(struct q6v5 *qproc, struct device **pds, |
| 1533 | 1533 | size_t pd_count) |
| @@ -1675,7 +1675,7 @@ static int q6v5_probe(struct platform_device *pdev) · 141 unmodified lines | ||
| 1675 | 1675 | ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", |
| 1676 | 1676 | 1, &qproc->hexagon_mdt_image); |
| 1677 | 1677 | if (ret < 0 && ret != -EINVAL) |
| 1678 | − return ret; | |
| 1678 | + goto free_rproc; | |
| 1679 | 1679 | |
| 1680 | 1680 | platform_set_drvdata(pdev, qproc); |
| 1681 | 1681 | |
| @@ -1766,17 +1766,23 @@ static int q6v5_probe(struct platform_device *pdev) · 84 unmodified lines | ||
| 1766 | 1766 | qproc->sysmon = qcom_add_sysmon_subdev(rproc, "modem", 0x12); |
| 1767 | 1767 | if (IS_ERR(qproc->sysmon)) { |
| 1768 | 1768 | ret = PTR_ERR(qproc->sysmon); |
| 1769 | − goto detach_proxy_pds; | |
| 1769 | + goto remove_subdevs; | |
| 1770 | 1770 | } |
| 1771 | 1771 | |
| 1772 | 1772 | ret = rproc_add(rproc); |
| 1773 | 1773 | if (ret) |
| 1774 | − goto detach_proxy_pds; | |
| 1774 | + goto remove_sysmon_subdev; | |
| 1775 | 1775 | |
| 1776 | 1776 | return 0; |
| 1777 | 1777 | |
| 1778 | −detach_proxy_pds: | |
| 1778 | +remove_sysmon_subdev: | |
| 1779 | + qcom_remove_sysmon_subdev(qproc->sysmon); | |
| 1780 | +remove_subdevs: | |
| 1779 | 1781 | qcom_remove_ipa_notify_subdev(qproc->rproc, &qproc->ipa_notify_subdev); |
| 1782 | + qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev); | |
| 1783 | + qcom_remove_smd_subdev(rproc, &qproc->smd_subdev); | |
| 1784 | + qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); | |
| 1785 | +detach_proxy_pds: | |
| 1780 | 1786 | q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); |
| 1781 | 1787 | detach_active_pds: |
| 1782 | 1788 | q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count); |
| @@ -1789,19 +1795,20 @@ free_rproc: · 6 unmodified lines | ||
| 1789 | 1795 | static int q6v5_remove(struct platform_device *pdev) |
| 1790 | 1796 | { |
| 1791 | 1797 | struct q6v5 *qproc = platform_get_drvdata(pdev); |
| 1798 | + struct rproc *rproc = qproc->rproc; | |
| 1792 | 1799 | |
| 1793 | − rproc_del(qproc->rproc); | |
| 1800 | + rproc_del(rproc); | |
| 1794 | 1801 | |
| 1795 | 1802 | qcom_remove_sysmon_subdev(qproc->sysmon); |
| 1796 | − qcom_remove_ipa_notify_subdev(qproc->rproc, &qproc->ipa_notify_subdev); | |
| 1797 | − qcom_remove_glink_subdev(qproc->rproc, &qproc->glink_subdev); | |
| 1798 | − qcom_remove_smd_subdev(qproc->rproc, &qproc->smd_subdev); | |
| 1799 | − qcom_remove_ssr_subdev(qproc->rproc, &qproc->ssr_subdev); | |
| 1803 | + qcom_remove_ipa_notify_subdev(rproc, &qproc->ipa_notify_subdev); | |
| 1804 | + qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev); | |
| 1805 | + qcom_remove_smd_subdev(rproc, &qproc->smd_subdev); | |
| 1806 | + qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); | |
| 1800 | 1807 | |
| 1801 | − q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count); | |
| 1802 | 1808 | q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); |
| 1809 | + q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count); | |
| 1803 | 1810 | |
| 1804 | − rproc_free(qproc->rproc); | |
| 1811 | + rproc_free(rproc); | |
| 1805 | 1812 | |
| 1806 | 1813 | return 0; |
| 1807 | 1814 | } |
| @@ -4,6 +4,7 @@ · 3 unmodified lines | ||
| 4 | 4 | */ |
| 5 | 5 | |
| 6 | 6 | #include <linux/remoteproc.h> |
| 7 | +#include <linux/slab.h> | |
| 7 | 8 | |
| 8 | 9 | #include "remoteproc_internal.h" |
| 9 | 10 | |
| @@ -19,6 +19,7 @@ · 18 unmodified lines | ||
| 19 | 19 | #include <linux/regmap.h> |
| 20 | 20 | #include <linux/remoteproc.h> |
| 21 | 21 | #include <linux/reset.h> |
| 22 | +#include <linux/slab.h> | |
| 22 | 23 | #include <linux/workqueue.h> |
| 23 | 24 | |
| 24 | 25 | #include "remoteproc_internal.h" |
| @@ -8,6 +8,7 @@ · 7 unmodified lines | ||
| 8 | 8 | #include <linux/platform_device.h> |
| 9 | 9 | #include <linux/remoteproc.h> |
| 10 | 10 | #include <linux/rpmsg/mtk_rpmsg.h> |
| 11 | +#include <linux/slab.h> | |
| 11 | 12 | #include <linux/workqueue.h> |
| 12 | 13 | |
| 13 | 14 | #include "rpmsg_internal.h" |
| @@ -6717,17 +6717,17 @@ int qeth_stop(struct net_device *dev) · 6716 unmodified lines | ||
| 6717 | 6717 | unsigned int i; |
| 6718 | 6718 | |
| 6719 | 6719 | /* Quiesce the NAPI instances: */ |
| 6720 | − qeth_for_each_output_queue(card, queue, i) { | |
| 6720 | + qeth_for_each_output_queue(card, queue, i) | |
| 6721 | 6721 | napi_disable(&queue->napi); |
| 6722 | − del_timer_sync(&queue->timer); | |
| 6723 | − } | |
| 6724 | 6722 | |
| 6725 | 6723 | /* Stop .ndo_start_xmit, might still access queue->napi. */ |
| 6726 | 6724 | netif_tx_disable(dev); |
| 6727 | 6725 | |
| 6728 | − /* Queues may get re-allocated, so remove the NAPIs here. */ | |
| 6729 | − qeth_for_each_output_queue(card, queue, i) | |
| 6726 | + qeth_for_each_output_queue(card, queue, i) { | |
| 6727 | + del_timer_sync(&queue->timer); | |
| 6728 | + /* Queues may get re-allocated, so remove the NAPIs. */ | |
| 6730 | 6729 | netif_napi_del(&queue->napi); |
| 6730 | + } | |
| 6731 | 6731 | } else { |
| 6732 | 6732 | netif_tx_disable(dev); |
| 6733 | 6733 | } |
| @@ -127,7 +127,7 @@ config CHR_DEV_SG · 126 unmodified lines | ||
| 127 | 127 | |
| 128 | 128 | For scanners, look at SANE (<http://www.sane-project.org/>). For CD |
| 129 | 129 | writer software look at Cdrtools |
| 130 | − (<http://cdrecord.berlios.de/private/cdrecord.html>) | |
| 130 | + (<http://cdrtools.sourceforge.net/>) | |
| 131 | 131 | and for burning a "disk at once": CDRDAO |
| 132 | 132 | (<http://cdrdao.sourceforge.net/>). Cdparanoia is a high |
| 133 | 133 | quality digital reader of audio CDs (<http://www.xiph.org/paranoia/>). |
| @@ -3640,6 +3640,11 @@ static void ibmvfc_tgt_implicit_logout_and_del(struct ibmvfc_target *tgt) · 3639 unmodified lines | ||
| 3640 | 3640 | struct ibmvfc_host *vhost = tgt->vhost; |
| 3641 | 3641 | struct ibmvfc_event *evt; |
| 3642 | 3642 | |
| 3643 | + if (!vhost->logged_in) { | |
| 3644 | + ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_DEL_RPORT); | |
| 3645 | + return; | |
| 3646 | + } | |
| 3647 | + | |
| 3643 | 3648 | if (vhost->discovery_threads >= disc_threads) |
| 3644 | 3649 | return; |
| 3645 | 3650 | |
| @@ -2320,16 +2320,12 @@ static int ibmvscsi_probe(struct vio_dev *vdev, const struct vio_device_id *id) · 2319 unmodified lines | ||
| 2320 | 2320 | static int ibmvscsi_remove(struct vio_dev *vdev) |
| 2321 | 2321 | { |
| 2322 | 2322 | struct ibmvscsi_host_data *hostdata = dev_get_drvdata(&vdev->dev); |
| 2323 | − unsigned long flags; | |
| 2324 | 2323 | |
| 2325 | 2324 | srp_remove_host(hostdata->host); |
| 2326 | 2325 | scsi_remove_host(hostdata->host); |
| 2327 | 2326 | |
| 2328 | 2327 | purge_requests(hostdata, DID_ERROR); |
| 2329 | − | |
| 2330 | − spin_lock_irqsave(hostdata->host->host_lock, flags); | |
| 2331 | 2328 | release_event_pool(&hostdata->pool, hostdata); |
| 2332 | − spin_unlock_irqrestore(hostdata->host->host_lock, flags); | |
| 2333 | 2329 | |
| 2334 | 2330 | ibmvscsi_release_crq_queue(&hostdata->queue, hostdata, |
| 2335 | 2331 | max_events); |
| @@ -3031,11 +3031,11 @@ qla24xx_vport_delete(struct fc_vport *fc_vport) · 3030 unmodified lines | ||
| 3031 | 3031 | test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags)) |
| 3032 | 3032 | msleep(1000); |
| 3033 | 3033 | |
| 3034 | − qla_nvme_delete(vha); | |
| 3035 | 3034 | |
| 3036 | 3035 | qla24xx_disable_vp(vha); |
| 3037 | 3036 | qla2x00_wait_for_sess_deletion(vha); |
| 3038 | 3037 | |
| 3038 | + qla_nvme_delete(vha); | |
| 3039 | 3039 | vha->flags.delete_progress = 1; |
| 3040 | 3040 | |
| 3041 | 3041 | qlt_remove_target(ha, vha); |
| @@ -3153,7 +3153,7 @@ qla24xx_abort_command(srb_t *sp) · 3152 unmodified lines | ||
| 3153 | 3153 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c, |
| 3154 | 3154 | "Entered %s.\n", __func__); |
| 3155 | 3155 | |
| 3156 | − if (vha->flags.qpairs_available && sp->qpair) | |
| 3156 | + if (sp->qpair) | |
| 3157 | 3157 | req = sp->qpair->req; |
| 3158 | 3158 | else |
| 3159 | 3159 | return QLA_FUNCTION_FAILED; |
| @@ -3732,6 +3732,13 @@ qla2x00_remove_one(struct pci_dev *pdev) · 3731 unmodified lines | ||
| 3732 | 3732 | } |
| 3733 | 3733 | qla2x00_wait_for_hba_ready(base_vha); |
| 3734 | 3734 | |
| 3735 | + /* | |
| 3736 | + * if UNLOADING flag is already set, then continue unload, | |
| 3737 | + * where it was set first. | |
| 3738 | + */ | |
| 3739 | + if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags)) | |
| 3740 | + return; | |
| 3741 | + | |
| 3735 | 3742 | if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) || |
| 3736 | 3743 | IS_QLA28XX(ha)) { |
| 3737 | 3744 | if (ha->flags.fw_started) |
| @@ -3750,15 +3757,6 @@ qla2x00_remove_one(struct pci_dev *pdev) · 12 unmodified lines | ||
| 3750 | 3757 | |
| 3751 | 3758 | qla2x00_wait_for_sess_deletion(base_vha); |
| 3752 | 3759 | |
| 3753 | − /* | |
| 3754 | − * if UNLOAD flag is already set, then continue unload, | |
| 3755 | − * where it was set first. | |
| 3756 | − */ | |
| 3757 | − if (test_bit(UNLOADING, &base_vha->dpc_flags)) | |
| 3758 | − return; | |
| 3759 | − | |
| 3760 | − set_bit(UNLOADING, &base_vha->dpc_flags); | |
| 3761 | − | |
| 3762 | 3760 | qla_nvme_delete(base_vha); |
| 3763 | 3761 | |
| 3764 | 3762 | dma_free_coherent(&ha->pdev->dev, |
| @@ -4864,6 +4862,9 @@ qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type) · 1099 unmodified lines | ||
| 4864 | 4862 | struct qla_work_evt *e; |
| 4865 | 4863 | uint8_t bail; |
| 4866 | 4864 | |
| 4865 | + if (test_bit(UNLOADING, &vha->dpc_flags)) | |
| 4866 | + return NULL; | |
| 4867 | + | |
| 4867 | 4868 | QLA_VHA_MARK_BUSY(vha, bail); |
| 4868 | 4869 | if (bail) |
| 4869 | 4870 | return NULL; |
| @@ -6628,13 +6629,6 @@ qla2x00_disable_board_on_pci_error(struct work_struct *work) · 1758 unmodified lines | ||
| 6628 | 6629 | struct pci_dev *pdev = ha->pdev; |
| 6629 | 6630 | scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); |
| 6630 | 6631 | |
| 6631 | − /* | |
| 6632 | − * if UNLOAD flag is already set, then continue unload, | |
| 6633 | − * where it was set first. | |
| 6634 | − */ | |
| 6635 | − if (test_bit(UNLOADING, &base_vha->dpc_flags)) | |
| 6636 | − return; | |
| 6637 | − | |
| 6638 | 6632 | ql_log(ql_log_warn, base_vha, 0x015b, |
| 6639 | 6633 | "Disabling adapter.\n"); |
| 6640 | 6634 | |
| @@ -6645,9 +6639,14 @@ qla2x00_disable_board_on_pci_error(struct work_struct *work) · 4 unmodified lines | ||
| 6645 | 6639 | return; |
| 6646 | 6640 | } |
| 6647 | 6641 | |
| 6648 | − qla2x00_wait_for_sess_deletion(base_vha); | |
| 6642 | + /* | |
| 6643 | + * if UNLOADING flag is already set, then continue unload, | |
| 6644 | + * where it was set first. | |
| 6645 | + */ | |
| 6646 | + if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags)) | |
| 6647 | + return; | |
| 6649 | 6648 | |
| 6650 | − set_bit(UNLOADING, &base_vha->dpc_flags); | |
| 6649 | + qla2x00_wait_for_sess_deletion(base_vha); | |
| 6651 | 6650 | |
| 6652 | 6651 | qla2x00_delete_all_vps(ha, base_vha); |
| 6653 | 6652 | |
| @@ -2284,6 +2284,7 @@ scsi_device_set_state(struct scsi_device *sdev, enum scsi_device_state state) · 2283 unmodified lines | ||
| 2284 | 2284 | switch (oldstate) { |
| 2285 | 2285 | case SDEV_RUNNING: |
| 2286 | 2286 | case SDEV_CREATED_BLOCK: |
| 2287 | + case SDEV_QUIESCE: | |
| 2287 | 2288 | case SDEV_OFFLINE: |
| 2288 | 2289 | break; |
| 2289 | 2290 | default: |
| @@ -685,8 +685,10 @@ sg_write(struct file *filp, const char __user *buf, size_t count, loff_t * ppos) · 684 unmodified lines | ||
| 685 | 685 | hp->flags = input_size; /* structure abuse ... */ |
| 686 | 686 | hp->pack_id = old_hdr.pack_id; |
| 687 | 687 | hp->usr_ptr = NULL; |
| 688 | − if (copy_from_user(cmnd, buf, cmd_size)) | |
| 688 | + if (copy_from_user(cmnd, buf, cmd_size)) { | |
| 689 | + sg_remove_request(sfp, srp); | |
| 689 | 690 | return -EFAULT; |
| 691 | + } | |
| 690 | 692 | /* |
| 691 | 693 | * SG_DXFER_TO_FROM_DEV is functionally equivalent to SG_DXFER_FROM_DEV, |
| 692 | 694 | * but is is possible that the app intended SG_DXFER_TO_DEV, because there |
| @@ -478,12 +478,18 @@ int dpaa2_io_service_enqueue_multiple_desc_fq(struct dpaa2_io *d, · 477 unmodified lines | ||
| 478 | 478 | const struct dpaa2_fd *fd, |
| 479 | 479 | int nb) |
| 480 | 480 | { |
| 481 | − int i; | |
| 482 | − struct qbman_eq_desc ed[32]; | |
| 481 | + struct qbman_eq_desc *ed; | |
| 482 | + int i, ret; | |
| 483 | + | |
| 484 | + ed = kcalloc(sizeof(struct qbman_eq_desc), 32, GFP_KERNEL); | |
| 485 | + if (!ed) | |
| 486 | + return -ENOMEM; | |
| 483 | 487 | |
| 484 | 488 | d = service_select(d); |
| 485 | − if (!d) | |
| 486 | − return -ENODEV; | |
| 489 | + if (!d) { | |
| 490 | + ret = -ENODEV; | |
| 491 | + goto out; | |
| 492 | + } | |
| 487 | 493 | |
| 488 | 494 | for (i = 0; i < nb; i++) { |
| 489 | 495 | qbman_eq_desc_clear(&ed[i]); |
| @@ -491,7 +497,10 @@ int dpaa2_io_service_enqueue_multiple_desc_fq(struct dpaa2_io *d, · 1 unmodified line | ||
| 491 | 497 | qbman_eq_desc_set_fq(&ed[i], fqid[i]); |
| 492 | 498 | } |
| 493 | 499 | |
| 494 | − return qbman_swp_enqueue_multiple_desc(d->swp, &ed[0], fd, nb); | |
| 500 | + ret = qbman_swp_enqueue_multiple_desc(d->swp, &ed[0], fd, nb); | |
| 501 | +out: | |
| 502 | + kfree(ed); | |
| 503 | + return ret; | |
| 495 | 504 | } |
| 496 | 505 | EXPORT_SYMBOL(dpaa2_io_service_enqueue_multiple_desc_fq); |
| 497 | 506 | |
| @@ -753,7 +753,7 @@ int qbman_swp_enqueue_multiple_mem_back(struct qbman_swp *s, · 752 unmodified lines | ||
| 753 | 753 | if (!s->eqcr.available) { |
| 754 | 754 | eqcr_ci = s->eqcr.ci; |
| 755 | 755 | p = s->addr_cena + QBMAN_CENA_SWP_EQCR_CI_MEMBACK; |
| 756 | − s->eqcr.ci = __raw_readl(p) & full_mask; | |
| 756 | + s->eqcr.ci = *p & full_mask; | |
| 757 | 757 | s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size, |
| 758 | 758 | eqcr_ci, s->eqcr.ci); |
| 759 | 759 | if (!s->eqcr.available) { |
| @@ -823,7 +823,6 @@ int qbman_swp_enqueue_multiple_desc_direct(struct qbman_swp *s, · 63 unmodified lines | ||
| 823 | 823 | const uint32_t *cl; |
| 824 | 824 | uint32_t eqcr_ci, eqcr_pi, half_mask, full_mask; |
| 825 | 825 | int i, num_enqueued = 0; |
| 826 | − uint64_t addr_cena; | |
| 827 | 826 | |
| 828 | 827 | half_mask = (s->eqcr.pi_ci_mask>>1); |
| 829 | 828 | full_mask = s->eqcr.pi_ci_mask; |
| @@ -867,7 +866,6 @@ int qbman_swp_enqueue_multiple_desc_direct(struct qbman_swp *s, · 37 unmodified lines | ||
| 867 | 866 | |
| 868 | 867 | /* Flush all the cacheline without load/store in between */ |
| 869 | 868 | eqcr_pi = s->eqcr.pi; |
| 870 | − addr_cena = (uint64_t)s->addr_cena; | |
| 871 | 869 | for (i = 0; i < num_enqueued; i++) |
| 872 | 870 | eqcr_pi++; |
| 873 | 871 | s->eqcr.pi = eqcr_pi & full_mask; |
| @@ -901,7 +899,7 @@ int qbman_swp_enqueue_multiple_desc_mem_back(struct qbman_swp *s, · 27 unmodified lines | ||
| 901 | 899 | if (!s->eqcr.available) { |
| 902 | 900 | eqcr_ci = s->eqcr.ci; |
| 903 | 901 | p = s->addr_cena + QBMAN_CENA_SWP_EQCR_CI_MEMBACK; |
| 904 | − s->eqcr.ci = __raw_readl(p) & full_mask; | |
| 902 | + s->eqcr.ci = *p & full_mask; | |
| 905 | 903 | s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size, |
| 906 | 904 | eqcr_ci, s->eqcr.ci); |
| 907 | 905 | if (!s->eqcr.available) |
| @@ -21,6 +21,7 @@ config SOC_IMX8M · 20 unmodified lines | ||
| 21 | 21 | bool "i.MX8M SoC family support" |
| 22 | 22 | depends on ARCH_MXC || COMPILE_TEST |
| 23 | 23 | default ARCH_MXC && ARM64 |
| 24 | + select SOC_BUS | |
| 24 | 25 | help |
| 25 | 26 | If you say yes here you get support for the NXP i.MX8M family |
| 26 | 27 | support, it will provide the SoC info like SoC family, |
| @@ -19,7 +19,7 @@ config XILINX_VCU · 18 unmodified lines | ||
| 19 | 19 | |
| 20 | 20 | config ZYNQMP_POWER |
| 21 | 21 | bool "Enable Xilinx Zynq MPSoC Power Management driver" |
| 22 | − depends on PM && ARCH_ZYNQMP | |
| 22 | + depends on PM && ZYNQMP_FIRMWARE | |
| 23 | 23 | default y |
| 24 | 24 | select MAILBOX |
| 25 | 25 | select ZYNQMP_IPI_MBOX |
| @@ -35,7 +35,7 @@ config ZYNQMP_POWER · 9 unmodified lines | ||
| 35 | 35 | config ZYNQMP_PM_DOMAINS |
| 36 | 36 | bool "Enable Zynq MPSoC generic PM domains" |
| 37 | 37 | default y |
| 38 | − depends on PM && ARCH_ZYNQMP && ZYNQMP_FIRMWARE | |
| 38 | + depends on PM && ZYNQMP_FIRMWARE | |
| 39 | 39 | select PM_GENERIC_DOMAINS |
| 40 | 40 | help |
| 41 | 41 | Say yes to enable device power management through PM domains |
| @@ -2725,8 +2725,10 @@ static int comedi_open(struct inode *inode, struct file *file) · 2724 unmodified lines | ||
| 2725 | 2725 | } |
| 2726 | 2726 | |
| 2727 | 2727 | cfp = kzalloc(sizeof(*cfp), GFP_KERNEL); |
| 2728 | − if (!cfp) | |
| 2728 | + if (!cfp) { | |
| 2729 | + comedi_dev_put(dev); | |
| 2729 | 2730 | return -ENOMEM; |
| 2731 | + } | |
| 2730 | 2732 | |
| 2731 | 2733 | cfp->dev = dev; |
| 2732 | 2734 | |
| @@ -92,6 +92,7 @@ static int dt2815_ao_insn(struct comedi_device *dev, struct comedi_subdevice *s, · 91 unmodified lines | ||
| 92 | 92 | int ret; |
| 93 | 93 | |
| 94 | 94 | for (i = 0; i < insn->n; i++) { |
| 95 | + /* FIXME: lo bit 0 chooses voltage output or current output */ | |
| 95 | 96 | lo = ((data[i] & 0x0f) << 4) | (chan << 1) | 0x01; |
| 96 | 97 | hi = (data[i] & 0xff0) >> 4; |
| 97 | 98 | |
| @@ -105,6 +106,8 @@ static int dt2815_ao_insn(struct comedi_device *dev, struct comedi_subdevice *s, · 7 unmodified lines | ||
| 105 | 106 | if (ret) |
| 106 | 107 | return ret; |
| 107 | 108 | |
| 109 | + outb(hi, dev->iobase + DT2815_DATA); | |
| 110 | + | |
| 108 | 111 | devpriv->ao_readback[chan] = data[i]; |
| 109 | 112 | } |
| 110 | 113 | return i; |
| @@ -570,13 +570,6 @@ static const struct pci_device_id apex_pci_ids[] = { · 569 unmodified lines | ||
| 570 | 570 | { PCI_DEVICE(APEX_PCI_VENDOR_ID, APEX_PCI_DEVICE_ID) }, { 0 } |
| 571 | 571 | }; |
| 572 | 572 | |
| 573 | −static void apex_pci_fixup_class(struct pci_dev *pdev) | |
| 574 | −{ | |
| 575 | − pdev->class = (PCI_CLASS_SYSTEM_OTHER << 8) | pdev->class; | |
| 576 | −} | |
| 577 | −DECLARE_PCI_FIXUP_CLASS_HEADER(APEX_PCI_VENDOR_ID, APEX_PCI_DEVICE_ID, | |
| 578 | − PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class); | |
| 579 | − | |
| 580 | 573 | static int apex_pci_probe(struct pci_dev *pci_dev, |
| 581 | 574 | const struct pci_device_id *id) |
| 582 | 575 | { |
| @@ -925,6 +925,10 @@ do_map_region(const struct gasket_dev *gasket_dev, struct vm_area_struct *vma, · 924 unmodified lines | ||
| 925 | 925 | gasket_get_bar_index(gasket_dev, |
| 926 | 926 | (vma->vm_pgoff << PAGE_SHIFT) + |
| 927 | 927 | driver_desc->legacy_mmap_address_offset); |
| 928 | + | |
| 929 | + if (bar_index < 0) | |
| 930 | + return DO_MAP_REGION_INVALID; | |
| 931 | + | |
| 928 | 932 | phys_base = gasket_dev->bar_data[bar_index].phys_base + phys_offset; |
| 929 | 933 | while (mapped_bytes < map_length) { |
| 930 | 934 | /* |
| @@ -228,8 +228,7 @@ int gasket_sysfs_create_entries(struct device *device, · 227 unmodified lines | ||
| 228 | 228 | } |
| 229 | 229 | |
| 230 | 230 | mutex_lock(&mapping->mutex); |
| 231 | − for (i = 0; strcmp(attrs[i].attr.attr.name, GASKET_ARRAY_END_MARKER); | |
| 232 | − i++) { | |
| 231 | + for (i = 0; attrs[i].attr.attr.name != NULL; i++) { | |
| 233 | 232 | if (mapping->attribute_count == GASKET_SYSFS_MAX_NODES) { |
| 234 | 233 | dev_err(device, |
| 235 | 234 | "Maximum number of sysfs nodes reached for device\n"); |
| @@ -30,10 +30,6 @@ · 29 unmodified lines | ||
| 30 | 30 | */ |
| 31 | 31 | #define GASKET_SYSFS_MAX_NODES 196 |
| 32 | 32 | |
| 33 | −/* End markers for sysfs struct arrays. */ | |
| 34 | −#define GASKET_ARRAY_END_TOKEN GASKET_RESERVED_ARRAY_END | |
| 35 | −#define GASKET_ARRAY_END_MARKER __stringify(GASKET_ARRAY_END_TOKEN) | |
| 36 | − | |
| 37 | 33 | /* |
| 38 | 34 | * Terminator struct for a gasket_sysfs_attr array. Must be at the end of |
| 39 | 35 | * all gasket_sysfs_attribute arrays. |
| @@ -30,5 +30,4 @@ Now the TODOs: · 29 unmodified lines | ||
| 30 | 30 | |
| 31 | 31 | Please send any patches to: |
| 32 | 32 | Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| 33 | −Wolfram Sang <wsa@the-dreams.de> | |
| 34 | 33 | Linux Driver Project Developer List <driverdev-devel@linuxdriverproject.org> |
| @@ -83,9 +83,6 @@ static int vnt_set_keymode(struct ieee80211_hw *hw, u8 *mac_addr, · 82 unmodified lines | ||
| 83 | 83 | case VNT_KEY_PAIRWISE: |
| 84 | 84 | key_mode |= mode; |
| 85 | 85 | key_inx = 4; |
| 86 | − /* Don't save entry for pairwise key for station mode */ | |
| 87 | − if (priv->op_mode == NL80211_IFTYPE_STATION) | |
| 88 | − clear_bit(entry, &priv->key_entry_inuse); | |
| 89 | 86 | break; |
| 90 | 87 | default: |
| 91 | 88 | return -EINVAL; |
| @@ -109,7 +106,6 @@ static int vnt_set_keymode(struct ieee80211_hw *hw, u8 *mac_addr, · 17 unmodified lines | ||
| 109 | 106 | int vnt_set_keys(struct ieee80211_hw *hw, struct ieee80211_sta *sta, |
| 110 | 107 | struct ieee80211_vif *vif, struct ieee80211_key_conf *key) |
| 111 | 108 | { |
| 112 | − struct ieee80211_bss_conf *conf = &vif->bss_conf; | |
| 113 | 109 | struct vnt_private *priv = hw->priv; |
| 114 | 110 | u8 *mac_addr = NULL; |
| 115 | 111 | u8 key_dec_mode = 0; |
| @@ -154,16 +150,12 @@ int vnt_set_keys(struct ieee80211_hw *hw, struct ieee80211_sta *sta, · 38 unmodified lines | ||
| 154 | 150 | return -EOPNOTSUPP; |
| 155 | 151 | } |
| 156 | 152 | |
| 157 | − if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) { | |
| 153 | + if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
| 158 | 154 | vnt_set_keymode(hw, mac_addr, key, VNT_KEY_PAIRWISE, |
| 159 | 155 | key_dec_mode, true); |
| 160 | − } else { | |
| 161 | − vnt_set_keymode(hw, mac_addr, key, VNT_KEY_DEFAULTKEY, | |
| 156 | + else | |
| 157 | + vnt_set_keymode(hw, mac_addr, key, VNT_KEY_GROUP_ADDRESS, | |
| 162 | 158 | key_dec_mode, true); |
| 163 | 159 | |
| 164 | − vnt_set_keymode(hw, (u8 *)conf->bssid, key, | |
| 165 | − VNT_KEY_GROUP_ADDRESS, key_dec_mode, true); | |
| 166 | − } | |
| 167 | − | |
| 168 | 160 | return 0; |
| 169 | 161 | } |
| @@ -625,8 +625,6 @@ static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) · 624 unmodified lines | ||
| 625 | 625 | |
| 626 | 626 | priv->op_mode = vif->type; |
| 627 | 627 | |
| 628 | − vnt_set_bss_mode(priv); | |
| 629 | − | |
| 630 | 628 | /* LED blink on TX */ |
| 631 | 629 | vnt_mac_set_led(priv, LEDSTS_STS, LEDSTS_INTER); |
| 632 | 630 | |
| @@ -713,7 +711,6 @@ static void vnt_bss_info_changed(struct ieee80211_hw *hw, · 80 unmodified lines | ||
| 713 | 711 | priv->basic_rates = conf->basic_rates; |
| 714 | 712 | |
| 715 | 713 | vnt_update_top_rates(priv); |
| 716 | − vnt_set_bss_mode(priv); | |
| 717 | 714 | |
| 718 | 715 | dev_dbg(&priv->usb->dev, "basic rates %x\n", conf->basic_rates); |
| 719 | 716 | } |
| @@ -742,11 +739,14 @@ static void vnt_bss_info_changed(struct ieee80211_hw *hw, · 22 unmodified lines | ||
| 742 | 739 | priv->short_slot_time = false; |
| 743 | 740 | |
| 744 | 741 | vnt_set_short_slot_time(priv); |
| 745 | − vnt_update_ifs(priv); | |
| 746 | 742 | vnt_set_vga_gain_offset(priv, priv->bb_vga[0]); |
| 747 | 743 | vnt_update_pre_ed_threshold(priv, false); |
| 748 | 744 | } |
| 749 | 745 | |
| 746 | + if (changed & (BSS_CHANGED_BASIC_RATES | BSS_CHANGED_ERP_PREAMBLE | | |
| 747 | + BSS_CHANGED_ERP_SLOT)) | |
| 748 | + vnt_set_bss_mode(priv); | |
| 749 | + | |
| 750 | 750 | if (changed & BSS_CHANGED_TXPOWER) |
| 751 | 751 | vnt_rf_setpower(priv, priv->current_rate, |
| 752 | 752 | conf->chandef.chan->hw_value); |
| @@ -770,12 +770,15 @@ static void vnt_bss_info_changed(struct ieee80211_hw *hw, · 17 unmodified lines | ||
| 770 | 770 | vnt_mac_reg_bits_on(priv, MAC_REG_TFTCTL, |
| 771 | 771 | TFTCTL_TSFCNTREN); |
| 772 | 772 | |
| 773 | − vnt_adjust_tsf(priv, conf->beacon_rate->hw_value, | |
| 774 | − conf->sync_tsf, priv->current_tsf); | |
| 775 | − | |
| 776 | 773 | vnt_mac_set_beacon_interval(priv, conf->beacon_int); |
| 777 | 774 | |
| 778 | 775 | vnt_reset_next_tbtt(priv, conf->beacon_int); |
| 776 | + | |
| 777 | + vnt_adjust_tsf(priv, conf->beacon_rate->hw_value, | |
| 778 | + conf->sync_tsf, priv->current_tsf); | |
| 779 | + | |
| 780 | + vnt_update_next_tbtt(priv, | |
| 781 | + conf->sync_tsf, conf->beacon_int); | |
| 779 | 782 | } else { |
| 780 | 783 | vnt_clear_current_tsf(priv); |
| 781 | 784 | |
| @@ -809,15 +812,11 @@ static void vnt_configure(struct ieee80211_hw *hw, · 27 unmodified lines | ||
| 809 | 812 | { |
| 810 | 813 | struct vnt_private *priv = hw->priv; |
| 811 | 814 | u8 rx_mode = 0; |
| 812 | − int rc; | |
| 813 | 815 | |
| 814 | 816 | *total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC; |
| 815 | 817 | |
| 816 | − rc = vnt_control_in(priv, MESSAGE_TYPE_READ, MAC_REG_RCR, | |
| 817 | − MESSAGE_REQUEST_MACREG, sizeof(u8), &rx_mode); | |
| 818 | − | |
| 819 | − if (!rc) | |
| 820 | − rx_mode = RCR_MULTICAST | RCR_BROADCAST; | |
| 818 | + vnt_control_in(priv, MESSAGE_TYPE_READ, MAC_REG_RCR, | |
| 819 | + MESSAGE_REQUEST_MACREG, sizeof(u8), &rx_mode); | |
| 821 | 820 | |
| 822 | 821 | dev_dbg(&priv->usb->dev, "rx mode in = %x\n", rx_mode); |
| 823 | 822 | |
| @@ -856,8 +855,12 @@ static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, · 32 unmodified lines | ||
| 856 | 855 | case SET_KEY: |
| 857 | 856 | return vnt_set_keys(hw, sta, vif, key); |
| 858 | 857 | case DISABLE_KEY: |
| 859 | − if (test_bit(key->hw_key_idx, &priv->key_entry_inuse)) | |
| 858 | + if (test_bit(key->hw_key_idx, &priv->key_entry_inuse)) { | |
| 860 | 859 | clear_bit(key->hw_key_idx, &priv->key_entry_inuse); |
| 860 | + | |
| 861 | + vnt_mac_disable_keyentry(priv, key->hw_key_idx); | |
| 862 | + } | |
| 863 | + | |
| 861 | 864 | default: |
| 862 | 865 | break; |
| 863 | 866 | } |
| @@ -207,7 +207,8 @@ static void vnt_int_process_data(struct vnt_private *priv) · 206 unmodified lines | ||
| 207 | 207 | priv->wake_up_count = |
| 208 | 208 | priv->hw->conf.listen_interval; |
| 209 | 209 | |
| 210 | − --priv->wake_up_count; | |
| 210 | + if (priv->wake_up_count) | |
| 211 | + --priv->wake_up_count; | |
| 211 | 212 | |
| 212 | 213 | /* Turn on wake up to listen next beacon */ |
| 213 | 214 | if (priv->wake_up_count == 1) |
| @@ -432,7 +432,7 @@ iblock_execute_zero_out(struct block_device *bdev, struct se_cmd *cmd) · 431 unmodified lines | ||
| 432 | 432 | target_to_linux_sector(dev, cmd->t_task_lba), |
| 433 | 433 | target_to_linux_sector(dev, |
| 434 | 434 | sbc_get_write_same_sectors(cmd)), |
| 435 | − GFP_KERNEL, false); | |
| 435 | + GFP_KERNEL, BLKDEV_ZERO_NOUNMAP); | |
| 436 | 436 | if (ret) |
| 437 | 437 | return TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE; |
| 438 | 438 | |
| @@ -182,6 +182,9 @@ static int usb4_switch_op(struct tb_switch *sw, u16 opcode, u8 *status) · 181 unmodified lines | ||
| 182 | 182 | return ret; |
| 183 | 183 | |
| 184 | 184 | ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1); |
| 185 | + if (ret) | |
| 186 | + return ret; | |
| 187 | + | |
| 185 | 188 | if (val & ROUTER_CS_26_ONS) |
| 186 | 189 | return -EOPNOTSUPP; |
| 187 | 190 | |
| @@ -88,7 +88,7 @@ config HVC_DCC · 87 unmodified lines | ||
| 88 | 88 | |
| 89 | 89 | config HVC_RISCV_SBI |
| 90 | 90 | bool "RISC-V SBI console support" |
| 91 | − depends on RISCV_SBI | |
| 91 | + depends on RISCV_SBI_V01 | |
| 92 | 92 | select HVC_DRIVER |
| 93 | 93 | help |
| 94 | 94 | This enables support for console output via RISC-V SBI calls, which |
| @@ -302,10 +302,6 @@ int hvc_instantiate(uint32_t vtermno, int index, const struct hv_ops *ops) · 301 unmodified lines | ||
| 302 | 302 | vtermnos[index] = vtermno; |
| 303 | 303 | cons_ops[index] = ops; |
| 304 | 304 | |
| 305 | − /* reserve all indices up to and including this index */ | |
| 306 | − if (last_hvc < index) | |
| 307 | − last_hvc = index; | |
| 308 | − | |
| 309 | 305 | /* check if we need to re-register the kernel console */ |
| 310 | 306 | hvc_check_console(index); |
| 311 | 307 | |
| @@ -960,13 +956,22 @@ struct hvc_struct *hvc_alloc(uint32_t vtermno, int data, · 648 unmodified lines | ||
| 960 | 956 | cons_ops[i] == hp->ops) |
| 961 | 957 | break; |
| 962 | 958 | |
| 963 | − /* no matching slot, just use a counter */ | |
| 964 | − if (i >= MAX_NR_HVC_CONSOLES) | |
| 965 | − i = ++last_hvc; | |
| 959 | + if (i >= MAX_NR_HVC_CONSOLES) { | |
| 960 | + | |
| 961 | + /* find 'empty' slot for console */ | |
| 962 | + for (i = 0; i < MAX_NR_HVC_CONSOLES && vtermnos[i] != -1; i++) { | |
| 963 | + } | |
| 964 | + | |
| 965 | + /* no matching slot, just use a counter */ | |
| 966 | + if (i == MAX_NR_HVC_CONSOLES) | |
| 967 | + i = ++last_hvc + MAX_NR_HVC_CONSOLES; | |
| 968 | + } | |
| 966 | 969 | |
| 967 | 970 | hp->index = i; |
| 968 | − cons_ops[i] = ops; | |
| 969 | − vtermnos[i] = vtermno; | |
| 971 | + if (i < MAX_NR_HVC_CONSOLES) { | |
| 972 | + cons_ops[i] = ops; | |
| 973 | + vtermnos[i] = vtermno; | |
| 974 | + } | |
| 970 | 975 | |
| 971 | 976 | list_add_tail(&(hp->next), &hvc_structs); |
| 972 | 977 | mutex_unlock(&hvc_structs_mutex); |
| @@ -632,18 +632,21 @@ init_r_port(int board, int aiop, int chan, struct pci_dev *pci_dev) · 631 unmodified lines | ||
| 632 | 632 | tty_port_init(&info->port); |
| 633 | 633 | info->port.ops = &rocket_port_ops; |
| 634 | 634 | info->flags &= ~ROCKET_MODE_MASK; |
| 635 | − switch (pc104[board][line]) { | |
| 636 | − case 422: | |
| 637 | − info->flags |= ROCKET_MODE_RS422; | |
| 638 | − break; | |
| 639 | − case 485: | |
| 640 | − info->flags |= ROCKET_MODE_RS485; | |
| 641 | − break; | |
| 642 | − case 232: | |
| 643 | − default: | |
| 635 | + if (board < ARRAY_SIZE(pc104) && line < ARRAY_SIZE(pc104_1)) | |
| 636 | + switch (pc104[board][line]) { | |
| 637 | + case 422: | |
| 638 | + info->flags |= ROCKET_MODE_RS422; | |
| 639 | + break; | |
| 640 | + case 485: | |
| 641 | + info->flags |= ROCKET_MODE_RS485; | |
| 642 | + break; | |
| 643 | + case 232: | |
| 644 | + default: | |
| 645 | + info->flags |= ROCKET_MODE_RS232; | |
| 646 | + break; | |
| 647 | + } | |
| 648 | + else | |
| 644 | 649 | info->flags |= ROCKET_MODE_RS232; |
| 645 | − break; | |
| 646 | − } | |
| 647 | 650 | |
| 648 | 651 | info->intmask = RXF_TRIG | TXFIFO_MT | SRC_INT | DELTA_CD | DELTA_CTS | DELTA_DSR; |
| 649 | 652 | if (sInitChan(ctlp, &info->channel, aiop, chan) == 0) { |
| @@ -86,7 +86,7 @@ config SERIAL_EARLYCON_ARM_SEMIHOST · 85 unmodified lines | ||
| 86 | 86 | |
| 87 | 87 | config SERIAL_EARLYCON_RISCV_SBI |
| 88 | 88 | bool "Early console using RISC-V SBI" |
| 89 | − depends on RISCV_SBI | |
| 89 | + depends on RISCV_SBI_V01 | |
| 90 | 90 | select SERIAL_CORE |
| 91 | 91 | select SERIAL_CORE_CONSOLE |
| 92 | 92 | select SERIAL_EARLYCON |
| @@ -680,6 +680,12 @@ static int owl_uart_probe(struct platform_device *pdev) · 679 unmodified lines | ||
| 680 | 680 | return PTR_ERR(owl_port->clk); |
| 681 | 681 | } |
| 682 | 682 | |
| 683 | + ret = clk_prepare_enable(owl_port->clk); | |
| 684 | + if (ret) { | |
| 685 | + dev_err(&pdev->dev, "could not enable clk\n"); | |
| 686 | + return ret; | |
| 687 | + } | |
| 688 | + | |
| 683 | 689 | owl_port->port.dev = &pdev->dev; |
| 684 | 690 | owl_port->port.line = pdev->id; |
| 685 | 691 | owl_port->port.type = PORT_OWL; |
| @@ -712,6 +718,7 @@ static int owl_uart_remove(struct platform_device *pdev) · 26 unmodified lines | ||
| 712 | 718 | |
| 713 | 719 | uart_remove_one_port(&owl_uart_driver, &owl_port->port); |
| 714 | 720 | owl_uart_ports[pdev->id] = NULL; |
| 721 | + clk_disable_unprepare(owl_port->clk); | |
| 715 | 722 | |
| 716 | 723 | return 0; |
| 717 | 724 | } |
| @@ -870,9 +870,16 @@ static void sci_receive_chars(struct uart_port *port) · 869 unmodified lines | ||
| 870 | 870 | tty_insert_flip_char(tport, c, TTY_NORMAL); |
| 871 | 871 | } else { |
| 872 | 872 | for (i = 0; i < count; i++) { |
| 873 | − char c = serial_port_in(port, SCxRDR); | |
| 874 | − | |
| 875 | − status = serial_port_in(port, SCxSR); | |
| 873 | + char c; | |
| 874 | + | |
| 875 | + if (port->type == PORT_SCIF || | |
| 876 | + port->type == PORT_HSCIF) { | |
| 877 | + status = serial_port_in(port, SCxSR); | |
| 878 | + c = serial_port_in(port, SCxRDR); | |
| 879 | + } else { | |
| 880 | + c = serial_port_in(port, SCxRDR); | |
| 881 | + status = serial_port_in(port, SCxSR); | |
| 882 | + } | |
| 876 | 883 | if (uart_handle_sysrq_char(port, c)) { |
| 877 | 884 | count--; i--; |
| 878 | 885 | continue; |
| @@ -567,6 +567,9 @@ static int hv_probe(struct platform_device *op) · 566 unmodified lines | ||
| 567 | 567 | sunserial_console_match(&sunhv_console, op->dev.of_node, |
| 568 | 568 | &sunhv_reg, port->line, false); |
| 569 | 569 | |
| 570 | + /* We need to initialize lock even for non-registered console */ | |
| 571 | + spin_lock_init(&port->lock); | |
| 572 | + | |
| 570 | 573 | err = uart_add_one_port(&sunhv_reg, port); |
| 571 | 574 | if (err) |
| 572 | 575 | goto out_unregister_driver; |
| @@ -26,13 +26,15 @@ · 25 unmodified lines | ||
| 26 | 26 | |
| 27 | 27 | #define CDNS_UART_TTY_NAME "ttyPS" |
| 28 | 28 | #define CDNS_UART_NAME "xuartps" |
| 29 | +#define CDNS_UART_MAJOR 0 /* use dynamic node allocation */ | |
| 30 | +#define CDNS_UART_MINOR 0 /* works best with devtmpfs */ | |
| 31 | +#define CDNS_UART_NR_PORTS 16 | |
| 29 | 32 | #define CDNS_UART_FIFO_SIZE 64 /* FIFO size */ |
| 30 | 33 | #define CDNS_UART_REGISTER_SPACE 0x1000 |
| 31 | 34 | #define TX_TIMEOUT 500000 |
| 32 | 35 | |
| 33 | 36 | /* Rx Trigger level */ |
| 34 | 37 | static int rx_trigger_level = 56; |
| 35 | −static int uartps_major; | |
| 36 | 38 | module_param(rx_trigger_level, uint, 0444); |
| 37 | 39 | MODULE_PARM_DESC(rx_trigger_level, "Rx trigger level, 1-63 bytes"); |
| 38 | 40 | |
| @@ -188,7 +190,6 @@ MODULE_PARM_DESC(rx_timeout, "Rx timeout, 1-255"); · 149 unmodified lines | ||
| 188 | 190 | * @pclk: APB clock |
| 189 | 191 | * @cdns_uart_driver: Pointer to UART driver |
| 190 | 192 | * @baud: Current baud rate |
| 191 | − * @id: Port ID | |
| 192 | 193 | * @clk_rate_change_nb: Notifier block for clock changes |
| 193 | 194 | * @quirks: Flags for RXBS support. |
| 194 | 195 | */ |
| @@ -198,7 +199,6 @@ struct cdns_uart { · 3 unmodified lines | ||
| 198 | 199 | struct clk *pclk; |
| 199 | 200 | struct uart_driver *cdns_uart_driver; |
| 200 | 201 | unsigned int baud; |
| 201 | − int id; | |
| 202 | 202 | struct notifier_block clk_rate_change_nb; |
| 203 | 203 | u32 quirks; |
| 204 | 204 | bool cts_override; |
| @@ -1133,6 +1133,8 @@ static const struct uart_ops cdns_uart_ops = { · 928 unmodified lines | ||
| 1133 | 1133 | #endif |
| 1134 | 1134 | }; |
| 1135 | 1135 | |
| 1136 | +static struct uart_driver cdns_uart_uart_driver; | |
| 1137 | + | |
| 1136 | 1138 | #ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE |
| 1137 | 1139 | /** |
| 1138 | 1140 | * cdns_uart_console_putchar - write the character to the FIFO buffer |
| @@ -1272,6 +1274,16 @@ static int cdns_uart_console_setup(struct console *co, char *options) · 133 unmodified lines | ||
| 1272 | 1274 | |
| 1273 | 1275 | return uart_set_options(port, co, baud, parity, bits, flow); |
| 1274 | 1276 | } |
| 1277 | + | |
| 1278 | +static struct console cdns_uart_console = { | |
| 1279 | + .name = CDNS_UART_TTY_NAME, | |
| 1280 | + .write = cdns_uart_console_write, | |
| 1281 | + .device = uart_console_device, | |
| 1282 | + .setup = cdns_uart_console_setup, | |
| 1283 | + .flags = CON_PRINTBUFFER, | |
| 1284 | + .index = -1, /* Specified on the cmdline (e.g. console=ttyPS ) */ | |
| 1285 | + .data = &cdns_uart_uart_driver, | |
| 1286 | +}; | |
| 1275 | 1287 | #endif /* CONFIG_SERIAL_XILINX_PS_UART_CONSOLE */ |
| 1276 | 1288 | |
| 1277 | 1289 | #ifdef CONFIG_PM_SLEEP |
| @@ -1403,89 +1415,8 @@ static const struct of_device_id cdns_uart_of_match[] = { · 125 unmodified lines | ||
| 1403 | 1415 | }; |
| 1404 | 1416 | MODULE_DEVICE_TABLE(of, cdns_uart_of_match); |
| 1405 | 1417 | |
| 1406 | −/* | |
| 1407 | − * Maximum number of instances without alias IDs but if there is alias | |
| 1408 | − * which target "< MAX_UART_INSTANCES" range this ID can't be used. | |
| 1409 | − */ | |
| 1410 | −#define MAX_UART_INSTANCES 32 | |
| 1411 | − | |
| 1412 | −/* Stores static aliases list */ | |
| 1413 | −static DECLARE_BITMAP(alias_bitmap, MAX_UART_INSTANCES); | |
| 1414 | −static int alias_bitmap_initialized; | |
| 1415 | − | |
| 1416 | −/* Stores actual bitmap of allocated IDs with alias IDs together */ | |
| 1417 | −static DECLARE_BITMAP(bitmap, MAX_UART_INSTANCES); | |
| 1418 | −/* Protect bitmap operations to have unique IDs */ | |
| 1419 | −static DEFINE_MUTEX(bitmap_lock); | |
| 1420 | − | |
| 1421 | −static int cdns_get_id(struct platform_device *pdev) | |
| 1422 | −{ | |
| 1423 | − int id, ret; | |
| 1424 | − | |
| 1425 | − mutex_lock(&bitmap_lock); | |
| 1426 | − | |
| 1427 | − /* Alias list is stable that's why get alias bitmap only once */ | |
| 1428 | − if (!alias_bitmap_initialized) { | |
| 1429 | − ret = of_alias_get_alias_list(cdns_uart_of_match, "serial", | |
| 1430 | − alias_bitmap, MAX_UART_INSTANCES); | |
| 1431 | − if (ret && ret != -EOVERFLOW) { | |
| 1432 | − mutex_unlock(&bitmap_lock); | |
| 1433 | − return ret; | |
| 1434 | − } | |
| 1435 | − | |
| 1436 | − alias_bitmap_initialized++; | |
| 1437 | − } | |
| 1438 | − | |
| 1439 | − /* Make sure that alias ID is not taken by instance without alias */ | |
| 1440 | − bitmap_or(bitmap, bitmap, alias_bitmap, MAX_UART_INSTANCES); | |
| 1441 | − | |
| 1442 | − dev_dbg(&pdev->dev, "Alias bitmap: %*pb\n", | |
| 1443 | − MAX_UART_INSTANCES, bitmap); | |
| 1444 | − | |
| 1445 | − /* Look for a serialN alias */ | |
| 1446 | − id = of_alias_get_id(pdev->dev.of_node, "serial"); | |
| 1447 | − if (id < 0) { | |
| 1448 | − dev_warn(&pdev->dev, | |
| 1449 | − "No serial alias passed. Using the first free id\n"); | |
| 1450 | − | |
| 1451 | − /* | |
| 1452 | − * Start with id 0 and check if there is no serial0 alias | |
| 1453 | − * which points to device which is compatible with this driver. | |
| 1454 | − * If alias exists then try next free position. | |
| 1455 | − */ | |
| 1456 | − id = 0; | |
| 1457 | − | |
| 1458 | − for (;;) { | |
| 1459 | − dev_info(&pdev->dev, "Checking id %d\n", id); | |
| 1460 | − id = find_next_zero_bit(bitmap, MAX_UART_INSTANCES, id); | |
| 1461 | − | |
| 1462 | − /* No free empty instance */ | |
| 1463 | − if (id == MAX_UART_INSTANCES) { | |
| 1464 | − dev_err(&pdev->dev, "No free ID\n"); | |
| 1465 | − mutex_unlock(&bitmap_lock); | |
| 1466 | − return -EINVAL; | |
| 1467 | − } | |
| 1468 | − | |
| 1469 | − dev_dbg(&pdev->dev, "The empty id is %d\n", id); | |
| 1470 | − /* Check if ID is empty */ | |
| 1471 | − if (!test_and_set_bit(id, bitmap)) { | |
| 1472 | − /* Break the loop if bit is taken */ | |
| 1473 | − dev_dbg(&pdev->dev, | |
| 1474 | − "Selected ID %d allocation passed\n", | |
| 1475 | − id); | |
| 1476 | − break; | |
| 1477 | − } | |
| 1478 | − dev_dbg(&pdev->dev, | |
| 1479 | − "Selected ID %d allocation failed\n", id); | |
| 1480 | − /* if taking bit fails then try next one */ | |
| 1481 | − id++; | |
| 1482 | − } | |
| 1483 | − } | |
| 1484 | − | |
| 1485 | − mutex_unlock(&bitmap_lock); | |
| 1486 | − | |
| 1487 | − return id; | |
| 1488 | −} | |
| 1418 | +/* Temporary variable for storing number of instances */ | |
| 1419 | +static int instances; | |
| 1489 | 1420 | |
| 1490 | 1421 | /** |
| 1491 | 1422 | * cdns_uart_probe - Platform driver probe |
| @@ -1495,16 +1426,11 @@ static int cdns_get_id(struct platform_device *pdev) · 3 unmodified lines | ||
| 1495 | 1426 | */ |
| 1496 | 1427 | static int cdns_uart_probe(struct platform_device *pdev) |
| 1497 | 1428 | { |
| 1498 | − int rc, irq; | |
| 1429 | + int rc, id, irq; | |
| 1499 | 1430 | struct uart_port *port; |
| 1500 | 1431 | struct resource *res; |
| 1501 | 1432 | struct cdns_uart *cdns_uart_data; |
| 1502 | 1433 | const struct of_device_id *match; |
| 1503 | − struct uart_driver *cdns_uart_uart_driver; | |
| 1504 | − char *driver_name; | |
| 1505 | −#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE | |
| 1506 | − struct console *cdns_uart_console; | |
| 1507 | −#endif | |
| 1508 | 1434 | |
| 1509 | 1435 | cdns_uart_data = devm_kzalloc(&pdev->dev, sizeof(*cdns_uart_data), |
| 1510 | 1436 | GFP_KERNEL); |
| @@ -1514,64 +1440,36 @@ static int cdns_uart_probe(struct platform_device *pdev) · 3 unmodified lines | ||
| 1514 | 1440 | if (!port) |
| 1515 | 1441 | return -ENOMEM; |
| 1516 | 1442 | |
| 1517 | − cdns_uart_uart_driver = devm_kzalloc(&pdev->dev, | |
| 1518 | − sizeof(*cdns_uart_uart_driver), | |
| 1519 | − GFP_KERNEL); | |
| 1520 | − if (!cdns_uart_uart_driver) | |
| 1521 | − return -ENOMEM; | |
| 1522 | − | |
| 1523 | − cdns_uart_data->id = cdns_get_id(pdev); | |
| 1524 | − if (cdns_uart_data->id < 0) | |
| 1525 | − return cdns_uart_data->id; | |
| 1443 | + /* Look for a serialN alias */ | |
| 1444 | + id = of_alias_get_id(pdev->dev.of_node, "serial"); | |
| 1445 | + if (id < 0) | |
| 1446 | + id = 0; | |
| 1526 | 1447 | |
| 1527 | − /* There is a need to use unique driver name */ | |
| 1528 | − driver_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s%d", | |
| 1529 | − CDNS_UART_NAME, cdns_uart_data->id); | |
| 1530 | − if (!driver_name) { | |
| 1531 | − rc = -ENOMEM; | |
| 1532 | − goto err_out_id; | |
| 1448 | + if (id >= CDNS_UART_NR_PORTS) { | |
| 1449 | + dev_err(&pdev->dev, "Cannot get uart_port structure\n"); | |
| 1450 | + return -ENODEV; | |
| 1533 | 1451 | } |
| 1534 | 1452 | |
| 1535 | − cdns_uart_uart_driver->owner = THIS_MODULE; | |
| 1536 | − cdns_uart_uart_driver->driver_name = driver_name; | |
| 1537 | − cdns_uart_uart_driver->dev_name = CDNS_UART_TTY_NAME; | |
| 1538 | − cdns_uart_uart_driver->major = uartps_major; | |
| 1539 | − cdns_uart_uart_driver->minor = cdns_uart_data->id; | |
| 1540 | − cdns_uart_uart_driver->nr = 1; | |
| 1541 | − | |
| 1453 | + if (!cdns_uart_uart_driver.state) { | |
| 1454 | + cdns_uart_uart_driver.owner = THIS_MODULE; | |
| 1455 | + cdns_uart_uart_driver.driver_name = CDNS_UART_NAME; | |
| 1456 | + cdns_uart_uart_driver.dev_name = CDNS_UART_TTY_NAME; | |
| 1457 | + cdns_uart_uart_driver.major = CDNS_UART_MAJOR; | |
| 1458 | + cdns_uart_uart_driver.minor = CDNS_UART_MINOR; | |
| 1459 | + cdns_uart_uart_driver.nr = CDNS_UART_NR_PORTS; | |
| 1542 | 1460 | #ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE |
| 1543 | − cdns_uart_console = devm_kzalloc(&pdev->dev, sizeof(*cdns_uart_console), | |
| 1544 | − GFP_KERNEL); | |
| 1545 | − if (!cdns_uart_console) { | |
| 1546 | − rc = -ENOMEM; | |
| 1547 | − goto err_out_id; | |
| 1548 | − } | |
| 1549 | − | |
| 1550 | − strncpy(cdns_uart_console->name, CDNS_UART_TTY_NAME, | |
| 1551 | − sizeof(cdns_uart_console->name)); | |
| 1552 | − cdns_uart_console->index = cdns_uart_data->id; | |
| 1553 | − cdns_uart_console->write = cdns_uart_console_write; | |
| 1554 | − cdns_uart_console->device = uart_console_device; | |
| 1555 | − cdns_uart_console->setup = cdns_uart_console_setup; | |
| 1556 | − cdns_uart_console->flags = CON_PRINTBUFFER; | |
| 1557 | − cdns_uart_console->data = cdns_uart_uart_driver; | |
| 1558 | − cdns_uart_uart_driver->cons = cdns_uart_console; | |
| 1461 | + cdns_uart_uart_driver.cons = &cdns_uart_console; | |
| 1462 | + cdns_uart_console.index = id; | |
| 1559 | 1463 | #endif |
| 1560 | 1464 | |
| 1561 | − rc = uart_register_driver(cdns_uart_uart_driver); | |
| 1562 | − if (rc < 0) { | |
| 1563 | − dev_err(&pdev->dev, "Failed to register driver\n"); | |
| 1564 | − goto err_out_id; | |
| 1465 | + rc = uart_register_driver(&cdns_uart_uart_driver); | |
| 1466 | + if (rc < 0) { | |
| 1467 | + dev_err(&pdev->dev, "Failed to register driver\n"); | |
| 1468 | + return rc; | |
| 1469 | + } | |
| 1565 | 1470 | } |
| 1566 | 1471 | |
| 1567 | − cdns_uart_data->cdns_uart_driver = cdns_uart_uart_driver; | |
| 1568 | − | |
| 1569 | − /* | |
| 1570 | − * Setting up proper name_base needs to be done after uart | |
| 1571 | − * registration because tty_driver structure is not filled. | |
| 1572 | − * name_base is 0 by default. | |
| 1573 | − */ | |
| 1574 | − cdns_uart_uart_driver->tty_driver->name_base = cdns_uart_data->id; | |
| 1472 | + cdns_uart_data->cdns_uart_driver = &cdns_uart_uart_driver; | |
| 1575 | 1473 | |
| 1576 | 1474 | match = of_match_node(cdns_uart_of_match, pdev->dev.of_node); |
| 1577 | 1475 | if (match && match->data) { |
| @@ -1649,6 +1547,7 @@ static int cdns_uart_probe(struct platform_device *pdev) · 71 unmodified lines | ||
| 1649 | 1547 | port->ops = &cdns_uart_ops; |
| 1650 | 1548 | port->fifosize = CDNS_UART_FIFO_SIZE; |
| 1651 | 1549 | port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_XILINX_PS_UART_CONSOLE); |
| 1550 | + port->line = id; | |
| 1652 | 1551 | |
| 1653 | 1552 | /* |
| 1654 | 1553 | * Register the port. |
| @@ -1680,7 +1579,7 @@ static int cdns_uart_probe(struct platform_device *pdev) · 25 unmodified lines | ||
| 1680 | 1579 | console_port = port; |
| 1681 | 1580 | #endif |
| 1682 | 1581 | |
| 1683 | − rc = uart_add_one_port(cdns_uart_uart_driver, port); | |
| 1582 | + rc = uart_add_one_port(&cdns_uart_uart_driver, port); | |
| 1684 | 1583 | if (rc) { |
| 1685 | 1584 | dev_err(&pdev->dev, |
| 1686 | 1585 | "uart_add_one_port() failed; err=%i\n", rc); |
| @@ -1690,13 +1589,15 @@ static int cdns_uart_probe(struct platform_device *pdev) · 3 unmodified lines | ||
| 1690 | 1589 | #ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE |
| 1691 | 1590 | /* This is not port which is used for console that's why clean it up */ |
| 1692 | 1591 | if (console_port == port && |
| 1693 | − !(cdns_uart_uart_driver->cons->flags & CON_ENABLED)) | |
| 1592 | + !(cdns_uart_uart_driver.cons->flags & CON_ENABLED)) | |
| 1694 | 1593 | console_port = NULL; |
| 1695 | 1594 | #endif |
| 1696 | 1595 | |
| 1697 | − uartps_major = cdns_uart_uart_driver->tty_driver->major; | |
| 1698 | 1596 | cdns_uart_data->cts_override = of_property_read_bool(pdev->dev.of_node, |
| 1699 | 1597 | "cts-override"); |
| 1598 | + | |
| 1599 | + instances++; | |
| 1600 | + | |
| 1700 | 1601 | return 0; |
| 1701 | 1602 | |
| 1702 | 1603 | err_out_pm_disable: |
| @@ -1712,12 +1613,8 @@ err_out_clk_disable: · 9 unmodified lines | ||
| 1712 | 1613 | err_out_clk_dis_pclk: |
| 1713 | 1614 | clk_disable_unprepare(cdns_uart_data->pclk); |
| 1714 | 1615 | err_out_unregister_driver: |
| 1715 | − uart_unregister_driver(cdns_uart_data->cdns_uart_driver); | |
| 1716 | −err_out_id: | |
| 1717 | − mutex_lock(&bitmap_lock); | |
| 1718 | − if (cdns_uart_data->id < MAX_UART_INSTANCES) | |
| 1719 | − clear_bit(cdns_uart_data->id, bitmap); | |
| 1720 | − mutex_unlock(&bitmap_lock); | |
| 1616 | + if (!instances) | |
| 1617 | + uart_unregister_driver(cdns_uart_data->cdns_uart_driver); | |
| 1721 | 1618 | return rc; |
| 1722 | 1619 | } |
| 1723 | 1620 | |
| @@ -1740,10 +1637,6 @@ static int cdns_uart_remove(struct platform_device *pdev) · 16 unmodified lines | ||
| 1740 | 1637 | #endif |
| 1741 | 1638 | rc = uart_remove_one_port(cdns_uart_data->cdns_uart_driver, port); |
| 1742 | 1639 | port->mapbase = 0; |
| 1743 | − mutex_lock(&bitmap_lock); | |
| 1744 | − if (cdns_uart_data->id < MAX_UART_INSTANCES) | |
| 1745 | − clear_bit(cdns_uart_data->id, bitmap); | |
| 1746 | − mutex_unlock(&bitmap_lock); | |
| 1747 | 1640 | clk_disable_unprepare(cdns_uart_data->uartclk); |
| 1748 | 1641 | clk_disable_unprepare(cdns_uart_data->pclk); |
| 1749 | 1642 | pm_runtime_disable(&pdev->dev); |
| @@ -1756,13 +1649,8 @@ static int cdns_uart_remove(struct platform_device *pdev) · 6 unmodified lines | ||
| 1756 | 1649 | console_port = NULL; |
| 1757 | 1650 | #endif |
| 1758 | 1651 | |
| 1759 | − /* If this is last instance major number should be initialized */ | |
| 1760 | − mutex_lock(&bitmap_lock); | |
| 1761 | − if (bitmap_empty(bitmap, MAX_UART_INSTANCES)) | |
| 1762 | − uartps_major = 0; | |
| 1763 | − mutex_unlock(&bitmap_lock); | |
| 1764 | − | |
| 1765 | − uart_unregister_driver(cdns_uart_data->cdns_uart_driver); | |
| 1652 | + if (!--instances) | |
| 1653 | + uart_unregister_driver(cdns_uart_data->cdns_uart_driver); | |
| 1766 | 1654 | return rc; |
| 1767 | 1655 | } |
| 1768 | 1656 | |
| @@ -74,6 +74,7 @@ int sysrq_mask(void) · 73 unmodified lines | ||
| 74 | 74 | return 1; |
| 75 | 75 | return sysrq_enabled; |
| 76 | 76 | } |
| 77 | +EXPORT_SYMBOL_GPL(sysrq_mask); | |
| 77 | 78 | |
| 78 | 79 | /* |
| 79 | 80 | * A value of 1 means 'all', other nonzero values are an op mask: |
| @@ -1058,6 +1059,7 @@ int sysrq_toggle_support(int enable_mask) · 978 unmodified lines | ||
| 1058 | 1059 | |
| 1059 | 1060 | return 0; |
| 1060 | 1061 | } |
| 1062 | +EXPORT_SYMBOL_GPL(sysrq_toggle_support); | |
| 1061 | 1063 | |
| 1062 | 1064 | static int __sysrq_swap_key_ops(int key, struct sysrq_key_op *insert_op_p, |
| 1063 | 1065 | struct sysrq_key_op *remove_op_p) |
| @@ -81,6 +81,7 @@ · 80 unmodified lines | ||
| 81 | 81 | #include <linux/errno.h> |
| 82 | 82 | #include <linux/kd.h> |
| 83 | 83 | #include <linux/slab.h> |
| 84 | +#include <linux/vmalloc.h> | |
| 84 | 85 | #include <linux/major.h> |
| 85 | 86 | #include <linux/mm.h> |
| 86 | 87 | #include <linux/console.h> |
| @@ -350,7 +351,7 @@ static struct uni_screen *vc_uniscr_alloc(unsigned int cols, unsigned int rows) · 263 unmodified lines | ||
| 350 | 351 | /* allocate everything in one go */ |
| 351 | 352 | memsize = cols * rows * sizeof(char32_t); |
| 352 | 353 | memsize += rows * sizeof(char32_t *); |
| 353 | − p = kmalloc(memsize, GFP_KERNEL); | |
| 354 | + p = vmalloc(memsize); | |
| 354 | 355 | if (!p) |
| 355 | 356 | return NULL; |
| 356 | 357 | |
| @@ -364,9 +365,14 @@ static struct uni_screen *vc_uniscr_alloc(unsigned int cols, unsigned int rows) · 7 unmodified lines | ||
| 364 | 365 | return uniscr; |
| 365 | 366 | } |
| 366 | 367 | |
| 368 | +static void vc_uniscr_free(struct uni_screen *uniscr) | |
| 369 | +{ | |
| 370 | + vfree(uniscr); | |
| 371 | +} | |
| 372 | + | |
| 367 | 373 | static void vc_uniscr_set(struct vc_data *vc, struct uni_screen *new_uniscr) |
| 368 | 374 | { |
| 369 | − kfree(vc->vc_uni_screen); | |
| 375 | + vc_uniscr_free(vc->vc_uni_screen); | |
| 370 | 376 | vc->vc_uni_screen = new_uniscr; |
| 371 | 377 | } |
| 372 | 378 | |
| @@ -1206,7 +1212,7 @@ static int vc_do_resize(struct tty_struct *tty, struct vc_data *vc, · 833 unmodified lines | ||
| 1206 | 1212 | if (new_cols == vc->vc_cols && new_rows == vc->vc_rows) |
| 1207 | 1213 | return 0; |
| 1208 | 1214 | |
| 1209 | − if (new_screen_size > (4 << 20)) | |
| 1215 | + if (new_screen_size > KMALLOC_MAX_SIZE) | |
| 1210 | 1216 | return -EINVAL; |
| 1211 | 1217 | newscreen = kzalloc(new_screen_size, GFP_USER); |
| 1212 | 1218 | if (!newscreen) |
| @@ -1229,7 +1235,7 @@ static int vc_do_resize(struct tty_struct *tty, struct vc_data *vc, · 16 unmodified lines | ||
| 1229 | 1235 | err = resize_screen(vc, new_cols, new_rows, user); |
| 1230 | 1236 | if (err) { |
| 1231 | 1237 | kfree(newscreen); |
| 1232 | − kfree(new_uniscr); | |
| 1238 | + vc_uniscr_free(new_uniscr); | |
| 1233 | 1239 | return err; |
| 1234 | 1240 | } |
| 1235 | 1241 | |
| @@ -114,7 +114,7 @@ static int ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event) · 113 unmodified lines | ||
| 114 | 114 | hw_write_id_reg(ci, HS_PHY_GENCONFIG_2, |
| 115 | 115 | HS_PHY_ULPI_TX_PKT_EN_CLR_FIX, 0); |
| 116 | 116 | |
| 117 | − if (!IS_ERR(ci->platdata->vbus_extcon.edev)) { | |
| 117 | + if (!IS_ERR(ci->platdata->vbus_extcon.edev) || ci->role_switch) { | |
| 118 | 118 | hw_write_id_reg(ci, HS_PHY_GENCONFIG_2, |
| 119 | 119 | HS_PHY_SESS_VLD_CTRL_EN, |
| 120 | 120 | HS_PHY_SESS_VLD_CTRL_EN); |
| @@ -412,9 +412,12 @@ static void acm_ctrl_irq(struct urb *urb) · 411 unmodified lines | ||
| 412 | 412 | |
| 413 | 413 | exit: |
| 414 | 414 | retval = usb_submit_urb(urb, GFP_ATOMIC); |
| 415 | − if (retval && retval != -EPERM) | |
| 415 | + if (retval && retval != -EPERM && retval != -ENODEV) | |
| 416 | 416 | dev_err(&acm->control->dev, |
| 417 | 417 | "%s - usb_submit_urb failed: %d\n", __func__, retval); |
| 418 | + else | |
| 419 | + dev_vdbg(&acm->control->dev, | |
| 420 | + "control resubmission terminated %d\n", retval); | |
| 418 | 421 | } |
| 419 | 422 | |
| 420 | 423 | static int acm_submit_read_urb(struct acm *acm, int index, gfp_t mem_flags) |
| @@ -430,6 +433,8 @@ static int acm_submit_read_urb(struct acm *acm, int index, gfp_t mem_flags) · 9 unmodified lines | ||
| 430 | 433 | dev_err(&acm->data->dev, |
| 431 | 434 | "urb %d failed submission with %d\n", |
| 432 | 435 | index, res); |
| 436 | + } else { | |
| 437 | + dev_vdbg(&acm->data->dev, "intended failure %d\n", res); | |
| 433 | 438 | } |
| 434 | 439 | set_bit(index, &acm->read_urbs_free); |
| 435 | 440 | return res; |
| @@ -471,6 +476,7 @@ static void acm_read_bulk_callback(struct urb *urb) · 35 unmodified lines | ||
| 471 | 476 | int status = urb->status; |
| 472 | 477 | bool stopped = false; |
| 473 | 478 | bool stalled = false; |
| 479 | + bool cooldown = false; | |
| 474 | 480 | |
| 475 | 481 | dev_vdbg(&acm->data->dev, "got urb %d, len %d, status %d\n", |
| 476 | 482 | rb->index, urb->actual_length, status); |
| @@ -497,6 +503,14 @@ static void acm_read_bulk_callback(struct urb *urb) · 20 unmodified lines | ||
| 497 | 503 | __func__, status); |
| 498 | 504 | stopped = true; |
| 499 | 505 | break; |
| 506 | + case -EOVERFLOW: | |
| 507 | + case -EPROTO: | |
| 508 | + dev_dbg(&acm->data->dev, | |
| 509 | + "%s - cooling babbling device\n", __func__); | |
| 510 | + usb_mark_last_busy(acm->dev); | |
| 511 | + set_bit(rb->index, &acm->urbs_in_error_delay); | |
| 512 | + cooldown = true; | |
| 513 | + break; | |
| 500 | 514 | default: |
| 501 | 515 | dev_dbg(&acm->data->dev, |
| 502 | 516 | "%s - nonzero urb status received: %d\n", |
| @@ -518,9 +532,11 @@ static void acm_read_bulk_callback(struct urb *urb) · 15 unmodified lines | ||
| 518 | 532 | */ |
| 519 | 533 | smp_mb__after_atomic(); |
| 520 | 534 | |
| 521 | − if (stopped || stalled) { | |
| 535 | + if (stopped || stalled || cooldown) { | |
| 522 | 536 | if (stalled) |
| 523 | 537 | schedule_work(&acm->work); |
| 538 | + else if (cooldown) | |
| 539 | + schedule_delayed_work(&acm->dwork, HZ / 2); | |
| 524 | 540 | return; |
| 525 | 541 | } |
| 526 | 542 | |
| @@ -557,14 +573,20 @@ static void acm_softint(struct work_struct *work) · 30 unmodified lines | ||
| 557 | 573 | struct acm *acm = container_of(work, struct acm, work); |
| 558 | 574 | |
| 559 | 575 | if (test_bit(EVENT_RX_STALL, &acm->flags)) { |
| 560 | − if (!(usb_autopm_get_interface(acm->data))) { | |
| 576 | + smp_mb(); /* against acm_suspend() */ | |
| 577 | + if (!acm->susp_count) { | |
| 561 | 578 | for (i = 0; i < acm->rx_buflimit; i++) |
| 562 | 579 | usb_kill_urb(acm->read_urbs[i]); |
| 563 | 580 | usb_clear_halt(acm->dev, acm->in); |
| 564 | 581 | acm_submit_read_urbs(acm, GFP_KERNEL); |
| 565 | − usb_autopm_put_interface(acm->data); | |
| 582 | + clear_bit(EVENT_RX_STALL, &acm->flags); | |
| 566 | 583 | } |
| 567 | − clear_bit(EVENT_RX_STALL, &acm->flags); | |
| 584 | + } | |
| 585 | + | |
| 586 | + if (test_and_clear_bit(ACM_ERROR_DELAY, &acm->flags)) { | |
| 587 | + for (i = 0; i < ACM_NR; i++) | |
| 588 | + if (test_and_clear_bit(i, &acm->urbs_in_error_delay)) | |
| 589 | + acm_submit_read_urb(acm, i, GFP_NOIO); | |
| 568 | 590 | } |
| 569 | 591 | |
| 570 | 592 | if (test_and_clear_bit(EVENT_TTY_WAKEUP, &acm->flags)) |
| @@ -1333,6 +1355,7 @@ made_compressed_probe: · 762 unmodified lines | ||
| 1333 | 1355 | acm->readsize = readsize; |
| 1334 | 1356 | acm->rx_buflimit = num_rx_buf; |
| 1335 | 1357 | INIT_WORK(&acm->work, acm_softint); |
| 1358 | + INIT_DELAYED_WORK(&acm->dwork, acm_softint); | |
| 1336 | 1359 | init_waitqueue_head(&acm->wioctl); |
| 1337 | 1360 | spin_lock_init(&acm->write_lock); |
| 1338 | 1361 | spin_lock_init(&acm->read_lock); |
| @@ -1542,6 +1565,7 @@ static void acm_disconnect(struct usb_interface *intf) · 203 unmodified lines | ||
| 1542 | 1565 | |
| 1543 | 1566 | acm_kill_urbs(acm); |
| 1544 | 1567 | cancel_work_sync(&acm->work); |
| 1568 | + cancel_delayed_work_sync(&acm->dwork); | |
| 1545 | 1569 | |
| 1546 | 1570 | tty_unregister_device(acm_tty_driver, acm->minor); |
| 1547 | 1571 | |
| @@ -1584,6 +1608,8 @@ static int acm_suspend(struct usb_interface *intf, pm_message_t message) · 36 unmodified lines | ||
| 1584 | 1608 | |
| 1585 | 1609 | acm_kill_urbs(acm); |
| 1586 | 1610 | cancel_work_sync(&acm->work); |
| 1611 | + cancel_delayed_work_sync(&acm->dwork); | |
| 1612 | + acm->urbs_in_error_delay = 0; | |
| 1587 | 1613 | |
| 1588 | 1614 | return 0; |
| 1589 | 1615 | } |
| @@ -109,8 +109,11 @@ struct acm { · 108 unmodified lines | ||
| 109 | 109 | # define EVENT_TTY_WAKEUP 0 |
| 110 | 110 | # define EVENT_RX_STALL 1 |
| 111 | 111 | # define ACM_THROTTLED 2 |
| 112 | +# define ACM_ERROR_DELAY 3 | |
| 113 | + unsigned long urbs_in_error_delay; /* these need to be restarted after a delay */ | |
| 112 | 114 | struct usb_cdc_line_coding line; /* bits, stop, parity */ |
| 113 | − struct work_struct work; /* work queue entry for line discipline waking up */ | |
| 115 | + struct work_struct work; /* work queue entry for various purposes*/ | |
| 116 | + struct delayed_work dwork; /* for cool downs needed in error recovery */ | |
| 114 | 117 | unsigned int ctrlin; /* input control lines (DCD, DSR, RI, break, overruns) */ |
| 115 | 118 | unsigned int ctrlout; /* output control lines (DTR, RTS) */ |
| 116 | 119 | struct async_icount iocount; /* counters for control line changes */ |
| @@ -217,6 +217,7 @@ static int usbdev_mmap(struct file *file, struct vm_area_struct *vma) · 216 unmodified lines | ||
| 217 | 217 | { |
| 218 | 218 | struct usb_memory *usbm = NULL; |
| 219 | 219 | struct usb_dev_state *ps = file->private_data; |
| 220 | + struct usb_hcd *hcd = bus_to_hcd(ps->dev->bus); | |
| 220 | 221 | size_t size = vma->vm_end - vma->vm_start; |
| 221 | 222 | void *mem; |
| 222 | 223 | unsigned long flags; |
| @@ -250,9 +251,7 @@ static int usbdev_mmap(struct file *file, struct vm_area_struct *vma) · 27 unmodified lines | ||
| 250 | 251 | usbm->vma_use_count = 1; |
| 251 | 252 | INIT_LIST_HEAD(&usbm->memlist); |
| 252 | 253 | |
| 253 | − if (remap_pfn_range(vma, vma->vm_start, | |
| 254 | − virt_to_phys(usbm->mem) >> PAGE_SHIFT, | |
| 255 | − size, vma->vm_page_prot) < 0) { | |
| 254 | + if (dma_mmap_coherent(hcd->self.sysdev, vma, mem, dma_handle, size)) { | |
| 256 | 255 | dec_usb_memory_use_count(usbm, &usbm->vma_use_count); |
| 257 | 256 | return -EAGAIN; |
| 258 | 257 | } |
| @@ -1223,6 +1223,11 @@ static void hub_activate(struct usb_hub *hub, enum hub_activation_type type) · 1222 unmodified lines | ||
| 1223 | 1223 | #ifdef CONFIG_PM |
| 1224 | 1224 | udev->reset_resume = 1; |
| 1225 | 1225 | #endif |
| 1226 | + /* Don't set the change_bits when the device | |
| 1227 | + * was powered off. | |
| 1228 | + */ | |
| 1229 | + if (test_bit(port1, hub->power_bits)) | |
| 1230 | + set_bit(port1, hub->change_bits); | |
| 1226 | 1231 | |
| 1227 | 1232 | } else { |
| 1228 | 1233 | /* The power session is gone; tell hub_wq */ |
| @@ -2723,13 +2728,11 @@ static bool use_new_scheme(struct usb_device *udev, int retry, · 1494 unmodified lines | ||
| 2723 | 2728 | { |
| 2724 | 2729 | int old_scheme_first_port = |
| 2725 | 2730 | port_dev->quirks & USB_PORT_QUIRK_OLD_SCHEME; |
| 2726 | − int quick_enumeration = (udev->speed == USB_SPEED_HIGH); | |
| 2727 | 2731 | |
| 2728 | 2732 | if (udev->speed >= USB_SPEED_SUPER) |
| 2729 | 2733 | return false; |
| 2730 | 2734 | |
| 2731 | − return USE_NEW_SCHEME(retry, old_scheme_first_port || old_scheme_first | |
| 2732 | − || quick_enumeration); | |
| 2735 | + return USE_NEW_SCHEME(retry, old_scheme_first_port || old_scheme_first); | |
| 2733 | 2736 | } |
| 2734 | 2737 | |
| 2735 | 2738 | /* Is a USB 3.0 port in the Inactive or Compliance Mode state? |
| @@ -3088,6 +3091,15 @@ static int check_port_resume_type(struct usb_device *udev, · 352 unmodified lines | ||
| 3088 | 3091 | if (portchange & USB_PORT_STAT_C_ENABLE) |
| 3089 | 3092 | usb_clear_port_feature(hub->hdev, port1, |
| 3090 | 3093 | USB_PORT_FEAT_C_ENABLE); |
| 3094 | + | |
| 3095 | + /* | |
| 3096 | + * Whatever made this reset-resume necessary may have | |
| 3097 | + * turned on the port1 bit in hub->change_bits. But after | |
| 3098 | + * a successful reset-resume we want the bit to be clear; | |
| 3099 | + * if it was on it would indicate that something happened | |
| 3100 | + * following the reset-resume. | |
| 3101 | + */ | |
| 3102 | + clear_bit(port1, hub->change_bits); | |
| 3091 | 3103 | } |
| 3092 | 3104 | |
| 3093 | 3105 | return status; |
| @@ -589,12 +589,13 @@ void usb_sg_cancel(struct usb_sg_request *io) · 588 unmodified lines | ||
| 589 | 589 | int i, retval; |
| 590 | 590 | |
| 591 | 591 | spin_lock_irqsave(&io->lock, flags); |
| 592 | − if (io->status) { | |
| 592 | + if (io->status || io->count == 0) { | |
| 593 | 593 | spin_unlock_irqrestore(&io->lock, flags); |
| 594 | 594 | return; |
| 595 | 595 | } |
| 596 | 596 | /* shut everything down */ |
| 597 | 597 | io->status = -ECONNRESET; |
| 598 | + io->count++; /* Keep the request alive until we're done */ | |
| 598 | 599 | spin_unlock_irqrestore(&io->lock, flags); |
| 599 | 600 | |
| 600 | 601 | for (i = io->entries - 1; i >= 0; --i) { |
| @@ -608,6 +609,12 @@ void usb_sg_cancel(struct usb_sg_request *io) · 7 unmodified lines | ||
| 608 | 609 | dev_warn(&io->dev->dev, "%s, unlink --> %d\n", |
| 609 | 610 | __func__, retval); |
| 610 | 611 | } |
| 612 | + | |
| 613 | + spin_lock_irqsave(&io->lock, flags); | |
| 614 | + io->count--; | |
| 615 | + if (!io->count) | |
| 616 | + complete(&io->complete); | |
| 617 | + spin_unlock_irqrestore(&io->lock, flags); | |
| 611 | 618 | } |
| 612 | 619 | EXPORT_SYMBOL_GPL(usb_sg_cancel); |
| 613 | 620 | |
| @@ -1137,11 +1144,11 @@ void usb_disable_endpoint(struct usb_device *dev, unsigned int epaddr, · 523 unmodified lines | ||
| 1137 | 1144 | |
| 1138 | 1145 | if (usb_endpoint_out(epaddr)) { |
| 1139 | 1146 | ep = dev->ep_out[epnum]; |
| 1140 | − if (reset_hardware) | |
| 1147 | + if (reset_hardware && epnum != 0) | |
| 1141 | 1148 | dev->ep_out[epnum] = NULL; |
| 1142 | 1149 | } else { |
| 1143 | 1150 | ep = dev->ep_in[epnum]; |
| 1144 | − if (reset_hardware) | |
| 1151 | + if (reset_hardware && epnum != 0) | |
| 1145 | 1152 | dev->ep_in[epnum] = NULL; |
| 1146 | 1153 | } |
| 1147 | 1154 | if (ep) { |
| @@ -430,6 +430,10 @@ static const struct usb_device_id usb_quirk_list[] = { · 429 unmodified lines | ||
| 430 | 430 | /* Corsair K70 LUX */ |
| 431 | 431 | { USB_DEVICE(0x1b1c, 0x1b36), .driver_info = USB_QUIRK_DELAY_INIT }, |
| 432 | 432 | |
| 433 | + /* Corsair K70 RGB RAPDIFIRE */ | |
| 434 | + { USB_DEVICE(0x1b1c, 0x1b38), .driver_info = USB_QUIRK_DELAY_INIT | | |
| 435 | + USB_QUIRK_DELAY_CTRL_MSG }, | |
| 436 | + | |
| 433 | 437 | /* MIDI keyboard WORLDE MINI */ |
| 434 | 438 | { USB_DEVICE(0x1c75, 0x0204), .driver_info = |
| 435 | 439 | USB_QUIRK_CONFIG_INTF_STRINGS }, |
| @@ -307,10 +307,14 @@ · 306 unmodified lines | ||
| 307 | 307 | |
| 308 | 308 | /* Global TX Fifo Size Register */ |
| 309 | 309 | #define DWC31_GTXFIFOSIZ_TXFRAMNUM BIT(15) /* DWC_usb31 only */ |
| 310 | −#define DWC31_GTXFIFOSIZ_TXFDEF(n) ((n) & 0x7fff) /* DWC_usb31 only */ | |
| 311 | −#define DWC3_GTXFIFOSIZ_TXFDEF(n) ((n) & 0xffff) | |
| 310 | +#define DWC31_GTXFIFOSIZ_TXFDEP(n) ((n) & 0x7fff) /* DWC_usb31 only */ | |
| 311 | +#define DWC3_GTXFIFOSIZ_TXFDEP(n) ((n) & 0xffff) | |
| 312 | 312 | #define DWC3_GTXFIFOSIZ_TXFSTADDR(n) ((n) & 0xffff0000) |
| 313 | 313 | |
| 314 | +/* Global RX Fifo Size Register */ | |
| 315 | +#define DWC31_GRXFIFOSIZ_RXFDEP(n) ((n) & 0x7fff) /* DWC_usb31 only */ | |
| 316 | +#define DWC3_GRXFIFOSIZ_RXFDEP(n) ((n) & 0xffff) | |
| 317 | + | |
| 314 | 318 | /* Global Event Size Registers */ |
| 315 | 319 | #define DWC3_GEVNTSIZ_INTMASK BIT(31) |
| 316 | 320 | #define DWC3_GEVNTSIZ_SIZE(n) ((n) & 0xffff) |
| @@ -1728,7 +1728,6 @@ static int __dwc3_gadget_wakeup(struct dwc3 *dwc) · 1727 unmodified lines | ||
| 1728 | 1728 | u32 reg; |
| 1729 | 1729 | |
| 1730 | 1730 | u8 link_state; |
| 1731 | − u8 speed; | |
| 1732 | 1731 | |
| 1733 | 1732 | /* |
| 1734 | 1733 | * According to the Databook Remote wakeup request should |
| @@ -1738,16 +1737,13 @@ static int __dwc3_gadget_wakeup(struct dwc3 *dwc) · 3 unmodified lines | ||
| 1738 | 1737 | */ |
| 1739 | 1738 | reg = dwc3_readl(dwc->regs, DWC3_DSTS); |
| 1740 | 1739 | |
| 1741 | − speed = reg & DWC3_DSTS_CONNECTSPD; | |
| 1742 | − if ((speed == DWC3_DSTS_SUPERSPEED) || | |
| 1743 | − (speed == DWC3_DSTS_SUPERSPEED_PLUS)) | |
| 1744 | − return 0; | |
| 1745 | − | |
| 1746 | 1740 | link_state = DWC3_DSTS_USBLNKST(reg); |
| 1747 | 1741 | |
| 1748 | 1742 | switch (link_state) { |
| 1743 | + case DWC3_LINK_STATE_RESET: | |
| 1749 | 1744 | case DWC3_LINK_STATE_RX_DET: /* in HS, means Early Suspend */ |
| 1750 | 1745 | case DWC3_LINK_STATE_U3: /* in HS, means SUSPEND */ |
| 1746 | + case DWC3_LINK_STATE_RESUME: | |
| 1751 | 1747 | break; |
| 1752 | 1748 | default: |
| 1753 | 1749 | return -EINVAL; |
| @@ -2227,7 +2223,6 @@ static int dwc3_gadget_init_in_endpoint(struct dwc3_ep *dep) · 473 unmodified lines | ||
| 2227 | 2223 | { |
| 2228 | 2224 | struct dwc3 *dwc = dep->dwc; |
| 2229 | 2225 | int mdwidth; |
| 2230 | − int kbytes; | |
| 2231 | 2226 | int size; |
| 2232 | 2227 | |
| 2233 | 2228 | mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0); |
| @@ -2236,24 +2231,24 @@ static int dwc3_gadget_init_in_endpoint(struct dwc3_ep *dep) · 2 unmodified lines | ||
| 2236 | 2231 | |
| 2237 | 2232 | size = dwc3_readl(dwc->regs, DWC3_GTXFIFOSIZ(dep->number >> 1)); |
| 2238 | 2233 | if (dwc3_is_usb31(dwc)) |
| 2239 | − size = DWC31_GTXFIFOSIZ_TXFDEF(size); | |
| 2234 | + size = DWC31_GTXFIFOSIZ_TXFDEP(size); | |
| 2240 | 2235 | else |
| 2241 | − size = DWC3_GTXFIFOSIZ_TXFDEF(size); | |
| 2236 | + size = DWC3_GTXFIFOSIZ_TXFDEP(size); | |
| 2242 | 2237 | |
| 2243 | 2238 | /* FIFO Depth is in MDWDITH bytes. Multiply */ |
| 2244 | 2239 | size *= mdwidth; |
| 2245 | 2240 | |
| 2246 | − kbytes = size / 1024; | |
| 2247 | − if (kbytes == 0) | |
| 2248 | − kbytes = 1; | |
| 2249 | − | |
| 2250 | 2241 | /* |
| 2251 | − * FIFO sizes account an extra MDWIDTH * (kbytes + 1) bytes for | |
| 2252 | − * internal overhead. We don't really know how these are used, | |
| 2253 | − * but documentation say it exists. | |
| 2242 | + * To meet performance requirement, a minimum TxFIFO size of 3x | |
| 2243 | + * MaxPacketSize is recommended for endpoints that support burst and a | |
| 2244 | + * minimum TxFIFO size of 2x MaxPacketSize for endpoints that don't | |
| 2245 | + * support burst. Use those numbers and we can calculate the max packet | |
| 2246 | + * limit as below. | |
| 2254 | 2247 | */ |
| 2255 | − size -= mdwidth * (kbytes + 1); | |
| 2256 | − size /= kbytes; | |
| 2248 | + if (dwc->maximum_speed >= USB_SPEED_SUPER) | |
| 2249 | + size /= 3; | |
| 2250 | + else | |
| 2251 | + size /= 2; | |
| 2257 | 2252 | |
| 2258 | 2253 | usb_ep_set_maxpacket_limit(&dep->endpoint, size); |
| 2259 | 2254 | |
| @@ -2271,8 +2266,39 @@ static int dwc3_gadget_init_in_endpoint(struct dwc3_ep *dep) · 11 unmodified lines | ||
| 2271 | 2266 | static int dwc3_gadget_init_out_endpoint(struct dwc3_ep *dep) |
| 2272 | 2267 | { |
| 2273 | 2268 | struct dwc3 *dwc = dep->dwc; |
| 2269 | + int mdwidth; | |
| 2270 | + int size; | |
| 2271 | + | |
| 2272 | + mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0); | |
| 2274 | 2273 | |
| 2275 | − usb_ep_set_maxpacket_limit(&dep->endpoint, 1024); | |
| 2274 | + /* MDWIDTH is represented in bits, convert to bytes */ | |
| 2275 | + mdwidth /= 8; | |
| 2276 | + | |
| 2277 | + /* All OUT endpoints share a single RxFIFO space */ | |
| 2278 | + size = dwc3_readl(dwc->regs, DWC3_GRXFIFOSIZ(0)); | |
| 2279 | + if (dwc3_is_usb31(dwc)) | |
| 2280 | + size = DWC31_GRXFIFOSIZ_RXFDEP(size); | |
| 2281 | + else | |
| 2282 | + size = DWC3_GRXFIFOSIZ_RXFDEP(size); | |
| 2283 | + | |
| 2284 | + /* FIFO depth is in MDWDITH bytes */ | |
| 2285 | + size *= mdwidth; | |
| 2286 | + | |
| 2287 | + /* | |
| 2288 | + * To meet performance requirement, a minimum recommended RxFIFO size | |
| 2289 | + * is defined as follow: | |
| 2290 | + * RxFIFO size >= (3 x MaxPacketSize) + | |
| 2291 | + * (3 x 8 bytes setup packets size) + (16 bytes clock crossing margin) | |
| 2292 | + * | |
| 2293 | + * Then calculate the max packet limit as below. | |
| 2294 | + */ | |
| 2295 | + size -= (3 * 8) + 16; | |
| 2296 | + if (size < 0) | |
| 2297 | + size = 0; | |
| 2298 | + else | |
| 2299 | + size /= 3; | |
| 2300 | + | |
| 2301 | + usb_ep_set_maxpacket_limit(&dep->endpoint, size); | |
| 2276 | 2302 | dep->endpoint.max_streams = 15; |
| 2277 | 2303 | dep->endpoint.ops = &dwc3_gadget_ep_ops; |
| 2278 | 2304 | list_add_tail(&dep->endpoint.ep_list, |
| @@ -2484,14 +2510,7 @@ static int dwc3_gadget_ep_reclaim_trb_linear(struct dwc3_ep *dep, · 205 unmodified lines | ||
| 2484 | 2510 | |
| 2485 | 2511 | static bool dwc3_gadget_ep_request_completed(struct dwc3_request *req) |
| 2486 | 2512 | { |
| 2487 | − /* | |
| 2488 | − * For OUT direction, host may send less than the setup | |
| 2489 | − * length. Return true for all OUT requests. | |
| 2490 | − */ | |
| 2491 | − if (!req->direction) | |
| 2492 | − return true; | |
| 2493 | − | |
| 2494 | − return req->request.actual == req->request.length; | |
| 2513 | + return req->num_pending_sgs == 0; | |
| 2495 | 2514 | } |
| 2496 | 2515 | |
| 2497 | 2516 | static int dwc3_gadget_ep_cleanup_completed_request(struct dwc3_ep *dep, |
| @@ -2515,8 +2534,7 @@ static int dwc3_gadget_ep_cleanup_completed_request(struct dwc3_ep *dep, · 17 unmodified lines | ||
| 2515 | 2534 | |
| 2516 | 2535 | req->request.actual = req->request.length - req->remaining; |
| 2517 | 2536 | |
| 2518 | − if (!dwc3_gadget_ep_request_completed(req) || | |
| 2519 | − req->num_pending_sgs) { | |
| 2537 | + if (!dwc3_gadget_ep_request_completed(req)) { | |
| 2520 | 2538 | __dwc3_gadget_kick_transfer(dep); |
| 2521 | 2539 | goto out; |
| 2522 | 2540 | } |
| @@ -728,19 +728,19 @@ static void xdbc_handle_tx_event(struct xdbc_trb *evt_trb) · 727 unmodified lines | ||
| 728 | 728 | case COMP_USB_TRANSACTION_ERROR: |
| 729 | 729 | case COMP_STALL_ERROR: |
| 730 | 730 | default: |
| 731 | − if (ep_id == XDBC_EPID_OUT) | |
| 731 | + if (ep_id == XDBC_EPID_OUT || ep_id == XDBC_EPID_OUT_INTEL) | |
| 732 | 732 | xdbc.flags |= XDBC_FLAGS_OUT_STALL; |
| 733 | − if (ep_id == XDBC_EPID_IN) | |
| 733 | + if (ep_id == XDBC_EPID_IN || ep_id == XDBC_EPID_IN_INTEL) | |
| 734 | 734 | xdbc.flags |= XDBC_FLAGS_IN_STALL; |
| 735 | 735 | |
| 736 | 736 | xdbc_trace("endpoint %d stalled\n", ep_id); |
| 737 | 737 | break; |
| 738 | 738 | } |
| 739 | 739 | |
| 740 | − if (ep_id == XDBC_EPID_IN) { | |
| 740 | + if (ep_id == XDBC_EPID_IN || ep_id == XDBC_EPID_IN_INTEL) { | |
| 741 | 741 | xdbc.flags &= ~XDBC_FLAGS_IN_PROCESS; |
| 742 | 742 | xdbc_bulk_transfer(NULL, XDBC_MAX_PACKET, true); |
| 743 | − } else if (ep_id == XDBC_EPID_OUT) { | |
| 743 | + } else if (ep_id == XDBC_EPID_OUT || ep_id == XDBC_EPID_OUT_INTEL) { | |
| 744 | 744 | xdbc.flags &= ~XDBC_FLAGS_OUT_PROCESS; |
| 745 | 745 | } else { |
| 746 | 746 | xdbc_trace("invalid endpoint id %d\n", ep_id); |
| @@ -120,8 +120,22 @@ struct xdbc_ring { · 119 unmodified lines | ||
| 120 | 120 | u32 cycle_state; |
| 121 | 121 | }; |
| 122 | 122 | |
| 123 | −#define XDBC_EPID_OUT 2 | |
| 124 | −#define XDBC_EPID_IN 3 | |
| 123 | +/* | |
| 124 | + * These are the "Endpoint ID" (also known as "Context Index") values for the | |
| 125 | + * OUT Transfer Ring and the IN Transfer Ring of a Debug Capability Context data | |
| 126 | + * structure. | |
| 127 | + * According to the "eXtensible Host Controller Interface for Universal Serial | |
| 128 | + * Bus (xHCI)" specification, section "7.6.3.2 Endpoint Contexts and Transfer | |
| 129 | + * Rings", these should be 0 and 1, and those are the values AMD machines give | |
| 130 | + * you; but Intel machines seem to use the formula from section "4.5.1 Device | |
| 131 | + * Context Index", which is supposed to be used for the Device Context only. | |
| 132 | + * Luckily the values from Intel don't overlap with those from AMD, so we can | |
| 133 | + * just test for both. | |
| 134 | + */ | |
| 135 | +#define XDBC_EPID_OUT 0 | |
| 136 | +#define XDBC_EPID_IN 1 | |
| 137 | +#define XDBC_EPID_OUT_INTEL 2 | |
| 138 | +#define XDBC_EPID_IN_INTEL 3 | |
| 125 | 139 | |
| 126 | 140 | struct xdbc_state { |
| 127 | 141 | u16 vendor; |
| @@ -1813,6 +1813,10 @@ static void ffs_data_reset(struct ffs_data *ffs) · 1812 unmodified lines | ||
| 1813 | 1813 | ffs->state = FFS_READ_DESCRIPTORS; |
| 1814 | 1814 | ffs->setup_state = FFS_NO_SETUP; |
| 1815 | 1815 | ffs->flags = 0; |
| 1816 | + | |
| 1817 | + ffs->ms_os_descs_ext_prop_count = 0; | |
| 1818 | + ffs->ms_os_descs_ext_prop_name_len = 0; | |
| 1819 | + ffs->ms_os_descs_ext_prop_data_len = 0; | |
| 1816 | 1820 | } |
| 1817 | 1821 | |
| 1818 | 1822 | |
| @@ -81,6 +81,7 @@ static int raw_event_queue_add(struct raw_event_queue *queue, · 80 unmodified lines | ||
| 81 | 81 | static struct usb_raw_event *raw_event_queue_fetch( |
| 82 | 82 | struct raw_event_queue *queue) |
| 83 | 83 | { |
| 84 | + int ret; | |
| 84 | 85 | unsigned long flags; |
| 85 | 86 | struct usb_raw_event *event; |
| 86 | 87 | |
| @@ -89,11 +90,18 @@ static struct usb_raw_event *raw_event_queue_fetch( · 2 unmodified lines | ||
| 89 | 90 | * there's at least one event queued by decrementing the semaphore, |
| 90 | 91 | * and then take the lock to protect queue struct fields. |
| 91 | 92 | */ |
| 92 | − if (down_interruptible(&queue->sema)) | |
| 93 | − return NULL; | |
| 93 | + ret = down_interruptible(&queue->sema); | |
| 94 | + if (ret) | |
| 95 | + return ERR_PTR(ret); | |
| 94 | 96 | spin_lock_irqsave(&queue->lock, flags); |
| 95 | − if (WARN_ON(!queue->size)) | |
| 96 | − return NULL; | |
| 97 | + /* | |
| 98 | + * queue->size must have the same value as queue->sema counter (before | |
| 99 | + * the down_interruptible() call above), so this check is a fail-safe. | |
| 100 | + */ | |
| 101 | + if (WARN_ON(!queue->size)) { | |
| 102 | + spin_unlock_irqrestore(&queue->lock, flags); | |
| 103 | + return ERR_PTR(-ENODEV); | |
| 104 | + } | |
| 97 | 105 | event = queue->events[0]; |
| 98 | 106 | queue->size--; |
| 99 | 107 | memmove(&queue->events[0], &queue->events[1], |
| @@ -392,9 +400,8 @@ static int raw_ioctl_init(struct raw_dev *dev, unsigned long value) · 292 unmodified lines | ||
| 392 | 400 | char *udc_device_name; |
| 393 | 401 | unsigned long flags; |
| 394 | 402 | |
| 395 | − ret = copy_from_user(&arg, (void __user *)value, sizeof(arg)); | |
| 396 | − if (ret) | |
| 397 | − return ret; | |
| 403 | + if (copy_from_user(&arg, (void __user *)value, sizeof(arg))) | |
| 404 | + return -EFAULT; | |
| 398 | 405 | |
| 399 | 406 | switch (arg.speed) { |
| 400 | 407 | case USB_SPEED_UNKNOWN: |
| @@ -501,15 +508,13 @@ out_unlock: · 100 unmodified lines | ||
| 501 | 508 | |
| 502 | 509 | static int raw_ioctl_event_fetch(struct raw_dev *dev, unsigned long value) |
| 503 | 510 | { |
| 504 | − int ret = 0; | |
| 505 | 511 | struct usb_raw_event arg; |
| 506 | 512 | unsigned long flags; |
| 507 | 513 | struct usb_raw_event *event; |
| 508 | 514 | uint32_t length; |
| 509 | 515 | |
| 510 | − ret = copy_from_user(&arg, (void __user *)value, sizeof(arg)); | |
| 511 | − if (ret) | |
| 512 | − return ret; | |
| 516 | + if (copy_from_user(&arg, (void __user *)value, sizeof(arg))) | |
| 517 | + return -EFAULT; | |
| 513 | 518 | |
| 514 | 519 | spin_lock_irqsave(&dev->lock, flags); |
| 515 | 520 | if (dev->state != STATE_DEV_RUNNING) { |
| @@ -525,25 +530,31 @@ static int raw_ioctl_event_fetch(struct raw_dev *dev, unsigned long value) · 9 unmodified lines | ||
| 525 | 530 | spin_unlock_irqrestore(&dev->lock, flags); |
| 526 | 531 | |
| 527 | 532 | event = raw_event_queue_fetch(&dev->queue); |
| 528 | − if (!event) { | |
| 533 | + if (PTR_ERR(event) == -EINTR) { | |
| 529 | 534 | dev_dbg(&dev->gadget->dev, "event fetching interrupted\n"); |
| 530 | 535 | return -EINTR; |
| 531 | 536 | } |
| 537 | + if (IS_ERR(event)) { | |
| 538 | + dev_err(&dev->gadget->dev, "failed to fetch event\n"); | |
| 539 | + spin_lock_irqsave(&dev->lock, flags); | |
| 540 | + dev->state = STATE_DEV_FAILED; | |
| 541 | + spin_unlock_irqrestore(&dev->lock, flags); | |
| 542 | + return -ENODEV; | |
| 543 | + } | |
| 532 | 544 | length = min(arg.length, event->length); |
| 533 | − ret = copy_to_user((void __user *)value, event, | |
| 534 | − sizeof(*event) + length); | |
| 535 | − return ret; | |
| 545 | + if (copy_to_user((void __user *)value, event, sizeof(*event) + length)) | |
| 546 | + return -EFAULT; | |
| 547 | + | |
| 548 | + return 0; | |
| 536 | 549 | } |
| 537 | 550 | |
| 538 | 551 | static void *raw_alloc_io_data(struct usb_raw_ep_io *io, void __user *ptr, |
| 539 | 552 | bool get_from_user) |
| 540 | 553 | { |
| 541 | − int ret; | |
| 542 | 554 | void *data; |
| 543 | 555 | |
| 544 | − ret = copy_from_user(io, ptr, sizeof(*io)); | |
| 545 | − if (ret) | |
| 546 | − return ERR_PTR(ret); | |
| 556 | + if (copy_from_user(io, ptr, sizeof(*io))) | |
| 557 | + return ERR_PTR(-EFAULT); | |
| 547 | 558 | if (io->ep >= USB_RAW_MAX_ENDPOINTS) |
| 548 | 559 | return ERR_PTR(-EINVAL); |
| 549 | 560 | if (!usb_raw_io_flags_valid(io->flags)) |
| @@ -658,12 +669,13 @@ static int raw_ioctl_ep0_read(struct raw_dev *dev, unsigned long value) · 108 unmodified lines | ||
| 658 | 669 | if (IS_ERR(data)) |
| 659 | 670 | return PTR_ERR(data); |
| 660 | 671 | ret = raw_process_ep0_io(dev, &io, data, false); |
| 661 | − if (ret < 0) { | |
| 662 | − kfree(data); | |
| 663 | − return ret; | |
| 664 | − } | |
| 672 | + if (ret) | |
| 673 | + goto free; | |
| 674 | + | |
| 665 | 675 | length = min(io.length, (unsigned int)ret); |
| 666 | − ret = copy_to_user((void __user *)(value + sizeof(io)), data, length); | |
| 676 | + if (copy_to_user((void __user *)(value + sizeof(io)), data, length)) | |
| 677 | + ret = -EFAULT; | |
| 678 | +free: | |
| 667 | 679 | kfree(data); |
| 668 | 680 | return ret; |
| 669 | 681 | } |
| @@ -952,12 +964,13 @@ static int raw_ioctl_ep_read(struct raw_dev *dev, unsigned long value) · 282 unmodified lines | ||
| 952 | 964 | if (IS_ERR(data)) |
| 953 | 965 | return PTR_ERR(data); |
| 954 | 966 | ret = raw_process_ep_io(dev, &io, data, false); |
| 955 | − if (ret < 0) { | |
| 956 | − kfree(data); | |
| 957 | − return ret; | |
| 958 | − } | |
| 967 | + if (ret) | |
| 968 | + goto free; | |
| 969 | + | |
| 959 | 970 | length = min(io.length, (unsigned int)ret); |
| 960 | − ret = copy_to_user((void __user *)(value + sizeof(io)), data, length); | |
| 971 | + if (copy_to_user((void __user *)(value + sizeof(io)), data, length)) | |
| 972 | + ret = -EFAULT; | |
| 973 | +free: | |
| 961 | 974 | kfree(data); |
| 962 | 975 | return ret; |
| 963 | 976 | } |
| @@ -1951,10 +1951,10 @@ static irqreturn_t usba_vbus_irq_thread(int irq, void *devid) · 1950 unmodified lines | ||
| 1951 | 1951 | usba_start(udc); |
| 1952 | 1952 | } else { |
| 1953 | 1953 | udc->suspended = false; |
| 1954 | − usba_stop(udc); | |
| 1955 | − | |
| 1956 | 1954 | if (udc->driver->disconnect) |
| 1957 | 1955 | udc->driver->disconnect(&udc->gadget); |
| 1956 | + | |
| 1957 | + usba_stop(udc); | |
| 1958 | 1958 | } |
| 1959 | 1959 | udc->vbus_prev = vbus; |
| 1960 | 1960 | } |
| @@ -540,7 +540,7 @@ static void bdc_req_complete(struct bdc_ep *ep, struct bdc_req *req, · 539 unmodified lines | ||
| 540 | 540 | { |
| 541 | 541 | struct bdc *bdc = ep->bdc; |
| 542 | 542 | |
| 543 | − if (req == NULL || &req->queue == NULL || &req->usb_req == NULL) | |
| 543 | + if (req == NULL) | |
| 544 | 544 | return; |
| 545 | 545 | |
| 546 | 546 | dev_dbg(bdc->dev, "%s ep:%s status:%d\n", __func__, ep->name, status); |
| @@ -1571,6 +1571,8 @@ int xhci_hub_status_data(struct usb_hcd *hcd, char *buf) · 1570 unmodified lines | ||
| 1571 | 1571 | } |
| 1572 | 1572 | if ((temp & PORT_RC)) |
| 1573 | 1573 | reset_change = true; |
| 1574 | + if (temp & PORT_OC) | |
| 1575 | + status = 1; | |
| 1574 | 1576 | } |
| 1575 | 1577 | if (!status && !reset_change) { |
| 1576 | 1578 | xhci_dbg(xhci, "%s: stopping port polling.\n", __func__); |
| @@ -1636,6 +1638,13 @@ retry: · 59 unmodified lines | ||
| 1636 | 1638 | port_index); |
| 1637 | 1639 | goto retry; |
| 1638 | 1640 | } |
| 1641 | + /* bail out if port detected a over-current condition */ | |
| 1642 | + if (t1 & PORT_OC) { | |
| 1643 | + bus_state->bus_suspended = 0; | |
| 1644 | + spin_unlock_irqrestore(&xhci->lock, flags); | |
| 1645 | + xhci_dbg(xhci, "Bus suspend bailout, port over-current detected\n"); | |
| 1646 | + return -EBUSY; | |
| 1647 | + } | |
| 1639 | 1648 | /* suspend ports in U0, or bail out for new connect changes */ |
| 1640 | 1649 | if ((t1 & PORT_PE) && (t1 & PORT_PLS_MASK) == XDEV_U0) { |
| 1641 | 1650 | if ((t1 & PORT_CSC) && wake_enabled) { |
| @@ -547,6 +547,23 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci, · 546 unmodified lines | ||
| 547 | 547 | stream_id); |
| 548 | 548 | return; |
| 549 | 549 | } |
| 550 | + /* | |
| 551 | + * A cancelled TD can complete with a stall if HW cached the trb. | |
| 552 | + * In this case driver can't find cur_td, but if the ring is empty we | |
| 553 | + * can move the dequeue pointer to the current enqueue position. | |
| 554 | + */ | |
| 555 | + if (!cur_td) { | |
| 556 | + if (list_empty(&ep_ring->td_list)) { | |
| 557 | + state->new_deq_seg = ep_ring->enq_seg; | |
| 558 | + state->new_deq_ptr = ep_ring->enqueue; | |
| 559 | + state->new_cycle_state = ep_ring->cycle_state; | |
| 560 | + goto done; | |
| 561 | + } else { | |
| 562 | + xhci_warn(xhci, "Can't find new dequeue state, missing cur_td\n"); | |
| 563 | + return; | |
| 564 | + } | |
| 565 | + } | |
| 566 | + | |
| 550 | 567 | /* Dig out the cycle state saved by the xHC during the stop ep cmd */ |
| 551 | 568 | xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, |
| 552 | 569 | "Finding endpoint context"); |
| @@ -592,6 +609,7 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci, · 39 unmodified lines | ||
| 592 | 609 | state->new_deq_seg = new_seg; |
| 593 | 610 | state->new_deq_ptr = new_deq; |
| 594 | 611 | |
| 612 | +done: | |
| 595 | 613 | /* Don't update the ring cycle state for the producer (us). */ |
| 596 | 614 | xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, |
| 597 | 615 | "Cycle state = 0x%x", state->new_cycle_state); |
| @@ -1856,8 +1874,8 @@ static void xhci_cleanup_halted_endpoint(struct xhci_hcd *xhci, · 1258 unmodified lines | ||
| 1856 | 1874 | |
| 1857 | 1875 | if (reset_type == EP_HARD_RESET) { |
| 1858 | 1876 | ep->ep_state |= EP_HARD_CLEAR_TOGGLE; |
| 1859 | − xhci_cleanup_stalled_ring(xhci, ep_index, stream_id, td); | |
| 1860 | − xhci_clear_hub_tt_buffer(xhci, td, ep); | |
| 1877 | + xhci_cleanup_stalled_ring(xhci, slot_id, ep_index, stream_id, | |
| 1878 | + td); | |
| 1861 | 1879 | } |
| 1862 | 1880 | xhci_ring_cmd_db(xhci); |
| 1863 | 1881 | } |
| @@ -1978,11 +1996,18 @@ static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td, · 114 unmodified lines | ||
| 1978 | 1996 | if (trb_comp_code == COMP_STALL_ERROR || |
| 1979 | 1997 | xhci_requires_manual_halt_cleanup(xhci, ep_ctx, |
| 1980 | 1998 | trb_comp_code)) { |
| 1981 | − /* Issue a reset endpoint command to clear the host side | |
| 1982 | − * halt, followed by a set dequeue command to move the | |
| 1983 | − * dequeue pointer past the TD. | |
| 1984 | − * The class driver clears the device side halt later. | |
| 1999 | + /* | |
| 2000 | + * xhci internal endpoint state will go to a "halt" state for | |
| 2001 | + * any stall, including default control pipe protocol stall. | |
| 2002 | + * To clear the host side halt we need to issue a reset endpoint | |
| 2003 | + * command, followed by a set dequeue command to move past the | |
| 2004 | + * TD. | |
| 2005 | + * Class drivers clear the device side halt from a functional | |
| 2006 | + * stall later. Hub TT buffer should only be cleared for FS/LS | |
| 2007 | + * devices behind HS hubs for functional stalls. | |
| 1985 | 2008 | */ |
| 2009 | + if ((ep_index != 0) || (trb_comp_code != COMP_STALL_ERROR)) | |
| 2010 | + xhci_clear_hub_tt_buffer(xhci, td, ep); | |
| 1986 | 2011 | xhci_cleanup_halted_endpoint(xhci, slot_id, ep_index, |
| 1987 | 2012 | ep_ring->stream_id, td, EP_HARD_RESET); |
| 1988 | 2013 | } else { |
| @@ -2539,6 +2564,15 @@ static int handle_tx_event(struct xhci_hcd *xhci, · 550 unmodified lines | ||
| 2539 | 2564 | xhci_dbg(xhci, "td_list is empty while skip flag set. Clear skip flag for slot %u ep %u.\n", |
| 2540 | 2565 | slot_id, ep_index); |
| 2541 | 2566 | } |
| 2567 | + if (trb_comp_code == COMP_STALL_ERROR || | |
| 2568 | + xhci_requires_manual_halt_cleanup(xhci, ep_ctx, | |
| 2569 | + trb_comp_code)) { | |
| 2570 | + xhci_cleanup_halted_endpoint(xhci, slot_id, | |
| 2571 | + ep_index, | |
| 2572 | + ep_ring->stream_id, | |
| 2573 | + NULL, | |
| 2574 | + EP_HARD_RESET); | |
| 2575 | + } | |
| 2542 | 2576 | goto cleanup; |
| 2543 | 2577 | } |
| 2544 | 2578 | |
| @@ -3031,19 +3031,19 @@ static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci, · 3030 unmodified lines | ||
| 3031 | 3031 | added_ctxs, added_ctxs); |
| 3032 | 3032 | } |
| 3033 | 3033 | |
| 3034 | −void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int ep_index, | |
| 3035 | − unsigned int stream_id, struct xhci_td *td) | |
| 3034 | +void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int slot_id, | |
| 3035 | + unsigned int ep_index, unsigned int stream_id, | |
| 3036 | + struct xhci_td *td) | |
| 3036 | 3037 | { |
| 3037 | 3038 | struct xhci_dequeue_state deq_state; |
| 3038 | − struct usb_device *udev = td->urb->dev; | |
| 3039 | 3039 | |
| 3040 | 3040 | xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep, |
| 3041 | 3041 | "Cleaning up stalled endpoint ring"); |
| 3042 | 3042 | /* We need to move the HW's dequeue pointer past this TD, |
| 3043 | 3043 | * or it will attempt to resend it on the next doorbell ring. |
| 3044 | 3044 | */ |
| 3045 | − xhci_find_new_dequeue_state(xhci, udev->slot_id, | |
| 3046 | − ep_index, stream_id, td, &deq_state); | |
| 3045 | + xhci_find_new_dequeue_state(xhci, slot_id, ep_index, stream_id, td, | |
| 3046 | + &deq_state); | |
| 3047 | 3047 | |
| 3048 | 3048 | if (!deq_state.new_deq_ptr || !deq_state.new_deq_seg) |
| 3049 | 3049 | return; |
| @@ -3054,7 +3054,7 @@ void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int ep_index, · 4 unmodified lines | ||
| 3054 | 3054 | if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) { |
| 3055 | 3055 | xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep, |
| 3056 | 3056 | "Queueing new dequeue state"); |
| 3057 | − xhci_queue_new_dequeue_state(xhci, udev->slot_id, | |
| 3057 | + xhci_queue_new_dequeue_state(xhci, slot_id, | |
| 3058 | 3058 | ep_index, &deq_state); |
| 3059 | 3059 | } else { |
| 3060 | 3060 | /* Better hope no one uses the input context between now and the |
| @@ -3065,7 +3065,7 @@ void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int ep_index, · 4 unmodified lines | ||
| 3065 | 3065 | xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, |
| 3066 | 3066 | "Setting up input context for " |
| 3067 | 3067 | "configure endpoint command"); |
| 3068 | − xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id, | |
| 3068 | + xhci_setup_input_ctx_for_quirk(xhci, slot_id, | |
| 3069 | 3069 | ep_index, &deq_state); |
| 3070 | 3070 | } |
| 3071 | 3071 | } |
| @@ -2116,8 +2116,9 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci, · 2115 unmodified lines | ||
| 2116 | 2116 | void xhci_queue_new_dequeue_state(struct xhci_hcd *xhci, |
| 2117 | 2117 | unsigned int slot_id, unsigned int ep_index, |
| 2118 | 2118 | struct xhci_dequeue_state *deq_state); |
| 2119 | −void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int ep_index, | |
| 2120 | − unsigned int stream_id, struct xhci_td *td); | |
| 2119 | +void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int slot_id, | |
| 2120 | + unsigned int ep_index, unsigned int stream_id, | |
| 2121 | + struct xhci_td *td); | |
| 2121 | 2122 | void xhci_stop_endpoint_command_watchdog(struct timer_list *t); |
| 2122 | 2123 | void xhci_handle_command_timeout(struct work_struct *work); |
| 2123 | 2124 | |
| @@ -1199,18 +1199,18 @@ static int sisusb_read_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr, · 1198 unmodified lines | ||
| 1199 | 1199 | /* High level: Gfx (indexed) register access */ |
| 1200 | 1200 | |
| 1201 | 1201 | #ifdef CONFIG_USB_SISUSBVGA_CON |
| 1202 | −int sisusb_setreg(struct sisusb_usb_data *sisusb, int port, u8 data) | |
| 1202 | +int sisusb_setreg(struct sisusb_usb_data *sisusb, u32 port, u8 data) | |
| 1203 | 1203 | { |
| 1204 | 1204 | return sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, port, data); |
| 1205 | 1205 | } |
| 1206 | 1206 | |
| 1207 | −int sisusb_getreg(struct sisusb_usb_data *sisusb, int port, u8 *data) | |
| 1207 | +int sisusb_getreg(struct sisusb_usb_data *sisusb, u32 port, u8 *data) | |
| 1208 | 1208 | { |
| 1209 | 1209 | return sisusb_read_memio_byte(sisusb, SISUSB_TYPE_IO, port, data); |
| 1210 | 1210 | } |
| 1211 | 1211 | #endif |
| 1212 | 1212 | |
| 1213 | −int sisusb_setidxreg(struct sisusb_usb_data *sisusb, int port, | |
| 1213 | +int sisusb_setidxreg(struct sisusb_usb_data *sisusb, u32 port, | |
| 1214 | 1214 | u8 index, u8 data) |
| 1215 | 1215 | { |
| 1216 | 1216 | int ret; |
| @@ -1220,7 +1220,7 @@ int sisusb_setidxreg(struct sisusb_usb_data *sisusb, int port, · 3 unmodified lines | ||
| 1220 | 1220 | return ret; |
| 1221 | 1221 | } |
| 1222 | 1222 | |
| 1223 | −int sisusb_getidxreg(struct sisusb_usb_data *sisusb, int port, | |
| 1223 | +int sisusb_getidxreg(struct sisusb_usb_data *sisusb, u32 port, | |
| 1224 | 1224 | u8 index, u8 *data) |
| 1225 | 1225 | { |
| 1226 | 1226 | int ret; |
| @@ -1230,7 +1230,7 @@ int sisusb_getidxreg(struct sisusb_usb_data *sisusb, int port, · 3 unmodified lines | ||
| 1230 | 1230 | return ret; |
| 1231 | 1231 | } |
| 1232 | 1232 | |
| 1233 | −int sisusb_setidxregandor(struct sisusb_usb_data *sisusb, int port, u8 idx, | |
| 1233 | +int sisusb_setidxregandor(struct sisusb_usb_data *sisusb, u32 port, u8 idx, | |
| 1234 | 1234 | u8 myand, u8 myor) |
| 1235 | 1235 | { |
| 1236 | 1236 | int ret; |
| @@ -1245,7 +1245,7 @@ int sisusb_setidxregandor(struct sisusb_usb_data *sisusb, int port, u8 idx, · 8 unmodified lines | ||
| 1245 | 1245 | } |
| 1246 | 1246 | |
| 1247 | 1247 | static int sisusb_setidxregmask(struct sisusb_usb_data *sisusb, |
| 1248 | − int port, u8 idx, u8 data, u8 mask) | |
| 1248 | + u32 port, u8 idx, u8 data, u8 mask) | |
| 1249 | 1249 | { |
| 1250 | 1250 | int ret; |
| 1251 | 1251 | u8 tmp; |
| @@ -1258,13 +1258,13 @@ static int sisusb_setidxregmask(struct sisusb_usb_data *sisusb, · 6 unmodified lines | ||
| 1258 | 1258 | return ret; |
| 1259 | 1259 | } |
| 1260 | 1260 | |
| 1261 | −int sisusb_setidxregor(struct sisusb_usb_data *sisusb, int port, | |
| 1261 | +int sisusb_setidxregor(struct sisusb_usb_data *sisusb, u32 port, | |
| 1262 | 1262 | u8 index, u8 myor) |
| 1263 | 1263 | { |
| 1264 | 1264 | return sisusb_setidxregandor(sisusb, port, index, 0xff, myor); |
| 1265 | 1265 | } |
| 1266 | 1266 | |
| 1267 | −int sisusb_setidxregand(struct sisusb_usb_data *sisusb, int port, | |
| 1267 | +int sisusb_setidxregand(struct sisusb_usb_data *sisusb, u32 port, | |
| 1268 | 1268 | u8 idx, u8 myand) |
| 1269 | 1269 | { |
| 1270 | 1270 | return sisusb_setidxregandor(sisusb, port, idx, myand, 0x00); |
| @@ -2785,8 +2785,8 @@ static loff_t sisusb_lseek(struct file *file, loff_t offset, int orig) · 1514 unmodified lines | ||
| 2785 | 2785 | static int sisusb_handle_command(struct sisusb_usb_data *sisusb, |
| 2786 | 2786 | struct sisusb_command *y, unsigned long arg) |
| 2787 | 2787 | { |
| 2788 | − int retval, port, length; | |
| 2789 | − u32 address; | |
| 2788 | + int retval, length; | |
| 2789 | + u32 port, address; | |
| 2790 | 2790 | |
| 2791 | 2791 | /* All our commands require the device |
| 2792 | 2792 | * to be initialized. |
| @@ -812,17 +812,17 @@ static const struct SiS_VCLKData SiSUSB_VCLKData[] = { · 811 unmodified lines | ||
| 812 | 812 | int SiSUSBSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo); |
| 813 | 813 | int SiSUSBSetVESAMode(struct SiS_Private *SiS_Pr, unsigned short VModeNo); |
| 814 | 814 | |
| 815 | −extern int sisusb_setreg(struct sisusb_usb_data *sisusb, int port, u8 data); | |
| 816 | −extern int sisusb_getreg(struct sisusb_usb_data *sisusb, int port, u8 * data); | |
| 817 | −extern int sisusb_setidxreg(struct sisusb_usb_data *sisusb, int port, | |
| 815 | +extern int sisusb_setreg(struct sisusb_usb_data *sisusb, u32 port, u8 data); | |
| 816 | +extern int sisusb_getreg(struct sisusb_usb_data *sisusb, u32 port, u8 * data); | |
| 817 | +extern int sisusb_setidxreg(struct sisusb_usb_data *sisusb, u32 port, | |
| 818 | 818 | u8 index, u8 data); |
| 819 | −extern int sisusb_getidxreg(struct sisusb_usb_data *sisusb, int port, | |
| 819 | +extern int sisusb_getidxreg(struct sisusb_usb_data *sisusb, u32 port, | |
| 820 | 820 | u8 index, u8 * data); |
| 821 | −extern int sisusb_setidxregandor(struct sisusb_usb_data *sisusb, int port, | |
| 821 | +extern int sisusb_setidxregandor(struct sisusb_usb_data *sisusb, u32 port, | |
| 822 | 822 | u8 idx, u8 myand, u8 myor); |
| 823 | −extern int sisusb_setidxregor(struct sisusb_usb_data *sisusb, int port, | |
| 823 | +extern int sisusb_setidxregor(struct sisusb_usb_data *sisusb, u32 port, | |
| 824 | 824 | u8 index, u8 myor); |
| 825 | −extern int sisusb_setidxregand(struct sisusb_usb_data *sisusb, int port, | |
| 825 | +extern int sisusb_setidxregand(struct sisusb_usb_data *sisusb, u32 port, | |
| 826 | 826 | u8 idx, u8 myand); |
| 827 | 827 | |
| 828 | 828 | void sisusb_delete(struct kref *kref); |
| @@ -1138,8 +1138,8 @@ static void garmin_read_process(struct garmin_data *garmin_data_p, · 1137 unmodified lines | ||
| 1138 | 1138 | send it directly to the tty port */ |
| 1139 | 1139 | if (garmin_data_p->flags & FLAGS_QUEUING) { |
| 1140 | 1140 | pkt_add(garmin_data_p, data, data_length); |
| 1141 | − } else if (bulk_data || | |
| 1142 | − getLayerId(data) == GARMIN_LAYERID_APPL) { | |
| 1141 | + } else if (bulk_data || (data_length >= sizeof(u32) && | |
| 1142 | + getLayerId(data) == GARMIN_LAYERID_APPL)) { | |
| 1143 | 1143 | |
| 1144 | 1144 | spin_lock_irqsave(&garmin_data_p->lock, flags); |
| 1145 | 1145 | garmin_data_p->flags |= APP_RESP_SEEN; |
| @@ -173,6 +173,7 @@ static const struct usb_device_id id_table[] = { · 172 unmodified lines | ||
| 173 | 173 | {DEVICE_SWI(0x413c, 0x81b3)}, /* Dell Wireless 5809e Gobi(TM) 4G LTE Mobile Broadband Card (rev3) */ |
| 174 | 174 | {DEVICE_SWI(0x413c, 0x81b5)}, /* Dell Wireless 5811e QDL */ |
| 175 | 175 | {DEVICE_SWI(0x413c, 0x81b6)}, /* Dell Wireless 5811e QDL */ |
| 176 | + {DEVICE_SWI(0x413c, 0x81cc)}, /* Dell Wireless 5816e */ | |
| 176 | 177 | {DEVICE_SWI(0x413c, 0x81cf)}, /* Dell Wireless 5819 */ |
| 177 | 178 | {DEVICE_SWI(0x413c, 0x81d0)}, /* Dell Wireless 5819 */ |
| 178 | 179 | {DEVICE_SWI(0x413c, 0x81d1)}, /* Dell Wireless 5818 */ |
| @@ -81,6 +81,19 @@ static void uas_free_streams(struct uas_dev_info *devinfo); · 80 unmodified lines | ||
| 81 | 81 | static void uas_log_cmd_state(struct scsi_cmnd *cmnd, const char *prefix, |
| 82 | 82 | int status); |
| 83 | 83 | |
| 84 | +/* | |
| 85 | + * This driver needs its own workqueue, as we need to control memory allocation. | |
| 86 | + * | |
| 87 | + * In the course of error handling and power management uas_wait_for_pending_cmnds() | |
| 88 | + * needs to flush pending work items. In these contexts we cannot allocate memory | |
| 89 | + * by doing block IO as we would deadlock. For the same reason we cannot wait | |
| 90 | + * for anything allocating memory not heeding these constraints. | |
| 91 | + * | |
| 92 | + * So we have to control all work items that can be on the workqueue we flush. | |
| 93 | + * Hence we cannot share a queue and need our own. | |
| 94 | + */ | |
| 95 | +static struct workqueue_struct *workqueue; | |
| 96 | + | |
| 84 | 97 | static void uas_do_work(struct work_struct *work) |
| 85 | 98 | { |
| 86 | 99 | struct uas_dev_info *devinfo = |
| @@ -109,7 +122,7 @@ static void uas_do_work(struct work_struct *work) · 22 unmodified lines | ||
| 109 | 122 | if (!err) |
| 110 | 123 | cmdinfo->state &= ~IS_IN_WORK_LIST; |
| 111 | 124 | else |
| 112 | − schedule_work(&devinfo->work); | |
| 125 | + queue_work(workqueue, &devinfo->work); | |
| 113 | 126 | } |
| 114 | 127 | out: |
| 115 | 128 | spin_unlock_irqrestore(&devinfo->lock, flags); |
| @@ -134,7 +147,7 @@ static void uas_add_work(struct uas_cmd_info *cmdinfo) · 18 unmodified lines | ||
| 134 | 147 | |
| 135 | 148 | lockdep_assert_held(&devinfo->lock); |
| 136 | 149 | cmdinfo->state |= IS_IN_WORK_LIST; |
| 137 | − schedule_work(&devinfo->work); | |
| 150 | + queue_work(workqueue, &devinfo->work); | |
| 138 | 151 | } |
| 139 | 152 | |
| 140 | 153 | static void uas_zap_pending(struct uas_dev_info *devinfo, int result) |
| @@ -190,6 +203,9 @@ static void uas_log_cmd_state(struct scsi_cmnd *cmnd, const char *prefix, · 49 unmodified lines | ||
| 190 | 203 | struct uas_cmd_info *ci = (void *)&cmnd->SCp; |
| 191 | 204 | struct uas_cmd_info *cmdinfo = (void *)&cmnd->SCp; |
| 192 | 205 | |
| 206 | + if (status == -ENODEV) /* too late */ | |
| 207 | + return; | |
| 208 | + | |
| 193 | 209 | scmd_printk(KERN_INFO, cmnd, |
| 194 | 210 | "%s %d uas-tag %d inflight:%s%s%s%s%s%s%s%s%s%s%s%s ", |
| 195 | 211 | prefix, status, cmdinfo->uas_tag, |
| @@ -1226,7 +1242,31 @@ static struct usb_driver uas_driver = { · 1030 unmodified lines | ||
| 1226 | 1242 | .id_table = uas_usb_ids, |
| 1227 | 1243 | }; |
| 1228 | 1244 | |
| 1229 | −module_usb_driver(uas_driver); | |
| 1245 | +static int __init uas_init(void) | |
| 1246 | +{ | |
| 1247 | + int rv; | |
| 1248 | + | |
| 1249 | + workqueue = alloc_workqueue("uas", WQ_MEM_RECLAIM, 0); | |
| 1250 | + if (!workqueue) | |
| 1251 | + return -ENOMEM; | |
| 1252 | + | |
| 1253 | + rv = usb_register(&uas_driver); | |
| 1254 | + if (rv) { | |
| 1255 | + destroy_workqueue(workqueue); | |
| 1256 | + return -ENOMEM; | |
| 1257 | + } | |
| 1258 | + | |
| 1259 | + return 0; | |
| 1260 | +} | |
| 1261 | + | |
| 1262 | +static void __exit uas_exit(void) | |
| 1263 | +{ | |
| 1264 | + usb_deregister(&uas_driver); | |
| 1265 | + destroy_workqueue(workqueue); | |
| 1266 | +} | |
| 1267 | + | |
| 1268 | +module_init(uas_init); | |
| 1269 | +module_exit(uas_exit); | |
| 1230 | 1270 | |
| 1231 | 1271 | MODULE_LICENSE("GPL"); |
| 1232 | 1272 | MODULE_IMPORT_NS(USB_STORAGE); |
| @@ -2323,6 +2323,13 @@ UNUSUAL_DEV( 0x3340, 0xffff, 0x0000, 0x0000, · 2322 unmodified lines | ||
| 2323 | 2323 | USB_SC_DEVICE,USB_PR_DEVICE,NULL, |
| 2324 | 2324 | US_FL_MAX_SECTORS_64 ), |
| 2325 | 2325 | |
| 2326 | +/* Reported by Cyril Roelandt <tipecaml@gmail.com> */ | |
| 2327 | +UNUSUAL_DEV( 0x357d, 0x7788, 0x0114, 0x0114, | |
| 2328 | + "JMicron", | |
| 2329 | + "USB to ATA/ATAPI Bridge", | |
| 2330 | + USB_SC_DEVICE, USB_PR_DEVICE, NULL, | |
| 2331 | + US_FL_BROKEN_FUA ), | |
| 2332 | + | |
| 2326 | 2333 | /* Reported by Andrey Rahmatullin <wrar@altlinux.org> */ |
| 2327 | 2334 | UNUSUAL_DEV( 0x4102, 0x1020, 0x0100, 0x0100, |
| 2328 | 2335 | "iRiver", |
| @@ -28,6 +28,13 @@ · 27 unmodified lines | ||
| 28 | 28 | * and don't forget to CC: the USB development list <linux-usb@vger.kernel.org> |
| 29 | 29 | */ |
| 30 | 30 | |
| 31 | +/* Reported-by: Julian Groß <julian.g@posteo.de> */ | |
| 32 | +UNUSUAL_DEV(0x059f, 0x105f, 0x0000, 0x9999, | |
| 33 | + "LaCie", | |
| 34 | + "2Big Quadra USB3", | |
| 35 | + USB_SC_DEVICE, USB_PR_DEVICE, NULL, | |
| 36 | + US_FL_NO_REPORT_OPCODES), | |
| 37 | + | |
| 31 | 38 | /* |
| 32 | 39 | * Apricorn USB3 dongle sometimes returns "USBSUSBSUSBS" in response to SCSI |
| 33 | 40 | * commands in UAS mode. Observed with the 1.28 firmware; are there others? |
| @@ -198,7 +198,10 @@ EXPORT_SYMBOL_GPL(typec_altmode_vdm); · 197 unmodified lines | ||
| 198 | 198 | const struct typec_altmode * |
| 199 | 199 | typec_altmode_get_partner(struct typec_altmode *adev) |
| 200 | 200 | { |
| 201 | − return adev ? &to_altmode(adev)->partner->adev : NULL; | |
| 201 | + if (!adev || !to_altmode(adev)->partner) | |
| 202 | + return NULL; | |
| 203 | + | |
| 204 | + return &to_altmode(adev)->partner->adev; | |
| 202 | 205 | } |
| 203 | 206 | EXPORT_SYMBOL_GPL(typec_altmode_get_partner); |
| 204 | 207 | |
| @@ -157,6 +157,10 @@ pmc_usb_mux_dp(struct pmc_usb_port *port, struct typec_mux_state *state) · 156 unmodified lines | ||
| 157 | 157 | req.mode_data |= (state->mode - TYPEC_STATE_MODAL) << |
| 158 | 158 | PMC_USB_ALTMODE_DP_MODE_SHIFT; |
| 159 | 159 | |
| 160 | + if (data->status & DP_STATUS_HPD_STATE) | |
| 161 | + req.mode_data |= PMC_USB_DP_HPD_LVL << | |
| 162 | + PMC_USB_ALTMODE_DP_MODE_SHIFT; | |
| 163 | + | |
| 160 | 164 | return pmc_usb_command(port, (void *)&req, sizeof(req)); |
| 161 | 165 | } |
| 162 | 166 | |
| @@ -298,11 +302,11 @@ static int pmc_usb_register_port(struct pmc_usb *pmc, int index, · 135 unmodified lines | ||
| 298 | 302 | struct typec_mux_desc mux_desc = { }; |
| 299 | 303 | int ret; |
| 300 | 304 | |
| 301 | − ret = fwnode_property_read_u8(fwnode, "usb2-port", &port->usb2_port); | |
| 305 | + ret = fwnode_property_read_u8(fwnode, "usb2-port-number", &port->usb2_port); | |
| 302 | 306 | if (ret) |
| 303 | 307 | return ret; |
| 304 | 308 | |
| 305 | − ret = fwnode_property_read_u8(fwnode, "usb3-port", &port->usb3_port); | |
| 309 | + ret = fwnode_property_read_u8(fwnode, "usb3-port-number", &port->usb3_port); | |
| 306 | 310 | if (ret) |
| 307 | 311 | return ret; |
| 308 | 312 | |
| @@ -114,8 +114,8 @@ pi3usb30532_mux_set(struct typec_mux *mux, struct typec_mux_state *state) · 113 unmodified lines | ||
| 114 | 114 | static int pi3usb30532_probe(struct i2c_client *client) |
| 115 | 115 | { |
| 116 | 116 | struct device *dev = &client->dev; |
| 117 | − struct typec_switch_desc sw_desc; | |
| 118 | − struct typec_mux_desc mux_desc; | |
| 117 | + struct typec_switch_desc sw_desc = { }; | |
| 118 | + struct typec_mux_desc mux_desc = { }; | |
| 119 | 119 | struct pi3usb30532 *pi; |
| 120 | 120 | int ret; |
| 121 | 121 | |
| @@ -3794,6 +3794,14 @@ static void _tcpm_cc_change(struct tcpm_port *port, enum typec_cc_status cc1, · 3793 unmodified lines | ||
| 3794 | 3794 | */ |
| 3795 | 3795 | break; |
| 3796 | 3796 | |
| 3797 | + case PORT_RESET: | |
| 3798 | + case PORT_RESET_WAIT_OFF: | |
| 3799 | + /* | |
| 3800 | + * State set back to default mode once the timer completes. | |
| 3801 | + * Ignore CC changes here. | |
| 3802 | + */ | |
| 3803 | + break; | |
| 3804 | + | |
| 3797 | 3805 | default: |
| 3798 | 3806 | if (tcpm_port_is_disconnected(port)) |
| 3799 | 3807 | tcpm_set_state(port, unattached_state(port), 0); |
| @@ -3855,6 +3863,15 @@ static void _tcpm_pd_vbus_on(struct tcpm_port *port) · 55 unmodified lines | ||
| 3855 | 3863 | case SRC_TRY_DEBOUNCE: |
| 3856 | 3864 | /* Do nothing, waiting for sink detection */ |
| 3857 | 3865 | break; |
| 3866 | + | |
| 3867 | + case PORT_RESET: | |
| 3868 | + case PORT_RESET_WAIT_OFF: | |
| 3869 | + /* | |
| 3870 | + * State set back to default mode once the timer completes. | |
| 3871 | + * Ignore vbus changes here. | |
| 3872 | + */ | |
| 3873 | + break; | |
| 3874 | + | |
| 3858 | 3875 | default: |
| 3859 | 3876 | break; |
| 3860 | 3877 | } |
| @@ -3908,10 +3925,19 @@ static void _tcpm_pd_vbus_off(struct tcpm_port *port) · 47 unmodified lines | ||
| 3908 | 3925 | case PORT_RESET_WAIT_OFF: |
| 3909 | 3926 | tcpm_set_state(port, tcpm_default_state(port), 0); |
| 3910 | 3927 | break; |
| 3928 | + | |
| 3911 | 3929 | case SRC_TRY_WAIT: |
| 3912 | 3930 | case SRC_TRY_DEBOUNCE: |
| 3913 | 3931 | /* Do nothing, waiting for sink detection */ |
| 3914 | 3932 | break; |
| 3933 | + | |
| 3934 | + case PORT_RESET: | |
| 3935 | + /* | |
| 3936 | + * State set back to default mode once the timer completes. | |
| 3937 | + * Ignore vbus changes here. | |
| 3938 | + */ | |
| 3939 | + break; | |
| 3940 | + | |
| 3915 | 3941 | default: |
| 3916 | 3942 | if (port->pwr_role == TYPEC_SINK && |
| 3917 | 3943 | port->attached) |
| @@ -1,21 +1,16 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | −config VDPA | |
| 3 | − tristate | |
| 2 | +menuconfig VDPA | |
| 3 | + tristate "vDPA drivers" | |
| 4 | 4 | help |
| 5 | 5 | Enable this module to support vDPA device that uses a |
| 6 | 6 | datapath which complies with virtio specifications with |
| 7 | 7 | vendor specific control path. |
| 8 | 8 | |
| 9 | −menuconfig VDPA_MENU | |
| 10 | − bool "VDPA drivers" | |
| 11 | − default n | |
| 12 | − | |
| 13 | −if VDPA_MENU | |
| 9 | +if VDPA | |
| 14 | 10 | |
| 15 | 11 | config VDPA_SIM |
| 16 | 12 | tristate "vDPA device simulator" |
| 17 | − depends on RUNTIME_TESTING_MENU | |
| 18 | − select VDPA | |
| 13 | + depends on RUNTIME_TESTING_MENU && HAS_DMA && VHOST_DPN | |
| 19 | 14 | select VHOST_RING |
| 20 | 15 | default n |
| 21 | 16 | help |
| @@ -24,9 +19,8 @@ config VDPA_SIM · 2 unmodified lines | ||
| 24 | 19 | development of vDPA. |
| 25 | 20 | |
| 26 | 21 | config IFCVF |
| 27 | − tristate "Intel IFC VF VDPA driver" | |
| 22 | + tristate "Intel IFC VF vDPA driver" | |
| 28 | 23 | depends on PCI_MSI |
| 29 | − select VDPA | |
| 30 | 24 | default n |
| 31 | 25 | help |
| 32 | 26 | This kernel module can drive Intel IFC VF NIC to offload |
| @@ -34,4 +28,4 @@ config IFCVF · 1 unmodified line | ||
| 34 | 28 | To compile this driver as a module, choose M here: the module will |
| 35 | 29 | be called ifcvf. |
| 36 | 30 | |
| 37 | −endif # VDPA_MENU | |
| 31 | +endif # VDPA | |
| @@ -301,12 +301,10 @@ int ifcvf_set_vq_state(struct ifcvf_hw *hw, u16 qid, u64 num) · 300 unmodified lines | ||
| 301 | 301 | |
| 302 | 302 | static int ifcvf_hw_enable(struct ifcvf_hw *hw) |
| 303 | 303 | { |
| 304 | − struct ifcvf_lm_cfg __iomem *ifcvf_lm; | |
| 305 | 304 | struct virtio_pci_common_cfg __iomem *cfg; |
| 306 | 305 | struct ifcvf_adapter *ifcvf; |
| 307 | 306 | u32 i; |
| 308 | 307 | |
| 309 | − ifcvf_lm = (struct ifcvf_lm_cfg __iomem *)hw->lm_cfg; | |
| 310 | 308 | ifcvf = vf_to_adapter(hw); |
| 311 | 309 | cfg = hw->common_cfg; |
| 312 | 310 | ifc_iowrite16(IFCVF_MSI_CONFIG_OFF, &cfg->msix_config); |
| @@ -31,11 +31,9 @@ static irqreturn_t ifcvf_intr_handler(int irq, void *arg) · 30 unmodified lines | ||
| 31 | 31 | static int ifcvf_start_datapath(void *private) |
| 32 | 32 | { |
| 33 | 33 | struct ifcvf_hw *vf = ifcvf_private_to_vf(private); |
| 34 | − struct ifcvf_adapter *ifcvf; | |
| 35 | 34 | u8 status; |
| 36 | 35 | int ret; |
| 37 | 36 | |
| 38 | − ifcvf = vf_to_adapter(vf); | |
| 39 | 37 | vf->nr_vring = IFCVF_MAX_QUEUE_PAIRS * 2; |
| 40 | 38 | ret = ifcvf_start_hw(vf); |
| 41 | 39 | if (ret < 0) { |
| @@ -228,7 +226,7 @@ static u32 ifcvf_vdpa_get_vendor_id(struct vdpa_device *vdpa_dev) · 186 unmodified lines | ||
| 228 | 226 | return IFCVF_SUBSYS_VENDOR_ID; |
| 229 | 227 | } |
| 230 | 228 | |
| 231 | −static u16 ifcvf_vdpa_get_vq_align(struct vdpa_device *vdpa_dev) | |
| 229 | +static u32 ifcvf_vdpa_get_vq_align(struct vdpa_device *vdpa_dev) | |
| 232 | 230 | { |
| 233 | 231 | return IFCVF_QUEUE_ALIGNMENT; |
| 234 | 232 | } |
| @@ -116,7 +116,7 @@ EXPORT_SYMBOL_GPL(__vdpa_alloc_device); · 115 unmodified lines | ||
| 116 | 116 | |
| 117 | 117 | /** |
| 118 | 118 | * vdpa_register_device - register a vDPA device |
| 119 | − * Callers must have a succeed call of vdpa_init_device() before. | |
| 119 | + * Callers must have a succeed call of vdpa_alloc_device() before. | |
| 120 | 120 | * @vdev: the vdpa device to be registered to vDPA bus |
| 121 | 121 | * |
| 122 | 122 | * Returns an error when fail to add to vDPA bus |
| @@ -435,7 +435,7 @@ static u64 vdpasim_get_vq_state(struct vdpa_device *vdpa, u16 idx) · 434 unmodified lines | ||
| 435 | 435 | return vrh->last_avail_idx; |
| 436 | 436 | } |
| 437 | 437 | |
| 438 | −static u16 vdpasim_get_vq_align(struct vdpa_device *vdpa) | |
| 438 | +static u32 vdpasim_get_vq_align(struct vdpa_device *vdpa) | |
| 439 | 439 | { |
| 440 | 440 | return VDPASIM_QUEUE_ALIGN; |
| 441 | 441 | } |
| @@ -488,7 +488,7 @@ static u8 vdpasim_get_status(struct vdpa_device *vdpa) · 46 unmodified lines | ||
| 488 | 488 | status = vdpasim->status; |
| 489 | 489 | spin_unlock(&vdpasim->lock); |
| 490 | 490 | |
| 491 | − return vdpasim->status; | |
| 491 | + return status; | |
| 492 | 492 | } |
| 493 | 493 | |
| 494 | 494 | static void vdpasim_set_status(struct vdpa_device *vdpa, u8 status) |
| @@ -342,8 +342,8 @@ static int vaddr_get_pfn(struct mm_struct *mm, unsigned long vaddr, · 341 unmodified lines | ||
| 342 | 342 | vma = find_vma_intersection(mm, vaddr, vaddr + 1); |
| 343 | 343 | |
| 344 | 344 | if (vma && vma->vm_flags & VM_PFNMAP) { |
| 345 | − *pfn = ((vaddr - vma->vm_start) >> PAGE_SHIFT) + vma->vm_pgoff; | |
| 346 | − if (is_invalid_reserved_pfn(*pfn)) | |
| 345 | + if (!follow_pfn(vma, vaddr, pfn) && | |
| 346 | + is_invalid_reserved_pfn(*pfn)) | |
| 347 | 347 | ret = 0; |
| 348 | 348 | } |
| 349 | 349 | done: |
| @@ -555,7 +555,7 @@ static int vfio_iommu_type1_pin_pages(void *iommu_data, · 205 unmodified lines | ||
| 555 | 555 | continue; |
| 556 | 556 | } |
| 557 | 557 | |
| 558 | − remote_vaddr = dma->vaddr + iova - dma->iova; | |
| 558 | + remote_vaddr = dma->vaddr + (iova - dma->iova); | |
| 559 | 559 | ret = vfio_pin_page_external(dma, remote_vaddr, &phys_pfn[i], |
| 560 | 560 | do_accounting); |
| 561 | 561 | if (ret) |
| @@ -2345,10 +2345,10 @@ static int vfio_iommu_type1_dma_rw_chunk(struct vfio_iommu *iommu, · 1783 unmodified lines | ||
| 2345 | 2345 | vaddr = dma->vaddr + offset; |
| 2346 | 2346 | |
| 2347 | 2347 | if (write) |
| 2348 | − *copied = __copy_to_user((void __user *)vaddr, data, | |
| 2348 | + *copied = copy_to_user((void __user *)vaddr, data, | |
| 2349 | 2349 | count) ? 0 : count; |
| 2350 | 2350 | else |
| 2351 | − *copied = __copy_from_user(data, (void __user *)vaddr, | |
| 2351 | + *copied = copy_from_user(data, (void __user *)vaddr, | |
| 2352 | 2352 | count) ? 0 : count; |
| 2353 | 2353 | if (kthread) |
| 2354 | 2354 | unuse_mm(mm); |
| @@ -3,6 +3,8 @@ config VHOST_IOTLB · 2 unmodified lines | ||
| 3 | 3 | tristate |
| 4 | 4 | help |
| 5 | 5 | Generic IOTLB implementation for vhost and vringh. |
| 6 | + This option is selected by any driver which needs to support | |
| 7 | + an IOMMU in software. | |
| 6 | 8 | |
| 7 | 9 | config VHOST_RING |
| 8 | 10 | tristate |
| @@ -11,6 +13,15 @@ config VHOST_RING · 2 unmodified lines | ||
| 11 | 13 | This option is selected by any driver which needs to access |
| 12 | 14 | the host side of a virtio ring. |
| 13 | 15 | |
| 16 | +config VHOST_DPN | |
| 17 | + bool | |
| 18 | + depends on !ARM || AEABI | |
| 19 | + default y | |
| 20 | + help | |
| 21 | + Anything selecting VHOST or VHOST_RING must depend on VHOST_DPN. | |
| 22 | + This excludes the deprecated ARM ABI since that forces a 4 byte | |
| 23 | + alignment on all structs - incompatible with virtio spec requirements. | |
| 24 | + | |
| 14 | 25 | config VHOST |
| 15 | 26 | tristate |
| 16 | 27 | select VHOST_IOTLB |
| @@ -26,7 +37,7 @@ if VHOST_MENU · 9 unmodified lines | ||
| 26 | 37 | |
| 27 | 38 | config VHOST_NET |
| 28 | 39 | tristate "Host kernel accelerator for virtio net" |
| 29 | − depends on NET && EVENTFD && (TUN || !TUN) && (TAP || !TAP) | |
| 40 | + depends on NET && EVENTFD && (TUN || !TUN) && (TAP || !TAP) && VHOST_DPN | |
| 30 | 41 | select VHOST |
| 31 | 42 | ---help--- |
| 32 | 43 | This kernel module can be loaded in host kernel to accelerate |
| @@ -38,7 +49,7 @@ config VHOST_NET · 5 unmodified lines | ||
| 38 | 49 | |
| 39 | 50 | config VHOST_SCSI |
| 40 | 51 | tristate "VHOST_SCSI TCM fabric driver" |
| 41 | − depends on TARGET_CORE && EVENTFD | |
| 52 | + depends on TARGET_CORE && EVENTFD && VHOST_DPN | |
| 42 | 53 | select VHOST |
| 43 | 54 | default n |
| 44 | 55 | ---help--- |
| @@ -47,7 +58,7 @@ config VHOST_SCSI · 2 unmodified lines | ||
| 47 | 58 | |
| 48 | 59 | config VHOST_VSOCK |
| 49 | 60 | tristate "vhost virtio-vsock driver" |
| 50 | − depends on VSOCKETS && EVENTFD | |
| 61 | + depends on VSOCKETS && EVENTFD && VHOST_DPN | |
| 51 | 62 | select VHOST |
| 52 | 63 | select VIRTIO_VSOCKETS_COMMON |
| 53 | 64 | default n |
| @@ -61,9 +72,9 @@ config VHOST_VSOCK · 7 unmodified lines | ||
| 61 | 72 | |
| 62 | 73 | config VHOST_VDPA |
| 63 | 74 | tristate "Vhost driver for vDPA-based backend" |
| 64 | − depends on EVENTFD | |
| 75 | + depends on EVENTFD && VHOST_DPN | |
| 65 | 76 | select VHOST |
| 66 | − select VDPA | |
| 77 | + depends on VDPA | |
| 67 | 78 | help |
| 68 | 79 | This kernel module can be loaded in host kernel to accelerate |
| 69 | 80 | guest virtio devices with the vDPA-based backends. |
| @@ -424,7 +424,7 @@ static void vhost_net_disable_vq(struct vhost_net *n, · 423 unmodified lines | ||
| 424 | 424 | struct vhost_net_virtqueue *nvq = |
| 425 | 425 | container_of(vq, struct vhost_net_virtqueue, vq); |
| 426 | 426 | struct vhost_poll *poll = n->poll + (nvq - n->vqs); |
| 427 | − if (!vq->private_data) | |
| 427 | + if (!vhost_vq_get_backend(vq)) | |
| 428 | 428 | return; |
| 429 | 429 | vhost_poll_stop(poll); |
| 430 | 430 | } |
| @@ -437,7 +437,7 @@ static int vhost_net_enable_vq(struct vhost_net *n, · 6 unmodified lines | ||
| 437 | 437 | struct vhost_poll *poll = n->poll + (nvq - n->vqs); |
| 438 | 438 | struct socket *sock; |
| 439 | 439 | |
| 440 | − sock = vq->private_data; | |
| 440 | + sock = vhost_vq_get_backend(vq); | |
| 441 | 441 | if (!sock) |
| 442 | 442 | return 0; |
| 443 | 443 | |
| @@ -524,7 +524,7 @@ static void vhost_net_busy_poll(struct vhost_net *net, · 80 unmodified lines | ||
| 524 | 524 | return; |
| 525 | 525 | |
| 526 | 526 | vhost_disable_notify(&net->dev, vq); |
| 527 | − sock = rvq->private_data; | |
| 527 | + sock = vhost_vq_get_backend(rvq); | |
| 528 | 528 | |
| 529 | 529 | busyloop_timeout = poll_rx ? rvq->busyloop_timeout: |
| 530 | 530 | tvq->busyloop_timeout; |
| @@ -570,8 +570,10 @@ static int vhost_net_tx_get_vq_desc(struct vhost_net *net, · 39 unmodified lines | ||
| 570 | 570 | |
| 571 | 571 | if (r == tvq->num && tvq->busyloop_timeout) { |
| 572 | 572 | /* Flush batched packets first */ |
| 573 | − if (!vhost_sock_zcopy(tvq->private_data)) | |
| 574 | − vhost_tx_batch(net, tnvq, tvq->private_data, msghdr); | |
| 573 | + if (!vhost_sock_zcopy(vhost_vq_get_backend(tvq))) | |
| 574 | + vhost_tx_batch(net, tnvq, | |
| 575 | + vhost_vq_get_backend(tvq), | |
| 576 | + msghdr); | |
| 575 | 577 | |
| 576 | 578 | vhost_net_busy_poll(net, rvq, tvq, busyloop_intr, false); |
| 577 | 579 | |
| @@ -685,7 +687,7 @@ static int vhost_net_build_xdp(struct vhost_net_virtqueue *nvq, · 107 unmodified lines | ||
| 685 | 687 | struct vhost_virtqueue *vq = &nvq->vq; |
| 686 | 688 | struct vhost_net *net = container_of(vq->dev, struct vhost_net, |
| 687 | 689 | dev); |
| 688 | − struct socket *sock = vq->private_data; | |
| 690 | + struct socket *sock = vhost_vq_get_backend(vq); | |
| 689 | 691 | struct page_frag *alloc_frag = &net->page_frag; |
| 690 | 692 | struct virtio_net_hdr *gso; |
| 691 | 693 | struct xdp_buff *xdp = &nvq->xdp[nvq->batched_xdp]; |
| @@ -952,7 +954,7 @@ static void handle_tx(struct vhost_net *net) · 260 unmodified lines | ||
| 952 | 954 | struct socket *sock; |
| 953 | 955 | |
| 954 | 956 | mutex_lock_nested(&vq->mutex, VHOST_NET_VQ_TX); |
| 955 | − sock = vq->private_data; | |
| 957 | + sock = vhost_vq_get_backend(vq); | |
| 956 | 958 | if (!sock) |
| 957 | 959 | goto out; |
| 958 | 960 | |
| @@ -1121,7 +1123,7 @@ static void handle_rx(struct vhost_net *net) · 162 unmodified lines | ||
| 1121 | 1123 | int recv_pkts = 0; |
| 1122 | 1124 | |
| 1123 | 1125 | mutex_lock_nested(&vq->mutex, VHOST_NET_VQ_RX); |
| 1124 | − sock = vq->private_data; | |
| 1126 | + sock = vhost_vq_get_backend(vq); | |
| 1125 | 1127 | if (!sock) |
| 1126 | 1128 | goto out; |
| 1127 | 1129 | |
| @@ -1345,9 +1347,9 @@ static struct socket *vhost_net_stop_vq(struct vhost_net *n, · 217 unmodified lines | ||
| 1345 | 1347 | container_of(vq, struct vhost_net_virtqueue, vq); |
| 1346 | 1348 | |
| 1347 | 1349 | mutex_lock(&vq->mutex); |
| 1348 | − sock = vq->private_data; | |
| 1350 | + sock = vhost_vq_get_backend(vq); | |
| 1349 | 1351 | vhost_net_disable_vq(n, vq); |
| 1350 | − vq->private_data = NULL; | |
| 1352 | + vhost_vq_set_backend(vq, NULL); | |
| 1351 | 1353 | vhost_net_buf_unproduce(nvq); |
| 1352 | 1354 | nvq->rx_ring = NULL; |
| 1353 | 1355 | mutex_unlock(&vq->mutex); |
| @@ -1521,7 +1523,7 @@ static long vhost_net_set_backend(struct vhost_net *n, unsigned index, int fd) · 167 unmodified lines | ||
| 1521 | 1523 | } |
| 1522 | 1524 | |
| 1523 | 1525 | /* start polling new socket */ |
| 1524 | − oldsock = vq->private_data; | |
| 1526 | + oldsock = vhost_vq_get_backend(vq); | |
| 1525 | 1527 | if (sock != oldsock) { |
| 1526 | 1528 | ubufs = vhost_net_ubuf_alloc(vq, |
| 1527 | 1529 | sock && vhost_sock_zcopy(sock)); |
| @@ -1531,7 +1533,7 @@ static long vhost_net_set_backend(struct vhost_net *n, unsigned index, int fd) · 3 unmodified lines | ||
| 1531 | 1533 | } |
| 1532 | 1534 | |
| 1533 | 1535 | vhost_net_disable_vq(n, vq); |
| 1534 | − vq->private_data = sock; | |
| 1536 | + vhost_vq_set_backend(vq, sock); | |
| 1535 | 1537 | vhost_net_buf_unproduce(nvq); |
| 1536 | 1538 | r = vhost_vq_init_access(vq); |
| 1537 | 1539 | if (r) |
| @@ -1568,7 +1570,7 @@ static long vhost_net_set_backend(struct vhost_net *n, unsigned index, int fd) · 30 unmodified lines | ||
| 1568 | 1570 | return 0; |
| 1569 | 1571 | |
| 1570 | 1572 | err_used: |
| 1571 | − vq->private_data = oldsock; | |
| 1573 | + vhost_vq_set_backend(vq, oldsock); | |
| 1572 | 1574 | vhost_net_enable_vq(n, vq); |
| 1573 | 1575 | if (ubufs) |
| 1574 | 1576 | vhost_net_ubuf_put_wait_and_free(ubufs); |
| @@ -452,7 +452,7 @@ vhost_scsi_do_evt_work(struct vhost_scsi *vs, struct vhost_scsi_evt *evt) · 451 unmodified lines | ||
| 452 | 452 | unsigned out, in; |
| 453 | 453 | int head, ret; |
| 454 | 454 | |
| 455 | − if (!vq->private_data) { | |
| 455 | + if (!vhost_vq_get_backend(vq)) { | |
| 456 | 456 | vs->vs_events_missed = true; |
| 457 | 457 | return; |
| 458 | 458 | } |
| @@ -892,7 +892,7 @@ vhost_scsi_get_req(struct vhost_virtqueue *vq, struct vhost_scsi_ctx *vc, · 433 unmodified lines | ||
| 892 | 892 | } else { |
| 893 | 893 | struct vhost_scsi_tpg **vs_tpg, *tpg; |
| 894 | 894 | |
| 895 | − vs_tpg = vq->private_data; /* validated at handler entry */ | |
| 895 | + vs_tpg = vhost_vq_get_backend(vq); /* validated at handler entry */ | |
| 896 | 896 | |
| 897 | 897 | tpg = READ_ONCE(vs_tpg[*vc->target]); |
| 898 | 898 | if (unlikely(!tpg)) { |
| @@ -929,7 +929,7 @@ vhost_scsi_handle_vq(struct vhost_scsi *vs, struct vhost_virtqueue *vq) · 30 unmodified lines | ||
| 929 | 929 | * We can handle the vq only after the endpoint is setup by calling the |
| 930 | 930 | * VHOST_SCSI_SET_ENDPOINT ioctl. |
| 931 | 931 | */ |
| 932 | − vs_tpg = vq->private_data; | |
| 932 | + vs_tpg = vhost_vq_get_backend(vq); | |
| 933 | 933 | if (!vs_tpg) |
| 934 | 934 | goto out; |
| 935 | 935 | |
| @@ -1184,7 +1184,7 @@ vhost_scsi_ctl_handle_vq(struct vhost_scsi *vs, struct vhost_virtqueue *vq) · 248 unmodified lines | ||
| 1184 | 1184 | * We can handle the vq only after the endpoint is setup by calling the |
| 1185 | 1185 | * VHOST_SCSI_SET_ENDPOINT ioctl. |
| 1186 | 1186 | */ |
| 1187 | − if (!vq->private_data) | |
| 1187 | + if (!vhost_vq_get_backend(vq)) | |
| 1188 | 1188 | goto out; |
| 1189 | 1189 | |
| 1190 | 1190 | memset(&vc, 0, sizeof(vc)); |
| @@ -1322,7 +1322,7 @@ static void vhost_scsi_evt_handle_kick(struct vhost_work *work) · 131 unmodified lines | ||
| 1322 | 1322 | struct vhost_scsi *vs = container_of(vq->dev, struct vhost_scsi, dev); |
| 1323 | 1323 | |
| 1324 | 1324 | mutex_lock(&vq->mutex); |
| 1325 | − if (!vq->private_data) | |
| 1325 | + if (!vhost_vq_get_backend(vq)) | |
| 1326 | 1326 | goto out; |
| 1327 | 1327 | |
| 1328 | 1328 | if (vs->vs_events_missed) |
| @@ -1460,7 +1460,7 @@ vhost_scsi_set_endpoint(struct vhost_scsi *vs, · 131 unmodified lines | ||
| 1460 | 1460 | for (i = 0; i < VHOST_SCSI_MAX_VQ; i++) { |
| 1461 | 1461 | vq = &vs->vqs[i].vq; |
| 1462 | 1462 | mutex_lock(&vq->mutex); |
| 1463 | − vq->private_data = vs_tpg; | |
| 1463 | + vhost_vq_set_backend(vq, vs_tpg); | |
| 1464 | 1464 | vhost_vq_init_access(vq); |
| 1465 | 1465 | mutex_unlock(&vq->mutex); |
| 1466 | 1466 | } |
| @@ -1547,7 +1547,7 @@ vhost_scsi_clear_endpoint(struct vhost_scsi *vs, · 80 unmodified lines | ||
| 1547 | 1547 | for (i = 0; i < VHOST_SCSI_MAX_VQ; i++) { |
| 1548 | 1548 | vq = &vs->vqs[i].vq; |
| 1549 | 1549 | mutex_lock(&vq->mutex); |
| 1550 | − vq->private_data = NULL; | |
| 1550 | + vhost_vq_set_backend(vq, NULL); | |
| 1551 | 1551 | mutex_unlock(&vq->mutex); |
| 1552 | 1552 | } |
| 1553 | 1553 | } |
| @@ -49,7 +49,7 @@ static void handle_vq(struct vhost_test *n) · 48 unmodified lines | ||
| 49 | 49 | void *private; |
| 50 | 50 | |
| 51 | 51 | mutex_lock(&vq->mutex); |
| 52 | − private = vq->private_data; | |
| 52 | + private = vhost_vq_get_backend(vq); | |
| 53 | 53 | if (!private) { |
| 54 | 54 | mutex_unlock(&vq->mutex); |
| 55 | 55 | return; |
| @@ -120,7 +120,7 @@ static int vhost_test_open(struct inode *inode, struct file *f) · 64 unmodified lines | ||
| 120 | 120 | vqs[VHOST_TEST_VQ] = &n->vqs[VHOST_TEST_VQ]; |
| 121 | 121 | n->vqs[VHOST_TEST_VQ].handle_kick = handle_vq_kick; |
| 122 | 122 | vhost_dev_init(dev, vqs, VHOST_TEST_VQ_MAX, UIO_MAXIOV, |
| 123 | − VHOST_TEST_PKT_WEIGHT, VHOST_TEST_WEIGHT); | |
| 123 | + VHOST_TEST_PKT_WEIGHT, VHOST_TEST_WEIGHT, NULL); | |
| 124 | 124 | |
| 125 | 125 | f->private_data = n; |
| 126 | 126 | |
| @@ -133,8 +133,8 @@ static void *vhost_test_stop_vq(struct vhost_test *n, · 6 unmodified lines | ||
| 133 | 133 | void *private; |
| 134 | 134 | |
| 135 | 135 | mutex_lock(&vq->mutex); |
| 136 | − private = vq->private_data; | |
| 137 | − vq->private_data = NULL; | |
| 136 | + private = vhost_vq_get_backend(vq); | |
| 137 | + vhost_vq_set_backend(vq, NULL); | |
| 138 | 138 | mutex_unlock(&vq->mutex); |
| 139 | 139 | return private; |
| 140 | 140 | } |
| @@ -198,8 +198,8 @@ static long vhost_test_run(struct vhost_test *n, int test) · 57 unmodified lines | ||
| 198 | 198 | priv = test ? n : NULL; |
| 199 | 199 | |
| 200 | 200 | /* start polling new socket */ |
| 201 | − oldpriv = vq->private_data; | |
| 202 | − vq->private_data = priv; | |
| 201 | + oldpriv = vhost_vq_get_backend(vq); | |
| 202 | + vhost_vq_set_backend(vq, priv); | |
| 203 | 203 | |
| 204 | 204 | r = vhost_vq_init_access(&n->vqs[index]); |
| 205 | 205 | |
| @@ -225,7 +225,7 @@ static long vhost_test_reset_owner(struct vhost_test *n) · 19 unmodified lines | ||
| 225 | 225 | { |
| 226 | 226 | void *priv = NULL; |
| 227 | 227 | long err; |
| 228 | − struct vhost_umem *umem; | |
| 228 | + struct vhost_iotlb *umem; | |
| 229 | 229 | |
| 230 | 230 | mutex_lock(&n->dev.mutex); |
| 231 | 231 | err = vhost_dev_check_owner(&n->dev); |
| @@ -296,7 +296,6 @@ static long vhost_vdpa_vring_ioctl(struct vhost_vdpa *v, unsigned int cmd, · 295 unmodified lines | ||
| 296 | 296 | struct vdpa_callback cb; |
| 297 | 297 | struct vhost_virtqueue *vq; |
| 298 | 298 | struct vhost_vring_state s; |
| 299 | − u8 status; | |
| 300 | 299 | u32 idx; |
| 301 | 300 | long r; |
| 302 | 301 | |
| @@ -310,8 +309,6 @@ static long vhost_vdpa_vring_ioctl(struct vhost_vdpa *v, unsigned int cmd, · 7 unmodified lines | ||
| 310 | 309 | idx = array_index_nospec(idx, v->nvqs); |
| 311 | 310 | vq = &v->vqs[idx]; |
| 312 | 311 | |
| 313 | − status = ops->get_status(vdpa); | |
| 314 | − | |
| 315 | 312 | if (cmd == VHOST_VDPA_SET_VRING_ENABLE) { |
| 316 | 313 | if (copy_from_user(&s, argp, sizeof(s))) |
| 317 | 314 | return -EFAULT; |
| @@ -678,8 +675,6 @@ static int vhost_vdpa_open(struct inode *inode, struct file *filep) · 360 unmodified lines | ||
| 678 | 675 | int nvqs, i, r, opened; |
| 679 | 676 | |
| 680 | 677 | v = container_of(inode->i_cdev, struct vhost_vdpa, cdev); |
| 681 | − if (!v) | |
| 682 | − return -ENODEV; | |
| 683 | 678 | |
| 684 | 679 | opened = atomic_cmpxchg(&v->opened, 0, 1); |
| 685 | 680 | if (opened) |
| @@ -231,6 +231,33 @@ enum { · 230 unmodified lines | ||
| 231 | 231 | (1ULL << VIRTIO_F_VERSION_1) |
| 232 | 232 | }; |
| 233 | 233 | |
| 234 | +/** | |
| 235 | + * vhost_vq_set_backend - Set backend. | |
| 236 | + * | |
| 237 | + * @vq Virtqueue. | |
| 238 | + * @private_data The private data. | |
| 239 | + * | |
| 240 | + * Context: Need to call with vq->mutex acquired. | |
| 241 | + */ | |
| 242 | +static inline void vhost_vq_set_backend(struct vhost_virtqueue *vq, | |
| 243 | + void *private_data) | |
| 244 | +{ | |
| 245 | + vq->private_data = private_data; | |
| 246 | +} | |
| 247 | + | |
| 248 | +/** | |
| 249 | + * vhost_vq_get_backend - Get backend. | |
| 250 | + * | |
| 251 | + * @vq Virtqueue. | |
| 252 | + * | |
| 253 | + * Context: Need to call with vq->mutex acquired. | |
| 254 | + * Return: Private data previously set with vhost_vq_set_backend. | |
| 255 | + */ | |
| 256 | +static inline void *vhost_vq_get_backend(struct vhost_virtqueue *vq) | |
| 257 | +{ | |
| 258 | + return vq->private_data; | |
| 259 | +} | |
| 260 | + | |
| 234 | 261 | static inline bool vhost_has_feature(struct vhost_virtqueue *vq, int bit) |
| 235 | 262 | { |
| 236 | 263 | return vq->acked_features & (1ULL << bit); |
| @@ -13,9 +13,11 @@ · 12 unmodified lines | ||
| 13 | 13 | #include <linux/uaccess.h> |
| 14 | 14 | #include <linux/slab.h> |
| 15 | 15 | #include <linux/export.h> |
| 16 | +#if IS_REACHABLE(CONFIG_VHOST_IOTLB) | |
| 16 | 17 | #include <linux/bvec.h> |
| 17 | 18 | #include <linux/highmem.h> |
| 18 | 19 | #include <linux/vhost_iotlb.h> |
| 20 | +#endif | |
| 19 | 21 | #include <uapi/linux/virtio_config.h> |
| 20 | 22 | |
| 21 | 23 | static __printf(1,2) __cold void vringh_bad(const char *fmt, ...) |
| @@ -1059,6 +1061,8 @@ int vringh_need_notify_kern(struct vringh *vrh) · 1037 unmodified lines | ||
| 1059 | 1061 | } |
| 1060 | 1062 | EXPORT_SYMBOL(vringh_need_notify_kern); |
| 1061 | 1063 | |
| 1064 | +#if IS_REACHABLE(CONFIG_VHOST_IOTLB) | |
| 1065 | + | |
| 1062 | 1066 | static int iotlb_translate(const struct vringh *vrh, |
| 1063 | 1067 | u64 addr, u64 len, struct bio_vec iov[], |
| 1064 | 1068 | int iov_size, u32 perm) |
| @@ -1416,5 +1420,6 @@ int vringh_need_notify_iotlb(struct vringh *vrh) · 351 unmodified lines | ||
| 1416 | 1420 | } |
| 1417 | 1421 | EXPORT_SYMBOL(vringh_need_notify_iotlb); |
| 1418 | 1422 | |
| 1423 | +#endif | |
| 1419 | 1424 | |
| 1420 | 1425 | MODULE_LICENSE("GPL"); |
| @@ -91,7 +91,7 @@ vhost_transport_do_send_pkt(struct vhost_vsock *vsock, · 90 unmodified lines | ||
| 91 | 91 | |
| 92 | 92 | mutex_lock(&vq->mutex); |
| 93 | 93 | |
| 94 | − if (!vq->private_data) | |
| 94 | + if (!vhost_vq_get_backend(vq)) | |
| 95 | 95 | goto out; |
| 96 | 96 | |
| 97 | 97 | /* Avoid further vmexits, we're already processing the virtqueue */ |
| @@ -181,14 +181,14 @@ vhost_transport_do_send_pkt(struct vhost_vsock *vsock, · 83 unmodified lines | ||
| 181 | 181 | break; |
| 182 | 182 | } |
| 183 | 183 | |
| 184 | − vhost_add_used(vq, head, sizeof(pkt->hdr) + payload_len); | |
| 185 | − added = true; | |
| 186 | − | |
| 187 | − /* Deliver to monitoring devices all correctly transmitted | |
| 188 | − * packets. | |
| 184 | + /* Deliver to monitoring devices all packets that we | |
| 185 | + * will transmit. | |
| 189 | 186 | */ |
| 190 | 187 | virtio_transport_deliver_tap_pkt(pkt); |
| 191 | 188 | |
| 189 | + vhost_add_used(vq, head, sizeof(pkt->hdr) + payload_len); | |
| 190 | + added = true; | |
| 191 | + | |
| 192 | 192 | pkt->off += payload_len; |
| 193 | 193 | total_len += payload_len; |
| 194 | 194 | |
| @@ -196,6 +196,12 @@ vhost_transport_do_send_pkt(struct vhost_vsock *vsock, · 1 unmodified line | ||
| 196 | 196 | * to send it with the next available buffer. |
| 197 | 197 | */ |
| 198 | 198 | if (pkt->off < pkt->len) { |
| 199 | + /* We are queueing the same virtio_vsock_pkt to handle | |
| 200 | + * the remaining bytes, and we want to deliver it | |
| 201 | + * to monitoring devices in the next iteration. | |
| 202 | + */ | |
| 203 | + pkt->tap_delivered = false; | |
| 204 | + | |
| 199 | 205 | spin_lock_bh(&vsock->send_pkt_list_lock); |
| 200 | 206 | list_add(&pkt->list, &vsock->send_pkt_list); |
| 201 | 207 | spin_unlock_bh(&vsock->send_pkt_list_lock); |
| @@ -440,7 +446,7 @@ static void vhost_vsock_handle_tx_kick(struct vhost_work *work) · 238 unmodified lines | ||
| 440 | 446 | |
| 441 | 447 | mutex_lock(&vq->mutex); |
| 442 | 448 | |
| 443 | − if (!vq->private_data) | |
| 449 | + if (!vhost_vq_get_backend(vq)) | |
| 444 | 450 | goto out; |
| 445 | 451 | |
| 446 | 452 | vhost_disable_notify(&vsock->dev, vq); |
| @@ -533,8 +539,8 @@ static int vhost_vsock_start(struct vhost_vsock *vsock) · 86 unmodified lines | ||
| 533 | 539 | goto err_vq; |
| 534 | 540 | } |
| 535 | 541 | |
| 536 | − if (!vq->private_data) { | |
| 537 | − vq->private_data = vsock; | |
| 542 | + if (!vhost_vq_get_backend(vq)) { | |
| 543 | + vhost_vq_set_backend(vq, vsock); | |
| 538 | 544 | ret = vhost_vq_init_access(vq); |
| 539 | 545 | if (ret) |
| 540 | 546 | goto err_vq; |
| @@ -543,18 +549,23 @@ static int vhost_vsock_start(struct vhost_vsock *vsock) · 2 unmodified lines | ||
| 543 | 549 | mutex_unlock(&vq->mutex); |
| 544 | 550 | } |
| 545 | 551 | |
| 552 | + /* Some packets may have been queued before the device was started, | |
| 553 | + * let's kick the send worker to send them. | |
| 554 | + */ | |
| 555 | + vhost_work_queue(&vsock->dev, &vsock->send_pkt_work); | |
| 556 | + | |
| 546 | 557 | mutex_unlock(&vsock->dev.mutex); |
| 547 | 558 | return 0; |
| 548 | 559 | |
| 549 | 560 | err_vq: |
| 550 | − vq->private_data = NULL; | |
| 561 | + vhost_vq_set_backend(vq, NULL); | |
| 551 | 562 | mutex_unlock(&vq->mutex); |
| 552 | 563 | |
| 553 | 564 | for (i = 0; i < ARRAY_SIZE(vsock->vqs); i++) { |
| 554 | 565 | vq = &vsock->vqs[i]; |
| 555 | 566 | |
| 556 | 567 | mutex_lock(&vq->mutex); |
| 557 | − vq->private_data = NULL; | |
| 568 | + vhost_vq_set_backend(vq, NULL); | |
| 558 | 569 | mutex_unlock(&vq->mutex); |
| 559 | 570 | } |
| 560 | 571 | err: |
| @@ -577,7 +588,7 @@ static int vhost_vsock_stop(struct vhost_vsock *vsock) · 16 unmodified lines | ||
| 577 | 588 | struct vhost_virtqueue *vq = &vsock->vqs[i]; |
| 578 | 589 | |
| 579 | 590 | mutex_lock(&vq->mutex); |
| 580 | − vq->private_data = NULL; | |
| 591 | + vhost_vq_set_backend(vq, NULL); | |
| 581 | 592 | mutex_unlock(&vq->mutex); |
| 582 | 593 | } |
| 583 | 594 | |
| @@ -45,7 +45,7 @@ config VIRTIO_PCI_LEGACY · 44 unmodified lines | ||
| 45 | 45 | |
| 46 | 46 | config VIRTIO_VDPA |
| 47 | 47 | tristate "vDPA driver for virtio devices" |
| 48 | − select VDPA | |
| 48 | + depends on VDPA | |
| 49 | 49 | select VIRTIO |
| 50 | 50 | help |
| 51 | 51 | This driver provides support for virtio based paravirtual |
| @@ -165,7 +165,7 @@ static void tell_host(struct virtio_balloon *vb, struct virtqueue *vq) · 164 unmodified lines | ||
| 165 | 165 | |
| 166 | 166 | } |
| 167 | 167 | |
| 168 | −int virtballoon_free_page_report(struct page_reporting_dev_info *pr_dev_info, | |
| 168 | +static int virtballoon_free_page_report(struct page_reporting_dev_info *pr_dev_info, | |
| 169 | 169 | struct scatterlist *sg, unsigned int nents) |
| 170 | 170 | { |
| 171 | 171 | struct virtio_balloon *vb = |
| @@ -580,7 +580,7 @@ static u32 virtio_balloon_cmd_id_received(struct virtio_balloon *vb) · 408 unmodified lines | ||
| 580 | 580 | if (test_and_clear_bit(VIRTIO_BALLOON_CONFIG_READ_CMD_ID, |
| 581 | 581 | &vb->config_read_bitmap)) |
| 582 | 582 | virtio_cread(vb->vdev, struct virtio_balloon_config, |
| 583 | − free_page_report_cmd_id, | |
| 583 | + free_page_hint_cmd_id, | |
| 584 | 584 | &vb->cmd_id_received_cache); |
| 585 | 585 | |
| 586 | 586 | return vb->cmd_id_received_cache; |
| @@ -3,6 +3,7 @@ · 2 unmodified lines | ||
| 3 | 3 | #include <linux/virtio.h> |
| 4 | 4 | #include <linux/virtio_config.h> |
| 5 | 5 | #include <linux/input.h> |
| 6 | +#include <linux/slab.h> | |
| 6 | 7 | |
| 7 | 8 | #include <uapi/linux/virtio_ids.h> |
| 8 | 9 | #include <uapi/linux/virtio_input.h> |
| @@ -169,7 +169,7 @@ static int afs_record_cm_probe(struct afs_call *call, struct afs_server *server) · 168 unmodified lines | ||
| 169 | 169 | |
| 170 | 170 | spin_lock(&server->probe_lock); |
| 171 | 171 | |
| 172 | − if (!test_bit(AFS_SERVER_FL_HAVE_EPOCH, &server->flags)) { | |
| 172 | + if (!test_and_set_bit(AFS_SERVER_FL_HAVE_EPOCH, &server->flags)) { | |
| 173 | 173 | server->cm_epoch = call->epoch; |
| 174 | 174 | server->probe.cm_epoch = call->epoch; |
| 175 | 175 | goto out; |
| @@ -117,11 +117,8 @@ out: · 116 unmodified lines | ||
| 117 | 117 | (unsigned int)rtt, ret); |
| 118 | 118 | |
| 119 | 119 | have_result |= afs_fs_probe_done(server); |
| 120 | − if (have_result) { | |
| 121 | − server->probe.have_result = true; | |
| 122 | − wake_up_var(&server->probe.have_result); | |
| 120 | + if (have_result) | |
| 123 | 121 | wake_up_all(&server->probe_wq); |
| 124 | − } | |
| 125 | 122 | } |
| 126 | 123 | |
| 127 | 124 | /* |
| @@ -533,12 +533,10 @@ struct afs_server { · 532 unmodified lines | ||
| 533 | 533 | u32 abort_code; |
| 534 | 534 | u32 cm_epoch; |
| 535 | 535 | short error; |
| 536 | − bool have_result; | |
| 537 | 536 | bool responded:1; |
| 538 | 537 | bool is_yfs:1; |
| 539 | 538 | bool not_yfs:1; |
| 540 | 539 | bool local_failure:1; |
| 541 | − bool no_epoch:1; | |
| 542 | 540 | bool cm_probed:1; |
| 543 | 541 | bool said_rebooted:1; |
| 544 | 542 | bool said_inconsistent:1; |
| @@ -1335,7 +1333,7 @@ extern struct afs_volume *afs_create_volume(struct afs_fs_context *); · 790 unmodified lines | ||
| 1335 | 1333 | extern void afs_activate_volume(struct afs_volume *); |
| 1336 | 1334 | extern void afs_deactivate_volume(struct afs_volume *); |
| 1337 | 1335 | extern void afs_put_volume(struct afs_cell *, struct afs_volume *); |
| 1338 | −extern int afs_check_volume_status(struct afs_volume *, struct key *); | |
| 1336 | +extern int afs_check_volume_status(struct afs_volume *, struct afs_fs_cursor *); | |
| 1339 | 1337 | |
| 1340 | 1338 | /* |
| 1341 | 1339 | * write.c |
| @@ -192,7 +192,7 @@ bool afs_select_fileserver(struct afs_fs_cursor *fc) · 191 unmodified lines | ||
| 192 | 192 | write_unlock(&vnode->volume->servers_lock); |
| 193 | 193 | |
| 194 | 194 | set_bit(AFS_VOLUME_NEEDS_UPDATE, &vnode->volume->flags); |
| 195 | − error = afs_check_volume_status(vnode->volume, fc->key); | |
| 195 | + error = afs_check_volume_status(vnode->volume, fc); | |
| 196 | 196 | if (error < 0) |
| 197 | 197 | goto failed_set_error; |
| 198 | 198 | |
| @@ -281,7 +281,7 @@ bool afs_select_fileserver(struct afs_fs_cursor *fc) · 82 unmodified lines | ||
| 281 | 281 | |
| 282 | 282 | set_bit(AFS_VOLUME_WAIT, &vnode->volume->flags); |
| 283 | 283 | set_bit(AFS_VOLUME_NEEDS_UPDATE, &vnode->volume->flags); |
| 284 | − error = afs_check_volume_status(vnode->volume, fc->key); | |
| 284 | + error = afs_check_volume_status(vnode->volume, fc); | |
| 285 | 285 | if (error < 0) |
| 286 | 286 | goto failed_set_error; |
| 287 | 287 | |
| @@ -341,7 +341,7 @@ start: · 53 unmodified lines | ||
| 341 | 341 | /* See if we need to do an update of the volume record. Note that the |
| 342 | 342 | * volume may have moved or even have been deleted. |
| 343 | 343 | */ |
| 344 | − error = afs_check_volume_status(vnode->volume, fc->key); | |
| 344 | + error = afs_check_volume_status(vnode->volume, fc); | |
| 345 | 345 | if (error < 0) |
| 346 | 346 | goto failed_set_error; |
| 347 | 347 | |
| @@ -594,12 +594,9 @@ retry: · 593 unmodified lines | ||
| 594 | 594 | } |
| 595 | 595 | |
| 596 | 596 | ret = wait_on_bit(&server->flags, AFS_SERVER_FL_UPDATING, |
| 597 | − TASK_INTERRUPTIBLE); | |
| 597 | + (fc->flags & AFS_FS_CURSOR_INTR) ? | |
| 598 | + TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE); | |
| 598 | 599 | if (ret == -ERESTARTSYS) { |
| 599 | − if (!(fc->flags & AFS_FS_CURSOR_INTR) && server->addresses) { | |
| 600 | − _leave(" = t [intr]"); | |
| 601 | − return true; | |
| 602 | − } | |
| 603 | 600 | fc->error = ret; |
| 604 | 601 | _leave(" = f [intr]"); |
| 605 | 602 | return false; |
| @@ -302,8 +302,8 @@ static void afs_vl_dump_edestaddrreq(const struct afs_vl_cursor *vc) · 301 unmodified lines | ||
| 302 | 302 | pr_notice("VC: - nr=%u/%u/%u pf=%u\n", |
| 303 | 303 | a->nr_ipv4, a->nr_addrs, a->max_addrs, |
| 304 | 304 | a->preferred); |
| 305 | − pr_notice("VC: - pr=%lx R=%lx F=%lx\n", | |
| 306 | − a->probed, a->responded, a->failed); | |
| 305 | + pr_notice("VC: - R=%lx F=%lx\n", | |
| 306 | + a->responded, a->failed); | |
| 307 | 307 | if (a == vc->ac.alist) |
| 308 | 308 | pr_notice("VC: - current\n"); |
| 309 | 309 | } |
| @@ -281,7 +281,7 @@ error: · 280 unmodified lines | ||
| 281 | 281 | /* |
| 282 | 282 | * Make sure the volume record is up to date. |
| 283 | 283 | */ |
| 284 | −int afs_check_volume_status(struct afs_volume *volume, struct key *key) | |
| 284 | +int afs_check_volume_status(struct afs_volume *volume, struct afs_fs_cursor *fc) | |
| 285 | 285 | { |
| 286 | 286 | time64_t now = ktime_get_real_seconds(); |
| 287 | 287 | int ret, retries = 0; |
| @@ -299,7 +299,7 @@ retry: · 11 unmodified lines | ||
| 299 | 299 | } |
| 300 | 300 | |
| 301 | 301 | if (!test_and_set_bit_lock(AFS_VOLUME_UPDATING, &volume->flags)) { |
| 302 | − ret = afs_update_volume_status(volume, key); | |
| 302 | + ret = afs_update_volume_status(volume, fc->key); | |
| 303 | 303 | clear_bit_unlock(AFS_VOLUME_WAIT, &volume->flags); |
| 304 | 304 | clear_bit_unlock(AFS_VOLUME_UPDATING, &volume->flags); |
| 305 | 305 | wake_up_bit(&volume->flags, AFS_VOLUME_WAIT); |
| @@ -312,7 +312,9 @@ retry: · 6 unmodified lines | ||
| 312 | 312 | return 0; |
| 313 | 313 | } |
| 314 | 314 | |
| 315 | − ret = wait_on_bit(&volume->flags, AFS_VOLUME_WAIT, TASK_INTERRUPTIBLE); | |
| 315 | + ret = wait_on_bit(&volume->flags, AFS_VOLUME_WAIT, | |
| 316 | + (fc->flags & AFS_FS_CURSOR_INTR) ? | |
| 317 | + TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE); | |
| 316 | 318 | if (ret == -ERESTARTSYS) { |
| 317 | 319 | _leave(" = %d", ret); |
| 318 | 320 | return ret; |
| @@ -19,7 +19,6 @@ · 18 unmodified lines | ||
| 19 | 19 | #include <linux/module.h> |
| 20 | 20 | #include <linux/blkpg.h> |
| 21 | 21 | #include <linux/magic.h> |
| 22 | −#include <linux/dax.h> | |
| 23 | 22 | #include <linux/buffer_head.h> |
| 24 | 23 | #include <linux/swap.h> |
| 25 | 24 | #include <linux/pagevec.h> |
| @@ -1893,6 +1892,16 @@ static void __blkdev_put(struct block_device *bdev, fmode_t mode, int for_part) · 1867 unmodified lines | ||
| 1893 | 1892 | struct gendisk *disk = bdev->bd_disk; |
| 1894 | 1893 | struct block_device *victim = NULL; |
| 1895 | 1894 | |
| 1895 | + /* | |
| 1896 | + * Sync early if it looks like we're the last one. If someone else | |
| 1897 | + * opens the block device between now and the decrement of bd_openers | |
| 1898 | + * then we did a sync that we didn't need to, but that's not the end | |
| 1899 | + * of the world and we want to avoid long (could be several minute) | |
| 1900 | + * syncs while holding the mutex. | |
| 1901 | + */ | |
| 1902 | + if (bdev->bd_openers == 1) | |
| 1903 | + sync_blockdev(bdev); | |
| 1904 | + | |
| 1896 | 1905 | mutex_lock_nested(&bdev->bd_mutex, for_part); |
| 1897 | 1906 | if (for_part) |
| 1898 | 1907 | bdev->bd_part_count--; |
| @@ -391,7 +391,7 @@ static int is_shared_data_backref(struct preftrees *preftrees, u64 bytenr) · 390 unmodified lines | ||
| 391 | 391 | struct rb_node **p = &preftrees->direct.root.rb_root.rb_node; |
| 392 | 392 | struct rb_node *parent = NULL; |
| 393 | 393 | struct prelim_ref *ref = NULL; |
| 394 | − struct prelim_ref target = {0}; | |
| 394 | + struct prelim_ref target = {}; | |
| 395 | 395 | int result; |
| 396 | 396 | |
| 397 | 397 | target.parent = bytenr; |
| @@ -916,7 +916,7 @@ int btrfs_remove_block_group(struct btrfs_trans_handle *trans, · 915 unmodified lines | ||
| 916 | 916 | path = btrfs_alloc_path(); |
| 917 | 917 | if (!path) { |
| 918 | 918 | ret = -ENOMEM; |
| 919 | − goto out; | |
| 919 | + goto out_put_group; | |
| 920 | 920 | } |
| 921 | 921 | |
| 922 | 922 | /* |
| @@ -954,7 +954,7 @@ int btrfs_remove_block_group(struct btrfs_trans_handle *trans, · 31 unmodified lines | ||
| 954 | 954 | ret = btrfs_orphan_add(trans, BTRFS_I(inode)); |
| 955 | 955 | if (ret) { |
| 956 | 956 | btrfs_add_delayed_iput(inode); |
| 957 | − goto out; | |
| 957 | + goto out_put_group; | |
| 958 | 958 | } |
| 959 | 959 | clear_nlink(inode); |
| 960 | 960 | /* One for the block groups ref */ |
| @@ -977,13 +977,13 @@ int btrfs_remove_block_group(struct btrfs_trans_handle *trans, · 16 unmodified lines | ||
| 977 | 977 | |
| 978 | 978 | ret = btrfs_search_slot(trans, tree_root, &key, path, -1, 1); |
| 979 | 979 | if (ret < 0) |
| 980 | − goto out; | |
| 980 | + goto out_put_group; | |
| 981 | 981 | if (ret > 0) |
| 982 | 982 | btrfs_release_path(path); |
| 983 | 983 | if (ret == 0) { |
| 984 | 984 | ret = btrfs_del_item(trans, tree_root, path); |
| 985 | 985 | if (ret) |
| 986 | − goto out; | |
| 986 | + goto out_put_group; | |
| 987 | 987 | btrfs_release_path(path); |
| 988 | 988 | } |
| 989 | 989 | |
| @@ -1102,9 +1102,9 @@ int btrfs_remove_block_group(struct btrfs_trans_handle *trans, · 112 unmodified lines | ||
| 1102 | 1102 | |
| 1103 | 1103 | ret = remove_block_group_free_space(trans, block_group); |
| 1104 | 1104 | if (ret) |
| 1105 | − goto out; | |
| 1105 | + goto out_put_group; | |
| 1106 | 1106 | |
| 1107 | − btrfs_put_block_group(block_group); | |
| 1107 | + /* Once for the block groups rbtree */ | |
| 1108 | 1108 | btrfs_put_block_group(block_group); |
| 1109 | 1109 | |
| 1110 | 1110 | ret = btrfs_search_slot(trans, root, &key, path, -1, 1); |
| @@ -1127,6 +1127,10 @@ int btrfs_remove_block_group(struct btrfs_trans_handle *trans, · 16 unmodified lines | ||
| 1127 | 1127 | /* once for the tree */ |
| 1128 | 1128 | free_extent_map(em); |
| 1129 | 1129 | } |
| 1130 | + | |
| 1131 | +out_put_group: | |
| 1132 | + /* Once for the lookup reference */ | |
| 1133 | + btrfs_put_block_group(block_group); | |
| 1130 | 1134 | out: |
| 1131 | 1135 | if (remove_rsv) |
| 1132 | 1136 | btrfs_delayed_refs_rsv_release(fs_info, 1); |
| @@ -1288,11 +1292,15 @@ static bool clean_pinned_extents(struct btrfs_trans_handle *trans, · 155 unmodified lines | ||
| 1288 | 1292 | if (ret) |
| 1289 | 1293 | goto err; |
| 1290 | 1294 | mutex_unlock(&fs_info->unused_bg_unpin_mutex); |
| 1295 | + if (prev_trans) | |
| 1296 | + btrfs_put_transaction(prev_trans); | |
| 1291 | 1297 | |
| 1292 | 1298 | return true; |
| 1293 | 1299 | |
| 1294 | 1300 | err: |
| 1295 | 1301 | mutex_unlock(&fs_info->unused_bg_unpin_mutex); |
| 1302 | + if (prev_trans) | |
| 1303 | + btrfs_put_transaction(prev_trans); | |
| 1296 | 1304 | btrfs_dec_block_group_ro(bg); |
| 1297 | 1305 | return false; |
| 1298 | 1306 | } |
| @@ -1,4 +1,4 @@ | ||
| 1 | −// SPDX-License-Identifier: GPL-2.0 | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 */ | |
| 2 | 2 | |
| 3 | 3 | #ifndef BTRFS_DISCARD_H |
| 4 | 4 | #define BTRFS_DISCARD_H |
| @@ -2036,9 +2036,6 @@ void btrfs_free_fs_roots(struct btrfs_fs_info *fs_info) · 2035 unmodified lines | ||
| 2036 | 2036 | for (i = 0; i < ret; i++) |
| 2037 | 2037 | btrfs_drop_and_free_fs_root(fs_info, gang[i]); |
| 2038 | 2038 | } |
| 2039 | − | |
| 2040 | − if (test_bit(BTRFS_FS_STATE_ERROR, &fs_info->fs_state)) | |
| 2041 | − btrfs_free_log_root_tree(NULL, fs_info); | |
| 2042 | 2039 | } |
| 2043 | 2040 | |
| 2044 | 2041 | static void btrfs_init_scrub(struct btrfs_fs_info *fs_info) |
| @@ -3888,7 +3885,7 @@ void btrfs_drop_and_free_fs_root(struct btrfs_fs_info *fs_info, · 1843 unmodified lines | ||
| 3888 | 3885 | spin_unlock(&fs_info->fs_roots_radix_lock); |
| 3889 | 3886 | |
| 3890 | 3887 | if (test_bit(BTRFS_FS_STATE_ERROR, &fs_info->fs_state)) { |
| 3891 | − btrfs_free_log(NULL, root); | |
| 3888 | + ASSERT(root->log_root == NULL); | |
| 3892 | 3889 | if (root->reloc_root) { |
| 3893 | 3890 | btrfs_put_root(root->reloc_root); |
| 3894 | 3891 | root->reloc_root = NULL; |
| @@ -4211,6 +4208,36 @@ static void btrfs_error_commit_super(struct btrfs_fs_info *fs_info) · 316 unmodified lines | ||
| 4211 | 4208 | up_write(&fs_info->cleanup_work_sem); |
| 4212 | 4209 | } |
| 4213 | 4210 | |
| 4211 | +static void btrfs_drop_all_logs(struct btrfs_fs_info *fs_info) | |
| 4212 | +{ | |
| 4213 | + struct btrfs_root *gang[8]; | |
| 4214 | + u64 root_objectid = 0; | |
| 4215 | + int ret; | |
| 4216 | + | |
| 4217 | + spin_lock(&fs_info->fs_roots_radix_lock); | |
| 4218 | + while ((ret = radix_tree_gang_lookup(&fs_info->fs_roots_radix, | |
| 4219 | + (void **)gang, root_objectid, | |
| 4220 | + ARRAY_SIZE(gang))) != 0) { | |
| 4221 | + int i; | |
| 4222 | + | |
| 4223 | + for (i = 0; i < ret; i++) | |
| 4224 | + gang[i] = btrfs_grab_root(gang[i]); | |
| 4225 | + spin_unlock(&fs_info->fs_roots_radix_lock); | |
| 4226 | + | |
| 4227 | + for (i = 0; i < ret; i++) { | |
| 4228 | + if (!gang[i]) | |
| 4229 | + continue; | |
| 4230 | + root_objectid = gang[i]->root_key.objectid; | |
| 4231 | + btrfs_free_log(NULL, gang[i]); | |
| 4232 | + btrfs_put_root(gang[i]); | |
| 4233 | + } | |
| 4234 | + root_objectid++; | |
| 4235 | + spin_lock(&fs_info->fs_roots_radix_lock); | |
| 4236 | + } | |
| 4237 | + spin_unlock(&fs_info->fs_roots_radix_lock); | |
| 4238 | + btrfs_free_log_root_tree(NULL, fs_info); | |
| 4239 | +} | |
| 4240 | + | |
| 4214 | 4241 | static void btrfs_destroy_ordered_extents(struct btrfs_root *root) |
| 4215 | 4242 | { |
| 4216 | 4243 | struct btrfs_ordered_extent *ordered; |
| @@ -4603,6 +4630,7 @@ static int btrfs_cleanup_transaction(struct btrfs_fs_info *fs_info) · 386 unmodified lines | ||
| 4603 | 4630 | btrfs_destroy_delayed_inodes(fs_info); |
| 4604 | 4631 | btrfs_assert_delayed_root_empty(fs_info); |
| 4605 | 4632 | btrfs_destroy_all_delalloc_inodes(fs_info); |
| 4633 | + btrfs_drop_all_logs(fs_info); | |
| 4606 | 4634 | mutex_unlock(&fs_info->transaction_kthread_mutex); |
| 4607 | 4635 | |
| 4608 | 4636 | return 0; |
| @@ -4559,6 +4559,7 @@ int btrfs_recover_relocation(struct btrfs_root *root) · 4558 unmodified lines | ||
| 4559 | 4559 | if (IS_ERR(fs_root)) { |
| 4560 | 4560 | err = PTR_ERR(fs_root); |
| 4561 | 4561 | list_add_tail(&reloc_root->root_list, &reloc_roots); |
| 4562 | + btrfs_end_transaction(trans); | |
| 4562 | 4563 | goto out_unset; |
| 4563 | 4564 | } |
| 4564 | 4565 | |
| @@ -662,10 +662,19 @@ again: · 661 unmodified lines | ||
| 662 | 662 | } |
| 663 | 663 | |
| 664 | 664 | got_it: |
| 665 | − btrfs_record_root_in_trans(h, root); | |
| 666 | − | |
| 667 | 665 | if (!current->journal_info) |
| 668 | 666 | current->journal_info = h; |
| 667 | + | |
| 668 | + /* | |
| 669 | + * btrfs_record_root_in_trans() needs to alloc new extents, and may | |
| 670 | + * call btrfs_join_transaction() while we're also starting a | |
| 671 | + * transaction. | |
| 672 | + * | |
| 673 | + * Thus it need to be called after current->journal_info initialized, | |
| 674 | + * or we can deadlock. | |
| 675 | + */ | |
| 676 | + btrfs_record_root_in_trans(h, root); | |
| 677 | + | |
| 669 | 678 | return h; |
| 670 | 679 | |
| 671 | 680 | join_fail: |
| @@ -4226,6 +4226,9 @@ static int btrfs_log_prealloc_extents(struct btrfs_trans_handle *trans, · 4225 unmodified lines | ||
| 4226 | 4226 | const u64 ino = btrfs_ino(inode); |
| 4227 | 4227 | struct btrfs_path *dst_path = NULL; |
| 4228 | 4228 | bool dropped_extents = false; |
| 4229 | + u64 truncate_offset = i_size; | |
| 4230 | + struct extent_buffer *leaf; | |
| 4231 | + int slot; | |
| 4229 | 4232 | int ins_nr = 0; |
| 4230 | 4233 | int start_slot; |
| 4231 | 4234 | int ret; |
| @@ -4240,9 +4243,43 @@ static int btrfs_log_prealloc_extents(struct btrfs_trans_handle *trans, · 8 unmodified lines | ||
| 4240 | 4243 | if (ret < 0) |
| 4241 | 4244 | goto out; |
| 4242 | 4245 | |
| 4246 | + /* | |
| 4247 | + * We must check if there is a prealloc extent that starts before the | |
| 4248 | + * i_size and crosses the i_size boundary. This is to ensure later we | |
| 4249 | + * truncate down to the end of that extent and not to the i_size, as | |
| 4250 | + * otherwise we end up losing part of the prealloc extent after a log | |
| 4251 | + * replay and with an implicit hole if there is another prealloc extent | |
| 4252 | + * that starts at an offset beyond i_size. | |
| 4253 | + */ | |
| 4254 | + ret = btrfs_previous_item(root, path, ino, BTRFS_EXTENT_DATA_KEY); | |
| 4255 | + if (ret < 0) | |
| 4256 | + goto out; | |
| 4257 | + | |
| 4258 | + if (ret == 0) { | |
| 4259 | + struct btrfs_file_extent_item *ei; | |
| 4260 | + | |
| 4261 | + leaf = path->nodes[0]; | |
| 4262 | + slot = path->slots[0]; | |
| 4263 | + ei = btrfs_item_ptr(leaf, slot, struct btrfs_file_extent_item); | |
| 4264 | + | |
| 4265 | + if (btrfs_file_extent_type(leaf, ei) == | |
| 4266 | + BTRFS_FILE_EXTENT_PREALLOC) { | |
| 4267 | + u64 extent_end; | |
| 4268 | + | |
| 4269 | + btrfs_item_key_to_cpu(leaf, &key, slot); | |
| 4270 | + extent_end = key.offset + | |
| 4271 | + btrfs_file_extent_num_bytes(leaf, ei); | |
| 4272 | + | |
| 4273 | + if (extent_end > i_size) | |
| 4274 | + truncate_offset = extent_end; | |
| 4275 | + } | |
| 4276 | + } else { | |
| 4277 | + ret = 0; | |
| 4278 | + } | |
| 4279 | + | |
| 4243 | 4280 | while (true) { |
| 4244 | − struct extent_buffer *leaf = path->nodes[0]; | |
| 4245 | − int slot = path->slots[0]; | |
| 4281 | + leaf = path->nodes[0]; | |
| 4282 | + slot = path->slots[0]; | |
| 4246 | 4283 | |
| 4247 | 4284 | if (slot >= btrfs_header_nritems(leaf)) { |
| 4248 | 4285 | if (ins_nr > 0) { |
| @@ -4280,7 +4317,7 @@ static int btrfs_log_prealloc_extents(struct btrfs_trans_handle *trans, · 31 unmodified lines | ||
| 4280 | 4317 | ret = btrfs_truncate_inode_items(trans, |
| 4281 | 4318 | root->log_root, |
| 4282 | 4319 | &inode->vfs_inode, |
| 4283 | − i_size, | |
| 4320 | + truncate_offset, | |
| 4284 | 4321 | BTRFS_EXTENT_DATA_KEY); |
| 4285 | 4322 | } while (ret == -EAGAIN); |
| 4286 | 4323 | if (ret) |
| @@ -967,7 +967,7 @@ grow_dev_page(struct block_device *bdev, sector_t block, · 966 unmodified lines | ||
| 967 | 967 | struct page *page; |
| 968 | 968 | struct buffer_head *bh; |
| 969 | 969 | sector_t end_block; |
| 970 | − int ret = 0; /* Will call free_more_memory() */ | |
| 970 | + int ret = 0; | |
| 971 | 971 | gfp_t gfp_mask; |
| 972 | 972 | |
| 973 | 973 | gfp_mask = mapping_gfp_constraint(inode->i_mapping, ~__GFP_FS) | gfp; |
| @@ -2749,7 +2749,7 @@ int ceph_try_get_caps(struct inode *inode, int need, int want, · 2748 unmodified lines | ||
| 2749 | 2749 | |
| 2750 | 2750 | ret = try_get_cap_refs(inode, need, want, 0, flags, got); |
| 2751 | 2751 | /* three special error codes */ |
| 2752 | − if (ret == -EAGAIN || ret == -EFBIG || ret == -EAGAIN) | |
| 2752 | + if (ret == -EAGAIN || ret == -EFBIG || ret == -ESTALE) | |
| 2753 | 2753 | ret = 0; |
| 2754 | 2754 | return ret; |
| 2755 | 2755 | } |
| @@ -3746,6 +3746,7 @@ retry: · 990 unmodified lines | ||
| 3746 | 3746 | WARN_ON(1); |
| 3747 | 3747 | tsession = NULL; |
| 3748 | 3748 | target = -1; |
| 3749 | + mutex_lock(&session->s_mutex); | |
| 3749 | 3750 | } |
| 3750 | 3751 | goto retry; |
| 3751 | 3752 | |
| @@ -271,7 +271,7 @@ void ceph_fs_debugfs_init(struct ceph_fs_client *fsc) · 270 unmodified lines | ||
| 271 | 271 | &congestion_kb_fops); |
| 272 | 272 | |
| 273 | 273 | snprintf(name, sizeof(name), "../../bdi/%s", |
| 274 | − dev_name(fsc->sb->s_bdi->dev)); | |
| 274 | + bdi_dev_name(fsc->sb->s_bdi)); | |
| 275 | 275 | fsc->debugfs_bdi = |
| 276 | 276 | debugfs_create_symlink("bdi", |
| 277 | 277 | fsc->client->debugfs_dir, |
| @@ -3251,8 +3251,7 @@ static void handle_session(struct ceph_mds_session *session, · 3250 unmodified lines | ||
| 3251 | 3251 | void *end = p + msg->front.iov_len; |
| 3252 | 3252 | struct ceph_mds_session_head *h; |
| 3253 | 3253 | u32 op; |
| 3254 | − u64 seq; | |
| 3255 | − unsigned long features = 0; | |
| 3254 | + u64 seq, features = 0; | |
| 3256 | 3255 | int wake = 0; |
| 3257 | 3256 | bool blacklisted = false; |
| 3258 | 3257 | |
| @@ -3271,9 +3270,8 @@ static void handle_session(struct ceph_mds_session *session, · 12 unmodified lines | ||
| 3271 | 3270 | goto bad; |
| 3272 | 3271 | /* version >= 3, feature bits */ |
| 3273 | 3272 | ceph_decode_32_safe(&p, end, len, bad); |
| 3274 | − ceph_decode_need(&p, end, len, bad); | |
| 3275 | − memcpy(&features, p, min_t(size_t, len, sizeof(features))); | |
| 3276 | − p += len; | |
| 3273 | + ceph_decode_64_safe(&p, end, features, bad); | |
| 3274 | + p += len - sizeof(features); | |
| 3277 | 3275 | } |
| 3278 | 3276 | |
| 3279 | 3277 | mutex_lock(&mdsc->mutex); |
| @@ -159,8 +159,8 @@ static struct inode *lookup_quotarealm_inode(struct ceph_mds_client *mdsc, · 158 unmodified lines | ||
| 159 | 159 | } |
| 160 | 160 | |
| 161 | 161 | if (IS_ERR(in)) { |
| 162 | − pr_warn("Can't lookup inode %llx (err: %ld)\n", | |
| 163 | − realm->ino, PTR_ERR(in)); | |
| 162 | + dout("Can't lookup inode %llx (err: %ld)\n", | |
| 163 | + realm->ino, PTR_ERR(in)); | |
| 164 | 164 | qri->timeout = jiffies + msecs_to_jiffies(60 * 1000); /* XXX */ |
| 165 | 165 | } else { |
| 166 | 166 | qri->timeout = 0; |
| @@ -1891,7 +1891,8 @@ GLOBAL_EXTERN struct list_head cifs_tcp_ses_list; · 1890 unmodified lines | ||
| 1891 | 1891 | /* |
| 1892 | 1892 | * This lock protects the cifs_tcp_ses_list, the list of smb sessions per |
| 1893 | 1893 | * tcp session, and the list of tcon's per smb session. It also protects |
| 1894 | − * the reference counters for the server, smb session, and tcon. Finally, | |
| 1894 | + * the reference counters for the server, smb session, and tcon. It also | |
| 1895 | + * protects some fields in the TCP_Server_Info struct such as dstaddr. Finally, | |
| 1895 | 1896 | * changes to the tcon->tidStatus should be done while holding this lock. |
| 1896 | 1897 | * generally the locks should be taken in order tcp_ses_lock before |
| 1897 | 1898 | * tcon->open_file_lock and that before file->file_info_lock since the |
| @@ -375,8 +375,10 @@ static int reconn_set_ipaddr(struct TCP_Server_Info *server) · 374 unmodified lines | ||
| 375 | 375 | return rc; |
| 376 | 376 | } |
| 377 | 377 | |
| 378 | + spin_lock(&cifs_tcp_ses_lock); | |
| 378 | 379 | rc = cifs_convert_address((struct sockaddr *)&server->dstaddr, ipaddr, |
| 379 | 380 | strlen(ipaddr)); |
| 381 | + spin_unlock(&cifs_tcp_ses_lock); | |
| 380 | 382 | kfree(ipaddr); |
| 381 | 383 | |
| 382 | 384 | return !rc ? -1 : 0; |
| @@ -3373,6 +3375,10 @@ cifs_find_tcon(struct cifs_ses *ses, struct smb_vol *volume_info) · 2990 unmodified lines | ||
| 3373 | 3375 | spin_lock(&cifs_tcp_ses_lock); |
| 3374 | 3376 | list_for_each(tmp, &ses->tcon_list) { |
| 3375 | 3377 | tcon = list_entry(tmp, struct cifs_tcon, tcon_list); |
| 3378 | +#ifdef CONFIG_CIFS_DFS_UPCALL | |
| 3379 | + if (tcon->dfs_path) | |
| 3380 | + continue; | |
| 3381 | +#endif | |
| 3376 | 3382 | if (!match_tcon(tcon, volume_info)) |
| 3377 | 3383 | continue; |
| 3378 | 3384 | ++tcon->tc_count; |
| @@ -1025,51 +1025,99 @@ int copy_path_name(char *dst, const char *src) · 1024 unmodified lines | ||
| 1025 | 1025 | } |
| 1026 | 1026 | |
| 1027 | 1027 | struct super_cb_data { |
| 1028 | − struct TCP_Server_Info *server; | |
| 1028 | + void *data; | |
| 1029 | 1029 | struct super_block *sb; |
| 1030 | 1030 | }; |
| 1031 | 1031 | |
| 1032 | −static void super_cb(struct super_block *sb, void *arg) | |
| 1032 | +static void tcp_super_cb(struct super_block *sb, void *arg) | |
| 1033 | 1033 | { |
| 1034 | − struct super_cb_data *d = arg; | |
| 1034 | + struct super_cb_data *sd = arg; | |
| 1035 | + struct TCP_Server_Info *server = sd->data; | |
| 1035 | 1036 | struct cifs_sb_info *cifs_sb; |
| 1036 | 1037 | struct cifs_tcon *tcon; |
| 1037 | 1038 | |
| 1038 | − if (d->sb) | |
| 1039 | + if (sd->sb) | |
| 1039 | 1040 | return; |
| 1040 | 1041 | |
| 1041 | 1042 | cifs_sb = CIFS_SB(sb); |
| 1042 | 1043 | tcon = cifs_sb_master_tcon(cifs_sb); |
| 1043 | − if (tcon->ses->server == d->server) | |
| 1044 | − d->sb = sb; | |
| 1044 | + if (tcon->ses->server == server) | |
| 1045 | + sd->sb = sb; | |
| 1045 | 1046 | } |
| 1046 | 1047 | |
| 1047 | −struct super_block *cifs_get_tcp_super(struct TCP_Server_Info *server) | |
| 1048 | +static struct super_block *__cifs_get_super(void (*f)(struct super_block *, void *), | |
| 1049 | + void *data) | |
| 1048 | 1050 | { |
| 1049 | − struct super_cb_data d = { | |
| 1050 | − .server = server, | |
| 1051 | + struct super_cb_data sd = { | |
| 1052 | + .data = data, | |
| 1051 | 1053 | .sb = NULL, |
| 1052 | 1054 | }; |
| 1053 | 1055 | |
| 1054 | − iterate_supers_type(&cifs_fs_type, super_cb, &d); | |
| 1056 | + iterate_supers_type(&cifs_fs_type, f, &sd); | |
| 1055 | 1057 | |
| 1056 | − if (unlikely(!d.sb)) | |
| 1057 | − return ERR_PTR(-ENOENT); | |
| 1058 | + if (!sd.sb) | |
| 1059 | + return ERR_PTR(-EINVAL); | |
| 1058 | 1060 | /* |
| 1059 | 1061 | * Grab an active reference in order to prevent automounts (DFS links) |
| 1060 | 1062 | * of expiring and then freeing up our cifs superblock pointer while |
| 1061 | 1063 | * we're doing failover. |
| 1062 | 1064 | */ |
| 1063 | − cifs_sb_active(d.sb); | |
| 1064 | − return d.sb; | |
| 1065 | + cifs_sb_active(sd.sb); | |
| 1066 | + return sd.sb; | |
| 1065 | 1067 | } |
| 1066 | 1068 | |
| 1067 | −void cifs_put_tcp_super(struct super_block *sb) | |
| 1069 | +static void __cifs_put_super(struct super_block *sb) | |
| 1068 | 1070 | { |
| 1069 | 1071 | if (!IS_ERR_OR_NULL(sb)) |
| 1070 | 1072 | cifs_sb_deactive(sb); |
| 1071 | 1073 | } |
| 1072 | 1074 | |
| 1075 | +struct super_block *cifs_get_tcp_super(struct TCP_Server_Info *server) | |
| 1076 | +{ | |
| 1077 | + return __cifs_get_super(tcp_super_cb, server); | |
| 1078 | +} | |
| 1079 | + | |
| 1080 | +void cifs_put_tcp_super(struct super_block *sb) | |
| 1081 | +{ | |
| 1082 | + __cifs_put_super(sb); | |
| 1083 | +} | |
| 1084 | + | |
| 1085 | +#ifdef CONFIG_CIFS_DFS_UPCALL | |
| 1086 | +static void tcon_super_cb(struct super_block *sb, void *arg) | |
| 1087 | +{ | |
| 1088 | + struct super_cb_data *sd = arg; | |
| 1089 | + struct cifs_tcon *tcon = sd->data; | |
| 1090 | + struct cifs_sb_info *cifs_sb; | |
| 1091 | + | |
| 1092 | + if (sd->sb) | |
| 1093 | + return; | |
| 1094 | + | |
| 1095 | + cifs_sb = CIFS_SB(sb); | |
| 1096 | + if (tcon->dfs_path && cifs_sb->origin_fullpath && | |
| 1097 | + !strcasecmp(tcon->dfs_path, cifs_sb->origin_fullpath)) | |
| 1098 | + sd->sb = sb; | |
| 1099 | +} | |
| 1100 | + | |
| 1101 | +static inline struct super_block *cifs_get_tcon_super(struct cifs_tcon *tcon) | |
| 1102 | +{ | |
| 1103 | + return __cifs_get_super(tcon_super_cb, tcon); | |
| 1104 | +} | |
| 1105 | + | |
| 1106 | +static inline void cifs_put_tcon_super(struct super_block *sb) | |
| 1107 | +{ | |
| 1108 | + __cifs_put_super(sb); | |
| 1109 | +} | |
| 1110 | +#else | |
| 1111 | +static inline struct super_block *cifs_get_tcon_super(struct cifs_tcon *tcon) | |
| 1112 | +{ | |
| 1113 | + return ERR_PTR(-EOPNOTSUPP); | |
| 1114 | +} | |
| 1115 | + | |
| 1116 | +static inline void cifs_put_tcon_super(struct super_block *sb) | |
| 1117 | +{ | |
| 1118 | +} | |
| 1119 | +#endif | |
| 1120 | + | |
| 1073 | 1121 | int update_super_prepath(struct cifs_tcon *tcon, const char *prefix, |
| 1074 | 1122 | size_t prefix_len) |
| 1075 | 1123 | { |
| @@ -1077,7 +1125,7 @@ int update_super_prepath(struct cifs_tcon *tcon, const char *prefix, · 1 unmodified line | ||
| 1077 | 1125 | struct cifs_sb_info *cifs_sb; |
| 1078 | 1126 | int rc = 0; |
| 1079 | 1127 | |
| 1080 | − sb = cifs_get_tcp_super(tcon->ses->server); | |
| 1128 | + sb = cifs_get_tcon_super(tcon); | |
| 1081 | 1129 | if (IS_ERR(sb)) |
| 1082 | 1130 | return PTR_ERR(sb); |
| 1083 | 1131 | |
| @@ -1099,6 +1147,6 @@ int update_super_prepath(struct cifs_tcon *tcon, const char *prefix, · 15 unmodified lines | ||
| 1099 | 1147 | cifs_sb->mnt_cifs_flags |= CIFS_MOUNT_USE_PREFIX_PATH; |
| 1100 | 1148 | |
| 1101 | 1149 | out: |
| 1102 | − cifs_put_tcp_super(sb); | |
| 1150 | + cifs_put_tcon_super(sb); | |
| 1103 | 1151 | return rc; |
| 1104 | 1152 | } |
| @@ -687,6 +687,11 @@ int open_shroot(unsigned int xid, struct cifs_tcon *tcon, · 686 unmodified lines | ||
| 687 | 687 | if (smb3_encryption_required(tcon)) |
| 688 | 688 | flags |= CIFS_TRANSFORM_REQ; |
| 689 | 689 | |
| 690 | + if (!server->ops->new_lease_key) | |
| 691 | + return -EIO; | |
| 692 | + | |
| 693 | + server->ops->new_lease_key(pfid); | |
| 694 | + | |
| 690 | 695 | memset(rqst, 0, sizeof(rqst)); |
| 691 | 696 | resp_buftype[0] = resp_buftype[1] = CIFS_NO_BUFFER; |
| 692 | 697 | memset(rsp_iov, 0, sizeof(rsp_iov)); |
| @@ -1519,6 +1519,7 @@ static int configfs_rmdir(struct inode *dir, struct dentry *dentry) · 1518 unmodified lines | ||
| 1519 | 1519 | spin_lock(&configfs_dirent_lock); |
| 1520 | 1520 | configfs_detach_rollback(dentry); |
| 1521 | 1521 | spin_unlock(&configfs_dirent_lock); |
| 1522 | + config_item_put(parent_item); | |
| 1522 | 1523 | return -EINTR; |
| 1523 | 1524 | } |
| 1524 | 1525 | frag->frag_dead = true; |
| @@ -211,6 +211,8 @@ static int format_corename(struct core_name *cn, struct coredump_params *cprm, · 210 unmodified lines | ||
| 211 | 211 | return -ENOMEM; |
| 212 | 212 | (*argv)[(*argc)++] = 0; |
| 213 | 213 | ++pat_ptr; |
| 214 | + if (!(*pat_ptr)) | |
| 215 | + return -ENOMEM; | |
| 214 | 216 | } |
| 215 | 217 | |
| 216 | 218 | /* Repeat as long as we have more pattern to process and more output |
| @@ -786,6 +788,14 @@ void do_coredump(const kernel_siginfo_t *siginfo) · 569 unmodified lines | ||
| 786 | 788 | if (displaced) |
| 787 | 789 | put_files_struct(displaced); |
| 788 | 790 | if (!dump_interrupted()) { |
| 791 | + /* | |
| 792 | + * umh disabled with CONFIG_STATIC_USERMODEHELPER_PATH="" would | |
| 793 | + * have this set to NULL. | |
| 794 | + */ | |
| 795 | + if (!cprm.file) { | |
| 796 | + pr_info("Core dump to |%s disabled\n", cn.corename); | |
| 797 | + goto close_fail; | |
| 798 | + } | |
| 789 | 799 | file_start_write(cprm.file); |
| 790 | 800 | core_dumped = binfmt->core_dump(&cprm); |
| 791 | 801 | file_end_write(cprm.file); |
| @@ -506,20 +506,11 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_u32_wo, NULL, debugfs_u32_set, "%llu\n"); · 505 unmodified lines | ||
| 506 | 506 | * This function creates a file in debugfs with the given name that |
| 507 | 507 | * contains the value of the variable @value. If the @mode variable is so |
| 508 | 508 | * set, it can be read from, and written to. |
| 509 | − * | |
| 510 | − * This function will return a pointer to a dentry if it succeeds. This | |
| 511 | − * pointer must be passed to the debugfs_remove() function when the file is | |
| 512 | − * to be removed (no automatic cleanup happens if your module is unloaded, | |
| 513 | − * you are responsible here.) If an error occurs, ERR_PTR(-ERROR) will be | |
| 514 | − * returned. | |
| 515 | − * | |
| 516 | − * If debugfs is not enabled in the kernel, the value ERR_PTR(-ENODEV) will | |
| 517 | − * be returned. | |
| 518 | 509 | */ |
| 519 | −struct dentry *debugfs_create_u32(const char *name, umode_t mode, | |
| 520 | − struct dentry *parent, u32 *value) | |
| 510 | +void debugfs_create_u32(const char *name, umode_t mode, struct dentry *parent, | |
| 511 | + u32 *value) | |
| 521 | 512 | { |
| 522 | − return debugfs_create_mode_unsafe(name, mode, parent, value, &fops_u32, | |
| 513 | + debugfs_create_mode_unsafe(name, mode, parent, value, &fops_u32, | |
| 523 | 514 | &fops_u32_ro, &fops_u32_wo); |
| 524 | 515 | } |
| 525 | 516 | EXPORT_SYMBOL_GPL(debugfs_create_u32); |
| @@ -1171,6 +1171,10 @@ static inline bool chain_epi_lockless(struct epitem *epi) · 1170 unmodified lines | ||
| 1171 | 1171 | { |
| 1172 | 1172 | struct eventpoll *ep = epi->ep; |
| 1173 | 1173 | |
| 1174 | + /* Fast preliminary check */ | |
| 1175 | + if (epi->next != EP_UNACTIVE_PTR) | |
| 1176 | + return false; | |
| 1177 | + | |
| 1174 | 1178 | /* Check that the same epi has not been just chained from another CPU */ |
| 1175 | 1179 | if (cmpxchg(&epi->next, EP_UNACTIVE_PTR, NULL) != EP_UNACTIVE_PTR) |
| 1176 | 1180 | return false; |
| @@ -1237,16 +1241,12 @@ static int ep_poll_callback(wait_queue_entry_t *wait, unsigned mode, int sync, v · 60 unmodified lines | ||
| 1237 | 1241 | * chained in ep->ovflist and requeued later on. |
| 1238 | 1242 | */ |
| 1239 | 1243 | if (READ_ONCE(ep->ovflist) != EP_UNACTIVE_PTR) { |
| 1240 | − if (epi->next == EP_UNACTIVE_PTR && | |
| 1241 | − chain_epi_lockless(epi)) | |
| 1244 | + if (chain_epi_lockless(epi)) | |
| 1245 | + ep_pm_stay_awake_rcu(epi); | |
| 1246 | + } else if (!ep_is_linked(epi)) { | |
| 1247 | + /* In the usual case, add event to ready list. */ | |
| 1248 | + if (list_add_tail_lockless(&epi->rdllink, &ep->rdllist)) | |
| 1242 | 1249 | ep_pm_stay_awake_rcu(epi); |
| 1243 | − goto out_unlock; | |
| 1244 | − } | |
| 1245 | − | |
| 1246 | − /* If this file is already in the ready list we exit soon */ | |
| 1247 | − if (!ep_is_linked(epi) && | |
| 1248 | − list_add_tail_lockless(&epi->rdllink, &ep->rdllist)) { | |
| 1249 | − ep_pm_stay_awake_rcu(epi); | |
| 1250 | 1250 | } |
| 1251 | 1251 | |
| 1252 | 1252 | /* |
| @@ -1822,7 +1822,6 @@ static int ep_poll(struct eventpoll *ep, struct epoll_event __user *events, · 569 unmodified lines | ||
| 1822 | 1822 | { |
| 1823 | 1823 | int res = 0, eavail, timed_out = 0; |
| 1824 | 1824 | u64 slack = 0; |
| 1825 | − bool waiter = false; | |
| 1826 | 1825 | wait_queue_entry_t wait; |
| 1827 | 1826 | ktime_t expires, *to = NULL; |
| 1828 | 1827 | |
| @@ -1867,21 +1866,23 @@ fetch_events: · 38 unmodified lines | ||
| 1867 | 1866 | */ |
| 1868 | 1867 | ep_reset_busy_poll_napi_id(ep); |
| 1869 | 1868 | |
| 1870 | − /* | |
| 1871 | − * We don't have any available event to return to the caller. We need | |
| 1872 | − * to sleep here, and we will be woken by ep_poll_callback() when events | |
| 1873 | − * become available. | |
| 1874 | − */ | |
| 1875 | − if (!waiter) { | |
| 1876 | − waiter = true; | |
| 1877 | − init_waitqueue_entry(&wait, current); | |
| 1878 | − | |
| 1869 | + do { | |
| 1870 | + /* | |
| 1871 | + * Internally init_wait() uses autoremove_wake_function(), | |
| 1872 | + * thus wait entry is removed from the wait queue on each | |
| 1873 | + * wakeup. Why it is important? In case of several waiters | |
| 1874 | + * each new wakeup will hit the next waiter, giving it the | |
| 1875 | + * chance to harvest new event. Otherwise wakeup can be | |
| 1876 | + * lost. This is also good performance-wise, because on | |
| 1877 | + * normal wakeup path no need to call __remove_wait_queue() | |
| 1878 | + * explicitly, thus ep->lock is not taken, which halts the | |
| 1879 | + * event delivery. | |
| 1880 | + */ | |
| 1881 | + init_wait(&wait); | |
| 1879 | 1882 | write_lock_irq(&ep->lock); |
| 1880 | 1883 | __add_wait_queue_exclusive(&ep->wq, &wait); |
| 1881 | 1884 | write_unlock_irq(&ep->lock); |
| 1882 | − } | |
| 1883 | 1885 | |
| 1884 | − for (;;) { | |
| 1885 | 1886 | /* |
| 1886 | 1887 | * We don't want to sleep if the ep_poll_callback() sends us |
| 1887 | 1888 | * a wakeup in between. That's why we set the task state |
| @@ -1911,10 +1912,20 @@ fetch_events: · 23 unmodified lines | ||
| 1911 | 1912 | timed_out = 1; |
| 1912 | 1913 | break; |
| 1913 | 1914 | } |
| 1914 | − } | |
| 1915 | + | |
| 1916 | + /* We were woken up, thus go and try to harvest some events */ | |
| 1917 | + eavail = 1; | |
| 1918 | + | |
| 1919 | + } while (0); | |
| 1915 | 1920 | |
| 1916 | 1921 | __set_current_state(TASK_RUNNING); |
| 1917 | 1922 | |
| 1923 | + if (!list_empty_careful(&wait.entry)) { | |
| 1924 | + write_lock_irq(&ep->lock); | |
| 1925 | + __remove_wait_queue(&ep->wq, &wait); | |
| 1926 | + write_unlock_irq(&ep->lock); | |
| 1927 | + } | |
| 1928 | + | |
| 1918 | 1929 | send_events: |
| 1919 | 1930 | /* |
| 1920 | 1931 | * Try to transfer events to user space. In case we get 0 events and |
| @@ -1925,12 +1936,6 @@ send_events: · 4 unmodified lines | ||
| 1925 | 1936 | !(res = ep_send_events(ep, events, maxevents)) && !timed_out) |
| 1926 | 1937 | goto fetch_events; |
| 1927 | 1938 | |
| 1928 | − if (waiter) { | |
| 1929 | − write_lock_irq(&ep->lock); | |
| 1930 | − __remove_wait_queue(&ep->wq, &wait); | |
| 1931 | − write_unlock_irq(&ep->lock); | |
| 1932 | − } | |
| 1933 | − | |
| 1934 | 1939 | return res; |
| 1935 | 1940 | } |
| 1936 | 1941 | |
| @@ -91,7 +91,6 @@ static int exfat_allocate_bitmap(struct super_block *sb, · 90 unmodified lines | ||
| 91 | 91 | } |
| 92 | 92 | } |
| 93 | 93 | |
| 94 | − sbi->pbr_bh = NULL; | |
| 95 | 94 | return 0; |
| 96 | 95 | } |
| 97 | 96 | |
| @@ -137,8 +136,6 @@ void exfat_free_bitmap(struct exfat_sb_info *sbi) · 39 unmodified lines | ||
| 137 | 136 | { |
| 138 | 137 | int i; |
| 139 | 138 | |
| 140 | − brelse(sbi->pbr_bh); | |
| 141 | − | |
| 142 | 139 | for (i = 0; i < sbi->map_sectors; i++) |
| 143 | 140 | __brelse(sbi->vol_amap[i]); |
| 144 | 141 | |
| @@ -507,6 +507,7 @@ void exfat_msg(struct super_block *sb, const char *lv, const char *fmt, ...) · 506 unmodified lines | ||
| 507 | 507 | __printf(3, 4) __cold; |
| 508 | 508 | void exfat_get_entry_time(struct exfat_sb_info *sbi, struct timespec64 *ts, |
| 509 | 509 | u8 tz, __le16 time, __le16 date, u8 time_ms); |
| 510 | +void exfat_truncate_atime(struct timespec64 *ts); | |
| 510 | 511 | void exfat_set_entry_time(struct exfat_sb_info *sbi, struct timespec64 *ts, |
| 511 | 512 | u8 *tz, __le16 *time, __le16 *date, u8 *time_ms); |
| 512 | 513 | unsigned short exfat_calc_chksum_2byte(void *data, int len, |
| @@ -273,6 +273,7 @@ int exfat_getattr(const struct path *path, struct kstat *stat, · 272 unmodified lines | ||
| 273 | 273 | struct exfat_inode_info *ei = EXFAT_I(inode); |
| 274 | 274 | |
| 275 | 275 | generic_fillattr(inode, stat); |
| 276 | + exfat_truncate_atime(&stat->atime); | |
| 276 | 277 | stat->result_mask |= STATX_BTIME; |
| 277 | 278 | stat->btime.tv_sec = ei->i_crtime.tv_sec; |
| 278 | 279 | stat->btime.tv_nsec = ei->i_crtime.tv_nsec; |
| @@ -339,6 +340,7 @@ int exfat_setattr(struct dentry *dentry, struct iattr *attr) · 60 unmodified lines | ||
| 339 | 340 | } |
| 340 | 341 | |
| 341 | 342 | setattr_copy(inode, attr); |
| 343 | + exfat_truncate_atime(&inode->i_atime); | |
| 342 | 344 | mark_inode_dirty(inode); |
| 343 | 345 | |
| 344 | 346 | out: |
| @@ -88,7 +88,8 @@ void exfat_get_entry_time(struct exfat_sb_info *sbi, struct timespec64 *ts, · 87 unmodified lines | ||
| 88 | 88 | if (time_ms) { |
| 89 | 89 | ts->tv_sec += time_ms / 100; |
| 90 | 90 | ts->tv_nsec = (time_ms % 100) * 10 * NSEC_PER_MSEC; |
| 91 | − } | |
| 91 | + } else | |
| 92 | + ts->tv_nsec = 0; | |
| 92 | 93 | |
| 93 | 94 | if (tz & EXFAT_TZ_VALID) |
| 94 | 95 | /* Adjust timezone to UTC0. */ |
| @@ -124,6 +125,17 @@ void exfat_set_entry_time(struct exfat_sb_info *sbi, struct timespec64 *ts, · 29 unmodified lines | ||
| 124 | 125 | *tz = EXFAT_TZ_VALID; |
| 125 | 126 | } |
| 126 | 127 | |
| 128 | +/* | |
| 129 | + * The timestamp for access_time has double seconds granularity. | |
| 130 | + * (There is no 10msIncrement field for access_time unlike create/modify_time) | |
| 131 | + * atime also has only a 2-second resolution. | |
| 132 | + */ | |
| 133 | +void exfat_truncate_atime(struct timespec64 *ts) | |
| 134 | +{ | |
| 135 | + ts->tv_sec = round_down(ts->tv_sec, 2); | |
| 136 | + ts->tv_nsec = 0; | |
| 137 | +} | |
| 138 | + | |
| 127 | 139 | unsigned short exfat_calc_chksum_2byte(void *data, int len, |
| 128 | 140 | unsigned short chksum, int type) |
| 129 | 141 | { |
| @@ -595,6 +595,7 @@ static int exfat_create(struct inode *dir, struct dentry *dentry, umode_t mode, · 594 unmodified lines | ||
| 595 | 595 | inode_inc_iversion(inode); |
| 596 | 596 | inode->i_mtime = inode->i_atime = inode->i_ctime = |
| 597 | 597 | EXFAT_I(inode)->i_crtime = current_time(inode); |
| 598 | + exfat_truncate_atime(&inode->i_atime); | |
| 598 | 599 | /* timestamp is already written, so mark_inode_dirty() is unneeded. */ |
| 599 | 600 | |
| 600 | 601 | d_instantiate(dentry, inode); |
| @@ -854,6 +855,7 @@ static int exfat_unlink(struct inode *dir, struct dentry *dentry) · 253 unmodified lines | ||
| 854 | 855 | |
| 855 | 856 | inode_inc_iversion(dir); |
| 856 | 857 | dir->i_mtime = dir->i_atime = current_time(dir); |
| 858 | + exfat_truncate_atime(&dir->i_atime); | |
| 857 | 859 | if (IS_DIRSYNC(dir)) |
| 858 | 860 | exfat_sync_inode(dir); |
| 859 | 861 | else |
| @@ -861,6 +863,7 @@ static int exfat_unlink(struct inode *dir, struct dentry *dentry) · 1 unmodified line | ||
| 861 | 863 | |
| 862 | 864 | clear_nlink(inode); |
| 863 | 865 | inode->i_mtime = inode->i_atime = current_time(inode); |
| 866 | + exfat_truncate_atime(&inode->i_atime); | |
| 864 | 867 | exfat_unhash_inode(inode); |
| 865 | 868 | exfat_d_version_set(dentry, inode_query_iversion(dir)); |
| 866 | 869 | unlock: |
| @@ -903,6 +906,7 @@ static int exfat_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode) · 36 unmodified lines | ||
| 903 | 906 | inode_inc_iversion(inode); |
| 904 | 907 | inode->i_mtime = inode->i_atime = inode->i_ctime = |
| 905 | 908 | EXFAT_I(inode)->i_crtime = current_time(inode); |
| 909 | + exfat_truncate_atime(&inode->i_atime); | |
| 906 | 910 | /* timestamp is already written, so mark_inode_dirty() is unneeded. */ |
| 907 | 911 | |
| 908 | 912 | d_instantiate(dentry, inode); |
| @@ -1019,6 +1023,7 @@ static int exfat_rmdir(struct inode *dir, struct dentry *dentry) · 110 unmodified lines | ||
| 1019 | 1023 | |
| 1020 | 1024 | inode_inc_iversion(dir); |
| 1021 | 1025 | dir->i_mtime = dir->i_atime = current_time(dir); |
| 1026 | + exfat_truncate_atime(&dir->i_atime); | |
| 1022 | 1027 | if (IS_DIRSYNC(dir)) |
| 1023 | 1028 | exfat_sync_inode(dir); |
| 1024 | 1029 | else |
| @@ -1027,6 +1032,7 @@ static int exfat_rmdir(struct inode *dir, struct dentry *dentry) · 2 unmodified lines | ||
| 1027 | 1032 | |
| 1028 | 1033 | clear_nlink(inode); |
| 1029 | 1034 | inode->i_mtime = inode->i_atime = current_time(inode); |
| 1035 | + exfat_truncate_atime(&inode->i_atime); | |
| 1030 | 1036 | exfat_unhash_inode(inode); |
| 1031 | 1037 | exfat_d_version_set(dentry, inode_query_iversion(dir)); |
| 1032 | 1038 | unlock: |
| @@ -1387,6 +1393,7 @@ static int exfat_rename(struct inode *old_dir, struct dentry *old_dentry, · 354 unmodified lines | ||
| 1387 | 1393 | inode_inc_iversion(new_dir); |
| 1388 | 1394 | new_dir->i_ctime = new_dir->i_mtime = new_dir->i_atime = |
| 1389 | 1395 | EXFAT_I(new_dir)->i_crtime = current_time(new_dir); |
| 1396 | + exfat_truncate_atime(&new_dir->i_atime); | |
| 1390 | 1397 | if (IS_DIRSYNC(new_dir)) |
| 1391 | 1398 | exfat_sync_inode(new_dir); |
| 1392 | 1399 | else |
| @@ -49,6 +49,7 @@ static void exfat_put_super(struct super_block *sb) · 48 unmodified lines | ||
| 49 | 49 | sync_blockdev(sb->s_bdev); |
| 50 | 50 | exfat_set_vol_flags(sb, VOL_CLEAN); |
| 51 | 51 | exfat_free_bitmap(sbi); |
| 52 | + brelse(sbi->pbr_bh); | |
| 52 | 53 | mutex_unlock(&sbi->s_lock); |
| 53 | 54 | |
| 54 | 55 | call_rcu(&sbi->rcu, exfat_delayed_free); |
| @@ -100,7 +101,7 @@ static int exfat_statfs(struct dentry *dentry, struct kstatfs *buf) · 45 unmodified lines | ||
| 100 | 101 | int exfat_set_vol_flags(struct super_block *sb, unsigned short new_flag) |
| 101 | 102 | { |
| 102 | 103 | struct exfat_sb_info *sbi = EXFAT_SB(sb); |
| 103 | − struct pbr64 *bpb; | |
| 104 | + struct pbr64 *bpb = (struct pbr64 *)sbi->pbr_bh->b_data; | |
| 104 | 105 | bool sync = 0; |
| 105 | 106 | |
| 106 | 107 | /* flags are not changed */ |
| @@ -115,15 +116,6 @@ int exfat_set_vol_flags(struct super_block *sb, unsigned short new_flag) · 8 unmodified lines | ||
| 115 | 116 | if (sb_rdonly(sb)) |
| 116 | 117 | return 0; |
| 117 | 118 | |
| 118 | − if (!sbi->pbr_bh) { | |
| 119 | − sbi->pbr_bh = sb_bread(sb, 0); | |
| 120 | − if (!sbi->pbr_bh) { | |
| 121 | − exfat_msg(sb, KERN_ERR, "failed to read boot sector"); | |
| 122 | − return -ENOMEM; | |
| 123 | − } | |
| 124 | − } | |
| 125 | − | |
| 126 | − bpb = (struct pbr64 *)sbi->pbr_bh->b_data; | |
| 127 | 119 | bpb->bsx.vol_flags = cpu_to_le16(new_flag); |
| 128 | 120 | |
| 129 | 121 | if (new_flag == VOL_DIRTY && !buffer_dirty(sbi->pbr_bh)) |
| @@ -159,7 +151,6 @@ static int exfat_show_options(struct seq_file *m, struct dentry *root) · 29 unmodified lines | ||
| 159 | 151 | seq_puts(m, ",iocharset=utf8"); |
| 160 | 152 | else if (sbi->nls_io) |
| 161 | 153 | seq_printf(m, ",iocharset=%s", sbi->nls_io->charset); |
| 162 | − seq_printf(m, ",bps=%ld", sb->s_blocksize); | |
| 163 | 154 | if (opts->errors == EXFAT_ERRORS_CONT) |
| 164 | 155 | seq_puts(m, ",errors=continue"); |
| 165 | 156 | else if (opts->errors == EXFAT_ERRORS_PANIC) |
| @@ -351,14 +342,15 @@ static int exfat_read_root(struct inode *inode) · 185 unmodified lines | ||
| 351 | 342 | exfat_save_attr(inode, ATTR_SUBDIR); |
| 352 | 343 | inode->i_mtime = inode->i_atime = inode->i_ctime = ei->i_crtime = |
| 353 | 344 | current_time(inode); |
| 345 | + exfat_truncate_atime(&inode->i_atime); | |
| 354 | 346 | exfat_cache_init_inode(inode); |
| 355 | 347 | return 0; |
| 356 | 348 | } |
| 357 | 349 | |
| 358 | −static struct pbr *exfat_read_pbr_with_logical_sector(struct super_block *sb, | |
| 359 | − struct buffer_head **prev_bh) | |
| 350 | +static struct pbr *exfat_read_pbr_with_logical_sector(struct super_block *sb) | |
| 360 | 351 | { |
| 361 | − struct pbr *p_pbr = (struct pbr *) (*prev_bh)->b_data; | |
| 352 | + struct exfat_sb_info *sbi = EXFAT_SB(sb); | |
| 353 | + struct pbr *p_pbr = (struct pbr *) (sbi->pbr_bh)->b_data; | |
| 362 | 354 | unsigned short logical_sect = 0; |
| 363 | 355 | |
| 364 | 356 | logical_sect = 1 << p_pbr->bsx.f64.sect_size_bits; |
| @@ -378,26 +370,23 @@ static struct pbr *exfat_read_pbr_with_logical_sector(struct super_block *sb, · 13 unmodified lines | ||
| 378 | 370 | } |
| 379 | 371 | |
| 380 | 372 | if (logical_sect > sb->s_blocksize) { |
| 381 | − struct buffer_head *bh = NULL; | |
| 382 | − | |
| 383 | − __brelse(*prev_bh); | |
| 384 | − *prev_bh = NULL; | |
| 373 | + brelse(sbi->pbr_bh); | |
| 374 | + sbi->pbr_bh = NULL; | |
| 385 | 375 | |
| 386 | 376 | if (!sb_set_blocksize(sb, logical_sect)) { |
| 387 | 377 | exfat_msg(sb, KERN_ERR, |
| 388 | 378 | "unable to set blocksize %u", logical_sect); |
| 389 | 379 | return NULL; |
| 390 | 380 | } |
| 391 | − bh = sb_bread(sb, 0); | |
| 392 | − if (!bh) { | |
| 381 | + sbi->pbr_bh = sb_bread(sb, 0); | |
| 382 | + if (!sbi->pbr_bh) { | |
| 393 | 383 | exfat_msg(sb, KERN_ERR, |
| 394 | 384 | "unable to read boot sector (logical sector size = %lu)", |
| 395 | 385 | sb->s_blocksize); |
| 396 | 386 | return NULL; |
| 397 | 387 | } |
| 398 | 388 | |
| 399 | − *prev_bh = bh; | |
| 400 | − p_pbr = (struct pbr *) bh->b_data; | |
| 389 | + p_pbr = (struct pbr *)sbi->pbr_bh->b_data; | |
| 401 | 390 | } |
| 402 | 391 | return p_pbr; |
| 403 | 392 | } |
| @@ -408,21 +397,20 @@ static int __exfat_fill_super(struct super_block *sb) · 4 unmodified lines | ||
| 408 | 397 | int ret; |
| 409 | 398 | struct pbr *p_pbr; |
| 410 | 399 | struct pbr64 *p_bpb; |
| 411 | − struct buffer_head *bh; | |
| 412 | 400 | struct exfat_sb_info *sbi = EXFAT_SB(sb); |
| 413 | 401 | |
| 414 | 402 | /* set block size to read super block */ |
| 415 | 403 | sb_min_blocksize(sb, 512); |
| 416 | 404 | |
| 417 | 405 | /* read boot sector */ |
| 418 | − bh = sb_bread(sb, 0); | |
| 419 | − if (!bh) { | |
| 406 | + sbi->pbr_bh = sb_bread(sb, 0); | |
| 407 | + if (!sbi->pbr_bh) { | |
| 420 | 408 | exfat_msg(sb, KERN_ERR, "unable to read boot sector"); |
| 421 | 409 | return -EIO; |
| 422 | 410 | } |
| 423 | 411 | |
| 424 | 412 | /* PRB is read */ |
| 425 | − p_pbr = (struct pbr *)bh->b_data; | |
| 413 | + p_pbr = (struct pbr *)sbi->pbr_bh->b_data; | |
| 426 | 414 | |
| 427 | 415 | /* check the validity of PBR */ |
| 428 | 416 | if (le16_to_cpu((p_pbr->signature)) != PBR_SIGNATURE) { |
| @@ -433,7 +421,7 @@ static int __exfat_fill_super(struct super_block *sb) · 4 unmodified lines | ||
| 433 | 421 | |
| 434 | 422 | |
| 435 | 423 | /* check logical sector size */ |
| 436 | − p_pbr = exfat_read_pbr_with_logical_sector(sb, &bh); | |
| 424 | + p_pbr = exfat_read_pbr_with_logical_sector(sb); | |
| 437 | 425 | if (!p_pbr) { |
| 438 | 426 | ret = -EIO; |
| 439 | 427 | goto free_bh; |
| @@ -514,7 +502,7 @@ free_alloc_bitmap: · 74 unmodified lines | ||
| 514 | 502 | free_upcase_table: |
| 515 | 503 | exfat_free_upcase_table(sbi); |
| 516 | 504 | free_bh: |
| 517 | − brelse(bh); | |
| 505 | + brelse(sbi->pbr_bh); | |
| 518 | 506 | return ret; |
| 519 | 507 | } |
| 520 | 508 | |
| @@ -531,17 +519,18 @@ static int exfat_fill_super(struct super_block *sb, struct fs_context *fc) · 10 unmodified lines | ||
| 531 | 519 | if (opts->discard) { |
| 532 | 520 | struct request_queue *q = bdev_get_queue(sb->s_bdev); |
| 533 | 521 | |
| 534 | − if (!blk_queue_discard(q)) | |
| 522 | + if (!blk_queue_discard(q)) { | |
| 535 | 523 | exfat_msg(sb, KERN_WARNING, |
| 536 | 524 | "mounting with \"discard\" option, but the device does not support discard"); |
| 537 | − opts->discard = 0; | |
| 525 | + opts->discard = 0; | |
| 526 | + } | |
| 538 | 527 | } |
| 539 | 528 | |
| 540 | 529 | sb->s_flags |= SB_NODIRATIME; |
| 541 | 530 | sb->s_magic = EXFAT_SUPER_MAGIC; |
| 542 | 531 | sb->s_op = &exfat_sops; |
| 543 | 532 | |
| 544 | − sb->s_time_gran = 1; | |
| 533 | + sb->s_time_gran = 10 * NSEC_PER_MSEC; | |
| 545 | 534 | sb->s_time_min = EXFAT_MIN_TIMESTAMP_SECS; |
| 546 | 535 | sb->s_time_max = EXFAT_MAX_TIMESTAMP_SECS; |
| 547 | 536 | |
| @@ -605,6 +594,7 @@ put_inode: · 57 unmodified lines | ||
| 605 | 594 | free_table: |
| 606 | 595 | exfat_free_upcase_table(sbi); |
| 607 | 596 | exfat_free_bitmap(sbi); |
| 597 | + brelse(sbi->pbr_bh); | |
| 608 | 598 | |
| 609 | 599 | check_nls_io: |
| 610 | 600 | unload_nls(sbi->nls_io); |
| @@ -717,6 +707,7 @@ static void __exit exit_exfat_fs(void) · 106 unmodified lines | ||
| 717 | 707 | module_init(init_exfat_fs); |
| 718 | 708 | module_exit(exit_exfat_fs); |
| 719 | 709 | |
| 710 | +MODULE_ALIAS_FS("exfat"); | |
| 720 | 711 | MODULE_LICENSE("GPL"); |
| 721 | 712 | MODULE_DESCRIPTION("exFAT filesystem support"); |
| 722 | 713 | MODULE_AUTHOR("Samsung Electronics Co., Ltd."); |
| @@ -524,6 +524,7 @@ enum { · 523 unmodified lines | ||
| 524 | 524 | REQ_F_OVERFLOW_BIT, |
| 525 | 525 | REQ_F_POLLED_BIT, |
| 526 | 526 | REQ_F_BUFFER_SELECTED_BIT, |
| 527 | + REQ_F_NO_FILE_TABLE_BIT, | |
| 527 | 528 | |
| 528 | 529 | /* not a real bit, just to check we're not overflowing the space */ |
| 529 | 530 | __REQ_F_LAST_BIT, |
| @@ -577,6 +578,8 @@ enum { · 47 unmodified lines | ||
| 577 | 578 | REQ_F_POLLED = BIT(REQ_F_POLLED_BIT), |
| 578 | 579 | /* buffer already selected */ |
| 579 | 580 | REQ_F_BUFFER_SELECTED = BIT(REQ_F_BUFFER_SELECTED_BIT), |
| 581 | + /* doesn't need file table for this request */ | |
| 582 | + REQ_F_NO_FILE_TABLE = BIT(REQ_F_NO_FILE_TABLE_BIT), | |
| 580 | 583 | }; |
| 581 | 584 | |
| 582 | 585 | struct async_poll { |
| @@ -677,8 +680,6 @@ struct io_op_def { · 94 unmodified lines | ||
| 677 | 680 | unsigned needs_mm : 1; |
| 678 | 681 | /* needs req->file assigned */ |
| 679 | 682 | unsigned needs_file : 1; |
| 680 | − /* needs req->file assigned IFF fd is >= 0 */ | |
| 681 | − unsigned fd_non_neg : 1; | |
| 682 | 683 | /* hash wq insertion if file is a regular file */ |
| 683 | 684 | unsigned hash_reg_file : 1; |
| 684 | 685 | /* unbound wq insertion if file is a non-regular file */ |
| @@ -781,8 +782,6 @@ static const struct io_op_def io_op_defs[] = { · 96 unmodified lines | ||
| 781 | 782 | .needs_file = 1, |
| 782 | 783 | }, |
| 783 | 784 | [IORING_OP_OPENAT] = { |
| 784 | − .needs_file = 1, | |
| 785 | − .fd_non_neg = 1, | |
| 786 | 785 | .file_table = 1, |
| 787 | 786 | .needs_fs = 1, |
| 788 | 787 | }, |
| @@ -796,9 +795,8 @@ static const struct io_op_def io_op_defs[] = { · 7 unmodified lines | ||
| 796 | 795 | }, |
| 797 | 796 | [IORING_OP_STATX] = { |
| 798 | 797 | .needs_mm = 1, |
| 799 | − .needs_file = 1, | |
| 800 | − .fd_non_neg = 1, | |
| 801 | 798 | .needs_fs = 1, |
| 799 | + .file_table = 1, | |
| 802 | 800 | }, |
| 803 | 801 | [IORING_OP_READ] = { |
| 804 | 802 | .needs_mm = 1, |
| @@ -833,8 +831,6 @@ static const struct io_op_def io_op_defs[] = { · 28 unmodified lines | ||
| 833 | 831 | .buffer_select = 1, |
| 834 | 832 | }, |
| 835 | 833 | [IORING_OP_OPENAT2] = { |
| 836 | − .needs_file = 1, | |
| 837 | − .fd_non_neg = 1, | |
| 838 | 834 | .file_table = 1, |
| 839 | 835 | .needs_fs = 1, |
| 840 | 836 | }, |
| @@ -1291,7 +1287,7 @@ static struct io_kiocb *io_get_fallback_req(struct io_ring_ctx *ctx) · 450 unmodified lines | ||
| 1291 | 1287 | struct io_kiocb *req; |
| 1292 | 1288 | |
| 1293 | 1289 | req = ctx->fallback_req; |
| 1294 | − if (!test_and_set_bit_lock(0, (unsigned long *) ctx->fallback_req)) | |
| 1290 | + if (!test_and_set_bit_lock(0, (unsigned long *) &ctx->fallback_req)) | |
| 1295 | 1291 | return req; |
| 1296 | 1292 | |
| 1297 | 1293 | return NULL; |
| @@ -1378,7 +1374,7 @@ static void __io_free_req(struct io_kiocb *req) · 80 unmodified lines | ||
| 1378 | 1374 | if (likely(!io_is_fallback_req(req))) |
| 1379 | 1375 | kmem_cache_free(req_cachep, req); |
| 1380 | 1376 | else |
| 1381 | − clear_bit_unlock(0, (unsigned long *) req->ctx->fallback_req); | |
| 1377 | + clear_bit_unlock(0, (unsigned long *) &req->ctx->fallback_req); | |
| 1382 | 1378 | } |
| 1383 | 1379 | |
| 1384 | 1380 | struct req_batch { |
| @@ -2034,7 +2030,7 @@ static struct file *__io_file_get(struct io_submit_state *state, int fd) · 649 unmodified lines | ||
| 2034 | 2030 | * any file. For now, just ensure that anything potentially problematic is done |
| 2035 | 2031 | * inline. |
| 2036 | 2032 | */ |
| 2037 | −static bool io_file_supports_async(struct file *file) | |
| 2033 | +static bool io_file_supports_async(struct file *file, int rw) | |
| 2038 | 2034 | { |
| 2039 | 2035 | umode_t mode = file_inode(file)->i_mode; |
| 2040 | 2036 | |
| @@ -2043,7 +2039,13 @@ static bool io_file_supports_async(struct file *file) · 2 unmodified lines | ||
| 2043 | 2039 | if (S_ISREG(mode) && file->f_op != &io_uring_fops) |
| 2044 | 2040 | return true; |
| 2045 | 2041 | |
| 2046 | − return false; | |
| 2042 | + if (!(file->f_mode & FMODE_NOWAIT)) | |
| 2043 | + return false; | |
| 2044 | + | |
| 2045 | + if (rw == READ) | |
| 2046 | + return file->f_op->read_iter != NULL; | |
| 2047 | + | |
| 2048 | + return file->f_op->write_iter != NULL; | |
| 2047 | 2049 | } |
| 2048 | 2050 | |
| 2049 | 2051 | static int io_prep_rw(struct io_kiocb *req, const struct io_uring_sqe *sqe, |
| @@ -2571,7 +2573,7 @@ static int io_read(struct io_kiocb *req, bool force_nonblock) · 521 unmodified lines | ||
| 2571 | 2573 | * If the file doesn't support async, mark it as REQ_F_MUST_PUNT so |
| 2572 | 2574 | * we know to async punt it even if it was opened O_NONBLOCK |
| 2573 | 2575 | */ |
| 2574 | − if (force_nonblock && !io_file_supports_async(req->file)) | |
| 2576 | + if (force_nonblock && !io_file_supports_async(req->file, READ)) | |
| 2575 | 2577 | goto copy_iov; |
| 2576 | 2578 | |
| 2577 | 2579 | iov_count = iov_iter_count(&iter); |
| @@ -2594,7 +2596,8 @@ copy_iov: · 16 unmodified lines | ||
| 2594 | 2596 | if (ret) |
| 2595 | 2597 | goto out_free; |
| 2596 | 2598 | /* any defer here is final, must blocking retry */ |
| 2597 | − if (!(req->flags & REQ_F_NOWAIT)) | |
| 2599 | + if (!(req->flags & REQ_F_NOWAIT) && | |
| 2600 | + !file_can_poll(req->file)) | |
| 2598 | 2601 | req->flags |= REQ_F_MUST_PUNT; |
| 2599 | 2602 | return -EAGAIN; |
| 2600 | 2603 | } |
| @@ -2662,7 +2665,7 @@ static int io_write(struct io_kiocb *req, bool force_nonblock) · 61 unmodified lines | ||
| 2662 | 2665 | * If the file doesn't support async, mark it as REQ_F_MUST_PUNT so |
| 2663 | 2666 | * we know to async punt it even if it was opened O_NONBLOCK |
| 2664 | 2667 | */ |
| 2665 | − if (force_nonblock && !io_file_supports_async(req->file)) | |
| 2668 | + if (force_nonblock && !io_file_supports_async(req->file, WRITE)) | |
| 2666 | 2669 | goto copy_iov; |
| 2667 | 2670 | |
| 2668 | 2671 | /* file path doesn't support NOWAIT for non-direct_IO */ |
| @@ -2716,7 +2719,8 @@ copy_iov: · 47 unmodified lines | ||
| 2716 | 2719 | if (ret) |
| 2717 | 2720 | goto out_free; |
| 2718 | 2721 | /* any defer here is final, must blocking retry */ |
| 2719 | − req->flags |= REQ_F_MUST_PUNT; | |
| 2722 | + if (!file_can_poll(req->file)) | |
| 2723 | + req->flags |= REQ_F_MUST_PUNT; | |
| 2720 | 2724 | return -EAGAIN; |
| 2721 | 2725 | } |
| 2722 | 2726 | } |
| @@ -2756,15 +2760,6 @@ static int io_splice_prep(struct io_kiocb *req, const struct io_uring_sqe *sqe) · 33 unmodified lines | ||
| 2756 | 2760 | return 0; |
| 2757 | 2761 | } |
| 2758 | 2762 | |
| 2759 | −static bool io_splice_punt(struct file *file) | |
| 2760 | −{ | |
| 2761 | − if (get_pipe_info(file)) | |
| 2762 | − return false; | |
| 2763 | − if (!io_file_supports_async(file)) | |
| 2764 | − return true; | |
| 2765 | − return !(file->f_flags & O_NONBLOCK); | |
| 2766 | −} | |
| 2767 | − | |
| 2768 | 2763 | static int io_splice(struct io_kiocb *req, bool force_nonblock) |
| 2769 | 2764 | { |
| 2770 | 2765 | struct io_splice *sp = &req->splice; |
| @@ -2774,11 +2769,8 @@ static int io_splice(struct io_kiocb *req, bool force_nonblock) · 3 unmodified lines | ||
| 2774 | 2769 | loff_t *poff_in, *poff_out; |
| 2775 | 2770 | long ret; |
| 2776 | 2771 | |
| 2777 | − if (force_nonblock) { | |
| 2778 | − if (io_splice_punt(in) || io_splice_punt(out)) | |
| 2779 | − return -EAGAIN; | |
| 2780 | − flags |= SPLICE_F_NONBLOCK; | |
| 2781 | − } | |
| 2772 | + if (force_nonblock) | |
| 2773 | + return -EAGAIN; | |
| 2782 | 2774 | |
| 2783 | 2775 | poff_in = (sp->off_in == -1) ? NULL : &sp->off_in; |
| 2784 | 2776 | poff_out = (sp->off_out == -1) ? NULL : &sp->off_out; |
| @@ -3355,8 +3347,12 @@ static int io_statx(struct io_kiocb *req, bool force_nonblock) · 570 unmodified lines | ||
| 3355 | 3347 | struct kstat stat; |
| 3356 | 3348 | int ret; |
| 3357 | 3349 | |
| 3358 | − if (force_nonblock) | |
| 3350 | + if (force_nonblock) { | |
| 3351 | + /* only need file table for an actual valid fd */ | |
| 3352 | + if (ctx->dfd == -1 || ctx->dfd == AT_FDCWD) | |
| 3353 | + req->flags |= REQ_F_NO_FILE_TABLE; | |
| 3359 | 3354 | return -EAGAIN; |
| 3355 | + } | |
| 3360 | 3356 | |
| 3361 | 3357 | if (vfs_stat_set_lookup_flags(&lookup_flags, ctx->how.flags)) |
| 3362 | 3358 | return -EINVAL; |
| @@ -3502,7 +3498,7 @@ static void io_sync_file_range_finish(struct io_wq_work **workptr) · 139 unmodified lines | ||
| 3502 | 3498 | if (io_req_cancelled(req)) |
| 3503 | 3499 | return; |
| 3504 | 3500 | __io_sync_file_range(req); |
| 3505 | − io_put_req(req); /* put submission ref */ | |
| 3501 | + io_steal_work(req, workptr); | |
| 3506 | 3502 | } |
| 3507 | 3503 | |
| 3508 | 3504 | static int io_sync_file_range(struct io_kiocb *req, bool force_nonblock) |
| @@ -4200,17 +4196,17 @@ static void io_async_task_func(struct callback_head *cb) · 691 unmodified lines | ||
| 4200 | 4196 | |
| 4201 | 4197 | spin_unlock_irq(&ctx->completion_lock); |
| 4202 | 4198 | |
| 4199 | + /* restore ->work in case we need to retry again */ | |
| 4200 | + memcpy(&req->work, &apoll->work, sizeof(req->work)); | |
| 4201 | + | |
| 4203 | 4202 | if (canceled) { |
| 4204 | 4203 | kfree(apoll); |
| 4205 | 4204 | io_cqring_ev_posted(ctx); |
| 4206 | 4205 | req_set_fail_links(req); |
| 4207 | − io_put_req(req); | |
| 4206 | + io_double_put_req(req); | |
| 4208 | 4207 | return; |
| 4209 | 4208 | } |
| 4210 | 4209 | |
| 4211 | − /* restore ->work in case we need to retry again */ | |
| 4212 | − memcpy(&req->work, &apoll->work, sizeof(req->work)); | |
| 4213 | − | |
| 4214 | 4210 | __set_current_state(TASK_RUNNING); |
| 4215 | 4211 | mutex_lock(&ctx->uring_lock); |
| 4216 | 4212 | __io_queue_sqe(req, NULL); |
| @@ -4369,7 +4365,7 @@ static bool io_poll_remove_one(struct io_kiocb *req) · 152 unmodified lines | ||
| 4369 | 4365 | |
| 4370 | 4366 | hash_del(&req->hash_node); |
| 4371 | 4367 | |
| 4372 | − if (apoll) { | |
| 4368 | + if (do_complete && apoll) { | |
| 4373 | 4369 | /* |
| 4374 | 4370 | * restore ->work because we need to call io_req_work_drop_env. |
| 4375 | 4371 | */ |
| @@ -5015,7 +5011,7 @@ static int io_req_defer(struct io_kiocb *req, const struct io_uring_sqe *sqe) · 639 unmodified lines | ||
| 5015 | 5011 | int ret; |
| 5016 | 5012 | |
| 5017 | 5013 | /* Still need defer if there is pending req in defer list. */ |
| 5018 | − if (!req_need_defer(req) && list_empty(&ctx->defer_list)) | |
| 5014 | + if (!req_need_defer(req) && list_empty_careful(&ctx->defer_list)) | |
| 5019 | 5015 | return 0; |
| 5020 | 5016 | |
| 5021 | 5017 | if (!req->io && io_alloc_async_ctx(req)) |
| @@ -5364,15 +5360,6 @@ static void io_wq_submit_work(struct io_wq_work **workptr) · 342 unmodified lines | ||
| 5364 | 5360 | io_steal_work(req, workptr); |
| 5365 | 5361 | } |
| 5366 | 5362 | |
| 5367 | −static int io_req_needs_file(struct io_kiocb *req, int fd) | |
| 5368 | −{ | |
| 5369 | − if (!io_op_defs[req->opcode].needs_file) | |
| 5370 | − return 0; | |
| 5371 | − if ((fd == -1 || fd == AT_FDCWD) && io_op_defs[req->opcode].fd_non_neg) | |
| 5372 | − return 0; | |
| 5373 | − return 1; | |
| 5374 | −} | |
| 5375 | − | |
| 5376 | 5363 | static inline struct file *io_file_from_index(struct io_ring_ctx *ctx, |
| 5377 | 5364 | int index) |
| 5378 | 5365 | { |
| @@ -5410,14 +5397,11 @@ static int io_file_get(struct io_submit_state *state, struct io_kiocb *req, · 31 unmodified lines | ||
| 5410 | 5397 | } |
| 5411 | 5398 | |
| 5412 | 5399 | static int io_req_set_file(struct io_submit_state *state, struct io_kiocb *req, |
| 5413 | − int fd, unsigned int flags) | |
| 5400 | + int fd) | |
| 5414 | 5401 | { |
| 5415 | 5402 | bool fixed; |
| 5416 | 5403 | |
| 5417 | − if (!io_req_needs_file(req, fd)) | |
| 5418 | − return 0; | |
| 5419 | − | |
| 5420 | − fixed = (flags & IOSQE_FIXED_FILE); | |
| 5404 | + fixed = (req->flags & REQ_F_FIXED_FILE) != 0; | |
| 5421 | 5405 | if (unlikely(!fixed && req->needs_fixed_file)) |
| 5422 | 5406 | return -EBADF; |
| 5423 | 5407 | |
| @@ -5429,7 +5413,7 @@ static int io_grab_files(struct io_kiocb *req) · 5 unmodified lines | ||
| 5429 | 5413 | int ret = -EBADF; |
| 5430 | 5414 | struct io_ring_ctx *ctx = req->ctx; |
| 5431 | 5415 | |
| 5432 | − if (req->work.files) | |
| 5416 | + if (req->work.files || (req->flags & REQ_F_NO_FILE_TABLE)) | |
| 5433 | 5417 | return 0; |
| 5434 | 5418 | if (!ctx->ring_file) |
| 5435 | 5419 | return -EBADF; |
| @@ -5794,7 +5778,7 @@ static int io_init_req(struct io_ring_ctx *ctx, struct io_kiocb *req, · 358 unmodified lines | ||
| 5794 | 5778 | struct io_submit_state *state, bool async) |
| 5795 | 5779 | { |
| 5796 | 5780 | unsigned int sqe_flags; |
| 5797 | − int id, fd; | |
| 5781 | + int id; | |
| 5798 | 5782 | |
| 5799 | 5783 | /* |
| 5800 | 5784 | * All io need record the previous position, if LINK vs DARIN, |
| @@ -5846,8 +5830,10 @@ static int io_init_req(struct io_ring_ctx *ctx, struct io_kiocb *req, · 45 unmodified lines | ||
| 5846 | 5830 | IOSQE_ASYNC | IOSQE_FIXED_FILE | |
| 5847 | 5831 | IOSQE_BUFFER_SELECT | IOSQE_IO_LINK); |
| 5848 | 5832 | |
| 5849 | − fd = READ_ONCE(sqe->fd); | |
| 5850 | − return io_req_set_file(state, req, fd, sqe_flags); | |
| 5833 | + if (!io_op_defs[req->opcode].needs_file) | |
| 5834 | + return 0; | |
| 5835 | + | |
| 5836 | + return io_req_set_file(state, req, READ_ONCE(sqe->fd)); | |
| 5851 | 5837 | } |
| 5852 | 5838 | |
| 5853 | 5839 | static int io_submit_sqes(struct io_ring_ctx *ctx, unsigned int nr, |
| @@ -7327,7 +7313,7 @@ static void io_ring_ctx_wait_and_kill(struct io_ring_ctx *ctx) · 1473 unmodified lines | ||
| 7327 | 7313 | * it could cause shutdown to hang. |
| 7328 | 7314 | */ |
| 7329 | 7315 | while (ctx->sqo_thread && !wq_has_sleeper(&ctx->sqo_wait)) |
| 7330 | − cpu_relax(); | |
| 7316 | + cond_resched(); | |
| 7331 | 7317 | |
| 7332 | 7318 | io_kill_timeouts(ctx); |
| 7333 | 7319 | io_poll_remove_all(ctx); |
| @@ -7356,11 +7342,9 @@ static int io_uring_release(struct inode *inode, struct file *file) · 22 unmodified lines | ||
| 7356 | 7342 | static void io_uring_cancel_files(struct io_ring_ctx *ctx, |
| 7357 | 7343 | struct files_struct *files) |
| 7358 | 7344 | { |
| 7359 | − struct io_kiocb *req; | |
| 7360 | − DEFINE_WAIT(wait); | |
| 7361 | − | |
| 7362 | 7345 | while (!list_empty_careful(&ctx->inflight_list)) { |
| 7363 | − struct io_kiocb *cancel_req = NULL; | |
| 7346 | + struct io_kiocb *cancel_req = NULL, *req; | |
| 7347 | + DEFINE_WAIT(wait); | |
| 7364 | 7348 | |
| 7365 | 7349 | spin_lock_irq(&ctx->inflight_lock); |
| 7366 | 7350 | list_for_each_entry(req, &ctx->inflight_list, inflight_entry) { |
| @@ -7400,6 +7384,7 @@ static void io_uring_cancel_files(struct io_ring_ctx *ctx, · 33 unmodified lines | ||
| 7400 | 7384 | */ |
| 7401 | 7385 | if (refcount_sub_and_test(2, &cancel_req->refs)) { |
| 7402 | 7386 | io_put_req(cancel_req); |
| 7387 | + finish_wait(&ctx->inflight_wait, &wait); | |
| 7403 | 7388 | continue; |
| 7404 | 7389 | } |
| 7405 | 7390 | } |
| @@ -7407,8 +7392,8 @@ static void io_uring_cancel_files(struct io_ring_ctx *ctx, · 1 unmodified line | ||
| 7407 | 7392 | io_wq_cancel_work(ctx->io_wq, &cancel_req->work); |
| 7408 | 7393 | io_put_req(cancel_req); |
| 7409 | 7394 | schedule(); |
| 7395 | + finish_wait(&ctx->inflight_wait, &wait); | |
| 7410 | 7396 | } |
| 7411 | − finish_wait(&ctx->inflight_wait, &wait); | |
| 7412 | 7397 | } |
| 7413 | 7398 | |
| 7414 | 7399 | static int io_uring_flush(struct file *file, void *data) |
| @@ -7757,7 +7742,8 @@ err: · 342 unmodified lines | ||
| 7757 | 7742 | return ret; |
| 7758 | 7743 | } |
| 7759 | 7744 | |
| 7760 | −static int io_uring_create(unsigned entries, struct io_uring_params *p) | |
| 7745 | +static int io_uring_create(unsigned entries, struct io_uring_params *p, | |
| 7746 | + struct io_uring_params __user *params) | |
| 7761 | 7747 | { |
| 7762 | 7748 | struct user_struct *user = NULL; |
| 7763 | 7749 | struct io_ring_ctx *ctx; |
| @@ -7849,6 +7835,14 @@ static int io_uring_create(unsigned entries, struct io_uring_params *p) · 85 unmodified lines | ||
| 7849 | 7835 | p->cq_off.overflow = offsetof(struct io_rings, cq_overflow); |
| 7850 | 7836 | p->cq_off.cqes = offsetof(struct io_rings, cqes); |
| 7851 | 7837 | |
| 7838 | + p->features = IORING_FEAT_SINGLE_MMAP | IORING_FEAT_NODROP | | |
| 7839 | + IORING_FEAT_SUBMIT_STABLE | IORING_FEAT_RW_CUR_POS | | |
| 7840 | + IORING_FEAT_CUR_PERSONALITY | IORING_FEAT_FAST_POLL; | |
| 7841 | + | |
| 7842 | + if (copy_to_user(params, p, sizeof(*p))) { | |
| 7843 | + ret = -EFAULT; | |
| 7844 | + goto err; | |
| 7845 | + } | |
| 7852 | 7846 | /* |
| 7853 | 7847 | * Install ring fd as the very last thing, so we don't risk someone |
| 7854 | 7848 | * having closed it before we finish setup |
| @@ -7857,9 +7851,6 @@ static int io_uring_create(unsigned entries, struct io_uring_params *p) · 2 unmodified lines | ||
| 7857 | 7851 | if (ret < 0) |
| 7858 | 7852 | goto err; |
| 7859 | 7853 | |
| 7860 | − p->features = IORING_FEAT_SINGLE_MMAP | IORING_FEAT_NODROP | | |
| 7861 | − IORING_FEAT_SUBMIT_STABLE | IORING_FEAT_RW_CUR_POS | | |
| 7862 | − IORING_FEAT_CUR_PERSONALITY | IORING_FEAT_FAST_POLL; | |
| 7863 | 7854 | trace_io_uring_create(ret, ctx, p->sq_entries, p->cq_entries, p->flags); |
| 7864 | 7855 | return ret; |
| 7865 | 7856 | err: |
| @@ -7875,7 +7866,6 @@ err: · 9 unmodified lines | ||
| 7875 | 7866 | static long io_uring_setup(u32 entries, struct io_uring_params __user *params) |
| 7876 | 7867 | { |
| 7877 | 7868 | struct io_uring_params p; |
| 7878 | − long ret; | |
| 7879 | 7869 | int i; |
| 7880 | 7870 | |
| 7881 | 7871 | if (copy_from_user(&p, params, sizeof(p))) |
| @@ -7890,14 +7880,7 @@ static long io_uring_setup(u32 entries, struct io_uring_params __user *params) · 8 unmodified lines | ||
| 7890 | 7880 | IORING_SETUP_CLAMP | IORING_SETUP_ATTACH_WQ)) |
| 7891 | 7881 | return -EINVAL; |
| 7892 | 7882 | |
| 7893 | − ret = io_uring_create(entries, &p); | |
| 7894 | − if (ret < 0) | |
| 7895 | − return ret; | |
| 7896 | − | |
| 7897 | − if (copy_to_user(params, &p, sizeof(p))) | |
| 7898 | − return -EFAULT; | |
| 7899 | − | |
| 7900 | − return ret; | |
| 7883 | + return io_uring_create(entries, &p, params); | |
| 7901 | 7884 | } |
| 7902 | 7885 | |
| 7903 | 7886 | SYSCALL_DEFINE2(io_uring_setup, u32, entries, |
| @@ -55,6 +55,7 @@ EXPORT_SYMBOL(vfs_ioctl); · 54 unmodified lines | ||
| 55 | 55 | static int ioctl_fibmap(struct file *filp, int __user *p) |
| 56 | 56 | { |
| 57 | 57 | struct inode *inode = file_inode(filp); |
| 58 | + struct super_block *sb = inode->i_sb; | |
| 58 | 59 | int error, ur_block; |
| 59 | 60 | sector_t block; |
| 60 | 61 | |
| @@ -71,6 +72,13 @@ static int ioctl_fibmap(struct file *filp, int __user *p) · 10 unmodified lines | ||
| 71 | 72 | block = ur_block; |
| 72 | 73 | error = bmap(inode, &block); |
| 73 | 74 | |
| 75 | + if (block > INT_MAX) { | |
| 76 | + error = -ERANGE; | |
| 77 | + pr_warn_ratelimited("[%s/%d] FS: %s File: %pD4 would truncate fibmap result\n", | |
| 78 | + current->comm, task_pid_nr(current), | |
| 79 | + sb->s_id, filp); | |
| 80 | + } | |
| 81 | + | |
| 74 | 82 | if (error) |
| 75 | 83 | ur_block = 0; |
| 76 | 84 | else |
| @@ -117,10 +117,7 @@ iomap_bmap_actor(struct inode *inode, loff_t pos, loff_t length, · 116 unmodified lines | ||
| 117 | 117 | |
| 118 | 118 | if (iomap->type == IOMAP_MAPPED) { |
| 119 | 119 | addr = (pos - iomap->offset + iomap->addr) >> inode->i_blkbits; |
| 120 | − if (addr > INT_MAX) | |
| 121 | − WARN(1, "would truncate bmap result\n"); | |
| 122 | − else | |
| 123 | − *bno = addr; | |
| 120 | + *bno = addr; | |
| 124 | 121 | } |
| 125 | 122 | return 0; |
| 126 | 123 | } |
| @@ -253,37 +253,45 @@ int nfs3_proc_setacls(struct inode *inode, struct posix_acl *acl, · 252 unmodified lines | ||
| 253 | 253 | |
| 254 | 254 | int nfs3_set_acl(struct inode *inode, struct posix_acl *acl, int type) |
| 255 | 255 | { |
| 256 | − struct posix_acl *alloc = NULL, *dfacl = NULL; | |
| 256 | + struct posix_acl *orig = acl, *dfacl = NULL, *alloc; | |
| 257 | 257 | int status; |
| 258 | 258 | |
| 259 | 259 | if (S_ISDIR(inode->i_mode)) { |
| 260 | 260 | switch(type) { |
| 261 | 261 | case ACL_TYPE_ACCESS: |
| 262 | − alloc = dfacl = get_acl(inode, ACL_TYPE_DEFAULT); | |
| 262 | + alloc = get_acl(inode, ACL_TYPE_DEFAULT); | |
| 263 | 263 | if (IS_ERR(alloc)) |
| 264 | 264 | goto fail; |
| 265 | + dfacl = alloc; | |
| 265 | 266 | break; |
| 266 | 267 | |
| 267 | 268 | case ACL_TYPE_DEFAULT: |
| 268 | − dfacl = acl; | |
| 269 | − alloc = acl = get_acl(inode, ACL_TYPE_ACCESS); | |
| 269 | + alloc = get_acl(inode, ACL_TYPE_ACCESS); | |
| 270 | 270 | if (IS_ERR(alloc)) |
| 271 | 271 | goto fail; |
| 272 | + dfacl = acl; | |
| 273 | + acl = alloc; | |
| 272 | 274 | break; |
| 273 | 275 | } |
| 274 | 276 | } |
| 275 | 277 | |
| 276 | 278 | if (acl == NULL) { |
| 277 | − alloc = acl = posix_acl_from_mode(inode->i_mode, GFP_KERNEL); | |
| 279 | + alloc = posix_acl_from_mode(inode->i_mode, GFP_KERNEL); | |
| 278 | 280 | if (IS_ERR(alloc)) |
| 279 | 281 | goto fail; |
| 282 | + acl = alloc; | |
| 280 | 283 | } |
| 281 | 284 | status = __nfs3_proc_setacls(inode, acl, dfacl); |
| 282 | − posix_acl_release(alloc); | |
| 285 | +out: | |
| 286 | + if (acl != orig) | |
| 287 | + posix_acl_release(acl); | |
| 288 | + if (dfacl != orig) | |
| 289 | + posix_acl_release(dfacl); | |
| 283 | 290 | return status; |
| 284 | 291 | |
| 285 | 292 | fail: |
| 286 | − return PTR_ERR(alloc); | |
| 293 | + status = PTR_ERR(alloc); | |
| 294 | + goto out; | |
| 287 | 295 | } |
| 288 | 296 | |
| 289 | 297 | const struct xattr_handler *nfs3_xattr_handlers[] = { |
| @@ -7891,6 +7891,7 @@ static void · 7890 unmodified lines | ||
| 7891 | 7891 | nfs4_bind_one_conn_to_session_done(struct rpc_task *task, void *calldata) |
| 7892 | 7892 | { |
| 7893 | 7893 | struct nfs41_bind_conn_to_session_args *args = task->tk_msg.rpc_argp; |
| 7894 | + struct nfs41_bind_conn_to_session_res *res = task->tk_msg.rpc_resp; | |
| 7894 | 7895 | struct nfs_client *clp = args->client; |
| 7895 | 7896 | |
| 7896 | 7897 | switch (task->tk_status) { |
| @@ -7899,6 +7900,12 @@ nfs4_bind_one_conn_to_session_done(struct rpc_task *task, void *calldata) · 2 unmodified lines | ||
| 7899 | 7900 | nfs4_schedule_session_recovery(clp->cl_session, |
| 7900 | 7901 | task->tk_status); |
| 7901 | 7902 | } |
| 7903 | + if (args->dir == NFS4_CDFC4_FORE_OR_BOTH && | |
| 7904 | + res->dir != NFS4_CDFS4_BOTH) { | |
| 7905 | + rpc_task_close_connection(task); | |
| 7906 | + if (args->retries++ < MAX_BIND_CONN_TO_SESSION_RETRIES) | |
| 7907 | + rpc_restart_call(task); | |
| 7908 | + } | |
| 7902 | 7909 | } |
| 7903 | 7910 | |
| 7904 | 7911 | static const struct rpc_call_ops nfs4_bind_one_conn_to_session_ops = { |
| @@ -7921,6 +7928,7 @@ int nfs4_proc_bind_one_conn_to_session(struct rpc_clnt *clnt, · 16 unmodified lines | ||
| 7921 | 7928 | struct nfs41_bind_conn_to_session_args args = { |
| 7922 | 7929 | .client = clp, |
| 7923 | 7930 | .dir = NFS4_CDFC4_FORE_OR_BOTH, |
| 7931 | + .retries = 0, | |
| 7924 | 7932 | }; |
| 7925 | 7933 | struct nfs41_bind_conn_to_session_res res; |
| 7926 | 7934 | struct rpc_message msg = { |
| @@ -9191,8 +9199,7 @@ nfs4_proc_layoutget(struct nfs4_layoutget *lgp, long *timeout) · 1264 unmodified lines | ||
| 9191 | 9199 | nfs4_init_sequence(&lgp->args.seq_args, &lgp->res.seq_res, 0, 0); |
| 9192 | 9200 | |
| 9193 | 9201 | task = rpc_run_task(&task_setup_data); |
| 9194 | − if (IS_ERR(task)) | |
| 9195 | − return ERR_CAST(task); | |
| 9202 | + | |
| 9196 | 9203 | status = rpc_wait_for_completion_task(task); |
| 9197 | 9204 | if (status != 0) |
| 9198 | 9205 | goto out; |
| @@ -1332,13 +1332,15 @@ _pnfs_return_layout(struct inode *ino) · 1331 unmodified lines | ||
| 1332 | 1332 | !valid_layout) { |
| 1333 | 1333 | spin_unlock(&ino->i_lock); |
| 1334 | 1334 | dprintk("NFS: %s no layout segments to return\n", __func__); |
| 1335 | − goto out_put_layout_hdr; | |
| 1335 | + goto out_wait_layoutreturn; | |
| 1336 | 1336 | } |
| 1337 | 1337 | |
| 1338 | 1338 | send = pnfs_prepare_layoutreturn(lo, &stateid, &cred, NULL); |
| 1339 | 1339 | spin_unlock(&ino->i_lock); |
| 1340 | 1340 | if (send) |
| 1341 | 1341 | status = pnfs_send_layoutreturn(lo, &stateid, &cred, IOMODE_ANY, true); |
| 1342 | +out_wait_layoutreturn: | |
| 1343 | + wait_on_bit(&lo->plh_flags, NFS_LAYOUT_RETURN, TASK_UNINTERRUPTIBLE); | |
| 1342 | 1344 | out_put_layout_hdr: |
| 1343 | 1345 | pnfs_free_lseg_list(&tmp_list); |
| 1344 | 1346 | pnfs_put_layout_hdr(lo); |
| @@ -1456,18 +1458,15 @@ retry: · 111 unmodified lines | ||
| 1456 | 1458 | /* lo ref dropped in pnfs_roc_release() */ |
| 1457 | 1459 | layoutreturn = pnfs_prepare_layoutreturn(lo, &stateid, &lc_cred, &iomode); |
| 1458 | 1460 | /* If the creds don't match, we can't compound the layoutreturn */ |
| 1459 | − if (!layoutreturn) | |
| 1461 | + if (!layoutreturn || cred_fscmp(cred, lc_cred) != 0) | |
| 1460 | 1462 | goto out_noroc; |
| 1461 | − if (cred_fscmp(cred, lc_cred) != 0) | |
| 1462 | − goto out_noroc_put_cred; | |
| 1463 | 1463 | |
| 1464 | 1464 | roc = layoutreturn; |
| 1465 | 1465 | pnfs_init_layoutreturn_args(args, lo, &stateid, iomode); |
| 1466 | 1466 | res->lrs_present = 0; |
| 1467 | 1467 | layoutreturn = false; |
| 1468 | − | |
| 1469 | −out_noroc_put_cred: | |
| 1470 | 1468 | put_cred(lc_cred); |
| 1469 | + | |
| 1471 | 1470 | out_noroc: |
| 1472 | 1471 | spin_unlock(&ino->i_lock); |
| 1473 | 1472 | rcu_read_unlock(); |
| @@ -185,7 +185,7 @@ static int __nfs_list_for_each_server(struct list_head *head, · 184 unmodified lines | ||
| 185 | 185 | |
| 186 | 186 | rcu_read_lock(); |
| 187 | 187 | list_for_each_entry_rcu(server, head, client_link) { |
| 188 | − if (!nfs_sb_active(server->super)) | |
| 188 | + if (!(server->super && nfs_sb_active(server->super))) | |
| 189 | 189 | continue; |
| 190 | 190 | rcu_read_unlock(); |
| 191 | 191 | if (last) |
| @@ -1312,6 +1312,7 @@ nfsd4_run_cb_work(struct work_struct *work) · 1311 unmodified lines | ||
| 1312 | 1312 | container_of(work, struct nfsd4_callback, cb_work); |
| 1313 | 1313 | struct nfs4_client *clp = cb->cb_clp; |
| 1314 | 1314 | struct rpc_clnt *clnt; |
| 1315 | + int flags; | |
| 1315 | 1316 | |
| 1316 | 1317 | if (cb->cb_need_restart) { |
| 1317 | 1318 | cb->cb_need_restart = false; |
| @@ -1340,7 +1341,8 @@ nfsd4_run_cb_work(struct work_struct *work) · 22 unmodified lines | ||
| 1340 | 1341 | } |
| 1341 | 1342 | |
| 1342 | 1343 | cb->cb_msg.rpc_cred = clp->cl_cb_cred; |
| 1343 | − rpc_call_async(clnt, &cb->cb_msg, RPC_TASK_SOFT | RPC_TASK_SOFTCONN, | |
| 1344 | + flags = clp->cl_minorversion ? RPC_TASK_NOCONNECT : RPC_TASK_SOFTCONN; | |
| 1345 | + rpc_call_async(clnt, &cb->cb_msg, RPC_TASK_SOFT | flags, | |
| 1344 | 1346 | cb->cb_ops ? &nfsd4_cb_ops : &nfsd4_cb_probe_ops, cb); |
| 1345 | 1347 | } |
| 1346 | 1348 | |
| @@ -267,6 +267,8 @@ find_or_allocate_block(struct nfs4_lockowner *lo, struct knfsd_fh *fh, · 266 unmodified lines | ||
| 267 | 267 | if (!nbl) { |
| 268 | 268 | nbl= kmalloc(sizeof(*nbl), GFP_KERNEL); |
| 269 | 269 | if (nbl) { |
| 270 | + INIT_LIST_HEAD(&nbl->nbl_list); | |
| 271 | + INIT_LIST_HEAD(&nbl->nbl_lru); | |
| 270 | 272 | fh_copy_shallow(&nbl->nbl_fh, fh); |
| 271 | 273 | locks_init_lock(&nbl->nbl_lock); |
| 272 | 274 | nfsd4_init_cb(&nbl->nbl_cb, lo->lo_owner.so_client, |
| @@ -275,7 +275,6 @@ static ssize_t dlmfs_file_write(struct file *filp, · 274 unmodified lines | ||
| 275 | 275 | loff_t *ppos) |
| 276 | 276 | { |
| 277 | 277 | int bytes_left; |
| 278 | − ssize_t writelen; | |
| 279 | 278 | char *lvb_buf; |
| 280 | 279 | struct inode *inode = file_inode(filp); |
| 281 | 280 | |
| @@ -285,32 +284,30 @@ static ssize_t dlmfs_file_write(struct file *filp, · 3 unmodified lines | ||
| 285 | 284 | if (*ppos >= i_size_read(inode)) |
| 286 | 285 | return -ENOSPC; |
| 287 | 286 | |
| 287 | + /* don't write past the lvb */ | |
| 288 | + if (count > i_size_read(inode) - *ppos) | |
| 289 | + count = i_size_read(inode) - *ppos; | |
| 290 | + | |
| 288 | 291 | if (!count) |
| 289 | 292 | return 0; |
| 290 | 293 | |
| 291 | 294 | if (!access_ok(buf, count)) |
| 292 | 295 | return -EFAULT; |
| 293 | 296 | |
| 294 | − /* don't write past the lvb */ | |
| 295 | − if ((count + *ppos) > i_size_read(inode)) | |
| 296 | − writelen = i_size_read(inode) - *ppos; | |
| 297 | − else | |
| 298 | − writelen = count - *ppos; | |
| 299 | − | |
| 300 | − lvb_buf = kmalloc(writelen, GFP_NOFS); | |
| 297 | + lvb_buf = kmalloc(count, GFP_NOFS); | |
| 301 | 298 | if (!lvb_buf) |
| 302 | 299 | return -ENOMEM; |
| 303 | 300 | |
| 304 | − bytes_left = copy_from_user(lvb_buf, buf, writelen); | |
| 305 | − writelen -= bytes_left; | |
| 306 | − if (writelen) | |
| 307 | − user_dlm_write_lvb(inode, lvb_buf, writelen); | |
| 301 | + bytes_left = copy_from_user(lvb_buf, buf, count); | |
| 302 | + count -= bytes_left; | |
| 303 | + if (count) | |
| 304 | + user_dlm_write_lvb(inode, lvb_buf, count); | |
| 308 | 305 | |
| 309 | 306 | kfree(lvb_buf); |
| 310 | 307 | |
| 311 | − *ppos = *ppos + writelen; | |
| 312 | − mlog(0, "wrote %zd bytes\n", writelen); | |
| 313 | − return writelen; | |
| 308 | + *ppos = *ppos + count; | |
| 309 | + mlog(0, "wrote %zu bytes\n", count); | |
| 310 | + return count; | |
| 314 | 311 | } |
| 315 | 312 | |
| 316 | 313 | static void dlmfs_init_once(void *foo) |
| @@ -261,14 +261,13 @@ static int propagate_one(struct mount *m) · 260 unmodified lines | ||
| 261 | 261 | child = copy_tree(last_source, last_source->mnt.mnt_root, type); |
| 262 | 262 | if (IS_ERR(child)) |
| 263 | 263 | return PTR_ERR(child); |
| 264 | + read_seqlock_excl(&mount_lock); | |
| 264 | 265 | mnt_set_mountpoint(m, mp, child); |
| 266 | + if (m->mnt_master != dest_master) | |
| 267 | + SET_MNT_MARK(m->mnt_master); | |
| 268 | + read_sequnlock_excl(&mount_lock); | |
| 265 | 269 | last_dest = m; |
| 266 | 270 | last_source = child; |
| 267 | − if (m->mnt_master != dest_master) { | |
| 268 | − read_seqlock_excl(&mount_lock); | |
| 269 | − SET_MNT_MARK(m->mnt_master); | |
| 270 | − read_sequnlock_excl(&mount_lock); | |
| 271 | − } | |
| 272 | 271 | hlist_add_head(&child->mnt_hash, list); |
| 273 | 272 | return count_mounts(m->mnt_ns, child); |
| 274 | 273 | } |
| @@ -3286,7 +3286,6 @@ static const struct inode_operations proc_tgid_base_inode_operations = { · 3285 unmodified lines | ||
| 3286 | 3286 | void proc_flush_pid(struct pid *pid) |
| 3287 | 3287 | { |
| 3288 | 3288 | proc_invalidate_siblings_dcache(&pid->inodes, &pid->lock); |
| 3289 | − put_pid(pid); | |
| 3290 | 3289 | } |
| 3291 | 3290 | |
| 3292 | 3291 | static struct dentry *proc_pid_instantiate(struct dentry * dentry, |
| @@ -266,7 +266,8 @@ static int vmcoredd_mmap_dumps(struct vm_area_struct *vma, unsigned long dst, · 265 unmodified lines | ||
| 266 | 266 | if (start < offset + dump->size) { |
| 267 | 267 | tsz = min(offset + (u64)dump->size - start, (u64)size); |
| 268 | 268 | buf = dump->buf + start - offset; |
| 269 | − if (remap_vmalloc_range_partial(vma, dst, buf, tsz)) { | |
| 269 | + if (remap_vmalloc_range_partial(vma, dst, buf, 0, | |
| 270 | + tsz)) { | |
| 270 | 271 | ret = -EFAULT; |
| 271 | 272 | goto out_unlock; |
| 272 | 273 | } |
| @@ -624,7 +625,7 @@ static int mmap_vmcore(struct file *file, struct vm_area_struct *vma) · 351 unmodified lines | ||
| 624 | 625 | tsz = min(elfcorebuf_sz + elfnotes_sz - (size_t)start, size); |
| 625 | 626 | kaddr = elfnotes_buf + start - elfcorebuf_sz - vmcoredd_orig_sz; |
| 626 | 627 | if (remap_vmalloc_range_partial(vma, vma->vm_start + len, |
| 627 | − kaddr, tsz)) | |
| 628 | + kaddr, 0, tsz)) | |
| 628 | 629 | goto fail; |
| 629 | 630 | |
| 630 | 631 | size -= tsz; |
| @@ -1118,6 +1118,10 @@ long do_splice(struct file *in, loff_t __user *off_in, · 1117 unmodified lines | ||
| 1118 | 1118 | loff_t offset; |
| 1119 | 1119 | long ret; |
| 1120 | 1120 | |
| 1121 | + if (unlikely(!(in->f_mode & FMODE_READ) || | |
| 1122 | + !(out->f_mode & FMODE_WRITE))) | |
| 1123 | + return -EBADF; | |
| 1124 | + | |
| 1121 | 1125 | ipipe = get_pipe_info(in); |
| 1122 | 1126 | opipe = get_pipe_info(out); |
| 1123 | 1127 | |
| @@ -1125,12 +1129,6 @@ long do_splice(struct file *in, loff_t __user *off_in, · 1 unmodified line | ||
| 1125 | 1129 | if (off_in || off_out) |
| 1126 | 1130 | return -ESPIPE; |
| 1127 | 1131 | |
| 1128 | − if (!(in->f_mode & FMODE_READ)) | |
| 1129 | − return -EBADF; | |
| 1130 | − | |
| 1131 | − if (!(out->f_mode & FMODE_WRITE)) | |
| 1132 | − return -EBADF; | |
| 1133 | − | |
| 1134 | 1132 | /* Splicing to self would be fun, but... */ |
| 1135 | 1133 | if (ipipe == opipe) |
| 1136 | 1134 | return -EINVAL; |
| @@ -1153,9 +1151,6 @@ long do_splice(struct file *in, loff_t __user *off_in, · 16 unmodified lines | ||
| 1153 | 1151 | offset = out->f_pos; |
| 1154 | 1152 | } |
| 1155 | 1153 | |
| 1156 | − if (unlikely(!(out->f_mode & FMODE_WRITE))) | |
| 1157 | − return -EBADF; | |
| 1158 | − | |
| 1159 | 1154 | if (unlikely(out->f_flags & O_APPEND)) |
| 1160 | 1155 | return -EINVAL; |
| 1161 | 1156 | |
| @@ -1440,15 +1435,11 @@ SYSCALL_DEFINE6(splice, int, fd_in, loff_t __user *, off_in, · 278 unmodified lines | ||
| 1440 | 1435 | error = -EBADF; |
| 1441 | 1436 | in = fdget(fd_in); |
| 1442 | 1437 | if (in.file) { |
| 1443 | − if (in.file->f_mode & FMODE_READ) { | |
| 1444 | − out = fdget(fd_out); | |
| 1445 | − if (out.file) { | |
| 1446 | − if (out.file->f_mode & FMODE_WRITE) | |
| 1447 | − error = do_splice(in.file, off_in, | |
| 1448 | − out.file, off_out, | |
| 1449 | − len, flags); | |
| 1450 | − fdput(out); | |
| 1451 | − } | |
| 1438 | + out = fdget(fd_out); | |
| 1439 | + if (out.file) { | |
| 1440 | + error = do_splice(in.file, off_in, out.file, off_out, | |
| 1441 | + len, flags); | |
| 1442 | + fdput(out); | |
| 1452 | 1443 | } |
| 1453 | 1444 | fdput(in); |
| 1454 | 1445 | } |
| @@ -1770,6 +1761,10 @@ static long do_tee(struct file *in, struct file *out, size_t len, · 315 unmodified lines | ||
| 1770 | 1761 | struct pipe_inode_info *opipe = get_pipe_info(out); |
| 1771 | 1762 | int ret = -EINVAL; |
| 1772 | 1763 | |
| 1764 | + if (unlikely(!(in->f_mode & FMODE_READ) || | |
| 1765 | + !(out->f_mode & FMODE_WRITE))) | |
| 1766 | + return -EBADF; | |
| 1767 | + | |
| 1773 | 1768 | /* |
| 1774 | 1769 | * Duplicate the contents of ipipe to opipe without actually |
| 1775 | 1770 | * copying the data. |
| @@ -1795,7 +1790,7 @@ static long do_tee(struct file *in, struct file *out, size_t len, · 19 unmodified lines | ||
| 1795 | 1790 | |
| 1796 | 1791 | SYSCALL_DEFINE4(tee, int, fdin, int, fdout, size_t, len, unsigned int, flags) |
| 1797 | 1792 | { |
| 1798 | − struct fd in; | |
| 1793 | + struct fd in, out; | |
| 1799 | 1794 | int error; |
| 1800 | 1795 | |
| 1801 | 1796 | if (unlikely(flags & ~SPLICE_F_ALL)) |
| @@ -1807,14 +1802,10 @@ SYSCALL_DEFINE4(tee, int, fdin, int, fdout, size_t, len, unsigned int, flags) · 5 unmodified lines | ||
| 1807 | 1802 | error = -EBADF; |
| 1808 | 1803 | in = fdget(fdin); |
| 1809 | 1804 | if (in.file) { |
| 1810 | − if (in.file->f_mode & FMODE_READ) { | |
| 1811 | − struct fd out = fdget(fdout); | |
| 1812 | − if (out.file) { | |
| 1813 | − if (out.file->f_mode & FMODE_WRITE) | |
| 1814 | − error = do_tee(in.file, out.file, | |
| 1815 | − len, flags); | |
| 1816 | − fdput(out); | |
| 1817 | − } | |
| 1805 | + out = fdget(fdout); | |
| 1806 | + if (out.file) { | |
| 1807 | + error = do_tee(in.file, out.file, len, flags); | |
| 1808 | + fdput(out); | |
| 1818 | 1809 | } |
| 1819 | 1810 | fdput(in); |
| 1820 | 1811 | } |
| @@ -1302,8 +1302,8 @@ int get_tree_bdev(struct fs_context *fc, · 1301 unmodified lines | ||
| 1302 | 1302 | mutex_lock(&bdev->bd_fsfreeze_mutex); |
| 1303 | 1303 | if (bdev->bd_fsfreeze_count > 0) { |
| 1304 | 1304 | mutex_unlock(&bdev->bd_fsfreeze_mutex); |
| 1305 | − blkdev_put(bdev, mode); | |
| 1306 | 1305 | warnf(fc, "%pg: Can't mount, blockdev is frozen", bdev); |
| 1306 | + blkdev_put(bdev, mode); | |
| 1307 | 1307 | return -EBUSY; |
| 1308 | 1308 | } |
| 1309 | 1309 | |
| @@ -164,7 +164,7 @@ static int vboxsf_fill_super(struct super_block *sb, struct fs_context *fc) · 163 unmodified lines | ||
| 164 | 164 | goto fail_free; |
| 165 | 165 | } |
| 166 | 166 | |
| 167 | − err = super_setup_bdi_name(sb, "vboxsf-%s.%d", fc->source, sbi->bdi_id); | |
| 167 | + err = super_setup_bdi_name(sb, "vboxsf-%d", sbi->bdi_id); | |
| 168 | 168 | if (err) |
| 169 | 169 | goto fail_free; |
| 170 | 170 | |
| @@ -56,6 +56,7 @@ mandatory-y += topology.h · 55 unmodified lines | ||
| 56 | 56 | mandatory-y += trace_clock.h |
| 57 | 57 | mandatory-y += uaccess.h |
| 58 | 58 | mandatory-y += unaligned.h |
| 59 | +mandatory-y += vermagic.h | |
| 59 | 60 | mandatory-y += vga.h |
| 60 | 61 | mandatory-y += word-at-a-time.h |
| 61 | 62 | mandatory-y += xor.h |
| @@ -53,6 +53,9 @@ extern char __ctors_start[], __ctors_end[]; · 52 unmodified lines | ||
| 53 | 53 | /* Start and end of .opd section - used for function descriptors. */ |
| 54 | 54 | extern char __start_opd[], __end_opd[]; |
| 55 | 55 | |
| 56 | +/* Start and end of instrumentation protected text section */ | |
| 57 | +extern char __noinstr_text_start[], __noinstr_text_end[]; | |
| 58 | + | |
| 56 | 59 | extern __visible const void __nosave_begin, __nosave_end; |
| 57 | 60 | |
| 58 | 61 | /* Function descriptor handling (if any). Override in asm/sections.h */ |
| @@ -0,0 +1,7 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 2 | +#ifndef _ASM_GENERIC_VERMAGIC_H | |
| 3 | +#define _ASM_GENERIC_VERMAGIC_H | |
| 4 | + | |
| 5 | +#define MODULE_ARCH_VERMAGIC "" | |
| 6 | + | |
| 7 | +#endif /* _ASM_GENERIC_VERMAGIC_H */ | |
| @@ -540,6 +540,15 @@ · 539 unmodified lines | ||
| 540 | 540 | . = ALIGN((align)); \ |
| 541 | 541 | __end_rodata = .; |
| 542 | 542 | |
| 543 | +/* | |
| 544 | + * Non-instrumentable text section | |
| 545 | + */ | |
| 546 | +#define NOINSTR_TEXT \ | |
| 547 | + ALIGN_FUNCTION(); \ | |
| 548 | + __noinstr_text_start = .; \ | |
| 549 | + *(.noinstr.text) \ | |
| 550 | + __noinstr_text_end = .; | |
| 551 | + | |
| 543 | 552 | /* |
| 544 | 553 | * .text section. Map to function alignment to avoid address changes |
| 545 | 554 | * during second ld run in second ld pass when generating System.map |
| @@ -551,6 +560,7 @@ · 5 unmodified lines | ||
| 551 | 560 | #define TEXT_TEXT \ |
| 552 | 561 | ALIGN_FUNCTION(); \ |
| 553 | 562 | *(.text.hot TEXT_MAIN .text.fixup .text.unlikely) \ |
| 563 | + NOINSTR_TEXT \ | |
| 554 | 564 | *(.text..refcount) \ |
| 555 | 565 | *(.ref.text) \ |
| 556 | 566 | MEM_KEEP(init.text*) \ |
| @@ -65,6 +65,7 @@ struct amba_device { · 64 unmodified lines | ||
| 65 | 65 | struct device dev; |
| 66 | 66 | struct resource res; |
| 67 | 67 | struct clk *pclk; |
| 68 | + struct device_dma_parameters dma_parms; | |
| 68 | 69 | unsigned int periphid; |
| 69 | 70 | unsigned int cid; |
| 70 | 71 | struct amba_cs_uci_id uci; |
| @@ -54,7 +54,6 @@ enum wb_reason { · 53 unmodified lines | ||
| 54 | 54 | WB_REASON_SYNC, |
| 55 | 55 | WB_REASON_PERIODIC, |
| 56 | 56 | WB_REASON_LAPTOP_TIMER, |
| 57 | − WB_REASON_FREE_MORE_MEM, | |
| 58 | 57 | WB_REASON_FS_FREE_SPACE, |
| 59 | 58 | /* |
| 60 | 59 | * There is no bdi forker thread any more and works are done |
| @@ -220,6 +219,7 @@ struct backing_dev_info { · 159 unmodified lines | ||
| 220 | 219 | wait_queue_head_t wb_waitq; |
| 221 | 220 | |
| 222 | 221 | struct device *dev; |
| 222 | + char dev_name[64]; | |
| 223 | 223 | struct device *owner; |
| 224 | 224 | |
| 225 | 225 | struct timer_list laptop_mode_wb_timer; |
| @@ -505,13 +505,6 @@ static inline int bdi_rw_congested(struct backing_dev_info *bdi) · 504 unmodified lines | ||
| 505 | 505 | (1 << WB_async_congested)); |
| 506 | 506 | } |
| 507 | 507 | |
| 508 | −extern const char *bdi_unknown_name; | |
| 509 | − | |
| 510 | −static inline const char *bdi_dev_name(struct backing_dev_info *bdi) | |
| 511 | −{ | |
| 512 | − if (!bdi || !bdi->dev) | |
| 513 | − return bdi_unknown_name; | |
| 514 | − return dev_name(bdi->dev); | |
| 515 | −} | |
| 508 | +const char *bdi_dev_name(struct backing_dev_info *bdi); | |
| 516 | 509 | |
| 517 | 510 | #endif /* _LINUX_BACKING_DEV_H */ |
| @@ -120,12 +120,65 @@ void ftrace_likely_update(struct ftrace_likely_data *f, int val, · 119 unmodified lines | ||
| 120 | 120 | /* Annotate a C jump table to allow objtool to follow the code flow */ |
| 121 | 121 | #define __annotate_jump_table __section(.rodata..c_jump_table) |
| 122 | 122 | |
| 123 | +#ifdef CONFIG_DEBUG_ENTRY | |
| 124 | +/* Begin/end of an instrumentation safe region */ | |
| 125 | +#define instrumentation_begin() ({ \ | |
| 126 | + asm volatile("%c0:\n\t" \ | |
| 127 | + ".pushsection .discard.instr_begin\n\t" \ | |
| 128 | + ".long %c0b - .\n\t" \ | |
| 129 | + ".popsection\n\t" : : "i" (__COUNTER__)); \ | |
| 130 | +}) | |
| 131 | + | |
| 132 | +/* | |
| 133 | + * Because instrumentation_{begin,end}() can nest, objtool validation considers | |
| 134 | + * _begin() a +1 and _end() a -1 and computes a sum over the instructions. | |
| 135 | + * When the value is greater than 0, we consider instrumentation allowed. | |
| 136 | + * | |
| 137 | + * There is a problem with code like: | |
| 138 | + * | |
| 139 | + * noinstr void foo() | |
| 140 | + * { | |
| 141 | + * instrumentation_begin(); | |
| 142 | + * ... | |
| 143 | + * if (cond) { | |
| 144 | + * instrumentation_begin(); | |
| 145 | + * ... | |
| 146 | + * instrumentation_end(); | |
| 147 | + * } | |
| 148 | + * bar(); | |
| 149 | + * instrumentation_end(); | |
| 150 | + * } | |
| 151 | + * | |
| 152 | + * If instrumentation_end() would be an empty label, like all the other | |
| 153 | + * annotations, the inner _end(), which is at the end of a conditional block, | |
| 154 | + * would land on the instruction after the block. | |
| 155 | + * | |
| 156 | + * If we then consider the sum of the !cond path, we'll see that the call to | |
| 157 | + * bar() is with a 0-value, even though, we meant it to happen with a positive | |
| 158 | + * value. | |
| 159 | + * | |
| 160 | + * To avoid this, have _end() be a NOP instruction, this ensures it will be | |
| 161 | + * part of the condition block and does not escape. | |
| 162 | + */ | |
| 163 | +#define instrumentation_end() ({ \ | |
| 164 | + asm volatile("%c0: nop\n\t" \ | |
| 165 | + ".pushsection .discard.instr_end\n\t" \ | |
| 166 | + ".long %c0b - .\n\t" \ | |
| 167 | + ".popsection\n\t" : : "i" (__COUNTER__)); \ | |
| 168 | +}) | |
| 169 | +#endif /* CONFIG_DEBUG_ENTRY */ | |
| 170 | + | |
| 123 | 171 | #else |
| 124 | 172 | #define annotate_reachable() |
| 125 | 173 | #define annotate_unreachable() |
| 126 | 174 | #define __annotate_jump_table |
| 127 | 175 | #endif |
| 128 | 176 | |
| 177 | +#ifndef instrumentation_begin | |
| 178 | +#define instrumentation_begin() do { } while(0) | |
| 179 | +#define instrumentation_end() do { } while(0) | |
| 180 | +#endif | |
| 181 | + | |
| 129 | 182 | #ifndef ASM_UNREACHABLE |
| 130 | 183 | # define ASM_UNREACHABLE |
| 131 | 184 | #endif |
| @@ -118,6 +118,10 @@ struct ftrace_likely_data { · 117 unmodified lines | ||
| 118 | 118 | #define notrace __attribute__((__no_instrument_function__)) |
| 119 | 119 | #endif |
| 120 | 120 | |
| 121 | +/* Section for code which can't be instrumented at all */ | |
| 122 | +#define noinstr \ | |
| 123 | + noinline notrace __attribute((__section__(".noinstr.text"))) | |
| 124 | + | |
| 121 | 125 | /* |
| 122 | 126 | * it doesn't make sense on ARM (currently the only user of __naked) |
| 123 | 127 | * to trace naked functions because then mcount is called without |
| @@ -103,8 +103,8 @@ void debugfs_create_u8(const char *name, umode_t mode, struct dentry *parent, · 102 unmodified lines | ||
| 103 | 103 | u8 *value); |
| 104 | 104 | void debugfs_create_u16(const char *name, umode_t mode, struct dentry *parent, |
| 105 | 105 | u16 *value); |
| 106 | −struct dentry *debugfs_create_u32(const char *name, umode_t mode, | |
| 107 | − struct dentry *parent, u32 *value); | |
| 106 | +void debugfs_create_u32(const char *name, umode_t mode, struct dentry *parent, | |
| 107 | + u32 *value); | |
| 108 | 108 | void debugfs_create_u64(const char *name, umode_t mode, struct dentry *parent, |
| 109 | 109 | u64 *value); |
| 110 | 110 | struct dentry *debugfs_create_ulong(const char *name, umode_t mode, |
| @@ -250,12 +250,8 @@ static inline void debugfs_create_u8(const char *name, umode_t mode, · 139 unmodified lines | ||
| 250 | 250 | static inline void debugfs_create_u16(const char *name, umode_t mode, |
| 251 | 251 | struct dentry *parent, u16 *value) { } |
| 252 | 252 | |
| 253 | −static inline struct dentry *debugfs_create_u32(const char *name, umode_t mode, | |
| 254 | − struct dentry *parent, | |
| 255 | − u32 *value) | |
| 256 | −{ | |
| 257 | − return ERR_PTR(-ENODEV); | |
| 258 | −} | |
| 253 | +static inline void debugfs_create_u32(const char *name, umode_t mode, | |
| 254 | + struct dentry *parent, u32 *value) { } | |
| 259 | 255 | |
| 260 | 256 | static inline void debugfs_create_u64(const char *name, umode_t mode, |
| 261 | 257 | struct dentry *parent, u64 *value) { } |
| @@ -329,13 +329,12 @@ struct dma_buf { · 328 unmodified lines | ||
| 329 | 329 | |
| 330 | 330 | /** |
| 331 | 331 | * struct dma_buf_attach_ops - importer operations for an attachment |
| 332 | − * @move_notify: [optional] notification that the DMA-buf is moving | |
| 333 | 332 | * |
| 334 | 333 | * Attachment operations implemented by the importer. |
| 335 | 334 | */ |
| 336 | 335 | struct dma_buf_attach_ops { |
| 337 | 336 | /** |
| 338 | − * @move_notify | |
| 337 | + * @move_notify: [optional] notification that the DMA-buf is moving | |
| 339 | 338 | * |
| 340 | 339 | * If this callback is provided the framework can avoid pinning the |
| 341 | 340 | * backing store while mappings exists. |
| @@ -83,9 +83,9 @@ enum dma_transfer_direction { · 82 unmodified lines | ||
| 83 | 83 | /** |
| 84 | 84 | * Interleaved Transfer Request |
| 85 | 85 | * ---------------------------- |
| 86 | − * A chunk is collection of contiguous bytes to be transfered. | |
| 86 | + * A chunk is collection of contiguous bytes to be transferred. | |
| 87 | 87 | * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG). |
| 88 | − * ICGs may or maynot change between chunks. | |
| 88 | + * ICGs may or may not change between chunks. | |
| 89 | 89 | * A FRAME is the smallest series of contiguous {chunk,icg} pairs, |
| 90 | 90 | * that when repeated an integral number of times, specifies the transfer. |
| 91 | 91 | * A transfer template is specification of a Frame, the number of times |
| @@ -341,13 +341,11 @@ struct dma_chan { · 249 unmodified lines | ||
| 341 | 341 | * @chan: driver channel device |
| 342 | 342 | * @device: sysfs device |
| 343 | 343 | * @dev_id: parent dma_device dev_id |
| 344 | − * @idr_ref: reference count to gate release of dma_device dev_id | |
| 345 | 344 | */ |
| 346 | 345 | struct dma_chan_dev { |
| 347 | 346 | struct dma_chan *chan; |
| 348 | 347 | struct device device; |
| 349 | 348 | int dev_id; |
| 350 | − atomic_t *idr_ref; | |
| 351 | 349 | }; |
| 352 | 350 | |
| 353 | 351 | /** |
| @@ -835,6 +833,8 @@ struct dma_device { · 481 unmodified lines | ||
| 835 | 833 | int dev_id; |
| 836 | 834 | struct device *dev; |
| 837 | 835 | struct module *owner; |
| 836 | + struct ida chan_ida; | |
| 837 | + struct mutex chan_mutex; /* to protect chan_ida */ | |
| 838 | 838 | |
| 839 | 839 | u32 src_addr_widths; |
| 840 | 840 | u32 dst_addr_widths; |
| @@ -1069,7 +1069,7 @@ static inline int dmaengine_terminate_all(struct dma_chan *chan) · 228 unmodified lines | ||
| 1069 | 1069 | * dmaengine_synchronize() needs to be called before it is safe to free |
| 1070 | 1070 | * any memory that is accessed by previously submitted descriptors or before |
| 1071 | 1071 | * freeing any resources accessed from within the completion callback of any |
| 1072 | − * perviously submitted descriptors. | |
| 1072 | + * previously submitted descriptors. | |
| 1073 | 1073 | * |
| 1074 | 1074 | * This function can be called from atomic context as well as from within a |
| 1075 | 1075 | * complete callback of a descriptor submitted on the same channel. |
| @@ -1091,7 +1091,7 @@ static inline int dmaengine_terminate_async(struct dma_chan *chan) · 15 unmodified lines | ||
| 1091 | 1091 | * |
| 1092 | 1092 | * Synchronizes to the DMA channel termination to the current context. When this |
| 1093 | 1093 | * function returns it is guaranteed that all transfers for previously issued |
| 1094 | − * descriptors have stopped and and it is safe to free the memory assoicated | |
| 1094 | + * descriptors have stopped and it is safe to free the memory associated | |
| 1095 | 1095 | * with them. Furthermore it is guaranteed that all complete callback functions |
| 1096 | 1096 | * for a previously submitted descriptor have finished running and it is safe to |
| 1097 | 1097 | * free resources accessed from within the complete callbacks. |
| @@ -983,7 +983,7 @@ struct file_handle { · 982 unmodified lines | ||
| 983 | 983 | __u32 handle_bytes; |
| 984 | 984 | int handle_type; |
| 985 | 985 | /* file identifier */ |
| 986 | − unsigned char f_handle[0]; | |
| 986 | + unsigned char f_handle[]; | |
| 987 | 987 | }; |
| 988 | 988 | |
| 989 | 989 | static inline struct file *get_file(struct file *f) |
| @@ -600,7 +600,7 @@ void iio_device_unregister(struct iio_dev *indio_dev); · 599 unmodified lines | ||
| 600 | 600 | * 0 on success, negative error number on failure. |
| 601 | 601 | */ |
| 602 | 602 | #define devm_iio_device_register(dev, indio_dev) \ |
| 603 | − __devm_iio_device_register((dev), (indio_dev), THIS_MODULE); | |
| 603 | + __devm_iio_device_register((dev), (indio_dev), THIS_MODULE) | |
| 604 | 604 | int __devm_iio_device_register(struct device *dev, struct iio_dev *indio_dev, |
| 605 | 605 | struct module *this_mod); |
| 606 | 606 | void devm_iio_device_unregister(struct device *dev, struct iio_dev *indio_dev); |
| @@ -1048,7 +1048,7 @@ search_memslots(struct kvm_memslots *slots, gfn_t gfn) · 1047 unmodified lines | ||
| 1048 | 1048 | start = slot + 1; |
| 1049 | 1049 | } |
| 1050 | 1050 | |
| 1051 | − if (gfn >= memslots[start].base_gfn && | |
| 1051 | + if (start < slots->used_slots && gfn >= memslots[start].base_gfn && | |
| 1052 | 1052 | gfn < memslots[start].base_gfn + memslots[start].npages) { |
| 1053 | 1053 | atomic_set(&slots->lru_slot, start); |
| 1054 | 1054 | return &memslots[start]; |
| @@ -55,7 +55,7 @@ LSM_HOOK(void, LSM_RET_VOID, bprm_committing_creds, struct linux_binprm *bprm) · 54 unmodified lines | ||
| 55 | 55 | LSM_HOOK(void, LSM_RET_VOID, bprm_committed_creds, struct linux_binprm *bprm) |
| 56 | 56 | LSM_HOOK(int, 0, fs_context_dup, struct fs_context *fc, |
| 57 | 57 | struct fs_context *src_sc) |
| 58 | −LSM_HOOK(int, 0, fs_context_parse_param, struct fs_context *fc, | |
| 58 | +LSM_HOOK(int, -ENOPARAM, fs_context_parse_param, struct fs_context *fc, | |
| 59 | 59 | struct fs_parameter *param) |
| 60 | 60 | LSM_HOOK(int, 0, sb_alloc_security, struct super_block *sb) |
| 61 | 61 | LSM_HOOK(void, LSM_RET_VOID, sb_free_security, struct super_block *sb) |
| @@ -53,9 +53,9 @@ enum mhi_callback { · 52 unmodified lines | ||
| 53 | 53 | * @MHI_CHAIN: Linked transfer |
| 54 | 54 | */ |
| 55 | 55 | enum mhi_flags { |
| 56 | − MHI_EOB, | |
| 57 | − MHI_EOT, | |
| 58 | − MHI_CHAIN, | |
| 56 | + MHI_EOB = BIT(0), | |
| 57 | + MHI_EOT = BIT(1), | |
| 58 | + MHI_CHAIN = BIT(2), | |
| 59 | 59 | }; |
| 60 | 60 | |
| 61 | 61 | /** |
| @@ -335,14 +335,15 @@ struct mhi_controller_config { · 273 unmodified lines | ||
| 335 | 335 | * @syserr_worker: System error worker |
| 336 | 336 | * @state_event: State change event |
| 337 | 337 | * @status_cb: CB function to notify power states of the device (required) |
| 338 | − * @link_status: CB function to query link status of the device (required) | |
| 339 | 338 | * @wake_get: CB function to assert device wake (optional) |
| 340 | 339 | * @wake_put: CB function to de-assert device wake (optional) |
| 341 | 340 | * @wake_toggle: CB function to assert and de-assert device wake (optional) |
| 342 | 341 | * @runtime_get: CB function to controller runtime resume (required) |
| 343 | − * @runtimet_put: CB function to decrement pm usage (required) | |
| 342 | + * @runtime_put: CB function to decrement pm usage (required) | |
| 344 | 343 | * @map_single: CB function to create TRE buffer |
| 345 | 344 | * @unmap_single: CB function to destroy TRE buffer |
| 345 | + * @read_reg: Read a MHI register via the physical link (required) | |
| 346 | + * @write_reg: Write a MHI register via the physical link (required) | |
| 346 | 347 | * @buffer_len: Bounce buffer length |
| 347 | 348 | * @bounce_buf: Use of bounce buffer |
| 348 | 349 | * @fbc_download: MHI host needs to do complete image transfer (optional) |
| @@ -417,7 +418,6 @@ struct mhi_controller { · 68 unmodified lines | ||
| 417 | 418 | |
| 418 | 419 | void (*status_cb)(struct mhi_controller *mhi_cntrl, |
| 419 | 420 | enum mhi_callback cb); |
| 420 | − int (*link_status)(struct mhi_controller *mhi_cntrl); | |
| 421 | 421 | void (*wake_get)(struct mhi_controller *mhi_cntrl, bool override); |
| 422 | 422 | void (*wake_put)(struct mhi_controller *mhi_cntrl, bool override); |
| 423 | 423 | void (*wake_toggle)(struct mhi_controller *mhi_cntrl); |
| @@ -427,6 +427,10 @@ struct mhi_controller { · 3 unmodified lines | ||
| 427 | 427 | struct mhi_buf_info *buf); |
| 428 | 428 | void (*unmap_single)(struct mhi_controller *mhi_cntrl, |
| 429 | 429 | struct mhi_buf_info *buf); |
| 430 | + int (*read_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr, | |
| 431 | + u32 *out); | |
| 432 | + void (*write_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr, | |
| 433 | + u32 val); | |
| 430 | 434 | |
| 431 | 435 | size_t buffer_len; |
| 432 | 436 | bool bounce_buf; |
| @@ -1317,11 +1317,13 @@ struct nfs41_impl_id { · 1316 unmodified lines | ||
| 1317 | 1317 | struct nfstime4 date; |
| 1318 | 1318 | }; |
| 1319 | 1319 | |
| 1320 | +#define MAX_BIND_CONN_TO_SESSION_RETRIES 3 | |
| 1320 | 1321 | struct nfs41_bind_conn_to_session_args { |
| 1321 | 1322 | struct nfs_client *client; |
| 1322 | 1323 | struct nfs4_sessionid sessionid; |
| 1323 | 1324 | u32 dir; |
| 1324 | 1325 | bool use_conn_in_rdma_mode; |
| 1326 | + int retries; | |
| 1325 | 1327 | }; |
| 1326 | 1328 | |
| 1327 | 1329 | struct nfs41_bind_conn_to_session_res { |
| @@ -185,6 +185,7 @@ int cros_ec_sensorhub_register_push_data(struct cros_ec_sensorhub *sensorhub, · 184 unmodified lines | ||
| 185 | 185 | void cros_ec_sensorhub_unregister_push_data(struct cros_ec_sensorhub *sensorhub, |
| 186 | 186 | u8 sensor_num); |
| 187 | 187 | |
| 188 | +int cros_ec_sensorhub_ring_allocate(struct cros_ec_sensorhub *sensorhub); | |
| 188 | 189 | int cros_ec_sensorhub_ring_add(struct cros_ec_sensorhub *sensorhub); |
| 189 | 190 | void cros_ec_sensorhub_ring_remove(void *arg); |
| 190 | 191 | int cros_ec_sensorhub_ring_fifo_enable(struct cros_ec_sensorhub *sensorhub, |
| @@ -25,6 +25,7 @@ struct platform_device { · 24 unmodified lines | ||
| 25 | 25 | bool id_auto; |
| 26 | 26 | struct device dev; |
| 27 | 27 | u64 platform_dma_mask; |
| 28 | + struct device_dma_parameters dma_parms; | |
| 28 | 29 | u32 num_resources; |
| 29 | 30 | struct resource *resource; |
| 30 | 31 | |
| @@ -220,10 +220,8 @@ struct pnp_card { · 219 unmodified lines | ||
| 220 | 220 | #define global_to_pnp_card(n) list_entry(n, struct pnp_card, global_list) |
| 221 | 221 | #define protocol_to_pnp_card(n) list_entry(n, struct pnp_card, protocol_list) |
| 222 | 222 | #define to_pnp_card(n) container_of(n, struct pnp_card, dev) |
| 223 | −#define pnp_for_each_card(card) \ | |
| 224 | − for((card) = global_to_pnp_card(pnp_cards.next); \ | |
| 225 | − (card) != global_to_pnp_card(&pnp_cards); \ | |
| 226 | − (card) = global_to_pnp_card((card)->global_list.next)) | |
| 223 | +#define pnp_for_each_card(card) \ | |
| 224 | + list_for_each_entry(card, &pnp_cards, global_list) | |
| 227 | 225 | |
| 228 | 226 | struct pnp_card_link { |
| 229 | 227 | struct pnp_card *card; |
| @@ -276,14 +274,9 @@ struct pnp_dev { · 46 unmodified lines | ||
| 276 | 274 | #define card_to_pnp_dev(n) list_entry(n, struct pnp_dev, card_list) |
| 277 | 275 | #define protocol_to_pnp_dev(n) list_entry(n, struct pnp_dev, protocol_list) |
| 278 | 276 | #define to_pnp_dev(n) container_of(n, struct pnp_dev, dev) |
| 279 | −#define pnp_for_each_dev(dev) \ | |
| 280 | − for((dev) = global_to_pnp_dev(pnp_global.next); \ | |
| 281 | − (dev) != global_to_pnp_dev(&pnp_global); \ | |
| 282 | − (dev) = global_to_pnp_dev((dev)->global_list.next)) | |
| 283 | −#define card_for_each_dev(card,dev) \ | |
| 284 | − for((dev) = card_to_pnp_dev((card)->devices.next); \ | |
| 285 | − (dev) != card_to_pnp_dev(&(card)->devices); \ | |
| 286 | − (dev) = card_to_pnp_dev((dev)->card_list.next)) | |
| 277 | +#define pnp_for_each_dev(dev) list_for_each_entry(dev, &pnp_global, global_list) | |
| 278 | +#define card_for_each_dev(card, dev) \ | |
| 279 | + list_for_each_entry(dev, &(card)->devices, card_list) | |
| 287 | 280 | #define pnp_dev_name(dev) (dev)->name |
| 288 | 281 | |
| 289 | 282 | static inline void *pnp_get_drvdata(struct pnp_dev *pdev) |
| @@ -437,14 +430,10 @@ struct pnp_protocol { · 147 unmodified lines | ||
| 437 | 430 | }; |
| 438 | 431 | |
| 439 | 432 | #define to_pnp_protocol(n) list_entry(n, struct pnp_protocol, protocol_list) |
| 440 | −#define protocol_for_each_card(protocol,card) \ | |
| 441 | − for((card) = protocol_to_pnp_card((protocol)->cards.next); \ | |
| 442 | − (card) != protocol_to_pnp_card(&(protocol)->cards); \ | |
| 443 | − (card) = protocol_to_pnp_card((card)->protocol_list.next)) | |
| 444 | −#define protocol_for_each_dev(protocol,dev) \ | |
| 445 | − for((dev) = protocol_to_pnp_dev((protocol)->devices.next); \ | |
| 446 | − (dev) != protocol_to_pnp_dev(&(protocol)->devices); \ | |
| 447 | − (dev) = protocol_to_pnp_dev((dev)->protocol_list.next)) | |
| 433 | +#define protocol_for_each_card(protocol, card) \ | |
| 434 | + list_for_each_entry(card, &(protocol)->cards, protocol_list) | |
| 435 | +#define protocol_for_each_dev(protocol, dev) \ | |
| 436 | + list_for_each_entry(dev, &(protocol)->devices, protocol_list) | |
| 448 | 437 | |
| 449 | 438 | extern struct bus_type pnp_bus_type; |
| 450 | 439 | |
| @@ -177,6 +177,8 @@ struct plat_stmmacenet_data { · 176 unmodified lines | ||
| 177 | 177 | struct stmmac_rxq_cfg rx_queues_cfg[MTL_MAX_RX_QUEUES]; |
| 178 | 178 | struct stmmac_txq_cfg tx_queues_cfg[MTL_MAX_TX_QUEUES]; |
| 179 | 179 | void (*fix_mac_speed)(void *priv, unsigned int speed); |
| 180 | + int (*serdes_powerup)(struct net_device *ndev, void *priv); | |
| 181 | + void (*serdes_powerdown)(struct net_device *ndev, void *priv); | |
| 180 | 182 | int (*init)(struct platform_device *pdev, void *priv); |
| 181 | 183 | void (*exit)(struct platform_device *pdev, void *priv); |
| 182 | 184 | struct mac_device_info *(*setup)(void *priv); |
| @@ -71,7 +71,13 @@ struct rpc_clnt { · 70 unmodified lines | ||
| 71 | 71 | #if IS_ENABLED(CONFIG_SUNRPC_DEBUG) |
| 72 | 72 | struct dentry *cl_debugfs; /* debugfs directory */ |
| 73 | 73 | #endif |
| 74 | − struct rpc_xprt_iter cl_xpi; | |
| 74 | + /* cl_work is only needed after cl_xpi is no longer used, | |
| 75 | + * and that are of similar size | |
| 76 | + */ | |
| 77 | + union { | |
| 78 | + struct rpc_xprt_iter cl_xpi; | |
| 79 | + struct work_struct cl_work; | |
| 80 | + }; | |
| 75 | 81 | const struct cred *cl_cred; |
| 76 | 82 | }; |
| 77 | 83 | |
| @@ -236,4 +242,9 @@ static inline int rpc_reply_expected(struct rpc_task *task) · 158 unmodified lines | ||
| 236 | 242 | (task->tk_msg.rpc_proc->p_decode != NULL); |
| 237 | 243 | } |
| 238 | 244 | |
| 245 | +static inline void rpc_task_close_connection(struct rpc_task *task) | |
| 246 | +{ | |
| 247 | + if (task->tk_xprt) | |
| 248 | + xprt_force_disconnect(task->tk_xprt); | |
| 249 | +} | |
| 239 | 250 | #endif /* _LINUX_SUNRPC_CLNT_H */ |
| @@ -170,6 +170,7 @@ extern bool svc_rdma_post_recvs(struct svcxprt_rdma *rdma); · 169 unmodified lines | ||
| 170 | 170 | extern void svc_rdma_recv_ctxt_put(struct svcxprt_rdma *rdma, |
| 171 | 171 | struct svc_rdma_recv_ctxt *ctxt); |
| 172 | 172 | extern void svc_rdma_flush_recv_queues(struct svcxprt_rdma *rdma); |
| 173 | +extern void svc_rdma_release_rqst(struct svc_rqst *rqstp); | |
| 173 | 174 | extern int svc_rdma_recvfrom(struct svc_rqst *); |
| 174 | 175 | |
| 175 | 176 | /* svc_rdma_rw.c */ |
| @@ -78,47 +78,6 @@ struct tcp_sack_block { · 77 unmodified lines | ||
| 78 | 78 | #define TCP_SACK_SEEN (1 << 0) /*1 = peer is SACK capable, */ |
| 79 | 79 | #define TCP_DSACK_SEEN (1 << 2) /*1 = DSACK was received from peer*/ |
| 80 | 80 | |
| 81 | −#if IS_ENABLED(CONFIG_MPTCP) | |
| 82 | −struct mptcp_options_received { | |
| 83 | − u64 sndr_key; | |
| 84 | − u64 rcvr_key; | |
| 85 | − u64 data_ack; | |
| 86 | − u64 data_seq; | |
| 87 | − u32 subflow_seq; | |
| 88 | − u16 data_len; | |
| 89 | − u16 mp_capable : 1, | |
| 90 | − mp_join : 1, | |
| 91 | − dss : 1, | |
| 92 | − add_addr : 1, | |
| 93 | − rm_addr : 1, | |
| 94 | − family : 4, | |
| 95 | − echo : 1, | |
| 96 | − backup : 1; | |
| 97 | − u32 token; | |
| 98 | − u32 nonce; | |
| 99 | − u64 thmac; | |
| 100 | − u8 hmac[20]; | |
| 101 | − u8 join_id; | |
| 102 | − u8 use_map:1, | |
| 103 | − dsn64:1, | |
| 104 | − data_fin:1, | |
| 105 | − use_ack:1, | |
| 106 | − ack64:1, | |
| 107 | − mpc_map:1, | |
| 108 | − __unused:2; | |
| 109 | − u8 addr_id; | |
| 110 | − u8 rm_id; | |
| 111 | − union { | |
| 112 | − struct in_addr addr; | |
| 113 | −#if IS_ENABLED(CONFIG_MPTCP_IPV6) | |
| 114 | − struct in6_addr addr6; | |
| 115 | −#endif | |
| 116 | − }; | |
| 117 | − u64 ahmac; | |
| 118 | − u16 port; | |
| 119 | −}; | |
| 120 | −#endif | |
| 121 | − | |
| 122 | 81 | struct tcp_options_received { |
| 123 | 82 | /* PAWS/RTTM data */ |
| 124 | 83 | int ts_recent_stamp;/* Time we stored ts_recent (for aging) */ |
| @@ -136,9 +95,6 @@ struct tcp_options_received { · 11 unmodified lines | ||
| 136 | 95 | u8 num_sacks; /* Number of SACK blocks */ |
| 137 | 96 | u16 user_mss; /* mss requested by user in ioctl */ |
| 138 | 97 | u16 mss_clamp; /* Maximal mss, negotiated at connection setup */ |
| 139 | −#if IS_ENABLED(CONFIG_MPTCP) | |
| 140 | − struct mptcp_options_received mptcp; | |
| 141 | −#endif | |
| 142 | 98 | }; |
| 143 | 99 | |
| 144 | 100 | static inline void tcp_clear_options(struct tcp_options_received *rx_opt) |
| @@ -148,13 +104,6 @@ static inline void tcp_clear_options(struct tcp_options_received *rx_opt) · 3 unmodified lines | ||
| 148 | 104 | #if IS_ENABLED(CONFIG_SMC) |
| 149 | 105 | rx_opt->smc_ok = 0; |
| 150 | 106 | #endif |
| 151 | −#if IS_ENABLED(CONFIG_MPTCP) | |
| 152 | − rx_opt->mptcp.mp_capable = 0; | |
| 153 | − rx_opt->mptcp.mp_join = 0; | |
| 154 | − rx_opt->mptcp.add_addr = 0; | |
| 155 | − rx_opt->mptcp.rm_addr = 0; | |
| 156 | − rx_opt->mptcp.dss = 0; | |
| 157 | −#endif | |
| 158 | 107 | } |
| 159 | 108 | |
| 160 | 109 | /* This is the max number of SACKS that we'll generate and process. It's safe |
| @@ -156,8 +156,7 @@ static inline struct tracepoint *tracepoint_ptr_deref(tracepoint_ptr_t *p) · 155 unmodified lines | ||
| 156 | 156 | * Note, the proto and args passed in includes "__data" as the first parameter. |
| 157 | 157 | * The reason for this is to handle the "void" prototype. If a tracepoint |
| 158 | 158 | * has a "void" prototype, then it is invalid to declare a function |
| 159 | − * as "(void *, void)". The DECLARE_TRACE_NOARGS() will pass in just | |
| 160 | − * "void *data", where as the DECLARE_TRACE() will pass in "void *data, proto". | |
| 159 | + * as "(void *, void)". | |
| 161 | 160 | */ |
| 162 | 161 | #define __DO_TRACE(tp, proto, args, cond, rcuidle) \ |
| 163 | 162 | do { \ |
| @@ -373,25 +372,6 @@ static inline struct tracepoint *tracepoint_ptr_deref(tracepoint_ptr_t *p) · 209 unmodified lines | ||
| 373 | 372 | # define __tracepoint_string |
| 374 | 373 | #endif |
| 375 | 374 | |
| 376 | −/* | |
| 377 | − * The need for the DECLARE_TRACE_NOARGS() is to handle the prototype | |
| 378 | − * (void). "void" is a special value in a function prototype and can | |
| 379 | − * not be combined with other arguments. Since the DECLARE_TRACE() | |
| 380 | − * macro adds a data element at the beginning of the prototype, | |
| 381 | − * we need a way to differentiate "(void *data, proto)" from | |
| 382 | − * "(void *data, void)". The second prototype is invalid. | |
| 383 | − * | |
| 384 | − * DECLARE_TRACE_NOARGS() passes "void" as the tracepoint prototype | |
| 385 | − * and "void *__data" as the callback prototype. | |
| 386 | − * | |
| 387 | − * DECLARE_TRACE() passes "proto" as the tracepoint protoype and | |
| 388 | − * "void *__data, proto" as the callback prototype. | |
| 389 | − */ | |
| 390 | −#define DECLARE_TRACE_NOARGS(name) \ | |
| 391 | − __DECLARE_TRACE(name, void, , \ | |
| 392 | − cpu_online(raw_smp_processor_id()), \ | |
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This diff is large: its 163 lines aren’t shown here.
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This diff is large: its 1557 lines aren’t shown here.
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This diff is large: its 7 lines aren’t shown here.
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This diff is large: its 12 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 12 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 12 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
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