Add macros to describe the bitfields in the ARM architected timer control register to make code easy to understand.
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| @@ -33,6 +33,14 @@ enum arch_timer_reg { · 32 unmodified lines | ||
| 33 | 33 | #define ARCH_TIMER_MEM_PHYS_ACCESS 2 |
| 34 | 34 | #define ARCH_TIMER_MEM_VIRT_ACCESS 3 |
| 35 | 35 | |
| 36 | +#define ARCH_TIMER_USR_PCT_ACCESS_EN (1 << 0) /* physical counter */ | |
| 37 | +#define ARCH_TIMER_USR_VCT_ACCESS_EN (1 << 1) /* virtual counter */ | |
| 38 | +#define ARCH_TIMER_VIRT_EVT_EN (1 << 2) | |
| 39 | +#define ARCH_TIMER_EVT_TRIGGER_SHIFT (4) | |
| 40 | +#define ARCH_TIMER_EVT_TRIGGER_MASK (0xF << ARCH_TIMER_EVT_TRIGGER_SHIFT) | |
| 41 | +#define ARCH_TIMER_USR_VT_ACCESS_EN (1 << 8) /* virtual timer registers */ | |
| 42 | +#define ARCH_TIMER_USR_PT_ACCESS_EN (1 << 9) /* physical timer registers */ | |
| 43 | + | |
| 36 | 44 | #ifdef CONFIG_ARM_ARCH_TIMER |
| 37 | 45 | |
| 38 | 46 | extern u32 arch_timer_get_rate(void); |