History

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma

Pull rdma updates from Jason Gunthorpe: - Minor bug fixes in mlx5, mthca, pvrdma, rtrs, mlx4, hfi1, hns - Minor cleanups: coding style, useless includes and documentation - Reorganize how multicast processing works in rxe - Replace a red/black tree with xarray in rxe which improves performance - DSCP support and HW address handle re-use in irdma - Simplify the mailbox command handling in hns - Simplify iser now that FMR is eliminated * tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma: (93 commits) RDMA/nldev: Prevent underflow in nldev_stat_set_counter_dynamic_doit() IB/iser: Fix error flow in case of registration failure IB/iser: Generalize map/unmap dma tasks IB/iser: Use iser_fr_desc as registration context IB/iser: Remove iser_reg_data_sg helper function RDMA/rxe: Use standard names for ref counting RDMA/rxe: Replace red-black trees by xarrays RDMA/rxe: Shorten pool names in rxe_pool.c RDMA/rxe: Move max_elem into rxe_type_info RDMA/rxe: Replace obj by elem in declaration RDMA/rxe: Delete _locked() APIs for pool objects RDMA/rxe: Reverse the sense of RXE_POOL_NO_ALLOC RDMA/rxe: Replace mr by rkey in responder resources RDMA/rxe: Fix ref error in rxe_av.c RDMA/hns: Use the reserved loopback QPs to free MR before destroying MPT RDMA/irdma: Add support for address handle re-use RDMA/qib: Fix typos in comments RDMA/mlx5: Fix memory leak in error flow for subscribe event routine Revert "RDMA/core: Fix ib_qp_usecnt_dec() called when error" RDMA/rxe: Remove useless argument for update_state() ...

Linus Torvalds committed 4 years ago

Commit 2dacc1e2 parents 85c7000 87e0eac106 files · +2870 −2875Browse files

Unified · Split

106 files
  1. drivers/infiniband/core/addr.c +0 −1
  2. drivers/infiniband/core/cache.c +0 −1
  3. drivers/infiniband/core/cma.c +1 −1
  4. drivers/infiniband/core/cma_configfs.c +0 −1
  5. drivers/infiniband/core/cq.c +0 −1
  6. drivers/infiniband/core/iwpm_util.h +0 −1
  7. drivers/infiniband/core/nldev.c +2 −1
  8. drivers/infiniband/core/sa_query.c +0 −1
  9. drivers/infiniband/core/verbs.c +1 −8
  10. drivers/infiniband/hw/hfi1/affinity.c +2 −3
  11. drivers/infiniband/hw/hfi1/debugfs.c +0 −1
  12. drivers/infiniband/hw/hfi1/device.c +0 −1
  13. drivers/infiniband/hw/hfi1/fault.c +0 −1
  14. drivers/infiniband/hw/hfi1/firmware.c +0 −1
  15. drivers/infiniband/hw/hfi1/verbs.c +1 −2
  16. drivers/infiniband/hw/hns/hns_roce_cmd.c +51 −46
  17. drivers/infiniband/hw/hns/hns_roce_cmd.h +6 −2
  18. drivers/infiniband/hw/hns/hns_roce_cq.c +39 −32
  19. drivers/infiniband/hw/hns/hns_roce_device.h +16 −10
  20. drivers/infiniband/hw/hns/hns_roce_hem.c +2 −2
  21. drivers/infiniband/hw/hns/hns_roce_hw_v2.c +377 −81
  22. drivers/infiniband/hw/hns/hns_roce_hw_v2.h +20 −0
  23. drivers/infiniband/hw/hns/hns_roce_hw_v2_dfx.c +2 −3
  24. drivers/infiniband/hw/hns/hns_roce_mr.c +17 −33
  25. drivers/infiniband/hw/hns/hns_roce_srq.c +57 −49
  26. drivers/infiniband/hw/irdma/cm.c +39 −29
  27. drivers/infiniband/hw/irdma/cm.h +7 −0
  28. drivers/infiniband/hw/irdma/ctrl.c +287 −315
  29. drivers/infiniband/hw/irdma/defs.h +4 −4
  30. drivers/infiniband/hw/irdma/hmc.c +46 −59
  31. drivers/infiniband/hw/irdma/hmc.h +21 −32
  32. drivers/infiniband/hw/irdma/hw.c +90 −102
  33. drivers/infiniband/hw/irdma/i40iw_hw.c +0 −1
  34. drivers/infiniband/hw/irdma/i40iw_if.c +2 −1
  35. drivers/infiniband/hw/irdma/main.c +18 −11
  36. drivers/infiniband/hw/irdma/main.h +21 −26
  37. drivers/infiniband/hw/irdma/osdep.h +19 −22
  38. drivers/infiniband/hw/irdma/pble.c +34 −43
  39. drivers/infiniband/hw/irdma/pble.h +11 −14
  40. drivers/infiniband/hw/irdma/protos.h +39 −51
  41. drivers/infiniband/hw/irdma/puda.c +62 −70
  42. drivers/infiniband/hw/irdma/puda.h +17 −26
  43. drivers/infiniband/hw/irdma/status.h +0 −71
  44. drivers/infiniband/hw/irdma/type.h +54 −59
  45. drivers/infiniband/hw/irdma/uda.c +16 −24
  46. drivers/infiniband/hw/irdma/uda.h +22 −24
  47. drivers/infiniband/hw/irdma/uk.c +57 −65
  48. drivers/infiniband/hw/irdma/user.h +28 −34
  49. drivers/infiniband/hw/irdma/utils.c +122 −125
  50. drivers/infiniband/hw/irdma/verbs.c +213 −178
  51. drivers/infiniband/hw/irdma/verbs.h +10 −5
  52. drivers/infiniband/hw/irdma/ws.c +9 −10
  53. drivers/infiniband/hw/irdma/ws.h +1 −1
  54. drivers/infiniband/hw/mlx4/alias_GUID.c +0 −1
  55. drivers/infiniband/hw/mlx4/srq.c +0 −1
  56. drivers/infiniband/hw/mlx5/devx.c +3 −1
  57. drivers/infiniband/hw/mlx5/ib_virt.c +0 −1
  58. drivers/infiniband/hw/mlx5/mem.c +0 −1
  59. drivers/infiniband/hw/mlx5/mlx5_ib.h +3 −9
  60. drivers/infiniband/hw/mlx5/mr.c +39 −65
  61. drivers/infiniband/hw/mlx5/odp.c +10 −9
  62. drivers/infiniband/hw/mlx5/qp.c +2 −2
  63. drivers/infiniband/hw/mlx5/srq.c +0 −1
  64. drivers/infiniband/hw/mthca/mthca_main.c +2 −6
  65. drivers/infiniband/hw/mthca/mthca_profile.c +0 −2
  66. drivers/infiniband/hw/qib/qib_fs.c +0 −1
  67. drivers/infiniband/hw/qib/qib_iba7220.c +2 −2
  68. drivers/infiniband/hw/usnic/usnic_debugfs.c +0 −1
  69. drivers/infiniband/hw/usnic/usnic_ib_qp_grp.c +0 −1
  70. drivers/infiniband/hw/usnic/usnic_ib_sysfs.c +0 −1
  71. drivers/infiniband/hw/usnic/usnic_ib_verbs.c +0 −1
  72. drivers/infiniband/hw/usnic/usnic_transport.c +0 −1
  73. drivers/infiniband/hw/usnic/usnic_vnic.c +0 −1
  74. drivers/infiniband/hw/vmw_pvrdma/pvrdma_main.c +4 −6
  75. drivers/infiniband/sw/rxe/rxe.c +18 −92
  76. drivers/infiniband/sw/rxe/rxe.h +0 −1
  77. drivers/infiniband/sw/rxe/rxe_av.c +17 −2
  78. drivers/infiniband/sw/rxe/rxe_comp.c +4 −4
  79. drivers/infiniband/sw/rxe/rxe_cq.c +12 −8
  80. drivers/infiniband/sw/rxe/rxe_loc.h +8 −24
  81. drivers/infiniband/sw/rxe/rxe_mcast.c +426 −116
  82. drivers/infiniband/sw/rxe/rxe_mmap.c +0 −1
  83. drivers/infiniband/sw/rxe/rxe_mr.c +7 −8
  84. drivers/infiniband/sw/rxe/rxe_mw.c +15 −23
  85. drivers/infiniband/sw/rxe/rxe_net.c +12 −29
  86. drivers/infiniband/sw/rxe/rxe_pool.c +81 −352
  87. drivers/infiniband/sw/rxe/rxe_pool.h +14 −91
  88. drivers/infiniband/sw/rxe/rxe_qp.c +30 −27
  89. drivers/infiniband/sw/rxe/rxe_queue.c +6 −4
  90. drivers/infiniband/sw/rxe/rxe_recv.c +13 −13
  91. drivers/infiniband/sw/rxe/rxe_req.c +41 −30
  92. drivers/infiniband/sw/rxe/rxe_resp.c +110 −60
  93. drivers/infiniband/sw/rxe/rxe_verbs.c +40 −68
  94. drivers/infiniband/sw/rxe/rxe_verbs.h +12 −15
  95. drivers/infiniband/ulp/ipoib/ipoib_netlink.c +0 −1
  96. drivers/infiniband/ulp/ipoib/ipoib_vlan.c +0 −1
  97. drivers/infiniband/ulp/iser/iscsi_iser.h +6 −7
  98. drivers/infiniband/ulp/iser/iser_initiator.c +15 −43
  99. drivers/infiniband/ulp/iser/iser_memory.c +39 −30
  100. drivers/infiniband/ulp/iser/iser_verbs.c +1 −2
  101. drivers/infiniband/ulp/opa_vnic/opa_vnic_netdev.c +0 −1
  102. drivers/infiniband/ulp/rtrs/rtrs-clt-sysfs.c +1 −2
  103. drivers/infiniband/ulp/rtrs/rtrs-clt.c +23 −19
  104. drivers/infiniband/ulp/rtrs/rtrs-clt.h +1 −0
  105. drivers/infiniband/ulp/rtrs/rtrs.c +0 −1
  106. drivers/infiniband/ulp/srp/ib_srp.h +10 −1
drivers/infiniband/core/addr.c+0−1
@@ -37,7 +37,6 @@ · 36 unmodified lines
3737 #include <linux/inetdevice.h>
3838 #include <linux/slab.h>
3939 #include <linux/workqueue.h>
40−#include <linux/module.h>
4140 #include <net/arp.h>
4241 #include <net/neighbour.h>
4342 #include <net/route.h>
drivers/infiniband/core/cache.c+0−1
@@ -34,7 +34,6 @@ · 33 unmodified lines
3434 */
3535
3636 #include <linux/if_vlan.h>
37−#include <linux/module.h>
3837 #include <linux/errno.h>
3938 #include <linux/slab.h>
4039 #include <linux/workqueue.h>
drivers/infiniband/core/cma.c+1−1
@@ -2642,7 +2642,7 @@ int rdma_set_ack_timeout(struct rdma_cm_id *id, u8 timeout) · 2641 unmodified lines
26422642 {
26432643 struct rdma_id_private *id_priv;
26442644
2645− if (id->qp_type != IB_QPT_RC)
2645+ if (id->qp_type != IB_QPT_RC && id->qp_type != IB_QPT_XRC_INI)
26462646 return -EINVAL;
26472647
26482648 id_priv = container_of(id, struct rdma_id_private, id);
drivers/infiniband/core/cma_configfs.c+0−1
@@ -30,7 +30,6 @@ · 29 unmodified lines
3030 * SOFTWARE.
3131 */
3232
33−#include <linux/module.h>
3433 #include <linux/configfs.h>
3534 #include <rdma/ib_verbs.h>
3635 #include <rdma/rdma_cm.h>
drivers/infiniband/core/cq.c+0−1
@@ -2,7 +2,6 @@ · 1 unmodified line
22 /*
33 * Copyright (c) 2015 HGST, a Western Digital Company.
44 */
5−#include <linux/module.h>
65 #include <linux/err.h>
76 #include <linux/slab.h>
87 #include <rdma/ib_verbs.h>
drivers/infiniband/core/iwpm_util.h+0−1
@@ -33,7 +33,6 @@ · 32 unmodified lines
3333 #ifndef _IWPM_UTIL_H
3434 #define _IWPM_UTIL_H
3535
36−#include <linux/module.h>
3736 #include <linux/io.h>
3837 #include <linux/in.h>
3938 #include <linux/in6.h>
drivers/infiniband/core/nldev.c+2−1
@@ -1951,9 +1951,10 @@ static int nldev_stat_set_counter_dynamic_doit(struct nlattr *tb[], · 1950 unmodified lines
19511951 u32 port)
19521952 {
19531953 struct rdma_hw_stats *stats;
1954− int rem, i, index, ret = 0;
19551954 struct nlattr *entry_attr;
19561955 unsigned long *target;
1956+ int rem, i, ret = 0;
1957+ u32 index;
19571958
19581959 stats = ib_get_hw_stats_port(device, port);
19591960 if (!stats)
drivers/infiniband/core/sa_query.c+0−1
@@ -32,7 +32,6 @@ · 31 unmodified lines
3232 * SOFTWARE.
3333 */
3434
35−#include <linux/module.h>
3635 #include <linux/init.h>
3736 #include <linux/err.h>
3837 #include <linux/random.h>
drivers/infiniband/core/verbs.c+1−8
@@ -268,9 +268,6 @@ struct ib_pd *__ib_alloc_pd(struct ib_device *device, unsigned int flags, · 267 unmodified lines
268268 return ERR_PTR(-ENOMEM);
269269
270270 pd->device = device;
271− pd->uobject = NULL;
272− pd->__internal_mr = NULL;
273− atomic_set(&pd->usecnt, 0);
274271 pd->flags = flags;
275272
276273 rdma_restrack_new(&pd->res, RDMA_RESTRACK_PD);
@@ -341,11 +338,6 @@ int ib_dealloc_pd_user(struct ib_pd *pd, struct ib_udata *udata) · 64 unmodified lines
341338 pd->__internal_mr = NULL;
342339 }
343340
344− /* uverbs manipulates usecnt with proper locking, while the kabi
345− * requires the caller to guarantee we can't race here.
346− */
347− WARN_ON(atomic_read(&pd->usecnt));
348−
349341 ret = pd->device->ops.dealloc_pd(pd, udata);
350342 if (ret)
351343 return ret;
@@ -2153,6 +2145,7 @@ struct ib_mr *ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, · 1801 unmodified lines
21532145 return mr;
21542146
21552147 mr->device = pd->device;
2148+ mr->type = IB_MR_TYPE_USER;
21562149 mr->pd = pd;
21572150 mr->dm = NULL;
21582151 atomic_inc(&pd->usecnt);
drivers/infiniband/hw/hfi1/affinity.c+2−3
@@ -5,7 +5,6 @@ · 4 unmodified lines
55
66 #include <linux/topology.h>
77 #include <linux/cpumask.h>
8−#include <linux/module.h>
98 #include <linux/interrupt.h>
109 #include <linux/numa.h>
1110
@@ -667,7 +666,7 @@ int hfi1_dev_affinity_init(struct hfi1_devdata *dd) · 655 unmodified lines
667666 * engines, use the same CPU cores as general/control
668667 * context.
669668 */
670− if (cpumask_weight(&entry->def_intr.mask) == 0)
669+ if (cpumask_empty(&entry->def_intr.mask))
671670 cpumask_copy(&entry->def_intr.mask,
672671 &entry->general_intr_mask);
673672 }
@@ -687,7 +686,7 @@ int hfi1_dev_affinity_init(struct hfi1_devdata *dd) · 13 unmodified lines
687686 * vectors, use the same CPU core as the general/control
688687 * context.
689688 */
690− if (cpumask_weight(&entry->comp_vect_mask) == 0)
689+ if (cpumask_empty(&entry->comp_vect_mask))
691690 cpumask_copy(&entry->comp_vect_mask,
692691 &entry->general_intr_mask);
693692 }
drivers/infiniband/hw/hfi1/debugfs.c+0−1
@@ -7,7 +7,6 @@ · 6 unmodified lines
77 #include <linux/seq_file.h>
88 #include <linux/kernel.h>
99 #include <linux/export.h>
10−#include <linux/module.h>
1110 #include <linux/string.h>
1211 #include <linux/types.h>
1312 #include <linux/ratelimit.h>
drivers/infiniband/hw/hfi1/device.c+0−1
@@ -4,7 +4,6 @@ · 3 unmodified lines
44 */
55
66 #include <linux/cdev.h>
7−#include <linux/module.h>
87 #include <linux/device.h>
98 #include <linux/fs.h>
109
drivers/infiniband/hw/hfi1/fault.c+0−1
@@ -6,7 +6,6 @@ · 5 unmodified lines
66 #include <linux/debugfs.h>
77 #include <linux/seq_file.h>
88 #include <linux/kernel.h>
9−#include <linux/module.h>
109 #include <linux/types.h>
1110 #include <linux/bitmap.h>
1211
drivers/infiniband/hw/hfi1/firmware.c+0−1
@@ -5,7 +5,6 @@ · 4 unmodified lines
55
66 #include <linux/firmware.h>
77 #include <linux/mutex.h>
8−#include <linux/module.h>
98 #include <linux/delay.h>
109 #include <linux/crc32.h>
1110
drivers/infiniband/hw/hfi1/verbs.c+1−2
@@ -1397,8 +1397,7 @@ static int query_port(struct rvt_dev_info *rdi, u32 port_num, · 1396 unmodified lines
13971397 4096 : hfi1_max_mtu), IB_MTU_4096);
13981398 props->active_mtu = !valid_ib_mtu(ppd->ibmtu) ? props->max_mtu :
13991399 mtu_to_enum(ppd->ibmtu, IB_MTU_4096);
1400− props->phys_mtu = HFI1_CAP_IS_KSET(AIP) ? hfi1_max_mtu :
1401− ib_mtu_enum_to_int(props->max_mtu);
1400+ props->phys_mtu = hfi1_max_mtu;
14021401
14031402 return 0;
14041403 }
drivers/infiniband/hw/hns/hns_roce_cmd.c+51−46
@@ -38,45 +38,36 @@ · 37 unmodified lines
3838 #define CMD_POLL_TOKEN 0xffff
3939 #define CMD_MAX_NUM 32
4040
41−static int hns_roce_cmd_mbox_post_hw(struct hns_roce_dev *hr_dev, u64 in_param,
42− u64 out_param, u32 in_modifier,
43− u8 op_modifier, u16 op, u16 token,
44− int event)
41+static int hns_roce_cmd_mbox_post_hw(struct hns_roce_dev *hr_dev,
42+ struct hns_roce_mbox_msg *mbox_msg)
4543 {
46− return hr_dev->hw->post_mbox(hr_dev, in_param, out_param, in_modifier,
47− op_modifier, op, token, event);
44+ return hr_dev->hw->post_mbox(hr_dev, mbox_msg);
4845 }
4946
5047 /* this should be called with "poll_sem" */
51−static int __hns_roce_cmd_mbox_poll(struct hns_roce_dev *hr_dev, u64 in_param,
52− u64 out_param, unsigned long in_modifier,
53− u8 op_modifier, u16 op,
54− unsigned int timeout)
48+static int __hns_roce_cmd_mbox_poll(struct hns_roce_dev *hr_dev,
49+ struct hns_roce_mbox_msg *mbox_msg)
5550 {
5651 int ret;
5752
58− ret = hns_roce_cmd_mbox_post_hw(hr_dev, in_param, out_param,
59− in_modifier, op_modifier, op,
60− CMD_POLL_TOKEN, 0);
53+ ret = hns_roce_cmd_mbox_post_hw(hr_dev, mbox_msg);
6154 if (ret) {
6255 dev_err_ratelimited(hr_dev->dev,
6356 "failed to post mailbox 0x%x in poll mode, ret = %d.\n",
64− op, ret);
57+ mbox_msg->cmd, ret);
6558 return ret;
6659 }
6760
68− return hr_dev->hw->poll_mbox_done(hr_dev, timeout);
61+ return hr_dev->hw->poll_mbox_done(hr_dev);
6962 }
7063
71−static int hns_roce_cmd_mbox_poll(struct hns_roce_dev *hr_dev, u64 in_param,
72− u64 out_param, unsigned long in_modifier,
73− u8 op_modifier, u16 op, unsigned int timeout)
64+static int hns_roce_cmd_mbox_poll(struct hns_roce_dev *hr_dev,
65+ struct hns_roce_mbox_msg *mbox_msg)
7466 {
7567 int ret;
7668
7769 down(&hr_dev->cmd.poll_sem);
78− ret = __hns_roce_cmd_mbox_poll(hr_dev, in_param, out_param, in_modifier,
79− op_modifier, op, timeout);
70+ ret = __hns_roce_cmd_mbox_poll(hr_dev, mbox_msg);
8071 up(&hr_dev->cmd.poll_sem);
8172
8273 return ret;
@@ -100,10 +91,8 @@ void hns_roce_cmd_event(struct hns_roce_dev *hr_dev, u16 token, u8 status, · 17 unmodified lines
10091 complete(&context->done);
10192 }
10293
103−static int __hns_roce_cmd_mbox_wait(struct hns_roce_dev *hr_dev, u64 in_param,
104− u64 out_param, unsigned long in_modifier,
105− u8 op_modifier, u16 op,
106− unsigned int timeout)
94+static int __hns_roce_cmd_mbox_wait(struct hns_roce_dev *hr_dev,
95+ struct hns_roce_mbox_msg *mbox_msg)
10796 {
10897 struct hns_roce_cmdq *cmd = &hr_dev->cmd;
10998 struct hns_roce_cmd_context *context;
@@ -124,20 +113,19 @@ static int __hns_roce_cmd_mbox_wait(struct hns_roce_dev *hr_dev, u64 in_param, · 14 unmodified lines
124113
125114 reinit_completion(&context->done);
126115
127− ret = hns_roce_cmd_mbox_post_hw(hr_dev, in_param, out_param,
128− in_modifier, op_modifier, op,
129− context->token, 1);
116+ mbox_msg->token = context->token;
117+ ret = hns_roce_cmd_mbox_post_hw(hr_dev, mbox_msg);
130118 if (ret) {
131119 dev_err_ratelimited(dev,
132120 "failed to post mailbox 0x%x in event mode, ret = %d.\n",
133− op, ret);
121+ mbox_msg->cmd, ret);
134122 goto out;
135123 }
136124
137125 if (!wait_for_completion_timeout(&context->done,
138− msecs_to_jiffies(timeout))) {
126+ msecs_to_jiffies(HNS_ROCE_CMD_TIMEOUT_MSECS))) {
139127 dev_err_ratelimited(dev, "[cmd] token 0x%x mailbox 0x%x timeout.\n",
140− context->token, op);
128+ context->token, mbox_msg->cmd);
141129 ret = -EBUSY;
142130 goto out;
143131 }
@@ -145,45 +133,50 @@ static int __hns_roce_cmd_mbox_wait(struct hns_roce_dev *hr_dev, u64 in_param, · 1 unmodified line
145133 ret = context->result;
146134 if (ret)
147135 dev_err_ratelimited(dev, "[cmd] token 0x%x mailbox 0x%x error %d.\n",
148− context->token, op, ret);
136+ context->token, mbox_msg->cmd, ret);
149137
150138 out:
151139 context->busy = 0;
152140 return ret;
153141 }
154142
155−static int hns_roce_cmd_mbox_wait(struct hns_roce_dev *hr_dev, u64 in_param,
156− u64 out_param, unsigned long in_modifier,
157− u8 op_modifier, u16 op, unsigned int timeout)
143+static int hns_roce_cmd_mbox_wait(struct hns_roce_dev *hr_dev,
144+ struct hns_roce_mbox_msg *mbox_msg)
158145 {
159146 int ret;
160147
161148 down(&hr_dev->cmd.event_sem);
162− ret = __hns_roce_cmd_mbox_wait(hr_dev, in_param, out_param, in_modifier,
163− op_modifier, op, timeout);
149+ ret = __hns_roce_cmd_mbox_wait(hr_dev, mbox_msg);
164150 up(&hr_dev->cmd.event_sem);
165151
166152 return ret;
167153 }
168154
169155 int hns_roce_cmd_mbox(struct hns_roce_dev *hr_dev, u64 in_param, u64 out_param,
170− unsigned long in_modifier, u8 op_modifier, u16 op,
171− unsigned int timeout)
156+ u8 cmd, unsigned long tag)
172157 {
158+ struct hns_roce_mbox_msg mbox_msg = {};
173159 bool is_busy;
174160
175161 if (hr_dev->hw->chk_mbox_avail)
176162 if (!hr_dev->hw->chk_mbox_avail(hr_dev, &is_busy))
177163 return is_busy ? -EBUSY : 0;
178164
179− if (hr_dev->cmd.use_events)
180− return hns_roce_cmd_mbox_wait(hr_dev, in_param, out_param,
181− in_modifier, op_modifier, op,
182− timeout);
183− else
184− return hns_roce_cmd_mbox_poll(hr_dev, in_param, out_param,
185− in_modifier, op_modifier, op,
186− timeout);
165+ mbox_msg.in_param = in_param;
166+ mbox_msg.out_param = out_param;
167+ mbox_msg.cmd = cmd;
168+ mbox_msg.tag = tag;
169+
170+ if (hr_dev->cmd.use_events) {
171+ mbox_msg.event_en = 1;
172+
173+ return hns_roce_cmd_mbox_wait(hr_dev, &mbox_msg);
174+ } else {
175+ mbox_msg.event_en = 0;
176+ mbox_msg.token = CMD_POLL_TOKEN;
177+
178+ return hns_roce_cmd_mbox_poll(hr_dev, &mbox_msg);
179+ }
187180 }
188181
189182 int hns_roce_cmd_init(struct hns_roce_dev *hr_dev)
@@ -269,3 +262,15 @@ void hns_roce_free_cmd_mailbox(struct hns_roce_dev *hr_dev, · 79 unmodified lines
269262 dma_pool_free(hr_dev->cmd.pool, mailbox->buf, mailbox->dma);
270263 kfree(mailbox);
271264 }
265+
266+int hns_roce_create_hw_ctx(struct hns_roce_dev *dev,
267+ struct hns_roce_cmd_mailbox *mailbox,
268+ u8 cmd, unsigned long idx)
269+{
270+ return hns_roce_cmd_mbox(dev, mailbox->dma, 0, cmd, idx);
271+}
272+
273+int hns_roce_destroy_hw_ctx(struct hns_roce_dev *dev, u8 cmd, unsigned long idx)
274+{
275+ return hns_roce_cmd_mbox(dev, 0, 0, cmd, idx);
276+}
drivers/infiniband/hw/hns/hns_roce_cmd.h+6−2
@@ -140,12 +140,16 @@ enum { · 139 unmodified lines
140140 };
141141
142142 int hns_roce_cmd_mbox(struct hns_roce_dev *hr_dev, u64 in_param, u64 out_param,
143− unsigned long in_modifier, u8 op_modifier, u16 op,
144− unsigned int timeout);
143+ u8 cmd, unsigned long tag);
145144
146145 struct hns_roce_cmd_mailbox *
147146 hns_roce_alloc_cmd_mailbox(struct hns_roce_dev *hr_dev);
148147 void hns_roce_free_cmd_mailbox(struct hns_roce_dev *hr_dev,
149148 struct hns_roce_cmd_mailbox *mailbox);
149+int hns_roce_create_hw_ctx(struct hns_roce_dev *dev,
150+ struct hns_roce_cmd_mailbox *mailbox,
151+ u8 cmd, unsigned long idx);
152+int hns_roce_destroy_hw_ctx(struct hns_roce_dev *dev, u8 cmd,
153+ unsigned long idx);
150154
151155 #endif /* _HNS_ROCE_CMD_H */
drivers/infiniband/hw/hns/hns_roce_cq.c+39−32
@@ -100,12 +100,39 @@ static void free_cqn(struct hns_roce_dev *hr_dev, unsigned long cqn) · 99 unmodified lines
100100 mutex_unlock(&cq_table->bank_mutex);
101101 }
102102
103+static int hns_roce_create_cqc(struct hns_roce_dev *hr_dev,
104+ struct hns_roce_cq *hr_cq,
105+ u64 *mtts, dma_addr_t dma_handle)
106+{
107+ struct ib_device *ibdev = &hr_dev->ib_dev;
108+ struct hns_roce_cmd_mailbox *mailbox;
109+ int ret;
110+
111+ mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
112+ if (IS_ERR(mailbox)) {
113+ ibdev_err(ibdev, "failed to alloc mailbox for CQC.\n");
114+ return PTR_ERR(mailbox);
115+ }
116+
117+ hr_dev->hw->write_cqc(hr_dev, hr_cq, mailbox->buf, mtts, dma_handle);
118+
119+ ret = hns_roce_create_hw_ctx(hr_dev, mailbox, HNS_ROCE_CMD_CREATE_CQC,
120+ hr_cq->cqn);
121+ if (ret)
122+ ibdev_err(ibdev,
123+ "failed to send create cmd for CQ(0x%lx), ret = %d.\n",
124+ hr_cq->cqn, ret);
125+
126+ hns_roce_free_cmd_mailbox(hr_dev, mailbox);
127+
128+ return ret;
129+}
130+
103131 static int alloc_cqc(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq)
104132 {
105133 struct hns_roce_cq_table *cq_table = &hr_dev->cq_table;
106134 struct ib_device *ibdev = &hr_dev->ib_dev;
107− struct hns_roce_cmd_mailbox *mailbox;
108− u64 mtts[MTT_MIN_COUNT] = { 0 };
135+ u64 mtts[MTT_MIN_COUNT] = {};
109136 dma_addr_t dma_handle;
110137 int ret;
111138
@@ -121,7 +148,7 @@ static int alloc_cqc(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq) · 9 unmodified lines
121148 if (ret) {
122149 ibdev_err(ibdev, "failed to get CQ(0x%lx) context, ret = %d.\n",
123150 hr_cq->cqn, ret);
124− goto err_out;
151+ return ret;
125152 }
126153
127154 ret = xa_err(xa_store(&cq_table->array, hr_cq->cqn, hr_cq, GFP_KERNEL));
@@ -130,41 +157,17 @@ static int alloc_cqc(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq) · 2 unmodified lines
130157 goto err_put;
131158 }
132159
133− /* Allocate mailbox memory */
134− mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
135− if (IS_ERR(mailbox)) {
136− ret = PTR_ERR(mailbox);
137− goto err_xa;
138− }
139−
140− hr_dev->hw->write_cqc(hr_dev, hr_cq, mailbox->buf, mtts, dma_handle);
141−
142− /* Send mailbox to hw */
143− ret = hns_roce_cmd_mbox(hr_dev, mailbox->dma, 0, hr_cq->cqn, 0,
144− HNS_ROCE_CMD_CREATE_CQC, HNS_ROCE_CMD_TIMEOUT_MSECS);
145− hns_roce_free_cmd_mailbox(hr_dev, mailbox);
146− if (ret) {
147− ibdev_err(ibdev,
148− "failed to send create cmd for CQ(0x%lx), ret = %d.\n",
149− hr_cq->cqn, ret);
160+ ret = hns_roce_create_cqc(hr_dev, hr_cq, mtts, dma_handle);
161+ if (ret)
150162 goto err_xa;
151− }
152−
153− hr_cq->cons_index = 0;
154− hr_cq->arm_sn = 1;
155−
156− refcount_set(&hr_cq->refcount, 1);
157− init_completion(&hr_cq->free);
158163
159164 return 0;
160165
161166 err_xa:
162167 xa_erase(&cq_table->array, hr_cq->cqn);
163−
164168 err_put:
165169 hns_roce_table_put(hr_dev, &cq_table->table, hr_cq->cqn);
166170
167−err_out:
168171 return ret;
169172 }
170173
@@ -174,9 +177,8 @@ static void free_cqc(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq) · 3 unmodified lines
174177 struct device *dev = hr_dev->dev;
175178 int ret;
176179
177− ret = hns_roce_cmd_mbox(hr_dev, 0, 0, hr_cq->cqn, 1,
178− HNS_ROCE_CMD_DESTROY_CQC,
179− HNS_ROCE_CMD_TIMEOUT_MSECS);
180+ ret = hns_roce_destroy_hw_ctx(hr_dev, HNS_ROCE_CMD_DESTROY_CQC,
181+ hr_cq->cqn);
180182 if (ret)
181183 dev_err(dev, "DESTROY_CQ failed (%d) for CQN %06lx\n", ret,
182184 hr_cq->cqn);
@@ -413,6 +415,11 @@ int hns_roce_create_cq(struct ib_cq *ib_cq, const struct ib_cq_init_attr *attr, · 230 unmodified lines
413415 goto err_cqc;
414416 }
415417
418+ hr_cq->cons_index = 0;
419+ hr_cq->arm_sn = 1;
420+ refcount_set(&hr_cq->refcount, 1);
421+ init_completion(&hr_cq->free);
422+
416423 return 0;
417424
418425 err_cqc:
drivers/infiniband/hw/hns/hns_roce_device.h+16−10
@@ -561,6 +561,15 @@ struct hns_roce_cmd_mailbox { · 560 unmodified lines
561561 dma_addr_t dma;
562562 };
563563
564+struct hns_roce_mbox_msg {
565+ u64 in_param;
566+ u64 out_param;
567+ u8 cmd;
568+ u32 tag;
569+ u16 token;
570+ u8 event_en;
571+};
572+
564573 struct hns_roce_dev;
565574
566575 struct hns_roce_rinl_sge {
@@ -624,6 +633,7 @@ struct hns_roce_qp { · 57 unmodified lines
624633 u32 next_sge;
625634 enum ib_mtu path_mtu;
626635 u32 max_inline_data;
636+ u8 free_mr_en;
627637
628638 /* 0: flush needed, 1: unneeded */
629639 unsigned long flush_flag;
@@ -851,11 +861,9 @@ struct hns_roce_hw { · 221 unmodified lines
851861 int (*hw_profile)(struct hns_roce_dev *hr_dev);
852862 int (*hw_init)(struct hns_roce_dev *hr_dev);
853863 void (*hw_exit)(struct hns_roce_dev *hr_dev);
854− int (*post_mbox)(struct hns_roce_dev *hr_dev, u64 in_param,
855− u64 out_param, u32 in_modifier, u8 op_modifier, u16 op,
856− u16 token, int event);
857− int (*poll_mbox_done)(struct hns_roce_dev *hr_dev,
858− unsigned int timeout);
864+ int (*post_mbox)(struct hns_roce_dev *hr_dev,
865+ struct hns_roce_mbox_msg *mbox_msg);
866+ int (*poll_mbox_done)(struct hns_roce_dev *hr_dev);
859867 bool (*chk_mbox_avail)(struct hns_roce_dev *hr_dev, bool *is_busy);
860868 int (*set_gid)(struct hns_roce_dev *hr_dev, int gid_index,
861869 const union ib_gid *gid, const struct ib_gid_attr *attr);
@@ -873,15 +881,16 @@ struct hns_roce_hw { · 11 unmodified lines
873881 struct hns_roce_cq *hr_cq, void *mb_buf, u64 *mtts,
874882 dma_addr_t dma_handle);
875883 int (*set_hem)(struct hns_roce_dev *hr_dev,
876− struct hns_roce_hem_table *table, int obj, int step_idx);
884+ struct hns_roce_hem_table *table, int obj, u32 step_idx);
877885 int (*clear_hem)(struct hns_roce_dev *hr_dev,
878886 struct hns_roce_hem_table *table, int obj,
879− int step_idx);
887+ u32 step_idx);
880888 int (*modify_qp)(struct ib_qp *ibqp, const struct ib_qp_attr *attr,
881889 int attr_mask, enum ib_qp_state cur_state,
882890 enum ib_qp_state new_state);
883891 int (*qp_flow_control_init)(struct hns_roce_dev *hr_dev,
884892 struct hns_roce_qp *hr_qp);
893+ void (*dereg_mr)(struct hns_roce_dev *hr_dev);
885894 int (*init_eq)(struct hns_roce_dev *hr_dev);
886895 void (*cleanup_eq)(struct hns_roce_dev *hr_dev);
887896 int (*write_srqc)(struct hns_roce_srq *srq, void *mb_buf);
@@ -1145,9 +1154,6 @@ struct ib_mr *hns_roce_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type, · 257 unmodified lines
11451154 int hns_roce_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
11461155 unsigned int *sg_offset);
11471156 int hns_roce_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata);
1148−int hns_roce_hw_destroy_mpt(struct hns_roce_dev *hr_dev,
1149− struct hns_roce_cmd_mailbox *mailbox,
1150− unsigned long mpt_index);
11511157 unsigned long key_to_hw_index(u32 key);
11521158
11531159 int hns_roce_alloc_mw(struct ib_mw *mw, struct ib_udata *udata);
drivers/infiniband/hw/hns/hns_roce_hem.c+2−2
@@ -488,7 +488,7 @@ static int set_mhop_hem(struct hns_roce_dev *hr_dev, · 487 unmodified lines
488488 struct hns_roce_hem_index *index)
489489 {
490490 struct ib_device *ibdev = &hr_dev->ib_dev;
491− int step_idx;
491+ u32 step_idx;
492492 int ret = 0;
493493
494494 if (index->inited & HEM_INDEX_L0) {
@@ -618,7 +618,7 @@ static void clear_mhop_hem(struct hns_roce_dev *hr_dev, · 123 unmodified lines
618618 struct ib_device *ibdev = &hr_dev->ib_dev;
619619 u32 hop_num = mhop->hop_num;
620620 u32 chunk_ba_num;
621− int step_idx;
621+ u32 step_idx;
622622
623623 index->inited = HEM_INDEX_BUF;
624624 chunk_ba_num = mhop->bt_chunk_size / BA_BYTE_LEN;
drivers/infiniband/hw/hns/hns_roce_hw_v2.c+377−81
@@ -1344,17 +1344,17 @@ static int hns_roce_cmq_send(struct hns_roce_dev *hr_dev, · 1343 unmodified lines
13441344 return ret;
13451345 }
13461346
1347−static int config_hem_ba_to_hw(struct hns_roce_dev *hr_dev, unsigned long obj,
1348− dma_addr_t base_addr, u16 op)
1347+static int config_hem_ba_to_hw(struct hns_roce_dev *hr_dev,
1348+ dma_addr_t base_addr, u8 cmd, unsigned long tag)
13491349 {
1350− struct hns_roce_cmd_mailbox *mbox = hns_roce_alloc_cmd_mailbox(hr_dev);
1350+ struct hns_roce_cmd_mailbox *mbox;
13511351 int ret;
13521352
1353+ mbox = hns_roce_alloc_cmd_mailbox(hr_dev);
13531354 if (IS_ERR(mbox))
13541355 return PTR_ERR(mbox);
13551356
1356− ret = hns_roce_cmd_mbox(hr_dev, base_addr, mbox->dma, obj, 0, op,
1357− HNS_ROCE_CMD_TIMEOUT_MSECS);
1357+ ret = hns_roce_cmd_mbox(hr_dev, base_addr, mbox->dma, cmd, tag);
13581358 hns_roce_free_cmd_mailbox(hr_dev, mbox);
13591359 return ret;
13601360 }
@@ -2664,6 +2664,194 @@ static void free_dip_list(struct hns_roce_dev *hr_dev) · 1303 unmodified lines
26642664 spin_unlock_irqrestore(&hr_dev->dip_list_lock, flags);
26652665 }
26662666
2667+static void free_mr_exit(struct hns_roce_dev *hr_dev)
2668+{
2669+ struct hns_roce_v2_priv *priv = hr_dev->priv;
2670+ struct hns_roce_v2_free_mr *free_mr = &priv->free_mr;
2671+ int ret;
2672+ int i;
2673+
2674+ for (i = 0; i < ARRAY_SIZE(free_mr->rsv_qp); i++) {
2675+ if (free_mr->rsv_qp[i]) {
2676+ ret = ib_destroy_qp(free_mr->rsv_qp[i]);
2677+ if (ret)
2678+ ibdev_err(&hr_dev->ib_dev,
2679+ "failed to destroy qp in free mr.\n");
2680+
2681+ free_mr->rsv_qp[i] = NULL;
2682+ }
2683+ }
2684+
2685+ if (free_mr->rsv_cq) {
2686+ ib_destroy_cq(free_mr->rsv_cq);
2687+ free_mr->rsv_cq = NULL;
2688+ }
2689+
2690+ if (free_mr->rsv_pd) {
2691+ ib_dealloc_pd(free_mr->rsv_pd);
2692+ free_mr->rsv_pd = NULL;
2693+ }
2694+}
2695+
2696+static int free_mr_alloc_res(struct hns_roce_dev *hr_dev)
2697+{
2698+ struct hns_roce_v2_priv *priv = hr_dev->priv;
2699+ struct hns_roce_v2_free_mr *free_mr = &priv->free_mr;
2700+ struct ib_device *ibdev = &hr_dev->ib_dev;
2701+ struct ib_cq_init_attr cq_init_attr = {};
2702+ struct ib_qp_init_attr qp_init_attr = {};
2703+ struct ib_pd *pd;
2704+ struct ib_cq *cq;
2705+ struct ib_qp *qp;
2706+ int ret;
2707+ int i;
2708+
2709+ pd = ib_alloc_pd(ibdev, 0);
2710+ if (IS_ERR(pd)) {
2711+ ibdev_err(ibdev, "failed to create pd for free mr.\n");
2712+ return PTR_ERR(pd);
2713+ }
2714+ free_mr->rsv_pd = pd;
2715+
2716+ cq_init_attr.cqe = HNS_ROCE_FREE_MR_USED_CQE_NUM;
2717+ cq = ib_create_cq(ibdev, NULL, NULL, NULL, &cq_init_attr);
2718+ if (IS_ERR(cq)) {
2719+ ibdev_err(ibdev, "failed to create cq for free mr.\n");
2720+ ret = PTR_ERR(cq);
2721+ goto create_failed;
2722+ }
2723+ free_mr->rsv_cq = cq;
2724+
2725+ qp_init_attr.qp_type = IB_QPT_RC;
2726+ qp_init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
2727+ qp_init_attr.send_cq = free_mr->rsv_cq;
2728+ qp_init_attr.recv_cq = free_mr->rsv_cq;
2729+ for (i = 0; i < ARRAY_SIZE(free_mr->rsv_qp); i++) {
2730+ qp_init_attr.cap.max_send_wr = HNS_ROCE_FREE_MR_USED_SQWQE_NUM;
2731+ qp_init_attr.cap.max_send_sge = HNS_ROCE_FREE_MR_USED_SQSGE_NUM;
2732+ qp_init_attr.cap.max_recv_wr = HNS_ROCE_FREE_MR_USED_RQWQE_NUM;
2733+ qp_init_attr.cap.max_recv_sge = HNS_ROCE_FREE_MR_USED_RQSGE_NUM;
2734+
2735+ qp = ib_create_qp(free_mr->rsv_pd, &qp_init_attr);
2736+ if (IS_ERR(qp)) {
2737+ ibdev_err(ibdev, "failed to create qp for free mr.\n");
2738+ ret = PTR_ERR(qp);
2739+ goto create_failed;
2740+ }
2741+
2742+ free_mr->rsv_qp[i] = qp;
2743+ }
2744+
2745+ return 0;
2746+
2747+create_failed:
2748+ free_mr_exit(hr_dev);
2749+
2750+ return ret;
2751+}
2752+
2753+static int free_mr_modify_rsv_qp(struct hns_roce_dev *hr_dev,
2754+ struct ib_qp_attr *attr, int sl_num)
2755+{
2756+ struct hns_roce_v2_priv *priv = hr_dev->priv;
2757+ struct hns_roce_v2_free_mr *free_mr = &priv->free_mr;
2758+ struct ib_device *ibdev = &hr_dev->ib_dev;
2759+ struct hns_roce_qp *hr_qp;
2760+ int loopback;
2761+ int mask;
2762+ int ret;
2763+
2764+ hr_qp = to_hr_qp(free_mr->rsv_qp[sl_num]);
2765+ hr_qp->free_mr_en = 1;
2766+
2767+ mask = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_PORT | IB_QP_ACCESS_FLAGS;
2768+ attr->qp_state = IB_QPS_INIT;
2769+ attr->port_num = 1;
2770+ attr->qp_access_flags = IB_ACCESS_REMOTE_WRITE;
2771+ ret = ib_modify_qp(&hr_qp->ibqp, attr, mask);
2772+ if (ret) {
2773+ ibdev_err(ibdev, "failed to modify qp to init, ret = %d.\n",
2774+ ret);
2775+ return ret;
2776+ }
2777+
2778+ loopback = hr_dev->loop_idc;
2779+ /* Set qpc lbi = 1 incidate loopback IO */
2780+ hr_dev->loop_idc = 1;
2781+
2782+ mask = IB_QP_STATE | IB_QP_AV | IB_QP_PATH_MTU | IB_QP_DEST_QPN |
2783+ IB_QP_RQ_PSN | IB_QP_MAX_DEST_RD_ATOMIC | IB_QP_MIN_RNR_TIMER;
2784+ attr->qp_state = IB_QPS_RTR;
2785+ attr->ah_attr.type = RDMA_AH_ATTR_TYPE_ROCE;
2786+ attr->path_mtu = IB_MTU_256;
2787+ attr->dest_qp_num = hr_qp->qpn;
2788+ attr->rq_psn = HNS_ROCE_FREE_MR_USED_PSN;
2789+
2790+ rdma_ah_set_sl(&attr->ah_attr, (u8)sl_num);
2791+
2792+ ret = ib_modify_qp(&hr_qp->ibqp, attr, mask);
2793+ hr_dev->loop_idc = loopback;
2794+ if (ret) {
2795+ ibdev_err(ibdev, "failed to modify qp to rtr, ret = %d.\n",
2796+ ret);
2797+ return ret;
2798+ }
2799+
2800+ mask = IB_QP_STATE | IB_QP_SQ_PSN | IB_QP_RETRY_CNT | IB_QP_TIMEOUT |
2801+ IB_QP_RNR_RETRY | IB_QP_MAX_QP_RD_ATOMIC;
2802+ attr->qp_state = IB_QPS_RTS;
2803+ attr->sq_psn = HNS_ROCE_FREE_MR_USED_PSN;
2804+ attr->retry_cnt = HNS_ROCE_FREE_MR_USED_QP_RETRY_CNT;
2805+ attr->timeout = HNS_ROCE_FREE_MR_USED_QP_TIMEOUT;
2806+ ret = ib_modify_qp(&hr_qp->ibqp, attr, mask);
2807+ if (ret)
2808+ ibdev_err(ibdev, "failed to modify qp to rts, ret = %d.\n",
2809+ ret);
2810+
2811+ return ret;
2812+}
2813+
2814+static int free_mr_modify_qp(struct hns_roce_dev *hr_dev)
2815+{
2816+ struct hns_roce_v2_priv *priv = hr_dev->priv;
2817+ struct hns_roce_v2_free_mr *free_mr = &priv->free_mr;
2818+ struct ib_qp_attr attr = {};
2819+ int ret;
2820+ int i;
2821+
2822+ rdma_ah_set_grh(&attr.ah_attr, NULL, 0, 0, 1, 0);
2823+ rdma_ah_set_static_rate(&attr.ah_attr, 3);
2824+ rdma_ah_set_port_num(&attr.ah_attr, 1);
2825+
2826+ for (i = 0; i < ARRAY_SIZE(free_mr->rsv_qp); i++) {
2827+ ret = free_mr_modify_rsv_qp(hr_dev, &attr, i);
2828+ if (ret)
2829+ return ret;
2830+ }
2831+
2832+ return 0;
2833+}
2834+
2835+static int free_mr_init(struct hns_roce_dev *hr_dev)
2836+{
2837+ int ret;
2838+
2839+ ret = free_mr_alloc_res(hr_dev);
2840+ if (ret)
2841+ return ret;
2842+
2843+ ret = free_mr_modify_qp(hr_dev);
2844+ if (ret)
2845+ goto err_modify_qp;
2846+
2847+ return 0;
2848+
2849+err_modify_qp:
2850+ free_mr_exit(hr_dev);
2851+
2852+ return ret;
2853+}
2854+
26672855 static int get_hem_table(struct hns_roce_dev *hr_dev)
26682856 {
26692857 unsigned int qpc_count;
@@ -2780,21 +2968,21 @@ static void hns_roce_v2_exit(struct hns_roce_dev *hr_dev) · 110 unmodified lines
27802968 free_dip_list(hr_dev);
27812969 }
27822970
2783−static int hns_roce_mbox_post(struct hns_roce_dev *hr_dev, u64 in_param,
2784− u64 out_param, u32 in_modifier, u8 op_modifier,
2785− u16 op, u16 token, int event)
2971+static int hns_roce_mbox_post(struct hns_roce_dev *hr_dev,
2972+ struct hns_roce_mbox_msg *mbox_msg)
27862973 {
27872974 struct hns_roce_cmq_desc desc;
27882975 struct hns_roce_post_mbox *mb = (struct hns_roce_post_mbox *)desc.data;
27892976
27902977 hns_roce_cmq_setup_basic_desc(&desc, HNS_ROCE_OPC_POST_MB, false);
27912978
2792− mb->in_param_l = cpu_to_le32(in_param);
2793− mb->in_param_h = cpu_to_le32(in_param >> 32);
2794− mb->out_param_l = cpu_to_le32(out_param);
2795− mb->out_param_h = cpu_to_le32(out_param >> 32);
2796− mb->cmd_tag = cpu_to_le32(in_modifier << 8 | op);
2797− mb->token_event_en = cpu_to_le32(event << 16 | token);
2979+ mb->in_param_l = cpu_to_le32(mbox_msg->in_param);
2980+ mb->in_param_h = cpu_to_le32(mbox_msg->in_param >> 32);
2981+ mb->out_param_l = cpu_to_le32(mbox_msg->out_param);
2982+ mb->out_param_h = cpu_to_le32(mbox_msg->out_param >> 32);
2983+ mb->cmd_tag = cpu_to_le32(mbox_msg->tag << 8 | mbox_msg->cmd);
2984+ mb->token_event_en = cpu_to_le32(mbox_msg->event_en << 16 |
2985+ mbox_msg->token);
27982986
27992987 return hns_roce_cmq_send(hr_dev, &desc, 1);
28002988 }
@@ -2847,9 +3035,8 @@ static int v2_wait_mbox_complete(struct hns_roce_dev *hr_dev, u32 timeout, · 46 unmodified lines
28473035 return ret;
28483036 }
28493037
2850−static int v2_post_mbox(struct hns_roce_dev *hr_dev, u64 in_param,
2851− u64 out_param, u32 in_modifier, u8 op_modifier,
2852− u16 op, u16 token, int event)
3038+static int v2_post_mbox(struct hns_roce_dev *hr_dev,
3039+ struct hns_roce_mbox_msg *mbox_msg)
28533040 {
28543041 u8 status = 0;
28553042 int ret;
@@ -2865,8 +3052,7 @@ static int v2_post_mbox(struct hns_roce_dev *hr_dev, u64 in_param, · 9 unmodified lines
28653052 }
28663053
28673054 /* Post new message to mbox */
2868− ret = hns_roce_mbox_post(hr_dev, in_param, out_param, in_modifier,
2869− op_modifier, op, token, event);
3055+ ret = hns_roce_mbox_post(hr_dev, mbox_msg);
28703056 if (ret)
28713057 dev_err_ratelimited(hr_dev->dev,
28723058 "failed to post mailbox, ret = %d.\n", ret);
@@ -2874,12 +3060,13 @@ static int v2_post_mbox(struct hns_roce_dev *hr_dev, u64 in_param, · 1 unmodified line
28743060 return ret;
28753061 }
28763062
2877−static int v2_poll_mbox_done(struct hns_roce_dev *hr_dev, unsigned int timeout)
3063+static int v2_poll_mbox_done(struct hns_roce_dev *hr_dev)
28783064 {
28793065 u8 status = 0;
28803066 int ret;
28813067
2882− ret = v2_wait_mbox_complete(hr_dev, timeout, &status);
3068+ ret = v2_wait_mbox_complete(hr_dev, HNS_ROCE_CMD_TIMEOUT_MSECS,
3069+ &status);
28833070 if (!ret) {
28843071 if (status != MB_ST_COMPLETE_SUCC)
28853072 return -EBUSY;
@@ -3245,6 +3432,98 @@ static int hns_roce_v2_mw_write_mtpt(void *mb_buf, struct hns_roce_mw *mw) · 359 unmodified lines
32453432 return 0;
32463433 }
32473434
3435+static int free_mr_post_send_lp_wqe(struct hns_roce_qp *hr_qp)
3436+{
3437+ struct hns_roce_dev *hr_dev = to_hr_dev(hr_qp->ibqp.device);
3438+ struct ib_device *ibdev = &hr_dev->ib_dev;
3439+ const struct ib_send_wr *bad_wr;
3440+ struct ib_rdma_wr rdma_wr = {};
3441+ struct ib_send_wr *send_wr;
3442+ int ret;
3443+
3444+ send_wr = &rdma_wr.wr;
3445+ send_wr->opcode = IB_WR_RDMA_WRITE;
3446+
3447+ ret = hns_roce_v2_post_send(&hr_qp->ibqp, send_wr, &bad_wr);
3448+ if (ret) {
3449+ ibdev_err(ibdev, "failed to post wqe for free mr, ret = %d.\n",
3450+ ret);
3451+ return ret;
3452+ }
3453+
3454+ return 0;
3455+}
3456+
3457+static int hns_roce_v2_poll_cq(struct ib_cq *ibcq, int num_entries,
3458+ struct ib_wc *wc);
3459+
3460+static void free_mr_send_cmd_to_hw(struct hns_roce_dev *hr_dev)
3461+{
3462+ struct hns_roce_v2_priv *priv = hr_dev->priv;
3463+ struct hns_roce_v2_free_mr *free_mr = &priv->free_mr;
3464+ struct ib_wc wc[ARRAY_SIZE(free_mr->rsv_qp)];
3465+ struct ib_device *ibdev = &hr_dev->ib_dev;
3466+ struct hns_roce_qp *hr_qp;
3467+ unsigned long end;
3468+ int cqe_cnt = 0;
3469+ int npolled;
3470+ int ret;
3471+ int i;
3472+
3473+ /*
3474+ * If the device initialization is not complete or in the uninstall
3475+ * process, then there is no need to execute free mr.
3476+ */
3477+ if (priv->handle->rinfo.reset_state == HNS_ROCE_STATE_RST_INIT ||
3478+ priv->handle->rinfo.instance_state == HNS_ROCE_STATE_INIT ||
3479+ hr_dev->state == HNS_ROCE_DEVICE_STATE_UNINIT)
3480+ return;
3481+
3482+ mutex_lock(&free_mr->mutex);
3483+
3484+ for (i = 0; i < ARRAY_SIZE(free_mr->rsv_qp); i++) {
3485+ hr_qp = to_hr_qp(free_mr->rsv_qp[i]);
3486+
3487+ ret = free_mr_post_send_lp_wqe(hr_qp);
3488+ if (ret) {
3489+ ibdev_err(ibdev,
3490+ "failed to send wqe (qp:0x%lx) for free mr, ret = %d.\n",
3491+ hr_qp->qpn, ret);
3492+ break;
3493+ }
3494+
3495+ cqe_cnt++;
3496+ }
3497+
3498+ end = msecs_to_jiffies(HNS_ROCE_V2_FREE_MR_TIMEOUT) + jiffies;
3499+ while (cqe_cnt) {
3500+ npolled = hns_roce_v2_poll_cq(free_mr->rsv_cq, cqe_cnt, wc);
3501+ if (npolled < 0) {
3502+ ibdev_err(ibdev,
3503+ "failed to poll cqe for free mr, remain %d cqe.\n",
3504+ cqe_cnt);
3505+ goto out;
3506+ }
3507+
3508+ if (time_after(jiffies, end)) {
3509+ ibdev_err(ibdev,
3510+ "failed to poll cqe for free mr and timeout, remain %d cqe.\n",
3511+ cqe_cnt);
3512+ goto out;
3513+ }
3514+ cqe_cnt -= npolled;
3515+ }
3516+
3517+out:
3518+ mutex_unlock(&free_mr->mutex);
3519+}
3520+
3521+static void hns_roce_v2_dereg_mr(struct hns_roce_dev *hr_dev)
3522+{
3523+ if (hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP08)
3524+ free_mr_send_cmd_to_hw(hr_dev);
3525+}
3526+
32483527 static void *get_cqe_v2(struct hns_roce_cq *hr_cq, int n)
32493528 {
32503529 return hns_roce_buf_offset(hr_cq->mtr.kmem, n * hr_cq->cqe_size);
@@ -3818,38 +4097,38 @@ out: · 567 unmodified lines
38184097 }
38194098
38204099 static int get_op_for_set_hem(struct hns_roce_dev *hr_dev, u32 type,
3821− int step_idx, u16 *mbox_op)
4100+ u32 step_idx, u8 *mbox_cmd)
38224101 {
3823− u16 op;
4102+ u8 cmd;
38244103
38254104 switch (type) {
38264105 case HEM_TYPE_QPC:
3827− op = HNS_ROCE_CMD_WRITE_QPC_BT0;
4106+ cmd = HNS_ROCE_CMD_WRITE_QPC_BT0;
38284107 break;
38294108 case HEM_TYPE_MTPT:
3830− op = HNS_ROCE_CMD_WRITE_MPT_BT0;
4109+ cmd = HNS_ROCE_CMD_WRITE_MPT_BT0;
38314110 break;
38324111 case HEM_TYPE_CQC:
3833− op = HNS_ROCE_CMD_WRITE_CQC_BT0;
4112+ cmd = HNS_ROCE_CMD_WRITE_CQC_BT0;
38344113 break;
38354114 case HEM_TYPE_SRQC:
3836− op = HNS_ROCE_CMD_WRITE_SRQC_BT0;
4115+ cmd = HNS_ROCE_CMD_WRITE_SRQC_BT0;
38374116 break;
38384117 case HEM_TYPE_SCCC:
3839− op = HNS_ROCE_CMD_WRITE_SCCC_BT0;
4118+ cmd = HNS_ROCE_CMD_WRITE_SCCC_BT0;
38404119 break;
38414120 case HEM_TYPE_QPC_TIMER:
3842− op = HNS_ROCE_CMD_WRITE_QPC_TIMER_BT0;
4121+ cmd = HNS_ROCE_CMD_WRITE_QPC_TIMER_BT0;
38434122 break;
38444123 case HEM_TYPE_CQC_TIMER:
3845− op = HNS_ROCE_CMD_WRITE_CQC_TIMER_BT0;
4124+ cmd = HNS_ROCE_CMD_WRITE_CQC_TIMER_BT0;
38464125 break;
38474126 default:
38484127 dev_warn(hr_dev->dev, "failed to check hem type %u.\n", type);
38494128 return -EINVAL;
38504129 }
38514130
3852− *mbox_op = op + step_idx;
4131+ *mbox_cmd = cmd + step_idx;
38534132
38544133 return 0;
38554134 }
@@ -3872,10 +4151,10 @@ static int config_gmv_ba_to_hw(struct hns_roce_dev *hr_dev, unsigned long obj, · 16 unmodified lines
38724151 }
38734152
38744153 static int set_hem_to_hw(struct hns_roce_dev *hr_dev, int obj,
3875− dma_addr_t base_addr, u32 hem_type, int step_idx)
4154+ dma_addr_t base_addr, u32 hem_type, u32 step_idx)
38764155 {
38774156 int ret;
3878− u16 op;
4157+ u8 cmd;
38794158
38804159 if (unlikely(hem_type == HEM_TYPE_GMV))
38814160 return config_gmv_ba_to_hw(hr_dev, obj, base_addr);
@@ -3883,16 +4162,16 @@ static int set_hem_to_hw(struct hns_roce_dev *hr_dev, int obj, · 1 unmodified line
38834162 if (unlikely(hem_type == HEM_TYPE_SCCC && step_idx))
38844163 return 0;
38854164
3886− ret = get_op_for_set_hem(hr_dev, hem_type, step_idx, &op);
4165+ ret = get_op_for_set_hem(hr_dev, hem_type, step_idx, &cmd);
38874166 if (ret < 0)
38884167 return ret;
38894168
3890− return config_hem_ba_to_hw(hr_dev, obj, base_addr, op);
4169+ return config_hem_ba_to_hw(hr_dev, base_addr, cmd, obj);
38914170 }
38924171
38934172 static int hns_roce_v2_set_hem(struct hns_roce_dev *hr_dev,
38944173 struct hns_roce_hem_table *table, int obj,
3895− int step_idx)
4174+ u32 step_idx)
38964175 {
38974176 struct hns_roce_hem_iter iter;
38984177 struct hns_roce_hem_mhop mhop;
@@ -3950,29 +4229,29 @@ static int hns_roce_v2_set_hem(struct hns_roce_dev *hr_dev, · 51 unmodified lines
39504229 }
39514230
39524231 static int hns_roce_v2_clear_hem(struct hns_roce_dev *hr_dev,
3953− struct hns_roce_hem_table *table, int obj,
3954− int step_idx)
4232+ struct hns_roce_hem_table *table,
4233+ int tag, u32 step_idx)
39554234 {
3956− struct device *dev = hr_dev->dev;
39574235 struct hns_roce_cmd_mailbox *mailbox;
4236+ struct device *dev = hr_dev->dev;
4237+ u8 cmd = 0xff;
39584238 int ret;
3959− u16 op = 0xff;
39604239
39614240 if (!hns_roce_check_whether_mhop(hr_dev, table->type))
39624241 return 0;
39634242
39644243 switch (table->type) {
39654244 case HEM_TYPE_QPC:
3966− op = HNS_ROCE_CMD_DESTROY_QPC_BT0;
4245+ cmd = HNS_ROCE_CMD_DESTROY_QPC_BT0;
39674246 break;
39684247 case HEM_TYPE_MTPT:
3969− op = HNS_ROCE_CMD_DESTROY_MPT_BT0;
4248+ cmd = HNS_ROCE_CMD_DESTROY_MPT_BT0;
39704249 break;
39714250 case HEM_TYPE_CQC:
3972− op = HNS_ROCE_CMD_DESTROY_CQC_BT0;
4251+ cmd = HNS_ROCE_CMD_DESTROY_CQC_BT0;
39734252 break;
39744253 case HEM_TYPE_SRQC:
3975− op = HNS_ROCE_CMD_DESTROY_SRQC_BT0;
4254+ cmd = HNS_ROCE_CMD_DESTROY_SRQC_BT0;
39764255 break;
39774256 case HEM_TYPE_SCCC:
39784257 case HEM_TYPE_QPC_TIMER:
@@ -3985,15 +4264,13 @@ static int hns_roce_v2_clear_hem(struct hns_roce_dev *hr_dev, · 6 unmodified lines
39854264 return 0;
39864265 }
39874266
3988− op += step_idx;
4267+ cmd += step_idx;
39894268
39904269 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
39914270 if (IS_ERR(mailbox))
39924271 return PTR_ERR(mailbox);
39934272
3994− /* configure the tag and op */
3995− ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, obj, 0, op,
3996− HNS_ROCE_CMD_TIMEOUT_MSECS);
4273+ ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, cmd, tag);
39974274
39984275 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
39994276 return ret;
@@ -4017,9 +4294,8 @@ static int hns_roce_v2_qp_modify(struct hns_roce_dev *hr_dev, · 17 unmodified lines
40174294 memcpy(mailbox->buf, context, qpc_size);
40184295 memcpy(mailbox->buf + qpc_size, qpc_mask, qpc_size);
40194296
4020− ret = hns_roce_cmd_mbox(hr_dev, mailbox->dma, 0, hr_qp->qpn, 0,
4021− HNS_ROCE_CMD_MODIFY_QPC,
4022− HNS_ROCE_CMD_TIMEOUT_MSECS);
4297+ ret = hns_roce_cmd_mbox(hr_dev, mailbox->dma, 0,
4298+ HNS_ROCE_CMD_MODIFY_QPC, hr_qp->qpn);
40234299
40244300 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
40254301
@@ -4667,6 +4943,18 @@ static int hns_roce_v2_set_path(struct ib_qp *ibqp, · 641 unmodified lines
46674943 u8 hr_port;
46684944 int ret;
46694945
4946+ /*
4947+ * If free_mr_en of qp is set, it means that this qp comes from
4948+ * free mr. This qp will perform the loopback operation.
4949+ * In the loopback scenario, only sl needs to be set.
4950+ */
4951+ if (hr_qp->free_mr_en) {
4952+ hr_reg_write(context, QPC_SL, rdma_ah_get_sl(&attr->ah_attr));
4953+ hr_reg_clear(qpc_mask, QPC_SL);
4954+ hr_qp->sl = rdma_ah_get_sl(&attr->ah_attr);
4955+ return 0;
4956+ }
4957+
46704958 ib_port = (attr_mask & IB_QP_PORT) ? attr->port_num : hr_qp->port + 1;
46714959 hr_port = ib_port - 1;
46724960 is_roce_protocol = rdma_cap_eth_ah(&hr_dev->ib_dev, ib_port) &&
@@ -5092,9 +5380,8 @@ static int hns_roce_v2_query_qpc(struct hns_roce_dev *hr_dev, · 419 unmodified lines
50925380 if (IS_ERR(mailbox))
50935381 return PTR_ERR(mailbox);
50945382
5095− ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, hr_qp->qpn, 0,
5096− HNS_ROCE_CMD_QUERY_QPC,
5097− HNS_ROCE_CMD_TIMEOUT_MSECS);
5383+ ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, HNS_ROCE_CMD_QUERY_QPC,
5384+ hr_qp->qpn);
50985385 if (ret)
50995386 goto out;
51005387
@@ -5460,9 +5747,8 @@ static int hns_roce_v2_modify_srq(struct ib_srq *ibsrq, · 359 unmodified lines
54605747 hr_reg_write(srq_context, SRQC_LIMIT_WL, srq_attr->srq_limit);
54615748 hr_reg_clear(srqc_mask, SRQC_LIMIT_WL);
54625749
5463− ret = hns_roce_cmd_mbox(hr_dev, mailbox->dma, 0, srq->srqn, 0,
5464− HNS_ROCE_CMD_MODIFY_SRQC,
5465− HNS_ROCE_CMD_TIMEOUT_MSECS);
5750+ ret = hns_roce_cmd_mbox(hr_dev, mailbox->dma, 0,
5751+ HNS_ROCE_CMD_MODIFY_SRQC, srq->srqn);
54665752 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
54675753 if (ret) {
54685754 ibdev_err(&hr_dev->ib_dev,
@@ -5488,9 +5774,8 @@ static int hns_roce_v2_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr) · 19 unmodified lines
54885774 return PTR_ERR(mailbox);
54895775
54905776 srq_context = mailbox->buf;
5491− ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, srq->srqn, 0,
5492− HNS_ROCE_CMD_QUERY_SRQC,
5493− HNS_ROCE_CMD_TIMEOUT_MSECS);
5777+ ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma,
5778+ HNS_ROCE_CMD_QUERY_SRQC, srq->srqn);
54945779 if (ret) {
54955780 ibdev_err(&hr_dev->ib_dev,
54965781 "failed to process cmd of querying SRQ, ret = %d.\n",
@@ -5540,9 +5825,8 @@ static int hns_roce_v2_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period) · 43 unmodified lines
55405825 hr_reg_write(cq_context, CQC_CQ_PERIOD, cq_period);
55415826 hr_reg_clear(cqc_mask, CQC_CQ_PERIOD);
55425827
5543− ret = hns_roce_cmd_mbox(hr_dev, mailbox->dma, 0, hr_cq->cqn, 1,
5544− HNS_ROCE_CMD_MODIFY_CQC,
5545− HNS_ROCE_CMD_TIMEOUT_MSECS);
5828+ ret = hns_roce_cmd_mbox(hr_dev, mailbox->dma, 0,
5829+ HNS_ROCE_CMD_MODIFY_CQC, hr_cq->cqn);
55465830 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
55475831 if (ret)
55485832 ibdev_err(&hr_dev->ib_dev,
@@ -5869,15 +6153,14 @@ static void hns_roce_v2_destroy_eqc(struct hns_roce_dev *hr_dev, u32 eqn) · 320 unmodified lines
58696153 {
58706154 struct device *dev = hr_dev->dev;
58716155 int ret;
6156+ u8 cmd;
58726157
58736158 if (eqn < hr_dev->caps.num_comp_vectors)
5874− ret = hns_roce_cmd_mbox(hr_dev, 0, 0, eqn & HNS_ROCE_V2_EQN_M,
5875− 0, HNS_ROCE_CMD_DESTROY_CEQC,
5876− HNS_ROCE_CMD_TIMEOUT_MSECS);
6159+ cmd = HNS_ROCE_CMD_DESTROY_CEQC;
58776160 else
5878− ret = hns_roce_cmd_mbox(hr_dev, 0, 0, eqn & HNS_ROCE_V2_EQN_M,
5879− 0, HNS_ROCE_CMD_DESTROY_AEQC,
5880− HNS_ROCE_CMD_TIMEOUT_MSECS);
6161+ cmd = HNS_ROCE_CMD_DESTROY_AEQC;
6162+
6163+ ret = hns_roce_destroy_hw_ctx(hr_dev, cmd, eqn & HNS_ROCE_V2_EQN_M);
58816164 if (ret)
58826165 dev_err(dev, "[mailbox cmd] destroy eqc(%u) failed.\n", eqn);
58836166 }
@@ -5983,16 +6266,15 @@ static int alloc_eq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_eq *eq) · 99 unmodified lines
59836266 }
59846267
59856268 static int hns_roce_v2_create_eq(struct hns_roce_dev *hr_dev,
5986− struct hns_roce_eq *eq,
5987− unsigned int eq_cmd)
6269+ struct hns_roce_eq *eq, u8 eq_cmd)
59886270 {
59896271 struct hns_roce_cmd_mailbox *mailbox;
59906272 int ret;
59916273
59926274 /* Allocate mailbox memory */
59936275 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
5994− if (IS_ERR_OR_NULL(mailbox))
5995− return -ENOMEM;
6276+ if (IS_ERR(mailbox))
6277+ return PTR_ERR(mailbox);
59966278
59976279 ret = alloc_eq_buf(hr_dev, eq);
59986280 if (ret)
@@ -6002,8 +6284,7 @@ static int hns_roce_v2_create_eq(struct hns_roce_dev *hr_dev, · 3 unmodified lines
60026284 if (ret)
60036285 goto err_cmd_mbox;
60046286
6005− ret = hns_roce_cmd_mbox(hr_dev, mailbox->dma, 0, eq->eqn, 0,
6006− eq_cmd, HNS_ROCE_CMD_TIMEOUT_MSECS);
6287+ ret = hns_roce_create_hw_ctx(hr_dev, mailbox, eq_cmd, eq->eqn);
60076288 if (ret) {
60086289 dev_err(hr_dev->dev, "[mailbox cmd] create eqc failed.\n");
60096290 goto err_cmd_mbox;
@@ -6114,14 +6395,14 @@ static int hns_roce_v2_init_eq_table(struct hns_roce_dev *hr_dev) · 104 unmodified lines
61146395 struct hns_roce_eq_table *eq_table = &hr_dev->eq_table;
61156396 struct device *dev = hr_dev->dev;
61166397 struct hns_roce_eq *eq;
6117− unsigned int eq_cmd;
6118− int irq_num;
6119− int eq_num;
61206398 int other_num;
61216399 int comp_num;
61226400 int aeq_num;
6123− int i;
6401+ int irq_num;
6402+ int eq_num;
6403+ u8 eq_cmd;
61246404 int ret;
6405+ int i;
61256406
61266407 other_num = hr_dev->caps.num_other_vectors;
61276408 comp_num = hr_dev->caps.num_comp_vectors;
@@ -6258,6 +6539,7 @@ static const struct hns_roce_hw hns_roce_hw_v2 = { · 130 unmodified lines
62586539 .set_hem = hns_roce_v2_set_hem,
62596540 .clear_hem = hns_roce_v2_clear_hem,
62606541 .modify_qp = hns_roce_v2_modify_qp,
6542+ .dereg_mr = hns_roce_v2_dereg_mr,
62616543 .qp_flow_control_init = hns_roce_v2_qp_flow_control_init,
62626544 .init_eq = hns_roce_v2_init_eq_table,
62636545 .cleanup_eq = hns_roce_v2_cleanup_eq_table,
@@ -6339,14 +6621,25 @@ static int __hns_roce_hw_v2_init_instance(struct hnae3_handle *handle) · 75 unmodified lines
63396621 ret = hns_roce_init(hr_dev);
63406622 if (ret) {
63416623 dev_err(hr_dev->dev, "RoCE Engine init failed!\n");
6342− goto error_failed_get_cfg;
6624+ goto error_failed_cfg;
6625+ }
6626+
6627+ if (hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP08) {
6628+ ret = free_mr_init(hr_dev);
6629+ if (ret) {
6630+ dev_err(hr_dev->dev, "failed to init free mr!\n");
6631+ goto error_failed_roce_init;
6632+ }
63436633 }
63446634
63456635 handle->priv = hr_dev;
63466636
63476637 return 0;
63486638
6349−error_failed_get_cfg:
6639+error_failed_roce_init:
6640+ hns_roce_exit(hr_dev);
6641+
6642+error_failed_cfg:
63506643 kfree(hr_dev->priv);
63516644
63526645 error_failed_kzalloc:
@@ -6368,6 +6661,9 @@ static void __hns_roce_hw_v2_uninit_instance(struct hnae3_handle *handle, · 15 unmodified lines
63686661 hr_dev->state = HNS_ROCE_DEVICE_STATE_UNINIT;
63696662 hns_roce_handle_device_err(hr_dev);
63706663
6664+ if (hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP08)
6665+ free_mr_exit(hr_dev);
6666+
63716667 hns_roce_exit(hr_dev);
63726668 kfree(hr_dev->priv);
63736669 ib_dealloc_device(&hr_dev->ib_dev);
drivers/infiniband/hw/hns/hns_roce_hw_v2.h+20−0
@@ -139,6 +139,18 @@ enum { · 138 unmodified lines
139139 #define CMD_CSQ_DESC_NUM 1024
140140 #define CMD_CRQ_DESC_NUM 1024
141141
142+/* Free mr used parameters */
143+#define HNS_ROCE_FREE_MR_USED_CQE_NUM 128
144+#define HNS_ROCE_FREE_MR_USED_QP_NUM 0x8
145+#define HNS_ROCE_FREE_MR_USED_PSN 0x0808
146+#define HNS_ROCE_FREE_MR_USED_QP_RETRY_CNT 0x7
147+#define HNS_ROCE_FREE_MR_USED_QP_TIMEOUT 0x12
148+#define HNS_ROCE_FREE_MR_USED_SQWQE_NUM 128
149+#define HNS_ROCE_FREE_MR_USED_SQSGE_NUM 0x2
150+#define HNS_ROCE_FREE_MR_USED_RQWQE_NUM 128
151+#define HNS_ROCE_FREE_MR_USED_RQSGE_NUM 0x2
152+#define HNS_ROCE_V2_FREE_MR_TIMEOUT 4500
153+
142154 enum {
143155 NO_ARMED = 0x0,
144156 REG_NXT_CEQE = 0x2,
@@ -1418,10 +1430,18 @@ struct hns_roce_link_table { · 1273 unmodified lines
14181430 #define HNS_ROCE_EXT_LLM_ENTRY(addr, id) (((id) << (64 - 12)) | ((addr) >> 12))
14191431 #define HNS_ROCE_EXT_LLM_MIN_PAGES(que_num) ((que_num) * 4 + 2)
14201432
1433+struct hns_roce_v2_free_mr {
1434+ struct ib_qp *rsv_qp[HNS_ROCE_FREE_MR_USED_QP_NUM];
1435+ struct ib_cq *rsv_cq;
1436+ struct ib_pd *rsv_pd;
1437+ struct mutex mutex;
1438+};
1439+
14211440 struct hns_roce_v2_priv {
14221441 struct hnae3_handle *handle;
14231442 struct hns_roce_v2_cmq cmq;
14241443 struct hns_roce_link_table ext_llm;
1444+ struct hns_roce_v2_free_mr free_mr;
14251445 };
14261446
14271447 struct hns_roce_dip {
drivers/infiniband/hw/hns/hns_roce_hw_v2_dfx.c+2−3
@@ -18,9 +18,8 @@ int hns_roce_v2_query_cqc_info(struct hns_roce_dev *hr_dev, u32 cqn, · 17 unmodified lines
1818 return PTR_ERR(mailbox);
1919
2020 cq_context = mailbox->buf;
21− ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, cqn, 0,
22− HNS_ROCE_CMD_QUERY_CQC,
23− HNS_ROCE_CMD_TIMEOUT_MSECS);
21+ ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, HNS_ROCE_CMD_QUERY_CQC,
22+ cqn);
2423 if (ret) {
2524 dev_err(hr_dev->dev, "QUERY cqc cmd process error\n");
2625 goto err_mailbox;
drivers/infiniband/hw/hns/hns_roce_mr.c+17−33
@@ -47,24 +47,6 @@ unsigned long key_to_hw_index(u32 key) · 46 unmodified lines
4747 return (key << 24) | (key >> 8);
4848 }
4949
50−static int hns_roce_hw_create_mpt(struct hns_roce_dev *hr_dev,
51− struct hns_roce_cmd_mailbox *mailbox,
52− unsigned long mpt_index)
53−{
54− return hns_roce_cmd_mbox(hr_dev, mailbox->dma, 0, mpt_index, 0,
55− HNS_ROCE_CMD_CREATE_MPT,
56− HNS_ROCE_CMD_TIMEOUT_MSECS);
57−}
58−
59−int hns_roce_hw_destroy_mpt(struct hns_roce_dev *hr_dev,
60− struct hns_roce_cmd_mailbox *mailbox,
61− unsigned long mpt_index)
62−{
63− return hns_roce_cmd_mbox(hr_dev, 0, mailbox ? mailbox->dma : 0,
64− mpt_index, !mailbox, HNS_ROCE_CMD_DESTROY_MPT,
65− HNS_ROCE_CMD_TIMEOUT_MSECS);
66−}
67−
6850 static int alloc_mr_key(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr)
6951 {
7052 struct hns_roce_ida *mtpt_ida = &hr_dev->mr_table.mtpt_ida;
@@ -137,14 +119,13 @@ static void free_mr_pbl(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr) · 66 unmodified lines
137119 hns_roce_mtr_destroy(hr_dev, &mr->pbl_mtr);
138120 }
139121
140−static void hns_roce_mr_free(struct hns_roce_dev *hr_dev,
141− struct hns_roce_mr *mr)
122+static void hns_roce_mr_free(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr)
142123 {
143124 struct ib_device *ibdev = &hr_dev->ib_dev;
144125 int ret;
145126
146127 if (mr->enabled) {
147− ret = hns_roce_hw_destroy_mpt(hr_dev, NULL,
128+ ret = hns_roce_destroy_hw_ctx(hr_dev, HNS_ROCE_CMD_DESTROY_MPT,
148129 key_to_hw_index(mr->key) &
149130 (hr_dev->caps.num_mtpts - 1));
150131 if (ret)
@@ -166,10 +147,8 @@ static int hns_roce_mr_enable(struct hns_roce_dev *hr_dev, · 15 unmodified lines
166147
167148 /* Allocate mailbox memory */
168149 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
169− if (IS_ERR(mailbox)) {
170− ret = PTR_ERR(mailbox);
171− return ret;
172− }
150+ if (IS_ERR(mailbox))
151+ return PTR_ERR(mailbox);
173152
174153 if (mr->type != MR_TYPE_FRMR)
175154 ret = hr_dev->hw->write_mtpt(hr_dev, mailbox->buf, mr);
@@ -180,7 +159,7 @@ static int hns_roce_mr_enable(struct hns_roce_dev *hr_dev, · 4 unmodified lines
180159 goto err_page;
181160 }
182161
183− ret = hns_roce_hw_create_mpt(hr_dev, mailbox,
162+ ret = hns_roce_create_hw_ctx(hr_dev, mailbox, HNS_ROCE_CMD_CREATE_MPT,
184163 mtpt_idx & (hr_dev->caps.num_mtpts - 1));
185164 if (ret) {
186165 dev_err(dev, "failed to create mpt, ret = %d.\n", ret);
@@ -303,13 +282,14 @@ struct ib_mr *hns_roce_rereg_user_mr(struct ib_mr *ibmr, int flags, u64 start, · 116 unmodified lines
303282 return ERR_CAST(mailbox);
304283
305284 mtpt_idx = key_to_hw_index(mr->key) & (hr_dev->caps.num_mtpts - 1);
306− ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, mtpt_idx, 0,
307− HNS_ROCE_CMD_QUERY_MPT,
308− HNS_ROCE_CMD_TIMEOUT_MSECS);
285+
286+ ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, HNS_ROCE_CMD_QUERY_MPT,
287+ mtpt_idx);
309288 if (ret)
310289 goto free_cmd_mbox;
311290
312− ret = hns_roce_hw_destroy_mpt(hr_dev, NULL, mtpt_idx);
291+ ret = hns_roce_destroy_hw_ctx(hr_dev, HNS_ROCE_CMD_DESTROY_MPT,
292+ mtpt_idx);
313293 if (ret)
314294 ibdev_warn(ib_dev, "failed to destroy MPT, ret = %d.\n", ret);
315295
@@ -339,7 +319,8 @@ struct ib_mr *hns_roce_rereg_user_mr(struct ib_mr *ibmr, int flags, u64 start, · 23 unmodified lines
339319 goto free_cmd_mbox;
340320 }
341321
342− ret = hns_roce_hw_create_mpt(hr_dev, mailbox, mtpt_idx);
322+ ret = hns_roce_create_hw_ctx(hr_dev, mailbox, HNS_ROCE_CMD_CREATE_MPT,
323+ mtpt_idx);
343324 if (ret) {
344325 ibdev_err(ib_dev, "failed to create MPT, ret = %d.\n", ret);
345326 goto free_cmd_mbox;
@@ -361,6 +342,9 @@ int hns_roce_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata) · 15 unmodified lines
361342 struct hns_roce_mr *mr = to_hr_mr(ibmr);
362343 int ret = 0;
363344
345+ if (hr_dev->hw->dereg_mr)
346+ hr_dev->hw->dereg_mr(hr_dev);
347+
364348 hns_roce_mr_free(hr_dev, mr);
365349 kfree(mr);
366350
@@ -480,7 +464,7 @@ static void hns_roce_mw_free(struct hns_roce_dev *hr_dev, · 113 unmodified lines
480464 int ret;
481465
482466 if (mw->enabled) {
483− ret = hns_roce_hw_destroy_mpt(hr_dev, NULL,
467+ ret = hns_roce_destroy_hw_ctx(hr_dev, HNS_ROCE_CMD_DESTROY_MPT,
484468 key_to_hw_index(mw->rkey) &
485469 (hr_dev->caps.num_mtpts - 1));
486470 if (ret)
@@ -520,7 +504,7 @@ static int hns_roce_mw_enable(struct hns_roce_dev *hr_dev, · 33 unmodified lines
520504 goto err_page;
521505 }
522506
523− ret = hns_roce_hw_create_mpt(hr_dev, mailbox,
507+ ret = hns_roce_create_hw_ctx(hr_dev, mailbox, HNS_ROCE_CMD_CREATE_MPT,
524508 mtpt_idx & (hr_dev->caps.num_mtpts - 1));
525509 if (ret) {
526510 dev_err(dev, "MW CREATE_MPT failed (%d)\n", ret);
drivers/infiniband/hw/hns/hns_roce_srq.c+57−49
@@ -59,58 +59,39 @@ static void hns_roce_ib_srq_event(struct hns_roce_srq *srq, · 58 unmodified lines
5959 }
6060 }
6161
62−static int hns_roce_hw_create_srq(struct hns_roce_dev *dev,
63− struct hns_roce_cmd_mailbox *mailbox,
64− unsigned long srq_num)
62+static int alloc_srqn(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq)
6563 {
66− return hns_roce_cmd_mbox(dev, mailbox->dma, 0, srq_num, 0,
67− HNS_ROCE_CMD_CREATE_SRQ,
68− HNS_ROCE_CMD_TIMEOUT_MSECS);
69−}
70−
71−static int hns_roce_hw_destroy_srq(struct hns_roce_dev *dev,
72− struct hns_roce_cmd_mailbox *mailbox,
73− unsigned long srq_num)
74−{
75− return hns_roce_cmd_mbox(dev, 0, mailbox ? mailbox->dma : 0, srq_num,
76− mailbox ? 0 : 1, HNS_ROCE_CMD_DESTROY_SRQ,
77− HNS_ROCE_CMD_TIMEOUT_MSECS);
78−}
79−
80−static int alloc_srqc(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq)
81−{
82− struct hns_roce_srq_table *srq_table = &hr_dev->srq_table;
8364 struct hns_roce_ida *srq_ida = &hr_dev->srq_table.srq_ida;
84− struct ib_device *ibdev = &hr_dev->ib_dev;
85− struct hns_roce_cmd_mailbox *mailbox;
86− int ret;
8765 int id;
8866
8967 id = ida_alloc_range(&srq_ida->ida, srq_ida->min, srq_ida->max,
9068 GFP_KERNEL);
9169 if (id < 0) {
92− ibdev_err(ibdev, "failed to alloc srq(%d).\n", id);
70+ ibdev_err(&hr_dev->ib_dev, "failed to alloc srq(%d).\n", id);
9371 return -ENOMEM;
9472 }
95− srq->srqn = (unsigned long)id;
9673
97− ret = hns_roce_table_get(hr_dev, &srq_table->table, srq->srqn);
98− if (ret) {
99− ibdev_err(ibdev, "failed to get SRQC table, ret = %d.\n", ret);
100− goto err_out;
101− }
74+ srq->srqn = id;
10275
103− ret = xa_err(xa_store(&srq_table->xa, srq->srqn, srq, GFP_KERNEL));
104− if (ret) {
105− ibdev_err(ibdev, "failed to store SRQC, ret = %d.\n", ret);
106− goto err_put;
107− }
76+ return 0;
77+}
78+
79+static void free_srqn(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq)
80+{
81+ ida_free(&hr_dev->srq_table.srq_ida.ida, (int)srq->srqn);
82+}
83+
84+static int hns_roce_create_srqc(struct hns_roce_dev *hr_dev,
85+ struct hns_roce_srq *srq)
86+{
87+ struct ib_device *ibdev = &hr_dev->ib_dev;
88+ struct hns_roce_cmd_mailbox *mailbox;
89+ int ret;
10890
10991 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
110− if (IS_ERR_OR_NULL(mailbox)) {
92+ if (IS_ERR(mailbox)) {
11193 ibdev_err(ibdev, "failed to alloc mailbox for SRQC.\n");
112− ret = -ENOMEM;
113− goto err_xa;
94+ return PTR_ERR(mailbox);
11495 }
11596
11697 ret = hr_dev->hw->write_srqc(srq, mailbox->buf);
@@ -119,24 +100,44 @@ static int alloc_srqc(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq) · 2 unmodified lines
119100 goto err_mbox;
120101 }
121102
122− ret = hns_roce_hw_create_srq(hr_dev, mailbox, srq->srqn);
123− if (ret) {
103+ ret = hns_roce_create_hw_ctx(hr_dev, mailbox, HNS_ROCE_CMD_CREATE_SRQ,
104+ srq->srqn);
105+ if (ret)
124106 ibdev_err(ibdev, "failed to config SRQC, ret = %d.\n", ret);
125− goto err_mbox;
126− }
127107
108+err_mbox:
128109 hns_roce_free_cmd_mailbox(hr_dev, mailbox);
110+ return ret;
111+}
112+
113+static int alloc_srqc(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq)
114+{
115+ struct hns_roce_srq_table *srq_table = &hr_dev->srq_table;
116+ struct ib_device *ibdev = &hr_dev->ib_dev;
117+ int ret;
118+
119+ ret = hns_roce_table_get(hr_dev, &srq_table->table, srq->srqn);
120+ if (ret) {
121+ ibdev_err(ibdev, "failed to get SRQC table, ret = %d.\n", ret);
122+ return ret;
123+ }
124+
125+ ret = xa_err(xa_store(&srq_table->xa, srq->srqn, srq, GFP_KERNEL));
126+ if (ret) {
127+ ibdev_err(ibdev, "failed to store SRQC, ret = %d.\n", ret);
128+ goto err_put;
129+ }
130+
131+ ret = hns_roce_create_srqc(hr_dev, srq);
132+ if (ret)
133+ goto err_xa;
129134
130135 return 0;
131136
132−err_mbox:
133− hns_roce_free_cmd_mailbox(hr_dev, mailbox);
134137 err_xa:
135138 xa_erase(&srq_table->xa, srq->srqn);
136139 err_put:
137140 hns_roce_table_put(hr_dev, &srq_table->table, srq->srqn);
138−err_out:
139− ida_free(&srq_ida->ida, id);
140141
141142 return ret;
142143 }
@@ -146,7 +147,8 @@ static void free_srqc(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq) · 3 unmodified lines
146147 struct hns_roce_srq_table *srq_table = &hr_dev->srq_table;
147148 int ret;
148149
149− ret = hns_roce_hw_destroy_srq(hr_dev, NULL, srq->srqn);
150+ ret = hns_roce_destroy_hw_ctx(hr_dev, HNS_ROCE_CMD_DESTROY_SRQ,
151+ srq->srqn);
150152 if (ret)
151153 dev_err(hr_dev->dev, "DESTROY_SRQ failed (%d) for SRQN %06lx\n",
152154 ret, srq->srqn);
@@ -158,7 +160,6 @@ static void free_srqc(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq) · 5 unmodified lines
158160 wait_for_completion(&srq->free);
159161
160162 hns_roce_table_put(hr_dev, &srq_table->table, srq->srqn);
161− ida_free(&srq_table->srq_ida.ida, (int)srq->srqn);
162163 }
163164
164165 static int alloc_srq_idx(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq,
@@ -406,10 +407,14 @@ int hns_roce_create_srq(struct ib_srq *ib_srq, · 241 unmodified lines
406407 if (ret)
407408 return ret;
408409
409− ret = alloc_srqc(hr_dev, srq);
410+ ret = alloc_srqn(hr_dev, srq);
410411 if (ret)
411412 goto err_srq_buf;
412413
414+ ret = alloc_srqc(hr_dev, srq);
415+ if (ret)
416+ goto err_srqn;
417+
413418 if (udata) {
414419 resp.srqn = srq->srqn;
415420 if (ib_copy_to_udata(udata, &resp,
@@ -428,6 +433,8 @@ int hns_roce_create_srq(struct ib_srq *ib_srq, · 12 unmodified lines
428433
429434 err_srqc:
430435 free_srqc(hr_dev, srq);
436+err_srqn:
437+ free_srqn(hr_dev, srq);
431438 err_srq_buf:
432439 free_srq_buf(hr_dev, srq);
433440
@@ -440,6 +447,7 @@ int hns_roce_destroy_srq(struct ib_srq *ibsrq, struct ib_udata *udata) · 6 unmodified lines
440447 struct hns_roce_srq *srq = to_hr_srq(ibsrq);
441448
442449 free_srqc(hr_dev, srq);
450+ free_srqn(hr_dev, srq);
443451 free_srq_buf(hr_dev, srq);
444452 return 0;
445453 }
drivers/infiniband/hw/irdma/cm.c+39−29
@@ -1501,15 +1501,14 @@ irdma_find_listener(struct irdma_cm_core *cm_core, u32 *dst_addr, u16 dst_port, · 1500 unmodified lines
15011501 * @cm_info: CM info for parent listen node
15021502 * @cm_parent_listen_node: The parent listen node
15031503 */
1504−static enum irdma_status_code
1505−irdma_del_multiple_qhash(struct irdma_device *iwdev,
1506− struct irdma_cm_info *cm_info,
1507− struct irdma_cm_listener *cm_parent_listen_node)
1504+static int irdma_del_multiple_qhash(struct irdma_device *iwdev,
1505+ struct irdma_cm_info *cm_info,
1506+ struct irdma_cm_listener *cm_parent_listen_node)
15081507 {
15091508 struct irdma_cm_listener *child_listen_node;
1510− enum irdma_status_code ret = IRDMA_ERR_CFG;
15111509 struct list_head *pos, *tpos;
15121510 unsigned long flags;
1511+ int ret = -EINVAL;
15131512
15141513 spin_lock_irqsave(&iwdev->cm_core.listen_list_lock, flags);
15151514 list_for_each_safe (pos, tpos,
@@ -1618,16 +1617,16 @@ u16 irdma_get_vlan_ipv4(u32 *addr) · 102 unmodified lines
16181617 * Adds a qhash and a child listen node for every IPv6 address
16191618 * on the adapter and adds the associated qhash filter
16201619 */
1621−static enum irdma_status_code
1622−irdma_add_mqh_6(struct irdma_device *iwdev, struct irdma_cm_info *cm_info,
1623− struct irdma_cm_listener *cm_parent_listen_node)
1620+static int irdma_add_mqh_6(struct irdma_device *iwdev,
1621+ struct irdma_cm_info *cm_info,
1622+ struct irdma_cm_listener *cm_parent_listen_node)
16241623 {
16251624 struct net_device *ip_dev;
16261625 struct inet6_dev *idev;
16271626 struct inet6_ifaddr *ifp, *tmp;
1628− enum irdma_status_code ret = 0;
16291627 struct irdma_cm_listener *child_listen_node;
16301628 unsigned long flags;
1629+ int ret = 0;
16311630
16321631 rtnl_lock();
16331632 for_each_netdev(&init_net, ip_dev) {
@@ -1653,7 +1652,7 @@ irdma_add_mqh_6(struct irdma_device *iwdev, struct irdma_cm_info *cm_info, · 19 unmodified lines
16531652 child_listen_node);
16541653 if (!child_listen_node) {
16551654 ibdev_dbg(&iwdev->ibdev, "CM: listener memory allocation\n");
1656− ret = IRDMA_ERR_NO_MEMORY;
1655+ ret = -ENOMEM;
16571656 goto exit;
16581657 }
16591658
@@ -1700,16 +1699,16 @@ exit: · 40 unmodified lines
17001699 * Adds a qhash and a child listen node for every IPv4 address
17011700 * on the adapter and adds the associated qhash filter
17021701 */
1703−static enum irdma_status_code
1704−irdma_add_mqh_4(struct irdma_device *iwdev, struct irdma_cm_info *cm_info,
1705− struct irdma_cm_listener *cm_parent_listen_node)
1702+static int irdma_add_mqh_4(struct irdma_device *iwdev,
1703+ struct irdma_cm_info *cm_info,
1704+ struct irdma_cm_listener *cm_parent_listen_node)
17061705 {
17071706 struct net_device *ip_dev;
17081707 struct in_device *idev;
17091708 struct irdma_cm_listener *child_listen_node;
1710− enum irdma_status_code ret = 0;
17111709 unsigned long flags;
17121710 const struct in_ifaddr *ifa;
1711+ int ret = 0;
17131712
17141713 rtnl_lock();
17151714 for_each_netdev(&init_net, ip_dev) {
@@ -1734,7 +1733,7 @@ irdma_add_mqh_4(struct irdma_device *iwdev, struct irdma_cm_info *cm_info, · 18 unmodified lines
17341733 if (!child_listen_node) {
17351734 ibdev_dbg(&iwdev->ibdev, "CM: listener memory allocation\n");
17361735 in_dev_put(idev);
1737− ret = IRDMA_ERR_NO_MEMORY;
1736+ ret = -ENOMEM;
17381737 goto exit;
17391738 }
17401739
@@ -1781,9 +1780,9 @@ exit: · 40 unmodified lines
17811780 * @cm_info: CM info for parent listen node
17821781 * @cm_listen_node: The parent listen node
17831782 */
1784−static enum irdma_status_code
1785−irdma_add_mqh(struct irdma_device *iwdev, struct irdma_cm_info *cm_info,
1786− struct irdma_cm_listener *cm_listen_node)
1783+static int irdma_add_mqh(struct irdma_device *iwdev,
1784+ struct irdma_cm_info *cm_info,
1785+ struct irdma_cm_listener *cm_listen_node)
17871786 {
17881787 if (cm_info->ipv4)
17891788 return irdma_add_mqh_4(iwdev, cm_info, cm_listen_node);
@@ -2200,7 +2199,7 @@ irdma_make_cm_node(struct irdma_cm_core *cm_core, struct irdma_device *iwdev, · 410 unmodified lines
22002199 /* set our node specific transport info */
22012200 cm_node->ipv4 = cm_info->ipv4;
22022201 cm_node->vlan_id = cm_info->vlan_id;
2203− if (cm_node->vlan_id >= VLAN_N_VID && iwdev->dcb)
2202+ if (cm_node->vlan_id >= VLAN_N_VID && iwdev->dcb_vlan_mode)
22042203 cm_node->vlan_id = 0;
22052204 cm_node->tos = cm_info->tos;
22062205 cm_node->user_pri = cm_info->user_pri;
@@ -2209,8 +2208,12 @@ irdma_make_cm_node(struct irdma_cm_core *cm_core, struct irdma_device *iwdev, · 2 unmodified lines
22092208 ibdev_warn(&iwdev->ibdev,
22102209 "application TOS[%d] and remote client TOS[%d] mismatch\n",
22112210 listener->tos, cm_info->tos);
2212− cm_node->tos = max(listener->tos, cm_info->tos);
2213− cm_node->user_pri = rt_tos2priority(cm_node->tos);
2211+ if (iwdev->vsi.dscp_mode) {
2212+ cm_node->user_pri = listener->user_pri;
2213+ } else {
2214+ cm_node->tos = max(listener->tos, cm_info->tos);
2215+ cm_node->user_pri = rt_tos2priority(cm_node->tos);
2216+ }
22142217 ibdev_dbg(&iwdev->ibdev,
22152218 "DCB: listener: TOS:[%d] UP:[%d]\n", cm_node->tos,
22162219 cm_node->user_pri);
@@ -3201,8 +3204,7 @@ static void irdma_cm_free_ah_nop(struct irdma_cm_node *cm_node) · 984 unmodified lines
32013204 * @iwdev: iwarp device structure
32023205 * @rdma_ver: HW version
32033206 */
3204−enum irdma_status_code irdma_setup_cm_core(struct irdma_device *iwdev,
3205− u8 rdma_ver)
3207+int irdma_setup_cm_core(struct irdma_device *iwdev, u8 rdma_ver)
32063208 {
32073209 struct irdma_cm_core *cm_core = &iwdev->cm_core;
32083210
@@ -3212,7 +3214,7 @@ enum irdma_status_code irdma_setup_cm_core(struct irdma_device *iwdev, · 3 unmodified lines
32123214 /* Handles CM event work items send to Iwarp core */
32133215 cm_core->event_wq = alloc_ordered_workqueue("iwarp-event-wq", 0);
32143216 if (!cm_core->event_wq)
3215− return IRDMA_ERR_NO_MEMORY;
3217+ return -ENOMEM;
32163218
32173219 INIT_LIST_HEAD(&cm_core->listen_list);
32183220
@@ -3835,7 +3837,11 @@ int irdma_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param) · 616 unmodified lines
38353837 cm_info.cm_id = cm_id;
38363838 cm_info.qh_qpid = iwdev->vsi.ilq->qp_id;
38373839 cm_info.tos = cm_id->tos;
3838− cm_info.user_pri = rt_tos2priority(cm_id->tos);
3840+ if (iwdev->vsi.dscp_mode)
3841+ cm_info.user_pri =
3842+ iwqp->sc_qp.vsi->dscp_map[irdma_tos2dscp(cm_info.tos)];
3843+ else
3844+ cm_info.user_pri = rt_tos2priority(cm_id->tos);
38393845
38403846 if (iwqp->sc_qp.dev->ws_add(iwqp->sc_qp.vsi, cm_info.user_pri))
38413847 return -ENOMEM;
@@ -3915,10 +3921,10 @@ int irdma_create_listen(struct iw_cm_id *cm_id, int backlog) · 73 unmodified lines
39153921 struct irdma_device *iwdev;
39163922 struct irdma_cm_listener *cm_listen_node;
39173923 struct irdma_cm_info cm_info = {};
3918− enum irdma_status_code err;
39193924 struct sockaddr_in *laddr;
39203925 struct sockaddr_in6 *laddr6;
39213926 bool wildcard = false;
3927+ int err;
39223928
39233929 iwdev = to_iwdev(cm_id->device);
39243930 if (!iwdev)
@@ -3959,7 +3965,7 @@ int irdma_create_listen(struct iw_cm_id *cm_id, int backlog) · 34 unmodified lines
39593965 }
39603966 }
39613967
3962− if (cm_info.vlan_id >= VLAN_N_VID && iwdev->dcb)
3968+ if (cm_info.vlan_id >= VLAN_N_VID && iwdev->dcb_vlan_mode)
39633969 cm_info.vlan_id = 0;
39643970 cm_info.backlog = backlog;
39653971 cm_info.cm_id = cm_id;
@@ -3977,7 +3983,11 @@ int irdma_create_listen(struct iw_cm_id *cm_id, int backlog) · 11 unmodified lines
39773983 cm_id->provider_data = cm_listen_node;
39783984
39793985 cm_listen_node->tos = cm_id->tos;
3980− cm_listen_node->user_pri = rt_tos2priority(cm_id->tos);
3986+ if (iwdev->vsi.dscp_mode)
3987+ cm_listen_node->user_pri =
3988+ iwdev->vsi.dscp_map[irdma_tos2dscp(cm_id->tos)];
3989+ else
3990+ cm_listen_node->user_pri = rt_tos2priority(cm_id->tos);
39813991 cm_info.user_pri = cm_listen_node->user_pri;
39823992 if (!cm_listen_node->reused_node) {
39833993 if (wildcard) {
@@ -4325,11 +4335,11 @@ static void irdma_qhash_ctrl(struct irdma_device *iwdev, · 341 unmodified lines
43254335 struct list_head *child_listen_list = &parent_listen_node->child_listen_list;
43264336 struct irdma_cm_listener *child_listen_node;
43274337 struct list_head *pos, *tpos;
4328− enum irdma_status_code err;
43294338 bool node_allocated = false;
43304339 enum irdma_quad_hash_manage_type op = ifup ?
43314340 IRDMA_QHASH_MANAGE_TYPE_ADD :
43324341 IRDMA_QHASH_MANAGE_TYPE_DELETE;
4342+ int err;
43334343
43344344 list_for_each_safe (pos, tpos, child_listen_list) {
43354345 child_listen_node = list_entry(pos, struct irdma_cm_listener,
drivers/infiniband/hw/irdma/cm.h+7−0
@@ -384,6 +384,13 @@ int irdma_schedule_cm_timer(struct irdma_cm_node *cm_node, · 383 unmodified lines
384384 struct irdma_puda_buf *sqbuf,
385385 enum irdma_timer_type type, int send_retrans,
386386 int close_when_complete);
387+
388+static inline u8 irdma_tos2dscp(u8 tos)
389+{
390+#define IRDMA_DSCP_VAL GENMASK(7, 2)
391+ return (u8)FIELD_GET(IRDMA_DSCP_VAL, tos);
392+}
393+
387394 int irdma_accept(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param);
388395 int irdma_reject(struct iw_cm_id *cm_id, const void *pdata, u8 pdata_len);
389396 int irdma_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param);
drivers/infiniband/hw/irdma/ctrl.c+287−315
@@ -3,7 +3,6 @@ · 2 unmodified lines
33 #include <linux/etherdevice.h>
44
55 #include "osdep.h"
6−#include "status.h"
76 #include "hmc.h"
87 #include "defs.h"
98 #include "type.h"
@@ -70,6 +69,31 @@ void irdma_sc_suspend_resume_qps(struct irdma_sc_vsi *vsi, u8 op) · 60 unmodified lines
7069 }
7170 }
7271
72+static void irdma_set_qos_info(struct irdma_sc_vsi *vsi,
73+ struct irdma_l2params *l2p)
74+{
75+ u8 i;
76+
77+ vsi->qos_rel_bw = l2p->vsi_rel_bw;
78+ vsi->qos_prio_type = l2p->vsi_prio_type;
79+ vsi->dscp_mode = l2p->dscp_mode;
80+ if (l2p->dscp_mode) {
81+ memcpy(vsi->dscp_map, l2p->dscp_map, sizeof(vsi->dscp_map));
82+ for (i = 0; i < IRDMA_MAX_USER_PRIORITY; i++)
83+ l2p->up2tc[i] = i;
84+ }
85+ for (i = 0; i < IRDMA_MAX_USER_PRIORITY; i++) {
86+ if (vsi->dev->hw_attrs.uk_attrs.hw_rev == IRDMA_GEN_1)
87+ vsi->qos[i].qs_handle = l2p->qs_handle_list[i];
88+ vsi->qos[i].traffic_class = l2p->up2tc[i];
89+ vsi->qos[i].rel_bw =
90+ l2p->tc_info[vsi->qos[i].traffic_class].rel_bw;
91+ vsi->qos[i].prio_type =
92+ l2p->tc_info[vsi->qos[i].traffic_class].prio_type;
93+ vsi->qos[i].valid = false;
94+ }
95+}
96+
7397 /**
7498 * irdma_change_l2params - given the new l2 parameters, change all qp
7599 * @vsi: RDMA VSI pointer
@@ -88,6 +112,7 @@ void irdma_change_l2params(struct irdma_sc_vsi *vsi, · 12 unmodified lines
88112 return;
89113
90114 vsi->tc_change_pending = false;
115+ irdma_set_qos_info(vsi, l2params);
91116 irdma_sc_suspend_resume_qps(vsi, IRDMA_OP_RESUME);
92117 }
93118
@@ -154,17 +179,16 @@ void irdma_sc_pd_init(struct irdma_sc_dev *dev, struct irdma_sc_pd *pd, u32 pd_i · 60 unmodified lines
154179 * @scratch: u64 saved to be used during cqp completion
155180 * @post_sq: flag for cqp db to ring
156181 */
157−static enum irdma_status_code
158−irdma_sc_add_arp_cache_entry(struct irdma_sc_cqp *cqp,
159− struct irdma_add_arp_cache_entry_info *info,
160− u64 scratch, bool post_sq)
182+static int irdma_sc_add_arp_cache_entry(struct irdma_sc_cqp *cqp,
183+ struct irdma_add_arp_cache_entry_info *info,
184+ u64 scratch, bool post_sq)
161185 {
162186 __le64 *wqe;
163187 u64 hdr;
164188
165189 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
166190 if (!wqe)
167− return IRDMA_ERR_RING_FULL;
191+ return -ENOMEM;
168192 set_64bit_val(wqe, 8, info->reach_max);
169193 set_64bit_val(wqe, 16, ether_addr_to_u64(info->mac_addr));
170194
@@ -192,16 +216,15 @@ irdma_sc_add_arp_cache_entry(struct irdma_sc_cqp *cqp, · 21 unmodified lines
192216 * @arp_index: arp index to delete arp entry
193217 * @post_sq: flag for cqp db to ring
194218 */
195−static enum irdma_status_code
196−irdma_sc_del_arp_cache_entry(struct irdma_sc_cqp *cqp, u64 scratch,
197− u16 arp_index, bool post_sq)
219+static int irdma_sc_del_arp_cache_entry(struct irdma_sc_cqp *cqp, u64 scratch,
220+ u16 arp_index, bool post_sq)
198221 {
199222 __le64 *wqe;
200223 u64 hdr;
201224
202225 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
203226 if (!wqe)
204− return IRDMA_ERR_RING_FULL;
227+ return -ENOMEM;
205228
206229 hdr = arp_index |
207230 FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_MANAGE_ARP) |
@@ -226,17 +249,16 @@ irdma_sc_del_arp_cache_entry(struct irdma_sc_cqp *cqp, u64 scratch, · 18 unmodified lines
226249 * @scratch: u64 saved to be used during cqp completion
227250 * @post_sq: flag for cqp db to ring
228251 */
229−static enum irdma_status_code
230−irdma_sc_manage_apbvt_entry(struct irdma_sc_cqp *cqp,
231− struct irdma_apbvt_info *info, u64 scratch,
232− bool post_sq)
252+static int irdma_sc_manage_apbvt_entry(struct irdma_sc_cqp *cqp,
253+ struct irdma_apbvt_info *info,
254+ u64 scratch, bool post_sq)
233255 {
234256 __le64 *wqe;
235257 u64 hdr;
236258
237259 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
238260 if (!wqe)
239− return IRDMA_ERR_RING_FULL;
261+ return -ENOMEM;
240262
241263 set_64bit_val(wqe, 16, info->port);
242264
@@ -274,7 +296,7 @@ irdma_sc_manage_apbvt_entry(struct irdma_sc_cqp *cqp, · 31 unmodified lines
274296 * quad hash entry in the hardware will point to iwarp's qp
275297 * number and requires no calls from the driver.
276298 */
277−static enum irdma_status_code
299+static int
278300 irdma_sc_manage_qhash_table_entry(struct irdma_sc_cqp *cqp,
279301 struct irdma_qhash_table_info *info,
280302 u64 scratch, bool post_sq)
@@ -287,7 +309,7 @@ irdma_sc_manage_qhash_table_entry(struct irdma_sc_cqp *cqp, · 6 unmodified lines
287309
288310 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
289311 if (!wqe)
290− return IRDMA_ERR_RING_FULL;
312+ return -ENOMEM;
291313
292314 set_64bit_val(wqe, 0, ether_addr_to_u64(info->mac_addr));
293315
@@ -350,10 +372,9 @@ irdma_sc_manage_qhash_table_entry(struct irdma_sc_cqp *cqp, · 56 unmodified lines
350372 * @qp: sc qp
351373 * @info: initialization qp info
352374 */
353−enum irdma_status_code irdma_sc_qp_init(struct irdma_sc_qp *qp,
354− struct irdma_qp_init_info *info)
375+int irdma_sc_qp_init(struct irdma_sc_qp *qp, struct irdma_qp_init_info *info)
355376 {
356− enum irdma_status_code ret_code;
377+ int ret_code;
357378 u32 pble_obj_cnt;
358379 u16 wqe_size;
359380
@@ -361,7 +382,7 @@ enum irdma_status_code irdma_sc_qp_init(struct irdma_sc_qp *qp, · 1 unmodified line
361382 info->pd->dev->hw_attrs.uk_attrs.max_hw_wq_frags ||
362383 info->qp_uk_init_info.max_rq_frag_cnt >
363384 info->pd->dev->hw_attrs.uk_attrs.max_hw_wq_frags)
364− return IRDMA_ERR_INVALID_FRAG_COUNT;
385+ return -EINVAL;
365386
366387 qp->dev = info->pd->dev;
367388 qp->vsi = info->vsi;
@@ -384,7 +405,7 @@ enum irdma_status_code irdma_sc_qp_init(struct irdma_sc_qp *qp, · 16 unmodified lines
384405
385406 if ((info->virtual_map && info->sq_pa >= pble_obj_cnt) ||
386407 (info->virtual_map && info->rq_pa >= pble_obj_cnt))
387− return IRDMA_ERR_INVALID_PBLE_INDEX;
408+ return -EINVAL;
388409
389410 qp->llp_stream_handle = (void *)(-1);
390411 qp->hw_sq_size = irdma_get_encoded_wqe_size(qp->qp_uk.sq_ring.size,
@@ -424,8 +445,8 @@ enum irdma_status_code irdma_sc_qp_init(struct irdma_sc_qp *qp, · 33 unmodified lines
424445 * @scratch: u64 saved to be used during cqp completion
425446 * @post_sq: flag for cqp db to ring
426447 */
427−enum irdma_status_code irdma_sc_qp_create(struct irdma_sc_qp *qp, struct irdma_create_qp_info *info,
428− u64 scratch, bool post_sq)
448+int irdma_sc_qp_create(struct irdma_sc_qp *qp, struct irdma_create_qp_info *info,
449+ u64 scratch, bool post_sq)
429450 {
430451 struct irdma_sc_cqp *cqp;
431452 __le64 *wqe;
@@ -433,12 +454,12 @@ enum irdma_status_code irdma_sc_qp_create(struct irdma_sc_qp *qp, struct irdma_c · 1 unmodified line
433454
434455 cqp = qp->dev->cqp;
435456 if (qp->qp_uk.qp_id < cqp->dev->hw_attrs.min_hw_qp_id ||
436− qp->qp_uk.qp_id > (cqp->dev->hmc_info->hmc_obj[IRDMA_HMC_IW_QP].max_cnt - 1))
437− return IRDMA_ERR_INVALID_QP_ID;
457+ qp->qp_uk.qp_id >= cqp->dev->hmc_info->hmc_obj[IRDMA_HMC_IW_QP].max_cnt)
458+ return -EINVAL;
438459
439460 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
440461 if (!wqe)
441− return IRDMA_ERR_RING_FULL;
462+ return -ENOMEM;
442463
443464 set_64bit_val(wqe, 16, qp->hw_host_ctx_pa);
444465 set_64bit_val(wqe, 40, qp->shadow_area_pa);
@@ -475,9 +496,8 @@ enum irdma_status_code irdma_sc_qp_create(struct irdma_sc_qp *qp, struct irdma_c · 30 unmodified lines
475496 * @scratch: u64 saved to be used during cqp completion
476497 * @post_sq: flag for cqp db to ring
477498 */
478−enum irdma_status_code irdma_sc_qp_modify(struct irdma_sc_qp *qp,
479− struct irdma_modify_qp_info *info,
480− u64 scratch, bool post_sq)
499+int irdma_sc_qp_modify(struct irdma_sc_qp *qp, struct irdma_modify_qp_info *info,
500+ u64 scratch, bool post_sq)
481501 {
482502 __le64 *wqe;
483503 struct irdma_sc_cqp *cqp;
@@ -488,7 +508,7 @@ enum irdma_status_code irdma_sc_qp_modify(struct irdma_sc_qp *qp, · 4 unmodified lines
488508 cqp = qp->dev->cqp;
489509 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
490510 if (!wqe)
491− return IRDMA_ERR_RING_FULL;
511+ return -ENOMEM;
492512
493513 if (info->next_iwarp_state == IRDMA_QP_STATE_TERMINATE) {
494514 if (info->dont_send_fin)
@@ -546,9 +566,8 @@ enum irdma_status_code irdma_sc_qp_modify(struct irdma_sc_qp *qp, · 51 unmodified lines
546566 * @ignore_mw_bnd: memory window bind flag
547567 * @post_sq: flag for cqp db to ring
548568 */
549−enum irdma_status_code irdma_sc_qp_destroy(struct irdma_sc_qp *qp, u64 scratch,
550− bool remove_hash_idx, bool ignore_mw_bnd,
551− bool post_sq)
569+int irdma_sc_qp_destroy(struct irdma_sc_qp *qp, u64 scratch,
570+ bool remove_hash_idx, bool ignore_mw_bnd, bool post_sq)
552571 {
553572 __le64 *wqe;
554573 struct irdma_sc_cqp *cqp;
@@ -557,7 +576,7 @@ enum irdma_status_code irdma_sc_qp_destroy(struct irdma_sc_qp *qp, u64 scratch, · 2 unmodified lines
557576 cqp = qp->dev->cqp;
558577 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
559578 if (!wqe)
560− return IRDMA_ERR_RING_FULL;
579+ return -ENOMEM;
561580
562581 set_64bit_val(wqe, 16, qp->hw_host_ctx_pa);
563582 set_64bit_val(wqe, 40, qp->shadow_area_pa);
@@ -739,16 +758,15 @@ void irdma_sc_qp_setctx_roce(struct irdma_sc_qp *qp, __le64 *qp_ctx, · 175 unmodified lines
739758 * @scratch: u64 saved to be used during cqp completion
740759 * @post_sq: flag for cqp db to ring
741760 */
742−static enum irdma_status_code
743−irdma_sc_alloc_local_mac_entry(struct irdma_sc_cqp *cqp, u64 scratch,
744− bool post_sq)
761+static int irdma_sc_alloc_local_mac_entry(struct irdma_sc_cqp *cqp, u64 scratch,
762+ bool post_sq)
745763 {
746764 __le64 *wqe;
747765 u64 hdr;
748766
749767 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
750768 if (!wqe)
751− return IRDMA_ERR_RING_FULL;
769+ return -ENOMEM;
752770
753771 hdr = FIELD_PREP(IRDMA_CQPSQ_OPCODE,
754772 IRDMA_CQP_OP_ALLOCATE_LOC_MAC_TABLE_ENTRY) |
@@ -774,17 +792,16 @@ irdma_sc_alloc_local_mac_entry(struct irdma_sc_cqp *cqp, u64 scratch, · 19 unmodified lines
774792 * @scratch: u64 saved to be used during cqp completion
775793 * @post_sq: flag for cqp db to ring
776794 */
777−static enum irdma_status_code
778−irdma_sc_add_local_mac_entry(struct irdma_sc_cqp *cqp,
779− struct irdma_local_mac_entry_info *info,
780− u64 scratch, bool post_sq)
795+static int irdma_sc_add_local_mac_entry(struct irdma_sc_cqp *cqp,
796+ struct irdma_local_mac_entry_info *info,
797+ u64 scratch, bool post_sq)
781798 {
782799 __le64 *wqe;
783800 u64 header;
784801
785802 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
786803 if (!wqe)
787− return IRDMA_ERR_RING_FULL;
804+ return -ENOMEM;
788805
789806 set_64bit_val(wqe, 32, ether_addr_to_u64(info->mac_addr));
790807
@@ -813,16 +830,16 @@ irdma_sc_add_local_mac_entry(struct irdma_sc_cqp *cqp, · 22 unmodified lines
813830 * @ignore_ref_count: to force mac adde delete
814831 * @post_sq: flag for cqp db to ring
815832 */
816−static enum irdma_status_code
817−irdma_sc_del_local_mac_entry(struct irdma_sc_cqp *cqp, u64 scratch,
818− u16 entry_idx, u8 ignore_ref_count, bool post_sq)
833+static int irdma_sc_del_local_mac_entry(struct irdma_sc_cqp *cqp, u64 scratch,
834+ u16 entry_idx, u8 ignore_ref_count,
835+ bool post_sq)
819836 {
820837 __le64 *wqe;
821838 u64 header;
822839
823840 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
824841 if (!wqe)
825− return IRDMA_ERR_RING_FULL;
842+ return -ENOMEM;
826843 header = FIELD_PREP(IRDMA_CQPSQ_MLM_TABLEIDX, entry_idx) |
827844 FIELD_PREP(IRDMA_CQPSQ_OPCODE,
828845 IRDMA_CQP_OP_MANAGE_LOC_MAC_TABLE) |
@@ -1035,10 +1052,9 @@ void irdma_sc_qp_setctx(struct irdma_sc_qp *qp, __le64 *qp_ctx, · 206 unmodified lines
10351052 * @scratch: u64 saved to be used during cqp completion
10361053 * @post_sq: flag for cqp db to ring
10371054 */
1038−static enum irdma_status_code
1039−irdma_sc_alloc_stag(struct irdma_sc_dev *dev,
1040− struct irdma_allocate_stag_info *info, u64 scratch,
1041− bool post_sq)
1055+static int irdma_sc_alloc_stag(struct irdma_sc_dev *dev,
1056+ struct irdma_allocate_stag_info *info,
1057+ u64 scratch, bool post_sq)
10421058 {
10431059 __le64 *wqe;
10441060 struct irdma_sc_cqp *cqp;
@@ -1055,7 +1071,7 @@ irdma_sc_alloc_stag(struct irdma_sc_dev *dev, · 10 unmodified lines
10551071 cqp = dev->cqp;
10561072 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
10571073 if (!wqe)
1058− return IRDMA_ERR_RING_FULL;
1074+ return -ENOMEM;
10591075
10601076 set_64bit_val(wqe, 8,
10611077 FLD_LS_64(dev, info->pd_id, IRDMA_CQPSQ_STAG_PDID) |
@@ -1097,10 +1113,9 @@ irdma_sc_alloc_stag(struct irdma_sc_dev *dev, · 35 unmodified lines
10971113 * @scratch: u64 saved to be used during cqp completion
10981114 * @post_sq: flag for cqp db to ring
10991115 */
1100−static enum irdma_status_code
1101−irdma_sc_mr_reg_non_shared(struct irdma_sc_dev *dev,
1102− struct irdma_reg_ns_stag_info *info, u64 scratch,
1103− bool post_sq)
1116+static int irdma_sc_mr_reg_non_shared(struct irdma_sc_dev *dev,
1117+ struct irdma_reg_ns_stag_info *info,
1118+ u64 scratch, bool post_sq)
11041119 {
11051120 __le64 *wqe;
11061121 u64 fbo;
@@ -1118,7 +1133,7 @@ irdma_sc_mr_reg_non_shared(struct irdma_sc_dev *dev, · 11 unmodified lines
11181133 else if (info->page_size == 0x1000)
11191134 page_size = IRDMA_PAGE_SIZE_4K;
11201135 else
1121− return IRDMA_ERR_PARAM;
1136+ return -EINVAL;
11221137
11231138 if (info->access_rights & (IRDMA_ACCESS_FLAGS_REMOTEREAD_ONLY |
11241139 IRDMA_ACCESS_FLAGS_REMOTEWRITE_ONLY))
@@ -1128,12 +1143,12 @@ irdma_sc_mr_reg_non_shared(struct irdma_sc_dev *dev, · 3 unmodified lines
11281143
11291144 pble_obj_cnt = dev->hmc_info->hmc_obj[IRDMA_HMC_IW_PBLE].cnt;
11301145 if (info->chunk_size && info->first_pm_pbl_index >= pble_obj_cnt)
1131− return IRDMA_ERR_INVALID_PBLE_INDEX;
1146+ return -EINVAL;
11321147
11331148 cqp = dev->cqp;
11341149 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
11351150 if (!wqe)
1136− return IRDMA_ERR_RING_FULL;
1151+ return -ENOMEM;
11371152 fbo = info->va & (info->page_size - 1);
11381153
11391154 set_64bit_val(wqe, 0,
@@ -1186,10 +1201,9 @@ irdma_sc_mr_reg_non_shared(struct irdma_sc_dev *dev, · 46 unmodified lines
11861201 * @scratch: u64 saved to be used during cqp completion
11871202 * @post_sq: flag for cqp db to ring
11881203 */
1189−static enum irdma_status_code
1190−irdma_sc_dealloc_stag(struct irdma_sc_dev *dev,
1191− struct irdma_dealloc_stag_info *info, u64 scratch,
1192− bool post_sq)
1204+static int irdma_sc_dealloc_stag(struct irdma_sc_dev *dev,
1205+ struct irdma_dealloc_stag_info *info,
1206+ u64 scratch, bool post_sq)
11931207 {
11941208 u64 hdr;
11951209 __le64 *wqe;
@@ -1198,7 +1212,7 @@ irdma_sc_dealloc_stag(struct irdma_sc_dev *dev, · 2 unmodified lines
11981212 cqp = dev->cqp;
11991213 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
12001214 if (!wqe)
1201− return IRDMA_ERR_RING_FULL;
1215+ return -ENOMEM;
12021216
12031217 set_64bit_val(wqe, 8,
12041218 FLD_LS_64(dev, info->pd_id, IRDMA_CQPSQ_STAG_PDID));
@@ -1227,9 +1241,9 @@ irdma_sc_dealloc_stag(struct irdma_sc_dev *dev, · 22 unmodified lines
12271241 * @scratch: u64 saved to be used during cqp completion
12281242 * @post_sq: flag for cqp db to ring
12291243 */
1230−static enum irdma_status_code
1231−irdma_sc_mw_alloc(struct irdma_sc_dev *dev, struct irdma_mw_alloc_info *info,
1232− u64 scratch, bool post_sq)
1244+static int irdma_sc_mw_alloc(struct irdma_sc_dev *dev,
1245+ struct irdma_mw_alloc_info *info, u64 scratch,
1246+ bool post_sq)
12331247 {
12341248 u64 hdr;
12351249 struct irdma_sc_cqp *cqp;
@@ -1238,7 +1252,7 @@ irdma_sc_mw_alloc(struct irdma_sc_dev *dev, struct irdma_mw_alloc_info *info, · 2 unmodified lines
12381252 cqp = dev->cqp;
12391253 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
12401254 if (!wqe)
1241− return IRDMA_ERR_RING_FULL;
1255+ return -ENOMEM;
12421256
12431257 set_64bit_val(wqe, 8,
12441258 FLD_LS_64(dev, info->pd_id, IRDMA_CQPSQ_STAG_PDID));
@@ -1268,9 +1282,9 @@ irdma_sc_mw_alloc(struct irdma_sc_dev *dev, struct irdma_mw_alloc_info *info, · 23 unmodified lines
12681282 * @info: fast mr info
12691283 * @post_sq: flag for cqp db to ring
12701284 */
1271−enum irdma_status_code
1272−irdma_sc_mr_fast_register(struct irdma_sc_qp *qp,
1273− struct irdma_fast_reg_stag_info *info, bool post_sq)
1285+int irdma_sc_mr_fast_register(struct irdma_sc_qp *qp,
1286+ struct irdma_fast_reg_stag_info *info,
1287+ bool post_sq)
12741288 {
12751289 u64 temp, hdr;
12761290 __le64 *wqe;
@@ -1292,7 +1306,7 @@ irdma_sc_mr_fast_register(struct irdma_sc_qp *qp, · 15 unmodified lines
12921306 wqe = irdma_qp_get_next_send_wqe(&qp->qp_uk, &wqe_idx,
12931307 IRDMA_QP_WQE_MIN_QUANTA, 0, &sq_info);
12941308 if (!wqe)
1295− return IRDMA_ERR_QP_TOOMANY_WRS_POSTED;
1309+ return -ENOMEM;
12961310
12971311 irdma_clr_wqes(&qp->qp_uk, wqe_idx);
12981312
@@ -1821,8 +1835,7 @@ void irdma_terminate_received(struct irdma_sc_qp *qp, · 522 unmodified lines
18211835 }
18221836 }
18231837
1824−static enum irdma_status_code irdma_null_ws_add(struct irdma_sc_vsi *vsi,
1825− u8 user_pri)
1838+static int irdma_null_ws_add(struct irdma_sc_vsi *vsi, u8 user_pri)
18261839 {
18271840 return 0;
18281841 }
@@ -1845,7 +1858,6 @@ static void irdma_null_ws_reset(struct irdma_sc_vsi *vsi) · 16 unmodified lines
18451858 void irdma_sc_vsi_init(struct irdma_sc_vsi *vsi,
18461859 struct irdma_vsi_init_info *info)
18471860 {
1848− struct irdma_l2params *l2p;
18491861 int i;
18501862
18511863 vsi->dev = info->dev;
@@ -1858,18 +1870,8 @@ void irdma_sc_vsi_init(struct irdma_sc_vsi *vsi, · 6 unmodified lines
18581870 if (vsi->dev->hw_attrs.uk_attrs.hw_rev == IRDMA_GEN_1)
18591871 vsi->fcn_id = info->dev->hmc_fn_id;
18601872
1861− l2p = info->params;
1862− vsi->qos_rel_bw = l2p->vsi_rel_bw;
1863− vsi->qos_prio_type = l2p->vsi_prio_type;
1873+ irdma_set_qos_info(vsi, info->params);
18641874 for (i = 0; i < IRDMA_MAX_USER_PRIORITY; i++) {
1865− if (vsi->dev->hw_attrs.uk_attrs.hw_rev == IRDMA_GEN_1)
1866− vsi->qos[i].qs_handle = l2p->qs_handle_list[i];
1867− vsi->qos[i].traffic_class = info->params->up2tc[i];
1868− vsi->qos[i].rel_bw =
1869− l2p->tc_info[vsi->qos[i].traffic_class].rel_bw;
1870− vsi->qos[i].prio_type =
1871− l2p->tc_info[vsi->qos[i].traffic_class].prio_type;
1872− vsi->qos[i].valid = false;
18731875 mutex_init(&vsi->qos[i].qos_mutex);
18741876 INIT_LIST_HEAD(&vsi->qos[i].qplist);
18751877 }
@@ -1918,8 +1920,8 @@ static u8 irdma_get_fcn_id(struct irdma_sc_vsi *vsi) · 42 unmodified lines
19181920 * @vsi: pointer to the vsi structure
19191921 * @info: The info structure used for initialization
19201922 */
1921−enum irdma_status_code irdma_vsi_stats_init(struct irdma_sc_vsi *vsi,
1922− struct irdma_vsi_stats_info *info)
1923+int irdma_vsi_stats_init(struct irdma_sc_vsi *vsi,
1924+ struct irdma_vsi_stats_info *info)
19231925 {
19241926 u8 fcn_id = info->fcn_id;
19251927 struct irdma_dma_mem *stats_buff_mem;
@@ -1934,7 +1936,7 @@ enum irdma_status_code irdma_vsi_stats_init(struct irdma_sc_vsi *vsi, · 8 unmodified lines
19341936 &stats_buff_mem->pa,
19351937 GFP_KERNEL);
19361938 if (!stats_buff_mem->va)
1937− return IRDMA_ERR_NO_MEMORY;
1939+ return -ENOMEM;
19381940
19391941 vsi->pestat->gather_info.gather_stats_va = stats_buff_mem->va;
19401942 vsi->pestat->gather_info.last_gather_stats_va =
@@ -1961,7 +1963,7 @@ stats_error: · 20 unmodified lines
19611963 stats_buff_mem->va, stats_buff_mem->pa);
19621964 stats_buff_mem->va = NULL;
19631965
1964− return IRDMA_ERR_CQP_COMPL_ERROR;
1966+ return -EIO;
19651967 }
19661968
19671969 /**
@@ -2023,19 +2025,19 @@ u8 irdma_get_encoded_wqe_size(u32 wqsize, enum irdma_queue_type queue_type) · 55 unmodified lines
20232025 * @info: gather stats info structure
20242026 * @scratch: u64 saved to be used during cqp completion
20252027 */
2026−static enum irdma_status_code
2027−irdma_sc_gather_stats(struct irdma_sc_cqp *cqp,
2028− struct irdma_stats_gather_info *info, u64 scratch)
2028+static int irdma_sc_gather_stats(struct irdma_sc_cqp *cqp,
2029+ struct irdma_stats_gather_info *info,
2030+ u64 scratch)
20292031 {
20302032 __le64 *wqe;
20312033 u64 temp;
20322034
20332035 if (info->stats_buff_mem.size < IRDMA_GATHER_STATS_BUF_SIZE)
2034− return IRDMA_ERR_BUF_TOO_SHORT;
2036+ return -ENOMEM;
20352037
20362038 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
20372039 if (!wqe)
2038− return IRDMA_ERR_RING_FULL;
2040+ return -ENOMEM;
20392041
20402042 set_64bit_val(wqe, 40,
20412043 FIELD_PREP(IRDMA_CQPSQ_STATS_HMC_FCN_INDEX, info->hmc_fcn_index));
@@ -2070,17 +2072,16 @@ irdma_sc_gather_stats(struct irdma_sc_cqp *cqp, · 28 unmodified lines
20702072 * @alloc: alloc vs. delete flag
20712073 * @scratch: u64 saved to be used during cqp completion
20722074 */
2073−static enum irdma_status_code
2074−irdma_sc_manage_stats_inst(struct irdma_sc_cqp *cqp,
2075− struct irdma_stats_inst_info *info, bool alloc,
2076− u64 scratch)
2075+static int irdma_sc_manage_stats_inst(struct irdma_sc_cqp *cqp,
2076+ struct irdma_stats_inst_info *info,
2077+ bool alloc, u64 scratch)
20772078 {
20782079 __le64 *wqe;
20792080 u64 temp;
20802081
20812082 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
20822083 if (!wqe)
2083− return IRDMA_ERR_RING_FULL;
2084+ return -ENOMEM;
20842085
20852086 set_64bit_val(wqe, 40,
20862087 FIELD_PREP(IRDMA_CQPSQ_STATS_HMC_FCN_INDEX, info->hmc_fn_id));
@@ -2108,9 +2109,8 @@ irdma_sc_manage_stats_inst(struct irdma_sc_cqp *cqp, · 21 unmodified lines
21082109 * @info: User priority map info
21092110 * @scratch: u64 saved to be used during cqp completion
21102111 */
2111−static enum irdma_status_code irdma_sc_set_up_map(struct irdma_sc_cqp *cqp,
2112− struct irdma_up_info *info,
2113− u64 scratch)
2112+static int irdma_sc_set_up_map(struct irdma_sc_cqp *cqp,
2113+ struct irdma_up_info *info, u64 scratch)
21142114 {
21152115 __le64 *wqe;
21162116 u64 temp = 0;
@@ -2118,7 +2118,7 @@ static enum irdma_status_code irdma_sc_set_up_map(struct irdma_sc_cqp *cqp, · 1 unmodified line
21182118
21192119 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
21202120 if (!wqe)
2121− return IRDMA_ERR_RING_FULL;
2121+ return -ENOMEM;
21222122
21232123 for (i = 0; i < IRDMA_MAX_USER_PRIORITY; i++)
21242124 temp |= (u64)info->map[i] << (i * 8);
@@ -2151,17 +2151,16 @@ static enum irdma_status_code irdma_sc_set_up_map(struct irdma_sc_cqp *cqp, · 26 unmodified lines
21512151 * @node_op: 0 for add 1 for modify, 2 for delete
21522152 * @scratch: u64 saved to be used during cqp completion
21532153 */
2154−static enum irdma_status_code
2155−irdma_sc_manage_ws_node(struct irdma_sc_cqp *cqp,
2156− struct irdma_ws_node_info *info,
2157− enum irdma_ws_node_op node_op, u64 scratch)
2154+static int irdma_sc_manage_ws_node(struct irdma_sc_cqp *cqp,
2155+ struct irdma_ws_node_info *info,
2156+ enum irdma_ws_node_op node_op, u64 scratch)
21582157 {
21592158 __le64 *wqe;
21602159 u64 temp = 0;
21612160
21622161 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
21632162 if (!wqe)
2164− return IRDMA_ERR_RING_FULL;
2163+ return -ENOMEM;
21652164
21662165 set_64bit_val(wqe, 32,
21672166 FIELD_PREP(IRDMA_CQPSQ_WS_VSI, info->vsi) |
@@ -2194,9 +2193,9 @@ irdma_sc_manage_ws_node(struct irdma_sc_cqp *cqp, · 26 unmodified lines
21942193 * @scratch: u64 saved to be used during cqp completion
21952194 * @post_sq: flag for cqp db to ring
21962195 */
2197−enum irdma_status_code irdma_sc_qp_flush_wqes(struct irdma_sc_qp *qp,
2198− struct irdma_qp_flush_info *info,
2199− u64 scratch, bool post_sq)
2196+int irdma_sc_qp_flush_wqes(struct irdma_sc_qp *qp,
2197+ struct irdma_qp_flush_info *info, u64 scratch,
2198+ bool post_sq)
22002199 {
22012200 u64 temp = 0;
22022201 __le64 *wqe;
@@ -2215,13 +2214,13 @@ enum irdma_status_code irdma_sc_qp_flush_wqes(struct irdma_sc_qp *qp, · 12 unmodified lines
22152214 ibdev_dbg(to_ibdev(qp->dev),
22162215 "CQP: Additional flush request ignored for qp %x\n",
22172216 qp->qp_uk.qp_id);
2218− return IRDMA_ERR_FLUSHED_Q;
2217+ return -EALREADY;
22192218 }
22202219
22212220 cqp = qp->pd->dev->cqp;
22222221 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
22232222 if (!wqe)
2224− return IRDMA_ERR_RING_FULL;
2223+ return -ENOMEM;
22252224
22262225 if (info->userflushcode) {
22272226 if (flush_rq)
@@ -2268,9 +2267,9 @@ enum irdma_status_code irdma_sc_qp_flush_wqes(struct irdma_sc_qp *qp, · 40 unmodified lines
22682267 * @scratch: u64 saved to be used during cqp completion
22692268 * @post_sq: flag for cqp db to ring
22702269 */
2271−static enum irdma_status_code irdma_sc_gen_ae(struct irdma_sc_qp *qp,
2272− struct irdma_gen_ae_info *info,
2273− u64 scratch, bool post_sq)
2270+static int irdma_sc_gen_ae(struct irdma_sc_qp *qp,
2271+ struct irdma_gen_ae_info *info, u64 scratch,
2272+ bool post_sq)
22742273 {
22752274 u64 temp;
22762275 __le64 *wqe;
@@ -2280,7 +2279,7 @@ static enum irdma_status_code irdma_sc_gen_ae(struct irdma_sc_qp *qp, · 3 unmodified lines
22802279 cqp = qp->pd->dev->cqp;
22812280 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
22822281 if (!wqe)
2283− return IRDMA_ERR_RING_FULL;
2282+ return -ENOMEM;
22842283
22852284 temp = info->ae_code | FIELD_PREP(IRDMA_CQPSQ_FWQE_AESOURCE,
22862285 info->ae_src);
@@ -2308,10 +2307,9 @@ static enum irdma_status_code irdma_sc_gen_ae(struct irdma_sc_qp *qp, · 21 unmodified lines
23082307 * @scratch: u64 saved to be used during cqp completion
23092308 * @post_sq: flag for cqp db to ring
23102309 */
2311−static enum irdma_status_code
2312−irdma_sc_qp_upload_context(struct irdma_sc_dev *dev,
2313− struct irdma_upload_context_info *info, u64 scratch,
2314− bool post_sq)
2310+static int irdma_sc_qp_upload_context(struct irdma_sc_dev *dev,
2311+ struct irdma_upload_context_info *info,
2312+ u64 scratch, bool post_sq)
23152313 {
23162314 __le64 *wqe;
23172315 struct irdma_sc_cqp *cqp;
@@ -2320,7 +2318,7 @@ irdma_sc_qp_upload_context(struct irdma_sc_dev *dev, · 2 unmodified lines
23202318 cqp = dev->cqp;
23212319 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
23222320 if (!wqe)
2323− return IRDMA_ERR_RING_FULL;
2321+ return -ENOMEM;
23242322
23252323 set_64bit_val(wqe, 16, info->buf_pa);
23262324
@@ -2349,21 +2347,20 @@ irdma_sc_qp_upload_context(struct irdma_sc_dev *dev, · 22 unmodified lines
23492347 * @scratch: u64 saved to be used during cqp completion
23502348 * @post_sq: flag for cqp db to ring
23512349 */
2352−static enum irdma_status_code
2353−irdma_sc_manage_push_page(struct irdma_sc_cqp *cqp,
2354− struct irdma_cqp_manage_push_page_info *info,
2355− u64 scratch, bool post_sq)
2350+static int irdma_sc_manage_push_page(struct irdma_sc_cqp *cqp,
2351+ struct irdma_cqp_manage_push_page_info *info,
2352+ u64 scratch, bool post_sq)
23562353 {
23572354 __le64 *wqe;
23582355 u64 hdr;
23592356
23602357 if (info->free_page &&
23612358 info->push_idx >= cqp->dev->hw_attrs.max_hw_device_pages)
2362− return IRDMA_ERR_INVALID_PUSH_PAGE_INDEX;
2359+ return -EINVAL;
23632360
23642361 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
23652362 if (!wqe)
2366− return IRDMA_ERR_RING_FULL;
2363+ return -ENOMEM;
23672364
23682365 set_64bit_val(wqe, 16, info->qs_handle);
23692366 hdr = FIELD_PREP(IRDMA_CQPSQ_MPP_PPIDX, info->push_idx) |
@@ -2389,16 +2386,15 @@ irdma_sc_manage_push_page(struct irdma_sc_cqp *cqp, · 19 unmodified lines
23892386 * @qp: sc qp struct
23902387 * @scratch: u64 saved to be used during cqp completion
23912388 */
2392−static enum irdma_status_code irdma_sc_suspend_qp(struct irdma_sc_cqp *cqp,
2393− struct irdma_sc_qp *qp,
2394− u64 scratch)
2389+static int irdma_sc_suspend_qp(struct irdma_sc_cqp *cqp, struct irdma_sc_qp *qp,
2390+ u64 scratch)
23952391 {
23962392 u64 hdr;
23972393 __le64 *wqe;
23982394
23992395 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
24002396 if (!wqe)
2401− return IRDMA_ERR_RING_FULL;
2397+ return -ENOMEM;
24022398
24032399 hdr = FIELD_PREP(IRDMA_CQPSQ_SUSPENDQP_QPID, qp->qp_uk.qp_id) |
24042400 FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_SUSPEND_QP) |
@@ -2420,16 +2416,15 @@ static enum irdma_status_code irdma_sc_suspend_qp(struct irdma_sc_cqp *cqp, · 15 unmodified lines
24202416 * @qp: sc qp struct
24212417 * @scratch: u64 saved to be used during cqp completion
24222418 */
2423−static enum irdma_status_code irdma_sc_resume_qp(struct irdma_sc_cqp *cqp,
2424− struct irdma_sc_qp *qp,
2425− u64 scratch)
2419+static int irdma_sc_resume_qp(struct irdma_sc_cqp *cqp, struct irdma_sc_qp *qp,
2420+ u64 scratch)
24262421 {
24272422 u64 hdr;
24282423 __le64 *wqe;
24292424
24302425 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
24312426 if (!wqe)
2432− return IRDMA_ERR_RING_FULL;
2427+ return -ENOMEM;
24332428
24342429 set_64bit_val(wqe, 16,
24352430 FIELD_PREP(IRDMA_CQPSQ_RESUMEQP_QSHANDLE, qp->qs_handle));
@@ -2462,14 +2457,13 @@ static inline void irdma_sc_cq_ack(struct irdma_sc_cq *cq) · 26 unmodified lines
24622457 * @cq: cq struct
24632458 * @info: cq initialization info
24642459 */
2465−enum irdma_status_code irdma_sc_cq_init(struct irdma_sc_cq *cq,
2466− struct irdma_cq_init_info *info)
2460+int irdma_sc_cq_init(struct irdma_sc_cq *cq, struct irdma_cq_init_info *info)
24672461 {
24682462 u32 pble_obj_cnt;
24692463
24702464 pble_obj_cnt = info->dev->hmc_info->hmc_obj[IRDMA_HMC_IW_PBLE].cnt;
24712465 if (info->virtual_map && info->first_pm_pbl_idx >= pble_obj_cnt)
2472− return IRDMA_ERR_INVALID_PBLE_INDEX;
2466+ return -EINVAL;
24732467
24742468 cq->cq_pa = info->cq_base_pa;
24752469 cq->dev = info->dev;
@@ -2500,23 +2494,21 @@ enum irdma_status_code irdma_sc_cq_init(struct irdma_sc_cq *cq, · 24 unmodified lines
25002494 * @check_overflow: flag for overflow check
25012495 * @post_sq: flag for cqp db to ring
25022496 */
2503−static enum irdma_status_code irdma_sc_cq_create(struct irdma_sc_cq *cq,
2504− u64 scratch,
2505− bool check_overflow,
2506− bool post_sq)
2497+static int irdma_sc_cq_create(struct irdma_sc_cq *cq, u64 scratch,
2498+ bool check_overflow, bool post_sq)
25072499 {
25082500 __le64 *wqe;
25092501 struct irdma_sc_cqp *cqp;
25102502 u64 hdr;
25112503 struct irdma_sc_ceq *ceq;
2512− enum irdma_status_code ret_code = 0;
2504+ int ret_code = 0;
25132505
25142506 cqp = cq->dev->cqp;
2515− if (cq->cq_uk.cq_id > (cqp->dev->hmc_info->hmc_obj[IRDMA_HMC_IW_CQ].max_cnt - 1))
2516− return IRDMA_ERR_INVALID_CQ_ID;
2507+ if (cq->cq_uk.cq_id >= cqp->dev->hmc_info->hmc_obj[IRDMA_HMC_IW_CQ].max_cnt)
2508+ return -EINVAL;
25172509
2518− if (cq->ceq_id > (cq->dev->hmc_fpm_misc.max_ceqs - 1))
2519− return IRDMA_ERR_INVALID_CEQ_ID;
2510+ if (cq->ceq_id >= cq->dev->hmc_fpm_misc.max_ceqs)
2511+ return -EINVAL;
25202512
25212513 ceq = cq->dev->ceq[cq->ceq_id];
25222514 if (ceq && ceq->reg_cq)
@@ -2529,7 +2521,7 @@ static enum irdma_status_code irdma_sc_cq_create(struct irdma_sc_cq *cq, · 6 unmodified lines
25292521 if (!wqe) {
25302522 if (ceq && ceq->reg_cq)
25312523 irdma_sc_remove_cq_ctx(ceq, cq);
2532− return IRDMA_ERR_RING_FULL;
2524+ return -ENOMEM;
25332525 }
25342526
25352527 set_64bit_val(wqe, 0, cq->cq_uk.cq_size);
@@ -2575,8 +2567,7 @@ static enum irdma_status_code irdma_sc_cq_create(struct irdma_sc_cq *cq, · 39 unmodified lines
25752567 * @scratch: u64 saved to be used during cqp completion
25762568 * @post_sq: flag for cqp db to ring
25772569 */
2578−enum irdma_status_code irdma_sc_cq_destroy(struct irdma_sc_cq *cq, u64 scratch,
2579− bool post_sq)
2570+int irdma_sc_cq_destroy(struct irdma_sc_cq *cq, u64 scratch, bool post_sq)
25802571 {
25812572 struct irdma_sc_cqp *cqp;
25822573 __le64 *wqe;
@@ -2586,7 +2577,7 @@ enum irdma_status_code irdma_sc_cq_destroy(struct irdma_sc_cq *cq, u64 scratch, · 3 unmodified lines
25862577 cqp = cq->dev->cqp;
25872578 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
25882579 if (!wqe)
2589− return IRDMA_ERR_RING_FULL;
2580+ return -ENOMEM;
25902581
25912582 ceq = cq->dev->ceq[cq->ceq_id];
25922583 if (ceq && ceq->reg_cq)
@@ -2642,9 +2633,9 @@ void irdma_sc_cq_resize(struct irdma_sc_cq *cq, struct irdma_modify_cq_info *inf · 49 unmodified lines
26422633 * @scratch: u64 saved to be used during cqp completion
26432634 * @post_sq: flag to post to sq
26442635 */
2645−static enum irdma_status_code
2646−irdma_sc_cq_modify(struct irdma_sc_cq *cq, struct irdma_modify_cq_info *info,
2647− u64 scratch, bool post_sq)
2636+static int irdma_sc_cq_modify(struct irdma_sc_cq *cq,
2637+ struct irdma_modify_cq_info *info, u64 scratch,
2638+ bool post_sq)
26482639 {
26492640 struct irdma_sc_cqp *cqp;
26502641 __le64 *wqe;
@@ -2654,12 +2645,12 @@ irdma_sc_cq_modify(struct irdma_sc_cq *cq, struct irdma_modify_cq_info *info, · 3 unmodified lines
26542645 pble_obj_cnt = cq->dev->hmc_info->hmc_obj[IRDMA_HMC_IW_PBLE].cnt;
26552646 if (info->cq_resize && info->virtual_map &&
26562647 info->first_pm_pbl_idx >= pble_obj_cnt)
2657− return IRDMA_ERR_INVALID_PBLE_INDEX;
2648+ return -EINVAL;
26582649
26592650 cqp = cq->dev->cqp;
26602651 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
26612652 if (!wqe)
2662− return IRDMA_ERR_RING_FULL;
2653+ return -ENOMEM;
26632654
26642655 set_64bit_val(wqe, 0, info->cq_size);
26652656 set_64bit_val(wqe, 8, (uintptr_t)cq >> 1);
@@ -2733,8 +2724,8 @@ static inline void irdma_get_cqp_reg_info(struct irdma_sc_cqp *cqp, u32 *val, · 67 unmodified lines
27332724 * @tail: wqtail register value
27342725 * @count: how many times to try for completion
27352726 */
2736−static enum irdma_status_code irdma_cqp_poll_registers(struct irdma_sc_cqp *cqp,
2737− u32 tail, u32 count)
2727+static int irdma_cqp_poll_registers(struct irdma_sc_cqp *cqp, u32 tail,
2728+ u32 count)
27382729 {
27392730 u32 i = 0;
27402731 u32 newtail, error, val;
@@ -2746,7 +2737,7 @@ static enum irdma_status_code irdma_cqp_poll_registers(struct irdma_sc_cqp *cqp, · 5 unmodified lines
27462737 ibdev_dbg(to_ibdev(cqp->dev),
27472738 "CQP: CQPERRCODES error_code[x%08X]\n",
27482739 error);
2749− return IRDMA_ERR_CQP_COMPL_ERROR;
2740+ return -EIO;
27502741 }
27512742 if (newtail != tail) {
27522743 /* SUCCESS */
@@ -2757,7 +2748,7 @@ static enum irdma_status_code irdma_cqp_poll_registers(struct irdma_sc_cqp *cqp, · 4 unmodified lines
27572748 udelay(cqp->dev->hw_attrs.max_sleep_count);
27582749 }
27592750
2760− return IRDMA_ERR_TIMEOUT;
2751+ return -ETIMEDOUT;
27612752 }
27622753
27632754 /**
@@ -2912,10 +2903,9 @@ static u64 irdma_sc_decode_fpm_query(__le64 *buf, u32 buf_idx, · 148 unmodified lines
29122903 * parses fpm query buffer and copy max_cnt and
29132904 * size value of hmc objects in hmc_info
29142905 */
2915−static enum irdma_status_code
2916−irdma_sc_parse_fpm_query_buf(struct irdma_sc_dev *dev, __le64 *buf,
2917− struct irdma_hmc_info *hmc_info,
2918− struct irdma_hmc_fpm_misc *hmc_fpm_misc)
2906+static int irdma_sc_parse_fpm_query_buf(struct irdma_sc_dev *dev, __le64 *buf,
2907+ struct irdma_hmc_info *hmc_info,
2908+ struct irdma_hmc_fpm_misc *hmc_fpm_misc)
29192909 {
29202910 struct irdma_hmc_obj_info *obj_info;
29212911 u64 temp;
@@ -2954,7 +2944,7 @@ irdma_sc_parse_fpm_query_buf(struct irdma_sc_dev *dev, __le64 *buf, · 32 unmodified lines
29542944 obj_info[IRDMA_HMC_IW_XFFL].size = 4;
29552945 hmc_fpm_misc->xf_block_size = FIELD_GET(IRDMA_QUERY_FPM_XFBLOCKSIZE, temp);
29562946 if (!hmc_fpm_misc->xf_block_size)
2957− return IRDMA_ERR_INVALID_SIZE;
2947+ return -EINVAL;
29582948
29592949 irdma_sc_decode_fpm_query(buf, 72, obj_info, IRDMA_HMC_IW_Q1);
29602950 get_64bit_val(buf, 80, &temp);
@@ -2963,7 +2953,7 @@ irdma_sc_parse_fpm_query_buf(struct irdma_sc_dev *dev, __le64 *buf, · 2 unmodified lines
29632953
29642954 hmc_fpm_misc->q1_block_size = FIELD_GET(IRDMA_QUERY_FPM_Q1BLOCKSIZE, temp);
29652955 if (!hmc_fpm_misc->q1_block_size)
2966− return IRDMA_ERR_INVALID_SIZE;
2956+ return -EINVAL;
29672957
29682958 irdma_sc_decode_fpm_query(buf, 88, obj_info, IRDMA_HMC_IW_TIMER);
29692959
@@ -2987,7 +2977,7 @@ irdma_sc_parse_fpm_query_buf(struct irdma_sc_dev *dev, __le64 *buf, · 17 unmodified lines
29872977 hmc_fpm_misc->rrf_block_size = FIELD_GET(IRDMA_QUERY_FPM_RRFBLOCKSIZE, temp);
29882978 if (!hmc_fpm_misc->rrf_block_size &&
29892979 obj_info[IRDMA_HMC_IW_RRFFL].max_cnt)
2990− return IRDMA_ERR_INVALID_SIZE;
2980+ return -EINVAL;
29912981
29922982 irdma_sc_decode_fpm_query(buf, 144, obj_info, IRDMA_HMC_IW_HDR);
29932983 irdma_sc_decode_fpm_query(buf, 152, obj_info, IRDMA_HMC_IW_MD);
@@ -2999,7 +2989,7 @@ irdma_sc_parse_fpm_query_buf(struct irdma_sc_dev *dev, __le64 *buf, · 5 unmodified lines
29992989 hmc_fpm_misc->ooiscf_block_size = FIELD_GET(IRDMA_QUERY_FPM_OOISCFBLOCKSIZE, temp);
30002990 if (!hmc_fpm_misc->ooiscf_block_size &&
30012991 obj_info[IRDMA_HMC_IW_OOISCFFL].max_cnt)
3002− return IRDMA_ERR_INVALID_SIZE;
2992+ return -EINVAL;
30032993
30042994 return 0;
30052995 }
@@ -3027,8 +3017,7 @@ static u32 irdma_sc_find_reg_cq(struct irdma_sc_ceq *ceq, · 21 unmodified lines
30273017 * @ceq: ceq sc structure
30283018 * @cq: cq sc structure
30293019 */
3030−enum irdma_status_code irdma_sc_add_cq_ctx(struct irdma_sc_ceq *ceq,
3031− struct irdma_sc_cq *cq)
3020+int irdma_sc_add_cq_ctx(struct irdma_sc_ceq *ceq, struct irdma_sc_cq *cq)
30323021 {
30333022 unsigned long flags;
30343023
@@ -3036,7 +3025,7 @@ enum irdma_status_code irdma_sc_add_cq_ctx(struct irdma_sc_ceq *ceq, · 1 unmodified line
30363025
30373026 if (ceq->reg_cq_size == ceq->elem_cnt) {
30383027 spin_unlock_irqrestore(&ceq->req_cq_lock, flags);
3039− return IRDMA_ERR_REG_CQ_FULL;
3028+ return -ENOMEM;
30403029 }
30413030
30423031 ceq->reg_cq[ceq->reg_cq_size++] = cq;
@@ -3077,15 +3066,15 @@ exit: · 34 unmodified lines
30773066 *
30783067 * Initializes the object and context buffers for a control Queue Pair.
30793068 */
3080−enum irdma_status_code irdma_sc_cqp_init(struct irdma_sc_cqp *cqp,
3081− struct irdma_cqp_init_info *info)
3069+int irdma_sc_cqp_init(struct irdma_sc_cqp *cqp,
3070+ struct irdma_cqp_init_info *info)
30823071 {
30833072 u8 hw_sq_size;
30843073
30853074 if (info->sq_size > IRDMA_CQP_SW_SQSIZE_2048 ||
30863075 info->sq_size < IRDMA_CQP_SW_SQSIZE_4 ||
30873076 ((info->sq_size & (info->sq_size - 1))))
3088− return IRDMA_ERR_INVALID_SIZE;
3077+ return -EINVAL;
30893078
30903079 hw_sq_size = irdma_get_encoded_wqe_size(info->sq_size,
30913080 IRDMA_QUEUE_TYPE_CQP);
@@ -3135,13 +3124,12 @@ enum irdma_status_code irdma_sc_cqp_init(struct irdma_sc_cqp *cqp, · 43 unmodified lines
31353124 * @maj_err: If error, major err number
31363125 * @min_err: If error, minor err number
31373126 */
3138−enum irdma_status_code irdma_sc_cqp_create(struct irdma_sc_cqp *cqp, u16 *maj_err,
3139− u16 *min_err)
3127+int irdma_sc_cqp_create(struct irdma_sc_cqp *cqp, u16 *maj_err, u16 *min_err)
31403128 {
31413129 u64 temp;
31423130 u8 hw_rev;
31433131 u32 cnt = 0, p1, p2, val = 0, err_code;
3144− enum irdma_status_code ret_code;
3132+ int ret_code;
31453133
31463134 hw_rev = cqp->dev->hw_attrs.uk_attrs.hw_rev;
31473135 cqp->sdbuf.size = ALIGN(IRDMA_UPDATE_SD_BUFF_SIZE * cqp->sq_size,
@@ -3150,7 +3138,7 @@ enum irdma_status_code irdma_sc_cqp_create(struct irdma_sc_cqp *cqp, u16 *maj_er · 2 unmodified lines
31503138 cqp->sdbuf.size, &cqp->sdbuf.pa,
31513139 GFP_KERNEL);
31523140 if (!cqp->sdbuf.va)
3153− return IRDMA_ERR_NO_MEMORY;
3141+ return -ENOMEM;
31543142
31553143 spin_lock_init(&cqp->dev->cqp_lock);
31563144
@@ -3205,7 +3193,7 @@ enum irdma_status_code irdma_sc_cqp_create(struct irdma_sc_cqp *cqp, u16 *maj_er · 48 unmodified lines
32053193
32063194 do {
32073195 if (cnt++ > cqp->dev->hw_attrs.max_done_count) {
3208− ret_code = IRDMA_ERR_TIMEOUT;
3196+ ret_code = -ETIMEDOUT;
32093197 goto err;
32103198 }
32113199 udelay(cqp->dev->hw_attrs.max_sleep_count);
@@ -3213,7 +3201,7 @@ enum irdma_status_code irdma_sc_cqp_create(struct irdma_sc_cqp *cqp, u16 *maj_er · 1 unmodified line
32133201 } while (!val);
32143202
32153203 if (FLD_RS_32(cqp->dev, val, IRDMA_CCQPSTATUS_CCQP_ERR)) {
3216− ret_code = IRDMA_ERR_DEVICE_NOT_SUPPORTED;
3204+ ret_code = -EOPNOTSUPP;
32173205 goto err;
32183206 }
32193207
@@ -3254,7 +3242,7 @@ __le64 *irdma_sc_cqp_get_next_send_wqe_idx(struct irdma_sc_cqp *cqp, u64 scratch · 34 unmodified lines
32543242 u32 *wqe_idx)
32553243 {
32563244 __le64 *wqe = NULL;
3257− enum irdma_status_code ret_code;
3245+ int ret_code;
32583246
32593247 if (IRDMA_RING_FULL_ERR(cqp->sq_ring)) {
32603248 ibdev_dbg(to_ibdev(cqp->dev),
@@ -3281,16 +3269,16 @@ __le64 *irdma_sc_cqp_get_next_send_wqe_idx(struct irdma_sc_cqp *cqp, u64 scratch · 20 unmodified lines
32813269 * irdma_sc_cqp_destroy - destroy cqp during close
32823270 * @cqp: struct for cqp hw
32833271 */
3284−enum irdma_status_code irdma_sc_cqp_destroy(struct irdma_sc_cqp *cqp)
3272+int irdma_sc_cqp_destroy(struct irdma_sc_cqp *cqp)
32853273 {
32863274 u32 cnt = 0, val;
3287− enum irdma_status_code ret_code = 0;
3275+ int ret_code = 0;
32883276
32893277 writel(0, cqp->dev->hw_regs[IRDMA_CCQPHIGH]);
32903278 writel(0, cqp->dev->hw_regs[IRDMA_CCQPLOW]);
32913279 do {
32923280 if (cnt++ > cqp->dev->hw_attrs.max_done_count) {
3293− ret_code = IRDMA_ERR_TIMEOUT;
3281+ ret_code = -ETIMEDOUT;
32943282 break;
32953283 }
32963284 udelay(cqp->dev->hw_attrs.max_sleep_count);
@@ -3335,8 +3323,8 @@ void irdma_sc_ccq_arm(struct irdma_sc_cq *ccq) · 38 unmodified lines
33353323 * @ccq: ccq sc struct
33363324 * @info: completion q entry to return
33373325 */
3338−enum irdma_status_code irdma_sc_ccq_get_cqe_info(struct irdma_sc_cq *ccq,
3339− struct irdma_ccq_cqe_info *info)
3326+int irdma_sc_ccq_get_cqe_info(struct irdma_sc_cq *ccq,
3327+ struct irdma_ccq_cqe_info *info)
33403328 {
33413329 u64 qp_ctx, temp, temp1;
33423330 __le64 *cqe;
@@ -3344,7 +3332,7 @@ enum irdma_status_code irdma_sc_ccq_get_cqe_info(struct irdma_sc_cq *ccq, · 1 unmodified line
33443332 u32 wqe_idx;
33453333 u32 error;
33463334 u8 polarity;
3347− enum irdma_status_code ret_code = 0;
3335+ int ret_code = 0;
33483336
33493337 if (ccq->cq_uk.avoid_mem_cflct)
33503338 cqe = IRDMA_GET_CURRENT_EXTENDED_CQ_ELEM(&ccq->cq_uk);
@@ -3354,7 +3342,7 @@ enum irdma_status_code irdma_sc_ccq_get_cqe_info(struct irdma_sc_cq *ccq, · 3 unmodified lines
33543342 get_64bit_val(cqe, 24, &temp);
33553343 polarity = (u8)FIELD_GET(IRDMA_CQ_VALID, temp);
33563344 if (polarity != ccq->cq_uk.polarity)
3357− return IRDMA_ERR_Q_EMPTY;
3345+ return -ENOENT;
33583346
33593347 get_64bit_val(cqe, 8, &qp_ctx);
33603348 cqp = (struct irdma_sc_cqp *)(unsigned long)qp_ctx;
@@ -3401,25 +3389,25 @@ enum irdma_status_code irdma_sc_ccq_get_cqe_info(struct irdma_sc_cq *ccq, · 40 unmodified lines
34013389 * @op_code: cqp opcode for completion
34023390 * @compl_info: completion q entry to return
34033391 */
3404−enum irdma_status_code irdma_sc_poll_for_cqp_op_done(struct irdma_sc_cqp *cqp, u8 op_code,
3405− struct irdma_ccq_cqe_info *compl_info)
3392+int irdma_sc_poll_for_cqp_op_done(struct irdma_sc_cqp *cqp, u8 op_code,
3393+ struct irdma_ccq_cqe_info *compl_info)
34063394 {
34073395 struct irdma_ccq_cqe_info info = {};
34083396 struct irdma_sc_cq *ccq;
3409− enum irdma_status_code ret_code = 0;
3397+ int ret_code = 0;
34103398 u32 cnt = 0;
34113399
34123400 ccq = cqp->dev->ccq;
34133401 while (1) {
34143402 if (cnt++ > 100 * cqp->dev->hw_attrs.max_done_count)
3415− return IRDMA_ERR_TIMEOUT;
3403+ return -ETIMEDOUT;
34163404
34173405 if (irdma_sc_ccq_get_cqe_info(ccq, &info)) {
34183406 udelay(cqp->dev->hw_attrs.max_sleep_count);
34193407 continue;
34203408 }
34213409 if (info.error && info.op_code != IRDMA_CQP_OP_QUERY_STAG) {
3422− ret_code = IRDMA_ERR_CQP_COMPL_ERROR;
3410+ ret_code = -EIO;
34233411 break;
34243412 }
34253413 /* make sure op code matches*/
@@ -3443,17 +3431,16 @@ enum irdma_status_code irdma_sc_poll_for_cqp_op_done(struct irdma_sc_cqp *cqp, u · 17 unmodified lines
34433431 * @info: info for the manage function table operation
34443432 * @post_sq: flag for cqp db to ring
34453433 */
3446−static enum irdma_status_code
3447−irdma_sc_manage_hmc_pm_func_table(struct irdma_sc_cqp *cqp,
3448− struct irdma_hmc_fcn_info *info,
3449− u64 scratch, bool post_sq)
3434+static int irdma_sc_manage_hmc_pm_func_table(struct irdma_sc_cqp *cqp,
3435+ struct irdma_hmc_fcn_info *info,
3436+ u64 scratch, bool post_sq)
34503437 {
34513438 __le64 *wqe;
34523439 u64 hdr;
34533440
34543441 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
34553442 if (!wqe)
3456− return IRDMA_ERR_RING_FULL;
3443+ return -ENOMEM;
34573444
34583445 set_64bit_val(wqe, 0, 0);
34593446 set_64bit_val(wqe, 8, 0);
@@ -3486,8 +3473,7 @@ irdma_sc_manage_hmc_pm_func_table(struct irdma_sc_cqp *cqp, · 26 unmodified lines
34863473 * for fpm commit
34873474 * @cqp: struct for cqp hw
34883475 */
3489−static enum irdma_status_code
3490−irdma_sc_commit_fpm_val_done(struct irdma_sc_cqp *cqp)
3476+static int irdma_sc_commit_fpm_val_done(struct irdma_sc_cqp *cqp)
34913477 {
34923478 return irdma_sc_poll_for_cqp_op_done(cqp, IRDMA_CQP_OP_COMMIT_FPM_VAL,
34933479 NULL);
@@ -3502,19 +3488,19 @@ irdma_sc_commit_fpm_val_done(struct irdma_sc_cqp *cqp) · 8 unmodified lines
35023488 * @post_sq: flag for cqp db to ring
35033489 * @wait_type: poll ccq or cqp registers for cqp completion
35043490 */
3505−static enum irdma_status_code
3506−irdma_sc_commit_fpm_val(struct irdma_sc_cqp *cqp, u64 scratch, u8 hmc_fn_id,
3507− struct irdma_dma_mem *commit_fpm_mem, bool post_sq,
3508− u8 wait_type)
3491+static int irdma_sc_commit_fpm_val(struct irdma_sc_cqp *cqp, u64 scratch,
3492+ u8 hmc_fn_id,
3493+ struct irdma_dma_mem *commit_fpm_mem,
3494+ bool post_sq, u8 wait_type)
35093495 {
35103496 __le64 *wqe;
35113497 u64 hdr;
35123498 u32 tail, val, error;
3513− enum irdma_status_code ret_code = 0;
3499+ int ret_code = 0;
35143500
35153501 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
35163502 if (!wqe)
3517− return IRDMA_ERR_RING_FULL;
3503+ return -ENOMEM;
35183504
35193505 set_64bit_val(wqe, 16, hmc_fn_id);
35203506 set_64bit_val(wqe, 32, commit_fpm_mem->pa);
@@ -3548,8 +3534,7 @@ irdma_sc_commit_fpm_val(struct irdma_sc_cqp *cqp, u64 scratch, u8 hmc_fn_id, · 27 unmodified lines
35483534 * query fpm
35493535 * @cqp: struct for cqp hw
35503536 */
3551−static enum irdma_status_code
3552−irdma_sc_query_fpm_val_done(struct irdma_sc_cqp *cqp)
3537+static int irdma_sc_query_fpm_val_done(struct irdma_sc_cqp *cqp)
35533538 {
35543539 return irdma_sc_poll_for_cqp_op_done(cqp, IRDMA_CQP_OP_QUERY_FPM_VAL,
35553540 NULL);
@@ -3564,19 +3549,19 @@ irdma_sc_query_fpm_val_done(struct irdma_sc_cqp *cqp) · 8 unmodified lines
35643549 * @post_sq: flag for cqp db to ring
35653550 * @wait_type: poll ccq or cqp registers for cqp completion
35663551 */
3567−static enum irdma_status_code
3568−irdma_sc_query_fpm_val(struct irdma_sc_cqp *cqp, u64 scratch, u8 hmc_fn_id,
3569− struct irdma_dma_mem *query_fpm_mem, bool post_sq,
3570− u8 wait_type)
3552+static int irdma_sc_query_fpm_val(struct irdma_sc_cqp *cqp, u64 scratch,
3553+ u8 hmc_fn_id,
3554+ struct irdma_dma_mem *query_fpm_mem,
3555+ bool post_sq, u8 wait_type)
35713556 {
35723557 __le64 *wqe;
35733558 u64 hdr;
35743559 u32 tail, val, error;
3575− enum irdma_status_code ret_code = 0;
3560+ int ret_code = 0;
35763561
35773562 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
35783563 if (!wqe)
3579− return IRDMA_ERR_RING_FULL;
3564+ return -ENOMEM;
35803565
35813566 set_64bit_val(wqe, 16, hmc_fn_id);
35823567 set_64bit_val(wqe, 32, query_fpm_mem->pa);
@@ -3608,21 +3593,21 @@ irdma_sc_query_fpm_val(struct irdma_sc_cqp *cqp, u64 scratch, u8 hmc_fn_id, · 25 unmodified lines
36083593 * @ceq: ceq sc structure
36093594 * @info: ceq initialization info
36103595 */
3611−enum irdma_status_code irdma_sc_ceq_init(struct irdma_sc_ceq *ceq,
3612− struct irdma_ceq_init_info *info)
3596+int irdma_sc_ceq_init(struct irdma_sc_ceq *ceq,
3597+ struct irdma_ceq_init_info *info)
36133598 {
36143599 u32 pble_obj_cnt;
36153600
36163601 if (info->elem_cnt < info->dev->hw_attrs.min_hw_ceq_size ||
36173602 info->elem_cnt > info->dev->hw_attrs.max_hw_ceq_size)
3618− return IRDMA_ERR_INVALID_SIZE;
3603+ return -EINVAL;
36193604
3620− if (info->ceq_id > (info->dev->hmc_fpm_misc.max_ceqs - 1))
3621− return IRDMA_ERR_INVALID_CEQ_ID;
3605+ if (info->ceq_id >= info->dev->hmc_fpm_misc.max_ceqs)
3606+ return -EINVAL;
36223607 pble_obj_cnt = info->dev->hmc_info->hmc_obj[IRDMA_HMC_IW_PBLE].cnt;
36233608
36243609 if (info->virtual_map && info->first_pm_pbl_idx >= pble_obj_cnt)
3625− return IRDMA_ERR_INVALID_PBLE_INDEX;
3610+ return -EINVAL;
36263611
36273612 ceq->size = sizeof(*ceq);
36283613 ceq->ceqe_base = (struct irdma_ceqe *)info->ceqe_base;
@@ -3655,8 +3640,8 @@ enum irdma_status_code irdma_sc_ceq_init(struct irdma_sc_ceq *ceq, · 26 unmodified lines
36553640 * @post_sq: flag for cqp db to ring
36563641 */
36573642
3658−static enum irdma_status_code irdma_sc_ceq_create(struct irdma_sc_ceq *ceq, u64 scratch,
3659− bool post_sq)
3643+static int irdma_sc_ceq_create(struct irdma_sc_ceq *ceq, u64 scratch,
3644+ bool post_sq)
36603645 {
36613646 struct irdma_sc_cqp *cqp;
36623647 __le64 *wqe;
@@ -3665,7 +3650,7 @@ static enum irdma_status_code irdma_sc_ceq_create(struct irdma_sc_ceq *ceq, u64 · 2 unmodified lines
36653650 cqp = ceq->dev->cqp;
36663651 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
36673652 if (!wqe)
3668− return IRDMA_ERR_RING_FULL;
3653+ return -ENOMEM;
36693654 set_64bit_val(wqe, 16, ceq->elem_cnt);
36703655 set_64bit_val(wqe, 32,
36713656 (ceq->virtual_map ? 0 : ceq->ceq_elem_pa));
@@ -3697,8 +3682,7 @@ static enum irdma_status_code irdma_sc_ceq_create(struct irdma_sc_ceq *ceq, u64 · 25 unmodified lines
36973682 * irdma_sc_cceq_create_done - poll for control ceq wqe to complete
36983683 * @ceq: ceq sc structure
36993684 */
3700−static enum irdma_status_code
3701−irdma_sc_cceq_create_done(struct irdma_sc_ceq *ceq)
3685+static int irdma_sc_cceq_create_done(struct irdma_sc_ceq *ceq)
37023686 {
37033687 struct irdma_sc_cqp *cqp;
37043688
@@ -3711,7 +3695,7 @@ irdma_sc_cceq_create_done(struct irdma_sc_ceq *ceq) · 6 unmodified lines
37113695 * irdma_sc_cceq_destroy_done - poll for destroy cceq to complete
37123696 * @ceq: ceq sc structure
37133697 */
3714−enum irdma_status_code irdma_sc_cceq_destroy_done(struct irdma_sc_ceq *ceq)
3698+int irdma_sc_cceq_destroy_done(struct irdma_sc_ceq *ceq)
37153699 {
37163700 struct irdma_sc_cqp *cqp;
37173701
@@ -3730,9 +3714,9 @@ enum irdma_status_code irdma_sc_cceq_destroy_done(struct irdma_sc_ceq *ceq) · 12 unmodified lines
37303714 * @ceq: ceq sc structure
37313715 * @scratch: u64 saved to be used during cqp completion
37323716 */
3733−enum irdma_status_code irdma_sc_cceq_create(struct irdma_sc_ceq *ceq, u64 scratch)
3717+int irdma_sc_cceq_create(struct irdma_sc_ceq *ceq, u64 scratch)
37343718 {
3735− enum irdma_status_code ret_code;
3719+ int ret_code;
37363720 struct irdma_sc_dev *dev = ceq->dev;
37373721
37383722 dev->ccq->vsi = ceq->vsi;
@@ -3755,8 +3739,7 @@ enum irdma_status_code irdma_sc_cceq_create(struct irdma_sc_ceq *ceq, u64 scratc · 16 unmodified lines
37553739 * @scratch: u64 saved to be used during cqp completion
37563740 * @post_sq: flag for cqp db to ring
37573741 */
3758−enum irdma_status_code irdma_sc_ceq_destroy(struct irdma_sc_ceq *ceq, u64 scratch,
3759− bool post_sq)
3742+int irdma_sc_ceq_destroy(struct irdma_sc_ceq *ceq, u64 scratch, bool post_sq)
37603743 {
37613744 struct irdma_sc_cqp *cqp;
37623745 __le64 *wqe;
@@ -3765,7 +3748,7 @@ enum irdma_status_code irdma_sc_ceq_destroy(struct irdma_sc_ceq *ceq, u64 scratc · 2 unmodified lines
37653748 cqp = ceq->dev->cqp;
37663749 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
37673750 if (!wqe)
3768− return IRDMA_ERR_RING_FULL;
3751+ return -ENOMEM;
37693752
37703753 set_64bit_val(wqe, 16, ceq->elem_cnt);
37713754 set_64bit_val(wqe, 48, ceq->first_pm_pbl_idx);
@@ -3884,19 +3867,19 @@ void irdma_sc_cleanup_ceqes(struct irdma_sc_cq *cq, struct irdma_sc_ceq *ceq) · 112 unmodified lines
38843867 * @aeq: aeq structure ptr
38853868 * @info: aeq initialization info
38863869 */
3887−enum irdma_status_code irdma_sc_aeq_init(struct irdma_sc_aeq *aeq,
3888− struct irdma_aeq_init_info *info)
3870+int irdma_sc_aeq_init(struct irdma_sc_aeq *aeq,
3871+ struct irdma_aeq_init_info *info)
38893872 {
38903873 u32 pble_obj_cnt;
38913874
38923875 if (info->elem_cnt < info->dev->hw_attrs.min_hw_aeq_size ||
38933876 info->elem_cnt > info->dev->hw_attrs.max_hw_aeq_size)
3894− return IRDMA_ERR_INVALID_SIZE;
3877+ return -EINVAL;
38953878
38963879 pble_obj_cnt = info->dev->hmc_info->hmc_obj[IRDMA_HMC_IW_PBLE].cnt;
38973880
38983881 if (info->virtual_map && info->first_pm_pbl_idx >= pble_obj_cnt)
3899− return IRDMA_ERR_INVALID_PBLE_INDEX;
3882+ return -EINVAL;
39003883
39013884 aeq->size = sizeof(*aeq);
39023885 aeq->polarity = 1;
@@ -3921,8 +3904,8 @@ enum irdma_status_code irdma_sc_aeq_init(struct irdma_sc_aeq *aeq, · 18 unmodified lines
39213904 * @scratch: u64 saved to be used during cqp completion
39223905 * @post_sq: flag for cqp db to ring
39233906 */
3924−static enum irdma_status_code irdma_sc_aeq_create(struct irdma_sc_aeq *aeq,
3925− u64 scratch, bool post_sq)
3907+static int irdma_sc_aeq_create(struct irdma_sc_aeq *aeq, u64 scratch,
3908+ bool post_sq)
39263909 {
39273910 __le64 *wqe;
39283911 struct irdma_sc_cqp *cqp;
@@ -3931,7 +3914,7 @@ static enum irdma_status_code irdma_sc_aeq_create(struct irdma_sc_aeq *aeq, · 2 unmodified lines
39313914 cqp = aeq->dev->cqp;
39323915 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
39333916 if (!wqe)
3934− return IRDMA_ERR_RING_FULL;
3917+ return -ENOMEM;
39353918 set_64bit_val(wqe, 16, aeq->elem_cnt);
39363919 set_64bit_val(wqe, 32,
39373920 (aeq->virtual_map ? 0 : aeq->aeq_elem_pa));
@@ -3960,8 +3943,8 @@ static enum irdma_status_code irdma_sc_aeq_create(struct irdma_sc_aeq *aeq, · 22 unmodified lines
39603943 * @scratch: u64 saved to be used during cqp completion
39613944 * @post_sq: flag for cqp db to ring
39623945 */
3963−static enum irdma_status_code irdma_sc_aeq_destroy(struct irdma_sc_aeq *aeq,
3964− u64 scratch, bool post_sq)
3946+static int irdma_sc_aeq_destroy(struct irdma_sc_aeq *aeq, u64 scratch,
3947+ bool post_sq)
39653948 {
39663949 __le64 *wqe;
39673950 struct irdma_sc_cqp *cqp;
@@ -3974,7 +3957,7 @@ static enum irdma_status_code irdma_sc_aeq_destroy(struct irdma_sc_aeq *aeq, · 6 unmodified lines
39743957 cqp = dev->cqp;
39753958 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
39763959 if (!wqe)
3977− return IRDMA_ERR_RING_FULL;
3960+ return -ENOMEM;
39783961 set_64bit_val(wqe, 16, aeq->elem_cnt);
39793962 set_64bit_val(wqe, 48, aeq->first_pm_pbl_idx);
39803963 hdr = FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_DESTROY_AEQ) |
@@ -3997,8 +3980,8 @@ static enum irdma_status_code irdma_sc_aeq_destroy(struct irdma_sc_aeq *aeq, · 16 unmodified lines
39973980 * @aeq: aeq structure ptr
39983981 * @info: aeqe info to be returned
39993982 */
4000−enum irdma_status_code irdma_sc_get_next_aeqe(struct irdma_sc_aeq *aeq,
4001− struct irdma_aeqe_info *info)
3983+int irdma_sc_get_next_aeqe(struct irdma_sc_aeq *aeq,
3984+ struct irdma_aeqe_info *info)
40023985 {
40033986 u64 temp, compl_ctx;
40043987 __le64 *aeqe;
@@ -4012,7 +3995,7 @@ enum irdma_status_code irdma_sc_get_next_aeqe(struct irdma_sc_aeq *aeq, · 7 unmodified lines
40123995 polarity = (u8)FIELD_GET(IRDMA_AEQE_VALID, temp);
40133996
40143997 if (aeq->polarity != polarity)
4015− return IRDMA_ERR_Q_EMPTY;
3998+ return -ENOENT;
40163999
40174000 print_hex_dump_debug("WQE: AEQ_ENTRY WQE", DUMP_PREFIX_OFFSET, 16, 8,
40184001 aeqe, 16, false);
@@ -4157,22 +4140,21 @@ void irdma_sc_repost_aeq_entries(struct irdma_sc_dev *dev, u32 count) · 138 unmodified lines
41574140 * @cq: sc's cq ctruct
41584141 * @info: info for control cq initialization
41594142 */
4160−enum irdma_status_code irdma_sc_ccq_init(struct irdma_sc_cq *cq,
4161− struct irdma_ccq_init_info *info)
4143+int irdma_sc_ccq_init(struct irdma_sc_cq *cq, struct irdma_ccq_init_info *info)
41624144 {
41634145 u32 pble_obj_cnt;
41644146
41654147 if (info->num_elem < info->dev->hw_attrs.uk_attrs.min_hw_cq_size ||
41664148 info->num_elem > info->dev->hw_attrs.uk_attrs.max_hw_cq_size)
4167− return IRDMA_ERR_INVALID_SIZE;
4149+ return -EINVAL;
41684150
4169− if (info->ceq_id > (info->dev->hmc_fpm_misc.max_ceqs - 1))
4170− return IRDMA_ERR_INVALID_CEQ_ID;
4151+ if (info->ceq_id >= info->dev->hmc_fpm_misc.max_ceqs)
4152+ return -EINVAL;
41714153
41724154 pble_obj_cnt = info->dev->hmc_info->hmc_obj[IRDMA_HMC_IW_PBLE].cnt;
41734155
41744156 if (info->virtual_map && info->first_pm_pbl_idx >= pble_obj_cnt)
4175− return IRDMA_ERR_INVALID_PBLE_INDEX;
4157+ return -EINVAL;
41764158
41774159 cq->cq_pa = info->cq_pa;
41784160 cq->cq_uk.cq_base = info->cq_base;
@@ -4209,7 +4191,7 @@ enum irdma_status_code irdma_sc_ccq_init(struct irdma_sc_cq *cq, · 30 unmodified lines
42094191 * irdma_sc_ccq_create_done - poll cqp for ccq create
42104192 * @ccq: ccq sc struct
42114193 */
4212−static inline enum irdma_status_code irdma_sc_ccq_create_done(struct irdma_sc_cq *ccq)
4194+static inline int irdma_sc_ccq_create_done(struct irdma_sc_cq *ccq)
42134195 {
42144196 struct irdma_sc_cqp *cqp;
42154197
@@ -4225,10 +4207,10 @@ static inline enum irdma_status_code irdma_sc_ccq_create_done(struct irdma_sc_cq · 9 unmodified lines
42254207 * @check_overflow: overlow flag for ccq
42264208 * @post_sq: flag for cqp db to ring
42274209 */
4228−enum irdma_status_code irdma_sc_ccq_create(struct irdma_sc_cq *ccq, u64 scratch,
4229− bool check_overflow, bool post_sq)
4210+int irdma_sc_ccq_create(struct irdma_sc_cq *ccq, u64 scratch,
4211+ bool check_overflow, bool post_sq)
42304212 {
4231− enum irdma_status_code ret_code;
4213+ int ret_code;
42324214
42334215 ret_code = irdma_sc_cq_create(ccq, scratch, check_overflow, post_sq);
42344216 if (ret_code)
@@ -4250,19 +4232,18 @@ enum irdma_status_code irdma_sc_ccq_create(struct irdma_sc_cq *ccq, u64 scratch, · 15 unmodified lines
42504232 * @scratch: u64 saved to be used during cqp completion
42514233 * @post_sq: flag for cqp db to ring
42524234 */
4253−enum irdma_status_code irdma_sc_ccq_destroy(struct irdma_sc_cq *ccq, u64 scratch,
4254− bool post_sq)
4235+int irdma_sc_ccq_destroy(struct irdma_sc_cq *ccq, u64 scratch, bool post_sq)
42554236 {
42564237 struct irdma_sc_cqp *cqp;
42574238 __le64 *wqe;
42584239 u64 hdr;
4259− enum irdma_status_code ret_code = 0;
4240+ int ret_code = 0;
42604241 u32 tail, val, error;
42614242
42624243 cqp = ccq->dev->cqp;
42634244 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
42644245 if (!wqe)
4265− return IRDMA_ERR_RING_FULL;
4246+ return -ENOMEM;
42664247
42674248 set_64bit_val(wqe, 0, ccq->cq_uk.cq_size);
42684249 set_64bit_val(wqe, 8, (uintptr_t)ccq >> 1);
@@ -4301,13 +4282,12 @@ enum irdma_status_code irdma_sc_ccq_destroy(struct irdma_sc_cq *ccq, u64 scratch · 32 unmodified lines
43014282 * @dev : ptr to irdma_dev struct
43024283 * @hmc_fn_id: hmc function id
43034284 */
4304−enum irdma_status_code irdma_sc_init_iw_hmc(struct irdma_sc_dev *dev,
4305− u8 hmc_fn_id)
4285+int irdma_sc_init_iw_hmc(struct irdma_sc_dev *dev, u8 hmc_fn_id)
43064286 {
43074287 struct irdma_hmc_info *hmc_info;
43084288 struct irdma_hmc_fpm_misc *hmc_fpm_misc;
43094289 struct irdma_dma_mem query_fpm_mem;
4310− enum irdma_status_code ret_code = 0;
4290+ int ret_code = 0;
43114291 u8 wait_type;
43124292
43134293 hmc_info = dev->hmc_info;
@@ -4338,14 +4318,13 @@ enum irdma_status_code irdma_sc_init_iw_hmc(struct irdma_sc_dev *dev, · 24 unmodified lines
43384318 * @dev : ptr to irdma_dev struct
43394319 * @hmc_fn_id: hmc function id
43404320 */
4341−static enum irdma_status_code irdma_sc_cfg_iw_fpm(struct irdma_sc_dev *dev,
4342− u8 hmc_fn_id)
4321+static int irdma_sc_cfg_iw_fpm(struct irdma_sc_dev *dev, u8 hmc_fn_id)
43434322 {
43444323 struct irdma_hmc_info *hmc_info;
43454324 struct irdma_hmc_obj_info *obj_info;
43464325 __le64 *buf;
43474326 struct irdma_dma_mem commit_fpm_mem;
4348− enum irdma_status_code ret_code = 0;
4327+ int ret_code = 0;
43494328 u8 wait_type;
43504329
43514330 hmc_info = dev->hmc_info;
@@ -4408,9 +4387,8 @@ static enum irdma_status_code irdma_sc_cfg_iw_fpm(struct irdma_sc_dev *dev, · 56 unmodified lines
44084387 * @info: sd info for wqe
44094388 * @scratch: u64 saved to be used during cqp completion
44104389 */
4411−static enum irdma_status_code
4412−cqp_sds_wqe_fill(struct irdma_sc_cqp *cqp, struct irdma_update_sds_info *info,
4413− u64 scratch)
4390+static int cqp_sds_wqe_fill(struct irdma_sc_cqp *cqp,
4391+ struct irdma_update_sds_info *info, u64 scratch)
44144392 {
44154393 u64 data;
44164394 u64 hdr;
@@ -4422,7 +4400,7 @@ cqp_sds_wqe_fill(struct irdma_sc_cqp *cqp, struct irdma_update_sds_info *info, · 5 unmodified lines
44224400
44234401 wqe = irdma_sc_cqp_get_next_send_wqe_idx(cqp, scratch, &wqe_idx);
44244402 if (!wqe)
4425− return IRDMA_ERR_RING_FULL;
4403+ return -ENOMEM;
44264404
44274405 wqe_entries = (info->cnt > 3) ? 3 : info->cnt;
44284406 mem_entries = info->cnt - wqe_entries;
@@ -4488,12 +4466,11 @@ cqp_sds_wqe_fill(struct irdma_sc_cqp *cqp, struct irdma_update_sds_info *info, · 59 unmodified lines
44884466 * @info: sd info for sd's
44894467 * @scratch: u64 saved to be used during cqp completion
44904468 */
4491−static enum irdma_status_code
4492−irdma_update_pe_sds(struct irdma_sc_dev *dev,
4493− struct irdma_update_sds_info *info, u64 scratch)
4469+static int irdma_update_pe_sds(struct irdma_sc_dev *dev,
4470+ struct irdma_update_sds_info *info, u64 scratch)
44944471 {
44954472 struct irdma_sc_cqp *cqp = dev->cqp;
4496− enum irdma_status_code ret_code;
4473+ int ret_code;
44974474
44984475 ret_code = cqp_sds_wqe_fill(cqp, info, scratch);
44994476 if (!ret_code)
@@ -4507,13 +4484,12 @@ irdma_update_pe_sds(struct irdma_sc_dev *dev, · 7 unmodified lines
45074484 * @dev: sc device struct
45084485 * @info: sd info for sd's
45094486 */
4510−enum irdma_status_code
4511−irdma_update_sds_noccq(struct irdma_sc_dev *dev,
4512− struct irdma_update_sds_info *info)
4487+int irdma_update_sds_noccq(struct irdma_sc_dev *dev,
4488+ struct irdma_update_sds_info *info)
45134489 {
45144490 u32 error, val, tail;
45154491 struct irdma_sc_cqp *cqp = dev->cqp;
4516− enum irdma_status_code ret_code;
4492+ int ret_code;
45174493
45184494 ret_code = cqp_sds_wqe_fill(cqp, info, 0);
45194495 if (ret_code)
@@ -4534,10 +4510,9 @@ irdma_update_sds_noccq(struct irdma_sc_dev *dev, · 14 unmodified lines
45344510 * @post_sq: flag for cqp db to ring
45354511 * @poll_registers: flag to poll register for cqp completion
45364512 */
4537−enum irdma_status_code
4538−irdma_sc_static_hmc_pages_allocated(struct irdma_sc_cqp *cqp, u64 scratch,
4539− u8 hmc_fn_id, bool post_sq,
4540− bool poll_registers)
4513+int irdma_sc_static_hmc_pages_allocated(struct irdma_sc_cqp *cqp, u64 scratch,
4514+ u8 hmc_fn_id, bool post_sq,
4515+ bool poll_registers)
45414516 {
45424517 u64 hdr;
45434518 __le64 *wqe;
@@ -4545,7 +4520,7 @@ irdma_sc_static_hmc_pages_allocated(struct irdma_sc_cqp *cqp, u64 scratch, · 1 unmodified line
45454520
45464521 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
45474522 if (!wqe)
4548− return IRDMA_ERR_RING_FULL;
4523+ return -ENOMEM;
45494524
45504525 set_64bit_val(wqe, 16,
45514526 FIELD_PREP(IRDMA_SHMC_PAGE_ALLOCATED_HMC_FN_ID, hmc_fn_id));
@@ -4620,8 +4595,7 @@ static u32 irdma_est_sd(struct irdma_sc_dev *dev, · 68 unmodified lines
46204595 * irdma_sc_query_rdma_features_done - poll cqp for query features done
46214596 * @cqp: struct for cqp hw
46224597 */
4623−static enum irdma_status_code
4624−irdma_sc_query_rdma_features_done(struct irdma_sc_cqp *cqp)
4598+static int irdma_sc_query_rdma_features_done(struct irdma_sc_cqp *cqp)
46254599 {
46264600 return irdma_sc_poll_for_cqp_op_done(cqp,
46274601 IRDMA_CQP_OP_QUERY_RDMA_FEATURES,
@@ -4634,16 +4608,15 @@ irdma_sc_query_rdma_features_done(struct irdma_sc_cqp *cqp) · 6 unmodified lines
46344608 * @buf: buffer to hold query info
46354609 * @scratch: u64 saved to be used during cqp completion
46364610 */
4637−static enum irdma_status_code
4638−irdma_sc_query_rdma_features(struct irdma_sc_cqp *cqp,
4639− struct irdma_dma_mem *buf, u64 scratch)
4611+static int irdma_sc_query_rdma_features(struct irdma_sc_cqp *cqp,
4612+ struct irdma_dma_mem *buf, u64 scratch)
46404613 {
46414614 __le64 *wqe;
46424615 u64 temp;
46434616
46444617 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
46454618 if (!wqe)
4646− return IRDMA_ERR_RING_FULL;
4619+ return -ENOMEM;
46474620
46484621 temp = buf->pa;
46494622 set_64bit_val(wqe, 32, temp);
@@ -4667,9 +4640,9 @@ irdma_sc_query_rdma_features(struct irdma_sc_cqp *cqp, · 17 unmodified lines
46674640 * irdma_get_rdma_features - get RDMA features
46684641 * @dev: sc device struct
46694642 */
4670−enum irdma_status_code irdma_get_rdma_features(struct irdma_sc_dev *dev)
4643+int irdma_get_rdma_features(struct irdma_sc_dev *dev)
46714644 {
4672− enum irdma_status_code ret_code;
4645+ int ret_code;
46734646 struct irdma_dma_mem feat_buf;
46744647 u64 temp;
46754648 u16 byte_idx, feat_type, feat_cnt, feat_idx;
@@ -4679,7 +4652,7 @@ enum irdma_status_code irdma_get_rdma_features(struct irdma_sc_dev *dev) · 3 unmodified lines
46794652 feat_buf.va = dma_alloc_coherent(dev->hw->device, feat_buf.size,
46804653 &feat_buf.pa, GFP_KERNEL);
46814654 if (!feat_buf.va)
4682− return IRDMA_ERR_NO_MEMORY;
4655+ return -ENOMEM;
46834656
46844657 ret_code = irdma_sc_query_rdma_features(dev->cqp, &feat_buf, 0);
46854658 if (!ret_code)
@@ -4690,7 +4663,7 @@ enum irdma_status_code irdma_get_rdma_features(struct irdma_sc_dev *dev) · 4 unmodified lines
46904663 get_64bit_val(feat_buf.va, 0, &temp);
46914664 feat_cnt = (u16)FIELD_GET(IRDMA_FEATURE_CNT, temp);
46924665 if (feat_cnt < 2) {
4693− ret_code = IRDMA_ERR_INVALID_FEAT_CNT;
4666+ ret_code = -EINVAL;
46944667 goto exit;
46954668 } else if (feat_cnt > IRDMA_MAX_FEATURES) {
46964669 ibdev_dbg(to_ibdev(dev),
@@ -4704,7 +4677,7 @@ enum irdma_status_code irdma_get_rdma_features(struct irdma_sc_dev *dev) · 7 unmodified lines
47044677 feat_buf.size, &feat_buf.pa,
47054678 GFP_KERNEL);
47064679 if (!feat_buf.va)
4707− return IRDMA_ERR_NO_MEMORY;
4680+ return -ENOMEM;
47084681
47094682 ret_code = irdma_sc_query_rdma_features(dev->cqp, &feat_buf, 0);
47104683 if (!ret_code)
@@ -4715,7 +4688,7 @@ enum irdma_status_code irdma_get_rdma_features(struct irdma_sc_dev *dev) · 4 unmodified lines
47154688 get_64bit_val(feat_buf.va, 0, &temp);
47164689 feat_cnt = (u16)FIELD_GET(IRDMA_FEATURE_CNT, temp);
47174690 if (feat_cnt < 2) {
4718− ret_code = IRDMA_ERR_INVALID_FEAT_CNT;
4691+ ret_code = -EINVAL;
47194692 goto exit;
47204693 }
47214694 }
@@ -4794,7 +4767,7 @@ static void cfg_fpm_value_gen_2(struct irdma_sc_dev *dev, · 72 unmodified lines
47944767 * @dev: sc device struct
47954768 * @qp_count: desired qp count
47964769 */
4797−enum irdma_status_code irdma_cfg_fpm_val(struct irdma_sc_dev *dev, u32 qp_count)
4770+int irdma_cfg_fpm_val(struct irdma_sc_dev *dev, u32 qp_count)
47984771 {
47994772 struct irdma_virt_mem virt_mem;
48004773 u32 i, mem_size;
@@ -4805,7 +4778,7 @@ enum irdma_status_code irdma_cfg_fpm_val(struct irdma_sc_dev *dev, u32 qp_count) · 4 unmodified lines
48054778 u32 loop_count = 0;
48064779 struct irdma_hmc_info *hmc_info;
48074780 struct irdma_hmc_fpm_misc *hmc_fpm_misc;
4808− enum irdma_status_code ret_code = 0;
4781+ int ret_code = 0;
48094782
48104783 hmc_info = dev->hmc_info;
48114784 hmc_fpm_misc = &dev->hmc_fpm_misc;
@@ -4932,7 +4905,7 @@ enum irdma_status_code irdma_cfg_fpm_val(struct irdma_sc_dev *dev, u32 qp_count) · 120 unmodified lines
49324905 ibdev_dbg(to_ibdev(dev),
49334906 "HMC: cfg_fpm failed loop_cnt=%d, sd_needed=%d, max sd count %d\n",
49344907 loop_count, sd_needed, hmc_info->sd_table.sd_cnt);
4935− return IRDMA_ERR_CFG;
4908+ return -EINVAL;
49364909 }
49374910
49384911 if (loop_count > 1 && sd_needed < hmc_fpm_misc->max_sds) {
@@ -4968,7 +4941,7 @@ enum irdma_status_code irdma_cfg_fpm_val(struct irdma_sc_dev *dev, u32 qp_count) · 29 unmodified lines
49684941 if (!virt_mem.va) {
49694942 ibdev_dbg(to_ibdev(dev),
49704943 "HMC: failed to allocate memory for sd_entry buffer\n");
4971− return IRDMA_ERR_NO_MEMORY;
4944+ return -ENOMEM;
49724945 }
49734946 hmc_info->sd_table.sd_entry = virt_mem.va;
49744947
@@ -4980,10 +4953,10 @@ enum irdma_status_code irdma_cfg_fpm_val(struct irdma_sc_dev *dev, u32 qp_count) · 5 unmodified lines
49804953 * @dev: rdma device
49814954 * @pcmdinfo: cqp command info
49824955 */
4983−static enum irdma_status_code irdma_exec_cqp_cmd(struct irdma_sc_dev *dev,
4984− struct cqp_cmds_info *pcmdinfo)
4956+static int irdma_exec_cqp_cmd(struct irdma_sc_dev *dev,
4957+ struct cqp_cmds_info *pcmdinfo)
49854958 {
4986− enum irdma_status_code status;
4959+ int status;
49874960 struct irdma_dma_mem val_mem;
49884961 bool alloc = false;
49894962
@@ -5245,7 +5218,7 @@ static enum irdma_status_code irdma_exec_cqp_cmd(struct irdma_sc_dev *dev, · 255 unmodified lines
52455218 pcmdinfo->in.u.mc_modify.scratch);
52465219 break;
52475220 default:
5248− status = IRDMA_NOT_SUPPORTED;
5221+ status = -EOPNOTSUPP;
52495222 break;
52505223 }
52515224
@@ -5257,10 +5230,10 @@ static enum irdma_status_code irdma_exec_cqp_cmd(struct irdma_sc_dev *dev, · 5 unmodified lines
52575230 * @dev: sc device struct
52585231 * @pcmdinfo: cqp command info
52595232 */
5260−enum irdma_status_code irdma_process_cqp_cmd(struct irdma_sc_dev *dev,
5261− struct cqp_cmds_info *pcmdinfo)
5233+int irdma_process_cqp_cmd(struct irdma_sc_dev *dev,
5234+ struct cqp_cmds_info *pcmdinfo)
52625235 {
5263− enum irdma_status_code status = 0;
5236+ int status = 0;
52645237 unsigned long flags;
52655238
52665239 spin_lock_irqsave(&dev->cqp_lock, flags);
@@ -5276,9 +5249,9 @@ enum irdma_status_code irdma_process_cqp_cmd(struct irdma_sc_dev *dev, · 9 unmodified lines
52765249 * irdma_process_bh - called from tasklet for cqp list
52775250 * @dev: sc device struct
52785251 */
5279−enum irdma_status_code irdma_process_bh(struct irdma_sc_dev *dev)
5252+int irdma_process_bh(struct irdma_sc_dev *dev)
52805253 {
5281− enum irdma_status_code status = 0;
5254+ int status = 0;
52825255 struct cqp_cmds_info *pcmdinfo;
52835256 unsigned long flags;
52845257
@@ -5366,12 +5339,11 @@ static inline void irdma_sc_init_hw(struct irdma_sc_dev *dev) · 81 unmodified lines
53665339 * @dev: Device pointer
53675340 * @info: Device init info
53685341 */
5369−enum irdma_status_code irdma_sc_dev_init(enum irdma_vers ver,
5370− struct irdma_sc_dev *dev,
5371− struct irdma_device_init_info *info)
5342+int irdma_sc_dev_init(enum irdma_vers ver, struct irdma_sc_dev *dev,
5343+ struct irdma_device_init_info *info)
53725344 {
53735345 u32 val;
5374− enum irdma_status_code ret_code = 0;
5346+ int ret_code = 0;
53755347 u8 db_size;
53765348
53775349 INIT_LIST_HEAD(&dev->cqp_cmd_head); /* for CQP command backlog */
@@ -5415,7 +5387,7 @@ enum irdma_status_code irdma_sc_dev_init(enum irdma_vers ver, · 37 unmodified lines
54155387 irdma_sc_init_hw(dev);
54165388
54175389 if (irdma_wait_pe_ready(dev))
5418− return IRDMA_ERR_TIMEOUT;
5390+ return -ETIMEDOUT;
54195391
54205392 val = readl(dev->hw_regs[IRDMA_GLPCI_LBARCTRL]);
54215393 db_size = (u8)FIELD_GET(IRDMA_GLPCI_LBARCTRL_PE_DB_SIZE, val);
@@ -5423,7 +5395,7 @@ enum irdma_status_code irdma_sc_dev_init(enum irdma_vers ver, · 1 unmodified line
54235395 ibdev_dbg(to_ibdev(dev),
54245396 "DEV: RDMA PE doorbell is not enabled in CSR val 0x%x db_size=%d\n",
54255397 val, db_size);
5426− return IRDMA_ERR_PE_DOORBELL_NOT_ENA;
5398+ return -ENODEV;
54275399 }
54285400 dev->db_addr = dev->hw->hw_addr + (uintptr_t)dev->hw_regs[IRDMA_DB_ADDR_OFFSET];
54295401
drivers/infiniband/hw/irdma/defs.h+4−4
@@ -964,7 +964,7 @@ enum irdma_cqp_op_type { · 963 unmodified lines
964964 (_ring).head = ((_ring).head + 1) % size; \
965965 (_retcode) = 0; \
966966 } else { \
967− (_retcode) = IRDMA_ERR_RING_FULL; \
967+ (_retcode) = -ENOMEM; \
968968 } \
969969 }
970970 #define IRDMA_RING_MOVE_HEAD_BY_COUNT(_ring, _count, _retcode) \
@@ -975,7 +975,7 @@ enum irdma_cqp_op_type { · 4 unmodified lines
975975 (_ring).head = ((_ring).head + (_count)) % size; \
976976 (_retcode) = 0; \
977977 } else { \
978− (_retcode) = IRDMA_ERR_RING_FULL; \
978+ (_retcode) = -ENOMEM; \
979979 } \
980980 }
981981 #define IRDMA_SQ_RING_MOVE_HEAD(_ring, _retcode) \
@@ -986,7 +986,7 @@ enum irdma_cqp_op_type { · 4 unmodified lines
986986 (_ring).head = ((_ring).head + 1) % size; \
987987 (_retcode) = 0; \
988988 } else { \
989− (_retcode) = IRDMA_ERR_RING_FULL; \
989+ (_retcode) = -ENOMEM; \
990990 } \
991991 }
992992 #define IRDMA_SQ_RING_MOVE_HEAD_BY_COUNT(_ring, _count, _retcode) \
@@ -997,7 +997,7 @@ enum irdma_cqp_op_type { · 4 unmodified lines
997997 (_ring).head = ((_ring).head + (_count)) % size; \
998998 (_retcode) = 0; \
999999 } else { \
1000− (_retcode) = IRDMA_ERR_RING_FULL; \
1000+ (_retcode) = -ENOMEM; \
10011001 } \
10021002 }
10031003 #define IRDMA_RING_MOVE_HEAD_BY_COUNT_NOCHECK(_ring, _count) \
drivers/infiniband/hw/irdma/hmc.c+46−59
@@ -1,7 +1,6 @@
11 // SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
22 /* Copyright (c) 2015 - 2021 Intel Corporation */
33 #include "osdep.h"
4−#include "status.h"
54 #include "hmc.h"
65 #include "defs.h"
76 #include "type.h"
@@ -121,10 +120,8 @@ static inline void irdma_invalidate_pf_hmc_pd(struct irdma_sc_dev *dev, u32 sd_i · 113 unmodified lines
121120 * @type: paged or direct sd
122121 * @setsd: flag to set or clear sd
123122 */
124−enum irdma_status_code irdma_hmc_sd_one(struct irdma_sc_dev *dev, u8 hmc_fn_id,
125− u64 pa, u32 sd_idx,
126− enum irdma_sd_entry_type type,
127− bool setsd)
123+int irdma_hmc_sd_one(struct irdma_sc_dev *dev, u8 hmc_fn_id, u64 pa, u32 sd_idx,
124+ enum irdma_sd_entry_type type, bool setsd)
128125 {
129126 struct irdma_update_sds_info sdinfo;
130127
@@ -145,16 +142,15 @@ enum irdma_status_code irdma_hmc_sd_one(struct irdma_sc_dev *dev, u8 hmc_fn_id, · 14 unmodified lines
145142 * @sd_cnt: number of sd entries
146143 * @setsd: flag to set or clear sd
147144 */
148−static enum irdma_status_code irdma_hmc_sd_grp(struct irdma_sc_dev *dev,
149− struct irdma_hmc_info *hmc_info,
150− u32 sd_index, u32 sd_cnt,
151− bool setsd)
145+static int irdma_hmc_sd_grp(struct irdma_sc_dev *dev,
146+ struct irdma_hmc_info *hmc_info, u32 sd_index,
147+ u32 sd_cnt, bool setsd)
152148 {
153149 struct irdma_hmc_sd_entry *sd_entry;
154150 struct irdma_update_sds_info sdinfo = {};
155151 u64 pa;
156152 u32 i;
157− enum irdma_status_code ret_code = 0;
153+ int ret_code = 0;
158154
159155 sdinfo.hmc_fn_id = hmc_info->hmc_fn_id;
160156 for (i = sd_index; i < sd_index + sd_cnt; i++) {
@@ -196,16 +192,15 @@ static enum irdma_status_code irdma_hmc_sd_grp(struct irdma_sc_dev *dev, · 35 unmodified lines
196192 * @dev: pointer to the device structure
197193 * @info: create obj info
198194 */
199−static enum irdma_status_code
200−irdma_hmc_finish_add_sd_reg(struct irdma_sc_dev *dev,
201− struct irdma_hmc_create_obj_info *info)
195+static int irdma_hmc_finish_add_sd_reg(struct irdma_sc_dev *dev,
196+ struct irdma_hmc_create_obj_info *info)
202197 {
203198 if (info->start_idx >= info->hmc_info->hmc_obj[info->rsrc_type].cnt)
204− return IRDMA_ERR_INVALID_HMC_OBJ_INDEX;
199+ return -EINVAL;
205200
206201 if ((info->start_idx + info->count) >
207202 info->hmc_info->hmc_obj[info->rsrc_type].cnt)
208− return IRDMA_ERR_INVALID_HMC_OBJ_COUNT;
203+ return -EINVAL;
209204
210205 if (!info->add_sd_cnt)
211206 return 0;
@@ -222,9 +217,8 @@ irdma_hmc_finish_add_sd_reg(struct irdma_sc_dev *dev, · 10 unmodified lines
222217 * This will allocate memory for PDs and backing pages and populate
223218 * the sd and pd entries.
224219 */
225−enum irdma_status_code
226−irdma_sc_create_hmc_obj(struct irdma_sc_dev *dev,
227− struct irdma_hmc_create_obj_info *info)
220+int irdma_sc_create_hmc_obj(struct irdma_sc_dev *dev,
221+ struct irdma_hmc_create_obj_info *info)
228222 {
229223 struct irdma_hmc_sd_entry *sd_entry;
230224 u32 sd_idx, sd_lmt;
@@ -232,10 +226,10 @@ irdma_sc_create_hmc_obj(struct irdma_sc_dev *dev, · 1 unmodified line
232226 u32 pd_idx1 = 0, pd_lmt1 = 0;
233227 u32 i, j;
234228 bool pd_error = false;
235− enum irdma_status_code ret_code = 0;
229+ int ret_code = 0;
236230
237231 if (info->start_idx >= info->hmc_info->hmc_obj[info->rsrc_type].cnt)
238− return IRDMA_ERR_INVALID_HMC_OBJ_INDEX;
232+ return -EINVAL;
239233
240234 if ((info->start_idx + info->count) >
241235 info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
@@ -243,7 +237,7 @@ irdma_sc_create_hmc_obj(struct irdma_sc_dev *dev, · 1 unmodified line
243237 "HMC: error type %u, start = %u, req cnt %u, cnt = %u\n",
244238 info->rsrc_type, info->start_idx, info->count,
245239 info->hmc_info->hmc_obj[info->rsrc_type].cnt);
246− return IRDMA_ERR_INVALID_HMC_OBJ_COUNT;
240+ return -EINVAL;
247241 }
248242
249243 irdma_find_sd_index_limit(info->hmc_info, info->rsrc_type,
@@ -251,7 +245,7 @@ irdma_sc_create_hmc_obj(struct irdma_sc_dev *dev, · 1 unmodified line
251245 &sd_lmt);
252246 if (sd_idx >= info->hmc_info->sd_table.sd_cnt ||
253247 sd_lmt > info->hmc_info->sd_table.sd_cnt) {
254− return IRDMA_ERR_INVALID_SD_INDEX;
248+ return -EINVAL;
255249 }
256250
257251 irdma_find_pd_index_limit(info->hmc_info, info->rsrc_type,
@@ -312,7 +306,7 @@ exit_sd_error: · 54 unmodified lines
312306 irdma_prep_remove_pd_page(info->hmc_info, (j - 1));
313307 break;
314308 default:
315− ret_code = IRDMA_ERR_INVALID_SD_TYPE;
309+ ret_code = -EINVAL;
316310 break;
317311 }
318312 j--;
@@ -327,12 +321,12 @@ exit_sd_error: · 8 unmodified lines
327321 * @info: dele obj info
328322 * @reset: true if called before reset
329323 */
330−static enum irdma_status_code
331−irdma_finish_del_sd_reg(struct irdma_sc_dev *dev,
332− struct irdma_hmc_del_obj_info *info, bool reset)
324+static int irdma_finish_del_sd_reg(struct irdma_sc_dev *dev,
325+ struct irdma_hmc_del_obj_info *info,
326+ bool reset)
333327 {
334328 struct irdma_hmc_sd_entry *sd_entry;
335− enum irdma_status_code ret_code = 0;
329+ int ret_code = 0;
336330 u32 i, sd_idx;
337331 struct irdma_dma_mem *mem;
338332
@@ -373,22 +367,21 @@ irdma_finish_del_sd_reg(struct irdma_sc_dev *dev, · 34 unmodified lines
373367 * caller should deallocate memory allocated previously for
374368 * book-keeping information about PDs and backing storage.
375369 */
376−enum irdma_status_code irdma_sc_del_hmc_obj(struct irdma_sc_dev *dev,
377− struct irdma_hmc_del_obj_info *info,
378− bool reset)
370+int irdma_sc_del_hmc_obj(struct irdma_sc_dev *dev,
371+ struct irdma_hmc_del_obj_info *info, bool reset)
379372 {
380373 struct irdma_hmc_pd_table *pd_table;
381374 u32 sd_idx, sd_lmt;
382375 u32 pd_idx, pd_lmt, rel_pd_idx;
383376 u32 i, j;
384− enum irdma_status_code ret_code = 0;
377+ int ret_code = 0;
385378
386379 if (info->start_idx >= info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
387380 ibdev_dbg(to_ibdev(dev),
388381 "HMC: error start_idx[%04d] >= [type %04d].cnt[%04d]\n",
389382 info->start_idx, info->rsrc_type,
390383 info->hmc_info->hmc_obj[info->rsrc_type].cnt);
391− return IRDMA_ERR_INVALID_HMC_OBJ_INDEX;
384+ return -EINVAL;
392385 }
393386
394387 if ((info->start_idx + info->count) >
@@ -397,7 +390,7 @@ enum irdma_status_code irdma_sc_del_hmc_obj(struct irdma_sc_dev *dev, · 2 unmodified lines
397390 "HMC: error start_idx[%04d] + count %04d >= [type %04d].cnt[%04d]\n",
398391 info->start_idx, info->count, info->rsrc_type,
399392 info->hmc_info->hmc_obj[info->rsrc_type].cnt);
400− return IRDMA_ERR_INVALID_HMC_OBJ_COUNT;
393+ return -EINVAL;
401394 }
402395
403396 irdma_find_pd_index_limit(info->hmc_info, info->rsrc_type,
@@ -433,7 +426,7 @@ enum irdma_status_code irdma_sc_del_hmc_obj(struct irdma_sc_dev *dev, · 29 unmodified lines
433426 if (sd_idx >= info->hmc_info->sd_table.sd_cnt ||
434427 sd_lmt > info->hmc_info->sd_table.sd_cnt) {
435428 ibdev_dbg(to_ibdev(dev), "HMC: invalid sd_idx\n");
436− return IRDMA_ERR_INVALID_SD_INDEX;
429+ return -EINVAL;
437430 }
438431
439432 for (i = sd_idx; i < sd_lmt; i++) {
@@ -477,11 +470,9 @@ enum irdma_status_code irdma_sc_del_hmc_obj(struct irdma_sc_dev *dev, · 37 unmodified lines
477470 * @type: what type of segment descriptor we're manipulating
478471 * @direct_mode_sz: size to alloc in direct mode
479472 */
480−enum irdma_status_code irdma_add_sd_table_entry(struct irdma_hw *hw,
481− struct irdma_hmc_info *hmc_info,
482− u32 sd_index,
483− enum irdma_sd_entry_type type,
484− u64 direct_mode_sz)
473+int irdma_add_sd_table_entry(struct irdma_hw *hw,
474+ struct irdma_hmc_info *hmc_info, u32 sd_index,
475+ enum irdma_sd_entry_type type, u64 direct_mode_sz)
485476 {
486477 struct irdma_hmc_sd_entry *sd_entry;
487478 struct irdma_dma_mem dma_mem;
@@ -499,7 +490,7 @@ enum irdma_status_code irdma_add_sd_table_entry(struct irdma_hw *hw, · 11 unmodified lines
499490 dma_mem.va = dma_alloc_coherent(hw->device, dma_mem.size,
500491 &dma_mem.pa, GFP_KERNEL);
501492 if (!dma_mem.va)
502− return IRDMA_ERR_NO_MEMORY;
493+ return -ENOMEM;
503494 if (type == IRDMA_SD_TYPE_PAGED) {
504495 struct irdma_virt_mem *vmem =
505496 &sd_entry->u.pd_table.pd_entry_virt_mem;
@@ -510,7 +501,7 @@ enum irdma_status_code irdma_add_sd_table_entry(struct irdma_hw *hw, · 4 unmodified lines
510501 dma_free_coherent(hw->device, dma_mem.size,
511502 dma_mem.va, dma_mem.pa);
512503 dma_mem.va = NULL;
513− return IRDMA_ERR_NO_MEMORY;
504+ return -ENOMEM;
514505 }
515506 sd_entry->u.pd_table.pd_entry = vmem->va;
516507
@@ -549,10 +540,9 @@ enum irdma_status_code irdma_add_sd_table_entry(struct irdma_hw *hw, · 32 unmodified lines
549540 * aligned on 4K boundary and zeroed memory.
550541 * 2. It should be 4K in size.
551542 */
552−enum irdma_status_code irdma_add_pd_table_entry(struct irdma_sc_dev *dev,
553− struct irdma_hmc_info *hmc_info,
554− u32 pd_index,
555− struct irdma_dma_mem *rsrc_pg)
543+int irdma_add_pd_table_entry(struct irdma_sc_dev *dev,
544+ struct irdma_hmc_info *hmc_info, u32 pd_index,
545+ struct irdma_dma_mem *rsrc_pg)
556546 {
557547 struct irdma_hmc_pd_table *pd_table;
558548 struct irdma_hmc_pd_entry *pd_entry;
@@ -563,7 +553,7 @@ enum irdma_status_code irdma_add_pd_table_entry(struct irdma_sc_dev *dev, · 4 unmodified lines
563553 u64 page_desc;
564554
565555 if (pd_index / IRDMA_HMC_PD_CNT_IN_SD >= hmc_info->sd_table.sd_cnt)
566− return IRDMA_ERR_INVALID_PAGE_DESC_INDEX;
556+ return -EINVAL;
567557
568558 sd_idx = (pd_index / IRDMA_HMC_PD_CNT_IN_SD);
569559 if (hmc_info->sd_table.sd_entry[sd_idx].entry_type !=
@@ -584,7 +574,7 @@ enum irdma_status_code irdma_add_pd_table_entry(struct irdma_sc_dev *dev, · 14 unmodified lines
584574 page->size, &page->pa,
585575 GFP_KERNEL);
586576 if (!page->va)
587− return IRDMA_ERR_NO_MEMORY;
577+ return -ENOMEM;
588578
589579 pd_entry->rsrc_pg = false;
590580 }
@@ -621,9 +611,8 @@ enum irdma_status_code irdma_add_pd_table_entry(struct irdma_sc_dev *dev, · 30 unmodified lines
621611 * 1. Caller can deallocate the memory used by backing storage after this
622612 * function returns.
623613 */
624−enum irdma_status_code irdma_remove_pd_bp(struct irdma_sc_dev *dev,
625− struct irdma_hmc_info *hmc_info,
626− u32 idx)
614+int irdma_remove_pd_bp(struct irdma_sc_dev *dev,
615+ struct irdma_hmc_info *hmc_info, u32 idx)
627616 {
628617 struct irdma_hmc_pd_entry *pd_entry;
629618 struct irdma_hmc_pd_table *pd_table;
@@ -635,11 +624,11 @@ enum irdma_status_code irdma_remove_pd_bp(struct irdma_sc_dev *dev, · 5 unmodified lines
635624 sd_idx = idx / IRDMA_HMC_PD_CNT_IN_SD;
636625 rel_pd_idx = idx % IRDMA_HMC_PD_CNT_IN_SD;
637626 if (sd_idx >= hmc_info->sd_table.sd_cnt)
638− return IRDMA_ERR_INVALID_PAGE_DESC_INDEX;
627+ return -EINVAL;
639628
640629 sd_entry = &hmc_info->sd_table.sd_entry[sd_idx];
641630 if (sd_entry->entry_type != IRDMA_SD_TYPE_PAGED)
642− return IRDMA_ERR_INVALID_SD_TYPE;
631+ return -EINVAL;
643632
644633 pd_table = &hmc_info->sd_table.sd_entry[sd_idx].u.pd_table;
645634 pd_entry = &pd_table->pd_entry[rel_pd_idx];
@@ -656,7 +645,7 @@ enum irdma_status_code irdma_remove_pd_bp(struct irdma_sc_dev *dev, · 10 unmodified lines
656645 if (!pd_entry->rsrc_pg) {
657646 mem = &pd_entry->bp.addr;
658647 if (!mem || !mem->va)
659− return IRDMA_ERR_PARAM;
648+ return -EINVAL;
660649
661650 dma_free_coherent(dev->hw->device, mem->size, mem->va,
662651 mem->pa);
@@ -673,14 +662,13 @@ enum irdma_status_code irdma_remove_pd_bp(struct irdma_sc_dev *dev, · 10 unmodified lines
673662 * @hmc_info: pointer to the HMC configuration information structure
674663 * @idx: the page index
675664 */
676−enum irdma_status_code irdma_prep_remove_sd_bp(struct irdma_hmc_info *hmc_info,
677− u32 idx)
665+int irdma_prep_remove_sd_bp(struct irdma_hmc_info *hmc_info, u32 idx)
678666 {
679667 struct irdma_hmc_sd_entry *sd_entry;
680668
681669 sd_entry = &hmc_info->sd_table.sd_entry[idx];
682670 if (--sd_entry->u.bp.use_cnt)
683− return IRDMA_ERR_NOT_READY;
671+ return -EBUSY;
684672
685673 hmc_info->sd_table.use_cnt--;
686674 sd_entry->valid = false;
@@ -693,15 +681,14 @@ enum irdma_status_code irdma_prep_remove_sd_bp(struct irdma_hmc_info *hmc_info, · 6 unmodified lines
693681 * @hmc_info: pointer to the HMC configuration information structure
694682 * @idx: segment descriptor index to find the relevant page descriptor
695683 */
696−enum irdma_status_code
697−irdma_prep_remove_pd_page(struct irdma_hmc_info *hmc_info, u32 idx)
684+int irdma_prep_remove_pd_page(struct irdma_hmc_info *hmc_info, u32 idx)
698685 {
699686 struct irdma_hmc_sd_entry *sd_entry;
700687
701688 sd_entry = &hmc_info->sd_table.sd_entry[idx];
702689
703690 if (sd_entry->u.pd_table.use_cnt)
704− return IRDMA_ERR_NOT_READY;
691+ return -EBUSY;
705692
706693 sd_entry->valid = false;
707694 hmc_info->sd_table.use_cnt--;
drivers/infiniband/hw/irdma/hmc.h+21−32
@@ -141,40 +141,29 @@ struct irdma_hmc_del_obj_info { · 140 unmodified lines
141141 bool privileged;
142142 };
143143
144−enum irdma_status_code irdma_copy_dma_mem(struct irdma_hw *hw, void *dest_buf,
145− struct irdma_dma_mem *src_mem,
146− u64 src_offset, u64 size);
147−enum irdma_status_code
148−irdma_sc_create_hmc_obj(struct irdma_sc_dev *dev,
149− struct irdma_hmc_create_obj_info *info);
150−enum irdma_status_code irdma_sc_del_hmc_obj(struct irdma_sc_dev *dev,
151− struct irdma_hmc_del_obj_info *info,
152− bool reset);
153−enum irdma_status_code irdma_hmc_sd_one(struct irdma_sc_dev *dev, u8 hmc_fn_id,
154− u64 pa, u32 sd_idx,
155− enum irdma_sd_entry_type type,
156− bool setsd);
157−enum irdma_status_code
158−irdma_update_sds_noccq(struct irdma_sc_dev *dev,
159− struct irdma_update_sds_info *info);
144+int irdma_copy_dma_mem(struct irdma_hw *hw, void *dest_buf,
145+ struct irdma_dma_mem *src_mem, u64 src_offset, u64 size);
146+int irdma_sc_create_hmc_obj(struct irdma_sc_dev *dev,
147+ struct irdma_hmc_create_obj_info *info);
148+int irdma_sc_del_hmc_obj(struct irdma_sc_dev *dev,
149+ struct irdma_hmc_del_obj_info *info, bool reset);
150+int irdma_hmc_sd_one(struct irdma_sc_dev *dev, u8 hmc_fn_id, u64 pa, u32 sd_idx,
151+ enum irdma_sd_entry_type type,
152+ bool setsd);
153+int irdma_update_sds_noccq(struct irdma_sc_dev *dev,
154+ struct irdma_update_sds_info *info);
160155 struct irdma_vfdev *irdma_vfdev_from_fpm(struct irdma_sc_dev *dev,
161156 u8 hmc_fn_id);
162157 struct irdma_hmc_info *irdma_vf_hmcinfo_from_fpm(struct irdma_sc_dev *dev,
163158 u8 hmc_fn_id);
164−enum irdma_status_code irdma_add_sd_table_entry(struct irdma_hw *hw,
165− struct irdma_hmc_info *hmc_info,
166− u32 sd_index,
167− enum irdma_sd_entry_type type,
168− u64 direct_mode_sz);
169−enum irdma_status_code irdma_add_pd_table_entry(struct irdma_sc_dev *dev,
170− struct irdma_hmc_info *hmc_info,
171− u32 pd_index,
172− struct irdma_dma_mem *rsrc_pg);
173−enum irdma_status_code irdma_remove_pd_bp(struct irdma_sc_dev *dev,
174− struct irdma_hmc_info *hmc_info,
175− u32 idx);
176−enum irdma_status_code irdma_prep_remove_sd_bp(struct irdma_hmc_info *hmc_info,
177− u32 idx);
178−enum irdma_status_code
179−irdma_prep_remove_pd_page(struct irdma_hmc_info *hmc_info, u32 idx);
159+int irdma_add_sd_table_entry(struct irdma_hw *hw,
160+ struct irdma_hmc_info *hmc_info, u32 sd_index,
161+ enum irdma_sd_entry_type type, u64 direct_mode_sz);
162+int irdma_add_pd_table_entry(struct irdma_sc_dev *dev,
163+ struct irdma_hmc_info *hmc_info, u32 pd_index,
164+ struct irdma_dma_mem *rsrc_pg);
165+int irdma_remove_pd_bp(struct irdma_sc_dev *dev,
166+ struct irdma_hmc_info *hmc_info, u32 idx);
167+int irdma_prep_remove_sd_bp(struct irdma_hmc_info *hmc_info, u32 idx);
168+int irdma_prep_remove_pd_page(struct irdma_hmc_info *hmc_info, u32 idx);
180169 #endif /* IRDMA_HMC_H */
drivers/infiniband/hw/irdma/hw.c+90−102
@@ -75,12 +75,12 @@ static void irdma_puda_ce_handler(struct irdma_pci_f *rf, · 74 unmodified lines
7575 struct irdma_sc_cq *cq)
7676 {
7777 struct irdma_sc_dev *dev = &rf->sc_dev;
78− enum irdma_status_code status;
7978 u32 compl_error;
79+ int status;
8080
8181 do {
8282 status = irdma_puda_poll_cmpl(dev, cq, &compl_error);
83− if (status == IRDMA_ERR_Q_EMPTY)
83+ if (status == -ENOENT)
8484 break;
8585 if (status) {
8686 ibdev_dbg(to_ibdev(dev), "ERR: puda status = %d\n", status);
@@ -456,7 +456,7 @@ static void irdma_ceq_dpc(struct tasklet_struct *t) · 369 unmodified lines
456456 * Allocate iwdev msix table and copy the msix info to the table
457457 * Return 0 if successful, otherwise return error
458458 */
459−static enum irdma_status_code irdma_save_msix_info(struct irdma_pci_f *rf)
459+static int irdma_save_msix_info(struct irdma_pci_f *rf)
460460 {
461461 struct irdma_qvlist_info *iw_qvlist;
462462 struct irdma_qv_info *iw_qvinfo;
@@ -466,13 +466,13 @@ static enum irdma_status_code irdma_save_msix_info(struct irdma_pci_f *rf) · 3 unmodified lines
466466 size_t size;
467467
468468 if (!rf->msix_count)
469− return IRDMA_ERR_NO_INTR;
469+ return -EINVAL;
470470
471471 size = sizeof(struct irdma_msix_vector) * rf->msix_count;
472472 size += struct_size(iw_qvlist, qv_info, rf->msix_count);
473473 rf->iw_msixtbl = kzalloc(size, GFP_KERNEL);
474474 if (!rf->iw_msixtbl)
475− return IRDMA_ERR_NO_MEMORY;
475+ return -ENOMEM;
476476
477477 rf->iw_qvlist = (struct irdma_qvlist_info *)
478478 (&rf->iw_msixtbl[rf->msix_count]);
@@ -564,9 +564,9 @@ static void irdma_destroy_irq(struct irdma_pci_f *rf, · 85 unmodified lines
564564 */
565565 static void irdma_destroy_cqp(struct irdma_pci_f *rf, bool free_hwcqp)
566566 {
567− enum irdma_status_code status = 0;
568567 struct irdma_sc_dev *dev = &rf->sc_dev;
569568 struct irdma_cqp *cqp = &rf->cqp;
569+ int status = 0;
570570
571571 if (rf->cqp_cmpl_wq)
572572 destroy_workqueue(rf->cqp_cmpl_wq);
@@ -606,9 +606,9 @@ static void irdma_destroy_virt_aeq(struct irdma_pci_f *rf) · 33 unmodified lines
606606 */
607607 static void irdma_destroy_aeq(struct irdma_pci_f *rf)
608608 {
609− enum irdma_status_code status = IRDMA_ERR_NOT_READY;
610609 struct irdma_sc_dev *dev = &rf->sc_dev;
611610 struct irdma_aeq *aeq = &rf->aeq;
611+ int status = -EBUSY;
612612
613613 if (!rf->msix_shared) {
614614 rf->sc_dev.irq_ops->irdma_cfg_aeq(&rf->sc_dev, rf->iw_msixtbl->idx, false);
@@ -642,8 +642,8 @@ exit: · 27 unmodified lines
642642 */
643643 static void irdma_destroy_ceq(struct irdma_pci_f *rf, struct irdma_ceq *iwceq)
644644 {
645− enum irdma_status_code status;
646645 struct irdma_sc_dev *dev = &rf->sc_dev;
646+ int status;
647647
648648 if (rf->reset)
649649 goto exit;
@@ -733,7 +733,7 @@ static void irdma_destroy_ccq(struct irdma_pci_f *rf) · 83 unmodified lines
733733 {
734734 struct irdma_sc_dev *dev = &rf->sc_dev;
735735 struct irdma_ccq *ccq = &rf->ccq;
736− enum irdma_status_code status = 0;
736+ int status = 0;
737737
738738 if (!rf->reset)
739739 status = irdma_sc_ccq_destroy(dev->ccq, 0, true);
@@ -796,9 +796,8 @@ static void irdma_del_hmc_objects(struct irdma_sc_dev *dev, · 56 unmodified lines
796796 * @dev: hardware control device structure
797797 * @info: information for the hmc object to create
798798 */
799−static enum irdma_status_code
800−irdma_create_hmc_obj_type(struct irdma_sc_dev *dev,
801− struct irdma_hmc_create_obj_info *info)
799+static int irdma_create_hmc_obj_type(struct irdma_sc_dev *dev,
800+ struct irdma_hmc_create_obj_info *info)
802801 {
803802 return irdma_sc_create_hmc_obj(dev, info);
804803 }
@@ -812,13 +811,12 @@ irdma_create_hmc_obj_type(struct irdma_sc_dev *dev, · 7 unmodified lines
812811 * Create the device hmc objects and allocate hmc pages
813812 * Return 0 if successful, otherwise clean up and return error
814813 */
815−static enum irdma_status_code
816−irdma_create_hmc_objs(struct irdma_pci_f *rf, bool privileged, enum irdma_vers vers)
814+static int irdma_create_hmc_objs(struct irdma_pci_f *rf, bool privileged,
815+ enum irdma_vers vers)
817816 {
818817 struct irdma_sc_dev *dev = &rf->sc_dev;
819818 struct irdma_hmc_create_obj_info info = {};
820− enum irdma_status_code status = 0;
821− int i;
819+ int i, status = 0;
822820
823821 info.hmc_info = dev->hmc_info;
824822 info.privileged = privileged;
@@ -868,9 +866,9 @@ irdma_create_hmc_objs(struct irdma_pci_f *rf, bool privileged, enum irdma_vers v · 43 unmodified lines
868866 * update the memptr to point to the new aligned memory
869867 * Return 0 if successful, otherwise return no memory error
870868 */
871−static enum irdma_status_code
872−irdma_obj_aligned_mem(struct irdma_pci_f *rf, struct irdma_dma_mem *memptr,
873− u32 size, u32 mask)
869+static int irdma_obj_aligned_mem(struct irdma_pci_f *rf,
870+ struct irdma_dma_mem *memptr, u32 size,
871+ u32 mask)
874872 {
875873 unsigned long va, newva;
876874 unsigned long extra;
@@ -884,7 +882,7 @@ irdma_obj_aligned_mem(struct irdma_pci_f *rf, struct irdma_dma_mem *memptr, · 7 unmodified lines
884882 memptr->pa = rf->obj_next.pa + extra;
885883 memptr->size = size;
886884 if (((u8 *)memptr->va + size) > ((u8 *)rf->obj_mem.va + rf->obj_mem.size))
887− return IRDMA_ERR_NO_MEMORY;
885+ return -ENOMEM;
888886
889887 rf->obj_next.va = (u8 *)memptr->va + size;
890888 rf->obj_next.pa = memptr->pa + size;
@@ -899,25 +897,24 @@ irdma_obj_aligned_mem(struct irdma_pci_f *rf, struct irdma_dma_mem *memptr, · 8 unmodified lines
899897 * Return 0, if the cqp and all the resources associated with it
900898 * are successfully created, otherwise return error
901899 */
902−static enum irdma_status_code irdma_create_cqp(struct irdma_pci_f *rf)
900+static int irdma_create_cqp(struct irdma_pci_f *rf)
903901 {
904− enum irdma_status_code status;
905902 u32 sqsize = IRDMA_CQP_SW_SQSIZE_2048;
906903 struct irdma_dma_mem mem;
907904 struct irdma_sc_dev *dev = &rf->sc_dev;
908905 struct irdma_cqp_init_info cqp_init_info = {};
909906 struct irdma_cqp *cqp = &rf->cqp;
910907 u16 maj_err, min_err;
911− int i;
908+ int i, status;
912909
913910 cqp->cqp_requests = kcalloc(sqsize, sizeof(*cqp->cqp_requests), GFP_KERNEL);
914911 if (!cqp->cqp_requests)
915− return IRDMA_ERR_NO_MEMORY;
912+ return -ENOMEM;
916913
917914 cqp->scratch_array = kcalloc(sqsize, sizeof(*cqp->scratch_array), GFP_KERNEL);
918915 if (!cqp->scratch_array) {
919916 kfree(cqp->cqp_requests);
920− return IRDMA_ERR_NO_MEMORY;
917+ return -ENOMEM;
921918 }
922919
923920 dev->cqp = &cqp->sc_cqp;
@@ -929,7 +926,7 @@ static enum irdma_status_code irdma_create_cqp(struct irdma_pci_f *rf) · 5 unmodified lines
929926 if (!cqp->sq.va) {
930927 kfree(cqp->scratch_array);
931928 kfree(cqp->cqp_requests);
932− return IRDMA_ERR_NO_MEMORY;
929+ return -ENOMEM;
933930 }
934931
935932 status = irdma_obj_aligned_mem(rf, &mem, sizeof(struct irdma_cqp_ctx),
@@ -999,12 +996,12 @@ exit: · 63 unmodified lines
999996 * Return 0, if the ccq and the resources associated with it
1000997 * are successfully created, otherwise return error
1001998 */
1002−static enum irdma_status_code irdma_create_ccq(struct irdma_pci_f *rf)
999+static int irdma_create_ccq(struct irdma_pci_f *rf)
10031000 {
10041001 struct irdma_sc_dev *dev = &rf->sc_dev;
1005− enum irdma_status_code status;
10061002 struct irdma_ccq_init_info info = {};
10071003 struct irdma_ccq *ccq = &rf->ccq;
1004+ int status;
10081005
10091006 dev->ccq = &ccq->sc_cq;
10101007 dev->ccq->dev = dev;
@@ -1015,7 +1012,7 @@ static enum irdma_status_code irdma_create_ccq(struct irdma_pci_f *rf) · 4 unmodified lines
10151012 ccq->mem_cq.va = dma_alloc_coherent(dev->hw->device, ccq->mem_cq.size,
10161013 &ccq->mem_cq.pa, GFP_KERNEL);
10171014 if (!ccq->mem_cq.va)
1018− return IRDMA_ERR_NO_MEMORY;
1015+ return -ENOMEM;
10191016
10201017 status = irdma_obj_aligned_mem(rf, &ccq->shadow_area,
10211018 ccq->shadow_area.size,
@@ -1054,9 +1051,9 @@ exit: · 32 unmodified lines
10541051 * Allocate a mac ip entry and add it to the hw table Return 0
10551052 * if successful, otherwise return error
10561053 */
1057−static enum irdma_status_code irdma_alloc_set_mac(struct irdma_device *iwdev)
1054+static int irdma_alloc_set_mac(struct irdma_device *iwdev)
10581055 {
1059− enum irdma_status_code status;
1056+ int status;
10601057
10611058 status = irdma_alloc_local_mac_entry(iwdev->rf,
10621059 &iwdev->mac_ip_table_idx);
@@ -1082,9 +1079,8 @@ static enum irdma_status_code irdma_alloc_set_mac(struct irdma_device *iwdev) · 19 unmodified lines
10821079 * Allocate interrupt resources and enable irq handling
10831080 * Return 0 if successful, otherwise return error
10841081 */
1085−static enum irdma_status_code
1086−irdma_cfg_ceq_vector(struct irdma_pci_f *rf, struct irdma_ceq *iwceq,
1087− u32 ceq_id, struct irdma_msix_vector *msix_vec)
1082+static int irdma_cfg_ceq_vector(struct irdma_pci_f *rf, struct irdma_ceq *iwceq,
1083+ u32 ceq_id, struct irdma_msix_vector *msix_vec)
10881084 {
10891085 int status;
10901086
@@ -1103,7 +1099,7 @@ irdma_cfg_ceq_vector(struct irdma_pci_f *rf, struct irdma_ceq *iwceq, · 12 unmodified lines
11031099 irq_update_affinity_hint(msix_vec->irq, &msix_vec->mask);
11041100 if (status) {
11051101 ibdev_dbg(&rf->iwdev->ibdev, "ERR: ceq irq config fail\n");
1106− return IRDMA_ERR_CFG;
1102+ return status;
11071103 }
11081104
11091105 msix_vec->ceq_id = ceq_id;
@@ -1119,7 +1115,7 @@ irdma_cfg_ceq_vector(struct irdma_pci_f *rf, struct irdma_ceq *iwceq, · 9 unmodified lines
11191115 * Allocate interrupt resources and enable irq handling
11201116 * Return 0 if successful, otherwise return error
11211117 */
1122−static enum irdma_status_code irdma_cfg_aeq_vector(struct irdma_pci_f *rf)
1118+static int irdma_cfg_aeq_vector(struct irdma_pci_f *rf)
11231119 {
11241120 struct irdma_msix_vector *msix_vec = rf->iw_msixtbl;
11251121 u32 ret = 0;
@@ -1131,7 +1127,7 @@ static enum irdma_status_code irdma_cfg_aeq_vector(struct irdma_pci_f *rf) · 5 unmodified lines
11311127 }
11321128 if (ret) {
11331129 ibdev_dbg(&rf->iwdev->ibdev, "ERR: aeq irq config fail\n");
1134− return IRDMA_ERR_CFG;
1130+ return -EINVAL;
11351131 }
11361132
11371133 rf->sc_dev.irq_ops->irdma_cfg_aeq(&rf->sc_dev, msix_vec->idx, true);
@@ -1149,12 +1145,10 @@ static enum irdma_status_code irdma_cfg_aeq_vector(struct irdma_pci_f *rf) · 11 unmodified lines
11491145 * Return 0, if the ceq and the resources associated with it
11501146 * are successfully created, otherwise return error
11511147 */
1152−static enum irdma_status_code irdma_create_ceq(struct irdma_pci_f *rf,
1153− struct irdma_ceq *iwceq,
1154− u32 ceq_id,
1155− struct irdma_sc_vsi *vsi)
1148+static int irdma_create_ceq(struct irdma_pci_f *rf, struct irdma_ceq *iwceq,
1149+ u32 ceq_id, struct irdma_sc_vsi *vsi)
11561150 {
1157− enum irdma_status_code status;
1151+ int status;
11581152 struct irdma_ceq_init_info info = {};
11591153 struct irdma_sc_dev *dev = &rf->sc_dev;
11601154 u64 scratch;
@@ -1169,7 +1163,7 @@ static enum irdma_status_code irdma_create_ceq(struct irdma_pci_f *rf, · 8 unmodified lines
11691163 iwceq->mem.va = dma_alloc_coherent(dev->hw->device, iwceq->mem.size,
11701164 &iwceq->mem.pa, GFP_KERNEL);
11711165 if (!iwceq->mem.va)
1172− return IRDMA_ERR_NO_MEMORY;
1166+ return -ENOMEM;
11731167
11741168 info.ceq_id = ceq_id;
11751169 info.ceqe_base = iwceq->mem.va;
@@ -1205,18 +1199,18 @@ static enum irdma_status_code irdma_create_ceq(struct irdma_pci_f *rf, · 29 unmodified lines
12051199 * Create the ceq 0 and configure it's msix interrupt vector
12061200 * Return 0, if successfully set up, otherwise return error
12071201 */
1208−static enum irdma_status_code irdma_setup_ceq_0(struct irdma_pci_f *rf)
1202+static int irdma_setup_ceq_0(struct irdma_pci_f *rf)
12091203 {
12101204 struct irdma_ceq *iwceq;
12111205 struct irdma_msix_vector *msix_vec;
12121206 u32 i;
1213− enum irdma_status_code status = 0;
1207+ int status = 0;
12141208 u32 num_ceqs;
12151209
12161210 num_ceqs = min(rf->msix_count, rf->sc_dev.hmc_fpm_misc.max_ceqs);
12171211 rf->ceqlist = kcalloc(num_ceqs, sizeof(*rf->ceqlist), GFP_KERNEL);
12181212 if (!rf->ceqlist) {
1219− status = IRDMA_ERR_NO_MEMORY;
1213+ status = -ENOMEM;
12201214 goto exit;
12211215 }
12221216
@@ -1262,14 +1256,13 @@ exit: · 39 unmodified lines
12621256 * Create the ceq's and configure their msix interrupt vectors
12631257 * Return 0, if ceqs are successfully set up, otherwise return error
12641258 */
1265−static enum irdma_status_code irdma_setup_ceqs(struct irdma_pci_f *rf,
1266− struct irdma_sc_vsi *vsi)
1259+static int irdma_setup_ceqs(struct irdma_pci_f *rf, struct irdma_sc_vsi *vsi)
12671260 {
12681261 u32 i;
12691262 u32 ceq_id;
12701263 struct irdma_ceq *iwceq;
12711264 struct irdma_msix_vector *msix_vec;
1272− enum irdma_status_code status;
1265+ int status;
12731266 u32 num_ceqs;
12741267
12751268 num_ceqs = min(rf->msix_count, rf->sc_dev.hmc_fpm_misc.max_ceqs);
@@ -1303,22 +1296,21 @@ del_ceqs: · 27 unmodified lines
13031296 return status;
13041297 }
13051298
1306−static enum irdma_status_code irdma_create_virt_aeq(struct irdma_pci_f *rf,
1307− u32 size)
1299+static int irdma_create_virt_aeq(struct irdma_pci_f *rf, u32 size)
13081300 {
1309− enum irdma_status_code status = IRDMA_ERR_NO_MEMORY;
13101301 struct irdma_aeq *aeq = &rf->aeq;
13111302 dma_addr_t *pg_arr;
13121303 u32 pg_cnt;
1304+ int status;
13131305
13141306 if (rf->rdma_ver < IRDMA_GEN_2)
1315− return IRDMA_NOT_SUPPORTED;
1307+ return -EOPNOTSUPP;
13161308
13171309 aeq->mem.size = sizeof(struct irdma_sc_aeqe) * size;
13181310 aeq->mem.va = vzalloc(aeq->mem.size);
13191311
13201312 if (!aeq->mem.va)
1321− return status;
1313+ return -ENOMEM;
13221314
13231315 pg_cnt = DIV_ROUND_UP(aeq->mem.size, PAGE_SIZE);
13241316 status = irdma_get_pble(rf->pble_rsrc, &aeq->palloc, pg_cnt, true);
@@ -1345,15 +1337,15 @@ static enum irdma_status_code irdma_create_virt_aeq(struct irdma_pci_f *rf, · 20 unmodified lines
13451337 * Return 0, if the aeq and the resources associated with it
13461338 * are successfully created, otherwise return error
13471339 */
1348−static enum irdma_status_code irdma_create_aeq(struct irdma_pci_f *rf)
1340+static int irdma_create_aeq(struct irdma_pci_f *rf)
13491341 {
1350− enum irdma_status_code status;
13511342 struct irdma_aeq_init_info info = {};
13521343 struct irdma_sc_dev *dev = &rf->sc_dev;
13531344 struct irdma_aeq *aeq = &rf->aeq;
13541345 struct irdma_hmc_info *hmc_info = rf->sc_dev.hmc_info;
13551346 u32 aeq_size;
13561347 u8 multiplier = (rf->protocol_used == IRDMA_IWARP_PROTOCOL_ONLY) ? 2 : 1;
1348+ int status;
13571349
13581350 aeq_size = multiplier * hmc_info->hmc_obj[IRDMA_HMC_IW_QP].cnt +
13591351 hmc_info->hmc_obj[IRDMA_HMC_IW_CQ].cnt;
@@ -1412,10 +1404,10 @@ err: · 52 unmodified lines
14121404 * Create the aeq and configure its msix interrupt vector
14131405 * Return 0 if successful, otherwise return error
14141406 */
1415−static enum irdma_status_code irdma_setup_aeq(struct irdma_pci_f *rf)
1407+static int irdma_setup_aeq(struct irdma_pci_f *rf)
14161408 {
14171409 struct irdma_sc_dev *dev = &rf->sc_dev;
1418− enum irdma_status_code status;
1410+ int status;
14191411
14201412 status = irdma_create_aeq(rf);
14211413 if (status)
@@ -1439,10 +1431,10 @@ static enum irdma_status_code irdma_setup_aeq(struct irdma_pci_f *rf) · 17 unmodified lines
14391431 *
14401432 * Return 0 if successful, otherwise return error
14411433 */
1442−static enum irdma_status_code irdma_initialize_ilq(struct irdma_device *iwdev)
1434+static int irdma_initialize_ilq(struct irdma_device *iwdev)
14431435 {
14441436 struct irdma_puda_rsrc_info info = {};
1445− enum irdma_status_code status;
1437+ int status;
14461438
14471439 info.type = IRDMA_PUDA_RSRC_TYPE_ILQ;
14481440 info.cq_id = 1;
@@ -1469,10 +1461,10 @@ static enum irdma_status_code irdma_initialize_ilq(struct irdma_device *iwdev) · 20 unmodified lines
14691461 *
14701462 * Return 0 if successful, otherwise return error
14711463 */
1472−static enum irdma_status_code irdma_initialize_ieq(struct irdma_device *iwdev)
1464+static int irdma_initialize_ieq(struct irdma_device *iwdev)
14731465 {
14741466 struct irdma_puda_rsrc_info info = {};
1475− enum irdma_status_code status;
1467+ int status;
14761468
14771469 info.type = IRDMA_PUDA_RSRC_TYPE_IEQ;
14781470 info.cq_id = 2;
@@ -1515,9 +1507,9 @@ void irdma_reinitialize_ieq(struct irdma_sc_vsi *vsi) · 36 unmodified lines
15151507 * the hmc objects and create the objects
15161508 * Return 0 if successful, otherwise return error
15171509 */
1518−static enum irdma_status_code irdma_hmc_setup(struct irdma_pci_f *rf)
1510+static int irdma_hmc_setup(struct irdma_pci_f *rf)
15191511 {
1520− enum irdma_status_code status;
1512+ int status;
15211513 u32 qpcnt;
15221514
15231515 if (rf->rdma_ver == IRDMA_GEN_1)
@@ -1570,9 +1562,9 @@ static void irdma_del_init_mem(struct irdma_pci_f *rf) · 46 unmodified lines
15701562 * Return 0 if successful, otherwise clean up the resources
15711563 * and return error
15721564 */
1573−static enum irdma_status_code irdma_initialize_dev(struct irdma_pci_f *rf)
1565+static int irdma_initialize_dev(struct irdma_pci_f *rf)
15741566 {
1575− enum irdma_status_code status;
1567+ int status;
15761568 struct irdma_sc_dev *dev = &rf->sc_dev;
15771569 struct irdma_device_init_info info = {};
15781570 struct irdma_dma_mem mem;
@@ -1584,7 +1576,7 @@ static enum irdma_status_code irdma_initialize_dev(struct irdma_pci_f *rf) · 5 unmodified lines
15841576
15851577 rf->hmc_info_mem = kzalloc(size, GFP_KERNEL);
15861578 if (!rf->hmc_info_mem)
1587− return IRDMA_ERR_NO_MEMORY;
1579+ return -ENOMEM;
15881580
15891581 rf->pble_rsrc = (struct irdma_hmc_pble_rsrc *)rf->hmc_info_mem;
15901582 dev->hmc_info = &rf->hw.hmc;
@@ -1608,7 +1600,7 @@ static enum irdma_status_code irdma_initialize_dev(struct irdma_pci_f *rf) · 17 unmodified lines
16081600 info.fpm_commit_buf = mem.va;
16091601
16101602 info.bar0 = rf->hw.hw_addr;
1611− info.hmc_fn_id = PCI_FUNC(rf->pcidev->devfn);
1603+ info.hmc_fn_id = rf->pf_id;
16121604 info.hw = &rf->hw;
16131605 status = irdma_sc_dev_init(rf->rdma_ver, &rf->sc_dev, &info);
16141606 if (status)
@@ -1667,9 +1659,9 @@ void irdma_rt_deinit_hw(struct irdma_device *iwdev) · 52 unmodified lines
16671659 destroy_workqueue(iwdev->cleanup_wq);
16681660 }
16691661
1670−static enum irdma_status_code irdma_setup_init_state(struct irdma_pci_f *rf)
1662+static int irdma_setup_init_state(struct irdma_pci_f *rf)
16711663 {
1672− enum irdma_status_code status;
1664+ int status;
16731665
16741666 status = irdma_save_msix_info(rf);
16751667 if (status)
@@ -1680,7 +1672,7 @@ static enum irdma_status_code irdma_setup_init_state(struct irdma_pci_f *rf) · 4 unmodified lines
16801672 rf->obj_mem.va = dma_alloc_coherent(rf->hw.device, rf->obj_mem.size,
16811673 &rf->obj_mem.pa, GFP_KERNEL);
16821674 if (!rf->obj_mem.va) {
1683− status = IRDMA_ERR_NO_MEMORY;
1675+ status = -ENOMEM;
16841676 goto clean_msixtbl;
16851677 }
16861678
@@ -1763,14 +1755,14 @@ void irdma_ctrl_deinit_hw(struct irdma_pci_f *rf) · 76 unmodified lines
17631755 * Create device queues ILQ, IEQ, CEQs and PBLEs. Setup irdma
17641756 * device resource objects.
17651757 */
1766−enum irdma_status_code irdma_rt_init_hw(struct irdma_device *iwdev,
1767− struct irdma_l2params *l2params)
1758+int irdma_rt_init_hw(struct irdma_device *iwdev,
1759+ struct irdma_l2params *l2params)
17681760 {
17691761 struct irdma_pci_f *rf = iwdev->rf;
17701762 struct irdma_sc_dev *dev = &rf->sc_dev;
1771− enum irdma_status_code status;
17721763 struct irdma_vsi_init_info vsi_info = {};
17731764 struct irdma_vsi_stats_info stats_info = {};
1765+ int status;
17741766
17751767 vsi_info.dev = dev;
17761768 vsi_info.back_vsi = iwdev;
@@ -1788,7 +1780,7 @@ enum irdma_status_code irdma_rt_init_hw(struct irdma_device *iwdev, · 11 unmodified lines
17881780 stats_info.pestat = kzalloc(sizeof(*stats_info.pestat), GFP_KERNEL);
17891781 if (!stats_info.pestat) {
17901782 irdma_cleanup_cm_core(&iwdev->cm_core);
1791− return IRDMA_ERR_NO_MEMORY;
1783+ return -ENOMEM;
17921784 }
17931785 stats_info.fcn_id = dev->hmc_fn_id;
17941786 status = irdma_vsi_stats_init(&iwdev->vsi, &stats_info);
@@ -1850,7 +1842,7 @@ enum irdma_status_code irdma_rt_init_hw(struct irdma_device *iwdev, · 55 unmodified lines
18501842 iwdev->cleanup_wq = alloc_workqueue("irdma-cleanup-wq",
18511843 WQ_UNBOUND, WQ_UNBOUND_MAX_ACTIVE);
18521844 if (!iwdev->cleanup_wq)
1853− return IRDMA_ERR_NO_MEMORY;
1845+ return -ENOMEM;
18541846 irdma_get_used_rsrc(iwdev);
18551847 init_waitqueue_head(&iwdev->suspend_wq);
18561848
@@ -1870,10 +1862,10 @@ enum irdma_status_code irdma_rt_init_hw(struct irdma_device *iwdev, · 13 unmodified lines
18701862 *
18711863 * Create admin queues, HMC obejcts and RF resource objects
18721864 */
1873−enum irdma_status_code irdma_ctrl_init_hw(struct irdma_pci_f *rf)
1865+int irdma_ctrl_init_hw(struct irdma_pci_f *rf)
18741866 {
18751867 struct irdma_sc_dev *dev = &rf->sc_dev;
1876− enum irdma_status_code status;
1868+ int status;
18771869 do {
18781870 status = irdma_setup_init_state(rf);
18791871 if (status)
@@ -1915,7 +1907,7 @@ enum irdma_status_code irdma_ctrl_init_hw(struct irdma_pci_f *rf) · 35 unmodified lines
19151907 rf->cqp_cmpl_wq = alloc_ordered_workqueue("cqp_cmpl_wq",
19161908 WQ_HIGHPRI | WQ_UNBOUND);
19171909 if (!rf->cqp_cmpl_wq) {
1918− status = IRDMA_ERR_NO_MEMORY;
1910+ status = -ENOMEM;
19191911 break;
19201912 }
19211913 INIT_WORK(&rf->cqp_cmpl_work, cqp_compl_worker);
@@ -2202,11 +2194,11 @@ int irdma_add_local_mac_entry(struct irdma_pci_f *rf, const u8 *mac_addr, u16 id · 280 unmodified lines
22022194 struct irdma_cqp *iwcqp = &rf->cqp;
22032195 struct irdma_cqp_request *cqp_request;
22042196 struct cqp_cmds_info *cqp_info;
2205− enum irdma_status_code status;
2197+ int status;
22062198
22072199 cqp_request = irdma_alloc_and_get_cqp_request(iwcqp, true);
22082200 if (!cqp_request)
2209− return IRDMA_ERR_NO_MEMORY;
2201+ return -ENOMEM;
22102202
22112203 cqp_info = &cqp_request->info;
22122204 cqp_info->post_sq = 1;
@@ -2238,11 +2230,11 @@ int irdma_alloc_local_mac_entry(struct irdma_pci_f *rf, u16 *mac_tbl_idx) · 25 unmodified lines
22382230 struct irdma_cqp *iwcqp = &rf->cqp;
22392231 struct irdma_cqp_request *cqp_request;
22402232 struct cqp_cmds_info *cqp_info;
2241− enum irdma_status_code status = 0;
2233+ int status = 0;
22422234
22432235 cqp_request = irdma_alloc_and_get_cqp_request(iwcqp, true);
22442236 if (!cqp_request)
2245− return IRDMA_ERR_NO_MEMORY;
2237+ return -ENOMEM;
22462238
22472239 cqp_info = &cqp_request->info;
22482240 cqp_info->cqp_cmd = IRDMA_OP_ALLOC_LOCAL_MAC_ENTRY;
@@ -2264,18 +2256,17 @@ int irdma_alloc_local_mac_entry(struct irdma_pci_f *rf, u16 *mac_tbl_idx) · 15 unmodified lines
22642256 * @accel_local_port: port for apbvt
22652257 * @add_port: add ordelete port
22662258 */
2267−static enum irdma_status_code
2268−irdma_cqp_manage_apbvt_cmd(struct irdma_device *iwdev, u16 accel_local_port,
2269− bool add_port)
2259+static int irdma_cqp_manage_apbvt_cmd(struct irdma_device *iwdev,
2260+ u16 accel_local_port, bool add_port)
22702261 {
22712262 struct irdma_apbvt_info *info;
22722263 struct irdma_cqp_request *cqp_request;
22732264 struct cqp_cmds_info *cqp_info;
2274− enum irdma_status_code status;
2265+ int status;
22752266
22762267 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, add_port);
22772268 if (!cqp_request)
2278− return IRDMA_ERR_NO_MEMORY;
2269+ return -ENOMEM;
22792270
22802271 cqp_info = &cqp_request->info;
22812272 info = &cqp_info->in.u.manage_apbvt_entry.info;
@@ -2429,22 +2420,21 @@ static void irdma_send_syn_cqp_callback(struct irdma_cqp_request *cqp_request) · 147 unmodified lines
24292420 * @cmnode: cmnode associated with connection
24302421 * @wait: wait for completion
24312422 */
2432−enum irdma_status_code
2433−irdma_manage_qhash(struct irdma_device *iwdev, struct irdma_cm_info *cminfo,
2434− enum irdma_quad_entry_type etype,
2435− enum irdma_quad_hash_manage_type mtype, void *cmnode,
2436− bool wait)
2423+int irdma_manage_qhash(struct irdma_device *iwdev, struct irdma_cm_info *cminfo,
2424+ enum irdma_quad_entry_type etype,
2425+ enum irdma_quad_hash_manage_type mtype, void *cmnode,
2426+ bool wait)
24372427 {
24382428 struct irdma_qhash_table_info *info;
2439− enum irdma_status_code status;
24402429 struct irdma_cqp *iwcqp = &iwdev->rf->cqp;
24412430 struct irdma_cqp_request *cqp_request;
24422431 struct cqp_cmds_info *cqp_info;
24432432 struct irdma_cm_node *cm_node = cmnode;
2433+ int status;
24442434
24452435 cqp_request = irdma_alloc_and_get_cqp_request(iwcqp, wait);
24462436 if (!cqp_request)
2447− return IRDMA_ERR_NO_MEMORY;
2437+ return -ENOMEM;
24482438
24492439 cqp_info = &cqp_request->info;
24502440 info = &cqp_info->in.u.manage_qhash_table_entry.info;
@@ -2558,12 +2548,10 @@ static void irdma_hw_flush_wqes_callback(struct irdma_cqp_request *cqp_request) · 107 unmodified lines
25582548 * @info: info for flush
25592549 * @wait: flag wait for completion
25602550 */
2561−enum irdma_status_code irdma_hw_flush_wqes(struct irdma_pci_f *rf,
2562− struct irdma_sc_qp *qp,
2563− struct irdma_qp_flush_info *info,
2564− bool wait)
2551+int irdma_hw_flush_wqes(struct irdma_pci_f *rf, struct irdma_sc_qp *qp,
2552+ struct irdma_qp_flush_info *info, bool wait)
25652553 {
2566− enum irdma_status_code status;
2554+ int status;
25672555 struct irdma_qp_flush_info *hw_info;
25682556 struct irdma_cqp_request *cqp_request;
25692557 struct cqp_cmds_info *cqp_info;
@@ -2571,7 +2559,7 @@ enum irdma_status_code irdma_hw_flush_wqes(struct irdma_pci_f *rf, · 1 unmodified line
25712559
25722560 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, wait);
25732561 if (!cqp_request)
2574− return IRDMA_ERR_NO_MEMORY;
2562+ return -ENOMEM;
25752563
25762564 cqp_info = &cqp_request->info;
25772565 if (!wait)
@@ -2619,7 +2607,7 @@ enum irdma_status_code irdma_hw_flush_wqes(struct irdma_pci_f *rf, · 41 unmodified lines
26192607 info->sq = true;
26202608 new_req = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
26212609 if (!new_req) {
2622− status = IRDMA_ERR_NO_MEMORY;
2610+ status = -ENOMEM;
26232611 goto put_cqp;
26242612 }
26252613 cqp_info = &new_req->info;
drivers/infiniband/hw/irdma/i40iw_hw.c+0−1
@@ -3,7 +3,6 @@ · 2 unmodified lines
33 #include "osdep.h"
44 #include "type.h"
55 #include "i40iw_hw.h"
6−#include "status.h"
76 #include "protos.h"
87
98 static u32 i40iw_regs[IRDMA_MAX_REGS] = {
drivers/infiniband/hw/irdma/i40iw_if.c+2−1
@@ -77,6 +77,7 @@ static void i40iw_fill_device_info(struct irdma_device *iwdev, struct i40e_info · 76 unmodified lines
7777 rf->rdma_ver = IRDMA_GEN_1;
7878 rf->gen_ops.request_reset = i40iw_request_reset;
7979 rf->pcidev = cdev_info->pcidev;
80+ rf->pf_id = cdev_info->fid;
8081 rf->hw.hw_addr = cdev_info->hw_addr;
8182 rf->cdev = cdev_info;
8283 rf->msix_count = cdev_info->msix_count;
@@ -138,7 +139,7 @@ static int i40iw_open(struct i40e_info *cdev_info, struct i40e_client *client) · 55 unmodified lines
138139 if (last_qset == IRDMA_NO_QSET)
139140 last_qset = qset;
140141 else if ((qset != last_qset) && (qset != IRDMA_NO_QSET))
141− iwdev->dcb = true;
142+ iwdev->dcb_vlan_mode = true;
142143 }
143144
144145 if (irdma_rt_init_hw(iwdev, &l2params)) {
drivers/infiniband/hw/irdma/main.c+18−11
@@ -79,6 +79,10 @@ static void irdma_fill_qos_info(struct irdma_l2params *l2params, · 78 unmodified lines
7979 }
8080 for (i = 0; i < IIDC_MAX_USER_PRIORITY; i++)
8181 l2params->up2tc[i] = qos_info->up2tc[i];
82+ if (qos_info->pfc_mode == IIDC_DSCP_PFC_MODE) {
83+ l2params->dscp_mode = true;
84+ memcpy(l2params->dscp_map, qos_info->dscp_map, sizeof(l2params->dscp_map));
85+ }
8286 }
8387
8488 static void irdma_iidc_event_handler(struct ice_pf *pf, struct iidc_event *event)
@@ -108,8 +112,9 @@ static void irdma_iidc_event_handler(struct ice_pf *pf, struct iidc_event *event · 23 unmodified lines
108112 l2params.tc_changed = true;
109113 ibdev_dbg(&iwdev->ibdev, "CLNT: TC Change\n");
110114 ice_get_qos_params(pf, &qos_info);
111− iwdev->dcb = qos_info.num_tc > 1;
112115 irdma_fill_qos_info(&l2params, &qos_info);
116+ if (iwdev->rf->protocol_used != IRDMA_IWARP_PROTOCOL_ONLY)
117+ iwdev->dcb_vlan_mode = qos_info.num_tc > 1 && !l2params.dscp_mode;
113118 irdma_change_l2params(&iwdev->vsi, &l2params);
114119 } else if (*event->type & BIT(IIDC_EVENT_CRIT_ERR)) {
115120 ibdev_warn(&iwdev->ibdev, "ICE OICR event notification: oicr = 0x%08x\n",
@@ -157,8 +162,8 @@ static void irdma_request_reset(struct irdma_pci_f *rf) · 41 unmodified lines
157162 * @vsi: vsi structure
158163 * @tc_node: Traffic class node
159164 */
160−static enum irdma_status_code irdma_lan_register_qset(struct irdma_sc_vsi *vsi,
161− struct irdma_ws_node *tc_node)
165+static int irdma_lan_register_qset(struct irdma_sc_vsi *vsi,
166+ struct irdma_ws_node *tc_node)
162167 {
163168 struct irdma_device *iwdev = vsi->back_vsi;
164169 struct ice_pf *pf = iwdev->rf->cdev;
@@ -171,7 +176,7 @@ static enum irdma_status_code irdma_lan_register_qset(struct irdma_sc_vsi *vsi, · 6 unmodified lines
171176 ret = ice_add_rdma_qset(pf, &qset);
172177 if (ret) {
173178 ibdev_dbg(&iwdev->ibdev, "WS: LAN alloc_res for rdma qset failed.\n");
174− return IRDMA_ERR_REG_QSET;
179+ return ret;
175180 }
176181
177182 tc_node->l2_sched_node_id = qset.teid;
@@ -226,6 +231,7 @@ static void irdma_fill_device_info(struct irdma_device *iwdev, struct ice_pf *pf · 48 unmodified lines
226231 rf->hw.hw_addr = pf->hw.hw_addr;
227232 rf->pcidev = pf->pdev;
228233 rf->msix_count = pf->num_rdma_msix;
234+ rf->pf_id = pf->hw.pf_id;
229235 rf->msix_entries = &pf->msix_entries[pf->rdma_base_vector];
230236 rf->default_vsi.vsi_idx = vsi->vsi_num;
231237 rf->protocol_used = pf->rdma_mode & IIDC_RDMA_PROTOCOL_ROCEV2 ?
@@ -236,7 +242,7 @@ static void irdma_fill_device_info(struct irdma_device *iwdev, struct ice_pf *pf · 4 unmodified lines
236242 rf->gen_ops.request_reset = irdma_request_reset;
237243 rf->limits_sel = 7;
238244 rf->iwdev = iwdev;
239−
245+ mutex_init(&iwdev->ah_tbl_lock);
240246 iwdev->netdev = vsi->netdev;
241247 iwdev->vsi_num = vsi->vsi_num;
242248 iwdev->init_state = INITIAL_STATE;
@@ -275,18 +281,19 @@ static int irdma_probe(struct auxiliary_device *aux_dev, const struct auxiliary_ · 32 unmodified lines
275281 irdma_fill_device_info(iwdev, pf, vsi);
276282 rf = iwdev->rf;
277283
278− if (irdma_ctrl_init_hw(rf)) {
279− err = -EIO;
284+ err = irdma_ctrl_init_hw(rf);
285+ if (err)
280286 goto err_ctrl_init;
281− }
282287
283288 l2params.mtu = iwdev->netdev->mtu;
284289 ice_get_qos_params(pf, &qos_info);
285290 irdma_fill_qos_info(&l2params, &qos_info);
286− if (irdma_rt_init_hw(iwdev, &l2params)) {
287− err = -EIO;
291+ if (iwdev->rf->protocol_used != IRDMA_IWARP_PROTOCOL_ONLY)
292+ iwdev->dcb_vlan_mode = l2params.num_tc > 1 && !l2params.dscp_mode;
293+
294+ err = irdma_rt_init_hw(iwdev, &l2params);
295+ if (err)
288296 goto err_rt_init;
289− }
290297
291298 err = irdma_ib_register_device(iwdev);
292299 if (err)
drivers/infiniband/hw/irdma/main.h+21−26
@@ -40,7 +40,6 @@ · 39 unmodified lines
4040 #include <rdma/ib_umem.h>
4141 #include <rdma/ib_cache.h>
4242 #include <rdma/uverbs_ioctl.h>
43−#include "status.h"
4443 #include "osdep.h"
4544 #include "defs.h"
4645 #include "hmc.h"
@@ -242,8 +241,8 @@ struct irdma_qvlist_info { · 195 unmodified lines
242241
243242 struct irdma_gen_ops {
244243 void (*request_reset)(struct irdma_pci_f *rf);
245− enum irdma_status_code (*register_qset)(struct irdma_sc_vsi *vsi,
246− struct irdma_ws_node *tc_node);
244+ int (*register_qset)(struct irdma_sc_vsi *vsi,
245+ struct irdma_ws_node *tc_node);
247246 void (*unregister_qset)(struct irdma_sc_vsi *vsi,
248247 struct irdma_ws_node *tc_node);
249248 };
@@ -257,6 +256,7 @@ struct irdma_pci_f { · 7 unmodified lines
257256 u8 *mem_rsrc;
258257 u8 rdma_ver;
259258 u8 rst_to;
259+ u8 pf_id;
260260 enum irdma_protocol_used protocol_used;
261261 u32 sd_type;
262262 u32 msix_count;
@@ -332,6 +332,8 @@ struct irdma_device { · 69 unmodified lines
332332 struct workqueue_struct *cleanup_wq;
333333 struct irdma_sc_vsi vsi;
334334 struct irdma_cm_core cm_core;
335+ DECLARE_HASHTABLE(ah_hash_tbl, 8);
336+ struct mutex ah_tbl_lock; /* protect AH hash table access */
335337 u32 roce_cwnd;
336338 u32 roce_ackcreds;
337339 u32 vendor_id;
@@ -345,7 +347,7 @@ struct irdma_device { · 7 unmodified lines
345347 u8 iw_status;
346348 bool roce_mode:1;
347349 bool roce_dcqcn_en:1;
348− bool dcb:1;
350+ bool dcb_vlan_mode:1;
349351 bool iw_ooo:1;
350352 enum init_completion_state init_state;
351353
@@ -457,10 +459,10 @@ static inline void irdma_free_rsrc(struct irdma_pci_f *rf, · 105 unmodified lines
457459 spin_unlock_irqrestore(&rf->rsrc_lock, flags);
458460 }
459461
460−enum irdma_status_code irdma_ctrl_init_hw(struct irdma_pci_f *rf);
462+int irdma_ctrl_init_hw(struct irdma_pci_f *rf);
461463 void irdma_ctrl_deinit_hw(struct irdma_pci_f *rf);
462−enum irdma_status_code irdma_rt_init_hw(struct irdma_device *iwdev,
463− struct irdma_l2params *l2params);
464+int irdma_rt_init_hw(struct irdma_device *iwdev,
465+ struct irdma_l2params *l2params);
464466 void irdma_rt_deinit_hw(struct irdma_device *iwdev);
465467 void irdma_qp_add_ref(struct ib_qp *ibqp);
466468 void irdma_qp_rem_ref(struct ib_qp *ibqp);
@@ -489,9 +491,8 @@ void irdma_cm_disconn(struct irdma_qp *qp); · 22 unmodified lines
489491
490492 bool irdma_cqp_crit_err(struct irdma_sc_dev *dev, u8 cqp_cmd,
491493 u16 maj_err_code, u16 min_err_code);
492−enum irdma_status_code
493−irdma_handle_cqp_op(struct irdma_pci_f *rf,
494− struct irdma_cqp_request *cqp_request);
494+int irdma_handle_cqp_op(struct irdma_pci_f *rf,
495+ struct irdma_cqp_request *cqp_request);
495496
496497 int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
497498 struct ib_udata *udata);
@@ -500,21 +501,17 @@ int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr, · 2 unmodified lines
500501 void irdma_cq_wq_destroy(struct irdma_pci_f *rf, struct irdma_sc_cq *cq);
501502
502503 void irdma_cleanup_pending_cqp_op(struct irdma_pci_f *rf);
503−enum irdma_status_code irdma_hw_modify_qp(struct irdma_device *iwdev,
504− struct irdma_qp *iwqp,
505− struct irdma_modify_qp_info *info,
506− bool wait);
507−enum irdma_status_code irdma_qp_suspend_resume(struct irdma_sc_qp *qp,
508− bool suspend);
509−enum irdma_status_code
510−irdma_manage_qhash(struct irdma_device *iwdev, struct irdma_cm_info *cminfo,
511− enum irdma_quad_entry_type etype,
512− enum irdma_quad_hash_manage_type mtype, void *cmnode,
513− bool wait);
504+int irdma_hw_modify_qp(struct irdma_device *iwdev, struct irdma_qp *iwqp,
505+ struct irdma_modify_qp_info *info, bool wait);
506+int irdma_qp_suspend_resume(struct irdma_sc_qp *qp, bool suspend);
507+int irdma_manage_qhash(struct irdma_device *iwdev, struct irdma_cm_info *cminfo,
508+ enum irdma_quad_entry_type etype,
509+ enum irdma_quad_hash_manage_type mtype, void *cmnode,
510+ bool wait);
514511 void irdma_receive_ilq(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *rbuf);
515512 void irdma_free_sqbuf(struct irdma_sc_vsi *vsi, void *bufp);
516513 void irdma_free_qp_rsrc(struct irdma_qp *iwqp);
517−enum irdma_status_code irdma_setup_cm_core(struct irdma_device *iwdev, u8 ver);
514+int irdma_setup_cm_core(struct irdma_device *iwdev, u8 ver);
518515 void irdma_cleanup_cm_core(struct irdma_cm_core *cm_core);
519516 void irdma_next_iw_state(struct irdma_qp *iwqp, u8 state, u8 del_hash, u8 term,
520517 u8 term_len);
@@ -523,10 +520,8 @@ int irdma_send_reset(struct irdma_cm_node *cm_node); · 2 unmodified lines
523520 struct irdma_cm_node *irdma_find_node(struct irdma_cm_core *cm_core,
524521 u16 rem_port, u32 *rem_addr, u16 loc_port,
525522 u32 *loc_addr, u16 vlan_id);
526−enum irdma_status_code irdma_hw_flush_wqes(struct irdma_pci_f *rf,
527− struct irdma_sc_qp *qp,
528− struct irdma_qp_flush_info *info,
529− bool wait);
523+int irdma_hw_flush_wqes(struct irdma_pci_f *rf, struct irdma_sc_qp *qp,
524+ struct irdma_qp_flush_info *info, bool wait);
530525 void irdma_gen_ae(struct irdma_pci_f *rf, struct irdma_sc_qp *qp,
531526 struct irdma_gen_ae_info *info, bool wait);
532527 void irdma_copy_ip_ntohl(u32 *dst, __be32 *src);
drivers/infiniband/hw/irdma/osdep.h+19−22
@@ -5,6 +5,7 @@ · 4 unmodified lines
55
66 #include <linux/pci.h>
77 #include <linux/bitfield.h>
8+#include <linux/net/intel/iidc.h>
89 #include <crypto/hash.h>
910 #include <rdma/ib_verbs.h>
1011
@@ -42,32 +43,28 @@ enum irdma_status_code irdma_vf_wait_vchnl_resp(struct irdma_sc_dev *dev); · 31 unmodified lines
4243 bool irdma_vf_clear_to_send(struct irdma_sc_dev *dev);
4344 void irdma_add_dev_ref(struct irdma_sc_dev *dev);
4445 void irdma_put_dev_ref(struct irdma_sc_dev *dev);
45−enum irdma_status_code irdma_ieq_check_mpacrc(struct shash_desc *desc,
46− void *addr, u32 len, u32 val);
46+int irdma_ieq_check_mpacrc(struct shash_desc *desc, void *addr, u32 len,
47+ u32 val);
4748 struct irdma_sc_qp *irdma_ieq_get_qp(struct irdma_sc_dev *dev,
4849 struct irdma_puda_buf *buf);
4950 void irdma_send_ieq_ack(struct irdma_sc_qp *qp);
5051 void irdma_ieq_update_tcpip_info(struct irdma_puda_buf *buf, u16 len,
5152 u32 seqnum);
5253 void irdma_free_hash_desc(struct shash_desc *hash_desc);
53−enum irdma_status_code irdma_init_hash_desc(struct shash_desc **hash_desc);
54−enum irdma_status_code
55−irdma_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info,
56− struct irdma_puda_buf *buf);
57−enum irdma_status_code irdma_cqp_sds_cmd(struct irdma_sc_dev *dev,
58− struct irdma_update_sds_info *info);
59−enum irdma_status_code
60−irdma_cqp_manage_hmc_fcn_cmd(struct irdma_sc_dev *dev,
61− struct irdma_hmc_fcn_info *hmcfcninfo,
62− u16 *pmf_idx);
63−enum irdma_status_code
64−irdma_cqp_query_fpm_val_cmd(struct irdma_sc_dev *dev,
65− struct irdma_dma_mem *val_mem, u8 hmc_fn_id);
66−enum irdma_status_code
67−irdma_cqp_commit_fpm_val_cmd(struct irdma_sc_dev *dev,
68− struct irdma_dma_mem *val_mem, u8 hmc_fn_id);
69−enum irdma_status_code irdma_alloc_query_fpm_buf(struct irdma_sc_dev *dev,
70− struct irdma_dma_mem *mem);
54+int irdma_init_hash_desc(struct shash_desc **hash_desc);
55+int irdma_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info,
56+ struct irdma_puda_buf *buf);
57+int irdma_cqp_sds_cmd(struct irdma_sc_dev *dev,
58+ struct irdma_update_sds_info *info);
59+int irdma_cqp_manage_hmc_fcn_cmd(struct irdma_sc_dev *dev,
60+ struct irdma_hmc_fcn_info *hmcfcninfo,
61+ u16 *pmf_idx);
62+int irdma_cqp_query_fpm_val_cmd(struct irdma_sc_dev *dev,
63+ struct irdma_dma_mem *val_mem, u8 hmc_fn_id);
64+int irdma_cqp_commit_fpm_val_cmd(struct irdma_sc_dev *dev,
65+ struct irdma_dma_mem *val_mem, u8 hmc_fn_id);
66+int irdma_alloc_query_fpm_buf(struct irdma_sc_dev *dev,
67+ struct irdma_dma_mem *mem);
7168 void *irdma_remove_cqp_head(struct irdma_sc_dev *dev);
7269 void irdma_term_modify_qp(struct irdma_sc_qp *qp, u8 next_state, u8 term,
7370 u8 term_len);
@@ -79,7 +76,7 @@ void irdma_hw_stats_stop_timer(struct irdma_sc_vsi *vsi); · 5 unmodified lines
7976 void wr32(struct irdma_hw *hw, u32 reg, u32 val);
8077 u32 rd32(struct irdma_hw *hw, u32 reg);
8178 u64 rd64(struct irdma_hw *hw, u32 reg);
82−enum irdma_status_code irdma_map_vm_page_list(struct irdma_hw *hw, void *va,
83− dma_addr_t *pg_dma, u32 pg_cnt);
79+int irdma_map_vm_page_list(struct irdma_hw *hw, void *va, dma_addr_t *pg_dma,
80+ u32 pg_cnt);
8481 void irdma_unmap_vm_page_list(struct irdma_hw *hw, dma_addr_t *pg_dma, u32 pg_cnt);
8582 #endif /* IRDMA_OSDEP_H */
drivers/infiniband/hw/irdma/pble.c+34−43
@@ -1,15 +1,13 @@
11 // SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
22 /* Copyright (c) 2015 - 2021 Intel Corporation */
33 #include "osdep.h"
4−#include "status.h"
54 #include "hmc.h"
65 #include "defs.h"
76 #include "type.h"
87 #include "protos.h"
98 #include "pble.h"
109
11−static enum irdma_status_code
12−add_pble_prm(struct irdma_hmc_pble_rsrc *pble_rsrc);
10+static int add_pble_prm(struct irdma_hmc_pble_rsrc *pble_rsrc);
1311
1412 /**
1513 * irdma_destroy_pble_prm - destroy prm during module unload
@@ -35,13 +33,12 @@ void irdma_destroy_pble_prm(struct irdma_hmc_pble_rsrc *pble_rsrc) · 19 unmodified lines
3533 * @dev: irdma_sc_dev struct
3634 * @pble_rsrc: pble resources
3735 */
38−enum irdma_status_code
39−irdma_hmc_init_pble(struct irdma_sc_dev *dev,
40− struct irdma_hmc_pble_rsrc *pble_rsrc)
36+int irdma_hmc_init_pble(struct irdma_sc_dev *dev,
37+ struct irdma_hmc_pble_rsrc *pble_rsrc)
4138 {
4239 struct irdma_hmc_info *hmc_info;
4340 u32 fpm_idx = 0;
44− enum irdma_status_code status = 0;
41+ int status = 0;
4542
4643 hmc_info = dev->hmc_info;
4744 pble_rsrc->dev = dev;
@@ -60,7 +57,7 @@ irdma_hmc_init_pble(struct irdma_sc_dev *dev, · 12 unmodified lines
6057 INIT_LIST_HEAD(&pble_rsrc->pinfo.clist);
6158 if (add_pble_prm(pble_rsrc)) {
6259 irdma_destroy_pble_prm(pble_rsrc);
63− status = IRDMA_ERR_NO_MEMORY;
60+ status = -ENOMEM;
6461 }
6562
6663 return status;
@@ -84,12 +81,11 @@ static void get_sd_pd_idx(struct irdma_hmc_pble_rsrc *pble_rsrc, · 17 unmodified lines
8481 * @pble_rsrc: pble resource ptr
8582 * @info: page info for sd
8683 */
87−static enum irdma_status_code
88−add_sd_direct(struct irdma_hmc_pble_rsrc *pble_rsrc,
89− struct irdma_add_page_info *info)
84+static int add_sd_direct(struct irdma_hmc_pble_rsrc *pble_rsrc,
85+ struct irdma_add_page_info *info)
9086 {
9187 struct irdma_sc_dev *dev = pble_rsrc->dev;
92− enum irdma_status_code ret_code = 0;
88+ int ret_code = 0;
9389 struct sd_pd_idx *idx = &info->idx;
9490 struct irdma_chunk *chunk = info->chunk;
9591 struct irdma_hmc_info *hmc_info = info->hmc_info;
@@ -137,9 +133,8 @@ static u32 fpm_to_idx(struct irdma_hmc_pble_rsrc *pble_rsrc, u64 addr) · 41 unmodified lines
137133 * @pble_rsrc: pble resource management
138134 * @info: page info for sd
139135 */
140−static enum irdma_status_code
141−add_bp_pages(struct irdma_hmc_pble_rsrc *pble_rsrc,
142− struct irdma_add_page_info *info)
136+static int add_bp_pages(struct irdma_hmc_pble_rsrc *pble_rsrc,
137+ struct irdma_add_page_info *info)
143138 {
144139 struct irdma_sc_dev *dev = pble_rsrc->dev;
145140 u8 *addr;
@@ -148,13 +143,13 @@ add_bp_pages(struct irdma_hmc_pble_rsrc *pble_rsrc, · 2 unmodified lines
148143 struct irdma_hmc_sd_entry *sd_entry = info->sd_entry;
149144 struct irdma_hmc_info *hmc_info = info->hmc_info;
150145 struct irdma_chunk *chunk = info->chunk;
151− enum irdma_status_code status = 0;
146+ int status = 0;
152147 u32 rel_pd_idx = info->idx.rel_pd_idx;
153148 u32 pd_idx = info->idx.pd_idx;
154149 u32 i;
155150
156151 if (irdma_pble_get_paged_mem(chunk, info->pages))
157− return IRDMA_ERR_NO_MEMORY;
152+ return -ENOMEM;
158153
159154 status = irdma_add_sd_table_entry(dev->hw, hmc_info, info->idx.sd_idx,
160155 IRDMA_SD_TYPE_PAGED,
@@ -207,8 +202,7 @@ static enum irdma_sd_entry_type irdma_get_type(struct irdma_sc_dev *dev, · 46 unmodified lines
207202 * add_pble_prm - add a sd entry for pble resoure
208203 * @pble_rsrc: pble resource management
209204 */
210−static enum irdma_status_code
211−add_pble_prm(struct irdma_hmc_pble_rsrc *pble_rsrc)
205+static int add_pble_prm(struct irdma_hmc_pble_rsrc *pble_rsrc)
212206 {
213207 struct irdma_sc_dev *dev = pble_rsrc->dev;
214208 struct irdma_hmc_sd_entry *sd_entry;
@@ -216,22 +210,22 @@ add_pble_prm(struct irdma_hmc_pble_rsrc *pble_rsrc) · 1 unmodified line
216210 struct irdma_chunk *chunk;
217211 struct irdma_add_page_info info;
218212 struct sd_pd_idx *idx = &info.idx;
219− enum irdma_status_code ret_code = 0;
213+ int ret_code = 0;
220214 enum irdma_sd_entry_type sd_entry_type;
221215 u64 sd_reg_val = 0;
222216 struct irdma_virt_mem chunkmem;
223217 u32 pages;
224218
225219 if (pble_rsrc->unallocated_pble < PBLE_PER_PAGE)
226− return IRDMA_ERR_NO_MEMORY;
220+ return -ENOMEM;
227221
228222 if (pble_rsrc->next_fpm_addr & 0xfff)
229− return IRDMA_ERR_INVALID_PAGE_DESC_INDEX;
223+ return -EINVAL;
230224
231225 chunkmem.size = sizeof(*chunk);
232226 chunkmem.va = kzalloc(chunkmem.size, GFP_KERNEL);
233227 if (!chunkmem.va)
234− return IRDMA_ERR_NO_MEMORY;
228+ return -ENOMEM;
235229
236230 chunk = chunkmem.va;
237231 chunk->chunkmem = chunkmem;
@@ -337,9 +331,8 @@ static void free_lvl2(struct irdma_hmc_pble_rsrc *pble_rsrc, · 99 unmodified lines
337331 * @pble_rsrc: pble resource management
338332 * @palloc: level 2 pble allocation
339333 */
340−static enum irdma_status_code
341−get_lvl2_pble(struct irdma_hmc_pble_rsrc *pble_rsrc,
342− struct irdma_pble_alloc *palloc)
334+static int get_lvl2_pble(struct irdma_hmc_pble_rsrc *pble_rsrc,
335+ struct irdma_pble_alloc *palloc)
343336 {
344337 u32 lf4k, lflast, total, i;
345338 u32 pblcnt = PBLE_PER_PAGE;
@@ -347,7 +340,7 @@ get_lvl2_pble(struct irdma_hmc_pble_rsrc *pble_rsrc, · 1 unmodified line
347340 struct irdma_pble_level2 *lvl2 = &palloc->level2;
348341 struct irdma_pble_info *root = &lvl2->root;
349342 struct irdma_pble_info *leaf;
350− enum irdma_status_code ret_code;
343+ int ret_code;
351344 u64 fpm_addr;
352345
353346 /* number of full 512 (4K) leafs) */
@@ -359,7 +352,7 @@ get_lvl2_pble(struct irdma_hmc_pble_rsrc *pble_rsrc, · 5 unmodified lines
359352 lvl2->leafmem.size = (sizeof(*leaf) * total);
360353 lvl2->leafmem.va = kzalloc(lvl2->leafmem.size, GFP_KERNEL);
361354 if (!lvl2->leafmem.va)
362− return IRDMA_ERR_NO_MEMORY;
355+ return -ENOMEM;
363356
364357 lvl2->leaf = lvl2->leafmem.va;
365358 leaf = lvl2->leaf;
@@ -368,7 +361,7 @@ get_lvl2_pble(struct irdma_hmc_pble_rsrc *pble_rsrc, · 2 unmodified lines
368361 if (ret_code) {
369362 kfree(lvl2->leafmem.va);
370363 lvl2->leaf = NULL;
371− return IRDMA_ERR_NO_MEMORY;
364+ return -ENOMEM;
372365 }
373366
374367 root->idx = fpm_to_idx(pble_rsrc, fpm_addr);
@@ -397,7 +390,7 @@ get_lvl2_pble(struct irdma_hmc_pble_rsrc *pble_rsrc, · 22 unmodified lines
397390 error:
398391 free_lvl2(pble_rsrc, palloc);
399392
400− return IRDMA_ERR_NO_MEMORY;
393+ return -ENOMEM;
401394 }
402395
403396 /**
@@ -405,11 +398,10 @@ error: · 1 unmodified line
405398 * @pble_rsrc: pble resource management
406399 * @palloc: level 1 pble allocation
407400 */
408−static enum irdma_status_code
409−get_lvl1_pble(struct irdma_hmc_pble_rsrc *pble_rsrc,
410− struct irdma_pble_alloc *palloc)
401+static int get_lvl1_pble(struct irdma_hmc_pble_rsrc *pble_rsrc,
402+ struct irdma_pble_alloc *palloc)
411403 {
412− enum irdma_status_code ret_code;
404+ int ret_code;
413405 u64 fpm_addr;
414406 struct irdma_pble_info *lvl1 = &palloc->level1;
415407
@@ -417,7 +409,7 @@ get_lvl1_pble(struct irdma_hmc_pble_rsrc *pble_rsrc, · 1 unmodified line
417409 palloc->total_cnt << 3, &lvl1->addr,
418410 &fpm_addr);
419411 if (ret_code)
420− return IRDMA_ERR_NO_MEMORY;
412+ return -ENOMEM;
421413
422414 palloc->level = PBLE_LEVEL_1;
423415 lvl1->idx = fpm_to_idx(pble_rsrc, fpm_addr);
@@ -433,11 +425,10 @@ get_lvl1_pble(struct irdma_hmc_pble_rsrc *pble_rsrc, · 9 unmodified lines
433425 * @palloc: contains all inforamtion regarding pble (idx + pble addr)
434426 * @level1_only: flag for a level 1 PBLE
435427 */
436−static enum irdma_status_code
437−get_lvl1_lvl2_pble(struct irdma_hmc_pble_rsrc *pble_rsrc,
438− struct irdma_pble_alloc *palloc, bool level1_only)
428+static int get_lvl1_lvl2_pble(struct irdma_hmc_pble_rsrc *pble_rsrc,
429+ struct irdma_pble_alloc *palloc, bool level1_only)
439430 {
440− enum irdma_status_code status = 0;
431+ int status = 0;
441432
442433 status = get_lvl1_pble(pble_rsrc, palloc);
443434 if (!status || level1_only || palloc->total_cnt <= PBLE_PER_PAGE)
@@ -455,11 +446,11 @@ get_lvl1_lvl2_pble(struct irdma_hmc_pble_rsrc *pble_rsrc, · 11 unmodified lines
455446 * @pble_cnt: #of pbles requested
456447 * @level1_only: true if only pble level 1 to acquire
457448 */
458−enum irdma_status_code irdma_get_pble(struct irdma_hmc_pble_rsrc *pble_rsrc,
459− struct irdma_pble_alloc *palloc,
460− u32 pble_cnt, bool level1_only)
449+int irdma_get_pble(struct irdma_hmc_pble_rsrc *pble_rsrc,
450+ struct irdma_pble_alloc *palloc, u32 pble_cnt,
451+ bool level1_only)
461452 {
462− enum irdma_status_code status = 0;
453+ int status = 0;
463454 int max_sds = 0;
464455 int i;
465456
drivers/infiniband/hw/irdma/pble.h+11−14
@@ -108,20 +108,18 @@ struct irdma_hmc_pble_rsrc { · 107 unmodified lines
108108 };
109109
110110 void irdma_destroy_pble_prm(struct irdma_hmc_pble_rsrc *pble_rsrc);
111−enum irdma_status_code
112−irdma_hmc_init_pble(struct irdma_sc_dev *dev,
113− struct irdma_hmc_pble_rsrc *pble_rsrc);
111+int irdma_hmc_init_pble(struct irdma_sc_dev *dev,
112+ struct irdma_hmc_pble_rsrc *pble_rsrc);
114113 void irdma_free_pble(struct irdma_hmc_pble_rsrc *pble_rsrc,
115114 struct irdma_pble_alloc *palloc);
116−enum irdma_status_code irdma_get_pble(struct irdma_hmc_pble_rsrc *pble_rsrc,
117− struct irdma_pble_alloc *palloc,
118− u32 pble_cnt, bool level1_only);
119−enum irdma_status_code irdma_prm_add_pble_mem(struct irdma_pble_prm *pprm,
120− struct irdma_chunk *pchunk);
121−enum irdma_status_code
122−irdma_prm_get_pbles(struct irdma_pble_prm *pprm,
123− struct irdma_pble_chunkinfo *chunkinfo, u64 mem_size,
124− u64 **vaddr, u64 *fpm_addr);
115+int irdma_get_pble(struct irdma_hmc_pble_rsrc *pble_rsrc,
116+ struct irdma_pble_alloc *palloc, u32 pble_cnt,
117+ bool level1_only);
118+int irdma_prm_add_pble_mem(struct irdma_pble_prm *pprm,
119+ struct irdma_chunk *pchunk);
120+int irdma_prm_get_pbles(struct irdma_pble_prm *pprm,
121+ struct irdma_pble_chunkinfo *chunkinfo, u64 mem_size,
122+ u64 **vaddr, u64 *fpm_addr);
125123 void irdma_prm_return_pbles(struct irdma_pble_prm *pprm,
126124 struct irdma_pble_chunkinfo *chunkinfo);
127125 void irdma_pble_acquire_lock(struct irdma_hmc_pble_rsrc *pble_rsrc,
@@ -129,7 +127,6 @@ void irdma_pble_acquire_lock(struct irdma_hmc_pble_rsrc *pble_rsrc, · 1 unmodified line
129127 void irdma_pble_release_lock(struct irdma_hmc_pble_rsrc *pble_rsrc,
130128 unsigned long *flags);
131129 void irdma_pble_free_paged_mem(struct irdma_chunk *chunk);
132−enum irdma_status_code irdma_pble_get_paged_mem(struct irdma_chunk *chunk,
133− u32 pg_cnt);
130+int irdma_pble_get_paged_mem(struct irdma_chunk *chunk, u32 pg_cnt);
134131 void irdma_prm_rem_bitmapmem(struct irdma_hw *hw, struct irdma_chunk *chunk);
135132 #endif /* IRDMA_PBLE_H */
drivers/infiniband/hw/irdma/protos.h+39−51
@@ -12,58 +12,51 @@ · 11 unmodified lines
1212 #define CQP_TIMEOUT_THRESHOLD 500
1313
1414 /* init operations */
15−enum irdma_status_code irdma_sc_dev_init(enum irdma_vers ver,
16− struct irdma_sc_dev *dev,
17− struct irdma_device_init_info *info);
15+int irdma_sc_dev_init(enum irdma_vers ver, struct irdma_sc_dev *dev,
16+ struct irdma_device_init_info *info);
1817 void irdma_sc_rt_init(struct irdma_sc_dev *dev);
1918 void irdma_sc_cqp_post_sq(struct irdma_sc_cqp *cqp);
2019 __le64 *irdma_sc_cqp_get_next_send_wqe(struct irdma_sc_cqp *cqp, u64 scratch);
21−enum irdma_status_code
22−irdma_sc_mr_fast_register(struct irdma_sc_qp *qp,
23− struct irdma_fast_reg_stag_info *info, bool post_sq);
20+int irdma_sc_mr_fast_register(struct irdma_sc_qp *qp,
21+ struct irdma_fast_reg_stag_info *info,
22+ bool post_sq);
2423 /* HMC/FPM functions */
25−enum irdma_status_code irdma_sc_init_iw_hmc(struct irdma_sc_dev *dev,
26− u8 hmc_fn_id);
24+int irdma_sc_init_iw_hmc(struct irdma_sc_dev *dev, u8 hmc_fn_id);
2725 /* stats misc */
28−enum irdma_status_code
29−irdma_cqp_gather_stats_cmd(struct irdma_sc_dev *dev,
30− struct irdma_vsi_pestat *pestat, bool wait);
26+int irdma_cqp_gather_stats_cmd(struct irdma_sc_dev *dev,
27+ struct irdma_vsi_pestat *pestat, bool wait);
3128 void irdma_cqp_gather_stats_gen1(struct irdma_sc_dev *dev,
3229 struct irdma_vsi_pestat *pestat);
3330 void irdma_hw_stats_read_all(struct irdma_vsi_pestat *stats,
3431 struct irdma_dev_hw_stats *stats_values,
3532 u64 *hw_stats_regs_32, u64 *hw_stats_regs_64,
3633 u8 hw_rev);
37−enum irdma_status_code
38−irdma_cqp_ws_node_cmd(struct irdma_sc_dev *dev, u8 cmd,
39− struct irdma_ws_node_info *node_info);
40−enum irdma_status_code irdma_cqp_ceq_cmd(struct irdma_sc_dev *dev,
41− struct irdma_sc_ceq *sc_ceq, u8 op);
42−enum irdma_status_code irdma_cqp_aeq_cmd(struct irdma_sc_dev *dev,
43− struct irdma_sc_aeq *sc_aeq, u8 op);
44−enum irdma_status_code
45−irdma_cqp_stats_inst_cmd(struct irdma_sc_vsi *vsi, u8 cmd,
46− struct irdma_stats_inst_info *stats_info);
34+int irdma_cqp_ws_node_cmd(struct irdma_sc_dev *dev, u8 cmd,
35+ struct irdma_ws_node_info *node_info);
36+int irdma_cqp_ceq_cmd(struct irdma_sc_dev *dev, struct irdma_sc_ceq *sc_ceq,
37+ u8 op);
38+int irdma_cqp_aeq_cmd(struct irdma_sc_dev *dev, struct irdma_sc_aeq *sc_aeq,
39+ u8 op);
40+int irdma_cqp_stats_inst_cmd(struct irdma_sc_vsi *vsi, u8 cmd,
41+ struct irdma_stats_inst_info *stats_info);
4742 u16 irdma_alloc_ws_node_id(struct irdma_sc_dev *dev);
4843 void irdma_free_ws_node_id(struct irdma_sc_dev *dev, u16 node_id);
4944 void irdma_update_stats(struct irdma_dev_hw_stats *hw_stats,
5045 struct irdma_gather_stats *gather_stats,
5146 struct irdma_gather_stats *last_gather_stats);
5247 /* vsi functions */
53−enum irdma_status_code irdma_vsi_stats_init(struct irdma_sc_vsi *vsi,
54− struct irdma_vsi_stats_info *info);
48+int irdma_vsi_stats_init(struct irdma_sc_vsi *vsi,
49+ struct irdma_vsi_stats_info *info);
5550 void irdma_vsi_stats_free(struct irdma_sc_vsi *vsi);
5651 void irdma_sc_vsi_init(struct irdma_sc_vsi *vsi,
5752 struct irdma_vsi_init_info *info);
58−enum irdma_status_code irdma_sc_add_cq_ctx(struct irdma_sc_ceq *ceq,
59− struct irdma_sc_cq *cq);
53+int irdma_sc_add_cq_ctx(struct irdma_sc_ceq *ceq, struct irdma_sc_cq *cq);
6054 void irdma_sc_remove_cq_ctx(struct irdma_sc_ceq *ceq, struct irdma_sc_cq *cq);
6155 /* misc L2 param change functions */
6256 void irdma_change_l2params(struct irdma_sc_vsi *vsi,
6357 struct irdma_l2params *l2params);
6458 void irdma_sc_suspend_resume_qps(struct irdma_sc_vsi *vsi, u8 suspend);
65−enum irdma_status_code irdma_cqp_qp_suspend_resume(struct irdma_sc_qp *qp,
66− u8 cmd);
59+int irdma_cqp_qp_suspend_resume(struct irdma_sc_qp *qp, u8 cmd);
6760 void irdma_qp_add_qos(struct irdma_sc_qp *qp);
6861 void irdma_qp_rem_qos(struct irdma_sc_qp *qp);
6962 struct irdma_sc_qp *irdma_get_qp_from_list(struct list_head *head,
@@ -81,31 +74,26 @@ void irdma_terminate_received(struct irdma_sc_qp *qp, · 11 unmodified lines
8174 /* misc */
8275 u8 irdma_get_encoded_wqe_size(u32 wqsize, enum irdma_queue_type queue_type);
8376 void irdma_modify_qp_to_err(struct irdma_sc_qp *sc_qp);
84−enum irdma_status_code
85−irdma_sc_static_hmc_pages_allocated(struct irdma_sc_cqp *cqp, u64 scratch,
86− u8 hmc_fn_id, bool post_sq,
87− bool poll_registers);
88−enum irdma_status_code irdma_cfg_fpm_val(struct irdma_sc_dev *dev,
89− u32 qp_count);
90−enum irdma_status_code irdma_get_rdma_features(struct irdma_sc_dev *dev);
77+int irdma_sc_static_hmc_pages_allocated(struct irdma_sc_cqp *cqp, u64 scratch,
78+ u8 hmc_fn_id, bool post_sq,
79+ bool poll_registers);
80+int irdma_cfg_fpm_val(struct irdma_sc_dev *dev, u32 qp_count);
81+int irdma_get_rdma_features(struct irdma_sc_dev *dev);
9182 void free_sd_mem(struct irdma_sc_dev *dev);
92−enum irdma_status_code irdma_process_cqp_cmd(struct irdma_sc_dev *dev,
93− struct cqp_cmds_info *pcmdinfo);
94−enum irdma_status_code irdma_process_bh(struct irdma_sc_dev *dev);
95−enum irdma_status_code irdma_cqp_sds_cmd(struct irdma_sc_dev *dev,
96− struct irdma_update_sds_info *info);
97−enum irdma_status_code
98−irdma_cqp_query_fpm_val_cmd(struct irdma_sc_dev *dev,
99− struct irdma_dma_mem *val_mem, u8 hmc_fn_id);
100−enum irdma_status_code
101−irdma_cqp_commit_fpm_val_cmd(struct irdma_sc_dev *dev,
102− struct irdma_dma_mem *val_mem, u8 hmc_fn_id);
103−enum irdma_status_code irdma_alloc_query_fpm_buf(struct irdma_sc_dev *dev,
104− struct irdma_dma_mem *mem);
105−enum irdma_status_code
106−irdma_cqp_manage_hmc_fcn_cmd(struct irdma_sc_dev *dev,
107− struct irdma_hmc_fcn_info *hmcfcninfo,
108− u16 *pmf_idx);
83+int irdma_process_cqp_cmd(struct irdma_sc_dev *dev,
84+ struct cqp_cmds_info *pcmdinfo);
85+int irdma_process_bh(struct irdma_sc_dev *dev);
86+int irdma_cqp_sds_cmd(struct irdma_sc_dev *dev,
87+ struct irdma_update_sds_info *info);
88+int irdma_cqp_query_fpm_val_cmd(struct irdma_sc_dev *dev,
89+ struct irdma_dma_mem *val_mem, u8 hmc_fn_id);
90+int irdma_cqp_commit_fpm_val_cmd(struct irdma_sc_dev *dev,
91+ struct irdma_dma_mem *val_mem, u8 hmc_fn_id);
92+int irdma_alloc_query_fpm_buf(struct irdma_sc_dev *dev,
93+ struct irdma_dma_mem *mem);
94+int irdma_cqp_manage_hmc_fcn_cmd(struct irdma_sc_dev *dev,
95+ struct irdma_hmc_fcn_info *hmcfcninfo,
96+ u16 *pmf_idx);
10997 void irdma_add_dev_ref(struct irdma_sc_dev *dev);
11098 void irdma_put_dev_ref(struct irdma_sc_dev *dev);
11199 void *irdma_remove_cqp_head(struct irdma_sc_dev *dev);
drivers/infiniband/hw/irdma/puda.c+62−70
@@ -1,7 +1,6 @@
11 // SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
22 /* Copyright (c) 2015 - 2021 Intel Corporation */
33 #include "osdep.h"
4−#include "status.h"
54 #include "hmc.h"
65 #include "defs.h"
76 #include "type.h"
@@ -114,8 +113,7 @@ static void irdma_puda_post_recvbuf(struct irdma_puda_rsrc *rsrc, u32 wqe_idx, · 106 unmodified lines
114113 * @rsrc: resource to use for buffer
115114 * @initial: flag if during init time
116115 */
117−static enum irdma_status_code
118−irdma_puda_replenish_rq(struct irdma_puda_rsrc *rsrc, bool initial)
116+static int irdma_puda_replenish_rq(struct irdma_puda_rsrc *rsrc, bool initial)
119117 {
120118 u32 i;
121119 u32 invalid_cnt = rsrc->rxq_invalid_cnt;
@@ -124,7 +122,7 @@ irdma_puda_replenish_rq(struct irdma_puda_rsrc *rsrc, bool initial) · 2 unmodified lines
124122 for (i = 0; i < invalid_cnt; i++) {
125123 buf = irdma_puda_get_bufpool(rsrc);
126124 if (!buf)
127− return IRDMA_ERR_list_empty;
125+ return -ENOBUFS;
128126 irdma_puda_post_recvbuf(rsrc, rsrc->rx_wqe_idx, buf, initial);
129127 rsrc->rx_wqe_idx = ((rsrc->rx_wqe_idx + 1) % rsrc->rq_size);
130128 rsrc->rxq_invalid_cnt--;
@@ -194,7 +192,7 @@ static __le64 *irdma_puda_get_next_send_wqe(struct irdma_qp_uk *qp, · 63 unmodified lines
194192 u32 *wqe_idx)
195193 {
196194 __le64 *wqe = NULL;
197− enum irdma_status_code ret_code = 0;
195+ int ret_code = 0;
198196
199197 *wqe_idx = IRDMA_RING_CURRENT_HEAD(qp->sq_ring);
200198 if (!*wqe_idx)
@@ -213,8 +211,8 @@ static __le64 *irdma_puda_get_next_send_wqe(struct irdma_qp_uk *qp, · 12 unmodified lines
213211 * @cq: cq for poll
214212 * @info: info return for successful completion
215213 */
216−static enum irdma_status_code
217−irdma_puda_poll_info(struct irdma_sc_cq *cq, struct irdma_puda_cmpl_info *info)
214+static int irdma_puda_poll_info(struct irdma_sc_cq *cq,
215+ struct irdma_puda_cmpl_info *info)
218216 {
219217 struct irdma_cq_uk *cq_uk = &cq->cq_uk;
220218 u64 qword0, qword2, qword3, qword6;
@@ -233,7 +231,7 @@ irdma_puda_poll_info(struct irdma_sc_cq *cq, struct irdma_puda_cmpl_info *info) · 12 unmodified lines
233231 get_64bit_val(cqe, 24, &qword3);
234232 valid_bit = (bool)FIELD_GET(IRDMA_CQ_VALID, qword3);
235233 if (valid_bit != cq_uk->polarity)
236− return IRDMA_ERR_Q_EMPTY;
234+ return -ENOENT;
237235
238236 if (cq->dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
239237 ext_valid = (bool)FIELD_GET(IRDMA_CQ_EXTCQE, qword3);
@@ -246,7 +244,7 @@ irdma_puda_poll_info(struct irdma_sc_cq *cq, struct irdma_puda_cmpl_info *info) · 6 unmodified lines
246244 if (!peek_head)
247245 polarity ^= 1;
248246 if (polarity != cq_uk->polarity)
249− return IRDMA_ERR_Q_EMPTY;
247+ return -ENOENT;
250248
251249 IRDMA_RING_MOVE_HEAD_NOCHECK(cq_uk->cq_ring);
252250 if (!IRDMA_RING_CURRENT_HEAD(cq_uk->cq_ring))
@@ -267,7 +265,7 @@ irdma_puda_poll_info(struct irdma_sc_cq *cq, struct irdma_puda_cmpl_info *info) · 14 unmodified lines
267265 major_err = (u32)(FIELD_GET(IRDMA_CQ_MAJERR, qword3));
268266 minor_err = (u32)(FIELD_GET(IRDMA_CQ_MINERR, qword3));
269267 info->compl_error = major_err << 16 | minor_err;
270− return IRDMA_ERR_CQ_COMPL_ERROR;
268+ return -EIO;
271269 }
272270
273271 get_64bit_val(cqe, 0, &qword0);
@@ -319,14 +317,13 @@ irdma_puda_poll_info(struct irdma_sc_cq *cq, struct irdma_puda_cmpl_info *info) · 45 unmodified lines
319317 * @cq: cq getting interrupt
320318 * @compl_err: return any completion err
321319 */
322−enum irdma_status_code irdma_puda_poll_cmpl(struct irdma_sc_dev *dev,
323− struct irdma_sc_cq *cq,
324− u32 *compl_err)
320+int irdma_puda_poll_cmpl(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq,
321+ u32 *compl_err)
325322 {
326323 struct irdma_qp_uk *qp;
327324 struct irdma_cq_uk *cq_uk = &cq->cq_uk;
328325 struct irdma_puda_cmpl_info info = {};
329− enum irdma_status_code ret = 0;
326+ int ret = 0;
330327 struct irdma_puda_buf *buf;
331328 struct irdma_puda_rsrc *rsrc;
332329 u8 cq_type = cq->cq_type;
@@ -337,24 +334,24 @@ enum irdma_status_code irdma_puda_poll_cmpl(struct irdma_sc_dev *dev, · 4 unmodified lines
337334 cq->vsi->ieq;
338335 } else {
339336 ibdev_dbg(to_ibdev(dev), "PUDA: qp_type error\n");
340− return IRDMA_ERR_BAD_PTR;
337+ return -EINVAL;
341338 }
342339
343340 ret = irdma_puda_poll_info(cq, &info);
344341 *compl_err = info.compl_error;
345− if (ret == IRDMA_ERR_Q_EMPTY)
342+ if (ret == -ENOENT)
346343 return ret;
347344 if (ret)
348345 goto done;
349346
350347 qp = info.qp;
351348 if (!qp || !rsrc) {
352− ret = IRDMA_ERR_BAD_PTR;
349+ ret = -EFAULT;
353350 goto done;
354351 }
355352
356353 if (qp->qp_id != rsrc->qp_id) {
357− ret = IRDMA_ERR_BAD_PTR;
354+ ret = -EFAULT;
358355 goto done;
359356 }
360357
@@ -422,8 +419,7 @@ done: · 61 unmodified lines
422419 * @qp: puda qp for send
423420 * @info: buffer information for transmit
424421 */
425−enum irdma_status_code irdma_puda_send(struct irdma_sc_qp *qp,
426− struct irdma_puda_send_info *info)
422+int irdma_puda_send(struct irdma_sc_qp *qp, struct irdma_puda_send_info *info)
427423 {
428424 __le64 *wqe;
429425 u32 iplen, l4len;
@@ -443,7 +439,7 @@ enum irdma_status_code irdma_puda_send(struct irdma_sc_qp *qp, · 13 unmodified lines
443439
444440 wqe = irdma_puda_get_next_send_wqe(&qp->qp_uk, &wqe_idx);
445441 if (!wqe)
446− return IRDMA_ERR_QP_TOOMANY_WRS_POSTED;
442+ return -ENOMEM;
447443
448444 qp->qp_uk.sq_wrtrk_array[wqe_idx].wrid = (uintptr_t)info->scratch;
449445 /* Third line of WQE descriptor */
@@ -503,7 +499,7 @@ void irdma_puda_send_buf(struct irdma_puda_rsrc *rsrc, · 53 unmodified lines
503499 struct irdma_puda_buf *buf)
504500 {
505501 struct irdma_puda_send_info info;
506− enum irdma_status_code ret = 0;
502+ int ret = 0;
507503 unsigned long flags;
508504
509505 spin_lock_irqsave(&rsrc->bufpool_lock, flags);
@@ -603,19 +599,18 @@ static void irdma_puda_qp_setctx(struct irdma_puda_rsrc *rsrc) · 93 unmodified lines
603599 * @dev: Device
604600 * @qp: Resource qp
605601 */
606−static enum irdma_status_code irdma_puda_qp_wqe(struct irdma_sc_dev *dev,
607− struct irdma_sc_qp *qp)
602+static int irdma_puda_qp_wqe(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp)
608603 {
609604 struct irdma_sc_cqp *cqp;
610605 __le64 *wqe;
611606 u64 hdr;
612607 struct irdma_ccq_cqe_info compl_info;
613− enum irdma_status_code status = 0;
608+ int status = 0;
614609
615610 cqp = dev->cqp;
616611 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, 0);
617612 if (!wqe)
618− return IRDMA_ERR_RING_FULL;
613+ return -ENOMEM;
619614
620615 set_64bit_val(wqe, 16, qp->hw_host_ctx_pa);
621616 set_64bit_val(wqe, 40, qp->shadow_area_pa);
@@ -643,11 +638,11 @@ static enum irdma_status_code irdma_puda_qp_wqe(struct irdma_sc_dev *dev, · 21 unmodified lines
643638 * irdma_puda_qp_create - create qp for resource
644639 * @rsrc: resource to use for buffer
645640 */
646−static enum irdma_status_code irdma_puda_qp_create(struct irdma_puda_rsrc *rsrc)
641+static int irdma_puda_qp_create(struct irdma_puda_rsrc *rsrc)
647642 {
648643 struct irdma_sc_qp *qp = &rsrc->qp;
649644 struct irdma_qp_uk *ukqp = &qp->qp_uk;
650− enum irdma_status_code ret = 0;
645+ int ret = 0;
651646 u32 sq_size, rq_size;
652647 struct irdma_dma_mem *mem;
653648
@@ -659,7 +654,7 @@ static enum irdma_status_code irdma_puda_qp_create(struct irdma_puda_rsrc *rsrc) · 5 unmodified lines
659654 rsrc->qpmem.size, &rsrc->qpmem.pa,
660655 GFP_KERNEL);
661656 if (!rsrc->qpmem.va)
662− return IRDMA_ERR_NO_MEMORY;
657+ return -ENOMEM;
663658
664659 mem = &rsrc->qpmem;
665660 memset(mem->va, 0, rsrc->qpmem.size);
@@ -722,19 +717,18 @@ static enum irdma_status_code irdma_puda_qp_create(struct irdma_puda_rsrc *rsrc) · 56 unmodified lines
722717 * @dev: Device
723718 * @cq: resource for cq
724719 */
725−static enum irdma_status_code irdma_puda_cq_wqe(struct irdma_sc_dev *dev,
726− struct irdma_sc_cq *cq)
720+static int irdma_puda_cq_wqe(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq)
727721 {
728722 __le64 *wqe;
729723 struct irdma_sc_cqp *cqp;
730724 u64 hdr;
731725 struct irdma_ccq_cqe_info compl_info;
732− enum irdma_status_code status = 0;
726+ int status = 0;
733727
734728 cqp = dev->cqp;
735729 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, 0);
736730 if (!wqe)
737− return IRDMA_ERR_RING_FULL;
731+ return -ENOMEM;
738732
739733 set_64bit_val(wqe, 0, cq->cq_uk.cq_size);
740734 set_64bit_val(wqe, 8, (uintptr_t)cq >> 1);
@@ -775,11 +769,11 @@ static enum irdma_status_code irdma_puda_cq_wqe(struct irdma_sc_dev *dev, · 34 unmodified lines
775769 * irdma_puda_cq_create - create cq for resource
776770 * @rsrc: resource for which cq to create
777771 */
778−static enum irdma_status_code irdma_puda_cq_create(struct irdma_puda_rsrc *rsrc)
772+static int irdma_puda_cq_create(struct irdma_puda_rsrc *rsrc)
779773 {
780774 struct irdma_sc_dev *dev = rsrc->dev;
781775 struct irdma_sc_cq *cq = &rsrc->cq;
782− enum irdma_status_code ret = 0;
776+ int ret = 0;
783777 u32 cqsize;
784778 struct irdma_dma_mem *mem;
785779 struct irdma_cq_init_info info = {};
@@ -792,7 +786,7 @@ static enum irdma_status_code irdma_puda_cq_create(struct irdma_puda_rsrc *rsrc) · 6 unmodified lines
792786 rsrc->cqmem.va = dma_alloc_coherent(dev->hw->device, rsrc->cqmem.size,
793787 &rsrc->cqmem.pa, GFP_KERNEL);
794788 if (!rsrc->cqmem.va)
795− return IRDMA_ERR_NO_MEMORY;
789+ return -ENOMEM;
796790
797791 mem = &rsrc->cqmem;
798792 info.dev = dev;
@@ -833,7 +827,7 @@ error: · 34 unmodified lines
833827 */
834828 static void irdma_puda_free_qp(struct irdma_puda_rsrc *rsrc)
835829 {
836− enum irdma_status_code ret;
830+ int ret;
837831 struct irdma_ccq_cqe_info compl_info;
838832 struct irdma_sc_dev *dev = rsrc->dev;
839833
@@ -865,7 +859,7 @@ static void irdma_puda_free_qp(struct irdma_puda_rsrc *rsrc) · 25 unmodified lines
865859 */
866860 static void irdma_puda_free_cq(struct irdma_puda_rsrc *rsrc)
867861 {
868− enum irdma_status_code ret;
862+ int ret;
869863 struct irdma_ccq_cqe_info compl_info;
870864 struct irdma_sc_dev *dev = rsrc->dev;
871865
@@ -967,8 +961,7 @@ void irdma_puda_dele_rsrc(struct irdma_sc_vsi *vsi, enum puda_rsrc_type type, · 95 unmodified lines
967961 * @rsrc: resource for buffer allocation
968962 * @count: number of buffers to create
969963 */
970−static enum irdma_status_code irdma_puda_allocbufs(struct irdma_puda_rsrc *rsrc,
971− u32 count)
964+static int irdma_puda_allocbufs(struct irdma_puda_rsrc *rsrc, u32 count)
972965 {
973966 u32 i;
974967 struct irdma_puda_buf *buf;
@@ -978,7 +971,7 @@ static enum irdma_status_code irdma_puda_allocbufs(struct irdma_puda_rsrc *rsrc, · 3 unmodified lines
978971 buf = irdma_puda_alloc_buf(rsrc->dev, rsrc->buf_size);
979972 if (!buf) {
980973 rsrc->stats_buf_alloc_fail++;
981− return IRDMA_ERR_NO_MEMORY;
974+ return -ENOMEM;
982975 }
983976 irdma_puda_ret_bufpool(rsrc, buf);
984977 rsrc->alloc_buf_count++;
@@ -1001,11 +994,11 @@ static enum irdma_status_code irdma_puda_allocbufs(struct irdma_puda_rsrc *rsrc, · 16 unmodified lines
1001994 * @vsi: sc VSI struct
1002995 * @info: resource information
1003996 */
1004−enum irdma_status_code irdma_puda_create_rsrc(struct irdma_sc_vsi *vsi,
1005− struct irdma_puda_rsrc_info *info)
997+int irdma_puda_create_rsrc(struct irdma_sc_vsi *vsi,
998+ struct irdma_puda_rsrc_info *info)
1006999 {
10071000 struct irdma_sc_dev *dev = vsi->dev;
1008− enum irdma_status_code ret = 0;
1001+ int ret = 0;
10091002 struct irdma_puda_rsrc *rsrc;
10101003 u32 pudasize;
10111004 u32 sqwridsize, rqwridsize;
@@ -1023,12 +1016,12 @@ enum irdma_status_code irdma_puda_create_rsrc(struct irdma_sc_vsi *vsi, · 11 unmodified lines
10231016 vmem = &vsi->ieq_mem;
10241017 break;
10251018 default:
1026− return IRDMA_NOT_SUPPORTED;
1019+ return -EOPNOTSUPP;
10271020 }
10281021 vmem->size = pudasize + sqwridsize + rqwridsize;
10291022 vmem->va = kzalloc(vmem->size, GFP_KERNEL);
10301023 if (!vmem->va)
1031− return IRDMA_ERR_NO_MEMORY;
1024+ return -ENOMEM;
10321025
10331026 rsrc = vmem->va;
10341027 spin_lock_init(&rsrc->bufpool_lock);
@@ -1046,7 +1039,7 @@ enum irdma_status_code irdma_puda_create_rsrc(struct irdma_sc_vsi *vsi, · 11 unmodified lines
10461039 rsrc->xmit_complete = irdma_ieq_tx_compl;
10471040 break;
10481041 default:
1049− return IRDMA_NOT_SUPPORTED;
1042+ return -EOPNOTSUPP;
10501043 }
10511044
10521045 rsrc->type = info->type;
@@ -1323,12 +1316,12 @@ static void irdma_ieq_compl_pfpdu(struct irdma_puda_rsrc *ieq, · 270 unmodified lines
13231316 * @buf: first receive buffer
13241317 * @fpdu_len: total length of fpdu
13251318 */
1326−static enum irdma_status_code
1327−irdma_ieq_create_pbufl(struct irdma_pfpdu *pfpdu, struct list_head *rxlist,
1328− struct list_head *pbufl, struct irdma_puda_buf *buf,
1329− u16 fpdu_len)
1319+static int irdma_ieq_create_pbufl(struct irdma_pfpdu *pfpdu,
1320+ struct list_head *rxlist,
1321+ struct list_head *pbufl,
1322+ struct irdma_puda_buf *buf, u16 fpdu_len)
13301323 {
1331− enum irdma_status_code status = 0;
1324+ int status = 0;
13321325 struct irdma_puda_buf *nextbuf;
13331326 u32 nextseqnum;
13341327 u16 plen = fpdu_len - buf->datalen;
@@ -1338,13 +1331,13 @@ irdma_ieq_create_pbufl(struct irdma_pfpdu *pfpdu, struct list_head *rxlist, · 3 unmodified lines
13381331 do {
13391332 nextbuf = irdma_puda_get_listbuf(rxlist);
13401333 if (!nextbuf) {
1341− status = IRDMA_ERR_list_empty;
1334+ status = -ENOBUFS;
13421335 break;
13431336 }
13441337 list_add_tail(&nextbuf->list, pbufl);
13451338 if (nextbuf->seqnum != nextseqnum) {
13461339 pfpdu->bad_seq_num++;
1347− status = IRDMA_ERR_SEQ_NUM;
1340+ status = -ERANGE;
13481341 break;
13491342 }
13501343 if (nextbuf->datalen >= plen) {
@@ -1366,11 +1359,11 @@ irdma_ieq_create_pbufl(struct irdma_pfpdu *pfpdu, struct list_head *rxlist, · 15 unmodified lines
13661359 * @buf: receive buffer
13671360 * @fpdu_len: fpdu len in the buffer
13681361 */
1369−static enum irdma_status_code
1370−irdma_ieq_handle_partial(struct irdma_puda_rsrc *ieq, struct irdma_pfpdu *pfpdu,
1371− struct irdma_puda_buf *buf, u16 fpdu_len)
1362+static int irdma_ieq_handle_partial(struct irdma_puda_rsrc *ieq,
1363+ struct irdma_pfpdu *pfpdu,
1364+ struct irdma_puda_buf *buf, u16 fpdu_len)
13721365 {
1373− enum irdma_status_code status = 0;
1366+ int status = 0;
13741367 u8 *crcptr;
13751368 u32 mpacrc;
13761369 u32 seqnum = buf->seqnum;
@@ -1390,7 +1383,7 @@ irdma_ieq_handle_partial(struct irdma_puda_rsrc *ieq, struct irdma_pfpdu *pfpdu, · 13 unmodified lines
13901383 txbuf = irdma_puda_get_bufpool(ieq);
13911384 if (!txbuf) {
13921385 pfpdu->no_tx_bufs++;
1393− status = IRDMA_ERR_NO_TXBUFS;
1386+ status = -ENOBUFS;
13941387 goto error;
13951388 }
13961389
@@ -1434,9 +1427,9 @@ error: · 37 unmodified lines
14341427 * @pfpdu: partial management per user qp
14351428 * @buf: receive buffer
14361429 */
1437−static enum irdma_status_code irdma_ieq_process_buf(struct irdma_puda_rsrc *ieq,
1438− struct irdma_pfpdu *pfpdu,
1439− struct irdma_puda_buf *buf)
1430+static int irdma_ieq_process_buf(struct irdma_puda_rsrc *ieq,
1431+ struct irdma_pfpdu *pfpdu,
1432+ struct irdma_puda_buf *buf)
14401433 {
14411434 u16 fpdu_len = 0;
14421435 u16 datalen = buf->datalen;
@@ -1450,7 +1443,7 @@ static enum irdma_status_code irdma_ieq_process_buf(struct irdma_puda_rsrc *ieq, · 7 unmodified lines
14501443 bool partial = false;
14511444 struct irdma_puda_buf *txbuf;
14521445 struct list_head *rxlist = &pfpdu->rxlist;
1453− enum irdma_status_code ret = 0;
1446+ int ret = 0;
14541447
14551448 ioffset = (u16)(buf->data - (u8 *)buf->mem.va);
14561449 while (datalen) {
@@ -1459,7 +1452,7 @@ static enum irdma_status_code irdma_ieq_process_buf(struct irdma_puda_rsrc *ieq, · 2 unmodified lines
14591452 ibdev_dbg(to_ibdev(ieq->dev),
14601453 "IEQ: error bad fpdu len\n");
14611454 list_add(&buf->list, rxlist);
1462− return IRDMA_ERR_MPA_CRC;
1455+ return -EINVAL;
14631456 }
14641457
14651458 if (datalen < fpdu_len) {
@@ -1475,7 +1468,7 @@ static enum irdma_status_code irdma_ieq_process_buf(struct irdma_puda_rsrc *ieq, · 9 unmodified lines
14751468 list_add(&buf->list, rxlist);
14761469 ibdev_dbg(to_ibdev(ieq->dev),
14771470 "ERR: IRDMA_ERR_MPA_CRC\n");
1478− return IRDMA_ERR_MPA_CRC;
1471+ return -EINVAL;
14791472 }
14801473 full++;
14811474 pfpdu->fpdu_processed++;
@@ -1490,7 +1483,7 @@ static enum irdma_status_code irdma_ieq_process_buf(struct irdma_puda_rsrc *ieq, · 8 unmodified lines
14901483 if (!txbuf) {
14911484 pfpdu->no_tx_bufs++;
14921485 list_add(&buf->list, rxlist);
1493− return IRDMA_ERR_NO_TXBUFS;
1486+ return -ENOBUFS;
14941487 }
14951488 /* modify txbuf's buffer header */
14961489 irdma_ieq_setup_tx_buf(buf, txbuf);
@@ -1539,7 +1532,7 @@ void irdma_ieq_process_fpdus(struct irdma_sc_qp *qp, · 42 unmodified lines
15391532 struct irdma_pfpdu *pfpdu = &qp->pfpdu;
15401533 struct list_head *rxlist = &pfpdu->rxlist;
15411534 struct irdma_puda_buf *buf;
1542− enum irdma_status_code status;
1535+ int status;
15431536
15441537 do {
15451538 if (list_empty(rxlist))
@@ -1557,7 +1550,7 @@ void irdma_ieq_process_fpdus(struct irdma_sc_qp *qp, · 11 unmodified lines
15571550 }
15581551 /* keep processing buffers from the head of the list */
15591552 status = irdma_ieq_process_buf(ieq, pfpdu, buf);
1560− if (status == IRDMA_ERR_MPA_CRC) {
1553+ if (status == -EINVAL) {
15611554 pfpdu->mpa_crc_err = true;
15621555 while (!list_empty(rxlist)) {
15631556 buf = irdma_puda_get_listbuf(rxlist);
@@ -1576,8 +1569,7 @@ void irdma_ieq_process_fpdus(struct irdma_sc_qp *qp, · 12 unmodified lines
15761569 * @qp: qp pointer
15771570 * @buf: buf received on IEQ used to create AH
15781571 */
1579−static enum irdma_status_code irdma_ieq_create_ah(struct irdma_sc_qp *qp,
1580− struct irdma_puda_buf *buf)
1572+static int irdma_ieq_create_ah(struct irdma_sc_qp *qp, struct irdma_puda_buf *buf)
15811573 {
15821574 struct irdma_ah_info ah_info = {};
15831575
drivers/infiniband/hw/irdma/puda.h+17−26
@@ -151,42 +151,33 @@ void irdma_puda_ret_bufpool(struct irdma_puda_rsrc *rsrc, · 150 unmodified lines
151151 struct irdma_puda_buf *buf);
152152 void irdma_puda_send_buf(struct irdma_puda_rsrc *rsrc,
153153 struct irdma_puda_buf *buf);
154−enum irdma_status_code irdma_puda_send(struct irdma_sc_qp *qp,
155− struct irdma_puda_send_info *info);
156−enum irdma_status_code
157−irdma_puda_create_rsrc(struct irdma_sc_vsi *vsi,
158− struct irdma_puda_rsrc_info *info);
154+int irdma_puda_send(struct irdma_sc_qp *qp, struct irdma_puda_send_info *info);
155+int irdma_puda_create_rsrc(struct irdma_sc_vsi *vsi,
156+ struct irdma_puda_rsrc_info *info);
159157 void irdma_puda_dele_rsrc(struct irdma_sc_vsi *vsi, enum puda_rsrc_type type,
160158 bool reset);
161−enum irdma_status_code irdma_puda_poll_cmpl(struct irdma_sc_dev *dev,
162− struct irdma_sc_cq *cq,
163− u32 *compl_err);
159+int irdma_puda_poll_cmpl(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq,
160+ u32 *compl_err);
164161
165162 struct irdma_sc_qp *irdma_ieq_get_qp(struct irdma_sc_dev *dev,
166163 struct irdma_puda_buf *buf);
167−enum irdma_status_code
168−irdma_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info,
169− struct irdma_puda_buf *buf);
170−enum irdma_status_code irdma_ieq_check_mpacrc(struct shash_desc *desc,
171− void *addr, u32 len, u32 val);
172−enum irdma_status_code irdma_init_hash_desc(struct shash_desc **desc);
164+int irdma_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info,
165+ struct irdma_puda_buf *buf);
166+int irdma_ieq_check_mpacrc(struct shash_desc *desc, void *addr, u32 len, u32 val);
167+int irdma_init_hash_desc(struct shash_desc **desc);
173168 void irdma_ieq_mpa_crc_ae(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp);
174169 void irdma_free_hash_desc(struct shash_desc *desc);
175−void irdma_ieq_update_tcpip_info(struct irdma_puda_buf *buf, u16 len,
176− u32 seqnum);
177−enum irdma_status_code irdma_cqp_qp_create_cmd(struct irdma_sc_dev *dev,
178− struct irdma_sc_qp *qp);
179−enum irdma_status_code irdma_cqp_cq_create_cmd(struct irdma_sc_dev *dev,
180− struct irdma_sc_cq *cq);
181−enum irdma_status_code irdma_cqp_qp_destroy_cmd(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp);
170+void irdma_ieq_update_tcpip_info(struct irdma_puda_buf *buf, u16 len, u32 seqnum);
171+int irdma_cqp_qp_create_cmd(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp);
172+int irdma_cqp_cq_create_cmd(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq);
173+int irdma_cqp_qp_destroy_cmd(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp);
182174 void irdma_cqp_cq_destroy_cmd(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq);
183175 void irdma_puda_ieq_get_ah_info(struct irdma_sc_qp *qp,
184176 struct irdma_ah_info *ah_info);
185−enum irdma_status_code irdma_puda_create_ah(struct irdma_sc_dev *dev,
186− struct irdma_ah_info *ah_info,
187− bool wait, enum puda_rsrc_type type,
188− void *cb_param,
189− struct irdma_sc_ah **ah);
177+int irdma_puda_create_ah(struct irdma_sc_dev *dev,
178+ struct irdma_ah_info *ah_info, bool wait,
179+ enum puda_rsrc_type type, void *cb_param,
180+ struct irdma_sc_ah **ah);
190181 void irdma_puda_free_ah(struct irdma_sc_dev *dev, struct irdma_sc_ah *ah);
191182 void irdma_ieq_process_fpdus(struct irdma_sc_qp *qp,
192183 struct irdma_puda_rsrc *ieq);
drivers/infiniband/hw/irdma/status.h+0−71
@@ -1,71 +0,0 @@
1−/* SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB */
2−/* Copyright (c) 2015 - 2020 Intel Corporation */
3−#ifndef IRDMA_STATUS_H
4−#define IRDMA_STATUS_H
5−
6−/* Error Codes */
7−enum irdma_status_code {
8− IRDMA_SUCCESS = 0,
9− IRDMA_ERR_NVM = -1,
10− IRDMA_ERR_NVM_CHECKSUM = -2,
11− IRDMA_ERR_CFG = -4,
12− IRDMA_ERR_PARAM = -5,
13− IRDMA_ERR_DEVICE_NOT_SUPPORTED = -6,
14− IRDMA_ERR_RESET_FAILED = -7,
15− IRDMA_ERR_SWFW_SYNC = -8,
16− IRDMA_ERR_NO_MEMORY = -9,
17− IRDMA_ERR_BAD_PTR = -10,
18− IRDMA_ERR_INVALID_PD_ID = -11,
19− IRDMA_ERR_INVALID_QP_ID = -12,
20− IRDMA_ERR_INVALID_CQ_ID = -13,
21− IRDMA_ERR_INVALID_CEQ_ID = -14,
22− IRDMA_ERR_INVALID_AEQ_ID = -15,
23− IRDMA_ERR_INVALID_SIZE = -16,
24− IRDMA_ERR_INVALID_ARP_INDEX = -17,
25− IRDMA_ERR_INVALID_FPM_FUNC_ID = -18,
26− IRDMA_ERR_QP_INVALID_MSG_SIZE = -19,
27− IRDMA_ERR_QP_TOOMANY_WRS_POSTED = -20,
28− IRDMA_ERR_INVALID_FRAG_COUNT = -21,
29− IRDMA_ERR_Q_EMPTY = -22,
30− IRDMA_ERR_INVALID_ALIGNMENT = -23,
31− IRDMA_ERR_FLUSHED_Q = -24,
32− IRDMA_ERR_INVALID_PUSH_PAGE_INDEX = -25,
33− IRDMA_ERR_INVALID_INLINE_DATA_SIZE = -26,
34− IRDMA_ERR_TIMEOUT = -27,
35− IRDMA_ERR_OPCODE_MISMATCH = -28,
36− IRDMA_ERR_CQP_COMPL_ERROR = -29,
37− IRDMA_ERR_INVALID_VF_ID = -30,
38− IRDMA_ERR_INVALID_HMCFN_ID = -31,
39− IRDMA_ERR_BACKING_PAGE_ERROR = -32,
40− IRDMA_ERR_NO_PBLCHUNKS_AVAILABLE = -33,
41− IRDMA_ERR_INVALID_PBLE_INDEX = -34,
42− IRDMA_ERR_INVALID_SD_INDEX = -35,
43− IRDMA_ERR_INVALID_PAGE_DESC_INDEX = -36,
44− IRDMA_ERR_INVALID_SD_TYPE = -37,
45− IRDMA_ERR_MEMCPY_FAILED = -38,
46− IRDMA_ERR_INVALID_HMC_OBJ_INDEX = -39,
47− IRDMA_ERR_INVALID_HMC_OBJ_COUNT = -40,
48− IRDMA_ERR_BUF_TOO_SHORT = -43,
49− IRDMA_ERR_BAD_IWARP_CQE = -44,
50− IRDMA_ERR_NVM_BLANK_MODE = -45,
51− IRDMA_ERR_NOT_IMPL = -46,
52− IRDMA_ERR_PE_DOORBELL_NOT_ENA = -47,
53− IRDMA_ERR_NOT_READY = -48,
54− IRDMA_NOT_SUPPORTED = -49,
55− IRDMA_ERR_FIRMWARE_API_VER = -50,
56− IRDMA_ERR_RING_FULL = -51,
57− IRDMA_ERR_MPA_CRC = -61,
58− IRDMA_ERR_NO_TXBUFS = -62,
59− IRDMA_ERR_SEQ_NUM = -63,
60− IRDMA_ERR_list_empty = -64,
61− IRDMA_ERR_INVALID_MAC_ADDR = -65,
62− IRDMA_ERR_BAD_STAG = -66,
63− IRDMA_ERR_CQ_COMPL_ERROR = -67,
64− IRDMA_ERR_Q_DESTROYED = -68,
65− IRDMA_ERR_INVALID_FEAT_CNT = -69,
66− IRDMA_ERR_REG_CQ_FULL = -70,
67− IRDMA_ERR_VF_MSG_ERROR = -71,
68− IRDMA_ERR_NO_INTR = -72,
69− IRDMA_ERR_REG_QSET = -73,
70−};
71−#endif /* IRDMA_STATUS_H */
drivers/infiniband/hw/irdma/type.h+54−59
@@ -2,7 +2,6 @@ · 1 unmodified line
22 /* Copyright (c) 2015 - 2021 Intel Corporation */
33 #ifndef IRDMA_TYPE_H
44 #define IRDMA_TYPE_H
5−#include "status.h"
65 #include "osdep.h"
76 #include "irdma.h"
87 #include "user.h"
@@ -402,8 +401,8 @@ struct irdma_sc_cqp { · 393 unmodified lines
402401 u64 host_ctx_pa;
403402 void *back_cqp;
404403 struct irdma_sc_dev *dev;
405− enum irdma_status_code (*process_cqp_sds)(struct irdma_sc_dev *dev,
406− struct irdma_update_sds_info *info);
404+ int (*process_cqp_sds)(struct irdma_sc_dev *dev,
405+ struct irdma_update_sds_info *info);
407406 struct irdma_dma_mem sdbuf;
408407 struct irdma_ring sq_ring;
409408 struct irdma_cqp_quanta *sq_base;
@@ -605,12 +604,14 @@ struct irdma_sc_vsi { · 195 unmodified lines
605604 struct irdma_qos qos[IRDMA_MAX_USER_PRIORITY];
606605 struct irdma_vsi_pestat *pestat;
607606 atomic_t qp_suspend_reqs;
608− enum irdma_status_code (*register_qset)(struct irdma_sc_vsi *vsi,
609− struct irdma_ws_node *tc_node);
607+ int (*register_qset)(struct irdma_sc_vsi *vsi,
608+ struct irdma_ws_node *tc_node);
610609 void (*unregister_qset)(struct irdma_sc_vsi *vsi,
611610 struct irdma_ws_node *tc_node);
612611 u8 qos_rel_bw;
613612 u8 qos_prio_type;
613+ u8 dscp_map[IIDC_MAX_DSCP_MAPPING];
614+ bool dscp_mode:1;
614615 };
615616
616617 struct irdma_sc_dev {
@@ -655,7 +656,7 @@ struct irdma_sc_dev { · 38 unmodified lines
655656 bool vchnl_up:1;
656657 bool ceq_valid:1;
657658 u8 pci_rev;
658− enum irdma_status_code (*ws_add)(struct irdma_sc_vsi *vsi, u8 user_pri);
659+ int (*ws_add)(struct irdma_sc_vsi *vsi, u8 user_pri);
659660 void (*ws_remove)(struct irdma_sc_vsi *vsi, u8 user_pri);
660661 void (*ws_reset)(struct irdma_sc_vsi *vsi);
661662 };
@@ -735,11 +736,13 @@ struct irdma_l2params { · 73 unmodified lines
735736 u16 qs_handle_list[IRDMA_MAX_USER_PRIORITY];
736737 u16 mtu;
737738 u8 up2tc[IRDMA_MAX_USER_PRIORITY];
739+ u8 dscp_map[IIDC_MAX_DSCP_MAPPING];
738740 u8 num_tc;
739741 u8 vsi_rel_bw;
740742 u8 vsi_prio_type;
741743 bool mtu_changed:1;
742744 bool tc_changed:1;
745+ bool dscp_mode:1;
743746 };
744747
745748 struct irdma_vsi_init_info {
@@ -750,8 +753,8 @@ struct irdma_vsi_init_info { · 4 unmodified lines
750753 u16 pf_data_vsi_num;
751754 enum irdma_vm_vf_type vm_vf_type;
752755 u16 vm_id;
753− enum irdma_status_code (*register_qset)(struct irdma_sc_vsi *vsi,
754− struct irdma_ws_node *tc_node);
756+ int (*register_qset)(struct irdma_sc_vsi *vsi,
757+ struct irdma_ws_node *tc_node);
755758 void (*unregister_qset)(struct irdma_sc_vsi *vsi,
756759 struct irdma_ws_node *tc_node);
757760 };
@@ -1198,29 +1201,27 @@ struct irdma_irq_ops { · 440 unmodified lines
11981201 };
11991202
12001203 void irdma_sc_ccq_arm(struct irdma_sc_cq *ccq);
1201−enum irdma_status_code irdma_sc_ccq_create(struct irdma_sc_cq *ccq, u64 scratch,
1202− bool check_overflow, bool post_sq);
1203−enum irdma_status_code irdma_sc_ccq_destroy(struct irdma_sc_cq *ccq, u64 scratch,
1204− bool post_sq);
1205−enum irdma_status_code irdma_sc_ccq_get_cqe_info(struct irdma_sc_cq *ccq,
1206− struct irdma_ccq_cqe_info *info);
1207−enum irdma_status_code irdma_sc_ccq_init(struct irdma_sc_cq *ccq,
1208− struct irdma_ccq_init_info *info);
1209−
1210−enum irdma_status_code irdma_sc_cceq_create(struct irdma_sc_ceq *ceq, u64 scratch);
1211−enum irdma_status_code irdma_sc_cceq_destroy_done(struct irdma_sc_ceq *ceq);
1212−
1213−enum irdma_status_code irdma_sc_ceq_destroy(struct irdma_sc_ceq *ceq, u64 scratch,
1214− bool post_sq);
1215−enum irdma_status_code irdma_sc_ceq_init(struct irdma_sc_ceq *ceq,
1216− struct irdma_ceq_init_info *info);
1204+int irdma_sc_ccq_create(struct irdma_sc_cq *ccq, u64 scratch,
1205+ bool check_overflow, bool post_sq);
1206+int irdma_sc_ccq_destroy(struct irdma_sc_cq *ccq, u64 scratch, bool post_sq);
1207+int irdma_sc_ccq_get_cqe_info(struct irdma_sc_cq *ccq,
1208+ struct irdma_ccq_cqe_info *info);
1209+int irdma_sc_ccq_init(struct irdma_sc_cq *ccq,
1210+ struct irdma_ccq_init_info *info);
1211+
1212+int irdma_sc_cceq_create(struct irdma_sc_ceq *ceq, u64 scratch);
1213+int irdma_sc_cceq_destroy_done(struct irdma_sc_ceq *ceq);
1214+
1215+int irdma_sc_ceq_destroy(struct irdma_sc_ceq *ceq, u64 scratch, bool post_sq);
1216+int irdma_sc_ceq_init(struct irdma_sc_ceq *ceq,
1217+ struct irdma_ceq_init_info *info);
12171218 void irdma_sc_cleanup_ceqes(struct irdma_sc_cq *cq, struct irdma_sc_ceq *ceq);
12181219 void *irdma_sc_process_ceq(struct irdma_sc_dev *dev, struct irdma_sc_ceq *ceq);
12191220
1220−enum irdma_status_code irdma_sc_aeq_init(struct irdma_sc_aeq *aeq,
1221− struct irdma_aeq_init_info *info);
1222−enum irdma_status_code irdma_sc_get_next_aeqe(struct irdma_sc_aeq *aeq,
1223− struct irdma_aeqe_info *info);
1221+int irdma_sc_aeq_init(struct irdma_sc_aeq *aeq,
1222+ struct irdma_aeq_init_info *info);
1223+int irdma_sc_get_next_aeqe(struct irdma_sc_aeq *aeq,
1224+ struct irdma_aeqe_info *info);
12241225 void irdma_sc_repost_aeq_entries(struct irdma_sc_dev *dev, u32 count);
12251226
12261227 void irdma_sc_pd_init(struct irdma_sc_dev *dev, struct irdma_sc_pd *pd, u32 pd_id,
@@ -1228,31 +1229,27 @@ void irdma_sc_pd_init(struct irdma_sc_dev *dev, struct irdma_sc_pd *pd, u32 pd_i · 1 unmodified line
12281229 void irdma_cfg_aeq(struct irdma_sc_dev *dev, u32 idx, bool enable);
12291230 void irdma_check_cqp_progress(struct irdma_cqp_timeout *cqp_timeout,
12301231 struct irdma_sc_dev *dev);
1231−enum irdma_status_code irdma_sc_cqp_create(struct irdma_sc_cqp *cqp, u16 *maj_err,
1232− u16 *min_err);
1233−enum irdma_status_code irdma_sc_cqp_destroy(struct irdma_sc_cqp *cqp);
1234−enum irdma_status_code irdma_sc_cqp_init(struct irdma_sc_cqp *cqp,
1235− struct irdma_cqp_init_info *info);
1232+int irdma_sc_cqp_create(struct irdma_sc_cqp *cqp, u16 *maj_err, u16 *min_err);
1233+int irdma_sc_cqp_destroy(struct irdma_sc_cqp *cqp);
1234+int irdma_sc_cqp_init(struct irdma_sc_cqp *cqp,
1235+ struct irdma_cqp_init_info *info);
12361236 void irdma_sc_cqp_post_sq(struct irdma_sc_cqp *cqp);
1237−enum irdma_status_code irdma_sc_poll_for_cqp_op_done(struct irdma_sc_cqp *cqp, u8 opcode,
1238− struct irdma_ccq_cqe_info *cmpl_info);
1239−enum irdma_status_code irdma_sc_fast_register(struct irdma_sc_qp *qp,
1240− struct irdma_fast_reg_stag_info *info,
1241− bool post_sq);
1242−enum irdma_status_code irdma_sc_qp_create(struct irdma_sc_qp *qp,
1243− struct irdma_create_qp_info *info,
1244− u64 scratch, bool post_sq);
1245−enum irdma_status_code irdma_sc_qp_destroy(struct irdma_sc_qp *qp,
1246− u64 scratch, bool remove_hash_idx,
1247− bool ignore_mw_bnd, bool post_sq);
1248−enum irdma_status_code irdma_sc_qp_flush_wqes(struct irdma_sc_qp *qp,
1249− struct irdma_qp_flush_info *info,
1250− u64 scratch, bool post_sq);
1251−enum irdma_status_code irdma_sc_qp_init(struct irdma_sc_qp *qp,
1252− struct irdma_qp_init_info *info);
1253−enum irdma_status_code irdma_sc_qp_modify(struct irdma_sc_qp *qp,
1254− struct irdma_modify_qp_info *info,
1255− u64 scratch, bool post_sq);
1237+int irdma_sc_poll_for_cqp_op_done(struct irdma_sc_cqp *cqp, u8 opcode,
1238+ struct irdma_ccq_cqe_info *cmpl_info);
1239+int irdma_sc_fast_register(struct irdma_sc_qp *qp,
1240+ struct irdma_fast_reg_stag_info *info, bool post_sq);
1241+int irdma_sc_qp_create(struct irdma_sc_qp *qp,
1242+ struct irdma_create_qp_info *info, u64 scratch,
1243+ bool post_sq);
1244+int irdma_sc_qp_destroy(struct irdma_sc_qp *qp, u64 scratch,
1245+ bool remove_hash_idx, bool ignore_mw_bnd, bool post_sq);
1246+int irdma_sc_qp_flush_wqes(struct irdma_sc_qp *qp,
1247+ struct irdma_qp_flush_info *info, u64 scratch,
1248+ bool post_sq);
1249+int irdma_sc_qp_init(struct irdma_sc_qp *qp, struct irdma_qp_init_info *info);
1250+int irdma_sc_qp_modify(struct irdma_sc_qp *qp,
1251+ struct irdma_modify_qp_info *info, u64 scratch,
1252+ bool post_sq);
12561253 void irdma_sc_send_lsmm(struct irdma_sc_qp *qp, void *lsmm_buf, u32 size,
12571254 irdma_stag stag);
12581255
@@ -1261,14 +1258,12 @@ void irdma_sc_qp_setctx(struct irdma_sc_qp *qp, __le64 *qp_ctx, · 2 unmodified lines
12611258 struct irdma_qp_host_ctx_info *info);
12621259 void irdma_sc_qp_setctx_roce(struct irdma_sc_qp *qp, __le64 *qp_ctx,
12631260 struct irdma_qp_host_ctx_info *info);
1264−enum irdma_status_code irdma_sc_cq_destroy(struct irdma_sc_cq *cq, u64 scratch,
1265− bool post_sq);
1266−enum irdma_status_code irdma_sc_cq_init(struct irdma_sc_cq *cq,
1267− struct irdma_cq_init_info *info);
1261+int irdma_sc_cq_destroy(struct irdma_sc_cq *cq, u64 scratch, bool post_sq);
1262+int irdma_sc_cq_init(struct irdma_sc_cq *cq, struct irdma_cq_init_info *info);
12681263 void irdma_sc_cq_resize(struct irdma_sc_cq *cq, struct irdma_modify_cq_info *info);
1269−enum irdma_status_code irdma_sc_static_hmc_pages_allocated(struct irdma_sc_cqp *cqp,
1270− u64 scratch, u8 hmc_fn_id,
1271− bool post_sq, bool poll_registers);
1264+int irdma_sc_static_hmc_pages_allocated(struct irdma_sc_cqp *cqp, u64 scratch,
1265+ u8 hmc_fn_id, bool post_sq,
1266+ bool poll_registers);
12721267
12731268 void sc_vsi_update_stats(struct irdma_sc_vsi *vsi);
12741269 struct cqp_info {
drivers/infiniband/hw/irdma/uda.c+16−24
@@ -3,7 +3,6 @@ · 2 unmodified lines
33 #include <linux/etherdevice.h>
44
55 #include "osdep.h"
6−#include "status.h"
76 #include "hmc.h"
87 #include "defs.h"
98 #include "type.h"
@@ -18,16 +17,15 @@ · 8 unmodified lines
1817 * @op: Operation
1918 * @scratch: u64 saved to be used during cqp completion
2019 */
21−enum irdma_status_code irdma_sc_access_ah(struct irdma_sc_cqp *cqp,
22− struct irdma_ah_info *info,
23− u32 op, u64 scratch)
20+int irdma_sc_access_ah(struct irdma_sc_cqp *cqp, struct irdma_ah_info *info,
21+ u32 op, u64 scratch)
2422 {
2523 __le64 *wqe;
2624 u64 qw1, qw2;
2725
2826 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
2927 if (!wqe)
30− return IRDMA_ERR_RING_FULL;
28+ return -ENOMEM;
3129
3230 set_64bit_val(wqe, 0, ether_addr_to_u64(info->mac_addr) << 16);
3331 qw1 = FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_PDINDEXLO, info->pd_idx) |
@@ -86,8 +84,7 @@ enum irdma_status_code irdma_sc_access_ah(struct irdma_sc_cqp *cqp, · 52 unmodified lines
8684 * irdma_create_mg_ctx() - create a mcg context
8785 * @info: multicast group context info
8886 */
89−static enum irdma_status_code
90−irdma_create_mg_ctx(struct irdma_mcast_grp_info *info)
87+static void irdma_create_mg_ctx(struct irdma_mcast_grp_info *info)
9188 {
9289 struct irdma_mcast_grp_ctx_entry_info *entry_info = NULL;
9390 u8 idx = 0; /* index in the array */
@@ -106,8 +103,6 @@ irdma_create_mg_ctx(struct irdma_mcast_grp_info *info) · 12 unmodified lines
106103 ctx_idx++;
107104 }
108105 }
109−
110− return 0;
111106 }
112107
113108 /**
@@ -117,27 +112,24 @@ irdma_create_mg_ctx(struct irdma_mcast_grp_info *info) · 3 unmodified lines
117112 * @op: operation to perform
118113 * @scratch: u64 saved to be used during cqp completion
119114 */
120−enum irdma_status_code irdma_access_mcast_grp(struct irdma_sc_cqp *cqp,
121− struct irdma_mcast_grp_info *info,
122− u32 op, u64 scratch)
115+int irdma_access_mcast_grp(struct irdma_sc_cqp *cqp,
116+ struct irdma_mcast_grp_info *info, u32 op,
117+ u64 scratch)
123118 {
124119 __le64 *wqe;
125− enum irdma_status_code ret_code = 0;
126120
127121 if (info->mg_id >= IRDMA_UDA_MAX_FSI_MGS) {
128122 ibdev_dbg(to_ibdev(cqp->dev), "WQE: mg_id out of range\n");
129− return IRDMA_ERR_PARAM;
123+ return -EINVAL;
130124 }
131125
132126 wqe = irdma_sc_cqp_get_next_send_wqe(cqp, scratch);
133127 if (!wqe) {
134128 ibdev_dbg(to_ibdev(cqp->dev), "WQE: ring full\n");
135− return IRDMA_ERR_RING_FULL;
129+ return -ENOMEM;
136130 }
137131
138− ret_code = irdma_create_mg_ctx(info);
139− if (ret_code)
140− return ret_code;
132+ irdma_create_mg_ctx(info);
141133
142134 set_64bit_val(wqe, 32, info->dma_mem_mc.pa);
143135 set_64bit_val(wqe, 16,
@@ -198,8 +190,8 @@ static bool irdma_compare_mgs(struct irdma_mcast_grp_ctx_entry_info *entry1, · 54 unmodified lines
198190 * @ctx: Multcast group context
199191 * @mg: Multcast group info
200192 */
201−enum irdma_status_code irdma_sc_add_mcast_grp(struct irdma_mcast_grp_info *ctx,
202− struct irdma_mcast_grp_ctx_entry_info *mg)
193+int irdma_sc_add_mcast_grp(struct irdma_mcast_grp_info *ctx,
194+ struct irdma_mcast_grp_ctx_entry_info *mg)
203195 {
204196 u32 idx;
205197 bool free_entry_found = false;
@@ -228,7 +220,7 @@ enum irdma_status_code irdma_sc_add_mcast_grp(struct irdma_mcast_grp_info *ctx, · 22 unmodified lines
228220 return 0;
229221 }
230222
231− return IRDMA_ERR_NO_MEMORY;
223+ return -ENOMEM;
232224 }
233225
234226 /**
@@ -239,8 +231,8 @@ enum irdma_status_code irdma_sc_add_mcast_grp(struct irdma_mcast_grp_info *ctx, · 4 unmodified lines
239231 * Finds and removes a specific mulicast group from context, all
240232 * parameters must match to remove a multicast group.
241233 */
242−enum irdma_status_code irdma_sc_del_mcast_grp(struct irdma_mcast_grp_info *ctx,
243− struct irdma_mcast_grp_ctx_entry_info *mg)
234+int irdma_sc_del_mcast_grp(struct irdma_mcast_grp_info *ctx,
235+ struct irdma_mcast_grp_ctx_entry_info *mg)
244236 {
245237 u32 idx;
246238
@@ -269,5 +261,5 @@ enum irdma_status_code irdma_sc_del_mcast_grp(struct irdma_mcast_grp_info *ctx, · 22 unmodified lines
269261 }
270262 }
271263
272− return IRDMA_ERR_PARAM;
264+ return -EINVAL;
273265 }
drivers/infiniband/hw/irdma/uda.h+22−24
@@ -32,56 +32,54 @@ struct irdma_sc_ah { · 31 unmodified lines
3232 struct irdma_ah_info ah_info;
3333 };
3434
35−enum irdma_status_code irdma_sc_add_mcast_grp(struct irdma_mcast_grp_info *ctx,
36− struct irdma_mcast_grp_ctx_entry_info *mg);
37−enum irdma_status_code irdma_sc_del_mcast_grp(struct irdma_mcast_grp_info *ctx,
38− struct irdma_mcast_grp_ctx_entry_info *mg);
39−enum irdma_status_code irdma_sc_access_ah(struct irdma_sc_cqp *cqp, struct irdma_ah_info *info,
40− u32 op, u64 scratch);
41−enum irdma_status_code irdma_access_mcast_grp(struct irdma_sc_cqp *cqp,
42− struct irdma_mcast_grp_info *info,
43− u32 op, u64 scratch);
35+int irdma_sc_add_mcast_grp(struct irdma_mcast_grp_info *ctx,
36+ struct irdma_mcast_grp_ctx_entry_info *mg);
37+int irdma_sc_del_mcast_grp(struct irdma_mcast_grp_info *ctx,
38+ struct irdma_mcast_grp_ctx_entry_info *mg);
39+int irdma_sc_access_ah(struct irdma_sc_cqp *cqp, struct irdma_ah_info *info,
40+ u32 op, u64 scratch);
41+int irdma_access_mcast_grp(struct irdma_sc_cqp *cqp,
42+ struct irdma_mcast_grp_info *info, u32 op,
43+ u64 scratch);
4444
4545 static inline void irdma_sc_init_ah(struct irdma_sc_dev *dev, struct irdma_sc_ah *ah)
4646 {
4747 ah->dev = dev;
4848 }
4949
50−static inline enum irdma_status_code irdma_sc_create_ah(struct irdma_sc_cqp *cqp,
51− struct irdma_ah_info *info,
52− u64 scratch)
50+static inline int irdma_sc_create_ah(struct irdma_sc_cqp *cqp,
51+ struct irdma_ah_info *info, u64 scratch)
5352 {
5453 return irdma_sc_access_ah(cqp, info, IRDMA_CQP_OP_CREATE_ADDR_HANDLE,
5554 scratch);
5655 }
5756
58−static inline enum irdma_status_code irdma_sc_destroy_ah(struct irdma_sc_cqp *cqp,
59− struct irdma_ah_info *info,
60− u64 scratch)
57+static inline int irdma_sc_destroy_ah(struct irdma_sc_cqp *cqp,
58+ struct irdma_ah_info *info, u64 scratch)
6159 {
6260 return irdma_sc_access_ah(cqp, info, IRDMA_CQP_OP_DESTROY_ADDR_HANDLE,
6361 scratch);
6462 }
6563
66−static inline enum irdma_status_code irdma_sc_create_mcast_grp(struct irdma_sc_cqp *cqp,
67− struct irdma_mcast_grp_info *info,
68− u64 scratch)
64+static inline int irdma_sc_create_mcast_grp(struct irdma_sc_cqp *cqp,
65+ struct irdma_mcast_grp_info *info,
66+ u64 scratch)
6967 {
7068 return irdma_access_mcast_grp(cqp, info, IRDMA_CQP_OP_CREATE_MCAST_GRP,
7169 scratch);
7270 }
7371
74−static inline enum irdma_status_code irdma_sc_modify_mcast_grp(struct irdma_sc_cqp *cqp,
75− struct irdma_mcast_grp_info *info,
76− u64 scratch)
72+static inline int irdma_sc_modify_mcast_grp(struct irdma_sc_cqp *cqp,
73+ struct irdma_mcast_grp_info *info,
74+ u64 scratch)
7775 {
7876 return irdma_access_mcast_grp(cqp, info, IRDMA_CQP_OP_MODIFY_MCAST_GRP,
7977 scratch);
8078 }
8179
82−static inline enum irdma_status_code irdma_sc_destroy_mcast_grp(struct irdma_sc_cqp *cqp,
83− struct irdma_mcast_grp_info *info,
84− u64 scratch)
80+static inline int irdma_sc_destroy_mcast_grp(struct irdma_sc_cqp *cqp,
81+ struct irdma_mcast_grp_info *info,
82+ u64 scratch)
8583 {
8684 return irdma_access_mcast_grp(cqp, info, IRDMA_CQP_OP_DESTROY_MCAST_GRP,
8785 scratch);
drivers/infiniband/hw/irdma/uk.c+57−65
@@ -1,7 +1,6 @@
11 // SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
22 /* Copyright (c) 2015 - 2021 Intel Corporation */
33 #include "osdep.h"
4−#include "status.h"
54 #include "defs.h"
65 #include "user.h"
76 #include "irdma.h"
@@ -56,7 +55,7 @@ static void irdma_set_fragment_gen_1(__le64 *wqe, u32 offset, · 48 unmodified lines
5655 * irdma_nop_1 - insert a NOP wqe
5756 * @qp: hw qp ptr
5857 */
59−static enum irdma_status_code irdma_nop_1(struct irdma_qp_uk *qp)
58+static int irdma_nop_1(struct irdma_qp_uk *qp)
6059 {
6160 u64 hdr;
6261 __le64 *wqe;
@@ -64,7 +63,7 @@ static enum irdma_status_code irdma_nop_1(struct irdma_qp_uk *qp) · 1 unmodified line
6463 bool signaled = false;
6564
6665 if (!qp->sq_ring.head)
67− return IRDMA_ERR_PARAM;
66+ return -EINVAL;
6867
6968 wqe_idx = IRDMA_RING_CURRENT_HEAD(qp->sq_ring);
7069 wqe = qp->sq_base[wqe_idx].elem;
@@ -245,7 +244,7 @@ __le64 *irdma_qp_get_next_send_wqe(struct irdma_qp_uk *qp, u32 *wqe_idx, · 174 unmodified lines
245244 __le64 *irdma_qp_get_next_recv_wqe(struct irdma_qp_uk *qp, u32 *wqe_idx)
246245 {
247246 __le64 *wqe;
248− enum irdma_status_code ret_code;
247+ int ret_code;
249248
250249 if (IRDMA_RING_FULL_ERR(qp->rq_ring))
251250 return NULL;
@@ -268,16 +267,15 @@ __le64 *irdma_qp_get_next_recv_wqe(struct irdma_qp_uk *qp, u32 *wqe_idx) · 16 unmodified lines
268267 * @info: post sq information
269268 * @post_sq: flag to post sq
270269 */
271−enum irdma_status_code irdma_uk_rdma_write(struct irdma_qp_uk *qp,
272− struct irdma_post_sq_info *info,
273− bool post_sq)
270+int irdma_uk_rdma_write(struct irdma_qp_uk *qp, struct irdma_post_sq_info *info,
271+ bool post_sq)
274272 {
275273 u64 hdr;
276274 __le64 *wqe;
277275 struct irdma_rdma_write *op_info;
278276 u32 i, wqe_idx;
279277 u32 total_size = 0, byte_off;
280− enum irdma_status_code ret_code;
278+ int ret_code;
281279 u32 frag_cnt, addl_frag_cnt;
282280 bool read_fence = false;
283281 u16 quanta;
@@ -286,7 +284,7 @@ enum irdma_status_code irdma_uk_rdma_write(struct irdma_qp_uk *qp, · 2 unmodified lines
286284
287285 op_info = &info->op.rdma_write;
288286 if (op_info->num_lo_sges > qp->max_sq_frag_cnt)
289− return IRDMA_ERR_INVALID_FRAG_COUNT;
287+ return -EINVAL;
290288
291289 for (i = 0; i < op_info->num_lo_sges; i++)
292290 total_size += op_info->lo_sg_list[i].length;
@@ -305,7 +303,7 @@ enum irdma_status_code irdma_uk_rdma_write(struct irdma_qp_uk *qp, · 12 unmodified lines
305303 wqe = irdma_qp_get_next_send_wqe(qp, &wqe_idx, quanta, total_size,
306304 info);
307305 if (!wqe)
308− return IRDMA_ERR_QP_TOOMANY_WRS_POSTED;
306+ return -ENOMEM;
309307
310308 irdma_clr_wqes(qp, wqe_idx);
311309
@@ -370,12 +368,11 @@ enum irdma_status_code irdma_uk_rdma_write(struct irdma_qp_uk *qp, · 58 unmodified lines
370368 * @inv_stag: flag for inv_stag
371369 * @post_sq: flag to post sq
372370 */
373−enum irdma_status_code irdma_uk_rdma_read(struct irdma_qp_uk *qp,
374− struct irdma_post_sq_info *info,
375− bool inv_stag, bool post_sq)
371+int irdma_uk_rdma_read(struct irdma_qp_uk *qp, struct irdma_post_sq_info *info,
372+ bool inv_stag, bool post_sq)
376373 {
377374 struct irdma_rdma_read *op_info;
378− enum irdma_status_code ret_code;
375+ int ret_code;
379376 u32 i, byte_off, total_size = 0;
380377 bool local_fence = false;
381378 u32 addl_frag_cnt;
@@ -388,7 +385,7 @@ enum irdma_status_code irdma_uk_rdma_read(struct irdma_qp_uk *qp, · 6 unmodified lines
388385
389386 op_info = &info->op.rdma_read;
390387 if (qp->max_sq_frag_cnt < op_info->num_lo_sges)
391− return IRDMA_ERR_INVALID_FRAG_COUNT;
388+ return -EINVAL;
392389
393390 for (i = 0; i < op_info->num_lo_sges; i++)
394391 total_size += op_info->lo_sg_list[i].length;
@@ -400,7 +397,7 @@ enum irdma_status_code irdma_uk_rdma_read(struct irdma_qp_uk *qp, · 5 unmodified lines
400397 wqe = irdma_qp_get_next_send_wqe(qp, &wqe_idx, quanta, total_size,
401398 info);
402399 if (!wqe)
403− return IRDMA_ERR_QP_TOOMANY_WRS_POSTED;
400+ return -ENOMEM;
404401
405402 irdma_clr_wqes(qp, wqe_idx);
406403
@@ -457,15 +454,14 @@ enum irdma_status_code irdma_uk_rdma_read(struct irdma_qp_uk *qp, · 50 unmodified lines
457454 * @info: post sq information
458455 * @post_sq: flag to post sq
459456 */
460−enum irdma_status_code irdma_uk_send(struct irdma_qp_uk *qp,
461− struct irdma_post_sq_info *info,
462− bool post_sq)
457+int irdma_uk_send(struct irdma_qp_uk *qp, struct irdma_post_sq_info *info,
458+ bool post_sq)
463459 {
464460 __le64 *wqe;
465461 struct irdma_post_send *op_info;
466462 u64 hdr;
467463 u32 i, wqe_idx, total_size = 0, byte_off;
468− enum irdma_status_code ret_code;
464+ int ret_code;
469465 u32 frag_cnt, addl_frag_cnt;
470466 bool read_fence = false;
471467 u16 quanta;
@@ -474,7 +470,7 @@ enum irdma_status_code irdma_uk_send(struct irdma_qp_uk *qp, · 2 unmodified lines
474470
475471 op_info = &info->op.send;
476472 if (qp->max_sq_frag_cnt < op_info->num_sges)
477− return IRDMA_ERR_INVALID_FRAG_COUNT;
473+ return -EINVAL;
478474
479475 for (i = 0; i < op_info->num_sges; i++)
480476 total_size += op_info->sg_list[i].length;
@@ -490,7 +486,7 @@ enum irdma_status_code irdma_uk_send(struct irdma_qp_uk *qp, · 9 unmodified lines
490486 wqe = irdma_qp_get_next_send_wqe(qp, &wqe_idx, quanta, total_size,
491487 info);
492488 if (!wqe)
493− return IRDMA_ERR_QP_TOOMANY_WRS_POSTED;
489+ return -ENOMEM;
494490
495491 irdma_clr_wqes(qp, wqe_idx);
496492
@@ -678,9 +674,8 @@ static u16 irdma_inline_data_size_to_quanta(u32 data_size) · 181 unmodified lines
678674 * @info: post sq information
679675 * @post_sq: flag to post sq
680676 */
681−enum irdma_status_code
682−irdma_uk_inline_rdma_write(struct irdma_qp_uk *qp, struct irdma_post_sq_info *info,
683− bool post_sq)
677+int irdma_uk_inline_rdma_write(struct irdma_qp_uk *qp,
678+ struct irdma_post_sq_info *info, bool post_sq)
684679 {
685680 __le64 *wqe;
686681 struct irdma_inline_rdma_write *op_info;
@@ -693,13 +688,13 @@ irdma_uk_inline_rdma_write(struct irdma_qp_uk *qp, struct irdma_post_sq_info *in · 6 unmodified lines
693688 op_info = &info->op.inline_rdma_write;
694689
695690 if (op_info->len > qp->max_inline_data)
696− return IRDMA_ERR_INVALID_INLINE_DATA_SIZE;
691+ return -EINVAL;
697692
698693 quanta = qp->wqe_ops.iw_inline_data_size_to_quanta(op_info->len);
699694 wqe = irdma_qp_get_next_send_wqe(qp, &wqe_idx, quanta, op_info->len,
700695 info);
701696 if (!wqe)
702− return IRDMA_ERR_QP_TOOMANY_WRS_POSTED;
697+ return -ENOMEM;
703698
704699 irdma_clr_wqes(qp, wqe_idx);
705700
@@ -745,9 +740,8 @@ irdma_uk_inline_rdma_write(struct irdma_qp_uk *qp, struct irdma_post_sq_info *in · 39 unmodified lines
745740 * @info: post sq information
746741 * @post_sq: flag to post sq
747742 */
748−enum irdma_status_code irdma_uk_inline_send(struct irdma_qp_uk *qp,
749− struct irdma_post_sq_info *info,
750− bool post_sq)
743+int irdma_uk_inline_send(struct irdma_qp_uk *qp,
744+ struct irdma_post_sq_info *info, bool post_sq)
751745 {
752746 __le64 *wqe;
753747 struct irdma_post_inline_send *op_info;
@@ -760,13 +754,13 @@ enum irdma_status_code irdma_uk_inline_send(struct irdma_qp_uk *qp, · 6 unmodified lines
760754 op_info = &info->op.inline_send;
761755
762756 if (op_info->len > qp->max_inline_data)
763− return IRDMA_ERR_INVALID_INLINE_DATA_SIZE;
757+ return -EINVAL;
764758
765759 quanta = qp->wqe_ops.iw_inline_data_size_to_quanta(op_info->len);
766760 wqe = irdma_qp_get_next_send_wqe(qp, &wqe_idx, quanta, op_info->len,
767761 info);
768762 if (!wqe)
769− return IRDMA_ERR_QP_TOOMANY_WRS_POSTED;
763+ return -ENOMEM;
770764
771765 irdma_clr_wqes(qp, wqe_idx);
772766
@@ -817,9 +811,9 @@ enum irdma_status_code irdma_uk_inline_send(struct irdma_qp_uk *qp, · 44 unmodified lines
817811 * @info: post sq information
818812 * @post_sq: flag to post sq
819813 */
820−enum irdma_status_code
821−irdma_uk_stag_local_invalidate(struct irdma_qp_uk *qp,
822− struct irdma_post_sq_info *info, bool post_sq)
814+int irdma_uk_stag_local_invalidate(struct irdma_qp_uk *qp,
815+ struct irdma_post_sq_info *info,
816+ bool post_sq)
823817 {
824818 __le64 *wqe;
825819 struct irdma_inv_local_stag *op_info;
@@ -835,7 +829,7 @@ irdma_uk_stag_local_invalidate(struct irdma_qp_uk *qp, · 9 unmodified lines
835829 wqe = irdma_qp_get_next_send_wqe(qp, &wqe_idx, IRDMA_QP_WQE_MIN_QUANTA,
836830 0, info);
837831 if (!wqe)
838− return IRDMA_ERR_QP_TOOMANY_WRS_POSTED;
832+ return -ENOMEM;
839833
840834 irdma_clr_wqes(qp, wqe_idx);
841835
@@ -871,8 +865,8 @@ irdma_uk_stag_local_invalidate(struct irdma_qp_uk *qp, · 29 unmodified lines
871865 * @qp: hw qp ptr
872866 * @info: post rq information
873867 */
874−enum irdma_status_code irdma_uk_post_receive(struct irdma_qp_uk *qp,
875− struct irdma_post_rq_info *info)
868+int irdma_uk_post_receive(struct irdma_qp_uk *qp,
869+ struct irdma_post_rq_info *info)
876870 {
877871 u32 wqe_idx, i, byte_off;
878872 u32 addl_frag_cnt;
@@ -880,11 +874,11 @@ enum irdma_status_code irdma_uk_post_receive(struct irdma_qp_uk *qp, · 1 unmodified line
880874 u64 hdr;
881875
882876 if (qp->max_rq_frag_cnt < info->num_sges)
883− return IRDMA_ERR_INVALID_FRAG_COUNT;
877+ return -EINVAL;
884878
885879 wqe = irdma_qp_get_next_recv_wqe(qp, &wqe_idx);
886880 if (!wqe)
887− return IRDMA_ERR_QP_TOOMANY_WRS_POSTED;
881+ return -ENOMEM;
888882
889883 qp->rq_wrid_array[wqe_idx] = info->wr_id;
890884 addl_frag_cnt = info->num_sges > 1 ? (info->num_sges - 1) : 0;
@@ -1000,15 +994,15 @@ void irdma_uk_cq_request_notification(struct irdma_cq_uk *cq, · 109 unmodified lines
1000994 * @cq: hw cq
1001995 * @info: cq poll information returned
1002996 */
1003−enum irdma_status_code
1004−irdma_uk_cq_poll_cmpl(struct irdma_cq_uk *cq, struct irdma_cq_poll_info *info)
997+int irdma_uk_cq_poll_cmpl(struct irdma_cq_uk *cq,
998+ struct irdma_cq_poll_info *info)
1005999 {
10061000 u64 comp_ctx, qword0, qword2, qword3;
10071001 __le64 *cqe;
10081002 struct irdma_qp_uk *qp;
10091003 struct irdma_ring *pring = NULL;
10101004 u32 wqe_idx, q_type;
1011− enum irdma_status_code ret_code;
1005+ int ret_code;
10121006 bool move_cq_head = true;
10131007 u8 polarity;
10141008 bool ext_valid;
@@ -1022,7 +1016,7 @@ irdma_uk_cq_poll_cmpl(struct irdma_cq_uk *cq, struct irdma_cq_poll_info *info) · 7 unmodified lines
10221016 get_64bit_val(cqe, 24, &qword3);
10231017 polarity = (u8)FIELD_GET(IRDMA_CQ_VALID, qword3);
10241018 if (polarity != cq->polarity)
1025− return IRDMA_ERR_Q_EMPTY;
1019+ return -ENOENT;
10261020
10271021 /* Ensure CQE contents are read after valid bit is checked */
10281022 dma_rmb();
@@ -1045,7 +1039,7 @@ irdma_uk_cq_poll_cmpl(struct irdma_cq_uk *cq, struct irdma_cq_poll_info *info) · 16 unmodified lines
10451039 polarity ^= 1;
10461040 }
10471041 if (polarity != cq->polarity)
1048− return IRDMA_ERR_Q_EMPTY;
1042+ return -ENOENT;
10491043
10501044 /* Ensure ext CQE contents are read after ext valid bit is checked */
10511045 dma_rmb();
@@ -1112,7 +1106,7 @@ irdma_uk_cq_poll_cmpl(struct irdma_cq_uk *cq, struct irdma_cq_poll_info *info) · 60 unmodified lines
11121106 info->solicited_event = (bool)FIELD_GET(IRDMACQ_SOEVENT, qword3);
11131107 qp = (struct irdma_qp_uk *)(unsigned long)comp_ctx;
11141108 if (!qp || qp->destroy_pending) {
1115− ret_code = IRDMA_ERR_Q_DESTROYED;
1109+ ret_code = -EFAULT;
11161110 goto exit;
11171111 }
11181112 wqe_idx = (u32)FIELD_GET(IRDMA_CQ_WQEIDX, qword3);
@@ -1126,7 +1120,7 @@ irdma_uk_cq_poll_cmpl(struct irdma_cq_uk *cq, struct irdma_cq_poll_info *info) · 7 unmodified lines
11261120 if (info->comp_status == IRDMA_COMPL_STATUS_FLUSHED ||
11271121 info->comp_status == IRDMA_COMPL_STATUS_UNKNOWN) {
11281122 if (!IRDMA_RING_MORE_WORK(qp->rq_ring)) {
1129− ret_code = IRDMA_ERR_Q_EMPTY;
1123+ ret_code = -ENOENT;
11301124 goto exit;
11311125 }
11321126
@@ -1186,7 +1180,7 @@ irdma_uk_cq_poll_cmpl(struct irdma_cq_uk *cq, struct irdma_cq_poll_info *info) · 53 unmodified lines
11861180 wqe_idx + qp->sq_wrtrk_array[wqe_idx].quanta);
11871181 } else {
11881182 if (!IRDMA_RING_MORE_WORK(qp->sq_ring)) {
1189− ret_code = IRDMA_ERR_Q_EMPTY;
1183+ ret_code = -ENOENT;
11901184 goto exit;
11911185 }
11921186
@@ -1303,15 +1297,15 @@ void irdma_get_wqe_shift(struct irdma_uk_attrs *uk_attrs, u32 sge, · 110 unmodified lines
13031297 * @sqdepth: depth of SQ
13041298 *
13051299 */
1306−enum irdma_status_code irdma_get_sqdepth(struct irdma_uk_attrs *uk_attrs,
1307− u32 sq_size, u8 shift, u32 *sqdepth)
1300+int irdma_get_sqdepth(struct irdma_uk_attrs *uk_attrs, u32 sq_size, u8 shift,
1301+ u32 *sqdepth)
13081302 {
13091303 *sqdepth = irdma_qp_round_up((sq_size << shift) + IRDMA_SQ_RSVD);
13101304
13111305 if (*sqdepth < (IRDMA_QP_SW_MIN_WQSIZE << shift))
13121306 *sqdepth = IRDMA_QP_SW_MIN_WQSIZE << shift;
13131307 else if (*sqdepth > uk_attrs->max_hw_wq_quanta)
1314− return IRDMA_ERR_INVALID_SIZE;
1308+ return -EINVAL;
13151309
13161310 return 0;
13171311 }
@@ -1323,15 +1317,15 @@ enum irdma_status_code irdma_get_sqdepth(struct irdma_uk_attrs *uk_attrs, · 5 unmodified lines
13231317 * @shift: shift which determines size of WQE
13241318 * @rqdepth: depth of RQ
13251319 */
1326−enum irdma_status_code irdma_get_rqdepth(struct irdma_uk_attrs *uk_attrs,
1327− u32 rq_size, u8 shift, u32 *rqdepth)
1320+int irdma_get_rqdepth(struct irdma_uk_attrs *uk_attrs, u32 rq_size, u8 shift,
1321+ u32 *rqdepth)
13281322 {
13291323 *rqdepth = irdma_qp_round_up((rq_size << shift) + IRDMA_RQ_RSVD);
13301324
13311325 if (*rqdepth < (IRDMA_QP_SW_MIN_WQSIZE << shift))
13321326 *rqdepth = IRDMA_QP_SW_MIN_WQSIZE << shift;
13331327 else if (*rqdepth > uk_attrs->max_hw_rq_quanta)
1334− return IRDMA_ERR_INVALID_SIZE;
1328+ return -EINVAL;
13351329
13361330 return 0;
13371331 }
@@ -1381,17 +1375,16 @@ static void irdma_setup_connection_wqes(struct irdma_qp_uk *qp, · 43 unmodified lines
13811375 * allowed. Then size of wqe * the number of wqes should be the
13821376 * amount of memory allocated for sq and rq.
13831377 */
1384−enum irdma_status_code irdma_uk_qp_init(struct irdma_qp_uk *qp,
1385− struct irdma_qp_uk_init_info *info)
1378+int irdma_uk_qp_init(struct irdma_qp_uk *qp, struct irdma_qp_uk_init_info *info)
13861379 {
1387− enum irdma_status_code ret_code = 0;
1380+ int ret_code = 0;
13881381 u32 sq_ring_size;
13891382 u8 sqshift, rqshift;
13901383
13911384 qp->uk_attrs = info->uk_attrs;
13921385 if (info->max_sq_frag_cnt > qp->uk_attrs->max_hw_wq_frags ||
13931386 info->max_rq_frag_cnt > qp->uk_attrs->max_hw_wq_frags)
1394− return IRDMA_ERR_INVALID_FRAG_COUNT;
1387+ return -EINVAL;
13951388
13961389 irdma_get_wqe_shift(qp->uk_attrs, info->max_rq_frag_cnt, 0, &rqshift);
13971390 if (qp->uk_attrs->hw_rev == IRDMA_GEN_1) {
@@ -1502,8 +1495,7 @@ void irdma_uk_clean_cq(void *q, struct irdma_cq_uk *cq) · 104 unmodified lines
15021495 * @signaled: signaled for completion
15031496 * @post_sq: ring doorbell
15041497 */
1505−enum irdma_status_code irdma_nop(struct irdma_qp_uk *qp, u64 wr_id,
1506− bool signaled, bool post_sq)
1498+int irdma_nop(struct irdma_qp_uk *qp, u64 wr_id, bool signaled, bool post_sq)
15071499 {
15081500 __le64 *wqe;
15091501 u64 hdr;
@@ -1515,7 +1507,7 @@ enum irdma_status_code irdma_nop(struct irdma_qp_uk *qp, u64 wr_id, · 5 unmodified lines
15151507 wqe = irdma_qp_get_next_send_wqe(qp, &wqe_idx, IRDMA_QP_WQE_MIN_QUANTA,
15161508 0, &info);
15171509 if (!wqe)
1518− return IRDMA_ERR_QP_TOOMANY_WRS_POSTED;
1510+ return -ENOMEM;
15191511
15201512 irdma_clr_wqes(qp, wqe_idx);
15211513
@@ -1541,7 +1533,7 @@ enum irdma_status_code irdma_nop(struct irdma_qp_uk *qp, u64 wr_id, · 19 unmodified lines
15411533 * @frag_cnt: number of fragments
15421534 * @quanta: quanta for frag_cnt
15431535 */
1544−enum irdma_status_code irdma_fragcnt_to_quanta_sq(u32 frag_cnt, u16 *quanta)
1536+int irdma_fragcnt_to_quanta_sq(u32 frag_cnt, u16 *quanta)
15451537 {
15461538 switch (frag_cnt) {
15471539 case 0:
@@ -1577,7 +1569,7 @@ enum irdma_status_code irdma_fragcnt_to_quanta_sq(u32 frag_cnt, u16 *quanta) · 29 unmodified lines
15771569 *quanta = 8;
15781570 break;
15791571 default:
1580− return IRDMA_ERR_INVALID_FRAG_COUNT;
1572+ return -EINVAL;
15811573 }
15821574
15831575 return 0;
@@ -1588,7 +1580,7 @@ enum irdma_status_code irdma_fragcnt_to_quanta_sq(u32 frag_cnt, u16 *quanta) · 4 unmodified lines
15881580 * @frag_cnt: number of fragments
15891581 * @wqe_size: size in bytes given frag_cnt
15901582 */
1591−enum irdma_status_code irdma_fragcnt_to_wqesize_rq(u32 frag_cnt, u16 *wqe_size)
1583+int irdma_fragcnt_to_wqesize_rq(u32 frag_cnt, u16 *wqe_size)
15921584 {
15931585 switch (frag_cnt) {
15941586 case 0:
@@ -1615,7 +1607,7 @@ enum irdma_status_code irdma_fragcnt_to_wqesize_rq(u32 frag_cnt, u16 *wqe_size) · 20 unmodified lines
16151607 *wqe_size = 256;
16161608 break;
16171609 default:
1618− return IRDMA_ERR_INVALID_FRAG_COUNT;
1610+ return -EINVAL;
16191611 }
16201612
16211613 return 0;
drivers/infiniband/hw/irdma/user.h+28−34
@@ -270,29 +270,24 @@ struct irdma_cq_poll_info { · 269 unmodified lines
270270 bool imm_valid:1;
271271 };
272272
273−enum irdma_status_code irdma_uk_inline_rdma_write(struct irdma_qp_uk *qp,
274− struct irdma_post_sq_info *info,
275− bool post_sq);
276−enum irdma_status_code irdma_uk_inline_send(struct irdma_qp_uk *qp,
277− struct irdma_post_sq_info *info,
278− bool post_sq);
279−
280−enum irdma_status_code irdma_uk_post_nop(struct irdma_qp_uk *qp, u64 wr_id,
281− bool signaled, bool post_sq);
282−enum irdma_status_code irdma_uk_post_receive(struct irdma_qp_uk *qp,
283− struct irdma_post_rq_info *info);
273+int irdma_uk_inline_rdma_write(struct irdma_qp_uk *qp,
274+ struct irdma_post_sq_info *info, bool post_sq);
275+int irdma_uk_inline_send(struct irdma_qp_uk *qp,
276+ struct irdma_post_sq_info *info, bool post_sq);
277+int irdma_uk_post_nop(struct irdma_qp_uk *qp, u64 wr_id, bool signaled,
278+ bool post_sq);
279+int irdma_uk_post_receive(struct irdma_qp_uk *qp,
280+ struct irdma_post_rq_info *info);
284281 void irdma_uk_qp_post_wr(struct irdma_qp_uk *qp);
285−enum irdma_status_code irdma_uk_rdma_read(struct irdma_qp_uk *qp,
286− struct irdma_post_sq_info *info,
287− bool inv_stag, bool post_sq);
288−enum irdma_status_code irdma_uk_rdma_write(struct irdma_qp_uk *qp,
289− struct irdma_post_sq_info *info,
290− bool post_sq);
291−enum irdma_status_code irdma_uk_send(struct irdma_qp_uk *qp,
292− struct irdma_post_sq_info *info, bool post_sq);
293−enum irdma_status_code irdma_uk_stag_local_invalidate(struct irdma_qp_uk *qp,
294− struct irdma_post_sq_info *info,
295− bool post_sq);
282+int irdma_uk_rdma_read(struct irdma_qp_uk *qp, struct irdma_post_sq_info *info,
283+ bool inv_stag, bool post_sq);
284+int irdma_uk_rdma_write(struct irdma_qp_uk *qp, struct irdma_post_sq_info *info,
285+ bool post_sq);
286+int irdma_uk_send(struct irdma_qp_uk *qp, struct irdma_post_sq_info *info,
287+ bool post_sq);
288+int irdma_uk_stag_local_invalidate(struct irdma_qp_uk *qp,
289+ struct irdma_post_sq_info *info,
290+ bool post_sq);
296291
297292 struct irdma_wqe_uk_ops {
298293 void (*iw_copy_inline_data)(u8 *dest, u8 *src, u32 len, u8 polarity);
@@ -303,16 +298,16 @@ struct irdma_wqe_uk_ops { · 4 unmodified lines
303298 struct irdma_bind_window *op_info);
304299 };
305300
306−enum irdma_status_code irdma_uk_cq_poll_cmpl(struct irdma_cq_uk *cq,
307− struct irdma_cq_poll_info *info);
301+int irdma_uk_cq_poll_cmpl(struct irdma_cq_uk *cq,
302+ struct irdma_cq_poll_info *info);
308303 void irdma_uk_cq_request_notification(struct irdma_cq_uk *cq,
309304 enum irdma_cmpl_notify cq_notify);
310305 void irdma_uk_cq_resize(struct irdma_cq_uk *cq, void *cq_base, int size);
311306 void irdma_uk_cq_set_resized_cnt(struct irdma_cq_uk *qp, u16 cnt);
312307 void irdma_uk_cq_init(struct irdma_cq_uk *cq,
313308 struct irdma_cq_uk_init_info *info);
314−enum irdma_status_code irdma_uk_qp_init(struct irdma_qp_uk *qp,
315− struct irdma_qp_uk_init_info *info);
309+int irdma_uk_qp_init(struct irdma_qp_uk *qp,
310+ struct irdma_qp_uk_init_info *info);
316311 struct irdma_sq_uk_wr_trk_info {
317312 u64 wrid;
318313 u32 wr_len;
@@ -413,16 +408,15 @@ __le64 *irdma_qp_get_next_send_wqe(struct irdma_qp_uk *qp, u32 *wqe_idx, · 94 unmodified lines
413408 struct irdma_post_sq_info *info);
414409 __le64 *irdma_qp_get_next_recv_wqe(struct irdma_qp_uk *qp, u32 *wqe_idx);
415410 void irdma_uk_clean_cq(void *q, struct irdma_cq_uk *cq);
416−enum irdma_status_code irdma_nop(struct irdma_qp_uk *qp, u64 wr_id,
417− bool signaled, bool post_sq);
418−enum irdma_status_code irdma_fragcnt_to_quanta_sq(u32 frag_cnt, u16 *quanta);
419−enum irdma_status_code irdma_fragcnt_to_wqesize_rq(u32 frag_cnt, u16 *wqe_size);
411+int irdma_nop(struct irdma_qp_uk *qp, u64 wr_id, bool signaled, bool post_sq);
412+int irdma_fragcnt_to_quanta_sq(u32 frag_cnt, u16 *quanta);
413+int irdma_fragcnt_to_wqesize_rq(u32 frag_cnt, u16 *wqe_size);
420414 void irdma_get_wqe_shift(struct irdma_uk_attrs *uk_attrs, u32 sge,
421415 u32 inline_data, u8 *shift);
422−enum irdma_status_code irdma_get_sqdepth(struct irdma_uk_attrs *uk_attrs,
423− u32 sq_size, u8 shift, u32 *wqdepth);
424−enum irdma_status_code irdma_get_rqdepth(struct irdma_uk_attrs *uk_attrs,
425− u32 rq_size, u8 shift, u32 *wqdepth);
416+int irdma_get_sqdepth(struct irdma_uk_attrs *uk_attrs, u32 sq_size, u8 shift,
417+ u32 *wqdepth);
418+int irdma_get_rqdepth(struct irdma_uk_attrs *uk_attrs, u32 rq_size, u8 shift,
419+ u32 *wqdepth);
426420 void irdma_qp_push_wqe(struct irdma_qp_uk *qp, __le64 *wqe, u16 quanta,
427421 u32 wqe_idx, bool post_sq);
428422 void irdma_clr_wqes(struct irdma_qp_uk *qp, u32 qp_wqe_idx);
drivers/infiniband/hw/irdma/utils.c+122−125
@@ -150,31 +150,35 @@ int irdma_inetaddr_event(struct notifier_block *notifier, unsigned long event, · 149 unmodified lines
150150 void *ptr)
151151 {
152152 struct in_ifaddr *ifa = ptr;
153− struct net_device *netdev = ifa->ifa_dev->dev;
153+ struct net_device *real_dev, *netdev = ifa->ifa_dev->dev;
154154 struct irdma_device *iwdev;
155155 struct ib_device *ibdev;
156156 u32 local_ipaddr;
157157
158− ibdev = ib_device_get_by_netdev(netdev, RDMA_DRIVER_IRDMA);
158+ real_dev = rdma_vlan_dev_real_dev(netdev);
159+ if (!real_dev)
160+ real_dev = netdev;
161+
162+ ibdev = ib_device_get_by_netdev(real_dev, RDMA_DRIVER_IRDMA);
159163 if (!ibdev)
160164 return NOTIFY_DONE;
161165
162166 iwdev = to_iwdev(ibdev);
163167 local_ipaddr = ntohl(ifa->ifa_address);
164168 ibdev_dbg(&iwdev->ibdev,
165− "DEV: netdev %p event %lu local_ip=%pI4 MAC=%pM\n", netdev,
166− event, &local_ipaddr, netdev->dev_addr);
169+ "DEV: netdev %p event %lu local_ip=%pI4 MAC=%pM\n", real_dev,
170+ event, &local_ipaddr, real_dev->dev_addr);
167171 switch (event) {
168172 case NETDEV_DOWN:
169− irdma_manage_arp_cache(iwdev->rf, netdev->dev_addr,
173+ irdma_manage_arp_cache(iwdev->rf, real_dev->dev_addr,
170174 &local_ipaddr, true, IRDMA_ARP_DELETE);
171− irdma_if_notify(iwdev, netdev, &local_ipaddr, true, false);
175+ irdma_if_notify(iwdev, real_dev, &local_ipaddr, true, false);
172176 irdma_gid_change_event(&iwdev->ibdev);
173177 break;
174178 case NETDEV_UP:
175179 case NETDEV_CHANGEADDR:
176− irdma_add_arp(iwdev->rf, &local_ipaddr, true, netdev->dev_addr);
177− irdma_if_notify(iwdev, netdev, &local_ipaddr, true, true);
180+ irdma_add_arp(iwdev->rf, &local_ipaddr, true, real_dev->dev_addr);
181+ irdma_if_notify(iwdev, real_dev, &local_ipaddr, true, true);
178182 irdma_gid_change_event(&iwdev->ibdev);
179183 break;
180184 default:
@@ -196,32 +200,36 @@ int irdma_inet6addr_event(struct notifier_block *notifier, unsigned long event, · 15 unmodified lines
196200 void *ptr)
197201 {
198202 struct inet6_ifaddr *ifa = ptr;
199− struct net_device *netdev = ifa->idev->dev;
203+ struct net_device *real_dev, *netdev = ifa->idev->dev;
200204 struct irdma_device *iwdev;
201205 struct ib_device *ibdev;
202206 u32 local_ipaddr6[4];
203207
204− ibdev = ib_device_get_by_netdev(netdev, RDMA_DRIVER_IRDMA);
208+ real_dev = rdma_vlan_dev_real_dev(netdev);
209+ if (!real_dev)
210+ real_dev = netdev;
211+
212+ ibdev = ib_device_get_by_netdev(real_dev, RDMA_DRIVER_IRDMA);
205213 if (!ibdev)
206214 return NOTIFY_DONE;
207215
208216 iwdev = to_iwdev(ibdev);
209217 irdma_copy_ip_ntohl(local_ipaddr6, ifa->addr.in6_u.u6_addr32);
210218 ibdev_dbg(&iwdev->ibdev,
211− "DEV: netdev %p event %lu local_ip=%pI6 MAC=%pM\n", netdev,
212− event, local_ipaddr6, netdev->dev_addr);
219+ "DEV: netdev %p event %lu local_ip=%pI6 MAC=%pM\n", real_dev,
220+ event, local_ipaddr6, real_dev->dev_addr);
213221 switch (event) {
214222 case NETDEV_DOWN:
215− irdma_manage_arp_cache(iwdev->rf, netdev->dev_addr,
223+ irdma_manage_arp_cache(iwdev->rf, real_dev->dev_addr,
216224 local_ipaddr6, false, IRDMA_ARP_DELETE);
217− irdma_if_notify(iwdev, netdev, local_ipaddr6, false, false);
225+ irdma_if_notify(iwdev, real_dev, local_ipaddr6, false, false);
218226 irdma_gid_change_event(&iwdev->ibdev);
219227 break;
220228 case NETDEV_UP:
221229 case NETDEV_CHANGEADDR:
222230 irdma_add_arp(iwdev->rf, local_ipaddr6, false,
223− netdev->dev_addr);
224− irdma_if_notify(iwdev, netdev, local_ipaddr6, false, true);
231+ real_dev->dev_addr);
232+ irdma_if_notify(iwdev, real_dev, local_ipaddr6, false, true);
225233 irdma_gid_change_event(&iwdev->ibdev);
226234 break;
227235 default:
@@ -243,14 +251,18 @@ int irdma_net_event(struct notifier_block *notifier, unsigned long event, · 15 unmodified lines
243251 void *ptr)
244252 {
245253 struct neighbour *neigh = ptr;
254+ struct net_device *real_dev, *netdev = (struct net_device *)neigh->dev;
246255 struct irdma_device *iwdev;
247256 struct ib_device *ibdev;
248257 __be32 *p;
249258 u32 local_ipaddr[4] = {};
250259 bool ipv4 = true;
251260
252− ibdev = ib_device_get_by_netdev((struct net_device *)neigh->dev,
253− RDMA_DRIVER_IRDMA);
261+ real_dev = rdma_vlan_dev_real_dev(netdev);
262+ if (!real_dev)
263+ real_dev = netdev;
264+
265+ ibdev = ib_device_get_by_netdev(real_dev, RDMA_DRIVER_IRDMA);
254266 if (!ibdev)
255267 return NOTIFY_DONE;
256268
@@ -551,12 +563,12 @@ void irdma_cleanup_pending_cqp_op(struct irdma_pci_f *rf) · 294 unmodified lines
551563 * @rf: RDMA PCI function
552564 * @cqp_request: cqp request to wait
553565 */
554−static enum irdma_status_code irdma_wait_event(struct irdma_pci_f *rf,
555− struct irdma_cqp_request *cqp_request)
566+static int irdma_wait_event(struct irdma_pci_f *rf,
567+ struct irdma_cqp_request *cqp_request)
556568 {
557569 struct irdma_cqp_timeout cqp_timeout = {};
558570 bool cqp_error = false;
559− enum irdma_status_code err_code = 0;
571+ int err_code = 0;
560572
561573 cqp_timeout.compl_cqp_cmds = rf->sc_dev.cqp_cmd_stats[IRDMA_OP_CMPL_CMDS];
562574 do {
@@ -575,12 +587,12 @@ static enum irdma_status_code irdma_wait_event(struct irdma_pci_f *rf, · 12 unmodified lines
575587 rf->reset = true;
576588 rf->gen_ops.request_reset(rf);
577589 }
578− return IRDMA_ERR_TIMEOUT;
590+ return -ETIMEDOUT;
579591 } while (1);
580592
581593 cqp_error = cqp_request->compl_info.error;
582594 if (cqp_error) {
583− err_code = IRDMA_ERR_CQP_COMPL_ERROR;
595+ err_code = -EIO;
584596 if (cqp_request->compl_info.maj_err_code == 0xFFFF &&
585597 cqp_request->compl_info.min_err_code == 0x8029) {
586598 if (!rf->reset) {
@@ -680,16 +692,16 @@ bool irdma_cqp_crit_err(struct irdma_sc_dev *dev, u8 cqp_cmd, · 93 unmodified lines
680692 * @rf: RDMA PCI function
681693 * @cqp_request: cqp request to process
682694 */
683−enum irdma_status_code irdma_handle_cqp_op(struct irdma_pci_f *rf,
684− struct irdma_cqp_request *cqp_request)
695+int irdma_handle_cqp_op(struct irdma_pci_f *rf,
696+ struct irdma_cqp_request *cqp_request)
685697 {
686698 struct irdma_sc_dev *dev = &rf->sc_dev;
687699 struct cqp_cmds_info *info = &cqp_request->info;
688− enum irdma_status_code status;
700+ int status;
689701 bool put_cqp_request = true;
690702
691703 if (rf->reset)
692− return IRDMA_ERR_NOT_READY;
704+ return -EBUSY;
693705
694706 irdma_get_cqp_request(cqp_request);
695707 status = irdma_process_cqp_cmd(dev, info);
@@ -791,17 +803,17 @@ void *irdma_remove_cqp_head(struct irdma_sc_dev *dev) · 95 unmodified lines
791803 * @sdinfo: information for sd cqp
792804 *
793805 */
794−enum irdma_status_code irdma_cqp_sds_cmd(struct irdma_sc_dev *dev,
795− struct irdma_update_sds_info *sdinfo)
806+int irdma_cqp_sds_cmd(struct irdma_sc_dev *dev,
807+ struct irdma_update_sds_info *sdinfo)
796808 {
797809 struct irdma_cqp_request *cqp_request;
798810 struct cqp_cmds_info *cqp_info;
799811 struct irdma_pci_f *rf = dev_to_rf(dev);
800− enum irdma_status_code status;
812+ int status;
801813
802814 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
803815 if (!cqp_request)
804− return IRDMA_ERR_NO_MEMORY;
816+ return -ENOMEM;
805817
806818 cqp_info = &cqp_request->info;
807819 memcpy(&cqp_info->in.u.update_pe_sds.info, sdinfo,
@@ -822,19 +834,18 @@ enum irdma_status_code irdma_cqp_sds_cmd(struct irdma_sc_dev *dev, · 14 unmodified lines
822834 * @qp: hardware control qp
823835 * @op: suspend or resume
824836 */
825−enum irdma_status_code irdma_cqp_qp_suspend_resume(struct irdma_sc_qp *qp,
826− u8 op)
837+int irdma_cqp_qp_suspend_resume(struct irdma_sc_qp *qp, u8 op)
827838 {
828839 struct irdma_sc_dev *dev = qp->dev;
829840 struct irdma_cqp_request *cqp_request;
830841 struct irdma_sc_cqp *cqp = dev->cqp;
831842 struct cqp_cmds_info *cqp_info;
832843 struct irdma_pci_f *rf = dev_to_rf(dev);
833− enum irdma_status_code status;
844+ int status;
834845
835846 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, false);
836847 if (!cqp_request)
837− return IRDMA_ERR_NO_MEMORY;
848+ return -ENOMEM;
838849
839850 cqp_info = &cqp_request->info;
840851 cqp_info->cqp_cmd = op;
@@ -940,18 +951,17 @@ void irdma_terminate_del_timer(struct irdma_sc_qp *qp) · 99 unmodified lines
940951 * @val_mem: buffer for fpm
941952 * @hmc_fn_id: function id for fpm
942953 */
943−enum irdma_status_code
944−irdma_cqp_query_fpm_val_cmd(struct irdma_sc_dev *dev,
945− struct irdma_dma_mem *val_mem, u8 hmc_fn_id)
954+int irdma_cqp_query_fpm_val_cmd(struct irdma_sc_dev *dev,
955+ struct irdma_dma_mem *val_mem, u8 hmc_fn_id)
946956 {
947957 struct irdma_cqp_request *cqp_request;
948958 struct cqp_cmds_info *cqp_info;
949959 struct irdma_pci_f *rf = dev_to_rf(dev);
950− enum irdma_status_code status;
960+ int status;
951961
952962 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
953963 if (!cqp_request)
954− return IRDMA_ERR_NO_MEMORY;
964+ return -ENOMEM;
955965
956966 cqp_info = &cqp_request->info;
957967 cqp_request->param = NULL;
@@ -975,18 +985,17 @@ irdma_cqp_query_fpm_val_cmd(struct irdma_sc_dev *dev, · 17 unmodified lines
975985 * @val_mem: buffer with fpm values
976986 * @hmc_fn_id: function id for fpm
977987 */
978−enum irdma_status_code
979−irdma_cqp_commit_fpm_val_cmd(struct irdma_sc_dev *dev,
980− struct irdma_dma_mem *val_mem, u8 hmc_fn_id)
988+int irdma_cqp_commit_fpm_val_cmd(struct irdma_sc_dev *dev,
989+ struct irdma_dma_mem *val_mem, u8 hmc_fn_id)
981990 {
982991 struct irdma_cqp_request *cqp_request;
983992 struct cqp_cmds_info *cqp_info;
984993 struct irdma_pci_f *rf = dev_to_rf(dev);
985− enum irdma_status_code status;
994+ int status;
986995
987996 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
988997 if (!cqp_request)
989− return IRDMA_ERR_NO_MEMORY;
998+ return -ENOMEM;
990999
9911000 cqp_info = &cqp_request->info;
9921001 cqp_request->param = NULL;
@@ -1009,18 +1018,17 @@ irdma_cqp_commit_fpm_val_cmd(struct irdma_sc_dev *dev, · 16 unmodified lines
10091018 * @dev: device pointer
10101019 * @cq: pointer to created cq
10111020 */
1012−enum irdma_status_code irdma_cqp_cq_create_cmd(struct irdma_sc_dev *dev,
1013− struct irdma_sc_cq *cq)
1021+int irdma_cqp_cq_create_cmd(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq)
10141022 {
10151023 struct irdma_pci_f *rf = dev_to_rf(dev);
10161024 struct irdma_cqp *iwcqp = &rf->cqp;
10171025 struct irdma_cqp_request *cqp_request;
10181026 struct cqp_cmds_info *cqp_info;
1019− enum irdma_status_code status;
1027+ int status;
10201028
10211029 cqp_request = irdma_alloc_and_get_cqp_request(iwcqp, true);
10221030 if (!cqp_request)
1023− return IRDMA_ERR_NO_MEMORY;
1031+ return -ENOMEM;
10241032
10251033 cqp_info = &cqp_request->info;
10261034 cqp_info->cqp_cmd = IRDMA_OP_CQ_CREATE;
@@ -1039,19 +1047,18 @@ enum irdma_status_code irdma_cqp_cq_create_cmd(struct irdma_sc_dev *dev, · 12 unmodified lines
10391047 * @dev: device pointer
10401048 * @qp: pointer to created qp
10411049 */
1042−enum irdma_status_code irdma_cqp_qp_create_cmd(struct irdma_sc_dev *dev,
1043− struct irdma_sc_qp *qp)
1050+int irdma_cqp_qp_create_cmd(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp)
10441051 {
10451052 struct irdma_pci_f *rf = dev_to_rf(dev);
10461053 struct irdma_cqp *iwcqp = &rf->cqp;
10471054 struct irdma_cqp_request *cqp_request;
10481055 struct cqp_cmds_info *cqp_info;
10491056 struct irdma_create_qp_info *qp_info;
1050− enum irdma_status_code status;
1057+ int status;
10511058
10521059 cqp_request = irdma_alloc_and_get_cqp_request(iwcqp, true);
10531060 if (!cqp_request)
1054− return IRDMA_ERR_NO_MEMORY;
1061+ return -ENOMEM;
10551062
10561063 cqp_info = &cqp_request->info;
10571064 qp_info = &cqp_request->info.in.u.qp_create.info;
@@ -1079,7 +1086,7 @@ static void irdma_dealloc_push_page(struct irdma_pci_f *rf, · 21 unmodified lines
10791086 {
10801087 struct irdma_cqp_request *cqp_request;
10811088 struct cqp_cmds_info *cqp_info;
1082− enum irdma_status_code status;
1089+ int status;
10831090
10841091 if (qp->push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX)
10851092 return;
@@ -1179,12 +1186,10 @@ static void irdma_hw_modify_qp_callback(struct irdma_cqp_request *cqp_request) · 93 unmodified lines
11791186 * @info: info for modify qp
11801187 * @wait: flag to wait or not for modify qp completion
11811188 */
1182−enum irdma_status_code irdma_hw_modify_qp(struct irdma_device *iwdev,
1183− struct irdma_qp *iwqp,
1184− struct irdma_modify_qp_info *info,
1185− bool wait)
1189+int irdma_hw_modify_qp(struct irdma_device *iwdev, struct irdma_qp *iwqp,
1190+ struct irdma_modify_qp_info *info, bool wait)
11861191 {
1187− enum irdma_status_code status;
1192+ int status;
11881193 struct irdma_pci_f *rf = iwdev->rf;
11891194 struct irdma_cqp_request *cqp_request;
11901195 struct cqp_cmds_info *cqp_info;
@@ -1192,7 +1197,7 @@ enum irdma_status_code irdma_hw_modify_qp(struct irdma_device *iwdev, · 1 unmodified line
11921197
11931198 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, wait);
11941199 if (!cqp_request)
1195− return IRDMA_ERR_NO_MEMORY;
1200+ return -ENOMEM;
11961201
11971202 if (!wait) {
11981203 cqp_request->callback_fcn = irdma_hw_modify_qp_callback;
@@ -1230,7 +1235,7 @@ enum irdma_status_code irdma_hw_modify_qp(struct irdma_device *iwdev, · 31 unmodified lines
12301235 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp,
12311236 wait);
12321237 if (!cqp_request)
1233− return IRDMA_ERR_NO_MEMORY;
1238+ return -ENOMEM;
12341239
12351240 cqp_info = &cqp_request->info;
12361241 m_info = &cqp_info->in.u.qp_modify.info;
@@ -1271,17 +1276,17 @@ void irdma_cqp_cq_destroy_cmd(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq) · 34 unmodified lines
12711276 * @dev: device pointer
12721277 * @qp: pointer to qp
12731278 */
1274−enum irdma_status_code irdma_cqp_qp_destroy_cmd(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp)
1279+int irdma_cqp_qp_destroy_cmd(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp)
12751280 {
12761281 struct irdma_pci_f *rf = dev_to_rf(dev);
12771282 struct irdma_cqp *iwcqp = &rf->cqp;
12781283 struct irdma_cqp_request *cqp_request;
12791284 struct cqp_cmds_info *cqp_info;
1280− enum irdma_status_code status;
1285+ int status;
12811286
12821287 cqp_request = irdma_alloc_and_get_cqp_request(iwcqp, true);
12831288 if (!cqp_request)
1284− return IRDMA_ERR_NO_MEMORY;
1289+ return -ENOMEM;
12851290
12861291 cqp_info = &cqp_request->info;
12871292 memset(cqp_info, 0, sizeof(*cqp_info));
@@ -1317,20 +1322,20 @@ void irdma_ieq_mpa_crc_ae(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp) · 29 unmodified lines
13171322 * irdma_init_hash_desc - initialize hash for crc calculation
13181323 * @desc: cryption type
13191324 */
1320−enum irdma_status_code irdma_init_hash_desc(struct shash_desc **desc)
1325+int irdma_init_hash_desc(struct shash_desc **desc)
13211326 {
13221327 struct crypto_shash *tfm;
13231328 struct shash_desc *tdesc;
13241329
13251330 tfm = crypto_alloc_shash("crc32c", 0, 0);
13261331 if (IS_ERR(tfm))
1327− return IRDMA_ERR_MPA_CRC;
1332+ return -EINVAL;
13281333
13291334 tdesc = kzalloc(sizeof(*tdesc) + crypto_shash_descsize(tfm),
13301335 GFP_KERNEL);
13311336 if (!tdesc) {
13321337 crypto_free_shash(tfm);
1333− return IRDMA_ERR_MPA_CRC;
1338+ return -EINVAL;
13341339 }
13351340
13361341 tdesc->tfm = tfm;
@@ -1358,19 +1363,19 @@ void irdma_free_hash_desc(struct shash_desc *desc) · 21 unmodified lines
13581363 * @len: length of buffer
13591364 * @val: value to be compared
13601365 */
1361−enum irdma_status_code irdma_ieq_check_mpacrc(struct shash_desc *desc,
1362− void *addr, u32 len, u32 val)
1366+int irdma_ieq_check_mpacrc(struct shash_desc *desc, void *addr, u32 len,
1367+ u32 val)
13631368 {
13641369 u32 crc = 0;
13651370 int ret;
1366− enum irdma_status_code ret_code = 0;
1371+ int ret_code = 0;
13671372
13681373 crypto_shash_init(desc);
13691374 ret = crypto_shash_update(desc, addr, len);
13701375 if (!ret)
13711376 crypto_shash_final(desc, (u8 *)&crc);
13721377 if (crc != val)
1373− ret_code = IRDMA_ERR_MPA_CRC;
1378+ ret_code = -EINVAL;
13741379
13751380 return ret_code;
13761381 }
@@ -1524,9 +1529,8 @@ void irdma_ieq_update_tcpip_info(struct irdma_puda_buf *buf, u16 len, · 147 unmodified lines
15241529 * @info: to get information
15251530 * @buf: puda buffer
15261531 */
1527−static enum irdma_status_code
1528−irdma_gen1_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info,
1529− struct irdma_puda_buf *buf)
1532+static int irdma_gen1_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info,
1533+ struct irdma_puda_buf *buf)
15301534 {
15311535 struct iphdr *iph;
15321536 struct ipv6hdr *ip6h;
@@ -1563,7 +1567,7 @@ irdma_gen1_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info, · 30 unmodified lines
15631567 ibdev_dbg(to_ibdev(buf->vsi->dev),
15641568 "ERR: payload_len = 0x%x totallen expected0x%x\n",
15651569 info->payload_len, buf->totallen);
1566− return IRDMA_ERR_INVALID_SIZE;
1570+ return -EINVAL;
15671571 }
15681572
15691573 buf->tcphlen = tcph->doff << 2;
@@ -1580,9 +1584,8 @@ irdma_gen1_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info, · 10 unmodified lines
15801584 * @info: to get information
15811585 * @buf: puda buffer
15821586 */
1583−enum irdma_status_code
1584−irdma_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info,
1585− struct irdma_puda_buf *buf)
1587+int irdma_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info,
1588+ struct irdma_puda_buf *buf)
15861589 {
15871590 struct tcphdr *tcph;
15881591 u32 pkt_len;
@@ -1861,20 +1864,19 @@ static void irdma_process_cqp_stats(struct irdma_cqp_request *cqp_request) · 272 unmodified lines
18611864 * @pestat: pointer to stats info
18621865 * @wait: flag to wait or not wait for stats
18631866 */
1864−enum irdma_status_code
1865−irdma_cqp_gather_stats_cmd(struct irdma_sc_dev *dev,
1866− struct irdma_vsi_pestat *pestat, bool wait)
1867+int irdma_cqp_gather_stats_cmd(struct irdma_sc_dev *dev,
1868+ struct irdma_vsi_pestat *pestat, bool wait)
18671869
18681870 {
18691871 struct irdma_pci_f *rf = dev_to_rf(dev);
18701872 struct irdma_cqp *iwcqp = &rf->cqp;
18711873 struct irdma_cqp_request *cqp_request;
18721874 struct cqp_cmds_info *cqp_info;
1873− enum irdma_status_code status;
1875+ int status;
18741876
18751877 cqp_request = irdma_alloc_and_get_cqp_request(iwcqp, wait);
18761878 if (!cqp_request)
1877− return IRDMA_ERR_NO_MEMORY;
1879+ return -ENOMEM;
18781880
18791881 cqp_info = &cqp_request->info;
18801882 memset(cqp_info, 0, sizeof(*cqp_info));
@@ -1900,22 +1902,21 @@ irdma_cqp_gather_stats_cmd(struct irdma_sc_dev *dev, · 19 unmodified lines
19001902 * @cmd: command to allocate or free
19011903 * @stats_info: pointer to allocate stats info
19021904 */
1903−enum irdma_status_code
1904−irdma_cqp_stats_inst_cmd(struct irdma_sc_vsi *vsi, u8 cmd,
1905− struct irdma_stats_inst_info *stats_info)
1905+int irdma_cqp_stats_inst_cmd(struct irdma_sc_vsi *vsi, u8 cmd,
1906+ struct irdma_stats_inst_info *stats_info)
19061907 {
19071908 struct irdma_pci_f *rf = dev_to_rf(vsi->dev);
19081909 struct irdma_cqp *iwcqp = &rf->cqp;
19091910 struct irdma_cqp_request *cqp_request;
19101911 struct cqp_cmds_info *cqp_info;
1911− enum irdma_status_code status;
1912+ int status;
19121913 bool wait = false;
19131914
19141915 if (cmd == IRDMA_OP_STATS_ALLOCATE)
19151916 wait = true;
19161917 cqp_request = irdma_alloc_and_get_cqp_request(iwcqp, wait);
19171918 if (!cqp_request)
1918− return IRDMA_ERR_NO_MEMORY;
1919+ return -ENOMEM;
19191920
19201921 cqp_info = &cqp_request->info;
19211922 memset(cqp_info, 0, sizeof(*cqp_info));
@@ -1938,17 +1939,17 @@ irdma_cqp_stats_inst_cmd(struct irdma_sc_vsi *vsi, u8 cmd, · 16 unmodified lines
19381939 * @sc_ceq: pointer to ceq structure
19391940 * @op: Create or Destroy
19401941 */
1941−enum irdma_status_code irdma_cqp_ceq_cmd(struct irdma_sc_dev *dev,
1942− struct irdma_sc_ceq *sc_ceq, u8 op)
1942+int irdma_cqp_ceq_cmd(struct irdma_sc_dev *dev, struct irdma_sc_ceq *sc_ceq,
1943+ u8 op)
19431944 {
19441945 struct irdma_cqp_request *cqp_request;
19451946 struct cqp_cmds_info *cqp_info;
19461947 struct irdma_pci_f *rf = dev_to_rf(dev);
1947− enum irdma_status_code status;
1948+ int status;
19481949
19491950 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
19501951 if (!cqp_request)
1951− return IRDMA_ERR_NO_MEMORY;
1952+ return -ENOMEM;
19521953
19531954 cqp_info = &cqp_request->info;
19541955 cqp_info->post_sq = 1;
@@ -1968,17 +1969,17 @@ enum irdma_status_code irdma_cqp_ceq_cmd(struct irdma_sc_dev *dev, · 13 unmodified lines
19681969 * @sc_aeq: pointer to aeq structure
19691970 * @op: Create or Destroy
19701971 */
1971−enum irdma_status_code irdma_cqp_aeq_cmd(struct irdma_sc_dev *dev,
1972− struct irdma_sc_aeq *sc_aeq, u8 op)
1972+int irdma_cqp_aeq_cmd(struct irdma_sc_dev *dev, struct irdma_sc_aeq *sc_aeq,
1973+ u8 op)
19731974 {
19741975 struct irdma_cqp_request *cqp_request;
19751976 struct cqp_cmds_info *cqp_info;
19761977 struct irdma_pci_f *rf = dev_to_rf(dev);
1977− enum irdma_status_code status;
1978+ int status;
19781979
19791980 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
19801981 if (!cqp_request)
1981− return IRDMA_ERR_NO_MEMORY;
1982+ return -ENOMEM;
19821983
19831984 cqp_info = &cqp_request->info;
19841985 cqp_info->post_sq = 1;
@@ -1998,16 +1999,15 @@ enum irdma_status_code irdma_cqp_aeq_cmd(struct irdma_sc_dev *dev, · 13 unmodified lines
19981999 * @cmd: Add, modify or delete
19992000 * @node_info: pointer to ws node info
20002001 */
2001−enum irdma_status_code
2002−irdma_cqp_ws_node_cmd(struct irdma_sc_dev *dev, u8 cmd,
2003− struct irdma_ws_node_info *node_info)
2002+int irdma_cqp_ws_node_cmd(struct irdma_sc_dev *dev, u8 cmd,
2003+ struct irdma_ws_node_info *node_info)
20042004 {
20052005 struct irdma_pci_f *rf = dev_to_rf(dev);
20062006 struct irdma_cqp *iwcqp = &rf->cqp;
20072007 struct irdma_sc_cqp *cqp = &iwcqp->sc_cqp;
20082008 struct irdma_cqp_request *cqp_request;
20092009 struct cqp_cmds_info *cqp_info;
2010− enum irdma_status_code status;
2010+ int status;
20112011 bool poll;
20122012
20132013 if (!rf->sc_dev.ceq_valid)
@@ -2017,7 +2017,7 @@ irdma_cqp_ws_node_cmd(struct irdma_sc_dev *dev, u8 cmd, · 3 unmodified lines
20172017
20182018 cqp_request = irdma_alloc_and_get_cqp_request(iwcqp, !poll);
20192019 if (!cqp_request)
2020− return IRDMA_ERR_NO_MEMORY;
2020+ return -ENOMEM;
20212021
20222022 cqp_info = &cqp_request->info;
20232023 memset(cqp_info, 0, sizeof(*cqp_info));
@@ -2066,7 +2066,7 @@ int irdma_ah_cqp_op(struct irdma_pci_f *rf, struct irdma_sc_ah *sc_ah, u8 cmd, · 42 unmodified lines
20662066 {
20672067 struct irdma_cqp_request *cqp_request;
20682068 struct cqp_cmds_info *cqp_info;
2069− enum irdma_status_code status;
2069+ int status;
20702070
20712071 if (cmd != IRDMA_OP_AH_CREATE && cmd != IRDMA_OP_AH_DESTROY)
20722072 return -EINVAL;
@@ -2148,11 +2148,10 @@ static void irdma_ilq_ah_cb(struct irdma_cqp_request *cqp_request) · 75 unmodified lines
21482148 * @ah_ret: Returned pointer to address handle if created
21492149 *
21502150 */
2151−enum irdma_status_code irdma_puda_create_ah(struct irdma_sc_dev *dev,
2152− struct irdma_ah_info *ah_info,
2153− bool wait, enum puda_rsrc_type type,
2154− void *cb_param,
2155− struct irdma_sc_ah **ah_ret)
2151+int irdma_puda_create_ah(struct irdma_sc_dev *dev,
2152+ struct irdma_ah_info *ah_info, bool wait,
2153+ enum puda_rsrc_type type, void *cb_param,
2154+ struct irdma_sc_ah **ah_ret)
21562155 {
21572156 struct irdma_sc_ah *ah;
21582157 struct irdma_pci_f *rf = dev_to_rf(dev);
@@ -2161,7 +2160,7 @@ enum irdma_status_code irdma_puda_create_ah(struct irdma_sc_dev *dev, · 2 unmodified lines
21612160 ah = kzalloc(sizeof(*ah), GFP_ATOMIC);
21622161 *ah_ret = ah;
21632162 if (!ah)
2164− return IRDMA_ERR_NO_MEMORY;
2163+ return -ENOMEM;
21652164
21662165 err = irdma_alloc_rsrc(rf, rf->allocated_ahs, rf->max_ah,
21672166 &ah_info->ah_idx, &rf->next_ah);
@@ -2187,7 +2186,7 @@ error: · 19 unmodified lines
21872186 err_free:
21882187 kfree(ah);
21892188 *ah_ret = NULL;
2190− return IRDMA_ERR_NO_MEMORY;
2189+ return -ENOMEM;
21912190 }
21922191
21932192 /**
@@ -2229,19 +2228,19 @@ void irdma_gsi_ud_qp_ah_cb(struct irdma_cqp_request *cqp_request) · 35 unmodified lines
22292228 * @pprm: pble resource manager
22302229 * @pchunk: chunk of memory to add
22312230 */
2232−enum irdma_status_code irdma_prm_add_pble_mem(struct irdma_pble_prm *pprm,
2233− struct irdma_chunk *pchunk)
2231+int irdma_prm_add_pble_mem(struct irdma_pble_prm *pprm,
2232+ struct irdma_chunk *pchunk)
22342233 {
22352234 u64 sizeofbitmap;
22362235
22372236 if (pchunk->size & 0xfff)
2238− return IRDMA_ERR_PARAM;
2237+ return -EINVAL;
22392238
22402239 sizeofbitmap = (u64)pchunk->size >> pprm->pble_shift;
22412240
22422241 pchunk->bitmapbuf = bitmap_zalloc(sizeofbitmap, GFP_KERNEL);
22432242 if (!pchunk->bitmapbuf)
2244− return IRDMA_ERR_NO_MEMORY;
2243+ return -ENOMEM;
22452244
22462245 pchunk->sizeofbitmap = sizeofbitmap;
22472246 /* each pble is 8 bytes hence shift by 3 */
@@ -2259,10 +2258,9 @@ enum irdma_status_code irdma_prm_add_pble_mem(struct irdma_pble_prm *pprm, · 11 unmodified lines
22592258 * @vaddr: returns virtual address of pble memory
22602259 * @fpm_addr: returns fpm address of pble memory
22612260 */
2262−enum irdma_status_code
2263−irdma_prm_get_pbles(struct irdma_pble_prm *pprm,
2264− struct irdma_pble_chunkinfo *chunkinfo, u64 mem_size,
2265− u64 **vaddr, u64 *fpm_addr)
2261+int irdma_prm_get_pbles(struct irdma_pble_prm *pprm,
2262+ struct irdma_pble_chunkinfo *chunkinfo, u64 mem_size,
2263+ u64 **vaddr, u64 *fpm_addr)
22662264 {
22672265 u64 bits_needed;
22682266 u64 bit_idx = PBLE_INVALID_IDX;
@@ -2290,7 +2288,7 @@ irdma_prm_get_pbles(struct irdma_pble_prm *pprm, · 21 unmodified lines
22902288
22912289 if (!pchunk || bit_idx >= pchunk->sizeofbitmap) {
22922290 spin_unlock_irqrestore(&pprm->prm_lock, flags);
2293− return IRDMA_ERR_NO_MEMORY;
2291+ return -ENOMEM;
22942292 }
22952293
22962294 bitmap_set(pchunk->bitmapbuf, bit_idx, bits_needed);
@@ -2325,8 +2323,8 @@ void irdma_prm_return_pbles(struct irdma_pble_prm *pprm, · 28 unmodified lines
23252323 spin_unlock_irqrestore(&pprm->prm_lock, flags);
23262324 }
23272325
2328−enum irdma_status_code irdma_map_vm_page_list(struct irdma_hw *hw, void *va,
2329− dma_addr_t *pg_dma, u32 pg_cnt)
2326+int irdma_map_vm_page_list(struct irdma_hw *hw, void *va, dma_addr_t *pg_dma,
2327+ u32 pg_cnt)
23302328 {
23312329 struct page *vm_page;
23322330 int i;
@@ -2350,7 +2348,7 @@ enum irdma_status_code irdma_map_vm_page_list(struct irdma_hw *hw, void *va, · 17 unmodified lines
23502348
23512349 err:
23522350 irdma_unmap_vm_page_list(hw, pg_dma, i);
2353− return IRDMA_ERR_NO_MEMORY;
2351+ return -ENOMEM;
23542352 }
23552353
23562354 void irdma_unmap_vm_page_list(struct irdma_hw *hw, dma_addr_t *pg_dma, u32 pg_cnt)
@@ -2386,15 +2384,14 @@ done: · 29 unmodified lines
23862384 * @chunk: chunk to add for paged memory
23872385 * @pg_cnt: number of pages needed
23882386 */
2389−enum irdma_status_code irdma_pble_get_paged_mem(struct irdma_chunk *chunk,
2390− u32 pg_cnt)
2387+int irdma_pble_get_paged_mem(struct irdma_chunk *chunk, u32 pg_cnt)
23912388 {
23922389 u32 size;
23932390 void *va;
23942391
23952392 chunk->dmainfo.dmaaddrs = kzalloc(pg_cnt << 3, GFP_KERNEL);
23962393 if (!chunk->dmainfo.dmaaddrs)
2397− return IRDMA_ERR_NO_MEMORY;
2394+ return -ENOMEM;
23982395
23992396 size = PAGE_SIZE * pg_cnt;
24002397 va = vmalloc(size);
@@ -2416,7 +2413,7 @@ err: · 15 unmodified lines
24162413 kfree(chunk->dmainfo.dmaaddrs);
24172414 chunk->dmainfo.dmaaddrs = NULL;
24182415
2419− return IRDMA_ERR_NO_MEMORY;
2416+ return -ENOMEM;
24202417 }
24212418
24222419 /**
drivers/infiniband/hw/irdma/verbs.c+213−178
@@ -256,7 +256,7 @@ static void irdma_alloc_push_page(struct irdma_qp *iwqp) · 255 unmodified lines
256256 struct cqp_cmds_info *cqp_info;
257257 struct irdma_device *iwdev = iwqp->iwdev;
258258 struct irdma_sc_qp *qp = &iwqp->sc_qp;
259− enum irdma_status_code status;
259+ int status;
260260
261261 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
262262 if (!cqp_request)
@@ -592,7 +592,7 @@ static int irdma_setup_kmode_qp(struct irdma_device *iwdev, · 329 unmodified lines
592592 u32 sqdepth, rqdepth;
593593 u8 sqshift, rqshift;
594594 u32 size;
595− enum irdma_status_code status;
595+ int status;
596596 struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
597597 struct irdma_uk_attrs *uk_attrs = &iwdev->rf->sc_dev.hw_attrs.uk_attrs;
598598
@@ -603,7 +603,7 @@ static int irdma_setup_kmode_qp(struct irdma_device *iwdev, · 4 unmodified lines
603603 status = irdma_get_sqdepth(uk_attrs, ukinfo->sq_size, sqshift,
604604 &sqdepth);
605605 if (status)
606− return -ENOMEM;
606+ return status;
607607
608608 if (uk_attrs->hw_rev == IRDMA_GEN_1)
609609 rqshift = IRDMA_MAX_RQ_WQE_SHIFT_GEN1;
@@ -614,7 +614,7 @@ static int irdma_setup_kmode_qp(struct irdma_device *iwdev, · 4 unmodified lines
614614 status = irdma_get_rqdepth(uk_attrs, ukinfo->rq_size, rqshift,
615615 &rqdepth);
616616 if (status)
617− return -ENOMEM;
617+ return status;
618618
619619 iwqp->kqp.sq_wrid_mem =
620620 kcalloc(sqdepth, sizeof(*iwqp->kqp.sq_wrid_mem), GFP_KERNEL);
@@ -668,7 +668,7 @@ static int irdma_cqp_create_qp_cmd(struct irdma_qp *iwqp) · 47 unmodified lines
668668 struct irdma_cqp_request *cqp_request;
669669 struct cqp_cmds_info *cqp_info;
670670 struct irdma_create_qp_info *qp_info;
671− enum irdma_status_code status;
671+ int status;
672672
673673 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
674674 if (!cqp_request)
@@ -688,7 +688,7 @@ static int irdma_cqp_create_qp_cmd(struct irdma_qp *iwqp) · 13 unmodified lines
688688 status = irdma_handle_cqp_op(rf, cqp_request);
689689 irdma_put_cqp_request(&rf->cqp, cqp_request);
690690
691− return status ? -ENOMEM : 0;
691+ return status;
692692 }
693693
694694 static void irdma_roce_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
@@ -806,7 +806,6 @@ static int irdma_create_qp(struct ib_qp *ibqp, · 111 unmodified lines
806806 struct irdma_create_qp_req req;
807807 struct irdma_create_qp_resp uresp = {};
808808 u32 qp_num = 0;
809− enum irdma_status_code ret;
810809 int err_code;
811810 int sq_size;
812811 int rq_size;
@@ -936,9 +935,8 @@ static int irdma_create_qp(struct ib_qp *ibqp, · 123 unmodified lines
936935 if (dev->hw_attrs.uk_attrs.hw_rev > IRDMA_GEN_1)
937936 init_info.qp_uk_init_info.qp_caps |= IRDMA_PUSH_MODE;
938937
939− ret = irdma_sc_qp_init(qp, &init_info);
940− if (ret) {
941− err_code = -EPROTO;
938+ err_code = irdma_sc_qp_init(qp, &init_info);
939+ if (err_code) {
942940 ibdev_dbg(&iwdev->ibdev, "VERBS: qp_init fail\n");
943941 goto error;
944942 }
@@ -1189,7 +1187,7 @@ int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr, · 244 unmodified lines
11891187 if (ret)
11901188 return ret;
11911189
1192− if (vlan_id >= VLAN_N_VID && iwdev->dcb)
1190+ if (vlan_id >= VLAN_N_VID && iwdev->dcb_vlan_mode)
11931191 vlan_id = 0;
11941192 if (vlan_id < VLAN_N_VID) {
11951193 udp_info->insert_vlan_tag = true;
@@ -1202,7 +1200,7 @@ int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr, · 6 unmodified lines
12021200 av->attrs = attr->ah_attr;
12031201 rdma_gid2ip((struct sockaddr *)&av->sgid_addr, &sgid_attr->gid);
12041202 rdma_gid2ip((struct sockaddr *)&av->dgid_addr, &attr->ah_attr.grh.dgid);
1205− if (av->sgid_addr.saddr.sa_family == AF_INET6) {
1203+ if (av->net_type == RDMA_NETWORK_IPV6) {
12061204 __be32 *daddr =
12071205 av->dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
12081206 __be32 *saddr =
@@ -1218,7 +1216,7 @@ int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr, · 9 unmodified lines
12181216 &local_ip[0],
12191217 false, NULL,
12201218 IRDMA_ARP_RESOLVE);
1221− } else {
1219+ } else if (av->net_type == RDMA_NETWORK_IPV4) {
12221220 __be32 saddr = av->sgid_addr.saddr_in.sin_addr.s_addr;
12231221 __be32 daddr = av->dgid_addr.saddr_in.sin_addr.s_addr;
12241222
@@ -1792,7 +1790,6 @@ static int irdma_resize_cq(struct ib_cq *ibcq, int entries, · 567 unmodified lines
17921790 struct irdma_device *iwdev;
17931791 struct irdma_pci_f *rf;
17941792 struct irdma_cq_buf *cq_buf = NULL;
1795− enum irdma_status_code status = 0;
17961793 unsigned long flags;
17971794 int ret;
17981795
@@ -1885,12 +1882,10 @@ static int irdma_resize_cq(struct ib_cq *ibcq, int entries, · 86 unmodified lines
18851882 cqp_info->in.u.cq_modify.cq = &iwcq->sc_cq;
18861883 cqp_info->in.u.cq_modify.scratch = (uintptr_t)cqp_request;
18871884 cqp_info->post_sq = 1;
1888− status = irdma_handle_cqp_op(rf, cqp_request);
1885+ ret = irdma_handle_cqp_op(rf, cqp_request);
18891886 irdma_put_cqp_request(&rf->cqp, cqp_request);
1890− if (status) {
1891− ret = -EPROTO;
1887+ if (ret)
18921888 goto error;
1893− }
18941889
18951890 spin_lock_irqsave(&iwcq->lock, flags);
18961891 if (cq_buf) {
@@ -1945,7 +1940,6 @@ static int irdma_create_cq(struct ib_cq *ibcq, · 48 unmodified lines
19451940 struct irdma_sc_cq *cq;
19461941 struct irdma_sc_dev *dev = &rf->sc_dev;
19471942 struct irdma_cq_init_info info = {};
1948− enum irdma_status_code status;
19491943 struct irdma_cqp_request *cqp_request;
19501944 struct cqp_cmds_info *cqp_info;
19511945 struct irdma_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
@@ -2095,12 +2089,10 @@ static int irdma_create_cq(struct ib_cq *ibcq, · 143 unmodified lines
20952089 cqp_info->in.u.cq_create.cq = cq;
20962090 cqp_info->in.u.cq_create.check_overflow = true;
20972091 cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
2098− status = irdma_handle_cqp_op(rf, cqp_request);
2092+ err_code = irdma_handle_cqp_op(rf, cqp_request);
20992093 irdma_put_cqp_request(&rf->cqp, cqp_request);
2100− if (status) {
2101− err_code = -ENOMEM;
2094+ if (err_code)
21022095 goto cq_free_rsrc;
2103− }
21042096
21052097 if (udata) {
21062098 struct irdma_create_cq_resp resp = {};
@@ -2309,14 +2301,14 @@ static int irdma_setup_pbles(struct irdma_pci_f *rf, struct irdma_mr *iwmr, · 202 unmodified lines
23092301 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
23102302 struct irdma_pble_info *pinfo;
23112303 u64 *pbl;
2312− enum irdma_status_code status;
2304+ int status;
23132305 enum irdma_pble_level level = PBLE_LEVEL_1;
23142306
23152307 if (use_pbles) {
23162308 status = irdma_get_pble(rf->pble_rsrc, palloc, iwmr->page_cnt,
23172309 false);
23182310 if (status)
2319− return -ENOMEM;
2311+ return status;
23202312
23212313 iwpbl->pbl_allocated = true;
23222314 level = palloc->level;
@@ -2434,7 +2426,7 @@ static int irdma_hw_alloc_mw(struct irdma_device *iwdev, struct irdma_mr *iwmr) · 111 unmodified lines
24342426 struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
24352427 struct irdma_cqp_request *cqp_request;
24362428 struct cqp_cmds_info *cqp_info;
2437− enum irdma_status_code status;
2429+ int status;
24382430
24392431 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
24402432 if (!cqp_request)
@@ -2457,7 +2449,7 @@ static int irdma_hw_alloc_mw(struct irdma_device *iwdev, struct irdma_mr *iwmr) · 16 unmodified lines
24572449 status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
24582450 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
24592451
2460− return status ? -ENOMEM : 0;
2452+ return status;
24612453 }
24622454
24632455 /**
@@ -2509,7 +2501,7 @@ static int irdma_dealloc_mw(struct ib_mw *ibmw) · 45 unmodified lines
25092501 cqp_info = &cqp_request->info;
25102502 info = &cqp_info->in.u.dealloc_stag.info;
25112503 memset(info, 0, sizeof(*info));
2512− info->pd_id = iwpd->sc_pd.pd_id & 0x00007fff;
2504+ info->pd_id = iwpd->sc_pd.pd_id;
25132505 info->stag_idx = ibmw->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
25142506 info->mr = false;
25152507 cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
@@ -2533,8 +2525,7 @@ static int irdma_hw_alloc_stag(struct irdma_device *iwdev, · 17 unmodified lines
25332525 {
25342526 struct irdma_allocate_stag_info *info;
25352527 struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
2536− enum irdma_status_code status;
2537− int err = 0;
2528+ int status;
25382529 struct irdma_cqp_request *cqp_request;
25392530 struct cqp_cmds_info *cqp_info;
25402531
@@ -2556,10 +2547,8 @@ static int irdma_hw_alloc_stag(struct irdma_device *iwdev, · 15 unmodified lines
25562547 cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
25572548 status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
25582549 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2559− if (status)
2560− err = -ENOMEM;
25612550
2562− return err;
2551+ return status;
25632552 }
25642553
25652554 /**
@@ -2575,9 +2564,8 @@ static struct ib_mr *irdma_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type, · 9 unmodified lines
25752564 struct irdma_pble_alloc *palloc;
25762565 struct irdma_pbl *iwpbl;
25772566 struct irdma_mr *iwmr;
2578− enum irdma_status_code status;
25792567 u32 stag;
2580− int err_code = -ENOMEM;
2568+ int err_code;
25812569
25822570 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
25832571 if (!iwmr)
@@ -2599,9 +2587,9 @@ static struct ib_mr *irdma_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type, · 15 unmodified lines
25992587 iwmr->type = IRDMA_MEMREG_TYPE_MEM;
26002588 palloc = &iwpbl->pble_alloc;
26012589 iwmr->page_cnt = max_num_sg;
2602− status = irdma_get_pble(iwdev->rf->pble_rsrc, palloc, iwmr->page_cnt,
2603− true);
2604− if (status)
2590+ err_code = irdma_get_pble(iwdev->rf->pble_rsrc, palloc, iwmr->page_cnt,
2591+ true);
2592+ if (err_code)
26052593 goto err_get_pble;
26062594
26072595 err_code = irdma_hw_alloc_stag(iwdev, iwmr);
@@ -2672,10 +2660,9 @@ static int irdma_hwreg_mr(struct irdma_device *iwdev, struct irdma_mr *iwmr, · 64 unmodified lines
26722660 struct irdma_reg_ns_stag_info *stag_info;
26732661 struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
26742662 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2675− enum irdma_status_code status;
2676− int err = 0;
26772663 struct irdma_cqp_request *cqp_request;
26782664 struct cqp_cmds_info *cqp_info;
2665+ int ret;
26792666
26802667 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
26812668 if (!cqp_request)
@@ -2712,12 +2699,10 @@ static int irdma_hwreg_mr(struct irdma_device *iwdev, struct irdma_mr *iwmr, · 30 unmodified lines
27122699 cqp_info->post_sq = 1;
27132700 cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->rf->sc_dev;
27142701 cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
2715− status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2702+ ret = irdma_handle_cqp_op(iwdev->rf, cqp_request);
27162703 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2717− if (status)
2718− err = -ENOMEM;
27192704
2720− return err;
2705+ return ret;
27212706 }
27222707
27232708 /**
@@ -2897,7 +2882,6 @@ struct ib_mr *irdma_reg_phys_mr(struct ib_pd *pd, u64 addr, u64 size, int access · 173 unmodified lines
28972882 struct irdma_device *iwdev = to_iwdev(pd->device);
28982883 struct irdma_pbl *iwpbl;
28992884 struct irdma_mr *iwmr;
2900− enum irdma_status_code status;
29012885 u32 stag;
29022886 int ret;
29032887
@@ -2925,10 +2909,9 @@ struct ib_mr *irdma_reg_phys_mr(struct ib_pd *pd, u64 addr, u64 size, int access · 21 unmodified lines
29252909 iwmr->pgaddrmem[0] = addr;
29262910 iwmr->len = size;
29272911 iwmr->page_size = SZ_4K;
2928− status = irdma_hwreg_mr(iwdev, iwmr, access);
2929− if (status) {
2912+ ret = irdma_hwreg_mr(iwdev, iwmr, access);
2913+ if (ret) {
29302914 irdma_free_stag(iwdev, stag);
2931− ret = -ENOMEM;
29322915 goto err;
29332916 }
29342917
@@ -3021,7 +3004,7 @@ static int irdma_dereg_mr(struct ib_mr *ib_mr, struct ib_udata *udata) · 86 unmodified lines
30213004 cqp_info = &cqp_request->info;
30223005 info = &cqp_info->in.u.dealloc_stag.info;
30233006 memset(info, 0, sizeof(*info));
3024− info->pd_id = iwpd->sc_pd.pd_id & 0x00007fff;
3007+ info->pd_id = iwpd->sc_pd.pd_id;
30253008 info->stag_idx = ib_mr->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
30263009 info->mr = true;
30273010 if (iwpbl->pbl_allocated)
@@ -3057,7 +3040,6 @@ static int irdma_post_send(struct ib_qp *ibqp, · 29 unmodified lines
30573040 struct irdma_qp_uk *ukqp;
30583041 struct irdma_sc_dev *dev;
30593042 struct irdma_post_sq_info info;
3060− enum irdma_status_code ret;
30613043 int err = 0;
30623044 unsigned long flags;
30633045 bool inv_stag;
@@ -3116,7 +3098,7 @@ static int irdma_post_send(struct ib_qp *ibqp, · 52 unmodified lines
31163098 info.op.inline_send.qkey = ud_wr(ib_wr)->remote_qkey;
31173099 info.op.inline_send.dest_qp = ud_wr(ib_wr)->remote_qpn;
31183100 }
3119− ret = irdma_uk_inline_send(ukqp, &info, false);
3101+ err = irdma_uk_inline_send(ukqp, &info, false);
31203102 } else {
31213103 info.op.send.num_sges = ib_wr->num_sge;
31223104 info.op.send.sg_list = ib_wr->sg_list;
@@ -3127,14 +3109,7 @@ static int irdma_post_send(struct ib_qp *ibqp, · 4 unmodified lines
31273109 info.op.send.qkey = ud_wr(ib_wr)->remote_qkey;
31283110 info.op.send.dest_qp = ud_wr(ib_wr)->remote_qpn;
31293111 }
3130− ret = irdma_uk_send(ukqp, &info, false);
3131− }
3132−
3133− if (ret) {
3134− if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3135− err = -ENOMEM;
3136− else
3137− err = -EINVAL;
3112+ err = irdma_uk_send(ukqp, &info, false);
31383113 }
31393114 break;
31403115 case IB_WR_RDMA_WRITE_WITH_IMM:
@@ -3160,20 +3135,13 @@ static int irdma_post_send(struct ib_qp *ibqp, · 19 unmodified lines
31603135 rdma_wr(ib_wr)->remote_addr;
31613136 info.op.inline_rdma_write.rem_addr.lkey =
31623137 rdma_wr(ib_wr)->rkey;
3163− ret = irdma_uk_inline_rdma_write(ukqp, &info, false);
3138+ err = irdma_uk_inline_rdma_write(ukqp, &info, false);
31643139 } else {
31653140 info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
31663141 info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
31673142 info.op.rdma_write.rem_addr.addr = rdma_wr(ib_wr)->remote_addr;
31683143 info.op.rdma_write.rem_addr.lkey = rdma_wr(ib_wr)->rkey;
3169− ret = irdma_uk_rdma_write(ukqp, &info, false);
3170− }
3171−
3172− if (ret) {
3173− if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3174− err = -ENOMEM;
3175− else
3176− err = -EINVAL;
3144+ err = irdma_uk_rdma_write(ukqp, &info, false);
31773145 }
31783146 break;
31793147 case IB_WR_RDMA_READ_WITH_INV:
@@ -3190,21 +3158,12 @@ static int irdma_post_send(struct ib_qp *ibqp, · 10 unmodified lines
31903158 info.op.rdma_read.rem_addr.lkey = rdma_wr(ib_wr)->rkey;
31913159 info.op.rdma_read.lo_sg_list = (void *)ib_wr->sg_list;
31923160 info.op.rdma_read.num_lo_sges = ib_wr->num_sge;
3193−
3194− ret = irdma_uk_rdma_read(ukqp, &info, inv_stag, false);
3195− if (ret) {
3196− if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3197− err = -ENOMEM;
3198− else
3199− err = -EINVAL;
3200− }
3161+ err = irdma_uk_rdma_read(ukqp, &info, inv_stag, false);
32013162 break;
32023163 case IB_WR_LOCAL_INV:
32033164 info.op_type = IRDMA_OP_TYPE_INV_STAG;
32043165 info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
3205− ret = irdma_uk_stag_local_invalidate(ukqp, &info, true);
3206− if (ret)
3207− err = -ENOMEM;
3166+ err = irdma_uk_stag_local_invalidate(ukqp, &info, true);
32083167 break;
32093168 case IB_WR_REG_MR: {
32103169 struct irdma_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
@@ -3226,10 +3185,8 @@ static int irdma_post_send(struct ib_qp *ibqp, · 15 unmodified lines
32263185 stag_info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
32273186 if (iwmr->npages > IRDMA_MIN_PAGES_PER_FMR)
32283187 stag_info.chunk_size = 1;
3229− ret = irdma_sc_mr_fast_register(&iwqp->sc_qp, &stag_info,
3188+ err = irdma_sc_mr_fast_register(&iwqp->sc_qp, &stag_info,
32303189 true);
3231− if (ret)
3232− err = -ENOMEM;
32333190 break;
32343191 }
32353192 default:
@@ -3274,7 +3231,6 @@ static int irdma_post_recv(struct ib_qp *ibqp, · 38 unmodified lines
32743231 struct irdma_qp *iwqp;
32753232 struct irdma_qp_uk *ukqp;
32763233 struct irdma_post_rq_info post_recv = {};
3277− enum irdma_status_code ret = 0;
32783234 unsigned long flags;
32793235 int err = 0;
32803236 bool reflush = false;
@@ -3289,14 +3245,10 @@ static int irdma_post_recv(struct ib_qp *ibqp, · 8 unmodified lines
32893245 post_recv.num_sges = ib_wr->num_sge;
32903246 post_recv.wr_id = ib_wr->wr_id;
32913247 post_recv.sg_list = ib_wr->sg_list;
3292− ret = irdma_uk_post_receive(ukqp, &post_recv);
3293− if (ret) {
3248+ err = irdma_uk_post_receive(ukqp, &post_recv);
3249+ if (err) {
32943250 ibdev_dbg(&iwqp->iwdev->ibdev,
3295− "VERBS: post_recv err %d\n", ret);
3296− if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3297− err = -ENOMEM;
3298− else
3299− err = -EINVAL;
3251+ "VERBS: post_recv err %d\n", err);
33003252 goto out;
33013253 }
33023254
@@ -3483,7 +3435,7 @@ static int __irdma_poll_cq(struct irdma_cq *iwcq, int num_entries, struct ib_wc · 180 unmodified lines
34833435 struct irdma_cq_buf *last_buf = NULL;
34843436 struct irdma_cq_poll_info *cur_cqe = &iwcq->cur_cqe;
34853437 struct irdma_cq_buf *cq_buf;
3486− enum irdma_status_code ret;
3438+ int ret;
34873439 struct irdma_device *iwdev;
34883440 struct irdma_cq_uk *ukcq;
34893441 bool cq_new_cqe = false;
@@ -3503,10 +3455,10 @@ static int __irdma_poll_cq(struct irdma_cq *iwcq, int num_entries, struct ib_wc · 13 unmodified lines
35033455 cq_new_cqe = true;
35043456 continue;
35053457 }
3506− if (ret == IRDMA_ERR_Q_EMPTY)
3458+ if (ret == -ENOENT)
35073459 break;
35083460 /* QP using the CQ is destroyed. Skip reporting this CQE */
3509− if (ret == IRDMA_ERR_Q_DESTROYED) {
3461+ if (ret == -EFAULT) {
35103462 cq_new_cqe = true;
35113463 continue;
35123464 }
@@ -3528,10 +3480,10 @@ static int __irdma_poll_cq(struct irdma_cq *iwcq, int num_entries, struct ib_wc · 15 unmodified lines
35283480 continue;
35293481 }
35303482
3531− if (ret == IRDMA_ERR_Q_EMPTY)
3483+ if (ret == -ENOENT)
35323484 break;
35333485 /* QP using the CQ is destroyed. Skip reporting this CQE */
3534− if (ret == IRDMA_ERR_Q_DESTROYED) {
3486+ if (ret == -EFAULT) {
35353487 cq_new_cqe = true;
35363488 continue;
35373489 }
@@ -3553,7 +3505,7 @@ error: · 15 unmodified lines
35533505 ibdev_dbg(&iwdev->ibdev, "%s: Error polling CQ, irdma_err: %d\n",
35543506 __func__, ret);
35553507
3556− return -EINVAL;
3508+ return ret;
35573509 }
35583510
35593511 /**
@@ -3859,7 +3811,7 @@ static int irdma_mcast_cqp_op(struct irdma_device *iwdev, · 299 unmodified lines
38593811 {
38603812 struct cqp_cmds_info *cqp_info;
38613813 struct irdma_cqp_request *cqp_request;
3862− enum irdma_status_code status;
3814+ int status;
38633815
38643816 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
38653817 if (!cqp_request)
@@ -3873,10 +3825,8 @@ static int irdma_mcast_cqp_op(struct irdma_device *iwdev, · 7 unmodified lines
38733825 cqp_info->in.u.mc_create.cqp = &iwdev->rf->cqp.sc_cqp;
38743826 status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
38753827 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3876− if (status)
3877− return -ENOMEM;
38783828
3879− return 0;
3829+ return status;
38803830 }
38813831
38823832 /**
@@ -3932,11 +3882,7 @@ static int irdma_attach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid) · 49 unmodified lines
39323882 int ret = 0;
39333883 bool ipv4;
39343884 u16 vlan_id;
3935− union {
3936− struct sockaddr saddr;
3937− struct sockaddr_in saddr_in;
3938− struct sockaddr_in6 saddr_in6;
3939− } sgid_addr;
3885+ union irdma_sockaddr sgid_addr;
39403886 unsigned char dmac[ETH_ALEN];
39413887
39423888 rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
@@ -4072,11 +4018,7 @@ static int irdma_detach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid) · 129 unmodified lines
40724018 struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
40734019 int ret;
40744020 unsigned long flags;
4075− union {
4076− struct sockaddr saddr;
4077− struct sockaddr_in saddr_in;
4078− struct sockaddr_in6 saddr_in6;
4079− } sgid_addr;
4021+ union irdma_sockaddr sgid_addr;
40804022
40814023 rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
40824024 if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid))
@@ -4132,17 +4074,47 @@ static int irdma_detach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid) · 49 unmodified lines
41324074 return 0;
41334075 }
41344076
4135−/**
4136− * irdma_create_ah - create address handle
4137− * @ibah: address handle
4138− * @attr: address handle attributes
4139− * @udata: User data
4140− *
4141− * returns 0 on success, error otherwise
4142− */
4143−static int irdma_create_ah(struct ib_ah *ibah,
4144− struct rdma_ah_init_attr *attr,
4145− struct ib_udata *udata)
4077+static int irdma_create_hw_ah(struct irdma_device *iwdev, struct irdma_ah *ah, bool sleep)
4078+{
4079+ struct irdma_pci_f *rf = iwdev->rf;
4080+ int err;
4081+
4082+ err = irdma_alloc_rsrc(rf, rf->allocated_ahs, rf->max_ah, &ah->sc_ah.ah_info.ah_idx,
4083+ &rf->next_ah);
4084+ if (err)
4085+ return err;
4086+
4087+ err = irdma_ah_cqp_op(rf, &ah->sc_ah, IRDMA_OP_AH_CREATE, sleep,
4088+ irdma_gsi_ud_qp_ah_cb, &ah->sc_ah);
4089+
4090+ if (err) {
4091+ ibdev_dbg(&iwdev->ibdev, "VERBS: CQP-OP Create AH fail");
4092+ goto err_ah_create;
4093+ }
4094+
4095+ if (!sleep) {
4096+ int cnt = CQP_COMPL_WAIT_TIME_MS * CQP_TIMEOUT_THRESHOLD;
4097+
4098+ do {
4099+ irdma_cqp_ce_handler(rf, &rf->ccq.sc_cq);
4100+ mdelay(1);
4101+ } while (!ah->sc_ah.ah_info.ah_valid && --cnt);
4102+
4103+ if (!cnt) {
4104+ ibdev_dbg(&iwdev->ibdev, "VERBS: CQP create AH timed out");
4105+ err = -ETIMEDOUT;
4106+ goto err_ah_create;
4107+ }
4108+ }
4109+ return 0;
4110+
4111+err_ah_create:
4112+ irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs, ah->sc_ah.ah_info.ah_idx);
4113+
4114+ return err;
4115+}
4116+
4117+static int irdma_setup_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *attr)
41464118 {
41474119 struct irdma_pd *pd = to_iwpd(ibah->pd);
41484120 struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
@@ -4151,25 +4123,13 @@ static int irdma_create_ah(struct ib_ah *ibah, · 2 unmodified lines
41514123 struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
41524124 struct irdma_pci_f *rf = iwdev->rf;
41534125 struct irdma_sc_ah *sc_ah;
4154− u32 ah_id = 0;
41554126 struct irdma_ah_info *ah_info;
4156− struct irdma_create_ah_resp uresp;
4157− union {
4158− struct sockaddr saddr;
4159− struct sockaddr_in saddr_in;
4160− struct sockaddr_in6 saddr_in6;
4161− } sgid_addr, dgid_addr;
4127+ union irdma_sockaddr sgid_addr, dgid_addr;
41624128 int err;
41634129 u8 dmac[ETH_ALEN];
41644130
4165− err = irdma_alloc_rsrc(rf, rf->allocated_ahs, rf->max_ah, &ah_id,
4166− &rf->next_ah);
4167− if (err)
4168− return err;
4169−
41704131 ah->pd = pd;
41714132 sc_ah = &ah->sc_ah;
4172− sc_ah->ah_info.ah_idx = ah_id;
41734133 sc_ah->ah_info.vsi = &iwdev->vsi;
41744134 irdma_sc_init_ah(&rf->sc_dev, sc_ah);
41754135 ah->sgid_index = ah_attr->grh.sgid_index;
@@ -4179,10 +4139,7 @@ static int irdma_create_ah(struct ib_ah *ibah, · 3 unmodified lines
41794139 rdma_gid2ip((struct sockaddr *)&dgid_addr, &ah_attr->grh.dgid);
41804140 ah->av.attrs = *ah_attr;
41814141 ah->av.net_type = rdma_gid_attr_network_type(sgid_attr);
4182− ah->av.sgid_addr.saddr = sgid_addr.saddr;
4183− ah->av.dgid_addr.saddr = dgid_addr.saddr;
41844142 ah_info = &sc_ah->ah_info;
4185− ah_info->ah_idx = ah_id;
41864143 ah_info->pd_idx = pd->sc_pd.pd_id;
41874144 if (ah_attr->ah_flags & IB_AH_GRH) {
41884145 ah_info->flow_label = ah_attr->grh.flow_label;
@@ -4191,7 +4148,7 @@ static int irdma_create_ah(struct ib_ah *ibah, · 2 unmodified lines
41914148 }
41924149
41934150 ether_addr_copy(dmac, ah_attr->roce.dmac);
4194− if (rdma_gid_attr_network_type(sgid_attr) == RDMA_NETWORK_IPV4) {
4151+ if (ah->av.net_type == RDMA_NETWORK_IPV4) {
41954152 ah_info->ipv4_valid = true;
41964153 ah_info->dest_ip_addr[0] =
41974154 ntohl(dgid_addr.saddr_in.sin_addr.s_addr);
@@ -4219,17 +4176,15 @@ static int irdma_create_ah(struct ib_ah *ibah, · 21 unmodified lines
42194176 err = rdma_read_gid_l2_fields(sgid_attr, &ah_info->vlan_tag,
42204177 ah_info->mac_addr);
42214178 if (err)
4222− goto error;
4179+ return err;
42234180
42244181 ah_info->dst_arpindex = irdma_add_arp(iwdev->rf, ah_info->dest_ip_addr,
42254182 ah_info->ipv4_valid, dmac);
42264183
4227− if (ah_info->dst_arpindex == -1) {
4228− err = -EINVAL;
4229− goto error;
4230− }
4184+ if (ah_info->dst_arpindex == -1)
4185+ return -EINVAL;
42314186
4232− if (ah_info->vlan_tag >= VLAN_N_VID && iwdev->dcb)
4187+ if (ah_info->vlan_tag >= VLAN_N_VID && iwdev->dcb_vlan_mode)
42334188 ah_info->vlan_tag = 0;
42344189
42354190 if (ah_info->vlan_tag < VLAN_N_VID) {
@@ -4238,43 +4193,38 @@ static int irdma_create_ah(struct ib_ah *ibah, · 2 unmodified lines
42384193 rt_tos2priority(ah_info->tc_tos) << VLAN_PRIO_SHIFT;
42394194 }
42404195
4241− err = irdma_ah_cqp_op(iwdev->rf, sc_ah, IRDMA_OP_AH_CREATE,
4242− attr->flags & RDMA_CREATE_AH_SLEEPABLE,
4243− irdma_gsi_ud_qp_ah_cb, sc_ah);
4244−
4245− if (err) {
4246− ibdev_dbg(&iwdev->ibdev,
4247− "VERBS: CQP-OP Create AH fail");
4248− goto error;
4249− }
4250−
4251− if (!(attr->flags & RDMA_CREATE_AH_SLEEPABLE)) {
4252− int cnt = CQP_COMPL_WAIT_TIME_MS * CQP_TIMEOUT_THRESHOLD;
4253−
4254− do {
4255− irdma_cqp_ce_handler(rf, &rf->ccq.sc_cq);
4256− mdelay(1);
4257− } while (!sc_ah->ah_info.ah_valid && --cnt);
4196+ return 0;
4197+}
42584198
4259− if (!cnt) {
4260− ibdev_dbg(&iwdev->ibdev,
4261− "VERBS: CQP create AH timed out");
4262− err = -ETIMEDOUT;
4263− goto error;
4199+/**
4200+ * irdma_ah_exists - Check for existing identical AH
4201+ * @iwdev: irdma device
4202+ * @new_ah: AH to check for
4203+ *
4204+ * returns true if AH is found, false if not found.
4205+ */
4206+static bool irdma_ah_exists(struct irdma_device *iwdev,
4207+ struct irdma_ah *new_ah)
4208+{
4209+ struct irdma_ah *ah;
4210+ u32 key = new_ah->sc_ah.ah_info.dest_ip_addr[0] ^
4211+ new_ah->sc_ah.ah_info.dest_ip_addr[1] ^
4212+ new_ah->sc_ah.ah_info.dest_ip_addr[2] ^
4213+ new_ah->sc_ah.ah_info.dest_ip_addr[3];
4214+
4215+ hash_for_each_possible(iwdev->ah_hash_tbl, ah, list, key) {
4216+ /* Set ah_valid and ah_id the same so memcmp can work */
4217+ new_ah->sc_ah.ah_info.ah_idx = ah->sc_ah.ah_info.ah_idx;
4218+ new_ah->sc_ah.ah_info.ah_valid = ah->sc_ah.ah_info.ah_valid;
4219+ if (!memcmp(&ah->sc_ah.ah_info, &new_ah->sc_ah.ah_info,
4220+ sizeof(ah->sc_ah.ah_info))) {
4221+ refcount_inc(&ah->refcnt);
4222+ new_ah->parent_ah = ah;
4223+ return true;
42644224 }
42654225 }
42664226
4267− if (udata) {
4268− uresp.ah_id = ah->sc_ah.ah_info.ah_idx;
4269− err = ib_copy_to_udata(udata, &uresp,
4270− min(sizeof(uresp), udata->outlen));
4271− }
4272− return 0;
4273−
4274−error:
4275− irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs, ah_id);
4276−
4277− return err;
4227+ return false;
42784228 }
42794229
42804230 /**
@@ -4287,6 +4237,17 @@ static int irdma_destroy_ah(struct ib_ah *ibah, u32 ah_flags) · 6 unmodified lines
42874237 struct irdma_device *iwdev = to_iwdev(ibah->device);
42884238 struct irdma_ah *ah = to_iwah(ibah);
42894239
4240+ if ((ah_flags & RDMA_DESTROY_AH_SLEEPABLE) && ah->parent_ah) {
4241+ mutex_lock(&iwdev->ah_tbl_lock);
4242+ if (!refcount_dec_and_test(&ah->parent_ah->refcnt)) {
4243+ mutex_unlock(&iwdev->ah_tbl_lock);
4244+ return 0;
4245+ }
4246+ hash_del(&ah->parent_ah->list);
4247+ kfree(ah->parent_ah);
4248+ mutex_unlock(&iwdev->ah_tbl_lock);
4249+ }
4250+
42904251 irdma_ah_cqp_op(iwdev->rf, &ah->sc_ah, IRDMA_OP_AH_DESTROY,
42914252 false, NULL, ah);
42924253
@@ -4296,6 +4257,80 @@ static int irdma_destroy_ah(struct ib_ah *ibah, u32 ah_flags) · 3 unmodified lines
42964257 return 0;
42974258 }
42984259
4260+/**
4261+ * irdma_create_user_ah - create user address handle
4262+ * @ibah: address handle
4263+ * @attr: address handle attributes
4264+ * @udata: User data
4265+ *
4266+ * returns 0 on success, error otherwise
4267+ */
4268+static int irdma_create_user_ah(struct ib_ah *ibah,
4269+ struct rdma_ah_init_attr *attr,
4270+ struct ib_udata *udata)
4271+{
4272+ struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
4273+ struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
4274+ struct irdma_create_ah_resp uresp;
4275+ struct irdma_ah *parent_ah;
4276+ int err;
4277+
4278+ err = irdma_setup_ah(ibah, attr);
4279+ if (err)
4280+ return err;
4281+ mutex_lock(&iwdev->ah_tbl_lock);
4282+ if (!irdma_ah_exists(iwdev, ah)) {
4283+ err = irdma_create_hw_ah(iwdev, ah, true);
4284+ if (err) {
4285+ mutex_unlock(&iwdev->ah_tbl_lock);
4286+ return err;
4287+ }
4288+ /* Add new AH to list */
4289+ parent_ah = kmemdup(ah, sizeof(*ah), GFP_KERNEL);
4290+ if (parent_ah) {
4291+ u32 key = parent_ah->sc_ah.ah_info.dest_ip_addr[0] ^
4292+ parent_ah->sc_ah.ah_info.dest_ip_addr[1] ^
4293+ parent_ah->sc_ah.ah_info.dest_ip_addr[2] ^
4294+ parent_ah->sc_ah.ah_info.dest_ip_addr[3];
4295+
4296+ ah->parent_ah = parent_ah;
4297+ hash_add(iwdev->ah_hash_tbl, &parent_ah->list, key);
4298+ refcount_set(&parent_ah->refcnt, 1);
4299+ }
4300+ }
4301+ mutex_unlock(&iwdev->ah_tbl_lock);
4302+
4303+ uresp.ah_id = ah->sc_ah.ah_info.ah_idx;
4304+ err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp), udata->outlen));
4305+ if (err)
4306+ irdma_destroy_ah(ibah, attr->flags);
4307+
4308+ return err;
4309+}
4310+
4311+/**
4312+ * irdma_create_ah - create address handle
4313+ * @ibah: address handle
4314+ * @attr: address handle attributes
4315+ * @udata: NULL
4316+ *
4317+ * returns 0 on success, error otherwise
4318+ */
4319+static int irdma_create_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *attr,
4320+ struct ib_udata *udata)
4321+{
4322+ struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
4323+ struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
4324+ int err;
4325+
4326+ err = irdma_setup_ah(ibah, attr);
4327+ if (err)
4328+ return err;
4329+ err = irdma_create_hw_ah(iwdev, ah, attr->flags & RDMA_CREATE_AH_SLEEPABLE);
4330+
4331+ return err;
4332+}
4333+
42994334 /**
43004335 * irdma_query_ah - Query address handle
43014336 * @ibah: pointer to address handle
@@ -4329,7 +4364,7 @@ static enum rdma_link_layer irdma_get_link_layer(struct ib_device *ibdev, · 27 unmodified lines
43294364 static const struct ib_device_ops irdma_roce_dev_ops = {
43304365 .attach_mcast = irdma_attach_mcast,
43314366 .create_ah = irdma_create_ah,
4332− .create_user_ah = irdma_create_ah,
4367+ .create_user_ah = irdma_create_user_ah,
43334368 .destroy_ah = irdma_destroy_ah,
43344369 .detach_mcast = irdma_detach_mcast,
43354370 .get_link_layer = irdma_get_link_layer,
drivers/infiniband/hw/irdma/verbs.h+10−5
@@ -25,14 +25,16 @@ struct irdma_pd { · 24 unmodified lines
2525 struct irdma_sc_pd sc_pd;
2626 };
2727
28+union irdma_sockaddr {
29+ struct sockaddr_in saddr_in;
30+ struct sockaddr_in6 saddr_in6;
31+};
32+
2833 struct irdma_av {
2934 u8 macaddr[16];
3035 struct rdma_ah_attr attrs;
31− union {
32− struct sockaddr saddr;
33− struct sockaddr_in saddr_in;
34− struct sockaddr_in6 saddr_in6;
35− } sgid_addr, dgid_addr;
36+ union irdma_sockaddr sgid_addr;
37+ union irdma_sockaddr dgid_addr;
3638 u8 net_type;
3739 };
3840
@@ -43,6 +45,9 @@ struct irdma_ah { · 4 unmodified lines
4345 struct irdma_av av;
4446 u8 sgid_index;
4547 union ib_gid dgid;
48+ struct hlist_node list;
49+ refcount_t refcnt;
50+ struct irdma_ah *parent_ah; /* AH from cached list */
4651 };
4752
4853 struct irdma_hmc_pble {
drivers/infiniband/hw/irdma/ws.c+9−10
@@ -1,7 +1,6 @@
11 // SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
22 /* Copyright (c) 2017 - 2021 Intel Corporation */
33 #include "osdep.h"
4−#include "status.h"
54 #include "hmc.h"
65 #include "defs.h"
76 #include "type.h"
@@ -87,8 +86,8 @@ static void irdma_free_node(struct irdma_sc_vsi *vsi, · 79 unmodified lines
8786 * @node: pointer to node
8887 * @cmd: add, remove or modify
8988 */
90−static enum irdma_status_code
91−irdma_ws_cqp_cmd(struct irdma_sc_vsi *vsi, struct irdma_ws_node *node, u8 cmd)
89+static int irdma_ws_cqp_cmd(struct irdma_sc_vsi *vsi,
90+ struct irdma_ws_node *node, u8 cmd)
9291 {
9392 struct irdma_ws_node_info node_info = {};
9493
@@ -106,7 +105,7 @@ irdma_ws_cqp_cmd(struct irdma_sc_vsi *vsi, struct irdma_ws_node *node, u8 cmd) · 11 unmodified lines
106105 node_info.enable = node->enable;
107106 if (irdma_cqp_ws_node_cmd(vsi->dev, cmd, &node_info)) {
108107 ibdev_dbg(to_ibdev(vsi->dev), "WS: CQP WS CMD failed\n");
109− return IRDMA_ERR_NO_MEMORY;
108+ return -ENOMEM;
110109 }
111110
112111 if (node->type_leaf && cmd == IRDMA_OP_WS_ADD_NODE) {
@@ -234,18 +233,18 @@ static void irdma_remove_leaf(struct irdma_sc_vsi *vsi, u8 user_pri) · 121 unmodified lines
234233 * @vsi: vsi pointer
235234 * @user_pri: user priority
236235 */
237−enum irdma_status_code irdma_ws_add(struct irdma_sc_vsi *vsi, u8 user_pri)
236+int irdma_ws_add(struct irdma_sc_vsi *vsi, u8 user_pri)
238237 {
239238 struct irdma_ws_node *ws_tree_root;
240239 struct irdma_ws_node *vsi_node;
241240 struct irdma_ws_node *tc_node;
242241 u16 traffic_class;
243− enum irdma_status_code ret = 0;
242+ int ret = 0;
244243 int i;
245244
246245 mutex_lock(&vsi->dev->ws_mutex);
247246 if (vsi->tc_change_pending) {
248− ret = IRDMA_ERR_NOT_READY;
247+ ret = -EBUSY;
249248 goto exit;
250249 }
251250
@@ -258,7 +257,7 @@ enum irdma_status_code irdma_ws_add(struct irdma_sc_vsi *vsi, u8 user_pri) · 6 unmodified lines
258257 ws_tree_root = irdma_alloc_node(vsi, user_pri,
259258 WS_NODE_TYPE_PARENT, NULL);
260259 if (!ws_tree_root) {
261− ret = IRDMA_ERR_NO_MEMORY;
260+ ret = -ENOMEM;
262261 goto exit;
263262 }
264263
@@ -283,7 +282,7 @@ enum irdma_status_code irdma_ws_add(struct irdma_sc_vsi *vsi, u8 user_pri) · 18 unmodified lines
283282 vsi_node = irdma_alloc_node(vsi, user_pri, WS_NODE_TYPE_PARENT,
284283 ws_tree_root);
285284 if (!vsi_node) {
286− ret = IRDMA_ERR_NO_MEMORY;
285+ ret = -ENOMEM;
287286 goto vsi_add_err;
288287 }
289288
@@ -310,7 +309,7 @@ enum irdma_status_code irdma_ws_add(struct irdma_sc_vsi *vsi, u8 user_pri) · 20 unmodified lines
310309 tc_node = irdma_alloc_node(vsi, user_pri, WS_NODE_TYPE_LEAF,
311310 vsi_node);
312311 if (!tc_node) {
313− ret = IRDMA_ERR_NO_MEMORY;
312+ ret = -ENOMEM;
314313 goto leaf_add_err;
315314 }
316315
drivers/infiniband/hw/irdma/ws.h+1−1
@@ -34,7 +34,7 @@ struct irdma_ws_node { · 33 unmodified lines
3434 };
3535
3636 struct irdma_sc_vsi;
37−enum irdma_status_code irdma_ws_add(struct irdma_sc_vsi *vsi, u8 user_pri);
37+int irdma_ws_add(struct irdma_sc_vsi *vsi, u8 user_pri);
3838 void irdma_ws_remove(struct irdma_sc_vsi *vsi, u8 user_pri);
3939 void irdma_ws_reset(struct irdma_sc_vsi *vsi);
4040
drivers/infiniband/hw/mlx4/alias_GUID.c+0−1
@@ -38,7 +38,6 @@ · 37 unmodified lines
3838 #include <rdma/ib_sa.h>
3939 #include <rdma/ib_pack.h>
4040 #include <linux/mlx4/cmd.h>
41−#include <linux/module.h>
4241 #include <linux/init.h>
4342 #include <linux/errno.h>
4443 #include <rdma/ib_user_verbs.h>
drivers/infiniband/hw/mlx4/srq.c+0−1
@@ -320,7 +320,6 @@ int mlx4_ib_post_srq_recv(struct ib_srq *ibsrq, const struct ib_recv_wr *wr, · 319 unmodified lines
320320 if (mdev->dev->persist->state & MLX4_DEVICE_STATE_INTERNAL_ERROR) {
321321 err = -EIO;
322322 *bad_wr = wr;
323− nreq = 0;
324323 goto out;
325324 }
326325
drivers/infiniband/hw/mlx5/devx.c+3−1
@@ -1895,8 +1895,10 @@ subscribe_event_xa_alloc(struct mlx5_devx_event_table *devx_event_table, · 1894 unmodified lines
18951895 key_level2,
18961896 obj_event,
18971897 GFP_KERNEL);
1898− if (err)
1898+ if (err) {
1899+ kfree(obj_event);
18991900 return err;
1901+ }
19001902 INIT_LIST_HEAD(&obj_event->obj_sub_list);
19011903 }
19021904
drivers/infiniband/hw/mlx5/ib_virt.c+0−1
@@ -30,7 +30,6 @@ · 29 unmodified lines
3030 * SOFTWARE.
3131 */
3232
33−#include <linux/module.h>
3433 #include <linux/mlx5/vport.h>
3534 #include "mlx5_ib.h"
3635
drivers/infiniband/hw/mlx5/mem.c+0−1
@@ -30,7 +30,6 @@ · 29 unmodified lines
3030 * SOFTWARE.
3131 */
3232
33−#include <linux/module.h>
3433 #include <rdma/ib_umem.h>
3534 #include <rdma/ib_umem_odp.h>
3635 #include "mlx5_ib.h"
drivers/infiniband/hw/mlx5/mlx5_ib.h+3−9
@@ -763,9 +763,9 @@ struct mlx5_cache_ent { · 762 unmodified lines
763763
764764 char name[4];
765765 u32 order;
766− u32 xlt;
767766 u32 access_mode;
768767 u32 page;
768+ unsigned int ndescs;
769769
770770 u8 disabled:1;
771771 u8 fill_to_high_water:1;
@@ -788,7 +788,6 @@ struct mlx5_cache_ent { · 16 unmodified lines
788788 u32 miss;
789789
790790 struct mlx5_ib_dev *dev;
791− struct work_struct work;
792791 struct delayed_work dwork;
793792 };
794793
@@ -1344,7 +1343,8 @@ int mlx5_mr_cache_init(struct mlx5_ib_dev *dev); · 549 unmodified lines
13441343 int mlx5_mr_cache_cleanup(struct mlx5_ib_dev *dev);
13451344
13461345 struct mlx5_ib_mr *mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev,
1347− unsigned int entry, int access_flags);
1346+ struct mlx5_cache_ent *ent,
1347+ int access_flags);
13481348
13491349 int mlx5_ib_check_mr_status(struct ib_mr *ibmr, u32 check_mask,
13501350 struct ib_mr_status *mr_status);
@@ -1539,12 +1539,6 @@ static inline int get_uars_per_sys_page(struct mlx5_ib_dev *dev, bool lib_suppor · 188 unmodified lines
15391539 MLX5_UARS_IN_PAGE : 1;
15401540 }
15411541
1542−static inline int get_num_static_uars(struct mlx5_ib_dev *dev,
1543− struct mlx5_bfreg_info *bfregi)
1544−{
1545− return get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * bfregi->num_static_sys_pages;
1546−}
1547−
15481542 extern void *xlt_emergency_page;
15491543
15501544 int bfregn_to_uar_index(struct mlx5_ib_dev *dev,
drivers/infiniband/hw/mlx5/mr.c+39−65
@@ -68,7 +68,6 @@ static void set_mkc_access_pd_addr_fields(void *mkc, int acc, u64 start_addr, · 67 unmodified lines
6868 struct ib_pd *pd)
6969 {
7070 struct mlx5_ib_dev *dev = to_mdev(pd->device);
71− bool ro_pci_enabled = pcie_relaxed_ordering_enabled(dev->mdev->pdev);
7271
7372 MLX5_SET(mkc, mkc, a, !!(acc & IB_ACCESS_REMOTE_ATOMIC));
7473 MLX5_SET(mkc, mkc, rw, !!(acc & IB_ACCESS_REMOTE_WRITE));
@@ -76,12 +75,13 @@ static void set_mkc_access_pd_addr_fields(void *mkc, int acc, u64 start_addr, · 1 unmodified line
7675 MLX5_SET(mkc, mkc, lw, !!(acc & IB_ACCESS_LOCAL_WRITE));
7776 MLX5_SET(mkc, mkc, lr, 1);
7877
79− if (MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write))
80− MLX5_SET(mkc, mkc, relaxed_ordering_write,
81− (acc & IB_ACCESS_RELAXED_ORDERING) && ro_pci_enabled);
82− if (MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read))
83− MLX5_SET(mkc, mkc, relaxed_ordering_read,
84− (acc & IB_ACCESS_RELAXED_ORDERING) && ro_pci_enabled);
78+ if ((acc & IB_ACCESS_RELAXED_ORDERING) &&
79+ pcie_relaxed_ordering_enabled(dev->mdev->pdev)) {
80+ if (MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write))
81+ MLX5_SET(mkc, mkc, relaxed_ordering_write, 1);
82+ if (MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read))
83+ MLX5_SET(mkc, mkc, relaxed_ordering_read, 1);
84+ }
8585
8686 MLX5_SET(mkc, mkc, pd, to_mpd(pd)->pdn);
8787 MLX5_SET(mkc, mkc, qpn, 0xffffff);
@@ -189,6 +189,25 @@ static void create_mkey_callback(int status, struct mlx5_async_work *context) · 101 unmodified lines
189189 spin_unlock_irqrestore(&ent->lock, flags);
190190 }
191191
192+static int get_mkc_octo_size(unsigned int access_mode, unsigned int ndescs)
193+{
194+ int ret = 0;
195+
196+ switch (access_mode) {
197+ case MLX5_MKC_ACCESS_MODE_MTT:
198+ ret = DIV_ROUND_UP(ndescs, MLX5_IB_UMR_OCTOWORD /
199+ sizeof(struct mlx5_mtt));
200+ break;
201+ case MLX5_MKC_ACCESS_MODE_KSM:
202+ ret = DIV_ROUND_UP(ndescs, MLX5_IB_UMR_OCTOWORD /
203+ sizeof(struct mlx5_klm));
204+ break;
205+ default:
206+ WARN_ON(1);
207+ }
208+ return ret;
209+}
210+
192211 static struct mlx5_ib_mr *alloc_cache_mr(struct mlx5_cache_ent *ent, void *mkc)
193212 {
194213 struct mlx5_ib_mr *mr;
@@ -204,7 +223,8 @@ static struct mlx5_ib_mr *alloc_cache_mr(struct mlx5_cache_ent *ent, void *mkc) · 9 unmodified lines
204223 MLX5_SET(mkc, mkc, access_mode_1_0, ent->access_mode & 0x3);
205224 MLX5_SET(mkc, mkc, access_mode_4_2, (ent->access_mode >> 2) & 0x7);
206225
207− MLX5_SET(mkc, mkc, translations_octword_size, ent->xlt);
226+ MLX5_SET(mkc, mkc, translations_octword_size,
227+ get_mkc_octo_size(ent->access_mode, ent->ndescs));
208228 MLX5_SET(mkc, mkc, log_page_size, ent->page);
209229 return mr;
210230 }
@@ -478,14 +498,14 @@ static void queue_adjust_cache_locked(struct mlx5_cache_ent *ent) · 267 unmodified lines
478498 return;
479499 if (ent->available_mrs < ent->limit) {
480500 ent->fill_to_high_water = true;
481− queue_work(ent->dev->cache.wq, &ent->work);
501+ mod_delayed_work(ent->dev->cache.wq, &ent->dwork, 0);
482502 } else if (ent->fill_to_high_water &&
483503 ent->available_mrs + ent->pending < 2 * ent->limit) {
484504 /*
485505 * Once we start populating due to hitting a low water mark
486506 * continue until we pass the high water mark.
487507 */
488− queue_work(ent->dev->cache.wq, &ent->work);
508+ mod_delayed_work(ent->dev->cache.wq, &ent->dwork, 0);
489509 } else if (ent->available_mrs == 2 * ent->limit) {
490510 ent->fill_to_high_water = false;
491511 } else if (ent->available_mrs > 2 * ent->limit) {
@@ -495,7 +515,7 @@ static void queue_adjust_cache_locked(struct mlx5_cache_ent *ent) · 3 unmodified lines
495515 queue_delayed_work(ent->dev->cache.wq, &ent->dwork,
496516 msecs_to_jiffies(1000));
497517 else
498− queue_work(ent->dev->cache.wq, &ent->work);
518+ mod_delayed_work(ent->dev->cache.wq, &ent->dwork, 0);
499519 }
500520 }
501521
@@ -571,33 +591,20 @@ static void delayed_cache_work_func(struct work_struct *work) · 69 unmodified lines
571591 __cache_work_func(ent);
572592 }
573593
574−static void cache_work_func(struct work_struct *work)
575−{
576− struct mlx5_cache_ent *ent;
577−
578− ent = container_of(work, struct mlx5_cache_ent, work);
579− __cache_work_func(ent);
580−}
581−
582−/* Allocate a special entry from the cache */
583594 struct mlx5_ib_mr *mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev,
584− unsigned int entry, int access_flags)
595+ struct mlx5_cache_ent *ent,
596+ int access_flags)
585597 {
586− struct mlx5_mr_cache *cache = &dev->cache;
587− struct mlx5_cache_ent *ent;
588598 struct mlx5_ib_mr *mr;
589599
590− if (WARN_ON(entry <= MR_CACHE_LAST_STD_ENTRY ||
591− entry >= ARRAY_SIZE(cache->ent)))
592− return ERR_PTR(-EINVAL);
593−
594600 /* Matches access in alloc_cache_mr() */
595601 if (!mlx5_ib_can_reconfig_with_umr(dev, 0, access_flags))
596602 return ERR_PTR(-EOPNOTSUPP);
597603
598− ent = &cache->ent[entry];
599604 spin_lock_irq(&ent->lock);
600605 if (list_empty(&ent->head)) {
606+ queue_adjust_cache_locked(ent);
607+ ent->miss++;
601608 spin_unlock_irq(&ent->lock);
602609 mr = create_cache_mr(ent);
603610 if (IS_ERR(mr))
@@ -611,32 +618,9 @@ struct mlx5_ib_mr *mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev, · 7 unmodified lines
611618
612619 mlx5_clear_mr(mr);
613620 }
614− mr->access_flags = access_flags;
615621 return mr;
616622 }
617623
618−/* Return a MR already available in the cache */
619−static struct mlx5_ib_mr *get_cache_mr(struct mlx5_cache_ent *req_ent)
620−{
621− struct mlx5_ib_mr *mr = NULL;
622− struct mlx5_cache_ent *ent = req_ent;
623−
624− spin_lock_irq(&ent->lock);
625− if (!list_empty(&ent->head)) {
626− mr = list_first_entry(&ent->head, struct mlx5_ib_mr, list);
627− list_del(&mr->list);
628− ent->available_mrs--;
629− queue_adjust_cache_locked(ent);
630− spin_unlock_irq(&ent->lock);
631− mlx5_clear_mr(mr);
632− return mr;
633− }
634− queue_adjust_cache_locked(ent);
635− spin_unlock_irq(&ent->lock);
636− req_ent->miss++;
637− return NULL;
638−}
639−
640624 static void mlx5_mr_cache_free(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr)
641625 {
642626 struct mlx5_cache_ent *ent = mr->cache_ent;
@@ -739,7 +723,6 @@ int mlx5_mr_cache_init(struct mlx5_ib_dev *dev) · 96 unmodified lines
739723 ent->dev = dev;
740724 ent->limit = 0;
741725
742− INIT_WORK(&ent->work, cache_work_func);
743726 INIT_DELAYED_WORK(&ent->dwork, delayed_cache_work_func);
744727
745728 if (i > MR_CACHE_LAST_STD_ENTRY) {
@@ -751,8 +734,7 @@ int mlx5_mr_cache_init(struct mlx5_ib_dev *dev) · 5 unmodified lines
751734 continue;
752735
753736 ent->page = PAGE_SHIFT;
754− ent->xlt = (1 << ent->order) * sizeof(struct mlx5_mtt) /
755− MLX5_IB_UMR_OCTOWORD;
737+ ent->ndescs = 1 << ent->order;
756738 ent->access_mode = MLX5_MKC_ACCESS_MODE_MTT;
757739 if ((dev->mdev->profile.mask & MLX5_PROF_MASK_MR_CACHE) &&
758740 !dev->is_rep && mlx5_core_is_pf(dev->mdev) &&
@@ -783,7 +765,6 @@ int mlx5_mr_cache_cleanup(struct mlx5_ib_dev *dev) · 24 unmodified lines
783765 spin_lock_irq(&ent->lock);
784766 ent->disabled = true;
785767 spin_unlock_irq(&ent->lock);
786− cancel_work_sync(&ent->work);
787768 cancel_delayed_work_sync(&ent->dwork);
788769 }
789770
@@ -972,16 +953,9 @@ static struct mlx5_ib_mr *alloc_cacheable_mr(struct ib_pd *pd, · 182 unmodified lines
972953 return mr;
973954 }
974955
975− mr = get_cache_mr(ent);
976− if (!mr) {
977− mr = create_cache_mr(ent);
978− /*
979− * The above already tried to do the same stuff as reg_create(),
980− * no reason to try it again.
981− */
982− if (IS_ERR(mr))
983− return mr;
984− }
956+ mr = mlx5_mr_cache_alloc(dev, ent, access_flags);
957+ if (IS_ERR(mr))
958+ return mr;
985959
986960 mr->ibmr.pd = pd;
987961 mr->umem = umem;
drivers/infiniband/hw/mlx5/odp.c+10−9
@@ -407,6 +407,7 @@ static void mlx5_ib_page_fault_resume(struct mlx5_ib_dev *dev, · 406 unmodified lines
407407 static struct mlx5_ib_mr *implicit_get_child_mr(struct mlx5_ib_mr *imr,
408408 unsigned long idx)
409409 {
410+ struct mlx5_ib_dev *dev = mr_to_mdev(imr);
410411 struct ib_umem_odp *odp;
411412 struct mlx5_ib_mr *mr;
412413 struct mlx5_ib_mr *ret;
@@ -418,13 +419,14 @@ static struct mlx5_ib_mr *implicit_get_child_mr(struct mlx5_ib_mr *imr, · 5 unmodified lines
418419 if (IS_ERR(odp))
419420 return ERR_CAST(odp);
420421
421− mr = mlx5_mr_cache_alloc(
422− mr_to_mdev(imr), MLX5_IMR_MTT_CACHE_ENTRY, imr->access_flags);
422+ mr = mlx5_mr_cache_alloc(dev, &dev->cache.ent[MLX5_IMR_MTT_CACHE_ENTRY],
423+ imr->access_flags);
423424 if (IS_ERR(mr)) {
424425 ib_umem_odp_release(odp);
425426 return mr;
426427 }
427428
429+ mr->access_flags = imr->access_flags;
428430 mr->ibmr.pd = imr->ibmr.pd;
429431 mr->ibmr.device = &mr_to_mdev(imr)->ib_dev;
430432 mr->umem = &odp->umem;
@@ -493,12 +495,15 @@ struct mlx5_ib_mr *mlx5_ib_alloc_implicit_mr(struct mlx5_ib_pd *pd, · 62 unmodified lines
493495 if (IS_ERR(umem_odp))
494496 return ERR_CAST(umem_odp);
495497
496− imr = mlx5_mr_cache_alloc(dev, MLX5_IMR_KSM_CACHE_ENTRY, access_flags);
498+ imr = mlx5_mr_cache_alloc(dev,
499+ &dev->cache.ent[MLX5_IMR_KSM_CACHE_ENTRY],
500+ access_flags);
497501 if (IS_ERR(imr)) {
498502 ib_umem_odp_release(umem_odp);
499503 return imr;
500504 }
501505
506+ imr->access_flags = access_flags;
502507 imr->ibmr.pd = &pd->ibpd;
503508 imr->ibmr.iova = 0;
504509 imr->umem = &umem_odp->umem;
@@ -1593,18 +1598,14 @@ void mlx5_odp_init_mr_cache_entry(struct mlx5_cache_ent *ent) · 1088 unmodified lines
15931598 switch (ent->order - 2) {
15941599 case MLX5_IMR_MTT_CACHE_ENTRY:
15951600 ent->page = PAGE_SHIFT;
1596− ent->xlt = MLX5_IMR_MTT_ENTRIES *
1597− sizeof(struct mlx5_mtt) /
1598− MLX5_IB_UMR_OCTOWORD;
1601+ ent->ndescs = MLX5_IMR_MTT_ENTRIES;
15991602 ent->access_mode = MLX5_MKC_ACCESS_MODE_MTT;
16001603 ent->limit = 0;
16011604 break;
16021605
16031606 case MLX5_IMR_KSM_CACHE_ENTRY:
16041607 ent->page = MLX5_KSM_PAGE_SHIFT;
1605− ent->xlt = mlx5_imr_ksm_entries *
1606− sizeof(struct mlx5_klm) /
1607− MLX5_IB_UMR_OCTOWORD;
1608+ ent->ndescs = mlx5_imr_ksm_entries;
16081609 ent->access_mode = MLX5_MKC_ACCESS_MODE_KSM;
16091610 ent->limit = 0;
16101611 break;
drivers/infiniband/hw/mlx5/qp.c+2−2
@@ -31,7 +31,6 @@ · 30 unmodified lines
3131 */
3232
3333 #include <linux/etherdevice.h>
34−#include <linux/module.h>
3534 #include <rdma/ib_umem.h>
3635 #include <rdma/ib_cache.h>
3736 #include <rdma/ib_user_verbs.h>
@@ -615,7 +614,8 @@ enum { · 577 unmodified lines
615614
616615 static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi)
617616 {
618− return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR;
617+ return get_uars_per_sys_page(dev, bfregi->lib_uar_4k) *
618+ bfregi->num_static_sys_pages * MLX5_NON_FP_BFREGS_PER_UAR;
619619 }
620620
621621 static int num_med_bfreg(struct mlx5_ib_dev *dev,
drivers/infiniband/hw/mlx5/srq.c+0−1
@@ -3,7 +3,6 @@ · 2 unmodified lines
33 * Copyright (c) 2013-2018, Mellanox Technologies inc. All rights reserved.
44 */
55
6−#include <linux/module.h>
76 #include <linux/mlx5/qp.h>
87 #include <linux/slab.h>
98 #include <rdma/ib_umem.h>
drivers/infiniband/hw/mthca/mthca_main.c+2−6
@@ -939,12 +939,8 @@ static int __mthca_init_one(struct pci_dev *pdev, int hca_type) · 938 unmodified lines
939939
940940 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
941941 if (err) {
942− dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
943− err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
944− if (err) {
945− dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
946− goto err_free_res;
947− }
942+ dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
943+ goto err_free_res;
948944 }
949945
950946 /* We can handle large RDMA requests, so allow larger segments. */
drivers/infiniband/hw/mthca/mthca_profile.c+0−2
@@ -31,8 +31,6 @@ · 30 unmodified lines
3131 * SOFTWARE.
3232 */
3333
34−#include <linux/module.h>
35−#include <linux/moduleparam.h>
3634 #include <linux/string.h>
3735 #include <linux/slab.h>
3836
drivers/infiniband/hw/qib/qib_fs.c+0−1
@@ -32,7 +32,6 @@ · 31 unmodified lines
3232 * SOFTWARE.
3333 */
3434
35−#include <linux/module.h>
3635 #include <linux/fs.h>
3736 #include <linux/fs_context.h>
3837 #include <linux/mount.h>
drivers/infiniband/hw/qib/qib_iba7220.c+2−2
@@ -634,7 +634,7 @@ static const struct qib_hwerror_msgs qib_7220_hwerror_msgs[] = { · 633 unmodified lines
634634 QLOGIC_IB_HWE_MSG(QLOGIC_IB_HWE_PCIECPLTIMEOUT,
635635 "PCIe completion timeout"),
636636 /*
637− * In practice, it's unlikely wthat we'll see PCIe PLL, or bus
637+ * In practice, it's unlikely that we'll see PCIe PLL, or bus
638638 * parity or memory parity error failures, because most likely we
639639 * won't be able to talk to the core of the chip. Nonetheless, we
640640 * might see them, if they are in parts of the PCIe core that aren't
@@ -2988,7 +2988,7 @@ done: · 2347 unmodified lines
29882988 * the utility. Names need to be 12 chars or less (w/o newline), for proper
29892989 * display by utility.
29902990 * Non-error counters are first.
2991− * Start of "error" conters is indicated by a leading "E " on the first
2991+ * Start of "error" counters is indicated by a leading "E " on the first
29922992 * "error" counter, and doesn't count in label length.
29932993 * The EgrOvfl list needs to be last so we truncate them at the configured
29942994 * context count for the device.
drivers/infiniband/hw/usnic/usnic_debugfs.c+0−1
@@ -32,7 +32,6 @@ · 31 unmodified lines
3232 */
3333
3434 #include <linux/debugfs.h>
35−#include <linux/module.h>
3635
3736 #include "usnic.h"
3837 #include "usnic_log.h"
drivers/infiniband/hw/usnic/usnic_ib_qp_grp.c+0−1
@@ -32,7 +32,6 @@ · 31 unmodified lines
3232 */
3333 #include <linux/bug.h>
3434 #include <linux/errno.h>
35−#include <linux/module.h>
3635 #include <linux/spinlock.h>
3736
3837 #include "usnic_log.h"
drivers/infiniband/hw/usnic/usnic_ib_sysfs.c+0−1
@@ -31,7 +31,6 @@ · 30 unmodified lines
3131 *
3232 */
3333
34−#include <linux/module.h>
3534 #include <linux/init.h>
3635 #include <linux/errno.h>
3736
drivers/infiniband/hw/usnic/usnic_ib_verbs.c+0−1
@@ -30,7 +30,6 @@ · 29 unmodified lines
3030 * SOFTWARE.
3131 *
3232 */
33−#include <linux/module.h>
3433 #include <linux/init.h>
3534 #include <linux/slab.h>
3635 #include <linux/errno.h>
drivers/infiniband/hw/usnic/usnic_transport.c+0−1
@@ -32,7 +32,6 @@ · 31 unmodified lines
3232 */
3333 #include <linux/bitmap.h>
3434 #include <linux/file.h>
35−#include <linux/module.h>
3635 #include <linux/slab.h>
3736 #include <net/inet_sock.h>
3837
drivers/infiniband/hw/usnic/usnic_vnic.c+0−1
@@ -31,7 +31,6 @@ · 30 unmodified lines
3131 *
3232 */
3333 #include <linux/errno.h>
34−#include <linux/module.h>
3534 #include <linux/pci.h>
3635
3736 #include "usnic_ib.h"
drivers/infiniband/hw/vmw_pvrdma/pvrdma_main.c+4−6
@@ -811,12 +811,10 @@ static int pvrdma_pci_probe(struct pci_dev *pdev, · 810 unmodified lines
811811 }
812812
813813 /* Enable 64-Bit DMA */
814− if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) != 0) {
815− ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
816− if (ret != 0) {
817− dev_err(&pdev->dev, "dma_set_mask failed\n");
818− goto err_free_resource;
819− }
814+ ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
815+ if (ret) {
816+ dev_err(&pdev->dev, "dma_set_mask failed\n");
817+ goto err_free_resource;
820818 }
821819 dma_set_max_seg_size(&pdev->dev, UINT_MAX);
822820 pci_set_master(pdev);
drivers/infiniband/sw/rxe/rxe.c+18−92
@@ -28,8 +28,8 @@ void rxe_dealloc(struct ib_device *ib_dev) · 27 unmodified lines
2828 rxe_pool_cleanup(&rxe->cq_pool);
2929 rxe_pool_cleanup(&rxe->mr_pool);
3030 rxe_pool_cleanup(&rxe->mw_pool);
31− rxe_pool_cleanup(&rxe->mc_grp_pool);
32− rxe_pool_cleanup(&rxe->mc_elem_pool);
31+
32+ WARN_ON(!RB_EMPTY_ROOT(&rxe->mcg_tree));
3333
3434 if (rxe->tfm)
3535 crypto_free_shash(rxe->tfm);
@@ -114,106 +114,37 @@ static void rxe_init_ports(struct rxe_dev *rxe) · 78 unmodified lines
114114 }
115115
116116 /* init pools of managed objects */
117−static int rxe_init_pools(struct rxe_dev *rxe)
117+static void rxe_init_pools(struct rxe_dev *rxe)
118118 {
119− int err;
120−
121− err = rxe_pool_init(rxe, &rxe->uc_pool, RXE_TYPE_UC,
122− rxe->max_ucontext);
123− if (err)
124− goto err1;
125−
126− err = rxe_pool_init(rxe, &rxe->pd_pool, RXE_TYPE_PD,
127− rxe->attr.max_pd);
128− if (err)
129− goto err2;
130−
131− err = rxe_pool_init(rxe, &rxe->ah_pool, RXE_TYPE_AH,
132− rxe->attr.max_ah);
133− if (err)
134− goto err3;
135−
136− err = rxe_pool_init(rxe, &rxe->srq_pool, RXE_TYPE_SRQ,
137− rxe->attr.max_srq);
138− if (err)
139− goto err4;
140−
141− err = rxe_pool_init(rxe, &rxe->qp_pool, RXE_TYPE_QP,
142− rxe->attr.max_qp);
143− if (err)
144− goto err5;
145−
146− err = rxe_pool_init(rxe, &rxe->cq_pool, RXE_TYPE_CQ,
147− rxe->attr.max_cq);
148− if (err)
149− goto err6;
150−
151− err = rxe_pool_init(rxe, &rxe->mr_pool, RXE_TYPE_MR,
152− rxe->attr.max_mr);
153− if (err)
154− goto err7;
155−
156− err = rxe_pool_init(rxe, &rxe->mw_pool, RXE_TYPE_MW,
157− rxe->attr.max_mw);
158− if (err)
159− goto err8;
160−
161− err = rxe_pool_init(rxe, &rxe->mc_grp_pool, RXE_TYPE_MC_GRP,
162− rxe->attr.max_mcast_grp);
163− if (err)
164− goto err9;
165−
166− err = rxe_pool_init(rxe, &rxe->mc_elem_pool, RXE_TYPE_MC_ELEM,
167− rxe->attr.max_total_mcast_qp_attach);
168− if (err)
169− goto err10;
170−
171− return 0;
172−
173−err10:
174− rxe_pool_cleanup(&rxe->mc_grp_pool);
175−err9:
176− rxe_pool_cleanup(&rxe->mw_pool);
177−err8:
178− rxe_pool_cleanup(&rxe->mr_pool);
179−err7:
180− rxe_pool_cleanup(&rxe->cq_pool);
181−err6:
182− rxe_pool_cleanup(&rxe->qp_pool);
183−err5:
184− rxe_pool_cleanup(&rxe->srq_pool);
185−err4:
186− rxe_pool_cleanup(&rxe->ah_pool);
187−err3:
188− rxe_pool_cleanup(&rxe->pd_pool);
189−err2:
190− rxe_pool_cleanup(&rxe->uc_pool);
191−err1:
192− return err;
119+ rxe_pool_init(rxe, &rxe->uc_pool, RXE_TYPE_UC);
120+ rxe_pool_init(rxe, &rxe->pd_pool, RXE_TYPE_PD);
121+ rxe_pool_init(rxe, &rxe->ah_pool, RXE_TYPE_AH);
122+ rxe_pool_init(rxe, &rxe->srq_pool, RXE_TYPE_SRQ);
123+ rxe_pool_init(rxe, &rxe->qp_pool, RXE_TYPE_QP);
124+ rxe_pool_init(rxe, &rxe->cq_pool, RXE_TYPE_CQ);
125+ rxe_pool_init(rxe, &rxe->mr_pool, RXE_TYPE_MR);
126+ rxe_pool_init(rxe, &rxe->mw_pool, RXE_TYPE_MW);
193127 }
194128
195129 /* initialize rxe device state */
196−static int rxe_init(struct rxe_dev *rxe)
130+static void rxe_init(struct rxe_dev *rxe)
197131 {
198− int err;
199−
200132 /* init default device parameters */
201133 rxe_init_device_param(rxe);
202134
203135 rxe_init_ports(rxe);
204−
205− err = rxe_init_pools(rxe);
206− if (err)
207− return err;
136+ rxe_init_pools(rxe);
208137
209138 /* init pending mmap list */
210139 spin_lock_init(&rxe->mmap_offset_lock);
211140 spin_lock_init(&rxe->pending_lock);
212141 INIT_LIST_HEAD(&rxe->pending_mmaps);
213142
214− mutex_init(&rxe->usdev_lock);
143+ /* init multicast support */
144+ spin_lock_init(&rxe->mcg_lock);
145+ rxe->mcg_tree = RB_ROOT;
215146
216− return 0;
147+ mutex_init(&rxe->usdev_lock);
217148 }
218149
219150 void rxe_set_mtu(struct rxe_dev *rxe, unsigned int ndev_mtu)
@@ -235,12 +166,7 @@ void rxe_set_mtu(struct rxe_dev *rxe, unsigned int ndev_mtu) · 15 unmodified lines
235166 */
236167 int rxe_add(struct rxe_dev *rxe, unsigned int mtu, const char *ibdev_name)
237168 {
238− int err;
239−
240− err = rxe_init(rxe);
241− if (err)
242− return err;
243−
169+ rxe_init(rxe);
244170 rxe_set_mtu(rxe, mtu);
245171
246172 return rxe_register_device(rxe, ibdev_name);
drivers/infiniband/sw/rxe/rxe.h+0−1
@@ -12,7 +12,6 @@ · 11 unmodified lines
1212 #endif
1313 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
1414
15−#include <linux/module.h>
1615 #include <linux/skbuff.h>
1716
1817 #include <rdma/ib_verbs.h>
drivers/infiniband/sw/rxe/rxe_av.c+17−2
@@ -99,11 +99,14 @@ void rxe_av_fill_ip_info(struct rxe_av *av, struct rdma_ah_attr *attr) · 98 unmodified lines
9999 av->network_type = type;
100100 }
101101
102−struct rxe_av *rxe_get_av(struct rxe_pkt_info *pkt)
102+struct rxe_av *rxe_get_av(struct rxe_pkt_info *pkt, struct rxe_ah **ahp)
103103 {
104104 struct rxe_ah *ah;
105105 u32 ah_num;
106106
107+ if (ahp)
108+ *ahp = NULL;
109+
107110 if (!pkt || !pkt->qp)
108111 return NULL;
109112
@@ -117,10 +120,22 @@ struct rxe_av *rxe_get_av(struct rxe_pkt_info *pkt) · 7 unmodified lines
117120 if (ah_num) {
118121 /* only new user provider or kernel client */
119122 ah = rxe_pool_get_index(&pkt->rxe->ah_pool, ah_num);
120− if (!ah || ah->ah_num != ah_num || rxe_ah_pd(ah) != pkt->qp->pd) {
123+ if (!ah) {
121124 pr_warn("Unable to find AH matching ah_num\n");
122125 return NULL;
123126 }
127+
128+ if (rxe_ah_pd(ah) != pkt->qp->pd) {
129+ pr_warn("PDs don't match for AH and QP\n");
130+ rxe_put(ah);
131+ return NULL;
132+ }
133+
134+ if (ahp)
135+ *ahp = ah;
136+ else
137+ rxe_put(ah);
138+
124139 return &ah->av;
125140 }
126141
drivers/infiniband/sw/rxe/rxe_comp.c+4−4
@@ -526,7 +526,7 @@ static void rxe_drain_resp_pkts(struct rxe_qp *qp, bool notify) · 525 unmodified lines
526526 struct rxe_queue *q = qp->sq.queue;
527527
528528 while ((skb = skb_dequeue(&qp->resp_pkts))) {
529− rxe_drop_ref(qp);
529+ rxe_put(qp);
530530 kfree_skb(skb);
531531 ib_device_put(qp->ibqp.device);
532532 }
@@ -548,7 +548,7 @@ static void free_pkt(struct rxe_pkt_info *pkt) · 15 unmodified lines
548548 struct ib_device *dev = qp->ibqp.device;
549549
550550 kfree_skb(skb);
551− rxe_drop_ref(qp);
551+ rxe_put(qp);
552552 ib_device_put(dev);
553553 }
554554
@@ -562,7 +562,7 @@ int rxe_completer(void *arg) · 7 unmodified lines
562562 enum comp_state state;
563563 int ret = 0;
564564
565− rxe_add_ref(qp);
565+ rxe_get(qp);
566566
567567 if (!qp->valid || qp->req.state == QP_STATE_ERROR ||
568568 qp->req.state == QP_STATE_RESET) {
@@ -761,7 +761,7 @@ int rxe_completer(void *arg) · 192 unmodified lines
761761 done:
762762 if (pkt)
763763 free_pkt(pkt);
764− rxe_drop_ref(qp);
764+ rxe_put(qp);
765765
766766 return ret;
767767 }
drivers/infiniband/sw/rxe/rxe_cq.c+12−8
@@ -42,13 +42,14 @@ err1: · 41 unmodified lines
4242 static void rxe_send_complete(struct tasklet_struct *t)
4343 {
4444 struct rxe_cq *cq = from_tasklet(cq, t, comp_task);
45+ unsigned long flags;
4546
46− spin_lock_bh(&cq->cq_lock);
47+ spin_lock_irqsave(&cq->cq_lock, flags);
4748 if (cq->is_dying) {
48− spin_unlock_bh(&cq->cq_lock);
49+ spin_unlock_irqrestore(&cq->cq_lock, flags);
4950 return;
5051 }
51− spin_unlock_bh(&cq->cq_lock);
52+ spin_unlock_irqrestore(&cq->cq_lock, flags);
5253
5354 cq->ibcq.comp_handler(&cq->ibcq, cq->ibcq.cq_context);
5455 }
@@ -107,12 +108,13 @@ int rxe_cq_post(struct rxe_cq *cq, struct rxe_cqe *cqe, int solicited) · 52 unmodified lines
107108 struct ib_event ev;
108109 int full;
109110 void *addr;
111+ unsigned long flags;
110112
111− spin_lock_bh(&cq->cq_lock);
113+ spin_lock_irqsave(&cq->cq_lock, flags);
112114
113115 full = queue_full(cq->queue, QUEUE_TYPE_TO_CLIENT);
114116 if (unlikely(full)) {
115− spin_unlock_bh(&cq->cq_lock);
117+ spin_unlock_irqrestore(&cq->cq_lock, flags);
116118 if (cq->ibcq.event_handler) {
117119 ev.device = cq->ibcq.device;
118120 ev.element.cq = &cq->ibcq;
@@ -128,7 +130,7 @@ int rxe_cq_post(struct rxe_cq *cq, struct rxe_cqe *cqe, int solicited) · 9 unmodified lines
128130
129131 queue_advance_producer(cq->queue, QUEUE_TYPE_TO_CLIENT);
130132
131− spin_unlock_bh(&cq->cq_lock);
133+ spin_unlock_irqrestore(&cq->cq_lock, flags);
132134
133135 if ((cq->notify == IB_CQ_NEXT_COMP) ||
134136 (cq->notify == IB_CQ_SOLICITED && solicited)) {
@@ -141,9 +143,11 @@ int rxe_cq_post(struct rxe_cq *cq, struct rxe_cqe *cqe, int solicited) · 6 unmodified lines
141143
142144 void rxe_cq_disable(struct rxe_cq *cq)
143145 {
144− spin_lock_bh(&cq->cq_lock);
146+ unsigned long flags;
147+
148+ spin_lock_irqsave(&cq->cq_lock, flags);
145149 cq->is_dying = true;
146− spin_unlock_bh(&cq->cq_lock);
150+ spin_unlock_irqrestore(&cq->cq_lock, flags);
147151 }
148152
149153 void rxe_cq_cleanup(struct rxe_pool_elem *elem)
drivers/infiniband/sw/rxe/rxe_loc.h+8−24
@@ -19,7 +19,7 @@ void rxe_av_to_attr(struct rxe_av *av, struct rdma_ah_attr *attr); · 18 unmodified lines
1919
2020 void rxe_av_fill_ip_info(struct rxe_av *av, struct rdma_ah_attr *attr);
2121
22−struct rxe_av *rxe_get_av(struct rxe_pkt_info *pkt);
22+struct rxe_av *rxe_get_av(struct rxe_pkt_info *pkt, struct rxe_ah **ahp);
2323
2424 /* rxe_cq.c */
2525 int rxe_cq_chk_attr(struct rxe_dev *rxe, struct rxe_cq *cq,
@@ -40,18 +40,10 @@ void rxe_cq_disable(struct rxe_cq *cq); · 14 unmodified lines
4040 void rxe_cq_cleanup(struct rxe_pool_elem *arg);
4141
4242 /* rxe_mcast.c */
43−int rxe_mcast_get_grp(struct rxe_dev *rxe, union ib_gid *mgid,
44− struct rxe_mc_grp **grp_p);
45−
46−int rxe_mcast_add_grp_elem(struct rxe_dev *rxe, struct rxe_qp *qp,
47− struct rxe_mc_grp *grp);
48−
49−int rxe_mcast_drop_grp_elem(struct rxe_dev *rxe, struct rxe_qp *qp,
50− union ib_gid *mgid);
51−
52−void rxe_drop_all_mcast_groups(struct rxe_qp *qp);
53−
54−void rxe_mc_cleanup(struct rxe_pool_elem *arg);
43+struct rxe_mcg *rxe_lookup_mcg(struct rxe_dev *rxe, union ib_gid *mgid);
44+int rxe_attach_mcast(struct ib_qp *ibqp, union ib_gid *mgid, u16 mlid);
45+int rxe_detach_mcast(struct ib_qp *ibqp, union ib_gid *mgid, u16 mlid);
46+void rxe_cleanup_mcg(struct kref *kref);
5547
5648 /* rxe_mmap.c */
5749 struct rxe_mmap_info {
@@ -102,35 +94,27 @@ void rxe_mw_cleanup(struct rxe_pool_elem *arg); · 44 unmodified lines
10294 /* rxe_net.c */
10395 struct sk_buff *rxe_init_packet(struct rxe_dev *rxe, struct rxe_av *av,
10496 int paylen, struct rxe_pkt_info *pkt);
105−int rxe_prepare(struct rxe_pkt_info *pkt, struct sk_buff *skb);
97+int rxe_prepare(struct rxe_av *av, struct rxe_pkt_info *pkt,
98+ struct sk_buff *skb);
10699 int rxe_xmit_packet(struct rxe_qp *qp, struct rxe_pkt_info *pkt,
107100 struct sk_buff *skb);
108101 const char *rxe_parent_name(struct rxe_dev *rxe, unsigned int port_num);
109−int rxe_mcast_add(struct rxe_dev *rxe, union ib_gid *mgid);
110−int rxe_mcast_delete(struct rxe_dev *rxe, union ib_gid *mgid);
111102
112103 /* rxe_qp.c */
113104 int rxe_qp_chk_init(struct rxe_dev *rxe, struct ib_qp_init_attr *init);
114−
115105 int rxe_qp_from_init(struct rxe_dev *rxe, struct rxe_qp *qp, struct rxe_pd *pd,
116106 struct ib_qp_init_attr *init,
117107 struct rxe_create_qp_resp __user *uresp,
118108 struct ib_pd *ibpd, struct ib_udata *udata);
119−
120109 int rxe_qp_to_init(struct rxe_qp *qp, struct ib_qp_init_attr *init);
121−
122110 int rxe_qp_chk_attr(struct rxe_dev *rxe, struct rxe_qp *qp,
123111 struct ib_qp_attr *attr, int mask);
124−
125112 int rxe_qp_from_attr(struct rxe_qp *qp, struct ib_qp_attr *attr,
126113 int mask, struct ib_udata *udata);
127−
128114 int rxe_qp_to_attr(struct rxe_qp *qp, struct ib_qp_attr *attr, int mask);
129−
130115 void rxe_qp_error(struct rxe_qp *qp);
131−
116+int rxe_qp_chk_destroy(struct rxe_qp *qp);
132117 void rxe_qp_destroy(struct rxe_qp *qp);
133−
134118 void rxe_qp_cleanup(struct rxe_pool_elem *elem);
135119
136120 static inline int qp_num(struct rxe_qp *qp)
drivers/infiniband/sw/rxe/rxe_mcast.c+426−116
@@ -1,178 +1,488 @@
11 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
22 /*
3+ * Copyright (c) 2022 Hewlett Packard Enterprise, Inc. All rights reserved.
34 * Copyright (c) 2016 Mellanox Technologies Ltd. All rights reserved.
45 * Copyright (c) 2015 System Fabric Works, Inc. All rights reserved.
56 */
67
8+/*
9+ * rxe_mcast.c implements driver support for multicast transport.
10+ * It is based on two data structures struct rxe_mcg ('mcg') and
11+ * struct rxe_mca ('mca'). An mcg is allocated each time a qp is
12+ * attached to a new mgid for the first time. These are indexed by
13+ * a red-black tree using the mgid. This data structure is searched
14+ * for the mcg when a multicast packet is received and when another
15+ * qp is attached to the same mgid. It is cleaned up when the last qp
16+ * is detached from the mcg. Each time a qp is attached to an mcg an
17+ * mca is created. It holds a pointer to the qp and is added to a list
18+ * of qp's that are attached to the mcg. The qp_list is used to replicate
19+ * mcast packets in the rxe receive path.
20+ */
21+
722 #include "rxe.h"
8−#include "rxe_loc.h"
923
10−/* caller should hold mc_grp_pool->pool_lock */
11−static struct rxe_mc_grp *create_grp(struct rxe_dev *rxe,
12− struct rxe_pool *pool,
13− union ib_gid *mgid)
24+/**
25+ * rxe_mcast_add - add multicast address to rxe device
26+ * @rxe: rxe device object
27+ * @mgid: multicast address as a gid
28+ *
29+ * Returns 0 on success else an error
30+ */
31+static int rxe_mcast_add(struct rxe_dev *rxe, union ib_gid *mgid)
1432 {
15− int err;
16− struct rxe_mc_grp *grp;
33+ unsigned char ll_addr[ETH_ALEN];
1734
18− grp = rxe_alloc_locked(&rxe->mc_grp_pool);
19− if (!grp)
20− return ERR_PTR(-ENOMEM);
35+ ipv6_eth_mc_map((struct in6_addr *)mgid->raw, ll_addr);
2136
22− INIT_LIST_HEAD(&grp->qp_list);
23− spin_lock_init(&grp->mcg_lock);
24− grp->rxe = rxe;
25− rxe_add_key_locked(grp, mgid);
37+ return dev_mc_add(rxe->ndev, ll_addr);
38+}
2639
27− err = rxe_mcast_add(rxe, mgid);
28− if (unlikely(err)) {
29− rxe_drop_key_locked(grp);
30− rxe_drop_ref(grp);
31− return ERR_PTR(err);
40+/**
41+ * rxe_mcast_delete - delete multicast address from rxe device
42+ * @rxe: rxe device object
43+ * @mgid: multicast address as a gid
44+ *
45+ * Returns 0 on success else an error
46+ */
47+static int rxe_mcast_delete(struct rxe_dev *rxe, union ib_gid *mgid)
48+{
49+ unsigned char ll_addr[ETH_ALEN];
50+
51+ ipv6_eth_mc_map((struct in6_addr *)mgid->raw, ll_addr);
52+
53+ return dev_mc_del(rxe->ndev, ll_addr);
54+}
55+
56+/**
57+ * __rxe_insert_mcg - insert an mcg into red-black tree (rxe->mcg_tree)
58+ * @mcg: mcg object with an embedded red-black tree node
59+ *
60+ * Context: caller must hold a reference to mcg and rxe->mcg_lock and
61+ * is responsible to avoid adding the same mcg twice to the tree.
62+ */
63+static void __rxe_insert_mcg(struct rxe_mcg *mcg)
64+{
65+ struct rb_root *tree = &mcg->rxe->mcg_tree;
66+ struct rb_node **link = &tree->rb_node;
67+ struct rb_node *node = NULL;
68+ struct rxe_mcg *tmp;
69+ int cmp;
70+
71+ while (*link) {
72+ node = *link;
73+ tmp = rb_entry(node, struct rxe_mcg, node);
74+
75+ cmp = memcmp(&tmp->mgid, &mcg->mgid, sizeof(mcg->mgid));
76+ if (cmp > 0)
77+ link = &(*link)->rb_left;
78+ else
79+ link = &(*link)->rb_right;
3280 }
3381
34− return grp;
82+ rb_link_node(&mcg->node, node, link);
83+ rb_insert_color(&mcg->node, tree);
3584 }
3685
37−int rxe_mcast_get_grp(struct rxe_dev *rxe, union ib_gid *mgid,
38− struct rxe_mc_grp **grp_p)
86+/**
87+ * __rxe_remove_mcg - remove an mcg from red-black tree holding lock
88+ * @mcg: mcast group object with an embedded red-black tree node
89+ *
90+ * Context: caller must hold a reference to mcg and rxe->mcg_lock
91+ */
92+static void __rxe_remove_mcg(struct rxe_mcg *mcg)
3993 {
40− int err;
41− struct rxe_mc_grp *grp;
42− struct rxe_pool *pool = &rxe->mc_grp_pool;
94+ rb_erase(&mcg->node, &mcg->rxe->mcg_tree);
95+}
4396
44− if (rxe->attr.max_mcast_qp_attach == 0)
45− return -EINVAL;
97+/**
98+ * __rxe_lookup_mcg - lookup mcg in rxe->mcg_tree while holding lock
99+ * @rxe: rxe device object
100+ * @mgid: multicast IP address
101+ *
102+ * Context: caller must hold rxe->mcg_lock
103+ * Returns: mcg on success and takes a ref to mcg else NULL
104+ */
105+static struct rxe_mcg *__rxe_lookup_mcg(struct rxe_dev *rxe,
106+ union ib_gid *mgid)
107+{
108+ struct rb_root *tree = &rxe->mcg_tree;
109+ struct rxe_mcg *mcg;
110+ struct rb_node *node;
111+ int cmp;
46112
47− write_lock_bh(&pool->pool_lock);
113+ node = tree->rb_node;
48114
49− grp = rxe_pool_get_key_locked(pool, mgid);
50− if (grp)
51− goto done;
115+ while (node) {
116+ mcg = rb_entry(node, struct rxe_mcg, node);
52117
53− grp = create_grp(rxe, pool, mgid);
54− if (IS_ERR(grp)) {
55− write_unlock_bh(&pool->pool_lock);
56− err = PTR_ERR(grp);
57− return err;
118+ cmp = memcmp(&mcg->mgid, mgid, sizeof(*mgid));
119+
120+ if (cmp > 0)
121+ node = node->rb_left;
122+ else if (cmp < 0)
123+ node = node->rb_right;
124+ else
125+ break;
58126 }
59127
60−done:
61− write_unlock_bh(&pool->pool_lock);
62− *grp_p = grp;
128+ if (node) {
129+ kref_get(&mcg->ref_cnt);
130+ return mcg;
131+ }
132+
133+ return NULL;
134+}
135+
136+/**
137+ * rxe_lookup_mcg - lookup up mcg in red-back tree
138+ * @rxe: rxe device object
139+ * @mgid: multicast IP address
140+ *
141+ * Returns: mcg if found else NULL
142+ */
143+struct rxe_mcg *rxe_lookup_mcg(struct rxe_dev *rxe, union ib_gid *mgid)
144+{
145+ struct rxe_mcg *mcg;
146+ unsigned long flags;
147+
148+ spin_lock_irqsave(&rxe->mcg_lock, flags);
149+ mcg = __rxe_lookup_mcg(rxe, mgid);
150+ spin_unlock_irqrestore(&rxe->mcg_lock, flags);
151+
152+ return mcg;
153+}
154+
155+/**
156+ * __rxe_init_mcg - initialize a new mcg
157+ * @rxe: rxe device
158+ * @mgid: multicast address as a gid
159+ * @mcg: new mcg object
160+ *
161+ * Context: caller should hold rxe->mcg lock
162+ * Returns: 0 on success else an error
163+ */
164+static int __rxe_init_mcg(struct rxe_dev *rxe, union ib_gid *mgid,
165+ struct rxe_mcg *mcg)
166+{
167+ int err;
168+
169+ err = rxe_mcast_add(rxe, mgid);
170+ if (unlikely(err))
171+ return err;
172+
173+ kref_init(&mcg->ref_cnt);
174+ memcpy(&mcg->mgid, mgid, sizeof(mcg->mgid));
175+ INIT_LIST_HEAD(&mcg->qp_list);
176+ mcg->rxe = rxe;
177+
178+ /* caller holds a ref on mcg but that will be
179+ * dropped when mcg goes out of scope. We need to take a ref
180+ * on the pointer that will be saved in the red-black tree
181+ * by __rxe_insert_mcg and used to lookup mcg from mgid later.
182+ * Inserting mcg makes it visible to outside so this should
183+ * be done last after the object is ready.
184+ */
185+ kref_get(&mcg->ref_cnt);
186+ __rxe_insert_mcg(mcg);
187+
63188 return 0;
64189 }
65190
66−int rxe_mcast_add_grp_elem(struct rxe_dev *rxe, struct rxe_qp *qp,
67− struct rxe_mc_grp *grp)
191+/**
192+ * rxe_get_mcg - lookup or allocate a mcg
193+ * @rxe: rxe device object
194+ * @mgid: multicast IP address as a gid
195+ *
196+ * Returns: mcg on success else ERR_PTR(error)
197+ */
198+static struct rxe_mcg *rxe_get_mcg(struct rxe_dev *rxe, union ib_gid *mgid)
68199 {
200+ struct rxe_mcg *mcg, *tmp;
201+ unsigned long flags;
69202 int err;
70− struct rxe_mc_elem *elem;
71203
72− /* check to see of the qp is already a member of the group */
73− spin_lock_bh(&qp->grp_lock);
74− spin_lock_bh(&grp->mcg_lock);
75− list_for_each_entry(elem, &grp->qp_list, qp_list) {
76− if (elem->qp == qp) {
77− err = 0;
78− goto out;
79− }
80− }
204+ if (rxe->attr.max_mcast_grp == 0)
205+ return ERR_PTR(-EINVAL);
81206
82− if (grp->num_qp >= rxe->attr.max_mcast_qp_attach) {
83− err = -ENOMEM;
207+ /* check to see if mcg already exists */
208+ mcg = rxe_lookup_mcg(rxe, mgid);
209+ if (mcg)
210+ return mcg;
211+
212+ /* speculative alloc of new mcg */
213+ mcg = kzalloc(sizeof(*mcg), GFP_KERNEL);
214+ if (!mcg)
215+ return ERR_PTR(-ENOMEM);
216+
217+ spin_lock_irqsave(&rxe->mcg_lock, flags);
218+ /* re-check to see if someone else just added it */
219+ tmp = __rxe_lookup_mcg(rxe, mgid);
220+ if (tmp) {
221+ kfree(mcg);
222+ mcg = tmp;
84223 goto out;
85224 }
86225
87− elem = rxe_alloc_locked(&rxe->mc_elem_pool);
88− if (!elem) {
226+ if (atomic_inc_return(&rxe->mcg_num) > rxe->attr.max_mcast_grp) {
89227 err = -ENOMEM;
90− goto out;
228+ goto err_dec;
229+ }
230+
231+ err = __rxe_init_mcg(rxe, mgid, mcg);
232+ if (err)
233+ goto err_dec;
234+out:
235+ spin_unlock_irqrestore(&rxe->mcg_lock, flags);
236+ return mcg;
237+
238+err_dec:
239+ atomic_dec(&rxe->mcg_num);
240+ spin_unlock_irqrestore(&rxe->mcg_lock, flags);
241+ kfree(mcg);
242+ return ERR_PTR(err);
243+}
244+
245+/**
246+ * rxe_cleanup_mcg - cleanup mcg for kref_put
247+ * @kref: struct kref embnedded in mcg
248+ */
249+void rxe_cleanup_mcg(struct kref *kref)
250+{
251+ struct rxe_mcg *mcg = container_of(kref, typeof(*mcg), ref_cnt);
252+
253+ kfree(mcg);
254+}
255+
256+/**
257+ * __rxe_destroy_mcg - destroy mcg object holding rxe->mcg_lock
258+ * @mcg: the mcg object
259+ *
260+ * Context: caller is holding rxe->mcg_lock
261+ * no qp's are attached to mcg
262+ */
263+static void __rxe_destroy_mcg(struct rxe_mcg *mcg)
264+{
265+ struct rxe_dev *rxe = mcg->rxe;
266+
267+ /* remove mcg from red-black tree then drop ref */
268+ __rxe_remove_mcg(mcg);
269+ kref_put(&mcg->ref_cnt, rxe_cleanup_mcg);
270+
271+ rxe_mcast_delete(mcg->rxe, &mcg->mgid);
272+ atomic_dec(&rxe->mcg_num);
273+}
274+
275+/**
276+ * rxe_destroy_mcg - destroy mcg object
277+ * @mcg: the mcg object
278+ *
279+ * Context: no qp's are attached to mcg
280+ */
281+static void rxe_destroy_mcg(struct rxe_mcg *mcg)
282+{
283+ unsigned long flags;
284+
285+ spin_lock_irqsave(&mcg->rxe->mcg_lock, flags);
286+ __rxe_destroy_mcg(mcg);
287+ spin_unlock_irqrestore(&mcg->rxe->mcg_lock, flags);
288+}
289+
290+/**
291+ * __rxe_init_mca - initialize a new mca holding lock
292+ * @qp: qp object
293+ * @mcg: mcg object
294+ * @mca: empty space for new mca
295+ *
296+ * Context: caller must hold references on qp and mcg, rxe->mcg_lock
297+ * and pass memory for new mca
298+ *
299+ * Returns: 0 on success else an error
300+ */
301+static int __rxe_init_mca(struct rxe_qp *qp, struct rxe_mcg *mcg,
302+ struct rxe_mca *mca)
303+{
304+ struct rxe_dev *rxe = to_rdev(qp->ibqp.device);
305+ int n;
306+
307+ n = atomic_inc_return(&rxe->mcg_attach);
308+ if (n > rxe->attr.max_total_mcast_qp_attach) {
309+ atomic_dec(&rxe->mcg_attach);
310+ return -ENOMEM;
91311 }
92312
93− /* each qp holds a ref on the grp */
94− rxe_add_ref(grp);
313+ n = atomic_inc_return(&mcg->qp_num);
314+ if (n > rxe->attr.max_mcast_qp_attach) {
315+ atomic_dec(&mcg->qp_num);
316+ atomic_dec(&rxe->mcg_attach);
317+ return -ENOMEM;
318+ }
319+
320+ atomic_inc(&qp->mcg_num);
95321
96− grp->num_qp++;
97− elem->qp = qp;
98− elem->grp = grp;
322+ rxe_get(qp);
323+ mca->qp = qp;
99324
100− list_add(&elem->qp_list, &grp->qp_list);
101− list_add(&elem->grp_list, &qp->grp_list);
325+ list_add_tail(&mca->qp_list, &mcg->qp_list);
102326
103− err = 0;
327+ return 0;
328+}
329+
330+/**
331+ * rxe_attach_mcg - attach qp to mcg if not already attached
332+ * @qp: qp object
333+ * @mcg: mcg object
334+ *
335+ * Context: caller must hold reference on qp and mcg.
336+ * Returns: 0 on success else an error
337+ */
338+static int rxe_attach_mcg(struct rxe_mcg *mcg, struct rxe_qp *qp)
339+{
340+ struct rxe_dev *rxe = mcg->rxe;
341+ struct rxe_mca *mca, *tmp;
342+ unsigned long flags;
343+ int err;
344+
345+ /* check to see if the qp is already a member of the group */
346+ spin_lock_irqsave(&rxe->mcg_lock, flags);
347+ list_for_each_entry(mca, &mcg->qp_list, qp_list) {
348+ if (mca->qp == qp) {
349+ spin_unlock_irqrestore(&rxe->mcg_lock, flags);
350+ return 0;
351+ }
352+ }
353+ spin_unlock_irqrestore(&rxe->mcg_lock, flags);
354+
355+ /* speculative alloc new mca without using GFP_ATOMIC */
356+ mca = kzalloc(sizeof(*mca), GFP_KERNEL);
357+ if (!mca)
358+ return -ENOMEM;
359+
360+ spin_lock_irqsave(&rxe->mcg_lock, flags);
361+ /* re-check to see if someone else just attached qp */
362+ list_for_each_entry(tmp, &mcg->qp_list, qp_list) {
363+ if (tmp->qp == qp) {
364+ kfree(mca);
365+ err = 0;
366+ goto out;
367+ }
368+ }
369+
370+ err = __rxe_init_mca(qp, mcg, mca);
371+ if (err)
372+ kfree(mca);
104373 out:
105− spin_unlock_bh(&grp->mcg_lock);
106− spin_unlock_bh(&qp->grp_lock);
374+ spin_unlock_irqrestore(&rxe->mcg_lock, flags);
107375 return err;
108376 }
109377
110−int rxe_mcast_drop_grp_elem(struct rxe_dev *rxe, struct rxe_qp *qp,
111− union ib_gid *mgid)
378+/**
379+ * __rxe_cleanup_mca - cleanup mca object holding lock
380+ * @mca: mca object
381+ * @mcg: mcg object
382+ *
383+ * Context: caller must hold a reference to mcg and rxe->mcg_lock
384+ */
385+static void __rxe_cleanup_mca(struct rxe_mca *mca, struct rxe_mcg *mcg)
112386 {
113− struct rxe_mc_grp *grp;
114− struct rxe_mc_elem *elem, *tmp;
387+ list_del(&mca->qp_list);
115388
116− grp = rxe_pool_get_key(&rxe->mc_grp_pool, mgid);
117− if (!grp)
118− goto err1;
389+ atomic_dec(&mcg->qp_num);
390+ atomic_dec(&mcg->rxe->mcg_attach);
391+ atomic_dec(&mca->qp->mcg_num);
392+ rxe_put(mca->qp);
119393
120− spin_lock_bh(&qp->grp_lock);
121− spin_lock_bh(&grp->mcg_lock);
394+ kfree(mca);
395+}
122396
123− list_for_each_entry_safe(elem, tmp, &grp->qp_list, qp_list) {
124− if (elem->qp == qp) {
125− list_del(&elem->qp_list);
126− list_del(&elem->grp_list);
127− grp->num_qp--;
397+/**
398+ * rxe_detach_mcg - detach qp from mcg
399+ * @mcg: mcg object
400+ * @qp: qp object
401+ *
402+ * Returns: 0 on success else an error if qp is not attached.
403+ */
404+static int rxe_detach_mcg(struct rxe_mcg *mcg, struct rxe_qp *qp)
405+{
406+ struct rxe_dev *rxe = mcg->rxe;
407+ struct rxe_mca *mca, *tmp;
408+ unsigned long flags;
128409
129− spin_unlock_bh(&grp->mcg_lock);
130− spin_unlock_bh(&qp->grp_lock);
131− rxe_drop_ref(elem);
132− rxe_drop_ref(grp); /* ref held by QP */
133− rxe_drop_ref(grp); /* ref from get_key */
410+ spin_lock_irqsave(&rxe->mcg_lock, flags);
411+ list_for_each_entry_safe(mca, tmp, &mcg->qp_list, qp_list) {
412+ if (mca->qp == qp) {
413+ __rxe_cleanup_mca(mca, mcg);
414+
415+ /* if the number of qp's attached to the
416+ * mcast group falls to zero go ahead and
417+ * tear it down. This will not free the
418+ * object since we are still holding a ref
419+ * from the caller
420+ */
421+ if (atomic_read(&mcg->qp_num) <= 0)
422+ __rxe_destroy_mcg(mcg);
423+
424+ spin_unlock_irqrestore(&rxe->mcg_lock, flags);
134425 return 0;
135426 }
136427 }
137428
138− spin_unlock_bh(&grp->mcg_lock);
139− spin_unlock_bh(&qp->grp_lock);
140− rxe_drop_ref(grp); /* ref from get_key */
141−err1:
429+ /* we didn't find the qp on the list */
430+ spin_unlock_irqrestore(&rxe->mcg_lock, flags);
142431 return -EINVAL;
143432 }
144433
145−void rxe_drop_all_mcast_groups(struct rxe_qp *qp)
434+/**
435+ * rxe_attach_mcast - attach qp to multicast group (see IBA-11.3.1)
436+ * @ibqp: (IB) qp object
437+ * @mgid: multicast IP address
438+ * @mlid: multicast LID, ignored for RoCEv2 (see IBA-A17.5.6)
439+ *
440+ * Returns: 0 on success else an errno
441+ */
442+int rxe_attach_mcast(struct ib_qp *ibqp, union ib_gid *mgid, u16 mlid)
146443 {
147− struct rxe_mc_grp *grp;
148− struct rxe_mc_elem *elem;
444+ int err;
445+ struct rxe_dev *rxe = to_rdev(ibqp->device);
446+ struct rxe_qp *qp = to_rqp(ibqp);
447+ struct rxe_mcg *mcg;
149448
150− while (1) {
151− spin_lock_bh(&qp->grp_lock);
152− if (list_empty(&qp->grp_list)) {
153− spin_unlock_bh(&qp->grp_lock);
154− break;
155− }
156− elem = list_first_entry(&qp->grp_list, struct rxe_mc_elem,
157− grp_list);
158− list_del(&elem->grp_list);
159− spin_unlock_bh(&qp->grp_lock);
160−
161− grp = elem->grp;
162− spin_lock_bh(&grp->mcg_lock);
163− list_del(&elem->qp_list);
164− grp->num_qp--;
165− spin_unlock_bh(&grp->mcg_lock);
166− rxe_drop_ref(grp);
167− rxe_drop_ref(elem);
168− }
449+ /* takes a ref on mcg if successful */
450+ mcg = rxe_get_mcg(rxe, mgid);
451+ if (IS_ERR(mcg))
452+ return PTR_ERR(mcg);
453+
454+ err = rxe_attach_mcg(mcg, qp);
455+
456+ /* if we failed to attach the first qp to mcg tear it down */
457+ if (atomic_read(&mcg->qp_num) == 0)
458+ rxe_destroy_mcg(mcg);
459+
460+ kref_put(&mcg->ref_cnt, rxe_cleanup_mcg);
461+
462+ return err;
169463 }
170464
171−void rxe_mc_cleanup(struct rxe_pool_elem *elem)
465+/**
466+ * rxe_detach_mcast - detach qp from multicast group (see IBA-11.3.2)
467+ * @ibqp: address of (IB) qp object
468+ * @mgid: multicast IP address
469+ * @mlid: multicast LID, ignored for RoCEv2 (see IBA-A17.5.6)
470+ *
471+ * Returns: 0 on success else an errno
472+ */
473+int rxe_detach_mcast(struct ib_qp *ibqp, union ib_gid *mgid, u16 mlid)
172474 {
173− struct rxe_mc_grp *grp = container_of(elem, typeof(*grp), elem);
174− struct rxe_dev *rxe = grp->rxe;
475+ struct rxe_dev *rxe = to_rdev(ibqp->device);
476+ struct rxe_qp *qp = to_rqp(ibqp);
477+ struct rxe_mcg *mcg;
478+ int err;
175479
176− rxe_drop_key(grp);
177− rxe_mcast_delete(rxe, &grp->mgid);
480+ mcg = rxe_lookup_mcg(rxe, mgid);
481+ if (!mcg)
482+ return -EINVAL;
483+
484+ err = rxe_detach_mcg(mcg, qp);
485+ kref_put(&mcg->ref_cnt, rxe_cleanup_mcg);
486+
487+ return err;
178488 }
drivers/infiniband/sw/rxe/rxe_mmap.c+0−1
@@ -4,7 +4,6 @@ · 3 unmodified lines
44 * Copyright (c) 2015 System Fabric Works, Inc. All rights reserved.
55 */
66
7−#include <linux/module.h>
87 #include <linux/vmalloc.h>
98 #include <linux/mm.h>
109 #include <linux/errno.h>
drivers/infiniband/sw/rxe/rxe_mr.c+7−8
@@ -459,7 +459,7 @@ int copy_data( · 458 unmodified lines
459459
460460 if (offset >= sge->length) {
461461 if (mr) {
462− rxe_drop_ref(mr);
462+ rxe_put(mr);
463463 mr = NULL;
464464 }
465465 sge++;
@@ -504,13 +504,13 @@ int copy_data( · 38 unmodified lines
504504 dma->resid = resid;
505505
506506 if (mr)
507− rxe_drop_ref(mr);
507+ rxe_put(mr);
508508
509509 return 0;
510510
511511 err2:
512512 if (mr)
513− rxe_drop_ref(mr);
513+ rxe_put(mr);
514514 err1:
515515 return err;
516516 }
@@ -569,7 +569,7 @@ struct rxe_mr *lookup_mr(struct rxe_pd *pd, int access, u32 key, · 52 unmodified lines
569569 (type == RXE_LOOKUP_REMOTE && mr->rkey != key) ||
570570 mr_pd(mr) != pd || (access && !(access & mr->access)) ||
571571 mr->state != RXE_MR_STATE_VALID)) {
572− rxe_drop_ref(mr);
572+ rxe_put(mr);
573573 mr = NULL;
574574 }
575575
@@ -613,7 +613,7 @@ int rxe_invalidate_mr(struct rxe_qp *qp, u32 rkey) · 37 unmodified lines
613613 ret = 0;
614614
615615 err_drop_ref:
616− rxe_drop_ref(mr);
616+ rxe_put(mr);
617617 err:
618618 return ret;
619619 }
@@ -690,9 +690,8 @@ int rxe_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata) · 70 unmodified lines
690690 }
691691
692692 mr->state = RXE_MR_STATE_INVALID;
693− rxe_drop_ref(mr_pd(mr));
694− rxe_drop_index(mr);
695− rxe_drop_ref(mr);
693+ rxe_put(mr_pd(mr));
694+ rxe_put(mr);
696695
697696 return 0;
698697 }
drivers/infiniband/sw/rxe/rxe_mw.c+15−23
@@ -12,15 +12,14 @@ int rxe_alloc_mw(struct ib_mw *ibmw, struct ib_udata *udata) · 11 unmodified lines
1212 struct rxe_dev *rxe = to_rdev(ibmw->device);
1313 int ret;
1414
15− rxe_add_ref(pd);
15+ rxe_get(pd);
1616
1717 ret = rxe_add_to_pool(&rxe->mw_pool, mw);
1818 if (ret) {
19− rxe_drop_ref(pd);
19+ rxe_put(pd);
2020 return ret;
2121 }
2222
23− rxe_add_index(mw);
2423 mw->rkey = ibmw->rkey = (mw->elem.index << 8) | rxe_get_next_key(-1);
2524 mw->state = (mw->ibmw.type == IB_MW_TYPE_2) ?
2625 RXE_MW_STATE_FREE : RXE_MW_STATE_VALID;
@@ -36,14 +35,14 @@ static void rxe_do_dealloc_mw(struct rxe_mw *mw) · 9 unmodified lines
3635
3736 mw->mr = NULL;
3837 atomic_dec(&mr->num_mw);
39− rxe_drop_ref(mr);
38+ rxe_put(mr);
4039 }
4140
4241 if (mw->qp) {
4342 struct rxe_qp *qp = mw->qp;
4443
4544 mw->qp = NULL;
46− rxe_drop_ref(qp);
45+ rxe_put(qp);
4746 }
4847
4948 mw->access = 0;
@@ -61,8 +60,8 @@ int rxe_dealloc_mw(struct ib_mw *ibmw) · 11 unmodified lines
6160 rxe_do_dealloc_mw(mw);
6261 spin_unlock_bh(&mw->lock);
6362
64− rxe_drop_ref(mw);
65− rxe_drop_ref(pd);
63+ rxe_put(mw);
64+ rxe_put(pd);
6665
6766 return 0;
6867 }
@@ -171,7 +170,7 @@ static void rxe_do_bind_mw(struct rxe_qp *qp, struct rxe_send_wqe *wqe, · 102 unmodified lines
171170 mw->length = wqe->wr.wr.mw.length;
172171
173172 if (mw->mr) {
174− rxe_drop_ref(mw->mr);
173+ rxe_put(mw->mr);
175174 atomic_dec(&mw->mr->num_mw);
176175 mw->mr = NULL;
177176 }
@@ -179,11 +178,11 @@ static void rxe_do_bind_mw(struct rxe_qp *qp, struct rxe_send_wqe *wqe, · 1 unmodified line
179178 if (mw->length) {
180179 mw->mr = mr;
181180 atomic_inc(&mr->num_mw);
182− rxe_add_ref(mr);
181+ rxe_get(mr);
183182 }
184183
185184 if (mw->ibmw.type == IB_MW_TYPE_2) {
186− rxe_add_ref(qp);
185+ rxe_get(qp);
187186 mw->qp = qp;
188187 }
189188 }
@@ -234,9 +233,9 @@ err_unlock: · 44 unmodified lines
234233 spin_unlock_bh(&mw->lock);
235234 err_drop_mr:
236235 if (mr)
237− rxe_drop_ref(mr);
236+ rxe_put(mr);
238237 err_drop_mw:
239− rxe_drop_ref(mw);
238+ rxe_put(mw);
240239 err:
241240 return ret;
242241 }
@@ -261,13 +260,13 @@ static void rxe_do_invalidate_mw(struct rxe_mw *mw) · 18 unmodified lines
261260 /* valid type 2 MW will always have a QP pointer */
262261 qp = mw->qp;
263262 mw->qp = NULL;
264− rxe_drop_ref(qp);
263+ rxe_put(qp);
265264
266265 /* valid type 2 MW will always have an MR pointer */
267266 mr = mw->mr;
268267 mw->mr = NULL;
269268 atomic_dec(&mr->num_mw);
270− rxe_drop_ref(mr);
269+ rxe_put(mr);
271270
272271 mw->access = 0;
273272 mw->addr = 0;
@@ -302,7 +301,7 @@ int rxe_invalidate_mw(struct rxe_qp *qp, u32 rkey) · 28 unmodified lines
302301 err_unlock:
303302 spin_unlock_bh(&mw->lock);
304303 err_drop_ref:
305− rxe_drop_ref(mw);
304+ rxe_put(mw);
306305 err:
307306 return ret;
308307 }
@@ -323,16 +322,9 @@ struct rxe_mw *rxe_lookup_mw(struct rxe_qp *qp, int access, u32 rkey) · 14 unmodified lines
323322 (mw->length == 0) ||
324323 (access && !(access & mw->access)) ||
325324 mw->state != RXE_MW_STATE_VALID)) {
326− rxe_drop_ref(mw);
325+ rxe_put(mw);
327326 return NULL;
328327 }
329328
330329 return mw;
331330 }
332−
333−void rxe_mw_cleanup(struct rxe_pool_elem *elem)
334−{
335− struct rxe_mw *mw = container_of(elem, typeof(*mw), elem);
336−
337− rxe_drop_index(mw);
338−}
drivers/infiniband/sw/rxe/rxe_net.c+12−29
@@ -20,24 +20,6 @@ · 19 unmodified lines
2020
2121 static struct rxe_recv_sockets recv_sockets;
2222
23−int rxe_mcast_add(struct rxe_dev *rxe, union ib_gid *mgid)
24−{
25− unsigned char ll_addr[ETH_ALEN];
26−
27− ipv6_eth_mc_map((struct in6_addr *)mgid->raw, ll_addr);
28−
29− return dev_mc_add(rxe->ndev, ll_addr);
30−}
31−
32−int rxe_mcast_delete(struct rxe_dev *rxe, union ib_gid *mgid)
33−{
34− unsigned char ll_addr[ETH_ALEN];
35−
36− ipv6_eth_mc_map((struct in6_addr *)mgid->raw, ll_addr);
37−
38− return dev_mc_del(rxe->ndev, ll_addr);
39−}
40−
4123 static struct dst_entry *rxe_find_route4(struct net_device *ndev,
4224 struct in_addr *saddr,
4325 struct in_addr *daddr)
@@ -289,13 +271,13 @@ static void prepare_ipv6_hdr(struct dst_entry *dst, struct sk_buff *skb, · 245 unmodified lines
289271 ip6h->payload_len = htons(skb->len - sizeof(*ip6h));
290272 }
291273
292−static int prepare4(struct rxe_pkt_info *pkt, struct sk_buff *skb)
274+static int prepare4(struct rxe_av *av, struct rxe_pkt_info *pkt,
275+ struct sk_buff *skb)
293276 {
294277 struct rxe_qp *qp = pkt->qp;
295278 struct dst_entry *dst;
296279 bool xnet = false;
297280 __be16 df = htons(IP_DF);
298− struct rxe_av *av = rxe_get_av(pkt);
299281 struct in_addr *saddr = &av->sgid_addr._sockaddr_in.sin_addr;
300282 struct in_addr *daddr = &av->dgid_addr._sockaddr_in.sin_addr;
301283
@@ -315,11 +297,11 @@ static int prepare4(struct rxe_pkt_info *pkt, struct sk_buff *skb) · 13 unmodified lines
315297 return 0;
316298 }
317299
318−static int prepare6(struct rxe_pkt_info *pkt, struct sk_buff *skb)
300+static int prepare6(struct rxe_av *av, struct rxe_pkt_info *pkt,
301+ struct sk_buff *skb)
319302 {
320303 struct rxe_qp *qp = pkt->qp;
321304 struct dst_entry *dst;
322− struct rxe_av *av = rxe_get_av(pkt);
323305 struct in6_addr *saddr = &av->sgid_addr._sockaddr_in6.sin6_addr;
324306 struct in6_addr *daddr = &av->dgid_addr._sockaddr_in6.sin6_addr;
325307
@@ -340,16 +322,17 @@ static int prepare6(struct rxe_pkt_info *pkt, struct sk_buff *skb) · 14 unmodified lines
340322 return 0;
341323 }
342324
343−int rxe_prepare(struct rxe_pkt_info *pkt, struct sk_buff *skb)
325+int rxe_prepare(struct rxe_av *av, struct rxe_pkt_info *pkt,
326+ struct sk_buff *skb)
344327 {
345328 int err = 0;
346329
347330 if (skb->protocol == htons(ETH_P_IP))
348− err = prepare4(pkt, skb);
331+ err = prepare4(av, pkt, skb);
349332 else if (skb->protocol == htons(ETH_P_IPV6))
350− err = prepare6(pkt, skb);
333+ err = prepare6(av, pkt, skb);
351334
352− if (ether_addr_equal(skb->dev->dev_addr, rxe_get_av(pkt)->dmac))
335+ if (ether_addr_equal(skb->dev->dev_addr, av->dmac))
353336 pkt->mask |= RXE_LOOPBACK_MASK;
354337
355338 return err;
@@ -365,7 +348,7 @@ static void rxe_skb_tx_dtor(struct sk_buff *skb) · 9 unmodified lines
365348 skb_out < RXE_INFLIGHT_SKBS_PER_QP_LOW))
366349 rxe_run_task(&qp->req.task, 1);
367350
368− rxe_drop_ref(qp);
351+ rxe_put(qp);
369352 }
370353
371354 static int rxe_send(struct sk_buff *skb, struct rxe_pkt_info *pkt)
@@ -375,7 +358,7 @@ static int rxe_send(struct sk_buff *skb, struct rxe_pkt_info *pkt) · 3 unmodified lines
375358 skb->destructor = rxe_skb_tx_dtor;
376359 skb->sk = pkt->qp->sk->sk;
377360
378− rxe_add_ref(pkt->qp);
361+ rxe_get(pkt->qp);
379362 atomic_inc(&pkt->qp->skb_out);
380363
381364 if (skb->protocol == htons(ETH_P_IP)) {
@@ -385,7 +368,7 @@ static int rxe_send(struct sk_buff *skb, struct rxe_pkt_info *pkt) · 3 unmodified lines
385368 } else {
386369 pr_err("Unknown layer 3 protocol: %d\n", skb->protocol);
387370 atomic_dec(&pkt->qp->skb_out);
388− rxe_drop_ref(pkt->qp);
371+ rxe_put(pkt->qp);
389372 kfree_skb(skb);
390373 return -EINVAL;
391374 }
drivers/infiniband/sw/rxe/rxe_pool.c+81−352
@@ -12,129 +12,93 @@ static const struct rxe_type_info { · 11 unmodified lines
1212 const char *name;
1313 size_t size;
1414 size_t elem_offset;
15− void (*cleanup)(struct rxe_pool_elem *obj);
15+ void (*cleanup)(struct rxe_pool_elem *elem);
1616 enum rxe_pool_flags flags;
1717 u32 min_index;
1818 u32 max_index;
19− size_t key_offset;
20− size_t key_size;
19+ u32 max_elem;
2120 } rxe_type_info[RXE_NUM_TYPES] = {
2221 [RXE_TYPE_UC] = {
23− .name = "rxe-uc",
22+ .name = "uc",
2423 .size = sizeof(struct rxe_ucontext),
2524 .elem_offset = offsetof(struct rxe_ucontext, elem),
26− .flags = RXE_POOL_NO_ALLOC,
25+ .min_index = 1,
26+ .max_index = UINT_MAX,
27+ .max_elem = UINT_MAX,
2728 },
2829 [RXE_TYPE_PD] = {
29− .name = "rxe-pd",
30+ .name = "pd",
3031 .size = sizeof(struct rxe_pd),
3132 .elem_offset = offsetof(struct rxe_pd, elem),
32− .flags = RXE_POOL_NO_ALLOC,
33+ .min_index = 1,
34+ .max_index = UINT_MAX,
35+ .max_elem = UINT_MAX,
3336 },
3437 [RXE_TYPE_AH] = {
35− .name = "rxe-ah",
38+ .name = "ah",
3639 .size = sizeof(struct rxe_ah),
3740 .elem_offset = offsetof(struct rxe_ah, elem),
38− .flags = RXE_POOL_INDEX | RXE_POOL_NO_ALLOC,
3941 .min_index = RXE_MIN_AH_INDEX,
4042 .max_index = RXE_MAX_AH_INDEX,
43+ .max_elem = RXE_MAX_AH_INDEX - RXE_MIN_AH_INDEX + 1,
4144 },
4245 [RXE_TYPE_SRQ] = {
43− .name = "rxe-srq",
46+ .name = "srq",
4447 .size = sizeof(struct rxe_srq),
4548 .elem_offset = offsetof(struct rxe_srq, elem),
46− .flags = RXE_POOL_INDEX | RXE_POOL_NO_ALLOC,
4749 .min_index = RXE_MIN_SRQ_INDEX,
4850 .max_index = RXE_MAX_SRQ_INDEX,
51+ .max_elem = RXE_MAX_SRQ_INDEX - RXE_MIN_SRQ_INDEX + 1,
4952 },
5053 [RXE_TYPE_QP] = {
51− .name = "rxe-qp",
54+ .name = "qp",
5255 .size = sizeof(struct rxe_qp),
5356 .elem_offset = offsetof(struct rxe_qp, elem),
5457 .cleanup = rxe_qp_cleanup,
55− .flags = RXE_POOL_INDEX | RXE_POOL_NO_ALLOC,
5658 .min_index = RXE_MIN_QP_INDEX,
5759 .max_index = RXE_MAX_QP_INDEX,
60+ .max_elem = RXE_MAX_QP_INDEX - RXE_MIN_QP_INDEX + 1,
5861 },
5962 [RXE_TYPE_CQ] = {
60− .name = "rxe-cq",
63+ .name = "cq",
6164 .size = sizeof(struct rxe_cq),
6265 .elem_offset = offsetof(struct rxe_cq, elem),
63− .flags = RXE_POOL_NO_ALLOC,
6466 .cleanup = rxe_cq_cleanup,
67+ .min_index = 1,
68+ .max_index = UINT_MAX,
69+ .max_elem = UINT_MAX,
6570 },
6671 [RXE_TYPE_MR] = {
67− .name = "rxe-mr",
72+ .name = "mr",
6873 .size = sizeof(struct rxe_mr),
6974 .elem_offset = offsetof(struct rxe_mr, elem),
7075 .cleanup = rxe_mr_cleanup,
71− .flags = RXE_POOL_INDEX,
76+ .flags = RXE_POOL_ALLOC,
7277 .min_index = RXE_MIN_MR_INDEX,
7378 .max_index = RXE_MAX_MR_INDEX,
79+ .max_elem = RXE_MAX_MR_INDEX - RXE_MIN_MR_INDEX + 1,
7480 },
7581 [RXE_TYPE_MW] = {
76− .name = "rxe-mw",
82+ .name = "mw",
7783 .size = sizeof(struct rxe_mw),
7884 .elem_offset = offsetof(struct rxe_mw, elem),
79− .cleanup = rxe_mw_cleanup,
80− .flags = RXE_POOL_INDEX | RXE_POOL_NO_ALLOC,
8185 .min_index = RXE_MIN_MW_INDEX,
8286 .max_index = RXE_MAX_MW_INDEX,
83− },
84− [RXE_TYPE_MC_GRP] = {
85− .name = "rxe-mc_grp",
86− .size = sizeof(struct rxe_mc_grp),
87− .elem_offset = offsetof(struct rxe_mc_grp, elem),
88− .cleanup = rxe_mc_cleanup,
89− .flags = RXE_POOL_KEY,
90− .key_offset = offsetof(struct rxe_mc_grp, mgid),
91− .key_size = sizeof(union ib_gid),
92− },
93− [RXE_TYPE_MC_ELEM] = {
94− .name = "rxe-mc_elem",
95− .size = sizeof(struct rxe_mc_elem),
96− .elem_offset = offsetof(struct rxe_mc_elem, elem),
87+ .max_elem = RXE_MAX_MW_INDEX - RXE_MIN_MW_INDEX + 1,
9788 },
9889 };
9990
100−static int rxe_pool_init_index(struct rxe_pool *pool, u32 max, u32 min)
101−{
102− int err = 0;
103−
104− if ((max - min + 1) < pool->max_elem) {
105− pr_warn("not enough indices for max_elem\n");
106− err = -EINVAL;
107− goto out;
108− }
109−
110− pool->index.max_index = max;
111− pool->index.min_index = min;
112−
113− pool->index.table = bitmap_zalloc(max - min + 1, GFP_KERNEL);
114− if (!pool->index.table) {
115− err = -ENOMEM;
116− goto out;
117− }
118−
119−out:
120− return err;
121−}
122−
123−int rxe_pool_init(
124− struct rxe_dev *rxe,
125− struct rxe_pool *pool,
126− enum rxe_elem_type type,
127− unsigned int max_elem)
91+void rxe_pool_init(struct rxe_dev *rxe, struct rxe_pool *pool,
92+ enum rxe_elem_type type)
12893 {
12994 const struct rxe_type_info *info = &rxe_type_info[type];
130− int err = 0;
13195
13296 memset(pool, 0, sizeof(*pool));
13397
13498 pool->rxe = rxe;
13599 pool->name = info->name;
136100 pool->type = type;
137− pool->max_elem = max_elem;
101+ pool->max_elem = info->max_elem;
138102 pool->elem_size = ALIGN(info->size, RXE_POOL_ALIGN);
139103 pool->elem_offset = info->elem_offset;
140104 pool->flags = info->flags;
@@ -142,225 +106,31 @@ int rxe_pool_init( · 1 unmodified line
142106
143107 atomic_set(&pool->num_elem, 0);
144108
145− rwlock_init(&pool->pool_lock);
146−
147− if (pool->flags & RXE_POOL_INDEX) {
148− pool->index.tree = RB_ROOT;
149− err = rxe_pool_init_index(pool, info->max_index,
150− info->min_index);
151− if (err)
152− goto out;
153− }
154−
155− if (pool->flags & RXE_POOL_KEY) {
156− pool->key.tree = RB_ROOT;
157− pool->key.key_offset = info->key_offset;
158− pool->key.key_size = info->key_size;
159− }
160−
161−out:
162− return err;
109+ xa_init_flags(&pool->xa, XA_FLAGS_ALLOC);
110+ pool->limit.min = info->min_index;
111+ pool->limit.max = info->max_index;
163112 }
164113
165114 void rxe_pool_cleanup(struct rxe_pool *pool)
166115 {
167− if (atomic_read(&pool->num_elem) > 0)
168− pr_warn("%s pool destroyed with unfree'd elem\n",
169− pool->name);
170−
171− if (pool->flags & RXE_POOL_INDEX)
172− bitmap_free(pool->index.table);
173−}
174−
175−static u32 alloc_index(struct rxe_pool *pool)
176−{
177− u32 index;
178− u32 range = pool->index.max_index - pool->index.min_index + 1;
179−
180− index = find_next_zero_bit(pool->index.table, range, pool->index.last);
181− if (index >= range)
182− index = find_first_zero_bit(pool->index.table, range);
183−
184− WARN_ON_ONCE(index >= range);
185− set_bit(index, pool->index.table);
186− pool->index.last = index;
187− return index + pool->index.min_index;
188−}
189−
190−static int rxe_insert_index(struct rxe_pool *pool, struct rxe_pool_elem *new)
191−{
192− struct rb_node **link = &pool->index.tree.rb_node;
193− struct rb_node *parent = NULL;
194− struct rxe_pool_elem *elem;
195−
196− while (*link) {
197− parent = *link;
198− elem = rb_entry(parent, struct rxe_pool_elem, index_node);
199−
200− if (elem->index == new->index) {
201− pr_warn("element already exists!\n");
202− return -EINVAL;
203− }
204−
205− if (elem->index > new->index)
206− link = &(*link)->rb_left;
207− else
208− link = &(*link)->rb_right;
209− }
210−
211− rb_link_node(&new->index_node, parent, link);
212− rb_insert_color(&new->index_node, &pool->index.tree);
213−
214− return 0;
215−}
216−
217−static int rxe_insert_key(struct rxe_pool *pool, struct rxe_pool_elem *new)
218−{
219− struct rb_node **link = &pool->key.tree.rb_node;
220− struct rb_node *parent = NULL;
221− struct rxe_pool_elem *elem;
222− int cmp;
223−
224− while (*link) {
225− parent = *link;
226− elem = rb_entry(parent, struct rxe_pool_elem, key_node);
227−
228− cmp = memcmp((u8 *)elem + pool->key.key_offset,
229− (u8 *)new + pool->key.key_offset,
230− pool->key.key_size);
231−
232− if (cmp == 0) {
233− pr_warn("key already exists!\n");
234− return -EINVAL;
235− }
236−
237− if (cmp > 0)
238− link = &(*link)->rb_left;
239− else
240− link = &(*link)->rb_right;
241− }
242−
243− rb_link_node(&new->key_node, parent, link);
244− rb_insert_color(&new->key_node, &pool->key.tree);
245−
246− return 0;
247−}
248−
249−int __rxe_add_key_locked(struct rxe_pool_elem *elem, void *key)
250−{
251− struct rxe_pool *pool = elem->pool;
252− int err;
253−
254− memcpy((u8 *)elem + pool->key.key_offset, key, pool->key.key_size);
255− err = rxe_insert_key(pool, elem);
256−
257− return err;
258−}
259−
260−int __rxe_add_key(struct rxe_pool_elem *elem, void *key)
261−{
262− struct rxe_pool *pool = elem->pool;
263− int err;
264−
265− write_lock_bh(&pool->pool_lock);
266− err = __rxe_add_key_locked(elem, key);
267− write_unlock_bh(&pool->pool_lock);
268−
269− return err;
270−}
271−
272−void __rxe_drop_key_locked(struct rxe_pool_elem *elem)
273−{
274− struct rxe_pool *pool = elem->pool;
275−
276− rb_erase(&elem->key_node, &pool->key.tree);
277−}
278−
279−void __rxe_drop_key(struct rxe_pool_elem *elem)
280−{
281− struct rxe_pool *pool = elem->pool;
282−
283− write_lock_bh(&pool->pool_lock);
284− __rxe_drop_key_locked(elem);
285− write_unlock_bh(&pool->pool_lock);
286−}
287−
288−int __rxe_add_index_locked(struct rxe_pool_elem *elem)
289−{
290− struct rxe_pool *pool = elem->pool;
291− int err;
292−
293− elem->index = alloc_index(pool);
294− err = rxe_insert_index(pool, elem);
295−
296− return err;
297−}
298−
299−int __rxe_add_index(struct rxe_pool_elem *elem)
300−{
301− struct rxe_pool *pool = elem->pool;
302− int err;
303−
304− write_lock_bh(&pool->pool_lock);
305− err = __rxe_add_index_locked(elem);
306− write_unlock_bh(&pool->pool_lock);
307−
308− return err;
309−}
310−
311−void __rxe_drop_index_locked(struct rxe_pool_elem *elem)
312−{
313− struct rxe_pool *pool = elem->pool;
314−
315− clear_bit(elem->index - pool->index.min_index, pool->index.table);
316− rb_erase(&elem->index_node, &pool->index.tree);
317−}
318−
319−void __rxe_drop_index(struct rxe_pool_elem *elem)
320−{
321− struct rxe_pool *pool = elem->pool;
322−
323− write_lock_bh(&pool->pool_lock);
324− __rxe_drop_index_locked(elem);
325− write_unlock_bh(&pool->pool_lock);
326−}
327−
328−void *rxe_alloc_locked(struct rxe_pool *pool)
329−{
330− struct rxe_pool_elem *elem;
331− void *obj;
332−
333− if (atomic_inc_return(&pool->num_elem) > pool->max_elem)
334− goto out_cnt;
335−
336− obj = kzalloc(pool->elem_size, GFP_ATOMIC);
337− if (!obj)
338− goto out_cnt;
339−
340− elem = (struct rxe_pool_elem *)((u8 *)obj + pool->elem_offset);
341−
342− elem->pool = pool;
343− elem->obj = obj;
344− kref_init(&elem->ref_cnt);
345−
346− return obj;
347−
348−out_cnt:
349− atomic_dec(&pool->num_elem);
350− return NULL;
116+ WARN_ON(!xa_empty(&pool->xa));
351117 }
352118
353119 void *rxe_alloc(struct rxe_pool *pool)
354120 {
355121 struct rxe_pool_elem *elem;
356122 void *obj;
123+ int err;
124+
125+ if (WARN_ON(!(pool->flags & RXE_POOL_ALLOC)))
126+ return NULL;
357127
358128 if (atomic_inc_return(&pool->num_elem) > pool->max_elem)
359− goto out_cnt;
129+ goto err_cnt;
360130
361131 obj = kzalloc(pool->elem_size, GFP_KERNEL);
362132 if (!obj)
363− goto out_cnt;
133+ goto err_cnt;
364134
365135 elem = (struct rxe_pool_elem *)((u8 *)obj + pool->elem_offset);
366136
@@ -368,127 +138,86 @@ void *rxe_alloc(struct rxe_pool *pool) · 1 unmodified line
368138 elem->obj = obj;
369139 kref_init(&elem->ref_cnt);
370140
141+ err = xa_alloc_cyclic(&pool->xa, &elem->index, elem, pool->limit,
142+ &pool->next, GFP_KERNEL);
143+ if (err)
144+ goto err_free;
145+
371146 return obj;
372147
373−out_cnt:
148+err_free:
149+ kfree(obj);
150+err_cnt:
374151 atomic_dec(&pool->num_elem);
375152 return NULL;
376153 }
377154
378155 int __rxe_add_to_pool(struct rxe_pool *pool, struct rxe_pool_elem *elem)
379156 {
157+ int err;
158+
159+ if (WARN_ON(pool->flags & RXE_POOL_ALLOC))
160+ return -EINVAL;
161+
380162 if (atomic_inc_return(&pool->num_elem) > pool->max_elem)
381− goto out_cnt;
163+ goto err_cnt;
382164
383165 elem->pool = pool;
384166 elem->obj = (u8 *)elem - pool->elem_offset;
385167 kref_init(&elem->ref_cnt);
386168
169+ err = xa_alloc_cyclic(&pool->xa, &elem->index, elem, pool->limit,
170+ &pool->next, GFP_KERNEL);
171+ if (err)
172+ goto err_cnt;
173+
387174 return 0;
388175
389−out_cnt:
176+err_cnt:
390177 atomic_dec(&pool->num_elem);
391178 return -EINVAL;
392179 }
393180
394−void rxe_elem_release(struct kref *kref)
395−{
396− struct rxe_pool_elem *elem =
397− container_of(kref, struct rxe_pool_elem, ref_cnt);
398− struct rxe_pool *pool = elem->pool;
399− void *obj;
400−
401− if (pool->cleanup)
402− pool->cleanup(elem);
403−
404− if (!(pool->flags & RXE_POOL_NO_ALLOC)) {
405− obj = elem->obj;
406− kfree(obj);
407− }
408−
409− atomic_dec(&pool->num_elem);
410−}
411−
412−void *rxe_pool_get_index_locked(struct rxe_pool *pool, u32 index)
181+void *rxe_pool_get_index(struct rxe_pool *pool, u32 index)
413182 {
414− struct rb_node *node;
415183 struct rxe_pool_elem *elem;
184+ struct xarray *xa = &pool->xa;
185+ unsigned long flags;
416186 void *obj;
417187
418− node = pool->index.tree.rb_node;
419−
420− while (node) {
421− elem = rb_entry(node, struct rxe_pool_elem, index_node);
422−
423− if (elem->index > index)
424− node = node->rb_left;
425− else if (elem->index < index)
426− node = node->rb_right;
427− else
428− break;
429− }
430−
431− if (node) {
432− kref_get(&elem->ref_cnt);
188+ xa_lock_irqsave(xa, flags);
189+ elem = xa_load(xa, index);
190+ if (elem && kref_get_unless_zero(&elem->ref_cnt))
433191 obj = elem->obj;
434− } else {
192+ else
435193 obj = NULL;
436− }
437−
438− return obj;
439−}
440−
441−void *rxe_pool_get_index(struct rxe_pool *pool, u32 index)
442−{
443− void *obj;
444−
445− read_lock_bh(&pool->pool_lock);
446− obj = rxe_pool_get_index_locked(pool, index);
447− read_unlock_bh(&pool->pool_lock);
194+ xa_unlock_irqrestore(xa, flags);
448195
449196 return obj;
450197 }
451198
452−void *rxe_pool_get_key_locked(struct rxe_pool *pool, void *key)
199+static void rxe_elem_release(struct kref *kref)
453200 {
454− struct rb_node *node;
455− struct rxe_pool_elem *elem;
456− void *obj;
457− int cmp;
458−
459− node = pool->key.tree.rb_node;
201+ struct rxe_pool_elem *elem = container_of(kref, typeof(*elem), ref_cnt);
202+ struct rxe_pool *pool = elem->pool;
460203
461− while (node) {
462− elem = rb_entry(node, struct rxe_pool_elem, key_node);
204+ xa_erase(&pool->xa, elem->index);
463205
464− cmp = memcmp((u8 *)elem + pool->key.key_offset,
465− key, pool->key.key_size);
206+ if (pool->cleanup)
207+ pool->cleanup(elem);
466208
467− if (cmp > 0)
468− node = node->rb_left;
469− else if (cmp < 0)
470− node = node->rb_right;
471− else
472− break;
473− }
209+ if (pool->flags & RXE_POOL_ALLOC)
210+ kfree(elem->obj);
474211
475− if (node) {
476− kref_get(&elem->ref_cnt);
477− obj = elem->obj;
478− } else {
479− obj = NULL;
480− }
481−
482− return obj;
212+ atomic_dec(&pool->num_elem);
483213 }
484214
485−void *rxe_pool_get_key(struct rxe_pool *pool, void *key)
215+int __rxe_get(struct rxe_pool_elem *elem)
486216 {
487− void *obj;
488−
489− read_lock_bh(&pool->pool_lock);
490− obj = rxe_pool_get_key_locked(pool, key);
491− read_unlock_bh(&pool->pool_lock);
217+ return kref_get_unless_zero(&elem->ref_cnt);
218+}
492219
493− return obj;
220+int __rxe_put(struct rxe_pool_elem *elem)
221+{
222+ return kref_put(&elem->ref_cnt, rxe_elem_release);
494223 }
drivers/infiniband/sw/rxe/rxe_pool.h+14−91
@@ -8,9 +8,7 @@ · 7 unmodified lines
88 #define RXE_POOL_H
99
1010 enum rxe_pool_flags {
11− RXE_POOL_INDEX = BIT(1),
12− RXE_POOL_KEY = BIT(2),
13− RXE_POOL_NO_ALLOC = BIT(4),
11+ RXE_POOL_ALLOC = BIT(1),
1412 };
1513
1614 enum rxe_elem_type {
@@ -22,8 +20,6 @@ enum rxe_elem_type { · 5 unmodified lines
2220 RXE_TYPE_CQ,
2321 RXE_TYPE_MR,
2422 RXE_TYPE_MW,
25− RXE_TYPE_MC_GRP,
26− RXE_TYPE_MC_ELEM,
2723 RXE_NUM_TYPES, /* keep me last */
2824 };
2925
@@ -32,20 +28,13 @@ struct rxe_pool_elem { · 2 unmodified lines
3228 void *obj;
3329 struct kref ref_cnt;
3430 struct list_head list;
35−
36− /* only used if keyed */
37− struct rb_node key_node;
38−
39− /* only used if indexed */
40− struct rb_node index_node;
4131 u32 index;
4232 };
4333
4434 struct rxe_pool {
4535 struct rxe_dev *rxe;
4636 const char *name;
47− rwlock_t pool_lock; /* protects pool add/del/search */
48− void (*cleanup)(struct rxe_pool_elem *obj);
37+ void (*cleanup)(struct rxe_pool_elem *elem);
4938 enum rxe_pool_flags flags;
5039 enum rxe_elem_type type;
5140
@@ -54,36 +43,22 @@ struct rxe_pool { · 2 unmodified lines
5443 size_t elem_size;
5544 size_t elem_offset;
5645
57− /* only used if indexed */
58− struct {
59− struct rb_root tree;
60− unsigned long *table;
61− u32 last;
62− u32 max_index;
63− u32 min_index;
64− } index;
65−
66− /* only used if keyed */
67− struct {
68− struct rb_root tree;
69− size_t key_offset;
70− size_t key_size;
71− } key;
46+ struct xarray xa;
47+ struct xa_limit limit;
48+ u32 next;
7249 };
7350
7451 /* initialize a pool of objects with given limit on
7552 * number of elements. gets parameters from rxe_type_info
7653 * pool elements will be allocated out of a slab cache
7754 */
78−int rxe_pool_init(struct rxe_dev *rxe, struct rxe_pool *pool,
79− enum rxe_elem_type type, u32 max_elem);
55+void rxe_pool_init(struct rxe_dev *rxe, struct rxe_pool *pool,
56+ enum rxe_elem_type type);
8057
8158 /* free resources from object pool */
8259 void rxe_pool_cleanup(struct rxe_pool *pool);
8360
84−/* allocate an object from pool holding and not holding the pool lock */
85−void *rxe_alloc_locked(struct rxe_pool *pool);
86−
61+/* allocate an object from pool */
8762 void *rxe_alloc(struct rxe_pool *pool);
8863
8964 /* connect already allocated object to pool */
@@ -91,69 +66,17 @@ int __rxe_add_to_pool(struct rxe_pool *pool, struct rxe_pool_elem *elem); · 1 unmodified line
9166
9267 #define rxe_add_to_pool(pool, obj) __rxe_add_to_pool(pool, &(obj)->elem)
9368
94−/* assign an index to an indexed object and insert object into
95− * pool's rb tree holding and not holding the pool_lock
96− */
97−int __rxe_add_index_locked(struct rxe_pool_elem *elem);
98−
99−#define rxe_add_index_locked(obj) __rxe_add_index_locked(&(obj)->elem)
100−
101−int __rxe_add_index(struct rxe_pool_elem *elem);
102−
103−#define rxe_add_index(obj) __rxe_add_index(&(obj)->elem)
104−
105−/* drop an index and remove object from rb tree
106− * holding and not holding the pool_lock
107− */
108−void __rxe_drop_index_locked(struct rxe_pool_elem *elem);
109−
110−#define rxe_drop_index_locked(obj) __rxe_drop_index_locked(&(obj)->elem)
111−
112−void __rxe_drop_index(struct rxe_pool_elem *elem);
113−
114−#define rxe_drop_index(obj) __rxe_drop_index(&(obj)->elem)
115−
116−/* assign a key to a keyed object and insert object into
117− * pool's rb tree holding and not holding pool_lock
118− */
119−int __rxe_add_key_locked(struct rxe_pool_elem *elem, void *key);
120−
121−#define rxe_add_key_locked(obj, key) __rxe_add_key_locked(&(obj)->elem, key)
122−
123−int __rxe_add_key(struct rxe_pool_elem *elem, void *key);
124−
125−#define rxe_add_key(obj, key) __rxe_add_key(&(obj)->elem, key)
126−
127−/* remove elem from rb tree holding and not holding the pool_lock */
128−void __rxe_drop_key_locked(struct rxe_pool_elem *elem);
129−
130−#define rxe_drop_key_locked(obj) __rxe_drop_key_locked(&(obj)->elem)
131−
132−void __rxe_drop_key(struct rxe_pool_elem *elem);
133−
134−#define rxe_drop_key(obj) __rxe_drop_key(&(obj)->elem)
135−
136−/* lookup an indexed object from index holding and not holding the pool_lock.
137− * takes a reference on object
138− */
139−void *rxe_pool_get_index_locked(struct rxe_pool *pool, u32 index);
140−
69+/* lookup an indexed object from index. takes a reference on object */
14170 void *rxe_pool_get_index(struct rxe_pool *pool, u32 index);
14271
143−/* lookup keyed object from key holding and not holding the pool_lock.
144− * takes a reference on the objecti
145− */
146−void *rxe_pool_get_key_locked(struct rxe_pool *pool, void *key);
72+int __rxe_get(struct rxe_pool_elem *elem);
14773
148−void *rxe_pool_get_key(struct rxe_pool *pool, void *key);
74+#define rxe_get(obj) __rxe_get(&(obj)->elem)
14975
150−/* cleanup an object when all references are dropped */
151−void rxe_elem_release(struct kref *kref);
76+int __rxe_put(struct rxe_pool_elem *elem);
15277
153−/* take a reference on an object */
154−#define rxe_add_ref(obj) kref_get(&(obj)->elem.ref_cnt)
78+#define rxe_put(obj) __rxe_put(&(obj)->elem)
15579
156−/* drop a reference on an object */
157−#define rxe_drop_ref(obj) kref_put(&(obj)->elem.ref_cnt, rxe_elem_release)
80+#define rxe_read(obj) kref_read(&(obj)->elem.ref_cnt)
15881
15982 #endif /* RXE_POOL_H */
drivers/infiniband/sw/rxe/rxe_qp.c+30−27
@@ -135,12 +135,8 @@ static void free_rd_atomic_resources(struct rxe_qp *qp) · 134 unmodified lines
135135
136136 void free_rd_atomic_resource(struct rxe_qp *qp, struct resp_res *res)
137137 {
138− if (res->type == RXE_ATOMIC_MASK) {
138+ if (res->type == RXE_ATOMIC_MASK)
139139 kfree_skb(res->atomic.skb);
140− } else if (res->type == RXE_READ_MASK) {
141− if (res->read.mr)
142− rxe_drop_ref(res->read.mr);
143− }
144140 res->type = 0;
145141 }
146142
@@ -188,9 +184,6 @@ static void rxe_qp_init_misc(struct rxe_dev *rxe, struct rxe_qp *qp, · 41 unmodified lines
188184 break;
189185 }
190186
191− INIT_LIST_HEAD(&qp->grp_list);
192−
193− spin_lock_init(&qp->grp_lock);
194187 spin_lock_init(&qp->state_lock);
195188
196189 atomic_set(&qp->ssn, 0);
@@ -330,11 +323,11 @@ int rxe_qp_from_init(struct rxe_dev *rxe, struct rxe_qp *qp, struct rxe_pd *pd, · 133 unmodified lines
330323 struct rxe_cq *scq = to_rcq(init->send_cq);
331324 struct rxe_srq *srq = init->srq ? to_rsrq(init->srq) : NULL;
332325
333− rxe_add_ref(pd);
334− rxe_add_ref(rcq);
335− rxe_add_ref(scq);
326+ rxe_get(pd);
327+ rxe_get(rcq);
328+ rxe_get(scq);
336329 if (srq)
337− rxe_add_ref(srq);
330+ rxe_get(srq);
338331
339332 qp->pd = pd;
340333 qp->rcq = rcq;
@@ -366,10 +359,10 @@ err1: · 25 unmodified lines
366359 qp->srq = NULL;
367360
368361 if (srq)
369− rxe_drop_ref(srq);
370− rxe_drop_ref(scq);
371− rxe_drop_ref(rcq);
372− rxe_drop_ref(pd);
362+ rxe_put(srq);
363+ rxe_put(scq);
364+ rxe_put(rcq);
365+ rxe_put(pd);
373366
374367 return err;
375368 }
@@ -528,7 +521,7 @@ static void rxe_qp_reset(struct rxe_qp *qp) · 152 unmodified lines
528521 qp->resp.sent_psn_nak = 0;
529522
530523 if (qp->resp.mr) {
531− rxe_drop_ref(qp->resp.mr);
524+ rxe_put(qp->resp.mr);
532525 qp->resp.mr = NULL;
533526 }
534527
@@ -770,6 +763,20 @@ int rxe_qp_to_attr(struct rxe_qp *qp, struct ib_qp_attr *attr, int mask) · 235 unmodified lines
770763 return 0;
771764 }
772765
766+int rxe_qp_chk_destroy(struct rxe_qp *qp)
767+{
768+ /* See IBA o10-2.2.3
769+ * An attempt to destroy a QP while attached to a mcast group
770+ * will fail immediately.
771+ */
772+ if (atomic_read(&qp->mcg_num)) {
773+ pr_debug("Attempt to destroy QP while attached to multicast group\n");
774+ return -EBUSY;
775+ }
776+
777+ return 0;
778+}
779+
773780 /* called by the destroy qp verb */
774781 void rxe_qp_destroy(struct rxe_qp *qp)
775782 {
@@ -798,28 +805,24 @@ static void rxe_qp_do_cleanup(struct work_struct *work) · 22 unmodified lines
798805 {
799806 struct rxe_qp *qp = container_of(work, typeof(*qp), cleanup_work.work);
800807
801− rxe_drop_all_mcast_groups(qp);
802−
803808 if (qp->sq.queue)
804809 rxe_queue_cleanup(qp->sq.queue);
805810
806811 if (qp->srq)
807− rxe_drop_ref(qp->srq);
812+ rxe_put(qp->srq);
808813
809814 if (qp->rq.queue)
810815 rxe_queue_cleanup(qp->rq.queue);
811816
812817 if (qp->scq)
813− rxe_drop_ref(qp->scq);
818+ rxe_put(qp->scq);
814819 if (qp->rcq)
815− rxe_drop_ref(qp->rcq);
820+ rxe_put(qp->rcq);
816821 if (qp->pd)
817− rxe_drop_ref(qp->pd);
822+ rxe_put(qp->pd);
818823
819− if (qp->resp.mr) {
820− rxe_drop_ref(qp->resp.mr);
821− qp->resp.mr = NULL;
822− }
824+ if (qp->resp.mr)
825+ rxe_put(qp->resp.mr);
823826
824827 if (qp_type(qp) == IB_QPT_RC)
825828 sk_dst_reset(qp->sk->sk);
drivers/infiniband/sw/rxe/rxe_queue.c+6−4
@@ -151,6 +151,8 @@ int rxe_queue_resize(struct rxe_queue *q, unsigned int *num_elem_p, · 150 unmodified lines
151151 struct rxe_queue *new_q;
152152 unsigned int num_elem = *num_elem_p;
153153 int err;
154+ unsigned long producer_flags;
155+ unsigned long consumer_flags;
154156
155157 new_q = rxe_queue_init(q->rxe, &num_elem, elem_size, q->type);
156158 if (!new_q)
@@ -164,17 +166,17 @@ int rxe_queue_resize(struct rxe_queue *q, unsigned int *num_elem_p, · 7 unmodified lines
164166 goto err1;
165167 }
166168
167− spin_lock_bh(consumer_lock);
169+ spin_lock_irqsave(consumer_lock, consumer_flags);
168170
169171 if (producer_lock) {
170− spin_lock_bh(producer_lock);
172+ spin_lock_irqsave(producer_lock, producer_flags);
171173 err = resize_finish(q, new_q, num_elem);
172− spin_unlock_bh(producer_lock);
174+ spin_unlock_irqrestore(producer_lock, producer_flags);
173175 } else {
174176 err = resize_finish(q, new_q, num_elem);
175177 }
176178
177− spin_unlock_bh(consumer_lock);
179+ spin_unlock_irqrestore(consumer_lock, consumer_flags);
178180
179181 rxe_queue_cleanup(new_q); /* new/old dep on err */
180182 if (err)
drivers/infiniband/sw/rxe/rxe_recv.c+13−13
@@ -217,7 +217,7 @@ static int hdr_check(struct rxe_pkt_info *pkt) · 216 unmodified lines
217217 return 0;
218218
219219 err2:
220− rxe_drop_ref(qp);
220+ rxe_put(qp);
221221 err1:
222222 return -EINVAL;
223223 }
@@ -233,8 +233,8 @@ static inline void rxe_rcv_pkt(struct rxe_pkt_info *pkt, struct sk_buff *skb) · 9 unmodified lines
233233 static void rxe_rcv_mcast_pkt(struct rxe_dev *rxe, struct sk_buff *skb)
234234 {
235235 struct rxe_pkt_info *pkt = SKB_TO_PKT(skb);
236− struct rxe_mc_grp *mcg;
237− struct rxe_mc_elem *mce;
236+ struct rxe_mcg *mcg;
237+ struct rxe_mca *mca;
238238 struct rxe_qp *qp;
239239 union ib_gid dgid;
240240 int err;
@@ -246,19 +246,19 @@ static void rxe_rcv_mcast_pkt(struct rxe_dev *rxe, struct sk_buff *skb) · 5 unmodified lines
246246 memcpy(&dgid, &ipv6_hdr(skb)->daddr, sizeof(dgid));
247247
248248 /* lookup mcast group corresponding to mgid, takes a ref */
249− mcg = rxe_pool_get_key(&rxe->mc_grp_pool, &dgid);
249+ mcg = rxe_lookup_mcg(rxe, &dgid);
250250 if (!mcg)
251251 goto drop; /* mcast group not registered */
252252
253− spin_lock_bh(&mcg->mcg_lock);
253+ spin_lock_bh(&rxe->mcg_lock);
254254
255255 /* this is unreliable datagram service so we let
256256 * failures to deliver a multicast packet to a
257257 * single QP happen and just move on and try
258258 * the rest of them on the list
259259 */
260− list_for_each_entry(mce, &mcg->qp_list, qp_list) {
261− qp = mce->qp;
260+ list_for_each_entry(mca, &mcg->qp_list, qp_list) {
261+ qp = mca->qp;
262262
263263 /* validate qp for incoming packet */
264264 err = check_type_state(rxe, pkt, qp);
@@ -273,7 +273,7 @@ static void rxe_rcv_mcast_pkt(struct rxe_dev *rxe, struct sk_buff *skb) · 8 unmodified lines
273273 * skb and pass to the QP. Pass the original skb to
274274 * the last QP in the list.
275275 */
276− if (mce->qp_list.next != &mcg->qp_list) {
276+ if (mca->qp_list.next != &mcg->qp_list) {
277277 struct sk_buff *cskb;
278278 struct rxe_pkt_info *cpkt;
279279
@@ -288,19 +288,19 @@ static void rxe_rcv_mcast_pkt(struct rxe_dev *rxe, struct sk_buff *skb) · 8 unmodified lines
288288
289289 cpkt = SKB_TO_PKT(cskb);
290290 cpkt->qp = qp;
291− rxe_add_ref(qp);
291+ rxe_get(qp);
292292 rxe_rcv_pkt(cpkt, cskb);
293293 } else {
294294 pkt->qp = qp;
295− rxe_add_ref(qp);
295+ rxe_get(qp);
296296 rxe_rcv_pkt(pkt, skb);
297297 skb = NULL; /* mark consumed */
298298 }
299299 }
300300
301− spin_unlock_bh(&mcg->mcg_lock);
301+ spin_unlock_bh(&rxe->mcg_lock);
302302
303− rxe_drop_ref(mcg); /* drop ref from rxe_pool_get_key. */
303+ kref_put(&mcg->ref_cnt, rxe_cleanup_mcg);
304304
305305 if (likely(!skb))
306306 return;
@@ -397,7 +397,7 @@ void rxe_rcv(struct sk_buff *skb) · 90 unmodified lines
397397
398398 drop:
399399 if (pkt->qp)
400− rxe_drop_ref(pkt->qp);
400+ rxe_put(pkt->qp);
401401
402402 kfree_skb(skb);
403403 ib_device_put(&rxe->ib_dev);
drivers/infiniband/sw/rxe/rxe_req.c+41−30
@@ -358,14 +358,14 @@ static inline int get_mtu(struct rxe_qp *qp) · 357 unmodified lines
358358 }
359359
360360 static struct sk_buff *init_req_packet(struct rxe_qp *qp,
361+ struct rxe_av *av,
361362 struct rxe_send_wqe *wqe,
362− int opcode, int payload,
363+ int opcode, u32 payload,
363364 struct rxe_pkt_info *pkt)
364365 {
365366 struct rxe_dev *rxe = to_rdev(qp->ibqp.device);
366367 struct sk_buff *skb;
367368 struct rxe_send_wr *ibwr = &wqe->wr;
368− struct rxe_av *av;
369369 int pad = (-payload) & 0x3;
370370 int paylen;
371371 int solicited;
@@ -374,21 +374,9 @@ static struct sk_buff *init_req_packet(struct rxe_qp *qp, · 2 unmodified lines
374374
375375 /* length from start of bth to end of icrc */
376376 paylen = rxe_opcode[opcode].length + payload + pad + RXE_ICRC_SIZE;
377−
378− /* pkt->hdr, port_num and mask are initialized in ifc layer */
379− pkt->rxe = rxe;
380− pkt->opcode = opcode;
381− pkt->qp = qp;
382− pkt->psn = qp->req.psn;
383− pkt->mask = rxe_opcode[opcode].mask;
384− pkt->paylen = paylen;
385− pkt->wqe = wqe;
377+ pkt->paylen = paylen;
386378
387379 /* init skb */
388− av = rxe_get_av(pkt);
389− if (!av)
390− return NULL;
391−
392380 skb = rxe_init_packet(rxe, av, paylen, pkt);
393381 if (unlikely(!skb))
394382 return NULL;
@@ -447,13 +435,13 @@ static struct sk_buff *init_req_packet(struct rxe_qp *qp, · 52 unmodified lines
447435 return skb;
448436 }
449437
450−static int finish_packet(struct rxe_qp *qp, struct rxe_send_wqe *wqe,
451− struct rxe_pkt_info *pkt, struct sk_buff *skb,
452− int paylen)
438+static int finish_packet(struct rxe_qp *qp, struct rxe_av *av,
439+ struct rxe_send_wqe *wqe, struct rxe_pkt_info *pkt,
440+ struct sk_buff *skb, u32 paylen)
453441 {
454442 int err;
455443
456− err = rxe_prepare(pkt, skb);
444+ err = rxe_prepare(av, pkt, skb);
457445 if (err)
458446 return err;
459447
@@ -497,7 +485,7 @@ static void update_wqe_state(struct rxe_qp *qp, · 37 unmodified lines
497485 static void update_wqe_psn(struct rxe_qp *qp,
498486 struct rxe_send_wqe *wqe,
499487 struct rxe_pkt_info *pkt,
500− int payload)
488+ u32 payload)
501489 {
502490 /* number of packets left to send including current one */
503491 int num_pkt = (wqe->dma.resid + payload + qp->mtu - 1) / qp->mtu;
@@ -540,7 +528,7 @@ static void rollback_state(struct rxe_send_wqe *wqe, · 36 unmodified lines
540528 }
541529
542530 static void update_state(struct rxe_qp *qp, struct rxe_send_wqe *wqe,
543− struct rxe_pkt_info *pkt, int payload)
531+ struct rxe_pkt_info *pkt)
544532 {
545533 qp->req.opcode = pkt->opcode;
546534
@@ -608,19 +596,22 @@ static int rxe_do_local_ops(struct rxe_qp *qp, struct rxe_send_wqe *wqe) · 61 unmodified lines
608596 int rxe_requester(void *arg)
609597 {
610598 struct rxe_qp *qp = (struct rxe_qp *)arg;
599+ struct rxe_dev *rxe = to_rdev(qp->ibqp.device);
611600 struct rxe_pkt_info pkt;
612601 struct sk_buff *skb;
613602 struct rxe_send_wqe *wqe;
614603 enum rxe_hdr_mask mask;
615− int payload;
604+ u32 payload;
616605 int mtu;
617606 int opcode;
618607 int ret;
619608 struct rxe_send_wqe rollback_wqe;
620609 u32 rollback_psn;
621610 struct rxe_queue *q = qp->sq.queue;
611+ struct rxe_ah *ah;
612+ struct rxe_av *av;
622613
623− rxe_add_ref(qp);
614+ rxe_get(qp);
624615
625616 next_wqe:
626617 if (unlikely(!qp->valid || qp->req.state == QP_STATE_ERROR))
@@ -699,20 +690,34 @@ next_wqe: · 72 unmodified lines
699690 wqe->state = wqe_state_done;
700691 wqe->status = IB_WC_SUCCESS;
701692 __rxe_do_task(&qp->comp.task);
702− rxe_drop_ref(qp);
693+ rxe_put(qp);
703694 return 0;
704695 }
705696 payload = mtu;
706697 }
707698
708− skb = init_req_packet(qp, wqe, opcode, payload, &pkt);
699+ pkt.rxe = rxe;
700+ pkt.opcode = opcode;
701+ pkt.qp = qp;
702+ pkt.psn = qp->req.psn;
703+ pkt.mask = rxe_opcode[opcode].mask;
704+ pkt.wqe = wqe;
705+
706+ av = rxe_get_av(&pkt, &ah);
707+ if (unlikely(!av)) {
708+ pr_err("qp#%d Failed no address vector\n", qp_num(qp));
709+ wqe->status = IB_WC_LOC_QP_OP_ERR;
710+ goto err_drop_ah;
711+ }
712+
713+ skb = init_req_packet(qp, av, wqe, opcode, payload, &pkt);
709714 if (unlikely(!skb)) {
710715 pr_err("qp#%d Failed allocating skb\n", qp_num(qp));
711716 wqe->status = IB_WC_LOC_QP_OP_ERR;
712− goto err;
717+ goto err_drop_ah;
713718 }
714719
715− ret = finish_packet(qp, wqe, &pkt, skb, payload);
720+ ret = finish_packet(qp, av, wqe, &pkt, skb, payload);
716721 if (unlikely(ret)) {
717722 pr_debug("qp#%d Error during finish packet\n", qp_num(qp));
718723 if (ret == -EFAULT)
@@ -720,9 +725,12 @@ next_wqe: · 1 unmodified line
720725 else
721726 wqe->status = IB_WC_LOC_QP_OP_ERR;
722727 kfree_skb(skb);
723− goto err;
728+ goto err_drop_ah;
724729 }
725730
731+ if (ah)
732+ rxe_put(ah);
733+
726734 /*
727735 * To prevent a race on wqe access between requester and completer,
728736 * wqe members state and psn need to be set before calling
@@ -747,15 +755,18 @@ next_wqe: · 18 unmodified lines
747755 goto err;
748756 }
749757
750− update_state(qp, wqe, &pkt, payload);
758+ update_state(qp, wqe, &pkt);
751759
752760 goto next_wqe;
753761
762+err_drop_ah:
763+ if (ah)
764+ rxe_put(ah);
754765 err:
755766 wqe->state = wqe_state_error;
756767 __rxe_do_task(&qp->comp.task);
757768
758769 exit:
759− rxe_drop_ref(qp);
770+ rxe_put(qp);
760771 return -EAGAIN;
761772 }
drivers/infiniband/sw/rxe/rxe_resp.c+110−60
@@ -99,7 +99,7 @@ static inline enum resp_states get_req(struct rxe_qp *qp, · 98 unmodified lines
9999
100100 if (qp->resp.state == QP_STATE_ERROR) {
101101 while ((skb = skb_dequeue(&qp->req_pkts))) {
102− rxe_drop_ref(qp);
102+ rxe_put(qp);
103103 kfree_skb(skb);
104104 ib_device_put(qp->ibqp.device);
105105 }
@@ -297,21 +297,22 @@ static enum resp_states get_srq_wqe(struct rxe_qp *qp) · 191 unmodified lines
297297 struct ib_event ev;
298298 unsigned int count;
299299 size_t size;
300+ unsigned long flags;
300301
301302 if (srq->error)
302303 return RESPST_ERR_RNR;
303304
304− spin_lock_bh(&srq->rq.consumer_lock);
305+ spin_lock_irqsave(&srq->rq.consumer_lock, flags);
305306
306307 wqe = queue_head(q, QUEUE_TYPE_FROM_CLIENT);
307308 if (!wqe) {
308− spin_unlock_bh(&srq->rq.consumer_lock);
309+ spin_unlock_irqrestore(&srq->rq.consumer_lock, flags);
309310 return RESPST_ERR_RNR;
310311 }
311312
312313 /* don't trust user space data */
313314 if (unlikely(wqe->dma.num_sge > srq->rq.max_sge)) {
314− spin_unlock_bh(&srq->rq.consumer_lock);
315+ spin_unlock_irqrestore(&srq->rq.consumer_lock, flags);
315316 pr_warn("%s: invalid num_sge in SRQ entry\n", __func__);
316317 return RESPST_ERR_MALFORMED_WQE;
317318 }
@@ -327,11 +328,11 @@ static enum resp_states get_srq_wqe(struct rxe_qp *qp) · 9 unmodified lines
327328 goto event;
328329 }
329330
330− spin_unlock_bh(&srq->rq.consumer_lock);
331+ spin_unlock_irqrestore(&srq->rq.consumer_lock, flags);
331332 return RESPST_CHK_LENGTH;
332333
333334 event:
334− spin_unlock_bh(&srq->rq.consumer_lock);
335+ spin_unlock_irqrestore(&srq->rq.consumer_lock, flags);
335336 ev.device = qp->ibqp.device;
336337 ev.element.srq = qp->ibqp.srq;
337338 ev.event = IB_EVENT_SRQ_LIMIT_REACHED;
@@ -463,8 +464,8 @@ static enum resp_states check_rkey(struct rxe_qp *qp, · 125 unmodified lines
463464 if (mw->access & IB_ZERO_BASED)
464465 qp->resp.offset = mw->addr;
465466
466− rxe_drop_ref(mw);
467− rxe_add_ref(mr);
467+ rxe_put(mw);
468+ rxe_get(mr);
468469 } else {
469470 mr = lookup_mr(qp->pd, access, rkey, RXE_LOOKUP_REMOTE);
470471 if (!mr) {
@@ -507,9 +508,9 @@ static enum resp_states check_rkey(struct rxe_qp *qp, · 36 unmodified lines
507508
508509 err:
509510 if (mr)
510− rxe_drop_ref(mr);
511+ rxe_put(mr);
511512 if (mw)
512− rxe_drop_ref(mw);
513+ rxe_put(mw);
513514
514515 return state;
515516 }
@@ -632,7 +633,7 @@ static struct sk_buff *prepare_ack_packet(struct rxe_qp *qp, · 116 unmodified lines
632633 if (ack->mask & RXE_ATMACK_MASK)
633634 atmack_set_orig(ack, qp->resp.atomic_orig);
634635
635− err = rxe_prepare(ack, skb);
636+ err = rxe_prepare(&qp->pri_av, ack, skb);
636637 if (err) {
637638 kfree_skb(skb);
638639 return NULL;
@@ -641,6 +642,78 @@ static struct sk_buff *prepare_ack_packet(struct rxe_qp *qp, · 2 unmodified lines
641642 return skb;
642643 }
643644
645+static struct resp_res *rxe_prepare_read_res(struct rxe_qp *qp,
646+ struct rxe_pkt_info *pkt)
647+{
648+ struct resp_res *res;
649+ u32 pkts;
650+
651+ res = &qp->resp.resources[qp->resp.res_head];
652+ rxe_advance_resp_resource(qp);
653+ free_rd_atomic_resource(qp, res);
654+
655+ res->type = RXE_READ_MASK;
656+ res->replay = 0;
657+ res->read.va = qp->resp.va + qp->resp.offset;
658+ res->read.va_org = qp->resp.va + qp->resp.offset;
659+ res->read.resid = qp->resp.resid;
660+ res->read.length = qp->resp.resid;
661+ res->read.rkey = qp->resp.rkey;
662+
663+ pkts = max_t(u32, (reth_len(pkt) + qp->mtu - 1)/qp->mtu, 1);
664+ res->first_psn = pkt->psn;
665+ res->cur_psn = pkt->psn;
666+ res->last_psn = (pkt->psn + pkts - 1) & BTH_PSN_MASK;
667+
668+ res->state = rdatm_res_state_new;
669+
670+ return res;
671+}
672+
673+/**
674+ * rxe_recheck_mr - revalidate MR from rkey and get a reference
675+ * @qp: the qp
676+ * @rkey: the rkey
677+ *
678+ * This code allows the MR to be invalidated or deregistered or
679+ * the MW if one was used to be invalidated or deallocated.
680+ * It is assumed that the access permissions if originally good
681+ * are OK and the mappings to be unchanged.
682+ *
683+ * Return: mr on success else NULL
684+ */
685+static struct rxe_mr *rxe_recheck_mr(struct rxe_qp *qp, u32 rkey)
686+{
687+ struct rxe_dev *rxe = to_rdev(qp->ibqp.device);
688+ struct rxe_mr *mr;
689+ struct rxe_mw *mw;
690+
691+ if (rkey_is_mw(rkey)) {
692+ mw = rxe_pool_get_index(&rxe->mw_pool, rkey >> 8);
693+ if (!mw || mw->rkey != rkey)
694+ return NULL;
695+
696+ if (mw->state != RXE_MW_STATE_VALID) {
697+ rxe_put(mw);
698+ return NULL;
699+ }
700+
701+ mr = mw->mr;
702+ rxe_put(mw);
703+ } else {
704+ mr = rxe_pool_get_index(&rxe->mr_pool, rkey >> 8);
705+ if (!mr || mr->rkey != rkey)
706+ return NULL;
707+ }
708+
709+ if (mr->state != RXE_MR_STATE_VALID) {
710+ rxe_put(mr);
711+ return NULL;
712+ }
713+
714+ return mr;
715+}
716+
644717 /* RDMA read response. If res is not NULL, then we have a current RDMA request
645718 * being processed or replayed.
646719 */
@@ -655,53 +728,26 @@ static enum resp_states read_reply(struct rxe_qp *qp, · 8 unmodified lines
655728 int opcode;
656729 int err;
657730 struct resp_res *res = qp->resp.res;
731+ struct rxe_mr *mr;
658732
659733 if (!res) {
660− /* This is the first time we process that request. Get a
661− * resource
662− */
663− res = &qp->resp.resources[qp->resp.res_head];
664−
665− free_rd_atomic_resource(qp, res);
666− rxe_advance_resp_resource(qp);
667−
668− res->type = RXE_READ_MASK;
669− res->replay = 0;
670−
671− res->read.va = qp->resp.va +
672− qp->resp.offset;
673− res->read.va_org = qp->resp.va +
674− qp->resp.offset;
675−
676− res->first_psn = req_pkt->psn;
677−
678− if (reth_len(req_pkt)) {
679− res->last_psn = (req_pkt->psn +
680− (reth_len(req_pkt) + mtu - 1) /
681− mtu - 1) & BTH_PSN_MASK;
682− } else {
683− res->last_psn = res->first_psn;
684− }
685− res->cur_psn = req_pkt->psn;
686−
687− res->read.resid = qp->resp.resid;
688− res->read.length = qp->resp.resid;
689− res->read.rkey = qp->resp.rkey;
690−
691− /* note res inherits the reference to mr from qp */
692− res->read.mr = qp->resp.mr;
693− qp->resp.mr = NULL;
694−
695− qp->resp.res = res;
696− res->state = rdatm_res_state_new;
734+ res = rxe_prepare_read_res(qp, req_pkt);
735+ qp->resp.res = res;
697736 }
698737
699738 if (res->state == rdatm_res_state_new) {
739+ mr = qp->resp.mr;
740+ qp->resp.mr = NULL;
741+
700742 if (res->read.resid <= mtu)
701743 opcode = IB_OPCODE_RC_RDMA_READ_RESPONSE_ONLY;
702744 else
703745 opcode = IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST;
704746 } else {
747+ mr = rxe_recheck_mr(qp, res->read.rkey);
748+ if (!mr)
749+ return RESPST_ERR_RKEY_VIOLATION;
750+
705751 if (res->read.resid > mtu)
706752 opcode = IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE;
707753 else
@@ -717,10 +763,12 @@ static enum resp_states read_reply(struct rxe_qp *qp, · 9 unmodified lines
717763 if (!skb)
718764 return RESPST_ERR_RNR;
719765
720− err = rxe_mr_copy(res->read.mr, res->read.va, payload_addr(&ack_pkt),
766+ err = rxe_mr_copy(mr, res->read.va, payload_addr(&ack_pkt),
721767 payload, RXE_FROM_MR_OBJ);
722768 if (err)
723769 pr_err("Failed copying memory\n");
770+ if (mr)
771+ rxe_put(mr);
724772
725773 if (bth_pad(&ack_pkt)) {
726774 u8 *pad = payload_addr(&ack_pkt) + payload;
@@ -814,6 +862,10 @@ static enum resp_states execute(struct rxe_qp *qp, struct rxe_pkt_info *pkt) · 87 unmodified lines
814862 return RESPST_ERR_INVALIDATE_RKEY;
815863 }
816864
865+ if (pkt->mask & RXE_END_MASK)
866+ /* We successfully processed this new request. */
867+ qp->resp.msn++;
868+
817869 /* next expected psn, read handles this separately */
818870 qp->resp.psn = (pkt->psn + 1) & BTH_PSN_MASK;
819871 qp->resp.ack_psn = qp->resp.psn;
@@ -821,11 +873,9 @@ static enum resp_states execute(struct rxe_qp *qp, struct rxe_pkt_info *pkt) · 1 unmodified line
821873 qp->resp.opcode = pkt->opcode;
822874 qp->resp.status = IB_WC_SUCCESS;
823875
824− if (pkt->mask & RXE_COMP_MASK) {
825− /* We successfully processed this new request. */
826− qp->resp.msn++;
876+ if (pkt->mask & RXE_COMP_MASK)
827877 return RESPST_COMPLETE;
828− } else if (qp_type(qp) == IB_QPT_RC)
878+ else if (qp_type(qp) == IB_QPT_RC)
829879 return RESPST_ACKNOWLEDGE;
830880 else
831881 return RESPST_CLEANUP;
@@ -987,7 +1037,7 @@ static int send_atomic_ack(struct rxe_qp *qp, struct rxe_pkt_info *pkt, · 155 unmodified lines
9871037 rc = rxe_xmit_packet(qp, &ack_pkt, skb);
9881038 if (rc) {
9891039 pr_err_ratelimited("Failed sending ack\n");
990− rxe_drop_ref(qp);
1040+ rxe_put(qp);
9911041 }
9921042 out:
9931043 return rc;
@@ -1016,13 +1066,13 @@ static enum resp_states cleanup(struct rxe_qp *qp, · 22 unmodified lines
10161066
10171067 if (pkt) {
10181068 skb = skb_dequeue(&qp->req_pkts);
1019− rxe_drop_ref(qp);
1069+ rxe_put(qp);
10201070 kfree_skb(skb);
10211071 ib_device_put(qp->ibqp.device);
10221072 }
10231073
10241074 if (qp->resp.mr) {
1025− rxe_drop_ref(qp->resp.mr);
1075+ rxe_put(qp->resp.mr);
10261076 qp->resp.mr = NULL;
10271077 }
10281078
@@ -1166,7 +1216,7 @@ static enum resp_states do_class_d1e_error(struct rxe_qp *qp) · 137 unmodified lines
11661216 }
11671217
11681218 if (qp->resp.mr) {
1169− rxe_drop_ref(qp->resp.mr);
1219+ rxe_put(qp->resp.mr);
11701220 qp->resp.mr = NULL;
11711221 }
11721222
@@ -1180,7 +1230,7 @@ static void rxe_drain_req_pkts(struct rxe_qp *qp, bool notify) · 7 unmodified lines
11801230 struct rxe_queue *q = qp->rq.queue;
11811231
11821232 while ((skb = skb_dequeue(&qp->req_pkts))) {
1183− rxe_drop_ref(qp);
1233+ rxe_put(qp);
11841234 kfree_skb(skb);
11851235 ib_device_put(qp->ibqp.device);
11861236 }
@@ -1200,7 +1250,7 @@ int rxe_responder(void *arg) · 13 unmodified lines
12001250 struct rxe_pkt_info *pkt = NULL;
12011251 int ret = 0;
12021252
1203− rxe_add_ref(qp);
1253+ rxe_get(qp);
12041254
12051255 qp->resp.aeth_syndrome = AETH_ACK_UNLIMITED;
12061256
@@ -1387,6 +1437,6 @@ int rxe_responder(void *arg) · 180 unmodified lines
13871437 exit:
13881438 ret = -EAGAIN;
13891439 done:
1390− rxe_drop_ref(qp);
1440+ rxe_put(qp);
13911441 return ret;
13921442 }
drivers/infiniband/sw/rxe/rxe_verbs.c+40−68
@@ -115,7 +115,7 @@ static void rxe_dealloc_ucontext(struct ib_ucontext *ibuc) · 114 unmodified lines
115115 {
116116 struct rxe_ucontext *uc = to_ruc(ibuc);
117117
118− rxe_drop_ref(uc);
118+ rxe_put(uc);
119119 }
120120
121121 static int rxe_port_immutable(struct ib_device *dev, u32 port_num,
@@ -149,7 +149,7 @@ static int rxe_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata) · 27 unmodified lines
149149 {
150150 struct rxe_pd *pd = to_rpd(ibpd);
151151
152− rxe_drop_ref(pd);
152+ rxe_put(pd);
153153 return 0;
154154 }
155155
@@ -181,7 +181,6 @@ static int rxe_create_ah(struct ib_ah *ibah, · 25 unmodified lines
181181 return err;
182182
183183 /* create index > 0 */
184− rxe_add_index(ah);
185184 ah->ah_num = ah->elem.index;
186185
187186 if (uresp) {
@@ -189,8 +188,7 @@ static int rxe_create_ah(struct ib_ah *ibah, · 1 unmodified line
189188 err = copy_to_user(&uresp->ah_num, &ah->ah_num,
190189 sizeof(uresp->ah_num));
191190 if (err) {
192− rxe_drop_index(ah);
193− rxe_drop_ref(ah);
191+ rxe_put(ah);
194192 return -EFAULT;
195193 }
196194 } else if (ah->is_user) {
@@ -230,8 +228,7 @@ static int rxe_destroy_ah(struct ib_ah *ibah, u32 flags) · 33 unmodified lines
230228 {
231229 struct rxe_ah *ah = to_rah(ibah);
232230
233− rxe_drop_index(ah);
234− rxe_drop_ref(ah);
231+ rxe_put(ah);
235232 return 0;
236233 }
237234
@@ -306,7 +303,7 @@ static int rxe_create_srq(struct ib_srq *ibsrq, struct ib_srq_init_attr *init, · 68 unmodified lines
306303 if (err)
307304 goto err1;
308305
309− rxe_add_ref(pd);
306+ rxe_get(pd);
310307 srq->pd = pd;
311308
312309 err = rxe_srq_from_init(rxe, srq, init, udata, uresp);
@@ -316,8 +313,8 @@ static int rxe_create_srq(struct ib_srq *ibsrq, struct ib_srq_init_attr *init, · 3 unmodified lines
316313 return 0;
317314
318315 err2:
319− rxe_drop_ref(pd);
320− rxe_drop_ref(srq);
316+ rxe_put(pd);
317+ rxe_put(srq);
321318 err1:
322319 return err;
323320 }
@@ -374,8 +371,8 @@ static int rxe_destroy_srq(struct ib_srq *ibsrq, struct ib_udata *udata) · 50 unmodified lines
374371 if (srq->rq.queue)
375372 rxe_queue_cleanup(srq->rq.queue);
376373
377− rxe_drop_ref(srq->pd);
378− rxe_drop_ref(srq);
374+ rxe_put(srq->pd);
375+ rxe_put(srq);
379376 return 0;
380377 }
381378
@@ -384,8 +381,9 @@ static int rxe_post_srq_recv(struct ib_srq *ibsrq, const struct ib_recv_wr *wr, · 2 unmodified lines
384381 {
385382 int err = 0;
386383 struct rxe_srq *srq = to_rsrq(ibsrq);
384+ unsigned long flags;
387385
388− spin_lock_bh(&srq->rq.producer_lock);
386+ spin_lock_irqsave(&srq->rq.producer_lock, flags);
389387
390388 while (wr) {
391389 err = post_one_recv(&srq->rq, wr);
@@ -394,7 +392,7 @@ static int rxe_post_srq_recv(struct ib_srq *ibsrq, const struct ib_recv_wr *wr, · 2 unmodified lines
394392 wr = wr->next;
395393 }
396394
397− spin_unlock_bh(&srq->rq.producer_lock);
395+ spin_unlock_irqrestore(&srq->rq.producer_lock, flags);
398396
399397 if (err)
400398 *bad_wr = wr;
@@ -437,7 +435,6 @@ static int rxe_create_qp(struct ib_qp *ibqp, struct ib_qp_init_attr *init, · 36 unmodified lines
437435 if (err)
438436 return err;
439437
440− rxe_add_index(qp);
441438 err = rxe_qp_from_init(rxe, qp, pd, init, uresp, ibqp->pd, udata);
442439 if (err)
443440 goto qp_init;
@@ -445,8 +442,7 @@ static int rxe_create_qp(struct ib_qp *ibqp, struct ib_qp_init_attr *init, · 1 unmodified line
445442 return 0;
446443
447444 qp_init:
448− rxe_drop_index(qp);
449− rxe_drop_ref(qp);
445+ rxe_put(qp);
450446 return err;
451447 }
452448
@@ -493,10 +489,14 @@ static int rxe_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, · 40 unmodified lines
493489 static int rxe_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
494490 {
495491 struct rxe_qp *qp = to_rqp(ibqp);
492+ int ret;
493+
494+ ret = rxe_qp_chk_destroy(qp);
495+ if (ret)
496+ return ret;
496497
497498 rxe_qp_destroy(qp);
498− rxe_drop_index(qp);
499− rxe_drop_ref(qp);
499+ rxe_put(qp);
500500 return 0;
501501 }
502502
@@ -638,18 +638,19 @@ static int post_one_send(struct rxe_qp *qp, const struct ib_send_wr *ibwr, · 135 unmodified lines
638638 int err;
639639 struct rxe_sq *sq = &qp->sq;
640640 struct rxe_send_wqe *send_wqe;
641+ unsigned long flags;
641642 int full;
642643
643644 err = validate_send_wr(qp, ibwr, mask, length);
644645 if (err)
645646 return err;
646647
647− spin_lock_bh(&qp->sq.sq_lock);
648+ spin_lock_irqsave(&qp->sq.sq_lock, flags);
648649
649650 full = queue_full(sq->queue, QUEUE_TYPE_TO_DRIVER);
650651
651652 if (unlikely(full)) {
652− spin_unlock_bh(&qp->sq.sq_lock);
653+ spin_unlock_irqrestore(&qp->sq.sq_lock, flags);
653654 return -ENOMEM;
654655 }
655656
@@ -658,7 +659,7 @@ static int post_one_send(struct rxe_qp *qp, const struct ib_send_wr *ibwr, · 2 unmodified lines
658659
659660 queue_advance_producer(sq->queue, QUEUE_TYPE_TO_DRIVER);
660661
661− spin_unlock_bh(&qp->sq.sq_lock);
662+ spin_unlock_irqrestore(&qp->sq.sq_lock, flags);
662663
663664 return 0;
664665 }
@@ -738,6 +739,7 @@ static int rxe_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, · 73 unmodified lines
738739 int err = 0;
739740 struct rxe_qp *qp = to_rqp(ibqp);
740741 struct rxe_rq *rq = &qp->rq;
742+ unsigned long flags;
741743
742744 if (unlikely((qp_state(qp) < IB_QPS_INIT) || !qp->valid)) {
743745 *bad_wr = wr;
@@ -751,7 +753,7 @@ static int rxe_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, · 7 unmodified lines
751753 goto err1;
752754 }
753755
754− spin_lock_bh(&rq->producer_lock);
756+ spin_lock_irqsave(&rq->producer_lock, flags);
755757
756758 while (wr) {
757759 err = post_one_recv(rq, wr);
@@ -762,7 +764,7 @@ static int rxe_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, · 4 unmodified lines
762764 wr = wr->next;
763765 }
764766
765− spin_unlock_bh(&rq->producer_lock);
767+ spin_unlock_irqrestore(&rq->producer_lock, flags);
766768
767769 if (qp->resp.state == QP_STATE_ERROR)
768770 rxe_run_task(&qp->resp.task, 1);
@@ -807,7 +809,7 @@ static int rxe_destroy_cq(struct ib_cq *ibcq, struct ib_udata *udata) · 38 unmodified lines
807809
808810 rxe_cq_disable(cq);
809811
810− rxe_drop_ref(cq);
812+ rxe_put(cq);
811813 return 0;
812814 }
813815
@@ -843,8 +845,9 @@ static int rxe_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc) · 29 unmodified lines
843845 int i;
844846 struct rxe_cq *cq = to_rcq(ibcq);
845847 struct rxe_cqe *cqe;
848+ unsigned long flags;
846849
847− spin_lock_bh(&cq->cq_lock);
850+ spin_lock_irqsave(&cq->cq_lock, flags);
848851 for (i = 0; i < num_entries; i++) {
849852 cqe = queue_head(cq->queue, QUEUE_TYPE_FROM_DRIVER);
850853 if (!cqe)
@@ -853,7 +856,7 @@ static int rxe_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc) · 2 unmodified lines
853856 memcpy(wc++, &cqe->ibwc, sizeof(*wc));
854857 queue_advance_consumer(cq->queue, QUEUE_TYPE_FROM_DRIVER);
855858 }
856− spin_unlock_bh(&cq->cq_lock);
859+ spin_unlock_irqrestore(&cq->cq_lock, flags);
857860
858861 return i;
859862 }
@@ -873,8 +876,9 @@ static int rxe_req_notify_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags) · 13 unmodified lines
873876 struct rxe_cq *cq = to_rcq(ibcq);
874877 int ret = 0;
875878 int empty;
879+ unsigned long irq_flags;
876880
877− spin_lock_bh(&cq->cq_lock);
881+ spin_lock_irqsave(&cq->cq_lock, irq_flags);
878882 if (cq->notify != IB_CQ_NEXT_COMP)
879883 cq->notify = flags & IB_CQ_SOLICITED_MASK;
880884
@@ -883,7 +887,7 @@ static int rxe_req_notify_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags) · 2 unmodified lines
883887 if ((flags & IB_CQ_REPORT_MISSED_EVENTS) && !empty)
884888 ret = 1;
885889
886− spin_unlock_bh(&cq->cq_lock);
890+ spin_unlock_irqrestore(&cq->cq_lock, irq_flags);
887891
888892 return ret;
889893 }
@@ -898,8 +902,7 @@ static struct ib_mr *rxe_get_dma_mr(struct ib_pd *ibpd, int access) · 8 unmodified lines
898902 if (!mr)
899903 return ERR_PTR(-ENOMEM);
900904
901− rxe_add_index(mr);
902− rxe_add_ref(pd);
905+ rxe_get(pd);
903906 rxe_mr_init_dma(pd, access, mr);
904907
905908 return &mr->ibmr;
@@ -922,9 +925,8 @@ static struct ib_mr *rxe_reg_user_mr(struct ib_pd *ibpd, · 16 unmodified lines
922925 goto err2;
923926 }
924927
925− rxe_add_index(mr);
926928
927− rxe_add_ref(pd);
929+ rxe_get(pd);
928930
929931 err = rxe_mr_init_user(pd, start, length, iova, access, mr);
930932 if (err)
@@ -933,9 +935,8 @@ static struct ib_mr *rxe_reg_user_mr(struct ib_pd *ibpd, · 2 unmodified lines
933935 return &mr->ibmr;
934936
935937 err3:
936− rxe_drop_ref(pd);
937− rxe_drop_index(mr);
938− rxe_drop_ref(mr);
938+ rxe_put(pd);
939+ rxe_put(mr);
939940 err2:
940941 return ERR_PTR(err);
941942 }
@@ -957,9 +958,7 @@ static struct ib_mr *rxe_alloc_mr(struct ib_pd *ibpd, enum ib_mr_type mr_type, · 15 unmodified lines
957958 goto err1;
958959 }
959960
960− rxe_add_index(mr);
961−
962− rxe_add_ref(pd);
961+ rxe_get(pd);
963962
964963 err = rxe_mr_init_fast(pd, max_num_sg, mr);
965964 if (err)
@@ -968,9 +967,8 @@ static struct ib_mr *rxe_alloc_mr(struct ib_pd *ibpd, enum ib_mr_type mr_type, · 2 unmodified lines
968967 return &mr->ibmr;
969968
970969 err2:
971− rxe_drop_ref(pd);
972− rxe_drop_index(mr);
973− rxe_drop_ref(mr);
970+ rxe_put(pd);
971+ rxe_put(mr);
974972 err1:
975973 return ERR_PTR(err);
976974 }
@@ -999,32 +997,6 @@ static int rxe_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, · 22 unmodified lines
999997 return n;
1000998 }
1001999
1002−static int rxe_attach_mcast(struct ib_qp *ibqp, union ib_gid *mgid, u16 mlid)
1003−{
1004− int err;
1005− struct rxe_dev *rxe = to_rdev(ibqp->device);
1006− struct rxe_qp *qp = to_rqp(ibqp);
1007− struct rxe_mc_grp *grp;
1008−
1009− /* takes a ref on grp if successful */
1010− err = rxe_mcast_get_grp(rxe, mgid, &grp);
1011− if (err)
1012− return err;
1013−
1014− err = rxe_mcast_add_grp_elem(rxe, qp, grp);
1015−
1016− rxe_drop_ref(grp);
1017− return err;
1018−}
1019−
1020−static int rxe_detach_mcast(struct ib_qp *ibqp, union ib_gid *mgid, u16 mlid)
1021−{
1022− struct rxe_dev *rxe = to_rdev(ibqp->device);
1023− struct rxe_qp *qp = to_rqp(ibqp);
1024−
1025− return rxe_mcast_drop_grp_elem(rxe, qp, mgid);
1026−}
1027−
10281000 static ssize_t parent_show(struct device *device,
10291001 struct device_attribute *attr, char *buf)
10301002 {
drivers/infiniband/sw/rxe/rxe_verbs.h+12−15
@@ -157,7 +157,6 @@ struct resp_res { · 156 unmodified lines
157157 struct sk_buff *skb;
158158 } atomic;
159159 struct {
160− struct rxe_mr *mr;
161160 u64 va_org;
162161 u32 rkey;
163162 u32 length;
@@ -232,9 +231,7 @@ struct rxe_qp { · 68 unmodified lines
232231 struct rxe_av pri_av;
233232 struct rxe_av alt_av;
234233
235− /* list of mcast groups qp has joined (for cleanup) */
236− struct list_head grp_list;
237− spinlock_t grp_lock; /* guard grp_list */
234+ atomic_t mcg_num;
238235
239236 struct sk_buff_head req_pkts;
240237 struct sk_buff_head resp_pkts;
@@ -353,23 +350,20 @@ struct rxe_mw { · 112 unmodified lines
353350 u64 length;
354351 };
355352
356−struct rxe_mc_grp {
357− struct rxe_pool_elem elem;
358− spinlock_t mcg_lock; /* guard group */
353+struct rxe_mcg {
354+ struct rb_node node;
355+ struct kref ref_cnt;
359356 struct rxe_dev *rxe;
360357 struct list_head qp_list;
361358 union ib_gid mgid;
362− int num_qp;
359+ atomic_t qp_num;
363360 u32 qkey;
364361 u16 pkey;
365362 };
366363
367−struct rxe_mc_elem {
368− struct rxe_pool_elem elem;
364+struct rxe_mca {
369365 struct list_head qp_list;
370− struct list_head grp_list;
371366 struct rxe_qp *qp;
372− struct rxe_mc_grp *grp;
373367 };
374368
375369 struct rxe_port {
@@ -401,7 +395,12 @@ struct rxe_dev { · 25 unmodified lines
401395 struct rxe_pool mr_pool;
402396 struct rxe_pool mw_pool;
403397 struct rxe_pool mc_grp_pool;
404− struct rxe_pool mc_elem_pool;
398+
399+ /* multicast support */
400+ spinlock_t mcg_lock;
401+ struct rb_root mcg_tree;
402+ atomic_t mcg_num;
403+ atomic_t mcg_attach;
405404
406405 spinlock_t pending_lock; /* guard pending_mmaps */
407406 struct list_head pending_mmaps;
@@ -482,6 +481,4 @@ static inline struct rxe_pd *rxe_mw_pd(struct rxe_mw *mw) · 74 unmodified lines
482481
483482 int rxe_register_device(struct rxe_dev *rxe, const char *ibdev_name);
484483
485−void rxe_mc_cleanup(struct rxe_pool_elem *elem);
486−
487484 #endif /* RXE_VERBS_H */
drivers/infiniband/ulp/ipoib/ipoib_netlink.c+0−1
@@ -32,7 +32,6 @@ · 31 unmodified lines
3232
3333 #include <linux/netdevice.h>
3434 #include <linux/if_arp.h> /* For ARPHRD_xxx */
35−#include <linux/module.h>
3635 #include <net/rtnetlink.h>
3736 #include "ipoib.h"
3837
drivers/infiniband/ulp/ipoib/ipoib_vlan.c+0−1
@@ -30,7 +30,6 @@ · 29 unmodified lines
3030 * SOFTWARE.
3131 */
3232
33−#include <linux/module.h>
3433 #include <linux/sched/signal.h>
3534
3635 #include <linux/init.h>
drivers/infiniband/ulp/iser/iscsi_iser.h+6−7
@@ -203,12 +203,12 @@ struct iser_reg_resources; · 202 unmodified lines
203203 *
204204 * @sge: memory region sg element
205205 * @rkey: memory region remote key
206− * @mem_h: pointer to registration context (FMR/Fastreg)
206+ * @desc: pointer to fast registration context
207207 */
208208 struct iser_mem_reg {
209− struct ib_sge sge;
210− u32 rkey;
211− void *mem_h;
209+ struct ib_sge sge;
210+ u32 rkey;
211+ struct iser_fr_desc *desc;
212212 };
213213
214214 enum iser_desc_type {
@@ -531,13 +531,12 @@ int iser_post_recvm(struct iser_conn *iser_conn, · 316 unmodified lines
531531 int iser_post_send(struct ib_conn *ib_conn, struct iser_tx_desc *tx_desc);
532532
533533 int iser_dma_map_task_data(struct iscsi_iser_task *iser_task,
534− struct iser_data_buf *data,
535534 enum iser_data_dir iser_dir,
536535 enum dma_data_direction dma_dir);
537536
538537 void iser_dma_unmap_task_data(struct iscsi_iser_task *iser_task,
539− struct iser_data_buf *data,
540− enum dma_data_direction dir);
538+ enum iser_data_dir iser_dir,
539+ enum dma_data_direction dma_dir);
541540
542541 int iser_initialize_task_headers(struct iscsi_task *task,
543542 struct iser_tx_desc *tx_desc);
drivers/infiniband/ulp/iser/iser_initiator.c+15−43
@@ -52,30 +52,17 @@ static int iser_prepare_read_cmd(struct iscsi_task *task) · 51 unmodified lines
5252 struct iser_mem_reg *mem_reg;
5353 int err;
5454 struct iser_ctrl *hdr = &iser_task->desc.iser_header;
55− struct iser_data_buf *buf_in = &iser_task->data[ISER_DIR_IN];
5655
5756 err = iser_dma_map_task_data(iser_task,
58− buf_in,
5957 ISER_DIR_IN,
6058 DMA_FROM_DEVICE);
6159 if (err)
6260 return err;
6361
64− if (scsi_prot_sg_count(iser_task->sc)) {
65− struct iser_data_buf *pbuf_in = &iser_task->prot[ISER_DIR_IN];
66−
67− err = iser_dma_map_task_data(iser_task,
68− pbuf_in,
69− ISER_DIR_IN,
70− DMA_FROM_DEVICE);
71− if (err)
72− return err;
73− }
74−
7562 err = iser_reg_mem_fastreg(iser_task, ISER_DIR_IN, false);
7663 if (err) {
7764 iser_err("Failed to set up Data-IN RDMA\n");
78− return err;
65+ goto out_err;
7966 }
8067 mem_reg = &iser_task->rdma_reg[ISER_DIR_IN];
8168
@@ -88,6 +75,10 @@ static int iser_prepare_read_cmd(struct iscsi_task *task) · 6 unmodified lines
8875 (unsigned long long)mem_reg->sge.addr);
8976
9077 return 0;
78+
79+out_err:
80+ iser_dma_unmap_task_data(iser_task, ISER_DIR_IN, DMA_FROM_DEVICE);
81+ return err;
9182 }
9283
9384 /* Register user buffer memory and initialize passive rdma
@@ -106,28 +97,16 @@ static int iser_prepare_write_cmd(struct iscsi_task *task, unsigned int imm_sz, · 12 unmodified lines
10697 struct ib_sge *tx_dsg = &iser_task->desc.tx_sg[1];
10798
10899 err = iser_dma_map_task_data(iser_task,
109− buf_out,
110100 ISER_DIR_OUT,
111101 DMA_TO_DEVICE);
112102 if (err)
113103 return err;
114104
115− if (scsi_prot_sg_count(iser_task->sc)) {
116− struct iser_data_buf *pbuf_out = &iser_task->prot[ISER_DIR_OUT];
117−
118− err = iser_dma_map_task_data(iser_task,
119− pbuf_out,
120− ISER_DIR_OUT,
121− DMA_TO_DEVICE);
122− if (err)
123− return err;
124− }
125−
126105 err = iser_reg_mem_fastreg(iser_task, ISER_DIR_OUT,
127106 buf_out->data_len == imm_sz);
128− if (err != 0) {
107+ if (err) {
129108 iser_err("Failed to register write cmd RDMA mem\n");
130− return err;
109+ goto out_err;
131110 }
132111
133112 mem_reg = &iser_task->rdma_reg[ISER_DIR_OUT];
@@ -154,6 +133,10 @@ static int iser_prepare_write_cmd(struct iscsi_task *task, unsigned int imm_sz, · 20 unmodified lines
154133 }
155134
156135 return 0;
136+
137+out_err:
138+ iser_dma_unmap_task_data(iser_task, ISER_DIR_OUT, DMA_TO_DEVICE);
139+ return err;
157140 }
158141
159142 /* creates a new tx descriptor and adds header regd buffer */
@@ -619,13 +602,13 @@ static int iser_check_remote_inv(struct iser_conn *iser_conn, struct ib_wc *wc, · 459 unmodified lines
619602 struct iser_fr_desc *desc;
620603
621604 if (iser_task->dir[ISER_DIR_IN]) {
622− desc = iser_task->rdma_reg[ISER_DIR_IN].mem_h;
605+ desc = iser_task->rdma_reg[ISER_DIR_IN].desc;
623606 if (unlikely(iser_inv_desc(desc, rkey)))
624607 return -EINVAL;
625608 }
626609
627610 if (iser_task->dir[ISER_DIR_OUT]) {
628− desc = iser_task->rdma_reg[ISER_DIR_OUT].mem_h;
611+ desc = iser_task->rdma_reg[ISER_DIR_OUT].desc;
629612 if (unlikely(iser_inv_desc(desc, rkey)))
630613 return -EINVAL;
631614 }
@@ -740,27 +723,16 @@ void iser_task_rdma_init(struct iscsi_iser_task *iser_task) · 108 unmodified lines
740723
741724 void iser_task_rdma_finalize(struct iscsi_iser_task *iser_task)
742725 {
743− int prot_count = scsi_prot_sg_count(iser_task->sc);
744726
745727 if (iser_task->dir[ISER_DIR_IN]) {
746728 iser_unreg_mem_fastreg(iser_task, ISER_DIR_IN);
747− iser_dma_unmap_task_data(iser_task,
748− &iser_task->data[ISER_DIR_IN],
729+ iser_dma_unmap_task_data(iser_task, ISER_DIR_IN,
749730 DMA_FROM_DEVICE);
750− if (prot_count)
751− iser_dma_unmap_task_data(iser_task,
752− &iser_task->prot[ISER_DIR_IN],
753− DMA_FROM_DEVICE);
754731 }
755732
756733 if (iser_task->dir[ISER_DIR_OUT]) {
757734 iser_unreg_mem_fastreg(iser_task, ISER_DIR_OUT);
758− iser_dma_unmap_task_data(iser_task,
759− &iser_task->data[ISER_DIR_OUT],
735+ iser_dma_unmap_task_data(iser_task, ISER_DIR_OUT,
760736 DMA_TO_DEVICE);
761− if (prot_count)
762− iser_dma_unmap_task_data(iser_task,
763− &iser_task->prot[ISER_DIR_OUT],
764− DMA_TO_DEVICE);
765737 }
766738 }
drivers/infiniband/ulp/iser/iser_memory.c+39−30
@@ -30,7 +30,6 @@ · 29 unmodified lines
3030 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
3131 * SOFTWARE.
3232 */
33−#include <linux/module.h>
3433 #include <linux/kernel.h>
3534 #include <linux/slab.h>
3635 #include <linux/mm.h>
@@ -71,10 +70,10 @@ static void iser_reg_desc_put_fr(struct ib_conn *ib_conn, · 34 unmodified lines
7170 }
7271
7372 int iser_dma_map_task_data(struct iscsi_iser_task *iser_task,
74− struct iser_data_buf *data,
7573 enum iser_data_dir iser_dir,
7674 enum dma_data_direction dma_dir)
7775 {
76+ struct iser_data_buf *data = &iser_task->data[iser_dir];
7877 struct ib_device *dev;
7978
8079 iser_task->dir[iser_dir] = 1;
@@ -85,17 +84,40 @@ int iser_dma_map_task_data(struct iscsi_iser_task *iser_task, · 4 unmodified lines
8584 iser_err("dma_map_sg failed!!!\n");
8685 return -EINVAL;
8786 }
87+
88+ if (scsi_prot_sg_count(iser_task->sc)) {
89+ struct iser_data_buf *pdata = &iser_task->prot[iser_dir];
90+
91+ pdata->dma_nents = ib_dma_map_sg(dev, pdata->sg, pdata->size, dma_dir);
92+ if (unlikely(pdata->dma_nents == 0)) {
93+ iser_err("protection dma_map_sg failed!!!\n");
94+ goto out_unmap;
95+ }
96+ }
97+
8898 return 0;
99+
100+out_unmap:
101+ ib_dma_unmap_sg(dev, data->sg, data->size, dma_dir);
102+ return -EINVAL;
89103 }
90104
105+
91106 void iser_dma_unmap_task_data(struct iscsi_iser_task *iser_task,
92− struct iser_data_buf *data,
93− enum dma_data_direction dir)
107+ enum iser_data_dir iser_dir,
108+ enum dma_data_direction dma_dir)
94109 {
110+ struct iser_data_buf *data = &iser_task->data[iser_dir];
95111 struct ib_device *dev;
96112
97113 dev = iser_task->iser_conn->ib_conn.device->ib_device;
98− ib_dma_unmap_sg(dev, data->sg, data->size, dir);
114+ ib_dma_unmap_sg(dev, data->sg, data->size, dma_dir);
115+
116+ if (scsi_prot_sg_count(iser_task->sc)) {
117+ struct iser_data_buf *pdata = &iser_task->prot[iser_dir];
118+
119+ ib_dma_unmap_sg(dev, pdata->sg, pdata->size, dma_dir);
120+ }
99121 }
100122
101123 static int iser_reg_dma(struct iser_device *device, struct iser_data_buf *mem,
@@ -130,7 +152,7 @@ void iser_unreg_mem_fastreg(struct iscsi_iser_task *iser_task, · 28 unmodified lines
130152 struct iser_fr_desc *desc;
131153 struct ib_mr_status mr_status;
132154
133− desc = reg->mem_h;
155+ desc = reg->desc;
134156 if (!desc)
135157 return;
136158
@@ -147,8 +169,8 @@ void iser_unreg_mem_fastreg(struct iscsi_iser_task *iser_task, · 10 unmodified lines
147169 ib_check_mr_status(desc->rsc.sig_mr, IB_MR_CHECK_SIG_STATUS,
148170 &mr_status);
149171 }
150− iser_reg_desc_put_fr(&iser_task->iser_conn->ib_conn, reg->mem_h);
151− reg->mem_h = NULL;
172+ iser_reg_desc_put_fr(&iser_task->iser_conn->ib_conn, reg->desc);
173+ reg->desc = NULL;
152174 }
153175
154176 static void iser_set_dif_domain(struct scsi_cmnd *sc,
@@ -327,40 +349,26 @@ static int iser_fast_reg_mr(struct iscsi_iser_task *iser_task, · 172 unmodified lines
327349 return 0;
328350 }
329351
330−static int iser_reg_data_sg(struct iscsi_iser_task *task,
331− struct iser_data_buf *mem,
332− struct iser_fr_desc *desc, bool use_dma_key,
333− struct iser_mem_reg *reg)
334−{
335− struct iser_device *device = task->iser_conn->ib_conn.device;
336−
337− if (use_dma_key)
338− return iser_reg_dma(device, mem, reg);
339−
340− return iser_fast_reg_mr(task, mem, &desc->rsc, reg);
341−}
342−
343352 int iser_reg_mem_fastreg(struct iscsi_iser_task *task,
344353 enum iser_data_dir dir,
345354 bool all_imm)
346355 {
347356 struct ib_conn *ib_conn = &task->iser_conn->ib_conn;
357+ struct iser_device *device = ib_conn->device;
348358 struct iser_data_buf *mem = &task->data[dir];
349359 struct iser_mem_reg *reg = &task->rdma_reg[dir];
350− struct iser_fr_desc *desc = NULL;
360+ struct iser_fr_desc *desc;
351361 bool use_dma_key;
352362 int err;
353363
354364 use_dma_key = mem->dma_nents == 1 && (all_imm || !iser_always_reg) &&
355365 scsi_get_prot_op(task->sc) == SCSI_PROT_NORMAL;
366+ if (use_dma_key)
367+ return iser_reg_dma(device, mem, reg);
356368
357− if (!use_dma_key) {
358− desc = iser_reg_desc_get_fr(ib_conn);
359− reg->mem_h = desc;
360− }
361−
369+ desc = iser_reg_desc_get_fr(ib_conn);
362370 if (scsi_get_prot_op(task->sc) == SCSI_PROT_NORMAL) {
363− err = iser_reg_data_sg(task, mem, desc, use_dma_key, reg);
371+ err = iser_fast_reg_mr(task, mem, &desc->rsc, reg);
364372 if (unlikely(err))
365373 goto err_reg;
366374 } else {
@@ -372,11 +380,12 @@ int iser_reg_mem_fastreg(struct iscsi_iser_task *task, · 5 unmodified lines
372380 desc->sig_protected = true;
373381 }
374382
383+ reg->desc = desc;
384+
375385 return 0;
376386
377387 err_reg:
378− if (desc)
379− iser_reg_desc_put_fr(ib_conn, desc);
388+ iser_reg_desc_put_fr(ib_conn, desc);
380389
381390 return err;
382391 }
drivers/infiniband/ulp/iser/iser_verbs.c+1−2
@@ -32,7 +32,6 @@ · 31 unmodified lines
3232 * SOFTWARE.
3333 */
3434 #include <linux/kernel.h>
35−#include <linux/module.h>
3635 #include <linux/slab.h>
3736 #include <linux/delay.h>
3837
@@ -905,7 +904,7 @@ u8 iser_check_task_pi_status(struct iscsi_iser_task *iser_task, · 866 unmodified lines
905904 enum iser_data_dir cmd_dir, sector_t *sector)
906905 {
907906 struct iser_mem_reg *reg = &iser_task->rdma_reg[cmd_dir];
908− struct iser_fr_desc *desc = reg->mem_h;
907+ struct iser_fr_desc *desc = reg->desc;
909908 unsigned long sector_size = iser_task->sc->device->sector_size;
910909 struct ib_mr_status mr_status;
911910 int ret;
drivers/infiniband/ulp/opa_vnic/opa_vnic_netdev.c+0−1
@@ -50,7 +50,6 @@ · 49 unmodified lines
5050 * netdev functionality.
5151 */
5252
53−#include <linux/module.h>
5453 #include <linux/if_vlan.h>
5554 #include <linux/crc32.h>
5655
drivers/infiniband/ulp/rtrs/rtrs-clt-sysfs.c+1−2
@@ -156,8 +156,7 @@ static DEVICE_ATTR_RW(mpath_policy); · 155 unmodified lines
156156 static ssize_t add_path_show(struct device *dev,
157157 struct device_attribute *attr, char *page)
158158 {
159− return sysfs_emit(
160− page,
159+ return sysfs_emit(page,
161160 "Usage: echo [<source addr>@]<destination addr> > %s\n\n*addr ::= [ ip:<ipv4|ipv6> | gid:<gid> ]\n",
162161 attr->attr.name);
163162 }
drivers/infiniband/ulp/rtrs/rtrs-clt.c+23−19
@@ -297,6 +297,7 @@ static bool rtrs_clt_change_state_from_to(struct rtrs_clt_path *clt_path, · 296 unmodified lines
297297 return changed;
298298 }
299299
300+static void rtrs_clt_stop_and_destroy_conns(struct rtrs_clt_path *clt_path);
300301 static void rtrs_rdma_error_recovery(struct rtrs_clt_con *con)
301302 {
302303 struct rtrs_clt_path *clt_path = to_clt_path(con->c.path);
@@ -304,16 +305,7 @@ static void rtrs_rdma_error_recovery(struct rtrs_clt_con *con) · 1 unmodified line
304305 if (rtrs_clt_change_state_from_to(clt_path,
305306 RTRS_CLT_CONNECTED,
306307 RTRS_CLT_RECONNECTING)) {
307− struct rtrs_clt_sess *clt = clt_path->clt;
308− unsigned int delay_ms;
309−
310− /*
311− * Normal scenario, reconnect if we were successfully connected
312− */
313− delay_ms = clt->reconnect_delay_sec * 1000;
314− queue_delayed_work(rtrs_wq, &clt_path->reconnect_dwork,
315− msecs_to_jiffies(delay_ms +
316− prandom_u32() % RTRS_RECONNECT_SEED));
308+ queue_work(rtrs_wq, &clt_path->err_recovery_work);
317309 } else {
318310 /*
319311 * Error can happen just on establishing new connection,
@@ -917,7 +909,7 @@ static inline void path_it_deinit(struct path_it *it) · 597 unmodified lines
917909 {
918910 struct list_head *skip, *tmp;
919911 /*
920− * The skip_list is used only for the MIN_INFLIGHT policy.
912+ * The skip_list is used only for the MIN_INFLIGHT and MIN_LATENCY policies.
921913 * We need to remove paths from it, so that next IO can insert
922914 * paths (->mp_skip_entry) into a skip_list again.
923915 */
@@ -1511,6 +1503,22 @@ static void rtrs_clt_init_hb(struct rtrs_clt_path *clt_path) · 587 unmodified lines
15111503 static void rtrs_clt_reconnect_work(struct work_struct *work);
15121504 static void rtrs_clt_close_work(struct work_struct *work);
15131505
1506+static void rtrs_clt_err_recovery_work(struct work_struct *work)
1507+{
1508+ struct rtrs_clt_path *clt_path;
1509+ struct rtrs_clt_sess *clt;
1510+ int delay_ms;
1511+
1512+ clt_path = container_of(work, struct rtrs_clt_path, err_recovery_work);
1513+ clt = clt_path->clt;
1514+ delay_ms = clt->reconnect_delay_sec * 1000;
1515+ rtrs_clt_stop_and_destroy_conns(clt_path);
1516+ queue_delayed_work(rtrs_wq, &clt_path->reconnect_dwork,
1517+ msecs_to_jiffies(delay_ms +
1518+ prandom_u32() %
1519+ RTRS_RECONNECT_SEED));
1520+}
1521+
15141522 static struct rtrs_clt_path *alloc_path(struct rtrs_clt_sess *clt,
15151523 const struct rtrs_addr *path,
15161524 size_t con_num, u32 nr_poll_queues)
@@ -1562,6 +1570,7 @@ static struct rtrs_clt_path *alloc_path(struct rtrs_clt_sess *clt, · 45 unmodified lines
15621570 clt_path->state = RTRS_CLT_CONNECTING;
15631571 atomic_set(&clt_path->connected_cnt, 0);
15641572 INIT_WORK(&clt_path->close_work, rtrs_clt_close_work);
1573+ INIT_WORK(&clt_path->err_recovery_work, rtrs_clt_err_recovery_work);
15651574 INIT_DELAYED_WORK(&clt_path->reconnect_dwork, rtrs_clt_reconnect_work);
15661575 rtrs_clt_init_hb(clt_path);
15671576
@@ -2326,6 +2335,7 @@ static void rtrs_clt_close_work(struct work_struct *work) · 758 unmodified lines
23262335
23272336 clt_path = container_of(work, struct rtrs_clt_path, close_work);
23282337
2338+ cancel_work_sync(&clt_path->err_recovery_work);
23292339 cancel_delayed_work_sync(&clt_path->reconnect_dwork);
23302340 rtrs_clt_stop_and_destroy_conns(clt_path);
23312341 rtrs_clt_change_state_get_old(clt_path, RTRS_CLT_CLOSED, NULL);
@@ -2638,7 +2648,6 @@ static void rtrs_clt_reconnect_work(struct work_struct *work) · 306 unmodified lines
26382648 {
26392649 struct rtrs_clt_path *clt_path;
26402650 struct rtrs_clt_sess *clt;
2641− unsigned int delay_ms;
26422651 int err;
26432652
26442653 clt_path = container_of(to_delayed_work(work), struct rtrs_clt_path,
@@ -2655,8 +2664,6 @@ static void rtrs_clt_reconnect_work(struct work_struct *work) · 10 unmodified lines
26552664 }
26562665 clt_path->reconnect_attempts++;
26572666
2658− /* Stop everything */
2659− rtrs_clt_stop_and_destroy_conns(clt_path);
26602667 msleep(RTRS_RECONNECT_BACKOFF);
26612668 if (rtrs_clt_change_state_get_old(clt_path, RTRS_CLT_CONNECTING, NULL)) {
26622669 err = init_path(clt_path);
@@ -2669,11 +2676,7 @@ static void rtrs_clt_reconnect_work(struct work_struct *work) · 6 unmodified lines
26692676 reconnect_again:
26702677 if (rtrs_clt_change_state_get_old(clt_path, RTRS_CLT_RECONNECTING, NULL)) {
26712678 clt_path->stats->reconnects.fail_cnt++;
2672− delay_ms = clt->reconnect_delay_sec * 1000;
2673− queue_delayed_work(rtrs_wq, &clt_path->reconnect_dwork,
2674− msecs_to_jiffies(delay_ms +
2675− prandom_u32() %
2676− RTRS_RECONNECT_SEED));
2679+ queue_work(rtrs_wq, &clt_path->err_recovery_work);
26772680 }
26782681 }
26792682
@@ -2908,6 +2911,7 @@ int rtrs_clt_reconnect_from_sysfs(struct rtrs_clt_path *clt_path) · 228 unmodified lines
29082911 &old_state);
29092912 if (changed) {
29102913 clt_path->reconnect_attempts = 0;
2914+ rtrs_clt_stop_and_destroy_conns(clt_path);
29112915 queue_delayed_work(rtrs_wq, &clt_path->reconnect_dwork, 0);
29122916 }
29132917 if (changed || old_state == RTRS_CLT_RECONNECTING) {
drivers/infiniband/ulp/rtrs/rtrs-clt.h+1−0
@@ -134,6 +134,7 @@ struct rtrs_clt_path { · 133 unmodified lines
134134 struct rtrs_clt_io_req *reqs;
135135 struct delayed_work reconnect_dwork;
136136 struct work_struct close_work;
137+ struct work_struct err_recovery_work;
137138 unsigned int reconnect_attempts;
138139 bool established;
139140 struct rtrs_rbuf *rbufs;
drivers/infiniband/ulp/rtrs/rtrs.c+0−1
@@ -479,7 +479,6 @@ static int rtrs_str_to_sockaddr(const char *addr, size_t len, · 478 unmodified lines
479479 */
480480 int sockaddr_to_str(const struct sockaddr *addr, char *buf, size_t len)
481481 {
482−
483482 switch (addr->sa_family) {
484483 case AF_IB:
485484 return scnprintf(buf, len, "gid:%pI6",
drivers/infiniband/ulp/srp/ib_srp.h+10−1
@@ -92,6 +92,9 @@ enum srp_iu_type { · 91 unmodified lines
9292 };
9393
9494 /*
95+ * RDMA adapter in the initiator system.
96+ *
97+ * @dev_list: List of RDMA ports associated with this RDMA adapter (srp_host).
9598 * @mr_page_mask: HCA memory registration page mask.
9699 * @mr_page_size: HCA memory registration page size.
97100 * @mr_max_size: Maximum size in bytes of a single FR registration request.
@@ -109,6 +112,12 @@ struct srp_device { · 11 unmodified lines
109112 bool use_fast_reg;
110113 };
111114
115+/*
116+ * One port of an RDMA adapter in the initiator system.
117+ *
118+ * @target_list: List of connected target ports (struct srp_target_port).
119+ * @target_lock: Protects @target_list.
120+ */
112121 struct srp_host {
113122 struct srp_device *srp_dev;
114123 u8 port;
@@ -183,7 +192,7 @@ struct srp_rdma_ch { · 68 unmodified lines
183192 };
184193
185194 /**
186− * struct srp_target_port
195+ * struct srp_target_port - RDMA port in the SRP target system
187196 * @comp_vector: Completion vector used by the first RDMA channel created for
188197 * this target port.
189198 */

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