Merge tag 'kvmarm-for-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD

kvmarm updates for 4.11 - GICv3 save restore - Cache flushing fixes - MSI injection fix for GICv3 ITS - Physical timer emulation support

Paolo Bonzini committed 9 years ago

Commit 2e751df2 parents a0e136d 7b6b463295 files · +3818 −1399Browse files

Unified · Split

295 files

Documentation/devicetree/bindings/mtd/tango-nand.txt +3 −3
Documentation/devicetree/bindings/net/ti,dp83867.txt +4 −2
Documentation/devicetree/bindings/spi/sh-msiof.txt +13 −6
Documentation/virtual/kvm/devices/arm-vgic-v3.txt +8 −3
MAINTAINERS +9 −2
Makefile +2 −2
arch/arc/Kconfig +1 −1
arch/arc/include/asm/cache.h +5 −4
arch/arc/include/asm/entry-arcv2.h +2 −0
arch/arc/include/asm/module.h +2 −2
arch/arc/include/asm/ptrace.h +1 −1
arch/arc/include/asm/setup.h +1 −0
arch/arc/kernel/intc-arcv2.c +3 −3
arch/arc/kernel/intc-compact.c +2 −2
arch/arc/kernel/mcip.c +4 −0
arch/arc/kernel/module.c +3 −1
arch/arc/mm/cache.c +122 −33
arch/arc/mm/init.c +5 −0
arch/arm/boot/dts/Makefile +1 −0
arch/arm/boot/dts/am335x-icev2.dts +0 −1
arch/arm/boot/dts/bcm-nsp.dtsi +1 −1
arch/arm/boot/dts/da850-evm.dts +1 −0
arch/arm/boot/dts/dra7.dtsi +1 −0
arch/arm/boot/dts/dra72-evm-revc.dts +1 −1
arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi +2 −2
arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi +2 −2
arch/arm/boot/dts/logicpd-som-lv-37xx-devkit.dts +3 −8
arch/arm/boot/dts/omap5.dtsi +1 −0
arch/arm/boot/dts/qcom-mdm9615.dtsi +1 −1
arch/arm/boot/dts/sun6i-a31-hummingbird.dts +4 −0
arch/arm/boot/dts/sun6i-a31.dtsi +1 −0
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts +1 −1
arch/arm/configs/multi_v7_defconfig +2 −2
arch/arm/configs/s3c2410_defconfig +3 −3
arch/arm/include/asm/cputype.h +3 −0
arch/arm/include/asm/ftrace.h +18 −0
arch/arm/include/asm/kvm_host.h +0 −3
arch/arm/include/asm/kvm_mmu.h +2 −10
arch/arm/include/asm/virt.h +5 −0
arch/arm/include/uapi/asm/kvm.h +13 −0
arch/arm/include/uapi/asm/types.h +3 −3
arch/arm/kernel/hw_breakpoint.c +16 −0
arch/arm/kernel/smp_tlb.c +7 −0
arch/arm/kvm/Makefile +3 −2
arch/arm/kvm/arm.c +5 −2
arch/arm/kvm/mmu.c +4 −16
arch/arm/kvm/reset.c +8 −1
arch/arm/kvm/vgic-v3-coproc.c +35 −0
arch/arm/mach-omap1/dma.c +7 −9
arch/arm/mach-omap2/pdata-quirks.c +1 −1
arch/arm/mach-ux500/pm.c +2 −2
arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +4 −0
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +1 −1
arch/arm64/boot/dts/exynos/exynos5433.dtsi +1 −1
arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts +1 −1
arch/arm64/boot/dts/xilinx/zynqmp.dtsi +3 −3
arch/arm64/include/asm/kvm_host.h +0 −3
arch/arm64/include/asm/kvm_mmu.h +2 −4
arch/arm64/include/asm/memory.h +1 −1
arch/arm64/include/asm/virt.h +9 −0
arch/arm64/include/uapi/asm/kvm.h +13 −0
arch/arm64/include/uapi/asm/ptrace.h +1 −0
arch/arm64/kernel/entry.S +1 −1
arch/arm64/kernel/ptrace.c +11 −5
arch/arm64/kernel/traps.c +24 −4
arch/arm64/kvm/Makefile +3 −1
arch/arm64/kvm/reset.c +8 −1
arch/arm64/kvm/sys_regs.c +81 −11
arch/arm64/kvm/sys_regs.h +4 −0
arch/arm64/kvm/vgic-sys-reg-v3.c +346 −0
arch/arm64/mm/init.c +2 −0
arch/powerpc/include/asm/book3s/64/hash-4k.h +3 −2
arch/powerpc/include/asm/book3s/64/hash.h +4 −0
arch/powerpc/include/asm/hugetlb.h +8 −6
arch/powerpc/include/asm/nohash/pgtable.h +3 −2
arch/powerpc/include/asm/page.h +0 −3
arch/powerpc/include/asm/perf_event_server.h +1 −0
arch/powerpc/include/asm/pgtable-be-types.h +8 −0
arch/powerpc/include/asm/pgtable-types.h +7 −0
arch/powerpc/include/asm/ppc-opcode.h +5 −5
arch/powerpc/kernel/eeh.c +9 −1
arch/powerpc/kernel/ptrace.c +14 −0
arch/powerpc/mm/hash_utils_64.c +2 −2
arch/powerpc/mm/hugetlbpage-hash64.c +4 −1
arch/powerpc/mm/hugetlbpage.c +12 −19
arch/powerpc/mm/init-common.c +5 −8
arch/powerpc/mm/pgtable-book3s64.c +18 −0
arch/powerpc/perf/core-book3s.c +2 −0
arch/powerpc/perf/power9-events-list.h +1 −1
arch/powerpc/perf/power9-pmu.c +1 −1
arch/powerpc/sysdev/xics/icp-opal.c +24 −7
arch/s390/configs/default_defconfig +13 −14
arch/s390/configs/gcov_defconfig +30 −20
arch/s390/configs/performance_defconfig +21 −12
arch/s390/defconfig +3 −2
arch/s390/include/asm/ctl_reg.h +3 −1
arch/x86/events/amd/ibs.c +1 −1
arch/x86/events/intel/core.c +5 −2
arch/x86/kernel/apic/io_apic.c +2 −0
arch/x86/kvm/x86.c +2 −1
arch/x86/pci/acpi.c +10 −0
block/blk-mq.c +0 −1
drivers/block/nbd.c +2 −4
drivers/char/virtio_console.c +1 −1
drivers/clk/samsung/clk-exynos5420.c +7 −7
drivers/clocksource/exynos_mct.c +1 −0
drivers/hid/hid-corsair.c +45 −15
drivers/hid/wacom_sys.c +8 −8
drivers/hid/wacom_wac.c +10 −0
drivers/mmc/core/mmc_ops.c +12 −13
drivers/mmc/host/meson-gx-mmc.c +5 −3
drivers/mmc/host/mxs-mmc.c +4 −2
drivers/mmc/host/sdhci-acpi.c +2 −1
drivers/mtd/nand/Kconfig +2 −1
drivers/mtd/nand/lpc32xx_mlc.c +1 −1
drivers/mtd/nand/tango_nand.c +3 −1
drivers/mtd/nand/xway_nand.c +1 −4
drivers/net/ethernet/broadcom/bcmsysport.c +18 −7
drivers/net/ethernet/cavium/thunder/thunder_bgx.c +6 −5
drivers/net/ethernet/emulex/benet/be_cmds.c +1 −1
drivers/net/ethernet/emulex/benet/be_main.c +15 −3
drivers/net/ethernet/mellanox/mlx4/cq.c +20 −18
drivers/net/ethernet/mellanox/mlx4/en_netdev.c +4 −1
drivers/net/ethernet/mellanox/mlx4/eq.c +14 −9
drivers/net/ethernet/mellanox/mlx4/resource_tracker.c +3 −2
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c +7 −4
drivers/net/ethernet/mellanox/mlxsw/pci_hw.h +4 −4
drivers/net/ethernet/mellanox/mlxsw/spectrum.c +1 −0
drivers/net/ethernet/mellanox/mlxsw/switchx2.c +1 −0
drivers/net/ethernet/qualcomm/emac/emac-phy.c +7 −0
drivers/net/ethernet/qualcomm/emac/emac.c +2 −4
drivers/net/ethernet/renesas/ravb_main.c +15 −6
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +10 −9
drivers/net/ethernet/ti/cpmac.c +1 −1
drivers/net/hyperv/netvsc_drv.c +3 −0
drivers/net/ieee802154/at86rf230.c +2 −2
drivers/net/ieee802154/atusb.c +43 −16
drivers/net/phy/dp83867.c +6 −2
drivers/net/usb/r8152.c +6 −1
drivers/net/vxlan.c +10 −3
drivers/nvdimm/namespace_devs.c +10 −13
drivers/nvdimm/pmem.c +3 −1
drivers/pci/host/pci-xgene-msi.c +1 −1
drivers/pci/host/pcie-designware.c +5 −5
drivers/pci/probe.c +7 −5
drivers/s390/virtio/virtio_ccw.c +27 −2
drivers/scsi/bfa/bfad_bsg.c +1 −1
drivers/scsi/ibmvscsi_tgt/ibmvscsi_tgt.c +4 −3
drivers/scsi/lpfc/lpfc_els.c +2 −0
drivers/scsi/lpfc/lpfc_sli.c +7 −0
drivers/scsi/mpt3sas/mpt3sas_base.h +12 −0
drivers/scsi/mpt3sas/mpt3sas_scsih.c +26 −14
drivers/scsi/qla2xxx/qla_attr.c +14 −7
drivers/scsi/qla2xxx/qla_def.h +3 −3
drivers/scsi/qla2xxx/qla_init.c +2 −2
drivers/scsi/qla2xxx/qla_isr.c +15 −77
drivers/scsi/qla2xxx/qla_mbx.c +24 −13
drivers/scsi/qla2xxx/qla_nx.c +5 −0
drivers/scsi/qla2xxx/qla_nx.h +1 −2
drivers/scsi/qla2xxx/qla_nx2.c +17 −0
drivers/scsi/qla2xxx/qla_nx2.h +0 −17
drivers/scsi/qla2xxx/qla_os.c +13 −5
drivers/scsi/qla2xxx/qla_target.c +39 −18
drivers/scsi/qla2xxx/qla_target.h +21 −1
drivers/scsi/qla2xxx/qla_tmpl.c +24 −0
drivers/scsi/qla2xxx/tcm_qla2xxx.c +2 −2
drivers/scsi/qla2xxx/tcm_qla2xxx.h +0 −1
drivers/scsi/sd.c +16 −7
drivers/scsi/ses.c +1 −1
drivers/soc/ti/wkup_m3_ipc.c +1 −0
drivers/spi/Kconfig +1 −0
drivers/spi/spi-armada-3700.c +6 −5
drivers/spi/spi-axi-spi-engine.c +2 −1
drivers/spi/spi-davinci.c +2 −2
drivers/spi/spi-dw-mid.c +2 −2
drivers/spi/spi-dw.c +4 −1
drivers/spi/spi-pxa2xx.c +1 −0
drivers/spi/spi-sh-msiof.c +3 −1
drivers/thermal/rockchip_thermal.c +100 −53
drivers/thermal/thermal_core.c +5 −5
drivers/thermal/thermal_hwmon.c +3 −17
drivers/usb/dwc2/core.h +2 −2
drivers/usb/dwc2/gadget.c +5 −13
drivers/usb/dwc2/hcd.c +5 −2
drivers/usb/dwc2/params.c +5 −5
drivers/usb/dwc3/dwc3-exynos.c +3 −1
drivers/usb/gadget/composite.c +1 −1
drivers/usb/gadget/function/f_fs.c +6 −6
drivers/usb/gadget/udc/atmel_usba_udc.c +2 −1
drivers/usb/gadget/udc/atmel_usba_udc.h +1 −0
drivers/usb/host/xhci-plat.c +1 −1
drivers/vhost/scsi.c +2 −2
drivers/xen/platform-pci.c +71 −0
fs/ceph/caps.c +6 −1
fs/ceph/dir.c +3 −2
fs/ceph/inode.c +2 −1
fs/ceph/mds_client.c +5 −4
fs/fuse/dev.c +2 −1
fs/fuse/dir.c +1 −1
fs/nfs/nfs4proc.c +18 −11
fs/nfs/nfs4state.c +0 −1
fs/nfsd/nfs4xdr.c +3 −1
fs/overlayfs/namei.c +18 −9
fs/ubifs/Kconfig +1 −1
fs/ubifs/dir.c +3 −55
fs/ubifs/ioctl.c +3 −0
fs/ubifs/journal.c +2 −0
fs/ubifs/tnc.c +23 −2
fs/xfs/libxfs/xfs_dir2.c +24 −15
fs/xfs/libxfs/xfs_dir2.h +5 −3
fs/xfs/libxfs/xfs_inode_buf.c +8 −2
fs/xfs/xfs_dquot.c +4 −0
fs/xfs/xfs_iops.c +40 −10
fs/xfs/xfs_linux.h +3 −3
include/kvm/arm_arch_timer.h +22 −18
include/kvm/arm_vgic.h +16 −2
include/linux/bpf.h +1 −1
include/linux/cpuhotplug.h +2 −0
include/linux/filter.h +4 −2
include/linux/irqchip/arm-gic-v3.h +41 −4
include/linux/kernel.h +2 −2
include/linux/kvm_host.h +0 −1
include/linux/rcupdate.h +4 −0
include/linux/sunrpc/svc_xprt.h +1 −0
include/linux/tcp.h +6 −1
include/scsi/libfc.h +3 −3
include/uapi/linux/nl80211.h +3 −1
include/uapi/linux/pkt_cls.h +1 −1
include/uapi/linux/tc_act/tc_bpf.h +1 −1
kernel/bpf/core.c +8 −6
kernel/bpf/syscall.c +4 −4
kernel/bpf/verifier.c +1 −1
kernel/cpu.c +18 −6
kernel/module.c +1 −1
kernel/panic.c +1 −1
kernel/rcu/rcu.h +1 −0
kernel/rcu/tiny.c +0 −4
kernel/rcu/tiny_plugin.h +7 −2
kernel/rcu/tree.c +20 −13
kernel/rcu/tree_exp.h +41 −11
kernel/rcu/tree_plugin.h +1 −1
kernel/rcu/update.c +30 −8
lib/swiotlb.c +3 −3
net/ax25/ax25_subr.c +1 −1
net/ceph/crypto.c +1 −1
net/ipv4/fib_semantics.c +7 −4
net/ipv4/route.c +1 −1
net/ipv4/tcp_fastopen.c +1 −1
net/ipv6/ip6_tunnel.c +2 −2
net/ipv6/mcast.c +30 −21
net/ipv6/route.c +2 −1
net/ipv6/seg6_hmac.c +1 −1
net/ipv6/seg6_iptunnel.c +4 −0
net/mac80211/chan.c +0 −3
net/mac80211/iface.c +21 −0
net/mac80211/main.c +9 −4
net/mac80211/rate.c +2 −0
net/mac80211/rx.c +21 −17
net/mac80211/sta_info.c +2 −2
net/mac80211/tx.c +7 −10
net/mac80211/vht.c +3 −1
net/openvswitch/conntrack.c +4 −2
net/sched/act_api.c +2 −3
net/sched/act_bpf.c +2 −3
net/sched/cls_bpf.c +2 −2
net/sunrpc/auth_gss/svcauth_gss.c +1 −1
net/sunrpc/svc_xprt.c +7 −3
net/sunrpc/xprtrdma/svc_rdma_recvfrom.c +0 −2
net/tipc/discover.c +2 −2
net/tipc/link.c +1 −1
net/tipc/msg.c +8 −8
net/tipc/msg.h +1 −1
net/tipc/name_distr.c +1 −1
net/wireless/nl80211.c +15 −0
tools/perf/util/probe-event.c +62 −33
tools/perf/util/probe-finder.c +7 −8
tools/perf/util/probe-finder.h +3 −0
tools/testing/selftests/powerpc/pmu/ebb/pmc56_overflow_test.c +1 −1
tools/virtio/ringtest/main.h +12 −0
tools/virtio/ringtest/run-on-all.sh +3 −2
virt/kvm/arm/arch_timer.c +159 −62
virt/kvm/arm/hyp/timer-sr.c +28 −18
virt/kvm/arm/vgic/vgic-debug.c +283 −0
virt/kvm/arm/vgic/vgic-init.c +17 −5
virt/kvm/arm/vgic/vgic-irqfd.c +3 −0
virt/kvm/arm/vgic/vgic-its.c +3 −3
virt/kvm/arm/vgic/vgic-kvm-device.c +216 −15
virt/kvm/arm/vgic/vgic-mmio-v2.c +24 −63
virt/kvm/arm/vgic/vgic-mmio-v3.c +184 −19
virt/kvm/arm/vgic/vgic-mmio.c +147 −20
virt/kvm/arm/vgic/vgic-mmio.h +24 −0
virt/kvm/arm/vgic/vgic-v2.c +5 −9
virt/kvm/arm/vgic/vgic-v3.c +31 −11
virt/kvm/arm/vgic/vgic.c +23 −43
virt/kvm/arm/vgic/vgic.h +82 −1

Documentation/devicetree/bindings/mtd/tango-nand.txt+3−3

@@ -5,7 +5,7 @@ Required properties: · 4 unmodified lines
5	5	- compatible: "sigma,smp8758-nand"
6	6	- reg: address/size of nfc_reg, nfc_mem, and pbus_reg
7	7	- dmas: reference to the DMA channel used by the controller
8		−- dma-names: "nfc_sbox"
	8	+- dma-names: "rxtx"
9	9	- clocks: reference to the system clock
10	10	- #address-cells: <1>
11	11	- #size-cells: <0>
@@ -17,9 +17,9 @@ Example: · 5 unmodified lines
17	17
18	18	nandc: nand-controller@2c000 {
19	19	compatible = "sigma,smp8758-nand";
20		− reg = <0x2c000 0x30 0x2d000 0x800 0x20000 0x1000>;
	20	+ reg = <0x2c000 0x30>, <0x2d000 0x800>, <0x20000 0x1000>;
21	21	dmas = <&dma0 3>;
22		− dma-names = "nfc_sbox";
	22	+ dma-names = "rxtx";
23	23	clocks = <&clkgen SYS_CLK>;
24	24	#address-cells = <1>;
25	25	#size-cells = <0>;

Documentation/devicetree/bindings/net/ti,dp83867.txt+4−2

@@ -3,9 +3,11 @@ · 2 unmodified lines
3	3	Required properties:
4	4	- reg - The ID number for the phy, usually a small integer
5	5	- ti,rx-internal-delay - RGMII Receive Clock Delay - see dt-bindings/net/ti-dp83867.h
6		− for applicable values
	6	+ for applicable values. Required only if interface type is
	7	+ PHY_INTERFACE_MODE_RGMII_ID or PHY_INTERFACE_MODE_RGMII_RXID
7	8	- ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
8		− for applicable values
	9	+ for applicable values. Required only if interface type is
	10	+ PHY_INTERFACE_MODE_RGMII_ID or PHY_INTERFACE_MODE_RGMII_TXID
9	11	- ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h
10	12	for applicable values
11	13

Documentation/devicetree/bindings/spi/sh-msiof.txt+13−6

@@ -1,17 +1,23 @@
1	1	Renesas MSIOF spi controller
2	2
3	3	Required properties:
4		−- compatible : "renesas,msiof-<soctype>" for SoCs,
5		− "renesas,sh-msiof" for SuperH, or
6		− "renesas,sh-mobile-msiof" for SH Mobile series.
7		− Examples with soctypes are:
8		− "renesas,msiof-r8a7790" (R-Car H2)
	4	+- compatible : "renesas,msiof-r8a7790" (R-Car H2)
9	5	"renesas,msiof-r8a7791" (R-Car M2-W)
10	6	"renesas,msiof-r8a7792" (R-Car V2H)
11	7	"renesas,msiof-r8a7793" (R-Car M2-N)
12	8	"renesas,msiof-r8a7794" (R-Car E2)
13	9	"renesas,msiof-r8a7796" (R-Car M3-W)
14	10	"renesas,msiof-sh73a0" (SH-Mobile AG5)
	11	+ "renesas,sh-mobile-msiof" (generic SH-Mobile compatibile device)
	12	+ "renesas,rcar-gen2-msiof" (generic R-Car Gen2 compatible device)
	13	+ "renesas,rcar-gen3-msiof" (generic R-Car Gen3 compatible device)
	14	+ "renesas,sh-msiof" (deprecated)
	15	+
	16	+ When compatible with the generic version, nodes
	17	+ must list the SoC-specific version corresponding
	18	+ to the platform first followed by the generic
	19	+ version.
	20	+
15	21	- reg : A list of offsets and lengths of the register sets for
16	22	the device.
17	23	If only one register set is present, it is to be used
@@ -61,7 +67,8 @@ Documentation/devicetree/bindings/pinctrl/renesas,*. · 43 unmodified lines
61	67	Example:
62	68
63	69	msiof0: spi@e6e20000 {
64		− compatible = "renesas,msiof-r8a7791";
	70	+ compatible = "renesas,msiof-r8a7791",
	71	+ "renesas,rcar-gen2-msiof";
65	72	reg = <0 0xe6e20000 0 0x0064>;
66	73	interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
67	74	clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;

Documentation/virtual/kvm/devices/arm-vgic-v3.txt+8−3

@@ -118,7 +118,7 @@ Groups: · 117 unmodified lines
118	118	-EBUSY: One or more VCPUs are running
119	119
120	120
121		− KVM_DEV_ARM_VGIC_CPU_SYSREGS
	121	+ KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS
122	122	Attributes:
123	123	The attr field of kvm_device_attr encodes two values:
124	124	bits: \| 63 .... 32 \| 31 .... 16 \| 15 .... 0 \|
@@ -139,13 +139,15 @@ Groups: · 14 unmodified lines
139	139	All system regs accessed through this API are (rw, 64-bit) and
140	140	kvm_device_attr.addr points to a __u64 value.
141	141
142		− KVM_DEV_ARM_VGIC_CPU_SYSREGS accesses the CPU interface registers for the
	142	+ KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS accesses the CPU interface registers for the
143	143	CPU specified by the mpidr field.
144	144
	145	+ CPU interface registers access is not implemented for AArch32 mode.
	146	+ Error -ENXIO is returned when accessed in AArch32 mode.
145	147	Errors:
146	148	-ENXIO: Getting or setting this register is not yet supported
147	149	-EBUSY: VCPU is running
148		− -EINVAL: Invalid mpidr supplied
	150	+ -EINVAL: Invalid mpidr or register value supplied
149	151
150	152
151	153	KVM_DEV_ARM_VGIC_GRP_NR_IRQS
@@ -204,3 +206,6 @@ Groups: · 52 unmodified lines
204	206	architecture defined MPIDR, and the field is encoded as follows:
205	207	\| 63 .... 56 \| 55 .... 48 \| 47 .... 40 \| 39 .... 32 \|
206	208	\| Aff3 \| Aff2 \| Aff1 \| Aff0 \|
	209	+ Errors:
	210	+ -EINVAL: vINTID is not multiple of 32 or
	211	+ info field is not VGIC_LEVEL_INFO_LINE_LEVEL

MAINTAINERS+9−2

@@ -976,6 +976,7 @@ M: Russell King <linux@armlinux.org.uk> · 975 unmodified lines
976	976	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
977	977	W: http://www.armlinux.org.uk/
978	978	S: Maintained
	979	+T: git git://git.armlinux.org.uk/~rmk/linux-arm.git
979	980	F: arch/arm/
980	981
981	982	ARM SUB-ARCHITECTURES
@@ -1153,6 +1154,7 @@ ARM/CLKDEV SUPPORT · 171 unmodified lines
1153	1154	M: Russell King <linux@armlinux.org.uk>
1154	1155	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1155	1156	S: Maintained
	1157	+T: git git://git.armlinux.org.uk/~rmk/linux-arm.git clkdev
1156	1158	F: arch/arm/include/asm/clkdev.h
1157	1159	F: drivers/clk/clkdev.c
1158	1160
@@ -1688,6 +1690,7 @@ M: Krzysztof Kozlowski <krzk@kernel.org> · 529 unmodified lines
1688	1690	R: Javier Martinez Canillas <javier@osg.samsung.com>
1689	1691	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1690	1692	L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
	1693	+Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/
1691	1694	S: Maintained
1692	1695	F: arch/arm/boot/dts/s3c*
1693	1696	F: arch/arm/boot/dts/s5p*
@@ -7697,8 +7700,10 @@ F: drivers/net/dsa/mv88e6xxx/ · 6003 unmodified lines
7697	7700	F: Documentation/devicetree/bindings/net/dsa/marvell.txt
7698	7701
7699	7702	MARVELL ARMADA DRM SUPPORT
7700		−M: Russell King <rmk+kernel@armlinux.org.uk>
	7703	+M: Russell King <linux@armlinux.org.uk>
7701	7704	S: Maintained
	7705	+T: git git://git.armlinux.org.uk/~rmk/linux-arm.git drm-armada-devel
	7706	+T: git git://git.armlinux.org.uk/~rmk/linux-arm.git drm-armada-fixes
7702	7707	F: drivers/gpu/drm/armada/
7703	7708	F: include/uapi/drm/armada_drm.h
7704	7709	F: Documentation/devicetree/bindings/display/armada/
@@ -8903,8 +8908,10 @@ S: Supported · 1198 unmodified lines
8903	8908	F: drivers/nfc/nxp-nci
8904	8909
8905	8910	NXP TDA998X DRM DRIVER
8906		−M: Russell King <rmk+kernel@armlinux.org.uk>
	8911	+M: Russell King <linux@armlinux.org.uk>
8907	8912	S: Supported
	8913	+T: git git://git.armlinux.org.uk/~rmk/linux-arm.git drm-tda998x-devel
	8914	+T: git git://git.armlinux.org.uk/~rmk/linux-arm.git drm-tda998x-fixes
8908	8915	F: drivers/gpu/drm/i2c/tda998x_drv.c
8909	8916	F: include/drm/i2c/tda998x.h
8910	8917

Makefile+2−2

@@ -1,8 +1,8 @@
1	1	VERSION = 4
2	2	PATCHLEVEL = 10
3	3	SUBLEVEL = 0
4		−EXTRAVERSION = -rc4
5		−NAME = Roaring Lionus
	4	+EXTRAVERSION = -rc5
	5	+NAME = Anniversary Edition
6	6
7	7	# DOCUMENTATION
8	8	# To see a list of typical targets execute "make help"

arch/arc/Kconfig+1−1

@@ -29,7 +29,7 @@ config ARC · 28 unmodified lines
29	29	select HAVE_KPROBES
30	30	select HAVE_KRETPROBES
31	31	select HAVE_MEMBLOCK
32		− select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
	32	+ select HAVE_MOD_ARCH_SPECIFIC
33	33	select HAVE_OPROFILE
34	34	select HAVE_PERF_EVENTS
35	35	select HANDLE_DOMAIN_IRQ

arch/arc/include/asm/cache.h+5−4

@@ -67,7 +67,7 @@ extern unsigned long perip_base, perip_end; · 66 unmodified lines
67	67	#define ARC_REG_IC_PTAG_HI 0x1F
68	68
69	69	/* Bit val in IC_CTRL */
70		−#define IC_CTRL_CACHE_DISABLE 0x1
	70	+#define IC_CTRL_DIS 0x1
71	71
72	72	/* Data cache related Auxiliary registers */
73	73	#define ARC_REG_DC_BCR 0x72 /* Build Config reg */
@@ -80,8 +80,9 @@ extern unsigned long perip_base, perip_end; · 6 unmodified lines
80	80	#define ARC_REG_DC_PTAG_HI 0x5F
81	81
82	82	/* Bit val in DC_CTRL */
83		−#define DC_CTRL_INV_MODE_FLUSH 0x40
84		−#define DC_CTRL_FLUSH_STATUS 0x100
	83	+#define DC_CTRL_DIS 0x001
	84	+#define DC_CTRL_INV_MODE_FLUSH 0x040
	85	+#define DC_CTRL_FLUSH_STATUS 0x100
85	86
86	87	/System-level cache (L2 cache) related Auxiliary registers /
87	88	#define ARC_REG_SLC_CFG 0x901
@@ -92,8 +93,8 @@ extern unsigned long perip_base, perip_end; · 4 unmodified lines
92	93	#define ARC_REG_SLC_RGN_END 0x916
93	94
94	95	/* Bit val in SLC_CONTROL */
	96	+#define SLC_CTRL_DIS 0x001
95	97	#define SLC_CTRL_IM 0x040
96		−#define SLC_CTRL_DISABLE 0x001
97	98	#define SLC_CTRL_BUSY 0x100
98	99	#define SLC_CTRL_RGN_OP_INV 0x200
99	100

arch/arc/include/asm/entry-arcv2.h+2−0

@@ -16,6 +16,7 @@ · 15 unmodified lines
16	16	;
17	17	; Now manually save: r12, sp, fp, gp, r25
18	18
	19	+ PUSH r30
19	20	PUSH r12
20	21
21	22	; Saving pt_regs->sp correctly requires some extra work due to the way
@@ -72,6 +73,7 @@ · 50 unmodified lines
72	73	POPAX AUX_USER_SP
73	74	1:
74	75	POP r12
	76	+ POP r30
75	77
76	78	.endm
77	79

arch/arc/include/asm/module.h+2−2

@@ -14,13 +14,13 @@ · 13 unmodified lines
14	14
15	15	#include <asm-generic/module.h>
16	16
17		−#ifdef CONFIG_ARC_DW2_UNWIND
18	17	struct mod_arch_specific {
	18	+#ifdef CONFIG_ARC_DW2_UNWIND
19	19	void *unw_info;
20	20	int unw_sec_idx;
	21	+#endif
21	22	const char *secstr;
22	23	};
23		−#endif
24	24
25	25	#define MODULE_PROC_FAMILY "ARC700"
26	26

arch/arc/include/asm/ptrace.h+1−1

@@ -84,7 +84,7 @@ struct pt_regs { · 83 unmodified lines
84	84	unsigned long fp;
85	85	unsigned long sp; /* user/kernel sp depending on where we came from */
86	86
87		− unsigned long r12;
	87	+ unsigned long r12, r30;
88	88
89	89	/------- Below list auto saved by h/w -----------/
90	90	unsigned long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11;

arch/arc/include/asm/setup.h+1−0

@@ -31,6 +31,7 @@ extern int root_mountflags, end_mem; · 30 unmodified lines
31	31
32	32	void setup_processor(void);
33	33	void __init setup_arch_memory(void);
	34	+long __init arc_get_mem_sz(void);
34	35
35	36	/* Helpers used in arc__mumbojumbo routines /
36	37	#define IS_AVAIL1(v, s) ((v) ? s : "")

arch/arc/kernel/intc-arcv2.c+3−3

@@ -77,20 +77,20 @@ void arc_init_IRQ(void) · 76 unmodified lines
77	77
78	78	static void arcv2_irq_mask(struct irq_data *data)
79	79	{
80		− write_aux_reg(AUX_IRQ_SELECT, data->irq);
	80	+ write_aux_reg(AUX_IRQ_SELECT, data->hwirq);
81	81	write_aux_reg(AUX_IRQ_ENABLE, 0);
82	82	}
83	83
84	84	static void arcv2_irq_unmask(struct irq_data *data)
85	85	{
86		− write_aux_reg(AUX_IRQ_SELECT, data->irq);
	86	+ write_aux_reg(AUX_IRQ_SELECT, data->hwirq);
87	87	write_aux_reg(AUX_IRQ_ENABLE, 1);
88	88	}
89	89
90	90	void arcv2_irq_enable(struct irq_data *data)
91	91	{
92	92	/* set default priority */
93		− write_aux_reg(AUX_IRQ_SELECT, data->irq);
	93	+ write_aux_reg(AUX_IRQ_SELECT, data->hwirq);
94	94	write_aux_reg(AUX_IRQ_PRIORITY, ARCV2_IRQ_DEF_PRIO);
95	95
96	96	/*

arch/arc/kernel/intc-compact.c+2−2

@@ -57,7 +57,7 @@ static void arc_irq_mask(struct irq_data *data) · 56 unmodified lines
57	57	unsigned int ienb;
58	58
59	59	ienb = read_aux_reg(AUX_IENABLE);
60		− ienb &= ~(1 << data->irq);
	60	+ ienb &= ~(1 << data->hwirq);
61	61	write_aux_reg(AUX_IENABLE, ienb);
62	62	}
63	63
@@ -66,7 +66,7 @@ static void arc_irq_unmask(struct irq_data *data) · 2 unmodified lines
66	66	unsigned int ienb;
67	67
68	68	ienb = read_aux_reg(AUX_IENABLE);
69		− ienb \|= (1 << data->irq);
	69	+ ienb \|= (1 << data->hwirq);
70	70	write_aux_reg(AUX_IENABLE, ienb);
71	71	}
72	72

arch/arc/kernel/mcip.c+4−0

@@ -10,6 +10,7 @@ · 9 unmodified lines
10	10
11	11	#include <linux/smp.h>
12	12	#include <linux/irq.h>
	13	+#include <linux/irqchip/chained_irq.h>
13	14	#include <linux/spinlock.h>
14	15	#include <soc/arc/mcip.h>
15	16	#include <asm/irqflags-arcv2.h>
@@ -221,10 +222,13 @@ static irq_hw_number_t idu_first_hwirq; · 205 unmodified lines
221	222	static void idu_cascade_isr(struct irq_desc *desc)
222	223	{
223	224	struct irq_domain *idu_domain = irq_desc_get_handler_data(desc);
	225	+ struct irq_chip *core_chip = irq_desc_get_chip(desc);
224	226	irq_hw_number_t core_hwirq = irqd_to_hwirq(irq_desc_get_irq_data(desc));
225	227	irq_hw_number_t idu_hwirq = core_hwirq - idu_first_hwirq;
226	228
	229	+ chained_irq_enter(core_chip, desc);
227	230	generic_handle_irq(irq_find_mapping(idu_domain, idu_hwirq));
	231	+ chained_irq_exit(core_chip, desc);
228	232	}
229	233
230	234	static int idu_irq_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hwirq)

arch/arc/kernel/module.c+3−1

@@ -32,8 +32,8 @@ int module_frob_arch_sections(Elf_Ehdr hdr, Elf_Shdr sechdrs, · 31 unmodified lines
32	32	#ifdef CONFIG_ARC_DW2_UNWIND
33	33	mod->arch.unw_sec_idx = 0;
34	34	mod->arch.unw_info = NULL;
35		− mod->arch.secstr = secstr;
36	35	#endif
	36	+ mod->arch.secstr = secstr;
37	37	return 0;
38	38	}
39	39
@@ -113,8 +113,10 @@ int apply_relocate_add(Elf32_Shdr *sechdrs, · 73 unmodified lines
113	113
114	114	}
115	115
	116	+#ifdef CONFIG_ARC_DW2_UNWIND
116	117	if (strcmp(module->arch.secstr+sechdrs[tgtsec].sh_name, ".eh_frame") == 0)
117	118	module->arch.unw_sec_idx = tgtsec;
	119	+#endif
118	120
119	121	return 0;
120	122

arch/arc/mm/cache.c+122−33

@@ -23,7 +23,7 @@ · 22 unmodified lines
23	23
24	24	static int l2_line_sz;
25	25	static int ioc_exists;
26		−int slc_enable = 1, ioc_enable = 0;
	26	+int slc_enable = 1, ioc_enable = 1;
27	27	unsigned long perip_base = ARC_UNCACHED_ADDR_SPACE; /* legacy value for boot */
28	28	unsigned long perip_end = 0xFFFFFFFF; /* legacy value */
29	29
@@ -271,7 +271,11 @@ void __cache_line_loop_v2(phys_addr_t paddr, unsigned long vaddr, · 241 unmodified lines
271	271
272	272	/*
273	273	* For ARC700 MMUv3 I-cache and D-cache flushes
274		− * Also reused for HS38 aliasing I-cache configuration
	274	+ * - ARC700 programming model requires paddr and vaddr be passed in seperate
	275	+ * AUX registers (_IVL and *_PTAG respectively) irrespective of whether the
	276	+ * caches actually alias or not.
	277	+ * - For HS38, only the aliasing I-cache configuration uses the PTAG reg
	278	+ * (non aliasing I-cache version doesn't; while D-cache can't possibly alias)
275	279	*/
276	280	static inline
277	281	void __cache_line_loop_v3(phys_addr_t paddr, unsigned long vaddr,
@@ -458,6 +462,21 @@ static inline void __dc_entire_op(const int op) · 180 unmodified lines
458	462	__after_dc_op(op);
459	463	}
460	464
	465	+static inline void __dc_disable(void)
	466	+{
	467	+ const int r = ARC_REG_DC_CTRL;
	468	+
	469	+ __dc_entire_op(OP_FLUSH_N_INV);
	470	+ write_aux_reg(r, read_aux_reg(r) \| DC_CTRL_DIS);
	471	+}
	472	+
	473	+static void __dc_enable(void)
	474	+{
	475	+ const int r = ARC_REG_DC_CTRL;
	476	+
	477	+ write_aux_reg(r, read_aux_reg(r) & ~DC_CTRL_DIS);
	478	+}
	479	+
461	480	/* For kernel mappings cache operation: index is same as paddr */
462	481	#define __dc_line_op_k(p, sz, op) __dc_line_op(p, p, sz, op)
463	482
@@ -483,6 +502,8 @@ static inline void __dc_line_op(phys_addr_t paddr, unsigned long vaddr, · 19 unmodified lines
483	502	#else
484	503
485	504	#define __dc_entire_op(op)
	505	+#define __dc_disable()
	506	+#define __dc_enable()
486	507	#define __dc_line_op(paddr, vaddr, sz, op)
487	508	#define __dc_line_op_k(paddr, sz, op)
488	509
@@ -597,6 +618,40 @@ noinline void slc_op(phys_addr_t paddr, unsigned long sz, const int op) · 108 unmodified lines
597	618	#endif
598	619	}
599	620
	621	+noinline static void slc_entire_op(const int op)
	622	+{
	623	+ unsigned int ctrl, r = ARC_REG_SLC_CTRL;
	624	+
	625	+ ctrl = read_aux_reg(r);
	626	+
	627	+ if (!(op & OP_FLUSH)) /* i.e. OP_INV */
	628	+ ctrl &= ~SLC_CTRL_IM; /* clear IM: Disable flush before Inv */
	629	+ else
	630	+ ctrl \|= SLC_CTRL_IM;
	631	+
	632	+ write_aux_reg(r, ctrl);
	633	+
	634	+ write_aux_reg(ARC_REG_SLC_INVALIDATE, 1);
	635	+
	636	+ /* Important to wait for flush to complete */
	637	+ while (read_aux_reg(r) & SLC_CTRL_BUSY);
	638	+}
	639	+
	640	+static inline void arc_slc_disable(void)
	641	+{
	642	+ const int r = ARC_REG_SLC_CTRL;
	643	+
	644	+ slc_entire_op(OP_FLUSH_N_INV);
	645	+ write_aux_reg(r, read_aux_reg(r) \| SLC_CTRL_DIS);
	646	+}
	647	+
	648	+static inline void arc_slc_enable(void)
	649	+{
	650	+ const int r = ARC_REG_SLC_CTRL;
	651	+
	652	+ write_aux_reg(r, read_aux_reg(r) & ~SLC_CTRL_DIS);
	653	+}
	654	+
600	655	/***********************************************************
601	656	* Exported APIs
602	657	*/
@@ -923,21 +978,54 @@ SYSCALL_DEFINE3(cacheflush, uint32_t, start, uint32_t, sz, uint32_t, flags) · 320 unmodified lines
923	978	return 0;
924	979	}
925	980
926		−void arc_cache_init(void)
	981	+/*
	982	+ * IO-Coherency (IOC) setup rules:
	983	+ *
	984	+ * 1. Needs to be at system level, so only once by Master core
	985	+ * Non-Masters need not be accessing caches at that time
	986	+ * - They are either HALT_ON_RESET and kick started much later or
	987	+ * - if run on reset, need to ensure that arc_platform_smp_wait_to_boot()
	988	+ * doesn't perturb caches or coherency unit
	989	+ *
	990	+ * 2. caches (L1 and SLC) need to be purged (flush+inv) before setting up IOC,
	991	+ * otherwise any straggler data might behave strangely post IOC enabling
	992	+ *
	993	+ * 3. All Caches need to be disabled when setting up IOC to elide any in-flight
	994	+ * Coherency transactions
	995	+ */
	996	+noinline void __init arc_ioc_setup(void)
927	997	{
928		− unsigned int __maybe_unused cpu = smp_processor_id();
929		− char str[256];
	998	+ unsigned int ap_sz;
930	999
931		− printk(arc_cache_mumbojumbo(0, str, sizeof(str)));
	1000	+ /* Flush + invalidate + disable L1 dcache */
	1001	+ __dc_disable();
	1002	+
	1003	+ /* Flush + invalidate SLC */
	1004	+ if (read_aux_reg(ARC_REG_SLC_BCR))
	1005	+ slc_entire_op(OP_FLUSH_N_INV);
	1006	+
	1007	+ /* IOC Aperture start: TDB: handle non default CONFIG_LINUX_LINK_BASE */
	1008	+ write_aux_reg(ARC_REG_IO_COH_AP0_BASE, 0x80000);
932	1009
933	1010	/*
934		− * Only master CPU needs to execute rest of function:
935		− * - Assume SMP so all cores will have same cache config so
936		− * any geomtry checks will be same for all
937		− * - IOC setup / dma callbacks only need to be setup once
	1011	+ * IOC Aperture size:
	1012	+ * decoded as 2 ^ (SIZE + 2) KB: so setting 0x11 implies 512M
	1013	+ * TBD: fix for PGU + 1GB of low mem
	1014	+ * TBD: fix for PAE
938	1015	*/
939		− if (cpu)
940		− return;
	1016	+ ap_sz = order_base_2(arc_get_mem_sz()/1024) - 2;
	1017	+ write_aux_reg(ARC_REG_IO_COH_AP0_SIZE, ap_sz);
	1018	+
	1019	+ write_aux_reg(ARC_REG_IO_COH_PARTIAL, 1);
	1020	+ write_aux_reg(ARC_REG_IO_COH_ENABLE, 1);
	1021	+
	1022	+ /* Re-enable L1 dcache */
	1023	+ __dc_enable();
	1024	+}
	1025	+
	1026	+void __init arc_cache_init_master(void)
	1027	+{
	1028	+ unsigned int __maybe_unused cpu = smp_processor_id();
941	1029
942	1030	if (IS_ENABLED(CONFIG_ARC_HAS_ICACHE)) {
943	1031	struct cpuinfo_arc_cache *ic = &cpuinfo_arc700[cpu].icache;
@@ -985,30 +1073,14 @@ void arc_cache_init(void) · 41 unmodified lines
985	1073	}
986	1074	}
987	1075
988		− if (is_isa_arcv2() && l2_line_sz && !slc_enable) {
989		−
990		− /* IM set : flush before invalidate */
991		− write_aux_reg(ARC_REG_SLC_CTRL,
992		− read_aux_reg(ARC_REG_SLC_CTRL) \| SLC_CTRL_IM);
	1076	+ /* Note that SLC disable not formally supported till HS 3.0 */
	1077	+ if (is_isa_arcv2() && l2_line_sz && !slc_enable)
	1078	+ arc_slc_disable();
993	1079
994		− write_aux_reg(ARC_REG_SLC_INVALIDATE, 1);
995		−
996		− /* Important to wait for flush to complete */
997		− while (read_aux_reg(ARC_REG_SLC_CTRL) & SLC_CTRL_BUSY);
998		− write_aux_reg(ARC_REG_SLC_CTRL,
999		− read_aux_reg(ARC_REG_SLC_CTRL) \| SLC_CTRL_DISABLE);
1000		− }
	1080	+ if (is_isa_arcv2() && ioc_enable)
	1081	+ arc_ioc_setup();
1001	1082
1002	1083	if (is_isa_arcv2() && ioc_enable) {
1003		− /* IO coherency base - 0x8z */
1004		− write_aux_reg(ARC_REG_IO_COH_AP0_BASE, 0x80000);
1005		− /* IO coherency aperture size - 512Mb: 0x8z-0xAz */
1006		− write_aux_reg(ARC_REG_IO_COH_AP0_SIZE, 0x11);
1007		− /* Enable partial writes */
1008		− write_aux_reg(ARC_REG_IO_COH_PARTIAL, 1);
1009		− /* Enable IO coherency */
1010		− write_aux_reg(ARC_REG_IO_COH_ENABLE, 1);
1011		−
1012	1084	__dma_cache_wback_inv = __dma_cache_wback_inv_ioc;
1013	1085	__dma_cache_inv = __dma_cache_inv_ioc;
1014	1086	__dma_cache_wback = __dma_cache_wback_ioc;
@@ -1022,3 +1094,20 @@ void arc_cache_init(void) · 7 unmodified lines
1022	1094	__dma_cache_wback = __dma_cache_wback_l1;
1023	1095	}
1024	1096	}
	1097	+
	1098	+void __ref arc_cache_init(void)
	1099	+{
	1100	+ unsigned int __maybe_unused cpu = smp_processor_id();
	1101	+ char str[256];
	1102	+
	1103	+ printk(arc_cache_mumbojumbo(0, str, sizeof(str)));
	1104	+
	1105	+ /*
	1106	+ * Only master CPU needs to execute rest of function:
	1107	+ * - Assume SMP so all cores will have same cache config so
	1108	+ * any geomtry checks will be same for all
	1109	+ * - IOC setup / dma callbacks only need to be setup once
	1110	+ */
	1111	+ if (!cpu)
	1112	+ arc_cache_init_master();
	1113	+}

arch/arc/mm/init.c+5−0

@@ -40,6 +40,11 @@ struct pglist_data node_data[MAX_NUMNODES] __read_mostly; · 39 unmodified lines
40	40	EXPORT_SYMBOL(node_data);
41	41	#endif
42	42
	43	+long __init arc_get_mem_sz(void)
	44	+{
	45	+ return low_mem_sz;
	46	+}
	47	+
43	48	/* User can over-ride above with "mem=nnn[KkMm]" in cmdline */
44	49	static int __init setup_mem_sz(char *str)
45	50	{

arch/arm/boot/dts/Makefile+1−0

@@ -846,6 +846,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ · 845 unmodified lines
846	846	sun8i-a83t-allwinner-h8homlet-v2.dtb \
847	847	sun8i-a83t-cubietruck-plus.dtb \
848	848	sun8i-h3-bananapi-m2-plus.dtb \
	849	+ sun8i-h3-nanopi-m1.dtb \
849	850	sun8i-h3-nanopi-neo.dtb \
850	851	sun8i-h3-orangepi-2.dtb \
851	852	sun8i-h3-orangepi-lite.dtb \

arch/arm/boot/dts/am335x-icev2.dts+0−1

@@ -170,7 +170,6 @@ · 169 unmodified lines
170	170	AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP \| MUX_MODE0) /* (G16) mmc0_dat0.mmc0_dat0 */
171	171	AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP \| MUX_MODE0) /* (G17) mmc0_clk.mmc0_clk */
172	172	AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP \| MUX_MODE0) /* (G18) mmc0_cmd.mmc0_cmd */
173		− AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP \| MUX_MODE5) /* (C15) spi0_cs1.mmc0_sdcd */
174	173	>;
175	174	};
176	175

arch/arm/boot/dts/bcm-nsp.dtsi+1−1

@@ -160,7 +160,7 @@ · 159 unmodified lines
160	160
161	161	axi {
162	162	compatible = "simple-bus";
163		− ranges = <0x00000000 0x18000000 0x0011c40a>;
	163	+ ranges = <0x00000000 0x18000000 0x0011c40c>;
164	164	#address-cells = <1>;
165	165	#size-cells = <1>;
166	166

arch/arm/boot/dts/da850-evm.dts+1−0

@@ -99,6 +99,7 @@ · 98 unmodified lines
99	99	#size-cells = <1>;
100	100	compatible = "m25p64";
101	101	spi-max-frequency = <30000000>;
	102	+ m25p,fast-read;
102	103	reg = <0>;
103	104	partition@0 {
104	105	label = "U-Boot-SPL";

arch/arm/boot/dts/dra7.dtsi+1−0

@@ -1378,6 +1378,7 @@ · 1377 unmodified lines
1378	1378	phy-names = "sata-phy";
1379	1379	clocks = <&sata_ref_clk>;
1380	1380	ti,hwmods = "sata";
	1381	+ ports-implemented = <0x1>;
1381	1382	};
1382	1383
1383	1384	rtc: rtc@48838000 {

arch/arm/boot/dts/dra72-evm-revc.dts+1−1

@@ -75,6 +75,6 @@ · 74 unmodified lines
75	75	ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
76	76	ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
77	77	ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
78		− ti,min-output-imepdance;
	78	+ ti,min-output-impedance;
79	79	};
80	80	};

arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi+2−2

@@ -319,8 +319,6 @@ · 318 unmodified lines
319	319	compatible = "fsl,imx6q-nitrogen6_max-sgtl5000",
320	320	"fsl,imx-audio-sgtl5000";
321	321	model = "imx6q-nitrogen6_max-sgtl5000";
322		− pinctrl-names = "default";
323		− pinctrl-0 = <&pinctrl_sgtl5000>;
324	322	ssi-controller = <&ssi1>;
325	323	audio-codec = <&codec>;
326	324	audio-routing =
@@ -402,6 +400,8 @@ · 75 unmodified lines
402	400
403	401	codec: sgtl5000@0a {
404	402	compatible = "fsl,sgtl5000";
	403	+ pinctrl-names = "default";
	404	+ pinctrl-0 = <&pinctrl_sgtl5000>;
405	405	reg = <0x0a>;
406	406	clocks = <&clks IMX6QDL_CLK_CKO>;
407	407	VDDA-supply = <&reg_2p5v>;

arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi+2−2

@@ -250,8 +250,6 @@ · 249 unmodified lines
250	250	compatible = "fsl,imx6q-nitrogen6_som2-sgtl5000",
251	251	"fsl,imx-audio-sgtl5000";
252	252	model = "imx6q-nitrogen6_som2-sgtl5000";
253		− pinctrl-names = "default";
254		− pinctrl-0 = <&pinctrl_sgtl5000>;
255	253	ssi-controller = <&ssi1>;
256	254	audio-codec = <&codec>;
257	255	audio-routing =
@@ -320,6 +318,8 @@ · 62 unmodified lines
320	318
321	319	codec: sgtl5000@0a {
322	320	compatible = "fsl,sgtl5000";
	321	+ pinctrl-names = "default";
	322	+ pinctrl-0 = <&pinctrl_sgtl5000>;
323	323	reg = <0x0a>;
324	324	clocks = <&clks IMX6QDL_CLK_CKO>;
325	325	VDDA-supply = <&reg_2p5v>;

arch/arm/boot/dts/logicpd-som-lv-37xx-devkit.dts+3−8

@@ -158,7 +158,7 @@ · 157 unmodified lines
158	158	&mmc1 {
159	159	interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
160	160	pinctrl-names = "default";
161		− pinctrl-0 = <&mmc1_pins &mmc1_cd>;
	161	+ pinctrl-0 = <&mmc1_pins>;
162	162	wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */
163	163	cd-gpios = <&gpio4 14 IRQ_TYPE_LEVEL_LOW>; /* gpio_110 */
164	164	vmmc-supply = <&vmmc1>;
@@ -193,7 +193,8 @@ · 28 unmodified lines
193	193	OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT \| MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
194	194	OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT \| MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
195	195	OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT \| MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
196		− OMAP3_CORE1_IOPAD(0x2132, PIN_INPUT_PULLUP \| MUX_MODE4) /* cam_strobe.gpio_126 sdmmc1_wp*/
	196	+ OMAP3_CORE1_IOPAD(0x2132, PIN_INPUT_PULLUP \| MUX_MODE4) /* cam_strobe.gpio_126 */
	197	+ OMAP3_CORE1_IOPAD(0x212c, PIN_INPUT_PULLUP \| MUX_MODE4) /* cam_d11.gpio_110 */
197	198	>;
198	199	};
199	200
@@ -242,12 +243,6 @@ · 42 unmodified lines
242	243	OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT \| PIN_OFF_OUTPUT_LOW \| MUX_MODE4) /* sys_boot6.gpio_8 */
243	244	>;
244	245	};
245		−
246		− mmc1_cd: pinmux_mmc1_cd {
247		− pinctrl-single,pins = <
248		− OMAP3_WKUP_IOPAD(0x212c, PIN_INPUT_PULLUP \| MUX_MODE4) /* cam_d11.gpio_110 */
249		− >;
250		− };
251	246	};
252	247
253	248

arch/arm/boot/dts/omap5.dtsi+1−0

@@ -988,6 +988,7 @@ · 987 unmodified lines
988	988	phy-names = "sata-phy";
989	989	clocks = <&sata_ref_clk>;
990	990	ti,hwmods = "sata";
	991	+ ports-implemented = <0x1>;
991	992	};
992	993
993	994	dss: dss@58000000 {

arch/arm/boot/dts/qcom-mdm9615.dtsi+1−1

@@ -357,7 +357,7 @@ · 356 unmodified lines
357	357	};
358	358
359	359	amba {
360		− compatible = "arm,amba-bus";
	360	+ compatible = "simple-bus";
361	361	#address-cells = <1>;
362	362	#size-cells = <1>;
363	363	ranges;

arch/arm/boot/dts/sun6i-a31-hummingbird.dts+4−0

@@ -140,6 +140,10 @@ · 139 unmodified lines
140	140	cpu-supply = <&reg_dcdc3>;
141	141	};
142	142
	143	+&de {
	144	+ status = "okay";
	145	+};
	146	+
143	147	&ehci0 {
144	148	status = "okay";
145	149	};

arch/arm/boot/dts/sun6i-a31.dtsi+1−0

@@ -234,6 +234,7 @@ · 233 unmodified lines
234	234	de: display-engine {
235	235	compatible = "allwinner,sun6i-a31-display-engine";
236	236	allwinner,pipelines = <&fe0>;
	237	+ status = "disabled";
237	238	};
238	239
239	240	soc@01c00000 {

arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts+1−1

@@ -56,7 +56,7 @@ · 55 unmodified lines
56	56	};
57	57
58	58	&pio {
59		− mmc2_pins_nrst: mmc2@0 {
	59	+ mmc2_pins_nrst: mmc2-rst-pin {
60	60	allwinner,pins = "PC16";
61	61	allwinner,function = "gpio_out";
62	62	allwinner,drive = <SUN4I_PINCTRL_10_MA>;

arch/arm/configs/multi_v7_defconfig+2−2

@@ -471,7 +471,7 @@ CONFIG_MESON_WATCHDOG=y · 470 unmodified lines
471	471	CONFIG_DW_WATCHDOG=y
472	472	CONFIG_DIGICOLOR_WATCHDOG=y
473	473	CONFIG_BCM2835_WDT=y
474		−CONFIG_BCM47XX_WATCHDOG=y
	474	+CONFIG_BCM47XX_WDT=y
475	475	CONFIG_BCM7038_WDT=m
476	476	CONFIG_BCM_KONA_WDT=y
477	477	CONFIG_MFD_ACT8945A=y
@@ -893,7 +893,7 @@ CONFIG_BCM2835_MBOX=y · 415 unmodified lines
893	893	CONFIG_RASPBERRYPI_FIRMWARE=y
894	894	CONFIG_EFI_VARS=m
895	895	CONFIG_EFI_CAPSULE_LOADER=m
896		−CONFIG_CONFIG_BCM47XX_NVRAM=y
	896	+CONFIG_BCM47XX_NVRAM=y
897	897	CONFIG_BCM47XX_SPROM=y
898	898	CONFIG_EXT4_FS=y
899	899	CONFIG_AUTOFS4_FS=y

arch/arm/configs/s3c2410_defconfig+3−3

@@ -86,9 +86,9 @@ CONFIG_IPV6_TUNNEL=m · 85 unmodified lines
86	86	CONFIG_NETFILTER=y
87	87	CONFIG_NF_CONNTRACK=m
88	88	CONFIG_NF_CONNTRACK_EVENTS=y
89		−CONFIG_NF_CT_PROTO_DCCP=m
90		−CONFIG_NF_CT_PROTO_SCTP=m
91		−CONFIG_NF_CT_PROTO_UDPLITE=m
	89	+CONFIG_NF_CT_PROTO_DCCP=y
	90	+CONFIG_NF_CT_PROTO_SCTP=y
	91	+CONFIG_NF_CT_PROTO_UDPLITE=y
92	92	CONFIG_NF_CONNTRACK_AMANDA=m
93	93	CONFIG_NF_CONNTRACK_FTP=m
94	94	CONFIG_NF_CONNTRACK_H323=m

arch/arm/include/asm/cputype.h+3−0

@@ -94,6 +94,9 @@ · 93 unmodified lines
94	94	#define ARM_CPU_XSCALE_ARCH_V2 0x4000
95	95	#define ARM_CPU_XSCALE_ARCH_V3 0x6000
96	96
	97	+/* Qualcomm implemented cores */
	98	+#define ARM_CPU_PART_SCORPION 0x510002d0
	99	+
97	100	extern unsigned int processor_id;
98	101
99	102	#ifdef CONFIG_CPU_CP15

arch/arm/include/asm/ftrace.h+18−0

@@ -54,6 +54,24 @@ static inline void *return_address(unsigned int level) · 53 unmodified lines
54	54
55	55	#define ftrace_return_address(n) return_address(n)
56	56
	57	+#define ARCH_HAS_SYSCALL_MATCH_SYM_NAME
	58	+
	59	+static inline bool arch_syscall_match_sym_name(const char *sym,
	60	+ const char *name)
	61	+{
	62	+ if (!strcmp(sym, "sys_mmap2"))
	63	+ sym = "sys_mmap_pgoff";
	64	+ else if (!strcmp(sym, "sys_statfs64_wrapper"))
	65	+ sym = "sys_statfs64";
	66	+ else if (!strcmp(sym, "sys_fstatfs64_wrapper"))
	67	+ sym = "sys_fstatfs64";
	68	+ else if (!strcmp(sym, "sys_arm_fadvise64_64"))
	69	+ sym = "sys_fadvise64_64";
	70	+
	71	+ /* Ignore case since sym may start with "SyS" instead of "sys" */
	72	+ return !strcasecmp(sym, name);
	73	+}
	74	+
57	75	#endif /* ifndef __ASSEMBLY__ */
58	76
59	77	#endif /* _ASM_ARM_FTRACE */

arch/arm/include/asm/kvm_host.h+0−3

@@ -60,9 +60,6 @@ struct kvm_arch { · 59 unmodified lines
60	60	/* The last vcpu id that ran on each physical CPU */
61	61	int __percpu *last_vcpu_ran;
62	62
63		− /* Timer */
64		− struct arch_timer_kvm timer;
65		−
66	63	/*
67	64	* Anything that is not used directly from assembly code goes
68	65	* here.

arch/arm/include/asm/kvm_mmu.h+2−10

@@ -129,8 +129,7 @@ static inline bool vcpu_has_cache_enabled(struct kvm_vcpu *vcpu) · 128 unmodified lines
129	129
130	130	static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu,
131	131	kvm_pfn_t pfn,
132		− unsigned long size,
133		− bool ipa_uncached)
	132	+ unsigned long size)
134	133	{
135	134	/*
136	135	* If we are going to insert an instruction page and the icache is
@@ -150,18 +149,12 @@ static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu, · 13 unmodified lines
150	149	* and iterate over the range.
151	150	*/
152	151
153		− bool need_flush = !vcpu_has_cache_enabled(vcpu) \|\| ipa_uncached;
154		−
155	152	VM_BUG_ON(size & ~PAGE_MASK);
156	153
157		− if (!need_flush && !icache_is_pipt())
158		− goto vipt_cache;
159		−
160	154	while (size) {
161	155	void *va = kmap_atomic_pfn(pfn);
162	156
163		− if (need_flush)
164		− kvm_flush_dcache_to_poc(va, PAGE_SIZE);
	157	+ kvm_flush_dcache_to_poc(va, PAGE_SIZE);
165	158
166	159	if (icache_is_pipt())
167	160	__cpuc_coherent_user_range((unsigned long)va,
@@ -173,7 +166,6 @@ static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu, · 5 unmodified lines
173	166	kunmap_atomic(va);
174	167	}
175	168
176		−vipt_cache:
177	169	if (!icache_is_pipt() && !icache_is_vivt_asid_tagged()) {
178	170	/* any kind of VIPT cache */
179	171	__flush_icache_all();

arch/arm/include/asm/virt.h+5−0

@@ -80,6 +80,11 @@ static inline bool is_kernel_in_hyp_mode(void) · 79 unmodified lines
80	80	return false;
81	81	}
82	82
	83	+static inline bool has_vhe(void)
	84	+{
	85	+ return false;
	86	+}
	87	+
83	88	/* The section containing the hypervisor idmap text */
84	89	extern char __hyp_idmap_text_start[];
85	90	extern char __hyp_idmap_text_end[];

arch/arm/include/uapi/asm/kvm.h+13−0

@@ -181,10 +181,23 @@ struct kvm_arch_memory_slot { · 180 unmodified lines
181	181	#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2
182	182	#define KVM_DEV_ARM_VGIC_CPUID_SHIFT 32
183	183	#define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT)
	184	+#define KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT 32
	185	+#define KVM_DEV_ARM_VGIC_V3_MPIDR_MASK \
	186	+ (0xffffffffULL << KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT)
184	187	#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0
185	188	#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT)
	189	+#define KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK (0xffff)
186	190	#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3
187	191	#define KVM_DEV_ARM_VGIC_GRP_CTRL 4
	192	+#define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5
	193	+#define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6
	194	+#define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7
	195	+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT 10
	196	+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \
	197	+ (0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT)
	198	+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff
	199	+#define VGIC_LEVEL_INFO_LINE_LEVEL 0
	200	+
188	201	#define KVM_DEV_ARM_VGIC_CTRL_INIT 0
189	202
190	203	/* KVM_IRQ_LINE irq field index values */

arch/arm/include/uapi/asm/types.hrenamed from arch/arm/include/asm/types.h+3−3

@@ -1,5 +1,5 @@
1		−#ifndef _ASM_TYPES_H
2		−#define _ASM_TYPES_H
	1	+#ifndef _UAPI_ASM_TYPES_H
	2	+#define _UAPI_ASM_TYPES_H
3	3
4	4	#include <asm-generic/int-ll64.h>
5	5
@@ -37,4 +37,4 @@ · 31 unmodified lines
37	37	#define __UINTPTR_TYPE__ unsigned long
38	38	#endif
39	39
40		−#endif /* _ASM_TYPES_H */
	40	+#endif /* _UAPI_ASM_TYPES_H */

arch/arm/kernel/hw_breakpoint.c+16−0

@@ -1063,6 +1063,22 @@ static int __init arch_hw_breakpoint_init(void) · 1062 unmodified lines
1063	1063	return 0;
1064	1064	}
1065	1065
	1066	+ /*
	1067	+ * Scorpion CPUs (at least those in APQ8060) seem to set DBGPRSR.SPD
	1068	+ * whenever a WFI is issued, even if the core is not powered down, in
	1069	+ * violation of the architecture. When DBGPRSR.SPD is set, accesses to
	1070	+ * breakpoint and watchpoint registers are treated as undefined, so
	1071	+ * this results in boot time and runtime failures when these are
	1072	+ * accessed and we unexpectedly take a trap.
	1073	+ *
	1074	+ * It's not clear if/how this can be worked around, so we blacklist
	1075	+ * Scorpion CPUs to avoid these issues.
	1076	+ */
	1077	+ if (read_cpuid_part() == ARM_CPU_PART_SCORPION) {
	1078	+ pr_info("Scorpion CPU detected. Hardware breakpoints and watchpoints disabled\n");
	1079	+ return 0;
	1080	+ }
	1081	+
1066	1082	has_ossr = core_has_os_save_restore();
1067	1083
1068	1084	/* Determine how many BRPs/WRPs are available. */

arch/arm/kernel/smp_tlb.c+7−0

@@ -9,6 +9,7 @@ · 8 unmodified lines
9	9	*/
10	10	#include <linux/preempt.h>
11	11	#include <linux/smp.h>
	12	+#include <linux/uaccess.h>
12	13
13	14	#include <asm/smp_plat.h>
14	15	#include <asm/tlbflush.h>
@@ -40,8 +41,11 @@ static inline void ipi_flush_tlb_mm(void *arg) · 25 unmodified lines
40	41	static inline void ipi_flush_tlb_page(void *arg)
41	42	{
42	43	struct tlb_args ta = (struct tlb_args )arg;
	44	+ unsigned int __ua_flags = uaccess_save_and_enable();
43	45
44	46	local_flush_tlb_page(ta->ta_vma, ta->ta_start);
	47	+
	48	+ uaccess_restore(__ua_flags);
45	49	}
46	50
47	51	static inline void ipi_flush_tlb_kernel_page(void *arg)
@@ -54,8 +58,11 @@ static inline void ipi_flush_tlb_kernel_page(void *arg) · 6 unmodified lines
54	58	static inline void ipi_flush_tlb_range(void *arg)
55	59	{
56	60	struct tlb_args ta = (struct tlb_args )arg;
	61	+ unsigned int __ua_flags = uaccess_save_and_enable();
57	62
58	63	local_flush_tlb_range(ta->ta_vma, ta->ta_start, ta->ta_end);
	64	+
	65	+ uaccess_restore(__ua_flags);
59	66	}
60	67
61	68	static inline void ipi_flush_tlb_kernel_range(void *arg)

arch/arm/kvm/Makefile+3−2

@@ -7,7 +7,7 @@ ifeq ($(plus_virt),+virt) · 6 unmodified lines
7	7	plus_virt_def := -DREQUIRES_VIRT=1
8	8	endif
9	9
10		−ccflags-y += -Iarch/arm/kvm
	10	+ccflags-y += -Iarch/arm/kvm -Ivirt/kvm/arm/vgic
11	11	CFLAGS_arm.o := -I. $(plus_virt_def)
12	12	CFLAGS_mmu.o := -I.
13	13
@@ -20,7 +20,7 @@ kvm-arm-y = $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o $(KVM)/eventfd.o $(KVM)/vf · 6 unmodified lines
20	20	obj-$(CONFIG_KVM_ARM_HOST) += hyp/
21	21	obj-y += kvm-arm.o init.o interrupts.o
22	22	obj-y += arm.o handle_exit.o guest.o mmu.o emulate.o reset.o
23		−obj-y += coproc.o coproc_a15.o coproc_a7.o mmio.o psci.o perf.o
	23	+obj-y += coproc.o coproc_a15.o coproc_a7.o mmio.o psci.o perf.o vgic-v3-coproc.o
24	24	obj-y += $(KVM)/arm/aarch32.o
25	25
26	26	obj-y += $(KVM)/arm/vgic/vgic.o
@@ -33,5 +33,6 @@ obj-y += $(KVM)/arm/vgic/vgic-mmio-v2.o · 6 unmodified lines
33	33	obj-y += $(KVM)/arm/vgic/vgic-mmio-v3.o
34	34	obj-y += $(KVM)/arm/vgic/vgic-kvm-device.o
35	35	obj-y += $(KVM)/arm/vgic/vgic-its.o
	36	+obj-y += $(KVM)/arm/vgic/vgic-debug.o
36	37	obj-y += $(KVM)/irqchip.o
37	38	obj-y += $(KVM)/arm/arch_timer.o

arch/arm/kvm/arm.c+5−2

@@ -135,7 +135,6 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) · 134 unmodified lines
135	135	goto out_free_stage2_pgd;
136	136
137	137	kvm_vgic_early_init(kvm);
138		− kvm_timer_init(kvm);
139	138
140	139	/* Mark the initial VMID generation invalid */
141	140	kvm->arch.vmid_gen = 0;
@@ -301,7 +300,8 @@ void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) · 159 unmodified lines
301	300
302	301	int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
303	302	{
304		− return kvm_timer_should_fire(vcpu);
	303	+ return kvm_timer_should_fire(vcpu_vtimer(vcpu)) \|\|
	304	+ kvm_timer_should_fire(vcpu_ptimer(vcpu));
305	305	}
306	306
307	307	void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
@@ -1099,6 +1099,9 @@ static void cpu_init_hyp_mode(void *dummy) · 791 unmodified lines
1099	1099	__cpu_init_hyp_mode(pgd_ptr, hyp_stack_ptr, vector_ptr);
1100	1100	__cpu_init_stage2();
1101	1101
	1102	+ if (is_kernel_in_hyp_mode())
	1103	+ kvm_timer_init_vhe();
	1104	+
1102	1105	kvm_arm_init_debug();
1103	1106	}
1104	1107

arch/arm/kvm/mmu.c+4−16

@@ -1232,9 +1232,9 @@ void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm, · 1231 unmodified lines
1232	1232	}
1233	1233
1234	1234	static void coherent_cache_guest_page(struct kvm_vcpu *vcpu, kvm_pfn_t pfn,
1235		− unsigned long size, bool uncached)
	1235	+ unsigned long size)
1236	1236	{
1237		− __coherent_cache_guest_page(vcpu, pfn, size, uncached);
	1237	+ __coherent_cache_guest_page(vcpu, pfn, size);
1238	1238	}
1239	1239
1240	1240	static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
@@ -1250,7 +1250,6 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, · 9 unmodified lines
1250	1250	struct vm_area_struct *vma;
1251	1251	kvm_pfn_t pfn;
1252	1252	pgprot_t mem_type = PAGE_S2;
1253		− bool fault_ipa_uncached;
1254	1253	bool logging_active = memslot_is_logging(memslot);
1255	1254	unsigned long flags = 0;
1256	1255
@@ -1337,8 +1336,6 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, · 80 unmodified lines
1337	1336	if (!hugetlb && !force_pte)
1338	1337	hugetlb = transparent_hugepage_adjust(&pfn, &fault_ipa);
1339	1338
1340		− fault_ipa_uncached = memslot->flags & KVM_MEMSLOT_INCOHERENT;
1341		−
1342	1339	if (hugetlb) {
1343	1340	pmd_t new_pmd = pfn_pmd(pfn, mem_type);
1344	1341	new_pmd = pmd_mkhuge(new_pmd);
@@ -1346,7 +1343,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, · 1 unmodified line
1346	1343	new_pmd = kvm_s2pmd_mkwrite(new_pmd);
1347	1344	kvm_set_pfn_dirty(pfn);
1348	1345	}
1349		− coherent_cache_guest_page(vcpu, pfn, PMD_SIZE, fault_ipa_uncached);
	1346	+ coherent_cache_guest_page(vcpu, pfn, PMD_SIZE);
1350	1347	ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd);
1351	1348	} else {
1352	1349	pte_t new_pte = pfn_pte(pfn, mem_type);
@@ -1356,7 +1353,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, · 3 unmodified lines
1356	1353	kvm_set_pfn_dirty(pfn);
1357	1354	mark_page_dirty(kvm, gfn);
1358	1355	}
1359		− coherent_cache_guest_page(vcpu, pfn, PAGE_SIZE, fault_ipa_uncached);
	1356	+ coherent_cache_guest_page(vcpu, pfn, PAGE_SIZE);
1360	1357	ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, flags);
1361	1358	}
1362	1359
@@ -1879,15 +1876,6 @@ void kvm_arch_free_memslot(struct kvm kvm, struct kvm_memory_slot free, · 516 unmodified lines
1879	1876	int kvm_arch_create_memslot(struct kvm kvm, struct kvm_memory_slot slot,
1880	1877	unsigned long npages)
1881	1878	{
1882		− /*
1883		− * Readonly memslots are not incoherent with the caches by definition,
1884		− * but in practice, they are used mostly to emulate ROMs or NOR flashes
1885		− * that the guest may consider devices and hence map as uncached.
1886		− * To prevent incoherency issues in these cases, tag all readonly
1887		− * regions as incoherent.
1888		− */
1889		− if (slot->flags & KVM_MEM_READONLY)
1890		− slot->flags \|= KVM_MEMSLOT_INCOHERENT;
1891	1879	return 0;
1892	1880	}
1893	1881

arch/arm/kvm/reset.c+8−1

@@ -37,6 +37,11 @@ static struct kvm_regs cortexa_regs_reset = { · 36 unmodified lines
37	37	.usr_regs.ARM_cpsr = SVC_MODE \| PSR_A_BIT \| PSR_I_BIT \| PSR_F_BIT,
38	38	};
39	39
	40	+static const struct kvm_irq_level cortexa_ptimer_irq = {
	41	+ { .irq = 30 },
	42	+ .level = 1,
	43	+};
	44	+
40	45	static const struct kvm_irq_level cortexa_vtimer_irq = {
41	46	{ .irq = 27 },
42	47	.level = 1,
@@ -58,6 +63,7 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) · 15 unmodified lines
58	63	{
59	64	struct kvm_regs *reset_regs;
60	65	const struct kvm_irq_level *cpu_vtimer_irq;
	66	+ const struct kvm_irq_level *cpu_ptimer_irq;
61	67
62	68	switch (vcpu->arch.target) {
63	69	case KVM_ARM_TARGET_CORTEX_A7:
@@ -65,6 +71,7 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) · 1 unmodified line
65	71	reset_regs = &cortexa_regs_reset;
66	72	vcpu->arch.midr = read_cpuid_id();
67	73	cpu_vtimer_irq = &cortexa_vtimer_irq;
	74	+ cpu_ptimer_irq = &cortexa_ptimer_irq;
68	75	break;
69	76	default:
70	77	return -ENODEV;
@@ -77,5 +84,5 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) · 6 unmodified lines
77	84	kvm_reset_coprocs(vcpu);
78	85
79	86	/* Reset arch_timer context */
80		− return kvm_timer_vcpu_reset(vcpu, cpu_vtimer_irq);
	87	+ return kvm_timer_vcpu_reset(vcpu, cpu_vtimer_irq, cpu_ptimer_irq);
81	88	}

arch/arm/kvm/vgic-v3-coproc.c+35−0

@@ -0,0 +1,35 @@
	1	+/*
	2	+ * VGIC system registers handling functions for AArch32 mode
	3	+ *
	4	+ * This program is free software; you can redistribute it and/or modify
	5	+ * it under the terms of the GNU General Public License version 2 as
	6	+ * published by the Free Software Foundation.
	7	+ *
	8	+ * This program is distributed in the hope that it will be useful,
	9	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	10	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	+ * GNU General Public License for more details.
	12	+ */
	13	+
	14	+#include <linux/kvm.h>
	15	+#include <linux/kvm_host.h>
	16	+#include <asm/kvm_emulate.h>
	17	+#include "vgic.h"
	18	+
	19	+int vgic_v3_has_cpu_sysregs_attr(struct kvm_vcpu *vcpu, bool is_write, u64 id,
	20	+ u64 *reg)
	21	+{
	22	+ /*
	23	+ * TODO: Implement for AArch32
	24	+ */
	25	+ return -ENXIO;
	26	+}
	27	+
	28	+int vgic_v3_cpu_sysregs_uaccess(struct kvm_vcpu *vcpu, bool is_write, u64 id,
	29	+ u64 *reg)
	30	+{
	31	+ /*
	32	+ * TODO: Implement for AArch32
	33	+ */
	34	+ return -ENXIO;
	35	+}

arch/arm/mach-omap1/dma.c+7−9

@@ -32,7 +32,6 @@ · 31 unmodified lines
32	32	#include "soc.h"
33	33
34	34	#define OMAP1_DMA_BASE (0xfffed800)
35		−#define OMAP1_LOGICAL_DMA_CH_COUNT 17
36	35
37	36	static u32 enable_1510_mode;
38	37
@@ -348,8 +347,6 @@ static int __init omap1_system_dma_init(void) · 309 unmodified lines
348	347	goto exit_iounmap;
349	348	}
350	349
351		− d->lch_count = OMAP1_LOGICAL_DMA_CH_COUNT;
352		−
353	350	/* Valid attributes for omap1 plus processors */
354	351	if (cpu_is_omap15xx())
355	352	d->dev_caps = ENABLE_1510_MODE;
@@ -366,13 +363,14 @@ static int __init omap1_system_dma_init(void) · 10 unmodified lines
366	363	d->dev_caps \|= CLEAR_CSR_ON_READ;
367	364	d->dev_caps \|= IS_WORD_16;
368	365
369		− if (cpu_is_omap15xx())
370		− d->chan_count = 9;
371		− else if (cpu_is_omap16xx() \|\| cpu_is_omap7xx()) {
372		− if (!(d->dev_caps & ENABLE_1510_MODE))
373		− d->chan_count = 16;
	366	+ /* available logical channels */
	367	+ if (cpu_is_omap15xx()) {
	368	+ d->lch_count = 9;
	369	+ } else {
	370	+ if (d->dev_caps & ENABLE_1510_MODE)
	371	+ d->lch_count = 9;
374	372	else
375		− d->chan_count = 9;
	373	+ d->lch_count = 16;
376	374	}
377	375
378	376	p = dma_plat_info;

arch/arm/mach-omap2/pdata-quirks.c+1−1

@@ -161,7 +161,7 @@ static struct ti_st_plat_data wilink7_pdata = { · 160 unmodified lines
161	161	.nshutdown_gpio = 162,
162	162	.dev_name = "/dev/ttyO1",
163	163	.flow_cntrl = 1,
164		− .baud_rate = 300000,
	164	+ .baud_rate = 3000000,
165	165	};
166	166
167	167	static struct platform_device wl128x_device = {

arch/arm/mach-ux500/pm.c+2−2

@@ -134,8 +134,8 @@ bool prcmu_pending_irq(void) · 133 unmodified lines
134	134	*/
135	135	bool prcmu_is_cpu_in_wfi(int cpu)
136	136	{
137		− return readl(PRCM_ARM_WFI_STANDBY) & cpu ? PRCM_ARM_WFI_STANDBY_WFI1 :
138		− PRCM_ARM_WFI_STANDBY_WFI0;
	137	+ return readl(PRCM_ARM_WFI_STANDBY) &
	138	+ (cpu ? PRCM_ARM_WFI_STANDBY_WFI1 : PRCM_ARM_WFI_STANDBY_WFI0);
139	139	}
140	140
141	141	/*

arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts+4−0

@@ -137,6 +137,10 @@ · 136 unmodified lines
137	137	};
138	138	};
139	139
	140	+&scpi_clocks {
	141	+ status = "disabled";
	142	+};
	143	+
140	144	&uart_AO {
141	145	status = "okay";
142	146	pinctrl-0 = <&uart_ao_a_pins>;

arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi+1−1

@@ -55,7 +55,7 @@ · 54 unmodified lines
55	55	mboxes = <&mailbox 1 &mailbox 2>;
56	56	shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
57	57
58		− clocks {
	58	+ scpi_clocks: clocks {
59	59	compatible = "arm,scpi-clocks";
60	60
61	61	scpi_dvfs: scpi_clocks@0 {

arch/arm64/boot/dts/exynos/exynos5433.dtsi+1−1

@@ -1367,7 +1367,7 @@ · 1366 unmodified lines
1367	1367	};
1368	1368
1369	1369	amba {
1370		− compatible = "arm,amba-bus";
	1370	+ compatible = "simple-bus";
1371	1371	#address-cells = <1>;
1372	1372	#size-cells = <1>;
1373	1373	ranges;

arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts+1−1

@@ -27,7 +27,7 @@ · 26 unmodified lines
27	27	stdout-path = "serial0:115200n8";
28	28	};
29	29
30		− memory {
	30	+ memory@0 {
31	31	device_type = "memory";
32	32	reg = <0x0 0x0 0x0 0x40000000>;
33	33	};

arch/arm64/boot/dts/xilinx/zynqmp.dtsi+3−3

@@ -72,7 +72,7 @@ · 71 unmodified lines
72	72	<1 10 0xf08>;
73	73	};
74	74
75		− amba_apu {
	75	+ amba_apu: amba_apu@0 {
76	76	compatible = "simple-bus";
77	77	#address-cells = <2>;
78	78	#size-cells = <1>;
@@ -175,7 +175,7 @@ · 96 unmodified lines
175	175	};
176	176
177	177	i2c0: i2c@ff020000 {
178		− compatible = "cdns,i2c-r1p10";
	178	+ compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
179	179	status = "disabled";
180	180	interrupt-parent = <&gic>;
181	181	interrupts = <0 17 4>;
@@ -185,7 +185,7 @@ · 3 unmodified lines
185	185	};
186	186
187	187	i2c1: i2c@ff030000 {
188		− compatible = "cdns,i2c-r1p10";
	188	+ compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
189	189	status = "disabled";
190	190	interrupt-parent = <&gic>;
191	191	interrupts = <0 18 4>;

arch/arm64/include/asm/kvm_host.h+0−3

@@ -70,9 +70,6 @@ struct kvm_arch { · 69 unmodified lines
70	70
71	71	/* Interrupt controller */
72	72	struct vgic_dist vgic;
73		−
74		− /* Timer */
75		− struct arch_timer_kvm timer;
76	73	};
77	74
78	75	#define KVM_NR_MEM_OBJS 40

arch/arm64/include/asm/kvm_mmu.h+2−4

@@ -236,13 +236,11 @@ static inline bool vcpu_has_cache_enabled(struct kvm_vcpu *vcpu) · 235 unmodified lines
236	236
237	237	static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu,
238	238	kvm_pfn_t pfn,
239		− unsigned long size,
240		− bool ipa_uncached)
	239	+ unsigned long size)
241	240	{
242	241	void *va = page_address(pfn_to_page(pfn));
243	242
244		− if (!vcpu_has_cache_enabled(vcpu) \|\| ipa_uncached)
245		− kvm_flush_dcache_to_poc(va, size);
	243	+ kvm_flush_dcache_to_poc(va, size);
246	244
247	245	if (!icache_is_aliasing()) { /* PIPT */
248	246	flush_icache_range((unsigned long)va,

arch/arm64/include/asm/memory.h+1−1

@@ -222,7 +222,7 @@ static inline void *phys_to_virt(phys_addr_t x) · 221 unmodified lines
222	222	#define _virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
223	223	#else
224	224	#define __virt_to_pgoff(kaddr) (((u64)(kaddr) & ~PAGE_OFFSET) / PAGE_SIZE * sizeof(struct page))
225		−#define __page_to_voff(page) (((u64)(page) & ~VMEMMAP_START) * PAGE_SIZE / sizeof(struct page))
	225	+#define __page_to_voff(kaddr) (((u64)(kaddr) & ~VMEMMAP_START) * PAGE_SIZE / sizeof(struct page))
226	226
227	227	#define page_to_virt(page) ((void *)((__page_to_voff(page)) \| PAGE_OFFSET))
228	228	#define virt_to_page(vaddr) ((struct page *)((__virt_to_pgoff(vaddr)) \| VMEMMAP_START))

arch/arm64/include/asm/virt.h+9−0

@@ -47,6 +47,7 @@ · 46 unmodified lines
47	47	#include <asm/ptrace.h>
48	48	#include <asm/sections.h>
49	49	#include <asm/sysreg.h>
	50	+#include <asm/cpufeature.h>
50	51
51	52	/*
52	53	* __boot_cpu_mode records what mode CPUs were booted in.
@@ -80,6 +81,14 @@ static inline bool is_kernel_in_hyp_mode(void) · 27 unmodified lines
80	81	return read_sysreg(CurrentEL) == CurrentEL_EL2;
81	82	}
82	83
	84	+static inline bool has_vhe(void)
	85	+{
	86	+ if (cpus_have_const_cap(ARM64_HAS_VIRT_HOST_EXTN))
	87	+ return true;
	88	+
	89	+ return false;
	90	+}
	91	+
83	92	#ifdef CONFIG_ARM64_VHE
84	93	extern void verify_cpu_run_el(void);
85	94	#else

arch/arm64/include/uapi/asm/kvm.h+13−0

@@ -201,10 +201,23 @@ struct kvm_arch_memory_slot { · 200 unmodified lines
201	201	#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2
202	202	#define KVM_DEV_ARM_VGIC_CPUID_SHIFT 32
203	203	#define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT)
	204	+#define KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT 32
	205	+#define KVM_DEV_ARM_VGIC_V3_MPIDR_MASK \
	206	+ (0xffffffffULL << KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT)
204	207	#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0
205	208	#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT)
	209	+#define KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK (0xffff)
206	210	#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3
207	211	#define KVM_DEV_ARM_VGIC_GRP_CTRL 4
	212	+#define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5
	213	+#define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6
	214	+#define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7
	215	+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT 10
	216	+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \
	217	+ (0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT)
	218	+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff
	219	+#define VGIC_LEVEL_INFO_LINE_LEVEL 0
	220	+
208	221	#define KVM_DEV_ARM_VGIC_CTRL_INIT 0
209	222
210	223	/* Device Control API on vcpu fd */

arch/arm64/include/uapi/asm/ptrace.h+1−0

@@ -77,6 +77,7 @@ struct user_fpsimd_state { · 76 unmodified lines
77	77	__uint128_t vregs[32];
78	78	__u32 fpsr;
79	79	__u32 fpcr;
	80	+ __u32 __reserved[2];
80	81	};
81	82
82	83	struct user_hwdebug_state {

arch/arm64/kernel/entry.S+1−1

@@ -683,7 +683,7 @@ el0_inv: · 682 unmodified lines
683	683	mov x0, sp
684	684	mov x1, #BAD_SYNC
685	685	mov x2, x25
686		− bl bad_mode
	686	+ bl bad_el0_sync
687	687	b ret_to_user
688	688	ENDPROC(el0_sync)
689	689

arch/arm64/kernel/ptrace.c+11−5

@@ -551,6 +551,8 @@ static int hw_break_set(struct task_struct *target, · 550 unmodified lines
551	551	/* (address, ctrl) registers */
552	552	limit = regset->n * regset->size;
553	553	while (count && offset < limit) {
	554	+ if (count < PTRACE_HBP_ADDR_SZ)
	555	+ return -EINVAL;
554	556	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr,
555	557	offset, offset + PTRACE_HBP_ADDR_SZ);
556	558	if (ret)
@@ -560,6 +562,8 @@ static int hw_break_set(struct task_struct *target, · 3 unmodified lines
560	562	return ret;
561	563	offset += PTRACE_HBP_ADDR_SZ;
562	564
	565	+ if (!count)
	566	+ break;
563	567	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
564	568	offset, offset + PTRACE_HBP_CTRL_SZ);
565	569	if (ret)
@@ -596,7 +600,7 @@ static int gpr_set(struct task_struct target, const struct user_regset regset, · 30 unmodified lines
596	600	const void kbuf, const void __user ubuf)
597	601	{
598	602	int ret;
599		− struct user_pt_regs newregs;
	603	+ struct user_pt_regs newregs = task_pt_regs(target)->user_regs;
600	604
601	605	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
602	606	if (ret)
@@ -626,7 +630,8 @@ static int fpr_set(struct task_struct target, const struct user_regset regset, · 23 unmodified lines
626	630	const void kbuf, const void __user ubuf)
627	631	{
628	632	int ret;
629		− struct user_fpsimd_state newstate;
	633	+ struct user_fpsimd_state newstate =
	634	+ target->thread.fpsimd_state.user_fpsimd;
630	635
631	636	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate, 0, -1);
632	637	if (ret)
@@ -650,7 +655,7 @@ static int tls_set(struct task_struct target, const struct user_regset regset, · 17 unmodified lines
650	655	const void kbuf, const void __user ubuf)
651	656	{
652	657	int ret;
653		− unsigned long tls;
	658	+ unsigned long tls = target->thread.tp_value;
654	659
655	660	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
656	661	if (ret)
@@ -676,7 +681,8 @@ static int system_call_set(struct task_struct *target, · 19 unmodified lines
676	681	unsigned int pos, unsigned int count,
677	682	const void kbuf, const void __user ubuf)
678	683	{
679		− int syscallno, ret;
	684	+ int syscallno = task_pt_regs(target)->syscallno;
	685	+ int ret;
680	686
681	687	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &syscallno, 0, -1);
682	688	if (ret)
@@ -948,7 +954,7 @@ static int compat_tls_set(struct task_struct *target, · 265 unmodified lines
948	954	const void __user *ubuf)
949	955	{
950	956	int ret;
951		− compat_ulong_t tls;
	957	+ compat_ulong_t tls = target->thread.tp_value;
952	958
953	959	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
954	960	if (ret)

arch/arm64/kernel/traps.c+24−4

@@ -604,17 +604,34 @@ const char *esr_get_class_string(u32 esr) · 603 unmodified lines
604	604	}
605	605
606	606	/*
607		− * bad_mode handles the impossible case in the exception vector.
	607	+ * bad_mode handles the impossible case in the exception vector. This is always
	608	+ * fatal.
608	609	*/
609	610	asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr)
610	611	{
611		− siginfo_t info;
612		− void __user pc = (void __user )instruction_pointer(regs);
613	612	console_verbose();
614	613
615	614	pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n",
616	615	handler[reason], smp_processor_id(), esr,
617	616	esr_get_class_string(esr));
	617	+
	618	+ die("Oops - bad mode", regs, 0);
	619	+ local_irq_disable();
	620	+ panic("bad mode");
	621	+}
	622	+
	623	+/*
	624	+ * bad_el0_sync handles unexpected, but potentially recoverable synchronous
	625	+ * exceptions taken from EL0. Unlike bad_mode, this returns.
	626	+ */
	627	+asmlinkage void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr)
	628	+{
	629	+ siginfo_t info;
	630	+ void __user pc = (void __user )instruction_pointer(regs);
	631	+ console_verbose();
	632	+
	633	+ pr_crit("Bad EL0 synchronous exception detected on CPU%d, code 0x%08x -- %s\n",
	634	+ smp_processor_id(), esr, esr_get_class_string(esr));
618	635	__show_regs(regs);
619	636
620	637	info.si_signo = SIGILL;
@@ -622,7 +639,10 @@ asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr) · 1 unmodified line
622	639	info.si_code = ILL_ILLOPC;
623	640	info.si_addr = pc;
624	641
625		− arm64_notify_die("Oops - bad mode", regs, &info, 0);
	642	+ current->thread.fault_address = 0;
	643	+ current->thread.fault_code = 0;
	644	+
	645	+ force_sig_info(info.si_signo, &info, current);
626	646	}
627	647
628	648	void __pte_error(const char *file, int line, unsigned long val)

arch/arm64/kvm/Makefile+3−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2	2	# Makefile for Kernel-based Virtual Machine module
3	3	#
4	4
5		−ccflags-y += -Iarch/arm64/kvm
	5	+ccflags-y += -Iarch/arm64/kvm -Ivirt/kvm/arm/vgic
6	6	CFLAGS_arm.o := -I.
7	7	CFLAGS_mmu.o := -I.
8	8
@@ -19,6 +19,7 @@ kvm-$(CONFIG_KVM_ARM_HOST) += $(ARM)/psci.o $(ARM)/perf.o · 10 unmodified lines
19	19	kvm-$(CONFIG_KVM_ARM_HOST) += inject_fault.o regmap.o
20	20	kvm-$(CONFIG_KVM_ARM_HOST) += hyp.o hyp-init.o handle_exit.o
21	21	kvm-$(CONFIG_KVM_ARM_HOST) += guest.o debug.o reset.o sys_regs.o sys_regs_generic_v8.o
	22	+kvm-$(CONFIG_KVM_ARM_HOST) += vgic-sys-reg-v3.o
22	23	kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/aarch32.o
23	24
24	25	kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/vgic/vgic.o
@@ -31,6 +32,7 @@ kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/vgic/vgic-mmio-v2.o · 6 unmodified lines
31	32	kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/vgic/vgic-mmio-v3.o
32	33	kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/vgic/vgic-kvm-device.o
33	34	kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/vgic/vgic-its.o
	35	+kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/vgic/vgic-debug.o
34	36	kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/irqchip.o
35	37	kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/arch_timer.o
36	38	kvm-$(CONFIG_KVM_ARM_PMU) += $(KVM)/arm/pmu.o

arch/arm64/kvm/reset.c+8−1

@@ -46,6 +46,11 @@ static const struct kvm_regs default_regs_reset32 = { · 45 unmodified lines
46	46	COMPAT_PSR_I_BIT \| COMPAT_PSR_F_BIT),
47	47	};
48	48
	49	+static const struct kvm_irq_level default_ptimer_irq = {
	50	+ .irq = 30,
	51	+ .level = 1,
	52	+};
	53	+
49	54	static const struct kvm_irq_level default_vtimer_irq = {
50	55	.irq = 27,
51	56	.level = 1,
@@ -104,6 +109,7 @@ int kvm_arch_dev_ioctl_check_extension(struct kvm *kvm, long ext) · 52 unmodified lines
104	109	int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
105	110	{
106	111	const struct kvm_irq_level *cpu_vtimer_irq;
	112	+ const struct kvm_irq_level *cpu_ptimer_irq;
107	113	const struct kvm_regs *cpu_reset;
108	114
109	115	switch (vcpu->arch.target) {
@@ -117,6 +123,7 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) · 7 unmodified lines
117	123	}
118	124
119	125	cpu_vtimer_irq = &default_vtimer_irq;
	126	+ cpu_ptimer_irq = &default_ptimer_irq;
120	127	break;
121	128	}
122	129
@@ -130,5 +137,5 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) · 7 unmodified lines
130	137	kvm_pmu_vcpu_reset(vcpu);
131	138
132	139	/* Reset timer */
133		− return kvm_timer_vcpu_reset(vcpu, cpu_vtimer_irq);
	140	+ return kvm_timer_vcpu_reset(vcpu, cpu_vtimer_irq, cpu_ptimer_irq);
134	141	}

arch/arm64/kvm/sys_regs.c+81−11

@@ -820,6 +820,61 @@ static bool access_pmuserenr(struct kvm_vcpu vcpu, struct sys_reg_params p, · 819 unmodified lines
820	820	CRm((0b1100 \| (((n) >> 3) & 0x3))), Op2(((n) & 0x7)), \
821	821	access_pmu_evtyper, reset_unknown, (PMEVTYPER0_EL0 + n), }
822	822
	823	+static bool access_cntp_tval(struct kvm_vcpu *vcpu,
	824	+ struct sys_reg_params *p,
	825	+ const struct sys_reg_desc *r)
	826	+{
	827	+ struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
	828	+ u64 now = kvm_phys_timer_read();
	829	+
	830	+ if (p->is_write)
	831	+ ptimer->cnt_cval = p->regval + now;
	832	+ else
	833	+ p->regval = ptimer->cnt_cval - now;
	834	+
	835	+ return true;
	836	+}
	837	+
	838	+static bool access_cntp_ctl(struct kvm_vcpu *vcpu,
	839	+ struct sys_reg_params *p,
	840	+ const struct sys_reg_desc *r)
	841	+{
	842	+ struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
	843	+
	844	+ if (p->is_write) {
	845	+ /* ISTATUS bit is read-only */
	846	+ ptimer->cnt_ctl = p->regval & ~ARCH_TIMER_CTRL_IT_STAT;
	847	+ } else {
	848	+ u64 now = kvm_phys_timer_read();
	849	+
	850	+ p->regval = ptimer->cnt_ctl;
	851	+ /*
	852	+ * Set ISTATUS bit if it's expired.
	853	+ * Note that according to ARMv8 ARM Issue A.k, ISTATUS bit is
	854	+ * UNKNOWN when ENABLE bit is 0, so we chose to set ISTATUS bit
	855	+ * regardless of ENABLE bit for our implementation convenience.
	856	+ */
	857	+ if (ptimer->cnt_cval <= now)
	858	+ p->regval \|= ARCH_TIMER_CTRL_IT_STAT;
	859	+ }
	860	+
	861	+ return true;
	862	+}
	863	+
	864	+static bool access_cntp_cval(struct kvm_vcpu *vcpu,
	865	+ struct sys_reg_params *p,
	866	+ const struct sys_reg_desc *r)
	867	+{
	868	+ struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
	869	+
	870	+ if (p->is_write)
	871	+ ptimer->cnt_cval = p->regval;
	872	+ else
	873	+ p->regval = ptimer->cnt_cval;
	874	+
	875	+ return true;
	876	+}
	877	+
823	878	/*
824	879	* Architected system registers.
825	880	* Important: Must be sorted ascending by Op0, Op1, CRn, CRm, Op2
@@ -1029,6 +1084,16 @@ static const struct sys_reg_desc sys_reg_descs[] = { · 203 unmodified lines
1029	1084	{ Op0(0b11), Op1(0b011), CRn(0b1101), CRm(0b0000), Op2(0b011),
1030	1085	NULL, reset_unknown, TPIDRRO_EL0 },
1031	1086
	1087	+ /* CNTP_TVAL_EL0 */
	1088	+ { Op0(0b11), Op1(0b011), CRn(0b1110), CRm(0b0010), Op2(0b000),
	1089	+ access_cntp_tval },
	1090	+ /* CNTP_CTL_EL0 */
	1091	+ { Op0(0b11), Op1(0b011), CRn(0b1110), CRm(0b0010), Op2(0b001),
	1092	+ access_cntp_ctl },
	1093	+ /* CNTP_CVAL_EL0 */
	1094	+ { Op0(0b11), Op1(0b011), CRn(0b1110), CRm(0b0010), Op2(0b010),
	1095	+ access_cntp_cval },
	1096	+
1032	1097	/* PMEVCNTRn_EL0 */
1033	1098	PMU_PMEVCNTR_EL0(0),
1034	1099	PMU_PMEVCNTR_EL0(1),
@@ -1795,6 +1860,17 @@ static bool index_to_params(u64 id, struct sys_reg_params *params) · 760 unmodified lines
1795	1860	}
1796	1861	}
1797	1862
	1863	+const struct sys_reg_desc *find_reg_by_id(u64 id,
	1864	+ struct sys_reg_params *params,
	1865	+ const struct sys_reg_desc table[],
	1866	+ unsigned int num)
	1867	+{
	1868	+ if (!index_to_params(id, params))
	1869	+ return NULL;
	1870	+
	1871	+ return find_reg(params, table, num);
	1872	+}
	1873	+
1798	1874	/* Decode an index value, and find the sys_reg_desc entry. */
1799	1875	static const struct sys_reg_desc index_to_sys_reg_desc(struct kvm_vcpu vcpu,
1800	1876	u64 id)
@@ -1807,11 +1883,8 @@ static const struct sys_reg_desc index_to_sys_reg_desc(struct kvm_vcpu vcpu, · 6 unmodified lines
1807	1883	if ((id & KVM_REG_ARM_COPROC_MASK) != KVM_REG_ARM64_SYSREG)
1808	1884	return NULL;
1809	1885
1810		− if (!index_to_params(id, &params))
1811		− return NULL;
1812		−
1813	1886	table = get_target_table(vcpu->arch.target, true, &num);
1814		− r = find_reg(&params, table, num);
	1887	+ r = find_reg_by_id(id, &params, table, num);
1815	1888	if (!r)
1816	1889	r = find_reg(&params, sys_reg_descs, ARRAY_SIZE(sys_reg_descs));
1817	1890
@@ -1918,10 +1991,8 @@ static int get_invariant_sys_reg(u64 id, void __user *uaddr) · 100 unmodified lines
1918	1991	struct sys_reg_params params;
1919	1992	const struct sys_reg_desc *r;
1920	1993
1921		− if (!index_to_params(id, &params))
1922		− return -ENOENT;
1923		−
1924		− r = find_reg(&params, invariant_sys_regs, ARRAY_SIZE(invariant_sys_regs));
	1994	+ r = find_reg_by_id(id, &params, invariant_sys_regs,
	1995	+ ARRAY_SIZE(invariant_sys_regs));
1925	1996	if (!r)
1926	1997	return -ENOENT;
1927	1998
@@ -1935,9 +2006,8 @@ static int set_invariant_sys_reg(u64 id, void __user *uaddr) · 7 unmodified lines
1935	2006	int err;
1936	2007	u64 val = 0; /* Make sure high bits are 0 for 32-bit regs */
1937	2008
1938		− if (!index_to_params(id, &params))
1939		− return -ENOENT;
1940		− r = find_reg(&params, invariant_sys_regs, ARRAY_SIZE(invariant_sys_regs));
	2009	+ r = find_reg_by_id(id, &params, invariant_sys_regs,
	2010	+ ARRAY_SIZE(invariant_sys_regs));
1941	2011	if (!r)
1942	2012	return -ENOENT;
1943	2013

arch/arm64/kvm/sys_regs.h+4−0

@@ -136,6 +136,10 @@ static inline int cmp_sys_reg(const struct sys_reg_desc *i1, · 135 unmodified lines
136	136	return i1->Op2 - i2->Op2;
137	137	}
138	138
	139	+const struct sys_reg_desc *find_reg_by_id(u64 id,
	140	+ struct sys_reg_params *params,
	141	+ const struct sys_reg_desc table[],
	142	+ unsigned int num);
139	143
140	144	#define Op0(_x) .Op0 = _x
141	145	#define Op1(_x) .Op1 = _x

arch/arm64/kvm/vgic-sys-reg-v3.c+346−0

@@ -0,0 +1,346 @@
	1	+/*
	2	+ * VGIC system registers handling functions for AArch64 mode
	3	+ *
	4	+ * This program is free software; you can redistribute it and/or modify
	5	+ * it under the terms of the GNU General Public License version 2 as
	6	+ * published by the Free Software Foundation.
	7	+ *
	8	+ * This program is distributed in the hope that it will be useful,
	9	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	10	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	+ * GNU General Public License for more details.
	12	+ */
	13	+
	14	+#include <linux/irqchip/arm-gic-v3.h>
	15	+#include <linux/kvm.h>
	16	+#include <linux/kvm_host.h>
	17	+#include <asm/kvm_emulate.h>
	18	+#include "vgic.h"
	19	+#include "sys_regs.h"
	20	+
	21	+static bool access_gic_ctlr(struct kvm_vcpu vcpu, struct sys_reg_params p,
	22	+ const struct sys_reg_desc *r)
	23	+{
	24	+ u32 host_pri_bits, host_id_bits, host_seis, host_a3v, seis, a3v;
	25	+ struct vgic_cpu *vgic_v3_cpu = &vcpu->arch.vgic_cpu;
	26	+ struct vgic_vmcr vmcr;
	27	+ u64 val;
	28	+
	29	+ vgic_get_vmcr(vcpu, &vmcr);
	30	+ if (p->is_write) {
	31	+ val = p->regval;
	32	+
	33	+ /*
	34	+ * Disallow restoring VM state if not supported by this
	35	+ * hardware.
	36	+ */
	37	+ host_pri_bits = ((val & ICC_CTLR_EL1_PRI_BITS_MASK) >>
	38	+ ICC_CTLR_EL1_PRI_BITS_SHIFT) + 1;
	39	+ if (host_pri_bits > vgic_v3_cpu->num_pri_bits)
	40	+ return false;
	41	+
	42	+ vgic_v3_cpu->num_pri_bits = host_pri_bits;
	43	+
	44	+ host_id_bits = (val & ICC_CTLR_EL1_ID_BITS_MASK) >>
	45	+ ICC_CTLR_EL1_ID_BITS_SHIFT;
	46	+ if (host_id_bits > vgic_v3_cpu->num_id_bits)
	47	+ return false;
	48	+
	49	+ vgic_v3_cpu->num_id_bits = host_id_bits;
	50	+
	51	+ host_seis = ((kvm_vgic_global_state.ich_vtr_el2 &
	52	+ ICH_VTR_SEIS_MASK) >> ICH_VTR_SEIS_SHIFT);
	53	+ seis = (val & ICC_CTLR_EL1_SEIS_MASK) >>
	54	+ ICC_CTLR_EL1_SEIS_SHIFT;
	55	+ if (host_seis != seis)
	56	+ return false;
	57	+
	58	+ host_a3v = ((kvm_vgic_global_state.ich_vtr_el2 &
	59	+ ICH_VTR_A3V_MASK) >> ICH_VTR_A3V_SHIFT);
	60	+ a3v = (val & ICC_CTLR_EL1_A3V_MASK) >> ICC_CTLR_EL1_A3V_SHIFT;
	61	+ if (host_a3v != a3v)
	62	+ return false;
	63	+
	64	+ /*
	65	+ * Here set VMCR.CTLR in ICC_CTLR_EL1 layout.
	66	+ * The vgic_set_vmcr() will convert to ICH_VMCR layout.
	67	+ */
	68	+ vmcr.ctlr = val & ICC_CTLR_EL1_CBPR_MASK;
	69	+ vmcr.ctlr \|= val & ICC_CTLR_EL1_EOImode_MASK;
	70	+ vgic_set_vmcr(vcpu, &vmcr);
	71	+ } else {
	72	+ val = 0;
	73	+ val \|= (vgic_v3_cpu->num_pri_bits - 1) <<
	74	+ ICC_CTLR_EL1_PRI_BITS_SHIFT;
	75	+ val \|= vgic_v3_cpu->num_id_bits << ICC_CTLR_EL1_ID_BITS_SHIFT;
	76	+ val \|= ((kvm_vgic_global_state.ich_vtr_el2 &
	77	+ ICH_VTR_SEIS_MASK) >> ICH_VTR_SEIS_SHIFT) <<
	78	+ ICC_CTLR_EL1_SEIS_SHIFT;
	79	+ val \|= ((kvm_vgic_global_state.ich_vtr_el2 &
	80	+ ICH_VTR_A3V_MASK) >> ICH_VTR_A3V_SHIFT) <<
	81	+ ICC_CTLR_EL1_A3V_SHIFT;
	82	+ /*
	83	+ * The VMCR.CTLR value is in ICC_CTLR_EL1 layout.
	84	+ * Extract it directly using ICC_CTLR_EL1 reg definitions.
	85	+ */
	86	+ val \|= vmcr.ctlr & ICC_CTLR_EL1_CBPR_MASK;
	87	+ val \|= vmcr.ctlr & ICC_CTLR_EL1_EOImode_MASK;
	88	+
	89	+ p->regval = val;
	90	+ }
	91	+
	92	+ return true;
	93	+}
	94	+
	95	+static bool access_gic_pmr(struct kvm_vcpu vcpu, struct sys_reg_params p,
	96	+ const struct sys_reg_desc *r)
	97	+{
	98	+ struct vgic_vmcr vmcr;
	99	+
	100	+ vgic_get_vmcr(vcpu, &vmcr);
	101	+ if (p->is_write) {
	102	+ vmcr.pmr = (p->regval & ICC_PMR_EL1_MASK) >> ICC_PMR_EL1_SHIFT;
	103	+ vgic_set_vmcr(vcpu, &vmcr);
	104	+ } else {
	105	+ p->regval = (vmcr.pmr << ICC_PMR_EL1_SHIFT) & ICC_PMR_EL1_MASK;
	106	+ }
	107	+
	108	+ return true;
	109	+}
	110	+
	111	+static bool access_gic_bpr0(struct kvm_vcpu vcpu, struct sys_reg_params p,
	112	+ const struct sys_reg_desc *r)
	113	+{
	114	+ struct vgic_vmcr vmcr;
	115	+
	116	+ vgic_get_vmcr(vcpu, &vmcr);
	117	+ if (p->is_write) {
	118	+ vmcr.bpr = (p->regval & ICC_BPR0_EL1_MASK) >>
	119	+ ICC_BPR0_EL1_SHIFT;
	120	+ vgic_set_vmcr(vcpu, &vmcr);
	121	+ } else {
	122	+ p->regval = (vmcr.bpr << ICC_BPR0_EL1_SHIFT) &
	123	+ ICC_BPR0_EL1_MASK;
	124	+ }
	125	+
	126	+ return true;
	127	+}
	128	+
	129	+static bool access_gic_bpr1(struct kvm_vcpu vcpu, struct sys_reg_params p,
	130	+ const struct sys_reg_desc *r)
	131	+{
	132	+ struct vgic_vmcr vmcr;
	133	+
	134	+ if (!p->is_write)
	135	+ p->regval = 0;
	136	+
	137	+ vgic_get_vmcr(vcpu, &vmcr);
	138	+ if (!((vmcr.ctlr & ICH_VMCR_CBPR_MASK) >> ICH_VMCR_CBPR_SHIFT)) {
	139	+ if (p->is_write) {
	140	+ vmcr.abpr = (p->regval & ICC_BPR1_EL1_MASK) >>
	141	+ ICC_BPR1_EL1_SHIFT;
	142	+ vgic_set_vmcr(vcpu, &vmcr);
	143	+ } else {
	144	+ p->regval = (vmcr.abpr << ICC_BPR1_EL1_SHIFT) &
	145	+ ICC_BPR1_EL1_MASK;
	146	+ }
	147	+ } else {
	148	+ if (!p->is_write)
	149	+ p->regval = min((vmcr.bpr + 1), 7U);
	150	+ }
	151	+
	152	+ return true;
	153	+}
	154	+
	155	+static bool access_gic_grpen0(struct kvm_vcpu vcpu, struct sys_reg_params p,
	156	+ const struct sys_reg_desc *r)
	157	+{
	158	+ struct vgic_vmcr vmcr;
	159	+
	160	+ vgic_get_vmcr(vcpu, &vmcr);
	161	+ if (p->is_write) {
	162	+ vmcr.grpen0 = (p->regval & ICC_IGRPEN0_EL1_MASK) >>
	163	+ ICC_IGRPEN0_EL1_SHIFT;
	164	+ vgic_set_vmcr(vcpu, &vmcr);
	165	+ } else {
	166	+ p->regval = (vmcr.grpen0 << ICC_IGRPEN0_EL1_SHIFT) &
	167	+ ICC_IGRPEN0_EL1_MASK;
	168	+ }
	169	+
	170	+ return true;
	171	+}
	172	+
	173	+static bool access_gic_grpen1(struct kvm_vcpu vcpu, struct sys_reg_params p,
	174	+ const struct sys_reg_desc *r)
	175	+{
	176	+ struct vgic_vmcr vmcr;
	177	+
	178	+ vgic_get_vmcr(vcpu, &vmcr);
	179	+ if (p->is_write) {
	180	+ vmcr.grpen1 = (p->regval & ICC_IGRPEN1_EL1_MASK) >>
	181	+ ICC_IGRPEN1_EL1_SHIFT;
	182	+ vgic_set_vmcr(vcpu, &vmcr);
	183	+ } else {
	184	+ p->regval = (vmcr.grpen1 << ICC_IGRPEN1_EL1_SHIFT) &
	185	+ ICC_IGRPEN1_EL1_MASK;
	186	+ }
	187	+
	188	+ return true;
	189	+}
	190	+
	191	+static void vgic_v3_access_apr_reg(struct kvm_vcpu *vcpu,
	192	+ struct sys_reg_params *p, u8 apr, u8 idx)
	193	+{
	194	+ struct vgic_v3_cpu_if *vgicv3 = &vcpu->arch.vgic_cpu.vgic_v3;
	195	+ uint32_t *ap_reg;
	196	+
	197	+ if (apr)
	198	+ ap_reg = &vgicv3->vgic_ap1r[idx];
	199	+ else
	200	+ ap_reg = &vgicv3->vgic_ap0r[idx];
	201	+
	202	+ if (p->is_write)
	203	+ *ap_reg = p->regval;
	204	+ else
	205	+ p->regval = *ap_reg;
	206	+}
	207	+
	208	+static bool access_gic_aprn(struct kvm_vcpu vcpu, struct sys_reg_params p,
	209	+ const struct sys_reg_desc *r, u8 apr)
	210	+{
	211	+ struct vgic_cpu *vgic_v3_cpu = &vcpu->arch.vgic_cpu;
	212	+ u8 idx = r->Op2 & 3;
	213	+
	214	+ /*
	215	+ * num_pri_bits are initialized with HW supported values.
	216	+ * We can rely safely on num_pri_bits even if VM has not
	217	+ * restored ICC_CTLR_EL1 before restoring APnR registers.
	218	+ */
	219	+ switch (vgic_v3_cpu->num_pri_bits) {
	220	+ case 7:
	221	+ vgic_v3_access_apr_reg(vcpu, p, apr, idx);
	222	+ break;
	223	+ case 6:
	224	+ if (idx > 1)
	225	+ goto err;
	226	+ vgic_v3_access_apr_reg(vcpu, p, apr, idx);
	227	+ break;
	228	+ default:
	229	+ if (idx > 0)
	230	+ goto err;
	231	+ vgic_v3_access_apr_reg(vcpu, p, apr, idx);
	232	+ }
	233	+
	234	+ return true;
	235	+err:
	236	+ if (!p->is_write)
	237	+ p->regval = 0;
	238	+
	239	+ return false;
	240	+}
	241	+
	242	+static bool access_gic_ap0r(struct kvm_vcpu vcpu, struct sys_reg_params p,
	243	+ const struct sys_reg_desc *r)
	244	+
	245	+{
	246	+ return access_gic_aprn(vcpu, p, r, 0);
	247	+}
	248	+
	249	+static bool access_gic_ap1r(struct kvm_vcpu vcpu, struct sys_reg_params p,
	250	+ const struct sys_reg_desc *r)
	251	+{
	252	+ return access_gic_aprn(vcpu, p, r, 1);
	253	+}
	254	+
	255	+static bool access_gic_sre(struct kvm_vcpu vcpu, struct sys_reg_params p,
	256	+ const struct sys_reg_desc *r)
	257	+{
	258	+ struct vgic_v3_cpu_if *vgicv3 = &vcpu->arch.vgic_cpu.vgic_v3;
	259	+
	260	+ /* Validate SRE bit */
	261	+ if (p->is_write) {
	262	+ if (!(p->regval & ICC_SRE_EL1_SRE))
	263	+ return false;
	264	+ } else {
	265	+ p->regval = vgicv3->vgic_sre;
	266	+ }
	267	+
	268	+ return true;
	269	+}
	270	+static const struct sys_reg_desc gic_v3_icc_reg_descs[] = {
	271	+ /* ICC_PMR_EL1 */
	272	+ { Op0(3), Op1(0), CRn(4), CRm(6), Op2(0), access_gic_pmr },
	273	+ /* ICC_BPR0_EL1 */
	274	+ { Op0(3), Op1(0), CRn(12), CRm(8), Op2(3), access_gic_bpr0 },
	275	+ /* ICC_AP0R0_EL1 */
	276	+ { Op0(3), Op1(0), CRn(12), CRm(8), Op2(4), access_gic_ap0r },
	277	+ /* ICC_AP0R1_EL1 */
	278	+ { Op0(3), Op1(0), CRn(12), CRm(8), Op2(5), access_gic_ap0r },
	279	+ /* ICC_AP0R2_EL1 */
	280	+ { Op0(3), Op1(0), CRn(12), CRm(8), Op2(6), access_gic_ap0r },
	281	+ /* ICC_AP0R3_EL1 */
	282	+ { Op0(3), Op1(0), CRn(12), CRm(8), Op2(7), access_gic_ap0r },
	283	+ /* ICC_AP1R0_EL1 */
	284	+ { Op0(3), Op1(0), CRn(12), CRm(9), Op2(0), access_gic_ap1r },
	285	+ /* ICC_AP1R1_EL1 */
	286	+ { Op0(3), Op1(0), CRn(12), CRm(9), Op2(1), access_gic_ap1r },
	287	+ /* ICC_AP1R2_EL1 */
	288	+ { Op0(3), Op1(0), CRn(12), CRm(9), Op2(2), access_gic_ap1r },
	289	+ /* ICC_AP1R3_EL1 */
	290	+ { Op0(3), Op1(0), CRn(12), CRm(9), Op2(3), access_gic_ap1r },
	291	+ /* ICC_BPR1_EL1 */
	292	+ { Op0(3), Op1(0), CRn(12), CRm(12), Op2(3), access_gic_bpr1 },
	293	+ /* ICC_CTLR_EL1 */
	294	+ { Op0(3), Op1(0), CRn(12), CRm(12), Op2(4), access_gic_ctlr },
	295	+ /* ICC_SRE_EL1 */
	296	+ { Op0(3), Op1(0), CRn(12), CRm(12), Op2(5), access_gic_sre },
	297	+ /* ICC_IGRPEN0_EL1 */
	298	+ { Op0(3), Op1(0), CRn(12), CRm(12), Op2(6), access_gic_grpen0 },
	299	+ /* ICC_GRPEN1_EL1 */
	300	+ { Op0(3), Op1(0), CRn(12), CRm(12), Op2(7), access_gic_grpen1 },
	301	+};
	302	+
	303	+int vgic_v3_has_cpu_sysregs_attr(struct kvm_vcpu *vcpu, bool is_write, u64 id,
	304	+ u64 *reg)
	305	+{
	306	+ struct sys_reg_params params;
	307	+ u64 sysreg = (id & KVM_DEV_ARM_VGIC_SYSREG_MASK) \| KVM_REG_SIZE_U64;
	308	+
	309	+ params.regval = *reg;
	310	+ params.is_write = is_write;
	311	+ params.is_aarch32 = false;
	312	+ params.is_32bit = false;
	313	+
	314	+ if (find_reg_by_id(sysreg, &params, gic_v3_icc_reg_descs,
	315	+ ARRAY_SIZE(gic_v3_icc_reg_descs)))
	316	+ return 0;
	317	+
	318	+ return -ENXIO;
	319	+}
	320	+
	321	+int vgic_v3_cpu_sysregs_uaccess(struct kvm_vcpu *vcpu, bool is_write, u64 id,
	322	+ u64 *reg)
	323	+{
	324	+ struct sys_reg_params params;
	325	+ const struct sys_reg_desc *r;
	326	+ u64 sysreg = (id & KVM_DEV_ARM_VGIC_SYSREG_MASK) \| KVM_REG_SIZE_U64;
	327	+
	328	+ if (is_write)
	329	+ params.regval = *reg;
	330	+ params.is_write = is_write;
	331	+ params.is_aarch32 = false;
	332	+ params.is_32bit = false;
	333	+
	334	+ r = find_reg_by_id(sysreg, &params, gic_v3_icc_reg_descs,
	335	+ ARRAY_SIZE(gic_v3_icc_reg_descs));
	336	+ if (!r)
	337	+ return -ENXIO;
	338	+
	339	+ if (!r->access(vcpu, &params, r))
	340	+ return -EINVAL;
	341	+
	342	+ if (!is_write)
	343	+ *reg = params.regval;
	344	+
	345	+ return 0;
	346	+}

arch/arm64/mm/init.c+2−0

@@ -404,6 +404,8 @@ void __init mem_init(void) · 403 unmodified lines
404	404	if (swiotlb_force == SWIOTLB_FORCE \|\|
405	405	max_pfn > (arm64_dma_phys_limit >> PAGE_SHIFT))
406	406	swiotlb_init(1);
	407	+ else
	408	+ swiotlb_force = SWIOTLB_NO_FORCE;
407	409
408	410	set_max_mapnr(pfn_to_page(max_pfn) - mem_map);
409	411

arch/powerpc/include/asm/book3s/64/hash-4k.h+3−2

@@ -36,12 +36,13 @@ · 35 unmodified lines
36	36	#ifdef CONFIG_HUGETLB_PAGE
37	37	static inline int hash__hugepd_ok(hugepd_t hpd)
38	38	{
	39	+ unsigned long hpdval = hpd_val(hpd);
39	40	/*
40	41	* if it is not a pte and have hugepd shift mask
41	42	* set, then it is a hugepd directory pointer
42	43	*/
43		− if (!(hpd.pd & _PAGE_PTE) &&
44		− ((hpd.pd & HUGEPD_SHIFT_MASK) != 0))
	44	+ if (!(hpdval & _PAGE_PTE) &&
	45	+ ((hpdval & HUGEPD_SHIFT_MASK) != 0))
45	46	return true;
46	47	return false;
47	48	}

arch/powerpc/include/asm/book3s/64/hash.h+4−0

@@ -201,6 +201,10 @@ extern int __meminit hash__vmemmap_create_mapping(unsigned long start, · 200 unmodified lines
201	201	unsigned long phys);
202	202	extern void hash__vmemmap_remove_mapping(unsigned long start,
203	203	unsigned long page_size);
	204	+
	205	+int hash__create_section_mapping(unsigned long start, unsigned long end);
	206	+int hash__remove_section_mapping(unsigned long start, unsigned long end);
	207	+
204	208	#endif /* !__ASSEMBLY__ */
205	209	#endif /* __KERNEL__ */
206	210	#endif /* _ASM_POWERPC_BOOK3S_64_HASH_H */

arch/powerpc/include/asm/hugetlb.h+8−6

@@ -21,12 +21,12 @@ static inline pte_t *hugepd_page(hugepd_t hpd) · 20 unmodified lines
21	21	* We have only four bits to encode, MMU page size
22	22	*/
23	23	BUILD_BUG_ON((MMU_PAGE_COUNT - 1) > 0xf);
24		− return __va(hpd.pd & HUGEPD_ADDR_MASK);
	24	+ return __va(hpd_val(hpd) & HUGEPD_ADDR_MASK);
25	25	}
26	26
27	27	static inline unsigned int hugepd_mmu_psize(hugepd_t hpd)
28	28	{
29		− return (hpd.pd & HUGEPD_SHIFT_MASK) >> 2;
	29	+ return (hpd_val(hpd) & HUGEPD_SHIFT_MASK) >> 2;
30	30	}
31	31
32	32	static inline unsigned int hugepd_shift(hugepd_t hpd)
@@ -52,18 +52,20 @@ static inline pte_t *hugepd_page(hugepd_t hpd) · 19 unmodified lines
52	52	{
53	53	BUG_ON(!hugepd_ok(hpd));
54	54	#ifdef CONFIG_PPC_8xx
55		− return (pte_t *)__va(hpd.pd & ~(_PMD_PAGE_MASK \| _PMD_PRESENT_MASK));
	55	+ return (pte_t *)__va(hpd_val(hpd) &
	56	+ ~(_PMD_PAGE_MASK \| _PMD_PRESENT_MASK));
56	57	#else
57		− return (pte_t *)((hpd.pd & ~HUGEPD_SHIFT_MASK) \| PD_HUGE);
	58	+ return (pte_t *)((hpd_val(hpd) &
	59	+ ~HUGEPD_SHIFT_MASK) \| PD_HUGE);
58	60	#endif
59	61	}
60	62
61	63	static inline unsigned int hugepd_shift(hugepd_t hpd)
62	64	{
63	65	#ifdef CONFIG_PPC_8xx
64		− return ((hpd.pd & _PMD_PAGE_MASK) >> 1) + 17;
	66	+ return ((hpd_val(hpd) & _PMD_PAGE_MASK) >> 1) + 17;
65	67	#else
66		− return hpd.pd & HUGEPD_SHIFT_MASK;
	68	+ return hpd_val(hpd) & HUGEPD_SHIFT_MASK;
67	69	#endif
68	70	}
69	71

arch/powerpc/include/asm/nohash/pgtable.h+3−2

@@ -227,9 +227,10 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, · 226 unmodified lines
227	227	static inline int hugepd_ok(hugepd_t hpd)
228	228	{
229	229	#ifdef CONFIG_PPC_8xx
230		− return ((hpd.pd & 0x4) != 0);
	230	+ return ((hpd_val(hpd) & 0x4) != 0);
231	231	#else
232		− return (hpd.pd > 0);
	232	+ /* We clear the top bit to indicate hugepd */
	233	+ return ((hpd_val(hpd) & PD_HUGE) == 0);
233	234	#endif
234	235	}
235	236

arch/powerpc/include/asm/page.h+0−3

@@ -294,15 +294,12 @@ extern long long virt_phys_offset; · 293 unmodified lines
294	294	#include <asm/pgtable-types.h>
295	295	#endif
296	296
297		−typedef struct { signed long pd; } hugepd_t;
298	297
299	298	#ifndef CONFIG_HUGETLB_PAGE
300	299	#define is_hugepd(pdep) (0)
301	300	#define pgd_huge(pgd) (0)
302	301	#endif /* CONFIG_HUGETLB_PAGE */
303	302
304		−#define __hugepd(x) ((hugepd_t) { (x) })
305		−
306	303	struct page;
307	304	extern void clear_user_page(void page, unsigned long vaddr, struct page pg);
308	305	extern void copy_user_page(void to, void from, unsigned long vaddr,

arch/powerpc/include/asm/perf_event_server.h+1−0

@@ -65,6 +65,7 @@ struct power_pmu { · 64 unmodified lines
65	65	#define PPMU_HAS_SSLOT 0x00000020 /* Has sampled slot in MMCRA */
66	66	#define PPMU_HAS_SIER 0x00000040 /* Has SIER */
67	67	#define PPMU_ARCH_207S 0x00000080 /* PMC is architecture v2.07S */
	68	+#define PPMU_NO_SIAR 0x00000100 /* Do not use SIAR */
68	69
69	70	/*
70	71	* Values for flags to get_alternatives()

arch/powerpc/include/asm/pgtable-be-types.h+8−0

@@ -104,4 +104,12 @@ static inline bool pmd_xchg(pmd_t *pmdp, pmd_t old, pmd_t new) · 103 unmodified lines
104	104	return pmd_raw(old) == prev;
105	105	}
106	106
	107	+typedef struct { __be64 pdbe; } hugepd_t;
	108	+#define __hugepd(x) ((hugepd_t) { cpu_to_be64(x) })
	109	+
	110	+static inline unsigned long hpd_val(hugepd_t x)
	111	+{
	112	+ return be64_to_cpu(x.pdbe);
	113	+}
	114	+
107	115	#endif /* _ASM_POWERPC_PGTABLE_BE_TYPES_H */

arch/powerpc/include/asm/pgtable-types.h+7−0

@@ -66,4 +66,11 @@ static inline bool pte_xchg(pte_t *ptep, pte_t old, pte_t new) · 65 unmodified lines
66	66	}
67	67	#endif
68	68
	69	+typedef struct { unsigned long pd; } hugepd_t;
	70	+#define __hugepd(x) ((hugepd_t) { (x) })
	71	+static inline unsigned long hpd_val(hugepd_t x)
	72	+{
	73	+ return x.pd;
	74	+}
	75	+
69	76	#endif /* _ASM_POWERPC_PGTABLE_TYPES_H */

arch/powerpc/include/asm/ppc-opcode.h+5−5

@@ -157,7 +157,7 @@ · 156 unmodified lines
157	157	#define PPC_INST_MCRXR 0x7c000400
158	158	#define PPC_INST_MCRXR_MASK 0xfc0007fe
159	159	#define PPC_INST_MFSPR_PVR 0x7c1f42a6
160		−#define PPC_INST_MFSPR_PVR_MASK 0xfc1fffff
	160	+#define PPC_INST_MFSPR_PVR_MASK 0xfc1ffffe
161	161	#define PPC_INST_MFTMR 0x7c0002dc
162	162	#define PPC_INST_MSGSND 0x7c00019c
163	163	#define PPC_INST_MSGCLR 0x7c0001dc
@@ -174,13 +174,13 @@ · 10 unmodified lines
174	174	#define PPC_INST_RFDI 0x4c00004e
175	175	#define PPC_INST_RFMCI 0x4c00004c
176	176	#define PPC_INST_MFSPR_DSCR 0x7c1102a6
177		−#define PPC_INST_MFSPR_DSCR_MASK 0xfc1fffff
	177	+#define PPC_INST_MFSPR_DSCR_MASK 0xfc1ffffe
178	178	#define PPC_INST_MTSPR_DSCR 0x7c1103a6
179		−#define PPC_INST_MTSPR_DSCR_MASK 0xfc1fffff
	179	+#define PPC_INST_MTSPR_DSCR_MASK 0xfc1ffffe
180	180	#define PPC_INST_MFSPR_DSCR_USER 0x7c0302a6
181		−#define PPC_INST_MFSPR_DSCR_USER_MASK 0xfc1fffff
	181	+#define PPC_INST_MFSPR_DSCR_USER_MASK 0xfc1ffffe
182	182	#define PPC_INST_MTSPR_DSCR_USER 0x7c0303a6
183		−#define PPC_INST_MTSPR_DSCR_USER_MASK 0xfc1fffff
	183	+#define PPC_INST_MTSPR_DSCR_USER_MASK 0xfc1ffffe
184	184	#define PPC_INST_MFVSRD 0x7c000066
185	185	#define PPC_INST_MTVSRD 0x7c000166
186	186	#define PPC_INST_SLBFEE 0x7c0007a7

arch/powerpc/kernel/eeh.c+9−1

@@ -298,9 +298,17 @@ void eeh_slot_error_detail(struct eeh_pe *pe, int severity) · 297 unmodified lines
298	298	*
299	299	* For pHyp, we have to enable IO for log retrieval. Otherwise,
300	300	* 0xFF's is always returned from PCI config space.
	301	+ *
	302	+ * When the @severity is EEH_LOG_PERM, the PE is going to be
	303	+ * removed. Prior to that, the drivers for devices included in
	304	+ * the PE will be closed. The drivers rely on working IO path
	305	+ * to bring the devices to quiet state. Otherwise, PCI traffic
	306	+ * from those devices after they are removed is like to cause
	307	+ * another unexpected EEH error.
301	308	*/
302	309	if (!(pe->type & EEH_PE_PHB)) {
303		− if (eeh_has_flag(EEH_ENABLE_IO_FOR_LOG))
	310	+ if (eeh_has_flag(EEH_ENABLE_IO_FOR_LOG) \|\|
	311	+ severity == EEH_LOG_PERM)
304	312	eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
305	313
306	314	/*

arch/powerpc/kernel/ptrace.c+14−0

@@ -463,6 +463,10 @@ static int fpr_set(struct task_struct target, const struct user_regset regset, · 462 unmodified lines
463	463
464	464	flush_fp_to_thread(target);
465	465
	466	+ for (i = 0; i < 32 ; i++)
	467	+ buf[i] = target->thread.TS_FPR(i);
	468	+ buf[32] = target->thread.fp_state.fpscr;
	469	+
466	470	/* copy to local buffer then write that out */
467	471	i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
468	472	if (i)
@@ -672,6 +676,9 @@ static int vsr_set(struct task_struct target, const struct user_regset regset, · 203 unmodified lines
672	676	flush_altivec_to_thread(target);
673	677	flush_vsx_to_thread(target);
674	678
	679	+ for (i = 0; i < 32 ; i++)
	680	+ buf[i] = target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET];
	681	+
675	682	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
676	683	buf, 0, 32 * sizeof(double));
677	684	if (!ret)
@@ -1019,6 +1026,10 @@ static int tm_cfpr_set(struct task_struct *target, · 341 unmodified lines
1019	1026	flush_fp_to_thread(target);
1020	1027	flush_altivec_to_thread(target);
1021	1028
	1029	+ for (i = 0; i < 32; i++)
	1030	+ buf[i] = target->thread.TS_CKFPR(i);
	1031	+ buf[32] = target->thread.ckfp_state.fpscr;
	1032	+
1022	1033	/* copy to local buffer then write that out */
1023	1034	i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
1024	1035	if (i)
@@ -1283,6 +1294,9 @@ static int tm_cvsx_set(struct task_struct *target, · 258 unmodified lines
1283	1294	flush_altivec_to_thread(target);
1284	1295	flush_vsx_to_thread(target);
1285	1296
	1297	+ for (i = 0; i < 32 ; i++)
	1298	+ buf[i] = target->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET];
	1299	+
1286	1300	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1287	1301	buf, 0, 32 * sizeof(double));
1288	1302	if (!ret)

arch/powerpc/mm/hash_utils_64.c+2−2

@@ -747,7 +747,7 @@ static unsigned long __init htab_get_table_size(void) · 746 unmodified lines
747	747	}
748	748
749	749	#ifdef CONFIG_MEMORY_HOTPLUG
750		−int create_section_mapping(unsigned long start, unsigned long end)
	750	+int hash__create_section_mapping(unsigned long start, unsigned long end)
751	751	{
752	752	int rc = htab_bolt_mapping(start, end, __pa(start),
753	753	pgprot_val(PAGE_KERNEL), mmu_linear_psize,
@@ -761,7 +761,7 @@ int create_section_mapping(unsigned long start, unsigned long end) · 7 unmodified lines
761	761	return rc;
762	762	}
763	763
764		−int remove_section_mapping(unsigned long start, unsigned long end)
	764	+int hash__remove_section_mapping(unsigned long start, unsigned long end)
765	765	{
766	766	int rc = htab_remove_mapping(start, end, mmu_linear_psize,
767	767	mmu_kernel_ssize);

arch/powerpc/mm/hugetlbpage-hash64.c+4−1

@@ -125,11 +125,14 @@ int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid, · 124 unmodified lines
125	125	int hugepd_ok(hugepd_t hpd)
126	126	{
127	127	bool is_hugepd;
	128	+ unsigned long hpdval;
	129	+
	130	+ hpdval = hpd_val(hpd);
128	131
129	132	/*
130	133	* We should not find this format in page directory, warn otherwise.
131	134	*/
132		− is_hugepd = (((hpd.pd & 0x3) == 0x0) && ((hpd.pd & HUGEPD_SHIFT_MASK) != 0));
	135	+ is_hugepd = (((hpdval & 0x3) == 0x0) && ((hpdval & HUGEPD_SHIFT_MASK) != 0));
133	136	WARN(is_hugepd, "Found wrong page directory format\n");
134	137	return 0;
135	138	}

arch/powerpc/mm/hugetlbpage.c+12−19

@@ -53,7 +53,7 @@ static u64 gpage_freearray[MAX_NUMBER_GPAGES]; · 52 unmodified lines
53	53	static unsigned nr_gpages;
54	54	#endif
55	55
56		−#define hugepd_none(hpd) ((hpd).pd == 0)
	56	+#define hugepd_none(hpd) (hpd_val(hpd) == 0)
57	57
58	58	pte_t huge_pte_offset(struct mm_struct mm, unsigned long addr)
59	59	{
@@ -103,24 +103,24 @@ static int __hugepte_alloc(struct mm_struct mm, hugepd_t hpdp, · 43 unmodified lines
103	103	for (i = 0; i < num_hugepd; i++, hpdp++) {
104	104	if (unlikely(!hugepd_none(*hpdp)))
105	105	break;
106		− else
	106	+ else {
107	107	#ifdef CONFIG_PPC_BOOK3S_64
108		− hpdp->pd = __pa(new) \|
109		− (shift_to_mmu_psize(pshift) << 2);
	108	+ *hpdp = __hugepd(__pa(new) \|
	109	+ (shift_to_mmu_psize(pshift) << 2));
110	110	#elif defined(CONFIG_PPC_8xx)
111		− hpdp->pd = __pa(new) \|
112		− (pshift == PAGE_SHIFT_8M ? _PMD_PAGE_8M :
113		− _PMD_PAGE_512K) \|
114		− _PMD_PRESENT;
	111	+ *hpdp = __hugepd(__pa(new) \|
	112	+ (pshift == PAGE_SHIFT_8M ? _PMD_PAGE_8M :
	113	+ _PMD_PAGE_512K) \| _PMD_PRESENT);
115	114	#else
116	115	/* We use the old format for PPC_FSL_BOOK3E */
117		− hpdp->pd = ((unsigned long)new & ~PD_HUGE) \| pshift;
	116	+ *hpdp = __hugepd(((unsigned long)new & ~PD_HUGE) \| pshift);
118	117	#endif
	118	+ }
119	119	}
120	120	/* If we bailed from the for loop early, an error occurred, clean up */
121	121	if (i < num_hugepd) {
122	122	for (i = i - 1 ; i >= 0; i--, hpdp--)
123		− hpdp->pd = 0;
	123	+ *hpdp = __hugepd(0);
124	124	kmem_cache_free(cachep, new);
125	125	}
126	126	spin_unlock(&mm->page_table_lock);
@@ -454,7 +454,7 @@ static void free_hugepd_range(struct mmu_gather tlb, hugepd_t hpdp, int pdshif · 327 unmodified lines
454	454	return;
455	455
456	456	for (i = 0; i < num_hugepd; i++, hpdp++)
457		− hpdp->pd = 0;
	457	+ *hpdp = __hugepd(0);
458	458
459	459	if (shift >= pdshift)
460	460	hugepd_free(tlb, hugepte);
@@ -810,12 +810,8 @@ static int __init hugetlbpage_init(void) · 349 unmodified lines
810	810	* if we have pdshift and shift value same, we don't
811	811	* use pgt cache for hugepd.
812	812	*/
813		− if (pdshift > shift) {
	813	+ if (pdshift > shift)
814	814	pgtable_cache_add(pdshift - shift, NULL);
815		− if (!PGT_CACHE(pdshift - shift))
816		− panic("hugetlbpage_init(): could not create "
817		− "pgtable cache for %d bit pagesize\n", shift);
818		− }
819	815	#if defined(CONFIG_PPC_FSL_BOOK3E) \|\| defined(CONFIG_PPC_8xx)
820	816	else if (!hugepte_cache) {
821	817	/*
@@ -852,9 +848,6 @@ static int __init hugetlbpage_init(void) · 30 unmodified lines
852	848	else if (mmu_psize_defs[MMU_PAGE_2M].shift)
853	849	HPAGE_SHIFT = mmu_psize_defs[MMU_PAGE_2M].shift;
854	850	#endif
855		− else
856		− panic("%s: Unable to set default huge page size\n", __func__);
857		−
858	851	return 0;
859	852	}
860	853

arch/powerpc/mm/init-common.c+5−8

@@ -79,8 +79,12 @@ void pgtable_cache_add(unsigned shift, void (ctor)(void )) · 78 unmodified lines
79	79	align = max_t(unsigned long, align, minalign);
80	80	name = kasprintf(GFP_KERNEL, "pgtable-2^%d", shift);
81	81	new = kmem_cache_create(name, table_size, align, 0, ctor);
	82	+ if (!new)
	83	+ panic("Could not allocate pgtable cache for order %d", shift);
	84	+
82	85	kfree(name);
83	86	pgtable_cache[shift - 1] = new;
	87	+
84	88	pr_debug("Allocated pgtable cache for order %d\n", shift);
85	89	}
86	90	EXPORT_SYMBOL_GPL(pgtable_cache_add); /* used by kvm_hv module */
@@ -89,7 +93,7 @@ void pgtable_cache_init(void) · 2 unmodified lines
89	93	{
90	94	pgtable_cache_add(PGD_INDEX_SIZE, pgd_ctor);
91	95
92		− if (PMD_INDEX_SIZE && !PGT_CACHE(PMD_INDEX_SIZE))
	96	+ if (PMD_CACHE_INDEX && !PGT_CACHE(PMD_CACHE_INDEX))
93	97	pgtable_cache_add(PMD_CACHE_INDEX, pmd_ctor);
94	98	/*
95	99	* In all current configs, when the PUD index exists it's the
@@ -98,11 +102,4 @@ void pgtable_cache_init(void) · 2 unmodified lines
98	102	*/
99	103	if (PUD_INDEX_SIZE && !PGT_CACHE(PUD_INDEX_SIZE))
100	104	pgtable_cache_add(PUD_INDEX_SIZE, pud_ctor);
101		−
102		− if (!PGT_CACHE(PGD_INDEX_SIZE))
103		− panic("Couldn't allocate pgd cache");
104		− if (PMD_INDEX_SIZE && !PGT_CACHE(PMD_INDEX_SIZE))
105		− panic("Couldn't allocate pmd pgtable caches");
106		− if (PUD_INDEX_SIZE && !PGT_CACHE(PUD_INDEX_SIZE))
107		− panic("Couldn't allocate pud pgtable caches");
108	105	}

arch/powerpc/mm/pgtable-book3s64.c+18−0

@@ -126,3 +126,21 @@ void mmu_cleanup_all(void) · 125 unmodified lines
126	126	else if (mmu_hash_ops.hpte_clear_all)
127	127	mmu_hash_ops.hpte_clear_all();
128	128	}
	129	+
	130	+#ifdef CONFIG_MEMORY_HOTPLUG
	131	+int create_section_mapping(unsigned long start, unsigned long end)
	132	+{
	133	+ if (radix_enabled())
	134	+ return -ENODEV;
	135	+
	136	+ return hash__create_section_mapping(start, end);
	137	+}
	138	+
	139	+int remove_section_mapping(unsigned long start, unsigned long end)
	140	+{
	141	+ if (radix_enabled())
	142	+ return -ENODEV;
	143	+
	144	+ return hash__remove_section_mapping(start, end);
	145	+}
	146	+#endif /* CONFIG_MEMORY_HOTPLUG */

arch/powerpc/perf/core-book3s.c+2−0

@@ -295,6 +295,8 @@ static inline void perf_read_regs(struct pt_regs *regs) · 294 unmodified lines
295	295	*/
296	296	if (TRAP(regs) != 0xf00)
297	297	use_siar = 0;
	298	+ else if ((ppmu->flags & PPMU_NO_SIAR))
	299	+ use_siar = 0;
298	300	else if (marked)
299	301	use_siar = 1;
300	302	else if ((ppmu->flags & PPMU_NO_CONT_SAMPLING))

arch/powerpc/perf/power9-events-list.h+1−1

@@ -16,7 +16,7 @@ EVENT(PM_CYC, 0x0001e) · 15 unmodified lines
16	16	EVENT(PM_ICT_NOSLOT_CYC, 0x100f8)
17	17	EVENT(PM_CMPLU_STALL, 0x1e054)
18	18	EVENT(PM_INST_CMPL, 0x00002)
19		−EVENT(PM_BRU_CMPL, 0x40060)
	19	+EVENT(PM_BRU_CMPL, 0x10012)
20	20	EVENT(PM_BR_MPRED_CMPL, 0x400f6)
21	21
22	22	/* All L1 D cache load references counted at finish, gated by reject */

arch/powerpc/perf/power9-pmu.c+1−1

@@ -384,7 +384,7 @@ static struct power_pmu power9_isa207_pmu = { · 383 unmodified lines
384	384	.bhrb_filter_map = power9_bhrb_filter_map,
385	385	.get_constraint = isa207_get_constraint,
386	386	.disable_pmc = isa207_disable_pmc,
387		− .flags = PPMU_HAS_SIER \| PPMU_ARCH_207S,
	387	+ .flags = PPMU_NO_SIAR \| PPMU_ARCH_207S,
388	388	.n_generic = ARRAY_SIZE(power9_generic_events),
389	389	.generic_events = power9_generic_events,
390	390	.cache_events = &power9_cache_events,

arch/powerpc/sysdev/xics/icp-opal.c+24−7

@@ -20,6 +20,7 @@ · 19 unmodified lines
20	20	#include <asm/xics.h>
21	21	#include <asm/io.h>
22	22	#include <asm/opal.h>
	23	+#include <asm/kvm_ppc.h>
23	24
24	25	static void icp_opal_teardown_cpu(void)
25	26	{
@@ -39,7 +40,26 @@ static void icp_opal_flush_ipi(void) · 13 unmodified lines
39	40	* Should we be flagging idle loop instead?
40	41	* Or creating some task to be scheduled?
41	42	*/
42		− opal_int_eoi((0x00 << 24) \| XICS_IPI);
	43	+ if (opal_int_eoi((0x00 << 24) \| XICS_IPI) > 0)
	44	+ force_external_irq_replay();
	45	+}
	46	+
	47	+static unsigned int icp_opal_get_xirr(void)
	48	+{
	49	+ unsigned int kvm_xirr;
	50	+ __be32 hw_xirr;
	51	+ int64_t rc;
	52	+
	53	+ /* Handle an interrupt latched by KVM first */
	54	+ kvm_xirr = kvmppc_get_xics_latch();
	55	+ if (kvm_xirr)
	56	+ return kvm_xirr;
	57	+
	58	+ /* Then ask OPAL */
	59	+ rc = opal_int_get_xirr(&hw_xirr, false);
	60	+ if (rc < 0)
	61	+ return 0;
	62	+ return be32_to_cpu(hw_xirr);
43	63	}
44	64
45	65	static unsigned int icp_opal_get_irq(void)
@@ -47,12 +67,8 @@ static unsigned int icp_opal_get_irq(void) · 1 unmodified line
47	67	unsigned int xirr;
48	68	unsigned int vec;
49	69	unsigned int irq;
50		− int64_t rc;
51	70
52		− rc = opal_int_get_xirr(&xirr, false);
53		− if (rc < 0)
54		− return 0;
55		− xirr = be32_to_cpu(xirr);
	71	+ xirr = icp_opal_get_xirr();
56	72	vec = xirr & 0x00ffffff;
57	73	if (vec == XICS_IRQ_SPURIOUS)
58	74	return 0;
@@ -67,7 +83,8 @@ static unsigned int icp_opal_get_irq(void) · 8 unmodified lines
67	83	xics_mask_unknown_vec(vec);
68	84
69	85	/* We might learn about it later, so EOI it */
70		− opal_int_eoi(xirr);
	86	+ if (opal_int_eoi(xirr) > 0)
	87	+ force_external_irq_replay();
71	88
72	89	return 0;
73	90	}

arch/s390/configs/default_defconfig+13−14

@@ -69,7 +69,7 @@ CONFIG_CMA=y · 68 unmodified lines
69	69	CONFIG_CMA_DEBUG=y
70	70	CONFIG_CMA_DEBUGFS=y
71	71	CONFIG_MEM_SOFT_DIRTY=y
72		−CONFIG_ZPOOL=m
	72	+CONFIG_ZSWAP=y
73	73	CONFIG_ZBUD=m
74	74	CONFIG_ZSMALLOC=m
75	75	CONFIG_ZSMALLOC_STAT=y
@@ -141,8 +141,6 @@ CONFIG_NF_CONNTRACK_SECMARK=y · 65 unmodified lines
141	141	CONFIG_NF_CONNTRACK_EVENTS=y
142	142	CONFIG_NF_CONNTRACK_TIMEOUT=y
143	143	CONFIG_NF_CONNTRACK_TIMESTAMP=y
144		−CONFIG_NF_CT_PROTO_DCCP=m
145		−CONFIG_NF_CT_PROTO_UDPLITE=m
146	144	CONFIG_NF_CONNTRACK_AMANDA=m
147	145	CONFIG_NF_CONNTRACK_FTP=m
148	146	CONFIG_NF_CONNTRACK_H323=m
@@ -159,13 +157,12 @@ CONFIG_NF_TABLES=m · 10 unmodified lines
159	157	CONFIG_NFT_EXTHDR=m
160	158	CONFIG_NFT_META=m
161	159	CONFIG_NFT_CT=m
162		−CONFIG_NFT_RBTREE=m
163		−CONFIG_NFT_HASH=m
164	160	CONFIG_NFT_COUNTER=m
165	161	CONFIG_NFT_LOG=m
166	162	CONFIG_NFT_LIMIT=m
167	163	CONFIG_NFT_NAT=m
168	164	CONFIG_NFT_COMPAT=m
	165	+CONFIG_NFT_HASH=m
169	166	CONFIG_NETFILTER_XT_SET=m
170	167	CONFIG_NETFILTER_XT_TARGET_AUDIT=m
171	168	CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
@@ -219,7 +216,6 @@ CONFIG_NETFILTER_XT_MATCH_QUOTA=m · 47 unmodified lines
219	216	CONFIG_NETFILTER_XT_MATCH_RATEEST=m
220	217	CONFIG_NETFILTER_XT_MATCH_REALM=m
221	218	CONFIG_NETFILTER_XT_MATCH_RECENT=m
222		−CONFIG_NETFILTER_XT_MATCH_SOCKET=m
223	219	CONFIG_NETFILTER_XT_MATCH_STATE=m
224	220	CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
225	221	CONFIG_NETFILTER_XT_MATCH_STRING=m
@@ -258,7 +254,6 @@ CONFIG_IP_VS_NQ=m · 32 unmodified lines
258	254	CONFIG_IP_VS_FTP=m
259	255	CONFIG_IP_VS_PE_SIP=m
260	256	CONFIG_NF_CONNTRACK_IPV4=m
261		−# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set
262	257	CONFIG_NF_TABLES_IPV4=m
263	258	CONFIG_NFT_CHAIN_ROUTE_IPV4=m
264	259	CONFIG_NF_TABLES_ARP=m
@@ -436,7 +431,6 @@ CONFIG_EQUALIZER=m · 171 unmodified lines
436	431	CONFIG_IFB=m
437	432	CONFIG_MACVLAN=m
438	433	CONFIG_MACVTAP=m
439		−CONFIG_IPVLAN=m
440	434	CONFIG_VXLAN=m
441	435	CONFIG_TUN=m
442	436	CONFIG_VETH=m
@@ -480,6 +474,7 @@ CONFIG_VIRTIO_BALLOON=m · 37 unmodified lines
480	474	CONFIG_EXT4_FS=y
481	475	CONFIG_EXT4_FS_POSIX_ACL=y
482	476	CONFIG_EXT4_FS_SECURITY=y
	477	+CONFIG_EXT4_ENCRYPTION=y
483	478	CONFIG_JBD2_DEBUG=y
484	479	CONFIG_JFS_FS=m
485	480	CONFIG_JFS_POSIX_ACL=y
@@ -592,14 +587,12 @@ CONFIG_LOCK_STAT=y · 106 unmodified lines
592	587	CONFIG_DEBUG_LOCKDEP=y
593	588	CONFIG_DEBUG_ATOMIC_SLEEP=y
594	589	CONFIG_DEBUG_LOCKING_API_SELFTESTS=y
595		−CONFIG_DEBUG_LIST=y
596	590	CONFIG_DEBUG_SG=y
597	591	CONFIG_DEBUG_NOTIFIERS=y
598	592	CONFIG_DEBUG_CREDENTIALS=y
599	593	CONFIG_RCU_TORTURE_TEST=m
600	594	CONFIG_RCU_CPU_STALL_TIMEOUT=300
601	595	CONFIG_NOTIFIER_ERROR_INJECTION=m
602		−CONFIG_CPU_NOTIFIER_ERROR_INJECT=m
603	596	CONFIG_PM_NOTIFIER_ERROR_INJECT=m
604	597	CONFIG_FAULT_INJECTION=y
605	598	CONFIG_FAILSLAB=y
@@ -618,6 +611,7 @@ CONFIG_STACK_TRACER=y · 12 unmodified lines
618	611	CONFIG_BLK_DEV_IO_TRACE=y
619	612	CONFIG_UPROBE_EVENT=y
620	613	CONFIG_FUNCTION_PROFILER=y
	614	+CONFIG_HIST_TRIGGERS=y
621	615	CONFIG_TRACE_ENUM_MAP_FILE=y
622	616	CONFIG_LKDTM=m
623	617	CONFIG_TEST_LIST_SORT=y
@@ -630,6 +624,7 @@ CONFIG_TEST_STRING_HELPERS=y · 6 unmodified lines
630	624	CONFIG_TEST_KSTRTOX=y
631	625	CONFIG_DMA_API_DEBUG=y
632	626	CONFIG_TEST_BPF=m
	627	+CONFIG_BUG_ON_DATA_CORRUPTION=y
633	628	CONFIG_S390_PTDUMP=y
634	629	CONFIG_ENCRYPTED_KEYS=m
635	630	CONFIG_SECURITY=y
@@ -640,16 +635,18 @@ CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0 · 4 unmodified lines
640	635	CONFIG_SECURITY_SELINUX_DISABLE=y
641	636	CONFIG_IMA=y
642	637	CONFIG_IMA_APPRAISE=y
	638	+CONFIG_CRYPTO_RSA=m
	639	+CONFIG_CRYPTO_DH=m
	640	+CONFIG_CRYPTO_ECDH=m
643	641	CONFIG_CRYPTO_USER=m
644		−# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
645	642	CONFIG_CRYPTO_CRYPTD=m
646	643	CONFIG_CRYPTO_TEST=m
647	644	CONFIG_CRYPTO_CCM=m
648	645	CONFIG_CRYPTO_GCM=m
649		−CONFIG_CRYPTO_CTS=m
	646	+CONFIG_CRYPTO_CHACHA20POLY1305=m
650	647	CONFIG_CRYPTO_LRW=m
651	648	CONFIG_CRYPTO_PCBC=m
652		−CONFIG_CRYPTO_XTS=m
	649	+CONFIG_CRYPTO_KEYWRAP=m
653	650	CONFIG_CRYPTO_XCBC=m
654	651	CONFIG_CRYPTO_VMAC=m
655	652	CONFIG_CRYPTO_CRC32=m
@@ -673,11 +670,13 @@ CONFIG_CRYPTO_SEED=m · 17 unmodified lines
673	670	CONFIG_CRYPTO_SERPENT=m
674	671	CONFIG_CRYPTO_TEA=m
675	672	CONFIG_CRYPTO_TWOFISH=m
676		−CONFIG_CRYPTO_LZO=m
	673	+CONFIG_CRYPTO_842=m
677	674	CONFIG_CRYPTO_LZ4=m
678	675	CONFIG_CRYPTO_LZ4HC=m
679	676	CONFIG_CRYPTO_USER_API_HASH=m
680	677	CONFIG_CRYPTO_USER_API_SKCIPHER=m
	678	+CONFIG_CRYPTO_USER_API_RNG=m
	679	+CONFIG_CRYPTO_USER_API_AEAD=m
681	680	CONFIG_ZCRYPT=m
682	681	CONFIG_CRYPTO_SHA1_S390=m
683	682	CONFIG_CRYPTO_SHA256_S390=m

arch/s390/configs/gcov_defconfig+30−20

@@ -12,6 +12,7 @@ CONFIG_TASK_IO_ACCOUNTING=y · 11 unmodified lines
12	12	CONFIG_IKCONFIG=y
13	13	CONFIG_IKCONFIG_PROC=y
14	14	CONFIG_NUMA_BALANCING=y
	15	+# CONFIG_NUMA_BALANCING_DEFAULT_ENABLED is not set
15	16	CONFIG_MEMCG=y
16	17	CONFIG_MEMCG_SWAP=y
17	18	CONFIG_BLK_CGROUP=y
@@ -54,8 +55,9 @@ CONFIG_SOLARIS_X86_PARTITION=y · 36 unmodified lines
54	55	CONFIG_UNIXWARE_DISKLABEL=y
55	56	CONFIG_CFQ_GROUP_IOSCHED=y
56	57	CONFIG_DEFAULT_DEADLINE=y
	58	+CONFIG_LIVEPATCH=y
57	59	CONFIG_TUNE_ZEC12=y
58		−CONFIG_NR_CPUS=256
	60	+CONFIG_NR_CPUS=512
59	61	CONFIG_NUMA=y
60	62	CONFIG_HZ_100=y
61	63	CONFIG_MEMORY_HOTPLUG=y
@@ -65,6 +67,7 @@ CONFIG_TRANSPARENT_HUGEPAGE=y · 3 unmodified lines
65	67	CONFIG_CLEANCACHE=y
66	68	CONFIG_FRONTSWAP=y
67	69	CONFIG_CMA=y
	70	+CONFIG_MEM_SOFT_DIRTY=y
68	71	CONFIG_ZSWAP=y
69	72	CONFIG_ZBUD=m
70	73	CONFIG_ZSMALLOC=m
@@ -136,8 +139,6 @@ CONFIG_NF_CONNTRACK_SECMARK=y · 65 unmodified lines
136	139	CONFIG_NF_CONNTRACK_EVENTS=y
137	140	CONFIG_NF_CONNTRACK_TIMEOUT=y
138	141	CONFIG_NF_CONNTRACK_TIMESTAMP=y
139		−CONFIG_NF_CT_PROTO_DCCP=m
140		−CONFIG_NF_CT_PROTO_UDPLITE=m
141	142	CONFIG_NF_CONNTRACK_AMANDA=m
142	143	CONFIG_NF_CONNTRACK_FTP=m
143	144	CONFIG_NF_CONNTRACK_H323=m
@@ -154,13 +155,12 @@ CONFIG_NF_TABLES=m · 10 unmodified lines
154	155	CONFIG_NFT_EXTHDR=m
155	156	CONFIG_NFT_META=m
156	157	CONFIG_NFT_CT=m
157		−CONFIG_NFT_RBTREE=m
158		−CONFIG_NFT_HASH=m
159	158	CONFIG_NFT_COUNTER=m
160	159	CONFIG_NFT_LOG=m
161	160	CONFIG_NFT_LIMIT=m
162	161	CONFIG_NFT_NAT=m
163	162	CONFIG_NFT_COMPAT=m
	163	+CONFIG_NFT_HASH=m
164	164	CONFIG_NETFILTER_XT_SET=m
165	165	CONFIG_NETFILTER_XT_TARGET_AUDIT=m
166	166	CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
@@ -214,7 +214,6 @@ CONFIG_NETFILTER_XT_MATCH_QUOTA=m · 47 unmodified lines
214	214	CONFIG_NETFILTER_XT_MATCH_RATEEST=m
215	215	CONFIG_NETFILTER_XT_MATCH_REALM=m
216	216	CONFIG_NETFILTER_XT_MATCH_RECENT=m
217		−CONFIG_NETFILTER_XT_MATCH_SOCKET=m
218	217	CONFIG_NETFILTER_XT_MATCH_STATE=m
219	218	CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
220	219	CONFIG_NETFILTER_XT_MATCH_STRING=m
@@ -253,7 +252,6 @@ CONFIG_IP_VS_NQ=m · 32 unmodified lines
253	252	CONFIG_IP_VS_FTP=m
254	253	CONFIG_IP_VS_PE_SIP=m
255	254	CONFIG_NF_CONNTRACK_IPV4=m
256		−# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set
257	255	CONFIG_NF_TABLES_IPV4=m
258	256	CONFIG_NFT_CHAIN_ROUTE_IPV4=m
259	257	CONFIG_NF_TABLES_ARP=m
@@ -430,7 +428,6 @@ CONFIG_EQUALIZER=m · 170 unmodified lines
430	428	CONFIG_IFB=m
431	429	CONFIG_MACVLAN=m
432	430	CONFIG_MACVTAP=m
433		−CONFIG_IPVLAN=m
434	431	CONFIG_VXLAN=m
435	432	CONFIG_TUN=m
436	433	CONFIG_VETH=m
@@ -460,6 +457,7 @@ CONFIG_HW_RANDOM_VIRTIO=m · 23 unmodified lines
460	457	CONFIG_RAW_DRIVER=m
461	458	CONFIG_HANGCHECK_TIMER=m
462	459	CONFIG_TN3270_FS=y
	460	+# CONFIG_HWMON is not set
463	461	CONFIG_WATCHDOG=y
464	462	CONFIG_WATCHDOG_NOWAYOUT=y
465	463	CONFIG_SOFT_WATCHDOG=m
@@ -473,6 +471,7 @@ CONFIG_VIRTIO_BALLOON=m · 7 unmodified lines
473	471	CONFIG_EXT4_FS=y
474	472	CONFIG_EXT4_FS_POSIX_ACL=y
475	473	CONFIG_EXT4_FS_SECURITY=y
	474	+CONFIG_EXT4_ENCRYPTION=y
476	475	CONFIG_JBD2_DEBUG=y
477	476	CONFIG_JFS_FS=m
478	477	CONFIG_JFS_POSIX_ACL=y
@@ -495,6 +494,7 @@ CONFIG_AUTOFS4_FS=m · 16 unmodified lines
495	494	CONFIG_FUSE_FS=y
496	495	CONFIG_CUSE=m
497	496	CONFIG_OVERLAY_FS=m
	497	+CONFIG_OVERLAY_FS_REDIRECT_DIR=y
498	498	CONFIG_FSCACHE=m
499	499	CONFIG_CACHEFILES=m
500	500	CONFIG_ISO9660_FS=y
@@ -551,25 +551,27 @@ CONFIG_FRAME_WARN=1024 · 50 unmodified lines
551	551	CONFIG_UNUSED_SYMBOLS=y
552	552	CONFIG_MAGIC_SYSRQ=y
553	553	CONFIG_DEBUG_MEMORY_INIT=y
554		−CONFIG_MEMORY_NOTIFIER_ERROR_INJECT=m
555	554	CONFIG_PANIC_ON_OOPS=y
556	555	CONFIG_TIMER_STATS=y
557	556	CONFIG_RCU_TORTURE_TEST=m
558	557	CONFIG_RCU_CPU_STALL_TIMEOUT=60
559		−CONFIG_NOTIFIER_ERROR_INJECTION=m
560		−CONFIG_CPU_NOTIFIER_ERROR_INJECT=m
561		−CONFIG_PM_NOTIFIER_ERROR_INJECT=m
562	558	CONFIG_LATENCYTOP=y
	559	+CONFIG_SCHED_TRACER=y
	560	+CONFIG_FTRACE_SYSCALLS=y
	561	+CONFIG_STACK_TRACER=y
563	562	CONFIG_BLK_DEV_IO_TRACE=y
564		−# CONFIG_KPROBE_EVENT is not set
	563	+CONFIG_UPROBE_EVENT=y
	564	+CONFIG_FUNCTION_PROFILER=y
	565	+CONFIG_HIST_TRIGGERS=y
565	566	CONFIG_TRACE_ENUM_MAP_FILE=y
566	567	CONFIG_LKDTM=m
567		−CONFIG_RBTREE_TEST=m
568		−CONFIG_INTERVAL_TREE_TEST=m
569	568	CONFIG_PERCPU_TEST=m
570	569	CONFIG_ATOMIC64_SELFTEST=y
571	570	CONFIG_TEST_BPF=m
	571	+CONFIG_BUG_ON_DATA_CORRUPTION=y
572	572	CONFIG_S390_PTDUMP=y
	573	+CONFIG_PERSISTENT_KEYRINGS=y
	574	+CONFIG_BIG_KEYS=y
573	575	CONFIG_ENCRYPTED_KEYS=m
574	576	CONFIG_SECURITY=y
575	577	CONFIG_SECURITY_NETWORK=y
@@ -577,18 +579,25 @@ CONFIG_SECURITY_SELINUX=y · 1 unmodified line
577	579	CONFIG_SECURITY_SELINUX_BOOTPARAM=y
578	580	CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0
579	581	CONFIG_SECURITY_SELINUX_DISABLE=y
	582	+CONFIG_INTEGRITY_SIGNATURE=y
	583	+CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y
580	584	CONFIG_IMA=y
	585	+CONFIG_IMA_WRITE_POLICY=y
581	586	CONFIG_IMA_APPRAISE=y
	587	+CONFIG_CRYPTO_DH=m
	588	+CONFIG_CRYPTO_ECDH=m
582	589	CONFIG_CRYPTO_USER=m
583	590	# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
	591	+CONFIG_CRYPTO_PCRYPT=m
584	592	CONFIG_CRYPTO_CRYPTD=m
	593	+CONFIG_CRYPTO_MCRYPTD=m
585	594	CONFIG_CRYPTO_TEST=m
586	595	CONFIG_CRYPTO_CCM=m
587	596	CONFIG_CRYPTO_GCM=m
588		−CONFIG_CRYPTO_CTS=m
	597	+CONFIG_CRYPTO_CHACHA20POLY1305=m
589	598	CONFIG_CRYPTO_LRW=m
590	599	CONFIG_CRYPTO_PCBC=m
591		−CONFIG_CRYPTO_XTS=m
	600	+CONFIG_CRYPTO_KEYWRAP=m
592	601	CONFIG_CRYPTO_XCBC=m
593	602	CONFIG_CRYPTO_VMAC=m
594	603	CONFIG_CRYPTO_CRC32=m
@@ -598,6 +607,7 @@ CONFIG_CRYPTO_RMD160=m · 3 unmodified lines
598	607	CONFIG_CRYPTO_RMD256=m
599	608	CONFIG_CRYPTO_RMD320=m
600	609	CONFIG_CRYPTO_SHA512=m
	610	+CONFIG_CRYPTO_SHA3=m
601	611	CONFIG_CRYPTO_TGR192=m
602	612	CONFIG_CRYPTO_WP512=m
603	613	CONFIG_CRYPTO_ANUBIS=m
@@ -612,10 +622,13 @@ CONFIG_CRYPTO_SEED=m · 8 unmodified lines
612	622	CONFIG_CRYPTO_SERPENT=m
613	623	CONFIG_CRYPTO_TEA=m
614	624	CONFIG_CRYPTO_TWOFISH=m
	625	+CONFIG_CRYPTO_842=m
615	626	CONFIG_CRYPTO_LZ4=m
616	627	CONFIG_CRYPTO_LZ4HC=m
617	628	CONFIG_CRYPTO_USER_API_HASH=m
618	629	CONFIG_CRYPTO_USER_API_SKCIPHER=m
	630	+CONFIG_CRYPTO_USER_API_RNG=m
	631	+CONFIG_CRYPTO_USER_API_AEAD=m
619	632	CONFIG_ZCRYPT=m
620	633	CONFIG_CRYPTO_SHA1_S390=m
621	634	CONFIG_CRYPTO_SHA256_S390=m
@@ -624,9 +637,6 @@ CONFIG_CRYPTO_DES_S390=m · 2 unmodified lines
624	637	CONFIG_CRYPTO_AES_S390=m
625	638	CONFIG_CRYPTO_GHASH_S390=m
626	639	CONFIG_CRYPTO_CRC32_S390=y
627		−CONFIG_ASYMMETRIC_KEY_TYPE=y
628		−CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=m
629		−CONFIG_X509_CERTIFICATE_PARSER=m
630	640	CONFIG_CRC7=m
631	641	CONFIG_CRC8=m
632	642	CONFIG_CORDIC=m

arch/s390/configs/performance_defconfig+21−12

@@ -65,6 +65,7 @@ CONFIG_TRANSPARENT_HUGEPAGE=y · 64 unmodified lines
65	65	CONFIG_CLEANCACHE=y
66	66	CONFIG_FRONTSWAP=y
67	67	CONFIG_CMA=y
	68	+CONFIG_MEM_SOFT_DIRTY=y
68	69	CONFIG_ZSWAP=y
69	70	CONFIG_ZBUD=m
70	71	CONFIG_ZSMALLOC=m
@@ -136,8 +137,6 @@ CONFIG_NF_CONNTRACK_SECMARK=y · 65 unmodified lines
136	137	CONFIG_NF_CONNTRACK_EVENTS=y
137	138	CONFIG_NF_CONNTRACK_TIMEOUT=y
138	139	CONFIG_NF_CONNTRACK_TIMESTAMP=y
139		−CONFIG_NF_CT_PROTO_DCCP=m
140		−CONFIG_NF_CT_PROTO_UDPLITE=m
141	140	CONFIG_NF_CONNTRACK_AMANDA=m
142	141	CONFIG_NF_CONNTRACK_FTP=m
143	142	CONFIG_NF_CONNTRACK_H323=m
@@ -154,13 +153,12 @@ CONFIG_NF_TABLES=m · 10 unmodified lines
154	153	CONFIG_NFT_EXTHDR=m
155	154	CONFIG_NFT_META=m
156	155	CONFIG_NFT_CT=m
157		−CONFIG_NFT_RBTREE=m
158		−CONFIG_NFT_HASH=m
159	156	CONFIG_NFT_COUNTER=m
160	157	CONFIG_NFT_LOG=m
161	158	CONFIG_NFT_LIMIT=m
162	159	CONFIG_NFT_NAT=m
163	160	CONFIG_NFT_COMPAT=m
	161	+CONFIG_NFT_HASH=m
164	162	CONFIG_NETFILTER_XT_SET=m
165	163	CONFIG_NETFILTER_XT_TARGET_AUDIT=m
166	164	CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
@@ -214,7 +212,6 @@ CONFIG_NETFILTER_XT_MATCH_QUOTA=m · 47 unmodified lines
214	212	CONFIG_NETFILTER_XT_MATCH_RATEEST=m
215	213	CONFIG_NETFILTER_XT_MATCH_REALM=m
216	214	CONFIG_NETFILTER_XT_MATCH_RECENT=m
217		−CONFIG_NETFILTER_XT_MATCH_SOCKET=m
218	215	CONFIG_NETFILTER_XT_MATCH_STATE=m
219	216	CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
220	217	CONFIG_NETFILTER_XT_MATCH_STRING=m
@@ -253,7 +250,6 @@ CONFIG_IP_VS_NQ=m · 32 unmodified lines
253	250	CONFIG_IP_VS_FTP=m
254	251	CONFIG_IP_VS_PE_SIP=m
255	252	CONFIG_NF_CONNTRACK_IPV4=m
256		−# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set
257	253	CONFIG_NF_TABLES_IPV4=m
258	254	CONFIG_NFT_CHAIN_ROUTE_IPV4=m
259	255	CONFIG_NF_TABLES_ARP=m
@@ -430,7 +426,6 @@ CONFIG_EQUALIZER=m · 170 unmodified lines
430	426	CONFIG_IFB=m
431	427	CONFIG_MACVLAN=m
432	428	CONFIG_MACVTAP=m
433		−CONFIG_IPVLAN=m
434	429	CONFIG_VXLAN=m
435	430	CONFIG_TUN=m
436	431	CONFIG_VETH=m
@@ -474,6 +469,7 @@ CONFIG_VIRTIO_BALLOON=m · 37 unmodified lines
474	469	CONFIG_EXT4_FS=y
475	470	CONFIG_EXT4_FS_POSIX_ACL=y
476	471	CONFIG_EXT4_FS_SECURITY=y
	472	+CONFIG_EXT4_ENCRYPTION=y
477	473	CONFIG_JBD2_DEBUG=y
478	474	CONFIG_JFS_FS=m
479	475	CONFIG_JFS_POSIX_ACL=y
@@ -496,6 +492,7 @@ CONFIG_AUTOFS4_FS=m · 16 unmodified lines
496	492	CONFIG_FUSE_FS=y
497	493	CONFIG_CUSE=m
498	494	CONFIG_OVERLAY_FS=m
	495	+CONFIG_OVERLAY_FS_REDIRECT_DIR=y
499	496	CONFIG_FSCACHE=m
500	497	CONFIG_CACHEFILES=m
501	498	CONFIG_ISO9660_FS=y
@@ -563,12 +560,16 @@ CONFIG_STACK_TRACER=y · 61 unmodified lines
563	560	CONFIG_BLK_DEV_IO_TRACE=y
564	561	CONFIG_UPROBE_EVENT=y
565	562	CONFIG_FUNCTION_PROFILER=y
	563	+CONFIG_HIST_TRIGGERS=y
566	564	CONFIG_TRACE_ENUM_MAP_FILE=y
567	565	CONFIG_LKDTM=m
568	566	CONFIG_PERCPU_TEST=m
569	567	CONFIG_ATOMIC64_SELFTEST=y
570	568	CONFIG_TEST_BPF=m
	569	+CONFIG_BUG_ON_DATA_CORRUPTION=y
571	570	CONFIG_S390_PTDUMP=y
	571	+CONFIG_PERSISTENT_KEYRINGS=y
	572	+CONFIG_BIG_KEYS=y
572	573	CONFIG_ENCRYPTED_KEYS=m
573	574	CONFIG_SECURITY=y
574	575	CONFIG_SECURITY_NETWORK=y
@@ -576,18 +577,25 @@ CONFIG_SECURITY_SELINUX=y · 1 unmodified line
576	577	CONFIG_SECURITY_SELINUX_BOOTPARAM=y
577	578	CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0
578	579	CONFIG_SECURITY_SELINUX_DISABLE=y
	580	+CONFIG_INTEGRITY_SIGNATURE=y
	581	+CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y
579	582	CONFIG_IMA=y
	583	+CONFIG_IMA_WRITE_POLICY=y
580	584	CONFIG_IMA_APPRAISE=y
	585	+CONFIG_CRYPTO_DH=m
	586	+CONFIG_CRYPTO_ECDH=m
581	587	CONFIG_CRYPTO_USER=m
582	588	# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
	589	+CONFIG_CRYPTO_PCRYPT=m
583	590	CONFIG_CRYPTO_CRYPTD=m
	591	+CONFIG_CRYPTO_MCRYPTD=m
584	592	CONFIG_CRYPTO_TEST=m
585	593	CONFIG_CRYPTO_CCM=m
586	594	CONFIG_CRYPTO_GCM=m
587		−CONFIG_CRYPTO_CTS=m
	595	+CONFIG_CRYPTO_CHACHA20POLY1305=m
588	596	CONFIG_CRYPTO_LRW=m
589	597	CONFIG_CRYPTO_PCBC=m
590		−CONFIG_CRYPTO_XTS=m
	598	+CONFIG_CRYPTO_KEYWRAP=m
591	599	CONFIG_CRYPTO_XCBC=m
592	600	CONFIG_CRYPTO_VMAC=m
593	601	CONFIG_CRYPTO_CRC32=m
@@ -597,6 +605,7 @@ CONFIG_CRYPTO_RMD160=m · 3 unmodified lines
597	605	CONFIG_CRYPTO_RMD256=m
598	606	CONFIG_CRYPTO_RMD320=m
599	607	CONFIG_CRYPTO_SHA512=m
	608	+CONFIG_CRYPTO_SHA3=m
600	609	CONFIG_CRYPTO_TGR192=m
601	610	CONFIG_CRYPTO_WP512=m
602	611	CONFIG_CRYPTO_ANUBIS=m
@@ -611,10 +620,13 @@ CONFIG_CRYPTO_SEED=m · 8 unmodified lines
611	620	CONFIG_CRYPTO_SERPENT=m
612	621	CONFIG_CRYPTO_TEA=m
613	622	CONFIG_CRYPTO_TWOFISH=m
	623	+CONFIG_CRYPTO_842=m
614	624	CONFIG_CRYPTO_LZ4=m
615	625	CONFIG_CRYPTO_LZ4HC=m
616	626	CONFIG_CRYPTO_USER_API_HASH=m
617	627	CONFIG_CRYPTO_USER_API_SKCIPHER=m
	628	+CONFIG_CRYPTO_USER_API_RNG=m
	629	+CONFIG_CRYPTO_USER_API_AEAD=m
618	630	CONFIG_ZCRYPT=m
619	631	CONFIG_CRYPTO_SHA1_S390=m
620	632	CONFIG_CRYPTO_SHA256_S390=m
@@ -623,9 +635,6 @@ CONFIG_CRYPTO_DES_S390=m · 2 unmodified lines
623	635	CONFIG_CRYPTO_AES_S390=m
624	636	CONFIG_CRYPTO_GHASH_S390=m
625	637	CONFIG_CRYPTO_CRC32_S390=y
626		−CONFIG_ASYMMETRIC_KEY_TYPE=y
627		−CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=m
628		−CONFIG_X509_CERTIFICATE_PARSER=m
629	638	CONFIG_CRC7=m
630	639	CONFIG_CRC8=m
631	640	CONFIG_CORDIC=m

arch/s390/defconfig+3−2

@@ -38,7 +38,6 @@ CONFIG_JUMP_LABEL=y · 37 unmodified lines
38	38	CONFIG_STATIC_KEYS_SELFTEST=y
39	39	CONFIG_MODULES=y
40	40	CONFIG_MODULE_UNLOAD=y
41		−CONFIG_MODVERSIONS=y
42	41	CONFIG_BLK_DEV_INTEGRITY=y
43	42	CONFIG_PARTITION_ADVANCED=y
44	43	CONFIG_IBM_PARTITION=y
@@ -130,8 +129,11 @@ CONFIG_DUMMY=m · 85 unmodified lines
130	129	CONFIG_EQUALIZER=m
131	130	CONFIG_TUN=m
132	131	CONFIG_VIRTIO_NET=y
	132	+# CONFIG_NET_VENDOR_ALACRITECH is not set
	133	+# CONFIG_NET_VENDOR_SOLARFLARE is not set
133	134	# CONFIG_INPUT is not set
134	135	# CONFIG_SERIO is not set
	136	+CONFIG_DEVKMEM=y
135	137	CONFIG_RAW_DRIVER=m
136	138	CONFIG_VIRTIO_BALLOON=y
137	139	CONFIG_EXT4_FS=y
@@ -183,7 +185,6 @@ CONFIG_TRACE_ENUM_MAP_FILE=y · 45 unmodified lines
183	185	CONFIG_KPROBES_SANITY_TEST=y
184	186	CONFIG_S390_PTDUMP=y
185	187	CONFIG_CRYPTO_CRYPTD=m
186		−CONFIG_CRYPTO_AUTHENC=m
187	188	CONFIG_CRYPTO_TEST=m
188	189	CONFIG_CRYPTO_CCM=m
189	190	CONFIG_CRYPTO_GCM=m

arch/s390/include/asm/ctl_reg.h+3−1

@@ -15,7 +15,9 @@ · 14 unmodified lines
15	15	BUILD_BUG_ON(sizeof(addrtype) != (high - low + 1) * sizeof(long));\
16	16	asm volatile( \
17	17	" lctlg %1,%2,%0\n" \
18		− : : "Q" ((addrtype )(&array)), "i" (low), "i" (high));\
	18	+ : \
	19	+ : "Q" ((addrtype )(&array)), "i" (low), "i" (high) \
	20	+ : "memory"); \
19	21	}
20	22
21	23	#define __ctl_store(array, low, high) { \

arch/x86/events/amd/ibs.c+1−1

@@ -1010,7 +1010,7 @@ static __init int amd_ibs_init(void) · 1009 unmodified lines
1010	1010	* all online cpus.
1011	1011	*/
1012	1012	cpuhp_setup_state(CPUHP_AP_PERF_X86_AMD_IBS_STARTING,
1013		− "perf/x86/amd/ibs:STARTING",
	1013	+ "perf/x86/amd/ibs:starting",
1014	1014	x86_pmu_amd_ibs_starting_cpu,
1015	1015	x86_pmu_amd_ibs_dying_cpu);
1016	1016

arch/x86/events/intel/core.c+5−2

@@ -3176,13 +3176,16 @@ static void intel_pmu_cpu_starting(int cpu) · 3175 unmodified lines
3176	3176
3177	3177	if (x86_pmu.flags & PMU_FL_EXCL_CNTRS) {
3178	3178	for_each_cpu(i, topology_sibling_cpumask(cpu)) {
	3179	+ struct cpu_hw_events *sibling;
3179	3180	struct intel_excl_cntrs *c;
3180	3181
3181		− c = per_cpu(cpu_hw_events, i).excl_cntrs;
	3182	+ sibling = &per_cpu(cpu_hw_events, i);
	3183	+ c = sibling->excl_cntrs;
3182	3184	if (c && c->core_id == core_id) {
3183	3185	cpuc->kfree_on_online[1] = cpuc->excl_cntrs;
3184	3186	cpuc->excl_cntrs = c;
3185		− cpuc->excl_thread_id = 1;
	3187	+ if (!sibling->excl_thread_id)
	3188	+ cpuc->excl_thread_id = 1;
3186	3189	break;
3187	3190	}
3188	3191	}

arch/x86/kernel/apic/io_apic.c+2−0

@@ -1875,6 +1875,7 @@ static struct irq_chip ioapic_chip __read_mostly = { · 1874 unmodified lines
1875	1875	.irq_ack = irq_chip_ack_parent,
1876	1876	.irq_eoi = ioapic_ack_level,
1877	1877	.irq_set_affinity = ioapic_set_affinity,
	1878	+ .irq_retrigger = irq_chip_retrigger_hierarchy,
1878	1879	.flags = IRQCHIP_SKIP_SET_WAKE,
1879	1880	};
1880	1881
@@ -1886,6 +1887,7 @@ static struct irq_chip ioapic_ir_chip __read_mostly = { · 5 unmodified lines
1886	1887	.irq_ack = irq_chip_ack_parent,
1887	1888	.irq_eoi = ioapic_ir_ack_level,
1888	1889	.irq_set_affinity = ioapic_set_affinity,
	1890	+ .irq_retrigger = irq_chip_retrigger_hierarchy,
1889	1891	.flags = IRQCHIP_SKIP_SET_WAKE,
1890	1892	};
1891	1893

arch/x86/kvm/x86.c+2−1

@@ -6263,7 +6263,8 @@ static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt) · 6262 unmodified lines
6263	6263
6264	6264	kvm_x86_ops->patch_hypercall(vcpu, instruction);
6265	6265
6266		− return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
	6266	+ return emulator_write_emulated(ctxt, rip, instruction, 3,
	6267	+ &ctxt->exception);
6267	6268	}
6268	6269
6269	6270	static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)

arch/x86/pci/acpi.c+10−0

@@ -114,6 +114,16 @@ static const struct dmi_system_id pci_crs_quirks[] __initconst = { · 113 unmodified lines
114	114	DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"),
115	115	},
116	116	},
	117	+ /* https://bugzilla.kernel.org/show_bug.cgi?id=42606 */
	118	+ {
	119	+ .callback = set_nouse_crs,
	120	+ .ident = "Supermicro X8DTH",
	121	+ .matches = {
	122	+ DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
	123	+ DMI_MATCH(DMI_PRODUCT_NAME, "X8DTH-i/6/iF/6F"),
	124	+ DMI_MATCH(DMI_BIOS_VERSION, "2.0a"),
	125	+ },
	126	+ },
117	127
118	128	/* https://bugzilla.kernel.org/show_bug.cgi?id=15362 */
119	129	{

block/blk-mq.c+0−1

@@ -912,7 +912,6 @@ bool blk_mq_dispatch_rq_list(struct blk_mq_hw_ctx hctx, struct list_head list) · 911 unmodified lines
912	912	static void blk_mq_process_rq_list(struct blk_mq_hw_ctx *hctx)
913	913	{
914	914	LIST_HEAD(rq_list);
915		− LIST_HEAD(driver_list);
916	915
917	916	if (unlikely(blk_mq_hctx_stopped(hctx)))
918	917	return;

drivers/block/nbd.c+2−4

@@ -271,7 +271,7 @@ static inline int sock_send_bvec(struct nbd_device *nbd, int index, · 270 unmodified lines
271	271	static int nbd_send_cmd(struct nbd_device nbd, struct nbd_cmd cmd, int index)
272	272	{
273	273	struct request *req = blk_mq_rq_from_pdu(cmd);
274		− int result, flags;
	274	+ int result;
275	275	struct nbd_request request;
276	276	unsigned long size = blk_rq_bytes(req);
277	277	struct bio *bio;
@@ -310,7 +310,6 @@ static int nbd_send_cmd(struct nbd_device nbd, struct nbd_cmd cmd, int index) · 32 unmodified lines
310	310	if (type != NBD_CMD_WRITE)
311	311	return 0;
312	312
313		− flags = 0;
314	313	bio = req->bio;
315	314	while (bio) {
316	315	struct bio *next = bio->bi_next;
@@ -319,9 +318,8 @@ static int nbd_send_cmd(struct nbd_device nbd, struct nbd_cmd cmd, int index) · 2 unmodified lines
319	318
320	319	bio_for_each_segment(bvec, bio, iter) {
321	320	bool is_last = !next && bio_iter_last(bvec, iter);
	321	+ int flags = is_last ? 0 : MSG_MORE;
322	322
323		− if (is_last)
324		− flags = MSG_MORE;
325	323	dev_dbg(nbd_to_dev(nbd), "request %p: sending %d bytes data\n",
326	324	cmd, bvec.bv_len);
327	325	result = sock_send_bvec(nbd, index, &bvec, flags);

drivers/char/virtio_console.c+1−1

@@ -1862,7 +1862,7 @@ static void config_work_handler(struct work_struct *work) · 1861 unmodified lines
1862	1862	{
1863	1863	struct ports_device *portdev;
1864	1864
1865		− portdev = container_of(work, struct ports_device, control_work);
	1865	+ portdev = container_of(work, struct ports_device, config_work);
1866	1866	if (!use_multiport(portdev)) {
1867	1867	struct virtio_device *vdev;
1868	1868	struct port *port;

drivers/clk/samsung/clk-exynos5420.c+7−7

@@ -586,7 +586,7 @@ static const struct samsung_gate_clock exynos5800_gate_clks[] __initconst = { · 585 unmodified lines
586	586	GATE(CLK_ACLK550_CAM, "aclk550_cam", "mout_user_aclk550_cam",
587	587	GATE_BUS_TOP, 24, 0, 0),
588	588	GATE(CLK_ACLK432_SCALER, "aclk432_scaler", "mout_user_aclk432_scaler",
589		− GATE_BUS_TOP, 27, 0, 0),
	589	+ GATE_BUS_TOP, 27, CLK_IS_CRITICAL, 0),
590	590	};
591	591
592	592	static const struct samsung_mux_clock exynos5420_mux_clks[] __initconst = {
@@ -956,20 +956,20 @@ static const struct samsung_gate_clock exynos5x_gate_clks[] __initconst = { · 363 unmodified lines
956	956	GATE(CLK_SMMU_G2D, "smmu_g2d", "aclk333_g2d", GATE_IP_G2D, 7, 0, 0),
957	957
958	958	GATE(0, "aclk200_fsys", "mout_user_aclk200_fsys",
959		− GATE_BUS_FSYS0, 9, CLK_IGNORE_UNUSED, 0),
	959	+ GATE_BUS_FSYS0, 9, CLK_IS_CRITICAL, 0),
960	960	GATE(0, "aclk200_fsys2", "mout_user_aclk200_fsys2",
961	961	GATE_BUS_FSYS0, 10, CLK_IGNORE_UNUSED, 0),
962	962
963	963	GATE(0, "aclk333_g2d", "mout_user_aclk333_g2d",
964	964	GATE_BUS_TOP, 0, CLK_IGNORE_UNUSED, 0),
965	965	GATE(0, "aclk266_g2d", "mout_user_aclk266_g2d",
966		− GATE_BUS_TOP, 1, CLK_IGNORE_UNUSED, 0),
	966	+ GATE_BUS_TOP, 1, CLK_IS_CRITICAL, 0),
967	967	GATE(0, "aclk300_jpeg", "mout_user_aclk300_jpeg",
968	968	GATE_BUS_TOP, 4, CLK_IGNORE_UNUSED, 0),
969	969	GATE(0, "aclk333_432_isp0", "mout_user_aclk333_432_isp0",
970	970	GATE_BUS_TOP, 5, 0, 0),
971	971	GATE(0, "aclk300_gscl", "mout_user_aclk300_gscl",
972		− GATE_BUS_TOP, 6, CLK_IGNORE_UNUSED, 0),
	972	+ GATE_BUS_TOP, 6, CLK_IS_CRITICAL, 0),
973	973	GATE(0, "aclk333_432_gscl", "mout_user_aclk333_432_gscl",
974	974	GATE_BUS_TOP, 7, CLK_IGNORE_UNUSED, 0),
975	975	GATE(0, "aclk333_432_isp", "mout_user_aclk333_432_isp",
@@ -983,20 +983,20 @@ static const struct samsung_gate_clock exynos5x_gate_clks[] __initconst = { · 7 unmodified lines
983	983	GATE(0, "aclk166", "mout_user_aclk166",
984	984	GATE_BUS_TOP, 14, CLK_IGNORE_UNUSED, 0),
985	985	GATE(CLK_ACLK333, "aclk333", "mout_user_aclk333",
986		− GATE_BUS_TOP, 15, CLK_IGNORE_UNUSED, 0),
	986	+ GATE_BUS_TOP, 15, CLK_IS_CRITICAL, 0),
987	987	GATE(0, "aclk400_isp", "mout_user_aclk400_isp",
988	988	GATE_BUS_TOP, 16, 0, 0),
989	989	GATE(0, "aclk400_mscl", "mout_user_aclk400_mscl",
990	990	GATE_BUS_TOP, 17, 0, 0),
991	991	GATE(0, "aclk200_disp1", "mout_user_aclk200_disp1",
992		− GATE_BUS_TOP, 18, 0, 0),
	992	+ GATE_BUS_TOP, 18, CLK_IS_CRITICAL, 0),
993	993	GATE(CLK_SCLK_MPHY_IXTAL24, "sclk_mphy_ixtal24", "mphy_refclk_ixtal24",
994	994	GATE_BUS_TOP, 28, 0, 0),
995	995	GATE(CLK_SCLK_HSIC_12M, "sclk_hsic_12m", "ff_hsic_12m",
996	996	GATE_BUS_TOP, 29, 0, 0),
997	997
998	998	GATE(0, "aclk300_disp1", "mout_user_aclk300_disp1",
999		− SRC_MASK_TOP2, 24, 0, 0),
	999	+ SRC_MASK_TOP2, 24, CLK_IS_CRITICAL, 0),
1000	1000
1001	1001	GATE(CLK_MAU_EPLL, "mau_epll", "mout_mau_epll_clk",
1002	1002	SRC_MASK_TOP7, 20, 0, 0),

drivers/clocksource/exynos_mct.c+1−0

@@ -495,6 +495,7 @@ static int exynos4_mct_dying_cpu(unsigned int cpu) · 494 unmodified lines
495	495	if (mct_int_type == MCT_INT_SPI) {
496	496	if (evt->irq != -1)
497	497	disable_irq_nosync(evt->irq);
	498	+ exynos4_mct_write(0x1, mevt->base + MCT_L_INT_CSTAT_OFFSET);
498	499	} else {
499	500	disable_percpu_irq(mct_irqs[MCT_L0_IRQ]);
500	501	}

drivers/hid/hid-corsair.c+45−15

@@ -148,26 +148,36 @@ static enum led_brightness k90_backlight_get(struct led_classdev *led_cdev) · 147 unmodified lines
148	148	struct usb_interface *usbif = to_usb_interface(dev->parent);
149	149	struct usb_device *usbdev = interface_to_usbdev(usbif);
150	150	int brightness;
151		− char data[8];
	151	+ char *data;
	152	+
	153	+ data = kmalloc(8, GFP_KERNEL);
	154	+ if (!data)
	155	+ return -ENOMEM;
152	156
153	157	ret = usb_control_msg(usbdev, usb_rcvctrlpipe(usbdev, 0),
154	158	K90_REQUEST_STATUS,
155	159	USB_DIR_IN \| USB_TYPE_VENDOR \|
156	160	USB_RECIP_DEVICE, 0, 0, data, 8,
157	161	USB_CTRL_SET_TIMEOUT);
158		− if (ret < 0) {
	162	+ if (ret < 5) {
159	163	dev_warn(dev, "Failed to get K90 initial state (error %d).\n",
160	164	ret);
161		− return -EIO;
	165	+ ret = -EIO;
	166	+ goto out;
162	167	}
163	168	brightness = data[4];
164	169	if (brightness < 0 \|\| brightness > 3) {
165	170	dev_warn(dev,
166	171	"Read invalid backlight brightness: %02hhx.\n",
167	172	data[4]);
168		− return -EIO;
	173	+ ret = -EIO;
	174	+ goto out;
169	175	}
170		− return brightness;
	176	+ ret = brightness;
	177	+out:
	178	+ kfree(data);
	179	+
	180	+ return ret;
171	181	}
172	182
173	183	static enum led_brightness k90_record_led_get(struct led_classdev *led_cdev)
@@ -253,17 +263,22 @@ static ssize_t k90_show_macro_mode(struct device *dev, · 79 unmodified lines
253	263	struct usb_interface *usbif = to_usb_interface(dev->parent);
254	264	struct usb_device *usbdev = interface_to_usbdev(usbif);
255	265	const char *macro_mode;
256		− char data[8];
	266	+ char *data;
	267	+
	268	+ data = kmalloc(2, GFP_KERNEL);
	269	+ if (!data)
	270	+ return -ENOMEM;
257	271
258	272	ret = usb_control_msg(usbdev, usb_rcvctrlpipe(usbdev, 0),
259	273	K90_REQUEST_GET_MODE,
260	274	USB_DIR_IN \| USB_TYPE_VENDOR \|
261	275	USB_RECIP_DEVICE, 0, 0, data, 2,
262	276	USB_CTRL_SET_TIMEOUT);
263		− if (ret < 0) {
	277	+ if (ret < 1) {
264	278	dev_warn(dev, "Failed to get K90 initial mode (error %d).\n",
265	279	ret);
266		− return -EIO;
	280	+ ret = -EIO;
	281	+ goto out;
267	282	}
268	283
269	284	switch (data[0]) {
@@ -277,10 +292,15 @@ static ssize_t k90_show_macro_mode(struct device *dev, · 7 unmodified lines
277	292	default:
278	293	dev_warn(dev, "K90 in unknown mode: %02hhx.\n",
279	294	data[0]);
280		− return -EIO;
	295	+ ret = -EIO;
	296	+ goto out;
281	297	}
282	298
283		− return snprintf(buf, PAGE_SIZE, "%s\n", macro_mode);
	299	+ ret = snprintf(buf, PAGE_SIZE, "%s\n", macro_mode);
	300	+out:
	301	+ kfree(data);
	302	+
	303	+ return ret;
284	304	}
285	305
286	306	static ssize_t k90_store_macro_mode(struct device *dev,
@@ -320,26 +340,36 @@ static ssize_t k90_show_current_profile(struct device *dev, · 33 unmodified lines
320	340	struct usb_interface *usbif = to_usb_interface(dev->parent);
321	341	struct usb_device *usbdev = interface_to_usbdev(usbif);
322	342	int current_profile;
323		− char data[8];
	343	+ char *data;
	344	+
	345	+ data = kmalloc(8, GFP_KERNEL);
	346	+ if (!data)
	347	+ return -ENOMEM;
324	348
325	349	ret = usb_control_msg(usbdev, usb_rcvctrlpipe(usbdev, 0),
326	350	K90_REQUEST_STATUS,
327	351	USB_DIR_IN \| USB_TYPE_VENDOR \|
328	352	USB_RECIP_DEVICE, 0, 0, data, 8,
329	353	USB_CTRL_SET_TIMEOUT);
330		− if (ret < 0) {
	354	+ if (ret < 8) {
331	355	dev_warn(dev, "Failed to get K90 initial state (error %d).\n",
332	356	ret);
333		− return -EIO;
	357	+ ret = -EIO;
	358	+ goto out;
334	359	}
335	360	current_profile = data[7];
336	361	if (current_profile < 1 \|\| current_profile > 3) {
337	362	dev_warn(dev, "Read invalid current profile: %02hhx.\n",
338	363	data[7]);
339		− return -EIO;
	364	+ ret = -EIO;
	365	+ goto out;
340	366	}
341	367
342		− return snprintf(buf, PAGE_SIZE, "%d\n", current_profile);
	368	+ ret = snprintf(buf, PAGE_SIZE, "%d\n", current_profile);
	369	+out:
	370	+ kfree(data);
	371	+
	372	+ return ret;
343	373	}
344	374
345	375	static ssize_t k90_store_current_profile(struct device *dev,

drivers/hid/wacom_sys.c+8−8

@@ -740,6 +740,11 @@ static int wacom_add_shared_data(struct hid_device *hdev) · 739 unmodified lines
740	740	return retval;
741	741	}
742	742
	743	+ if (wacom_wac->features.device_type & WACOM_DEVICETYPE_TOUCH)
	744	+ wacom_wac->shared->touch = hdev;
	745	+ else if (wacom_wac->features.device_type & WACOM_DEVICETYPE_PEN)
	746	+ wacom_wac->shared->pen = hdev;
	747	+
743	748	out:
744	749	mutex_unlock(&wacom_udev_list_lock);
745	750	return retval;
@@ -2036,10 +2041,6 @@ static int wacom_parse_and_register(struct wacom *wacom, bool wireless) · 1290 unmodified lines
2036	2041	if (error)
2037	2042	goto fail;
2038	2043
2039		− error = wacom_add_shared_data(hdev);
2040		− if (error)
2041		− goto fail;
2042		−
2043	2044	/*
2044	2045	* Bamboo Pad has a generic hid handling for the Pen, and we switch it
2045	2046	* into debug mode for the touch part.
@@ -2080,10 +2081,9 @@ static int wacom_parse_and_register(struct wacom *wacom, bool wireless) · 34 unmodified lines
2080	2081
2081	2082	wacom_update_name(wacom, wireless ? " (WL)" : "");
2082	2083
2083		− if (wacom_wac->features.device_type & WACOM_DEVICETYPE_TOUCH)
2084		− wacom_wac->shared->touch = hdev;
2085		− else if (wacom_wac->features.device_type & WACOM_DEVICETYPE_PEN)
2086		− wacom_wac->shared->pen = hdev;
	2084	+ error = wacom_add_shared_data(hdev);
	2085	+ if (error)
	2086	+ goto fail;
2087	2087
2088	2088	if (!(features->device_type & WACOM_DEVICETYPE_WL_MONITOR) &&
2089	2089	(features->quirks & WACOM_QUIRK_BATTERY)) {

drivers/hid/wacom_wac.c+10−0

@@ -2187,6 +2187,16 @@ void wacom_wac_report(struct hid_device hdev, struct hid_report report) · 2186 unmodified lines
2187	2187
2188	2188	wacom_report_events(hdev, report);
2189	2189
	2190	+ /*
	2191	+ * Non-input reports may be sent prior to the device being
	2192	+ * completely initialized. Since only their events need
	2193	+ * to be processed, exit after 'wacom_report_events' has
	2194	+ * been called to prevent potential crashes in the report-
	2195	+ * processing functions.
	2196	+ */
	2197	+ if (report->type != HID_INPUT_REPORT)
	2198	+ return;
	2199	+
2190	2200	if (WACOM_PAD_FIELD(field)) {
2191	2201	wacom_wac_pad_battery_report(hdev, report);
2192	2202	if (wacom->wacom_wac.pad_input)

drivers/mmc/core/mmc_ops.c+12−13

@@ -506,9 +506,6 @@ static int mmc_poll_for_busy(struct mmc_card *card, unsigned int timeout_ms, · 505 unmodified lines
506	506	}
507	507	} while (busy);
508	508
509		− if (host->ops->card_busy && send_status)
510		− return mmc_switch_status(card);
511		−
512	509	return 0;
513	510	}
514	511
@@ -577,24 +574,26 @@ int __mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value, · 62 unmodified lines
577	574	if (!use_busy_signal)
578	575	goto out;
579	576
580		− /* Switch to new timing before poll and check switch status. */
581		− if (timing)
582		− mmc_set_timing(host, timing);
583		−
584	577	/If SPI or used HW busy detection above, then we don't need to poll. /
585	578	if (((host->caps & MMC_CAP_WAIT_WHILE_BUSY) && use_r1b_resp) \|\|
586		− mmc_host_is_spi(host)) {
587		− if (send_status)
588		− err = mmc_switch_status(card);
	579	+ mmc_host_is_spi(host))
589	580	goto out_tim;
590		− }
591	581
592	582	/* Let's try to poll to find out when the command is completed. */
593	583	err = mmc_poll_for_busy(card, timeout_ms, send_status, retry_crc_err);
	584	+ if (err)
	585	+ goto out;
594	586
595	587	out_tim:
596		− if (err && timing)
597		− mmc_set_timing(host, old_timing);
	588	+ /* Switch to new timing before check switch status. */
	589	+ if (timing)
	590	+ mmc_set_timing(host, timing);
	591	+
	592	+ if (send_status) {
	593	+ err = mmc_switch_status(card);
	594	+ if (err && timing)
	595	+ mmc_set_timing(host, old_timing);
	596	+ }
598	597	out:
599	598	mmc_retune_release(host);
600	599

drivers/mmc/host/meson-gx-mmc.c+5−3

@@ -578,13 +578,15 @@ static irqreturn_t meson_mmc_irq(int irq, void *dev_id) · 577 unmodified lines
578	578	{
579	579	struct meson_host *host = dev_id;
580	580	struct mmc_request *mrq;
581		− struct mmc_command *cmd = host->cmd;
	581	+ struct mmc_command *cmd;
582	582	u32 irq_en, status, raw_status;
583	583	irqreturn_t ret = IRQ_HANDLED;
584	584
585	585	if (WARN_ON(!host))
586	586	return IRQ_NONE;
587	587
	588	+ cmd = host->cmd;
	589	+
588	590	mrq = host->mrq;
589	591
590	592	if (WARN_ON(!mrq))
@@ -670,10 +672,10 @@ static irqreturn_t meson_mmc_irq_thread(int irq, void *dev_id) · 79 unmodified lines
670	672	int ret = IRQ_HANDLED;
671	673
672	674	if (WARN_ON(!mrq))
673		− ret = IRQ_NONE;
	675	+ return IRQ_NONE;
674	676
675	677	if (WARN_ON(!cmd))
676		− ret = IRQ_NONE;
	678	+ return IRQ_NONE;
677	679
678	680	data = cmd->data;
679	681	if (data) {

drivers/mmc/host/mxs-mmc.c+4−2

@@ -309,6 +309,9 @@ static void mxs_mmc_ac(struct mxs_mmc_host *host) · 308 unmodified lines
309	309	cmd0 = BF_SSP(cmd->opcode, CMD0_CMD);
310	310	cmd1 = cmd->arg;
311	311
	312	+ if (cmd->opcode == MMC_STOP_TRANSMISSION)
	313	+ cmd0 \|= BM_SSP_CMD0_APPEND_8CYC;
	314	+
312	315	if (host->sdio_irq_en) {
313	316	ctrl0 \|= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
314	317	cmd0 \|= BM_SSP_CMD0_CONT_CLKING_EN \| BM_SSP_CMD0_SLOW_CLKING_EN;
@@ -417,8 +420,7 @@ static void mxs_mmc_adtc(struct mxs_mmc_host *host) · 102 unmodified lines
417	420	ssp->base + HW_SSP_BLOCK_SIZE);
418	421	}
419	422
420		− if ((cmd->opcode == MMC_STOP_TRANSMISSION) \|\|
421		− (cmd->opcode == SD_IO_RW_EXTENDED))
	423	+ if (cmd->opcode == SD_IO_RW_EXTENDED)
422	424	cmd0 \|= BM_SSP_CMD0_APPEND_8CYC;
423	425
424	426	cmd1 = cmd->arg;

drivers/mmc/host/sdhci-acpi.c+2−1

@@ -395,7 +395,8 @@ static int sdhci_acpi_probe(struct platform_device *pdev) · 394 unmodified lines
395	395	/* Power on the SDHCI controller and its children */
396	396	acpi_device_fix_up_power(device);
397	397	list_for_each_entry(child, &device->children, node)
398		− acpi_device_fix_up_power(child);
	398	+ if (child->status.present && child->status.enabled)
	399	+ acpi_device_fix_up_power(child);
399	400
400	401	if (acpi_bus_get_status(device) \|\| !device->status.present)
401	402	return -ENODEV;

drivers/mtd/nand/Kconfig+2−1

@@ -426,6 +426,7 @@ config MTD_NAND_ORION · 425 unmodified lines
426	426
427	427	config MTD_NAND_OXNAS
428	428	tristate "NAND Flash support for Oxford Semiconductor SoC"
	429	+ depends on HAS_IOMEM
429	430	help
430	431	This enables the NAND flash controller on Oxford Semiconductor SoCs.
431	432
@@ -540,7 +541,7 @@ config MTD_NAND_FSMC · 108 unmodified lines
540	541	Flexible Static Memory Controller (FSMC)
541	542
542	543	config MTD_NAND_XWAY
543		− tristate "Support for NAND on Lantiq XWAY SoC"
	544	+ bool "Support for NAND on Lantiq XWAY SoC"
544	545	depends on LANTIQ && SOC_TYPE_XWAY
545	546	help
546	547	Enables support for NAND Flash chips on Lantiq XWAY SoCs. NAND is attached

drivers/mtd/nand/lpc32xx_mlc.c+1−1

@@ -775,7 +775,7 @@ static int lpc32xx_nand_probe(struct platform_device *pdev) · 774 unmodified lines
775	775	init_completion(&host->comp_controller);
776	776
777	777	host->irq = platform_get_irq(pdev, 0);
778		− if ((host->irq < 0) \|\| (host->irq >= NR_IRQS)) {
	778	+ if (host->irq < 0) {
779	779	dev_err(&pdev->dev, "failed to get platform irq\n");
780	780	res = -EINVAL;
781	781	goto err_exit3;

drivers/mtd/nand/tango_nand.c+3−1

@@ -632,11 +632,13 @@ static int tango_nand_probe(struct platform_device *pdev) · 631 unmodified lines
632	632	if (IS_ERR(nfc->pbus_base))
633	633	return PTR_ERR(nfc->pbus_base);
634	634
	635	+ writel_relaxed(MODE_RAW, nfc->pbus_base + PBUS_PAD_MODE);
	636	+
635	637	clk = clk_get(&pdev->dev, NULL);
636	638	if (IS_ERR(clk))
637	639	return PTR_ERR(clk);
638	640
639		− nfc->chan = dma_request_chan(&pdev->dev, "nfc_sbox");
	641	+ nfc->chan = dma_request_chan(&pdev->dev, "rxtx");
640	642	if (IS_ERR(nfc->chan))
641	643	return PTR_ERR(nfc->chan);
642	644

drivers/mtd/nand/xway_nand.c+1−4

@@ -232,7 +232,6 @@ static const struct of_device_id xway_nand_match[] = { · 231 unmodified lines
232	232	{ .compatible = "lantiq,nand-xway" },
233	233	{},
234	234	};
235		−MODULE_DEVICE_TABLE(of, xway_nand_match);
236	235
237	236	static struct platform_driver xway_nand_driver = {
238	237	.probe = xway_nand_probe,
@@ -243,6 +242,4 @@ static struct platform_driver xway_nand_driver = { · 4 unmodified lines
243	242	},
244	243	};
245	244
246		−module_platform_driver(xway_nand_driver);
247		−
248		−MODULE_LICENSE("GPL");
	245	+builtin_platform_driver(xway_nand_driver);

drivers/net/ethernet/broadcom/bcmsysport.c+18−7

@@ -710,11 +710,8 @@ static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv, · 709 unmodified lines
710	710	unsigned int c_index, last_c_index, last_tx_cn, num_tx_cbs;
711	711	unsigned int pkts_compl = 0, bytes_compl = 0;
712	712	struct bcm_sysport_cb *cb;
713		− struct netdev_queue *txq;
714	713	u32 hw_ind;
715	714
716		− txq = netdev_get_tx_queue(ndev, ring->index);
717		−
718	715	/* Compute how many descriptors have been processed since last call */
719	716	hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
720	717	c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
@@ -745,9 +742,6 @@ static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv, · 24 unmodified lines
745	742
746	743	ring->c_index = c_index;
747	744
748		− if (netif_tx_queue_stopped(txq) && pkts_compl)
749		− netif_tx_wake_queue(txq);
750		−
751	745	netif_dbg(priv, tx_done, ndev,
752	746	"ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
753	747	ring->index, ring->c_index, pkts_compl, bytes_compl);
@@ -759,16 +753,33 @@ static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv, · 5 unmodified lines
759	753	static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
760	754	struct bcm_sysport_tx_ring *ring)
761	755	{
	756	+ struct netdev_queue *txq;
762	757	unsigned int released;
763	758	unsigned long flags;
764	759
	760	+ txq = netdev_get_tx_queue(priv->netdev, ring->index);
	761	+
765	762	spin_lock_irqsave(&ring->lock, flags);
766	763	released = __bcm_sysport_tx_reclaim(priv, ring);
	764	+ if (released)
	765	+ netif_tx_wake_queue(txq);
	766	+
767	767	spin_unlock_irqrestore(&ring->lock, flags);
768	768
769	769	return released;
770	770	}
771	771
	772	+/* Locked version of the per-ring TX reclaim, but does not wake the queue */
	773	+static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv,
	774	+ struct bcm_sysport_tx_ring *ring)
	775	+{
	776	+ unsigned long flags;
	777	+
	778	+ spin_lock_irqsave(&ring->lock, flags);
	779	+ __bcm_sysport_tx_reclaim(priv, ring);
	780	+ spin_unlock_irqrestore(&ring->lock, flags);
	781	+}
	782	+
772	783	static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
773	784	{
774	785	struct bcm_sysport_tx_ring *ring =
@@ -1252,7 +1263,7 @@ static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv, · 477 unmodified lines
1252	1263	napi_disable(&ring->napi);
1253	1264	netif_napi_del(&ring->napi);
1254	1265
1255		− bcm_sysport_tx_reclaim(priv, ring);
	1266	+ bcm_sysport_tx_clean(priv, ring);
1256	1267
1257	1268	kfree(ring->cbs);
1258	1269	ring->cbs = NULL;

drivers/net/ethernet/cavium/thunder/thunder_bgx.c+6−5

@@ -47,8 +47,9 @@ struct lmac { · 46 unmodified lines
47	47	struct bgx {
48	48	u8 bgx_id;
49	49	struct lmac lmac[MAX_LMAC_PER_BGX];
50		− int lmac_count;
	50	+ u8 lmac_count;
51	51	u8 max_lmac;
	52	+ u8 acpi_lmac_idx;
52	53	void __iomem *reg_base;
53	54	struct pci_dev *pdev;
54	55	bool is_dlm;
@@ -1143,13 +1144,13 @@ static acpi_status bgx_acpi_register_phy(acpi_handle handle, · 1088 unmodified lines
1143	1144	if (acpi_bus_get_device(handle, &adev))
1144	1145	goto out;
1145	1146
1146		− acpi_get_mac_address(dev, adev, bgx->lmac[bgx->lmac_count].mac);
	1147	+ acpi_get_mac_address(dev, adev, bgx->lmac[bgx->acpi_lmac_idx].mac);
1147	1148
1148		− SET_NETDEV_DEV(&bgx->lmac[bgx->lmac_count].netdev, dev);
	1149	+ SET_NETDEV_DEV(&bgx->lmac[bgx->acpi_lmac_idx].netdev, dev);
1149	1150
1150		− bgx->lmac[bgx->lmac_count].lmacid = bgx->lmac_count;
	1151	+ bgx->lmac[bgx->acpi_lmac_idx].lmacid = bgx->acpi_lmac_idx;
	1152	+ bgx->acpi_lmac_idx++; /* move to next LMAC */
1151	1153	out:
1152		− bgx->lmac_count++;
1153	1154	return AE_OK;
1154	1155	}
1155	1156

drivers/net/ethernet/emulex/benet/be_cmds.c+1−1

@@ -1118,7 +1118,7 @@ int be_cmd_pmac_add(struct be_adapter adapter, u8 mac_addr, · 1117 unmodified lines
1118	1118	err:
1119	1119	mutex_unlock(&adapter->mcc_lock);
1120	1120
1121		− if (status == MCC_STATUS_UNAUTHORIZED_REQUEST)
	1121	+ if (base_status(status) == MCC_STATUS_UNAUTHORIZED_REQUEST)
1122	1122	status = -EPERM;
1123	1123
1124	1124	return status;

drivers/net/ethernet/emulex/benet/be_main.c+15−3

@@ -318,6 +318,13 @@ static int be_mac_addr_set(struct net_device netdev, void p) · 317 unmodified lines
318	318	if (ether_addr_equal(addr->sa_data, adapter->dev_mac))
319	319	return 0;
320	320
	321	+ /* BE3 VFs without FILTMGMT privilege are not allowed to set its MAC
	322	+ * address
	323	+ */
	324	+ if (BEx_chip(adapter) && be_virtfn(adapter) &&
	325	+ !check_privilege(adapter, BE_PRIV_FILTMGMT))
	326	+ return -EPERM;
	327	+
321	328	/* if device is not running, copy MAC to netdev->dev_addr */
322	329	if (!netif_running(netdev))
323	330	goto done;
@@ -3609,7 +3616,11 @@ static void be_rx_qs_destroy(struct be_adapter *adapter) · 3285 unmodified lines
3609	3616
3610	3617	static void be_disable_if_filters(struct be_adapter *adapter)
3611	3618	{
3612		− be_dev_mac_del(adapter, adapter->pmac_id[0]);
	3619	+ /* Don't delete MAC on BE3 VFs without FILTMGMT privilege */
	3620	+ if (!BEx_chip(adapter) \|\| !be_virtfn(adapter) \|\|
	3621	+ check_privilege(adapter, BE_PRIV_FILTMGMT))
	3622	+ be_dev_mac_del(adapter, adapter->pmac_id[0]);
	3623	+
3613	3624	be_clear_uc_list(adapter);
3614	3625	be_clear_mc_list(adapter);
3615	3626
@@ -3762,8 +3773,9 @@ static int be_enable_if_filters(struct be_adapter *adapter) · 146 unmodified lines
3762	3773	if (status)
3763	3774	return status;
3764	3775
3765		− /* For BE3 VFs, the PF programs the initial MAC address */
3766		− if (!(BEx_chip(adapter) && be_virtfn(adapter))) {
	3776	+ /* Don't add MAC on BE3 VFs without FILTMGMT privilege */
	3777	+ if (!BEx_chip(adapter) \|\| !be_virtfn(adapter) \|\|
	3778	+ check_privilege(adapter, BE_PRIV_FILTMGMT)) {
3767	3779	status = be_dev_mac_add(adapter, adapter->netdev->dev_addr);
3768	3780	if (status)
3769	3781	return status;

drivers/net/ethernet/mellanox/mlx4/cq.c+20−18

@@ -101,13 +101,19 @@ void mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn) · 100 unmodified lines
101	101	{
102	102	struct mlx4_cq *cq;
103	103
	104	+ rcu_read_lock();
104	105	cq = radix_tree_lookup(&mlx4_priv(dev)->cq_table.tree,
105	106	cqn & (dev->caps.num_cqs - 1));
	107	+ rcu_read_unlock();
	108	+
106	109	if (!cq) {
107	110	mlx4_dbg(dev, "Completion event for bogus CQ %08x\n", cqn);
108	111	return;
109	112	}
110	113
	114	+ /* Acessing the CQ outside of rcu_read_lock is safe, because
	115	+ * the CQ is freed only after interrupt handling is completed.
	116	+ */
111	117	++cq->arm_sn;
112	118
113	119	cq->comp(cq);
@@ -118,23 +124,19 @@ void mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type) · 4 unmodified lines
118	124	struct mlx4_cq_table *cq_table = &mlx4_priv(dev)->cq_table;
119	125	struct mlx4_cq *cq;
120	126
121		− spin_lock(&cq_table->lock);
122		−
	127	+ rcu_read_lock();
123	128	cq = radix_tree_lookup(&cq_table->tree, cqn & (dev->caps.num_cqs - 1));
124		− if (cq)
125		− atomic_inc(&cq->refcount);
126		−
127		− spin_unlock(&cq_table->lock);
	129	+ rcu_read_unlock();
128	130
129	131	if (!cq) {
130		− mlx4_warn(dev, "Async event for bogus CQ %08x\n", cqn);
	132	+ mlx4_dbg(dev, "Async event for bogus CQ %08x\n", cqn);
131	133	return;
132	134	}
133	135
	136	+ /* Acessing the CQ outside of rcu_read_lock is safe, because
	137	+ * the CQ is freed only after interrupt handling is completed.
	138	+ */
134	139	cq->event(cq, event_type);
135		−
136		− if (atomic_dec_and_test(&cq->refcount))
137		− complete(&cq->free);
138	140	}
139	141
140	142	static int mlx4_SW2HW_CQ(struct mlx4_dev dev, struct mlx4_cmd_mailbox mailbox,
@@ -301,9 +303,9 @@ int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, · 160 unmodified lines
301	303	if (err)
302	304	return err;
303	305
304		− spin_lock_irq(&cq_table->lock);
	306	+ spin_lock(&cq_table->lock);
305	307	err = radix_tree_insert(&cq_table->tree, cq->cqn, cq);
306		− spin_unlock_irq(&cq_table->lock);
	308	+ spin_unlock(&cq_table->lock);
307	309	if (err)
308	310	goto err_icm;
309	311
@@ -349,9 +351,9 @@ int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, · 39 unmodified lines
349	351	return 0;
350	352
351	353	err_radix:
352		− spin_lock_irq(&cq_table->lock);
	354	+ spin_lock(&cq_table->lock);
353	355	radix_tree_delete(&cq_table->tree, cq->cqn);
354		− spin_unlock_irq(&cq_table->lock);
	356	+ spin_unlock(&cq_table->lock);
355	357
356	358	err_icm:
357	359	mlx4_cq_free_icm(dev, cq->cqn);
@@ -370,15 +372,15 @@ void mlx4_cq_free(struct mlx4_dev dev, struct mlx4_cq cq) · 12 unmodified lines
370	372	if (err)
371	373	mlx4_warn(dev, "HW2SW_CQ failed (%d) for CQN %06x\n", err, cq->cqn);
372	374
	375	+ spin_lock(&cq_table->lock);
	376	+ radix_tree_delete(&cq_table->tree, cq->cqn);
	377	+ spin_unlock(&cq_table->lock);
	378	+
373	379	synchronize_irq(priv->eq_table.eq[MLX4_CQ_TO_EQ_VECTOR(cq->vector)].irq);
374	380	if (priv->eq_table.eq[MLX4_CQ_TO_EQ_VECTOR(cq->vector)].irq !=
375	381	priv->eq_table.eq[MLX4_EQ_ASYNC].irq)
376	382	synchronize_irq(priv->eq_table.eq[MLX4_EQ_ASYNC].irq);
377	383
378		− spin_lock_irq(&cq_table->lock);
379		− radix_tree_delete(&cq_table->tree, cq->cqn);
380		− spin_unlock_irq(&cq_table->lock);
381		−
382	384	if (atomic_dec_and_test(&cq->refcount))
383	385	complete(&cq->free);
384	386	wait_for_completion(&cq->free);

drivers/net/ethernet/mellanox/mlx4/en_netdev.c+4−1

@@ -1748,8 +1748,11 @@ int mlx4_en_start_port(struct net_device *dev) · 1747 unmodified lines
1748	1748	/* Process all completions if exist to prevent
1749	1749	* the queues freezing if they are full
1750	1750	*/
1751		− for (i = 0; i < priv->rx_ring_num; i++)
	1751	+ for (i = 0; i < priv->rx_ring_num; i++) {
	1752	+ local_bh_disable();
1752	1753	napi_schedule(&priv->rx_cq[i]->napi);
	1754	+ local_bh_enable();
	1755	+ }
1753	1756
1754	1757	netif_tx_start_all_queues(dev);
1755	1758	netif_device_attach(dev);

drivers/net/ethernet/mellanox/mlx4/eq.c+14−9

@@ -554,8 +554,9 @@ static int mlx4_eq_int(struct mlx4_dev dev, struct mlx4_eq eq) · 553 unmodified lines
554	554	break;
555	555
556	556	case MLX4_EVENT_TYPE_SRQ_LIMIT:
557		− mlx4_dbg(dev, "%s: MLX4_EVENT_TYPE_SRQ_LIMIT\n",
558		− __func__);
	557	+ mlx4_dbg(dev, "%s: MLX4_EVENT_TYPE_SRQ_LIMIT. srq_no=0x%x, eq 0x%x\n",
	558	+ __func__, be32_to_cpu(eqe->event.srq.srqn),
	559	+ eq->eqn);
559	560	case MLX4_EVENT_TYPE_SRQ_CATAS_ERROR:
560	561	if (mlx4_is_master(dev)) {
561	562	/* forward only to slave owning the SRQ */
@@ -570,15 +571,19 @@ static int mlx4_eq_int(struct mlx4_dev dev, struct mlx4_eq eq) · 8 unmodified lines
570	571	eq->eqn, eq->cons_index, ret);
571	572	break;
572	573	}
573		− mlx4_warn(dev, "%s: slave:%d, srq_no:0x%x, event: %02x(%02x)\n",
574		− __func__, slave,
575		− be32_to_cpu(eqe->event.srq.srqn),
576		− eqe->type, eqe->subtype);
	574	+ if (eqe->type ==
	575	+ MLX4_EVENT_TYPE_SRQ_CATAS_ERROR)
	576	+ mlx4_warn(dev, "%s: slave:%d, srq_no:0x%x, event: %02x(%02x)\n",
	577	+ __func__, slave,
	578	+ be32_to_cpu(eqe->event.srq.srqn),
	579	+ eqe->type, eqe->subtype);
577	580
578	581	if (!ret && slave != dev->caps.function) {
579		− mlx4_warn(dev, "%s: sending event %02x(%02x) to slave:%d\n",
580		− __func__, eqe->type,
581		− eqe->subtype, slave);
	582	+ if (eqe->type ==
	583	+ MLX4_EVENT_TYPE_SRQ_CATAS_ERROR)
	584	+ mlx4_warn(dev, "%s: sending event %02x(%02x) to slave:%d\n",
	585	+ __func__, eqe->type,
	586	+ eqe->subtype, slave);
582	587	mlx4_slave_event(dev, slave, eqe);
583	588	break;
584	589	}

drivers/net/ethernet/mellanox/mlx4/resource_tracker.c+3−2

@@ -2980,6 +2980,9 @@ int mlx4_RST2INIT_QP_wrapper(struct mlx4_dev *dev, int slave, · 2979 unmodified lines
2980	2980	put_res(dev, slave, srqn, RES_SRQ);
2981	2981	qp->srq = srq;
2982	2982	}
	2983	+
	2984	+ /* Save param3 for dynamic changes from VST back to VGT */
	2985	+ qp->param3 = qpc->param3;
2983	2986	put_res(dev, slave, rcqn, RES_CQ);
2984	2987	put_res(dev, slave, mtt_base, RES_MTT);
2985	2988	res_end_move(dev, slave, RES_QP, qpn);
@@ -3772,7 +3775,6 @@ int mlx4_INIT2RTR_QP_wrapper(struct mlx4_dev *dev, int slave, · 786 unmodified lines
3772	3775	int qpn = vhcr->in_modifier & 0x7fffff;
3773	3776	struct res_qp *qp;
3774	3777	u8 orig_sched_queue;
3775		− __be32 orig_param3 = qpc->param3;
3776	3778	u8 orig_vlan_control = qpc->pri_path.vlan_control;
3777	3779	u8 orig_fvl_rx = qpc->pri_path.fvl_rx;
3778	3780	u8 orig_pri_path_fl = qpc->pri_path.fl;
@@ -3814,7 +3816,6 @@ out: · 35 unmodified lines
3814	3816	*/
3815	3817	if (!err) {
3816	3818	qp->sched_queue = orig_sched_queue;
3817		− qp->param3 = orig_param3;
3818	3819	qp->vlan_control = orig_vlan_control;
3819	3820	qp->fvl_rx = orig_fvl_rx;
3820	3821	qp->pri_path_fl = orig_pri_path_fl;

drivers/net/ethernet/mellanox/mlx5/core/en_tc.c+7−4

@@ -668,9 +668,12 @@ static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv, · 667 unmodified lines
668	668	int ttl;
669	669
670	670	#if IS_ENABLED(CONFIG_INET)
	671	+ int ret;
	672	+
671	673	rt = ip_route_output_key(dev_net(mirred_dev), fl4);
672		− if (IS_ERR(rt))
673		− return PTR_ERR(rt);
	674	+ ret = PTR_ERR_OR_ZERO(rt);
	675	+ if (ret)
	676	+ return ret;
674	677	#else
675	678	return -EOPNOTSUPP;
676	679	#endif
@@ -741,8 +744,8 @@ static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv, · 64 unmodified lines
741	744	struct flowi4 fl4 = {};
742	745	char *encap_header;
743	746	int encap_size;
744		− __be32 saddr = 0;
745		− int ttl = 0;
	747	+ __be32 saddr;
	748	+ int ttl;
746	749	int err;
747	750
748	751	encap_header = kzalloc(max_encap_size, GFP_KERNEL);

drivers/net/ethernet/mellanox/mlxsw/pci_hw.h+4−4

@@ -209,21 +209,21 @@ MLXSW_ITEM32(pci, eqe, owner, 0x0C, 0, 1); · 208 unmodified lines
209	209	/* pci_eqe_cmd_token
210	210	* Command completion event - token
211	211	*/
212		−MLXSW_ITEM32(pci, eqe, cmd_token, 0x08, 16, 16);
	212	+MLXSW_ITEM32(pci, eqe, cmd_token, 0x00, 16, 16);
213	213
214	214	/* pci_eqe_cmd_status
215	215	* Command completion event - status
216	216	*/
217		−MLXSW_ITEM32(pci, eqe, cmd_status, 0x08, 0, 8);
	217	+MLXSW_ITEM32(pci, eqe, cmd_status, 0x00, 0, 8);
218	218
219	219	/* pci_eqe_cmd_out_param_h
220	220	* Command completion event - output parameter - higher part
221	221	*/
222		−MLXSW_ITEM32(pci, eqe, cmd_out_param_h, 0x0C, 0, 32);
	222	+MLXSW_ITEM32(pci, eqe, cmd_out_param_h, 0x04, 0, 32);
223	223
224	224	/* pci_eqe_cmd_out_param_l
225	225	* Command completion event - output parameter - lower part
226	226	*/
227		−MLXSW_ITEM32(pci, eqe, cmd_out_param_l, 0x10, 0, 32);
	227	+MLXSW_ITEM32(pci, eqe, cmd_out_param_l, 0x08, 0, 32);
228	228
229	229	#endif

drivers/net/ethernet/mellanox/mlxsw/spectrum.c+1−0

@@ -684,6 +684,7 @@ static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb, · 683 unmodified lines
684	684	dev_kfree_skb_any(skb_orig);
685	685	return NETDEV_TX_OK;
686	686	}
	687	+ dev_consume_skb_any(skb_orig);
687	688	}
688	689
689	690	if (eth_skb_pad(skb)) {

drivers/net/ethernet/mellanox/mlxsw/switchx2.c+1−0

@@ -345,6 +345,7 @@ static netdev_tx_t mlxsw_sx_port_xmit(struct sk_buff *skb, · 344 unmodified lines
345	345	dev_kfree_skb_any(skb_orig);
346	346	return NETDEV_TX_OK;
347	347	}
	348	+ dev_consume_skb_any(skb_orig);
348	349	}
349	350	mlxsw_sx_txhdr_construct(skb, &tx_info);
350	351	/* TX header is consumed by HW on the way so we shouldn't count its

drivers/net/ethernet/qualcomm/emac/emac-phy.c+7−0

@@ -201,6 +201,13 @@ int emac_phy_config(struct platform_device pdev, struct emac_adapter adpt) · 200 unmodified lines
201	201	else
202	202	adpt->phydev = mdiobus_get_phy(mii_bus, phy_addr);
203	203
	204	+ /* of_phy_find_device() claims a reference to the phydev,
	205	+ * so we do that here manually as well. When the driver
	206	+ * later unloads, it can unilaterally drop the reference
	207	+ * without worrying about ACPI vs DT.
	208	+ */
	209	+ if (adpt->phydev)
	210	+ get_device(&adpt->phydev->mdio.dev);
204	211	} else {
205	212	struct device_node *phy_np;
206	213

drivers/net/ethernet/qualcomm/emac/emac.c+2−4

@@ -719,8 +719,7 @@ static int emac_probe(struct platform_device *pdev) · 718 unmodified lines
719	719	err_undo_napi:
720	720	netif_napi_del(&adpt->rx_q.napi);
721	721	err_undo_mdiobus:
722		− if (!has_acpi_companion(&pdev->dev))
723		− put_device(&adpt->phydev->mdio.dev);
	722	+ put_device(&adpt->phydev->mdio.dev);
724	723	mdiobus_unregister(adpt->mii_bus);
725	724	err_undo_clocks:
726	725	emac_clks_teardown(adpt);
@@ -740,8 +739,7 @@ static int emac_remove(struct platform_device *pdev) · 13 unmodified lines
740	739
741	740	emac_clks_teardown(adpt);
742	741
743		− if (!has_acpi_companion(&pdev->dev))
744		− put_device(&adpt->phydev->mdio.dev);
	742	+ put_device(&adpt->phydev->mdio.dev);
745	743	mdiobus_unregister(adpt->mii_bus);
746	744	free_netdev(netdev);
747	745

drivers/net/ethernet/renesas/ravb_main.c+15−6

@@ -926,14 +926,10 @@ static int ravb_poll(struct napi_struct *napi, int budget) · 925 unmodified lines
926	926	/* Receive error message handling */
927	927	priv->rx_over_errors = priv->stats[RAVB_BE].rx_over_errors;
928	928	priv->rx_over_errors += priv->stats[RAVB_NC].rx_over_errors;
929		− if (priv->rx_over_errors != ndev->stats.rx_over_errors) {
	929	+ if (priv->rx_over_errors != ndev->stats.rx_over_errors)
930	930	ndev->stats.rx_over_errors = priv->rx_over_errors;
931		− netif_err(priv, rx_err, ndev, "Receive Descriptor Empty\n");
932		− }
933		− if (priv->rx_fifo_errors != ndev->stats.rx_fifo_errors) {
	931	+ if (priv->rx_fifo_errors != ndev->stats.rx_fifo_errors)
934	932	ndev->stats.rx_fifo_errors = priv->rx_fifo_errors;
935		− netif_err(priv, rx_err, ndev, "Receive FIFO Overflow\n");
936		− }
937	933	out:
938	934	return budget - quota;
939	935	}
@@ -1508,6 +1504,19 @@ static netdev_tx_t ravb_start_xmit(struct sk_buff skb, struct net_device ndev) · 568 unmodified lines
1508	1504	buffer = PTR_ALIGN(priv->tx_align[q], DPTR_ALIGN) +
1509	1505	entry / NUM_TX_DESC * DPTR_ALIGN;
1510	1506	len = PTR_ALIGN(skb->data, DPTR_ALIGN) - skb->data;
	1507	+ /* Zero length DMA descriptors are problematic as they seem to
	1508	+ * terminate DMA transfers. Avoid them by simply using a length of
	1509	+ * DPTR_ALIGN (4) when skb data is aligned to DPTR_ALIGN.
	1510	+ *
	1511	+ * As skb is guaranteed to have at least ETH_ZLEN (60) bytes of
	1512	+ * data by the call to skb_put_padto() above this is safe with
	1513	+ * respect to both the length of the first DMA descriptor (len)
	1514	+ * overflowing the available data and the length of the second DMA
	1515	+ * descriptor (skb->len - len) being negative.
	1516	+ */
	1517	+ if (len == 0)
	1518	+ len = DPTR_ALIGN;
	1519	+
1511	1520	memcpy(buffer, skb->data, len);
1512	1521	dma_addr = dma_map_single(ndev->dev.parent, buffer, len, DMA_TO_DEVICE);
1513	1522	if (dma_mapping_error(ndev->dev.parent, dma_addr))

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c+10−9

@@ -3326,9 +3326,9 @@ int stmmac_dvr_probe(struct device *device, · 3325 unmodified lines
3326	3326	(priv->plat->maxmtu >= ndev->min_mtu))
3327	3327	ndev->max_mtu = priv->plat->maxmtu;
3328	3328	else if (priv->plat->maxmtu < ndev->min_mtu)
3329		− netdev_warn(priv->dev,
3330		− "%s: warning: maxmtu having invalid value (%d)\n",
3331		− __func__, priv->plat->maxmtu);
	3329	+ dev_warn(priv->device,
	3330	+ "%s: warning: maxmtu having invalid value (%d)\n",
	3331	+ __func__, priv->plat->maxmtu);
3332	3332
3333	3333	if (flow_ctrl)
3334	3334	priv->flow_ctrl = FLOW_AUTO; /* RX/TX pause on */
@@ -3340,7 +3340,8 @@ int stmmac_dvr_probe(struct device *device, · 5 unmodified lines
3340	3340	*/
3341	3341	if ((priv->synopsys_id >= DWMAC_CORE_3_50) && (!priv->plat->riwt_off)) {
3342	3342	priv->use_riwt = 1;
3343		− netdev_info(priv->dev, "Enable RX Mitigation via HW Watchdog Timer\n");
	3343	+ dev_info(priv->device,
	3344	+ "Enable RX Mitigation via HW Watchdog Timer\n");
3344	3345	}
3345	3346
3346	3347	netif_napi_add(ndev, &priv->napi, stmmac_poll, 64);
@@ -3366,17 +3367,17 @@ int stmmac_dvr_probe(struct device *device, · 19 unmodified lines
3366	3367	/* MDIO bus Registration */
3367	3368	ret = stmmac_mdio_register(ndev);
3368	3369	if (ret < 0) {
3369		− netdev_err(priv->dev,
3370		− "%s: MDIO bus (id: %d) registration failed",
3371		− __func__, priv->plat->bus_id);
	3370	+ dev_err(priv->device,
	3371	+ "%s: MDIO bus (id: %d) registration failed",
	3372	+ __func__, priv->plat->bus_id);
3372	3373	goto error_mdio_register;
3373	3374	}
3374	3375	}
3375	3376
3376	3377	ret = register_netdev(ndev);
3377	3378	if (ret) {
3378		− netdev_err(priv->dev, "%s: ERROR %i registering the device\n",
3379		− __func__, ret);
	3379	+ dev_err(priv->device, "%s: ERROR %i registering the device\n",
	3380	+ __func__, ret);
3380	3381	goto error_netdev_register;
3381	3382	}
3382	3383

drivers/net/ethernet/ti/cpmac.c+1−1

@@ -1210,7 +1210,7 @@ int cpmac_init(void) · 1209 unmodified lines
1210	1210	goto fail_alloc;
1211	1211	}
1212	1212
1213		−#warning FIXME: unhardcode gpio&reset bits
	1213	+ /* FIXME: unhardcode gpio&reset bits */
1214	1214	ar7_gpio_disable(26);
1215	1215	ar7_gpio_disable(27);
1216	1216	ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);

drivers/net/hyperv/netvsc_drv.c+3−0

@@ -659,6 +659,7 @@ int netvsc_recv_callback(struct hv_device *device_obj, · 658 unmodified lines
659	659	* policy filters on the host). Deliver these via the VF
660	660	* interface in the guest.
661	661	*/
	662	+ rcu_read_lock();
662	663	vf_netdev = rcu_dereference(net_device_ctx->vf_netdev);
663	664	if (vf_netdev && (vf_netdev->flags & IFF_UP))
664	665	net = vf_netdev;
@@ -667,6 +668,7 @@ int netvsc_recv_callback(struct hv_device *device_obj, · 2 unmodified lines
667	668	skb = netvsc_alloc_recv_skb(net, packet, csum_info, *data, vlan_tci);
668	669	if (unlikely(!skb)) {
669	670	++net->stats.rx_dropped;
	671	+ rcu_read_unlock();
670	672	return NVSP_STAT_FAIL;
671	673	}
672	674
@@ -696,6 +698,7 @@ int netvsc_recv_callback(struct hv_device *device_obj, · 23 unmodified lines
696	698	* TODO - use NAPI?
697	699	*/
698	700	netif_rx(skb);
	701	+ rcu_read_unlock();
699	702
700	703	return 0;
701	704	}

drivers/net/ieee802154/at86rf230.c+2−2

@@ -1715,9 +1715,9 @@ static int at86rf230_probe(struct spi_device *spi) · 1714 unmodified lines
1715	1715	/* Reset */
1716	1716	if (gpio_is_valid(rstn)) {
1717	1717	udelay(1);
1718		− gpio_set_value(rstn, 0);
	1718	+ gpio_set_value_cansleep(rstn, 0);
1719	1719	udelay(1);
1720		− gpio_set_value(rstn, 1);
	1720	+ gpio_set_value_cansleep(rstn, 1);
1721	1721	usleep_range(120, 240);
1722	1722	}
1723	1723

drivers/net/ieee802154/atusb.c+43−16

@@ -117,13 +117,26 @@ static int atusb_read_reg(struct atusb *atusb, uint8_t reg) · 116 unmodified lines
117	117	{
118	118	struct usb_device *usb_dev = atusb->usb_dev;
119	119	int ret;
	120	+ uint8_t *buffer;
120	121	uint8_t value;
121	122
	123	+ buffer = kmalloc(1, GFP_KERNEL);
	124	+ if (!buffer)
	125	+ return -ENOMEM;
	126	+
122	127	dev_dbg(&usb_dev->dev, "atusb: reg = 0x%x\n", reg);
123	128	ret = atusb_control_msg(atusb, usb_rcvctrlpipe(usb_dev, 0),
124	129	ATUSB_REG_READ, ATUSB_REQ_FROM_DEV,
125		− 0, reg, &value, 1, 1000);
126		− return ret >= 0 ? value : ret;
	130	+ 0, reg, buffer, 1, 1000);
	131	+
	132	+ if (ret >= 0) {
	133	+ value = buffer[0];
	134	+ kfree(buffer);
	135	+ return value;
	136	+ } else {
	137	+ kfree(buffer);
	138	+ return ret;
	139	+ }
127	140	}
128	141
129	142	static int atusb_write_subreg(struct atusb *atusb, uint8_t reg, uint8_t mask,
@@ -549,13 +562,6 @@ static int · 419 unmodified lines
549	562	atusb_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
550	563	{
551	564	struct atusb *atusb = hw->priv;
552		− struct device *dev = &atusb->usb_dev->dev;
553		−
554		− if (atusb->fw_ver_maj == 0 && atusb->fw_ver_min < 3) {
555		− dev_info(dev, "Automatic frame retransmission is only available from "
556		− "firmware version 0.3. Please update if you want this feature.");
557		− return -EINVAL;
558		− }
559	565
560	566	return atusb_write_subreg(atusb, SR_MAX_FRAME_RETRIES, retries);
561	567	}
@@ -608,9 +614,13 @@ static const struct ieee802154_ops atusb_ops = { · 46 unmodified lines
608	614	static int atusb_get_and_show_revision(struct atusb *atusb)
609	615	{
610	616	struct usb_device *usb_dev = atusb->usb_dev;
611		− unsigned char buffer[3];
	617	+ unsigned char *buffer;
612	618	int ret;
613	619
	620	+ buffer = kmalloc(3, GFP_KERNEL);
	621	+ if (!buffer)
	622	+ return -ENOMEM;
	623	+
614	624	/* Get a couple of the ATMega Firmware values */
615	625	ret = atusb_control_msg(atusb, usb_rcvctrlpipe(usb_dev, 0),
616	626	ATUSB_ID, ATUSB_REQ_FROM_DEV, 0, 0,
@@ -631,15 +641,20 @@ static int atusb_get_and_show_revision(struct atusb *atusb) · 14 unmodified lines
631	641	dev_info(&usb_dev->dev, "Please update to version 0.2 or newer");
632	642	}
633	643
	644	+ kfree(buffer);
634	645	return ret;
635	646	}
636	647
637	648	static int atusb_get_and_show_build(struct atusb *atusb)
638	649	{
639	650	struct usb_device *usb_dev = atusb->usb_dev;
640		− char build[ATUSB_BUILD_SIZE + 1];
	651	+ char *build;
641	652	int ret;
642	653
	654	+ build = kmalloc(ATUSB_BUILD_SIZE + 1, GFP_KERNEL);
	655	+ if (!build)
	656	+ return -ENOMEM;
	657	+
643	658	ret = atusb_control_msg(atusb, usb_rcvctrlpipe(usb_dev, 0),
644	659	ATUSB_BUILD, ATUSB_REQ_FROM_DEV, 0, 0,
645	660	build, ATUSB_BUILD_SIZE, 1000);
@@ -648,6 +663,7 @@ static int atusb_get_and_show_build(struct atusb *atusb) · 2 unmodified lines
648	663	dev_info(&usb_dev->dev, "Firmware: build %s\n", build);
649	664	}
650	665
	666	+ kfree(build);
651	667	return ret;
652	668	}
653	669
@@ -698,7 +714,7 @@ fail: · 44 unmodified lines
698	714	static int atusb_set_extended_addr(struct atusb *atusb)
699	715	{
700	716	struct usb_device *usb_dev = atusb->usb_dev;
701		− unsigned char buffer[IEEE802154_EXTENDED_ADDR_LEN];
	717	+ unsigned char *buffer;
702	718	__le64 extended_addr;
703	719	u64 addr;
704	720	int ret;
@@ -710,12 +726,20 @@ static int atusb_set_extended_addr(struct atusb *atusb) · 5 unmodified lines
710	726	return 0;
711	727	}
712	728
	729	+ buffer = kmalloc(IEEE802154_EXTENDED_ADDR_LEN, GFP_KERNEL);
	730	+ if (!buffer)
	731	+ return -ENOMEM;
	732	+
713	733	/* Firmware is new enough so we fetch the address from EEPROM */
714	734	ret = atusb_control_msg(atusb, usb_rcvctrlpipe(usb_dev, 0),
715	735	ATUSB_EUI64_READ, ATUSB_REQ_FROM_DEV, 0, 0,
716	736	buffer, IEEE802154_EXTENDED_ADDR_LEN, 1000);
717		− if (ret < 0)
718		− dev_err(&usb_dev->dev, "failed to fetch extended address\n");
	737	+ if (ret < 0) {
	738	+ dev_err(&usb_dev->dev, "failed to fetch extended address, random address set\n");
	739	+ ieee802154_random_extended_addr(&atusb->hw->phy->perm_extended_addr);
	740	+ kfree(buffer);
	741	+ return ret;
	742	+ }
719	743
720	744	memcpy(&extended_addr, buffer, IEEE802154_EXTENDED_ADDR_LEN);
721	745	/* Check if read address is not empty and the unicast bit is set correctly */
@@ -729,6 +753,7 @@ static int atusb_set_extended_addr(struct atusb *atusb) · 7 unmodified lines
729	753	&addr);
730	754	}
731	755
	756	+ kfree(buffer);
732	757	return ret;
733	758	}
734	759
@@ -770,8 +795,7 @@ static int atusb_probe(struct usb_interface *interface, · 35 unmodified lines
770	795
771	796	hw->parent = &usb_dev->dev;
772	797	hw->flags = IEEE802154_HW_TX_OMIT_CKSUM \| IEEE802154_HW_AFILT \|
773		− IEEE802154_HW_PROMISCUOUS \| IEEE802154_HW_CSMA_PARAMS \|
774		− IEEE802154_HW_FRAME_RETRIES;
	798	+ IEEE802154_HW_PROMISCUOUS \| IEEE802154_HW_CSMA_PARAMS;
775	799
776	800	hw->phy->flags = WPAN_PHY_FLAG_TXPOWER \| WPAN_PHY_FLAG_CCA_ED_LEVEL \|
777	801	WPAN_PHY_FLAG_CCA_MODE;
@@ -800,6 +824,9 @@ static int atusb_probe(struct usb_interface *interface, · 22 unmodified lines
800	824	atusb_get_and_show_build(atusb);
801	825	atusb_set_extended_addr(atusb);
802	826
	827	+ if (atusb->fw_ver_maj >= 0 && atusb->fw_ver_min >= 3)
	828	+ hw->flags \|= IEEE802154_HW_FRAME_RETRIES;
	829	+
803	830	ret = atusb_get_and_clear_error(atusb);
804	831	if (ret) {
805	832	dev_err(&atusb->usb_dev->dev,

drivers/net/phy/dp83867.c+6−2

@@ -132,12 +132,16 @@ static int dp83867_of_init(struct phy_device *phydev) · 131 unmodified lines
132	132
133	133	ret = of_property_read_u32(of_node, "ti,rx-internal-delay",
134	134	&dp83867->rx_id_delay);
135		− if (ret)
	135	+ if (ret &&
	136	+ (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID \|\|
	137	+ phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID))
136	138	return ret;
137	139
138	140	ret = of_property_read_u32(of_node, "ti,tx-internal-delay",
139	141	&dp83867->tx_id_delay);
140		− if (ret)
	142	+ if (ret &&
	143	+ (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID \|\|
	144	+ phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID))
141	145	return ret;
142	146
143	147	return of_property_read_u32(of_node, "ti,fifo-depth",

drivers/net/usb/r8152.c+6−1

@@ -1730,7 +1730,7 @@ static u8 r8152_rx_csum(struct r8152 tp, struct rx_desc rx_desc) · 1729 unmodified lines
1730	1730	u8 checksum = CHECKSUM_NONE;
1731	1731	u32 opts2, opts3;
1732	1732
1733		− if (tp->version == RTL_VER_01 \|\| tp->version == RTL_VER_02)
	1733	+ if (!(tp->netdev->features & NETIF_F_RXCSUM))
1734	1734	goto return_result;
1735	1735
1736	1736	opts2 = le32_to_cpu(rx_desc->opts2);
@@ -4356,6 +4356,11 @@ static int rtl8152_probe(struct usb_interface *intf, · 2619 unmodified lines
4356	4356	NETIF_F_HIGHDMA \| NETIF_F_FRAGLIST \|
4357	4357	NETIF_F_IPV6_CSUM \| NETIF_F_TSO6;
4358	4358
	4359	+ if (tp->version == RTL_VER_01) {
	4360	+ netdev->features &= ~NETIF_F_RXCSUM;
	4361	+ netdev->hw_features &= ~NETIF_F_RXCSUM;
	4362	+ }
	4363	+
4359	4364	netdev->ethtool_ops = &ops;
4360	4365	netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4361	4366

drivers/net/vxlan.c+10−3

@@ -1798,7 +1798,7 @@ static int vxlan_build_skb(struct sk_buff skb, struct dst_entry dst, · 1797 unmodified lines
1798	1798	static struct rtable vxlan_get_route(struct vxlan_dev vxlan, struct net_device *dev,
1799	1799	struct vxlan_sock *sock4,
1800	1800	struct sk_buff *skb, int oif, u8 tos,
1801		− __be32 daddr, __be32 *saddr,
	1801	+ __be32 daddr, __be32 *saddr, __be16 dport, __be16 sport,
1802	1802	struct dst_cache *dst_cache,
1803	1803	const struct ip_tunnel_info *info)
1804	1804	{
@@ -1824,6 +1824,8 @@ static struct rtable vxlan_get_route(struct vxlan_dev vxlan, struct net_device · 19 unmodified lines
1824	1824	fl4.flowi4_proto = IPPROTO_UDP;
1825	1825	fl4.daddr = daddr;
1826	1826	fl4.saddr = *saddr;
	1827	+ fl4.fl4_dport = dport;
	1828	+ fl4.fl4_sport = sport;
1827	1829
1828	1830	rt = ip_route_output_key(vxlan->net, &fl4);
1829	1831	if (likely(!IS_ERR(rt))) {
@@ -1851,6 +1853,7 @@ static struct dst_entry vxlan6_get_route(struct vxlan_dev vxlan, · 21 unmodified lines
1851	1853	__be32 label,
1852	1854	const struct in6_addr *daddr,
1853	1855	struct in6_addr *saddr,
	1856	+ __be16 dport, __be16 sport,
1854	1857	struct dst_cache *dst_cache,
1855	1858	const struct ip_tunnel_info *info)
1856	1859	{
@@ -1877,6 +1880,8 @@ static struct dst_entry vxlan6_get_route(struct vxlan_dev vxlan, · 20 unmodified lines
1877	1880	fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tos), label);
1878	1881	fl6.flowi6_mark = skb->mark;
1879	1882	fl6.flowi6_proto = IPPROTO_UDP;
	1883	+ fl6.fl6_dport = dport;
	1884	+ fl6.fl6_sport = sport;
1880	1885
1881	1886	err = ipv6_stub->ipv6_dst_lookup(vxlan->net,
1882	1887	sock6->sock->sk,
@@ -2068,6 +2073,7 @@ static void vxlan_xmit_one(struct sk_buff skb, struct net_device dev, · 185 unmodified lines
2068	2073	rdst ? rdst->remote_ifindex : 0, tos,
2069	2074	dst->sin.sin_addr.s_addr,
2070	2075	&src->sin.sin_addr.s_addr,
	2076	+ dst_port, src_port,
2071	2077	dst_cache, info);
2072	2078	if (IS_ERR(rt)) {
2073	2079	err = PTR_ERR(rt);
@@ -2104,6 +2110,7 @@ static void vxlan_xmit_one(struct sk_buff skb, struct net_device dev, · 30 unmodified lines
2104	2110	rdst ? rdst->remote_ifindex : 0, tos,
2105	2111	label, &dst->sin6.sin6_addr,
2106	2112	&src->sin6.sin6_addr,
	2113	+ dst_port, src_port,
2107	2114	dst_cache, info);
2108	2115	if (IS_ERR(ndst)) {
2109	2116	err = PTR_ERR(ndst);
@@ -2430,7 +2437,7 @@ static int vxlan_fill_metadata_dst(struct net_device dev, struct sk_buff skb) · 320 unmodified lines
2430	2437
2431	2438	rt = vxlan_get_route(vxlan, dev, sock4, skb, 0, info->key.tos,
2432	2439	info->key.u.ipv4.dst,
2433		− &info->key.u.ipv4.src, NULL, info);
	2440	+ &info->key.u.ipv4.src, dport, sport, NULL, info);
2434	2441	if (IS_ERR(rt))
2435	2442	return PTR_ERR(rt);
2436	2443	ip_rt_put(rt);
@@ -2441,7 +2448,7 @@ static int vxlan_fill_metadata_dst(struct net_device dev, struct sk_buff skb) · 4 unmodified lines
2441	2448
2442	2449	ndst = vxlan6_get_route(vxlan, dev, sock6, skb, 0, info->key.tos,
2443	2450	info->key.label, &info->key.u.ipv6.dst,
2444		− &info->key.u.ipv6.src, NULL, info);
	2451	+ &info->key.u.ipv6.src, dport, sport, NULL, info);
2445	2452	if (IS_ERR(ndst))
2446	2453	return PTR_ERR(ndst);
2447	2454	dst_release(ndst);

drivers/nvdimm/namespace_devs.c+10−13

@@ -957,6 +957,7 @@ static ssize_t __size_store(struct device *dev, unsigned long long val) · 956 unmodified lines
957	957	{
958	958	resource_size_t allocated = 0, available = 0;
959	959	struct nd_region *nd_region = to_nd_region(dev->parent);
	960	+ struct nd_namespace_common *ndns = to_ndns(dev);
960	961	struct nd_mapping *nd_mapping;
961	962	struct nvdimm_drvdata *ndd;
962	963	struct nd_label_id label_id;
@@ -964,7 +965,7 @@ static ssize_t __size_store(struct device *dev, unsigned long long val) · 1 unmodified line
964	965	u8 *uuid = NULL;
965	966	int rc, i;
966	967
967		− if (dev->driver \|\| to_ndns(dev)->claim)
	968	+ if (dev->driver \|\| ndns->claim)
968	969	return -EBUSY;
969	970
970	971	if (is_namespace_pmem(dev)) {
@@ -1034,20 +1035,16 @@ static ssize_t __size_store(struct device *dev, unsigned long long val) · 63 unmodified lines
1034	1035
1035	1036	nd_namespace_pmem_set_resource(nd_region, nspm,
1036	1037	val * nd_region->ndr_mappings);
1037		− } else if (is_namespace_blk(dev)) {
1038		− struct nd_namespace_blk *nsblk = to_nd_namespace_blk(dev);
1039		−
1040		− /*
1041		− * Try to delete the namespace if we deleted all of its
1042		− * allocation, this is not the seed device for the
1043		− * region, and it is not actively claimed by a btt
1044		− * instance.
1045		− */
1046		− if (val == 0 && nd_region->ns_seed != dev
1047		− && !nsblk->common.claim)
1048		− nd_device_unregister(dev, ND_ASYNC);
1049	1038	}
1050	1039
	1040	+ /*
	1041	+ * Try to delete the namespace if we deleted all of its
	1042	+ * allocation, this is not the seed device for the region, and
	1043	+ * it is not actively claimed by a btt instance.
	1044	+ */
	1045	+ if (val == 0 && nd_region->ns_seed != dev && !ndns->claim)
	1046	+ nd_device_unregister(dev, ND_ASYNC);
	1047	+
1051	1048	return rc;
1052	1049	}
1053	1050

drivers/nvdimm/pmem.c+3−1

@@ -90,7 +90,9 @@ static int read_pmem(struct page *page, unsigned int off, · 89 unmodified lines
90	90
91	91	rc = memcpy_from_pmem(mem + off, pmem_addr, len);
92	92	kunmap_atomic(mem);
93		− return rc;
	93	+ if (rc)
	94	+ return -EIO;
	95	+ return 0;
94	96	}
95	97
96	98	static int pmem_do_bvec(struct pmem_device pmem, struct page page,

drivers/pci/host/pci-xgene-msi.c+1−1

@@ -517,7 +517,7 @@ static int xgene_msi_probe(struct platform_device *pdev) · 516 unmodified lines
517	517
518	518	rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "pci/xgene:online",
519	519	xgene_msi_hwirq_alloc, NULL);
520		− if (rc)
	520	+ if (rc < 0)
521	521	goto err_cpuhp;
522	522	pci_xgene_online = rc;
523	523	rc = cpuhp_setup_state(CPUHP_PCI_XGENE_DEAD, "pci/xgene:dead", NULL,

drivers/pci/host/pcie-designware.c+5−5

@@ -807,11 +807,6 @@ void dw_pcie_setup_rc(struct pcie_port *pp) · 806 unmodified lines
807	807	{
808	808	u32 val;
809	809
810		− /* get iATU unroll support */
811		− pp->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pp);
812		− dev_dbg(pp->dev, "iATU unroll: %s\n",
813		− pp->iatu_unroll_enabled ? "enabled" : "disabled");
814		−
815	810	/* set the number of lanes */
816	811	val = dw_pcie_readl_rc(pp, PCIE_PORT_LINK_CONTROL);
817	812	val &= ~PORT_LINK_MODE_MASK;
@@ -882,6 +877,11 @@ void dw_pcie_setup_rc(struct pcie_port *pp) · 64 unmodified lines
882	877	* we should not program the ATU here.
883	878	*/
884	879	if (!pp->ops->rd_other_conf) {
	880	+ /* get iATU unroll support */
	881	+ pp->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pp);
	882	+ dev_dbg(pp->dev, "iATU unroll: %s\n",
	883	+ pp->iatu_unroll_enabled ? "enabled" : "disabled");
	884	+
885	885	dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX0,
886	886	PCIE_ATU_TYPE_MEM, pp->mem_base,
887	887	pp->mem_bus_addr, pp->mem_size);

drivers/pci/probe.c+7−5

@@ -1169,6 +1169,7 @@ void set_pcie_port_type(struct pci_dev *pdev) · 1168 unmodified lines
1169	1169	pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
1170	1170	if (!pos)
1171	1171	return;
	1172	+
1172	1173	pdev->pcie_cap = pos;
1173	1174	pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
1174	1175	pdev->pcie_flags_reg = reg16;
@@ -1176,13 +1177,14 @@ void set_pcie_port_type(struct pci_dev *pdev) · 1 unmodified line
1176	1177	pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD;
1177	1178
1178	1179	/*
1179		− * A Root Port is always the upstream end of a Link. No PCIe
1180		− * component has two Links. Two Links are connected by a Switch
1181		− * that has a Port on each Link and internal logic to connect the
1182		− * two Ports.
	1180	+ * A Root Port or a PCI-to-PCIe bridge is always the upstream end
	1181	+ * of a Link. No PCIe component has two Links. Two Links are
	1182	+ * connected by a Switch that has a Port on each Link and internal
	1183	+ * logic to connect the two Ports.
1183	1184	*/
1184	1185	type = pci_pcie_type(pdev);
1185		− if (type == PCI_EXP_TYPE_ROOT_PORT)
	1186	+ if (type == PCI_EXP_TYPE_ROOT_PORT \|\|
	1187	+ type == PCI_EXP_TYPE_PCIE_BRIDGE)
1186	1188	pdev->has_secondary_link = 1;
1187	1189	else if (type == PCI_EXP_TYPE_UPSTREAM \|\|
1188	1190	type == PCI_EXP_TYPE_DOWNSTREAM) {

drivers/s390/virtio/virtio_ccw.c+27−2

@@ -145,6 +145,7 @@ static struct airq_info *airq_areas[MAX_AIRQ_AREAS]; · 144 unmodified lines
145	145	#define CCW_CMD_WRITE_CONF 0x21
146	146	#define CCW_CMD_WRITE_STATUS 0x31
147	147	#define CCW_CMD_READ_VQ_CONF 0x32
	148	+#define CCW_CMD_READ_STATUS 0x72
148	149	#define CCW_CMD_SET_IND_ADAPTER 0x73
149	150	#define CCW_CMD_SET_VIRTIO_REV 0x83
150	151
@@ -160,6 +161,7 @@ static struct airq_info *airq_areas[MAX_AIRQ_AREAS]; · 9 unmodified lines
160	161	#define VIRTIO_CCW_DOING_SET_CONF_IND 0x04000000
161	162	#define VIRTIO_CCW_DOING_SET_IND_ADAPTER 0x08000000
162	163	#define VIRTIO_CCW_DOING_SET_VIRTIO_REV 0x10000000
	164	+#define VIRTIO_CCW_DOING_READ_STATUS 0x20000000
163	165	#define VIRTIO_CCW_INTPARM_MASK 0xffff0000
164	166
165	167	static struct virtio_ccw_device to_vc_device(struct virtio_device vdev)
@@ -452,7 +454,7 @@ static void virtio_ccw_del_vq(struct virtqueue vq, struct ccw1 ccw) · 286 unmodified lines
452	454	* This may happen on device detach.
453	455	*/
454	456	if (ret && (ret != -ENODEV))
455		− dev_warn(&vq->vdev->dev, "Error %d while deleting queue %d",
	457	+ dev_warn(&vq->vdev->dev, "Error %d while deleting queue %d\n",
456	458	ret, index);
457	459
458	460	vring_del_virtqueue(vq);
@@ -892,6 +894,28 @@ out_free: · 433 unmodified lines
892	894	static u8 virtio_ccw_get_status(struct virtio_device *vdev)
893	895	{
894	896	struct virtio_ccw_device *vcdev = to_vc_device(vdev);
	897	+ u8 old_status = *vcdev->status;
	898	+ struct ccw1 *ccw;
	899	+
	900	+ if (vcdev->revision < 1)
	901	+ return *vcdev->status;
	902	+
	903	+ ccw = kzalloc(sizeof(*ccw), GFP_DMA \| GFP_KERNEL);
	904	+ if (!ccw)
	905	+ return old_status;
	906	+
	907	+ ccw->cmd_code = CCW_CMD_READ_STATUS;
	908	+ ccw->flags = 0;
	909	+ ccw->count = sizeof(*vcdev->status);
	910	+ ccw->cda = (__u32)(unsigned long)vcdev->status;
	911	+ ccw_io_helper(vcdev, ccw, VIRTIO_CCW_DOING_READ_STATUS);
	912	+/*
	913	+ * If the channel program failed (should only happen if the device
	914	+ * was hotunplugged, and then we clean up via the machine check
	915	+ * handler anyway), vcdev->status was not overwritten and we just
	916	+ * return the old status, which is fine.
	917	+*/
	918	+ kfree(ccw);
895	919
896	920	return *vcdev->status;
897	921	}
@@ -920,7 +944,7 @@ static void virtio_ccw_set_status(struct virtio_device *vdev, u8 status) · 22 unmodified lines
920	944	kfree(ccw);
921	945	}
922	946
923		−static struct virtio_config_ops virtio_ccw_config_ops = {
	947	+static const struct virtio_config_ops virtio_ccw_config_ops = {
924	948	.get_features = virtio_ccw_get_features,
925	949	.finalize_features = virtio_ccw_finalize_features,
926	950	.get = virtio_ccw_get_config,
@@ -987,6 +1011,7 @@ static void virtio_ccw_check_activity(struct virtio_ccw_device *vcdev, · 60 unmodified lines
987	1011	case VIRTIO_CCW_DOING_READ_CONFIG:
988	1012	case VIRTIO_CCW_DOING_WRITE_CONFIG:
989	1013	case VIRTIO_CCW_DOING_WRITE_STATUS:
	1014	+ case VIRTIO_CCW_DOING_READ_STATUS:
990	1015	case VIRTIO_CCW_DOING_SET_VQ:
991	1016	case VIRTIO_CCW_DOING_SET_IND:
992	1017	case VIRTIO_CCW_DOING_SET_CONF_IND:

drivers/scsi/bfa/bfad_bsg.c+1−1

@@ -3363,7 +3363,7 @@ bfad_im_bsg_els_ct_request(struct bsg_job *job) · 3362 unmodified lines
3363	3363	struct bfad_fcxp *drv_fcxp;
3364	3364	struct bfa_fcs_lport_s *fcs_port;
3365	3365	struct bfa_fcs_rport_s *fcs_rport;
3366		− struct fc_bsg_request *bsg_request = bsg_request;
	3366	+ struct fc_bsg_request *bsg_request = job->request;
3367	3367	struct fc_bsg_reply *bsg_reply = job->reply;
3368	3368	uint32_t command_type = bsg_request->msgcode;
3369	3369	unsigned long flags;

drivers/scsi/ibmvscsi_tgt/ibmvscsi_tgt.c+4−3

@@ -46,6 +46,7 @@ · 45 unmodified lines
46	46
47	47	#define INITIAL_SRP_LIMIT 800
48	48	#define DEFAULT_MAX_SECTORS 256
	49	+#define MAX_TXU 1024 * 1024
49	50
50	51	static uint max_vdma_size = MAX_H_COPY_RDMA;
51	52
@@ -1391,7 +1392,7 @@ static long ibmvscsis_adapter_info(struct scsi_info *vscsi, · 1339 unmodified lines
1391	1392	}
1392	1393
1393	1394	info = dma_alloc_coherent(&vscsi->dma_dev->dev, sizeof(*info), &token,
1394		− GFP_KERNEL);
	1395	+ GFP_ATOMIC);
1395	1396	if (!info) {
1396	1397	dev_err(&vscsi->dev, "bad dma_alloc_coherent %p\n",
1397	1398	iue->target);
@@ -1443,7 +1444,7 @@ static long ibmvscsis_adapter_info(struct scsi_info *vscsi, · 45 unmodified lines
1443	1444	info->mad_version = cpu_to_be32(MAD_VERSION_1);
1444	1445	info->os_type = cpu_to_be32(LINUX);
1445	1446	memset(&info->port_max_txu[0], 0, sizeof(info->port_max_txu));
1446		− info->port_max_txu[0] = cpu_to_be32(128 * PAGE_SIZE);
	1447	+ info->port_max_txu[0] = cpu_to_be32(MAX_TXU);
1447	1448
1448	1449	dma_wmb();
1449	1450	rc = h_copy_rdma(sizeof(*info), vscsi->dds.window[LOCAL].liobn,
@@ -1509,7 +1510,7 @@ static int ibmvscsis_cap_mad(struct scsi_info vscsi, struct iu_entry iue) · 59 unmodified lines
1509	1510	}
1510	1511
1511	1512	cap = dma_alloc_coherent(&vscsi->dma_dev->dev, olen, &token,
1512		− GFP_KERNEL);
	1513	+ GFP_ATOMIC);
1513	1514	if (!cap) {
1514	1515	dev_err(&vscsi->dev, "bad dma_alloc_coherent %p\n",
1515	1516	iue->target);

drivers/scsi/lpfc/lpfc_els.c+2−0

@@ -3590,12 +3590,14 @@ lpfc_els_free_iocb(struct lpfc_hba phba, struct lpfc_iocbq elsiocb) · 3589 unmodified lines
3590	3590	} else {
3591	3591	buf_ptr1 = (struct lpfc_dmabuf *) elsiocb->context2;
3592	3592	lpfc_els_free_data(phba, buf_ptr1);
	3593	+ elsiocb->context2 = NULL;
3593	3594	}
3594	3595	}
3595	3596
3596	3597	if (elsiocb->context3) {
3597	3598	buf_ptr = (struct lpfc_dmabuf *) elsiocb->context3;
3598	3599	lpfc_els_free_bpl(phba, buf_ptr);
	3600	+ elsiocb->context3 = NULL;
3599	3601	}
3600	3602	lpfc_sli_release_iocbq(phba, elsiocb);
3601	3603	return 0;

drivers/scsi/lpfc/lpfc_sli.c+7−0

@@ -5954,18 +5954,25 @@ lpfc_sli4_alloc_resource_identifiers(struct lpfc_hba *phba) · 5953 unmodified lines
5954	5954
5955	5955	free_vfi_bmask:
5956	5956	kfree(phba->sli4_hba.vfi_bmask);
	5957	+ phba->sli4_hba.vfi_bmask = NULL;
5957	5958	free_xri_ids:
5958	5959	kfree(phba->sli4_hba.xri_ids);
	5960	+ phba->sli4_hba.xri_ids = NULL;
5959	5961	free_xri_bmask:
5960	5962	kfree(phba->sli4_hba.xri_bmask);
	5963	+ phba->sli4_hba.xri_bmask = NULL;
5961	5964	free_vpi_ids:
5962	5965	kfree(phba->vpi_ids);
	5966	+ phba->vpi_ids = NULL;
5963	5967	free_vpi_bmask:
5964	5968	kfree(phba->vpi_bmask);
	5969	+ phba->vpi_bmask = NULL;
5965	5970	free_rpi_ids:
5966	5971	kfree(phba->sli4_hba.rpi_ids);
	5972	+ phba->sli4_hba.rpi_ids = NULL;
5967	5973	free_rpi_bmask:
5968	5974	kfree(phba->sli4_hba.rpi_bmask);
	5975	+ phba->sli4_hba.rpi_bmask = NULL;
5969	5976	err_exit:
5970	5977	return rc;
5971	5978	}

drivers/scsi/mpt3sas/mpt3sas_base.h+12−0

@@ -393,6 +393,7 @@ struct MPT3SAS_TARGET { · 392 unmodified lines
393	393	* @eedp_enable: eedp support enable bit
394	394	* @eedp_type: 0(type_1), 1(type_2), 2(type_3)
395	395	* @eedp_block_length: block size
	396	+ * @ata_command_pending: SATL passthrough outstanding for device
396	397	*/
397	398	struct MPT3SAS_DEVICE {
398	399	struct MPT3SAS_TARGET *sas_target;
@@ -404,6 +405,17 @@ struct MPT3SAS_DEVICE { · 5 unmodified lines
404	405	u8 ignore_delay_remove;
405	406	/* Iopriority Command Handling */
406	407	u8 ncq_prio_enable;
	408	+ /*
	409	+ * Bug workaround for SATL handling: the mpt2/3sas firmware
	410	+ * doesn't return BUSY or TASK_SET_FULL for subsequent
	411	+ * commands while a SATL pass through is in operation as the
	412	+ * spec requires, it simply does nothing with them until the
	413	+ * pass through completes, causing them possibly to timeout if
	414	+ * the passthrough is a long executing command (like format or
	415	+ * secure erase). This variable allows us to do the right
	416	+ * thing while a SATL command is pending.
	417	+ */
	418	+ unsigned long ata_command_pending;
407	419
408	420	};
409	421

drivers/scsi/mpt3sas/mpt3sas_scsih.c+26−14

@@ -3899,9 +3899,18 @@ _scsih_temp_threshold_events(struct MPT3SAS_ADAPTER *ioc, · 3898 unmodified lines
3899	3899	}
3900	3900	}
3901	3901
3902		−static inline bool ata_12_16_cmd(struct scsi_cmnd *scmd)
	3902	+static int _scsih_set_satl_pending(struct scsi_cmnd *scmd, bool pending)
3903	3903	{
3904		− return (scmd->cmnd[0] == ATA_12 \|\| scmd->cmnd[0] == ATA_16);
	3904	+ struct MPT3SAS_DEVICE *priv = scmd->device->hostdata;
	3905	+
	3906	+ if (scmd->cmnd[0] != ATA_12 && scmd->cmnd[0] != ATA_16)
	3907	+ return 0;
	3908	+
	3909	+ if (pending)
	3910	+ return test_and_set_bit(0, &priv->ata_command_pending);
	3911	+
	3912	+ clear_bit(0, &priv->ata_command_pending);
	3913	+ return 0;
3905	3914	}
3906	3915
3907	3916	/**
@@ -3925,9 +3934,7 @@ _scsih_flush_running_cmds(struct MPT3SAS_ADAPTER *ioc) · 17 unmodified lines
3925	3934	if (!scmd)
3926	3935	continue;
3927	3936	count++;
3928		− if (ata_12_16_cmd(scmd))
3929		− scsi_internal_device_unblock(scmd->device,
3930		− SDEV_RUNNING);
	3937	+ _scsih_set_satl_pending(scmd, false);
3931	3938	mpt3sas_base_free_smid(ioc, smid);
3932	3939	scsi_dma_unmap(scmd);
3933	3940	if (ioc->pci_error_recovery)
@@ -4063,13 +4070,6 @@ scsih_qcmd(struct Scsi_Host shost, struct scsi_cmnd scmd) · 129 unmodified lines
4063	4070	if (ioc->logging_level & MPT_DEBUG_SCSI)
4064	4071	scsi_print_command(scmd);
4065	4072
4066		− /*
4067		− * Lock the device for any subsequent command until command is
4068		− * done.
4069		− */
4070		− if (ata_12_16_cmd(scmd))
4071		− scsi_internal_device_block(scmd->device);
4072		−
4073	4073	sas_device_priv_data = scmd->device->hostdata;
4074	4074	if (!sas_device_priv_data \|\| !sas_device_priv_data->sas_target) {
4075	4075	scmd->result = DID_NO_CONNECT << 16;
@@ -4083,6 +4083,19 @@ scsih_qcmd(struct Scsi_Host shost, struct scsi_cmnd scmd) · 7 unmodified lines
4083	4083	return 0;
4084	4084	}
4085	4085
	4086	+ /*
	4087	+ * Bug work around for firmware SATL handling. The loop
	4088	+ * is based on atomic operations and ensures consistency
	4089	+ * since we're lockless at this point
	4090	+ */
	4091	+ do {
	4092	+ if (test_bit(0, &sas_device_priv_data->ata_command_pending)) {
	4093	+ scmd->result = SAM_STAT_BUSY;
	4094	+ scmd->scsi_done(scmd);
	4095	+ return 0;
	4096	+ }
	4097	+ } while (_scsih_set_satl_pending(scmd, true));
	4098	+
4086	4099	sas_target_priv_data = sas_device_priv_data->sas_target;
4087	4100
4088	4101	/* invalid device handle */
@@ -4650,8 +4663,7 @@ _scsih_io_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, u32 reply) · 561 unmodified lines
4650	4663	if (scmd == NULL)
4651	4664	return 1;
4652	4665
4653		− if (ata_12_16_cmd(scmd))
4654		− scsi_internal_device_unblock(scmd->device, SDEV_RUNNING);
	4666	+ _scsih_set_satl_pending(scmd, false);
4655	4667
4656	4668	mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
4657	4669

drivers/scsi/qla2xxx/qla_attr.c+14−7

@@ -243,12 +243,15 @@ qla2x00_sysfs_read_optrom(struct file filp, struct kobject kobj, · 242 unmodified lines
243	243	struct qla_hw_data *ha = vha->hw;
244	244	ssize_t rval = 0;
245	245
	246	+ mutex_lock(&ha->optrom_mutex);
	247	+
246	248	if (ha->optrom_state != QLA_SREADING)
247		− return 0;
	249	+ goto out;
248	250
249		− mutex_lock(&ha->optrom_mutex);
250	251	rval = memory_read_from_buffer(buf, count, &off, ha->optrom_buffer,
251	252	ha->optrom_region_size);
	253	+
	254	+out:
252	255	mutex_unlock(&ha->optrom_mutex);
253	256
254	257	return rval;
@@ -263,14 +266,19 @@ qla2x00_sysfs_write_optrom(struct file filp, struct kobject kobj, · 8 unmodified lines
263	266	struct device, kobj)));
264	267	struct qla_hw_data *ha = vha->hw;
265	268
266		− if (ha->optrom_state != QLA_SWRITING)
	269	+ mutex_lock(&ha->optrom_mutex);
	270	+
	271	+ if (ha->optrom_state != QLA_SWRITING) {
	272	+ mutex_unlock(&ha->optrom_mutex);
267	273	return -EINVAL;
268		− if (off > ha->optrom_region_size)
	274	+ }
	275	+ if (off > ha->optrom_region_size) {
	276	+ mutex_unlock(&ha->optrom_mutex);
269	277	return -ERANGE;
	278	+ }
270	279	if (off + count > ha->optrom_region_size)
271	280	count = ha->optrom_region_size - off;
272	281
273		− mutex_lock(&ha->optrom_mutex);
274	282	memcpy(&ha->optrom_buffer[off], buf, count);
275	283	mutex_unlock(&ha->optrom_mutex);
276	284
@@ -753,7 +761,6 @@ qla2x00_issue_logo(struct file filp, struct kobject kobj, · 476 unmodified lines
753	761	struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
754	762	struct device, kobj)));
755	763	int type;
756		− int rval = 0;
757	764	port_id_t did;
758	765
759	766	type = simple_strtol(buf, NULL, 10);
@@ -767,7 +774,7 @@ qla2x00_issue_logo(struct file filp, struct kobject kobj, · 7 unmodified lines
767	774
768	775	ql_log(ql_log_info, vha, 0x70e4, "%s: %d\n", __func__, type);
769	776
770		− rval = qla24xx_els_dcmd_iocb(vha, ELS_DCMD_LOGO, did);
	777	+ qla24xx_els_dcmd_iocb(vha, ELS_DCMD_LOGO, did);
771	778	return count;
772	779	}
773	780

drivers/scsi/qla2xxx/qla_def.h+3−3

@@ -1556,7 +1556,8 @@ typedef struct { · 1555 unmodified lines
1556	1556	struct atio {
1557	1557	uint8_t entry_type; /* Entry type. */
1558	1558	uint8_t entry_count; /* Entry count. */
1559		− uint8_t data[58];
	1559	+ __le16 attr_n_length;
	1560	+ uint8_t data[56];
1560	1561	uint32_t signature;
1561	1562	#define ATIO_PROCESSED 0xDEADDEAD /* Signature */
1562	1563	};
@@ -2732,7 +2733,7 @@ struct isp_operations { · 1169 unmodified lines
2732	2733	#define QLA_MSIX_FW_MODE(m) (((m) & (BIT_7\|BIT_8\|BIT_9)) >> 7)
2733	2734	#define QLA_MSIX_FW_MODE_1(m) (QLA_MSIX_FW_MODE(m) == 1)
2734	2735
2735		−#define QLA_MSIX_DEFAULT 0x00
	2736	+#define QLA_BASE_VECTORS 2 /* default + RSP */
2736	2737	#define QLA_MSIX_RSP_Q 0x01
2737	2738	#define QLA_ATIO_VECTOR 0x02
2738	2739	#define QLA_MSIX_QPAIR_MULTIQ_RSP_Q 0x03
@@ -2754,7 +2755,6 @@ struct qla_msix_entry { · 15 unmodified lines
2754	2755	uint16_t entry;
2755	2756	char name[30];
2756	2757	void *handle;
2757		− struct irq_affinity_notify irq_notify;
2758	2758	int cpuid;
2759	2759	};
2760	2760

drivers/scsi/qla2xxx/qla_init.c+2−2

@@ -1191,7 +1191,7 @@ qla24xx_reset_risc(scsi_qla_host_t *vha) · 1190 unmodified lines
1191	1191
1192	1192	/* Wait for soft-reset to complete. */
1193	1193	RD_REG_DWORD(&reg->ctrl_status);
1194		− for (cnt = 0; cnt < 6000000; cnt++) {
	1194	+ for (cnt = 0; cnt < 60; cnt++) {
1195	1195	barrier();
1196	1196	if ((RD_REG_DWORD(&reg->ctrl_status) &
1197	1197	CSRX_ISP_SOFT_RESET) == 0)
@@ -1234,7 +1234,7 @@ qla24xx_reset_risc(scsi_qla_host_t *vha) · 36 unmodified lines
1234	1234	RD_REG_DWORD(&reg->hccr);
1235	1235
1236	1236	RD_REG_WORD(&reg->mailbox0);
1237		− for (cnt = 6000000; RD_REG_WORD(&reg->mailbox0) != 0 &&
	1237	+ for (cnt = 60; RD_REG_WORD(&reg->mailbox0) != 0 &&
1238	1238	rval == QLA_SUCCESS; cnt--) {
1239	1239	barrier();
1240	1240	if (cnt)

drivers/scsi/qla2xxx/qla_isr.c+15−77

@@ -19,10 +19,6 @@ static void qla2x00_status_entry(scsi_qla_host_t , struct rsp_que , void *); · 18 unmodified lines
19	19	static void qla2x00_status_cont_entry(struct rsp_que , sts_cont_entry_t );
20	20	static void qla2x00_error_entry(scsi_qla_host_t , struct rsp_que ,
21	21	sts_entry_t *);
22		−static void qla_irq_affinity_notify(struct irq_affinity_notify *,
23		− const cpumask_t *);
24		−static void qla_irq_affinity_release(struct kref *);
25		−
26	22
27	23	/**
28	24	* qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
@@ -2496,6 +2492,10 @@ qla2x00_error_entry(scsi_qla_host_t vha, struct rsp_que rsp, sts_entry_t *pkt) · 2467 unmodified lines
2496	2492	if (pkt->entry_status & RF_BUSY)
2497	2493	res = DID_BUS_BUSY << 16;
2498	2494
	2495	+ if (pkt->entry_type == NOTIFY_ACK_TYPE &&
	2496	+ pkt->handle == QLA_TGT_SKIP_HANDLE)
	2497	+ return;
	2498	+
2499	2499	sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2500	2500	if (sp) {
2501	2501	sp->done(ha, sp, res);
@@ -2572,14 +2572,6 @@ void qla24xx_process_response_queue(struct scsi_qla_host *vha, · 70 unmodified lines
2572	2572	if (!vha->flags.online)
2573	2573	return;
2574	2574
2575		− if (rsp->msix && rsp->msix->cpuid != smp_processor_id()) {
2576		− /* if kernel does not notify qla of IRQ's CPU change,
2577		− * then set it here.
2578		− */
2579		− rsp->msix->cpuid = smp_processor_id();
2580		− ha->tgt.rspq_vector_cpuid = rsp->msix->cpuid;
2581		− }
2582		−
2583	2575	while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
2584	2576	pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
2585	2577
@@ -3018,13 +3010,20 @@ static struct qla_init_msix_entry qla82xx_msix_entries[] = { · 432 unmodified lines
3018	3010	static int
3019	3011	qla24xx_enable_msix(struct qla_hw_data ha, struct rsp_que rsp)
3020	3012	{
3021		−#define MIN_MSIX_COUNT 2
3022	3013	int i, ret;
3023	3014	struct qla_msix_entry *qentry;
3024	3015	scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
	3016	+ struct irq_affinity desc = {
	3017	+ .pre_vectors = QLA_BASE_VECTORS,
	3018	+ };
	3019	+
	3020	+ if (QLA_TGT_MODE_ENABLED() && IS_ATIO_MSIX_CAPABLE(ha))
	3021	+ desc.pre_vectors++;
	3022	+
	3023	+ ret = pci_alloc_irq_vectors_affinity(ha->pdev, QLA_BASE_VECTORS,
	3024	+ ha->msix_count, PCI_IRQ_MSIX \| PCI_IRQ_AFFINITY,
	3025	+ &desc);
3025	3026
3026		− ret = pci_alloc_irq_vectors(ha->pdev, MIN_MSIX_COUNT, ha->msix_count,
3027		− PCI_IRQ_MSIX \| PCI_IRQ_AFFINITY);
3028	3027	if (ret < 0) {
3029	3028	ql_log(ql_log_fatal, vha, 0x00c7,
3030	3029	"MSI-X: Failed to enable support, "
@@ -3069,13 +3068,10 @@ qla24xx_enable_msix(struct qla_hw_data ha, struct rsp_que rsp) · 38 unmodified lines
3069	3068	qentry->have_irq = 0;
3070	3069	qentry->in_use = 0;
3071	3070	qentry->handle = NULL;
3072		− qentry->irq_notify.notify = qla_irq_affinity_notify;
3073		− qentry->irq_notify.release = qla_irq_affinity_release;
3074		− qentry->cpuid = -1;
3075	3071	}
3076	3072
3077	3073	/* Enable MSI-X vectors for the base queue */
3078		− for (i = 0; i < (QLA_MSIX_RSP_Q + 1); i++) {
	3074	+ for (i = 0; i < QLA_BASE_VECTORS; i++) {
3079	3075	qentry = &ha->msix_entries[i];
3080	3076	qentry->handle = rsp;
3081	3077	rsp->msix = qentry;
@@ -3093,18 +3089,6 @@ qla24xx_enable_msix(struct qla_hw_data ha, struct rsp_que rsp) · 11 unmodified lines
3093	3089	goto msix_register_fail;
3094	3090	qentry->have_irq = 1;
3095	3091	qentry->in_use = 1;
3096		−
3097		− /* Register for CPU affinity notification. */
3098		− irq_set_affinity_notifier(qentry->vector, &qentry->irq_notify);
3099		−
3100		− /* Schedule work (ie. trigger a notification) to read cpu
3101		− * mask for this specific irq.
3102		− * kref_get is required because
3103		− * irq_affinity_notify() will do
3104		− * kref_put().
3105		− */
3106		− kref_get(&qentry->irq_notify.kref);
3107		− schedule_work(&qentry->irq_notify.work);
3108	3092	}
3109	3093
3110	3094	/*
@@ -3301,49 +3285,3 @@ int qla25xx_request_irq(struct qla_hw_data ha, struct qla_qpair qpair, · 190 unmodified lines
3301	3285	msix->handle = qpair;
3302	3286	return ret;
3303	3287	}
3304		−
3305		−
3306		−/* irq_set_affinity/irqbalance will trigger notification of cpu mask update */
3307		−static void qla_irq_affinity_notify(struct irq_affinity_notify *notify,
3308		− const cpumask_t *mask)
3309		−{
3310		− struct qla_msix_entry *e =
3311		− container_of(notify, struct qla_msix_entry, irq_notify);
3312		− struct qla_hw_data *ha;
3313		− struct scsi_qla_host *base_vha;
3314		− struct rsp_que *rsp = e->handle;
3315		−
3316		− /* user is recommended to set mask to just 1 cpu */
3317		− e->cpuid = cpumask_first(mask);
3318		−
3319		− ha = rsp->hw;
3320		− base_vha = pci_get_drvdata(ha->pdev);
3321		−
3322		− ql_dbg(ql_dbg_init, base_vha, 0xffff,
3323		− "%s: host %ld : vector %d cpu %d \n", __func__,
3324		− base_vha->host_no, e->vector, e->cpuid);
3325		−
3326		− if (e->have_irq) {
3327		− if ((IS_QLA83XX(ha) \|\| IS_QLA27XX(ha)) &&
3328		− (e->entry == QLA83XX_RSPQ_MSIX_ENTRY_NUMBER)) {
3329		− ha->tgt.rspq_vector_cpuid = e->cpuid;
3330		− ql_dbg(ql_dbg_init, base_vha, 0xffff,
3331		− "%s: host%ld: rspq vector %d cpu %d runtime change\n",
3332		− __func__, base_vha->host_no, e->vector, e->cpuid);
3333		− }
3334		− }
3335		−}
3336		−
3337		−static void qla_irq_affinity_release(struct kref *ref)
3338		−{
3339		− struct irq_affinity_notify *notify =
3340		− container_of(ref, struct irq_affinity_notify, kref);
3341		− struct qla_msix_entry *e =
3342		− container_of(notify, struct qla_msix_entry, irq_notify);
3343		− struct rsp_que *rsp = e->handle;
3344		− struct scsi_qla_host *base_vha = pci_get_drvdata(rsp->hw->pdev);
3345		−
3346		− ql_dbg(ql_dbg_init, base_vha, 0xffff,
3347		− "%s: host%ld: vector %d cpu %d\n", __func__,
3348		− base_vha->host_no, e->vector, e->cpuid);
3349		−}

drivers/scsi/qla2xxx/qla_mbx.c+24−13

@@ -10,7 +10,7 @@ · 9 unmodified lines
10	10	#include <linux/delay.h>
11	11	#include <linux/gfp.h>
12	12
13		−struct rom_cmd {
	13	+static struct rom_cmd {
14	14	uint16_t cmd;
15	15	} rom_cmds[] = {
16	16	{ MBC_LOAD_RAM },
@@ -101,12 +101,12 @@ qla2x00_mailbox_command(scsi_qla_host_t vha, mbx_cmd_t mcp) · 84 unmodified lines
101	101	return QLA_FUNCTION_TIMEOUT;
102	102	}
103	103
104		− /* if PCI error, then avoid mbx processing.*/
105		− if (test_bit(PCI_ERR, &base_vha->dpc_flags)) {
	104	+ /* if PCI error, then avoid mbx processing.*/
	105	+ if (test_bit(PCI_ERR, &base_vha->dpc_flags)) {
106	106	ql_log(ql_log_warn, vha, 0x1191,
107	107	"PCI error, exiting.\n");
108	108	return QLA_FUNCTION_TIMEOUT;
109		− }
	109	+ }
110	110
111	111	reg = ha->iobase;
112	112	io_lock_on = base_vha->flags.init_done;
@@ -323,20 +323,33 @@ qla2x00_mailbox_command(scsi_qla_host_t vha, mbx_cmd_t mcp) · 210 unmodified lines
323	323	}
324	324	} else {
325	325
326		− uint16_t mb0;
327		− uint32_t ictrl;
	326	+ uint16_t mb[8];
	327	+ uint32_t ictrl, host_status, hccr;
328	328	uint16_t w;
329	329
330	330	if (IS_FWI2_CAPABLE(ha)) {
331		− mb0 = RD_REG_WORD(&reg->isp24.mailbox0);
	331	+ mb[0] = RD_REG_WORD(&reg->isp24.mailbox0);
	332	+ mb[1] = RD_REG_WORD(&reg->isp24.mailbox1);
	333	+ mb[2] = RD_REG_WORD(&reg->isp24.mailbox2);
	334	+ mb[3] = RD_REG_WORD(&reg->isp24.mailbox3);
	335	+ mb[7] = RD_REG_WORD(&reg->isp24.mailbox7);
332	336	ictrl = RD_REG_DWORD(&reg->isp24.ictrl);
	337	+ host_status = RD_REG_DWORD(&reg->isp24.host_status);
	338	+ hccr = RD_REG_DWORD(&reg->isp24.hccr);
	339	+
	340	+ ql_log(ql_log_warn, vha, 0x1119,
	341	+ "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
	342	+ "mb[0-3]=[0x%x 0x%x 0x%x 0x%x] mb7 0x%x host_status 0x%x hccr 0x%x\n",
	343	+ command, ictrl, jiffies, mb[0], mb[1], mb[2], mb[3],
	344	+ mb[7], host_status, hccr);
	345	+
333	346	} else {
334		− mb0 = RD_MAILBOX_REG(ha, &reg->isp, 0);
	347	+ mb[0] = RD_MAILBOX_REG(ha, &reg->isp, 0);
335	348	ictrl = RD_REG_WORD(&reg->isp.ictrl);
	349	+ ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
	350	+ "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
	351	+ "mb[0]=0x%x\n", command, ictrl, jiffies, mb[0]);
336	352	}
337		− ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
338		− "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
339		− "mb[0]=0x%x\n", command, ictrl, jiffies, mb0);
340	353	ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
341	354
342	355	/* Capture FW dump only, if PCI device active */
@@ -684,7 +697,6 @@ qla_set_exlogin_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr) · 341 unmodified lines
684	697	mbx_cmd_t mc;
685	698	mbx_cmd_t *mcp = &mc;
686	699	struct qla_hw_data *ha = vha->hw;
687		− int configured_count;
688	700
689	701	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111a,
690	702	"Entered %s.\n", __func__);
@@ -707,7 +719,6 @@ qla_set_exlogin_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr) · 16 unmodified lines
707	719	/EMPTY/
708	720	ql_dbg(ql_dbg_mbx, vha, 0x111b, "Failed=%x.\n", rval);
709	721	} else {
710		− configured_count = mcp->mb[11];
711	722	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118c,
712	723	"Done %s.\n", __func__);
713	724	}

drivers/scsi/qla2xxx/qla_nx.c+5−0

@@ -42,6 +42,11 @@ static int qla82xx_crb_table_initialized; · 41 unmodified lines
42	42	(crb_addr_xform[QLA82XX_HW_PX_MAP_CRB_##name] = \
43	43	QLA82XX_HW_CRB_HUB_AGT_ADR_##name << 20)
44	44
	45	+const int MD_MIU_TEST_AGT_RDDATA[] = {
	46	+ 0x410000A8, 0x410000AC,
	47	+ 0x410000B8, 0x410000BC
	48	+};
	49	+
45	50	static void qla82xx_crb_addr_transform_setup(void)
46	51	{
47	52	qla82xx_crb_addr_transform(XDMA);

drivers/scsi/qla2xxx/qla_nx.h+1−2

@@ -1176,8 +1176,7 @@ struct qla82xx_md_entry_queue { · 1175 unmodified lines
1176	1176	#define MD_MIU_TEST_AGT_ADDR_LO 0x41000094
1177	1177	#define MD_MIU_TEST_AGT_ADDR_HI 0x41000098
1178	1178
1179		−static const int MD_MIU_TEST_AGT_RDDATA[] = { 0x410000A8, 0x410000AC,
1180		− 0x410000B8, 0x410000BC };
	1179	+extern const int MD_MIU_TEST_AGT_RDDATA[4];
1181	1180
1182	1181	#define CRB_NIU_XG_PAUSE_CTL_P0 0x1
1183	1182	#define CRB_NIU_XG_PAUSE_CTL_P1 0x8

drivers/scsi/qla2xxx/qla_nx2.c+17−0

@@ -15,6 +15,23 @@ · 14 unmodified lines
15	15
16	16	#define TIMEOUT_100_MS 100
17	17
	18	+static const uint32_t qla8044_reg_tbl[] = {
	19	+ QLA8044_PEG_HALT_STATUS1,
	20	+ QLA8044_PEG_HALT_STATUS2,
	21	+ QLA8044_PEG_ALIVE_COUNTER,
	22	+ QLA8044_CRB_DRV_ACTIVE,
	23	+ QLA8044_CRB_DEV_STATE,
	24	+ QLA8044_CRB_DRV_STATE,
	25	+ QLA8044_CRB_DRV_SCRATCH,
	26	+ QLA8044_CRB_DEV_PART_INFO1,
	27	+ QLA8044_CRB_IDC_VER_MAJOR,
	28	+ QLA8044_FW_VER_MAJOR,
	29	+ QLA8044_FW_VER_MINOR,
	30	+ QLA8044_FW_VER_SUB,
	31	+ QLA8044_CMDPEG_STATE,
	32	+ QLA8044_ASIC_TEMP,
	33	+};
	34	+
18	35	/* 8044 Flash Read/Write functions */
19	36	uint32_t
20	37	qla8044_rd_reg(struct qla_hw_data *ha, ulong addr)

drivers/scsi/qla2xxx/qla_nx2.h+0−17

@@ -535,23 +535,6 @@ enum qla_regs { · 534 unmodified lines
535	535	#define CRB_CMDPEG_CHECK_RETRY_COUNT 60
536	536	#define CRB_CMDPEG_CHECK_DELAY 500
537	537
538		−static const uint32_t qla8044_reg_tbl[] = {
539		− QLA8044_PEG_HALT_STATUS1,
540		− QLA8044_PEG_HALT_STATUS2,
541		− QLA8044_PEG_ALIVE_COUNTER,
542		− QLA8044_CRB_DRV_ACTIVE,
543		− QLA8044_CRB_DEV_STATE,
544		− QLA8044_CRB_DRV_STATE,
545		− QLA8044_CRB_DRV_SCRATCH,
546		− QLA8044_CRB_DEV_PART_INFO1,
547		− QLA8044_CRB_IDC_VER_MAJOR,
548		− QLA8044_FW_VER_MAJOR,
549		− QLA8044_FW_VER_MINOR,
550		− QLA8044_FW_VER_SUB,
551		− QLA8044_CMDPEG_STATE,
552		− QLA8044_ASIC_TEMP,
553		−};
554		−
555	538	/* MiniDump Structures */
556	539
557	540	/* Driver_code is for driver to write some info about the entry

drivers/scsi/qla2xxx/qla_os.c+13−5

@@ -466,7 +466,7 @@ static void qla2x00_free_queues(struct qla_hw_data *ha) · 465 unmodified lines
466	466	continue;
467	467
468	468	rsp = ha->rsp_q_map[cnt];
469		− clear_bit(cnt, ha->req_qid_map);
	469	+ clear_bit(cnt, ha->rsp_qid_map);
470	470	ha->rsp_q_map[cnt] = NULL;
471	471	spin_unlock_irqrestore(&ha->hardware_lock, flags);
472	472	qla2x00_free_rsp_que(ha, rsp);
@@ -3662,7 +3662,7 @@ qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len, · 3189 unmodified lines
3662	3662	sizeof(struct ct6_dsd), 0,
3663	3663	SLAB_HWCACHE_ALIGN, NULL);
3664	3664	if (!ctx_cachep)
3665		− goto fail_free_gid_list;
	3665	+ goto fail_free_srb_mempool;
3666	3666	}
3667	3667	ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3668	3668	ctx_cachep);
@@ -3815,7 +3815,7 @@ qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len, · 146 unmodified lines
3815	3815	ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3816	3816	GFP_KERNEL);
3817	3817	if (!ha->loop_id_map)
3818		− goto fail_async_pd;
	3818	+ goto fail_loop_id_map;
3819	3819	else {
3820	3820	qla2x00_set_reserved_loop_ids(ha);
3821	3821	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
@@ -3824,6 +3824,8 @@ qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len, · 2 unmodified lines
3824	3824
3825	3825	return 0;
3826	3826
	3827	+fail_loop_id_map:
	3828	+ dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3827	3829	fail_async_pd:
3828	3830	dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3829	3831	fail_ex_init_cb:
@@ -3851,6 +3853,10 @@ fail_free_ms_iocb: · 21 unmodified lines
3851	3853	dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3852	3854	ha->ms_iocb = NULL;
3853	3855	ha->ms_iocb_dma = 0;
	3856	+
	3857	+ if (ha->sns_cmd)
	3858	+ dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
	3859	+ ha->sns_cmd, ha->sns_cmd_dma);
3854	3860	fail_dma_pool:
3855	3861	if (IS_QLA82XX(ha) \|\| ql2xenabledif) {
3856	3862	dma_pool_destroy(ha->fcp_cmnd_dma_pool);
@@ -3868,10 +3874,12 @@ fail_free_nvram: · 11 unmodified lines
3868	3874	kfree(ha->nvram);
3869	3875	ha->nvram = NULL;
3870	3876	fail_free_ctx_mempool:
3871		− mempool_destroy(ha->ctx_mempool);
	3877	+ if (ha->ctx_mempool)
	3878	+ mempool_destroy(ha->ctx_mempool);
3872	3879	ha->ctx_mempool = NULL;
3873	3880	fail_free_srb_mempool:
3874		− mempool_destroy(ha->srb_mempool);
	3881	+ if (ha->srb_mempool)
	3882	+ mempool_destroy(ha->srb_mempool);
3875	3883	ha->srb_mempool = NULL;
3876	3884	fail_free_gid_list:
3877	3885	dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),

drivers/scsi/qla2xxx/qla_target.c+39−18

@@ -668,11 +668,9 @@ static int qlt_reset(struct scsi_qla_host vha, void iocb, int mcmd) · 667 unmodified lines
668	668	{
669	669	struct qla_hw_data *ha = vha->hw;
670	670	struct qla_tgt_sess *sess = NULL;
671		− uint32_t unpacked_lun, lun = 0;
672	671	uint16_t loop_id;
673	672	int res = 0;
674	673	struct imm_ntfy_from_isp n = (struct imm_ntfy_from_isp )iocb;
675		− struct atio_from_isp a = (struct atio_from_isp )iocb;
676	674	unsigned long flags;
677	675
678	676	loop_id = le16_to_cpu(n->u.isp24.nport_handle);
@@ -725,11 +723,7 @@ static int qlt_reset(struct scsi_qla_host vha, void iocb, int mcmd) · 46 unmodified lines
725	723	"loop_id %d)\n", vha->host_no, sess, sess->port_name,
726	724	mcmd, loop_id);
727	725
728		− lun = a->u.isp24.fcp_cmnd.lun;
729		− unpacked_lun = scsilun_to_int((struct scsi_lun *)&lun);
730		−
731		− return qlt_issue_task_mgmt(sess, unpacked_lun, mcmd,
732		− iocb, QLA24XX_MGMT_SEND_NACK);
	726	+ return qlt_issue_task_mgmt(sess, 0, mcmd, iocb, QLA24XX_MGMT_SEND_NACK);
733	727	}
734	728
735	729	/* ha->tgt.sess_lock supposed to be held on entry */
@@ -3067,7 +3061,7 @@ static int __qlt_send_term_imm_notif(struct scsi_qla_host *vha, · 2331 unmodified lines
3067	3061
3068	3062	pkt->entry_type = NOTIFY_ACK_TYPE;
3069	3063	pkt->entry_count = 1;
3070		− pkt->handle = QLA_TGT_SKIP_HANDLE \| CTIO_COMPLETION_HANDLE_MARK;
	3064	+ pkt->handle = QLA_TGT_SKIP_HANDLE;
3071	3065
3072	3066	nack = (struct nack_to_isp *)pkt;
3073	3067	nack->ox_id = ntfy->ox_id;
@@ -3110,6 +3104,9 @@ static void qlt_send_term_imm_notif(struct scsi_qla_host *vha, · 36 unmodified lines
3110	3104	#if 0 /* Todo */
3111	3105	if (rc == -ENOMEM)
3112	3106	qlt_alloc_qfull_cmd(vha, imm, 0, 0);
	3107	+#else
	3108	+ if (rc) {
	3109	+ }
3113	3110	#endif
3114	3111	goto done;
3115	3112	}
@@ -6457,12 +6454,29 @@ qlt_24xx_process_atio_queue(struct scsi_qla_host *vha, uint8_t ha_locked) · 3341 unmodified lines
6457	6454	if (!vha->flags.online)
6458	6455	return;
6459	6456
6460		− while (ha->tgt.atio_ring_ptr->signature != ATIO_PROCESSED) {
	6457	+ while ((ha->tgt.atio_ring_ptr->signature != ATIO_PROCESSED) \|\|
	6458	+ fcpcmd_is_corrupted(ha->tgt.atio_ring_ptr)) {
6461	6459	pkt = (struct atio_from_isp *)ha->tgt.atio_ring_ptr;
6462	6460	cnt = pkt->u.raw.entry_count;
6463	6461
6464		− qlt_24xx_atio_pkt_all_vps(vha, (struct atio_from_isp *)pkt,
6465		− ha_locked);
	6462	+ if (unlikely(fcpcmd_is_corrupted(ha->tgt.atio_ring_ptr))) {
	6463	+ /*
	6464	+ * This packet is corrupted. The header + payload
	6465	+ * can not be trusted. There is no point in passing
	6466	+ * it further up.
	6467	+ */
	6468	+ ql_log(ql_log_warn, vha, 0xffff,
	6469	+ "corrupted fcp frame SID[%3phN] OXID[%04x] EXCG[%x] %64phN\n",
	6470	+ pkt->u.isp24.fcp_hdr.s_id,
	6471	+ be16_to_cpu(pkt->u.isp24.fcp_hdr.ox_id),
	6472	+ le32_to_cpu(pkt->u.isp24.exchange_addr), pkt);
	6473	+
	6474	+ adjust_corrupted_atio(pkt);
	6475	+ qlt_send_term_exchange(vha, NULL, pkt, ha_locked, 0);
	6476	+ } else {
	6477	+ qlt_24xx_atio_pkt_all_vps(vha,
	6478	+ (struct atio_from_isp *)pkt, ha_locked);
	6479	+ }
6466	6480
6467	6481	for (i = 0; i < cnt; i++) {
6468	6482	ha->tgt.atio_ring_index++;
@@ -6545,6 +6559,13 @@ qlt_24xx_config_nvram_stage1(struct scsi_qla_host vha, struct nvram_24xx nv) · 76 unmodified lines
6545	6559
6546	6560	/* Disable Full Login after LIP */
6547	6561	nv->host_p &= cpu_to_le32(~BIT_10);
	6562	+
	6563	+ /*
	6564	+ * clear BIT 15 explicitly as we have seen at least
	6565	+ * a couple of instances where this was set and this
	6566	+ * was causing the firmware to not be initialized.
	6567	+ */
	6568	+ nv->firmware_options_1 &= cpu_to_le32(~BIT_15);
6548	6569	/* Enable target PRLI control */
6549	6570	nv->firmware_options_2 \|= cpu_to_le32(BIT_14);
6550	6571	} else {
@@ -6560,9 +6581,6 @@ qlt_24xx_config_nvram_stage1(struct scsi_qla_host vha, struct nvram_24xx nv) · 9 unmodified lines
6560	6581	return;
6561	6582	}
6562	6583
6563		− /* out-of-order frames reassembly */
6564		− nv->firmware_options_3 \|= BIT_6\|BIT_9;
6565		−
6566	6584	if (ha->tgt.enable_class_2) {
6567	6585	if (vha->flags.init_done)
6568	6586	fc_host_supported_classes(vha->host) =
@@ -6629,11 +6647,17 @@ qlt_81xx_config_nvram_stage1(struct scsi_qla_host vha, struct nvram_81xx nv) · 60 unmodified lines
6629	6647	/* Disable ini mode, if requested */
6630	6648	if (!qla_ini_mode_enabled(vha))
6631	6649	nv->firmware_options_1 \|= cpu_to_le32(BIT_5);
6632		−
6633	6650	/* Disable Full Login after LIP */
6634	6651	nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
6635	6652	/* Enable initial LIP */
6636	6653	nv->firmware_options_1 &= cpu_to_le32(~BIT_9);
	6654	+ /*
	6655	+ * clear BIT 15 explicitly as we have seen at
	6656	+ * least a couple of instances where this was set
	6657	+ * and this was causing the firmware to not be
	6658	+ * initialized.
	6659	+ */
	6660	+ nv->firmware_options_1 &= cpu_to_le32(~BIT_15);
6637	6661	if (ql2xtgt_tape_enable)
6638	6662	/* Enable FC tape support */
6639	6663	nv->firmware_options_2 \|= cpu_to_le32(BIT_12);
@@ -6658,9 +6682,6 @@ qlt_81xx_config_nvram_stage1(struct scsi_qla_host vha, struct nvram_81xx nv) · 18 unmodified lines
6658	6682	return;
6659	6683	}
6660	6684
6661		− /* out-of-order frames reassembly */
6662		− nv->firmware_options_3 \|= BIT_6\|BIT_9;
6663		−
6664	6685	if (ha->tgt.enable_class_2) {
6665	6686	if (vha->flags.init_done)
6666	6687	fc_host_supported_classes(vha->host) =

drivers/scsi/qla2xxx/qla_target.h+21−1

@@ -427,13 +427,33 @@ struct atio_from_isp { · 426 unmodified lines
427	427	struct {
428	428	uint8_t entry_type; /* Entry type. */
429	429	uint8_t entry_count; /* Entry count. */
430		− uint8_t data[58];
	430	+ __le16 attr_n_length;
	431	+#define FCP_CMD_LENGTH_MASK 0x0fff
	432	+#define FCP_CMD_LENGTH_MIN 0x38
	433	+ uint8_t data[56];
431	434	uint32_t signature;
432	435	#define ATIO_PROCESSED 0xDEADDEAD /* Signature */
433	436	} raw;
434	437	} u;
435	438	} __packed;
436	439
	440	+static inline int fcpcmd_is_corrupted(struct atio *atio)
	441	+{
	442	+ if (atio->entry_type == ATIO_TYPE7 &&
	443	+ (le16_to_cpu(atio->attr_n_length & FCP_CMD_LENGTH_MASK) <
	444	+ FCP_CMD_LENGTH_MIN))
	445	+ return 1;
	446	+ else
	447	+ return 0;
	448	+}
	449	+
	450	+/* adjust corrupted atio so we won't trip over the same entry again. */
	451	+static inline void adjust_corrupted_atio(struct atio_from_isp *atio)
	452	+{
	453	+ atio->u.raw.attr_n_length = cpu_to_le16(FCP_CMD_LENGTH_MIN);
	454	+ atio->u.isp24.fcp_cmnd.add_cdb_len = 0;
	455	+}
	456	+
437	457	#define CTIO_TYPE7 0x12 /* Continue target I/O entry (for 24xx) */
438	458
439	459	/*

drivers/scsi/qla2xxx/qla_tmpl.c+24−0

@@ -433,6 +433,18 @@ qla27xx_fwdt_entry_t263(struct scsi_qla_host *vha, · 432 unmodified lines
433	433	count++;
434	434	}
435	435	}
	436	+ } else if (QLA_TGT_MODE_ENABLED() &&
	437	+ ent->t263.queue_type == T263_QUEUE_TYPE_ATIO) {
	438	+ struct qla_hw_data *ha = vha->hw;
	439	+ struct atio *atr = ha->tgt.atio_ring;
	440	+
	441	+ if (atr \|\| !buf) {
	442	+ length = ha->tgt.atio_q_length;
	443	+ qla27xx_insert16(0, buf, len);
	444	+ qla27xx_insert16(length, buf, len);
	445	+ qla27xx_insertbuf(atr, length * sizeof(*atr), buf, len);
	446	+ count++;
	447	+ }
436	448	} else {
437	449	ql_dbg(ql_dbg_misc, vha, 0xd026,
438	450	"%s: unknown queue %x\n", __func__, ent->t263.queue_type);
@@ -676,6 +688,18 @@ qla27xx_fwdt_entry_t274(struct scsi_qla_host *vha, · 237 unmodified lines
676	688	count++;
677	689	}
678	690	}
	691	+ } else if (QLA_TGT_MODE_ENABLED() &&
	692	+ ent->t274.queue_type == T274_QUEUE_TYPE_ATIO_SHAD) {
	693	+ struct qla_hw_data *ha = vha->hw;
	694	+ struct atio *atr = ha->tgt.atio_ring_ptr;
	695	+
	696	+ if (atr \|\| !buf) {
	697	+ qla27xx_insert16(0, buf, len);
	698	+ qla27xx_insert16(1, buf, len);
	699	+ qla27xx_insert32(ha->tgt.atio_q_in ?
	700	+ readl(ha->tgt.atio_q_in) : 0, buf, len);
	701	+ count++;
	702	+ }
679	703	} else {
680	704	ql_dbg(ql_dbg_misc, vha, 0xd02f,
681	705	"%s: unknown queue %x\n", __func__, ent->t274.queue_type);

drivers/scsi/qla2xxx/tcm_qla2xxx.c+2−2

@@ -1800,7 +1800,7 @@ static ssize_t tcm_qla2xxx_wwn_version_show(struct config_item *item, · 1799 unmodified lines
1800	1800	{
1801	1801	return sprintf(page,
1802	1802	"TCM QLOGIC QLA2XXX NPIV capable fabric module %s on %s/%s on "
1803		− UTS_RELEASE"\n", TCM_QLA2XXX_VERSION, utsname()->sysname,
	1803	+ UTS_RELEASE"\n", QLA2XXX_VERSION, utsname()->sysname,
1804	1804	utsname()->machine);
1805	1805	}
1806	1806
@@ -1906,7 +1906,7 @@ static int tcm_qla2xxx_register_configfs(void) · 99 unmodified lines
1906	1906	int ret;
1907	1907
1908	1908	pr_debug("TCM QLOGIC QLA2XXX fabric module %s on %s/%s on "
1909		− UTS_RELEASE"\n", TCM_QLA2XXX_VERSION, utsname()->sysname,
	1909	+ UTS_RELEASE"\n", QLA2XXX_VERSION, utsname()->sysname,
1910	1910	utsname()->machine);
1911	1911
1912	1912	ret = target_register_template(&tcm_qla2xxx_ops);

drivers/scsi/qla2xxx/tcm_qla2xxx.h+0−1

@@ -1,7 +1,6 @@
1	1	#include <target/target_core_base.h>
2	2	#include <linux/btree.h>
3	3
4		−#define TCM_QLA2XXX_VERSION "v0.1"
5	4	/* length of ASCII WWPNs including pad */
6	5	#define TCM_QLA2XXX_NAMELEN 32
7	6	/*

drivers/scsi/sd.c+16−7

@@ -2585,7 +2585,8 @@ sd_read_cache_type(struct scsi_disk sdkp, unsigned char buffer) · 2584 unmodified lines
2585	2585	if (sdp->broken_fua) {
2586	2586	sd_first_printk(KERN_NOTICE, sdkp, "Disabling FUA\n");
2587	2587	sdkp->DPOFUA = 0;
2588		− } else if (sdkp->DPOFUA && !sdkp->device->use_10_for_rw) {
	2588	+ } else if (sdkp->DPOFUA && !sdkp->device->use_10_for_rw &&
	2589	+ !sdkp->device->use_16_for_rw) {
2589	2590	sd_first_printk(KERN_NOTICE, sdkp,
2590	2591	"Uses READ/WRITE(6), disabling FUA\n");
2591	2592	sdkp->DPOFUA = 0;
@@ -2768,13 +2769,21 @@ static void sd_read_block_characteristics(struct scsi_disk *sdkp) · 176 unmodified lines
2768	2769	queue_flag_clear_unlocked(QUEUE_FLAG_ADD_RANDOM, q);
2769	2770	}
2770	2771
2771		− sdkp->zoned = (buffer[8] >> 4) & 3;
2772		− if (sdkp->zoned == 1)
2773		− q->limits.zoned = BLK_ZONED_HA;
2774		− else if (sdkp->device->type == TYPE_ZBC)
	2772	+ if (sdkp->device->type == TYPE_ZBC) {
	2773	+ /* Host-managed */
2775	2774	q->limits.zoned = BLK_ZONED_HM;
2776		− else
2777		− q->limits.zoned = BLK_ZONED_NONE;
	2775	+ } else {
	2776	+ sdkp->zoned = (buffer[8] >> 4) & 3;
	2777	+ if (sdkp->zoned == 1)
	2778	+ /* Host-aware */
	2779	+ q->limits.zoned = BLK_ZONED_HA;
	2780	+ else
	2781	+ /*
	2782	+ * Treat drive-managed devices as
	2783	+ * regular block devices.
	2784	+ */
	2785	+ q->limits.zoned = BLK_ZONED_NONE;
	2786	+ }
2778	2787	if (blk_queue_is_zoned(q) && sdkp->first_scan)
2779	2788	sd_printk(KERN_NOTICE, sdkp, "Host-%s zoned block device\n",
2780	2789	q->limits.zoned == BLK_ZONED_HM ? "managed" : "aware");

drivers/scsi/ses.c+1−1

@@ -587,7 +587,7 @@ static void ses_match_to_enclosure(struct enclosure_device *edev, · 586 unmodified lines
587	587
588	588	ses_enclosure_data_process(edev, to_scsi_device(edev->edev.parent), 0);
589	589
590		− if (scsi_is_sas_rphy(&sdev->sdev_gendev))
	590	+ if (scsi_is_sas_rphy(sdev->sdev_target->dev.parent))
591	591	efd.addr = sas_get_address(sdev);
592	592
593	593	if (efd.addr) {

drivers/soc/ti/wkup_m3_ipc.c+1−0

@@ -459,6 +459,7 @@ static int wkup_m3_ipc_probe(struct platform_device *pdev) · 458 unmodified lines
459	459
460	460	if (IS_ERR(task)) {
461	461	dev_err(dev, "can't create rproc_boot thread\n");
	462	+ ret = PTR_ERR(task);
462	463	goto err_put_rproc;
463	464	}
464	465

drivers/spi/Kconfig+1−0

@@ -378,6 +378,7 @@ config SPI_FSL_SPI · 377 unmodified lines
378	378	config SPI_FSL_DSPI
379	379	tristate "Freescale DSPI controller"
380	380	select REGMAP_MMIO
	381	+ depends on HAS_DMA
381	382	depends on SOC_VF610 \|\| SOC_LS1021A \|\| ARCH_LAYERSCAPE \|\| COMPILE_TEST
382	383	help
383	384	This enables support for the Freescale DSPI controller in master

drivers/spi/spi-armada-3700.c+6−5

@@ -800,7 +800,7 @@ static int a3700_spi_probe(struct platform_device *pdev) · 799 unmodified lines
800	800	struct spi_master *master;
801	801	struct a3700_spi *spi;
802	802	u32 num_cs = 0;
803		− int ret = 0;
	803	+ int irq, ret = 0;
804	804
805	805	master = spi_alloc_master(dev, sizeof(*spi));
806	806	if (!master) {
@@ -825,7 +825,7 @@ static int a3700_spi_probe(struct platform_device *pdev) · 18 unmodified lines
825	825	master->unprepare_message = a3700_spi_unprepare_message;
826	826	master->set_cs = a3700_spi_set_cs;
827	827	master->flags = SPI_MASTER_HALF_DUPLEX;
828		− master->mode_bits \|= (SPI_RX_DUAL \| SPI_RX_DUAL \|
	828	+ master->mode_bits \|= (SPI_RX_DUAL \| SPI_TX_DUAL \|
829	829	SPI_RX_QUAD \| SPI_TX_QUAD);
830	830
831	831	platform_set_drvdata(pdev, master);
@@ -846,12 +846,13 @@ static int a3700_spi_probe(struct platform_device *pdev) · 14 unmodified lines
846	846	goto error;
847	847	}
848	848
849		− spi->irq = platform_get_irq(pdev, 0);
850		− if (spi->irq < 0) {
851		− dev_err(dev, "could not get irq: %d\n", spi->irq);
	849	+ irq = platform_get_irq(pdev, 0);
	850	+ if (irq < 0) {
	851	+ dev_err(dev, "could not get irq: %d\n", irq);
852	852	ret = -ENXIO;
853	853	goto error;
854	854	}
	855	+ spi->irq = irq;
855	856
856	857	init_completion(&spi->done);
857	858

drivers/spi/spi-axi-spi-engine.c+2−1

@@ -494,7 +494,8 @@ static int spi_engine_probe(struct platform_device *pdev) · 493 unmodified lines
494	494	SPI_ENGINE_VERSION_MAJOR(version),
495	495	SPI_ENGINE_VERSION_MINOR(version),
496	496	SPI_ENGINE_VERSION_PATCH(version));
497		− return -ENODEV;
	497	+ ret = -ENODEV;
	498	+ goto err_put_master;
498	499	}
499	500
500	501	spi_engine->clk = devm_clk_get(&pdev->dev, "s_axi_aclk");

drivers/spi/spi-davinci.c+2−2

@@ -646,7 +646,7 @@ static int davinci_spi_bufs(struct spi_device spi, struct spi_transfer t) · 645 unmodified lines
646	646	buf = t->rx_buf;
647	647	t->rx_dma = dma_map_single(&spi->dev, buf,
648	648	t->len, DMA_FROM_DEVICE);
649		− if (!t->rx_dma) {
	649	+ if (dma_mapping_error(&spi->dev, !t->rx_dma)) {
650	650	ret = -EFAULT;
651	651	goto err_rx_map;
652	652	}
@@ -660,7 +660,7 @@ static int davinci_spi_bufs(struct spi_device spi, struct spi_transfer t) · 7 unmodified lines
660	660	buf = (void *)t->tx_buf;
661	661	t->tx_dma = dma_map_single(&spi->dev, buf,
662	662	t->len, DMA_TO_DEVICE);
663		− if (!t->tx_dma) {
	663	+ if (dma_mapping_error(&spi->dev, t->tx_dma)) {
664	664	ret = -EFAULT;
665	665	goto err_tx_map;
666	666	}

drivers/spi/spi-dw-mid.c+2−2

@@ -274,11 +274,11 @@ static int mid_spi_dma_transfer(struct dw_spi dws, struct spi_transfer xfer) · 273 unmodified lines
274	274	static void mid_spi_dma_stop(struct dw_spi *dws)
275	275	{
276	276	if (test_bit(TX_BUSY, &dws->dma_chan_busy)) {
277		− dmaengine_terminate_all(dws->txchan);
	277	+ dmaengine_terminate_sync(dws->txchan);
278	278	clear_bit(TX_BUSY, &dws->dma_chan_busy);
279	279	}
280	280	if (test_bit(RX_BUSY, &dws->dma_chan_busy)) {
281		− dmaengine_terminate_all(dws->rxchan);
	281	+ dmaengine_terminate_sync(dws->rxchan);
282	282	clear_bit(RX_BUSY, &dws->dma_chan_busy);
283	283	}
284	284	}

drivers/spi/spi-dw.c+4−1

@@ -107,7 +107,10 @@ static const struct file_operations dw_spi_regs_ops = { · 106 unmodified lines
107	107
108	108	static int dw_spi_debugfs_init(struct dw_spi *dws)
109	109	{
110		− dws->debugfs = debugfs_create_dir("dw_spi", NULL);
	110	+ char name[128];
	111	+
	112	+ snprintf(name, 128, "dw_spi-%s", dev_name(&dws->master->dev));
	113	+ dws->debugfs = debugfs_create_dir(name, NULL);
111	114	if (!dws->debugfs)
112	115	return -ENOMEM;
113	116

drivers/spi/spi-pxa2xx.c+1−0

@@ -1690,6 +1690,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) · 1689 unmodified lines
1690	1690	pxa2xx_spi_write(drv_data, SSCR1, tmp);
1691	1691	tmp = SSCR0_SCR(2) \| SSCR0_Motorola \| SSCR0_DataSize(8);
1692	1692	pxa2xx_spi_write(drv_data, SSCR0, tmp);
	1693	+ break;
1693	1694	default:
1694	1695	tmp = SSCR1_RxTresh(RX_THRESH_DFLT) \|
1695	1696	SSCR1_TxTresh(TX_THRESH_DFLT);

drivers/spi/spi-sh-msiof.c+3−1

@@ -973,14 +973,16 @@ static const struct sh_msiof_chipdata r8a779x_data = { · 972 unmodified lines
973	973	};
974	974
975	975	static const struct of_device_id sh_msiof_match[] = {
976		− { .compatible = "renesas,sh-msiof", .data = &sh_data },
977	976	{ .compatible = "renesas,sh-mobile-msiof", .data = &sh_data },
978	977	{ .compatible = "renesas,msiof-r8a7790", .data = &r8a779x_data },
979	978	{ .compatible = "renesas,msiof-r8a7791", .data = &r8a779x_data },
980	979	{ .compatible = "renesas,msiof-r8a7792", .data = &r8a779x_data },
981	980	{ .compatible = "renesas,msiof-r8a7793", .data = &r8a779x_data },
982	981	{ .compatible = "renesas,msiof-r8a7794", .data = &r8a779x_data },
	982	+ { .compatible = "renesas,rcar-gen2-msiof", .data = &r8a779x_data },
983	983	{ .compatible = "renesas,msiof-r8a7796", .data = &r8a779x_data },
	984	+ { .compatible = "renesas,rcar-gen3-msiof", .data = &r8a779x_data },
	985	+ { .compatible = "renesas,sh-msiof", .data = &sh_data }, /* Deprecated */
984	986	{},
985	987	};
986	988	MODULE_DEVICE_TABLE(of, sh_msiof_match);

drivers/thermal/rockchip_thermal.c+100−53

@@ -118,12 +118,12 @@ struct rockchip_tsadc_chip { · 117 unmodified lines
118	118	void (control)(void __iomem reg, bool on);
119	119
120	120	/* Per-sensor methods */
121		− int (*get_temp)(struct chip_tsadc_table table,
	121	+ int (get_temp)(const struct chip_tsadc_table table,
122	122	int chn, void __iomem reg, int temp);
123		− void (*set_alarm_temp)(struct chip_tsadc_table table,
124		− int chn, void __iomem *reg, int temp);
125		− void (*set_tshut_temp)(struct chip_tsadc_table table,
126		− int chn, void __iomem *reg, int temp);
	123	+ int (set_alarm_temp)(const struct chip_tsadc_table table,
	124	+ int chn, void __iomem *reg, int temp);
	125	+ int (set_tshut_temp)(const struct chip_tsadc_table table,
	126	+ int chn, void __iomem *reg, int temp);
127	127	void (set_tshut_mode)(int chn, void __iomem reg, enum tshut_mode m);
128	128
129	129	/* Per-table methods */
@@ -317,6 +317,7 @@ static const struct tsadc_table rk3288_code_table[] = { · 187 unmodified lines
317	317	{3452, 115000},
318	318	{3437, 120000},
319	319	{3421, 125000},
	320	+ {0, 125000},
320	321	};
321	322
322	323	static const struct tsadc_table rk3368_code_table[] = {
@@ -397,59 +398,80 @@ static const struct tsadc_table rk3399_code_table[] = { · 74 unmodified lines
397	398	{TSADCV3_DATA_MASK, 125000},
398	399	};
399	400
400		−static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
	401	+static u32 rk_tsadcv2_temp_to_code(const struct chip_tsadc_table *table,
401	402	int temp)
402	403	{
403	404	int high, low, mid;
404		− u32 error = 0;
	405	+ unsigned long num;
	406	+ unsigned int denom;
	407	+ u32 error = table->data_mask;
405	408
406	409	low = 0;
407		− high = table.length - 1;
	410	+ high = (table->length - 1) - 1; /* ignore the last check for table */
408	411	mid = (high + low) / 2;
409	412
410	413	/* Return mask code data when the temp is over table range */
411		− if (temp < table.id[low].temp \|\| temp > table.id[high].temp) {
412		− error = table.data_mask;
	414	+ if (temp < table->id[low].temp \|\| temp > table->id[high].temp)
413	415	goto exit;
414		− }
415	416
416	417	while (low <= high) {
417		− if (temp == table.id[mid].temp)
418		− return table.id[mid].code;
419		− else if (temp < table.id[mid].temp)
	418	+ if (temp == table->id[mid].temp)
	419	+ return table->id[mid].code;
	420	+ else if (temp < table->id[mid].temp)
420	421	high = mid - 1;
421	422	else
422	423	low = mid + 1;
423	424	mid = (low + high) / 2;
424	425	}
425	426
	427	+ /*
	428	+ * The conversion code granularity provided by the table. Let's
	429	+ * assume that the relationship between temperature and
	430	+ * analog value between 2 table entries is linear and interpolate
	431	+ * to produce less granular result.
	432	+ */
	433	+ num = abs(table->id[mid + 1].code - table->id[mid].code);
	434	+ num *= temp - table->id[mid].temp;
	435	+ denom = table->id[mid + 1].temp - table->id[mid].temp;
	436	+
	437	+ switch (table->mode) {
	438	+ case ADC_DECREMENT:
	439	+ return table->id[mid].code - (num / denom);
	440	+ case ADC_INCREMENT:
	441	+ return table->id[mid].code + (num / denom);
	442	+ default:
	443	+ pr_err("%s: unknown table mode: %d\n", __func__, table->mode);
	444	+ return error;
	445	+ }
	446	+
426	447	exit:
427		− pr_err("Invalid the conversion, error=%d\n", error);
	448	+ pr_err("%s: invalid temperature, temp=%d error=%d\n",
	449	+ __func__, temp, error);
428	450	return error;
429	451	}
430	452
431		−static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
432		− int *temp)
	453	+static int rk_tsadcv2_code_to_temp(const struct chip_tsadc_table *table,
	454	+ u32 code, int *temp)
433	455	{
434	456	unsigned int low = 1;
435		− unsigned int high = table.length - 1;
	457	+ unsigned int high = table->length - 1;
436	458	unsigned int mid = (low + high) / 2;
437	459	unsigned int num;
438	460	unsigned long denom;
439	461
440		− WARN_ON(table.length < 2);
	462	+ WARN_ON(table->length < 2);
441	463
442		− switch (table.mode) {
	464	+ switch (table->mode) {
443	465	case ADC_DECREMENT:
444		− code &= table.data_mask;
445		− if (code < table.id[high].code)
	466	+ code &= table->data_mask;
	467	+ if (code <= table->id[high].code)
446	468	return -EAGAIN; /* Incorrect reading */
447	469
448	470	while (low <= high) {
449		− if (code >= table.id[mid].code &&
450		− code < table.id[mid - 1].code)
	471	+ if (code >= table->id[mid].code &&
	472	+ code < table->id[mid - 1].code)
451	473	break;
452		− else if (code < table.id[mid].code)
	474	+ else if (code < table->id[mid].code)
453	475	low = mid + 1;
454	476	else
455	477	high = mid - 1;
@@ -458,15 +480,15 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code, · 2 unmodified lines
458	480	}
459	481	break;
460	482	case ADC_INCREMENT:
461		− code &= table.data_mask;
462		− if (code < table.id[low].code)
	483	+ code &= table->data_mask;
	484	+ if (code < table->id[low].code)
463	485	return -EAGAIN; /* Incorrect reading */
464	486
465	487	while (low <= high) {
466		− if (code <= table.id[mid].code &&
467		− code > table.id[mid - 1].code)
	488	+ if (code <= table->id[mid].code &&
	489	+ code > table->id[mid - 1].code)
468	490	break;
469		− else if (code > table.id[mid].code)
	491	+ else if (code > table->id[mid].code)
470	492	low = mid + 1;
471	493	else
472	494	high = mid - 1;
@@ -475,7 +497,8 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code, · 2 unmodified lines
475	497	}
476	498	break;
477	499	default:
478		− pr_err("Invalid the conversion table\n");
	500	+ pr_err("%s: unknown table mode: %d\n", __func__, table->mode);
	501	+ return -EINVAL;
479	502	}
480	503
481	504	/*
@@ -484,10 +507,10 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code, · 2 unmodified lines
484	507	* temperature between 2 table entries is linear and interpolate
485	508	* to produce less granular result.
486	509	*/
487		− num = table.id[mid].temp - table.id[mid - 1].temp;
488		− num *= abs(table.id[mid - 1].code - code);
489		− denom = abs(table.id[mid - 1].code - table.id[mid].code);
490		− *temp = table.id[mid - 1].temp + (num / denom);
	510	+ num = table->id[mid].temp - table->id[mid - 1].temp;
	511	+ num *= abs(table->id[mid - 1].code - code);
	512	+ denom = abs(table->id[mid - 1].code - table->id[mid].code);
	513	+ *temp = table->id[mid - 1].temp + (num / denom);
491	514
492	515	return 0;
493	516	}
@@ -638,7 +661,7 @@ static void rk_tsadcv3_control(void __iomem *regs, bool enable) · 144 unmodified lines
638	661	writel_relaxed(val, regs + TSADCV2_AUTO_CON);
639	662	}
640	663
641		−static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
	664	+static int rk_tsadcv2_get_temp(const struct chip_tsadc_table *table,
642	665	int chn, void __iomem regs, int temp)
643	666	{
644	667	u32 val;
@@ -648,39 +671,57 @@ static int rk_tsadcv2_get_temp(struct chip_tsadc_table table, · 3 unmodified lines
648	671	return rk_tsadcv2_code_to_temp(table, val, temp);
649	672	}
650	673
651		−static void rk_tsadcv2_alarm_temp(struct chip_tsadc_table table,
652		− int chn, void __iomem *regs, int temp)
	674	+static int rk_tsadcv2_alarm_temp(const struct chip_tsadc_table *table,
	675	+ int chn, void __iomem *regs, int temp)
653	676	{
654		− u32 alarm_value, int_en;
	677	+ u32 alarm_value;
	678	+ u32 int_en, int_clr;
	679	+
	680	+ /*
	681	+ * In some cases, some sensors didn't need the trip points, the
	682	+ * set_trips will pass {-INT_MAX, INT_MAX} to trigger tsadc alarm
	683	+ * in the end, ignore this case and disable the high temperature
	684	+ * interrupt.
	685	+ */
	686	+ if (temp == INT_MAX) {
	687	+ int_clr = readl_relaxed(regs + TSADCV2_INT_EN);
	688	+ int_clr &= ~TSADCV2_INT_SRC_EN(chn);
	689	+ writel_relaxed(int_clr, regs + TSADCV2_INT_EN);
	690	+ return 0;
	691	+ }
655	692
656	693	/* Make sure the value is valid */
657	694	alarm_value = rk_tsadcv2_temp_to_code(table, temp);
658		− if (alarm_value == table.data_mask)
659		− return;
	695	+ if (alarm_value == table->data_mask)
	696	+ return -ERANGE;
660	697
661		− writel_relaxed(alarm_value & table.data_mask,
	698	+ writel_relaxed(alarm_value & table->data_mask,
662	699	regs + TSADCV2_COMP_INT(chn));
663	700
664	701	int_en = readl_relaxed(regs + TSADCV2_INT_EN);
665	702	int_en \|= TSADCV2_INT_SRC_EN(chn);
666	703	writel_relaxed(int_en, regs + TSADCV2_INT_EN);
	704	+
	705	+ return 0;
667	706	}
668	707
669		−static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
670		− int chn, void __iomem *regs, int temp)
	708	+static int rk_tsadcv2_tshut_temp(const struct chip_tsadc_table *table,
	709	+ int chn, void __iomem *regs, int temp)
671	710	{
672	711	u32 tshut_value, val;
673	712
674	713	/* Make sure the value is valid */
675	714	tshut_value = rk_tsadcv2_temp_to_code(table, temp);
676		− if (tshut_value == table.data_mask)
677		− return;
	715	+ if (tshut_value == table->data_mask)
	716	+ return -ERANGE;
678	717
679	718	writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
680	719
681	720	/* TSHUT will be valid */
682	721	val = readl_relaxed(regs + TSADCV2_AUTO_CON);
683	722	writel_relaxed(val \| TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
	723	+
	724	+ return 0;
684	725	}
685	726
686	727	static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
@@ -883,10 +924,8 @@ static int rockchip_thermal_set_trips(void *_sensor, int low, int high) · 196 unmodified lines
883	924	dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %d, high %d\n",
884	925	__func__, sensor->id, low, high);
885	926
886		− tsadc->set_alarm_temp(tsadc->table,
887		− sensor->id, thermal->regs, high);
888		−
889		− return 0;
	927	+ return tsadc->set_alarm_temp(&tsadc->table,
	928	+ sensor->id, thermal->regs, high);
890	929	}
891	930
892	931	static int rockchip_thermal_get_temp(void _sensor, int out_temp)
@@ -896,7 +935,7 @@ static int rockchip_thermal_get_temp(void _sensor, int out_temp) · 3 unmodified lines
896	935	const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
897	936	int retval;
898	937
899		− retval = tsadc->get_temp(tsadc->table,
	938	+ retval = tsadc->get_temp(&tsadc->table,
900	939	sensor->id, thermal->regs, out_temp);
901	940	dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
902	941	sensor->id, *out_temp, retval);
@@ -982,8 +1021,12 @@ rockchip_thermal_register_sensor(struct platform_device *pdev, · 79 unmodified lines
982	1021	int error;
983	1022
984	1023	tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
985		− tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
	1024	+
	1025	+ error = tsadc->set_tshut_temp(&tsadc->table, id, thermal->regs,
986	1026	thermal->tshut_temp);
	1027	+ if (error)
	1028	+ dev_err(&pdev->dev, "%s: invalid tshut=%d, error=%d\n",
	1029	+ __func__, thermal->tshut_temp, error);
987	1030
988	1031	sensor->thermal = thermal;
989	1032	sensor->id = id;
@@ -1196,9 +1239,13 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev) · 206 unmodified lines
1196	1239
1197	1240	thermal->chip->set_tshut_mode(id, thermal->regs,
1198	1241	thermal->tshut_mode);
1199		− thermal->chip->set_tshut_temp(thermal->chip->table,
	1242	+
	1243	+ error = thermal->chip->set_tshut_temp(&thermal->chip->table,
1200	1244	id, thermal->regs,
1201	1245	thermal->tshut_temp);
	1246	+ if (error)
	1247	+ dev_err(&pdev->dev, "%s: invalid tshut=%d, error=%d\n",
	1248	+ __func__, thermal->tshut_temp, error);
1202	1249	}
1203	1250
1204	1251	thermal->chip->control(thermal->regs, true);

drivers/thermal/thermal_core.c+5−5

@@ -799,6 +799,11 @@ static void thermal_release(struct device *dev) · 798 unmodified lines
799	799	if (!strncmp(dev_name(dev), "thermal_zone",
800	800	sizeof("thermal_zone") - 1)) {
801	801	tz = to_thermal_zone(dev);
	802	+ kfree(tz->trip_type_attrs);
	803	+ kfree(tz->trip_temp_attrs);
	804	+ kfree(tz->trip_hyst_attrs);
	805	+ kfree(tz->trips_attribute_group.attrs);
	806	+ kfree(tz->device.groups);
802	807	kfree(tz);
803	808	} else if (!strncmp(dev_name(dev), "cooling_device",
804	809	sizeof("cooling_device") - 1)) {
@@ -1305,10 +1310,6 @@ void thermal_zone_device_unregister(struct thermal_zone_device *tz) · 500 unmodified lines
1305	1310
1306	1311	thermal_zone_device_set_polling(tz, 0);
1307	1312
1308		− kfree(tz->trip_type_attrs);
1309		− kfree(tz->trip_temp_attrs);
1310		− kfree(tz->trip_hyst_attrs);
1311		− kfree(tz->trips_attribute_group.attrs);
1312	1313	thermal_set_governor(tz, NULL);
1313	1314
1314	1315	thermal_remove_hwmon_sysfs(tz);
@@ -1316,7 +1317,6 @@ void thermal_zone_device_unregister(struct thermal_zone_device *tz) · 1 unmodified line
1316	1317	idr_destroy(&tz->idr);
1317	1318	mutex_destroy(&tz->lock);
1318	1319	device_unregister(&tz->device);
1319		− kfree(tz->device.groups);
1320	1320	}
1321	1321	EXPORT_SYMBOL_GPL(thermal_zone_device_unregister);
1322	1322

drivers/thermal/thermal_hwmon.c+3−17

@@ -58,14 +58,6 @@ static LIST_HEAD(thermal_hwmon_list); · 57 unmodified lines
58	58
59	59	static DEFINE_MUTEX(thermal_hwmon_list_lock);
60	60
61		−static ssize_t
62		−name_show(struct device dev, struct device_attribute attr, char *buf)
63		−{
64		− struct thermal_hwmon_device *hwmon = dev_get_drvdata(dev);
65		− return sprintf(buf, "%s\n", hwmon->type);
66		−}
67		−static DEVICE_ATTR_RO(name);
68		−
69	61	static ssize_t
70	62	temp_input_show(struct device dev, struct device_attribute attr, char *buf)
71	63	{
@@ -165,15 +157,12 @@ int thermal_add_hwmon_sysfs(struct thermal_zone_device *tz) · 93 unmodified lines
165	157
166	158	INIT_LIST_HEAD(&hwmon->tz_list);
167	159	strlcpy(hwmon->type, tz->type, THERMAL_NAME_LENGTH);
168		− hwmon->device = hwmon_device_register(NULL);
	160	+ hwmon->device = hwmon_device_register_with_info(NULL, hwmon->type,
	161	+ hwmon, NULL, NULL);
169	162	if (IS_ERR(hwmon->device)) {
170	163	result = PTR_ERR(hwmon->device);
171	164	goto free_mem;
172	165	}
173		− dev_set_drvdata(hwmon->device, hwmon);
174		− result = device_create_file(hwmon->device, &dev_attr_name);
175		− if (result)
176		− goto free_mem;
177	166
178	167	register_sys_interface:
179	168	temp = kzalloc(sizeof(*temp), GFP_KERNEL);
@@ -222,10 +211,8 @@ int thermal_add_hwmon_sysfs(struct thermal_zone_device *tz) · 42 unmodified lines
222	211	free_temp_mem:
223	212	kfree(temp);
224	213	unregister_name:
225		− if (new_hwmon_device) {
226		− device_remove_file(hwmon->device, &dev_attr_name);
	214	+ if (new_hwmon_device)
227	215	hwmon_device_unregister(hwmon->device);
228		− }
229	216	free_mem:
230	217	if (new_hwmon_device)
231	218	kfree(hwmon);
@@ -267,7 +254,6 @@ void thermal_remove_hwmon_sysfs(struct thermal_zone_device *tz) · 35 unmodified lines
267	254	list_del(&hwmon->node);
268	255	mutex_unlock(&thermal_hwmon_list_lock);
269	256
270		− device_remove_file(hwmon->device, &dev_attr_name);
271	257	hwmon_device_unregister(hwmon->device);
272	258	kfree(hwmon);
273	259	}

drivers/usb/dwc2/core.h+2−2

@@ -513,8 +513,8 @@ struct dwc2_core_params { · 512 unmodified lines
513	513	/* Gadget parameters */
514	514	bool g_dma;
515	515	bool g_dma_desc;
516		− u16 g_rx_fifo_size;
517		− u16 g_np_tx_fifo_size;
	516	+ u32 g_rx_fifo_size;
	517	+ u32 g_np_tx_fifo_size;
518	518	u32 g_tx_fifo_size[MAX_EPS_CHANNELS];
519	519	};
520	520

drivers/usb/dwc2/gadget.c+5−13

@@ -3169,7 +3169,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg, · 3168 unmodified lines
3169	3169	/* keep other bits untouched (so e.g. forced modes are not lost) */
3170	3170	usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
3171	3171	usbcfg &= ~(GUSBCFG_TOUTCAL_MASK \| GUSBCFG_PHYIF16 \| GUSBCFG_SRPCAP \|
3172		− GUSBCFG_HNPCAP);
	3172	+ GUSBCFG_HNPCAP \| GUSBCFG_USBTRDTIM_MASK);
3173	3173
3174	3174	if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS &&
3175	3175	(hsotg->params.speed == DWC2_SPEED_PARAM_FULL \|\|
@@ -3749,8 +3749,8 @@ static int dwc2_hsotg_ep_enable(struct usb_ep *ep, · 573 unmodified lines
3749	3749	__func__, epctrl, epctrl_reg);
3750	3750
3751	3751	/* Allocate DMA descriptor chain for non-ctrl endpoints */
3752		− if (using_desc_dma(hsotg)) {
3753		− hs_ep->desc_list = dma_alloc_coherent(hsotg->dev,
	3752	+ if (using_desc_dma(hsotg) && !hs_ep->desc_list) {
	3753	+ hs_ep->desc_list = dmam_alloc_coherent(hsotg->dev,
3754	3754	MAX_DMA_DESC_NUM_GENERIC *
3755	3755	sizeof(struct dwc2_dma_desc),
3756	3756	&hs_ep->desc_list_dma, GFP_ATOMIC);
@@ -3872,7 +3872,7 @@ error1: · 115 unmodified lines
3872	3872
3873	3873	error2:
3874	3874	if (ret && using_desc_dma(hsotg) && hs_ep->desc_list) {
3875		− dma_free_coherent(hsotg->dev, MAX_DMA_DESC_NUM_GENERIC *
	3875	+ dmam_free_coherent(hsotg->dev, MAX_DMA_DESC_NUM_GENERIC *
3876	3876	sizeof(struct dwc2_dma_desc),
3877	3877	hs_ep->desc_list, hs_ep->desc_list_dma);
3878	3878	hs_ep->desc_list = NULL;
@@ -3902,14 +3902,6 @@ static int dwc2_hsotg_ep_disable(struct usb_ep *ep) · 23 unmodified lines
3902	3902	return -EINVAL;
3903	3903	}
3904	3904
3905		− /* Remove DMA memory allocated for non-control Endpoints */
3906		− if (using_desc_dma(hsotg)) {
3907		− dma_free_coherent(hsotg->dev, MAX_DMA_DESC_NUM_GENERIC *
3908		− sizeof(struct dwc2_dma_desc),
3909		− hs_ep->desc_list, hs_ep->desc_list_dma);
3910		− hs_ep->desc_list = NULL;
3911		− }
3912		−
3913	3905	epctrl_reg = dir_in ? DIEPCTL(index) : DOEPCTL(index);
3914	3906
3915	3907	spin_lock_irqsave(&hsotg->lock, flags);
@@ -4131,7 +4123,7 @@ static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg) · 215 unmodified lines
4131	4123	/* keep other bits untouched (so e.g. forced modes are not lost) */
4132	4124	usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
4133	4125	usbcfg &= ~(GUSBCFG_TOUTCAL_MASK \| GUSBCFG_PHYIF16 \| GUSBCFG_SRPCAP \|
4134		− GUSBCFG_HNPCAP);
	4126	+ GUSBCFG_HNPCAP \| GUSBCFG_USBTRDTIM_MASK);
4135	4127
4136	4128	/* set the PLL on, remove the HNP/SRP and set the PHY */
4137	4129	trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;

drivers/usb/dwc2/hcd.c+5−2

@@ -4367,6 +4367,9 @@ static int _dwc2_hcd_suspend(struct usb_hcd *hcd) · 4366 unmodified lines
4367	4367	if (!HCD_HW_ACCESSIBLE(hcd))
4368	4368	goto unlock;
4369	4369
	4370	+ if (hsotg->op_state == OTG_STATE_B_PERIPHERAL)
	4371	+ goto unlock;
	4372	+
4370	4373	if (!hsotg->params.hibernation)
4371	4374	goto skip_power_saving;
4372	4375
@@ -4489,8 +4492,8 @@ static void dwc2_dump_urb_info(struct usb_hcd hcd, struct urb urb, · 116 unmodified lines
4489	4492	{
4490	4493	#ifdef VERBOSE_DEBUG
4491	4494	struct dwc2_hsotg *hsotg = dwc2_hcd_to_hsotg(hcd);
4492		− char *pipetype;
4493		− char *speed;
	4495	+ char *pipetype = NULL;
	4496	+ char *speed = NULL;
4494	4497
4495	4498	dev_vdbg(hsotg->dev, "%s, urb %p\n", fn_name, urb);
4496	4499	dev_vdbg(hsotg->dev, " Device address: %d\n",

drivers/usb/dwc2/params.c+5−5

@@ -385,16 +385,16 @@ static void dwc2_set_param(struct dwc2_hsotg hsotg, void param, · 384 unmodified lines
385	385	}
386	386
387	387	/**
388		− * dwc2_set_param_u16() - Set a u16 parameter
	388	+ * dwc2_set_param_u32() - Set a u32 parameter
389	389	*
390	390	* See dwc2_set_param().
391	391	*/
392		−static void dwc2_set_param_u16(struct dwc2_hsotg hsotg, u16 param,
	392	+static void dwc2_set_param_u32(struct dwc2_hsotg hsotg, u32 param,
393	393	bool lookup, char *property, u16 legacy,
394	394	u16 def, u16 min, u16 max)
395	395	{
396	396	dwc2_set_param(hsotg, param, lookup, property,
397		− legacy, def, min, max, 2);
	397	+ legacy, def, min, max, 4);
398	398	}
399	399
400	400	/**
@@ -1178,12 +1178,12 @@ static void dwc2_set_parameters(struct dwc2_hsotg *hsotg, · 777 unmodified lines
1178	1178	* auto-detect if the hardware does not support the
1179	1179	* default.
1180	1180	*/
1181		− dwc2_set_param_u16(hsotg, &p->g_rx_fifo_size,
	1181	+ dwc2_set_param_u32(hsotg, &p->g_rx_fifo_size,
1182	1182	true, "g-rx-fifo-size", 2048,
1183	1183	hw->rx_fifo_size,
1184	1184	16, hw->rx_fifo_size);
1185	1185
1186		− dwc2_set_param_u16(hsotg, &p->g_np_tx_fifo_size,
	1186	+ dwc2_set_param_u32(hsotg, &p->g_np_tx_fifo_size,
1187	1187	true, "g-np-tx-fifo-size", 1024,
1188	1188	hw->dev_nperio_tx_fifo_size,
1189	1189	16, hw->dev_nperio_tx_fifo_size);

drivers/usb/dwc3/dwc3-exynos.c+3−1

@@ -138,7 +138,8 @@ static int dwc3_exynos_probe(struct platform_device *pdev) · 137 unmodified lines
138	138	exynos->axius_clk = devm_clk_get(dev, "usbdrd30_axius_clk");
139	139	if (IS_ERR(exynos->axius_clk)) {
140	140	dev_err(dev, "no AXI UpScaler clk specified\n");
141		− return -ENODEV;
	141	+ ret = -ENODEV;
	142	+ goto axius_clk_err;
142	143	}
143	144	clk_prepare_enable(exynos->axius_clk);
144	145	} else {
@@ -196,6 +197,7 @@ err3: · 51 unmodified lines
196	197	regulator_disable(exynos->vdd33);
197	198	err2:
198	199	clk_disable_unprepare(exynos->axius_clk);
	200	+axius_clk_err:
199	201	clk_disable_unprepare(exynos->susp_clk);
200	202	clk_disable_unprepare(exynos->clk);
201	203	return ret;

drivers/usb/gadget/composite.c+1−1

@@ -2147,7 +2147,7 @@ int composite_os_desc_req_prepare(struct usb_composite_dev *cdev, · 2146 unmodified lines
2147	2147	cdev->os_desc_req->buf = kmalloc(4096, GFP_KERNEL);
2148	2148	if (!cdev->os_desc_req->buf) {
2149	2149	ret = -ENOMEM;
2150		− kfree(cdev->os_desc_req);
	2150	+ usb_ep_free_request(ep0, cdev->os_desc_req);
2151	2151	goto end;
2152	2152	}
2153	2153	cdev->os_desc_req->context = cdev;

drivers/usb/gadget/function/f_fs.c+6−6

@@ -1806,7 +1806,7 @@ static void ffs_func_eps_disable(struct ffs_function *func) · 1805 unmodified lines
1806	1806	unsigned long flags;
1807	1807
1808	1808	spin_lock_irqsave(&func->ffs->eps_lock, flags);
1809		− do {
	1809	+ while (count--) {
1810	1810	/* pending requests get nuked */
1811	1811	if (likely(ep->ep))
1812	1812	usb_ep_disable(ep->ep);
@@ -1817,7 +1817,7 @@ static void ffs_func_eps_disable(struct ffs_function *func) · 4 unmodified lines
1817	1817	__ffs_epfile_read_buffer_free(epfile);
1818	1818	++epfile;
1819	1819	}
1820		− } while (--count);
	1820	+ }
1821	1821	spin_unlock_irqrestore(&func->ffs->eps_lock, flags);
1822	1822	}
1823	1823
@@ -1831,7 +1831,7 @@ static int ffs_func_eps_enable(struct ffs_function *func) · 7 unmodified lines
1831	1831	int ret = 0;
1832	1832
1833	1833	spin_lock_irqsave(&func->ffs->eps_lock, flags);
1834		− do {
	1834	+ while(count--) {
1835	1835	struct usb_endpoint_descriptor *ds;
1836	1836	int desc_idx;
1837	1837
@@ -1867,7 +1867,7 @@ static int ffs_func_eps_enable(struct ffs_function *func) · 29 unmodified lines
1867	1867
1868	1868	++ep;
1869	1869	++epfile;
1870		− } while (--count);
	1870	+ }
1871	1871	spin_unlock_irqrestore(&func->ffs->eps_lock, flags);
1872	1872
1873	1873	return ret;
@@ -3448,12 +3448,12 @@ static void ffs_func_unbind(struct usb_configuration *c, · 1574 unmodified lines
3448	3448
3449	3449	/* cleanup after autoconfig */
3450	3450	spin_lock_irqsave(&func->ffs->eps_lock, flags);
3451		− do {
	3451	+ while (count--) {
3452	3452	if (ep->ep && ep->req)
3453	3453	usb_ep_free_request(ep->ep, ep->req);
3454	3454	ep->req = NULL;
3455	3455	++ep;
3456		− } while (--count);
	3456	+ }
3457	3457	spin_unlock_irqrestore(&func->ffs->eps_lock, flags);
3458	3458	kfree(func->eps);
3459	3459	func->eps = NULL;

drivers/usb/gadget/udc/atmel_usba_udc.c+2−1

@@ -1978,7 +1978,8 @@ static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev, · 1977 unmodified lines
1978	1978	dev_err(&pdev->dev, "of_probe: name error(%d)\n", ret);
1979	1979	goto err;
1980	1980	}
1981		− ep->ep.name = kasprintf(GFP_KERNEL, "ep%d", ep->index);
	1981	+ sprintf(ep->name, "ep%d", ep->index);
	1982	+ ep->ep.name = ep->name;
1982	1983
1983	1984	ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
1984	1985	ep->dma_regs = udc->regs + USBA_DMA_BASE(i);

drivers/usb/gadget/udc/atmel_usba_udc.h+1−0

@@ -280,6 +280,7 @@ struct usba_ep { · 279 unmodified lines
280	280	void __iomem *ep_regs;
281	281	void __iomem *dma_regs;
282	282	void __iomem *fifo;
	283	+ char name[8];
283	284	struct usb_ep ep;
284	285	struct usba_udc *udc;
285	286

drivers/usb/host/xhci-plat.c+1−1

@@ -165,7 +165,7 @@ static int xhci_plat_probe(struct platform_device *pdev) · 164 unmodified lines
165	165	return -ENODEV;
166	166
167	167	/* Try to set 64-bit DMA first */
168		− if (WARN_ON(!pdev->dev.dma_mask))
	168	+ if (!pdev->dev.dma_mask)
169	169	/* Platform did not initialize dma_mask */
170	170	ret = dma_coerce_mask_and_coherent(&pdev->dev,
171	171	DMA_BIT_MASK(64));

drivers/vhost/scsi.c+2−2

@@ -843,7 +843,7 @@ vhost_scsi_handle_vq(struct vhost_scsi vs, struct vhost_virtqueue vq) · 842 unmodified lines
843	843	struct iov_iter out_iter, in_iter, prot_iter, data_iter;
844	844	u64 tag;
845	845	u32 exp_data_len, data_direction;
846		− unsigned out, in;
	846	+ unsigned int out = 0, in = 0;
847	847	int head, ret, prot_bytes;
848	848	size_t req_size, rsp_size = sizeof(struct virtio_scsi_cmd_resp);
849	849	size_t out_size, in_size;
@@ -2087,7 +2087,7 @@ static struct configfs_attribute *vhost_scsi_wwn_attrs[] = { · 1237 unmodified lines
2087	2087	NULL,
2088	2088	};
2089	2089
2090		−static struct target_core_fabric_ops vhost_scsi_ops = {
	2090	+static const struct target_core_fabric_ops vhost_scsi_ops = {
2091	2091	.module = THIS_MODULE,
2092	2092	.name = "vhost",
2093	2093	.get_fabric_name = vhost_scsi_get_fabric_name,

drivers/xen/platform-pci.c+71−0

@@ -42,6 +42,7 @@ · 41 unmodified lines
42	42	static unsigned long platform_mmio;
43	43	static unsigned long platform_mmio_alloc;
44	44	static unsigned long platform_mmiolen;
	45	+static uint64_t callback_via;
45	46
46	47	static unsigned long alloc_xen_mmio(unsigned long len)
47	48	{
@@ -54,6 +55,51 @@ static unsigned long alloc_xen_mmio(unsigned long len) · 6 unmodified lines
54	55	return addr;
55	56	}
56	57
	58	+static uint64_t get_callback_via(struct pci_dev *pdev)
	59	+{
	60	+ u8 pin;
	61	+ int irq;
	62	+
	63	+ irq = pdev->irq;
	64	+ if (irq < 16)
	65	+ return irq; /* ISA IRQ */
	66	+
	67	+ pin = pdev->pin;
	68	+
	69	+ /* We don't know the GSI. Specify the PCI INTx line instead. */
	70	+ return ((uint64_t)0x01 << HVM_CALLBACK_VIA_TYPE_SHIFT) \| /* PCI INTx identifier */
	71	+ ((uint64_t)pci_domain_nr(pdev->bus) << 32) \|
	72	+ ((uint64_t)pdev->bus->number << 16) \|
	73	+ ((uint64_t)(pdev->devfn & 0xff) << 8) \|
	74	+ ((uint64_t)(pin - 1) & 3);
	75	+}
	76	+
	77	+static irqreturn_t do_hvm_evtchn_intr(int irq, void *dev_id)
	78	+{
	79	+ xen_hvm_evtchn_do_upcall();
	80	+ return IRQ_HANDLED;
	81	+}
	82	+
	83	+static int xen_allocate_irq(struct pci_dev *pdev)
	84	+{
	85	+ return request_irq(pdev->irq, do_hvm_evtchn_intr,
	86	+ IRQF_NOBALANCING \| IRQF_TRIGGER_RISING,
	87	+ "xen-platform-pci", pdev);
	88	+}
	89	+
	90	+static int platform_pci_resume(struct pci_dev *pdev)
	91	+{
	92	+ int err;
	93	+ if (!xen_pv_domain())
	94	+ return 0;
	95	+ err = xen_set_callback_via(callback_via);
	96	+ if (err) {
	97	+ dev_err(&pdev->dev, "platform_pci_resume failure!\n");
	98	+ return err;
	99	+ }
	100	+ return 0;
	101	+}
	102	+
57	103	static int platform_pci_probe(struct pci_dev *pdev,
58	104	const struct pci_device_id *ent)
59	105	{
@@ -92,6 +138,28 @@ static int platform_pci_probe(struct pci_dev *pdev, · 32 unmodified lines
92	138	platform_mmio = mmio_addr;
93	139	platform_mmiolen = mmio_len;
94	140
	141	+ /*
	142	+ * Xen HVM guests always use the vector callback mechanism.
	143	+ * L1 Dom0 in a nested Xen environment is a PV guest inside in an
	144	+ * HVM environment. It needs the platform-pci driver to get
	145	+ * notifications from L0 Xen, but it cannot use the vector callback
	146	+ * as it is not exported by L1 Xen.
	147	+ */
	148	+ if (xen_pv_domain()) {
	149	+ ret = xen_allocate_irq(pdev);
	150	+ if (ret) {
	151	+ dev_warn(&pdev->dev, "request_irq failed err=%d\n", ret);
	152	+ goto out;
	153	+ }
	154	+ callback_via = get_callback_via(pdev);
	155	+ ret = xen_set_callback_via(callback_via);
	156	+ if (ret) {
	157	+ dev_warn(&pdev->dev, "Unable to set the evtchn callback "
	158	+ "err=%d\n", ret);
	159	+ goto out;
	160	+ }
	161	+ }
	162	+
95	163	max_nr_gframes = gnttab_max_grant_frames();
96	164	grant_frames = alloc_xen_mmio(PAGE_SIZE * max_nr_gframes);
97	165	ret = gnttab_setup_auto_xlat_frames(grant_frames);
@@ -123,6 +191,9 @@ static struct pci_driver platform_driver = { · 25 unmodified lines
123	191	.name = DRV_NAME,
124	192	.probe = platform_pci_probe,
125	193	.id_table = platform_pci_tbl,
	194	+#ifdef CONFIG_PM
	195	+ .resume_early = platform_pci_resume,
	196	+#endif
126	197	};
127	198
128	199	builtin_pci_driver(platform_driver);

fs/ceph/caps.c+6−1

@@ -2591,8 +2591,13 @@ int ceph_get_caps(struct ceph_inode_info *ci, int need, int want, · 2590 unmodified lines
2591	2591	add_wait_queue(&ci->i_cap_wq, &wait);
2592	2592
2593	2593	while (!try_get_cap_refs(ci, need, want, endoff,
2594		− true, &_got, &err))
	2594	+ true, &_got, &err)) {
	2595	+ if (signal_pending(current)) {
	2596	+ ret = -ERESTARTSYS;
	2597	+ break;
	2598	+ }
2595	2599	wait_woken(&wait, TASK_INTERRUPTIBLE, MAX_SCHEDULE_TIMEOUT);
	2600	+ }
2596	2601
2597	2602	remove_wait_queue(&ci->i_cap_wq, &wait);
2598	2603

fs/ceph/dir.c+3−2

@@ -1230,7 +1230,8 @@ static int ceph_d_revalidate(struct dentry *dentry, unsigned int flags) · 1229 unmodified lines
1230	1230	struct ceph_mds_client *mdsc =
1231	1231	ceph_sb_to_client(dir->i_sb)->mdsc;
1232	1232	struct ceph_mds_request *req;
1233		− int op, mask, err;
	1233	+ int op, err;
	1234	+ u32 mask;
1234	1235
1235	1236	if (flags & LOOKUP_RCU)
1236	1237	return -ECHILD;
@@ -1245,7 +1246,7 @@ static int ceph_d_revalidate(struct dentry *dentry, unsigned int flags) · 8 unmodified lines
1245	1246	mask = CEPH_STAT_CAP_INODE \| CEPH_CAP_AUTH_SHARED;
1246	1247	if (ceph_security_xattr_wanted(dir))
1247	1248	mask \|= CEPH_CAP_XATTR_SHARED;
1248		− req->r_args.getattr.mask = mask;
	1249	+ req->r_args.getattr.mask = cpu_to_le32(mask);
1249	1250
1250	1251	err = ceph_mdsc_do_request(mdsc, NULL, req);
1251	1252	switch (err) {

fs/ceph/inode.c+2−1

@@ -305,7 +305,8 @@ static int frag_tree_split_cmp(const void l, const void r) · 304 unmodified lines
305	305	{
306	306	struct ceph_frag_tree_split ls = (struct ceph_frag_tree_split)l;
307	307	struct ceph_frag_tree_split rs = (struct ceph_frag_tree_split)r;
308		− return ceph_frag_compare(ls->frag, rs->frag);
	308	+ return ceph_frag_compare(le32_to_cpu(ls->frag),
	309	+ le32_to_cpu(rs->frag));
309	310	}
310	311
311	312	static bool is_frag_child(u32 f, struct ceph_inode_frag *frag)

fs/ceph/mds_client.c+5−4

@@ -288,12 +288,13 @@ static int parse_reply_info_extra(void *p, void end, · 287 unmodified lines
288	288	struct ceph_mds_reply_info_parsed *info,
289	289	u64 features)
290	290	{
291		− if (info->head->op == CEPH_MDS_OP_GETFILELOCK)
	291	+ u32 op = le32_to_cpu(info->head->op);
	292	+
	293	+ if (op == CEPH_MDS_OP_GETFILELOCK)
292	294	return parse_reply_info_filelock(p, end, info, features);
293		− else if (info->head->op == CEPH_MDS_OP_READDIR \|\|
294		− info->head->op == CEPH_MDS_OP_LSSNAP)
	295	+ else if (op == CEPH_MDS_OP_READDIR \|\| op == CEPH_MDS_OP_LSSNAP)
295	296	return parse_reply_info_dir(p, end, info, features);
296		− else if (info->head->op == CEPH_MDS_OP_CREATE)
	297	+ else if (op == CEPH_MDS_OP_CREATE)
297	298	return parse_reply_info_create(p, end, info, features);
298	299	else
299	300	return -EIO;

fs/fuse/dev.c+2−1

@@ -2025,7 +2025,6 @@ static void end_requests(struct fuse_conn fc, struct list_head head) · 2024 unmodified lines
2025	2025	struct fuse_req *req;
2026	2026	req = list_entry(head->next, struct fuse_req, list);
2027	2027	req->out.h.error = -ECONNABORTED;
2028		− clear_bit(FR_PENDING, &req->flags);
2029	2028	clear_bit(FR_SENT, &req->flags);
2030	2029	list_del_init(&req->list);
2031	2030	request_end(fc, req);
@@ -2103,6 +2102,8 @@ void fuse_abort_conn(struct fuse_conn *fc) · 71 unmodified lines
2103	2102	spin_lock(&fiq->waitq.lock);
2104	2103	fiq->connected = 0;
2105	2104	list_splice_init(&fiq->pending, &to_end2);
	2105	+ list_for_each_entry(req, &to_end2, list)
	2106	+ clear_bit(FR_PENDING, &req->flags);
2106	2107	while (forget_pending(fiq))
2107	2108	kfree(dequeue_forget(fiq, 1, NULL));
2108	2109	wake_up_all_locked(&fiq->waitq);

fs/fuse/dir.c+1−1

@@ -68,7 +68,7 @@ static u64 time_to_jiffies(u64 sec, u32 nsec) · 67 unmodified lines
68	68	if (sec \|\| nsec) {
69	69	struct timespec64 ts = {
70	70	sec,
71		− max_t(u32, nsec, NSEC_PER_SEC - 1)
	71	+ min_t(u32, nsec, NSEC_PER_SEC - 1)
72	72	};
73	73
74	74	return get_jiffies_64() + timespec64_to_jiffies(&ts);

fs/nfs/nfs4proc.c+18−11

@@ -38,7 +38,6 @@ · 37 unmodified lines
38	38	#include <linux/mm.h>
39	39	#include <linux/delay.h>
40	40	#include <linux/errno.h>
41		−#include <linux/file.h>
42	41	#include <linux/string.h>
43	42	#include <linux/ratelimit.h>
44	43	#include <linux/printk.h>
@@ -1083,7 +1082,8 @@ int nfs4_call_sync(struct rpc_clnt *clnt, · 1038 unmodified lines
1083	1082	return nfs4_call_sync_sequence(clnt, server, msg, args, res);
1084	1083	}
1085	1084
1086		−static void update_changeattr(struct inode dir, struct nfs4_change_info cinfo)
	1085	+static void update_changeattr(struct inode dir, struct nfs4_change_info cinfo,
	1086	+ unsigned long timestamp)
1087	1087	{
1088	1088	struct nfs_inode *nfsi = NFS_I(dir);
1089	1089
@@ -1099,6 +1099,7 @@ static void update_changeattr(struct inode dir, struct nfs4_change_info cinfo) · 9 unmodified lines
1099	1099	NFS_INO_INVALID_ACL;
1100	1100	}
1101	1101	dir->i_version = cinfo->after;
	1102	+ nfsi->read_cache_jiffies = timestamp;
1102	1103	nfsi->attr_gencount = nfs_inc_attr_generation_counter();
1103	1104	nfs_fscache_invalidate(dir);
1104	1105	spin_unlock(&dir->i_lock);
@@ -2391,11 +2392,13 @@ static int _nfs4_proc_open(struct nfs4_opendata *data) · 1286 unmodified lines
2391	2392	nfs_fattr_map_and_free_names(server, &data->f_attr);
2392	2393
2393	2394	if (o_arg->open_flags & O_CREAT) {
2394		− update_changeattr(dir, &o_res->cinfo);
2395	2395	if (o_arg->open_flags & O_EXCL)
2396	2396	data->file_created = 1;
2397	2397	else if (o_res->cinfo.before != o_res->cinfo.after)
2398	2398	data->file_created = 1;
	2399	+ if (data->file_created \|\| dir->i_version != o_res->cinfo.after)
	2400	+ update_changeattr(dir, &o_res->cinfo,
	2401	+ o_res->f_attr->time_start);
2399	2402	}
2400	2403	if ((o_res->rflags & NFS4_OPEN_RESULT_LOCKTYPE_POSIX) == 0)
2401	2404	server->caps &= ~NFS_CAP_POSIX_LOCK;
@@ -4073,11 +4076,12 @@ static int _nfs4_proc_remove(struct inode dir, const struct qstr name) · 1671 unmodified lines
4073	4076	.rpc_argp = &args,
4074	4077	.rpc_resp = &res,
4075	4078	};
	4079	+ unsigned long timestamp = jiffies;
4076	4080	int status;
4077	4081
4078	4082	status = nfs4_call_sync(server->client, server, &msg, &args.seq_args, &res.seq_res, 1);
4079	4083	if (status == 0)
4080		− update_changeattr(dir, &res.cinfo);
	4084	+ update_changeattr(dir, &res.cinfo, timestamp);
4081	4085	return status;
4082	4086	}
4083	4087
@@ -4125,7 +4129,8 @@ static int nfs4_proc_unlink_done(struct rpc_task task, struct inode dir) · 41 unmodified lines
4125	4129	if (nfs4_async_handle_error(task, res->server, NULL,
4126	4130	&data->timeout) == -EAGAIN)
4127	4131	return 0;
4128		− update_changeattr(dir, &res->cinfo);
	4132	+ if (task->tk_status == 0)
	4133	+ update_changeattr(dir, &res->cinfo, res->dir_attr->time_start);
4129	4134	return 1;
4130	4135	}
4131	4136
@@ -4159,8 +4164,11 @@ static int nfs4_proc_rename_done(struct rpc_task task, struct inode old_dir, · 27 unmodified lines
4159	4164	if (nfs4_async_handle_error(task, res->server, NULL, &data->timeout) == -EAGAIN)
4160	4165	return 0;
4161	4166
4162		− update_changeattr(old_dir, &res->old_cinfo);
4163		− update_changeattr(new_dir, &res->new_cinfo);
	4167	+ if (task->tk_status == 0) {
	4168	+ update_changeattr(old_dir, &res->old_cinfo, res->old_fattr->time_start);
	4169	+ if (new_dir != old_dir)
	4170	+ update_changeattr(new_dir, &res->new_cinfo, res->new_fattr->time_start);
	4171	+ }
4164	4172	return 1;
4165	4173	}
4166	4174
@@ -4197,7 +4205,7 @@ static int _nfs4_proc_link(struct inode inode, struct inode dir, const struct · 30 unmodified lines
4197	4205
4198	4206	status = nfs4_call_sync(server->client, server, &msg, &arg.seq_args, &res.seq_res, 1);
4199	4207	if (!status) {
4200		− update_changeattr(dir, &res.cinfo);
	4208	+ update_changeattr(dir, &res.cinfo, res.fattr->time_start);
4201	4209	status = nfs_post_op_update_inode(inode, res.fattr);
4202	4210	if (!status)
4203	4211	nfs_setsecurity(inode, res.fattr, res.label);
@@ -4272,7 +4280,8 @@ static int nfs4_do_create(struct inode dir, struct dentry dentry, struct nfs4_ · 68 unmodified lines
4272	4280	int status = nfs4_call_sync(NFS_SERVER(dir)->client, NFS_SERVER(dir), &data->msg,
4273	4281	&data->arg.seq_args, &data->res.seq_res, 1);
4274	4282	if (status == 0) {
4275		− update_changeattr(dir, &data->res.dir_cinfo);
	4283	+ update_changeattr(dir, &data->res.dir_cinfo,
	4284	+ data->res.fattr->time_start);
4276	4285	status = nfs_instantiate(dentry, data->res.fh, data->res.fattr, data->res.label);
4277	4286	}
4278	4287	return status;
@@ -6127,7 +6136,6 @@ static struct nfs4_lockdata nfs4_alloc_lockdata(struct file_lock fl, · 1848 unmodified lines
6127	6136	p->server = server;
6128	6137	atomic_inc(&lsp->ls_count);
6129	6138	p->ctx = get_nfs_open_context(ctx);
6130		− get_file(fl->fl_file);
6131	6139	memcpy(&p->fl, fl, sizeof(p->fl));
6132	6140	return p;
6133	6141	out_free_seqid:
@@ -6240,7 +6248,6 @@ static void nfs4_lock_release(void *calldata) · 106 unmodified lines
6240	6248	nfs_free_seqid(data->arg.lock_seqid);
6241	6249	nfs4_put_lock_state(data->lsp);
6242	6250	put_nfs_open_context(data->ctx);
6243		− fput(data->fl.fl_file);
6244	6251	kfree(data);
6245	6252	dprintk("%s: done!\n", __func__);
6246	6253	}

fs/nfs/nfs4state.c+0−1

@@ -1729,7 +1729,6 @@ static int nfs4_recovery_handle_error(struct nfs_client *clp, int error) · 1728 unmodified lines
1729	1729	break;
1730	1730	case -NFS4ERR_STALE_CLIENTID:
1731	1731	set_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state);
1732		− nfs4_state_clear_reclaim_reboot(clp);
1733	1732	nfs4_state_start_reclaim_reboot(clp);
1734	1733	break;
1735	1734	case -NFS4ERR_EXPIRED:

fs/nfsd/nfs4xdr.c+3−1

@@ -2440,7 +2440,9 @@ nfsd4_encode_fattr(struct xdr_stream xdr, struct svc_fh fhp, · 2439 unmodified lines
2440	2440	p++; /* to be backfilled later */
2441	2441
2442	2442	if (bmval0 & FATTR4_WORD0_SUPPORTED_ATTRS) {
2443		− u32 *supp = nfsd_suppattrs[minorversion];
	2443	+ u32 supp[3];
	2444	+
	2445	+ memcpy(supp, nfsd_suppattrs[minorversion], sizeof(supp));
2444	2446
2445	2447	if (!IS_POSIXACL(dentry->d_inode))
2446	2448	supp[0] &= ~FATTR4_WORD0_ACL;

fs/overlayfs/namei.c+18−9

@@ -154,29 +154,38 @@ out_err: · 153 unmodified lines
154	154	static int ovl_lookup_layer(struct dentry base, struct ovl_lookup_data d,
155	155	struct dentry **ret)
156	156	{
157		− const char *s = d->name.name;
	157	+ /* Counting down from the end, since the prefix can change */
	158	+ size_t rem = d->name.len - 1;
158	159	struct dentry *dentry = NULL;
159	160	int err;
160	161
161		− if (*s != '/')
	162	+ if (d->name.name[0] != '/')
162	163	return ovl_lookup_single(base, d, d->name.name, d->name.len,
163	164	0, "", ret);
164	165
165		− while (*s++ == '/' && !IS_ERR_OR_NULL(base) && d_can_lookup(base)) {
	166	+ while (!IS_ERR_OR_NULL(base) && d_can_lookup(base)) {
	167	+ const char *s = d->name.name + d->name.len - rem;
166	168	const char *next = strchrnul(s, '/');
167		− size_t slen = strlen(s);
	169	+ size_t thislen = next - s;
	170	+ bool end = !next[0];
168	171
169		− if (WARN_ON(slen > d->name.len) \|\|
170		− WARN_ON(strcmp(d->name.name + d->name.len - slen, s)))
	172	+ /* Verify we did not go off the rails */
	173	+ if (WARN_ON(s[-1] != '/'))
171	174	return -EIO;
172	175
173		− err = ovl_lookup_single(base, d, s, next - s,
174		− d->name.len - slen, next, &base);
	176	+ err = ovl_lookup_single(base, d, s, thislen,
	177	+ d->name.len - rem, next, &base);
175	178	dput(dentry);
176	179	if (err)
177	180	return err;
178	181	dentry = base;
179		− s = next;
	182	+ if (end)
	183	+ break;
	184	+
	185	+ rem -= thislen + 1;
	186	+
	187	+ if (WARN_ON(rem >= d->name.len))
	188	+ return -EIO;
180	189	}
181	190	*ret = dentry;
182	191	return 0;

fs/ubifs/Kconfig+1−1

@@ -53,7 +53,7 @@ config UBIFS_ATIME_SUPPORT · 52 unmodified lines
53	53
54	54	config UBIFS_FS_ENCRYPTION
55	55	bool "UBIFS Encryption"
56		− depends on UBIFS_FS
	56	+ depends on UBIFS_FS && BLOCK
57	57	select FS_ENCRYPTION
58	58	default n
59	59	help

fs/ubifs/dir.c+3−55

@@ -390,16 +390,6 @@ static int do_tmpfile(struct inode dir, struct dentry dentry, · 389 unmodified lines
390	390	dbg_gen("dent '%pd', mode %#hx in dir ino %lu",
391	391	dentry, mode, dir->i_ino);
392	392
393		− if (ubifs_crypt_is_encrypted(dir)) {
394		− err = fscrypt_get_encryption_info(dir);
395		− if (err)
396		− return err;
397		−
398		− if (!fscrypt_has_encryption_key(dir)) {
399		− return -EPERM;
400		− }
401		− }
402		−
403	393	err = fscrypt_setup_filename(dir, &dentry->d_name, 0, &nm);
404	394	if (err)
405	395	return err;
@@ -741,17 +731,9 @@ static int ubifs_link(struct dentry old_dentry, struct inode dir, · 335 unmodified lines
741	731	ubifs_assert(inode_is_locked(dir));
742	732	ubifs_assert(inode_is_locked(inode));
743	733
744		− if (ubifs_crypt_is_encrypted(dir)) {
745		− if (!fscrypt_has_permitted_context(dir, inode))
746		− return -EPERM;
747		−
748		− err = fscrypt_get_encryption_info(inode);
749		− if (err)
750		− return err;
751		−
752		− if (!fscrypt_has_encryption_key(inode))
753		− return -EPERM;
754		− }
	734	+ if (ubifs_crypt_is_encrypted(dir) &&
	735	+ !fscrypt_has_permitted_context(dir, inode))
	736	+ return -EPERM;
755	737
756	738	err = fscrypt_setup_filename(dir, &dentry->d_name, 0, &nm);
757	739	if (err)
@@ -1000,17 +982,6 @@ static int ubifs_mkdir(struct inode dir, struct dentry dentry, umode_t mode) · 242 unmodified lines
1000	982	if (err)
1001	983	return err;
1002	984
1003		− if (ubifs_crypt_is_encrypted(dir)) {
1004		− err = fscrypt_get_encryption_info(dir);
1005		− if (err)
1006		− goto out_budg;
1007		−
1008		− if (!fscrypt_has_encryption_key(dir)) {
1009		− err = -EPERM;
1010		− goto out_budg;
1011		− }
1012		− }
1013		−
1014	985	err = fscrypt_setup_filename(dir, &dentry->d_name, 0, &nm);
1015	986	if (err)
1016	987	goto out_budg;
@@ -1096,17 +1067,6 @@ static int ubifs_mknod(struct inode dir, struct dentry dentry, · 79 unmodified lines
1096	1067	return err;
1097	1068	}
1098	1069
1099		− if (ubifs_crypt_is_encrypted(dir)) {
1100		− err = fscrypt_get_encryption_info(dir);
1101		− if (err)
1102		− goto out_budg;
1103		−
1104		− if (!fscrypt_has_encryption_key(dir)) {
1105		− err = -EPERM;
1106		− goto out_budg;
1107		− }
1108		− }
1109		−
1110	1070	err = fscrypt_setup_filename(dir, &dentry->d_name, 0, &nm);
1111	1071	if (err)
1112	1072	goto out_budg;
@@ -1231,18 +1191,6 @@ static int ubifs_symlink(struct inode dir, struct dentry dentry, · 118 unmodified lines
1231	1191	goto out_inode;
1232	1192	}
1233	1193
1234		− err = fscrypt_get_encryption_info(inode);
1235		− if (err) {
1236		− kfree(sd);
1237		− goto out_inode;
1238		− }
1239		−
1240		− if (!fscrypt_has_encryption_key(inode)) {
1241		− kfree(sd);
1242		− err = -EPERM;
1243		− goto out_inode;
1244		− }
1245		−
1246	1194	ostr.name = sd->encrypted_path;
1247	1195	ostr.len = disk_link.len;
1248	1196

fs/ubifs/ioctl.c+3−0

@@ -217,6 +217,9 @@ long ubifs_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) · 216 unmodified lines
217	217	case FS_IOC32_SETFLAGS:
218	218	cmd = FS_IOC_SETFLAGS;
219	219	break;
	220	+ case FS_IOC_SET_ENCRYPTION_POLICY:
	221	+ case FS_IOC_GET_ENCRYPTION_POLICY:
	222	+ break;
220	223	default:
221	224	return -ENOIOCTLCMD;
222	225	}

fs/ubifs/journal.c+2−0

@@ -744,6 +744,7 @@ int ubifs_jnl_write_data(struct ubifs_info c, const struct inode inode, · 743 unmodified lines
744	744
745	745	} else {
746	746	data->compr_size = 0;
	747	+ out_len = compr_len;
747	748	}
748	749
749	750	dlen = UBIFS_DATA_NODE_SZ + out_len;
@@ -1319,6 +1320,7 @@ static int truncate_data_node(const struct ubifs_info c, const struct inode in · 569 unmodified lines
1319	1320	dn->compr_type = cpu_to_le16(compr_type);
1320	1321	dn->size = cpu_to_le32(*new_len);
1321	1322	*new_len = UBIFS_DATA_NODE_SZ + out_len;
	1323	+ err = 0;
1322	1324	out:
1323	1325	kfree(buf);
1324	1326	return err;

fs/ubifs/tnc.c+23−2

@@ -34,6 +34,11 @@ · 33 unmodified lines
34	34	#include <linux/slab.h>
35	35	#include "ubifs.h"
36	36
	37	+static int try_read_node(const struct ubifs_info c, void buf, int type,
	38	+ int len, int lnum, int offs);
	39	+static int fallible_read_node(struct ubifs_info c, const union ubifs_key key,
	40	+ struct ubifs_zbranch zbr, void node);
	41	+
37	42	/*
38	43	* Returned codes of 'matches_name()' and 'fallible_matches_name()' functions.
39	44	* @NAME_LESS: name corresponding to the first argument is less than second
@@ -402,7 +407,19 @@ static int tnc_read_hashed_node(struct ubifs_info c, struct ubifs_zbranch zbr, · 362 unmodified lines
402	407	return 0;
403	408	}
404	409
405		− err = ubifs_tnc_read_node(c, zbr, node);
	410	+ if (c->replaying) {
	411	+ err = fallible_read_node(c, &zbr->key, zbr, node);
	412	+ /*
	413	+ * When the node was not found, return -ENOENT, 0 otherwise.
	414	+ * Negative return codes stay as-is.
	415	+ */
	416	+ if (err == 0)
	417	+ err = -ENOENT;
	418	+ else if (err == 1)
	419	+ err = 0;
	420	+ } else {
	421	+ err = ubifs_tnc_read_node(c, zbr, node);
	422	+ }
406	423	if (err)
407	424	return err;
408	425
@@ -2857,7 +2874,11 @@ struct ubifs_dent_node ubifs_tnc_next_ent(struct ubifs_info c, · 2448 unmodified lines
2857	2874	if (fname_len(nm) > 0) {
2858	2875	if (err) {
2859	2876	/* Handle collisions */
2860		− err = resolve_collision(c, key, &znode, &n, nm);
	2877	+ if (c->replaying)
	2878	+ err = fallible_resolve_collision(c, key, &znode, &n,
	2879	+ nm, 0);
	2880	+ else
	2881	+ err = resolve_collision(c, key, &znode, &n, nm);
2861	2882	dbg_tnc("rc returned %d, znode %p, n %d",
2862	2883	err, znode, n);
2863	2884	if (unlikely(err < 0))

fs/xfs/libxfs/xfs_dir2.c+24−15

@@ -36,21 +36,29 @@ · 35 unmodified lines
36	36	struct xfs_name xfs_name_dotdot = { (unsigned char *)"..", 2, XFS_DIR3_FT_DIR };
37	37
38	38	/*
39		− * @mode, if set, indicates that the type field needs to be set up.
40		− * This uses the transformation from file mode to DT_* as defined in linux/fs.h
41		− * for file type specification. This will be propagated into the directory
42		− * structure if appropriate for the given operation and filesystem config.
	39	+ * Convert inode mode to directory entry filetype
43	40	*/
44		−const unsigned char xfs_mode_to_ftype[S_IFMT >> S_SHIFT] = {
45		− [0] = XFS_DIR3_FT_UNKNOWN,
46		− [S_IFREG >> S_SHIFT] = XFS_DIR3_FT_REG_FILE,
47		− [S_IFDIR >> S_SHIFT] = XFS_DIR3_FT_DIR,
48		− [S_IFCHR >> S_SHIFT] = XFS_DIR3_FT_CHRDEV,
49		− [S_IFBLK >> S_SHIFT] = XFS_DIR3_FT_BLKDEV,
50		− [S_IFIFO >> S_SHIFT] = XFS_DIR3_FT_FIFO,
51		− [S_IFSOCK >> S_SHIFT] = XFS_DIR3_FT_SOCK,
52		− [S_IFLNK >> S_SHIFT] = XFS_DIR3_FT_SYMLINK,
53		−};
	41	+unsigned char xfs_mode_to_ftype(int mode)
	42	+{
	43	+ switch (mode & S_IFMT) {
	44	+ case S_IFREG:
	45	+ return XFS_DIR3_FT_REG_FILE;
	46	+ case S_IFDIR:
	47	+ return XFS_DIR3_FT_DIR;
	48	+ case S_IFCHR:
	49	+ return XFS_DIR3_FT_CHRDEV;
	50	+ case S_IFBLK:
	51	+ return XFS_DIR3_FT_BLKDEV;
	52	+ case S_IFIFO:
	53	+ return XFS_DIR3_FT_FIFO;
	54	+ case S_IFSOCK:
	55	+ return XFS_DIR3_FT_SOCK;
	56	+ case S_IFLNK:
	57	+ return XFS_DIR3_FT_SYMLINK;
	58	+ default:
	59	+ return XFS_DIR3_FT_UNKNOWN;
	60	+ }
	61	+}
54	62
55	63	/*
56	64	* ASCII case-insensitive (ie. A-Z) support for directories that was
@@ -631,7 +639,8 @@ xfs_dir2_isblock( · 574 unmodified lines
631	639	if ((rval = xfs_bmap_last_offset(args->dp, &last, XFS_DATA_FORK)))
632	640	return rval;
633	641	rval = XFS_FSB_TO_B(args->dp->i_mount, last) == args->geo->blksize;
634		− ASSERT(rval == 0 \|\| args->dp->i_d.di_size == args->geo->blksize);
	642	+ if (rval != 0 && args->dp->i_d.di_size != args->geo->blksize)
	643	+ return -EFSCORRUPTED;
635	644	*vp = rval;
636	645	return 0;
637	646	}

fs/xfs/libxfs/xfs_dir2.h+5−3

@@ -18,6 +18,9 @@ · 17 unmodified lines
18	18	#ifndef __XFS_DIR2_H__
19	19	#define __XFS_DIR2_H__
20	20
	21	+#include "xfs_da_format.h"
	22	+#include "xfs_da_btree.h"
	23	+
21	24	struct xfs_defer_ops;
22	25	struct xfs_da_args;
23	26	struct xfs_inode;
@@ -32,10 +35,9 @@ struct xfs_dir2_data_unused; · 8 unmodified lines
32	35	extern struct xfs_name xfs_name_dotdot;
33	36
34	37	/*
35		− * directory filetype conversion tables.
	38	+ * Convert inode mode to directory entry filetype
36	39	*/
37		−#define S_SHIFT 12
38		−extern const unsigned char xfs_mode_to_ftype[];
	40	+extern unsigned char xfs_mode_to_ftype(int mode);
39	41
40	42	/*
41	43	* directory operations vector for encode/decode routines

fs/xfs/libxfs/xfs_inode_buf.c+8−2

@@ -29,6 +29,7 @@ · 28 unmodified lines
29	29	#include "xfs_icache.h"
30	30	#include "xfs_trans.h"
31	31	#include "xfs_ialloc.h"
	32	+#include "xfs_dir2.h"
32	33
33	34	/*
34	35	* Check that none of the inode's in the buffer have a next
@@ -386,6 +387,7 @@ xfs_dinode_verify( · 351 unmodified lines
386	387	xfs_ino_t ino,
387	388	struct xfs_dinode *dip)
388	389	{
	390	+ uint16_t mode;
389	391	uint16_t flags;
390	392	uint64_t flags2;
391	393
@@ -396,8 +398,12 @@ xfs_dinode_verify( · 4 unmodified lines
396	398	if (be64_to_cpu(dip->di_size) & (1ULL << 63))
397	399	return false;
398	400
399		− /* No zero-length symlinks. */
400		− if (S_ISLNK(be16_to_cpu(dip->di_mode)) && dip->di_size == 0)
	401	+ mode = be16_to_cpu(dip->di_mode);
	402	+ if (mode && xfs_mode_to_ftype(mode) == XFS_DIR3_FT_UNKNOWN)
	403	+ return false;
	404	+
	405	+ /* No zero-length symlinks/dirs. */
	406	+ if ((S_ISLNK(mode) \|\| S_ISDIR(mode)) && dip->di_size == 0)
401	407	return false;
402	408
403	409	/* only version 3 or greater inodes are extensively verified here */

fs/xfs/xfs_dquot.c+4−0

@@ -710,6 +710,10 @@ xfs_dq_get_next_id( · 709 unmodified lines
710	710	/* Simple advance */
711	711	next_id = *id + 1;
712	712
	713	+ /* If we'd wrap past the max ID, stop */
	714	+ if (next_id < *id)
	715	+ return -ENOENT;
	716	+
713	717	/* If new ID is within the current chunk, advancing it sufficed */
714	718	if (next_id % mp->m_quotainfo->qi_dqperchunk) {
715	719	*id = next_id;

fs/xfs/xfs_iops.c+40−10

@@ -97,13 +97,28 @@ xfs_init_security( · 96 unmodified lines
97	97
98	98	static void
99	99	xfs_dentry_to_name(
	100	+ struct xfs_name *namep,
	101	+ struct dentry *dentry)
	102	+{
	103	+ namep->name = dentry->d_name.name;
	104	+ namep->len = dentry->d_name.len;
	105	+ namep->type = XFS_DIR3_FT_UNKNOWN;
	106	+}
	107	+
	108	+static int
	109	+xfs_dentry_mode_to_name(
100	110	struct xfs_name *namep,
101	111	struct dentry *dentry,
102	112	int mode)
103	113	{
104	114	namep->name = dentry->d_name.name;
105	115	namep->len = dentry->d_name.len;
106		− namep->type = xfs_mode_to_ftype[(mode & S_IFMT) >> S_SHIFT];
	116	+ namep->type = xfs_mode_to_ftype(mode);
	117	+
	118	+ if (unlikely(namep->type == XFS_DIR3_FT_UNKNOWN))
	119	+ return -EFSCORRUPTED;
	120	+
	121	+ return 0;
107	122	}
108	123
109	124	STATIC void
@@ -119,7 +134,7 @@ xfs_cleanup_inode( · 9 unmodified lines
119	134	* xfs_init_security we must back out.
120	135	* ENOSPC can hit here, among other things.
121	136	*/
122		− xfs_dentry_to_name(&teardown, dentry, 0);
	137	+ xfs_dentry_to_name(&teardown, dentry);
123	138
124	139	xfs_remove(XFS_I(dir), &teardown, XFS_I(inode));
125	140	}
@@ -154,8 +169,12 @@ xfs_generic_create( · 28 unmodified lines
154	169	if (error)
155	170	return error;
156	171
	172	+ /* Verify mode is valid also for tmpfile case */
	173	+ error = xfs_dentry_mode_to_name(&name, dentry, mode);
	174	+ if (unlikely(error))
	175	+ goto out_free_acl;
	176	+
157	177	if (!tmpfile) {
158		− xfs_dentry_to_name(&name, dentry, mode);
159	178	error = xfs_create(XFS_I(dir), &name, mode, rdev, &ip);
160	179	} else {
161	180	error = xfs_create_tmpfile(XFS_I(dir), dentry, mode, &ip);
@@ -248,7 +267,7 @@ xfs_vn_lookup( · 86 unmodified lines
248	267	if (dentry->d_name.len >= MAXNAMELEN)
249	268	return ERR_PTR(-ENAMETOOLONG);
250	269
251		− xfs_dentry_to_name(&name, dentry, 0);
	270	+ xfs_dentry_to_name(&name, dentry);
252	271	error = xfs_lookup(XFS_I(dir), &name, &cip, NULL);
253	272	if (unlikely(error)) {
254	273	if (unlikely(error != -ENOENT))
@@ -275,7 +294,7 @@ xfs_vn_ci_lookup( · 20 unmodified lines
275	294	if (dentry->d_name.len >= MAXNAMELEN)
276	295	return ERR_PTR(-ENAMETOOLONG);
277	296
278		− xfs_dentry_to_name(&xname, dentry, 0);
	297	+ xfs_dentry_to_name(&xname, dentry);
279	298	error = xfs_lookup(XFS_I(dir), &xname, &ip, &ci_name);
280	299	if (unlikely(error)) {
281	300	if (unlikely(error != -ENOENT))
@@ -310,7 +329,9 @@ xfs_vn_link( · 28 unmodified lines
310	329	struct xfs_name name;
311	330	int error;
312	331
313		− xfs_dentry_to_name(&name, dentry, inode->i_mode);
	332	+ error = xfs_dentry_mode_to_name(&name, dentry, inode->i_mode);
	333	+ if (unlikely(error))
	334	+ return error;
314	335
315	336	error = xfs_link(XFS_I(dir), XFS_I(inode), &name);
316	337	if (unlikely(error))
@@ -329,7 +350,7 @@ xfs_vn_unlink( · 12 unmodified lines
329	350	struct xfs_name name;
330	351	int error;
331	352
332		− xfs_dentry_to_name(&name, dentry, 0);
	353	+ xfs_dentry_to_name(&name, dentry);
333	354
334	355	error = xfs_remove(XFS_I(dir), &name, XFS_I(d_inode(dentry)));
335	356	if (error)
@@ -359,7 +380,9 @@ xfs_vn_symlink( · 23 unmodified lines
359	380
360	381	mode = S_IFLNK \|
361	382	(irix_symlink_mode ? 0777 & ~current_umask() : S_IRWXUGO);
362		− xfs_dentry_to_name(&name, dentry, mode);
	383	+ error = xfs_dentry_mode_to_name(&name, dentry, mode);
	384	+ if (unlikely(error))
	385	+ goto out;
363	386
364	387	error = xfs_symlink(XFS_I(dir), &name, symname, mode, &cip);
365	388	if (unlikely(error))
@@ -395,6 +418,7 @@ xfs_vn_rename( · 29 unmodified lines
395	418	{
396	419	struct inode *new_inode = d_inode(ndentry);
397	420	int omode = 0;
	421	+ int error;
398	422	struct xfs_name oname;
399	423	struct xfs_name nname;
400	424
@@ -405,8 +429,14 @@ xfs_vn_rename( · 4 unmodified lines
405	429	if (flags & RENAME_EXCHANGE)
406	430	omode = d_inode(ndentry)->i_mode;
407	431
408		− xfs_dentry_to_name(&oname, odentry, omode);
409		− xfs_dentry_to_name(&nname, ndentry, d_inode(odentry)->i_mode);
	432	+ error = xfs_dentry_mode_to_name(&oname, odentry, omode);
	433	+ if (omode && unlikely(error))
	434	+ return error;
	435	+
	436	+ error = xfs_dentry_mode_to_name(&nname, ndentry,
	437	+ d_inode(odentry)->i_mode);
	438	+ if (unlikely(error))
	439	+ return error;
410	440
411	441	return xfs_rename(XFS_I(odir), &oname, XFS_I(d_inode(odentry)),
412	442	XFS_I(ndir), &nname,

fs/xfs/xfs_linux.h+3−3

@@ -331,11 +331,11 @@ static inline __uint64_t howmany_64(__uint64_t x, __uint32_t y) · 330 unmodified lines
331	331	}
332	332
333	333	#define ASSERT_ALWAYS(expr) \
334		− (unlikely(expr) ? (void)0 : assfail(#expr, __FILE__, __LINE__))
	334	+ (likely(expr) ? (void)0 : assfail(#expr, __FILE__, __LINE__))
335	335
336	336	#ifdef DEBUG
337	337	#define ASSERT(expr) \
338		− (unlikely(expr) ? (void)0 : assfail(#expr, __FILE__, __LINE__))
	338	+ (likely(expr) ? (void)0 : assfail(#expr, __FILE__, __LINE__))
339	339
340	340	#ifndef STATIC
341	341	# define STATIC noinline
@@ -346,7 +346,7 @@ static inline __uint64_t howmany_64(__uint64_t x, __uint32_t y) · 4 unmodified lines
346	346	#ifdef XFS_WARN
347	347
348	348	#define ASSERT(expr) \
349		− (unlikely(expr) ? (void)0 : asswarn(#expr, __FILE__, __LINE__))
	349	+ (likely(expr) ? (void)0 : asswarn(#expr, __FILE__, __LINE__))
350	350
351	351	#ifndef STATIC
352	352	# define STATIC static noinline

include/kvm/arm_arch_timer.h+22−18

@@ -23,20 +23,24 @@ · 22 unmodified lines
23	23	#include <linux/hrtimer.h>
24	24	#include <linux/workqueue.h>
25	25
26		−struct arch_timer_kvm {
	26	+struct arch_timer_context {
	27	+ /* Registers: control register, timer value */
	28	+ u32 cnt_ctl;
	29	+ u64 cnt_cval;
	30	+
	31	+ /* Timer IRQ */
	32	+ struct kvm_irq_level irq;
	33	+
	34	+ /* Active IRQ state caching */
	35	+ bool active_cleared_last;
	36	+
27	37	/* Virtual offset */
28	38	u64 cntvoff;
29	39	};
30	40
31	41	struct arch_timer_cpu {
32		− /* Registers: control register, timer value */
33		− u32 cntv_ctl; /* Saved/restored */
34		− u64 cntv_cval; /* Saved/restored */
35		−
36		− /*
37		− * Anything that is not used directly from assembly code goes
38		− * here.
39		− */
	42	+ struct arch_timer_context vtimer;
	43	+ struct arch_timer_context ptimer;
40	44
41	45	/* Background timer used when the guest is not running */
42	46	struct hrtimer timer;
@@ -47,21 +51,15 @@ struct arch_timer_cpu { · 4 unmodified lines
47	51	/* Background timer active */
48	52	bool armed;
49	53
50		− /* Timer IRQ */
51		− struct kvm_irq_level irq;
52		−
53		− /* Active IRQ state caching */
54		− bool active_cleared_last;
55		−
56	54	/* Is the timer enabled */
57	55	bool enabled;
58	56	};
59	57
60	58	int kvm_timer_hyp_init(void);
61	59	int kvm_timer_enable(struct kvm_vcpu *vcpu);
62		−void kvm_timer_init(struct kvm *kvm);
63	60	int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu,
64		− const struct kvm_irq_level *irq);
	61	+ const struct kvm_irq_level *virt_irq,
	62	+ const struct kvm_irq_level *phys_irq);
65	63	void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu);
66	64	void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu);
67	65	void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu);
@@ -70,10 +68,16 @@ void kvm_timer_vcpu_terminate(struct kvm_vcpu *vcpu); · 2 unmodified lines
70	68	u64 kvm_arm_timer_get_reg(struct kvm_vcpu *, u64 regid);
71	69	int kvm_arm_timer_set_reg(struct kvm_vcpu *, u64 regid, u64 value);
72	70
73		−bool kvm_timer_should_fire(struct kvm_vcpu *vcpu);
	71	+bool kvm_timer_should_fire(struct arch_timer_context *timer_ctx);
74	72	void kvm_timer_schedule(struct kvm_vcpu *vcpu);
75	73	void kvm_timer_unschedule(struct kvm_vcpu *vcpu);
76	74
	75	+u64 kvm_phys_timer_read(void);
	76	+
77	77	void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu);
78	78
	79	+void kvm_timer_init_vhe(void);
	80	+
	81	+#define vcpu_vtimer(v) (&(v)->arch.timer_cpu.vtimer)
	82	+#define vcpu_ptimer(v) (&(v)->arch.timer_cpu.ptimer)
79	83	#endif

include/kvm/arm_vgic.h+16−2

@@ -71,6 +71,8 @@ struct vgic_global { · 70 unmodified lines
71	71
72	72	/* GIC system register CPU interface */
73	73	struct static_key_false gicv3_cpuif;
	74	+
	75	+ u32 ich_vtr_el2;
74	76	};
75	77
76	78	extern struct vgic_global kvm_vgic_global_state;
@@ -101,9 +103,10 @@ struct vgic_irq { · 24 unmodified lines
101	103	*/
102	104
103	105	u32 intid; /* Guest visible INTID */
104		− bool pending;
105	106	bool line_level; /* Level only */
106		− bool soft_pending; /* Level only */
	107	+ bool pending_latch; /* The pending latch state used to calculate
	108	+ * the pending state for both level
	109	+ * and edge triggered IRQs. */
107	110	bool active; /* not used for LPIs */
108	111	bool enabled;
109	112	bool hw; /* Tied to HW IRQ */
@@ -165,6 +168,8 @@ struct vgic_its { · 55 unmodified lines
165	168	struct list_head collection_list;
166	169	};
167	170
	171	+struct vgic_state_iter;
	172	+
168	173	struct vgic_dist {
169	174	bool in_kernel;
170	175	bool ready;
@@ -212,6 +217,9 @@ struct vgic_dist { · 41 unmodified lines
212	217	spinlock_t lpi_list_lock;
213	218	struct list_head lpi_list_head;
214	219	int lpi_list_count;
	220	+
	221	+ /* used by vgic-debug */
	222	+ struct vgic_state_iter *iter;
215	223	};
216	224
217	225	struct vgic_v2_cpu_if {
@@ -269,6 +277,12 @@ struct vgic_cpu { · 51 unmodified lines
269	277	u64 pendbaser;
270	278
271	279	bool lpis_enabled;
	280	+
	281	+ /* Cache guest priority bits */
	282	+ u32 num_pri_bits;
	283	+
	284	+ /* Cache guest interrupt ID bits */
	285	+ u32 num_id_bits;
272	286	};
273	287
274	288	extern struct static_key_false vgic_v2_cpuif_trap;

include/linux/bpf.h+1−1

@@ -216,7 +216,7 @@ u64 bpf_tail_call(u64 ctx, u64 r2, u64 index, u64 r4, u64 r5); · 215 unmodified lines
216	216	u64 bpf_get_stackid(u64 r1, u64 r2, u64 r3, u64 r4, u64 r5);
217	217
218	218	bool bpf_prog_array_compatible(struct bpf_array array, const struct bpf_prog fp);
219		−int bpf_prog_calc_digest(struct bpf_prog *fp);
	219	+int bpf_prog_calc_tag(struct bpf_prog *fp);
220	220
221	221	const struct bpf_func_proto *bpf_get_trace_printk_proto(void);
222	222

include/linux/cpuhotplug.h+2−0

@@ -74,6 +74,8 @@ enum cpuhp_state { · 73 unmodified lines
74	74	CPUHP_ZCOMP_PREPARE,
75	75	CPUHP_TIMERS_DEAD,
76	76	CPUHP_MIPS_SOC_PREPARE,
	77	+ CPUHP_BP_PREPARE_DYN,
	78	+ CPUHP_BP_PREPARE_DYN_END = CPUHP_BP_PREPARE_DYN + 20,
77	79	CPUHP_BRINGUP_CPU,
78	80	CPUHP_AP_IDLE_DEAD,
79	81	CPUHP_AP_OFFLINE,

include/linux/filter.h+4−2

@@ -57,6 +57,8 @@ struct bpf_prog_aux; · 56 unmodified lines
57	57	/* BPF program can access up to 512 bytes of stack space. */
58	58	#define MAX_BPF_STACK 512
59	59
	60	+#define BPF_TAG_SIZE 8
	61	+
60	62	/* Helper macros for filter block array initializers. */
61	63
62	64	/* ALU ops on registers, bpf_add\|sub\|...: dst_reg += src_reg */
@@ -408,7 +410,7 @@ struct bpf_prog { · 345 unmodified lines
408	410	kmemcheck_bitfield_end(meta);
409	411	enum bpf_prog_type type; /* Type of BPF program */
410	412	u32 len; /* Number of filter blocks */
411		− u32 digest[SHA_DIGEST_WORDS]; /* Program digest */
	413	+ u8 tag[BPF_TAG_SIZE];
412	414	struct bpf_prog_aux aux; / Auxiliary fields */
413	415	struct sock_fprog_kern orig_prog; / Original BPF program */
414	416	unsigned int (bpf_func)(const void ctx,
@@ -519,7 +521,7 @@ static inline u32 bpf_prog_insn_size(const struct bpf_prog *prog) · 104 unmodified lines
519	521	return prog->len * sizeof(struct bpf_insn);
520	522	}
521	523
522		−static inline u32 bpf_prog_digest_scratch_size(const struct bpf_prog *prog)
	524	+static inline u32 bpf_prog_tag_scratch_size(const struct bpf_prog *prog)
523	525	{
524	526	return round_up(bpf_prog_insn_size(prog) +
525	527	sizeof(__be64) + 1, SHA_MESSAGE_BYTES);

include/linux/irqchip/arm-gic-v3.h+41−4

@@ -352,8 +352,30 @@ · 351 unmodified lines
352	352	/*
353	353	* CPU interface registers
354	354	*/
355		−#define ICC_CTLR_EL1_EOImode_drop_dir (0U << 1)
356		−#define ICC_CTLR_EL1_EOImode_drop (1U << 1)
	355	+#define ICC_CTLR_EL1_EOImode_SHIFT (1)
	356	+#define ICC_CTLR_EL1_EOImode_drop_dir (0U << ICC_CTLR_EL1_EOImode_SHIFT)
	357	+#define ICC_CTLR_EL1_EOImode_drop (1U << ICC_CTLR_EL1_EOImode_SHIFT)
	358	+#define ICC_CTLR_EL1_EOImode_MASK (1 << ICC_CTLR_EL1_EOImode_SHIFT)
	359	+#define ICC_CTLR_EL1_CBPR_SHIFT 0
	360	+#define ICC_CTLR_EL1_CBPR_MASK (1 << ICC_CTLR_EL1_CBPR_SHIFT)
	361	+#define ICC_CTLR_EL1_PRI_BITS_SHIFT 8
	362	+#define ICC_CTLR_EL1_PRI_BITS_MASK (0x7 << ICC_CTLR_EL1_PRI_BITS_SHIFT)
	363	+#define ICC_CTLR_EL1_ID_BITS_SHIFT 11
	364	+#define ICC_CTLR_EL1_ID_BITS_MASK (0x7 << ICC_CTLR_EL1_ID_BITS_SHIFT)
	365	+#define ICC_CTLR_EL1_SEIS_SHIFT 14
	366	+#define ICC_CTLR_EL1_SEIS_MASK (0x1 << ICC_CTLR_EL1_SEIS_SHIFT)
	367	+#define ICC_CTLR_EL1_A3V_SHIFT 15
	368	+#define ICC_CTLR_EL1_A3V_MASK (0x1 << ICC_CTLR_EL1_A3V_SHIFT)
	369	+#define ICC_PMR_EL1_SHIFT 0
	370	+#define ICC_PMR_EL1_MASK (0xff << ICC_PMR_EL1_SHIFT)
	371	+#define ICC_BPR0_EL1_SHIFT 0
	372	+#define ICC_BPR0_EL1_MASK (0x7 << ICC_BPR0_EL1_SHIFT)
	373	+#define ICC_BPR1_EL1_SHIFT 0
	374	+#define ICC_BPR1_EL1_MASK (0x7 << ICC_BPR1_EL1_SHIFT)
	375	+#define ICC_IGRPEN0_EL1_SHIFT 0
	376	+#define ICC_IGRPEN0_EL1_MASK (1 << ICC_IGRPEN0_EL1_SHIFT)
	377	+#define ICC_IGRPEN1_EL1_SHIFT 0
	378	+#define ICC_IGRPEN1_EL1_MASK (1 << ICC_IGRPEN1_EL1_SHIFT)
357	379	#define ICC_SRE_EL1_SRE (1U << 0)
358	380
359	381	/*
@@ -382,14 +404,29 @@ · 22 unmodified lines
382	404	#define ICH_HCR_EN (1 << 0)
383	405	#define ICH_HCR_UIE (1 << 1)
384	406
385		−#define ICH_VMCR_CTLR_SHIFT 0
386		−#define ICH_VMCR_CTLR_MASK (0x21f << ICH_VMCR_CTLR_SHIFT)
	407	+#define ICH_VMCR_CBPR_SHIFT 4
	408	+#define ICH_VMCR_CBPR_MASK (1 << ICH_VMCR_CBPR_SHIFT)
	409	+#define ICH_VMCR_EOIM_SHIFT 9
	410	+#define ICH_VMCR_EOIM_MASK (1 << ICH_VMCR_EOIM_SHIFT)
387	411	#define ICH_VMCR_BPR1_SHIFT 18
388	412	#define ICH_VMCR_BPR1_MASK (7 << ICH_VMCR_BPR1_SHIFT)
389	413	#define ICH_VMCR_BPR0_SHIFT 21
390	414	#define ICH_VMCR_BPR0_MASK (7 << ICH_VMCR_BPR0_SHIFT)
391	415	#define ICH_VMCR_PMR_SHIFT 24
392	416	#define ICH_VMCR_PMR_MASK (0xffUL << ICH_VMCR_PMR_SHIFT)
	417	+#define ICH_VMCR_ENG0_SHIFT 0
	418	+#define ICH_VMCR_ENG0_MASK (1 << ICH_VMCR_ENG0_SHIFT)
	419	+#define ICH_VMCR_ENG1_SHIFT 1
	420	+#define ICH_VMCR_ENG1_MASK (1 << ICH_VMCR_ENG1_SHIFT)
	421	+
	422	+#define ICH_VTR_PRI_BITS_SHIFT 29
	423	+#define ICH_VTR_PRI_BITS_MASK (7 << ICH_VTR_PRI_BITS_SHIFT)
	424	+#define ICH_VTR_ID_BITS_SHIFT 23
	425	+#define ICH_VTR_ID_BITS_MASK (7 << ICH_VTR_ID_BITS_SHIFT)
	426	+#define ICH_VTR_SEIS_SHIFT 22
	427	+#define ICH_VTR_SEIS_MASK (1 << ICH_VTR_SEIS_SHIFT)
	428	+#define ICH_VTR_A3V_SHIFT 21
	429	+#define ICH_VTR_A3V_MASK (1 << ICH_VTR_A3V_SHIFT)
393	430
394	431	#define ICC_IAR1_EL1_SPURIOUS 0x3ff
395	432

include/linux/kernel.h+2−2

@@ -514,8 +514,8 @@ extern enum system_states { · 513 unmodified lines
514	514	#define TAINT_FLAGS_COUNT 16
515	515
516	516	struct taint_flag {
517		− char true; /* character printed when tainted */
518		− char false; /* character printed when not tainted */
	517	+ char c_true; /* character printed when tainted */
	518	+ char c_false; /* character printed when not tainted */
519	519	bool module; /* also show as a per-module taint flag */
520	520	};
521	521

include/linux/kvm_host.h+0−1

@@ -45,7 +45,6 @@ · 44 unmodified lines
45	45	* include/linux/kvm_h.
46	46	*/
47	47	#define KVM_MEMSLOT_INVALID (1UL << 16)
48		−#define KVM_MEMSLOT_INCOHERENT (1UL << 17)
49	48
50	49	/* Two fragments for cross MMIO pages. */
51	50	#define KVM_MAX_MMIO_FRAGMENTS 2

include/linux/rcupdate.h+4−0

@@ -444,6 +444,10 @@ bool __rcu_is_watching(void); · 443 unmodified lines
444	444	#error "Unknown RCU implementation specified to kernel configuration"
445	445	#endif
446	446
	447	+#define RCU_SCHEDULER_INACTIVE 0
	448	+#define RCU_SCHEDULER_INIT 1
	449	+#define RCU_SCHEDULER_RUNNING 2
	450	+
447	451	/*
448	452	* init_rcu_head_on_stack()/destroy_rcu_head_on_stack() are needed for dynamic
449	453	* initialization and destruction of rcu_head on the stack. rcu_head structures

include/linux/sunrpc/svc_xprt.h+1−0

@@ -66,6 +66,7 @@ struct svc_xprt { · 65 unmodified lines
66	66	#define XPT_LISTENER 10 /* listening endpoint */
67	67	#define XPT_CACHE_AUTH 11 /* cache auth info */
68	68	#define XPT_LOCAL 12 /* connection from loopback interface */
	69	+#define XPT_KILL_TEMP 13 /* call xpo_kill_temp_xprt before closing */
69	70
70	71	struct svc_serv xpt_server; / service for transport */
71	72	atomic_t xpt_reserved; /* space on outq that is rsvd */

include/linux/tcp.h+6−1

@@ -62,8 +62,13 @@ static inline unsigned int tcp_optlen(const struct sk_buff *skb) · 61 unmodified lines
62	62
63	63	/* TCP Fast Open Cookie as stored in memory */
64	64	struct tcp_fastopen_cookie {
	65	+ union {
	66	+ u8 val[TCP_FASTOPEN_COOKIE_MAX];
	67	+#if IS_ENABLED(CONFIG_IPV6)
	68	+ struct in6_addr addr;
	69	+#endif
	70	+ };
65	71	s8 len;
66		− u8 val[TCP_FASTOPEN_COOKIE_MAX];
67	72	bool exp; /* In RFC6994 experimental option format */
68	73	};
69	74

include/scsi/libfc.h+3−3

@@ -809,11 +809,11 @@ static inline void fc_set_wwnn(struct fc_lport *lport, u64 wwnn) · 808 unmodified lines
809	809	/**
810	810	* fc_set_wwpn() - Set the World Wide Port Name of a local port
811	811	* @lport: The local port whose WWPN is to be set
812		− * @wwnn: The new WWPN
	812	+ * @wwpn: The new WWPN
813	813	*/
814		−static inline void fc_set_wwpn(struct fc_lport *lport, u64 wwnn)
	814	+static inline void fc_set_wwpn(struct fc_lport *lport, u64 wwpn)
815	815	{
816		− lport->wwpn = wwnn;
	816	+ lport->wwpn = wwpn;
817	817	}
818	818
819	819	/**

include/uapi/linux/nl80211.h+3−1

@@ -1772,7 +1772,9 @@ enum nl80211_commands { · 1771 unmodified lines
1772	1772	*
1773	1773	* @NL80211_ATTR_OPMODE_NOTIF: Operating mode field from Operating Mode
1774	1774	* Notification Element based on association request when used with
1775		− * %NL80211_CMD_NEW_STATION; u8 attribute.
	1775	+ * %NL80211_CMD_NEW_STATION or %NL80211_CMD_SET_STATION (only when
	1776	+ * %NL80211_FEATURE_FULL_AP_CLIENT_STATE is supported, or with TDLS);
	1777	+ * u8 attribute.
1776	1778	*
1777	1779	* @NL80211_ATTR_VENDOR_ID: The vendor ID, either a 24-bit OUI or, if
1778	1780	* %NL80211_VENDOR_ID_IS_LINUX is set, a special Linux ID (not used yet)

include/uapi/linux/pkt_cls.h+1−1

@@ -397,7 +397,7 @@ enum { · 396 unmodified lines
397	397	TCA_BPF_NAME,
398	398	TCA_BPF_FLAGS,
399	399	TCA_BPF_FLAGS_GEN,
400		− TCA_BPF_DIGEST,
	400	+ TCA_BPF_TAG,
401	401	__TCA_BPF_MAX,
402	402	};
403	403

include/uapi/linux/tc_act/tc_bpf.h+1−1

@@ -27,7 +27,7 @@ enum { · 26 unmodified lines
27	27	TCA_ACT_BPF_FD,
28	28	TCA_ACT_BPF_NAME,
29	29	TCA_ACT_BPF_PAD,
30		− TCA_ACT_BPF_DIGEST,
	30	+ TCA_ACT_BPF_TAG,
31	31	__TCA_ACT_BPF_MAX,
32	32	};
33	33	#define TCA_ACT_BPF_MAX (__TCA_ACT_BPF_MAX - 1)

kernel/bpf/core.c+8−6

@@ -146,10 +146,11 @@ void __bpf_prog_free(struct bpf_prog *fp) · 145 unmodified lines
146	146	vfree(fp);
147	147	}
148	148
149		−int bpf_prog_calc_digest(struct bpf_prog *fp)
	149	+int bpf_prog_calc_tag(struct bpf_prog *fp)
150	150	{
151	151	const u32 bits_offset = SHA_MESSAGE_BYTES - sizeof(__be64);
152		− u32 raw_size = bpf_prog_digest_scratch_size(fp);
	152	+ u32 raw_size = bpf_prog_tag_scratch_size(fp);
	153	+ u32 digest[SHA_DIGEST_WORDS];
153	154	u32 ws[SHA_WORKSPACE_WORDS];
154	155	u32 i, bsize, psize, blocks;
155	156	struct bpf_insn *dst;
@@ -162,7 +163,7 @@ int bpf_prog_calc_digest(struct bpf_prog *fp) · 6 unmodified lines
162	163	if (!raw)
163	164	return -ENOMEM;
164	165
165		− sha_init(fp->digest);
	166	+ sha_init(digest);
166	167	memset(ws, 0, sizeof(ws));
167	168
168	169	/* We need to take out the map fd for the digest calculation
@@ -204,13 +205,14 @@ int bpf_prog_calc_digest(struct bpf_prog *fp) · 35 unmodified lines
204	205	*bits = cpu_to_be64((psize - 1) << 3);
205	206
206	207	while (blocks--) {
207		− sha_transform(fp->digest, todo, ws);
	208	+ sha_transform(digest, todo, ws);
208	209	todo += SHA_MESSAGE_BYTES;
209	210	}
210	211
211		− result = (__force __be32 *)fp->digest;
	212	+ result = (__force __be32 *)digest;
212	213	for (i = 0; i < SHA_DIGEST_WORDS; i++)
213		− result[i] = cpu_to_be32(fp->digest[i]);
	214	+ result[i] = cpu_to_be32(digest[i]);
	215	+ memcpy(fp->tag, result, sizeof(fp->tag));
214	216
215	217	vfree(raw);
216	218	return 0;

kernel/bpf/syscall.c+4−4

@@ -688,17 +688,17 @@ static int bpf_prog_release(struct inode inode, struct file filp) · 687 unmodified lines
688	688	static void bpf_prog_show_fdinfo(struct seq_file m, struct file filp)
689	689	{
690	690	const struct bpf_prog *prog = filp->private_data;
691		− char prog_digest[sizeof(prog->digest) * 2 + 1] = { };
	691	+ char prog_tag[sizeof(prog->tag) * 2 + 1] = { };
692	692
693		− bin2hex(prog_digest, prog->digest, sizeof(prog->digest));
	693	+ bin2hex(prog_tag, prog->tag, sizeof(prog->tag));
694	694	seq_printf(m,
695	695	"prog_type:\t%u\n"
696	696	"prog_jited:\t%u\n"
697		− "prog_digest:\t%s\n"
	697	+ "prog_tag:\t%s\n"
698	698	"memlock:\t%llu\n",
699	699	prog->type,
700	700	prog->jited,
701		− prog_digest,
	701	+ prog_tag,
702	702	prog->pages * 1ULL << PAGE_SHIFT);
703	703	}
704	704	#endif

kernel/bpf/verifier.c+1−1

@@ -2936,7 +2936,7 @@ static int replace_map_fd_with_map_ptr(struct bpf_verifier_env *env) · 2935 unmodified lines
2936	2936	int insn_cnt = env->prog->len;
2937	2937	int i, j, err;
2938	2938
2939		− err = bpf_prog_calc_digest(env->prog);
	2939	+ err = bpf_prog_calc_tag(env->prog);
2940	2940	if (err)
2941	2941	return err;
2942	2942

kernel/cpu.c+18−6

@@ -764,7 +764,6 @@ static int __ref _cpu_down(unsigned int cpu, int tasks_frozen, · 763 unmodified lines
764	764	{
765	765	struct cpuhp_cpu_state *st = per_cpu_ptr(&cpuhp_state, cpu);
766	766	int prev_state, ret = 0;
767		− bool hasdied = false;
768	767
769	768	if (num_online_cpus() == 1)
770	769	return -EBUSY;
@@ -809,7 +808,6 @@ static int __ref _cpu_down(unsigned int cpu, int tasks_frozen, · 38 unmodified lines
809	808	cpuhp_kick_ap_work(cpu);
810	809	}
811	810
812		− hasdied = prev_state != st->state && st->state == CPUHP_OFFLINE;
813	811	out:
814	812	cpu_hotplug_done();
815	813	return ret;
@@ -1302,10 +1300,24 @@ static int cpuhp_cb_check(enum cpuhp_state state) · 486 unmodified lines
1302	1300	*/
1303	1301	static int cpuhp_reserve_state(enum cpuhp_state state)
1304	1302	{
1305		− enum cpuhp_state i;
	1303	+ enum cpuhp_state i, end;
	1304	+ struct cpuhp_step *step;
1306	1305
1307		− for (i = CPUHP_AP_ONLINE_DYN; i <= CPUHP_AP_ONLINE_DYN_END; i++) {
1308		− if (!cpuhp_ap_states[i].name)
	1306	+ switch (state) {
	1307	+ case CPUHP_AP_ONLINE_DYN:
	1308	+ step = cpuhp_ap_states + CPUHP_AP_ONLINE_DYN;
	1309	+ end = CPUHP_AP_ONLINE_DYN_END;
	1310	+ break;
	1311	+ case CPUHP_BP_PREPARE_DYN:
	1312	+ step = cpuhp_bp_states + CPUHP_BP_PREPARE_DYN;
	1313	+ end = CPUHP_BP_PREPARE_DYN_END;
	1314	+ break;
	1315	+ default:
	1316	+ return -EINVAL;
	1317	+ }
	1318	+
	1319	+ for (i = state; i <= end; i++, step++) {
	1320	+ if (!step->name)
1309	1321	return i;
1310	1322	}
1311	1323	WARN(1, "No more dynamic states available for CPU hotplug\n");
@@ -1323,7 +1335,7 @@ static int cpuhp_store_callbacks(enum cpuhp_state state, const char *name, · 11 unmodified lines
1323	1335
1324	1336	mutex_lock(&cpuhp_state_mutex);
1325	1337
1326		− if (state == CPUHP_AP_ONLINE_DYN) {
	1338	+ if (state == CPUHP_AP_ONLINE_DYN \|\| state == CPUHP_BP_PREPARE_DYN) {
1327	1339	ret = cpuhp_reserve_state(state);
1328	1340	if (ret < 0)
1329	1341	goto out;

kernel/module.c+1−1

@@ -1145,7 +1145,7 @@ static size_t module_flags_taint(struct module mod, char buf) · 1144 unmodified lines
1145	1145
1146	1146	for (i = 0; i < TAINT_FLAGS_COUNT; i++) {
1147	1147	if (taint_flags[i].module && test_bit(i, &mod->taints))
1148		− buf[l++] = taint_flags[i].true;
	1148	+ buf[l++] = taint_flags[i].c_true;
1149	1149	}
1150	1150
1151	1151	return l;

kernel/panic.c+1−1

@@ -355,7 +355,7 @@ const char *print_tainted(void) · 354 unmodified lines
355	355	for (i = 0; i < TAINT_FLAGS_COUNT; i++) {
356	356	const struct taint_flag *t = &taint_flags[i];
357	357	*s++ = test_bit(i, &tainted_mask) ?
358		− t->true : t->false;
	358	+ t->c_true : t->c_false;
359	359	}
360	360	*s = 0;
361	361	} else

kernel/rcu/rcu.h+1−0

@@ -136,6 +136,7 @@ int rcu_jiffies_till_stall_check(void); · 135 unmodified lines
136	136	#define TPS(x) tracepoint_string(x)
137	137
138	138	void rcu_early_boot_tests(void);
	139	+void rcu_test_sync_prims(void);
139	140
140	141	/*
141	142	* This function really isn't for public consumption, but RCU is special in

kernel/rcu/tiny.c+0−4

@@ -185,9 +185,6 @@ static __latent_entropy void rcu_process_callbacks(struct softirq_action *unused · 184 unmodified lines
185	185	* benefits of doing might_sleep() to reduce latency.)
186	186	*
187	187	* Cool, huh? (Due to Josh Triplett.)
188		− *
189		− * But we want to make this a static inline later. The cond_resched()
190		− * currently makes this problematic.
191	188	*/
192	189	void synchronize_sched(void)
193	190	{
@@ -195,7 +192,6 @@ void synchronize_sched(void) · 1 unmodified line
195	192	lock_is_held(&rcu_lock_map) \|\|
196	193	lock_is_held(&rcu_sched_lock_map),
197	194	"Illegal synchronize_sched() in RCU read-side critical section");
198		− cond_resched();
199	195	}
200	196	EXPORT_SYMBOL_GPL(synchronize_sched);
201	197

kernel/rcu/tiny_plugin.h+7−2

@@ -60,12 +60,17 @@ EXPORT_SYMBOL_GPL(rcu_scheduler_active); · 59 unmodified lines
60	60
61	61	/*
62	62	* During boot, we forgive RCU lockdep issues. After this function is
63		− * invoked, we start taking RCU lockdep issues seriously.
	63	+ * invoked, we start taking RCU lockdep issues seriously. Note that unlike
	64	+ * Tree RCU, Tiny RCU transitions directly from RCU_SCHEDULER_INACTIVE
	65	+ * to RCU_SCHEDULER_RUNNING, skipping the RCU_SCHEDULER_INIT stage.
	66	+ * The reason for this is that Tiny RCU does not need kthreads, so does
	67	+ * not have to care about the fact that the scheduler is half-initialized
	68	+ * at a certain phase of the boot process.
64	69	*/
65	70	void __init rcu_scheduler_starting(void)
66	71	{
67	72	WARN_ON(nr_context_switches() > 0);
68		− rcu_scheduler_active = 1;
	73	+ rcu_scheduler_active = RCU_SCHEDULER_RUNNING;
69	74	}
70	75
71	76	#endif /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */

kernel/rcu/tree.c+20−13

@@ -127,13 +127,16 @@ int rcu_num_nodes __read_mostly = NUM_RCU_NODES; /* Total # rcu_nodes in use. */ · 126 unmodified lines
127	127	int sysctl_panic_on_rcu_stall __read_mostly;
128	128
129	129	/*
130		− * The rcu_scheduler_active variable transitions from zero to one just
131		− * before the first task is spawned. So when this variable is zero, RCU
132		− * can assume that there is but one task, allowing RCU to (for example)
	130	+ * The rcu_scheduler_active variable is initialized to the value
	131	+ * RCU_SCHEDULER_INACTIVE and transitions RCU_SCHEDULER_INIT just before the
	132	+ * first task is spawned. So when this variable is RCU_SCHEDULER_INACTIVE,
	133	+ * RCU can assume that there is but one task, allowing RCU to (for example)
133	134	* optimize synchronize_rcu() to a simple barrier(). When this variable
134		− * is one, RCU must actually do all the hard work required to detect real
135		− * grace periods. This variable is also used to suppress boot-time false
136		− * positives from lockdep-RCU error checking.
	135	+ * is RCU_SCHEDULER_INIT, RCU must actually do all the hard work required
	136	+ * to detect real grace periods. This variable is also used to suppress
	137	+ * boot-time false positives from lockdep-RCU error checking. Finally, it
	138	+ * transitions from RCU_SCHEDULER_INIT to RCU_SCHEDULER_RUNNING after RCU
	139	+ * is fully initialized, including all of its kthreads having been spawned.
137	140	*/
138	141	int rcu_scheduler_active __read_mostly;
139	142	EXPORT_SYMBOL_GPL(rcu_scheduler_active);
@@ -3980,18 +3983,22 @@ static int __init rcu_spawn_gp_kthread(void) · 3840 unmodified lines
3980	3983	early_initcall(rcu_spawn_gp_kthread);
3981	3984
3982	3985	/*
3983		− * This function is invoked towards the end of the scheduler's initialization
3984		− * process. Before this is called, the idle task might contain
3985		− * RCU read-side critical sections (during which time, this idle
3986		− * task is booting the system). After this function is called, the
3987		− * idle tasks are prohibited from containing RCU read-side critical
3988		− * sections. This function also enables RCU lockdep checking.
	3986	+ * This function is invoked towards the end of the scheduler's
	3987	+ * initialization process. Before this is called, the idle task might
	3988	+ * contain synchronous grace-period primitives (during which time, this idle
	3989	+ * task is booting the system, and such primitives are no-ops). After this
	3990	+ * function is called, any synchronous grace-period primitives are run as
	3991	+ * expedited, with the requesting task driving the grace period forward.
	3992	+ * A later core_initcall() rcu_exp_runtime_mode() will switch to full
	3993	+ * runtime RCU functionality.
3989	3994	*/
3990	3995	void rcu_scheduler_starting(void)
3991	3996	{
3992	3997	WARN_ON(num_online_cpus() != 1);
3993	3998	WARN_ON(nr_context_switches() > 0);
3994		− rcu_scheduler_active = 1;
	3999	+ rcu_test_sync_prims();
	4000	+ rcu_scheduler_active = RCU_SCHEDULER_INIT;
	4001	+ rcu_test_sync_prims();
3995	4002	}
3996	4003
3997	4004	/*

kernel/rcu/tree_exp.h+41−11

@@ -531,6 +531,20 @@ struct rcu_exp_work { · 530 unmodified lines
531	531	struct work_struct rew_work;
532	532	};
533	533
	534	+/*
	535	+ * Common code to drive an expedited grace period forward, used by
	536	+ * workqueues and mid-boot-time tasks.
	537	+ */
	538	+static void rcu_exp_sel_wait_wake(struct rcu_state *rsp,
	539	+ smp_call_func_t func, unsigned long s)
	540	+{
	541	+ /* Initialize the rcu_node tree in preparation for the wait. */
	542	+ sync_rcu_exp_select_cpus(rsp, func);
	543	+
	544	+ /* Wait and clean up, including waking everyone. */
	545	+ rcu_exp_wait_wake(rsp, s);
	546	+}
	547	+
534	548	/*
535	549	* Work-queue handler to drive an expedited grace period forward.
536	550	*/
@@ -538,12 +552,8 @@ static void wait_rcu_exp_gp(struct work_struct *wp) · 1 unmodified line
538	552	{
539	553	struct rcu_exp_work *rewp;
540	554
541		− /* Initialize the rcu_node tree in preparation for the wait. */
542	555	rewp = container_of(wp, struct rcu_exp_work, rew_work);
543		− sync_rcu_exp_select_cpus(rewp->rew_rsp, rewp->rew_func);
544		−
545		− /* Wait and clean up, including waking everyone. */
546		− rcu_exp_wait_wake(rewp->rew_rsp, rewp->rew_s);
	556	+ rcu_exp_sel_wait_wake(rewp->rew_rsp, rewp->rew_func, rewp->rew_s);
547	557	}
548	558
549	559	/*
@@ -569,12 +579,18 @@ static void _synchronize_rcu_expedited(struct rcu_state *rsp, · 19 unmodified lines
569	579	if (exp_funnel_lock(rsp, s))
570	580	return; /* Someone else did our work for us. */
571	581
572		− /* Marshall arguments and schedule the expedited grace period. */
573		− rew.rew_func = func;
574		− rew.rew_rsp = rsp;
575		− rew.rew_s = s;
576		− INIT_WORK_ONSTACK(&rew.rew_work, wait_rcu_exp_gp);
577		− schedule_work(&rew.rew_work);
	582	+ /* Ensure that load happens before action based on it. */
	583	+ if (unlikely(rcu_scheduler_active == RCU_SCHEDULER_INIT)) {
	584	+ /* Direct call during scheduler init and early_initcalls(). */
	585	+ rcu_exp_sel_wait_wake(rsp, func, s);
	586	+ } else {
	587	+ /* Marshall arguments & schedule the expedited grace period. */
	588	+ rew.rew_func = func;
	589	+ rew.rew_rsp = rsp;
	590	+ rew.rew_s = s;
	591	+ INIT_WORK_ONSTACK(&rew.rew_work, wait_rcu_exp_gp);
	592	+ schedule_work(&rew.rew_work);
	593	+ }
578	594
579	595	/* Wait for expedited grace period to complete. */
580	596	rdp = per_cpu_ptr(rsp->rda, raw_smp_processor_id());
@@ -676,6 +692,8 @@ void synchronize_rcu_expedited(void) · 95 unmodified lines
676	692	{
677	693	struct rcu_state *rsp = rcu_state_p;
678	694
	695	+ if (rcu_scheduler_active == RCU_SCHEDULER_INACTIVE)
	696	+ return;
679	697	_synchronize_rcu_expedited(rsp, sync_rcu_exp_handler);
680	698	}
681	699	EXPORT_SYMBOL_GPL(synchronize_rcu_expedited);
@@ -693,3 +711,15 @@ void synchronize_rcu_expedited(void) · 11 unmodified lines
693	711	EXPORT_SYMBOL_GPL(synchronize_rcu_expedited);
694	712
695	713	#endif /* #else #ifdef CONFIG_PREEMPT_RCU */
	714	+
	715	+/*
	716	+ * Switch to run-time mode once Tree RCU has fully initialized.
	717	+ */
	718	+static int __init rcu_exp_runtime_mode(void)
	719	+{
	720	+ rcu_test_sync_prims();
	721	+ rcu_scheduler_active = RCU_SCHEDULER_RUNNING;
	722	+ rcu_test_sync_prims();
	723	+ return 0;
	724	+}
	725	+core_initcall(rcu_exp_runtime_mode);

kernel/rcu/tree_plugin.h+1−1

@@ -670,7 +670,7 @@ void synchronize_rcu(void) · 669 unmodified lines
670	670	lock_is_held(&rcu_lock_map) \|\|
671	671	lock_is_held(&rcu_sched_lock_map),
672	672	"Illegal synchronize_rcu() in RCU read-side critical section");
673		− if (!rcu_scheduler_active)
	673	+ if (rcu_scheduler_active == RCU_SCHEDULER_INACTIVE)
674	674	return;
675	675	if (rcu_gp_is_expedited())
676	676	synchronize_rcu_expedited();

kernel/rcu/update.c+30−8

@@ -121,11 +121,14 @@ EXPORT_SYMBOL(rcu_read_lock_sched_held); · 120 unmodified lines
121	121	* Should expedited grace-period primitives always fall back to their
122	122	* non-expedited counterparts? Intended for use within RCU. Note
123	123	* that if the user specifies both rcu_expedited and rcu_normal, then
124		− * rcu_normal wins.
	124	+ * rcu_normal wins. (Except during the time period during boot from
	125	+ * when the first task is spawned until the rcu_exp_runtime_mode()
	126	+ * core_initcall() is invoked, at which point everything is expedited.)
125	127	*/
126	128	bool rcu_gp_is_normal(void)
127	129	{
128		− return READ_ONCE(rcu_normal);
	130	+ return READ_ONCE(rcu_normal) &&
	131	+ rcu_scheduler_active != RCU_SCHEDULER_INIT;
129	132	}
130	133	EXPORT_SYMBOL_GPL(rcu_gp_is_normal);
131	134
@@ -135,13 +138,14 @@ static atomic_t rcu_expedited_nesting = · 3 unmodified lines
135	138	/*
136	139	* Should normal grace-period primitives be expedited? Intended for
137	140	* use within RCU. Note that this function takes the rcu_expedited
138		− * sysfs/boot variable into account as well as the rcu_expedite_gp()
139		− * nesting. So looping on rcu_unexpedite_gp() until rcu_gp_is_expedited()
140		− * returns false is a -really- bad idea.
	141	+ * sysfs/boot variable and rcu_scheduler_active into account as well
	142	+ * as the rcu_expedite_gp() nesting. So looping on rcu_unexpedite_gp()
	143	+ * until rcu_gp_is_expedited() returns false is a -really- bad idea.
141	144	*/
142	145	bool rcu_gp_is_expedited(void)
143	146	{
144		− return rcu_expedited \|\| atomic_read(&rcu_expedited_nesting);
	147	+ return rcu_expedited \|\| atomic_read(&rcu_expedited_nesting) \|\|
	148	+ rcu_scheduler_active == RCU_SCHEDULER_INIT;
145	149	}
146	150	EXPORT_SYMBOL_GPL(rcu_gp_is_expedited);
147	151
@@ -257,7 +261,7 @@ EXPORT_SYMBOL_GPL(rcu_callback_map); · 109 unmodified lines
257	261
258	262	int notrace debug_lockdep_rcu_enabled(void)
259	263	{
260		− return rcu_scheduler_active && debug_locks &&
	264	+ return rcu_scheduler_active != RCU_SCHEDULER_INACTIVE && debug_locks &&
261	265	current->lockdep_recursion == 0;
262	266	}
263	267	EXPORT_SYMBOL_GPL(debug_lockdep_rcu_enabled);
@@ -591,7 +595,7 @@ EXPORT_SYMBOL_GPL(call_rcu_tasks); · 327 unmodified lines
591	595	void synchronize_rcu_tasks(void)
592	596	{
593	597	/* Complain if the scheduler has not started. */
594		− RCU_LOCKDEP_WARN(!rcu_scheduler_active,
	598	+ RCU_LOCKDEP_WARN(rcu_scheduler_active == RCU_SCHEDULER_INACTIVE,
595	599	"synchronize_rcu_tasks called too soon");
596	600
597	601	/* Wait for the grace period. */
@@ -813,6 +817,23 @@ static void rcu_spawn_tasks_kthread(void) · 215 unmodified lines
813	817
814	818	#endif /* #ifdef CONFIG_TASKS_RCU */
815	819
	820	+/*
	821	+ * Test each non-SRCU synchronous grace-period wait API. This is
	822	+ * useful just after a change in mode for these primitives, and
	823	+ * during early boot.
	824	+ */
	825	+void rcu_test_sync_prims(void)
	826	+{
	827	+ if (!IS_ENABLED(CONFIG_PROVE_RCU))
	828	+ return;
	829	+ synchronize_rcu();
	830	+ synchronize_rcu_bh();
	831	+ synchronize_sched();
	832	+ synchronize_rcu_expedited();
	833	+ synchronize_rcu_bh_expedited();
	834	+ synchronize_sched_expedited();
	835	+}
	836	+
816	837	#ifdef CONFIG_PROVE_RCU
817	838
818	839	/*
@@ -865,6 +886,7 @@ void rcu_early_boot_tests(void) · 46 unmodified lines
865	886	early_boot_test_call_rcu_bh();
866	887	if (rcu_self_test_sched)
867	888	early_boot_test_call_rcu_sched();
	889	+ rcu_test_sync_prims();
868	890	}
869	891
870	892	static int rcu_verify_early_boot_tests(void)

lib/swiotlb.c+3−3

@@ -483,11 +483,11 @@ phys_addr_t swiotlb_tbl_map_single(struct device *hwdev, · 482 unmodified lines
483	483	: 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
484	484
485	485	/*
486		− * For mappings greater than a page, we limit the stride (and
487		− * hence alignment) to a page size.
	486	+ * For mappings greater than or equal to a page, we limit the stride
	487	+ * (and hence alignment) to a page size.
488	488	*/
489	489	nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
490		− if (size > PAGE_SIZE)
	490	+ if (size >= PAGE_SIZE)
491	491	stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
492	492	else
493	493	stride = 1;

net/ax25/ax25_subr.c+1−1

@@ -264,7 +264,7 @@ void ax25_disconnect(ax25_cb *ax25, int reason) · 263 unmodified lines
264	264	{
265	265	ax25_clear_queues(ax25);
266	266
267		− if (!sock_flag(ax25->sk, SOCK_DESTROY))
	267	+ if (!ax25->sk \|\| !sock_flag(ax25->sk, SOCK_DESTROY))
268	268	ax25_stop_heartbeat(ax25);
269	269	ax25_stop_t1timer(ax25);
270	270	ax25_stop_t2timer(ax25);

net/ceph/crypto.c+1−1

@@ -214,7 +214,7 @@ static int ceph_aes_crypt(const struct ceph_crypto_key *key, bool encrypt, · 213 unmodified lines
214	214	SKCIPHER_REQUEST_ON_STACK(req, key->tfm);
215	215	struct sg_table sgt;
216	216	struct scatterlist prealloc_sg;
217		− char iv[AES_BLOCK_SIZE];
	217	+ char iv[AES_BLOCK_SIZE] __aligned(8);
218	218	int pad_byte = AES_BLOCK_SIZE - (in_len & (AES_BLOCK_SIZE - 1));
219	219	int crypt_len = encrypt ? in_len + pad_byte : in_len;
220	220	int ret;

net/ipv4/fib_semantics.c+7−4

@@ -1279,8 +1279,9 @@ int fib_dump_info(struct sk_buff *skb, u32 portid, u32 seq, int event, · 1278 unmodified lines
1279	1279	nla_put_u32(skb, RTA_FLOW, fi->fib_nh[0].nh_tclassid))
1280	1280	goto nla_put_failure;
1281	1281	#endif
1282		− if (fi->fib_nh->nh_lwtstate)
1283		− lwtunnel_fill_encap(skb, fi->fib_nh->nh_lwtstate);
	1282	+ if (fi->fib_nh->nh_lwtstate &&
	1283	+ lwtunnel_fill_encap(skb, fi->fib_nh->nh_lwtstate) < 0)
	1284	+ goto nla_put_failure;
1284	1285	}
1285	1286	#ifdef CONFIG_IP_ROUTE_MULTIPATH
1286	1287	if (fi->fib_nhs > 1) {
@@ -1316,8 +1317,10 @@ int fib_dump_info(struct sk_buff *skb, u32 portid, u32 seq, int event, · 29 unmodified lines
1316	1317	nla_put_u32(skb, RTA_FLOW, nh->nh_tclassid))
1317	1318	goto nla_put_failure;
1318	1319	#endif
1319		− if (nh->nh_lwtstate)
1320		− lwtunnel_fill_encap(skb, nh->nh_lwtstate);
	1320	+ if (nh->nh_lwtstate &&
	1321	+ lwtunnel_fill_encap(skb, nh->nh_lwtstate) < 0)
	1322	+ goto nla_put_failure;
	1323	+
1321	1324	/* length of rtnetlink header + attributes */
1322	1325	rtnh->rtnh_len = nlmsg_get_pos(skb) - (void *) rtnh;
1323	1326	} endfor_nexthops(fi);

net/ipv4/route.c+1−1

@@ -2472,7 +2472,7 @@ static int rt_fill_info(struct net *net, __be32 dst, __be32 src, u32 table_id, · 2471 unmodified lines
2472	2472	r->rtm_dst_len = 32;
2473	2473	r->rtm_src_len = 0;
2474	2474	r->rtm_tos = fl4->flowi4_tos;
2475		− r->rtm_table = table_id;
	2475	+ r->rtm_table = table_id < 256 ? table_id : RT_TABLE_COMPAT;
2476	2476	if (nla_put_u32(skb, RTA_TABLE, table_id))
2477	2477	goto nla_put_failure;
2478	2478	r->rtm_type = rt->rt_type;

net/ipv4/tcp_fastopen.c+1−1

@@ -113,7 +113,7 @@ static bool tcp_fastopen_cookie_gen(struct request_sock *req, · 112 unmodified lines
113	113	struct tcp_fastopen_cookie tmp;
114	114
115	115	if (__tcp_fastopen_cookie_gen(&ip6h->saddr, &tmp)) {
116		− struct in6_addr buf = (struct in6_addr ) tmp.val;
	116	+ struct in6_addr *buf = &tmp.addr;
117	117	int i;
118	118
119	119	for (i = 0; i < 4; i++)

net/ipv6/ip6_tunnel.c+2−2

@@ -1108,7 +1108,7 @@ route_lookup: · 1107 unmodified lines
1108	1108	t->parms.name);
1109	1109	goto tx_err_dst_release;
1110	1110	}
1111		− mtu = dst_mtu(dst) - psh_hlen;
	1111	+ mtu = dst_mtu(dst) - psh_hlen - t->tun_hlen;
1112	1112	if (encap_limit >= 0) {
1113	1113	max_headroom += 8;
1114	1114	mtu -= 8;
@@ -1117,7 +1117,7 @@ route_lookup: · 2 unmodified lines
1117	1117	mtu = IPV6_MIN_MTU;
1118	1118	if (skb_dst(skb) && !t->parms.collect_md)
1119	1119	skb_dst(skb)->ops->update_pmtu(skb_dst(skb), NULL, skb, mtu);
1120		− if (skb->len > mtu && !skb_is_gso(skb)) {
	1120	+ if (skb->len - t->tun_hlen > mtu && !skb_is_gso(skb)) {
1121	1121	*pmtu = mtu;
1122	1122	err = -EMSGSIZE;
1123	1123	goto tx_err_dst_release;

net/ipv6/mcast.c+30−21

@@ -81,7 +81,7 @@ static void mld_gq_timer_expire(unsigned long data); · 80 unmodified lines
81	81	static void mld_ifc_timer_expire(unsigned long data);
82	82	static void mld_ifc_event(struct inet6_dev *idev);
83	83	static void mld_add_delrec(struct inet6_dev idev, struct ifmcaddr6 pmc);
84		−static void mld_del_delrec(struct inet6_dev idev, const struct in6_addr addr);
	84	+static void mld_del_delrec(struct inet6_dev idev, struct ifmcaddr6 pmc);
85	85	static void mld_clear_delrec(struct inet6_dev *idev);
86	86	static bool mld_in_v1_mode(const struct inet6_dev *idev);
87	87	static int sf_setstate(struct ifmcaddr6 *pmc);
@@ -692,9 +692,9 @@ static void igmp6_group_dropped(struct ifmcaddr6 *mc) · 604 unmodified lines
692	692	dev_mc_del(dev, buf);
693	693	}
694	694
695		− if (mc->mca_flags & MAF_NOREPORT)
696		− goto done;
697	695	spin_unlock_bh(&mc->mca_lock);
	696	+ if (mc->mca_flags & MAF_NOREPORT)
	697	+ return;
698	698
699	699	if (!mc->idev->dead)
700	700	igmp6_leave_group(mc);
@@ -702,8 +702,6 @@ static void igmp6_group_dropped(struct ifmcaddr6 *mc) · 1 unmodified line
702	702	spin_lock_bh(&mc->mca_lock);
703	703	if (del_timer(&mc->mca_timer))
704	704	atomic_dec(&mc->mca_refcnt);
705		−done:
706		− ip6_mc_clear_src(mc);
707	705	spin_unlock_bh(&mc->mca_lock);
708	706	}
709	707
@@ -748,10 +746,11 @@ static void mld_add_delrec(struct inet6_dev idev, struct ifmcaddr6 im) · 38 unmodified lines
748	746	spin_unlock_bh(&idev->mc_lock);
749	747	}
750	748
751		−static void mld_del_delrec(struct inet6_dev idev, const struct in6_addr pmca)
	749	+static void mld_del_delrec(struct inet6_dev idev, struct ifmcaddr6 im)
752	750	{
753	751	struct ifmcaddr6 pmc, pmc_prev;
754		− struct ip6_sf_list psf, psf_next;
	752	+ struct ip6_sf_list *psf;
	753	+ struct in6_addr *pmca = &im->mca_addr;
755	754
756	755	spin_lock_bh(&idev->mc_lock);
757	756	pmc_prev = NULL;
@@ -768,14 +767,20 @@ static void mld_del_delrec(struct inet6_dev idev, const struct in6_addr pmca) · 10 unmodified lines
768	767	}
769	768	spin_unlock_bh(&idev->mc_lock);
770	769
	770	+ spin_lock_bh(&im->mca_lock);
771	771	if (pmc) {
772		− for (psf = pmc->mca_tomb; psf; psf = psf_next) {
773		− psf_next = psf->sf_next;
774		− kfree(psf);
	772	+ im->idev = pmc->idev;
	773	+ im->mca_crcount = idev->mc_qrv;
	774	+ im->mca_sfmode = pmc->mca_sfmode;
	775	+ if (pmc->mca_sfmode == MCAST_INCLUDE) {
	776	+ im->mca_tomb = pmc->mca_tomb;
	777	+ im->mca_sources = pmc->mca_sources;
	778	+ for (psf = im->mca_sources; psf; psf = psf->sf_next)
	779	+ psf->sf_crcount = im->mca_crcount;
775	780	}
776	781	in6_dev_put(pmc->idev);
777		− kfree(pmc);
778	782	}
	783	+ spin_unlock_bh(&im->mca_lock);
779	784	}
780	785
781	786	static void mld_clear_delrec(struct inet6_dev *idev)
@@ -904,7 +909,7 @@ int ipv6_dev_mc_inc(struct net_device dev, const struct in6_addr addr) · 122 unmodified lines
904	909	mca_get(mc);
905	910	write_unlock_bh(&idev->lock);
906	911
907		− mld_del_delrec(idev, &mc->mca_addr);
	912	+ mld_del_delrec(idev, mc);
908	913	igmp6_group_added(mc);
909	914	ma_put(mc);
910	915	return 0;
@@ -927,6 +932,7 @@ int __ipv6_dev_mc_dec(struct inet6_dev idev, const struct in6_addr addr) · 16 unmodified lines
927	932	write_unlock_bh(&idev->lock);
928	933
929	934	igmp6_group_dropped(ma);
	935	+ ip6_mc_clear_src(ma);
930	936
931	937	ma_put(ma);
932	938	return 0;
@@ -2501,15 +2507,17 @@ void ipv6_mc_down(struct inet6_dev *idev) · 1568 unmodified lines
2501	2507	/* Withdraw multicast list */
2502	2508
2503	2509	read_lock_bh(&idev->lock);
2504		− mld_ifc_stop_timer(idev);
2505		− mld_gq_stop_timer(idev);
2506		− mld_dad_stop_timer(idev);
2507	2510
2508	2511	for (i = idev->mc_list; i; i = i->next)
2509	2512	igmp6_group_dropped(i);
2510		− read_unlock_bh(&idev->lock);
2511	2513
2512		− mld_clear_delrec(idev);
	2514	+ /* Should stop timer after group drop. or we will
	2515	+ * start timer again in mld_ifc_event()
	2516	+ */
	2517	+ mld_ifc_stop_timer(idev);
	2518	+ mld_gq_stop_timer(idev);
	2519	+ mld_dad_stop_timer(idev);
	2520	+ read_unlock_bh(&idev->lock);
2513	2521	}
2514	2522
2515	2523	static void ipv6_mc_reset(struct inet6_dev *idev)
@@ -2531,8 +2539,10 @@ void ipv6_mc_up(struct inet6_dev *idev) · 15 unmodified lines
2531	2539
2532	2540	read_lock_bh(&idev->lock);
2533	2541	ipv6_mc_reset(idev);
2534		− for (i = idev->mc_list; i; i = i->next)
	2542	+ for (i = idev->mc_list; i; i = i->next) {
	2543	+ mld_del_delrec(idev, i);
2535	2544	igmp6_group_added(i);
	2545	+ }
2536	2546	read_unlock_bh(&idev->lock);
2537	2547	}
2538	2548
@@ -2565,6 +2575,7 @@ void ipv6_mc_destroy_dev(struct inet6_dev *idev) · 26 unmodified lines
2565	2575
2566	2576	/* Deactivate timers */
2567	2577	ipv6_mc_down(idev);
	2578	+ mld_clear_delrec(idev);
2568	2579
2569	2580	/* Delete all-nodes address. */
2570	2581	/* We cannot call ipv6_dev_mc_dec() directly, our caller in
@@ -2579,11 +2590,9 @@ void ipv6_mc_destroy_dev(struct inet6_dev *idev) · 8 unmodified lines
2579	2590	write_lock_bh(&idev->lock);
2580	2591	while ((i = idev->mc_list) != NULL) {
2581	2592	idev->mc_list = i->next;
2582		− write_unlock_bh(&idev->lock);
2583	2593
2584		− igmp6_group_dropped(i);
	2594	+ write_unlock_bh(&idev->lock);
2585	2595	ma_put(i);
2586		−
2587	2596	write_lock_bh(&idev->lock);
2588	2597	}
2589	2598	write_unlock_bh(&idev->lock);

net/ipv6/route.c+2−1

@@ -3317,7 +3317,8 @@ static int rt6_fill_node(struct net *net, · 3316 unmodified lines
3317	3317	if (nla_put_u8(skb, RTA_PREF, IPV6_EXTRACT_PREF(rt->rt6i_flags)))
3318	3318	goto nla_put_failure;
3319	3319
3320		− lwtunnel_fill_encap(skb, rt->dst.lwtstate);
	3320	+ if (lwtunnel_fill_encap(skb, rt->dst.lwtstate) < 0)
	3321	+ goto nla_put_failure;
3321	3322
3322	3323	nlmsg_end(skb, nlh);
3323	3324	return 0;

net/ipv6/seg6_hmac.c+1−1

@@ -400,7 +400,7 @@ static int seg6_hmac_init_algo(void) · 399 unmodified lines
400	400	*p_tfm = tfm;
401	401	}
402	402
403		− p_tfm = this_cpu_ptr(algo->tfms);
	403	+ p_tfm = raw_cpu_ptr(algo->tfms);
404	404	tfm = *p_tfm;
405	405
406	406	shsize = sizeof(*shash) + crypto_shash_descsize(tfm);

net/ipv6/seg6_iptunnel.c+4−0

@@ -265,7 +265,9 @@ int seg6_output(struct net net, struct sock sk, struct sk_buff *skb) · 264 unmodified lines
265	265	slwt = seg6_lwt_lwtunnel(orig_dst->lwtstate);
266	266
267	267	#ifdef CONFIG_DST_CACHE
	268	+ preempt_disable();
268	269	dst = dst_cache_get(&slwt->cache);
	270	+ preempt_enable();
269	271	#endif
270	272
271	273	if (unlikely(!dst)) {
@@ -286,7 +288,9 @@ int seg6_output(struct net net, struct sock sk, struct sk_buff *skb) · 14 unmodified lines
286	288	}
287	289
288	290	#ifdef CONFIG_DST_CACHE
	291	+ preempt_disable();
289	292	dst_cache_set_ip6(&slwt->cache, dst, &fl6.saddr);
	293	+ preempt_enable();
290	294	#endif
291	295	}
292	296

net/mac80211/chan.c+0−3

@@ -231,9 +231,6 @@ ieee80211_get_max_required_bw(struct ieee80211_sub_if_data *sdata) · 230 unmodified lines
231	231	!(sta->sdata->bss && sta->sdata->bss == sdata->bss))
232	232	continue;
233	233
234		− if (!sta->uploaded \|\| !test_sta_flag(sta, WLAN_STA_ASSOC))
235		− continue;
236		−
237	234	max_bw = max(max_bw, ieee80211_get_sta_bw(&sta->sta));
238	235	}
239	236	rcu_read_unlock();

net/mac80211/iface.c+21−0

@@ -6,6 +6,7 @@ · 5 unmodified lines
6	6	* Copyright (c) 2006 Jiri Benc <jbenc@suse.cz>
7	7	* Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
8	8	* Copyright 2013-2014 Intel Mobile Communications GmbH
	9	+ * Copyright (c) 2016 Intel Deutschland GmbH
9	10	*
10	11	* This program is free software; you can redistribute it and/or modify
11	12	* it under the terms of the GNU General Public License version 2 as
@@ -1295,6 +1296,26 @@ static void ieee80211_iface_work(struct work_struct *work) · 1283 unmodified lines
1295	1296	} else if (ieee80211_is_action(mgmt->frame_control) &&
1296	1297	mgmt->u.action.category == WLAN_CATEGORY_VHT) {
1297	1298	switch (mgmt->u.action.u.vht_group_notif.action_code) {
	1299	+ case WLAN_VHT_ACTION_OPMODE_NOTIF: {
	1300	+ struct ieee80211_rx_status *status;
	1301	+ enum nl80211_band band;
	1302	+ u8 opmode;
	1303	+
	1304	+ status = IEEE80211_SKB_RXCB(skb);
	1305	+ band = status->band;
	1306	+ opmode = mgmt->u.action.u.vht_opmode_notif.operating_mode;
	1307	+
	1308	+ mutex_lock(&local->sta_mtx);
	1309	+ sta = sta_info_get_bss(sdata, mgmt->sa);
	1310	+
	1311	+ if (sta)
	1312	+ ieee80211_vht_handle_opmode(sdata, sta,
	1313	+ opmode,
	1314	+ band);
	1315	+
	1316	+ mutex_unlock(&local->sta_mtx);
	1317	+ break;
	1318	+ }
1298	1319	case WLAN_VHT_ACTION_GROUPID_MGMT:
1299	1320	ieee80211_process_mu_groups(sdata, mgmt);
1300	1321	break;

net/mac80211/main.c+9−4

@@ -913,12 +913,17 @@ int ieee80211_register_hw(struct ieee80211_hw *hw) · 912 unmodified lines
913	913	supp_ht = supp_ht \|\| sband->ht_cap.ht_supported;
914	914	supp_vht = supp_vht \|\| sband->vht_cap.vht_supported;
915	915
916		− if (sband->ht_cap.ht_supported)
917		− local->rx_chains =
918		− max(ieee80211_mcs_to_chains(&sband->ht_cap.mcs),
919		− local->rx_chains);
	916	+ if (!sband->ht_cap.ht_supported)
	917	+ continue;
920	918
921	919	/* TODO: consider VHT for RX chains, hopefully it's the same */
	920	+ local->rx_chains =
	921	+ max(ieee80211_mcs_to_chains(&sband->ht_cap.mcs),
	922	+ local->rx_chains);
	923	+
	924	+ /* no need to mask, SM_PS_DISABLED has all bits set */
	925	+ sband->ht_cap.cap \|= WLAN_HT_CAP_SM_PS_DISABLED <<
	926	+ IEEE80211_HT_CAP_SM_PS_SHIFT;
922	927	}
923	928
924	929	/* if low-level driver supports AP, we also support VLAN */

net/mac80211/rate.c+2−0

@@ -40,6 +40,8 @@ void rate_control_rate_init(struct sta_info *sta) · 39 unmodified lines
40	40
41	41	ieee80211_sta_set_rx_nss(sta);
42	42
	43	+ ieee80211_recalc_min_chandef(sta->sdata);
	44	+
43	45	if (!ref)
44	46	return;
45	47

net/mac80211/rx.c+21−17

@@ -2472,7 +2472,8 @@ ieee80211_rx_h_mesh_fwding(struct ieee80211_rx_data *rx) · 2471 unmodified lines
2472	2472	if (!ifmsh->mshcfg.dot11MeshForwarding)
2473	2473	goto out;
2474	2474
2475		− fwd_skb = skb_copy_expand(skb, local->tx_headroom, 0, GFP_ATOMIC);
	2475	+ fwd_skb = skb_copy_expand(skb, local->tx_headroom +
	2476	+ sdata->encrypt_headroom, 0, GFP_ATOMIC);
2476	2477	if (!fwd_skb) {
2477	2478	net_info_ratelimited("%s: failed to clone mesh frame\n",
2478	2479	sdata->name);
@@ -2880,17 +2881,10 @@ ieee80211_rx_h_action(struct ieee80211_rx_data *rx) · 401 unmodified lines
2880	2881
2881	2882	switch (mgmt->u.action.u.vht_opmode_notif.action_code) {
2882	2883	case WLAN_VHT_ACTION_OPMODE_NOTIF: {
2883		− u8 opmode;
2884		−
2885	2884	/* verify opmode is present */
2886	2885	if (len < IEEE80211_MIN_ACTION_SIZE + 2)
2887	2886	goto invalid;
2888		−
2889		− opmode = mgmt->u.action.u.vht_opmode_notif.operating_mode;
2890		−
2891		− ieee80211_vht_handle_opmode(rx->sdata, rx->sta,
2892		− opmode, status->band);
2893		− goto handled;
	2887	+ goto queue;
2894	2888	}
2895	2889	case WLAN_VHT_ACTION_GROUPID_MGMT: {
2896	2890	if (len < IEEE80211_MIN_ACTION_SIZE + 25)
@@ -3942,21 +3936,31 @@ static bool ieee80211_invoke_fast_rx(struct ieee80211_rx_data *rx, · 1045 unmodified lines
3942	3936	u64_stats_update_end(&stats->syncp);
3943	3937
3944	3938	if (fast_rx->internal_forward) {
3945		− struct sta_info *dsta = sta_info_get(rx->sdata, skb->data);
	3939	+ struct sk_buff *xmit_skb = NULL;
	3940	+ bool multicast = is_multicast_ether_addr(skb->data);
	3941	+
	3942	+ if (multicast) {
	3943	+ xmit_skb = skb_copy(skb, GFP_ATOMIC);
	3944	+ } else if (sta_info_get(rx->sdata, skb->data)) {
	3945	+ xmit_skb = skb;
	3946	+ skb = NULL;
	3947	+ }
3946	3948
3947		− if (dsta) {
	3949	+ if (xmit_skb) {
3948	3950	/*
3949	3951	* Send to wireless media and increase priority by 256
3950	3952	* to keep the received priority instead of
3951	3953	* reclassifying the frame (see cfg80211_classify8021d).
3952	3954	*/
3953		− skb->priority += 256;
3954		− skb->protocol = htons(ETH_P_802_3);
3955		− skb_reset_network_header(skb);
3956		− skb_reset_mac_header(skb);
3957		− dev_queue_xmit(skb);
3958		− return true;
	3955	+ xmit_skb->priority += 256;
	3956	+ xmit_skb->protocol = htons(ETH_P_802_3);
	3957	+ skb_reset_network_header(xmit_skb);
	3958	+ skb_reset_mac_header(xmit_skb);
	3959	+ dev_queue_xmit(xmit_skb);
3959	3960	}
	3961	+
	3962	+ if (!skb)
	3963	+ return true;
3960	3964	}
3961	3965
3962	3966	/* deliver to local stack */

net/mac80211/sta_info.c+2−2

@@ -1501,8 +1501,8 @@ ieee80211_sta_ps_deliver_response(struct sta_info *sta, · 1500 unmodified lines
1501	1501
1502	1502	/* This will evaluate to 1, 3, 5 or 7. */
1503	1503	for (ac = IEEE80211_AC_VO; ac < IEEE80211_NUM_ACS; ac++)
1504		− if (ignored_acs & BIT(ac))
1505		− continue;
	1504	+ if (!(ignored_acs & ieee80211_ac_to_qos_mask[ac]))
	1505	+ break;
1506	1506	tid = 7 - 2 * ac;
1507	1507
1508	1508	ieee80211_send_null_response(sta, tid, reason, true, false);

net/mac80211/tx.c+7−10

@@ -1243,7 +1243,7 @@ ieee80211_tx_prepare(struct ieee80211_sub_if_data *sdata, · 1242 unmodified lines
1243	1243
1244	1244	static struct txq_info ieee80211_get_txq(struct ieee80211_local local,
1245	1245	struct ieee80211_vif *vif,
1246		− struct ieee80211_sta *pubsta,
	1246	+ struct sta_info *sta,
1247	1247	struct sk_buff *skb)
1248	1248	{
1249	1249	struct ieee80211_hdr hdr = (struct ieee80211_hdr ) skb->data;
@@ -1257,10 +1257,13 @@ static struct txq_info ieee80211_get_txq(struct ieee80211_local local, · 7 unmodified lines
1257	1257	if (!ieee80211_is_data(hdr->frame_control))
1258	1258	return NULL;
1259	1259
1260		− if (pubsta) {
	1260	+ if (sta) {
1261	1261	u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
1262	1262
1263		− txq = pubsta->txq[tid];
	1263	+ if (!sta->uploaded)
	1264	+ return NULL;
	1265	+
	1266	+ txq = sta->sta.txq[tid];
1264	1267	} else if (vif) {
1265	1268	txq = vif->txq;
1266	1269	}
@@ -1503,23 +1506,17 @@ static bool ieee80211_queue_skb(struct ieee80211_local *local, · 236 unmodified lines
1503	1506	struct fq *fq = &local->fq;
1504	1507	struct ieee80211_vif *vif;
1505	1508	struct txq_info *txqi;
1506		− struct ieee80211_sta *pubsta;
1507	1509
1508	1510	if (!local->ops->wake_tx_queue \|\|
1509	1511	sdata->vif.type == NL80211_IFTYPE_MONITOR)
1510	1512	return false;
1511	1513
1512		− if (sta && sta->uploaded)
1513		− pubsta = &sta->sta;
1514		− else
1515		− pubsta = NULL;
1516		−
1517	1514	if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
1518	1515	sdata = container_of(sdata->bss,
1519	1516	struct ieee80211_sub_if_data, u.ap);
1520	1517
1521	1518	vif = &sdata->vif;
1522		− txqi = ieee80211_get_txq(local, vif, pubsta, skb);
	1519	+ txqi = ieee80211_get_txq(local, vif, sta, skb);
1523	1520
1524	1521	if (!txqi)
1525	1522	return false;

net/mac80211/vht.c+3−1

@@ -527,8 +527,10 @@ void ieee80211_vht_handle_opmode(struct ieee80211_sub_if_data *sdata, · 526 unmodified lines
527	527
528	528	u32 changed = __ieee80211_vht_handle_opmode(sdata, sta, opmode, band);
529	529
530		− if (changed > 0)
	530	+ if (changed > 0) {
	531	+ ieee80211_recalc_min_chandef(sdata);
531	532	rate_control_rate_update(local, sband, sta, changed);
	533	+ }
532	534	}
533	535
534	536	void ieee80211_get_vht_mask_from_cap(__le16 vht_cap,

net/openvswitch/conntrack.c+4−2

@@ -514,7 +514,7 @@ static int ovs_ct_nat_execute(struct sk_buff skb, struct nf_conn ct, · 513 unmodified lines
514	514	int hooknum, nh_off, err = NF_ACCEPT;
515	515
516	516	nh_off = skb_network_offset(skb);
517		− skb_pull(skb, nh_off);
	517	+ skb_pull_rcsum(skb, nh_off);
518	518
519	519	/* See HOOK2MANIP(). */
520	520	if (maniptype == NF_NAT_MANIP_SRC)
@@ -579,6 +579,7 @@ static int ovs_ct_nat_execute(struct sk_buff skb, struct nf_conn ct, · 58 unmodified lines
579	579	err = nf_nat_packet(ct, ctinfo, hooknum, skb);
580	580	push:
581	581	skb_push(skb, nh_off);
	582	+ skb_postpush_rcsum(skb, skb->data, nh_off);
582	583
583	584	return err;
584	585	}
@@ -886,7 +887,7 @@ int ovs_ct_execute(struct net net, struct sk_buff skb, · 301 unmodified lines
886	887
887	888	/* The conntrack module expects to be working at L3. */
888	889	nh_ofs = skb_network_offset(skb);
889		− skb_pull(skb, nh_ofs);
	890	+ skb_pull_rcsum(skb, nh_ofs);
890	891
891	892	if (key->ip.frag != OVS_FRAG_TYPE_NONE) {
892	893	err = handle_fragments(net, key, info->zone.id, skb);
@@ -900,6 +901,7 @@ int ovs_ct_execute(struct net net, struct sk_buff skb, · 7 unmodified lines
900	901	err = ovs_ct_lookup(net, key, info, skb);
901	902
902	903	skb_push(skb, nh_ofs);
	904	+ skb_postpush_rcsum(skb, skb->data, nh_ofs);
903	905	if (err)
904	906	kfree_skb(skb);
905	907	return err;

net/sched/act_api.c+2−3

@@ -900,8 +900,6 @@ tca_action_gd(struct net net, struct nlattr nla, struct nlmsghdr *n, · 899 unmodified lines
900	900	goto err;
901	901	}
902	902	act->order = i;
903		− if (event == RTM_GETACTION)
904		− act->tcfa_refcnt++;
905	903	list_add_tail(&act->list, &actions);
906	904	}
907	905
@@ -914,7 +912,8 @@ tca_action_gd(struct net net, struct nlattr nla, struct nlmsghdr *n, · 6 unmodified lines
914	912	return ret;
915	913	}
916	914	err:
917		− tcf_action_destroy(&actions, 0);
	915	+ if (event != RTM_GETACTION)
	916	+ tcf_action_destroy(&actions, 0);
918	917	return ret;
919	918	}
920	919

net/sched/act_bpf.c+2−3

@@ -123,12 +123,11 @@ static int tcf_bpf_dump_ebpf_info(const struct tcf_bpf *prog, · 122 unmodified lines
123	123	nla_put_string(skb, TCA_ACT_BPF_NAME, prog->bpf_name))
124	124	return -EMSGSIZE;
125	125
126		− nla = nla_reserve(skb, TCA_ACT_BPF_DIGEST,
127		− sizeof(prog->filter->digest));
	126	+ nla = nla_reserve(skb, TCA_ACT_BPF_TAG, sizeof(prog->filter->tag));
128	127	if (nla == NULL)
129	128	return -EMSGSIZE;
130	129
131		− memcpy(nla_data(nla), prog->filter->digest, nla_len(nla));
	130	+ memcpy(nla_data(nla), prog->filter->tag, nla_len(nla));
132	131
133	132	return 0;
134	133	}

net/sched/cls_bpf.c+2−2

@@ -555,11 +555,11 @@ static int cls_bpf_dump_ebpf_info(const struct cls_bpf_prog *prog, · 554 unmodified lines
555	555	nla_put_string(skb, TCA_BPF_NAME, prog->bpf_name))
556	556	return -EMSGSIZE;
557	557
558		− nla = nla_reserve(skb, TCA_BPF_DIGEST, sizeof(prog->filter->digest));
	558	+ nla = nla_reserve(skb, TCA_BPF_TAG, sizeof(prog->filter->tag));
559	559	if (nla == NULL)
560	560	return -EMSGSIZE;
561	561
562		− memcpy(nla_data(nla), prog->filter->digest, nla_len(nla));
	562	+ memcpy(nla_data(nla), prog->filter->tag, nla_len(nla));
563	563
564	564	return 0;
565	565	}

net/sunrpc/auth_gss/svcauth_gss.c+1−1

@@ -1489,7 +1489,7 @@ svcauth_gss_accept(struct svc_rqst rqstp, __be32 authp) · 1488 unmodified lines
1489	1489	case RPC_GSS_PROC_DESTROY:
1490	1490	if (gss_write_verf(rqstp, rsci->mechctx, gc->gc_seq))
1491	1491	goto auth_err;
1492		− rsci->h.expiry_time = get_seconds();
	1492	+ rsci->h.expiry_time = seconds_since_boot();
1493	1493	set_bit(CACHE_NEGATIVE, &rsci->h.flags);
1494	1494	if (resv->iov_len + 4 > PAGE_SIZE)
1495	1495	goto drop;

net/sunrpc/svc_xprt.c+7−3

@@ -799,6 +799,8 @@ static int svc_handle_xprt(struct svc_rqst rqstp, struct svc_xprt xprt) · 798 unmodified lines
799	799
800	800	if (test_bit(XPT_CLOSE, &xprt->xpt_flags)) {
801	801	dprintk("svc_recv: found XPT_CLOSE\n");
	802	+ if (test_and_clear_bit(XPT_KILL_TEMP, &xprt->xpt_flags))
	803	+ xprt->xpt_ops->xpo_kill_temp_xprt(xprt);
802	804	svc_delete_xprt(xprt);
803	805	/* Leave XPT_BUSY set on the dead xprt: */
804	806	goto out;
@@ -1020,9 +1022,11 @@ void svc_age_temp_xprts_now(struct svc_serv serv, struct sockaddr server_addr) · 215 unmodified lines
1020	1022	le = to_be_closed.next;
1021	1023	list_del_init(le);
1022	1024	xprt = list_entry(le, struct svc_xprt, xpt_list);
1023		− dprintk("svc_age_temp_xprts_now: closing %p\n", xprt);
1024		− xprt->xpt_ops->xpo_kill_temp_xprt(xprt);
1025		− svc_close_xprt(xprt);
	1025	+ set_bit(XPT_CLOSE, &xprt->xpt_flags);
	1026	+ set_bit(XPT_KILL_TEMP, &xprt->xpt_flags);
	1027	+ dprintk("svc_age_temp_xprts_now: queuing xprt %p for closing\n",
	1028	+ xprt);
	1029	+ svc_xprt_enqueue(xprt);
1026	1030	}
1027	1031	}
1028	1032	EXPORT_SYMBOL_GPL(svc_age_temp_xprts_now);

net/sunrpc/xprtrdma/svc_rdma_recvfrom.c+0−2

@@ -347,8 +347,6 @@ int rdma_read_chunk_frmr(struct svcxprt_rdma *xprt, · 346 unmodified lines
347	347	atomic_inc(&rdma_stat_read);
348	348	return ret;
349	349	err:
350		− ib_dma_unmap_sg(xprt->sc_cm_id->device,
351		− frmr->sg, frmr->sg_nents, frmr->direction);
352	350	svc_rdma_put_context(ctxt, 0);
353	351	svc_rdma_put_frmr(xprt, frmr);
354	352	return ret;

net/tipc/discover.c+2−2

@@ -169,7 +169,7 @@ void tipc_disc_rcv(struct net net, struct sk_buff skb, · 168 unmodified lines
169	169
170	170	/* Send response, if necessary */
171	171	if (respond && (mtyp == DSC_REQ_MSG)) {
172		− rskb = tipc_buf_acquire(MAX_H_SIZE);
	172	+ rskb = tipc_buf_acquire(MAX_H_SIZE, GFP_ATOMIC);
173	173	if (!rskb)
174	174	return;
175	175	tipc_disc_init_msg(net, rskb, DSC_RESP_MSG, bearer);
@@ -278,7 +278,7 @@ int tipc_disc_create(struct net net, struct tipc_bearer b, · 102 unmodified lines
278	278	req = kmalloc(sizeof(*req), GFP_ATOMIC);
279	279	if (!req)
280	280	return -ENOMEM;
281		− req->buf = tipc_buf_acquire(MAX_H_SIZE);
	281	+ req->buf = tipc_buf_acquire(MAX_H_SIZE, GFP_ATOMIC);
282	282	if (!req->buf) {
283	283	kfree(req);
284	284	return -ENOMEM;

net/tipc/link.c+1−1

@@ -1395,7 +1395,7 @@ tnl: · 1394 unmodified lines
1395	1395	msg_set_seqno(hdr, seqno++);
1396	1396	pktlen = msg_size(hdr);
1397	1397	msg_set_size(&tnlhdr, pktlen + INT_H_SIZE);
1398		− tnlskb = tipc_buf_acquire(pktlen + INT_H_SIZE);
	1398	+ tnlskb = tipc_buf_acquire(pktlen + INT_H_SIZE, GFP_ATOMIC);
1399	1399	if (!tnlskb) {
1400	1400	pr_warn("%sunable to send packet\n", link_co_err);
1401	1401	return;

net/tipc/msg.c+8−8

@@ -58,12 +58,12 @@ static unsigned int align(unsigned int i) · 57 unmodified lines
58	58	* NOTE: Headroom is reserved to allow prepending of a data link header.
59	59	* There may also be unrequested tailroom present at the buffer's end.
60	60	*/
61		−struct sk_buff *tipc_buf_acquire(u32 size)
	61	+struct sk_buff *tipc_buf_acquire(u32 size, gfp_t gfp)
62	62	{
63	63	struct sk_buff *skb;
64	64	unsigned int buf_size = (BUF_HEADROOM + size + 3) & ~3u;
65	65
66		− skb = alloc_skb_fclone(buf_size, GFP_ATOMIC);
	66	+ skb = alloc_skb_fclone(buf_size, gfp);
67	67	if (skb) {
68	68	skb_reserve(skb, BUF_HEADROOM);
69	69	skb_put(skb, size);
@@ -95,7 +95,7 @@ struct sk_buff *tipc_msg_create(uint user, uint type, · 25 unmodified lines
95	95	struct tipc_msg *msg;
96	96	struct sk_buff *buf;
97	97
98		− buf = tipc_buf_acquire(hdr_sz + data_sz);
	98	+ buf = tipc_buf_acquire(hdr_sz + data_sz, GFP_ATOMIC);
99	99	if (unlikely(!buf))
100	100	return NULL;
101	101
@@ -261,7 +261,7 @@ int tipc_msg_build(struct tipc_msg mhdr, struct msghdr m, · 159 unmodified lines
261	261
262	262	/* No fragmentation needed? */
263	263	if (likely(msz <= pktmax)) {
264		− skb = tipc_buf_acquire(msz);
	264	+ skb = tipc_buf_acquire(msz, GFP_KERNEL);
265	265	if (unlikely(!skb))
266	266	return -ENOMEM;
267	267	skb_orphan(skb);
@@ -282,7 +282,7 @@ int tipc_msg_build(struct tipc_msg mhdr, struct msghdr m, · 14 unmodified lines
282	282	msg_set_importance(&pkthdr, msg_importance(mhdr));
283	283
284	284	/* Prepare first fragment */
285		− skb = tipc_buf_acquire(pktmax);
	285	+ skb = tipc_buf_acquire(pktmax, GFP_KERNEL);
286	286	if (!skb)
287	287	return -ENOMEM;
288	288	skb_orphan(skb);
@@ -313,7 +313,7 @@ int tipc_msg_build(struct tipc_msg mhdr, struct msghdr m, · 24 unmodified lines
313	313	pktsz = drem + INT_H_SIZE;
314	314	else
315	315	pktsz = pktmax;
316		− skb = tipc_buf_acquire(pktsz);
	316	+ skb = tipc_buf_acquire(pktsz, GFP_KERNEL);
317	317	if (!skb) {
318	318	rc = -ENOMEM;
319	319	goto error;
@@ -448,7 +448,7 @@ bool tipc_msg_make_bundle(struct sk_buff *skb, struct tipc_msg msg, · 128 unmodified lines
448	448	if (msz > (max / 2))
449	449	return false;
450	450
451		− _skb = tipc_buf_acquire(max);
	451	+ _skb = tipc_buf_acquire(max, GFP_ATOMIC);
452	452	if (!_skb)
453	453	return false;
454	454
@@ -496,7 +496,7 @@ bool tipc_msg_reverse(u32 own_node, struct sk_buff **skb, int err) · 41 unmodified lines
496	496
497	497	/* Never return SHORT header; expand by replacing buffer if necessary */
498	498	if (msg_short(hdr)) {
499		− *skb = tipc_buf_acquire(BASIC_H_SIZE + dlen);
	499	+ *skb = tipc_buf_acquire(BASIC_H_SIZE + dlen, GFP_ATOMIC);
500	500	if (!*skb)
501	501	goto exit;
502	502	memcpy((*skb)->data + BASIC_H_SIZE, msg_data(hdr), dlen);

net/tipc/msg.h+1−1

@@ -820,7 +820,7 @@ static inline bool msg_is_reset(struct tipc_msg *hdr) · 819 unmodified lines
820	820	return (msg_user(hdr) == LINK_PROTOCOL) && (msg_type(hdr) == RESET_MSG);
821	821	}
822	822
823		−struct sk_buff *tipc_buf_acquire(u32 size);
	823	+struct sk_buff *tipc_buf_acquire(u32 size, gfp_t gfp);
824	824	bool tipc_msg_validate(struct sk_buff *skb);
825	825	bool tipc_msg_reverse(u32 own_addr, struct sk_buff **skb, int err);
826	826	void tipc_msg_init(u32 own_addr, struct tipc_msg *m, u32 user, u32 type,

net/tipc/name_distr.c+1−1

@@ -69,7 +69,7 @@ static struct sk_buff named_prepare_buf(struct net net, u32 type, u32 size, · 68 unmodified lines
69	69	u32 dest)
70	70	{
71	71	struct tipc_net *tn = net_generic(net, tipc_net_id);
72		− struct sk_buff *buf = tipc_buf_acquire(INT_H_SIZE + size);
	72	+ struct sk_buff *buf = tipc_buf_acquire(INT_H_SIZE + size, GFP_ATOMIC);
73	73	struct tipc_msg *msg;
74	74
75	75	if (buf != NULL) {

net/wireless/nl80211.c+15−0

@@ -4615,6 +4615,15 @@ int cfg80211_check_station_change(struct wiphy *wiphy, · 4614 unmodified lines
4615	4615	break;
4616	4616	}
4617	4617
	4618	+ /*
	4619	+ * Older kernel versions ignored this attribute entirely, so don't
	4620	+ * reject attempts to update it but mark it as unused instead so the
	4621	+ * driver won't look at the data.
	4622	+ */
	4623	+ if (statype != CFG80211_STA_AP_CLIENT_UNASSOC &&
	4624	+ statype != CFG80211_STA_TDLS_PEER_SETUP)
	4625	+ params->opmode_notif_used = false;
	4626	+
4618	4627	return 0;
4619	4628	}
4620	4629	EXPORT_SYMBOL(cfg80211_check_station_change);
@@ -4854,6 +4863,12 @@ static int nl80211_set_station(struct sk_buff skb, struct genl_info info) · 233 unmodified lines
4854	4863	params.local_pm = pm;
4855	4864	}
4856	4865
	4866	+ if (info->attrs[NL80211_ATTR_OPMODE_NOTIF]) {
	4867	+ params.opmode_notif_used = true;
	4868	+ params.opmode_notif =
	4869	+ nla_get_u8(info->attrs[NL80211_ATTR_OPMODE_NOTIF]);
	4870	+ }
	4871	+
4857	4872	/* Include parameters for TDLS peer (will check later) */
4858	4873	err = nl80211_set_station_tdls(info, &params);
4859	4874	if (err)

tools/perf/util/probe-event.c+62−33

@@ -610,6 +610,33 @@ error: · 609 unmodified lines
610	610	return ret ? : -ENOENT;
611	611	}
612	612
	613	+/* Adjust symbol name and address */
	614	+static int post_process_probe_trace_point(struct probe_trace_point *tp,
	615	+ struct map *map, unsigned long offs)
	616	+{
	617	+ struct symbol *sym;
	618	+ u64 addr = tp->address + tp->offset - offs;
	619	+
	620	+ sym = map__find_symbol(map, addr);
	621	+ if (!sym)
	622	+ return -ENOENT;
	623	+
	624	+ if (strcmp(sym->name, tp->symbol)) {
	625	+ /* If we have no realname, use symbol for it */
	626	+ if (!tp->realname)
	627	+ tp->realname = tp->symbol;
	628	+ else
	629	+ free(tp->symbol);
	630	+ tp->symbol = strdup(sym->name);
	631	+ if (!tp->symbol)
	632	+ return -ENOMEM;
	633	+ }
	634	+ tp->offset = addr - sym->start;
	635	+ tp->address -= offs;
	636	+
	637	+ return 0;
	638	+}
	639	+
613	640	/*
614	641	* Rename DWARF symbols to ELF symbols -- gcc sometimes optimizes functions
615	642	* and generate new symbols with suffixes such as .constprop.N or .isra.N
@@ -622,11 +649,9 @@ static int · 6 unmodified lines
622	649	post_process_offline_probe_trace_events(struct probe_trace_event *tevs,
623	650	int ntevs, const char *pathname)
624	651	{
625		− struct symbol *sym;
626	652	struct map *map;
627	653	unsigned long stext = 0;
628		− u64 addr;
629		− int i;
	654	+ int i, ret = 0;
630	655
631	656	/* Prepare a map for offline binary */
632	657	map = dso__new_map(pathname);
@@ -636,23 +661,14 @@ post_process_offline_probe_trace_events(struct probe_trace_event *tevs, · 3 unmodified lines
636	661	}
637	662
638	663	for (i = 0; i < ntevs; i++) {
639		− addr = tevs[i].point.address + tevs[i].point.offset - stext;
640		− sym = map__find_symbol(map, addr);
641		− if (!sym)
642		− continue;
643		− if (!strcmp(sym->name, tevs[i].point.symbol))
644		− continue;
645		− /* If we have no realname, use symbol for it */
646		− if (!tevs[i].point.realname)
647		− tevs[i].point.realname = tevs[i].point.symbol;
648		− else
649		− free(tevs[i].point.symbol);
650		− tevs[i].point.symbol = strdup(sym->name);
651		− tevs[i].point.offset = addr - sym->start;
	664	+ ret = post_process_probe_trace_point(&tevs[i].point,
	665	+ map, stext);
	666	+ if (ret < 0)
	667	+ break;
652	668	}
653	669	map__put(map);
654	670
655		− return 0;
	671	+ return ret;
656	672	}
657	673
658	674	static int add_exec_to_probe_trace_events(struct probe_trace_event *tevs,
@@ -682,18 +698,31 @@ static int add_exec_to_probe_trace_events(struct probe_trace_event *tevs, · 23 unmodified lines
682	698	return ret;
683	699	}
684	700
685		−static int add_module_to_probe_trace_events(struct probe_trace_event *tevs,
686		− int ntevs, const char *module)
	701	+static int
	702	+post_process_module_probe_trace_events(struct probe_trace_event *tevs,
	703	+ int ntevs, const char *module,
	704	+ struct debuginfo *dinfo)
687	705	{
	706	+ Dwarf_Addr text_offs = 0;
688	707	int i, ret = 0;
689	708	char *mod_name = NULL;
	709	+ struct map *map;
690	710
691	711	if (!module)
692	712	return 0;
693	713
694		− mod_name = find_module_name(module);
	714	+ map = get_target_map(module, false);
	715	+ if (!map \|\| debuginfo__get_text_offset(dinfo, &text_offs, true) < 0) {
	716	+ pr_warning("Failed to get ELF symbols for %s\n", module);
	717	+ return -EINVAL;
	718	+ }
695	719
	720	+ mod_name = find_module_name(module);
696	721	for (i = 0; i < ntevs; i++) {
	722	+ ret = post_process_probe_trace_point(&tevs[i].point,
	723	+ map, (unsigned long)text_offs);
	724	+ if (ret < 0)
	725	+ break;
697	726	tevs[i].point.module =
698	727	strdup(mod_name ? mod_name : module);
699	728	if (!tevs[i].point.module) {
@@ -703,6 +732,8 @@ static int add_module_to_probe_trace_events(struct probe_trace_event *tevs, · 3 unmodified lines
703	732	}
704	733
705	734	free(mod_name);
	735	+ map__put(map);
	736	+
706	737	return ret;
707	738	}
708	739
@@ -760,7 +791,7 @@ arch__post_process_probe_trace_events(struct perf_probe_event *pev __maybe_unuse · 51 unmodified lines
760	791	static int post_process_probe_trace_events(struct perf_probe_event *pev,
761	792	struct probe_trace_event *tevs,
762	793	int ntevs, const char *module,
763		− bool uprobe)
	794	+ bool uprobe, struct debuginfo *dinfo)
764	795	{
765	796	int ret;
766	797
@@ -768,7 +799,8 @@ static int post_process_probe_trace_events(struct perf_probe_event *pev, · 1 unmodified line
768	799	ret = add_exec_to_probe_trace_events(tevs, ntevs, module);
769	800	else if (module)
770	801	/* Currently ref_reloc_sym based probe is not for drivers */
771		− ret = add_module_to_probe_trace_events(tevs, ntevs, module);
	802	+ ret = post_process_module_probe_trace_events(tevs, ntevs,
	803	+ module, dinfo);
772	804	else
773	805	ret = post_process_kernel_probe_trace_events(tevs, ntevs);
774	806
@@ -812,30 +844,27 @@ static int try_to_find_probe_trace_events(struct perf_probe_event *pev, · 37 unmodified lines
812	844	}
813	845	}
814	846
815		− debuginfo__delete(dinfo);
816		−
817	847	if (ntevs > 0) { /* Succeeded to find trace events */
818	848	pr_debug("Found %d probe_trace_events.\n", ntevs);
819	849	ret = post_process_probe_trace_events(pev, *tevs, ntevs,
820		− pev->target, pev->uprobes);
	850	+ pev->target, pev->uprobes, dinfo);
821	851	if (ret < 0 \|\| ret == ntevs) {
	852	+ pr_debug("Post processing failed or all events are skipped. (%d)\n", ret);
822	853	clear_probe_trace_events(*tevs, ntevs);
823	854	zfree(tevs);
	855	+ ntevs = 0;
824	856	}
825		− if (ret != ntevs)
826		− return ret < 0 ? ret : ntevs;
827		− ntevs = 0;
828		− /* Fall through */
829	857	}
830	858
	859	+ debuginfo__delete(dinfo);
	860	+
831	861	if (ntevs == 0) { /* No error but failed to find probe point. */
832	862	pr_warning("Probe point '%s' not found.\n",
833	863	synthesize_perf_probe_point(&pev->point));
834	864	return -ENOENT;
835		− }
836		− /* Error path : ntevs < 0 */
837		− pr_debug("An error occurred in debuginfo analysis (%d).\n", ntevs);
838		− if (ntevs < 0) {
	865	+ } else if (ntevs < 0) {
	866	+ /* Error path : ntevs < 0 */
	867	+ pr_debug("An error occurred in debuginfo analysis (%d).\n", ntevs);
839	868	if (ntevs == -EBADF)
840	869	pr_warning("Warning: No dwarf info found in the vmlinux - "
841	870	"please rebuild kernel with CONFIG_DEBUG_INFO=y.\n");

tools/perf/util/probe-finder.c+7−8

@@ -1501,7 +1501,8 @@ int debuginfo__find_available_vars_at(struct debuginfo *dbg, · 1500 unmodified lines
1501	1501	}
1502	1502
1503	1503	/* For the kernel module, we need a special code to get a DIE */
1504		−static int debuginfo__get_text_offset(struct debuginfo dbg, Dwarf_Addr offs)
	1504	+int debuginfo__get_text_offset(struct debuginfo dbg, Dwarf_Addr offs,
	1505	+ bool adjust_offset)
1505	1506	{
1506	1507	int n, i;
1507	1508	Elf32_Word shndx;
@@ -1530,6 +1531,8 @@ static int debuginfo__get_text_offset(struct debuginfo dbg, Dwarf_Addr offs) · 22 unmodified lines
1530	1531	if (!shdr)
1531	1532	return -ENOENT;
1532	1533	*offs = shdr->sh_addr;
	1534	+ if (adjust_offset)
	1535	+ *offs -= shdr->sh_offset;
1533	1536	}
1534	1537	}
1535	1538	return 0;
@@ -1543,16 +1546,12 @@ int debuginfo__find_probe_point(struct debuginfo *dbg, unsigned long addr, · 7 unmodified lines
1543	1546	Dwarf_Addr _addr = 0, baseaddr = 0;
1544	1547	const char fname = NULL, func = NULL, basefunc = NULL, tmp;
1545	1548	int baseline = 0, lineno = 0, ret = 0;
1546		− bool reloc = false;
1547	1549
1548		−retry:
	1550	+ /* We always need to relocate the address for aranges */
	1551	+ if (debuginfo__get_text_offset(dbg, &baseaddr, false) == 0)
	1552	+ addr += baseaddr;
1549	1553	/* Find cu die */
1550	1554	if (!dwarf_addrdie(dbg->dbg, (Dwarf_Addr)addr, &cudie)) {
1551		− if (!reloc && debuginfo__get_text_offset(dbg, &baseaddr) == 0) {
1552		− addr += baseaddr;
1553		− reloc = true;
1554		− goto retry;
1555		− }
1556	1555	pr_warning("Failed to find debug information for address %lx\n",
1557	1556	addr);
1558	1557	ret = -EINVAL;

tools/perf/util/probe-finder.h+3−0

@@ -46,6 +46,9 @@ int debuginfo__find_trace_events(struct debuginfo *dbg, · 45 unmodified lines
46	46	int debuginfo__find_probe_point(struct debuginfo *dbg, unsigned long addr,
47	47	struct perf_probe_point *ppt);
48	48
	49	+int debuginfo__get_text_offset(struct debuginfo dbg, Dwarf_Addr offs,
	50	+ bool adjust_offset);
	51	+
49	52	/* Find a line range */
50	53	int debuginfo__find_line_range(struct debuginfo dbg, struct line_range lr);
51	54

tools/testing/selftests/powerpc/pmu/ebb/pmc56_overflow_test.c+1−1

@@ -66,7 +66,7 @@ int pmc56_overflow(void) · 65 unmodified lines
66	66
67	67	FAIL_IF(ebb_event_enable(&event));
68	68
69		− mtspr(SPRN_PMC1, pmc_sample_period(sample_period));
	69	+ mtspr(SPRN_PMC2, pmc_sample_period(sample_period));
70	70	mtspr(SPRN_PMC5, 0);
71	71	mtspr(SPRN_PMC6, 0);
72	72

tools/virtio/ringtest/main.h+12−0

@@ -26,6 +26,16 @@ static inline void wait_cycles(unsigned long long cycles) · 25 unmodified lines
26	26	#define VMEXIT_CYCLES 500
27	27	#define VMENTRY_CYCLES 500
28	28
	29	+#elif defined(__s390x__)
	30	+static inline void wait_cycles(unsigned long long cycles)
	31	+{
	32	+ asm volatile("0: brctg %0,0b" : : "d" (cycles));
	33	+}
	34	+
	35	+/* tweak me */
	36	+#define VMEXIT_CYCLES 200
	37	+#define VMENTRY_CYCLES 200
	38	+
29	39	#else
30	40	static inline void wait_cycles(unsigned long long cycles)
31	41	{
@@ -81,6 +91,8 @@ extern unsigned ring_size; · 49 unmodified lines
81	91	/* Is there a portable way to do this? */
82	92	#if defined(__x86_64__) \|\| defined(__i386__)
83	93	#define cpu_relax() asm ("rep; nop" ::: "memory")
	94	+#elif defined(__s390x__)
	95	+#define cpu_relax() barrier()
84	96	#else
85	97	#define cpu_relax() assert(0)
86	98	#endif

tools/virtio/ringtest/run-on-all.sh+3−2

@@ -1,12 +1,13 @@
1	1	#!/bin/sh
2	2
	3	+CPUS_ONLINE=$(lscpu --online -p=cpu\|grep -v -e '#')
3	4	#use last CPU for host. Why not the first?
4	5	#many devices tend to use cpu0 by default so
5	6	#it tends to be busier
6		−HOST_AFFINITY=$(lscpu -p=cpu \| tail -1)
	7	+HOST_AFFINITY=$(echo "${CPUS_ONLINE}"\|tail -n 1)
7	8
8	9	#run command on all cpus
9		−for cpu in $(seq 0 $HOST_AFFINITY)
	10	+for cpu in $CPUS_ONLINE
10	11	do
11	12	#Don't run guest and host on same CPU
12	13	#It actually works ok if using signalling

virt/kvm/arm/arch_timer.c+159−62

@@ -24,6 +24,7 @@ · 23 unmodified lines
24	24
25	25	#include <clocksource/arm_arch_timer.h>
26	26	#include <asm/arch_timer.h>
	27	+#include <asm/kvm_hyp.h>
27	28
28	29	#include <kvm/arm_vgic.h>
29	30	#include <kvm/arm_arch_timer.h>
@@ -36,10 +37,10 @@ static u32 host_vtimer_irq_flags; · 6 unmodified lines
36	37
37	38	void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu)
38	39	{
39		− vcpu->arch.timer_cpu.active_cleared_last = false;
	40	+ vcpu_vtimer(vcpu)->active_cleared_last = false;
40	41	}
41	42
42		−static u64 kvm_phys_timer_read(void)
	43	+u64 kvm_phys_timer_read(void)
43	44	{
44	45	return timecounter->cc->read(timecounter->cc);
45	46	}
@@ -89,9 +90,6 @@ static void kvm_timer_inject_irq_work(struct work_struct *work) · 43 unmodified lines
89	90	struct kvm_vcpu *vcpu;
90	91
91	92	vcpu = container_of(work, struct kvm_vcpu, arch.timer_cpu.expired);
92		− vcpu->arch.timer_cpu.armed = false;
93		−
94		− WARN_ON(!kvm_timer_should_fire(vcpu));
95	93
96	94	/*
97	95	* If the vcpu is blocked we want to wake it up so that it will see
@@ -100,12 +98,12 @@ static void kvm_timer_inject_irq_work(struct work_struct *work) · 2 unmodified lines
100	98	kvm_vcpu_kick(vcpu);
101	99	}
102	100
103		−static u64 kvm_timer_compute_delta(struct kvm_vcpu *vcpu)
	101	+static u64 kvm_timer_compute_delta(struct arch_timer_context *timer_ctx)
104	102	{
105	103	u64 cval, now;
106	104
107		− cval = vcpu->arch.timer_cpu.cntv_cval;
108		− now = kvm_phys_timer_read() - vcpu->kvm->arch.timer.cntvoff;
	105	+ cval = timer_ctx->cnt_cval;
	106	+ now = kvm_phys_timer_read() - timer_ctx->cntvoff;
109	107
110	108	if (now < cval) {
111	109	u64 ns;
@@ -120,6 +118,35 @@ static u64 kvm_timer_compute_delta(struct kvm_vcpu *vcpu) · 8 unmodified lines
120	118	return 0;
121	119	}
122	120
	121	+static bool kvm_timer_irq_can_fire(struct arch_timer_context *timer_ctx)
	122	+{
	123	+ return !(timer_ctx->cnt_ctl & ARCH_TIMER_CTRL_IT_MASK) &&
	124	+ (timer_ctx->cnt_ctl & ARCH_TIMER_CTRL_ENABLE);
	125	+}
	126	+
	127	+/*
	128	+ * Returns the earliest expiration time in ns among guest timers.
	129	+ * Note that it will return 0 if none of timers can fire.
	130	+ */
	131	+static u64 kvm_timer_earliest_exp(struct kvm_vcpu *vcpu)
	132	+{
	133	+ u64 min_virt = ULLONG_MAX, min_phys = ULLONG_MAX;
	134	+ struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
	135	+ struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
	136	+
	137	+ if (kvm_timer_irq_can_fire(vtimer))
	138	+ min_virt = kvm_timer_compute_delta(vtimer);
	139	+
	140	+ if (kvm_timer_irq_can_fire(ptimer))
	141	+ min_phys = kvm_timer_compute_delta(ptimer);
	142	+
	143	+ /* If none of timers can fire, then return 0 */
	144	+ if ((min_virt == ULLONG_MAX) && (min_phys == ULLONG_MAX))
	145	+ return 0;
	146	+
	147	+ return min(min_virt, min_phys);
	148	+}
	149	+
123	150	static enum hrtimer_restart kvm_timer_expire(struct hrtimer *hrt)
124	151	{
125	152	struct arch_timer_cpu *timer;
@@ -134,7 +161,7 @@ static enum hrtimer_restart kvm_timer_expire(struct hrtimer *hrt) · 8 unmodified lines
134	161	* PoV (NTP on the host may have forced it to expire
135	162	* early). If we should have slept longer, restart it.
136	163	*/
137		− ns = kvm_timer_compute_delta(vcpu);
	164	+ ns = kvm_timer_earliest_exp(vcpu);
138	165	if (unlikely(ns)) {
139	166	hrtimer_forward_now(hrt, ns_to_ktime(ns));
140	167	return HRTIMER_RESTART;
@@ -144,42 +171,33 @@ static enum hrtimer_restart kvm_timer_expire(struct hrtimer *hrt) · 3 unmodified lines
144	171	return HRTIMER_NORESTART;
145	172	}
146	173
147		−static bool kvm_timer_irq_can_fire(struct kvm_vcpu *vcpu)
	174	+bool kvm_timer_should_fire(struct arch_timer_context *timer_ctx)
148	175	{
149		− struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
150		−
151		− return !(timer->cntv_ctl & ARCH_TIMER_CTRL_IT_MASK) &&
152		− (timer->cntv_ctl & ARCH_TIMER_CTRL_ENABLE);
153		−}
154		−
155		−bool kvm_timer_should_fire(struct kvm_vcpu *vcpu)
156		−{
157		− struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
158	176	u64 cval, now;
159	177
160		− if (!kvm_timer_irq_can_fire(vcpu))
	178	+ if (!kvm_timer_irq_can_fire(timer_ctx))
161	179	return false;
162	180
163		− cval = timer->cntv_cval;
164		− now = kvm_phys_timer_read() - vcpu->kvm->arch.timer.cntvoff;
	181	+ cval = timer_ctx->cnt_cval;
	182	+ now = kvm_phys_timer_read() - timer_ctx->cntvoff;
165	183
166	184	return cval <= now;
167	185	}
168	186
169		−static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level)
	187	+static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level,
	188	+ struct arch_timer_context *timer_ctx)
170	189	{
171	190	int ret;
172		− struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
173	191
174	192	BUG_ON(!vgic_initialized(vcpu->kvm));
175	193
176		− timer->active_cleared_last = false;
177		− timer->irq.level = new_level;
178		− trace_kvm_timer_update_irq(vcpu->vcpu_id, timer->irq.irq,
179		− timer->irq.level);
180		− ret = kvm_vgic_inject_mapped_irq(vcpu->kvm, vcpu->vcpu_id,
181		− timer->irq.irq,
182		− timer->irq.level);
	194	+ timer_ctx->active_cleared_last = false;
	195	+ timer_ctx->irq.level = new_level;
	196	+ trace_kvm_timer_update_irq(vcpu->vcpu_id, timer_ctx->irq.irq,
	197	+ timer_ctx->irq.level);
	198	+
	199	+ ret = kvm_vgic_inject_irq(vcpu->kvm, vcpu->vcpu_id, timer_ctx->irq.irq,
	200	+ timer_ctx->irq.level);
183	201	WARN_ON(ret);
184	202	}
185	203
@@ -190,22 +208,43 @@ static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level) · 4 unmodified lines
190	208	static int kvm_timer_update_state(struct kvm_vcpu *vcpu)
191	209	{
192	210	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
	211	+ struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
	212	+ struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
193	213
194	214	/*
195	215	* If userspace modified the timer registers via SET_ONE_REG before
196		− * the vgic was initialized, we mustn't set the timer->irq.level value
	216	+ * the vgic was initialized, we mustn't set the vtimer->irq.level value
197	217	* because the guest would never see the interrupt. Instead wait
198	218	* until we call this function from kvm_timer_flush_hwstate.
199	219	*/
200	220	if (!vgic_initialized(vcpu->kvm) \|\| !timer->enabled)
201	221	return -ENODEV;
202	222
203		− if (kvm_timer_should_fire(vcpu) != timer->irq.level)
204		− kvm_timer_update_irq(vcpu, !timer->irq.level);
	223	+ if (kvm_timer_should_fire(vtimer) != vtimer->irq.level)
	224	+ kvm_timer_update_irq(vcpu, !vtimer->irq.level, vtimer);
	225	+
	226	+ if (kvm_timer_should_fire(ptimer) != ptimer->irq.level)
	227	+ kvm_timer_update_irq(vcpu, !ptimer->irq.level, ptimer);
205	228
206	229	return 0;
207	230	}
208	231
	232	+/* Schedule the background timer for the emulated timer. */
	233	+static void kvm_timer_emulate(struct kvm_vcpu *vcpu,
	234	+ struct arch_timer_context *timer_ctx)
	235	+{
	236	+ struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
	237	+
	238	+ if (kvm_timer_should_fire(timer_ctx))
	239	+ return;
	240	+
	241	+ if (!kvm_timer_irq_can_fire(timer_ctx))
	242	+ return;
	243	+
	244	+ /* The timer has not yet expired, schedule a background timer */
	245	+ timer_arm(timer, kvm_timer_compute_delta(timer_ctx));
	246	+}
	247	+
209	248	/*
210	249	* Schedule the background timer before calling kvm_vcpu_block, so that this
211	250	* thread is removed from its waitqueue and made runnable when there's a timer
@@ -214,26 +253,31 @@ static int kvm_timer_update_state(struct kvm_vcpu *vcpu) · 2 unmodified lines
214	253	void kvm_timer_schedule(struct kvm_vcpu *vcpu)
215	254	{
216	255	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
	256	+ struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
	257	+ struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
217	258
218	259	BUG_ON(timer_is_armed(timer));
219	260
220	261	/*
221		− * No need to schedule a background timer if the guest timer has
	262	+ * No need to schedule a background timer if any guest timer has
222	263	* already expired, because kvm_vcpu_block will return before putting
223	264	* the thread to sleep.
224	265	*/
225		− if (kvm_timer_should_fire(vcpu))
	266	+ if (kvm_timer_should_fire(vtimer) \|\| kvm_timer_should_fire(ptimer))
226	267	return;
227	268
228	269	/*
229		− * If the timer is not capable of raising interrupts (disabled or
	270	+ * If both timers are not capable of raising interrupts (disabled or
230	271	* masked), then there's no more work for us to do.
231	272	*/
232		− if (!kvm_timer_irq_can_fire(vcpu))
	273	+ if (!kvm_timer_irq_can_fire(vtimer) && !kvm_timer_irq_can_fire(ptimer))
233	274	return;
234	275
235		− /* The timer has not yet expired, schedule a background timer */
236		− timer_arm(timer, kvm_timer_compute_delta(vcpu));
	276	+ /*
	277	+ * The guest timers have not yet expired, schedule a background timer.
	278	+ * Set the earliest expiration time among the guest timers.
	279	+ */
	280	+ timer_arm(timer, kvm_timer_earliest_exp(vcpu));
237	281	}
238	282
239	283	void kvm_timer_unschedule(struct kvm_vcpu *vcpu)
@@ -251,13 +295,16 @@ void kvm_timer_unschedule(struct kvm_vcpu *vcpu) · 11 unmodified lines
251	295	*/
252	296	void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu)
253	297	{
254		− struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
	298	+ struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
255	299	bool phys_active;
256	300	int ret;
257	301
258	302	if (kvm_timer_update_state(vcpu))
259	303	return;
260	304
	305	+ /* Set the background timer for the physical timer emulation. */
	306	+ kvm_timer_emulate(vcpu, vcpu_ptimer(vcpu));
	307	+
261	308	/*
262	309	* If we enter the guest with the virtual input level to the VGIC
263	310	* asserted, then we have already told the VGIC what we need to, and
@@ -275,8 +322,8 @@ void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu) · 11 unmodified lines
275	322	* to ensure that hardware interrupts from the timer triggers a guest
276	323	* exit.
277	324	*/
278		− phys_active = timer->irq.level \|\|
279		− kvm_vgic_map_is_active(vcpu, timer->irq.irq);
	325	+ phys_active = vtimer->irq.level \|\|
	326	+ kvm_vgic_map_is_active(vcpu, vtimer->irq.irq);
280	327
281	328	/*
282	329	* We want to avoid hitting the (re)distributor as much as
@@ -298,7 +345,7 @@ void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu) · 15 unmodified lines
298	345	* - cached value is "active clear"
299	346	* - value to be programmed is "active clear"
300	347	*/
301		− if (timer->active_cleared_last && !phys_active)
	348	+ if (vtimer->active_cleared_last && !phys_active)
302	349	return;
303	350
304	351	ret = irq_set_irqchip_state(host_vtimer_irq,
@@ -306,7 +353,7 @@ void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu) · 1 unmodified line
306	353	phys_active);
307	354	WARN_ON(ret);
308	355
309		− timer->active_cleared_last = !phys_active;
	356	+ vtimer->active_cleared_last = !phys_active;
310	357	}
311	358
312	359	/**
@@ -320,7 +367,11 @@ void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu) · 7 unmodified lines
320	367	{
321	368	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
322	369
323		− BUG_ON(timer_is_armed(timer));
	370	+ /*
	371	+ * This is to cancel the background timer for the physical timer
	372	+ * emulation if it is set.
	373	+ */
	374	+ timer_disarm(timer);
324	375
325	376	/*
326	377	* The guest could have modified the timer registers or the timer
@@ -330,9 +381,11 @@ void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu) · 3 unmodified lines
330	381	}
331	382
332	383	int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu,
333		− const struct kvm_irq_level *irq)
	384	+ const struct kvm_irq_level *virt_irq,
	385	+ const struct kvm_irq_level *phys_irq)
334	386	{
335		− struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
	387	+ struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
	388	+ struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
336	389
337	390	/*
338	391	* The vcpu timer irq number cannot be determined in
@@ -340,7 +393,8 @@ int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu, · 1 unmodified line
340	393	* kvm_vcpu_set_target(). To handle this, we determine
341	394	* vcpu timer irq number when the vcpu is reset.
342	395	*/
343		− timer->irq.irq = irq->irq;
	396	+ vtimer->irq.irq = virt_irq->irq;
	397	+ ptimer->irq.irq = phys_irq->irq;
344	398
345	399	/*
346	400	* The bits in CNTV_CTL are architecturally reset to UNKNOWN for ARMv8
@@ -348,16 +402,40 @@ int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu, · 1 unmodified line
348	402	* resets the timer to be disabled and unmasked and is compliant with
349	403	* the ARMv7 architecture.
350	404	*/
351		− timer->cntv_ctl = 0;
	405	+ vtimer->cnt_ctl = 0;
	406	+ ptimer->cnt_ctl = 0;
352	407	kvm_timer_update_state(vcpu);
353	408
354	409	return 0;
355	410	}
356	411
	412	+/* Make the updates of cntvoff for all vtimer contexts atomic */
	413	+static void update_vtimer_cntvoff(struct kvm_vcpu *vcpu, u64 cntvoff)
	414	+{
	415	+ int i;
	416	+ struct kvm *kvm = vcpu->kvm;
	417	+ struct kvm_vcpu *tmp;
	418	+
	419	+ mutex_lock(&kvm->lock);
	420	+ kvm_for_each_vcpu(i, tmp, kvm)
	421	+ vcpu_vtimer(tmp)->cntvoff = cntvoff;
	422	+
	423	+ /*
	424	+ * When called from the vcpu create path, the CPU being created is not
	425	+ * included in the loop above, so we just set it here as well.
	426	+ */
	427	+ vcpu_vtimer(vcpu)->cntvoff = cntvoff;
	428	+ mutex_unlock(&kvm->lock);
	429	+}
	430	+
357	431	void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu)
358	432	{
359	433	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
360	434
	435	+ /* Synchronize cntvoff across all vtimers of a VM. */
	436	+ update_vtimer_cntvoff(vcpu, kvm_phys_timer_read());
	437	+ vcpu_ptimer(vcpu)->cntvoff = 0;
	438	+
361	439	INIT_WORK(&timer->expired, kvm_timer_inject_irq_work);
362	440	hrtimer_init(&timer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
363	441	timer->timer.function = kvm_timer_expire;
@@ -370,17 +448,17 @@ static void kvm_timer_init_interrupt(void *info) · 6 unmodified lines
370	448
371	449	int kvm_arm_timer_set_reg(struct kvm_vcpu *vcpu, u64 regid, u64 value)
372	450	{
373		− struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
	451	+ struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
374	452
375	453	switch (regid) {
376	454	case KVM_REG_ARM_TIMER_CTL:
377		− timer->cntv_ctl = value;
	455	+ vtimer->cnt_ctl = value;
378	456	break;
379	457	case KVM_REG_ARM_TIMER_CNT:
380		− vcpu->kvm->arch.timer.cntvoff = kvm_phys_timer_read() - value;
	458	+ update_vtimer_cntvoff(vcpu, kvm_phys_timer_read() - value);
381	459	break;
382	460	case KVM_REG_ARM_TIMER_CVAL:
383		− timer->cntv_cval = value;
	461	+ vtimer->cnt_cval = value;
384	462	break;
385	463	default:
386	464	return -1;
@@ -392,15 +470,15 @@ int kvm_arm_timer_set_reg(struct kvm_vcpu *vcpu, u64 regid, u64 value) · 5 unmodified lines
392	470
393	471	u64 kvm_arm_timer_get_reg(struct kvm_vcpu *vcpu, u64 regid)
394	472	{
395		− struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
	473	+ struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
396	474
397	475	switch (regid) {
398	476	case KVM_REG_ARM_TIMER_CTL:
399		− return timer->cntv_ctl;
	477	+ return vtimer->cnt_ctl;
400	478	case KVM_REG_ARM_TIMER_CNT:
401		− return kvm_phys_timer_read() - vcpu->kvm->arch.timer.cntvoff;
	479	+ return kvm_phys_timer_read() - vtimer->cntvoff;
402	480	case KVM_REG_ARM_TIMER_CVAL:
403		− return timer->cntv_cval;
	481	+ return vtimer->cnt_cval;
404	482	}
405	483	return (u64)-1;
406	484	}
@@ -464,14 +542,16 @@ int kvm_timer_hyp_init(void) · 57 unmodified lines
464	542	void kvm_timer_vcpu_terminate(struct kvm_vcpu *vcpu)
465	543	{
466	544	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
	545	+ struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
467	546
468	547	timer_disarm(timer);
469		− kvm_vgic_unmap_phys_irq(vcpu, timer->irq.irq);
	548	+ kvm_vgic_unmap_phys_irq(vcpu, vtimer->irq.irq);
470	549	}
471	550
472	551	int kvm_timer_enable(struct kvm_vcpu *vcpu)
473	552	{
474	553	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
	554	+ struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
475	555	struct irq_desc *desc;
476	556	struct irq_data *data;
477	557	int phys_irq;
@@ -499,7 +579,7 @@ int kvm_timer_enable(struct kvm_vcpu *vcpu) · 21 unmodified lines
499	579	* Tell the VGIC that the virtual interrupt is tied to a
500	580	* physical interrupt. We do that once per VCPU.
501	581	*/
502		− ret = kvm_vgic_map_phys_irq(vcpu, timer->irq.irq, phys_irq);
	582	+ ret = kvm_vgic_map_phys_irq(vcpu, vtimer->irq.irq, phys_irq);
503	583	if (ret)
504	584	return ret;
505	585
@@ -508,7 +588,24 @@ int kvm_timer_enable(struct kvm_vcpu *vcpu) · 2 unmodified lines
508	588	return 0;
509	589	}
510	590
511		−void kvm_timer_init(struct kvm *kvm)
	591	+/*
	592	+ * On VHE system, we only need to configure trap on physical timer and counter
	593	+ * accesses in EL0 and EL1 once, not for every world switch.
	594	+ * The host kernel runs at EL2 with HCR_EL2.TGE == 1,
	595	+ * and this makes those bits have no effect for the host kernel execution.
	596	+ */
	597	+void kvm_timer_init_vhe(void)
512	598	{
513		− kvm->arch.timer.cntvoff = kvm_phys_timer_read();
	599	+ /* When HCR_EL2.E2H ==1, EL1PCEN and EL1PCTEN are shifted by 10 */
	600	+ u32 cnthctl_shift = 10;
	601	+ u64 val;
	602	+
	603	+ /*
	604	+ * Disallow physical timer access for the guest.
	605	+ * Physical counter access is allowed.
	606	+ */
	607	+ val = read_sysreg(cnthctl_el2);
	608	+ val &= ~(CNTHCTL_EL1PCEN << cnthctl_shift);
	609	+ val \|= (CNTHCTL_EL1PCTEN << cnthctl_shift);
	610	+ write_sysreg(val, cnthctl_el2);
514	611	}

virt/kvm/arm/hyp/timer-sr.c+28−18

@@ -25,20 +25,27 @@ · 24 unmodified lines
25	25	void __hyp_text __timer_save_state(struct kvm_vcpu *vcpu)
26	26	{
27	27	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
	28	+ struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
28	29	u64 val;
29	30
30	31	if (timer->enabled) {
31		− timer->cntv_ctl = read_sysreg_el0(cntv_ctl);
32		− timer->cntv_cval = read_sysreg_el0(cntv_cval);
	32	+ vtimer->cnt_ctl = read_sysreg_el0(cntv_ctl);
	33	+ vtimer->cnt_cval = read_sysreg_el0(cntv_cval);
33	34	}
34	35
35	36	/* Disable the virtual timer */
36	37	write_sysreg_el0(0, cntv_ctl);
37	38
38		− /* Allow physical timer/counter access for the host */
39		− val = read_sysreg(cnthctl_el2);
40		− val \|= CNTHCTL_EL1PCTEN \| CNTHCTL_EL1PCEN;
41		− write_sysreg(val, cnthctl_el2);
	39	+ /*
	40	+ * We don't need to do this for VHE since the host kernel runs in EL2
	41	+ * with HCR_EL2.TGE ==1, which makes those bits have no impact.
	42	+ */
	43	+ if (!has_vhe()) {
	44	+ /* Allow physical timer/counter access for the host */
	45	+ val = read_sysreg(cnthctl_el2);
	46	+ val \|= CNTHCTL_EL1PCTEN \| CNTHCTL_EL1PCEN;
	47	+ write_sysreg(val, cnthctl_el2);
	48	+ }
42	49
43	50	/* Clear cntvoff for the host */
44	51	write_sysreg(0, cntvoff_el2);
@@ -46,23 +53,26 @@ void __hyp_text __timer_save_state(struct kvm_vcpu *vcpu) · 1 unmodified line
46	53
47	54	void __hyp_text __timer_restore_state(struct kvm_vcpu *vcpu)
48	55	{
49		− struct kvm *kvm = kern_hyp_va(vcpu->kvm);
50	56	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
	57	+ struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
51	58	u64 val;
52	59
53		− /*
54		− * Disallow physical timer access for the guest
55		− * Physical counter access is allowed
56		− */
57		− val = read_sysreg(cnthctl_el2);
58		− val &= ~CNTHCTL_EL1PCEN;
59		− val \|= CNTHCTL_EL1PCTEN;
60		− write_sysreg(val, cnthctl_el2);
	60	+ /* Those bits are already configured at boot on VHE-system */
	61	+ if (!has_vhe()) {
	62	+ /*
	63	+ * Disallow physical timer access for the guest
	64	+ * Physical counter access is allowed
	65	+ */
	66	+ val = read_sysreg(cnthctl_el2);
	67	+ val &= ~CNTHCTL_EL1PCEN;
	68	+ val \|= CNTHCTL_EL1PCTEN;
	69	+ write_sysreg(val, cnthctl_el2);
	70	+ }
61	71
62	72	if (timer->enabled) {
63		− write_sysreg(kvm->arch.timer.cntvoff, cntvoff_el2);
64		− write_sysreg_el0(timer->cntv_cval, cntv_cval);
	73	+ write_sysreg(vtimer->cntvoff, cntvoff_el2);
	74	+ write_sysreg_el0(vtimer->cnt_cval, cntv_cval);
65	75	isb();
66		− write_sysreg_el0(timer->cntv_ctl, cntv_ctl);
	76	+ write_sysreg_el0(vtimer->cnt_ctl, cntv_ctl);
67	77	}
68	78	}

virt/kvm/arm/vgic/vgic-debug.c+283−0

@@ -0,0 +1,283 @@
	1	+/*
	2	+ * Copyright (C) 2016 Linaro
	3	+ * Author: Christoffer Dall <christoffer.dall@linaro.org>
	4	+ *
	5	+ * This program is free software; you can redistribute it and/or modify
	6	+ * it under the terms of the GNU General Public License version 2 as
	7	+ * published by the Free Software Foundation.
	8	+ *
	9	+ * This program is distributed in the hope that it will be useful,
	10	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	+ * GNU General Public License for more details.
	13	+ *
	14	+ * You should have received a copy of the GNU General Public License
	15	+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
	16	+ */
	17	+
	18	+#include <linux/cpu.h>
	19	+#include <linux/debugfs.h>
	20	+#include <linux/interrupt.h>
	21	+#include <linux/kvm_host.h>
	22	+#include <linux/seq_file.h>
	23	+#include <kvm/arm_vgic.h>
	24	+#include <asm/kvm_mmu.h>
	25	+#include "vgic.h"
	26	+
	27	+/*
	28	+ * Structure to control looping through the entire vgic state. We start at
	29	+ * zero for each field and move upwards. So, if dist_id is 0 we print the
	30	+ * distributor info. When dist_id is 1, we have already printed it and move
	31	+ * on.
	32	+ *
	33	+ * When vcpu_id < nr_cpus we print the vcpu info until vcpu_id == nr_cpus and
	34	+ * so on.
	35	+ */
	36	+struct vgic_state_iter {
	37	+ int nr_cpus;
	38	+ int nr_spis;
	39	+ int dist_id;
	40	+ int vcpu_id;
	41	+ int intid;
	42	+};
	43	+
	44	+static void iter_next(struct vgic_state_iter *iter)
	45	+{
	46	+ if (iter->dist_id == 0) {
	47	+ iter->dist_id++;
	48	+ return;
	49	+ }
	50	+
	51	+ iter->intid++;
	52	+ if (iter->intid == VGIC_NR_PRIVATE_IRQS &&
	53	+ ++iter->vcpu_id < iter->nr_cpus)
	54	+ iter->intid = 0;
	55	+}
	56	+
	57	+static void iter_init(struct kvm kvm, struct vgic_state_iter iter,
	58	+ loff_t pos)
	59	+{
	60	+ int nr_cpus = atomic_read(&kvm->online_vcpus);
	61	+
	62	+ memset(iter, 0, sizeof(*iter));
	63	+
	64	+ iter->nr_cpus = nr_cpus;
	65	+ iter->nr_spis = kvm->arch.vgic.nr_spis;
	66	+
	67	+ /* Fast forward to the right position if needed */
	68	+ while (pos--)
	69	+ iter_next(iter);
	70	+}
	71	+
	72	+static bool end_of_vgic(struct vgic_state_iter *iter)
	73	+{
	74	+ return iter->dist_id > 0 &&
	75	+ iter->vcpu_id == iter->nr_cpus &&
	76	+ (iter->intid - VGIC_NR_PRIVATE_IRQS) == iter->nr_spis;
	77	+}
	78	+
	79	+static void vgic_debug_start(struct seq_file s, loff_t *pos)
	80	+{
	81	+ struct kvm kvm = (struct kvm )s->private;
	82	+ struct vgic_state_iter *iter;
	83	+
	84	+ mutex_lock(&kvm->lock);
	85	+ iter = kvm->arch.vgic.iter;
	86	+ if (iter) {
	87	+ iter = ERR_PTR(-EBUSY);
	88	+ goto out;
	89	+ }
	90	+
	91	+ iter = kmalloc(sizeof(*iter), GFP_KERNEL);
	92	+ if (!iter) {
	93	+ iter = ERR_PTR(-ENOMEM);
	94	+ goto out;
	95	+ }
	96	+
	97	+ iter_init(kvm, iter, *pos);
	98	+ kvm->arch.vgic.iter = iter;
	99	+
	100	+ if (end_of_vgic(iter))
	101	+ iter = NULL;
	102	+out:
	103	+ mutex_unlock(&kvm->lock);
	104	+ return iter;
	105	+}
	106	+
	107	+static void vgic_debug_next(struct seq_file s, void v, loff_t pos)
	108	+{
	109	+ struct kvm kvm = (struct kvm )s->private;
	110	+ struct vgic_state_iter *iter = kvm->arch.vgic.iter;
	111	+
	112	+ ++*pos;
	113	+ iter_next(iter);
	114	+ if (end_of_vgic(iter))
	115	+ iter = NULL;
	116	+ return iter;
	117	+}
	118	+
	119	+static void vgic_debug_stop(struct seq_file s, void v)
	120	+{
	121	+ struct kvm kvm = (struct kvm )s->private;
	122	+ struct vgic_state_iter *iter;
	123	+
	124	+ /*
	125	+ * If the seq file wasn't properly opened, there's nothing to clearn
	126	+ * up.
	127	+ */
	128	+ if (IS_ERR(v))
	129	+ return;
	130	+
	131	+ mutex_lock(&kvm->lock);
	132	+ iter = kvm->arch.vgic.iter;
	133	+ kfree(iter);
	134	+ kvm->arch.vgic.iter = NULL;
	135	+ mutex_unlock(&kvm->lock);
	136	+}
	137	+
	138	+static void print_dist_state(struct seq_file s, struct vgic_dist dist)
	139	+{
	140	+ seq_printf(s, "Distributor\n");
	141	+ seq_printf(s, "===========\n");
	142	+ seq_printf(s, "vgic_model:\t%s\n",
	143	+ (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) ?
	144	+ "GICv3" : "GICv2");
	145	+ seq_printf(s, "nr_spis:\t%d\n", dist->nr_spis);
	146	+ seq_printf(s, "enabled:\t%d\n", dist->enabled);
	147	+ seq_printf(s, "\n");
	148	+
	149	+ seq_printf(s, "P=pending_latch, L=line_level, A=active\n");
	150	+ seq_printf(s, "E=enabled, H=hw, C=config (level=1, edge=0)\n");
	151	+}
	152	+
	153	+static void print_header(struct seq_file s, struct vgic_irq irq,
	154	+ struct kvm_vcpu *vcpu)
	155	+{
	156	+ int id = 0;
	157	+ char *hdr = "SPI ";
	158	+
	159	+ if (vcpu) {
	160	+ hdr = "VCPU";
	161	+ id = vcpu->vcpu_id;
	162	+ }
	163	+
	164	+ seq_printf(s, "\n");
	165	+ seq_printf(s, "%s%2d TYP ID TGT_ID PLAEHC HWID TARGET SRC PRI VCPU_ID\n", hdr, id);
	166	+ seq_printf(s, "---------------------------------------------------------------\n");
	167	+}
	168	+
	169	+static void print_irq_state(struct seq_file s, struct vgic_irq irq,
	170	+ struct kvm_vcpu *vcpu)
	171	+{
	172	+ char *type;
	173	+ if (irq->intid < VGIC_NR_SGIS)
	174	+ type = "SGI";
	175	+ else if (irq->intid < VGIC_NR_PRIVATE_IRQS)
	176	+ type = "PPI";
	177	+ else
	178	+ type = "SPI";
	179	+
	180	+ if (irq->intid ==0 \|\| irq->intid == VGIC_NR_PRIVATE_IRQS)
	181	+ print_header(s, irq, vcpu);
	182	+
	183	+ seq_printf(s, " %s %4d "
	184	+ " %2d "
	185	+ "%d%d%d%d%d%d "
	186	+ "%8d "
	187	+ "%8x "
	188	+ " %2x "
	189	+ "%3d "
	190	+ " %2d "
	191	+ "\n",
	192	+ type, irq->intid,
	193	+ (irq->target_vcpu) ? irq->target_vcpu->vcpu_id : -1,
	194	+ irq->pending_latch,
	195	+ irq->line_level,
	196	+ irq->active,
	197	+ irq->enabled,
	198	+ irq->hw,
	199	+ irq->config == VGIC_CONFIG_LEVEL,
	200	+ irq->hwintid,
	201	+ irq->mpidr,
	202	+ irq->source,
	203	+ irq->priority,
	204	+ (irq->vcpu) ? irq->vcpu->vcpu_id : -1);
	205	+
	206	+}
	207	+
	208	+static int vgic_debug_show(struct seq_file s, void v)
	209	+{
	210	+ struct kvm kvm = (struct kvm )s->private;
	211	+ struct vgic_state_iter iter = (struct vgic_state_iter )v;
	212	+ struct vgic_irq *irq;
	213	+ struct kvm_vcpu *vcpu = NULL;
	214	+
	215	+ if (iter->dist_id == 0) {
	216	+ print_dist_state(s, &kvm->arch.vgic);
	217	+ return 0;
	218	+ }
	219	+
	220	+ if (!kvm->arch.vgic.initialized)
	221	+ return 0;
	222	+
	223	+ if (iter->vcpu_id < iter->nr_cpus) {
	224	+ vcpu = kvm_get_vcpu(kvm, iter->vcpu_id);
	225	+ irq = &vcpu->arch.vgic_cpu.private_irqs[iter->intid];
	226	+ } else {
	227	+ irq = &kvm->arch.vgic.spis[iter->intid - VGIC_NR_PRIVATE_IRQS];
	228	+ }
	229	+
	230	+ spin_lock(&irq->irq_lock);
	231	+ print_irq_state(s, irq, vcpu);
	232	+ spin_unlock(&irq->irq_lock);
	233	+
	234	+ return 0;
	235	+}
	236	+
	237	+static struct seq_operations vgic_debug_seq_ops = {
	238	+ .start = vgic_debug_start,
	239	+ .next = vgic_debug_next,
	240	+ .stop = vgic_debug_stop,
	241	+ .show = vgic_debug_show
	242	+};
	243	+
	244	+static int debug_open(struct inode inode, struct file file)
	245	+{
	246	+ int ret;
	247	+ ret = seq_open(file, &vgic_debug_seq_ops);
	248	+ if (!ret) {
	249	+ struct seq_file *seq;
	250	+ /* seq_open will have modified file->private_data */
	251	+ seq = file->private_data;
	252	+ seq->private = inode->i_private;
	253	+ }
	254	+
	255	+ return ret;
	256	+};
	257	+
	258	+static struct file_operations vgic_debug_fops = {
	259	+ .owner = THIS_MODULE,
	260	+ .open = debug_open,
	261	+ .read = seq_read,
	262	+ .llseek = seq_lseek,
	263	+ .release = seq_release
	264	+};
	265	+
	266	+int vgic_debug_init(struct kvm *kvm)
	267	+{
	268	+ if (!kvm->debugfs_dentry)
	269	+ return -ENOENT;
	270	+
	271	+ if (!debugfs_create_file("vgic-state", 0444,
	272	+ kvm->debugfs_dentry,
	273	+ kvm,
	274	+ &vgic_debug_fops))
	275	+ return -ENOMEM;
	276	+
	277	+ return 0;
	278	+}
	279	+
	280	+int vgic_debug_destroy(struct kvm *kvm)
	281	+{
	282	+ return 0;
	283	+}

virt/kvm/arm/vgic/vgic-init.c+17−5

@@ -259,6 +259,8 @@ int vgic_init(struct kvm *kvm) · 258 unmodified lines
259	259	if (ret)
260	260	goto out;
261	261
	262	+ vgic_debug_init(kvm);
	263	+
262	264	dist->initialized = true;
263	265	out:
264	266	return ret;
@@ -268,15 +270,11 @@ static void kvm_vgic_dist_destroy(struct kvm *kvm) · 3 unmodified lines
268	270	{
269	271	struct vgic_dist *dist = &kvm->arch.vgic;
270	272
271		− mutex_lock(&kvm->lock);
272		−
273	273	dist->ready = false;
274	274	dist->initialized = false;
275	275
276	276	kfree(dist->spis);
277	277	dist->nr_spis = 0;
278		−
279		− mutex_unlock(&kvm->lock);
280	278	}
281	279
282	280	void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)
@@ -286,17 +284,27 @@ void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu) · 3 unmodified lines
286	284	INIT_LIST_HEAD(&vgic_cpu->ap_list_head);
287	285	}
288	286
289		−void kvm_vgic_destroy(struct kvm *kvm)
	287	+/* To be called with kvm->lock held */
	288	+static void __kvm_vgic_destroy(struct kvm *kvm)
290	289	{
291	290	struct kvm_vcpu *vcpu;
292	291	int i;
293	292
	293	+ vgic_debug_destroy(kvm);
	294	+
294	295	kvm_vgic_dist_destroy(kvm);
295	296
296	297	kvm_for_each_vcpu(i, vcpu, kvm)
297	298	kvm_vgic_vcpu_destroy(vcpu);
298	299	}
299	300
	301	+void kvm_vgic_destroy(struct kvm *kvm)
	302	+{
	303	+ mutex_lock(&kvm->lock);
	304	+ __kvm_vgic_destroy(kvm);
	305	+ mutex_unlock(&kvm->lock);
	306	+}
	307	+
300	308	/**
301	309	* vgic_lazy_init: Lazy init is only allowed if the GIC exposed to the guest
302	310	* is a GICv2. A GICv3 must be explicitly initialized by the guest using the
@@ -348,6 +356,10 @@ int kvm_vgic_map_resources(struct kvm *kvm) · 45 unmodified lines
348	356	ret = vgic_v2_map_resources(kvm);
349	357	else
350	358	ret = vgic_v3_map_resources(kvm);
	359	+
	360	+ if (ret)
	361	+ __kvm_vgic_destroy(kvm);
	362	+
351	363	out:
352	364	mutex_unlock(&kvm->lock);
353	365	return ret;

virt/kvm/arm/vgic/vgic-irqfd.c+3−0

@@ -99,6 +99,9 @@ int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e, · 98 unmodified lines
99	99	if (!vgic_has_its(kvm))
100	100	return -ENODEV;
101	101
	102	+ if (!level)
	103	+ return -1;
	104	+
102	105	return vgic_its_inject_msi(kvm, &msi);
103	106	}
104	107

virt/kvm/arm/vgic/vgic-its.c+3−3

@@ -350,7 +350,7 @@ static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu) · 349 unmodified lines
350	350
351	351	irq = vgic_get_irq(vcpu->kvm, NULL, intids[i]);
352	352	spin_lock(&irq->irq_lock);
353		− irq->pending = pendmask & (1U << bit_nr);
	353	+ irq->pending_latch = pendmask & (1U << bit_nr);
354	354	vgic_queue_irq_unlock(vcpu->kvm, irq);
355	355	vgic_put_irq(vcpu->kvm, irq);
356	356	}
@@ -465,7 +465,7 @@ static int vgic_its_trigger_msi(struct kvm kvm, struct vgic_its its, · 108 unmodified lines
465	465	return -EBUSY;
466	466
467	467	spin_lock(&itte->irq->irq_lock);
468		− itte->irq->pending = true;
	468	+ itte->irq->pending_latch = true;
469	469	vgic_queue_irq_unlock(kvm, itte->irq);
470	470
471	471	return 0;
@@ -913,7 +913,7 @@ static int vgic_its_cmd_handle_clear(struct kvm kvm, struct vgic_its its, · 441 unmodified lines
913	913	if (!itte)
914	914	return E_ITS_CLEAR_UNMAPPED_INTERRUPT;
915	915
916		− itte->irq->pending = false;
	916	+ itte->irq->pending_latch = false;
917	917
918	918	return 0;
919	919	}

virt/kvm/arm/vgic/vgic-kvm-device.c+216−15

@@ -17,6 +17,7 @@ · 16 unmodified lines
17	17	#include <kvm/arm_vgic.h>
18	18	#include <linux/uaccess.h>
19	19	#include <asm/kvm_mmu.h>
	20	+#include <asm/cputype.h>
20	21	#include "vgic.h"
21	22
22	23	/* common helpers */
@@ -230,14 +231,8 @@ int kvm_register_vgic_device(unsigned long type) · 207 unmodified lines
230	231	return ret;
231	232	}
232	233
233		−struct vgic_reg_attr {
234		− struct kvm_vcpu *vcpu;
235		− gpa_t addr;
236		−};
237		−
238		−static int parse_vgic_v2_attr(struct kvm_device *dev,
239		− struct kvm_device_attr *attr,
240		− struct vgic_reg_attr *reg_attr)
	234	+int vgic_v2_parse_attr(struct kvm_device dev, struct kvm_device_attr attr,
	235	+ struct vgic_reg_attr *reg_attr)
241	236	{
242	237	int cpuid;
243	238
@@ -292,14 +287,14 @@ static bool lock_all_vcpus(struct kvm *kvm) · 48 unmodified lines
292	287	}
293	288
294	289	/**
295		− * vgic_attr_regs_access_v2 - allows user space to access VGIC v2 state
	290	+ * vgic_v2_attr_regs_access - allows user space to access VGIC v2 state
296	291	*
297	292	* @dev: kvm device handle
298	293	* @attr: kvm device attribute
299	294	* @reg: address the value is read or written
300	295	* @is_write: true if userspace is writing a register
301	296	*/
302		−static int vgic_attr_regs_access_v2(struct kvm_device *dev,
	297	+static int vgic_v2_attr_regs_access(struct kvm_device *dev,
303	298	struct kvm_device_attr *attr,
304	299	u32 *reg, bool is_write)
305	300	{
@@ -308,7 +303,7 @@ static int vgic_attr_regs_access_v2(struct kvm_device *dev, · 2 unmodified lines
308	303	struct kvm_vcpu *vcpu;
309	304	int ret;
310	305
311		− ret = parse_vgic_v2_attr(dev, attr, &reg_attr);
	306	+ ret = vgic_v2_parse_attr(dev, attr, &reg_attr);
312	307	if (ret)
313	308	return ret;
314	309
@@ -362,7 +357,7 @@ static int vgic_v2_set_attr(struct kvm_device *dev, · 47 unmodified lines
362	357	if (get_user(reg, uaddr))
363	358	return -EFAULT;
364	359
365		− return vgic_attr_regs_access_v2(dev, attr, &reg, true);
	360	+ return vgic_v2_attr_regs_access(dev, attr, &reg, true);
366	361	}
367	362	}
368	363
@@ -384,7 +379,7 @@ static int vgic_v2_get_attr(struct kvm_device *dev, · 15 unmodified lines
384	379	u32 __user uaddr = (u32 __user )(long)attr->addr;
385	380	u32 reg = 0;
386	381
387		− ret = vgic_attr_regs_access_v2(dev, attr, &reg, false);
	382	+ ret = vgic_v2_attr_regs_access(dev, attr, &reg, false);
388	383	if (ret)
389	384	return ret;
390	385	return put_user(reg, uaddr);
@@ -428,16 +423,211 @@ struct kvm_device_ops kvm_arm_vgic_v2_ops = { · 37 unmodified lines
428	423	.has_attr = vgic_v2_has_attr,
429	424	};
430	425
	426	+int vgic_v3_parse_attr(struct kvm_device dev, struct kvm_device_attr attr,
	427	+ struct vgic_reg_attr *reg_attr)
	428	+{
	429	+ unsigned long vgic_mpidr, mpidr_reg;
	430	+
	431	+ /*
	432	+ * For KVM_DEV_ARM_VGIC_GRP_DIST_REGS group,
	433	+ * attr might not hold MPIDR. Hence assume vcpu0.
	434	+ */
	435	+ if (attr->group != KVM_DEV_ARM_VGIC_GRP_DIST_REGS) {
	436	+ vgic_mpidr = (attr->attr & KVM_DEV_ARM_VGIC_V3_MPIDR_MASK) >>
	437	+ KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT;
	438	+
	439	+ mpidr_reg = VGIC_TO_MPIDR(vgic_mpidr);
	440	+ reg_attr->vcpu = kvm_mpidr_to_vcpu(dev->kvm, mpidr_reg);
	441	+ } else {
	442	+ reg_attr->vcpu = kvm_get_vcpu(dev->kvm, 0);
	443	+ }
	444	+
	445	+ if (!reg_attr->vcpu)
	446	+ return -EINVAL;
	447	+
	448	+ reg_attr->addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK;
	449	+
	450	+ return 0;
	451	+}
	452	+
	453	+/*
	454	+ * vgic_v3_attr_regs_access - allows user space to access VGIC v3 state
	455	+ *
	456	+ * @dev: kvm device handle
	457	+ * @attr: kvm device attribute
	458	+ * @reg: address the value is read or written
	459	+ * @is_write: true if userspace is writing a register
	460	+ */
	461	+static int vgic_v3_attr_regs_access(struct kvm_device *dev,
	462	+ struct kvm_device_attr *attr,
	463	+ u64 *reg, bool is_write)
	464	+{
	465	+ struct vgic_reg_attr reg_attr;
	466	+ gpa_t addr;
	467	+ struct kvm_vcpu *vcpu;
	468	+ int ret;
	469	+ u32 tmp32;
	470	+
	471	+ ret = vgic_v3_parse_attr(dev, attr, &reg_attr);
	472	+ if (ret)
	473	+ return ret;
	474	+
	475	+ vcpu = reg_attr.vcpu;
	476	+ addr = reg_attr.addr;
	477	+
	478	+ mutex_lock(&dev->kvm->lock);
	479	+
	480	+ if (unlikely(!vgic_initialized(dev->kvm))) {
	481	+ ret = -EBUSY;
	482	+ goto out;
	483	+ }
	484	+
	485	+ if (!lock_all_vcpus(dev->kvm)) {
	486	+ ret = -EBUSY;
	487	+ goto out;
	488	+ }
	489	+
	490	+ switch (attr->group) {
	491	+ case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
	492	+ if (is_write)
	493	+ tmp32 = *reg;
	494	+
	495	+ ret = vgic_v3_dist_uaccess(vcpu, is_write, addr, &tmp32);
	496	+ if (!is_write)
	497	+ *reg = tmp32;
	498	+ break;
	499	+ case KVM_DEV_ARM_VGIC_GRP_REDIST_REGS:
	500	+ if (is_write)
	501	+ tmp32 = *reg;
	502	+
	503	+ ret = vgic_v3_redist_uaccess(vcpu, is_write, addr, &tmp32);
	504	+ if (!is_write)
	505	+ *reg = tmp32;
	506	+ break;
	507	+ case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS: {
	508	+ u64 regid;
	509	+
	510	+ regid = (attr->attr & KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK);
	511	+ ret = vgic_v3_cpu_sysregs_uaccess(vcpu, is_write,
	512	+ regid, reg);
	513	+ break;
	514	+ }
	515	+ case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO: {
	516	+ unsigned int info, intid;
	517	+
	518	+ info = (attr->attr & KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK) >>
	519	+ KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT;
	520	+ if (info == VGIC_LEVEL_INFO_LINE_LEVEL) {
	521	+ intid = attr->attr &
	522	+ KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK;
	523	+ ret = vgic_v3_line_level_info_uaccess(vcpu, is_write,
	524	+ intid, reg);
	525	+ } else {
	526	+ ret = -EINVAL;
	527	+ }
	528	+ break;
	529	+ }
	530	+ default:
	531	+ ret = -EINVAL;
	532	+ break;
	533	+ }
	534	+
	535	+ unlock_all_vcpus(dev->kvm);
	536	+out:
	537	+ mutex_unlock(&dev->kvm->lock);
	538	+ return ret;
	539	+}
	540	+
431	541	static int vgic_v3_set_attr(struct kvm_device *dev,
432	542	struct kvm_device_attr *attr)
433	543	{
434		− return vgic_set_common_attr(dev, attr);
	544	+ int ret;
	545	+
	546	+ ret = vgic_set_common_attr(dev, attr);
	547	+ if (ret != -ENXIO)
	548	+ return ret;
	549	+
	550	+ switch (attr->group) {
	551	+ case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
	552	+ case KVM_DEV_ARM_VGIC_GRP_REDIST_REGS: {
	553	+ u32 __user uaddr = (u32 __user )(long)attr->addr;
	554	+ u32 tmp32;
	555	+ u64 reg;
	556	+
	557	+ if (get_user(tmp32, uaddr))
	558	+ return -EFAULT;
	559	+
	560	+ reg = tmp32;
	561	+ return vgic_v3_attr_regs_access(dev, attr, &reg, true);
	562	+ }
	563	+ case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS: {
	564	+ u64 __user uaddr = (u64 __user )(long)attr->addr;
	565	+ u64 reg;
	566	+
	567	+ if (get_user(reg, uaddr))
	568	+ return -EFAULT;
	569	+
	570	+ return vgic_v3_attr_regs_access(dev, attr, &reg, true);
	571	+ }
	572	+ case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO: {
	573	+ u32 __user uaddr = (u32 __user )(long)attr->addr;
	574	+ u64 reg;
	575	+ u32 tmp32;
	576	+
	577	+ if (get_user(tmp32, uaddr))
	578	+ return -EFAULT;
	579	+
	580	+ reg = tmp32;
	581	+ return vgic_v3_attr_regs_access(dev, attr, &reg, true);
	582	+ }
	583	+ }
	584	+ return -ENXIO;
435	585	}
436	586
437	587	static int vgic_v3_get_attr(struct kvm_device *dev,
438	588	struct kvm_device_attr *attr)
439	589	{
440		− return vgic_get_common_attr(dev, attr);
	590	+ int ret;
	591	+
	592	+ ret = vgic_get_common_attr(dev, attr);
	593	+ if (ret != -ENXIO)
	594	+ return ret;
	595	+
	596	+ switch (attr->group) {
	597	+ case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
	598	+ case KVM_DEV_ARM_VGIC_GRP_REDIST_REGS: {
	599	+ u32 __user uaddr = (u32 __user )(long)attr->addr;
	600	+ u64 reg;
	601	+ u32 tmp32;
	602	+
	603	+ ret = vgic_v3_attr_regs_access(dev, attr, &reg, false);
	604	+ if (ret)
	605	+ return ret;
	606	+ tmp32 = reg;
	607	+ return put_user(tmp32, uaddr);
	608	+ }
	609	+ case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS: {
	610	+ u64 __user uaddr = (u64 __user )(long)attr->addr;
	611	+ u64 reg;
	612	+
	613	+ ret = vgic_v3_attr_regs_access(dev, attr, &reg, false);
	614	+ if (ret)
	615	+ return ret;
	616	+ return put_user(reg, uaddr);
	617	+ }
	618	+ case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO: {
	619	+ u32 __user uaddr = (u32 __user )(long)attr->addr;
	620	+ u64 reg;
	621	+ u32 tmp32;
	622	+
	623	+ ret = vgic_v3_attr_regs_access(dev, attr, &reg, false);
	624	+ if (ret)
	625	+ return ret;
	626	+ tmp32 = reg;
	627	+ return put_user(tmp32, uaddr);
	628	+ }
	629	+ }
	630	+ return -ENXIO;
441	631	}
442	632
443	633	static int vgic_v3_has_attr(struct kvm_device *dev,
@@ -451,8 +641,19 @@ static int vgic_v3_has_attr(struct kvm_device *dev, · 7 unmodified lines
451	641	return 0;
452	642	}
453	643	break;
	644	+ case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
	645	+ case KVM_DEV_ARM_VGIC_GRP_REDIST_REGS:
	646	+ case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS:
	647	+ return vgic_v3_has_attr_regs(dev, attr);
454	648	case KVM_DEV_ARM_VGIC_GRP_NR_IRQS:
455	649	return 0;
	650	+ case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO: {
	651	+ if (((attr->attr & KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK) >>
	652	+ KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT) ==
	653	+ VGIC_LEVEL_INFO_LINE_LEVEL)
	654	+ return 0;
	655	+ break;
	656	+ }
456	657	case KVM_DEV_ARM_VGIC_GRP_CTRL:
457	658	switch (attr->attr) {
458	659	case KVM_DEV_ARM_VGIC_CTRL_INIT:

virt/kvm/arm/vgic/vgic-mmio-v2.c+24−63

@@ -98,7 +98,7 @@ static void vgic_mmio_write_sgir(struct kvm_vcpu *source_vcpu, · 97 unmodified lines
98	98	irq = vgic_get_irq(source_vcpu->kvm, vcpu, intid);
99	99
100	100	spin_lock(&irq->irq_lock);
101		− irq->pending = true;
	101	+ irq->pending_latch = true;
102	102	irq->source \|= 1U << source_vcpu->vcpu_id;
103	103
104	104	vgic_queue_irq_unlock(source_vcpu->kvm, irq);
@@ -182,7 +182,7 @@ static void vgic_mmio_write_sgipendc(struct kvm_vcpu *vcpu, · 77 unmodified lines
182	182
183	183	irq->source &= ~((val >> (i * 8)) & 0xff);
184	184	if (!irq->source)
185		− irq->pending = false;
	185	+ irq->pending_latch = false;
186	186
187	187	spin_unlock(&irq->irq_lock);
188	188	vgic_put_irq(vcpu->kvm, irq);
@@ -204,7 +204,7 @@ static void vgic_mmio_write_sgipends(struct kvm_vcpu *vcpu, · 15 unmodified lines
204	204	irq->source \|= (val >> (i * 8)) & 0xff;
205	205
206	206	if (irq->source) {
207		− irq->pending = true;
	207	+ irq->pending_latch = true;
208	208	vgic_queue_irq_unlock(vcpu->kvm, irq);
209	209	} else {
210	210	spin_unlock(&irq->irq_lock);
@@ -213,22 +213,6 @@ static void vgic_mmio_write_sgipends(struct kvm_vcpu *vcpu, · 2 unmodified lines
213	213	}
214	214	}
215	215
216		−static void vgic_set_vmcr(struct kvm_vcpu vcpu, struct vgic_vmcr vmcr)
217		−{
218		− if (kvm_vgic_global_state.type == VGIC_V2)
219		− vgic_v2_set_vmcr(vcpu, vmcr);
220		− else
221		− vgic_v3_set_vmcr(vcpu, vmcr);
222		−}
223		−
224		−static void vgic_get_vmcr(struct kvm_vcpu vcpu, struct vgic_vmcr vmcr)
225		−{
226		− if (kvm_vgic_global_state.type == VGIC_V2)
227		− vgic_v2_get_vmcr(vcpu, vmcr);
228		− else
229		− vgic_v3_get_vmcr(vcpu, vmcr);
230		−}
231		−
232	216	#define GICC_ARCH_VERSION_V2 0x2
233	217
234	218	/* These are for userland accesses only, there is no guest-facing emulation. */
@@ -369,21 +353,30 @@ unsigned int vgic_v2_init_dist_iodev(struct vgic_io_device *dev) · 134 unmodified lines
369	353
370	354	int vgic_v2_has_attr_regs(struct kvm_device dev, struct kvm_device_attr attr)
371	355	{
372		− int nr_irqs = dev->kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS;
373		− const struct vgic_register_region *regions;
	356	+ const struct vgic_register_region *region;
	357	+ struct vgic_io_device iodev;
	358	+ struct vgic_reg_attr reg_attr;
	359	+ struct kvm_vcpu *vcpu;
374	360	gpa_t addr;
375		− int nr_regions, i, len;
	361	+ int ret;
	362	+
	363	+ ret = vgic_v2_parse_attr(dev, attr, &reg_attr);
	364	+ if (ret)
	365	+ return ret;
376	366
377		− addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK;
	367	+ vcpu = reg_attr.vcpu;
	368	+ addr = reg_attr.addr;
378	369
379	370	switch (attr->group) {
380	371	case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
381		− regions = vgic_v2_dist_registers;
382		− nr_regions = ARRAY_SIZE(vgic_v2_dist_registers);
	372	+ iodev.regions = vgic_v2_dist_registers;
	373	+ iodev.nr_regions = ARRAY_SIZE(vgic_v2_dist_registers);
	374	+ iodev.base_addr = 0;
383	375	break;
384	376	case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
385		− regions = vgic_v2_cpu_registers;
386		− nr_regions = ARRAY_SIZE(vgic_v2_cpu_registers);
	377	+ iodev.regions = vgic_v2_cpu_registers;
	378	+ iodev.nr_regions = ARRAY_SIZE(vgic_v2_cpu_registers);
	379	+ iodev.base_addr = 0;
387	380	break;
388	381	default:
389	382	return -ENXIO;
@@ -393,43 +386,11 @@ int vgic_v2_has_attr_regs(struct kvm_device dev, struct kvm_device_attr attr) · 3 unmodified lines
393	386	if (addr & 3)
394	387	return -ENXIO;
395	388
396		− for (i = 0; i < nr_regions; i++) {
397		− if (regions[i].bits_per_irq)
398		− len = (regions[i].bits_per_irq * nr_irqs) / 8;
399		− else
400		− len = regions[i].len;
401		−
402		− if (regions[i].reg_offset <= addr &&
403		− regions[i].reg_offset + len > addr)
404		− return 0;
405		− }
406		−
407		− return -ENXIO;
408		−}
409		−
410		−/*
411		− * When userland tries to access the VGIC register handlers, we need to
412		− * create a usable struct vgic_io_device to be passed to the handlers and we
413		− * have to set up a buffer similar to what would have happened if a guest MMIO
414		− * access occurred, including doing endian conversions on BE systems.
415		− */
416		−static int vgic_uaccess(struct kvm_vcpu vcpu, struct vgic_io_device dev,
417		− bool is_write, int offset, u32 *val)
418		−{
419		− unsigned int len = 4;
420		− u8 buf[4];
421		− int ret;
422		−
423		− if (is_write) {
424		− vgic_data_host_to_mmio_bus(buf, len, *val);
425		− ret = kvm_io_gic_ops.write(vcpu, &dev->dev, offset, len, buf);
426		− } else {
427		− ret = kvm_io_gic_ops.read(vcpu, &dev->dev, offset, len, buf);
428		− if (!ret)
429		− *val = vgic_data_mmio_bus_to_host(buf, len);
430		− }
	389	+ region = vgic_get_mmio_region(vcpu, &iodev, addr, sizeof(u32));
	390	+ if (!region)
	391	+ return -ENXIO;
431	392
432		− return ret;
	393	+ return 0;
433	394	}
434	395
435	396	int vgic_v2_cpuif_uaccess(struct kvm_vcpu *vcpu, bool is_write,

virt/kvm/arm/vgic/vgic-mmio-v3.c+184−19

@@ -18,6 +18,8 @@ · 17 unmodified lines
18	18	#include <kvm/arm_vgic.h>
19	19
20	20	#include <asm/kvm_emulate.h>
	21	+#include <asm/kvm_arm.h>
	22	+#include <asm/kvm_mmu.h>
21	23
22	24	#include "vgic.h"
23	25	#include "vgic-mmio.h"
@@ -207,6 +209,60 @@ static unsigned long vgic_mmio_read_v3_idregs(struct kvm_vcpu *vcpu, · 183 unmodified lines
207	209	return 0;
208	210	}
209	211
	212	+static unsigned long vgic_v3_uaccess_read_pending(struct kvm_vcpu *vcpu,
	213	+ gpa_t addr, unsigned int len)
	214	+{
	215	+ u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
	216	+ u32 value = 0;
	217	+ int i;
	218	+
	219	+ /*
	220	+ * pending state of interrupt is latched in pending_latch variable.
	221	+ * Userspace will save and restore pending state and line_level
	222	+ * separately.
	223	+ * Refer to Documentation/virtual/kvm/devices/arm-vgic-v3.txt
	224	+ * for handling of ISPENDR and ICPENDR.
	225	+ */
	226	+ for (i = 0; i < len * 8; i++) {
	227	+ struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
	228	+
	229	+ if (irq->pending_latch)
	230	+ value \|= (1U << i);
	231	+
	232	+ vgic_put_irq(vcpu->kvm, irq);
	233	+ }
	234	+
	235	+ return value;
	236	+}
	237	+
	238	+static void vgic_v3_uaccess_write_pending(struct kvm_vcpu *vcpu,
	239	+ gpa_t addr, unsigned int len,
	240	+ unsigned long val)
	241	+{
	242	+ u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
	243	+ int i;
	244	+
	245	+ for (i = 0; i < len * 8; i++) {
	246	+ struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
	247	+
	248	+ spin_lock(&irq->irq_lock);
	249	+ if (test_bit(i, &val)) {
	250	+ /*
	251	+ * pending_latch is set irrespective of irq type
	252	+ * (level or edge) to avoid dependency that VM should
	253	+ * restore irq config before pending info.
	254	+ */
	255	+ irq->pending_latch = true;
	256	+ vgic_queue_irq_unlock(vcpu->kvm, irq);
	257	+ } else {
	258	+ irq->pending_latch = false;
	259	+ spin_unlock(&irq->irq_lock);
	260	+ }
	261	+
	262	+ vgic_put_irq(vcpu->kvm, irq);
	263	+ }
	264	+}
	265	+
210	266	/* We want to avoid outer shareable. */
211	267	u64 vgic_sanitise_shareability(u64 field)
212	268	{
@@ -356,7 +412,7 @@ static void vgic_mmio_write_pendbase(struct kvm_vcpu *vcpu, · 143 unmodified lines
356	412	* We take some special care here to fix the calculation of the register
357	413	* offset.
358	414	*/
359		−#define REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(off, rd, wr, bpi, acc) \
	415	+#define REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(off, rd, wr, ur, uw, bpi, acc) \
360	416	{ \
361	417	.reg_offset = off, \
362	418	.bits_per_irq = bpi, \
@@ -371,47 +427,54 @@ static void vgic_mmio_write_pendbase(struct kvm_vcpu *vcpu, · 8 unmodified lines
371	427	.access_flags = acc, \
372	428	.read = rd, \
373	429	.write = wr, \
	430	+ .uaccess_read = ur, \
	431	+ .uaccess_write = uw, \
374	432	}
375	433
376	434	static const struct vgic_register_region vgic_v3_dist_registers[] = {
377	435	REGISTER_DESC_WITH_LENGTH(GICD_CTLR,
378	436	vgic_mmio_read_v3_misc, vgic_mmio_write_v3_misc, 16,
379	437	VGIC_ACCESS_32bit),
	438	+ REGISTER_DESC_WITH_LENGTH(GICD_STATUSR,
	439	+ vgic_mmio_read_rao, vgic_mmio_write_wi, 4,
	440	+ VGIC_ACCESS_32bit),
380	441	REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_IGROUPR,
381		− vgic_mmio_read_rao, vgic_mmio_write_wi, 1,
	442	+ vgic_mmio_read_rao, vgic_mmio_write_wi, NULL, NULL, 1,
382	443	VGIC_ACCESS_32bit),
383	444	REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ISENABLER,
384		− vgic_mmio_read_enable, vgic_mmio_write_senable, 1,
	445	+ vgic_mmio_read_enable, vgic_mmio_write_senable, NULL, NULL, 1,
385	446	VGIC_ACCESS_32bit),
386	447	REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ICENABLER,
387		− vgic_mmio_read_enable, vgic_mmio_write_cenable, 1,
	448	+ vgic_mmio_read_enable, vgic_mmio_write_cenable, NULL, NULL, 1,
388	449	VGIC_ACCESS_32bit),
389	450	REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ISPENDR,
390		− vgic_mmio_read_pending, vgic_mmio_write_spending, 1,
	451	+ vgic_mmio_read_pending, vgic_mmio_write_spending,
	452	+ vgic_v3_uaccess_read_pending, vgic_v3_uaccess_write_pending, 1,
391	453	VGIC_ACCESS_32bit),
392	454	REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ICPENDR,
393		− vgic_mmio_read_pending, vgic_mmio_write_cpending, 1,
	455	+ vgic_mmio_read_pending, vgic_mmio_write_cpending,
	456	+ vgic_mmio_read_raz, vgic_mmio_write_wi, 1,
394	457	VGIC_ACCESS_32bit),
395	458	REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ISACTIVER,
396		− vgic_mmio_read_active, vgic_mmio_write_sactive, 1,
	459	+ vgic_mmio_read_active, vgic_mmio_write_sactive, NULL, NULL, 1,
397	460	VGIC_ACCESS_32bit),
398	461	REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ICACTIVER,
399		− vgic_mmio_read_active, vgic_mmio_write_cactive, 1,
	462	+ vgic_mmio_read_active, vgic_mmio_write_cactive, NULL, NULL, 1,
400	463	VGIC_ACCESS_32bit),
401	464	REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_IPRIORITYR,
402		− vgic_mmio_read_priority, vgic_mmio_write_priority, 8,
403		− VGIC_ACCESS_32bit \| VGIC_ACCESS_8bit),
	465	+ vgic_mmio_read_priority, vgic_mmio_write_priority, NULL, NULL,
	466	+ 8, VGIC_ACCESS_32bit \| VGIC_ACCESS_8bit),
404	467	REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ITARGETSR,
405		− vgic_mmio_read_raz, vgic_mmio_write_wi, 8,
	468	+ vgic_mmio_read_raz, vgic_mmio_write_wi, NULL, NULL, 8,
406	469	VGIC_ACCESS_32bit \| VGIC_ACCESS_8bit),
407	470	REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ICFGR,
408		− vgic_mmio_read_config, vgic_mmio_write_config, 2,
	471	+ vgic_mmio_read_config, vgic_mmio_write_config, NULL, NULL, 2,
409	472	VGIC_ACCESS_32bit),
410	473	REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_IGRPMODR,
411		− vgic_mmio_read_raz, vgic_mmio_write_wi, 1,
	474	+ vgic_mmio_read_raz, vgic_mmio_write_wi, NULL, NULL, 1,
412	475	VGIC_ACCESS_32bit),
413	476	REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_IROUTER,
414		− vgic_mmio_read_irouter, vgic_mmio_write_irouter, 64,
	477	+ vgic_mmio_read_irouter, vgic_mmio_write_irouter, NULL, NULL, 64,
415	478	VGIC_ACCESS_64bit \| VGIC_ACCESS_32bit),
416	479	REGISTER_DESC_WITH_LENGTH(GICD_IDREGS,
417	480	vgic_mmio_read_v3_idregs, vgic_mmio_write_wi, 48,
@@ -422,12 +485,18 @@ static const struct vgic_register_region vgic_v3_rdbase_registers[] = { · 4 unmodified lines
422	485	REGISTER_DESC_WITH_LENGTH(GICR_CTLR,
423	486	vgic_mmio_read_v3r_ctlr, vgic_mmio_write_v3r_ctlr, 4,
424	487	VGIC_ACCESS_32bit),
	488	+ REGISTER_DESC_WITH_LENGTH(GICR_STATUSR,
	489	+ vgic_mmio_read_raz, vgic_mmio_write_wi, 4,
	490	+ VGIC_ACCESS_32bit),
425	491	REGISTER_DESC_WITH_LENGTH(GICR_IIDR,
426	492	vgic_mmio_read_v3r_iidr, vgic_mmio_write_wi, 4,
427	493	VGIC_ACCESS_32bit),
428	494	REGISTER_DESC_WITH_LENGTH(GICR_TYPER,
429	495	vgic_mmio_read_v3r_typer, vgic_mmio_write_wi, 8,
430	496	VGIC_ACCESS_64bit \| VGIC_ACCESS_32bit),
	497	+ REGISTER_DESC_WITH_LENGTH(GICR_WAKER,
	498	+ vgic_mmio_read_raz, vgic_mmio_write_wi, 4,
	499	+ VGIC_ACCESS_32bit),
431	500	REGISTER_DESC_WITH_LENGTH(GICR_PROPBASER,
432	501	vgic_mmio_read_propbase, vgic_mmio_write_propbase, 8,
433	502	VGIC_ACCESS_64bit \| VGIC_ACCESS_32bit),
@@ -449,11 +518,13 @@ static const struct vgic_register_region vgic_v3_sgibase_registers[] = { · 15 unmodified lines
449	518	REGISTER_DESC_WITH_LENGTH(GICR_ICENABLER0,
450	519	vgic_mmio_read_enable, vgic_mmio_write_cenable, 4,
451	520	VGIC_ACCESS_32bit),
452		− REGISTER_DESC_WITH_LENGTH(GICR_ISPENDR0,
453		− vgic_mmio_read_pending, vgic_mmio_write_spending, 4,
	521	+ REGISTER_DESC_WITH_LENGTH_UACCESS(GICR_ISPENDR0,
	522	+ vgic_mmio_read_pending, vgic_mmio_write_spending,
	523	+ vgic_v3_uaccess_read_pending, vgic_v3_uaccess_write_pending, 4,
454	524	VGIC_ACCESS_32bit),
455		− REGISTER_DESC_WITH_LENGTH(GICR_ICPENDR0,
456		− vgic_mmio_read_pending, vgic_mmio_write_cpending, 4,
	525	+ REGISTER_DESC_WITH_LENGTH_UACCESS(GICR_ICPENDR0,
	526	+ vgic_mmio_read_pending, vgic_mmio_write_cpending,
	527	+ vgic_mmio_read_raz, vgic_mmio_write_wi, 4,
457	528	VGIC_ACCESS_32bit),
458	529	REGISTER_DESC_WITH_LENGTH(GICR_ISACTIVER0,
459	530	vgic_mmio_read_active, vgic_mmio_write_sactive, 4,
@@ -546,6 +617,54 @@ int vgic_register_redist_iodevs(struct kvm *kvm, gpa_t redist_base_address) · 86 unmodified lines
546	617	return ret;
547	618	}
548	619
	620	+int vgic_v3_has_attr_regs(struct kvm_device dev, struct kvm_device_attr attr)
	621	+{
	622	+ const struct vgic_register_region *region;
	623	+ struct vgic_io_device iodev;
	624	+ struct vgic_reg_attr reg_attr;
	625	+ struct kvm_vcpu *vcpu;
	626	+ gpa_t addr;
	627	+ int ret;
	628	+
	629	+ ret = vgic_v3_parse_attr(dev, attr, &reg_attr);
	630	+ if (ret)
	631	+ return ret;
	632	+
	633	+ vcpu = reg_attr.vcpu;
	634	+ addr = reg_attr.addr;
	635	+
	636	+ switch (attr->group) {
	637	+ case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
	638	+ iodev.regions = vgic_v3_dist_registers;
	639	+ iodev.nr_regions = ARRAY_SIZE(vgic_v3_dist_registers);
	640	+ iodev.base_addr = 0;
	641	+ break;
	642	+ case KVM_DEV_ARM_VGIC_GRP_REDIST_REGS:{
	643	+ iodev.regions = vgic_v3_rdbase_registers;
	644	+ iodev.nr_regions = ARRAY_SIZE(vgic_v3_rdbase_registers);
	645	+ iodev.base_addr = 0;
	646	+ break;
	647	+ }
	648	+ case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS: {
	649	+ u64 reg, id;
	650	+
	651	+ id = (attr->attr & KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK);
	652	+ return vgic_v3_has_cpu_sysregs_attr(vcpu, 0, id, &reg);
	653	+ }
	654	+ default:
	655	+ return -ENXIO;
	656	+ }
	657	+
	658	+ /* We only support aligned 32-bit accesses. */
	659	+ if (addr & 3)
	660	+ return -ENXIO;
	661	+
	662	+ region = vgic_get_mmio_region(vcpu, &iodev, addr, sizeof(u32));
	663	+ if (!region)
	664	+ return -ENXIO;
	665	+
	666	+ return 0;
	667	+}
549	668	/*
550	669	* Compare a given affinity (level 1-3 and a level 0 mask, from the SGI
551	670	* generation register ICC_SGI1R_EL1) with a given VCPU.
@@ -646,9 +765,55 @@ void vgic_v3_dispatch_sgi(struct kvm_vcpu *vcpu, u64 reg) · 94 unmodified lines
646	765	irq = vgic_get_irq(vcpu->kvm, c_vcpu, sgi);
647	766
648	767	spin_lock(&irq->irq_lock);
649		− irq->pending = true;
	768	+ irq->pending_latch = true;
650	769
651	770	vgic_queue_irq_unlock(vcpu->kvm, irq);
652	771	vgic_put_irq(vcpu->kvm, irq);
653	772	}
654	773	}
	774	+
	775	+int vgic_v3_dist_uaccess(struct kvm_vcpu *vcpu, bool is_write,
	776	+ int offset, u32 *val)
	777	+{
	778	+ struct vgic_io_device dev = {
	779	+ .regions = vgic_v3_dist_registers,
	780	+ .nr_regions = ARRAY_SIZE(vgic_v3_dist_registers),
	781	+ };
	782	+
	783	+ return vgic_uaccess(vcpu, &dev, is_write, offset, val);
	784	+}
	785	+
	786	+int vgic_v3_redist_uaccess(struct kvm_vcpu *vcpu, bool is_write,
	787	+ int offset, u32 *val)
	788	+{
	789	+ struct vgic_io_device rd_dev = {
	790	+ .regions = vgic_v3_rdbase_registers,
	791	+ .nr_regions = ARRAY_SIZE(vgic_v3_rdbase_registers),
	792	+ };
	793	+
	794	+ struct vgic_io_device sgi_dev = {
	795	+ .regions = vgic_v3_sgibase_registers,
	796	+ .nr_regions = ARRAY_SIZE(vgic_v3_sgibase_registers),
	797	+ };
	798	+
	799	+ /* SGI_base is the next 64K frame after RD_base */
	800	+ if (offset >= SZ_64K)
	801	+ return vgic_uaccess(vcpu, &sgi_dev, is_write, offset - SZ_64K,
	802	+ val);
	803	+ else
	804	+ return vgic_uaccess(vcpu, &rd_dev, is_write, offset, val);
	805	+}
	806	+
	807	+int vgic_v3_line_level_info_uaccess(struct kvm_vcpu *vcpu, bool is_write,
	808	+ u32 intid, u64 *val)
	809	+{
	810	+ if (intid % 32)
	811	+ return -EINVAL;
	812	+
	813	+ if (is_write)
	814	+ vgic_write_irq_line_level_info(vcpu, intid, *val);
	815	+ else
	816	+ *val = vgic_read_irq_line_level_info(vcpu, intid);
	817	+
	818	+ return 0;
	819	+}

virt/kvm/arm/vgic/vgic-mmio.c+147−20

@@ -111,7 +111,7 @@ unsigned long vgic_mmio_read_pending(struct kvm_vcpu *vcpu, · 110 unmodified lines
111	111	for (i = 0; i < len * 8; i++) {
112	112	struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
113	113
114		− if (irq->pending)
	114	+ if (irq_is_pending(irq))
115	115	value \|= (1U << i);
116	116
117	117	vgic_put_irq(vcpu->kvm, irq);
@@ -131,9 +131,7 @@ void vgic_mmio_write_spending(struct kvm_vcpu *vcpu, · 13 unmodified lines
131	131	struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
132	132
133	133	spin_lock(&irq->irq_lock);
134		− irq->pending = true;
135		− if (irq->config == VGIC_CONFIG_LEVEL)
136		− irq->soft_pending = true;
	134	+ irq->pending_latch = true;
137	135
138	136	vgic_queue_irq_unlock(vcpu->kvm, irq);
139	137	vgic_put_irq(vcpu->kvm, irq);
@@ -152,12 +150,7 @@ void vgic_mmio_write_cpending(struct kvm_vcpu *vcpu, · 12 unmodified lines
152	150
153	151	spin_lock(&irq->irq_lock);
154	152
155		− if (irq->config == VGIC_CONFIG_LEVEL) {
156		− irq->soft_pending = false;
157		− irq->pending = irq->line_level;
158		− } else {
159		− irq->pending = false;
160		− }
	153	+ irq->pending_latch = false;
161	154
162	155	spin_unlock(&irq->irq_lock);
163	156	vgic_put_irq(vcpu->kvm, irq);
@@ -359,18 +352,70 @@ void vgic_mmio_write_config(struct kvm_vcpu *vcpu, · 195 unmodified lines
359	352	irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
360	353	spin_lock(&irq->irq_lock);
361	354
362		− if (test_bit(i * 2 + 1, &val)) {
	355	+ if (test_bit(i * 2 + 1, &val))
363	356	irq->config = VGIC_CONFIG_EDGE;
364		− } else {
	357	+ else
365	358	irq->config = VGIC_CONFIG_LEVEL;
366		− irq->pending = irq->line_level \| irq->soft_pending;
367		− }
368	359
369	360	spin_unlock(&irq->irq_lock);
370	361	vgic_put_irq(vcpu->kvm, irq);
371	362	}
372	363	}
373	364
	365	+u64 vgic_read_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid)
	366	+{
	367	+ int i;
	368	+ u64 val = 0;
	369	+ int nr_irqs = vcpu->kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS;
	370	+
	371	+ for (i = 0; i < 32; i++) {
	372	+ struct vgic_irq *irq;
	373	+
	374	+ if ((intid + i) < VGIC_NR_SGIS \|\| (intid + i) >= nr_irqs)
	375	+ continue;
	376	+
	377	+ irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
	378	+ if (irq->config == VGIC_CONFIG_LEVEL && irq->line_level)
	379	+ val \|= (1U << i);
	380	+
	381	+ vgic_put_irq(vcpu->kvm, irq);
	382	+ }
	383	+
	384	+ return val;
	385	+}
	386	+
	387	+void vgic_write_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid,
	388	+ const u64 val)
	389	+{
	390	+ int i;
	391	+ int nr_irqs = vcpu->kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS;
	392	+
	393	+ for (i = 0; i < 32; i++) {
	394	+ struct vgic_irq *irq;
	395	+ bool new_level;
	396	+
	397	+ if ((intid + i) < VGIC_NR_SGIS \|\| (intid + i) >= nr_irqs)
	398	+ continue;
	399	+
	400	+ irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
	401	+
	402	+ /*
	403	+ * Line level is set irrespective of irq type
	404	+ * (level or edge) to avoid dependency that VM should
	405	+ * restore irq config before line level.
	406	+ */
	407	+ new_level = !!(val & (1U << i));
	408	+ spin_lock(&irq->irq_lock);
	409	+ irq->line_level = new_level;
	410	+ if (new_level)
	411	+ vgic_queue_irq_unlock(vcpu->kvm, irq);
	412	+ else
	413	+ spin_unlock(&irq->irq_lock);
	414	+
	415	+ vgic_put_irq(vcpu->kvm, irq);
	416	+ }
	417	+}
	418	+
374	419	static int match_region(const void key, const void elt)
375	420	{
376	421	const unsigned int offset = (unsigned long)key;
@@ -394,6 +439,22 @@ vgic_find_mmio_region(const struct vgic_register_region *region, int nr_regions, · 17 unmodified lines
394	439	sizeof(region[0]), match_region);
395	440	}
396	441
	442	+void vgic_set_vmcr(struct kvm_vcpu vcpu, struct vgic_vmcr vmcr)
	443	+{
	444	+ if (kvm_vgic_global_state.type == VGIC_V2)
	445	+ vgic_v2_set_vmcr(vcpu, vmcr);
	446	+ else
	447	+ vgic_v3_set_vmcr(vcpu, vmcr);
	448	+}
	449	+
	450	+void vgic_get_vmcr(struct kvm_vcpu vcpu, struct vgic_vmcr vmcr)
	451	+{
	452	+ if (kvm_vgic_global_state.type == VGIC_V2)
	453	+ vgic_v2_get_vmcr(vcpu, vmcr);
	454	+ else
	455	+ vgic_v3_get_vmcr(vcpu, vmcr);
	456	+}
	457	+
397	458	/*
398	459	* kvm_mmio_read_buf() returns a value in a format where it can be converted
399	460	* to a byte array and be directly observed as the guest wanted it to appear
@@ -484,6 +545,74 @@ static bool check_region(const struct kvm *kvm, · 84 unmodified lines
484	545	return false;
485	546	}
486	547
	548	+const struct vgic_register_region *
	549	+vgic_get_mmio_region(struct kvm_vcpu vcpu, struct vgic_io_device iodev,
	550	+ gpa_t addr, int len)
	551	+{
	552	+ const struct vgic_register_region *region;
	553	+
	554	+ region = vgic_find_mmio_region(iodev->regions, iodev->nr_regions,
	555	+ addr - iodev->base_addr);
	556	+ if (!region \|\| !check_region(vcpu->kvm, region, addr, len))
	557	+ return NULL;
	558	+
	559	+ return region;
	560	+}
	561	+
	562	+static int vgic_uaccess_read(struct kvm_vcpu vcpu, struct kvm_io_device dev,
	563	+ gpa_t addr, u32 *val)
	564	+{
	565	+ struct vgic_io_device *iodev = kvm_to_vgic_iodev(dev);
	566	+ const struct vgic_register_region *region;
	567	+ struct kvm_vcpu *r_vcpu;
	568	+
	569	+ region = vgic_get_mmio_region(vcpu, iodev, addr, sizeof(u32));
	570	+ if (!region) {
	571	+ *val = 0;
	572	+ return 0;
	573	+ }
	574	+
	575	+ r_vcpu = iodev->redist_vcpu ? iodev->redist_vcpu : vcpu;
	576	+ if (region->uaccess_read)
	577	+ *val = region->uaccess_read(r_vcpu, addr, sizeof(u32));
	578	+ else
	579	+ *val = region->read(r_vcpu, addr, sizeof(u32));
	580	+
	581	+ return 0;
	582	+}
	583	+
	584	+static int vgic_uaccess_write(struct kvm_vcpu vcpu, struct kvm_io_device dev,
	585	+ gpa_t addr, const u32 *val)
	586	+{
	587	+ struct vgic_io_device *iodev = kvm_to_vgic_iodev(dev);
	588	+ const struct vgic_register_region *region;
	589	+ struct kvm_vcpu *r_vcpu;
	590	+
	591	+ region = vgic_get_mmio_region(vcpu, iodev, addr, sizeof(u32));
	592	+ if (!region)
	593	+ return 0;
	594	+
	595	+ r_vcpu = iodev->redist_vcpu ? iodev->redist_vcpu : vcpu;
	596	+ if (region->uaccess_write)
	597	+ region->uaccess_write(r_vcpu, addr, sizeof(u32), *val);
	598	+ else
	599	+ region->write(r_vcpu, addr, sizeof(u32), *val);
	600	+
	601	+ return 0;
	602	+}
	603	+
	604	+/*
	605	+ * Userland access to VGIC registers.
	606	+ */
	607	+int vgic_uaccess(struct kvm_vcpu vcpu, struct vgic_io_device dev,
	608	+ bool is_write, int offset, u32 *val)
	609	+{
	610	+ if (is_write)
	611	+ return vgic_uaccess_write(vcpu, &dev->dev, offset, val);
	612	+ else
	613	+ return vgic_uaccess_read(vcpu, &dev->dev, offset, val);
	614	+}
	615	+
487	616	static int dispatch_mmio_read(struct kvm_vcpu vcpu, struct kvm_io_device dev,
488	617	gpa_t addr, int len, void *val)
489	618	{
@@ -491,9 +620,8 @@ static int dispatch_mmio_read(struct kvm_vcpu vcpu, struct kvm_io_device dev, · 1 unmodified line
491	620	const struct vgic_register_region *region;
492	621	unsigned long data = 0;
493	622
494		− region = vgic_find_mmio_region(iodev->regions, iodev->nr_regions,
495		− addr - iodev->base_addr);
496		− if (!region \|\| !check_region(vcpu->kvm, region, addr, len)) {
	623	+ region = vgic_get_mmio_region(vcpu, iodev, addr, len);
	624	+ if (!region) {
497	625	memset(val, 0, len);
498	626	return 0;
499	627	}
@@ -524,9 +652,8 @@ static int dispatch_mmio_write(struct kvm_vcpu vcpu, struct kvm_io_device dev, · 24 unmodified lines
524	652	const struct vgic_register_region *region;
525	653	unsigned long data = vgic_data_mmio_bus_to_host(val, len);
526	654
527		− region = vgic_find_mmio_region(iodev->regions, iodev->nr_regions,
528		− addr - iodev->base_addr);
529		− if (!region \|\| !check_region(vcpu->kvm, region, addr, len))
	655	+ region = vgic_get_mmio_region(vcpu, iodev, addr, len);
	656	+ if (!region)
530	657	return 0;
531	658
532	659	switch (iodev->iodev_type) {

virt/kvm/arm/vgic/vgic-mmio.h+24−0

@@ -34,6 +34,10 @@ struct vgic_register_region { · 33 unmodified lines
34	34	gpa_t addr, unsigned int len,
35	35	unsigned long val);
36	36	};
	37	+ unsigned long (uaccess_read)(struct kvm_vcpu vcpu, gpa_t addr,
	38	+ unsigned int len);
	39	+ void (uaccess_write)(struct kvm_vcpu vcpu, gpa_t addr,
	40	+ unsigned int len, unsigned long val);
37	41	};
38	42
39	43	extern struct kvm_io_device_ops kvm_io_gic_ops;
@@ -86,6 +90,18 @@ extern struct kvm_io_device_ops kvm_io_gic_ops; · 46 unmodified lines
86	90	.write = wr, \
87	91	}
88	92
	93	+#define REGISTER_DESC_WITH_LENGTH_UACCESS(off, rd, wr, urd, uwr, length, acc) \
	94	+ { \
	95	+ .reg_offset = off, \
	96	+ .bits_per_irq = 0, \
	97	+ .len = length, \
	98	+ .access_flags = acc, \
	99	+ .read = rd, \
	100	+ .write = wr, \
	101	+ .uaccess_read = urd, \
	102	+ .uaccess_write = uwr, \
	103	+ }
	104	+
89	105	int kvm_vgic_register_mmio_region(struct kvm kvm, struct kvm_vcpu vcpu,
90	106	struct vgic_register_region *reg_desc,
91	107	struct vgic_io_device *region,
@@ -158,6 +174,14 @@ void vgic_mmio_write_config(struct kvm_vcpu *vcpu, · 66 unmodified lines
158	174	gpa_t addr, unsigned int len,
159	175	unsigned long val);
160	176
	177	+int vgic_uaccess(struct kvm_vcpu vcpu, struct vgic_io_device dev,
	178	+ bool is_write, int offset, u32 *val);
	179	+
	180	+u64 vgic_read_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid);
	181	+
	182	+void vgic_write_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid,
	183	+ const u64 val);
	184	+
161	185	unsigned int vgic_v2_init_dist_iodev(struct vgic_io_device *dev);
162	186
163	187	unsigned int vgic_v3_init_dist_iodev(struct vgic_io_device *dev);

virt/kvm/arm/vgic/vgic-v2.c+5−9

@@ -104,7 +104,7 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu) · 103 unmodified lines
104	104	/* Edge is the only case where we preserve the pending bit */
105	105	if (irq->config == VGIC_CONFIG_EDGE &&
106	106	(val & GICH_LR_PENDING_BIT)) {
107		− irq->pending = true;
	107	+ irq->pending_latch = true;
108	108
109	109	if (vgic_irq_is_sgi(intid)) {
110	110	u32 cpuid = val & GICH_LR_PHYSID_CPUID;
@@ -120,9 +120,7 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu) · 9 unmodified lines
120	120	*/
121	121	if (irq->config == VGIC_CONFIG_LEVEL) {
122	122	if (!(val & GICH_LR_PENDING_BIT))
123		− irq->soft_pending = false;
124		−
125		− irq->pending = irq->line_level \|\| irq->soft_pending;
	123	+ irq->pending_latch = false;
126	124	}
127	125
128	126	spin_unlock(&irq->irq_lock);
@@ -145,11 +143,11 @@ void vgic_v2_populate_lr(struct kvm_vcpu vcpu, struct vgic_irq irq, int lr) · 16 unmodified lines
145	143	{
146	144	u32 val = irq->intid;
147	145
148		− if (irq->pending) {
	146	+ if (irq_is_pending(irq)) {
149	147	val \|= GICH_LR_PENDING_BIT;
150	148
151	149	if (irq->config == VGIC_CONFIG_EDGE)
152		− irq->pending = false;
	150	+ irq->pending_latch = false;
153	151
154	152	if (vgic_irq_is_sgi(irq->intid)) {
155	153	u32 src = ffs(irq->source);
@@ -158,7 +156,7 @@ void vgic_v2_populate_lr(struct kvm_vcpu vcpu, struct vgic_irq irq, int lr) · 2 unmodified lines
158	156	val \|= (src - 1) << GICH_LR_PHYSID_CPUID_SHIFT;
159	157	irq->source &= ~(1 << (src - 1));
160	158	if (irq->source)
161		− irq->pending = true;
	159	+ irq->pending_latch = true;
162	160	}
163	161	}
164	162
@@ -293,8 +291,6 @@ int vgic_v2_map_resources(struct kvm *kvm) · 128 unmodified lines
293	291	dist->ready = true;
294	292
295	293	out:
296		− if (ret)
297		− kvm_vgic_destroy(kvm);
298	294	return ret;
299	295	}
300	296

virt/kvm/arm/vgic/vgic-v3.c+31−11

@@ -94,7 +94,7 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu) · 93 unmodified lines
94	94	/* Edge is the only case where we preserve the pending bit */
95	95	if (irq->config == VGIC_CONFIG_EDGE &&
96	96	(val & ICH_LR_PENDING_BIT)) {
97		− irq->pending = true;
	97	+ irq->pending_latch = true;
98	98
99	99	if (vgic_irq_is_sgi(intid) &&
100	100	model == KVM_DEV_TYPE_ARM_VGIC_V2) {
@@ -111,9 +111,7 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu) · 10 unmodified lines
111	111	*/
112	112	if (irq->config == VGIC_CONFIG_LEVEL) {
113	113	if (!(val & ICH_LR_PENDING_BIT))
114		− irq->soft_pending = false;
115		−
116		− irq->pending = irq->line_level \|\| irq->soft_pending;
	114	+ irq->pending_latch = false;
117	115	}
118	116
119	117	spin_unlock(&irq->irq_lock);
@@ -127,11 +125,11 @@ void vgic_v3_populate_lr(struct kvm_vcpu vcpu, struct vgic_irq irq, int lr) · 7 unmodified lines
127	125	u32 model = vcpu->kvm->arch.vgic.vgic_model;
128	126	u64 val = irq->intid;
129	127
130		− if (irq->pending) {
	128	+ if (irq_is_pending(irq)) {
131	129	val \|= ICH_LR_PENDING_BIT;
132	130
133	131	if (irq->config == VGIC_CONFIG_EDGE)
134		− irq->pending = false;
	132	+ irq->pending_latch = false;
135	133
136	134	if (vgic_irq_is_sgi(irq->intid) &&
137	135	model == KVM_DEV_TYPE_ARM_VGIC_V2) {
@@ -141,7 +139,7 @@ void vgic_v3_populate_lr(struct kvm_vcpu vcpu, struct vgic_irq irq, int lr) · 3 unmodified lines
141	139	val \|= (src - 1) << GICH_LR_PHYSID_CPUID_SHIFT;
142	140	irq->source &= ~(1 << (src - 1));
143	141	if (irq->source)
144		− irq->pending = true;
	142	+ irq->pending_latch = true;
145	143	}
146	144	}
147	145
@@ -177,10 +175,18 @@ void vgic_v3_set_vmcr(struct kvm_vcpu vcpu, struct vgic_vmcr vmcrp) · 29 unmodified lines
177	175	{
178	176	u32 vmcr;
179	177
180		− vmcr = (vmcrp->ctlr << ICH_VMCR_CTLR_SHIFT) & ICH_VMCR_CTLR_MASK;
	178	+ /*
	179	+ * Ignore the FIQen bit, because GIC emulation always implies
	180	+ * SRE=1 which means the vFIQEn bit is also RES1.
	181	+ */
	182	+ vmcr = ((vmcrp->ctlr >> ICC_CTLR_EL1_EOImode_SHIFT) <<
	183	+ ICH_VMCR_EOIM_SHIFT) & ICH_VMCR_EOIM_MASK;
	184	+ vmcr \|= (vmcrp->ctlr << ICH_VMCR_CBPR_SHIFT) & ICH_VMCR_CBPR_MASK;
181	185	vmcr \|= (vmcrp->abpr << ICH_VMCR_BPR1_SHIFT) & ICH_VMCR_BPR1_MASK;
182	186	vmcr \|= (vmcrp->bpr << ICH_VMCR_BPR0_SHIFT) & ICH_VMCR_BPR0_MASK;
183	187	vmcr \|= (vmcrp->pmr << ICH_VMCR_PMR_SHIFT) & ICH_VMCR_PMR_MASK;
	188	+ vmcr \|= (vmcrp->grpen0 << ICH_VMCR_ENG0_SHIFT) & ICH_VMCR_ENG0_MASK;
	189	+ vmcr \|= (vmcrp->grpen1 << ICH_VMCR_ENG1_SHIFT) & ICH_VMCR_ENG1_MASK;
184	190
185	191	vcpu->arch.vgic_cpu.vgic_v3.vgic_vmcr = vmcr;
186	192	}
@@ -189,10 +195,18 @@ void vgic_v3_get_vmcr(struct kvm_vcpu vcpu, struct vgic_vmcr vmcrp) · 2 unmodified lines
189	195	{
190	196	u32 vmcr = vcpu->arch.vgic_cpu.vgic_v3.vgic_vmcr;
191	197
192		− vmcrp->ctlr = (vmcr & ICH_VMCR_CTLR_MASK) >> ICH_VMCR_CTLR_SHIFT;
	198	+ /*
	199	+ * Ignore the FIQen bit, because GIC emulation always implies
	200	+ * SRE=1 which means the vFIQEn bit is also RES1.
	201	+ */
	202	+ vmcrp->ctlr = ((vmcr >> ICH_VMCR_EOIM_SHIFT) <<
	203	+ ICC_CTLR_EL1_EOImode_SHIFT) & ICC_CTLR_EL1_EOImode_MASK;
	204	+ vmcrp->ctlr \|= (vmcr & ICH_VMCR_CBPR_MASK) >> ICH_VMCR_CBPR_SHIFT;
193	205	vmcrp->abpr = (vmcr & ICH_VMCR_BPR1_MASK) >> ICH_VMCR_BPR1_SHIFT;
194	206	vmcrp->bpr = (vmcr & ICH_VMCR_BPR0_MASK) >> ICH_VMCR_BPR0_SHIFT;
195	207	vmcrp->pmr = (vmcr & ICH_VMCR_PMR_MASK) >> ICH_VMCR_PMR_SHIFT;
	208	+ vmcrp->grpen0 = (vmcr & ICH_VMCR_ENG0_MASK) >> ICH_VMCR_ENG0_SHIFT;
	209	+ vmcrp->grpen1 = (vmcr & ICH_VMCR_ENG1_MASK) >> ICH_VMCR_ENG1_SHIFT;
196	210	}
197	211
198	212	#define INITIAL_PENDBASER_VALUE \
@@ -224,6 +238,13 @@ void vgic_v3_enable(struct kvm_vcpu *vcpu) · 25 unmodified lines
224	238	vgic_v3->vgic_sre = 0;
225	239	}
226	240
	241	+ vcpu->arch.vgic_cpu.num_id_bits = (kvm_vgic_global_state.ich_vtr_el2 &
	242	+ ICH_VTR_ID_BITS_MASK) >>
	243	+ ICH_VTR_ID_BITS_SHIFT;
	244	+ vcpu->arch.vgic_cpu.num_pri_bits = ((kvm_vgic_global_state.ich_vtr_el2 &
	245	+ ICH_VTR_PRI_BITS_MASK) >>
	246	+ ICH_VTR_PRI_BITS_SHIFT) + 1;
	247	+
227	248	/* Get the show on the road... */
228	249	vgic_v3->vgic_hcr = ICH_HCR_EN;
229	250	}
@@ -302,8 +323,6 @@ int vgic_v3_map_resources(struct kvm *kvm) · 72 unmodified lines
302	323	dist->ready = true;
303	324
304	325	out:
305		− if (ret)
306		− kvm_vgic_destroy(kvm);
307	326	return ret;
308	327	}
309	328
@@ -324,6 +343,7 @@ int vgic_v3_probe(const struct gic_kvm_info *info) · 14 unmodified lines
324	343	*/
325	344	kvm_vgic_global_state.nr_lr = (ich_vtr_el2 & 0xf) + 1;
326	345	kvm_vgic_global_state.can_emulate_gicv2 = false;
	346	+ kvm_vgic_global_state.ich_vtr_el2 = ich_vtr_el2;
327	347
328	348	if (!info->vcpu.start) {
329	349	kvm_info("GICv3: no GICV resource entry\n");

virt/kvm/arm/vgic/vgic.c+23−43

@@ -160,7 +160,7 @@ static struct kvm_vcpu vgic_target_oracle(struct vgic_irq irq) · 159 unmodified lines
160	160	* If the distributor is disabled, pending interrupts shouldn't be
161	161	* forwarded.
162	162	*/
163		− if (irq->enabled && irq->pending) {
	163	+ if (irq->enabled && irq_is_pending(irq)) {
164	164	if (unlikely(irq->target_vcpu &&
165	165	!irq->target_vcpu->kvm->arch.vgic.enabled))
166	166	return NULL;
@@ -204,8 +204,8 @@ static int vgic_irq_cmp(void priv, struct list_head a, struct list_head *b) · 37 unmodified lines
204	204	goto out;
205	205	}
206	206
207		− penda = irqa->enabled && irqa->pending;
208		− pendb = irqb->enabled && irqb->pending;
	207	+ penda = irqa->enabled && irq_is_pending(irqa);
	208	+ pendb = irqb->enabled && irq_is_pending(irqb);
209	209
210	210	if (!penda \|\| !pendb) {
211	211	ret = (int)pendb - (int)penda;
@@ -335,9 +335,22 @@ retry: · 123 unmodified lines
335	335	return true;
336	336	}
337	337
338		−static int vgic_update_irq_pending(struct kvm *kvm, int cpuid,
339		− unsigned int intid, bool level,
340		− bool mapped_irq)
	338	+/**
	339	+ * kvm_vgic_inject_irq - Inject an IRQ from a device to the vgic
	340	+ * @kvm: The VM structure pointer
	341	+ * @cpuid: The CPU for PPIs
	342	+ * @intid: The INTID to inject a new state to.
	343	+ * @level: Edge-triggered: true: to trigger the interrupt
	344	+ * false: to ignore the call
	345	+ * Level-sensitive true: raise the input signal
	346	+ * false: lower the input signal
	347	+ *
	348	+ * The VGIC is not concerned with devices being active-LOW or active-HIGH for
	349	+ * level-sensitive interrupts. You can think of the level parameter as 1
	350	+ * being HIGH and 0 being LOW and all devices being active-HIGH.
	351	+ */
	352	+int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,
	353	+ bool level)
341	354	{
342	355	struct kvm_vcpu *vcpu;
343	356	struct vgic_irq *irq;
@@ -357,11 +370,6 @@ static int vgic_update_irq_pending(struct kvm *kvm, int cpuid, · 13 unmodified lines
357	370	if (!irq)
358	371	return -EINVAL;
359	372
360		− if (irq->hw != mapped_irq) {
361		− vgic_put_irq(kvm, irq);
362		− return -EINVAL;
363		− }
364		−
365	373	spin_lock(&irq->irq_lock);
366	374
367	375	if (!vgic_validate_injection(irq, level)) {
@@ -371,12 +379,10 @@ static int vgic_update_irq_pending(struct kvm *kvm, int cpuid, · 3 unmodified lines
371	379	return 0;
372	380	}
373	381
374		− if (irq->config == VGIC_CONFIG_LEVEL) {
	382	+ if (irq->config == VGIC_CONFIG_LEVEL)
375	383	irq->line_level = level;
376		− irq->pending = level \|\| irq->soft_pending;
377		− } else {
378		− irq->pending = true;
379		− }
	384	+ else
	385	+ irq->pending_latch = true;
380	386
381	387	vgic_queue_irq_unlock(kvm, irq);
382	388	vgic_put_irq(kvm, irq);
@@ -384,32 +390,6 @@ static int vgic_update_irq_pending(struct kvm *kvm, int cpuid, · 1 unmodified line
384	390	return 0;
385	391	}
386	392
387		−/**
388		− * kvm_vgic_inject_irq - Inject an IRQ from a device to the vgic
389		− * @kvm: The VM structure pointer
390		− * @cpuid: The CPU for PPIs
391		− * @intid: The INTID to inject a new state to.
392		− * @level: Edge-triggered: true: to trigger the interrupt
393		− * false: to ignore the call
394		− * Level-sensitive true: raise the input signal
395		− * false: lower the input signal
396		− *
397		− * The VGIC is not concerned with devices being active-LOW or active-HIGH for
398		− * level-sensitive interrupts. You can think of the level parameter as 1
399		− * being HIGH and 0 being LOW and all devices being active-HIGH.
400		− */
401		−int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,
402		− bool level)
403		−{
404		− return vgic_update_irq_pending(kvm, cpuid, intid, level, false);
405		−}
406		−
407		−int kvm_vgic_inject_mapped_irq(struct kvm *kvm, int cpuid, unsigned int intid,
408		− bool level)
409		−{
410		− return vgic_update_irq_pending(kvm, cpuid, intid, level, true);
411		−}
412		−
413	393	int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, u32 virt_irq, u32 phys_irq)
414	394	{
415	395	struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, virt_irq);
@@ -689,7 +669,7 @@ int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu) · 273 unmodified lines
689	669
690	670	list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
691	671	spin_lock(&irq->irq_lock);
692		− pending = irq->pending && irq->enabled;
	672	+ pending = irq_is_pending(irq) && irq->enabled;
693	673	spin_unlock(&irq->irq_lock);
694	674
695	675	if (pending)

virt/kvm/arm/vgic/vgic.h+82−1

@@ -30,13 +30,79 @@ · 29 unmodified lines
30	30
31	31	#define vgic_irq_is_sgi(intid) ((intid) < VGIC_NR_SGIS)
32	32
	33	+#define VGIC_AFFINITY_0_SHIFT 0
	34	+#define VGIC_AFFINITY_0_MASK (0xffUL << VGIC_AFFINITY_0_SHIFT)
	35	+#define VGIC_AFFINITY_1_SHIFT 8
	36	+#define VGIC_AFFINITY_1_MASK (0xffUL << VGIC_AFFINITY_1_SHIFT)
	37	+#define VGIC_AFFINITY_2_SHIFT 16
	38	+#define VGIC_AFFINITY_2_MASK (0xffUL << VGIC_AFFINITY_2_SHIFT)
	39	+#define VGIC_AFFINITY_3_SHIFT 24
	40	+#define VGIC_AFFINITY_3_MASK (0xffUL << VGIC_AFFINITY_3_SHIFT)
	41	+
	42	+#define VGIC_AFFINITY_LEVEL(reg, level) \
	43	+ ((((reg) & VGIC_AFFINITY_## level ##_MASK) \
	44	+ >> VGIC_AFFINITY_## level ##_SHIFT) << MPIDR_LEVEL_SHIFT(level))
	45	+
	46	+/*
	47	+ * The Userspace encodes the affinity differently from the MPIDR,
	48	+ * Below macro converts vgic userspace format to MPIDR reg format.
	49	+ */
	50	+#define VGIC_TO_MPIDR(val) (VGIC_AFFINITY_LEVEL(val, 0) \| \
	51	+ VGIC_AFFINITY_LEVEL(val, 1) \| \
	52	+ VGIC_AFFINITY_LEVEL(val, 2) \| \
	53	+ VGIC_AFFINITY_LEVEL(val, 3))
	54	+
	55	+/*
	56	+ * As per Documentation/virtual/kvm/devices/arm-vgic-v3.txt,
	57	+ * below macros are defined for CPUREG encoding.
	58	+ */
	59	+#define KVM_REG_ARM_VGIC_SYSREG_OP0_MASK 0x000000000000c000
	60	+#define KVM_REG_ARM_VGIC_SYSREG_OP0_SHIFT 14
	61	+#define KVM_REG_ARM_VGIC_SYSREG_OP1_MASK 0x0000000000003800
	62	+#define KVM_REG_ARM_VGIC_SYSREG_OP1_SHIFT 11
	63	+#define KVM_REG_ARM_VGIC_SYSREG_CRN_MASK 0x0000000000000780
	64	+#define KVM_REG_ARM_VGIC_SYSREG_CRN_SHIFT 7
	65	+#define KVM_REG_ARM_VGIC_SYSREG_CRM_MASK 0x0000000000000078
	66	+#define KVM_REG_ARM_VGIC_SYSREG_CRM_SHIFT 3
	67	+#define KVM_REG_ARM_VGIC_SYSREG_OP2_MASK 0x0000000000000007
	68	+#define KVM_REG_ARM_VGIC_SYSREG_OP2_SHIFT 0
	69	+
	70	+#define KVM_DEV_ARM_VGIC_SYSREG_MASK (KVM_REG_ARM_VGIC_SYSREG_OP0_MASK \| \
	71	+ KVM_REG_ARM_VGIC_SYSREG_OP1_MASK \| \
	72	+ KVM_REG_ARM_VGIC_SYSREG_CRN_MASK \| \
	73	+ KVM_REG_ARM_VGIC_SYSREG_CRM_MASK \| \
	74	+ KVM_REG_ARM_VGIC_SYSREG_OP2_MASK)
	75	+
	76	+static inline bool irq_is_pending(struct vgic_irq *irq)
	77	+{
	78	+ if (irq->config == VGIC_CONFIG_EDGE)
	79	+ return irq->pending_latch;
	80	+ else
	81	+ return irq->pending_latch \|\| irq->line_level;
	82	+}
	83	+
33	84	struct vgic_vmcr {
34	85	u32 ctlr;
35	86	u32 abpr;
36	87	u32 bpr;
37	88	u32 pmr;
	89	+ /* Below member variable are valid only for GICv3 */
	90	+ u32 grpen0;
	91	+ u32 grpen1;
	92	+};
	93	+
	94	+struct vgic_reg_attr {
	95	+ struct kvm_vcpu *vcpu;
	96	+ gpa_t addr;
38	97	};
39	98
	99	+int vgic_v3_parse_attr(struct kvm_device dev, struct kvm_device_attr attr,
	100	+ struct vgic_reg_attr *reg_attr);
	101	+int vgic_v2_parse_attr(struct kvm_device dev, struct kvm_device_attr attr,
	102	+ struct vgic_reg_attr *reg_attr);
	103	+const struct vgic_register_region *
	104	+vgic_get_mmio_region(struct kvm_vcpu vcpu, struct vgic_io_device iodev,
	105	+ gpa_t addr, int len);
40	106	struct vgic_irq vgic_get_irq(struct kvm kvm, struct kvm_vcpu *vcpu,
41	107	u32 intid);
42	108	void vgic_put_irq(struct kvm kvm, struct vgic_irq irq);
@@ -89,9 +155,24 @@ bool vgic_has_its(struct kvm *kvm); · 46 unmodified lines
89	155	int kvm_vgic_register_its_device(void);
90	156	void vgic_enable_lpis(struct kvm_vcpu *vcpu);
91	157	int vgic_its_inject_msi(struct kvm kvm, struct kvm_msi msi);
92		−
	158	+int vgic_v3_has_attr_regs(struct kvm_device dev, struct kvm_device_attr attr);
	159	+int vgic_v3_dist_uaccess(struct kvm_vcpu *vcpu, bool is_write,
	160	+ int offset, u32 *val);
	161	+int vgic_v3_redist_uaccess(struct kvm_vcpu *vcpu, bool is_write,
	162	+ int offset, u32 *val);
	163	+int vgic_v3_cpu_sysregs_uaccess(struct kvm_vcpu *vcpu, bool is_write,
	164	+ u64 id, u64 *val);
	165	+int vgic_v3_has_cpu_sysregs_attr(struct kvm_vcpu *vcpu, bool is_write, u64 id,
	166	+ u64 *reg);
	167	+int vgic_v3_line_level_info_uaccess(struct kvm_vcpu *vcpu, bool is_write,
	168	+ u32 intid, u64 *val);
93	169	int kvm_register_vgic_device(unsigned long type);
	170	+void vgic_set_vmcr(struct kvm_vcpu vcpu, struct vgic_vmcr vmcr);
	171	+void vgic_get_vmcr(struct kvm_vcpu vcpu, struct vgic_vmcr vmcr);
94	172	int vgic_lazy_init(struct kvm *kvm);
95	173	int vgic_init(struct kvm *kvm);
96	174
	175	+int vgic_debug_init(struct kvm *kvm);
	176	+int vgic_debug_destroy(struct kvm *kvm);
	177	+
97	178	#endif