Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net

Conflicts: drivers/net/ethernet/mellanox/mlx5/core/en.h drivers/net/ethernet/mellanox/mlx5/core/en_main.c drivers/net/usb/r8152.c All three conflicts were overlapping changes.

David S. Miller committed 10 years ago

Commit 30d08442 parents ae3e456 bc86765154 files · +1455 −618Browse files

Unified · Split

154 files

Makefile +1 −1
arch/arc/Makefile +0 −2
arch/arc/kernel/stacktrace.c +1 −1
arch/arm/kvm/arm.c +1 −0
arch/mips/include/asm/pgtable.h +6 −4
arch/powerpc/include/asm/book3s/64/pgtable.h +1 −0
arch/powerpc/kernel/eeh_driver.c +1 −1
arch/powerpc/kernel/pci_64.c +0 −1
arch/powerpc/kernel/process.c +10 −0
arch/powerpc/kernel/tm.S +44 −17
arch/powerpc/mm/hash_utils_64.c +4 −0
arch/powerpc/mm/pgtable-radix.c +5 −0
arch/x86/include/asm/pvclock.h +9 −16
arch/x86/kernel/pvclock.c +9 −2
arch/x86/kvm/lapic.c +2 −1
arch/x86/kvm/vmx.c +11 −12
arch/x86/kvm/x86.c +0 −6
arch/x86/kvm/x86.h +7 −0
drivers/acpi/nfit.c +6 −6
drivers/acpi/nfit.h +5 −5
drivers/acpi/pci_link.c +1 −1
drivers/acpi/utils.c +3 −3
drivers/clk/clk-oxnas.c +2 −2
drivers/clk/rockchip/clk-cpu.c +2 −2
drivers/clk/rockchip/clk-mmc-phase.c +1 −11
drivers/clk/rockchip/clk-rk3399.c +6 −2
drivers/cpufreq/cpufreq-dt-platdev.c +4 −3
drivers/cpufreq/cpufreq.c +4 −0
drivers/cpufreq/intel_pstate.c +3 −2
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c +4 −0
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +3 −0
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c +124 −55
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.h +1 −0
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +2 −0
drivers/gpu/drm/amd/powerplay/inc/polaris10_ppsmc.h +2 −0
drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h +2 −1
drivers/gpu/drm/i915/i915_debugfs.c +2 −2
drivers/gpu/drm/i915/intel_display.c +8 −8
drivers/gpu/drm/i915/intel_dp.c +6 −4
drivers/gpu/drm/i915/intel_dpll_mgr.c +2 −2
drivers/iio/accel/kxsd9.c +2 −2
drivers/iio/adc/ad7266.c +5 −2
drivers/iio/imu/inv_mpu6050/inv_mpu_acpi.c +3 −2
drivers/iommu/amd_iommu_init.c +1 −1
drivers/iommu/intel-iommu.c +1 −1
drivers/iommu/iova.c +6 −2
drivers/mfd/max77620.c +2 −0
drivers/net/bonding/bond_3ad.c +7 −4
drivers/net/bonding/bond_alb.c +2 −5
drivers/net/bonding/bond_main.c +1 −0
drivers/net/ethernet/broadcom/bcmsysport.c +1 −1
drivers/net/ethernet/chelsio/cxgb4/t4fw_version.h +6 −6
drivers/net/ethernet/intel/e1000e/netdev.c +9 −12
drivers/net/ethernet/intel/ixgbevf/mbx.c +2 −2
drivers/net/ethernet/marvell/mvneta.c +2 −0
drivers/net/ethernet/mellanox/mlx5/core/cmd.c +72 −57
drivers/net/ethernet/mellanox/mlx5/core/en.h +10 −1
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c +6 −2
drivers/net/ethernet/mellanox/mlx5/core/en_main.c +90 −10
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c +41 −0
drivers/net/ethernet/mellanox/mlx5/core/en_tx.c +48 −4
drivers/net/ethernet/mellanox/mlx5/core/health.c +8 −3
drivers/net/ethernet/mellanox/mlx5/core/main.c +15 −26
drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c +44 −19
drivers/net/ethernet/mellanox/mlx5/core/vport.c +0 −3
drivers/net/ethernet/microchip/enc28j60.c +5 −2
drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c +2 −0
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +1 −1
drivers/net/geneve.c +7 −2
drivers/net/macsec.c +1 −0
drivers/net/phy/dp83867.c +9 −4
drivers/net/usb/cdc_ncm.c +7 −0
drivers/net/usb/r8152.c +28 −7
drivers/net/usb/usbnet.c +7 −3
drivers/nvdimm/pfn_devs.c +40 −11
drivers/phy/phy-bcm-ns-usb2.c +2 −2
drivers/phy/phy-miphy28lp.c +2 −1
drivers/phy/phy-rcar-gen3-usb2.c +1 −13
drivers/phy/phy-rockchip-dp.c +1 −1
drivers/phy/phy-stih407-usb.c +2 −2
drivers/phy/phy-sun4i-usb.c +7 −7
drivers/platform/chrome/cros_ec_dev.c +7 −1
drivers/regulator/anatop-regulator.c +1 −1
drivers/regulator/max77620-regulator.c +6 −1
drivers/s390/net/qeth_l2_main.c +1 −0
drivers/s390/net/qeth_l3_main.c +1 −0
drivers/spi/spi-rockchip.c +3 −1
drivers/spi/spi-sun4i.c +19 −4
drivers/spi/spi-sun6i.c +9 −1
drivers/spi/spi-ti-qspi.c +7 −0
drivers/staging/iio/accel/sca3000_core.c +1 −1
drivers/staging/iio/adc/ad7606_spi.c +1 −1
drivers/staging/iio/impedance-analyzer/ad5933.c +3 −3
drivers/tty/pty.c +5 −2
drivers/tty/vt/vt.c +1 −0
drivers/usb/common/usb-otg-fsm.c +2 −0
drivers/usb/core/hcd.c +7 −10
drivers/usb/dwc3/dwc3-st.c +4 −2
drivers/usb/host/ehci-st.c +4 −2
drivers/usb/host/ohci-st.c +4 −2
fs/9p/vfs_file.c +3 −3
fs/ceph/export.c +3 −7
fs/dax.c +6 −1
fs/fuse/dir.c +4 −0
fs/fuse/fuse_i.h +9 −0
fs/fuse/inode.c +18 −1
fs/libfs.c +71 −38
fs/lockd/svc.c +10 −3
fs/locks.c +1 −1
fs/namespace.c +1 −0
fs/overlayfs/inode.c +26 −3
fs/overlayfs/super.c +7 −5
include/drm/i915_pciids.h +4 −6
include/kvm/arm_pmu.h +2 −2
include/linux/mfd/da9052/da9052.h +1 −1
include/linux/mlx5/driver.h +1 −0
include/linux/pwm.h +10 −6
include/linux/reset.h +167 −44
include/linux/skbuff.h +20 −0
include/linux/usb/ehci_def.h +2 −2
include/net/bonding.h +6 −1
include/net/ip.h +2 −3
include/uapi/linux/fuse.h +6 −1
net/bridge/br_netfilter_hooks.c +1 −1
net/core/flow_dissector.c +43 −0
net/core/skbuff.c +0 −18
net/decnet/dn_fib.c +12 −9
net/ipv4/ip_output.c +2 −2
net/ipv6/ip6_fib.c +1 −0
net/packet/af_packet.c +1 −1
net/rds/tcp.c +3 −2
net/sched/act_mirred.c +1 −1
net/tipc/netlink_compat.c +1 −1
sound/core/timer.c +1 −1
sound/pci/au88x0/au88x0_core.c +2 −3
sound/pci/echoaudio/echoaudio.c +2 −2
sound/pci/hda/hda_generic.c +2 −0
sound/pci/hda/hda_intel.c +5 −1
sound/pci/hda/patch_realtek.c +1 −0
sound/soc/codecs/Kconfig +4 −3
sound/soc/codecs/ak4613.c +1 −1
sound/soc/codecs/cx20442.c +1 −0
sound/soc/codecs/hdac_hdmi.c +20 −0
sound/soc/codecs/rt5645.c +1 −1
sound/soc/codecs/rt5670.c +1 −1
sound/soc/codecs/wm5102.c +1 −1
sound/soc/codecs/wm5110.c +1 −0
sound/soc/codecs/wm8940.c +1 −0
sound/soc/davinci/davinci-mcasp.c +52 −4
sound/soc/davinci/davinci-mcasp.h +2 −2
sound/soc/fsl/fsl_ssi.c +6 −6
sound/soc/intel/atom/sst-mfld-platform-compress.c +7 −2
sound/soc/intel/skylake/bxt-sst.c +1 −0
sound/soc/sh/rcar/adg.c +1 −1

Makefile+1−1

@@ -1,7 +1,7 @@
1	1	VERSION = 4
2	2	PATCHLEVEL = 7
3	3	SUBLEVEL = 0
4		−EXTRAVERSION = -rc5
	4	+EXTRAVERSION = -rc6
5	5	NAME = Psychotic Stoned Sheep
6	6
7	7	# DOCUMENTATION

arch/arc/Makefile+0−2

@@ -66,8 +66,6 @@ endif · 65 unmodified lines
66	66
67	67	endif
68	68
69		−cflags-$(CONFIG_ARC_DW2_UNWIND) += -fasynchronous-unwind-tables
70		−
71	69	# By default gcc 4.8 generates dwarf4 which kernel unwinder can't grok
72	70	ifeq ($(atleast_gcc48),y)
73	71	cflags-$(CONFIG_ARC_DW2_UNWIND) += -gdwarf-2

arch/arc/kernel/stacktrace.c+1−1

@@ -142,7 +142,7 @@ arc_unwind_core(struct task_struct tsk, struct pt_regs regs, · 141 unmodified lines
142	142	* prelogue is setup (callee regs saved and then fp set and not other
143	143	* way around
144	144	*/
145		− pr_warn("CONFIG_ARC_DW2_UNWIND needs to be enabled\n");
	145	+ pr_warn_once("CONFIG_ARC_DW2_UNWIND needs to be enabled\n");
146	146	return 0;
147	147
148	148	#endif

arch/arm/kvm/arm.c+1−0

@@ -263,6 +263,7 @@ void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu) · 262 unmodified lines
263	263	kvm_timer_vcpu_terminate(vcpu);
264	264	kvm_vgic_vcpu_destroy(vcpu);
265	265	kvm_pmu_vcpu_destroy(vcpu);
	266	+ kvm_vcpu_uninit(vcpu);
266	267	kmem_cache_free(kvm_vcpu_cache, vcpu);
267	268	}
268	269

arch/mips/include/asm/pgtable.h+6−4

@@ -24,7 +24,7 @@ struct mm_struct; · 23 unmodified lines
24	24	struct vm_area_struct;
25	25
26	26	#define PAGE_NONE __pgprot(_PAGE_PRESENT \| _PAGE_NO_READ \| \
27		− _CACHE_CACHABLE_NONCOHERENT)
	27	+ _page_cachable_default)
28	28	#define PAGE_SHARED __pgprot(_PAGE_PRESENT \| _PAGE_WRITE \| \
29	29	_page_cachable_default)
30	30	#define PAGE_COPY __pgprot(_PAGE_PRESENT \| _PAGE_NO_EXEC \| \
@@ -476,7 +476,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) · 445 unmodified lines
476	476	pte.pte_low &= (_PAGE_MODIFIED \| _PAGE_ACCESSED \| _PFNX_MASK);
477	477	pte.pte_high &= (_PFN_MASK \| _CACHE_MASK);
478	478	pte.pte_low \|= pgprot_val(newprot) & ~_PFNX_MASK;
479		− pte.pte_high \|= pgprot_val(newprot) & ~_PFN_MASK;
	479	+ pte.pte_high \|= pgprot_val(newprot) & ~(_PFN_MASK \| _CACHE_MASK);
480	480	return pte;
481	481	}
482	482	#elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
@@ -491,7 +491,8 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) · 8 unmodified lines
491	491	#else
492	492	static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
493	493	{
494		− return __pte((pte_val(pte) & _PAGE_CHG_MASK) \| pgprot_val(newprot));
	494	+ return __pte((pte_val(pte) & _PAGE_CHG_MASK) \|
	495	+ (pgprot_val(newprot) & ~_PAGE_CHG_MASK));
495	496	}
496	497	#endif
497	498
@@ -632,7 +633,8 @@ static inline struct page *pmd_page(pmd_t pmd) · 134 unmodified lines
632	633
633	634	static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
634	635	{
635		− pmd_val(pmd) = (pmd_val(pmd) & _PAGE_CHG_MASK) \| pgprot_val(newprot);
	636	+ pmd_val(pmd) = (pmd_val(pmd) & _PAGE_CHG_MASK) \|
	637	+ (pgprot_val(newprot) & ~_PAGE_CHG_MASK);
636	638	return pmd;
637	639	}
638	640

arch/powerpc/include/asm/book3s/64/pgtable.h+1−0

@@ -230,6 +230,7 @@ extern unsigned long __kernel_virt_size; · 229 unmodified lines
230	230	#define KERN_VIRT_SIZE __kernel_virt_size
231	231	extern struct page *vmemmap;
232	232	extern unsigned long ioremap_bot;
	233	+extern unsigned long pci_io_base;
233	234	#endif /* __ASSEMBLY__ */
234	235
235	236	#include <asm/book3s/64/hash.h>

arch/powerpc/kernel/eeh_driver.c+1−1

@@ -647,7 +647,7 @@ static int eeh_reset_device(struct eeh_pe pe, struct pci_bus bus, · 646 unmodified lines
647	647	pci_unlock_rescan_remove();
648	648	}
649	649	} else if (frozen_bus) {
650		− eeh_pe_dev_traverse(pe, eeh_rmv_device, &rmv_data);
	650	+ eeh_pe_dev_traverse(pe, eeh_rmv_device, rmv_data);
651	651	}
652	652
653	653	/*

arch/powerpc/kernel/pci_64.c+0−1

@@ -47,7 +47,6 @@ static int __init pcibios_init(void) · 46 unmodified lines
47	47
48	48	printk(KERN_INFO "PCI: Probing PCI hardware\n");
49	49
50		− pci_io_base = ISA_IO_BASE;
51	50	/* For now, override phys_mem_access_prot. If we need it,g
52	51	* later, we may move that initialization to each ppc_md
53	52	*/

arch/powerpc/kernel/process.c+10−0

@@ -1505,6 +1505,16 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) · 1504 unmodified lines
1505	1505	current->thread.regs = regs - 1;
1506	1506	}
1507	1507
	1508	+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	1509	+ /*
	1510	+ * Clear any transactional state, we're exec()ing. The cause is
	1511	+ * not important as there will never be a recheckpoint so it's not
	1512	+ * user visible.
	1513	+ */
	1514	+ if (MSR_TM_SUSPENDED(mfmsr()))
	1515	+ tm_reclaim_current(0);
	1516	+#endif
	1517	+
1508	1518	memset(regs->gpr, 0, sizeof(regs->gpr));
1509	1519	regs->ctr = 0;
1510	1520	regs->link = 0;

arch/powerpc/kernel/tm.S+44−17

@@ -110,17 +110,11 @@ _GLOBAL(tm_reclaim) · 109 unmodified lines
110	110	std r3, STK_PARAM(R3)(r1)
111	111	SAVE_NVGPRS(r1)
112	112
113		− /* We need to setup MSR for VSX register save instructions. Here we
114		− * also clear the MSR RI since when we do the treclaim, we won't have a
115		− * valid kernel pointer for a while. We clear RI here as it avoids
116		− * adding another mtmsr closer to the treclaim. This makes the region
117		− * maked as non-recoverable wider than it needs to be but it saves on
118		− * inserting another mtmsrd later.
119		− */
	113	+ /* We need to setup MSR for VSX register save instructions. */
120	114	mfmsr r14
121	115	mr r15, r14
122	116	ori r15, r15, MSR_FP
123		− li r16, MSR_RI
	117	+ li r16, 0
124	118	ori r16, r16, MSR_EE /* IRQs hard off */
125	119	andc r15, r15, r16
126	120	oris r15, r15, MSR_VEC@h
@@ -176,7 +170,17 @@ dont_backup_fp: · 49 unmodified lines
176	170	1: tdeqi r6, 0
177	171	EMIT_BUG_ENTRY 1b,__FILE__,__LINE__,0
178	172
179		− /* The moment we treclaim, ALL of our GPRs will switch
	173	+ /* Clear MSR RI since we are about to change r1, EE is already off. */
	174	+ li r4, 0
	175	+ mtmsrd r4, 1
	176	+
	177	+ /*
	178	+ * BE CAREFUL HERE:
	179	+ * At this point we can't take an SLB miss since we have MSR_RI
	180	+ * off. Load only to/from the stack/paca which are in SLB bolted regions
	181	+ * until we turn MSR RI back on.
	182	+ *
	183	+ * The moment we treclaim, ALL of our GPRs will switch
180	184	* to user register state. (FPRs, CCR etc. also!)
181	185	* Use an sprg and a tm_scratch in the PACA to shuffle.
182	186	*/
@@ -197,6 +201,11 @@ dont_backup_fp: · 14 unmodified lines
197	201
198	202	/* Store the PPR in r11 and reset to decent value */
199	203	std r11, GPR11(r1) /* Temporary stash */
	204	+
	205	+ /* Reset MSR RI so we can take SLB faults again */
	206	+ li r11, MSR_RI
	207	+ mtmsrd r11, 1
	208	+
200	209	mfspr r11, SPRN_PPR
201	210	HMT_MEDIUM
202	211
@@ -397,11 +406,6 @@ restore_gprs: · 194 unmodified lines
397	406	ld r5, THREAD_TM_DSCR(r3)
398	407	ld r6, THREAD_TM_PPR(r3)
399	408
400		− /* Clear the MSR RI since we are about to change R1. EE is already off
401		− */
402		− li r4, 0
403		− mtmsrd r4, 1
404		−
405	409	REST_GPR(0, r7) /* GPR0 */
406	410	REST_2GPRS(2, r7) /* GPR2-3 */
407	411	REST_GPR(4, r7) /* GPR4 */
@@ -439,10 +443,33 @@ restore_gprs: · 31 unmodified lines
439	443	ld r6, _CCR(r7)
440	444	mtcr r6
441	445
442		− REST_GPR(1, r7) /* GPR1 */
443		− REST_GPR(5, r7) /* GPR5-7 */
444	446	REST_GPR(6, r7)
445		− ld r7, GPR7(r7)
	447	+
	448	+ /*
	449	+ * Store r1 and r5 on the stack so that we can access them
	450	+ * after we clear MSR RI.
	451	+ */
	452	+
	453	+ REST_GPR(5, r7)
	454	+ std r5, -8(r1)
	455	+ ld r5, GPR1(r7)
	456	+ std r5, -16(r1)
	457	+
	458	+ REST_GPR(7, r7)
	459	+
	460	+ /* Clear MSR RI since we are about to change r1. EE is already off */
	461	+ li r5, 0
	462	+ mtmsrd r5, 1
	463	+
	464	+ /*
	465	+ * BE CAREFUL HERE:
	466	+ * At this point we can't take an SLB miss since we have MSR_RI
	467	+ * off. Load only to/from the stack/paca which are in SLB bolted regions
	468	+ * until we turn MSR RI back on.
	469	+ */
	470	+
	471	+ ld r5, -8(r1)
	472	+ ld r1, -16(r1)
446	473
447	474	/* Commit register state as checkpointed state: */
448	475	TRECHKPT

arch/powerpc/mm/hash_utils_64.c+4−0

@@ -922,6 +922,10 @@ void __init hash__early_init_mmu(void) · 921 unmodified lines
922	922	vmemmap = (struct page *)H_VMEMMAP_BASE;
923	923	ioremap_bot = IOREMAP_BASE;
924	924
	925	+#ifdef CONFIG_PCI
	926	+ pci_io_base = ISA_IO_BASE;
	927	+#endif
	928	+
925	929	/* Initialize the MMU Hash table and create the linear mapping
926	930	* of memory. Has to be done before SLB initialization as this is
927	931	* currently where the page size encoding is obtained.

arch/powerpc/mm/pgtable-radix.c+5−0

@@ -328,6 +328,11 @@ void __init radix__early_init_mmu(void) · 327 unmodified lines
328	328	__vmalloc_end = RADIX_VMALLOC_END;
329	329	vmemmap = (struct page *)RADIX_VMEMMAP_BASE;
330	330	ioremap_bot = IOREMAP_BASE;
	331	+
	332	+#ifdef CONFIG_PCI
	333	+ pci_io_base = ISA_IO_BASE;
	334	+#endif
	335	+
331	336	/*
332	337	* For now radix also use the same frag size
333	338	*/

arch/x86/include/asm/pvclock.h+9−16

@@ -68,30 +68,23 @@ static inline u64 pvclock_scale_delta(u64 delta, u32 mul_frac, int shift) · 67 unmodified lines
68	68	return product;
69	69	}
70	70
71		−static __always_inline
72		−u64 pvclock_get_nsec_offset(const struct pvclock_vcpu_time_info *src)
73		−{
74		− u64 delta = rdtsc_ordered() - src->tsc_timestamp;
75		− return pvclock_scale_delta(delta, src->tsc_to_system_mul,
76		− src->tsc_shift);
77		−}
78		−
79	71	static __always_inline
80	72	unsigned __pvclock_read_cycles(const struct pvclock_vcpu_time_info *src,
81	73	cycle_t cycles, u8 flags)
82	74	{
83	75	unsigned version;
84		− cycle_t ret, offset;
85		− u8 ret_flags;
	76	+ cycle_t offset;
	77	+ u64 delta;
86	78
87	79	version = src->version;
	80	+ /* Make the latest version visible */
	81	+ smp_rmb();
88	82
89		− offset = pvclock_get_nsec_offset(src);
90		− ret = src->system_time + offset;
91		− ret_flags = src->flags;
92		−
93		− *cycles = ret;
94		− *flags = ret_flags;
	83	+ delta = rdtsc_ordered() - src->tsc_timestamp;
	84	+ offset = pvclock_scale_delta(delta, src->tsc_to_system_mul,
	85	+ src->tsc_shift);
	86	+ *cycles = src->system_time + offset;
	87	+ *flags = src->flags;
95	88	return version;
96	89	}
97	90

arch/x86/kernel/pvclock.c+9−2

@@ -61,11 +61,16 @@ void pvclock_resume(void) · 60 unmodified lines
61	61	u8 pvclock_read_flags(struct pvclock_vcpu_time_info *src)
62	62	{
63	63	unsigned version;
64		− cycle_t ret;
65	64	u8 flags;
66	65
67	66	do {
68		− version = __pvclock_read_cycles(src, &ret, &flags);
	67	+ version = src->version;
	68	+ /* Make the latest version visible */
	69	+ smp_rmb();
	70	+
	71	+ flags = src->flags;
	72	+ /* Make sure that the version double-check is last. */
	73	+ smp_rmb();
69	74	} while ((src->version & 1) \|\| version != src->version);
70	75
71	76	return flags & valid_flags;
@@ -80,6 +85,8 @@ cycle_t pvclock_clocksource_read(struct pvclock_vcpu_time_info *src) · 8 unmodified lines
80	85
81	86	do {
82	87	version = __pvclock_read_cycles(src, &ret, &flags);
	88	+ /* Make sure that the version double-check is last. */
	89	+ smp_rmb();
83	90	} while ((src->version & 1) \|\| version != src->version);
84	91
85	92	if (unlikely((flags & PVCLOCK_GUEST_STOPPED) != 0)) {

arch/x86/kvm/lapic.c+2−1

@@ -1310,7 +1310,8 @@ void wait_lapic_expire(struct kvm_vcpu *vcpu) · 1309 unmodified lines
1310	1310
1311	1311	/* __delay is delay_tsc whenever the hardware has TSC, thus always. */
1312	1312	if (guest_tsc < tsc_deadline)
1313		− __delay(tsc_deadline - guest_tsc);
	1313	+ __delay(min(tsc_deadline - guest_tsc,
	1314	+ nsec_to_cycles(vcpu, lapic_timer_advance_ns)));
1314	1315	}
1315	1316
1316	1317	static void start_apic_timer(struct kvm_lapic *apic)

arch/x86/kvm/vmx.c+11−12

@@ -6671,7 +6671,13 @@ static int get_vmx_mem_address(struct kvm_vcpu *vcpu, · 6670 unmodified lines
6671	6671
6672	6672	/* Checks for #GP/#SS exceptions. */
6673	6673	exn = false;
6674		− if (is_protmode(vcpu)) {
	6674	+ if (is_long_mode(vcpu)) {
	6675	+ /* Long mode: #GP(0)/#SS(0) if the memory address is in a
	6676	+ * non-canonical form. This is the only check on the memory
	6677	+ * destination for long mode!
	6678	+ */
	6679	+ exn = is_noncanonical_address(*ret);
	6680	+ } else if (is_protmode(vcpu)) {
6675	6681	/* Protected mode: apply checks for segment validity in the
6676	6682	* following order:
6677	6683	* - segment type check (#GP(0) may be thrown)
@@ -6688,17 +6694,10 @@ static int get_vmx_mem_address(struct kvm_vcpu *vcpu, · 10 unmodified lines
6688	6694	* execute-only code segment
6689	6695	*/
6690	6696	exn = ((s.type & 0xa) == 8);
6691		− }
6692		− if (exn) {
6693		− kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6694		− return 1;
6695		− }
6696		− if (is_long_mode(vcpu)) {
6697		− /* Long mode: #GP(0)/#SS(0) if the memory address is in a
6698		− * non-canonical form. This is an only check for long mode.
6699		− */
6700		− exn = is_noncanonical_address(*ret);
6701		− } else if (is_protmode(vcpu)) {
	6697	+ if (exn) {
	6698	+ kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
	6699	+ return 1;
	6700	+ }
6702	6701	/* Protected mode: #GP(0)/#SS(0) if the segment is unusable.
6703	6702	*/
6704	6703	exn = (s.unusable != 0);

arch/x86/kvm/x86.c+0−6

@@ -1244,12 +1244,6 @@ static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0); · 1243 unmodified lines
1244	1244	static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1245	1245	static unsigned long max_tsc_khz;
1246	1246
1247		−static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1248		−{
1249		− return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1250		− vcpu->arch.virtual_tsc_shift);
1251		−}
1252		−
1253	1247	static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1254	1248	{
1255	1249	u64 v = (u64)khz * (1000000 + ppm);

arch/x86/kvm/x86.h+7−0

@@ -2,6 +2,7 @@ · 1 unmodified line
2	2	#define ARCH_X86_KVM_X86_H
3	3
4	4	#include <linux/kvm_host.h>
	5	+#include <asm/pvclock.h>
5	6	#include "kvm_cache_regs.h"
6	7
7	8	#define MSR_IA32_CR_PAT_DEFAULT 0x0007040600070406ULL
@@ -195,6 +196,12 @@ extern unsigned int lapic_timer_advance_ns; · 187 unmodified lines
195	196
196	197	extern struct static_key kvm_no_apic_vcpu;
197	198
	199	+static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
	200	+{
	201	+ return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
	202	+ vcpu->arch.virtual_tsc_shift);
	203	+}
	204	+
198	205	/* Same "calling convention" as do_div:
199	206	* - divide (n << 32) by base
200	207	* - put result in n

drivers/acpi/nfit.c+6−6

@@ -928,7 +928,7 @@ static ssize_t format_show(struct device *dev, · 927 unmodified lines
928	928	{
929	929	struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
930	930
931		− return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->code));
	931	+ return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code));
932	932	}
933	933	static DEVICE_ATTR_RO(format);
934	934
@@ -961,8 +961,8 @@ static ssize_t format1_show(struct device *dev, · 26 unmodified lines
961	961	continue;
962	962	if (nfit_dcr->dcr->code == dcr->code)
963	963	continue;
964		− rc = sprintf(buf, "%#x\n",
965		− be16_to_cpu(nfit_dcr->dcr->code));
	964	+ rc = sprintf(buf, "0x%04x\n",
	965	+ le16_to_cpu(nfit_dcr->dcr->code));
966	966	break;
967	967	}
968	968	if (rc != ENXIO)
@@ -1131,11 +1131,11 @@ static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, · 162 unmodified lines
1131	1131
1132	1132	/*
1133	1133	* Until standardization materializes we need to consider up to 3
1134		− * different command sets. Note, that checking for function0 (bit0)
1135		− * tells us if any commands are reachable through this uuid.
	1134	+ * different command sets. Note, that checking for zero functions
	1135	+ * tells us if any commands might be reachable through this uuid.
1136	1136	*/
1137	1137	for (i = NVDIMM_FAMILY_INTEL; i <= NVDIMM_FAMILY_HPE2; i++)
1138		− if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1))
	1138	+ if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 0))
1139	1139	break;
1140	1140
1141	1141	/* limit the supported commands to those that are publicly documented */

drivers/acpi/nfit.h+5−5

@@ -53,12 +53,12 @@ enum nfit_uuids { · 52 unmodified lines
53	53	};
54	54
55	55	/*
56		− * Region format interface codes are stored as an array of bytes in the
57		− * NFIT DIMM Control Region structure
	56	+ * Region format interface codes are stored with the interface as the
	57	+ * LSB and the function as the MSB.
58	58	*/
59		−#define NFIT_FIC_BYTE cpu_to_be16(0x101) /* byte-addressable energy backed */
60		−#define NFIT_FIC_BLK cpu_to_be16(0x201) /* block-addressable non-energy backed */
61		−#define NFIT_FIC_BYTEN cpu_to_be16(0x301) /* byte-addressable non-energy backed */
	59	+#define NFIT_FIC_BYTE cpu_to_le16(0x101) /* byte-addressable energy backed */
	60	+#define NFIT_FIC_BLK cpu_to_le16(0x201) /* block-addressable non-energy backed */
	61	+#define NFIT_FIC_BYTEN cpu_to_le16(0x301) /* byte-addressable non-energy backed */
62	62
63	63	enum {
64	64	NFIT_BLK_READ_FLUSH = 1,

drivers/acpi/pci_link.c+1−1

@@ -839,7 +839,7 @@ void acpi_penalize_isa_irq(int irq, int active) · 838 unmodified lines
839	839	{
840	840	if ((irq >= 0) && (irq < ARRAY_SIZE(acpi_isa_irq_penalty)))
841	841	acpi_isa_irq_penalty[irq] = acpi_irq_get_penalty(irq) +
842		− active ? PIRQ_PENALTY_ISA_USED : PIRQ_PENALTY_PCI_USING;
	842	+ (active ? PIRQ_PENALTY_ISA_USED : PIRQ_PENALTY_PCI_USING);
843	843	}
844	844
845	845	bool acpi_isa_irq_available(int irq)

drivers/acpi/utils.c+3−3

@@ -680,9 +680,6 @@ bool acpi_check_dsm(acpi_handle handle, const u8 *uuid, u64 rev, u64 funcs) · 679 unmodified lines
680	680	u64 mask = 0;
681	681	union acpi_object *obj;
682	682
683		− if (funcs == 0)
684		− return false;
685		−
686	683	obj = acpi_evaluate_dsm(handle, uuid, rev, 0, NULL);
687	684	if (!obj)
688	685	return false;
@@ -695,6 +692,9 @@ bool acpi_check_dsm(acpi_handle handle, const u8 *uuid, u64 rev, u64 funcs) · 6 unmodified lines
695	692	mask \|= (((u64)obj->buffer.pointer[i]) << (i * 8));
696	693	ACPI_FREE(obj);
697	694
	695	+ if (funcs == 0)
	696	+ return true;
	697	+
698	698	/*
699	699	* Bit 0 indicates whether there's support for any functions other than
700	700	* function 0 for the specified UUID and revision.

drivers/clk/clk-oxnas.c+2−2

@@ -144,9 +144,9 @@ static int oxnas_stdclk_probe(struct platform_device *pdev) · 143 unmodified lines
144	144	return -ENOMEM;
145	145
146	146	regmap = syscon_node_to_regmap(of_get_parent(np));
147		− if (!regmap) {
	147	+ if (IS_ERR(regmap)) {
148	148	dev_err(&pdev->dev, "failed to have parent regmap\n");
149		− return -EINVAL;
	149	+ return PTR_ERR(regmap);
150	150	}
151	151
152	152	for (i = 0; i < ARRAY_SIZE(clk_oxnas_init); i++) {

drivers/clk/rockchip/clk-cpu.c+2−2

@@ -321,9 +321,9 @@ struct clk rockchip_clk_register_cpuclk(const char name, · 320 unmodified lines
321	321	}
322	322
323	323	cclk = clk_register(NULL, &cpuclk->hw);
324		− if (IS_ERR(clk)) {
	324	+ if (IS_ERR(cclk)) {
325	325	pr_err("%s: could not register cpuclk %s\n", __func__, name);
326		− ret = PTR_ERR(clk);
	326	+ ret = PTR_ERR(cclk);
327	327	goto free_rate_table;
328	328	}
329	329

drivers/clk/rockchip/clk-mmc-phase.c+1−11

@@ -41,8 +41,6 @@ static unsigned long rockchip_mmc_recalc(struct clk_hw *hw, · 40 unmodified lines
41	41	#define ROCKCHIP_MMC_DEGREE_MASK 0x3
42	42	#define ROCKCHIP_MMC_DELAYNUM_OFFSET 2
43	43	#define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
44		−#define ROCKCHIP_MMC_INIT_STATE_RESET 0x1
45		−#define ROCKCHIP_MMC_INIT_STATE_SHIFT 1
46	44
47	45	#define PSECS_PER_SEC 1000000000000LL
48	46
@@ -154,6 +152,7 @@ struct clk rockchip_clk_register_mmc(const char name, · 105 unmodified lines
154	152	return ERR_PTR(-ENOMEM);
155	153
156	154	init.name = name;
	155	+ init.flags = 0;
157	156	init.num_parents = num_parents;
158	157	init.parent_names = parent_names;
159	158	init.ops = &rockchip_mmc_clk_ops;
@@ -162,15 +161,6 @@ struct clk rockchip_clk_register_mmc(const char name, · 2 unmodified lines
162	161	mmc_clock->reg = reg;
163	162	mmc_clock->shift = shift;
164	163
165		− /*
166		− * Assert init_state to soft reset the CLKGEN
167		− * for mmc tuning phase and degree
168		− */
169		− if (mmc_clock->shift == ROCKCHIP_MMC_INIT_STATE_SHIFT)
170		− writel(HIWORD_UPDATE(ROCKCHIP_MMC_INIT_STATE_RESET,
171		− ROCKCHIP_MMC_INIT_STATE_RESET,
172		− mmc_clock->shift), mmc_clock->reg);
173		−
174	164	clk = clk_register(NULL, &mmc_clock->hw);
175	165	if (IS_ERR(clk))
176	166	kfree(mmc_clock);

drivers/clk/rockchip/clk-rk3399.c+6−2

@@ -832,9 +832,9 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = { · 831 unmodified lines
832	832	RK3399_CLKGATE_CON(13), 1, GFLAGS),
833	833
834	834	/* perihp */
835		− GATE(0, "cpll_aclk_perihp_src", "gpll", CLK_IGNORE_UNUSED,
	835	+ GATE(0, "cpll_aclk_perihp_src", "cpll", CLK_IGNORE_UNUSED,
836	836	RK3399_CLKGATE_CON(5), 0, GFLAGS),
837		− GATE(0, "gpll_aclk_perihp_src", "cpll", CLK_IGNORE_UNUSED,
	837	+ GATE(0, "gpll_aclk_perihp_src", "gpll", CLK_IGNORE_UNUSED,
838	838	RK3399_CLKGATE_CON(5), 1, GFLAGS),
839	839	COMPOSITE(ACLK_PERIHP, "aclk_perihp", mux_aclk_perihp_p, CLK_IGNORE_UNUSED,
840	840	RK3399_CLKSEL_CON(14), 7, 1, MFLAGS, 0, 5, DFLAGS,
@@ -1466,6 +1466,8 @@ static struct rockchip_clk_branch rk3399_clk_pmu_branches[] __initdata = { · 625 unmodified lines
1466	1466
1467	1467	static const char *const rk3399_cru_critical_clocks[] __initconst = {
1468	1468	"aclk_cci_pre",
	1469	+ "aclk_gic",
	1470	+ "aclk_gic_noc",
1469	1471	"pclk_perilp0",
1470	1472	"pclk_perilp0",
1471	1473	"hclk_perilp0",
@@ -1508,6 +1510,7 @@ static void __init rk3399_clk_init(struct device_node *np) · 36 unmodified lines
1508	1510	ctx = rockchip_clk_init(np, reg_base, CLK_NR_CLKS);
1509	1511	if (IS_ERR(ctx)) {
1510	1512	pr_err("%s: rockchip clk init failed\n", __func__);
	1513	+ iounmap(reg_base);
1511	1514	return;
1512	1515	}
1513	1516
@@ -1553,6 +1556,7 @@ static void __init rk3399_pmu_clk_init(struct device_node *np) · 39 unmodified lines
1553	1556	ctx = rockchip_clk_init(np, reg_base, CLKPMU_NR_CLKS);
1554	1557	if (IS_ERR(ctx)) {
1555	1558	pr_err("%s: rockchip pmu clk init failed\n", __func__);
	1559	+ iounmap(reg_base);
1556	1560	return;
1557	1561	}
1558	1562

drivers/cpufreq/cpufreq-dt-platdev.c+4−3

@@ -79,15 +79,16 @@ static const struct of_device_id machines[] __initconst = { · 78 unmodified lines
79	79	static int __init cpufreq_dt_platdev_init(void)
80	80	{
81	81	struct device_node *np = of_find_node_by_path("/");
	82	+ const struct of_device_id *match;
82	83
83	84	if (!np)
84	85	return -ENODEV;
85	86
86		− if (!of_match_node(machines, np))
	87	+ match = of_match_node(machines, np);
	88	+ of_node_put(np);
	89	+ if (!match)
87	90	return -ENODEV;
88	91
89		− of_node_put(of_root);
90		−
91	92	return PTR_ERR_OR_ZERO(platform_device_register_simple("cpufreq-dt", -1,
92	93	NULL, 0));
93	94	}

drivers/cpufreq/cpufreq.c+4−0

@@ -2261,6 +2261,10 @@ int cpufreq_update_policy(unsigned int cpu) · 2260 unmodified lines
2261	2261	* -> ask driver for current freq and notify governors about a change
2262	2262	*/
2263	2263	if (cpufreq_driver->get && !cpufreq_driver->setpolicy) {
	2264	+ if (cpufreq_suspended) {
	2265	+ ret = -EAGAIN;
	2266	+ goto unlock;
	2267	+ }
2264	2268	new_policy.cur = cpufreq_update_current_freq(policy);
2265	2269	if (WARN_ON(!new_policy.cur)) {
2266	2270	ret = -EIO;

drivers/cpufreq/intel_pstate.c+3−2

@@ -1400,6 +1400,9 @@ static void intel_pstate_set_update_util_hook(unsigned int cpu_num) · 1399 unmodified lines
1400	1400	{
1401	1401	struct cpudata *cpu = all_cpu_data[cpu_num];
1402	1402
	1403	+ if (cpu->update_util_set)
	1404	+ return;
	1405	+
1403	1406	/* Prevent intel_pstate_update_util() from using stale data. */
1404	1407	cpu->sample.time = 0;
1405	1408	cpufreq_add_update_util_hook(cpu_num, &cpu->update_util,
@@ -1440,8 +1443,6 @@ static int intel_pstate_set_policy(struct cpufreq_policy *policy) · 34 unmodified lines
1440	1443	if (!policy->cpuinfo.max_freq)
1441	1444	return -ENODEV;
1442	1445
1443		− intel_pstate_clear_update_util_hook(policy->cpu);
1444		−
1445	1446	pr_debug("set_policy cpuinfo.max %u policy->max %u\n",
1446	1447	policy->cpuinfo.max_freq, policy->max);
1447	1448

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c+4−0

@@ -1106,6 +1106,10 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work) · 1105 unmodified lines
1106	1106	if (fences == 0 && handles == 0) {
1107	1107	if (adev->pm.dpm_enabled) {
1108	1108	amdgpu_dpm_enable_uvd(adev, false);
	1109	+ /* just work around for uvd clock remain high even
	1110	+ * when uvd dpm disabled on Polaris10 */
	1111	+ if (adev->asic_type == CHIP_POLARIS10)
	1112	+ amdgpu_asic_set_uvd_clocks(adev, 0, 0);
1109	1113	} else {
1110	1114	amdgpu_asic_set_uvd_clocks(adev, 0, 0);
1111	1115	}

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c+3−0

@@ -47,6 +47,8 @@ · 46 unmodified lines
47	47	#include "dce/dce_10_0_d.h"
48	48	#include "dce/dce_10_0_sh_mask.h"
49	49
	50	+#include "smu/smu_7_1_3_d.h"
	51	+
50	52	#define GFX8_NUM_GFX_RINGS 1
51	53	#define GFX8_NUM_COMPUTE_RINGS 8
52	54
@@ -693,6 +695,7 @@ static void gfx_v8_0_init_golden_registers(struct amdgpu_device *adev) · 640 unmodified lines
693	695	amdgpu_program_register_sequence(adev,
694	696	polaris10_golden_common_all,
695	697	(const u32)ARRAY_SIZE(polaris10_golden_common_all));
	698	+ WREG32_SMC(ixCG_ACLK_CNTL, 0x0000001C);
696	699	break;
697	700	case CHIP_CARRIZO:
698	701	amdgpu_program_register_sequence(adev,

drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c+124−55

@@ -98,6 +98,7 @@ · 97 unmodified lines
98	98	#define PCIE_BUS_CLK 10000
99	99	#define TCLK (PCIE_BUS_CLK / 10)
100	100
	101	+#define CEILING_UCHAR(double) ((double-(uint8_t)(double)) > 0 ? (uint8_t)(double+1) : (uint8_t)(double))
101	102
102	103	static const uint16_t polaris10_clock_stretcher_lookup_table[2][4] =
103	104	{ {600, 1050, 3, 0}, {600, 1050, 6, 1} };
@@ -1422,22 +1423,19 @@ static int polaris10_populate_smc_acpi_level(struct pp_hwmgr *hwmgr, · 1318 unmodified lines
1422	1423
1423	1424	table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC;
1424	1425
1425		− if (!data->sclk_dpm_key_disabled) {
1426		− /* Get MinVoltage and Frequency from DPM0,
1427		− * already converted to SMC_UL */
1428		− sclk_frequency = data->dpm_table.sclk_table.dpm_levels[0].value;
1429		− result = polaris10_get_dependency_volt_by_clk(hwmgr,
1430		− table_info->vdd_dep_on_sclk,
1431		− table->ACPILevel.SclkFrequency,
1432		− &table->ACPILevel.MinVoltage, &mvdd);
1433		− PP_ASSERT_WITH_CODE((0 == result),
1434		− "Cannot find ACPI VDDC voltage value "
1435		− "in Clock Dependency Table", );
1436		− } else {
1437		− sclk_frequency = data->vbios_boot_state.sclk_bootup_value;
1438		− table->ACPILevel.MinVoltage =
1439		− data->vbios_boot_state.vddc_bootup_value * VOLTAGE_SCALE;
1440		− }
	1426	+
	1427	+ /* Get MinVoltage and Frequency from DPM0,
	1428	+ * already converted to SMC_UL */
	1429	+ sclk_frequency = data->dpm_table.sclk_table.dpm_levels[0].value;
	1430	+ result = polaris10_get_dependency_volt_by_clk(hwmgr,
	1431	+ table_info->vdd_dep_on_sclk,
	1432	+ sclk_frequency,
	1433	+ &table->ACPILevel.MinVoltage, &mvdd);
	1434	+ PP_ASSERT_WITH_CODE((0 == result),
	1435	+ "Cannot find ACPI VDDC voltage value "
	1436	+ "in Clock Dependency Table",
	1437	+ );
	1438	+
1441	1439
1442	1440	result = polaris10_calculate_sclk_params(hwmgr, sclk_frequency, &(table->ACPILevel.SclkSetting));
1443	1441	PP_ASSERT_WITH_CODE(result == 0, "Error retrieving Engine Clock dividers from VBIOS.", return result);
@@ -1462,24 +1460,18 @@ static int polaris10_populate_smc_acpi_level(struct pp_hwmgr *hwmgr, · 18 unmodified lines
1462	1460	CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Fcw1_frac);
1463	1461	CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Sclk_ss_slew_rate);
1464	1462
1465		− if (!data->mclk_dpm_key_disabled) {
1466		− /* Get MinVoltage and Frequency from DPM0, already converted to SMC_UL */
1467		− table->MemoryACPILevel.MclkFrequency =
1468		− data->dpm_table.mclk_table.dpm_levels[0].value;
1469		− result = polaris10_get_dependency_volt_by_clk(hwmgr,
1470		− table_info->vdd_dep_on_mclk,
1471		− table->MemoryACPILevel.MclkFrequency,
1472		− &table->MemoryACPILevel.MinVoltage, &mvdd);
1473		− PP_ASSERT_WITH_CODE((0 == result),
1474		− "Cannot find ACPI VDDCI voltage value "
1475		− "in Clock Dependency Table",
1476		− );
1477		− } else {
1478		− table->MemoryACPILevel.MclkFrequency =
1479		− data->vbios_boot_state.mclk_bootup_value;
1480		− table->MemoryACPILevel.MinVoltage =
1481		− data->vbios_boot_state.vddci_bootup_value * VOLTAGE_SCALE;
1482		− }
	1463	+
	1464	+ /* Get MinVoltage and Frequency from DPM0, already converted to SMC_UL */
	1465	+ table->MemoryACPILevel.MclkFrequency =
	1466	+ data->dpm_table.mclk_table.dpm_levels[0].value;
	1467	+ result = polaris10_get_dependency_volt_by_clk(hwmgr,
	1468	+ table_info->vdd_dep_on_mclk,
	1469	+ table->MemoryACPILevel.MclkFrequency,
	1470	+ &table->MemoryACPILevel.MinVoltage, &mvdd);
	1471	+ PP_ASSERT_WITH_CODE((0 == result),
	1472	+ "Cannot find ACPI VDDCI voltage value "
	1473	+ "in Clock Dependency Table",
	1474	+ );
1483	1475
1484	1476	us_mvdd = 0;
1485	1477	if ((POLARIS10_VOLTAGE_CONTROL_NONE == data->mvdd_control) \|\|
@@ -1524,6 +1516,7 @@ static int polaris10_populate_smc_vce_level(struct pp_hwmgr *hwmgr, · 38 unmodified lines
1524	1516	struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
1525	1517	table_info->mm_dep_table;
1526	1518	struct polaris10_hwmgr data = (struct polaris10_hwmgr )(hwmgr->backend);
	1519	+ uint32_t vddci;
1527	1520
1528	1521	table->VceLevelCount = (uint8_t)(mm_table->count);
1529	1522	table->VceBootLevel = 0;
@@ -1533,9 +1526,18 @@ static int polaris10_populate_smc_vce_level(struct pp_hwmgr *hwmgr, · 3 unmodified lines
1533	1526	table->VceLevel[count].MinVoltage = 0;
1534	1527	table->VceLevel[count].MinVoltage \|=
1535	1528	(mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT;
	1529	+
	1530	+ if (POLARIS10_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control)
	1531	+ vddci = (uint32_t)phm_find_closest_vddci(&(data->vddci_voltage_table),
	1532	+ mm_table->entries[count].vddc - VDDC_VDDCI_DELTA);
	1533	+ else if (POLARIS10_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control)
	1534	+ vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA;
	1535	+ else
	1536	+ vddci = (data->vbios_boot_state.vddci_bootup_value * VOLTAGE_SCALE) << VDDCI_SHIFT;
	1537	+
	1538	+
1536	1539	table->VceLevel[count].MinVoltage \|=
1537		− ((mm_table->entries[count].vddc - data->vddc_vddci_delta) *
1538		− VOLTAGE_SCALE) << VDDCI_SHIFT;
	1540	+ (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT;
1539	1541	table->VceLevel[count].MinVoltage \|= 1 << PHASES_SHIFT;
1540	1542
1541	1543	/retrieve divider value for VBIOS /
@@ -1564,6 +1566,7 @@ static int polaris10_populate_smc_samu_level(struct pp_hwmgr *hwmgr, · 22 unmodified lines
1564	1566	struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
1565	1567	table_info->mm_dep_table;
1566	1568	struct polaris10_hwmgr data = (struct polaris10_hwmgr )(hwmgr->backend);
	1569	+ uint32_t vddci;
1567	1570
1568	1571	table->SamuBootLevel = 0;
1569	1572	table->SamuLevelCount = (uint8_t)(mm_table->count);
@@ -1574,8 +1577,16 @@ static int polaris10_populate_smc_samu_level(struct pp_hwmgr *hwmgr, · 4 unmodified lines
1574	1577	table->SamuLevel[count].Frequency = mm_table->entries[count].samclock;
1575	1578	table->SamuLevel[count].MinVoltage \|= (mm_table->entries[count].vddc *
1576	1579	VOLTAGE_SCALE) << VDDC_SHIFT;
1577		− table->SamuLevel[count].MinVoltage \|= ((mm_table->entries[count].vddc -
1578		− data->vddc_vddci_delta) * VOLTAGE_SCALE) << VDDCI_SHIFT;
	1580	+
	1581	+ if (POLARIS10_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control)
	1582	+ vddci = (uint32_t)phm_find_closest_vddci(&(data->vddci_voltage_table),
	1583	+ mm_table->entries[count].vddc - VDDC_VDDCI_DELTA);
	1584	+ else if (POLARIS10_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control)
	1585	+ vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA;
	1586	+ else
	1587	+ vddci = (data->vbios_boot_state.vddci_bootup_value * VOLTAGE_SCALE) << VDDCI_SHIFT;
	1588	+
	1589	+ table->SamuLevel[count].MinVoltage \|= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT;
1579	1590	table->SamuLevel[count].MinVoltage \|= 1 << PHASES_SHIFT;
1580	1591
1581	1592	/* retrieve divider value for VBIOS */
@@ -1658,6 +1669,7 @@ static int polaris10_populate_smc_uvd_level(struct pp_hwmgr *hwmgr, · 76 unmodified lines
1658	1669	struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
1659	1670	table_info->mm_dep_table;
1660	1671	struct polaris10_hwmgr data = (struct polaris10_hwmgr )(hwmgr->backend);
	1672	+ uint32_t vddci;
1661	1673
1662	1674	table->UvdLevelCount = (uint8_t)(mm_table->count);
1663	1675	table->UvdBootLevel = 0;
@@ -1668,8 +1680,16 @@ static int polaris10_populate_smc_uvd_level(struct pp_hwmgr *hwmgr, · 4 unmodified lines
1668	1680	table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk;
1669	1681	table->UvdLevel[count].MinVoltage \|= (mm_table->entries[count].vddc *
1670	1682	VOLTAGE_SCALE) << VDDC_SHIFT;
1671		− table->UvdLevel[count].MinVoltage \|= ((mm_table->entries[count].vddc -
1672		− data->vddc_vddci_delta) * VOLTAGE_SCALE) << VDDCI_SHIFT;
	1683	+
	1684	+ if (POLARIS10_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control)
	1685	+ vddci = (uint32_t)phm_find_closest_vddci(&(data->vddci_voltage_table),
	1686	+ mm_table->entries[count].vddc - VDDC_VDDCI_DELTA);
	1687	+ else if (POLARIS10_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control)
	1688	+ vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA;
	1689	+ else
	1690	+ vddci = (data->vbios_boot_state.vddci_bootup_value * VOLTAGE_SCALE) << VDDCI_SHIFT;
	1691	+
	1692	+ table->UvdLevel[count].MinVoltage \|= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT;
1673	1693	table->UvdLevel[count].MinVoltage \|= 1 << PHASES_SHIFT;
1674	1694
1675	1695	/* retrieve divider value for VBIOS */
@@ -1690,8 +1710,8 @@ static int polaris10_populate_smc_uvd_level(struct pp_hwmgr *hwmgr, · 14 unmodified lines
1690	1710	CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency);
1691	1711	CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency);
1692	1712	CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].MinVoltage);
1693		−
1694	1713	}
	1714	+
1695	1715	return result;
1696	1716	}
1697	1717
@@ -1787,24 +1807,32 @@ static int polaris10_populate_clock_stretcher_data_table(struct pp_hwmgr *hwmgr) · 89 unmodified lines
1787	1807
1788	1808	ro = efuse * (max -min)/255 + min;
1789	1809
1790		− /* Populate Sclk_CKS_masterEn0_7 and Sclk_voltageOffset */
	1810	+ /* Populate Sclk_CKS_masterEn0_7 and Sclk_voltageOffset
	1811	+ * there is a little difference in calculating
	1812	+ * volt_with_cks with windows */
1791	1813	for (i = 0; i < sclk_table->count; i++) {
1792	1814	data->smc_state_table.Sclk_CKS_masterEn0_7 \|=
1793	1815	sclk_table->entries[i].cks_enable << i;
1794		−
1795		− volt_without_cks = (uint32_t)(((ro - 40) * 1000 - 2753594 - sclk_table->entries[i].clk/100 * 136418 /1000) / \
1796		− (sclk_table->entries[i].clk/100 * 1132925 /10000 - 242418)/100);
1797		−
1798		− volt_with_cks = (uint32_t)((ro * 1000 -2396351 - sclk_table->entries[i].clk/100 * 329021/1000) / \
1799		− (sclk_table->entries[i].clk/10000 * 649434 /1000 - 18005)/10);
	1816	+ if (hwmgr->chip_id == CHIP_POLARIS10) {
	1817	+ volt_without_cks = (uint32_t)((2753594000 + (sclk_table->entries[i].clk/100) * 136418 -(ro - 70) * 1000000) / \
	1818	+ (2424180 - (sclk_table->entries[i].clk/100) * 1132925/1000));
	1819	+ volt_with_cks = (uint32_t)((279720200 + sclk_table->entries[i].clk * 3232 - (ro - 65) * 100000000) / \
	1820	+ (252248000 - sclk_table->entries[i].clk/100 * 115764));
	1821	+ } else {
	1822	+ volt_without_cks = (uint32_t)((2416794800 + (sclk_table->entries[i].clk/100) * 1476925/10 -(ro - 50) * 1000000) / \
	1823	+ (2625416 - (sclk_table->entries[i].clk/100) * 12586807/10000));
	1824	+ volt_with_cks = (uint32_t)((2999656000 + sclk_table->entries[i].clk * 392803/100 - (ro - 44) * 1000000) / \
	1825	+ (3422454 - sclk_table->entries[i].clk/100 * 18886376/10000));
	1826	+ }
1800	1827
1801	1828	if (volt_without_cks >= volt_with_cks)
1802		− volt_offset = (uint8_t)(((volt_without_cks - volt_with_cks +
1803		− sclk_table->entries[i].cks_voffset) * 100 / 625) + 1);
	1829	+ volt_offset = (uint8_t)CEILING_UCHAR((volt_without_cks - volt_with_cks +
	1830	+ sclk_table->entries[i].cks_voffset) * 100 / 625);
1804	1831
1805	1832	data->smc_state_table.Sclk_voltageOffset[i] = volt_offset;
1806	1833	}
1807	1834
	1835	+ data->smc_state_table.LdoRefSel = (table_info->cac_dtp_table->ucCKS_LDO_REFSEL != 0) ? table_info->cac_dtp_table->ucCKS_LDO_REFSEL : 6;
1808	1836	/* Populate CKS Lookup Table */
1809	1837	if (stretch_amount == 1 \|\| stretch_amount == 2 \|\| stretch_amount == 5)
1810	1838	stretch_amount2 = 0;
@@ -2487,6 +2515,8 @@ int polaris10_enable_dpm_tasks(struct pp_hwmgr *hwmgr) · 676 unmodified lines
2487	2515	PP_ASSERT_WITH_CODE((0 == tmp_result),
2488	2516	"Failed to enable VR hot GPIO interrupt!", result = tmp_result);
2489	2517
	2518	+ smum_send_msg_to_smc(hwmgr->smumgr, (PPSMC_Msg)PPSMC_HasDisplay);
	2519	+
2490	2520	tmp_result = polaris10_enable_sclk_control(hwmgr);
2491	2521	PP_ASSERT_WITH_CODE((0 == tmp_result),
2492	2522	"Failed to enable SCLK control!", result = tmp_result);
@@ -2913,6 +2943,31 @@ static int polaris10_set_private_data_based_on_pptable(struct pp_hwmgr *hwmgr) · 420 unmodified lines
2913	2943	return 0;
2914	2944	}
2915	2945
	2946	+int polaris10_patch_voltage_workaround(struct pp_hwmgr *hwmgr)
	2947	+{
	2948	+ struct phm_ppt_v1_information *table_info =
	2949	+ (struct phm_ppt_v1_information *)(hwmgr->pptable);
	2950	+ struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table =
	2951	+ table_info->vdd_dep_on_mclk;
	2952	+ struct phm_ppt_v1_voltage_lookup_table *lookup_table =
	2953	+ table_info->vddc_lookup_table;
	2954	+ uint32_t i;
	2955	+
	2956	+ if (hwmgr->chip_id == CHIP_POLARIS10 && hwmgr->hw_revision == 0xC7) {
	2957	+ if (lookup_table->entries[dep_mclk_table->entries[dep_mclk_table->count-1].vddInd].us_vdd >= 1000)
	2958	+ return 0;
	2959	+
	2960	+ for (i = 0; i < lookup_table->count; i++) {
	2961	+ if (lookup_table->entries[i].us_vdd < 0xff01 && lookup_table->entries[i].us_vdd >= 1000) {
	2962	+ dep_mclk_table->entries[dep_mclk_table->count-1].vddInd = (uint8_t) i;
	2963	+ return 0;
	2964	+ }
	2965	+ }
	2966	+ }
	2967	+ return 0;
	2968	+}
	2969	+
	2970	+
2916	2971	int polaris10_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
2917	2972	{
2918	2973	struct polaris10_hwmgr data = (struct polaris10_hwmgr )(hwmgr->backend);
@@ -2990,6 +3045,7 @@ int polaris10_hwmgr_backend_init(struct pp_hwmgr *hwmgr) · 71 unmodified lines
2990	3045
2991	3046	polaris10_set_features_platform_caps(hwmgr);
2992	3047
	3048	+ polaris10_patch_voltage_workaround(hwmgr);
2993	3049	polaris10_init_dpm_defaults(hwmgr);
2994	3050
2995	3051	/* Get leakage voltage based on leakage ID. */
@@ -4359,6 +4415,15 @@ static int polaris10_notify_link_speed_change_after_state_change( · 1363 unmodified lines
4359	4415	return 0;
4360	4416	}
4361	4417
	4418	+static int polaris10_notify_smc_display(struct pp_hwmgr *hwmgr)
	4419	+{
	4420	+ struct polaris10_hwmgr data = (struct polaris10_hwmgr )(hwmgr->backend);
	4421	+
	4422	+ smum_send_msg_to_smc_with_parameter(hwmgr->smumgr,
	4423	+ (PPSMC_Msg)PPSMC_MSG_SetVBITimeout, data->frame_time_x2);
	4424	+ return (smum_send_msg_to_smc(hwmgr->smumgr, (PPSMC_Msg)PPSMC_HasDisplay) == 0) ? 0 : -EINVAL;
	4425	+}
	4426	+
4362	4427	static int polaris10_set_power_state_tasks(struct pp_hwmgr hwmgr, const void input)
4363	4428	{
4364	4429	int tmp_result, result = 0;
@@ -4407,6 +4472,11 @@ static int polaris10_set_power_state_tasks(struct pp_hwmgr hwmgr, const void i · 42 unmodified lines
4407	4472	"Failed to program memory timing parameters!",
4408	4473	result = tmp_result);
4409	4474
	4475	+ tmp_result = polaris10_notify_smc_display(hwmgr);
	4476	+ PP_ASSERT_WITH_CODE((0 == tmp_result),
	4477	+ "Failed to notify smc display settings!",
	4478	+ result = tmp_result);
	4479	+
4410	4480	tmp_result = polaris10_unfreeze_sclk_mclk_dpm(hwmgr);
4411	4481	PP_ASSERT_WITH_CODE((0 == tmp_result),
4412	4482	"Failed to unfreeze SCLK MCLK DPM!",
@@ -4441,6 +4511,7 @@ static int polaris10_set_max_fan_pwm_output(struct pp_hwmgr *hwmgr, uint16_t us_ · 28 unmodified lines
4441	4511	PPSMC_MSG_SetFanPwmMax, us_max_fan_pwm);
4442	4512	}
4443	4513
	4514	+
4444	4515	int polaris10_notify_smc_display_change(struct pp_hwmgr *hwmgr, bool has_display)
4445	4516	{
4446	4517	PPSMC_Msg msg = has_display ? (PPSMC_Msg)PPSMC_HasDisplay : (PPSMC_Msg)PPSMC_NoDisplay;
@@ -4460,8 +4531,6 @@ int polaris10_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwm · 13 unmodified lines
4460	4531
4461	4532	if (num_active_displays > 1) /* to do && (pHwMgr->pPECI->displayConfiguration.bMultiMonitorInSync != TRUE)) */
4462	4533	polaris10_notify_smc_display_change(hwmgr, false);
4463		− else
4464		− polaris10_notify_smc_display_change(hwmgr, true);
4465	4534
4466	4535	return 0;
4467	4536	}
@@ -4502,6 +4571,8 @@ int polaris10_program_display_gap(struct pp_hwmgr *hwmgr) · 34 unmodified lines
4502	4571	frame_time_in_us = 1000000 / refresh_rate;
4503	4572
4504	4573	pre_vbi_time_in_us = frame_time_in_us - 200 - mode_info.vblank_time_us;
	4574	+ data->frame_time_x2 = frame_time_in_us * 2 / 100;
	4575	+
4505	4576	display_gap2 = pre_vbi_time_in_us * (ref_clock / 100);
4506	4577
4507	4578	cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_DISPLAY_GAP_CNTL2, display_gap2);
@@ -4510,8 +4581,6 @@ int polaris10_program_display_gap(struct pp_hwmgr *hwmgr) · 2 unmodified lines
4510	4581
4511	4582	cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, data->soft_regs_start + offsetof(SMU74_SoftRegisters, VBlankTimeout), (frame_time_in_us - pre_vbi_time_in_us));
4512	4583
4513		− polaris10_notify_smc_display_change(hwmgr, num_active_displays != 0);
4514		−
4515	4584	return 0;
4516	4585	}
4517	4586
@@ -4623,7 +4692,7 @@ int polaris10_upload_mc_firmware(struct pp_hwmgr *hwmgr) · 105 unmodified lines
4623	4692	return 0;
4624	4693	}
4625	4694
4626		− data->need_long_memory_training = true;
	4695	+ data->need_long_memory_training = false;
4627	4696
4628	4697	/*
4629	4698	* PPMCME_FirmwareDescriptorEntry *pfd = NULL;

drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.h+1−0

@@ -315,6 +315,7 @@ struct polaris10_hwmgr { · 314 unmodified lines
315	315
316	316	uint32_t avfs_vdroop_override_setting;
317	317	bool apply_avfs_cks_off_voltage;
	318	+ uint32_t frame_time_x2;
318	319	};
319	320
320	321	/* To convert to Q8.8 format for firmware */

drivers/gpu/drm/amd/powerplay/inc/hwmgr.h+2−0

@@ -411,6 +411,8 @@ struct phm_cac_tdp_table { · 410 unmodified lines
411	411	uint8_t ucVr_I2C_Line;
412	412	uint8_t ucPlx_I2C_address;
413	413	uint8_t ucPlx_I2C_Line;
	414	+ uint32_t usBoostPowerLimit;
	415	+ uint8_t ucCKS_LDO_REFSEL;
414	416	};
415	417
416	418	struct phm_ppm_table {

drivers/gpu/drm/amd/powerplay/inc/polaris10_ppsmc.h+2−0

@@ -392,6 +392,8 @@ typedef uint16_t PPSMC_Result; · 391 unmodified lines
392	392	#define PPSMC_MSG_SetGpuPllDfsForSclk ((uint16_t) 0x300)
393	393	#define PPSMC_MSG_Didt_Block_Function ((uint16_t) 0x301)
394	394
	395	+#define PPSMC_MSG_SetVBITimeout ((uint16_t) 0x306)
	396	+
395	397	#define PPSMC_MSG_SecureSRBMWrite ((uint16_t) 0x600)
396	398	#define PPSMC_MSG_SecureSRBMRead ((uint16_t) 0x601)
397	399	#define PPSMC_MSG_SetAddress ((uint16_t) 0x800)

drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h+2−1

@@ -270,7 +270,8 @@ struct SMU74_Discrete_DpmTable { · 269 unmodified lines
270	270	uint8_t BootPhases;
271	271
272	272	uint8_t VRHotLevel;
273		− uint8_t Reserved1[3];
	273	+ uint8_t LdoRefSel;
	274	+ uint8_t Reserved1[2];
274	275	uint16_t FanStartTemperature;
275	276	uint16_t FanStopTemperature;
276	277	uint16_t MaxVoltage;

drivers/gpu/drm/i915/i915_debugfs.c+2−2

@@ -2365,16 +2365,16 @@ static int i915_ppgtt_info(struct seq_file m, void data) · 2364 unmodified lines
2365	2365	task = get_pid_task(file->pid, PIDTYPE_PID);
2366	2366	if (!task) {
2367	2367	ret = -ESRCH;
2368		− goto out_put;
	2368	+ goto out_unlock;
2369	2369	}
2370	2370	seq_printf(m, "\nproc: %s\n", task->comm);
2371	2371	put_task_struct(task);
2372	2372	idr_for_each(&file_priv->context_idr, per_file_ctx,
2373	2373	(void *)(unsigned long)m);
2374	2374	}
	2375	+out_unlock:
2375	2376	mutex_unlock(&dev->filelist_mutex);
2376	2377
2377		−out_put:
2378	2378	intel_runtime_pm_put(dev_priv);
2379	2379	mutex_unlock(&dev->struct_mutex);
2380	2380

drivers/gpu/drm/i915/intel_display.c+8−8

@@ -8447,16 +8447,16 @@ static void lpt_reset_fdi_mphy(struct drm_i915_private *dev_priv) · 8446 unmodified lines
8447	8447	tmp \|= FDI_MPHY_IOSFSB_RESET_CTL;
8448	8448	I915_WRITE(SOUTH_CHICKEN2, tmp);
8449	8449
8450		− if (wait_for_atomic_us(I915_READ(SOUTH_CHICKEN2) &
8451		− FDI_MPHY_IOSFSB_RESET_STATUS, 100))
	8450	+ if (wait_for_us(I915_READ(SOUTH_CHICKEN2) &
	8451	+ FDI_MPHY_IOSFSB_RESET_STATUS, 100))
8452	8452	DRM_ERROR("FDI mPHY reset assert timeout\n");
8453	8453
8454	8454	tmp = I915_READ(SOUTH_CHICKEN2);
8455	8455	tmp &= ~FDI_MPHY_IOSFSB_RESET_CTL;
8456	8456	I915_WRITE(SOUTH_CHICKEN2, tmp);
8457	8457
8458		− if (wait_for_atomic_us((I915_READ(SOUTH_CHICKEN2) &
8459		− FDI_MPHY_IOSFSB_RESET_STATUS) == 0, 100))
	8458	+ if (wait_for_us((I915_READ(SOUTH_CHICKEN2) &
	8459	+ FDI_MPHY_IOSFSB_RESET_STATUS) == 0, 100))
8460	8460	DRM_ERROR("FDI mPHY reset de-assert timeout\n");
8461	8461	}
8462	8462
@@ -9440,8 +9440,8 @@ static void hsw_disable_lcpll(struct drm_i915_private *dev_priv, · 977 unmodified lines
9440	9440	val \|= LCPLL_CD_SOURCE_FCLK;
9441	9441	I915_WRITE(LCPLL_CTL, val);
9442	9442
9443		− if (wait_for_atomic_us(I915_READ(LCPLL_CTL) &
9444		− LCPLL_CD_SOURCE_FCLK_DONE, 1))
	9443	+ if (wait_for_us(I915_READ(LCPLL_CTL) &
	9444	+ LCPLL_CD_SOURCE_FCLK_DONE, 1))
9445	9445	DRM_ERROR("Switching to FCLK failed\n");
9446	9446
9447	9447	val = I915_READ(LCPLL_CTL);
@@ -9514,8 +9514,8 @@ static void hsw_restore_lcpll(struct drm_i915_private *dev_priv) · 66 unmodified lines
9514	9514	val &= ~LCPLL_CD_SOURCE_FCLK;
9515	9515	I915_WRITE(LCPLL_CTL, val);
9516	9516
9517		− if (wait_for_atomic_us((I915_READ(LCPLL_CTL) &
9518		− LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1))
	9517	+ if (wait_for_us((I915_READ(LCPLL_CTL) &
	9518	+ LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1))
9519	9519	DRM_ERROR("Switching back to LCPLL failed\n");
9520	9520	}
9521	9521

drivers/gpu/drm/i915/intel_dp.c+6−4

@@ -663,7 +663,7 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp, bool has_aux_irq) · 662 unmodified lines
663	663	done = wait_event_timeout(dev_priv->gmbus_wait_queue, C,
664	664	msecs_to_jiffies_timeout(10));
665	665	else
666		− done = wait_for_atomic(C, 10) == 0;
	666	+ done = wait_for(C, 10) == 0;
667	667	if (!done)
668	668	DRM_ERROR("dp aux hw did not signal timeout (has irq: %i)!\n",
669	669	has_aux_irq);
@@ -4899,13 +4899,15 @@ static void intel_edp_panel_vdd_sanitize(struct intel_dp *intel_dp) · 4229 unmodified lines
4899	4899
4900	4900	void intel_dp_encoder_reset(struct drm_encoder *encoder)
4901	4901	{
4902		− struct intel_dp *intel_dp;
	4902	+ struct drm_i915_private *dev_priv = to_i915(encoder->dev);
	4903	+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
	4904	+
	4905	+ if (!HAS_DDI(dev_priv))
	4906	+ intel_dp->DP = I915_READ(intel_dp->output_reg);
4903	4907
4904	4908	if (to_intel_encoder(encoder)->type != INTEL_OUTPUT_EDP)
4905	4909	return;
4906	4910
4907		− intel_dp = enc_to_intel_dp(encoder);
4908		−
4909	4911	pps_lock(intel_dp);
4910	4912
4911	4913	/*

drivers/gpu/drm/i915/intel_dpll_mgr.c+2−2

@@ -1377,8 +1377,8 @@ static void bxt_ddi_pll_enable(struct drm_i915_private *dev_priv, · 1376 unmodified lines
1377	1377	I915_WRITE(BXT_PORT_PLL_ENABLE(port), temp);
1378	1378	POSTING_READ(BXT_PORT_PLL_ENABLE(port));
1379	1379
1380		− if (wait_for_atomic_us((I915_READ(BXT_PORT_PLL_ENABLE(port)) &
1381		− PORT_PLL_LOCK), 200))
	1380	+ if (wait_for_us((I915_READ(BXT_PORT_PLL_ENABLE(port)) & PORT_PLL_LOCK),
	1381	+ 200))
1382	1382	DRM_ERROR("PLL %d not locked\n", port);
1383	1383
1384	1384	/*

drivers/iio/accel/kxsd9.c+2−2

@@ -81,7 +81,7 @@ static int kxsd9_write_scale(struct iio_dev *indio_dev, int micro) · 80 unmodified lines
81	81
82	82	mutex_lock(&st->buf_lock);
83	83	ret = spi_w8r8(st->us, KXSD9_READ(KXSD9_REG_CTRL_C));
84		− if (ret)
	84	+ if (ret < 0)
85	85	goto error_ret;
86	86	st->tx[0] = KXSD9_WRITE(KXSD9_REG_CTRL_C);
87	87	st->tx[1] = (ret & ~KXSD9_FS_MASK) \| i;
@@ -163,7 +163,7 @@ static int kxsd9_read_raw(struct iio_dev *indio_dev, · 75 unmodified lines
163	163	break;
164	164	case IIO_CHAN_INFO_SCALE:
165	165	ret = spi_w8r8(st->us, KXSD9_READ(KXSD9_REG_CTRL_C));
166		− if (ret)
	166	+ if (ret < 0)
167	167	goto error_ret;
168	168	*val2 = kxsd9_micro_scales[ret & KXSD9_FS_MASK];
169	169	ret = IIO_VAL_INT_PLUS_MICRO;

drivers/iio/adc/ad7266.c+5−2

@@ -396,8 +396,8 @@ static int ad7266_probe(struct spi_device *spi) · 395 unmodified lines
396	396
397	397	st = iio_priv(indio_dev);
398	398
399		− st->reg = devm_regulator_get(&spi->dev, "vref");
400		− if (!IS_ERR_OR_NULL(st->reg)) {
	399	+ st->reg = devm_regulator_get_optional(&spi->dev, "vref");
	400	+ if (!IS_ERR(st->reg)) {
401	401	ret = regulator_enable(st->reg);
402	402	if (ret)
403	403	return ret;
@@ -408,6 +408,9 @@ static int ad7266_probe(struct spi_device *spi) · 4 unmodified lines
408	408
409	409	st->vref_mv = ret / 1000;
410	410	} else {
	411	+ /* Any other error indicates that the regulator does exist */
	412	+ if (PTR_ERR(st->reg) != -ENODEV)
	413	+ return PTR_ERR(st->reg);
411	414	/* Use internal reference */
412	415	st->vref_mv = 2500;
413	416	}

drivers/iio/imu/inv_mpu6050/inv_mpu_acpi.c+3−2

@@ -56,6 +56,7 @@ static int asus_acpi_get_sensor_info(struct acpi_device *adev, · 55 unmodified lines
56	56	int i;
57	57	acpi_status status;
58	58	union acpi_object *cpm;
	59	+ int ret;
59	60
60	61	status = acpi_evaluate_object(adev->handle, "CNF0", NULL, &buffer);
61	62	if (ACPI_FAILURE(status))
@@ -82,10 +83,10 @@ static int asus_acpi_get_sensor_info(struct acpi_device *adev, · 20 unmodified lines
82	83	}
83	84	}
84	85	}
85		−
	86	+ ret = cpm->package.count;
86	87	kfree(buffer.pointer);
87	88
88		− return cpm->package.count;
	89	+ return ret;
89	90	}
90	91
91	92	static int acpi_i2c_check_resource(struct acpi_resource ares, void data)

drivers/iommu/amd_iommu_init.c+1−1

@@ -1107,13 +1107,13 @@ static int __init init_iommu_from_acpi(struct amd_iommu *iommu, · 1106 unmodified lines
1107	1107	break;
1108	1108	}
1109	1109
	1110	+ devid = e->devid;
1110	1111	DUMP_printk(" DEV_ACPI_HID(%s[%s])\t\tdevid: %02x:%02x.%x\n",
1111	1112	hid, uid,
1112	1113	PCI_BUS_NUM(devid),
1113	1114	PCI_SLOT(devid),
1114	1115	PCI_FUNC(devid));
1115	1116
1116		− devid = e->devid;
1117	1117	flags = e->flags;
1118	1118
1119	1119	ret = add_acpi_hid_device(hid, uid, &devid, false);

drivers/iommu/intel-iommu.c+1−1

@@ -4607,7 +4607,7 @@ static void free_all_cpu_cached_iovas(unsigned int cpu) · 4606 unmodified lines
4607	4607	if (!iommu)
4608	4608	continue;
4609	4609
4610		− for (did = 0; did < 0xffff; did++) {
	4610	+ for (did = 0; did < cap_ndoms(iommu->cap); did++) {
4611	4611	domain = get_iommu_domain(iommu, did);
4612	4612
4613	4613	if (!domain)

drivers/iommu/iova.c+6−2

@@ -420,8 +420,10 @@ retry: · 419 unmodified lines
420	420
421	421	/* Try replenishing IOVAs by flushing rcache. */
422	422	flushed_rcache = true;
	423	+ preempt_disable();
423	424	for_each_online_cpu(cpu)
424	425	free_cpu_cached_iovas(cpu, iovad);
	426	+ preempt_enable();
425	427	goto retry;
426	428	}
427	429
@@ -749,7 +751,7 @@ static bool __iova_rcache_insert(struct iova_domain *iovad, · 321 unmodified lines
749	751	bool can_insert = false;
750	752	unsigned long flags;
751	753
752		− cpu_rcache = this_cpu_ptr(rcache->cpu_rcaches);
	754	+ cpu_rcache = get_cpu_ptr(rcache->cpu_rcaches);
753	755	spin_lock_irqsave(&cpu_rcache->lock, flags);
754	756
755	757	if (!iova_magazine_full(cpu_rcache->loaded)) {
@@ -779,6 +781,7 @@ static bool __iova_rcache_insert(struct iova_domain *iovad, · 23 unmodified lines
779	781	iova_magazine_push(cpu_rcache->loaded, iova_pfn);
780	782
781	783	spin_unlock_irqrestore(&cpu_rcache->lock, flags);
	784	+ put_cpu_ptr(rcache->cpu_rcaches);
782	785
783	786	if (mag_to_free) {
784	787	iova_magazine_free_pfns(mag_to_free, iovad);
@@ -812,7 +815,7 @@ static unsigned long __iova_rcache_get(struct iova_rcache *rcache, · 27 unmodified lines
812	815	bool has_pfn = false;
813	816	unsigned long flags;
814	817
815		− cpu_rcache = this_cpu_ptr(rcache->cpu_rcaches);
	818	+ cpu_rcache = get_cpu_ptr(rcache->cpu_rcaches);
816	819	spin_lock_irqsave(&cpu_rcache->lock, flags);
817	820
818	821	if (!iova_magazine_empty(cpu_rcache->loaded)) {
@@ -834,6 +837,7 @@ static unsigned long __iova_rcache_get(struct iova_rcache *rcache, · 15 unmodified lines
834	837	iova_pfn = iova_magazine_pop(cpu_rcache->loaded, limit_pfn);
835	838
836	839	spin_unlock_irqrestore(&cpu_rcache->lock, flags);
	840	+ put_cpu_ptr(rcache->cpu_rcaches);
837	841
838	842	return iova_pfn;
839	843	}

drivers/mfd/max77620.c+2−0

@@ -203,6 +203,7 @@ static int max77620_get_fps_period_reg_value(struct max77620_chip *chip, · 202 unmodified lines
203	203	break;
204	204	case MAX77620:
205	205	fps_min_period = MAX77620_FPS_PERIOD_MIN_US;
	206	+ break;
206	207	default:
207	208	return -EINVAL;
208	209	}
@@ -236,6 +237,7 @@ static int max77620_config_fps(struct max77620_chip *chip, · 27 unmodified lines
236	237	break;
237	238	case MAX77620:
238	239	fps_max_period = MAX77620_FPS_PERIOD_MAX_US;
	240	+ break;
239	241	default:
240	242	return -EINVAL;
241	243	}

drivers/net/bonding/bond_3ad.c+7−4

@@ -101,11 +101,14 @@ enum ad_link_speed_type { · 100 unmodified lines
101	101	#define MAC_ADDRESS_EQUAL(A, B) \
102	102	ether_addr_equal_64bits((const u8 )A, (const u8 )B)
103	103
104		−static struct mac_addr null_mac_addr = { { 0, 0, 0, 0, 0, 0 } };
	104	+static const u8 null_mac_addr[ETH_ALEN + 2] __long_aligned = {
	105	+ 0, 0, 0, 0, 0, 0
	106	+};
105	107	static u16 ad_ticks_per_sec;
106	108	static const int ad_delta_in_ticks = (AD_TIMER_INTERVAL * HZ) / 1000;
107	109
108		−static const u8 lacpdu_mcast_addr[ETH_ALEN] = MULTICAST_LACPDU_ADDR;
	110	+static const u8 lacpdu_mcast_addr[ETH_ALEN + 2] __long_aligned =
	111	+ MULTICAST_LACPDU_ADDR;
109	112
110	113	/* ================= main 802.3ad protocol functions ================== */
111	114	static int ad_lacpdu_send(struct port *port);
@@ -1739,7 +1742,7 @@ static void ad_clear_agg(struct aggregator *aggregator) · 1627 unmodified lines
1739	1742	aggregator->is_individual = false;
1740	1743	aggregator->actor_admin_aggregator_key = 0;
1741	1744	aggregator->actor_oper_aggregator_key = 0;
1742		− aggregator->partner_system = null_mac_addr;
	1745	+ eth_zero_addr(aggregator->partner_system.mac_addr_value);
1743	1746	aggregator->partner_system_priority = 0;
1744	1747	aggregator->partner_oper_aggregator_key = 0;
1745	1748	aggregator->receive_state = 0;
@@ -1761,7 +1764,7 @@ static void ad_initialize_agg(struct aggregator *aggregator) · 15 unmodified lines
1761	1764	if (aggregator) {
1762	1765	ad_clear_agg(aggregator);
1763	1766
1764		− aggregator->aggregator_mac_address = null_mac_addr;
	1767	+ eth_zero_addr(aggregator->aggregator_mac_address.mac_addr_value);
1765	1768	aggregator->aggregator_identifier = 0;
1766	1769	aggregator->slave = NULL;
1767	1770	}

drivers/net/bonding/bond_alb.c+2−5

@@ -42,13 +42,10 @@ · 41 unmodified lines
42	42
43	43
44	44
45		−#ifndef __long_aligned
46		−#define __long_aligned __attribute__((aligned((sizeof(long)))))
47		−#endif
48		−static const u8 mac_bcast[ETH_ALEN] __long_aligned = {
	45	+static const u8 mac_bcast[ETH_ALEN + 2] __long_aligned = {
49	46	0xff, 0xff, 0xff, 0xff, 0xff, 0xff
50	47	};
51		−static const u8 mac_v6_allmcast[ETH_ALEN] __long_aligned = {
	48	+static const u8 mac_v6_allmcast[ETH_ALEN + 2] __long_aligned = {
52	49	0x33, 0x33, 0x00, 0x00, 0x00, 0x01
53	50	};
54	51	static const int alb_delta_in_ticks = HZ / ALB_TIMER_TICKS_PER_SEC;

drivers/net/bonding/bond_main.c+1−0

@@ -1584,6 +1584,7 @@ int bond_enslave(struct net_device bond_dev, struct net_device slave_dev) · 1583 unmodified lines
1584	1584	}
1585	1585
1586	1586	/* check for initial state */
	1587	+ new_slave->link = BOND_LINK_NOCHANGE;
1587	1588	if (bond->params.miimon) {
1588	1589	if (bond_check_dev_link(bond, slave_dev, 0) == BMSR_LSTATUS) {
1589	1590	if (bond->params.updelay) {

drivers/net/ethernet/broadcom/bcmsysport.c+1−1

@@ -370,7 +370,7 @@ static void bcm_sysport_get_stats(struct net_device *dev, · 369 unmodified lines
370	370	else
371	371	p = (char *)priv;
372	372	p += s->stat_offset;
373		− data[i] = (u32 )p;
	373	+ data[i] = (unsigned long )p;
374	374	}
375	375	}
376	376

drivers/net/ethernet/chelsio/cxgb4/t4fw_version.h+6−6

@@ -36,8 +36,8 @@ · 35 unmodified lines
36	36	#define __T4FW_VERSION_H__
37	37
38	38	#define T4FW_VERSION_MAJOR 0x01
39		−#define T4FW_VERSION_MINOR 0x0E
40		−#define T4FW_VERSION_MICRO 0x04
	39	+#define T4FW_VERSION_MINOR 0x0F
	40	+#define T4FW_VERSION_MICRO 0x25
41	41	#define T4FW_VERSION_BUILD 0x00
42	42
43	43	#define T4FW_MIN_VERSION_MAJOR 0x01
@@ -45,8 +45,8 @@ · 1 unmodified line
45	45	#define T4FW_MIN_VERSION_MICRO 0x00
46	46
47	47	#define T5FW_VERSION_MAJOR 0x01
48		−#define T5FW_VERSION_MINOR 0x0E
49		−#define T5FW_VERSION_MICRO 0x04
	48	+#define T5FW_VERSION_MINOR 0x0F
	49	+#define T5FW_VERSION_MICRO 0x25
50	50	#define T5FW_VERSION_BUILD 0x00
51	51
52	52	#define T5FW_MIN_VERSION_MAJOR 0x00
@@ -54,8 +54,8 @@ · 1 unmodified line
54	54	#define T5FW_MIN_VERSION_MICRO 0x00
55	55
56	56	#define T6FW_VERSION_MAJOR 0x01
57		−#define T6FW_VERSION_MINOR 0x0E
58		−#define T6FW_VERSION_MICRO 0x04
	57	+#define T6FW_VERSION_MINOR 0x0F
	58	+#define T6FW_VERSION_MICRO 0x25
59	59	#define T6FW_VERSION_BUILD 0x00
60	60
61	61	#define T6FW_MIN_VERSION_MAJOR 0x00

drivers/net/ethernet/intel/e1000e/netdev.c+9−12

@@ -154,16 +154,6 @@ void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val) · 153 unmodified lines
154	154	writel(val, hw->hw_addr + reg);
155	155	}
156	156
157		−static bool e1000e_vlan_used(struct e1000_adapter *adapter)
158		−{
159		− u16 vid;
160		−
161		− for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
162		− return true;
163		−
164		− return false;
165		−}
166		−
167	157	/**
168	158	* e1000_regdump - register printout routine
169	159	* @hw: pointer to the HW structure
@@ -3453,8 +3443,7 @@ static void e1000e_set_rx_mode(struct net_device *netdev) · 3283 unmodified lines
3453	3443
3454	3444	ew32(RCTL, rctl);
3455	3445
3456		− if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX \|\|
3457		− e1000e_vlan_used(adapter))
	3446	+ if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3458	3447	e1000e_vlan_strip_enable(adapter);
3459	3448	else
3460	3449	e1000e_vlan_strip_disable(adapter);
@@ -6927,6 +6916,14 @@ static netdev_features_t e1000_fix_features(struct net_device *netdev, · 3466 unmodified lines
6927	6916	if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
6928	6917	features &= ~NETIF_F_RXFCS;
6929	6918
	6919	+ /* Since there is no support for separate Rx/Tx vlan accel
	6920	+ * enable/disable make sure Tx flag is always in same state as Rx.
	6921	+ */
	6922	+ if (features & NETIF_F_HW_VLAN_CTAG_RX)
	6923	+ features \|= NETIF_F_HW_VLAN_CTAG_TX;
	6924	+ else
	6925	+ features &= ~NETIF_F_HW_VLAN_CTAG_TX;
	6926	+
6930	6927	return features;
6931	6928	}
6932	6929

drivers/net/ethernet/intel/ixgbevf/mbx.c+2−2

@@ -85,7 +85,7 @@ static s32 ixgbevf_poll_for_ack(struct ixgbe_hw *hw) · 84 unmodified lines
85	85	static s32 ixgbevf_read_posted_mbx(struct ixgbe_hw hw, u32 msg, u16 size)
86	86	{
87	87	struct ixgbe_mbx_info *mbx = &hw->mbx;
88		− s32 ret_val = -IXGBE_ERR_MBX;
	88	+ s32 ret_val = IXGBE_ERR_MBX;
89	89
90	90	if (!mbx->ops.read)
91	91	goto out;
@@ -111,7 +111,7 @@ out: · 19 unmodified lines
111	111	static s32 ixgbevf_write_posted_mbx(struct ixgbe_hw hw, u32 msg, u16 size)
112	112	{
113	113	struct ixgbe_mbx_info *mbx = &hw->mbx;
114		− s32 ret_val = -IXGBE_ERR_MBX;
	114	+ s32 ret_val = IXGBE_ERR_MBX;
115	115
116	116	/* exit if either we can't write or there isn't a defined timeout */
117	117	if (!mbx->ops.write \|\| !mbx->timeout)

drivers/net/ethernet/marvell/mvneta.c+2−0

@@ -3458,6 +3458,8 @@ static int mvneta_open(struct net_device *dev) · 3457 unmodified lines
3458	3458	return 0;
3459	3459
3460	3460	err_free_irq:
	3461	+ unregister_cpu_notifier(&pp->cpu_notifier);
	3462	+ on_each_cpu(mvneta_percpu_disable, pp, true);
3461	3463	free_percpu_irq(pp->dev->irq, pp->ports);
3462	3464	err_cleanup_txqs:
3463	3465	mvneta_cleanup_txqs(pp);

drivers/net/ethernet/mellanox/mlx5/core/cmd.c+72−57

@@ -295,6 +295,12 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, · 294 unmodified lines
295	295	case MLX5_CMD_OP_DESTROY_FLOW_GROUP:
296	296	case MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY:
297	297	case MLX5_CMD_OP_DEALLOC_FLOW_COUNTER:
	298	+ case MLX5_CMD_OP_2ERR_QP:
	299	+ case MLX5_CMD_OP_2RST_QP:
	300	+ case MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT:
	301	+ case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
	302	+ case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
	303	+ case MLX5_CMD_OP_SET_FLOW_TABLE_ROOT:
298	304	return MLX5_CMD_STAT_OK;
299	305
300	306	case MLX5_CMD_OP_QUERY_HCA_CAP:
@@ -321,8 +327,6 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, · 20 unmodified lines
321	327	case MLX5_CMD_OP_RTR2RTS_QP:
322	328	case MLX5_CMD_OP_RTS2RTS_QP:
323	329	case MLX5_CMD_OP_SQERR2RTS_QP:
324		− case MLX5_CMD_OP_2ERR_QP:
325		− case MLX5_CMD_OP_2RST_QP:
326	330	case MLX5_CMD_OP_QUERY_QP:
327	331	case MLX5_CMD_OP_SQD_RTS_QP:
328	332	case MLX5_CMD_OP_INIT2INIT_QP:
@@ -342,7 +346,6 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, · 13 unmodified lines
342	346	case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
343	347	case MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT:
344	348	case MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT:
345		− case MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT:
346	349	case MLX5_CMD_OP_QUERY_ROCE_ADDRESS:
347	350	case MLX5_CMD_OP_SET_ROCE_ADDRESS:
348	351	case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
@@ -390,11 +393,12 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, · 41 unmodified lines
390	393	case MLX5_CMD_OP_CREATE_RQT:
391	394	case MLX5_CMD_OP_MODIFY_RQT:
392	395	case MLX5_CMD_OP_QUERY_RQT:
	396	+
393	397	case MLX5_CMD_OP_CREATE_FLOW_TABLE:
394	398	case MLX5_CMD_OP_QUERY_FLOW_TABLE:
395	399	case MLX5_CMD_OP_CREATE_FLOW_GROUP:
396	400	case MLX5_CMD_OP_QUERY_FLOW_GROUP:
397		− case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
	401	+
398	402	case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
399	403	case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
400	404	case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
@@ -602,11 +606,36 @@ static void dump_command(struct mlx5_core_dev *dev, · 201 unmodified lines
602	606	pr_debug("\n");
603	607	}
604	608
	609	+static u16 msg_to_opcode(struct mlx5_cmd_msg *in)
	610	+{
	611	+ struct mlx5_inbox_hdr hdr = (struct mlx5_inbox_hdr )(in->first.data);
	612	+
	613	+ return be16_to_cpu(hdr->opcode);
	614	+}
	615	+
	616	+static void cb_timeout_handler(struct work_struct *work)
	617	+{
	618	+ struct delayed_work *dwork = container_of(work, struct delayed_work,
	619	+ work);
	620	+ struct mlx5_cmd_work_ent *ent = container_of(dwork,
	621	+ struct mlx5_cmd_work_ent,
	622	+ cb_timeout_work);
	623	+ struct mlx5_core_dev *dev = container_of(ent->cmd, struct mlx5_core_dev,
	624	+ cmd);
	625	+
	626	+ ent->ret = -ETIMEDOUT;
	627	+ mlx5_core_warn(dev, "%s(0x%x) timeout. Will cause a leak of a command resource\n",
	628	+ mlx5_command_str(msg_to_opcode(ent->in)),
	629	+ msg_to_opcode(ent->in));
	630	+ mlx5_cmd_comp_handler(dev, 1UL << ent->idx);
	631	+}
	632	+
605	633	static void cmd_work_handler(struct work_struct *work)
606	634	{
607	635	struct mlx5_cmd_work_ent *ent = container_of(work, struct mlx5_cmd_work_ent, work);
608	636	struct mlx5_cmd *cmd = ent->cmd;
609	637	struct mlx5_core_dev *dev = container_of(cmd, struct mlx5_core_dev, cmd);
	638	+ unsigned long cb_timeout = msecs_to_jiffies(MLX5_CMD_TIMEOUT_MSEC);
610	639	struct mlx5_cmd_layout *lay;
611	640	struct semaphore *sem;
612	641	unsigned long flags;
@@ -647,6 +676,9 @@ static void cmd_work_handler(struct work_struct *work) · 34 unmodified lines
647	676	dump_command(dev, ent, 1);
648	677	ent->ts1 = ktime_get_ns();
649	678
	679	+ if (ent->callback)
	680	+ schedule_delayed_work(&ent->cb_timeout_work, cb_timeout);
	681	+
650	682	/* ring doorbell after the descriptor is valid */
651	683	mlx5_core_dbg(dev, "writing 0x%x to command doorbell\n", 1 << ent->idx);
652	684	wmb();
@@ -691,13 +723,6 @@ static const char *deliv_status_to_str(u8 status) · 38 unmodified lines
691	723	}
692	724	}
693	725
694		−static u16 msg_to_opcode(struct mlx5_cmd_msg *in)
695		−{
696		− struct mlx5_inbox_hdr hdr = (struct mlx5_inbox_hdr )(in->first.data);
697		−
698		− return be16_to_cpu(hdr->opcode);
699		−}
700		−
701	726	static int wait_func(struct mlx5_core_dev dev, struct mlx5_cmd_work_ent ent)
702	727	{
703	728	unsigned long timeout = msecs_to_jiffies(MLX5_CMD_TIMEOUT_MSEC);
@@ -706,13 +731,13 @@ static int wait_func(struct mlx5_core_dev dev, struct mlx5_cmd_work_ent ent) · 2 unmodified lines
706	731
707	732	if (cmd->mode == CMD_MODE_POLLING) {
708	733	wait_for_completion(&ent->done);
709		− err = ent->ret;
710		− } else {
711		− if (!wait_for_completion_timeout(&ent->done, timeout))
712		− err = -ETIMEDOUT;
713		− else
714		− err = 0;
	734	+ } else if (!wait_for_completion_timeout(&ent->done, timeout)) {
	735	+ ent->ret = -ETIMEDOUT;
	736	+ mlx5_cmd_comp_handler(dev, 1UL << ent->idx);
715	737	}
	738	+
	739	+ err = ent->ret;
	740	+
716	741	if (err == -ETIMEDOUT) {
717	742	mlx5_core_warn(dev, "%s(0x%x) timeout. Will cause a leak of a command resource\n",
718	743	mlx5_command_str(msg_to_opcode(ent->in)),
@@ -761,6 +786,7 @@ static int mlx5_cmd_invoke(struct mlx5_core_dev dev, struct mlx5_cmd_msg in, · 42 unmodified lines
761	786	if (!callback)
762	787	init_completion(&ent->done);
763	788
	789	+ INIT_DELAYED_WORK(&ent->cb_timeout_work, cb_timeout_handler);
764	790	INIT_WORK(&ent->work, cmd_work_handler);
765	791	if (page_queue) {
766	792	cmd_work_handler(&ent->work);
@@ -770,28 +796,26 @@ static int mlx5_cmd_invoke(struct mlx5_core_dev dev, struct mlx5_cmd_msg in, · 3 unmodified lines
770	796	goto out_free;
771	797	}
772	798
773		− if (!callback) {
774		− err = wait_func(dev, ent);
775		− if (err == -ETIMEDOUT)
776		− goto out;
777		−
778		− ds = ent->ts2 - ent->ts1;
779		− op = be16_to_cpu(((struct mlx5_inbox_hdr *)in->first.data)->opcode);
780		− if (op < ARRAY_SIZE(cmd->stats)) {
781		− stats = &cmd->stats[op];
782		− spin_lock_irq(&stats->lock);
783		− stats->sum += ds;
784		− ++stats->n;
785		− spin_unlock_irq(&stats->lock);
786		− }
787		− mlx5_core_dbg_mask(dev, 1 << MLX5_CMD_TIME,
788		− "fw exec time for %s is %lld nsec\n",
789		− mlx5_command_str(op), ds);
790		− *status = ent->status;
791		− free_cmd(ent);
792		− }
	799	+ if (callback)
	800	+ goto out;
793	801
794		− return err;
	802	+ err = wait_func(dev, ent);
	803	+ if (err == -ETIMEDOUT)
	804	+ goto out_free;
	805	+
	806	+ ds = ent->ts2 - ent->ts1;
	807	+ op = be16_to_cpu(((struct mlx5_inbox_hdr *)in->first.data)->opcode);
	808	+ if (op < ARRAY_SIZE(cmd->stats)) {
	809	+ stats = &cmd->stats[op];
	810	+ spin_lock_irq(&stats->lock);
	811	+ stats->sum += ds;
	812	+ ++stats->n;
	813	+ spin_unlock_irq(&stats->lock);
	814	+ }
	815	+ mlx5_core_dbg_mask(dev, 1 << MLX5_CMD_TIME,
	816	+ "fw exec time for %s is %lld nsec\n",
	817	+ mlx5_command_str(op), ds);
	818	+ *status = ent->status;
795	819
796	820	out_free:
797	821	free_cmd(ent);
@@ -1181,41 +1205,30 @@ err_dbg: · 383 unmodified lines
1181	1205	return err;
1182	1206	}
1183	1207
1184		−void mlx5_cmd_use_events(struct mlx5_core_dev *dev)
	1208	+static void mlx5_cmd_change_mod(struct mlx5_core_dev *dev, int mode)
1185	1209	{
1186	1210	struct mlx5_cmd *cmd = &dev->cmd;
1187	1211	int i;
1188	1212
1189	1213	for (i = 0; i < cmd->max_reg_cmds; i++)
1190	1214	down(&cmd->sem);
1191		−
1192	1215	down(&cmd->pages_sem);
1193	1216
1194		− flush_workqueue(cmd->wq);
1195		−
1196		− cmd->mode = CMD_MODE_EVENTS;
	1217	+ cmd->mode = mode;
1197	1218
1198	1219	up(&cmd->pages_sem);
1199	1220	for (i = 0; i < cmd->max_reg_cmds; i++)
1200	1221	up(&cmd->sem);
1201	1222	}
1202	1223
1203		−void mlx5_cmd_use_polling(struct mlx5_core_dev *dev)
	1224	+void mlx5_cmd_use_events(struct mlx5_core_dev *dev)
1204	1225	{
1205		− struct mlx5_cmd *cmd = &dev->cmd;
1206		− int i;
1207		−
1208		− for (i = 0; i < cmd->max_reg_cmds; i++)
1209		− down(&cmd->sem);
1210		−
1211		− down(&cmd->pages_sem);
1212		−
1213		− flush_workqueue(cmd->wq);
1214		− cmd->mode = CMD_MODE_POLLING;
	1226	+ mlx5_cmd_change_mod(dev, CMD_MODE_EVENTS);
	1227	+}
1215	1228
1216		− up(&cmd->pages_sem);
1217		− for (i = 0; i < cmd->max_reg_cmds; i++)
1218		− up(&cmd->sem);
	1229	+void mlx5_cmd_use_polling(struct mlx5_core_dev *dev)
	1230	+{
	1231	+ mlx5_cmd_change_mod(dev, CMD_MODE_POLLING);
1219	1232	}
1220	1233
1221	1234	static void free_msg(struct mlx5_core_dev dev, struct mlx5_cmd_msg msg)
@@ -1251,6 +1264,8 @@ void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, u64 vec) · 29 unmodified lines
1251	1264	struct semaphore *sem;
1252	1265
1253	1266	ent = cmd->ent_arr[i];
	1267	+ if (ent->callback)
	1268	+ cancel_delayed_work(&ent->cb_timeout_work);
1254	1269	if (ent->page_queue)
1255	1270	sem = &cmd->pages_sem;
1256	1271	else

drivers/net/ethernet/mellanox/mlx5/core/en.h+10−1

@@ -164,7 +164,6 @@ enum mlx5e_priv_flag { · 163 unmodified lines
164	164
165	165	#ifdef CONFIG_MLX5_CORE_EN_DCB
166	166	#define MLX5E_MAX_BW_ALLOC 100 /* Max percentage of BW allocation */
167		−#define MLX5E_MIN_BW_ALLOC 1 /* Min percentage of BW allocation */
168	167	#endif
169	168
170	169	struct mlx5e_cq_moder {
@@ -215,6 +214,7 @@ struct mlx5e_tstamp { · 44 unmodified lines
215	214	enum {
216	215	MLX5E_RQ_STATE_POST_WQES_ENABLE,
217	216	MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS,
	217	+ MLX5E_RQ_STATE_FLUSH_TIMEOUT,
218	218	MLX5E_RQ_STATE_AM,
219	219	};
220	220
@@ -246,6 +246,8 @@ typedef void (mlx5e_fp_handle_rx_cqe)(struct mlx5e_rq rq, · 25 unmodified lines
246	246	typedef int (mlx5e_fp_alloc_wqe)(struct mlx5e_rq rq, struct mlx5e_rx_wqe *wqe,
247	247	u16 ix);
248	248
	249	+typedef void (mlx5e_fp_dealloc_wqe)(struct mlx5e_rq rq, u16 ix);
	250	+
249	251	struct mlx5e_dma_info {
250	252	struct page *page;
251	253	dma_addr_t addr;
@@ -291,6 +293,7 @@ struct mlx5e_rq { · 39 unmodified lines
291	293	struct mlx5e_cq cq;
292	294	mlx5e_fp_handle_rx_cqe handle_rx_cqe;
293	295	mlx5e_fp_alloc_wqe alloc_wqe;
	296	+ mlx5e_fp_dealloc_wqe dealloc_wqe;
294	297
295	298	unsigned long state;
296	299	int ix;
@@ -357,6 +360,7 @@ struct mlx5e_sq_dma { · 60 unmodified lines
357	360	enum {
358	361	MLX5E_SQ_STATE_WAKE_TXQ_ENABLE,
359	362	MLX5E_SQ_STATE_BF_ENABLE,
	363	+ MLX5E_SQ_STATE_TX_TIMEOUT,
360	364	};
361	365
362	366	struct mlx5e_ico_wqe_info {
@@ -626,6 +630,7 @@ struct mlx5e_priv { · 263 unmodified lines
626	630	struct workqueue_struct *wq;
627	631	struct work_struct update_carrier_work;
628	632	struct work_struct set_rx_mode_work;
	633	+ struct work_struct tx_timeout_work;
629	634	struct delayed_work update_stats_work;
630	635
631	636	u32 pflags;
@@ -684,12 +689,16 @@ void mlx5e_cq_error_event(struct mlx5_core_cq *mcq, enum mlx5_event event); · 52 unmodified lines
684	689	int mlx5e_napi_poll(struct napi_struct *napi, int budget);
685	690	bool mlx5e_poll_tx_cq(struct mlx5e_cq *cq, int napi_budget);
686	691	int mlx5e_poll_rx_cq(struct mlx5e_cq *cq, int budget);
	692	+void mlx5e_free_tx_descs(struct mlx5e_sq *sq);
	693	+void mlx5e_free_rx_descs(struct mlx5e_rq *rq);
687	694
688	695	void mlx5e_handle_rx_cqe(struct mlx5e_rq rq, struct mlx5_cqe64 cqe);
689	696	void mlx5e_handle_rx_cqe_mpwrq(struct mlx5e_rq rq, struct mlx5_cqe64 cqe);
690	697	bool mlx5e_post_rx_wqes(struct mlx5e_rq *rq);
691	698	int mlx5e_alloc_rx_wqe(struct mlx5e_rq rq, struct mlx5e_rx_wqe wqe, u16 ix);
692	699	int mlx5e_alloc_rx_mpwqe(struct mlx5e_rq rq, struct mlx5e_rx_wqe wqe, u16 ix);
	700	+void mlx5e_dealloc_rx_wqe(struct mlx5e_rq *rq, u16 ix);
	701	+void mlx5e_dealloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix);
693	702	void mlx5e_post_rx_fragmented_mpwqe(struct mlx5e_rq *rq);
694	703	void mlx5e_complete_rx_linear_mpwqe(struct mlx5e_rq *rq,
695	704	struct mlx5_cqe64 *cqe,

drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c+6−2

@@ -96,7 +96,7 @@ static void mlx5e_build_tc_tx_bw(struct ieee_ets ets, u8 tc_tx_bw, · 95 unmodified lines
96	96	tc_tx_bw[i] = MLX5E_MAX_BW_ALLOC;
97	97	break;
98	98	case IEEE_8021QAZ_TSA_ETS:
99		− tc_tx_bw[i] = ets->tc_tx_bw[i] ?: MLX5E_MIN_BW_ALLOC;
	99	+ tc_tx_bw[i] = ets->tc_tx_bw[i];
100	100	break;
101	101	}
102	102	}
@@ -140,8 +140,12 @@ static int mlx5e_dbcnl_validate_ets(struct ieee_ets *ets) · 37 unmodified lines
140	140
141	141	/* Validate Bandwidth Sum */
142	142	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
143		− if (ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS)
	143	+ if (ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS) {
	144	+ if (!ets->tc_tx_bw[i])
	145	+ return -EINVAL;
	146	+
144	147	bw_sum += ets->tc_tx_bw[i];
	148	+ }
145	149	}
146	150
147	151	if (bw_sum != 0 && bw_sum != 100)

drivers/net/ethernet/mellanox/mlx5/core/en_main.c+90−10

@@ -39,6 +39,13 @@ · 38 unmodified lines
39	39	#include "eswitch.h"
40	40	#include "vxlan.h"
41	41
	42	+enum {
	43	+ MLX5_EN_QP_FLUSH_TIMEOUT_MS = 5000,
	44	+ MLX5_EN_QP_FLUSH_MSLEEP_QUANT = 20,
	45	+ MLX5_EN_QP_FLUSH_MAX_ITER = MLX5_EN_QP_FLUSH_TIMEOUT_MS /
	46	+ MLX5_EN_QP_FLUSH_MSLEEP_QUANT,
	47	+};
	48	+
42	49	struct mlx5e_rq_param {
43	50	u32 rqc[MLX5_ST_SZ_DW(rqc)];
44	51	struct mlx5_wq_param wq;
@@ -76,10 +83,13 @@ static void mlx5e_update_carrier(struct mlx5e_priv *priv) · 31 unmodified lines
76	83	port_state = mlx5_query_vport_state(mdev,
77	84	MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT, 0);
78	85
79		− if (port_state == VPORT_STATE_UP)
	86	+ if (port_state == VPORT_STATE_UP) {
	87	+ netdev_info(priv->netdev, "Link up\n");
80	88	netif_carrier_on(priv->netdev);
81		− else
	89	+ } else {
	90	+ netdev_info(priv->netdev, "Link down\n");
82	91	netif_carrier_off(priv->netdev);
	92	+ }
83	93	}
84	94
85	95	static void mlx5e_update_carrier_work(struct work_struct *work)
@@ -93,6 +103,26 @@ static void mlx5e_update_carrier_work(struct work_struct *work) · 7 unmodified lines
93	103	mutex_unlock(&priv->state_lock);
94	104	}
95	105
	106	+static void mlx5e_tx_timeout_work(struct work_struct *work)
	107	+{
	108	+ struct mlx5e_priv *priv = container_of(work, struct mlx5e_priv,
	109	+ tx_timeout_work);
	110	+ int err;
	111	+
	112	+ rtnl_lock();
	113	+ mutex_lock(&priv->state_lock);
	114	+ if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
	115	+ goto unlock;
	116	+ mlx5e_close_locked(priv->netdev);
	117	+ err = mlx5e_open_locked(priv->netdev);
	118	+ if (err)
	119	+ netdev_err(priv->netdev, "mlx5e_open_locked failed recovering from a tx_timeout, err(%d).\n",
	120	+ err);
	121	+unlock:
	122	+ mutex_unlock(&priv->state_lock);
	123	+ rtnl_unlock();
	124	+}
	125	+
96	126	static void mlx5e_update_sw_counters(struct mlx5e_priv *priv)
97	127	{
98	128	struct mlx5e_sw_stats *s = &priv->stats.sw;
@@ -307,6 +337,7 @@ static int mlx5e_create_rq(struct mlx5e_channel *c, · 208 unmodified lines
307	337	}
308	338	rq->handle_rx_cqe = mlx5e_handle_rx_cqe_mpwrq;
309	339	rq->alloc_wqe = mlx5e_alloc_rx_mpwqe;
	340	+ rq->dealloc_wqe = mlx5e_dealloc_rx_mpwqe;
310	341
311	342	rq->mpwqe_stride_sz = BIT(priv->params.mpwqe_log_stride_sz);
312	343	rq->mpwqe_num_strides = BIT(priv->params.mpwqe_log_num_strides);
@@ -322,6 +353,7 @@ static int mlx5e_create_rq(struct mlx5e_channel *c, · 9 unmodified lines
322	353	}
323	354	rq->handle_rx_cqe = mlx5e_handle_rx_cqe;
324	355	rq->alloc_wqe = mlx5e_alloc_rx_wqe;
	356	+ rq->dealloc_wqe = mlx5e_dealloc_rx_wqe;
325	357
326	358	rq->wqe_sz = (priv->params.lro_en) ?
327	359	priv->params.lro_wqe_sz :
@@ -533,12 +565,19 @@ err_destroy_rq: · 205 unmodified lines
533	565
534	566	static void mlx5e_close_rq(struct mlx5e_rq *rq)
535	567	{
	568	+ int tout = 0;
	569	+ int err;
	570	+
536	571	clear_bit(MLX5E_RQ_STATE_POST_WQES_ENABLE, &rq->state);
537	572	napi_synchronize(&rq->channel->napi); /* prevent mlx5e_post_rx_wqes */
538	573
539		− mlx5e_modify_rq_state(rq, MLX5_RQC_STATE_RDY, MLX5_RQC_STATE_ERR);
540		− while (!mlx5_wq_ll_is_empty(&rq->wq))
541		− msleep(20);
	574	+ err = mlx5e_modify_rq_state(rq, MLX5_RQC_STATE_RDY, MLX5_RQC_STATE_ERR);
	575	+ while (!mlx5_wq_ll_is_empty(&rq->wq) && !err &&
	576	+ tout++ < MLX5_EN_QP_FLUSH_MAX_ITER)
	577	+ msleep(MLX5_EN_QP_FLUSH_MSLEEP_QUANT);
	578	+
	579	+ if (err \|\| tout == MLX5_EN_QP_FLUSH_MAX_ITER)
	580	+ set_bit(MLX5E_RQ_STATE_FLUSH_TIMEOUT, &rq->state);
542	581
543	582	/* avoid destroying rq before mlx5e_poll_rx_cq() is done with it */
544	583	napi_synchronize(&rq->channel->napi);
@@ -546,6 +585,7 @@ static void mlx5e_close_rq(struct mlx5e_rq *rq) · 1 unmodified line
546	585	cancel_work_sync(&rq->am.work);
547	586
548	587	mlx5e_disable_rq(rq);
	588	+ mlx5e_free_rx_descs(rq);
549	589	mlx5e_destroy_rq(rq);
550	590	}
551	591
@@ -800,6 +840,9 @@ static inline void netif_tx_disable_queue(struct netdev_queue *txq) · 248 unmodified lines
800	840
801	841	static void mlx5e_close_sq(struct mlx5e_sq *sq)
802	842	{
	843	+ int tout = 0;
	844	+ int err;
	845	+
803	846	if (sq->txq) {
804	847	clear_bit(MLX5E_SQ_STATE_WAKE_TXQ_ENABLE, &sq->state);
805	848	/* prevent netif_tx_wake_queue */
@@ -810,16 +853,24 @@ static void mlx5e_close_sq(struct mlx5e_sq *sq) · 4 unmodified lines
810	853	if (mlx5e_sq_has_room_for(sq, 1))
811	854	mlx5e_send_nop(sq, true);
812	855
813		− mlx5e_modify_sq(sq, MLX5_SQC_STATE_RDY, MLX5_SQC_STATE_ERR,
814		− false, 0);
	856	+ err = mlx5e_modify_sq(sq, MLX5_SQC_STATE_RDY,
	857	+ MLX5_SQC_STATE_ERR, false, 0);
	858	+ if (err)
	859	+ set_bit(MLX5E_SQ_STATE_TX_TIMEOUT, &sq->state);
815	860	}
816	861
817		− while (sq->cc != sq->pc) /* wait till sq is empty */
818		− msleep(20);
	862	+ /* wait till sq is empty, unless a TX timeout occurred on this SQ */
	863	+ while (sq->cc != sq->pc &&
	864	+ !test_bit(MLX5E_SQ_STATE_TX_TIMEOUT, &sq->state)) {
	865	+ msleep(MLX5_EN_QP_FLUSH_MSLEEP_QUANT);
	866	+ if (tout++ > MLX5_EN_QP_FLUSH_MAX_ITER)
	867	+ set_bit(MLX5E_SQ_STATE_TX_TIMEOUT, &sq->state);
	868	+ }
819	869
820	870	/* avoid destroying sq before mlx5e_poll_tx_cq() is done with it */
821	871	napi_synchronize(&sq->channel->napi);
822	872
	873	+ mlx5e_free_tx_descs(sq);
823	874	mlx5e_disable_sq(sq);
824	875	mlx5e_destroy_sq(sq);
825	876	}
@@ -1736,8 +1787,11 @@ static void mlx5e_netdev_set_tcs(struct net_device *netdev) · 910 unmodified lines
1736	1787
1737	1788	netdev_set_num_tc(netdev, ntc);
1738	1789
	1790	+ /* Map netdev TCs to offset 0
	1791	+ * We have our own UP to TXQ mapping for QoS
	1792	+ */
1739	1793	for (tc = 0; tc < ntc; tc++)
1740		− netdev_set_tc_queue(netdev, tc, nch, tc * nch);
	1794	+ netdev_set_tc_queue(netdev, tc, nch, 0);
1741	1795	}
1742	1796
1743	1797	int mlx5e_open_locked(struct net_device *netdev)
@@ -2709,6 +2763,29 @@ static netdev_features_t mlx5e_features_check(struct sk_buff *skb, · 965 unmodified lines
2709	2763	return features;
2710	2764	}
2711	2765
	2766	+static void mlx5e_tx_timeout(struct net_device *dev)
	2767	+{
	2768	+ struct mlx5e_priv *priv = netdev_priv(dev);
	2769	+ bool sched_work = false;
	2770	+ int i;
	2771	+
	2772	+ netdev_err(dev, "TX timeout detected\n");
	2773	+
	2774	+ for (i = 0; i < priv->params.num_channels * priv->params.num_tc; i++) {
	2775	+ struct mlx5e_sq *sq = priv->txq_to_sq_map[i];
	2776	+
	2777	+ if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i)))
	2778	+ continue;
	2779	+ sched_work = true;
	2780	+ set_bit(MLX5E_SQ_STATE_TX_TIMEOUT, &sq->state);
	2781	+ netdev_err(dev, "TX timeout on queue: %d, SQ: 0x%x, CQ: 0x%x, SQ Cons: 0x%x SQ Prod: 0x%x\n",
	2782	+ i, sq->sqn, sq->cq.mcq.cqn, sq->cc, sq->pc);
	2783	+ }
	2784	+
	2785	+ if (sched_work && test_bit(MLX5E_STATE_OPENED, &priv->state))
	2786	+ schedule_work(&priv->tx_timeout_work);
	2787	+}
	2788	+
2712	2789	static const struct net_device_ops mlx5e_netdev_ops_basic = {
2713	2790	.ndo_open = mlx5e_open,
2714	2791	.ndo_stop = mlx5e_close,
@@ -2727,6 +2804,7 @@ static const struct net_device_ops mlx5e_netdev_ops_basic = { · 12 unmodified lines
2727	2804	#ifdef CONFIG_RFS_ACCEL
2728	2805	.ndo_rx_flow_steer = mlx5e_rx_flow_steer,
2729	2806	#endif
	2807	+ .ndo_tx_timeout = mlx5e_tx_timeout,
2730	2808	};
2731	2809
2732	2810	static const struct net_device_ops mlx5e_netdev_ops_sriov = {
@@ -2757,6 +2835,7 @@ static const struct net_device_ops mlx5e_netdev_ops_sriov = { · 24 unmodified lines
2757	2835	.ndo_get_vf_config = mlx5e_get_vf_config,
2758	2836	.ndo_set_vf_link_state = mlx5e_set_vf_link_state,
2759	2837	.ndo_get_vf_stats = mlx5e_get_vf_stats,
	2838	+ .ndo_tx_timeout = mlx5e_tx_timeout,
2760	2839	};
2761	2840
2762	2841	static int mlx5e_check_required_hca_cap(struct mlx5_core_dev *mdev)
@@ -2983,6 +3062,7 @@ static void mlx5e_build_nic_netdev_priv(struct mlx5_core_dev *mdev, · 220 unmodified lines
2983	3062
2984	3063	INIT_WORK(&priv->update_carrier_work, mlx5e_update_carrier_work);
2985	3064	INIT_WORK(&priv->set_rx_mode_work, mlx5e_set_rx_mode_work);
	3065	+ INIT_WORK(&priv->tx_timeout_work, mlx5e_tx_timeout_work);
2986	3066	INIT_DELAYED_WORK(&priv->update_stats_work, mlx5e_update_stats_work);
2987	3067	}
2988	3068

drivers/net/ethernet/mellanox/mlx5/core/en_rx.c+41−0

@@ -212,6 +212,20 @@ err_free_skb: · 211 unmodified lines
212	212	return -ENOMEM;
213	213	}
214	214
	215	+void mlx5e_dealloc_rx_wqe(struct mlx5e_rq *rq, u16 ix)
	216	+{
	217	+ struct sk_buff *skb = rq->skb[ix];
	218	+
	219	+ if (skb) {
	220	+ rq->skb[ix] = NULL;
	221	+ dma_unmap_single(rq->pdev,
	222	+ ((dma_addr_t )skb->cb),
	223	+ rq->wqe_sz,
	224	+ DMA_FROM_DEVICE);
	225	+ dev_kfree_skb(skb);
	226	+ }
	227	+}
	228	+
215	229	static inline int mlx5e_mpwqe_strides_per_page(struct mlx5e_rq *rq)
216	230	{
217	231	return rq->mpwqe_num_strides >> MLX5_MPWRQ_WQE_PAGE_ORDER;
@@ -574,6 +588,30 @@ int mlx5e_alloc_rx_mpwqe(struct mlx5e_rq rq, struct mlx5e_rx_wqe wqe, u16 ix) · 356 unmodified lines
574	588	return 0;
575	589	}
576	590
	591	+void mlx5e_dealloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix)
	592	+{
	593	+ struct mlx5e_mpw_info *wi = &rq->wqe_info[ix];
	594	+
	595	+ wi->free_wqe(rq, wi);
	596	+}
	597	+
	598	+void mlx5e_free_rx_descs(struct mlx5e_rq *rq)
	599	+{
	600	+ struct mlx5_wq_ll *wq = &rq->wq;
	601	+ struct mlx5e_rx_wqe *wqe;
	602	+ __be16 wqe_ix_be;
	603	+ u16 wqe_ix;
	604	+
	605	+ while (!mlx5_wq_ll_is_empty(wq)) {
	606	+ wqe_ix_be = *wq->tail_next;
	607	+ wqe_ix = be16_to_cpu(wqe_ix_be);
	608	+ wqe = mlx5_wq_ll_get_wqe(&rq->wq, wqe_ix);
	609	+ rq->dealloc_wqe(rq, wqe_ix);
	610	+ mlx5_wq_ll_pop(&rq->wq, wqe_ix_be,
	611	+ &wqe->next.next_wqe_index);
	612	+ }
	613	+}
	614	+
577	615	#define RQ_CANNOT_POST(rq) \
578	616	(!test_bit(MLX5E_RQ_STATE_POST_WQES_ENABLE, &rq->state) \|\| \
579	617	test_bit(MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS, &rq->state))
@@ -878,6 +916,9 @@ int mlx5e_poll_rx_cq(struct mlx5e_cq *cq, int budget) · 298 unmodified lines
878	916	struct mlx5e_rq *rq = container_of(cq, struct mlx5e_rq, cq);
879	917	int work_done = 0;
880	918
	919	+ if (unlikely(test_bit(MLX5E_RQ_STATE_FLUSH_TIMEOUT, &rq->state)))
	920	+ return 0;
	921	+
881	922	if (cq->decmprs_left)
882	923	work_done += mlx5e_decompress_cqes_cont(rq, cq, 0, budget);
883	924

drivers/net/ethernet/mellanox/mlx5/core/en_tx.c+48−4

@@ -110,8 +110,20 @@ u16 mlx5e_select_queue(struct net_device dev, struct sk_buff skb, · 109 unmodified lines
110	110	{
111	111	struct mlx5e_priv *priv = netdev_priv(dev);
112	112	int channel_ix = fallback(dev, skb);
113		− int up = (netdev_get_num_tc(dev) && skb_vlan_tag_present(skb)) ?
114		− skb->vlan_tci >> VLAN_PRIO_SHIFT : 0;
	113	+ int up = 0;
	114	+
	115	+ if (!netdev_get_num_tc(dev))
	116	+ return channel_ix;
	117	+
	118	+ if (skb_vlan_tag_present(skb))
	119	+ up = skb->vlan_tci >> VLAN_PRIO_SHIFT;
	120	+
	121	+ /* channel_ix can be larger than num_channels since
	122	+ * dev->num_real_tx_queues = num_channels * num_tc
	123	+ */
	124	+ if (channel_ix >= priv->params.num_channels)
	125	+ channel_ix = reciprocal_scale(channel_ix,
	126	+ priv->params.num_channels);
115	127
116	128	return priv->channeltc_to_txq_map[channel_ix][up];
117	129	}
@@ -123,7 +135,7 @@ static inline u16 mlx5e_get_inline_hdr_size(struct mlx5e_sq *sq, · 5 unmodified lines
123	135	* headers and occur before the data gather.
124	136	* Therefore these headers must be copied into the WQE
125	137	*/
126		−#define MLX5E_MIN_INLINE ETH_HLEN
	138	+#define MLX5E_MIN_INLINE (ETH_HLEN + VLAN_HLEN)
127	139
128	140	if (bf) {
129	141	u16 ihs = skb_headlen(skb);
@@ -135,7 +147,7 @@ static inline u16 mlx5e_get_inline_hdr_size(struct mlx5e_sq *sq, · 5 unmodified lines
135	147	return skb_headlen(skb);
136	148	}
137	149
138		− return MLX5E_MIN_INLINE;
	150	+ return max(skb_network_offset(skb), MLX5E_MIN_INLINE);
139	151	}
140	152
141	153	static inline void mlx5e_tx_skb_pull_inline(unsigned char **skb_data,
@@ -341,6 +353,35 @@ netdev_tx_t mlx5e_xmit(struct sk_buff skb, struct net_device dev) · 199 unmodified lines
341	353	return mlx5e_sq_xmit(sq, skb);
342	354	}
343	355
	356	+void mlx5e_free_tx_descs(struct mlx5e_sq *sq)
	357	+{
	358	+ struct mlx5e_tx_wqe_info *wi;
	359	+ struct sk_buff *skb;
	360	+ u16 ci;
	361	+ int i;
	362	+
	363	+ while (sq->cc != sq->pc) {
	364	+ ci = sq->cc & sq->wq.sz_m1;
	365	+ skb = sq->skb[ci];
	366	+ wi = &sq->wqe_info[ci];
	367	+
	368	+ if (!skb) { /* nop */
	369	+ sq->cc++;
	370	+ continue;
	371	+ }
	372	+
	373	+ for (i = 0; i < wi->num_dma; i++) {
	374	+ struct mlx5e_sq_dma *dma =
	375	+ mlx5e_dma_get(sq, sq->dma_fifo_cc++);
	376	+
	377	+ mlx5e_tx_dma_unmap(sq->pdev, dma);
	378	+ }
	379	+
	380	+ dev_kfree_skb_any(skb);
	381	+ sq->cc += wi->num_wqebbs;
	382	+ }
	383	+}
	384	+
344	385	bool mlx5e_poll_tx_cq(struct mlx5e_cq *cq, int napi_budget)
345	386	{
346	387	struct mlx5e_sq *sq;
@@ -352,6 +393,9 @@ bool mlx5e_poll_tx_cq(struct mlx5e_cq *cq, int napi_budget) · 5 unmodified lines
352	393
353	394	sq = container_of(cq, struct mlx5e_sq, cq);
354	395
	396	+ if (unlikely(test_bit(MLX5E_SQ_STATE_TX_TIMEOUT, &sq->state)))
	397	+ return false;
	398	+
355	399	npkts = 0;
356	400	nbytes = 0;
357	401

drivers/net/ethernet/mellanox/mlx5/core/health.c+8−3

@@ -108,15 +108,21 @@ static int in_fatal(struct mlx5_core_dev *dev) · 107 unmodified lines
108	108
109	109	void mlx5_enter_error_state(struct mlx5_core_dev *dev)
110	110	{
	111	+ mutex_lock(&dev->intf_state_mutex);
111	112	if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR)
112		− return;
	113	+ goto unlock;
113	114
114	115	mlx5_core_err(dev, "start\n");
115		− if (pci_channel_offline(dev->pdev) \|\| in_fatal(dev))
	116	+ if (pci_channel_offline(dev->pdev) \|\| in_fatal(dev)) {
116	117	dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR;
	118	+ trigger_cmd_completions(dev);
	119	+ }
117	120
118	121	mlx5_core_event(dev, MLX5_DEV_EVENT_SYS_ERROR, 0);
119	122	mlx5_core_err(dev, "end\n");
	123	+
	124	+unlock:
	125	+ mutex_unlock(&dev->intf_state_mutex);
120	126	}
121	127
122	128	static void mlx5_handle_bad_state(struct mlx5_core_dev *dev)
@@ -245,7 +251,6 @@ static void poll_health(unsigned long data) · 122 unmodified lines
245	251	u32 count;
246	252
247	253	if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) {
248		− trigger_cmd_completions(dev);
249	254	mod_timer(&health->timer, get_next_poll_jiffies());
250	255	return;
251	256	}

drivers/net/ethernet/mellanox/mlx5/core/main.c+15−26

@@ -1450,46 +1450,31 @@ void mlx5_disable_device(struct mlx5_core_dev *dev) · 1449 unmodified lines
1450	1450	mlx5_pci_err_detected(dev->pdev, 0);
1451	1451	}
1452	1452
1453		−/* wait for the device to show vital signs. For now we check
1454		− * that we can read the device ID and that the health buffer
1455		− * shows a non zero value which is different than 0xffffffff
	1453	+/* wait for the device to show vital signs by waiting
	1454	+ * for the health counter to start counting.
1456	1455	*/
1457		−static void wait_vital(struct pci_dev *pdev)
	1456	+static int wait_vital(struct pci_dev *pdev)
1458	1457	{
1459	1458	struct mlx5_core_dev *dev = pci_get_drvdata(pdev);
1460	1459	struct mlx5_core_health *health = &dev->priv.health;
1461	1460	const int niter = 100;
	1461	+ u32 last_count = 0;
1462	1462	u32 count;
1463		− u16 did;
1464	1463	int i;
1465	1464
1466		− /* Wait for firmware to be ready after reset */
1467		− msleep(1000);
1468		− for (i = 0; i < niter; i++) {
1469		− if (pci_read_config_word(pdev, 2, &did)) {
1470		− dev_warn(&pdev->dev, "failed reading config word\n");
1471		− break;
1472		− }
1473		− if (did == pdev->device) {
1474		− dev_info(&pdev->dev, "device ID correctly read after %d iterations\n", i);
1475		− break;
1476		− }
1477		− msleep(50);
1478		− }
1479		− if (i == niter)
1480		− dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__);
1481		−
1482	1465	for (i = 0; i < niter; i++) {
1483	1466	count = ioread32be(health->health_counter);
1484	1467	if (count && count != 0xffffffff) {
1485		− dev_info(&pdev->dev, "Counter value 0x%x after %d iterations\n", count, i);
1486		− break;
	1468	+ if (last_count && last_count != count) {
	1469	+ dev_info(&pdev->dev, "Counter value 0x%x after %d iterations\n", count, i);
	1470	+ return 0;
	1471	+ }
	1472	+ last_count = count;
1487	1473	}
1488	1474	msleep(50);
1489	1475	}
1490	1476
1491		− if (i == niter)
1492		− dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__);
	1477	+ return -ETIMEDOUT;
1493	1478	}
1494	1479
1495	1480	static void mlx5_pci_resume(struct pci_dev *pdev)
@@ -1501,7 +1486,11 @@ static void mlx5_pci_resume(struct pci_dev *pdev) · 5 unmodified lines
1501	1486	dev_info(&pdev->dev, "%s was called\n", __func__);
1502	1487
1503	1488	pci_save_state(pdev);
1504		− wait_vital(pdev);
	1489	+ err = wait_vital(pdev);
	1490	+ if (err) {
	1491	+ dev_err(&pdev->dev, "%s: wait_vital timed out\n", __func__);
	1492	+ return;
	1493	+ }
1505	1494
1506	1495	err = mlx5_load_one(dev, priv);
1507	1496	if (err)

drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c+44−19

@@ -345,7 +345,6 @@ retry: · 344 unmodified lines
345	345	func_id, npages, err);
346	346	goto out_4k;
347	347	}
348		− dev->priv.fw_pages += npages;
349	348
350	349	err = mlx5_cmd_status_to_err(&out.hdr);
351	350	if (err) {
@@ -373,6 +372,33 @@ out_free: · 21 unmodified lines
373	372	return err;
374	373	}
375	374
	375	+static int reclaim_pages_cmd(struct mlx5_core_dev *dev,
	376	+ struct mlx5_manage_pages_inbox *in, int in_size,
	377	+ struct mlx5_manage_pages_outbox *out, int out_size)
	378	+{
	379	+ struct fw_page *fwp;
	380	+ struct rb_node *p;
	381	+ u32 npages;
	382	+ u32 i = 0;
	383	+
	384	+ if (dev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR)
	385	+ return mlx5_cmd_exec_check_status(dev, (u32 *)in, in_size,
	386	+ (u32 *)out, out_size);
	387	+
	388	+ npages = be32_to_cpu(in->num_entries);
	389	+
	390	+ p = rb_first(&dev->priv.page_root);
	391	+ while (p && i < npages) {
	392	+ fwp = rb_entry(p, struct fw_page, rb_node);
	393	+ out->pas[i] = cpu_to_be64(fwp->addr);
	394	+ p = rb_next(p);
	395	+ i++;
	396	+ }
	397	+
	398	+ out->num_entries = cpu_to_be32(i);
	399	+ return 0;
	400	+}
	401	+
376	402	static int reclaim_pages(struct mlx5_core_dev *dev, u32 func_id, int npages,
377	403	int *nclaimed)
378	404	{
@@ -398,15 +424,9 @@ static int reclaim_pages(struct mlx5_core_dev *dev, u32 func_id, int npages, · 19 unmodified lines
398	424	in.func_id = cpu_to_be16(func_id);
399	425	in.num_entries = cpu_to_be32(npages);
400	426	mlx5_core_dbg(dev, "npages %d, outlen %d\n", npages, outlen);
401		− err = mlx5_cmd_exec(dev, &in, sizeof(in), out, outlen);
	427	+ err = reclaim_pages_cmd(dev, &in, sizeof(in), out, outlen);
402	428	if (err) {
403		− mlx5_core_err(dev, "failed reclaiming pages\n");
404		− goto out_free;
405		− }
406		− dev->priv.fw_pages -= npages;
407		−
408		− if (out->hdr.status) {
409		− err = mlx5_cmd_status_to_err(&out->hdr);
	429	+ mlx5_core_err(dev, "failed reclaiming pages: err %d\n", err);
410	430	goto out_free;
411	431	}
412	432
@@ -417,13 +437,15 @@ static int reclaim_pages(struct mlx5_core_dev *dev, u32 func_id, int npages, · 4 unmodified lines
417	437	err = -EINVAL;
418	438	goto out_free;
419	439	}
420		− if (nclaimed)
421		− *nclaimed = num_claimed;
422	440
423	441	for (i = 0; i < num_claimed; i++) {
424	442	addr = be64_to_cpu(out->pas[i]);
425	443	free_4k(dev, addr);
426	444	}
	445	+
	446	+ if (nclaimed)
	447	+ *nclaimed = num_claimed;
	448	+
427	449	dev->priv.fw_pages -= num_claimed;
428	450	if (func_id)
429	451	dev->priv.vfs_pages -= num_claimed;
@@ -514,14 +536,10 @@ int mlx5_reclaim_startup_pages(struct mlx5_core_dev *dev) · 84 unmodified lines
514	536	p = rb_first(&dev->priv.page_root);
515	537	if (p) {
516	538	fwp = rb_entry(p, struct fw_page, rb_node);
517		− if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) {
518		− free_4k(dev, fwp->addr);
519		− nclaimed = 1;
520		− } else {
521		− err = reclaim_pages(dev, fwp->func_id,
522		− optimal_reclaimed_pages(),
523		− &nclaimed);
524		− }
	539	+ err = reclaim_pages(dev, fwp->func_id,
	540	+ optimal_reclaimed_pages(),
	541	+ &nclaimed);
	542	+
525	543	if (err) {
526	544	mlx5_core_warn(dev, "failed reclaiming pages (%d)\n",
527	545	err);
@@ -536,6 +554,13 @@ int mlx5_reclaim_startup_pages(struct mlx5_core_dev *dev) · 8 unmodified lines
536	554	}
537	555	} while (p);
538	556
	557	+ WARN(dev->priv.fw_pages,
	558	+ "FW pages counter is %d after reclaiming all pages\n",
	559	+ dev->priv.fw_pages);
	560	+ WARN(dev->priv.vfs_pages,
	561	+ "VFs FW pages counter is %d after reclaiming all pages\n",
	562	+ dev->priv.vfs_pages);
	563	+
539	564	return 0;
540	565	}
541	566

drivers/net/ethernet/mellanox/mlx5/core/vport.c+0−3

@@ -513,7 +513,6 @@ int mlx5_modify_nic_vport_node_guid(struct mlx5_core_dev *mdev, · 512 unmodified lines
513	513	{
514	514	int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
515	515	void *nic_vport_context;
516		− u8 *guid;
517	516	void *in;
518	517	int err;
519	518
@@ -535,8 +534,6 @@ int mlx5_modify_nic_vport_node_guid(struct mlx5_core_dev *mdev, · 15 unmodified lines
535	534
536	535	nic_vport_context = MLX5_ADDR_OF(modify_nic_vport_context_in,
537	536	in, nic_vport_context);
538		− guid = MLX5_ADDR_OF(nic_vport_context, nic_vport_context,
539		− node_guid);
540	537	MLX5_SET64(nic_vport_context, nic_vport_context, node_guid, node_guid);
541	538
542	539	err = mlx5_modify_nic_vport_context(mdev, in, inlen);

drivers/net/ethernet/microchip/enc28j60.c+5−2

@@ -1151,7 +1151,8 @@ static void enc28j60_irq_work_handler(struct work_struct *work) · 1150 unmodified lines
1151	1151	enc28j60_phy_read(priv, PHIR);
1152	1152	}
1153	1153	/* TX complete handler */
1154		− if ((intflags & EIR_TXIF) != 0) {
	1154	+ if (((intflags & EIR_TXIF) != 0) &&
	1155	+ ((intflags & EIR_TXERIF) == 0)) {
1155	1156	bool err = false;
1156	1157	loop++;
1157	1158	if (netif_msg_intr(priv))
@@ -1203,7 +1204,7 @@ static void enc28j60_irq_work_handler(struct work_struct *work) · 45 unmodified lines
1203	1204	enc28j60_tx_clear(ndev, true);
1204	1205	} else
1205	1206	enc28j60_tx_clear(ndev, true);
1206		− locked_reg_bfclr(priv, EIR, EIR_TXERIF);
	1207	+ locked_reg_bfclr(priv, EIR, EIR_TXERIF \| EIR_TXIF);
1207	1208	}
1208	1209	/* RX Error handler */
1209	1210	if ((intflags & EIR_RXERIF) != 0) {
@@ -1238,6 +1239,8 @@ static void enc28j60_irq_work_handler(struct work_struct *work) · 28 unmodified lines
1238	1239	*/
1239	1240	static void enc28j60_hw_tx(struct enc28j60_net *priv)
1240	1241	{
	1242	+ BUG_ON(!priv->tx_skb);
	1243	+
1241	1244	if (netif_msg_tx_queued(priv))
1242	1245	printk(KERN_DEBUG DRV_NAME
1243	1246	": Tx Packet Len:%d\n", priv->tx_skb->len);

drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c+2−0

@@ -772,6 +772,8 @@ netdev_tx_t qlcnic_xmit_frame(struct sk_buff skb, struct net_device netdev) · 771 unmodified lines
772	772	tx_ring->tx_stats.tx_bytes += skb->len;
773	773	tx_ring->tx_stats.xmit_called++;
774	774
	775	+ /* Ensure writes are complete before HW fetches Tx descriptors */
	776	+ wmb();
775	777	qlcnic_update_cmd_producer(tx_ring);
776	778
777	779	return NETDEV_TX_OK;

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c+1−1

@@ -2819,7 +2819,7 @@ static irqreturn_t stmmac_interrupt(int irq, void *dev_id) · 2818 unmodified lines
2819	2819	priv->tx_path_in_lpi_mode = true;
2820	2820	if (status & CORE_IRQ_TX_PATH_EXIT_LPI_MODE)
2821	2821	priv->tx_path_in_lpi_mode = false;
2822		− if (status & CORE_IRQ_MTL_RX_OVERFLOW)
	2822	+ if (status & CORE_IRQ_MTL_RX_OVERFLOW && priv->hw->dma->set_rx_tail_ptr)
2823	2823	priv->hw->dma->set_rx_tail_ptr(priv->ioaddr,
2824	2824	priv->rx_tail_addr,
2825	2825	STMMAC_CHAN0);

drivers/net/geneve.c+7−2

@@ -1036,12 +1036,17 @@ static netdev_tx_t geneve_xmit(struct sk_buff skb, struct net_device dev) · 1035 unmodified lines
1036	1036
1037	1037	static int __geneve_change_mtu(struct net_device *dev, int new_mtu, bool strict)
1038	1038	{
	1039	+ struct geneve_dev *geneve = netdev_priv(dev);
1039	1040	/* The max_mtu calculation does not take account of GENEVE
1040	1041	* options, to avoid excluding potentially valid
1041	1042	* configurations.
1042	1043	*/
1043		− int max_mtu = IP_MAX_MTU - GENEVE_BASE_HLEN - sizeof(struct iphdr)
1044		− - dev->hard_header_len;
	1044	+ int max_mtu = IP_MAX_MTU - GENEVE_BASE_HLEN - dev->hard_header_len;
	1045	+
	1046	+ if (geneve->remote.sa.sa_family == AF_INET6)
	1047	+ max_mtu -= sizeof(struct ipv6hdr);
	1048	+ else
	1049	+ max_mtu -= sizeof(struct iphdr);
1045	1050
1046	1051	if (new_mtu < 68)
1047	1052	return -EINVAL;

drivers/net/macsec.c+1−0

@@ -2640,6 +2640,7 @@ static netdev_tx_t macsec_start_xmit(struct sk_buff *skb, · 2639 unmodified lines
2640	2640	u64_stats_update_begin(&secy_stats->syncp);
2641	2641	secy_stats->stats.OutPktsUntagged++;
2642	2642	u64_stats_update_end(&secy_stats->syncp);
	2643	+ skb->dev = macsec->real_dev;
2643	2644	len = skb->len;
2644	2645	ret = dev_queue_xmit(skb);
2645	2646	count_tx(dev, ret, len);

drivers/net/phy/dp83867.c+9−4

@@ -57,6 +57,7 @@ · 56 unmodified lines
57	57
58	58	/* PHY CTRL bits */
59	59	#define DP83867_PHYCR_FIFO_DEPTH_SHIFT 14
	60	+#define DP83867_PHYCR_FIFO_DEPTH_MASK (3 << 14)
60	61
61	62	/* RGMIIDCTL bits */
62	63	#define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4
@@ -133,8 +134,8 @@ static int dp83867_of_init(struct phy_device *phydev) · 70 unmodified lines
133	134	static int dp83867_config_init(struct phy_device *phydev)
134	135	{
135	136	struct dp83867_private *dp83867;
136		− int ret;
137		− u16 val, delay;
	137	+ int ret, val;
	138	+ u16 delay;
138	139
139	140	if (!phydev->priv) {
140	141	dp83867 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83867),
@@ -151,8 +152,12 @@ static int dp83867_config_init(struct phy_device *phydev) · 10 unmodified lines
151	152	}
152	153
153	154	if (phy_interface_is_rgmii(phydev)) {
154		− ret = phy_write(phydev, MII_DP83867_PHYCTRL,
155		− (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT));
	155	+ val = phy_read(phydev, MII_DP83867_PHYCTRL);
	156	+ if (val < 0)
	157	+ return val;
	158	+ val &= ~DP83867_PHYCR_FIFO_DEPTH_MASK;
	159	+ val \|= (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT);
	160	+ ret = phy_write(phydev, MII_DP83867_PHYCTRL, val);
156	161	if (ret)
157	162	return ret;
158	163	}

drivers/net/usb/cdc_ncm.c+7−0

@@ -854,6 +854,13 @@ int cdc_ncm_bind_common(struct usbnet dev, struct usb_interface intf, u8 data_ · 853 unmodified lines
854	854	if (cdc_ncm_init(dev))
855	855	goto error2;
856	856
	857	+ /* Some firmwares need a pause here or they will silently fail
	858	+ * to set up the interface properly. This value was decided
	859	+ * empirically on a Sierra Wireless MC7455 running 02.08.02.00
	860	+ * firmware.
	861	+ */
	862	+ usleep_range(10000, 20000);
	863	+
857	864	/* configure data interface */
858	865	temp = usb_set_interface(dev->udev, iface_no, data_altsetting);
859	866	if (temp) {

drivers/net/usb/r8152.c+28−7

@@ -31,7 +31,7 @@ · 30 unmodified lines
31	31	#define NETNEXT_VERSION "08"
32	32
33	33	/* Information for net */
34		−#define NET_VERSION "4"
	34	+#define NET_VERSION "5"
35	35
36	36	#define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
37	37	#define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
@@ -625,6 +625,7 @@ struct r8152 { · 587 unmodified lines
625	625	int (eee_set)(struct r8152 , struct ethtool_eee *);
626	626	bool (in_nway)(struct r8152 );
627	627	void (hw_phy_cfg)(struct r8152 );
	628	+ void (autosuspend_en)(struct r8152 tp, bool enable);
628	629	} rtl_ops;
629	630
630	631	int intr_interval;
@@ -2412,9 +2413,6 @@ static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable) · 1781 unmodified lines
2412	2413	if (enable) {
2413	2414	u32 ocp_data;
2414	2415
2415		− r8153_u1u2en(tp, false);
2416		− r8153_u2p3en(tp, false);
2417		−
2418	2416	__rtl_set_wol(tp, WAKE_ANY);
2419	2417
2420	2418	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
@@ -2425,7 +2423,28 @@ static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable) · 4 unmodified lines
2425	2423
2426	2424	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2427	2425	} else {
	2426	+ u32 ocp_data;
	2427	+
2428	2428	__rtl_set_wol(tp, tp->saved_wolopts);
	2429	+
	2430	+ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
	2431	+
	2432	+ ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
	2433	+ ocp_data &= ~LINK_OFF_WAKE_EN;
	2434	+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
	2435	+
	2436	+ ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
	2437	+ }
	2438	+}
	2439	+
	2440	+static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
	2441	+{
	2442	+ rtl_runtime_suspend_enable(tp, enable);
	2443	+
	2444	+ if (enable) {
	2445	+ r8153_u1u2en(tp, false);
	2446	+ r8153_u2p3en(tp, false);
	2447	+ } else {
2429	2448	r8153_u2p3en(tp, true);
2430	2449	r8153_u1u2en(tp, true);
2431	2450	}
@@ -3530,7 +3549,7 @@ static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message) · 1098 unmodified lines
3530	3549	napi_disable(&tp->napi);
3531	3550	if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3532	3551	rtl_stop_rx(tp);
3533		− rtl_runtime_suspend_enable(tp, true);
	3552	+ tp->rtl_ops.autosuspend_en(tp, true);
3534	3553	} else {
3535	3554	cancel_delayed_work_sync(&tp->schedule);
3536	3555	tp->rtl_ops.down(tp);
@@ -3557,7 +3576,7 @@ static int rtl8152_resume(struct usb_interface *intf) · 20 unmodified lines
3557	3576
3558	3577	if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3559	3578	if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3560		− rtl_runtime_suspend_enable(tp, false);
	3579	+ tp->rtl_ops.autosuspend_en(tp, false);
3561	3580	clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3562	3581	napi_disable(&tp->napi);
3563	3582	set_bit(WORK_ENABLE, &tp->flags);
@@ -3572,7 +3591,7 @@ static int rtl8152_resume(struct usb_interface *intf) · 8 unmodified lines
3572	3591	usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3573	3592	} else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3574	3593	if (tp->netdev->flags & IFF_UP)
3575		− rtl_runtime_suspend_enable(tp, false);
	3594	+ tp->rtl_ops.autosuspend_en(tp, false);
3576	3595	clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3577	3596	}
3578	3597
@@ -4158,6 +4177,7 @@ static int rtl_ops_init(struct r8152 *tp) · 579 unmodified lines
4158	4177	ops->eee_set = r8152_set_eee;
4159	4178	ops->in_nway = rtl8152_in_nway;
4160	4179	ops->hw_phy_cfg = r8152b_hw_phy_cfg;
	4180	+ ops->autosuspend_en = rtl_runtime_suspend_enable;
4161	4181	break;
4162	4182
4163	4183	case RTL_VER_03:
@@ -4174,6 +4194,7 @@ static int rtl_ops_init(struct r8152 *tp) · 10 unmodified lines
4174	4194	ops->eee_set = r8153_set_eee;
4175	4195	ops->in_nway = rtl8153_in_nway;
4176	4196	ops->hw_phy_cfg = r8153_hw_phy_cfg;
	4197	+ ops->autosuspend_en = rtl8153_runtime_enable;
4177	4198	break;
4178	4199
4179	4200	default:

drivers/net/usb/usbnet.c+7−3

@@ -395,8 +395,11 @@ int usbnet_change_mtu (struct net_device *net, int new_mtu) · 394 unmodified lines
395	395	dev->hard_mtu = net->mtu + net->hard_header_len;
396	396	if (dev->rx_urb_size == old_hard_mtu) {
397	397	dev->rx_urb_size = dev->hard_mtu;
398		− if (dev->rx_urb_size > old_rx_urb_size)
	398	+ if (dev->rx_urb_size > old_rx_urb_size) {
	399	+ usbnet_pause_rx(dev);
399	400	usbnet_unlink_rx_urbs(dev);
	401	+ usbnet_resume_rx(dev);
	402	+ }
400	403	}
401	404
402	405	/* max qlen depend on hard_mtu and rx_urb_size */
@@ -1508,8 +1511,9 @@ static void usbnet_bh (unsigned long param) · 1105 unmodified lines
1508	1511	} else if (netif_running (dev->net) &&
1509	1512	netif_device_present (dev->net) &&
1510	1513	netif_carrier_ok(dev->net) &&
1511		− !timer_pending (&dev->delay) &&
1512		− !test_bit (EVENT_RX_HALT, &dev->flags)) {
	1514	+ !timer_pending(&dev->delay) &&
	1515	+ !test_bit(EVENT_RX_PAUSED, &dev->flags) &&
	1516	+ !test_bit(EVENT_RX_HALT, &dev->flags)) {
1513	1517	int temp = dev->rxq.qlen;
1514	1518
1515	1519	if (temp < RX_QLEN(dev)) {

drivers/nvdimm/pfn_devs.c+40−11

@@ -344,6 +344,8 @@ struct device nd_pfn_create(struct nd_region nd_region) · 343 unmodified lines
344	344	int nd_pfn_validate(struct nd_pfn nd_pfn, const char sig)
345	345	{
346	346	u64 checksum, offset;
	347	+ unsigned long align;
	348	+ enum nd_pfn_mode mode;
347	349	struct nd_namespace_io *nsio;
348	350	struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb;
349	351	struct nd_namespace_common *ndns = nd_pfn->ndns;
@@ -386,22 +388,50 @@ int nd_pfn_validate(struct nd_pfn nd_pfn, const char sig) · 36 unmodified lines
386	388	return -ENXIO;
387	389	}
388	390
	391	+ align = le32_to_cpu(pfn_sb->align);
	392	+ offset = le64_to_cpu(pfn_sb->dataoff);
	393	+ if (align == 0)
	394	+ align = 1UL << ilog2(offset);
	395	+ mode = le32_to_cpu(pfn_sb->mode);
	396	+
389	397	if (!nd_pfn->uuid) {
390		− /* from probe we allocate */
	398	+ /*
	399	+ * When probing a namepace via nd_pfn_probe() the uuid
	400	+ * is NULL (see: nd_pfn_devinit()) we init settings from
	401	+ * pfn_sb
	402	+ */
391	403	nd_pfn->uuid = kmemdup(pfn_sb->uuid, 16, GFP_KERNEL);
392	404	if (!nd_pfn->uuid)
393	405	return -ENOMEM;
	406	+ nd_pfn->align = align;
	407	+ nd_pfn->mode = mode;
394	408	} else {
395		− /* from init we validate */
	409	+ /*
	410	+ * When probing a pfn / dax instance we validate the
	411	+ * live settings against the pfn_sb
	412	+ */
396	413	if (memcmp(nd_pfn->uuid, pfn_sb->uuid, 16) != 0)
397	414	return -ENODEV;
	415	+
	416	+ /*
	417	+ * If the uuid validates, but other settings mismatch
	418	+ * return EINVAL because userspace has managed to change
	419	+ * the configuration without specifying new
	420	+ * identification.
	421	+ */
	422	+ if (nd_pfn->align != align \|\| nd_pfn->mode != mode) {
	423	+ dev_err(&nd_pfn->dev,
	424	+ "init failed, settings mismatch\n");
	425	+ dev_dbg(&nd_pfn->dev, "align: %lx:%lx mode: %d:%d\n",
	426	+ nd_pfn->align, align, nd_pfn->mode,
	427	+ mode);
	428	+ return -EINVAL;
	429	+ }
398	430	}
399	431
400		− if (nd_pfn->align == 0)
401		− nd_pfn->align = le32_to_cpu(pfn_sb->align);
402		− if (nd_pfn->align > nvdimm_namespace_capacity(ndns)) {
	432	+ if (align > nvdimm_namespace_capacity(ndns)) {
403	433	dev_err(&nd_pfn->dev, "alignment: %lx exceeds capacity %llx\n",
404		− nd_pfn->align, nvdimm_namespace_capacity(ndns));
	434	+ align, nvdimm_namespace_capacity(ndns));
405	435	return -EINVAL;
406	436	}
407	437
@@ -411,7 +441,6 @@ int nd_pfn_validate(struct nd_pfn nd_pfn, const char sig) · 3 unmodified lines
411	441	* namespace has changed since the pfn superblock was
412	442	* established.
413	443	*/
414		− offset = le64_to_cpu(pfn_sb->dataoff);
415	444	nsio = to_nd_namespace_io(&ndns->dev);
416	445	if (offset >= resource_size(&nsio->res)) {
417	446	dev_err(&nd_pfn->dev, "pfn array size exceeds capacity of %s\n",
@@ -419,10 +448,11 @@ int nd_pfn_validate(struct nd_pfn nd_pfn, const char sig) · 1 unmodified line
419	448	return -EBUSY;
420	449	}
421	450
422		− if ((nd_pfn->align && !IS_ALIGNED(offset, nd_pfn->align))
	451	+ if ((align && !IS_ALIGNED(offset, align))
423	452	\|\| !IS_ALIGNED(offset, PAGE_SIZE)) {
424		− dev_err(&nd_pfn->dev, "bad offset: %#llx dax disabled\n",
425		− offset);
	453	+ dev_err(&nd_pfn->dev,
	454	+ "bad offset: %#llx dax disabled align: %#lx\n",
	455	+ offset, align);
426	456	return -ENXIO;
427	457	}
428	458
@@ -502,7 +532,6 @@ static struct vmem_altmap __nvdimm_setup_pfn(struct nd_pfn nd_pfn, · 73 unmodified lines
502	532	res->start += start_pad;
503	533	res->end -= end_trunc;
504	534
505		− nd_pfn->mode = le32_to_cpu(nd_pfn->pfn_sb->mode);
506	535	if (nd_pfn->mode == PFN_MODE_RAM) {
507	536	if (offset < SZ_8K)
508	537	return ERR_PTR(-EINVAL);

drivers/phy/phy-bcm-ns-usb2.c+2−2

@@ -109,8 +109,8 @@ static int bcm_ns_usb2_probe(struct platform_device *pdev) · 108 unmodified lines
109	109	}
110	110
111	111	usb2->phy = devm_phy_create(dev, NULL, &ops);
112		− if (IS_ERR(dev))
113		− return PTR_ERR(dev);
	112	+ if (IS_ERR(usb2->phy))
	113	+ return PTR_ERR(usb2->phy);
114	114
115	115	phy_set_drvdata(usb2->phy, usb2);
116	116	platform_set_drvdata(pdev, usb2);

drivers/phy/phy-miphy28lp.c+2−1

@@ -1143,7 +1143,8 @@ static int miphy28lp_probe_resets(struct device_node *node, · 1142 unmodified lines
1143	1143	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;
1144	1144	int err;
1145	1145
1146		− miphy_phy->miphy_rst = of_reset_control_get(node, "miphy-sw-rst");
	1146	+ miphy_phy->miphy_rst =
	1147	+ of_reset_control_get_shared(node, "miphy-sw-rst");
1147	1148
1148	1149	if (IS_ERR(miphy_phy->miphy_rst)) {
1149	1150	dev_err(miphy_dev->dev,

drivers/phy/phy-rcar-gen3-usb2.c+1−13

@@ -144,12 +144,6 @@ static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch) · 143 unmodified lines
144	144	extcon_set_cable_state_(ch->extcon, EXTCON_USB, true);
145	145	}
146	146
147		−static bool rcar_gen3_check_vbus(struct rcar_gen3_chan *ch)
148		−{
149		− return !!(readl(ch->base + USB2_ADPCTRL) &
150		− USB2_ADPCTRL_OTGSESSVLD);
151		−}
152		−
153	147	static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
154	148	{
155	149	return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
@@ -157,13 +151,7 @@ static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch) · 1 unmodified line
157	151
158	152	static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
159	153	{
160		− bool is_host = true;
161		−
162		− /* B-device? */
163		− if (rcar_gen3_check_id(ch) && rcar_gen3_check_vbus(ch))
164		− is_host = false;
165		−
166		− if (is_host)
	154	+ if (!rcar_gen3_check_id(ch))
167	155	rcar_gen3_init_for_host(ch);
168	156	else
169	157	rcar_gen3_init_for_peri(ch);

drivers/phy/phy-rockchip-dp.c+1−1

@@ -90,7 +90,7 @@ static int rockchip_dp_phy_probe(struct platform_device *pdev) · 89 unmodified lines
90	90	return -ENODEV;
91	91
92	92	dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL);
93		− if (IS_ERR(dp))
	93	+ if (!dp)
94	94	return -ENOMEM;
95	95
96	96	dp->dev = dev;

drivers/phy/phy-stih407-usb.c+2−2

@@ -105,13 +105,13 @@ static int stih407_usb2_picophy_probe(struct platform_device *pdev) · 104 unmodified lines
105	105	phy_dev->dev = dev;
106	106	dev_set_drvdata(dev, phy_dev);
107	107
108		− phy_dev->rstc = devm_reset_control_get(dev, "global");
	108	+ phy_dev->rstc = devm_reset_control_get_shared(dev, "global");
109	109	if (IS_ERR(phy_dev->rstc)) {
110	110	dev_err(dev, "failed to ctrl picoPHY reset\n");
111	111	return PTR_ERR(phy_dev->rstc);
112	112	}
113	113
114		− phy_dev->rstport = devm_reset_control_get(dev, "port");
	114	+ phy_dev->rstport = devm_reset_control_get_exclusive(dev, "port");
115	115	if (IS_ERR(phy_dev->rstport)) {
116	116	dev_err(dev, "failed to ctrl picoPHY reset\n");
117	117	return PTR_ERR(phy_dev->rstport);

drivers/phy/phy-sun4i-usb.c+7−7

@@ -175,7 +175,7 @@ static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data, · 174 unmodified lines
175	175	{
176	176	struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
177	177	u32 temp, usbc_bit = BIT(phy->index * 2);
178		− void *phyctl = phy_data->base + phy_data->cfg->phyctl_offset;
	178	+ void __iomem *phyctl = phy_data->base + phy_data->cfg->phyctl_offset;
179	179	int i;
180	180
181	181	mutex_lock(&phy_data->mutex);
@@ -514,9 +514,9 @@ static int sun4i_usb_phy_remove(struct platform_device *pdev) · 332 unmodified lines
514	514
515	515	if (data->vbus_power_nb_registered)
516	516	power_supply_unreg_notifier(&data->vbus_power_nb);
517		− if (data->id_det_irq >= 0)
	517	+ if (data->id_det_irq > 0)
518	518	devm_free_irq(dev, data->id_det_irq, data);
519		− if (data->vbus_det_irq >= 0)
	519	+ if (data->vbus_det_irq > 0)
520	520	devm_free_irq(dev, data->vbus_det_irq, data);
521	521
522	522	cancel_delayed_work_sync(&data->detect);
@@ -645,11 +645,11 @@ static int sun4i_usb_phy_probe(struct platform_device *pdev) · 122 unmodified lines
645	645
646	646	data->id_det_irq = gpiod_to_irq(data->id_det_gpio);
647	647	data->vbus_det_irq = gpiod_to_irq(data->vbus_det_gpio);
648		− if ((data->id_det_gpio && data->id_det_irq < 0) \|\|
649		− (data->vbus_det_gpio && data->vbus_det_irq < 0))
	648	+ if ((data->id_det_gpio && data->id_det_irq <= 0) \|\|
	649	+ (data->vbus_det_gpio && data->vbus_det_irq <= 0))
650	650	data->phy0_poll = true;
651	651
652		− if (data->id_det_irq >= 0) {
	652	+ if (data->id_det_irq > 0) {
653	653	ret = devm_request_irq(dev, data->id_det_irq,
654	654	sun4i_usb_phy0_id_vbus_det_irq,
655	655	IRQF_TRIGGER_RISING \| IRQF_TRIGGER_FALLING,
@@ -660,7 +660,7 @@ static int sun4i_usb_phy_probe(struct platform_device *pdev) · 4 unmodified lines
660	660	}
661	661	}
662	662
663		− if (data->vbus_det_irq >= 0) {
	663	+ if (data->vbus_det_irq > 0) {
664	664	ret = devm_request_irq(dev, data->vbus_det_irq,
665	665	sun4i_usb_phy0_id_vbus_det_irq,
666	666	IRQF_TRIGGER_RISING \| IRQF_TRIGGER_FALLING,

drivers/platform/chrome/cros_ec_dev.c+7−1

@@ -151,13 +151,19 @@ static long ec_device_ioctl_xcmd(struct cros_ec_dev ec, void __user arg) · 150 unmodified lines
151	151	goto exit;
152	152	}
153	153
	154	+ if (u_cmd.outsize != s_cmd->outsize \|\|
	155	+ u_cmd.insize != s_cmd->insize) {
	156	+ ret = -EINVAL;
	157	+ goto exit;
	158	+ }
	159	+
154	160	s_cmd->command += ec->cmd_offset;
155	161	ret = cros_ec_cmd_xfer(ec->ec_dev, s_cmd);
156	162	/* Only copy data to userland if data was received. */
157	163	if (ret < 0)
158	164	goto exit;
159	165
160		− if (copy_to_user(arg, s_cmd, sizeof(*s_cmd) + u_cmd.insize))
	166	+ if (copy_to_user(arg, s_cmd, sizeof(*s_cmd) + s_cmd->insize))
161	167	ret = -EFAULT;
162	168	exit:
163	169	kfree(s_cmd);

drivers/regulator/anatop-regulator.c+1−1

@@ -296,7 +296,7 @@ static int anatop_regulator_probe(struct platform_device *pdev) · 295 unmodified lines
296	296	if (!sreg->sel && !strcmp(sreg->name, "vddpu"))
297	297	sreg->sel = 22;
298	298
299		− if (!sreg->sel) {
	299	+ if (!sreg->bypass && !sreg->sel) {
300	300	dev_err(&pdev->dev, "Failed to read a valid default voltage selector.\n");
301	301	return -EINVAL;
302	302	}

drivers/regulator/max77620-regulator.c+6−1

@@ -123,6 +123,9 @@ static int max77620_regulator_set_fps_src(struct max77620_regulator *pmic, · 122 unmodified lines
123	123	unsigned int val;
124	124	int ret;
125	125
	126	+ if (!rinfo)
	127	+ return 0;
	128	+
126	129	switch (fps_src) {
127	130	case MAX77620_FPS_SRC_0:
128	131	case MAX77620_FPS_SRC_1:
@@ -171,6 +174,9 @@ static int max77620_regulator_set_fps_slots(struct max77620_regulator *pmic, · 42 unmodified lines
171	174	int pd = rpdata->active_fps_pd_slot;
172	175	int ret = 0;
173	176
	177	+ if (!rinfo)
	178	+ return 0;
	179	+
174	180	if (is_suspend) {
175	181	pu = rpdata->suspend_fps_pu_slot;
176	182	pd = rpdata->suspend_fps_pd_slot;
@@ -680,7 +686,6 @@ static struct max77620_regulator_info max77620_regs_info[MAX77620_NUM_REGS] = { · 503 unmodified lines
680	686	RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 1550000, 12500, 0x22, SD1),
681	687	RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),
682	688	RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),
683		− RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE),
684	689
685	690	RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),
686	691	RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),

drivers/s390/net/qeth_l2_main.c+1−0

@@ -1045,6 +1045,7 @@ static void qeth_l2_remove_device(struct ccwgroup_device *cgdev) · 1044 unmodified lines
1045	1045	qeth_l2_set_offline(cgdev);
1046	1046
1047	1047	if (card->dev) {
	1048	+ netif_napi_del(&card->napi);
1048	1049	unregister_netdev(card->dev);
1049	1050	card->dev = NULL;
1050	1051	}

drivers/s390/net/qeth_l3_main.c+1−0

@@ -3167,6 +3167,7 @@ static void qeth_l3_remove_device(struct ccwgroup_device *cgdev) · 3166 unmodified lines
3167	3167	qeth_l3_set_offline(cgdev);
3168	3168
3169	3169	if (card->dev) {
	3170	+ netif_napi_del(&card->napi);
3170	3171	unregister_netdev(card->dev);
3171	3172	card->dev = NULL;
3172	3173	}

drivers/spi/spi-rockchip.c+3−1

@@ -578,7 +578,7 @@ static int rockchip_spi_transfer_one( · 577 unmodified lines
578	578	struct spi_device *spi,
579	579	struct spi_transfer *xfer)
580	580	{
581		− int ret = 1;
	581	+ int ret = 0;
582	582	struct rockchip_spi *rs = spi_master_get_devdata(master);
583	583
584	584	WARN_ON(readl_relaxed(rs->regs + ROCKCHIP_SPI_SSIENR) &&
@@ -627,6 +627,8 @@ static int rockchip_spi_transfer_one( · 42 unmodified lines
627	627	spi_enable_chip(rs, 1);
628	628	ret = rockchip_spi_prepare_dma(rs);
629	629	}
	630	+ /* successful DMA prepare means the transfer is in progress */
	631	+ ret = ret ? ret : 1;
630	632	} else {
631	633	spi_enable_chip(rs, 1);
632	634	ret = rockchip_spi_pio_transfer(rs);

drivers/spi/spi-sun4i.c+19−4

@@ -173,13 +173,17 @@ static int sun4i_spi_transfer_one(struct spi_master *master, · 172 unmodified lines
173	173	{
174	174	struct sun4i_spi *sspi = spi_master_get_devdata(master);
175	175	unsigned int mclk_rate, div, timeout;
	176	+ unsigned int start, end, tx_time;
176	177	unsigned int tx_len = 0;
177	178	int ret = 0;
178	179	u32 reg;
179	180
180	181	/* We don't support transfer larger than the FIFO */
181	182	if (tfr->len > SUN4I_FIFO_DEPTH)
182		− return -EINVAL;
	183	+ return -EMSGSIZE;
	184	+
	185	+ if (tfr->tx_buf && tfr->len >= SUN4I_FIFO_DEPTH)
	186	+ return -EMSGSIZE;
183	187
184	188	reinit_completion(&sspi->done);
185	189	sspi->tx_buf = tfr->tx_buf;
@@ -269,8 +273,12 @@ static int sun4i_spi_transfer_one(struct spi_master *master, · 83 unmodified lines
269	273	sun4i_spi_write(sspi, SUN4I_BURST_CNT_REG, SUN4I_BURST_CNT(tfr->len));
270	274	sun4i_spi_write(sspi, SUN4I_XMIT_CNT_REG, SUN4I_XMIT_CNT(tx_len));
271	275
272		− /* Fill the TX FIFO */
273		− sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH);
	276	+ /*
	277	+ * Fill the TX FIFO
	278	+ * Filling the FIFO fully causes timeout for some reason
	279	+ * at least on spi2 on A10s
	280	+ */
	281	+ sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH - 1);
274	282
275	283	/* Enable the interrupts */
276	284	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, SUN4I_INT_CTL_TC);
@@ -279,9 +287,16 @@ static int sun4i_spi_transfer_one(struct spi_master *master, · 2 unmodified lines
279	287	reg = sun4i_spi_read(sspi, SUN4I_CTL_REG);
280	288	sun4i_spi_write(sspi, SUN4I_CTL_REG, reg \| SUN4I_CTL_XCH);
281	289
	290	+ tx_time = max(tfr->len * 8 * 2 / (tfr->speed_hz / 1000), 100U);
	291	+ start = jiffies;
282	292	timeout = wait_for_completion_timeout(&sspi->done,
283		− msecs_to_jiffies(1000));
	293	+ msecs_to_jiffies(tx_time));
	294	+ end = jiffies;
284	295	if (!timeout) {
	296	+ dev_warn(&master->dev,
	297	+ "%s: timeout transferring %u bytes@%iHz for %i(%i)ms",
	298	+ dev_name(&spi->dev), tfr->len, tfr->speed_hz,
	299	+ jiffies_to_msecs(end - start), tx_time);
285	300	ret = -ETIMEDOUT;
286	301	goto out;
287	302	}

drivers/spi/spi-sun6i.c+9−1

@@ -160,6 +160,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master, · 159 unmodified lines
160	160	{
161	161	struct sun6i_spi *sspi = spi_master_get_devdata(master);
162	162	unsigned int mclk_rate, div, timeout;
	163	+ unsigned int start, end, tx_time;
163	164	unsigned int tx_len = 0;
164	165	int ret = 0;
165	166	u32 reg;
@@ -269,9 +270,16 @@ static int sun6i_spi_transfer_one(struct spi_master *master, · 103 unmodified lines
269	270	reg = sun6i_spi_read(sspi, SUN6I_TFR_CTL_REG);
270	271	sun6i_spi_write(sspi, SUN6I_TFR_CTL_REG, reg \| SUN6I_TFR_CTL_XCH);
271	272
	273	+ tx_time = max(tfr->len * 8 * 2 / (tfr->speed_hz / 1000), 100U);
	274	+ start = jiffies;
272	275	timeout = wait_for_completion_timeout(&sspi->done,
273		− msecs_to_jiffies(1000));
	276	+ msecs_to_jiffies(tx_time));
	277	+ end = jiffies;
274	278	if (!timeout) {
	279	+ dev_warn(&master->dev,
	280	+ "%s: timeout transferring %u bytes@%iHz for %i(%i)ms",
	281	+ dev_name(&spi->dev), tfr->len, tfr->speed_hz,
	282	+ jiffies_to_msecs(end - start), tx_time);
275	283	ret = -ETIMEDOUT;
276	284	goto out;
277	285	}

drivers/spi/spi-ti-qspi.c+7−0

@@ -646,6 +646,13 @@ free_master: · 645 unmodified lines
646	646
647	647	static int ti_qspi_remove(struct platform_device *pdev)
648	648	{
	649	+ struct ti_qspi *qspi = platform_get_drvdata(pdev);
	650	+ int rc;
	651	+
	652	+ rc = spi_master_suspend(qspi->master);
	653	+ if (rc)
	654	+ return rc;
	655	+
649	656	pm_runtime_put_sync(&pdev->dev);
650	657	pm_runtime_disable(&pdev->dev);
651	658

drivers/staging/iio/accel/sca3000_core.c+1−1

@@ -594,7 +594,7 @@ static ssize_t sca3000_read_frequency(struct device *dev, · 593 unmodified lines
594	594	goto error_ret_mut;
595	595	ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL);
596	596	mutex_unlock(&st->lock);
597		− if (ret)
	597	+ if (ret < 0)
598	598	goto error_ret;
599	599	val = ret;
600	600	if (base_freq > 0)

drivers/staging/iio/adc/ad7606_spi.c+1−1

@@ -21,7 +21,7 @@ static int ad7606_spi_read_block(struct device *dev, · 20 unmodified lines
21	21	{
22	22	struct spi_device *spi = to_spi_device(dev);
23	23	int i, ret;
24		− unsigned short *data;
	24	+ unsigned short *data = buf;
25	25	__be16 *bdata = buf;
26	26
27	27	ret = spi_read(spi, buf, count * 2);

drivers/staging/iio/impedance-analyzer/ad5933.c+3−3

@@ -444,10 +444,10 @@ static ssize_t ad5933_store(struct device *dev, · 443 unmodified lines
444	444	st->settling_cycles = val;
445	445
446	446	/* 2x, 4x handling, see datasheet */
447		− if (val > 511)
448		− val = (val >> 1) \| (1 << 9);
449		− else if (val > 1022)
	447	+ if (val > 1022)
450	448	val = (val >> 2) \| (3 << 9);
	449	+ else if (val > 511)
	450	+ val = (val >> 1) \| (1 << 9);
451	451
452	452	dat = cpu_to_be16(val);
453	453	ret = ad5933_i2c_write(st->client,

drivers/tty/pty.c+5−2

@@ -667,8 +667,11 @@ static void pty_unix98_remove(struct tty_driver driver, struct tty_struct tty) · 666 unmodified lines
667	667	fsi = tty->driver_data;
668	668	else
669	669	fsi = tty->link->driver_data;
670		− devpts_kill_index(fsi, tty->index);
671		− devpts_release(fsi);
	670	+
	671	+ if (fsi) {
	672	+ devpts_kill_index(fsi, tty->index);
	673	+ devpts_release(fsi);
	674	+ }
672	675	}
673	676
674	677	static const struct tty_operations ptm_unix98_ops = {

drivers/tty/vt/vt.c+1−0

@@ -750,6 +750,7 @@ static void visual_init(struct vc_data *vc, int num, int init) · 749 unmodified lines
750	750	vc->vc_complement_mask = 0;
751	751	vc->vc_can_do_color = 0;
752	752	vc->vc_panic_force_write = false;
	753	+ vc->vc_cur_blink_ms = DEFAULT_CURSOR_BLINK_MS;
753	754	vc->vc_sw->con_init(vc, init);
754	755	if (!vc->vc_complement_mask)
755	756	vc->vc_complement_mask = vc->vc_can_do_color ? 0x7700 : 0x0800;

drivers/usb/common/usb-otg-fsm.c+2−0

@@ -21,6 +21,7 @@ · 20 unmodified lines
21	21	* 675 Mass Ave, Cambridge, MA 02139, USA.
22	22	*/
23	23
	24	+#include <linux/module.h>
24	25	#include <linux/kernel.h>
25	26	#include <linux/types.h>
26	27	#include <linux/mutex.h>
@@ -450,3 +451,4 @@ int otg_statemachine(struct otg_fsm *fsm) · 423 unmodified lines
450	451	return fsm->state_changed;
451	452	}
452	453	EXPORT_SYMBOL_GPL(otg_statemachine);
	454	+MODULE_LICENSE("GPL");

drivers/usb/core/hcd.c+7−10

@@ -2598,26 +2598,23 @@ EXPORT_SYMBOL_GPL(usb_create_hcd); · 2597 unmodified lines
2598	2598	* Don't deallocate the bandwidth_mutex until the last shared usb_hcd is
2599	2599	* deallocated.
2600	2600	*
2601		− * Make sure to only deallocate the bandwidth_mutex when the primary HCD is
2602		− * freed. When hcd_release() is called for either hcd in a peer set
2603		− * invalidate the peer's ->shared_hcd and ->primary_hcd pointers to
2604		− * block new peering attempts
	2601	+ * Make sure to deallocate the bandwidth_mutex only when the last HCD is
	2602	+ * freed. When hcd_release() is called for either hcd in a peer set,
	2603	+ * invalidate the peer's ->shared_hcd and ->primary_hcd pointers.
2605	2604	*/
2606	2605	static void hcd_release(struct kref *kref)
2607	2606	{
2608	2607	struct usb_hcd *hcd = container_of (kref, struct usb_hcd, kref);
2609	2608
2610	2609	mutex_lock(&usb_port_peer_mutex);
2611		− if (usb_hcd_is_primary_hcd(hcd)) {
2612		− kfree(hcd->address0_mutex);
2613		− kfree(hcd->bandwidth_mutex);
2614		− }
2615	2610	if (hcd->shared_hcd) {
2616	2611	struct usb_hcd *peer = hcd->shared_hcd;
2617	2612
2618	2613	peer->shared_hcd = NULL;
2619		− if (peer->primary_hcd == hcd)
2620		− peer->primary_hcd = NULL;
	2614	+ peer->primary_hcd = NULL;
	2615	+ } else {
	2616	+ kfree(hcd->address0_mutex);
	2617	+ kfree(hcd->bandwidth_mutex);
2621	2618	}
2622	2619	mutex_unlock(&usb_port_peer_mutex);
2623	2620	kfree(hcd);

drivers/usb/dwc3/dwc3-st.c+4−2

@@ -233,7 +233,8 @@ static int st_dwc3_probe(struct platform_device *pdev) · 232 unmodified lines
233	233	dev_vdbg(&pdev->dev, "glue-logic addr 0x%p, syscfg-reg offset 0x%x\n",
234	234	dwc3_data->glue_base, dwc3_data->syscfg_reg_off);
235	235
236		− dwc3_data->rstc_pwrdn = devm_reset_control_get(dev, "powerdown");
	236	+ dwc3_data->rstc_pwrdn =
	237	+ devm_reset_control_get_exclusive(dev, "powerdown");
237	238	if (IS_ERR(dwc3_data->rstc_pwrdn)) {
238	239	dev_err(&pdev->dev, "could not get power controller\n");
239	240	ret = PTR_ERR(dwc3_data->rstc_pwrdn);
@@ -243,7 +244,8 @@ static int st_dwc3_probe(struct platform_device *pdev) · 3 unmodified lines
243	244	/* Manage PowerDown */
244	245	reset_control_deassert(dwc3_data->rstc_pwrdn);
245	246
246		− dwc3_data->rstc_rst = devm_reset_control_get(dev, "softreset");
	247	+ dwc3_data->rstc_rst =
	248	+ devm_reset_control_get_shared(dev, "softreset");
247	249	if (IS_ERR(dwc3_data->rstc_rst)) {
248	250	dev_err(&pdev->dev, "could not get reset controller\n");
249	251	ret = PTR_ERR(dwc3_data->rstc_rst);

drivers/usb/host/ehci-st.c+4−2

@@ -206,7 +206,8 @@ static int st_ehci_platform_probe(struct platform_device *dev) · 205 unmodified lines
206	206	priv->clk48 = NULL;
207	207	}
208	208
209		− priv->pwr = devm_reset_control_get_optional(&dev->dev, "power");
	209	+ priv->pwr =
	210	+ devm_reset_control_get_optional_shared(&dev->dev, "power");
210	211	if (IS_ERR(priv->pwr)) {
211	212	err = PTR_ERR(priv->pwr);
212	213	if (err == -EPROBE_DEFER)
@@ -214,7 +215,8 @@ static int st_ehci_platform_probe(struct platform_device *dev) · 1 unmodified line
214	215	priv->pwr = NULL;
215	216	}
216	217
217		− priv->rst = devm_reset_control_get_optional(&dev->dev, "softreset");
	218	+ priv->rst =
	219	+ devm_reset_control_get_optional_shared(&dev->dev, "softreset");
218	220	if (IS_ERR(priv->rst)) {
219	221	err = PTR_ERR(priv->rst);
220	222	if (err == -EPROBE_DEFER)

drivers/usb/host/ohci-st.c+4−2

@@ -188,13 +188,15 @@ static int st_ohci_platform_probe(struct platform_device *dev) · 187 unmodified lines
188	188	priv->clk48 = NULL;
189	189	}
190	190
191		− priv->pwr = devm_reset_control_get_optional(&dev->dev, "power");
	191	+ priv->pwr =
	192	+ devm_reset_control_get_optional_shared(&dev->dev, "power");
192	193	if (IS_ERR(priv->pwr)) {
193	194	err = PTR_ERR(priv->pwr);
194	195	goto err_put_clks;
195	196	}
196	197
197		− priv->rst = devm_reset_control_get_optional(&dev->dev, "softreset");
	198	+ priv->rst =
	199	+ devm_reset_control_get_optional_shared(&dev->dev, "softreset");
198	200	if (IS_ERR(priv->rst)) {
199	201	err = PTR_ERR(priv->rst);
200	202	goto err_put_clks;

fs/9p/vfs_file.c+3−3

@@ -74,7 +74,7 @@ int v9fs_file_open(struct inode inode, struct file file) · 73 unmodified lines
74	74	v9fs_proto_dotu(v9ses));
75	75	fid = file->private_data;
76	76	if (!fid) {
77		− fid = v9fs_fid_clone(file->f_path.dentry);
	77	+ fid = v9fs_fid_clone(file_dentry(file));
78	78	if (IS_ERR(fid))
79	79	return PTR_ERR(fid);
80	80
@@ -100,7 +100,7 @@ int v9fs_file_open(struct inode inode, struct file file) · 19 unmodified lines
100	100	* because we want write after unlink usecase
101	101	* to work.
102	102	*/
103		− fid = v9fs_writeback_fid(file->f_path.dentry);
	103	+ fid = v9fs_writeback_fid(file_dentry(file));
104	104	if (IS_ERR(fid)) {
105	105	err = PTR_ERR(fid);
106	106	mutex_unlock(&v9inode->v_mutex);
@@ -516,7 +516,7 @@ v9fs_mmap_file_mmap(struct file filp, struct vm_area_struct vma) · 409 unmodified lines
516	516	* because we want write after unlink usecase
517	517	* to work.
518	518	*/
519		− fid = v9fs_writeback_fid(filp->f_path.dentry);
	519	+ fid = v9fs_writeback_fid(file_dentry(filp));
520	520	if (IS_ERR(fid)) {
521	521	retval = PTR_ERR(fid);
522	522	mutex_unlock(&v9inode->v_mutex);

fs/ceph/export.c+3−7

@@ -95,10 +95,8 @@ static struct dentry __fh_to_dentry(struct super_block sb, u64 ino) · 94 unmodified lines
95	95	}
96	96
97	97	dentry = d_obtain_alias(inode);
98		− if (IS_ERR(dentry)) {
99		− iput(inode);
	98	+ if (IS_ERR(dentry))
100	99	return dentry;
101		− }
102	100	err = ceph_init_dentry(dentry);
103	101	if (err < 0) {
104	102	dput(dentry);
@@ -167,10 +165,8 @@ static struct dentry __get_parent(struct super_block sb, · 62 unmodified lines
167	165	return ERR_PTR(-ENOENT);
168	166
169	167	dentry = d_obtain_alias(inode);
170		− if (IS_ERR(dentry)) {
171		− iput(inode);
	168	+ if (IS_ERR(dentry))
172	169	return dentry;
173		− }
174	170	err = ceph_init_dentry(dentry);
175	171	if (err < 0) {
176	172	dput(dentry);
@@ -210,7 +206,7 @@ static struct dentry ceph_fh_to_parent(struct super_block sb, · 33 unmodified lines
210	206
211	207	dout("fh_to_parent %llx\n", cfh->parent_ino);
212	208	dentry = __get_parent(sb, NULL, cfh->ino);
213		− if (IS_ERR(dentry) && PTR_ERR(dentry) == -ENOENT)
	209	+ if (unlikely(dentry == ERR_PTR(-ENOENT)))
214	210	dentry = __fh_to_dentry(sb, cfh->parent_ino);
215	211	return dentry;
216	212	}

fs/dax.c+6−1

@@ -208,7 +208,12 @@ static ssize_t dax_io(struct inode inode, struct iov_iter iter, · 207 unmodified lines
208	208	dax.addr += first;
209	209	size = map_len - first;
210	210	}
211		− max = min(pos + size, end);
	211	+ /*
	212	+ * pos + size is one past the last offset for IO,
	213	+ * so pos + size can overflow loff_t at extreme offsets.
	214	+ * Cast to u64 to catch this and get the true minimum.
	215	+ */
	216	+ max = min_t(u64, pos + size, end);
212	217	}
213	218
214	219	if (iov_iter_rw(iter) == WRITE) {

fs/fuse/dir.c+4−0

@@ -341,8 +341,10 @@ static struct dentry fuse_lookup(struct inode dir, struct dentry *entry, · 340 unmodified lines
341	341	struct dentry *newent;
342	342	bool outarg_valid = true;
343	343
	344	+ fuse_lock_inode(dir);
344	345	err = fuse_lookup_name(dir->i_sb, get_node_id(dir), &entry->d_name,
345	346	&outarg, &inode);
	347	+ fuse_unlock_inode(dir);
346	348	if (err == -ENOENT) {
347	349	outarg_valid = false;
348	350	err = 0;
@@ -1341,7 +1343,9 @@ static int fuse_readdir(struct file file, struct dir_context ctx) · 992 unmodified lines
1341	1343	fuse_read_fill(req, file, ctx->pos, PAGE_SIZE,
1342	1344	FUSE_READDIR);
1343	1345	}
	1346	+ fuse_lock_inode(inode);
1344	1347	fuse_request_send(fc, req);
	1348	+ fuse_unlock_inode(inode);
1345	1349	nbytes = req->out.args[0].size;
1346	1350	err = req->out.h.error;
1347	1351	fuse_put_request(fc, req);

fs/fuse/fuse_i.h+9−0

@@ -110,6 +110,9 @@ struct fuse_inode { · 109 unmodified lines
110	110
111	111	/** Miscellaneous bits describing inode state */
112	112	unsigned long state;
	113	+
	114	+ /** Lock for serializing lookup and readdir for back compatibility*/
	115	+ struct mutex mutex;
113	116	};
114	117
115	118	/** FUSE inode state bits */
@@ -540,6 +543,9 @@ struct fuse_conn { · 424 unmodified lines
540	543	/** write-back cache policy (default is write-through) */
541	544	unsigned writeback_cache:1;
542	545
	546	+ /** allow parallel lookups and readdir (default is serialized) */
	547	+ unsigned parallel_dirops:1;
	548	+
543	549	/*
544	550	* The following bitfields are only for optimization purposes
545	551	* and hence races in setting them will not cause malfunction
@@ -956,4 +962,7 @@ int fuse_do_setattr(struct inode inode, struct iattr attr, · 410 unmodified lines
956	962
957	963	void fuse_set_initialized(struct fuse_conn *fc);
958	964
	965	+void fuse_unlock_inode(struct inode *inode);
	966	+void fuse_lock_inode(struct inode *inode);
	967	+
959	968	#endif /* _FS_FUSE_I_H */

fs/fuse/inode.c+18−1

@@ -97,6 +97,7 @@ static struct inode fuse_alloc_inode(struct super_block sb) · 96 unmodified lines
97	97	INIT_LIST_HEAD(&fi->queued_writes);
98	98	INIT_LIST_HEAD(&fi->writepages);
99	99	init_waitqueue_head(&fi->page_waitq);
	100	+ mutex_init(&fi->mutex);
100	101	fi->forget = fuse_alloc_forget();
101	102	if (!fi->forget) {
102	103	kmem_cache_free(fuse_inode_cachep, inode);
@@ -117,6 +118,7 @@ static void fuse_destroy_inode(struct inode *inode) · 14 unmodified lines
117	118	struct fuse_inode *fi = get_fuse_inode(inode);
118	119	BUG_ON(!list_empty(&fi->write_files));
119	120	BUG_ON(!list_empty(&fi->queued_writes));
	121	+ mutex_destroy(&fi->mutex);
120	122	kfree(fi->forget);
121	123	call_rcu(&inode->i_rcu, fuse_i_callback);
122	124	}
@@ -351,6 +353,18 @@ int fuse_reverse_inval_inode(struct super_block *sb, u64 nodeid, · 228 unmodified lines
351	353	return 0;
352	354	}
353	355
	356	+void fuse_lock_inode(struct inode *inode)
	357	+{
	358	+ if (!get_fuse_conn(inode)->parallel_dirops)
	359	+ mutex_lock(&get_fuse_inode(inode)->mutex);
	360	+}
	361	+
	362	+void fuse_unlock_inode(struct inode *inode)
	363	+{
	364	+ if (!get_fuse_conn(inode)->parallel_dirops)
	365	+ mutex_unlock(&get_fuse_inode(inode)->mutex);
	366	+}
	367	+
354	368	static void fuse_umount_begin(struct super_block *sb)
355	369	{
356	370	fuse_abort_conn(get_fuse_conn_super(sb));
@@ -898,6 +912,8 @@ static void process_init_reply(struct fuse_conn fc, struct fuse_req req) · 541 unmodified lines
898	912	fc->async_dio = 1;
899	913	if (arg->flags & FUSE_WRITEBACK_CACHE)
900	914	fc->writeback_cache = 1;
	915	+ if (arg->flags & FUSE_PARALLEL_DIROPS)
	916	+ fc->parallel_dirops = 1;
901	917	if (arg->time_gran && arg->time_gran <= 1000000000)
902	918	fc->sb->s_time_gran = arg->time_gran;
903	919	} else {
@@ -928,7 +944,8 @@ static void fuse_send_init(struct fuse_conn fc, struct fuse_req req) · 24 unmodified lines
928	944	FUSE_SPLICE_WRITE \| FUSE_SPLICE_MOVE \| FUSE_SPLICE_READ \|
929	945	FUSE_FLOCK_LOCKS \| FUSE_IOCTL_DIR \| FUSE_AUTO_INVAL_DATA \|
930	946	FUSE_DO_READDIRPLUS \| FUSE_READDIRPLUS_AUTO \| FUSE_ASYNC_DIO \|
931		− FUSE_WRITEBACK_CACHE \| FUSE_NO_OPEN_SUPPORT;
	947	+ FUSE_WRITEBACK_CACHE \| FUSE_NO_OPEN_SUPPORT \|
	948	+ FUSE_PARALLEL_DIROPS;
932	949	req->in.h.opcode = FUSE_INIT;
933	950	req->in.numargs = 1;
934	951	req->in.args[0].size = sizeof(*arg);

fs/libfs.c+71−38

@@ -84,6 +84,61 @@ int dcache_dir_close(struct inode inode, struct file file) · 83 unmodified lines
84	84	}
85	85	EXPORT_SYMBOL(dcache_dir_close);
86	86
	87	+/* parent is locked at least shared */
	88	+static struct dentry next_positive(struct dentry parent,
	89	+ struct list_head *from,
	90	+ int count)
	91	+{
	92	+ unsigned *seq = &parent->d_inode->i_dir_seq, n;
	93	+ struct dentry *res;
	94	+ struct list_head *p;
	95	+ bool skipped;
	96	+ int i;
	97	+
	98	+retry:
	99	+ i = count;
	100	+ skipped = false;
	101	+ n = smp_load_acquire(seq) & ~1;
	102	+ res = NULL;
	103	+ rcu_read_lock();
	104	+ for (p = from->next; p != &parent->d_subdirs; p = p->next) {
	105	+ struct dentry *d = list_entry(p, struct dentry, d_child);
	106	+ if (!simple_positive(d)) {
	107	+ skipped = true;
	108	+ } else if (!--i) {
	109	+ res = d;
	110	+ break;
	111	+ }
	112	+ }
	113	+ rcu_read_unlock();
	114	+ if (skipped) {
	115	+ smp_rmb();
	116	+ if (unlikely(*seq != n))
	117	+ goto retry;
	118	+ }
	119	+ return res;
	120	+}
	121	+
	122	+static void move_cursor(struct dentry cursor, struct list_head after)
	123	+{
	124	+ struct dentry *parent = cursor->d_parent;
	125	+ unsigned n, *seq = &parent->d_inode->i_dir_seq;
	126	+ spin_lock(&parent->d_lock);
	127	+ for (;;) {
	128	+ n = *seq;
	129	+ if (!(n & 1) && cmpxchg(seq, n, n + 1) == n)
	130	+ break;
	131	+ cpu_relax();
	132	+ }
	133	+ __list_del(cursor->d_child.prev, cursor->d_child.next);
	134	+ if (after)
	135	+ list_add(&cursor->d_child, after);
	136	+ else
	137	+ list_add_tail(&cursor->d_child, &parent->d_subdirs);
	138	+ smp_store_release(seq, n + 2);
	139	+ spin_unlock(&parent->d_lock);
	140	+}
	141	+
87	142	loff_t dcache_dir_lseek(struct file *file, loff_t offset, int whence)
88	143	{
89	144	struct dentry *dentry = file->f_path.dentry;
@@ -99,25 +154,14 @@ loff_t dcache_dir_lseek(struct file *file, loff_t offset, int whence) · 9 unmodified lines
99	154	if (offset != file->f_pos) {
100	155	file->f_pos = offset;
101	156	if (file->f_pos >= 2) {
102		− struct list_head *p;
103	157	struct dentry *cursor = file->private_data;
	158	+ struct dentry *to;
104	159	loff_t n = file->f_pos - 2;
105	160
106		− spin_lock(&dentry->d_lock);
107		− /* d_lock not required for cursor */
108		− list_del(&cursor->d_child);
109		− p = dentry->d_subdirs.next;
110		− while (n && p != &dentry->d_subdirs) {
111		− struct dentry *next;
112		− next = list_entry(p, struct dentry, d_child);
113		− spin_lock_nested(&next->d_lock, DENTRY_D_LOCK_NESTED);
114		− if (simple_positive(next))
115		− n--;
116		− spin_unlock(&next->d_lock);
117		− p = p->next;
118		− }
119		− list_add_tail(&cursor->d_child, p);
120		− spin_unlock(&dentry->d_lock);
	161	+ inode_lock_shared(dentry->d_inode);
	162	+ to = next_positive(dentry, &dentry->d_subdirs, n);
	163	+ move_cursor(cursor, to ? &to->d_child : NULL);
	164	+ inode_unlock_shared(dentry->d_inode);
121	165	}
122	166	}
123	167	return offset;
@@ -140,36 +184,25 @@ int dcache_readdir(struct file file, struct dir_context ctx) · 16 unmodified lines
140	184	{
141	185	struct dentry *dentry = file->f_path.dentry;
142	186	struct dentry *cursor = file->private_data;
143		− struct list_head p, q = &cursor->d_child;
	187	+ struct list_head *p = &cursor->d_child;
	188	+ struct dentry *next;
	189	+ bool moved = false;
144	190
145	191	if (!dir_emit_dots(file, ctx))
146	192	return 0;
147		− spin_lock(&dentry->d_lock);
148		− if (ctx->pos == 2)
149		− list_move(q, &dentry->d_subdirs);
150	193
151		− for (p = q->next; p != &dentry->d_subdirs; p = p->next) {
152		− struct dentry *next = list_entry(p, struct dentry, d_child);
153		− spin_lock_nested(&next->d_lock, DENTRY_D_LOCK_NESTED);
154		− if (!simple_positive(next)) {
155		− spin_unlock(&next->d_lock);
156		− continue;
157		− }
158		−
159		− spin_unlock(&next->d_lock);
160		− spin_unlock(&dentry->d_lock);
	194	+ if (ctx->pos == 2)
	195	+ p = &dentry->d_subdirs;
	196	+ while ((next = next_positive(dentry, p, 1)) != NULL) {
161	197	if (!dir_emit(ctx, next->d_name.name, next->d_name.len,
162	198	d_inode(next)->i_ino, dt_type(d_inode(next))))
163		− return 0;
164		− spin_lock(&dentry->d_lock);
165		− spin_lock_nested(&next->d_lock, DENTRY_D_LOCK_NESTED);
166		− /* next is still alive */
167		− list_move(q, p);
168		− spin_unlock(&next->d_lock);
169		− p = q;
	199	+ break;
	200	+ moved = true;
	201	+ p = &next->d_child;
170	202	ctx->pos++;
171	203	}
172		− spin_unlock(&dentry->d_lock);
	204	+ if (moved)
	205	+ move_cursor(cursor, p);
173	206	return 0;
174	207	}
175	208	EXPORT_SYMBOL(dcache_readdir);

fs/lockd/svc.c+10−3

@@ -335,12 +335,17 @@ static struct notifier_block lockd_inet6addr_notifier = { · 334 unmodified lines
335	335	};
336	336	#endif
337	337
338		−static void lockd_svc_exit_thread(void)
	338	+static void lockd_unregister_notifiers(void)
339	339	{
340	340	unregister_inetaddr_notifier(&lockd_inetaddr_notifier);
341	341	#if IS_ENABLED(CONFIG_IPV6)
342	342	unregister_inet6addr_notifier(&lockd_inet6addr_notifier);
343	343	#endif
	344	+}
	345	+
	346	+static void lockd_svc_exit_thread(void)
	347	+{
	348	+ lockd_unregister_notifiers();
344	349	svc_exit_thread(nlmsvc_rqst);
345	350	}
346	351
@@ -462,7 +467,7 @@ int lockd_up(struct net *net) · 115 unmodified lines
462	467	* Note: svc_serv structures have an initial use count of 1,
463	468	* so we exit through here on both success and failure.
464	469	*/
465		−err_net:
	470	+err_put:
466	471	svc_destroy(serv);
467	472	err_create:
468	473	mutex_unlock(&nlmsvc_mutex);
@@ -470,7 +475,9 @@ err_create: · 1 unmodified line
470	475
471	476	err_start:
472	477	lockd_down_net(serv, net);
473		− goto err_net;
	478	+err_net:
	479	+ lockd_unregister_notifiers();
	480	+ goto err_put;
474	481	}
475	482	EXPORT_SYMBOL_GPL(lockd_up);
476	483

fs/locks.c+1−1

@@ -1628,7 +1628,7 @@ generic_add_lease(struct file filp, long arg, struct file_lock flp, void *pr · 1627 unmodified lines
1628	1628	{
1629	1629	struct file_lock fl, my_fl = NULL, *lease;
1630	1630	struct dentry *dentry = filp->f_path.dentry;
1631		− struct inode *inode = dentry->d_inode;
	1631	+ struct inode *inode = file_inode(filp);
1632	1632	struct file_lock_context *ctx;
1633	1633	bool is_deleg = (*flp)->fl_flags & FL_DELEG;
1634	1634	int error;

fs/namespace.c+1−0

@@ -1562,6 +1562,7 @@ void __detach_mounts(struct dentry *dentry) · 1561 unmodified lines
1562	1562	goto out_unlock;
1563	1563
1564	1564	lock_mount_hash();
	1565	+ event++;
1565	1566	while (!hlist_empty(&mp->m_list)) {
1566	1567	mnt = hlist_entry(mp->m_list.first, struct mount, mnt_mp_list);
1567	1568	if (mnt->mnt.mnt_flags & MNT_UMOUNT) {

fs/overlayfs/inode.c+26−3

@@ -59,16 +59,37 @@ int ovl_setattr(struct dentry dentry, struct iattr attr) · 58 unmodified lines
59	59	if (err)
60	60	goto out;
61	61
	62	+ if (attr->ia_valid & ATTR_SIZE) {
	63	+ struct inode *realinode = d_inode(ovl_dentry_real(dentry));
	64	+
	65	+ err = -ETXTBSY;
	66	+ if (atomic_read(&realinode->i_writecount) < 0)
	67	+ goto out_drop_write;
	68	+ }
	69	+
62	70	err = ovl_copy_up(dentry);
63	71	if (!err) {
	72	+ struct inode *winode = NULL;
	73	+
64	74	upperdentry = ovl_dentry_upper(dentry);
65	75
	76	+ if (attr->ia_valid & ATTR_SIZE) {
	77	+ winode = d_inode(upperdentry);
	78	+ err = get_write_access(winode);
	79	+ if (err)
	80	+ goto out_drop_write;
	81	+ }
	82	+
66	83	inode_lock(upperdentry->d_inode);
67	84	err = notify_change(upperdentry, attr, NULL);
68	85	if (!err)
69	86	ovl_copyattr(upperdentry->d_inode, dentry->d_inode);
70	87	inode_unlock(upperdentry->d_inode);
	88	+
	89	+ if (winode)
	90	+ put_write_access(winode);
71	91	}
	92	+out_drop_write:
72	93	ovl_drop_write(dentry);
73	94	out:
74	95	return err;
@@ -121,16 +142,18 @@ int ovl_permission(struct inode *inode, int mask) · 46 unmodified lines
121	142
122	143	err = vfs_getattr(&realpath, &stat);
123	144	if (err)
124		− return err;
	145	+ goto out_dput;
125	146
	147	+ err = -ESTALE;
126	148	if ((stat.mode ^ inode->i_mode) & S_IFMT)
127		− return -ESTALE;
	149	+ goto out_dput;
128	150
129	151	inode->i_mode = stat.mode;
130	152	inode->i_uid = stat.uid;
131	153	inode->i_gid = stat.gid;
132	154
133		− return generic_permission(inode, mask);
	155	+ err = generic_permission(inode, mask);
	156	+ goto out_dput;
134	157	}
135	158
136	159	/* Careful in RCU walk mode */

fs/overlayfs/super.c+7−5

@@ -1082,11 +1082,13 @@ static int ovl_fill_super(struct super_block sb, void data, int silent) · 1081 unmodified lines
1082	1082	if (err < 0)
1083	1083	goto out_put_workdir;
1084	1084
1085		− if (!err) {
1086		− pr_err("overlayfs: upper fs needs to support d_type.\n");
1087		− err = -EINVAL;
1088		− goto out_put_workdir;
1089		− }
	1085	+ /*
	1086	+ * We allowed this configuration and don't want to
	1087	+ * break users over kernel upgrade. So warn instead
	1088	+ * of erroring out.
	1089	+ */
	1090	+ if (!err)
	1091	+ pr_warn("overlayfs: upper fs needs to support d_type.\n");
1090	1092	}
1091	1093	}
1092	1094

include/drm/i915_pciids.h+4−6

@@ -309,6 +309,7 @@ · 308 unmodified lines
309	309	INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \
310	310	INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \
311	311	INTEL_VGA_DEVICE(0x5902, info), /* DT GT1 */ \
	312	+ INTEL_VGA_DEVICE(0x5908, info), /* Halo GT1 */ \
312	313	INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \
313	314	INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */
314	315
@@ -322,15 +323,12 @@ · 7 unmodified lines
322	323	INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */
323	324
324	325	#define INTEL_KBL_GT3_IDS(info) \
	326	+ INTEL_VGA_DEVICE(0x5923, info), /* ULT GT3 */ \
325	327	INTEL_VGA_DEVICE(0x5926, info), /* ULT GT3 */ \
326		− INTEL_VGA_DEVICE(0x592B, info), /* Halo GT3 */ \
327		− INTEL_VGA_DEVICE(0x592A, info) /* SRV GT3 */
	328	+ INTEL_VGA_DEVICE(0x5927, info) /* ULT GT3 */
328	329
329	330	#define INTEL_KBL_GT4_IDS(info) \
330		− INTEL_VGA_DEVICE(0x5932, info), /* DT GT4 */ \
331		− INTEL_VGA_DEVICE(0x593B, info), /* Halo GT4 */ \
332		− INTEL_VGA_DEVICE(0x593A, info), /* SRV GT4 */ \
333		− INTEL_VGA_DEVICE(0x593D, info) /* WKS GT4 */
	331	+ INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */
334	332
335	333	#define INTEL_KBL_IDS(info) \
336	334	INTEL_KBL_GT1_IDS(info), \

include/kvm/arm_pmu.h+2−2

@@ -18,13 +18,13 @@ · 17 unmodified lines
18	18	#ifndef __ASM_ARM_KVM_PMU_H
19	19	#define __ASM_ARM_KVM_PMU_H
20	20
21		−#ifdef CONFIG_KVM_ARM_PMU
22		−
23	21	#include <linux/perf_event.h>
24	22	#include <asm/perf_event.h>
25	23
26	24	#define ARMV8_PMU_CYCLE_IDX (ARMV8_PMU_MAX_COUNTERS - 1)
27	25
	26	+#ifdef CONFIG_KVM_ARM_PMU
	27	+
28	28	struct kvm_pmc {
29	29	u8 idx; /* index into the pmu->pmc array */
30	30	struct perf_event *perf_event;

include/linux/mfd/da9052/da9052.h+1−1

@@ -171,7 +171,7 @@ static inline int da9052_group_read(struct da9052 *da9052, unsigned char reg, · 170 unmodified lines
171	171	static inline int da9052_group_write(struct da9052 *da9052, unsigned char reg,
172	172	unsigned reg_cnt, unsigned char *val)
173	173	{
174		− int ret;
	174	+ int ret = 0;
175	175	int i;
176	176
177	177	for (i = 0; i < reg_cnt; i++) {

include/linux/mlx5/driver.h+1−0

@@ -654,6 +654,7 @@ struct mlx5_cmd_work_ent { · 653 unmodified lines
654	654	void *uout;
655	655	int uout_size;
656	656	mlx5_cmd_cbk_t callback;
	657	+ struct delayed_work cb_timeout_work;
657	658	void *context;
658	659	int idx;
659	660	struct completion done;

include/linux/pwm.h+10−6

@@ -464,6 +464,8 @@ static inline bool pwm_can_sleep(struct pwm_device *pwm) · 463 unmodified lines
464	464
465	465	static inline void pwm_apply_args(struct pwm_device *pwm)
466	466	{
	467	+ struct pwm_state state = { };
	468	+
467	469	/*
468	470	* PWM users calling pwm_apply_args() expect to have a fresh config
469	471	* where the polarity and period are set according to pwm_args info.
@@ -476,18 +478,20 @@ static inline void pwm_apply_args(struct pwm_device *pwm) · 6 unmodified lines
476	478	* at startup (even if they are actually enabled), thus authorizing
477	479	* polarity setting.
478	480	*
479		− * Instead of setting ->enabled to false, we call pwm_disable()
480		− * before pwm_set_polarity() to ensure that everything is configured
481		− * as expected, and the PWM is really disabled when the user request
482		− * it.
	481	+ * To fulfill this requirement, we apply a new state which disables
	482	+ * the PWM device and set the reference period and polarity config.
483	483	*
484	484	* Note that PWM users requiring a smooth handover between the
485	485	* bootloader and the kernel (like critical regulators controlled by
486	486	* PWM devices) will have to switch to the atomic API and avoid calling
487	487	* pwm_apply_args().
488	488	*/
489		− pwm_disable(pwm);
490		− pwm_set_polarity(pwm, pwm->args.polarity);
	489	+
	490	+ state.enabled = false;
	491	+ state.polarity = pwm->args.polarity;
	492	+ state.period = pwm->args.period;
	493	+
	494	+ pwm_apply_state(pwm, &state);
491	495	}
492	496
493	497	struct pwm_lookup {

include/linux/reset.h+167−44

@@ -84,8 +84,8 @@ static inline struct reset_control *__devm_reset_control_get( · 83 unmodified lines
84	84	#endif /* CONFIG_RESET_CONTROLLER */
85	85
86	86	/**
87		− * reset_control_get - Lookup and obtain an exclusive reference to a
88		− * reset controller.
	87	+ * reset_control_get_exclusive - Lookup and obtain an exclusive reference
	88	+ * to a reset controller.
89	89	* @dev: device to be reset by the controller
90	90	* @id: reset line name
91	91	*
@@ -98,8 +98,8 @@ static inline struct reset_control *__devm_reset_control_get( · 6 unmodified lines
98	98	*
99	99	* Use of id names is optional.
100	100	*/
101		−static inline struct reset_control *__must_check reset_control_get(
102		− struct device dev, const char id)
	101	+static inline struct reset_control *
	102	+__must_check reset_control_get_exclusive(struct device dev, const char id)
103	103	{
104	104	#ifndef CONFIG_RESET_CONTROLLER
105	105	WARN_ON(1);
@@ -107,12 +107,6 @@ static inline struct reset_control *__must_check reset_control_get( · 1 unmodified line
107	107	return __of_reset_control_get(dev ? dev->of_node : NULL, id, 0, 0);
108	108	}
109	109
110		−static inline struct reset_control *reset_control_get_optional(
111		− struct device dev, const char id)
112		−{
113		− return __of_reset_control_get(dev ? dev->of_node : NULL, id, 0, 0);
114		−}
115		−
116	110	/**
117	111	* reset_control_get_shared - Lookup and obtain a shared reference to a
118	112	* reset controller.
@@ -141,9 +135,21 @@ static inline struct reset_control *reset_control_get_shared( · 22 unmodified lines
141	135	return __of_reset_control_get(dev ? dev->of_node : NULL, id, 0, 1);
142	136	}
143	137
	138	+static inline struct reset_control *reset_control_get_optional_exclusive(
	139	+ struct device dev, const char id)
	140	+{
	141	+ return __of_reset_control_get(dev ? dev->of_node : NULL, id, 0, 0);
	142	+}
	143	+
	144	+static inline struct reset_control *reset_control_get_optional_shared(
	145	+ struct device dev, const char id)
	146	+{
	147	+ return __of_reset_control_get(dev ? dev->of_node : NULL, id, 0, 1);
	148	+}
	149	+
144	150	/**
145		− * of_reset_control_get - Lookup and obtain an exclusive reference to a
146		− * reset controller.
	151	+ * of_reset_control_get_exclusive - Lookup and obtain an exclusive reference
	152	+ * to a reset controller.
147	153	* @node: device to be reset by the controller
148	154	* @id: reset line name
149	155	*
@@ -151,15 +157,41 @@ static inline struct reset_control *reset_control_get_shared( · 1 unmodified line
151	157	*
152	158	* Use of id names is optional.
153	159	*/
154		−static inline struct reset_control *of_reset_control_get(
	160	+static inline struct reset_control *of_reset_control_get_exclusive(
155	161	struct device_node node, const char id)
156	162	{
157	163	return __of_reset_control_get(node, id, 0, 0);
158	164	}
159	165
160	166	/**
161		− * of_reset_control_get_by_index - Lookup and obtain an exclusive reference to
162		− * a reset controller by index.
	167	+ * of_reset_control_get_shared - Lookup and obtain an shared reference
	168	+ * to a reset controller.
	169	+ * @node: device to be reset by the controller
	170	+ * @id: reset line name
	171	+ *
	172	+ * When a reset-control is shared, the behavior of reset_control_assert /
	173	+ * deassert is changed, the reset-core will keep track of a deassert_count
	174	+ * and only (re-)assert the reset after reset_control_assert has been called
	175	+ * as many times as reset_control_deassert was called. Also see the remark
	176	+ * about shared reset-controls in the reset_control_assert docs.
	177	+ *
	178	+ * Calling reset_control_assert without first calling reset_control_deassert
	179	+ * is not allowed on a shared reset control. Calling reset_control_reset is
	180	+ * also not allowed on a shared reset control.
	181	+ * Returns a struct reset_control or IS_ERR() condition containing errno.
	182	+ *
	183	+ * Use of id names is optional.
	184	+ */
	185	+static inline struct reset_control *of_reset_control_get_shared(
	186	+ struct device_node node, const char id)
	187	+{
	188	+ return __of_reset_control_get(node, id, 0, 1);
	189	+}
	190	+
	191	+/**
	192	+ * of_reset_control_get_exclusive_by_index - Lookup and obtain an exclusive
	193	+ * reference to a reset controller
	194	+ * by index.
163	195	* @node: device to be reset by the controller
164	196	* @index: index of the reset controller
165	197	*
@@ -167,49 +199,60 @@ static inline struct reset_control *of_reset_control_get( · 1 unmodified line
167	199	* in whatever order. Returns a struct reset_control or IS_ERR() condition
168	200	* containing errno.
169	201	*/
170		−static inline struct reset_control *of_reset_control_get_by_index(
	202	+static inline struct reset_control *of_reset_control_get_exclusive_by_index(
171	203	struct device_node *node, int index)
172	204	{
173	205	return __of_reset_control_get(node, NULL, index, 0);
174	206	}
175	207
176	208	/**
177		− * devm_reset_control_get - resource managed reset_control_get()
178		− * @dev: device to be reset by the controller
179		− * @id: reset line name
	209	+ * of_reset_control_get_shared_by_index - Lookup and obtain an shared
	210	+ * reference to a reset controller
	211	+ * by index.
	212	+ * @node: device to be reset by the controller
	213	+ * @index: index of the reset controller
	214	+ *
	215	+ * When a reset-control is shared, the behavior of reset_control_assert /
	216	+ * deassert is changed, the reset-core will keep track of a deassert_count
	217	+ * and only (re-)assert the reset after reset_control_assert has been called
	218	+ * as many times as reset_control_deassert was called. Also see the remark
	219	+ * about shared reset-controls in the reset_control_assert docs.
	220	+ *
	221	+ * Calling reset_control_assert without first calling reset_control_deassert
	222	+ * is not allowed on a shared reset control. Calling reset_control_reset is
	223	+ * also not allowed on a shared reset control.
	224	+ * Returns a struct reset_control or IS_ERR() condition containing errno.
180	225	*
181		− * Managed reset_control_get(). For reset controllers returned from this
182		− * function, reset_control_put() is called automatically on driver detach.
183		− * See reset_control_get() for more information.
	226	+ * This is to be used to perform a list of resets for a device or power domain
	227	+ * in whatever order. Returns a struct reset_control or IS_ERR() condition
	228	+ * containing errno.
184	229	*/
185		−static inline struct reset_control *__must_check devm_reset_control_get(
186		− struct device dev, const char id)
187		−{
188		−#ifndef CONFIG_RESET_CONTROLLER
189		− WARN_ON(1);
190		−#endif
191		− return __devm_reset_control_get(dev, id, 0, 0);
192		−}
193		−
194		−static inline struct reset_control *devm_reset_control_get_optional(
195		− struct device dev, const char id)
	230	+static inline struct reset_control *of_reset_control_get_shared_by_index(
	231	+ struct device_node *node, int index)
196	232	{
197		− return __devm_reset_control_get(dev, id, 0, 0);
	233	+ return __of_reset_control_get(node, NULL, index, 1);
198	234	}
199	235
200	236	/**
201		− * devm_reset_control_get_by_index - resource managed reset_control_get
	237	+ * devm_reset_control_get_exclusive - resource managed
	238	+ * reset_control_get_exclusive()
202	239	* @dev: device to be reset by the controller
203		− * @index: index of the reset controller
	240	+ * @id: reset line name
204	241	*
205		− * Managed reset_control_get(). For reset controllers returned from this
206		− * function, reset_control_put() is called automatically on driver detach.
207		− * See reset_control_get() for more information.
	242	+ * Managed reset_control_get_exclusive(). For reset controllers returned
	243	+ * from this function, reset_control_put() is called automatically on driver
	244	+ * detach.
	245	+ *
	246	+ * See reset_control_get_exclusive() for more information.
208	247	*/
209		−static inline struct reset_control *devm_reset_control_get_by_index(
210		− struct device *dev, int index)
	248	+static inline struct reset_control *
	249	+__must_check devm_reset_control_get_exclusive(struct device *dev,
	250	+ const char *id)
211	251	{
212		− return __devm_reset_control_get(dev, NULL, index, 0);
	252	+#ifndef CONFIG_RESET_CONTROLLER
	253	+ WARN_ON(1);
	254	+#endif
	255	+ return __devm_reset_control_get(dev, id, 0, 0);
213	256	}
214	257
215	258	/**
@@ -227,6 +270,36 @@ static inline struct reset_control *devm_reset_control_get_shared( · 11 unmodified lines
227	270	return __devm_reset_control_get(dev, id, 0, 1);
228	271	}
229	272
	273	+static inline struct reset_control *devm_reset_control_get_optional_exclusive(
	274	+ struct device dev, const char id)
	275	+{
	276	+ return __devm_reset_control_get(dev, id, 0, 0);
	277	+}
	278	+
	279	+static inline struct reset_control *devm_reset_control_get_optional_shared(
	280	+ struct device dev, const char id)
	281	+{
	282	+ return __devm_reset_control_get(dev, id, 0, 1);
	283	+}
	284	+
	285	+/**
	286	+ * devm_reset_control_get_exclusive_by_index - resource managed
	287	+ * reset_control_get_exclusive()
	288	+ * @dev: device to be reset by the controller
	289	+ * @index: index of the reset controller
	290	+ *
	291	+ * Managed reset_control_get_exclusive(). For reset controllers returned from
	292	+ * this function, reset_control_put() is called automatically on driver
	293	+ * detach.
	294	+ *
	295	+ * See reset_control_get_exclusive() for more information.
	296	+ */
	297	+static inline struct reset_control *
	298	+devm_reset_control_get_exclusive_by_index(struct device *dev, int index)
	299	+{
	300	+ return __devm_reset_control_get(dev, NULL, index, 0);
	301	+}
	302	+
230	303	/**
231	304	* devm_reset_control_get_shared_by_index - resource managed
232	305	* reset_control_get_shared
@@ -237,10 +310,60 @@ static inline struct reset_control *devm_reset_control_get_shared( · 4 unmodified lines
237	310	* this function, reset_control_put() is called automatically on driver detach.
238	311	* See reset_control_get_shared() for more information.
239	312	*/
240		−static inline struct reset_control *devm_reset_control_get_shared_by_index(
241		− struct device *dev, int index)
	313	+static inline struct reset_control *
	314	+devm_reset_control_get_shared_by_index(struct device *dev, int index)
242	315	{
243	316	return __devm_reset_control_get(dev, NULL, index, 1);
244	317	}
245	318
	319	+/*
	320	+ * TEMPORARY calls to use during transition:
	321	+ *
	322	+ * of_reset_control_get() => of_reset_control_get_exclusive()
	323	+ *
	324	+ * These inline function calls will be removed once all consumers
	325	+ * have been moved over to the new explicit API.
	326	+ */
	327	+static inline struct reset_control *reset_control_get(
	328	+ struct device dev, const char id)
	329	+{
	330	+ return reset_control_get_exclusive(dev, id);
	331	+}
	332	+
	333	+static inline struct reset_control *reset_control_get_optional(
	334	+ struct device dev, const char id)
	335	+{
	336	+ return reset_control_get_optional_exclusive(dev, id);
	337	+}
	338	+
	339	+static inline struct reset_control *of_reset_control_get(
	340	+ struct device_node node, const char id)
	341	+{
	342	+ return of_reset_control_get_exclusive(node, id);
	343	+}
	344	+
	345	+static inline struct reset_control *of_reset_control_get_by_index(
	346	+ struct device_node *node, int index)
	347	+{
	348	+ return of_reset_control_get_exclusive_by_index(node, index);
	349	+}
	350	+
	351	+static inline struct reset_control *devm_reset_control_get(
	352	+ struct device dev, const char id)
	353	+{
	354	+ return devm_reset_control_get_exclusive(dev, id);
	355	+}
	356	+
	357	+static inline struct reset_control *devm_reset_control_get_optional(
	358	+ struct device dev, const char id)
	359	+{
	360	+ return devm_reset_control_get_optional_exclusive(dev, id);
	361	+
	362	+}
	363	+
	364	+static inline struct reset_control *devm_reset_control_get_by_index(
	365	+ struct device *dev, int index)
	366	+{
	367	+ return devm_reset_control_get_exclusive_by_index(dev, index);
	368	+}
246	369	#endif

include/linux/skbuff.h+20−0

@@ -1079,6 +1079,7 @@ __skb_set_sw_hash(struct sk_buff *skb, __u32 hash, bool is_l4) · 1078 unmodified lines
1079	1079	}
1080	1080
1081	1081	void __skb_get_hash(struct sk_buff *skb);
	1082	+u32 __skb_get_hash_symmetric(struct sk_buff *skb);
1082	1083	u32 skb_get_poff(const struct sk_buff *skb);
1083	1084	u32 __skb_get_poff(const struct sk_buff skb, void data,
1084	1085	const struct flow_keys *keys, int hlen);
@@ -2886,6 +2887,25 @@ static inline void skb_postpush_rcsum(struct sk_buff *skb, · 1801 unmodified lines
2886	2887	skb->csum = csum_partial(start, len, skb->csum);
2887	2888	}
2888	2889
	2890	+/**
	2891	+ * skb_push_rcsum - push skb and update receive checksum
	2892	+ * @skb: buffer to update
	2893	+ * @len: length of data pulled
	2894	+ *
	2895	+ * This function performs an skb_push on the packet and updates
	2896	+ * the CHECKSUM_COMPLETE checksum. It should be used on
	2897	+ * receive path processing instead of skb_push unless you know
	2898	+ * that the checksum difference is zero (e.g., a valid IP header)
	2899	+ * or you are setting ip_summed to CHECKSUM_NONE.
	2900	+ */
	2901	+static inline unsigned char skb_push_rcsum(struct sk_buff skb,
	2902	+ unsigned int len)
	2903	+{
	2904	+ skb_push(skb, len);
	2905	+ skb_postpush_rcsum(skb, skb->data, len);
	2906	+ return skb->data;
	2907	+}
	2908	+
2889	2909	/**
2890	2910	* pskb_trim_rcsum - trim received skb and update checksum
2891	2911	* @skb: buffer to trim

include/linux/usb/ehci_def.h+2−2

@@ -180,11 +180,11 @@ struct ehci_regs { · 179 unmodified lines
180	180	* PORTSCx
181	181	*/
182	182	/* HOSTPC: offset 0x84 */
183		− u32 hostpc[1]; /* HOSTPC extension */
	183	+ u32 hostpc[0]; /* HOSTPC extension */
184	184	#define HOSTPC_PHCD (1<<22) /* Phy clock disable */
185	185	#define HOSTPC_PSPD (3<<25) /* Port speed detection */
186	186
187		− u32 reserved5[16];
	187	+ u32 reserved5[17];
188	188
189	189	/* USBMODE_EX: offset 0xc8 */
190	190	u32 usbmode_ex; /* USB Device mode extension */

include/net/bonding.h+6−1

@@ -34,6 +34,9 @@ · 33 unmodified lines
34	34
35	35	#define BOND_DEFAULT_MIIMON 100
36	36
	37	+#ifndef __long_aligned
	38	+#define __long_aligned __attribute__((aligned((sizeof(long)))))
	39	+#endif
37	40	/*
38	41	* Less bad way to call ioctl from within the kernel; this needs to be
39	42	* done some other way to get the call out of interrupt context.
@@ -138,7 +141,9 @@ struct bond_params { · 98 unmodified lines
138	141	struct reciprocal_value reciprocal_packets_per_slave;
139	142	u16 ad_actor_sys_prio;
140	143	u16 ad_user_port_key;
141		− u8 ad_actor_system[ETH_ALEN];
	144	+
	145	+ /* 2 bytes of padding : see ether_addr_equal_64bits() */
	146	+ u8 ad_actor_system[ETH_ALEN + 2];
142	147	};
143	148
144	149	struct bond_parm_tbl {

include/net/ip.h+2−3

@@ -313,10 +313,9 @@ static inline unsigned int ip_dst_mtu_maybe_forward(const struct dst_entry *dst, · 312 unmodified lines
313	313	return min(dst->dev->mtu, IP_MAX_MTU);
314	314	}
315	315
316		−static inline unsigned int ip_skb_dst_mtu(const struct sk_buff *skb)
	316	+static inline unsigned int ip_skb_dst_mtu(struct sock *sk,
	317	+ const struct sk_buff *skb)
317	318	{
318		− struct sock *sk = skb->sk;
319		−
320	319	if (!sk \|\| !sk_fullsock(sk) \|\| ip_sk_use_pmtu(sk)) {
321	320	bool forwarding = IPCB(skb)->flags & IPSKB_FORWARDED;
322	321

include/uapi/linux/fuse.h+6−1

@@ -105,6 +105,9 @@ · 104 unmodified lines
105	105	*
106	106	* 7.24
107	107	* - add FUSE_LSEEK for SEEK_HOLE and SEEK_DATA support
	108	+ *
	109	+ * 7.25
	110	+ * - add FUSE_PARALLEL_DIROPS
108	111	*/
109	112
110	113	#ifndef _LINUX_FUSE_H
@@ -140,7 +143,7 @@ · 29 unmodified lines
140	143	#define FUSE_KERNEL_VERSION 7
141	144
142	145	/** Minor version number of this interface */
143		−#define FUSE_KERNEL_MINOR_VERSION 24
	146	+#define FUSE_KERNEL_MINOR_VERSION 25
144	147
145	148	/** The node ID of the root inode */
146	149	#define FUSE_ROOT_ID 1
@@ -234,6 +237,7 @@ struct fuse_file_lock { · 87 unmodified lines
234	237	* FUSE_ASYNC_DIO: asynchronous direct I/O submission
235	238	* FUSE_WRITEBACK_CACHE: use writeback cache for buffered writes
236	239	* FUSE_NO_OPEN_SUPPORT: kernel supports zero-message opens
	240	+ * FUSE_PARALLEL_DIROPS: allow parallel lookups and readdir
237	241	*/
238	242	#define FUSE_ASYNC_READ (1 << 0)
239	243	#define FUSE_POSIX_LOCKS (1 << 1)
@@ -253,6 +257,7 @@ struct fuse_file_lock { · 13 unmodified lines
253	257	#define FUSE_ASYNC_DIO (1 << 15)
254	258	#define FUSE_WRITEBACK_CACHE (1 << 16)
255	259	#define FUSE_NO_OPEN_SUPPORT (1 << 17)
	260	+#define FUSE_PARALLEL_DIROPS (1 << 18)
256	261
257	262	/**
258	263	* CUSE INIT request/reply flags

net/bridge/br_netfilter_hooks.c+1−1

@@ -700,7 +700,7 @@ static int · 699 unmodified lines
700	700	br_nf_ip_fragment(struct net net, struct sock sk, struct sk_buff *skb,
701	701	int (output)(struct net , struct sock , struct sk_buff ))
702	702	{
703		− unsigned int mtu = ip_skb_dst_mtu(skb);
	703	+ unsigned int mtu = ip_skb_dst_mtu(sk, skb);
704	704	struct iphdr *iph = ip_hdr(skb);
705	705
706	706	if (unlikely(((iph->frag_off & htons(IP_DF)) && !skb->ignore_df) \|\|

net/core/flow_dissector.c+43−0

@@ -651,6 +651,23 @@ void make_flow_keys_digest(struct flow_keys_digest *digest, · 650 unmodified lines
651	651	}
652	652	EXPORT_SYMBOL(make_flow_keys_digest);
653	653
	654	+static struct flow_dissector flow_keys_dissector_symmetric __read_mostly;
	655	+
	656	+u32 __skb_get_hash_symmetric(struct sk_buff *skb)
	657	+{
	658	+ struct flow_keys keys;
	659	+
	660	+ __flow_hash_secret_init();
	661	+
	662	+ memset(&keys, 0, sizeof(keys));
	663	+ __skb_flow_dissect(skb, &flow_keys_dissector_symmetric, &keys,
	664	+ NULL, 0, 0, 0,
	665	+ FLOW_DISSECTOR_F_STOP_AT_FLOW_LABEL);
	666	+
	667	+ return __flow_hash_from_keys(&keys, hashrnd);
	668	+}
	669	+EXPORT_SYMBOL_GPL(__skb_get_hash_symmetric);
	670	+
654	671	/**
655	672	* __skb_get_hash: calculate a flow hash
656	673	* @skb: sk_buff to calculate flow hash from
@@ -868,6 +885,29 @@ static const struct flow_dissector_key flow_keys_dissector_keys[] = { · 211 unmodified lines
868	885	},
869	886	};
870	887
	888	+static const struct flow_dissector_key flow_keys_dissector_symmetric_keys[] = {
	889	+ {
	890	+ .key_id = FLOW_DISSECTOR_KEY_CONTROL,
	891	+ .offset = offsetof(struct flow_keys, control),
	892	+ },
	893	+ {
	894	+ .key_id = FLOW_DISSECTOR_KEY_BASIC,
	895	+ .offset = offsetof(struct flow_keys, basic),
	896	+ },
	897	+ {
	898	+ .key_id = FLOW_DISSECTOR_KEY_IPV4_ADDRS,
	899	+ .offset = offsetof(struct flow_keys, addrs.v4addrs),
	900	+ },
	901	+ {
	902	+ .key_id = FLOW_DISSECTOR_KEY_IPV6_ADDRS,
	903	+ .offset = offsetof(struct flow_keys, addrs.v6addrs),
	904	+ },
	905	+ {
	906	+ .key_id = FLOW_DISSECTOR_KEY_PORTS,
	907	+ .offset = offsetof(struct flow_keys, ports),
	908	+ },
	909	+};
	910	+
871	911	static const struct flow_dissector_key flow_keys_buf_dissector_keys[] = {
872	912	{
873	913	.key_id = FLOW_DISSECTOR_KEY_CONTROL,
@@ -889,6 +929,9 @@ static int __init init_default_flow_dissectors(void) · 15 unmodified lines
889	929	skb_flow_dissector_init(&flow_keys_dissector,
890	930	flow_keys_dissector_keys,
891	931	ARRAY_SIZE(flow_keys_dissector_keys));
	932	+ skb_flow_dissector_init(&flow_keys_dissector_symmetric,
	933	+ flow_keys_dissector_symmetric_keys,
	934	+ ARRAY_SIZE(flow_keys_dissector_symmetric_keys));
892	935	skb_flow_dissector_init(&flow_keys_buf_dissector,
893	936	flow_keys_buf_dissector_keys,
894	937	ARRAY_SIZE(flow_keys_buf_dissector_keys));

net/core/skbuff.c+0−18

@@ -3016,24 +3016,6 @@ int skb_append_pagefrags(struct sk_buff skb, struct page page, · 3015 unmodified lines
3016	3016	}
3017	3017	EXPORT_SYMBOL_GPL(skb_append_pagefrags);
3018	3018
3019		−/**
3020		− * skb_push_rcsum - push skb and update receive checksum
3021		− * @skb: buffer to update
3022		− * @len: length of data pulled
3023		− *
3024		− * This function performs an skb_push on the packet and updates
3025		− * the CHECKSUM_COMPLETE checksum. It should be used on
3026		− * receive path processing instead of skb_push unless you know
3027		− * that the checksum difference is zero (e.g., a valid IP header)
3028		− * or you are setting ip_summed to CHECKSUM_NONE.
3029		− */
3030		−static unsigned char skb_push_rcsum(struct sk_buff skb, unsigned len)
3031		−{
3032		− skb_push(skb, len);
3033		− skb_postpush_rcsum(skb, skb->data, len);
3034		− return skb->data;
3035		−}
3036		−
3037	3019	/**
3038	3020	* skb_pull_rcsum - pull skb and update receive checksum
3039	3021	* @skb: buffer to update

net/decnet/dn_fib.c+12−9

@@ -41,6 +41,7 @@ · 40 unmodified lines
41	41	#include <net/dn_fib.h>
42	42	#include <net/dn_neigh.h>
43	43	#include <net/dn_dev.h>
	44	+#include <net/nexthop.h>
44	45
45	46	#define RT_MIN_TABLE 1
46	47
@@ -150,14 +151,13 @@ static int dn_fib_count_nhs(const struct nlattr *attr) · 103 unmodified lines
150	151	struct rtnexthop *nhp = nla_data(attr);
151	152	int nhs = 0, nhlen = nla_len(attr);
152	153
153		− while(nhlen >= (int)sizeof(struct rtnexthop)) {
154		− if ((nhlen -= nhp->rtnh_len) < 0)
155		− return 0;
	154	+ while (rtnh_ok(nhp, nhlen)) {
156	155	nhs++;
157		− nhp = RTNH_NEXT(nhp);
	156	+ nhp = rtnh_next(nhp, &nhlen);
158	157	}
159	158
160		− return nhs;
	159	+ /* leftover implies invalid nexthop configuration, discard it */
	160	+ return nhlen > 0 ? 0 : nhs;
161	161	}
162	162
163	163	static int dn_fib_get_nhs(struct dn_fib_info fi, const struct nlattr attr,
@@ -167,21 +167,24 @@ static int dn_fib_get_nhs(struct dn_fib_info fi, const struct nlattr attr, · 3 unmodified lines
167	167	int nhlen = nla_len(attr);
168	168
169	169	change_nexthops(fi) {
170		− int attrlen = nhlen - sizeof(struct rtnexthop);
171		− if (attrlen < 0 \|\| (nhlen -= nhp->rtnh_len) < 0)
	170	+ int attrlen;
	171	+
	172	+ if (!rtnh_ok(nhp, nhlen))
172	173	return -EINVAL;
173	174
174	175	nh->nh_flags = (r->rtm_flags&~0xFF) \| nhp->rtnh_flags;
175	176	nh->nh_oif = nhp->rtnh_ifindex;
176	177	nh->nh_weight = nhp->rtnh_hops + 1;
177	178
178		− if (attrlen) {
	179	+ attrlen = rtnh_attrlen(nhp);
	180	+ if (attrlen > 0) {
179	181	struct nlattr *gw_attr;
180	182
181	183	gw_attr = nla_find((struct nlattr *) (nhp + 1), attrlen, RTA_GATEWAY);
182	184	nh->nh_gw = gw_attr ? nla_get_le16(gw_attr) : 0;
183	185	}
184		− nhp = RTNH_NEXT(nhp);
	186	+
	187	+ nhp = rtnh_next(nhp, &nhlen);
185	188	} endfor_nexthops(fi);
186	189
187	190	return 0;

net/ipv4/ip_output.c+2−2

@@ -271,7 +271,7 @@ static int ip_finish_output(struct net net, struct sock sk, struct sk_buff *sk · 270 unmodified lines
271	271	return dst_output(net, sk, skb);
272	272	}
273	273	#endif
274		− mtu = ip_skb_dst_mtu(skb);
	274	+ mtu = ip_skb_dst_mtu(sk, skb);
275	275	if (skb_is_gso(skb))
276	276	return ip_finish_output_gso(net, sk, skb, mtu);
277	277
@@ -541,7 +541,7 @@ int ip_do_fragment(struct net net, struct sock sk, struct sk_buff *skb, · 263 unmodified lines
541	541
542	542	iph = ip_hdr(skb);
543	543
544		− mtu = ip_skb_dst_mtu(skb);
	544	+ mtu = ip_skb_dst_mtu(sk, skb);
545	545	if (IPCB(skb)->frag_max_size && IPCB(skb)->frag_max_size < mtu)
546	546	mtu = IPCB(skb)->frag_max_size;
547	547

net/ipv6/ip6_fib.c+1−0

@@ -177,6 +177,7 @@ static void rt6_free_pcpu(struct rt6_info *non_pcpu_rt) · 176 unmodified lines
177	177	}
178	178	}
179	179
	180	+ free_percpu(non_pcpu_rt->rt6i_pcpu);
180	181	non_pcpu_rt->rt6i_pcpu = NULL;
181	182	}
182	183

net/packet/af_packet.c+1−1

@@ -1341,7 +1341,7 @@ static unsigned int fanout_demux_hash(struct packet_fanout *f, · 1340 unmodified lines
1341	1341	struct sk_buff *skb,
1342	1342	unsigned int num)
1343	1343	{
1344		− return reciprocal_scale(skb_get_hash(skb), num);
	1344	+ return reciprocal_scale(__skb_get_hash_symmetric(skb), num);
1345	1345	}
1346	1346
1347	1347	static unsigned int fanout_demux_lb(struct packet_fanout *f,

net/rds/tcp.c+3−2

@@ -651,7 +651,7 @@ static int rds_tcp_init(void) · 650 unmodified lines
651	651
652	652	ret = rds_tcp_recv_init();
653	653	if (ret)
654		− goto out_slab;
	654	+ goto out_pernet;
655	655
656	656	ret = rds_trans_register(&rds_tcp_transport);
657	657	if (ret)
@@ -663,8 +663,9 @@ static int rds_tcp_init(void) · 5 unmodified lines
663	663
664	664	out_recv:
665	665	rds_tcp_recv_exit();
666		−out_slab:
	666	+out_pernet:
667	667	unregister_pernet_subsys(&rds_tcp_net_ops);
	668	+out_slab:
668	669	kmem_cache_destroy(rds_tcp_conn_slab);
669	670	out:
670	671	return ret;

net/sched/act_mirred.c+1−1

@@ -181,7 +181,7 @@ static int tcf_mirred(struct sk_buff skb, const struct tc_action a, · 180 unmodified lines
181	181
182	182	if (!(at & AT_EGRESS)) {
183	183	if (m->tcfm_ok_push)
184		− skb_push(skb2, skb->mac_len);
	184	+ skb_push_rcsum(skb2, skb->mac_len);
185	185	}
186	186
187	187	/* mirror is always swallowed */

net/tipc/netlink_compat.c+1−1

@@ -604,7 +604,7 @@ static int tipc_nl_compat_link_dump(struct tipc_nl_compat_msg *msg, · 603 unmodified lines
604	604
605	605	link_info.dest = nla_get_flag(link[TIPC_NLA_LINK_DEST]);
606	606	link_info.up = htonl(nla_get_flag(link[TIPC_NLA_LINK_UP]));
607		− nla_strlcpy(link_info.str, nla_data(link[TIPC_NLA_LINK_NAME]),
	607	+ nla_strlcpy(link_info.str, link[TIPC_NLA_LINK_NAME],
608	608	TIPC_MAX_LINK_NAME);
609	609
610	610	return tipc_add_tlv(msg->rep, TIPC_TLV_LINK_INFO,

sound/core/timer.c+1−1

@@ -1955,6 +1955,7 @@ static ssize_t snd_timer_user_read(struct file file, char __user buffer, · 1954 unmodified lines
1955	1955
1956	1956	qhead = tu->qhead++;
1957	1957	tu->qhead %= tu->queue_size;
	1958	+ tu->qused--;
1958	1959	spin_unlock_irq(&tu->qlock);
1959	1960
1960	1961	if (tu->tread) {
@@ -1968,7 +1969,6 @@ static ssize_t snd_timer_user_read(struct file file, char __user buffer, · 7 unmodified lines
1968	1969	}
1969	1970
1970	1971	spin_lock_irq(&tu->qlock);
1971		− tu->qused--;
1972	1972	if (err < 0)
1973	1973	goto _error;
1974	1974	result += unit;

sound/pci/au88x0/au88x0_core.c+2−3

@@ -1444,9 +1444,8 @@ static int vortex_wtdma_bufshift(vortex_t * vortex, int wtdma) · 1443 unmodified lines
1444	1444	int page, p, pp, delta, i;
1445	1445
1446	1446	page =
1447		− (hwread(vortex->mmio, VORTEX_WTDMA_STAT + (wtdma << 2)) &
1448		− WT_SUBBUF_MASK)
1449		− >> WT_SUBBUF_SHIFT;
	1447	+ (hwread(vortex->mmio, VORTEX_WTDMA_STAT + (wtdma << 2))
	1448	+ >> WT_SUBBUF_SHIFT) & WT_SUBBUF_MASK;
1450	1449	if (dma->nr_periods >= 4)
1451	1450	delta = (page - dma->period_real) & 3;
1452	1451	else {

sound/pci/echoaudio/echoaudio.c+2−2

@@ -2200,11 +2200,11 @@ static int snd_echo_resume(struct device *dev) · 2199 unmodified lines
2200	2200	u32 pipe_alloc_mask;
2201	2201	int err;
2202	2202
2203		− commpage_bak = kmalloc(sizeof(struct echoaudio), GFP_KERNEL);
	2203	+ commpage_bak = kmalloc(sizeof(*commpage), GFP_KERNEL);
2204	2204	if (commpage_bak == NULL)
2205	2205	return -ENOMEM;
2206	2206	commpage = chip->comm_page;
2207		− memcpy(commpage_bak, commpage, sizeof(struct comm_page));
	2207	+ memcpy(commpage_bak, commpage, sizeof(*commpage));
2208	2208
2209	2209	err = init_hw(chip, chip->pci->device, chip->pci->subsystem_device);
2210	2210	if (err < 0) {

sound/pci/hda/hda_generic.c+2−0

@@ -3977,6 +3977,8 @@ static hda_nid_t set_path_power(struct hda_codec *codec, hda_nid_t nid, · 3976 unmodified lines
3977	3977
3978	3978	for (n = 0; n < spec->paths.used; n++) {
3979	3979	path = snd_array_elem(&spec->paths, n);
	3980	+ if (!path->depth)
	3981	+ continue;
3980	3982	if (path->path[0] == nid \|\|
3981	3983	path->path[path->depth - 1] == nid) {
3982	3984	bool pin_old = path->pin_enabled;

sound/pci/hda/hda_intel.c+5−1

@@ -367,9 +367,10 @@ enum { · 366 unmodified lines
367	367	#define IS_SKL_LP(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9d70)
368	368	#define IS_KBL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa171)
369	369	#define IS_KBL_LP(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9d71)
	370	+#define IS_KBL_H(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa2f0)
370	371	#define IS_BXT(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x5a98)
371	372	#define IS_SKL_PLUS(pci) (IS_SKL(pci) \|\| IS_SKL_LP(pci) \|\| IS_BXT(pci)) \|\| \
372		− IS_KBL(pci) \|\| IS_KBL_LP(pci)
	373	+ IS_KBL(pci) \|\| IS_KBL_LP(pci) \|\| IS_KBL_H(pci)
373	374
374	375	static char *driver_short_names[] = {
375	376	[AZX_DRIVER_ICH] = "HDA Intel",
@@ -2190,6 +2191,9 @@ static const struct pci_device_id azx_ids[] = { · 1814 unmodified lines
2190	2191	/* Kabylake-LP */
2191	2192	{ PCI_DEVICE(0x8086, 0x9d71),
2192	2193	.driver_data = AZX_DRIVER_PCH \| AZX_DCAPS_INTEL_SKYLAKE },
	2194	+ /* Kabylake-H */
	2195	+ { PCI_DEVICE(0x8086, 0xa2f0),
	2196	+ .driver_data = AZX_DRIVER_PCH \| AZX_DCAPS_INTEL_SKYLAKE },
2193	2197	/* Broxton-P(Apollolake) */
2194	2198	{ PCI_DEVICE(0x8086, 0x5a98),
2195	2199	.driver_data = AZX_DRIVER_PCH \| AZX_DCAPS_INTEL_BROXTON },

sound/pci/hda/patch_realtek.c+1−0

@@ -5651,6 +5651,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { · 5650 unmodified lines
5651	5651	SND_PCI_QUIRK(0x17aa, 0x504a, "ThinkPad X260", ALC292_FIXUP_TPT440_DOCK),
5652	5652	SND_PCI_QUIRK(0x17aa, 0x504b, "Thinkpad", ALC293_FIXUP_LENOVO_SPK_NOISE),
5653	5653	SND_PCI_QUIRK(0x17aa, 0x5050, "Thinkpad T560p", ALC292_FIXUP_TPT460),
	5654	+ SND_PCI_QUIRK(0x17aa, 0x5051, "Thinkpad L460", ALC292_FIXUP_TPT460),
5654	5655	SND_PCI_QUIRK(0x17aa, 0x5053, "Thinkpad T460", ALC292_FIXUP_TPT460),
5655	5656	SND_PCI_QUIRK(0x17aa, 0x5109, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
5656	5657	SND_PCI_QUIRK(0x17aa, 0x3bf8, "Quanta FL1", ALC269_FIXUP_PCM_44K),

sound/soc/codecs/Kconfig+4−3

@@ -483,9 +483,10 @@ config SND_SOC_DMIC · 482 unmodified lines
483	483	tristate
484	484
485	485	config SND_SOC_HDMI_CODEC
486		− tristate
487		− select SND_PCM_ELD
488		− select SND_PCM_IEC958
	486	+ tristate
	487	+ select SND_PCM_ELD
	488	+ select SND_PCM_IEC958
	489	+ select HDMI
489	490
490	491	config SND_SOC_ES8328
491	492	tristate "Everest Semi ES8328 CODEC"

sound/soc/codecs/ak4613.c+1−1

@@ -146,6 +146,7 @@ static const struct regmap_config ak4613_regmap_cfg = { · 145 unmodified lines
146	146	.max_register = 0x16,
147	147	.reg_defaults = ak4613_reg,
148	148	.num_reg_defaults = ARRAY_SIZE(ak4613_reg),
	149	+ .cache_type = REGCACHE_RBTREE,
149	150	};
150	151
151	152	static const struct of_device_id ak4613_of_match[] = {
@@ -530,7 +531,6 @@ static int ak4613_i2c_remove(struct i2c_client *client) · 378 unmodified lines
530	531	static struct i2c_driver ak4613_i2c_driver = {
531	532	.driver = {
532	533	.name = "ak4613-codec",
533		− .owner = THIS_MODULE,
534	534	.of_match_table = ak4613_of_match,
535	535	},
536	536	.probe = ak4613_i2c_probe,

sound/soc/codecs/cx20442.c+1−0

@@ -226,6 +226,7 @@ static int v253_open(struct tty_struct *tty) · 225 unmodified lines
226	226	if (!tty->disc_data)
227	227	return -ENODEV;
228	228
	229	+ tty->receive_room = 16;
229	230	if (tty->ops->write(tty, v253_init, len) != len) {
230	231	ret = -EIO;
231	232	goto err;

sound/soc/codecs/hdac_hdmi.c+20−0

@@ -1474,6 +1474,11 @@ static int hdmi_codec_probe(struct snd_soc_codec *codec) · 1473 unmodified lines
1474	1474	* exit, we call pm_runtime_suspend() so that will do for us
1475	1475	*/
1476	1476	hlink = snd_hdac_ext_bus_get_link(edev->ebus, dev_name(&edev->hdac.dev));
	1477	+ if (!hlink) {
	1478	+ dev_err(&edev->hdac.dev, "hdac link not found\n");
	1479	+ return -EIO;
	1480	+ }
	1481	+
1477	1482	snd_hdac_ext_bus_link_get(edev->ebus, hlink);
1478	1483
1479	1484	ret = create_fill_widget_route_map(dapm);
@@ -1634,6 +1639,11 @@ static int hdac_hdmi_dev_probe(struct hdac_ext_device *edev) · 154 unmodified lines
1634	1639
1635	1640	/* hold the ref while we probe */
1636	1641	hlink = snd_hdac_ext_bus_get_link(edev->ebus, dev_name(&edev->hdac.dev));
	1642	+ if (!hlink) {
	1643	+ dev_err(&edev->hdac.dev, "hdac link not found\n");
	1644	+ return -EIO;
	1645	+ }
	1646	+
1637	1647	snd_hdac_ext_bus_link_get(edev->ebus, hlink);
1638	1648
1639	1649	hdmi_priv = devm_kzalloc(&codec->dev, sizeof(*hdmi_priv), GFP_KERNEL);
@@ -1744,6 +1754,11 @@ static int hdac_hdmi_runtime_suspend(struct device *dev) · 104 unmodified lines
1744	1754	}
1745	1755
1746	1756	hlink = snd_hdac_ext_bus_get_link(ebus, dev_name(dev));
	1757	+ if (!hlink) {
	1758	+ dev_err(dev, "hdac link not found\n");
	1759	+ return -EIO;
	1760	+ }
	1761	+
1747	1762	snd_hdac_ext_bus_link_put(ebus, hlink);
1748	1763
1749	1764	return 0;
@@ -1765,6 +1780,11 @@ static int hdac_hdmi_runtime_resume(struct device *dev) · 15 unmodified lines
1765	1780	return 0;
1766	1781
1767	1782	hlink = snd_hdac_ext_bus_get_link(ebus, dev_name(dev));
	1783	+ if (!hlink) {
	1784	+ dev_err(dev, "hdac link not found\n");
	1785	+ return -EIO;
	1786	+ }
	1787	+
1768	1788	snd_hdac_ext_bus_link_get(ebus, hlink);
1769	1789
1770	1790	err = snd_hdac_display_power(bus, true);

sound/soc/codecs/rt5645.c+1−1

@@ -253,7 +253,7 @@ static const struct reg_default rt5650_reg[] = { · 252 unmodified lines
253	253	{ 0x2b, 0x5454 },
254	254	{ 0x2c, 0xaaa0 },
255	255	{ 0x2d, 0x0000 },
256		− { 0x2f, 0x1002 },
	256	+ { 0x2f, 0x5002 },
257	257	{ 0x31, 0x5000 },
258	258	{ 0x32, 0x0000 },
259	259	{ 0x33, 0x0000 },

sound/soc/codecs/rt5670.c+1−1

@@ -619,7 +619,7 @@ static const struct snd_kcontrol_new rt5670_snd_controls[] = { · 618 unmodified lines
619	619	RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
620	620	SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL,
621	621	RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
622		− 39, 0, out_vol_tlv),
	622	+ 39, 1, out_vol_tlv),
623	623	/* OUTPUT Control */
624	624	SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1,
625	625	RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1),

sound/soc/codecs/wm5102.c+1−1

@@ -1872,7 +1872,7 @@ static struct snd_soc_dai_driver wm5102_dai[] = { · 1871 unmodified lines
1872	1872	.capture = {
1873	1873	.stream_name = "Audio Trace CPU",
1874	1874	.channels_min = 1,
1875		− .channels_max = 6,
	1875	+ .channels_max = 4,
1876	1876	.rates = WM5102_RATES,
1877	1877	.formats = WM5102_FORMATS,
1878	1878	},

sound/soc/codecs/wm5110.c+1−0

@@ -1723,6 +1723,7 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { · 1722 unmodified lines
1723	1723	{ "OUT2L", NULL, "SYSCLK" },
1724	1724	{ "OUT2R", NULL, "SYSCLK" },
1725	1725	{ "OUT3L", NULL, "SYSCLK" },
	1726	+ { "OUT3R", NULL, "SYSCLK" },
1726	1727	{ "OUT4L", NULL, "SYSCLK" },
1727	1728	{ "OUT4R", NULL, "SYSCLK" },
1728	1729	{ "OUT5L", NULL, "SYSCLK" },

sound/soc/codecs/wm8940.c+1−0

@@ -743,6 +743,7 @@ static const struct regmap_config wm8940_regmap = { · 742 unmodified lines
743	743	.max_register = WM8940_MONOMIX,
744	744	.reg_defaults = wm8940_reg_defaults,
745	745	.num_reg_defaults = ARRAY_SIZE(wm8940_reg_defaults),
	746	+ .cache_type = REGCACHE_RBTREE,
746	747
747	748	.readable_reg = wm8940_readable_register,
748	749	.volatile_reg = wm8940_volatile_register,

sound/soc/davinci/davinci-mcasp.c+52−4

@@ -1513,8 +1513,9 @@ static struct davinci_mcasp_pdata am33xx_mcasp_pdata = { · 1512 unmodified lines
1513	1513	};
1514	1514
1515	1515	static struct davinci_mcasp_pdata dra7_mcasp_pdata = {
1516		− .tx_dma_offset = 0x200,
1517		− .rx_dma_offset = 0x284,
	1516	+ /* The CFG port offset will be calculated if it is needed */
	1517	+ .tx_dma_offset = 0,
	1518	+ .rx_dma_offset = 0,
1518	1519	.version = MCASP_VERSION_4,
1519	1520	};
1520	1521
@@ -1734,6 +1735,52 @@ static int davinci_mcasp_get_dma_type(struct davinci_mcasp *mcasp) · 213 unmodified lines
1734	1735	return PCM_EDMA;
1735	1736	}
1736	1737
	1738	+static u32 davinci_mcasp_txdma_offset(struct davinci_mcasp_pdata *pdata)
	1739	+{
	1740	+ int i;
	1741	+ u32 offset = 0;
	1742	+
	1743	+ if (pdata->version != MCASP_VERSION_4)
	1744	+ return pdata->tx_dma_offset;
	1745	+
	1746	+ for (i = 0; i < pdata->num_serializer; i++) {
	1747	+ if (pdata->serial_dir[i] == TX_MODE) {
	1748	+ if (!offset) {
	1749	+ offset = DAVINCI_MCASP_TXBUF_REG(i);
	1750	+ } else {
	1751	+ pr_err("%s: Only one serializer allowed!\n",
	1752	+ __func__);
	1753	+ break;
	1754	+ }
	1755	+ }
	1756	+ }
	1757	+
	1758	+ return offset;
	1759	+}
	1760	+
	1761	+static u32 davinci_mcasp_rxdma_offset(struct davinci_mcasp_pdata *pdata)
	1762	+{
	1763	+ int i;
	1764	+ u32 offset = 0;
	1765	+
	1766	+ if (pdata->version != MCASP_VERSION_4)
	1767	+ return pdata->rx_dma_offset;
	1768	+
	1769	+ for (i = 0; i < pdata->num_serializer; i++) {
	1770	+ if (pdata->serial_dir[i] == RX_MODE) {
	1771	+ if (!offset) {
	1772	+ offset = DAVINCI_MCASP_RXBUF_REG(i);
	1773	+ } else {
	1774	+ pr_err("%s: Only one serializer allowed!\n",
	1775	+ __func__);
	1776	+ break;
	1777	+ }
	1778	+ }
	1779	+ }
	1780	+
	1781	+ return offset;
	1782	+}
	1783	+
1737	1784	static int davinci_mcasp_probe(struct platform_device *pdev)
1738	1785	{
1739	1786	struct snd_dmaengine_dai_dma_data *dma_data;
@@ -1862,7 +1909,7 @@ static int davinci_mcasp_probe(struct platform_device *pdev) · 122 unmodified lines
1862	1909	if (dat)
1863	1910	dma_data->addr = dat->start;
1864	1911	else
1865		− dma_data->addr = mem->start + pdata->tx_dma_offset;
	1912	+ dma_data->addr = mem->start + davinci_mcasp_txdma_offset(pdata);
1866	1913
1867	1914	dma = &mcasp->dma_request[SNDRV_PCM_STREAM_PLAYBACK];
1868	1915	res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
@@ -1883,7 +1930,8 @@ static int davinci_mcasp_probe(struct platform_device *pdev) · 14 unmodified lines
1883	1930	if (dat)
1884	1931	dma_data->addr = dat->start;
1885	1932	else
1886		− dma_data->addr = mem->start + pdata->rx_dma_offset;
	1933	+ dma_data->addr =
	1934	+ mem->start + davinci_mcasp_rxdma_offset(pdata);
1887	1935
1888	1936	dma = &mcasp->dma_request[SNDRV_PCM_STREAM_CAPTURE];
1889	1937	res = platform_get_resource(pdev, IORESOURCE_DMA, 1);

sound/soc/davinci/davinci-mcasp.h+2−2

@@ -85,9 +85,9 @@ · 84 unmodified lines
85	85	(n << 2))
86	86
87	87	/* Transmit Buffer for Serializer n */
88		−#define DAVINCI_MCASP_TXBUF_REG 0x200
	88	+#define DAVINCI_MCASP_TXBUF_REG(n) (0x200 + (n << 2))
89	89	/* Receive Buffer for Serializer n */
90		−#define DAVINCI_MCASP_RXBUF_REG 0x280
	90	+#define DAVINCI_MCASP_RXBUF_REG(n) (0x280 + (n << 2))
91	91
92	92	/* McASP FIFO Registers */
93	93	#define DAVINCI_MCASP_V2_AFIFO_BASE (0x1010)

sound/soc/fsl/fsl_ssi.c+6−6

@@ -952,16 +952,16 @@ static int _fsl_ssi_set_dai_fmt(struct device *dev, · 951 unmodified lines
952	952	ssi_private->i2s_mode = CCSR_SSI_SCR_NET;
953	953	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
954	954	case SND_SOC_DAIFMT_I2S:
	955	+ regmap_update_bits(regs, CCSR_SSI_STCCR,
	956	+ CCSR_SSI_SxCCR_DC_MASK,
	957	+ CCSR_SSI_SxCCR_DC(2));
	958	+ regmap_update_bits(regs, CCSR_SSI_SRCCR,
	959	+ CCSR_SSI_SxCCR_DC_MASK,
	960	+ CCSR_SSI_SxCCR_DC(2));
955	961	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
956	962	case SND_SOC_DAIFMT_CBM_CFS:
957	963	case SND_SOC_DAIFMT_CBS_CFS:
958	964	ssi_private->i2s_mode \|= CCSR_SSI_SCR_I2S_MODE_MASTER;
959		− regmap_update_bits(regs, CCSR_SSI_STCCR,
960		− CCSR_SSI_SxCCR_DC_MASK,
961		− CCSR_SSI_SxCCR_DC(2));
962		− regmap_update_bits(regs, CCSR_SSI_SRCCR,
963		− CCSR_SSI_SxCCR_DC_MASK,
964		− CCSR_SSI_SxCCR_DC(2));
965	965	break;
966	966	case SND_SOC_DAIFMT_CBM_CFM:
967	967	ssi_private->i2s_mode \|= CCSR_SSI_SCR_I2S_MODE_SLAVE;

sound/soc/intel/atom/sst-mfld-platform-compress.c+7−2

@@ -182,24 +182,29 @@ static int sst_platform_compr_trigger(struct snd_compr_stream *cstream, int cmd) · 181 unmodified lines
182	182	case SNDRV_PCM_TRIGGER_START:
183	183	if (stream->compr_ops->stream_start)
184	184	return stream->compr_ops->stream_start(sst->dev, stream->id);
	185	+ break;
185	186	case SNDRV_PCM_TRIGGER_STOP:
186	187	if (stream->compr_ops->stream_drop)
187	188	return stream->compr_ops->stream_drop(sst->dev, stream->id);
	189	+ break;
188	190	case SND_COMPR_TRIGGER_DRAIN:
189	191	if (stream->compr_ops->stream_drain)
190	192	return stream->compr_ops->stream_drain(sst->dev, stream->id);
	193	+ break;
191	194	case SND_COMPR_TRIGGER_PARTIAL_DRAIN:
192	195	if (stream->compr_ops->stream_partial_drain)
193	196	return stream->compr_ops->stream_partial_drain(sst->dev, stream->id);
	197	+ break;
194	198	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
195	199	if (stream->compr_ops->stream_pause)
196	200	return stream->compr_ops->stream_pause(sst->dev, stream->id);
	201	+ break;
197	202	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
198	203	if (stream->compr_ops->stream_pause_release)
199	204	return stream->compr_ops->stream_pause_release(sst->dev, stream->id);
200		− default:
201		− return -EINVAL;
	205	+ break;
202	206	}
	207	+ return -EINVAL;
203	208	}
204	209
205	210	static int sst_platform_compr_pointer(struct snd_compr_stream *cstream,

sound/soc/intel/skylake/bxt-sst.c+1−0

@@ -291,6 +291,7 @@ int bxt_sst_dsp_init(struct device dev, void __iomem mmio_base, int irq, · 290 unmodified lines
291	291	sst_dsp_mailbox_init(sst, (BXT_ADSP_SRAM0_BASE + SKL_ADSP_W0_STAT_SZ),
292	292	SKL_ADSP_W0_UP_SZ, BXT_ADSP_SRAM1_BASE, SKL_ADSP_W1_SZ);
293	293
	294	+ INIT_LIST_HEAD(&sst->module_list);
294	295	ret = skl_ipc_init(dev, skl);
295	296	if (ret)
296	297	return ret;

sound/soc/sh/rcar/adg.c+1−1

@@ -518,7 +518,7 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv, · 517 unmodified lines
518	518	}
519	519	}
520	520
521		− rsnd_mod_bset(adg_mod, SSICKR, 0x00FF0000, ckr);
	521	+ rsnd_mod_bset(adg_mod, SSICKR, 0x80FF0000, ckr);
522	522	rsnd_mod_write(adg_mod, BRRA, rbga);
523	523	rsnd_mod_write(adg_mod, BRRB, rbgb);
524	524

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net

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