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Merge tag 'mlx5-next-2020-12-02' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux

Saeed Mahameed says: ==================== mlx5-next-2020-12-02 Low level mlx5 updates required by both netdev and rdma trees. * tag 'mlx5-next-2020-12-02' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux: net/mlx5: Treat host PF vport as other (non eswitch manager) vport net/mlx5: Enable host PF HCA after eswitch is initialized net/mlx5: Rename peer_pf to host_pf net/mlx5: Make API mlx5_core_is_ecpf accept const pointer net/mlx5: Export steering related functions net/mlx5: Expose other function ifc bits net/mlx5: Expose IP-in-IP TX and RX capability bits net/mlx5: Update the hardware interface definition for vhca state net/mlx5: Update the list of the PCI supported devices net/mlx5: Avoid exposing driver internal command helpers net/mlx5: Add ts_cqe_to_dest_cqn related bits net/mlx5: Add misc4 to mlx5_ifc_fte_match_param_bits net/mlx5: Check dr mask size against mlx5_match_param size net/mlx5: Add sampler destination type net/mlx5: Add sample offload hardware bits and structures ====================

Jakub Kicinski committed 5 years ago

Commit 32e41702 parents 6ec1dfb 617b86020 files · +250 −104Browse files

Unified · Split

20 files
  1. drivers/net/ethernet/mellanox/mlx5/core/cmd.c +0 −3
  2. drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c +3 −0
  3. drivers/net/ethernet/mellanox/mlx5/core/ecpf.c +54 −22
  4. drivers/net/ethernet/mellanox/mlx5/core/ecpf.h +3 −0
  5. drivers/net/ethernet/mellanox/mlx5/core/esw/acl/helper.c +4 −1
  6. drivers/net/ethernet/mellanox/mlx5/core/eswitch.c +28 −1
  7. drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c +27 −30
  8. drivers/net/ethernet/mellanox/mlx5/core/fs_core.c +7 −10
  9. drivers/net/ethernet/mellanox/mlx5/core/fs_core.h +1 −1
  10. drivers/net/ethernet/mellanox/mlx5/core/main.c +10 −9
  11. drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h +4 −0
  12. drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c +6 −6
  13. drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c +1 −1
  14. drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c +1 −2
  15. drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h +1 −0
  16. include/linux/mlx5/device.h +8 −0
  17. include/linux/mlx5/driver.h +2 −6
  18. include/linux/mlx5/fs.h +3 −3
  19. include/linux/mlx5/mlx5_ifc.h +86 −8
  20. include/uapi/rdma/mlx5_user_ioctl_cmds.h +1 −1
drivers/net/ethernet/mellanox/mlx5/core/cmd.c+0−3
@@ -2142,7 +2142,6 @@ dma_pool_err: · 2141 unmodified lines
21422142 kvfree(cmd->stats);
21432143 return err;
21442144 }
2145−EXPORT_SYMBOL(mlx5_cmd_init);
21462145
21472146 void mlx5_cmd_cleanup(struct mlx5_core_dev *dev)
21482147 {
@@ -2155,11 +2154,9 @@ void mlx5_cmd_cleanup(struct mlx5_core_dev *dev) · 6 unmodified lines
21552154 dma_pool_destroy(cmd->pool);
21562155 kvfree(cmd->stats);
21572156 }
2158−EXPORT_SYMBOL(mlx5_cmd_cleanup);
21592157
21602158 void mlx5_cmd_set_state(struct mlx5_core_dev *dev,
21612159 enum mlx5_cmdif_state cmdif_state)
21622160 {
21632161 dev->cmd.state = cmdif_state;
21642162 }
2165−EXPORT_SYMBOL(mlx5_cmd_set_state);
drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c+3−0
@@ -247,6 +247,9 @@ const char *parse_fs_dst(struct trace_seq *p, · 246 unmodified lines
247247 case MLX5_FLOW_DESTINATION_TYPE_TIR:
248248 trace_seq_printf(p, "tir=%u\n", dst->tir_num);
249249 break;
250+ case MLX5_FLOW_DESTINATION_TYPE_FLOW_SAMPLER:
251+ trace_seq_printf(p, "sampler_id=%u\n", dst->sampler_id);
252+ break;
250253 case MLX5_FLOW_DESTINATION_TYPE_COUNTER:
251254 trace_seq_printf(p, "counter_id=%u\n", counter_id);
252255 break;
drivers/net/ethernet/mellanox/mlx5/core/ecpf.c+54−22
@@ -8,37 +8,66 @@ bool mlx5_read_embedded_cpu(struct mlx5_core_dev *dev) · 7 unmodified lines
88 return (ioread32be(&dev->iseg->initializing) >> MLX5_ECPU_BIT_NUM) & 1;
99 }
1010
11−static int mlx5_peer_pf_init(struct mlx5_core_dev *dev)
11+static bool mlx5_ecpf_esw_admins_host_pf(const struct mlx5_core_dev *dev)
1212 {
13− u32 in[MLX5_ST_SZ_DW(enable_hca_in)] = {};
14− int err;
13+ /* In separate host mode, PF enables itself.
14+ * When ECPF is eswitch manager, eswitch enables host PF after
15+ * eswitch is setup.
16+ */
17+ return mlx5_core_is_ecpf_esw_manager(dev);
18+}
19+
20+int mlx5_cmd_host_pf_enable_hca(struct mlx5_core_dev *dev)
21+{
22+ u32 out[MLX5_ST_SZ_DW(enable_hca_out)] = {};
23+ u32 in[MLX5_ST_SZ_DW(enable_hca_in)] = {};
1524
1625 MLX5_SET(enable_hca_in, in, opcode, MLX5_CMD_OP_ENABLE_HCA);
17− err = mlx5_cmd_exec_in(dev, enable_hca, in);
26+ MLX5_SET(enable_hca_in, in, function_id, 0);
27+ MLX5_SET(enable_hca_in, in, embedded_cpu_function, 0);
28+ return mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out));
29+}
30+
31+int mlx5_cmd_host_pf_disable_hca(struct mlx5_core_dev *dev)
32+{
33+ u32 out[MLX5_ST_SZ_DW(disable_hca_out)] = {};
34+ u32 in[MLX5_ST_SZ_DW(disable_hca_in)] = {};
35+
36+ MLX5_SET(disable_hca_in, in, opcode, MLX5_CMD_OP_DISABLE_HCA);
37+ MLX5_SET(disable_hca_in, in, function_id, 0);
38+ MLX5_SET(disable_hca_in, in, embedded_cpu_function, 0);
39+ return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
40+}
41+
42+static int mlx5_host_pf_init(struct mlx5_core_dev *dev)
43+{
44+ int err;
45+
46+ if (mlx5_ecpf_esw_admins_host_pf(dev))
47+ return 0;
48+
49+ /* ECPF shall enable HCA for host PF in the same way a PF
50+ * does this for its VFs when ECPF is not a eswitch manager.
51+ */
52+ err = mlx5_cmd_host_pf_enable_hca(dev);
1853 if (err)
19− mlx5_core_err(dev, "Failed to enable peer PF HCA err(%d)\n",
20− err);
54+ mlx5_core_err(dev, "Failed to enable external host PF HCA err(%d)\n", err);
2155
2256 return err;
2357 }
2458
25−static void mlx5_peer_pf_cleanup(struct mlx5_core_dev *dev)
59+static void mlx5_host_pf_cleanup(struct mlx5_core_dev *dev)
2660 {
27− u32 in[MLX5_ST_SZ_DW(disable_hca_in)] = {};
2861 int err;
2962
30− MLX5_SET(disable_hca_in, in, opcode, MLX5_CMD_OP_DISABLE_HCA);
31− err = mlx5_cmd_exec_in(dev, disable_hca, in);
63+ if (mlx5_ecpf_esw_admins_host_pf(dev))
64+ return;
65+
66+ err = mlx5_cmd_host_pf_disable_hca(dev);
3267 if (err) {
33− mlx5_core_err(dev, "Failed to disable peer PF HCA err(%d)\n",
34− err);
68+ mlx5_core_err(dev, "Failed to disable external host PF HCA err(%d)\n", err);
3569 return;
3670 }
37−
38− err = mlx5_wait_for_pages(dev, &dev->priv.peer_pf_pages);
39− if (err)
40− mlx5_core_warn(dev, "Timeout reclaiming peer PF pages err(%d)\n",
41− err);
4271 }
4372
4473 int mlx5_ec_init(struct mlx5_core_dev *dev)
@@ -46,16 +75,19 @@ int mlx5_ec_init(struct mlx5_core_dev *dev) · 1 unmodified line
4675 if (!mlx5_core_is_ecpf(dev))
4776 return 0;
4877
49− /* ECPF shall enable HCA for peer PF in the same way a PF
50− * does this for its VFs.
51− */
52− return mlx5_peer_pf_init(dev);
78+ return mlx5_host_pf_init(dev);
5379 }
5480
5581 void mlx5_ec_cleanup(struct mlx5_core_dev *dev)
5682 {
83+ int err;
84+
5785 if (!mlx5_core_is_ecpf(dev))
5886 return;
5987
60− mlx5_peer_pf_cleanup(dev);
88+ mlx5_host_pf_cleanup(dev);
89+
90+ err = mlx5_wait_for_pages(dev, &dev->priv.host_pf_pages);
91+ if (err)
92+ mlx5_core_warn(dev, "Timeout reclaiming external host PF pages err(%d)\n", err);
6193 }
drivers/net/ethernet/mellanox/mlx5/core/ecpf.h+3−0
@@ -17,6 +17,9 @@ bool mlx5_read_embedded_cpu(struct mlx5_core_dev *dev); · 16 unmodified lines
1717 int mlx5_ec_init(struct mlx5_core_dev *dev);
1818 void mlx5_ec_cleanup(struct mlx5_core_dev *dev);
1919
20+int mlx5_cmd_host_pf_enable_hca(struct mlx5_core_dev *dev);
21+int mlx5_cmd_host_pf_disable_hca(struct mlx5_core_dev *dev);
22+
2023 #else /* CONFIG_MLX5_ESWITCH */
2124
2225 static inline bool
drivers/net/ethernet/mellanox/mlx5/core/esw/acl/helper.c+4−1
@@ -8,6 +8,7 @@ · 7 unmodified lines
88 struct mlx5_flow_table *
99 esw_acl_table_create(struct mlx5_eswitch *esw, u16 vport_num, int ns, int size)
1010 {
11+ struct mlx5_flow_table_attr ft_attr = {};
1112 struct mlx5_core_dev *dev = esw->dev;
1213 struct mlx5_flow_namespace *root_ns;
1314 struct mlx5_flow_table *acl;
@@ -33,7 +34,9 @@ esw_acl_table_create(struct mlx5_eswitch *esw, u16 vport_num, int ns, int size) · 19 unmodified lines
3334 return ERR_PTR(-EOPNOTSUPP);
3435 }
3536
36− acl = mlx5_create_vport_flow_table(root_ns, 0, size, 0, vport_num);
37+ ft_attr.max_fte = size;
38+ ft_attr.flags = MLX5_FLOW_TABLE_OTHER_VPORT;
39+ acl = mlx5_create_vport_flow_table(root_ns, &ft_attr, vport_num);
3740 if (IS_ERR(acl)) {
3841 err = PTR_ERR(acl);
3942 esw_warn(dev, "vport[%d] create %s ACL table, err(%d)\n", vport_num,
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c+28−1
@@ -1474,6 +1474,26 @@ vf_err: · 1473 unmodified lines
14741474 return err;
14751475 }
14761476
1477+static int host_pf_enable_hca(struct mlx5_core_dev *dev)
1478+{
1479+ if (!mlx5_core_is_ecpf(dev))
1480+ return 0;
1481+
1482+ /* Once vport and representor are ready, take out the external host PF
1483+ * out of initializing state. Enabling HCA clears the iser->initializing
1484+ * bit and host PF driver loading can progress.
1485+ */
1486+ return mlx5_cmd_host_pf_enable_hca(dev);
1487+}
1488+
1489+static void host_pf_disable_hca(struct mlx5_core_dev *dev)
1490+{
1491+ if (!mlx5_core_is_ecpf(dev))
1492+ return;
1493+
1494+ mlx5_cmd_host_pf_disable_hca(dev);
1495+}
1496+
14771497 /* mlx5_eswitch_enable_pf_vf_vports() enables vports of PF, ECPF and VFs
14781498 * whichever are present on the eswitch.
14791499 */
@@ -1488,6 +1508,11 @@ mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch *esw, · 8 unmodified lines
14881508 if (ret)
14891509 return ret;
14901510
1511+ /* Enable external host PF HCA */
1512+ ret = host_pf_enable_hca(esw->dev);
1513+ if (ret)
1514+ goto pf_hca_err;
1515+
14911516 /* Enable ECPF vport */
14921517 if (mlx5_ecpf_vport_exists(esw->dev)) {
14931518 ret = mlx5_eswitch_load_vport(esw, MLX5_VPORT_ECPF, enabled_events);
@@ -1505,8 +1530,9 @@ mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch *esw, · 11 unmodified lines
15051530 vf_err:
15061531 if (mlx5_ecpf_vport_exists(esw->dev))
15071532 mlx5_eswitch_unload_vport(esw, MLX5_VPORT_ECPF);
1508−
15091533 ecpf_err:
1534+ host_pf_disable_hca(esw->dev);
1535+pf_hca_err:
15101536 mlx5_eswitch_unload_vport(esw, MLX5_VPORT_PF);
15111537 return ret;
15121538 }
@@ -1521,6 +1547,7 @@ void mlx5_eswitch_disable_pf_vf_vports(struct mlx5_eswitch *esw) · 8 unmodified lines
15211547 if (mlx5_ecpf_vport_exists(esw->dev))
15221548 mlx5_eswitch_unload_vport(esw, MLX5_VPORT_ECPF);
15231549
1550+ host_pf_disable_hca(esw->dev);
15241551 mlx5_eswitch_unload_vport(esw, MLX5_VPORT_PF);
15251552 }
15261553
drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c+27−30
@@ -172,10 +172,9 @@ static int mlx5_cmd_update_root_ft(struct mlx5_flow_root_namespace *ns, · 171 unmodified lines
172172 MLX5_SET(set_flow_table_root_in, in, table_id, ft->id);
173173
174174 MLX5_SET(set_flow_table_root_in, in, underlay_qpn, underlay_qpn);
175− if (ft->vport) {
176− MLX5_SET(set_flow_table_root_in, in, vport_number, ft->vport);
177− MLX5_SET(set_flow_table_root_in, in, other_vport, 1);
178− }
175+ MLX5_SET(set_flow_table_root_in, in, vport_number, ft->vport);
176+ MLX5_SET(set_flow_table_root_in, in, other_vport,
177+ !!(ft->flags & MLX5_FLOW_TABLE_OTHER_VPORT));
179178
180179 return mlx5_cmd_exec_in(dev, set_flow_table_root, in);
181180 }
@@ -199,10 +198,9 @@ static int mlx5_cmd_create_flow_table(struct mlx5_flow_root_namespace *ns, · 17 unmodified lines
199198 MLX5_SET(create_flow_table_in, in, table_type, ft->type);
200199 MLX5_SET(create_flow_table_in, in, flow_table_context.level, ft->level);
201200 MLX5_SET(create_flow_table_in, in, flow_table_context.log_size, log_size);
202− if (ft->vport) {
203− MLX5_SET(create_flow_table_in, in, vport_number, ft->vport);
204− MLX5_SET(create_flow_table_in, in, other_vport, 1);
205− }
201+ MLX5_SET(create_flow_table_in, in, vport_number, ft->vport);
202+ MLX5_SET(create_flow_table_in, in, other_vport,
203+ !!(ft->flags & MLX5_FLOW_TABLE_OTHER_VPORT));
206204
207205 MLX5_SET(create_flow_table_in, in, flow_table_context.decap_en,
208206 en_decap);
@@ -252,10 +250,9 @@ static int mlx5_cmd_destroy_flow_table(struct mlx5_flow_root_namespace *ns, · 43 unmodified lines
252250 MLX5_CMD_OP_DESTROY_FLOW_TABLE);
253251 MLX5_SET(destroy_flow_table_in, in, table_type, ft->type);
254252 MLX5_SET(destroy_flow_table_in, in, table_id, ft->id);
255− if (ft->vport) {
256− MLX5_SET(destroy_flow_table_in, in, vport_number, ft->vport);
257− MLX5_SET(destroy_flow_table_in, in, other_vport, 1);
258− }
253+ MLX5_SET(destroy_flow_table_in, in, vport_number, ft->vport);
254+ MLX5_SET(destroy_flow_table_in, in, other_vport,
255+ !!(ft->flags & MLX5_FLOW_TABLE_OTHER_VPORT));
259256
260257 return mlx5_cmd_exec_in(dev, destroy_flow_table, in);
261258 }
@@ -283,11 +280,9 @@ static int mlx5_cmd_modify_flow_table(struct mlx5_flow_root_namespace *ns, · 21 unmodified lines
283280 flow_table_context.lag_master_next_table_id, 0);
284281 }
285282 } else {
286− if (ft->vport) {
287− MLX5_SET(modify_flow_table_in, in, vport_number,
288− ft->vport);
289− MLX5_SET(modify_flow_table_in, in, other_vport, 1);
290− }
283+ MLX5_SET(modify_flow_table_in, in, vport_number, ft->vport);
284+ MLX5_SET(modify_flow_table_in, in, other_vport,
285+ !!(ft->flags & MLX5_FLOW_TABLE_OTHER_VPORT));
291286 MLX5_SET(modify_flow_table_in, in, modify_field_select,
292287 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID);
293288 if (next_ft) {
@@ -325,6 +320,9 @@ static int mlx5_cmd_create_flow_group(struct mlx5_flow_root_namespace *ns, · 31 unmodified lines
325320 MLX5_SET(create_flow_group_in, in, other_vport, 1);
326321 }
327322
323+ MLX5_SET(create_flow_group_in, in, vport_number, ft->vport);
324+ MLX5_SET(create_flow_group_in, in, other_vport,
325+ !!(ft->flags & MLX5_FLOW_TABLE_OTHER_VPORT));
328326 err = mlx5_cmd_exec_inout(dev, create_flow_group, in, out);
329327 if (!err)
330328 fg->id = MLX5_GET(create_flow_group_out, out,
@@ -344,11 +342,9 @@ static int mlx5_cmd_destroy_flow_group(struct mlx5_flow_root_namespace *ns, · 13 unmodified lines
344342 MLX5_SET(destroy_flow_group_in, in, table_type, ft->type);
345343 MLX5_SET(destroy_flow_group_in, in, table_id, ft->id);
346344 MLX5_SET(destroy_flow_group_in, in, group_id, fg->id);
347− if (ft->vport) {
348− MLX5_SET(destroy_flow_group_in, in, vport_number, ft->vport);
349− MLX5_SET(destroy_flow_group_in, in, other_vport, 1);
350− }
351−
345+ MLX5_SET(destroy_flow_group_in, in, vport_number, ft->vport);
346+ MLX5_SET(destroy_flow_group_in, in, other_vport,
347+ !!(ft->flags & MLX5_FLOW_TABLE_OTHER_VPORT));
352348 return mlx5_cmd_exec_in(dev, destroy_flow_group, in);
353349 }
354350
@@ -427,10 +423,9 @@ static int mlx5_cmd_set_fte(struct mlx5_core_dev *dev, · 72 unmodified lines
427423 MLX5_SET(set_fte_in, in, ignore_flow_level,
428424 !!(fte->action.flags & FLOW_ACT_IGNORE_FLOW_LEVEL));
429425
430− if (ft->vport) {
431− MLX5_SET(set_fte_in, in, vport_number, ft->vport);
432− MLX5_SET(set_fte_in, in, other_vport, 1);
433− }
426+ MLX5_SET(set_fte_in, in, vport_number, ft->vport);
427+ MLX5_SET(set_fte_in, in, other_vport,
428+ !!(ft->flags & MLX5_FLOW_TABLE_OTHER_VPORT));
434429
435430 in_flow_context = MLX5_ADDR_OF(set_fte_in, in, flow_context);
436431 MLX5_SET(flow_context, in_flow_context, group_id, group_id);
@@ -515,6 +510,9 @@ static int mlx5_cmd_set_fte(struct mlx5_core_dev *dev, · 78 unmodified lines
515510 dst->dest_attr.vport.pkt_reformat->id);
516511 }
517512 break;
513+ case MLX5_FLOW_DESTINATION_TYPE_FLOW_SAMPLER:
514+ id = dst->dest_attr.sampler_id;
515+ break;
518516 default:
519517 id = dst->dest_attr.tir_num;
520518 }
@@ -601,10 +599,9 @@ static int mlx5_cmd_delete_fte(struct mlx5_flow_root_namespace *ns, · 80 unmodified lines
601599 MLX5_SET(delete_fte_in, in, table_type, ft->type);
602600 MLX5_SET(delete_fte_in, in, table_id, ft->id);
603601 MLX5_SET(delete_fte_in, in, flow_index, fte->index);
604− if (ft->vport) {
605− MLX5_SET(delete_fte_in, in, vport_number, ft->vport);
606− MLX5_SET(delete_fte_in, in, other_vport, 1);
607− }
602+ MLX5_SET(delete_fte_in, in, vport_number, ft->vport);
603+ MLX5_SET(delete_fte_in, in, other_vport,
604+ !!(ft->flags & MLX5_FLOW_TABLE_OTHER_VPORT));
608605
609606 return mlx5_cmd_exec_in(dev, delete_fte, in);
610607 }
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c+7−10
@@ -1152,18 +1152,13 @@ struct mlx5_flow_table *mlx5_create_flow_table(struct mlx5_flow_namespace *ns, · 1151 unmodified lines
11521152 {
11531153 return __mlx5_create_flow_table(ns, ft_attr, FS_FT_OP_MOD_NORMAL, 0);
11541154 }
1155+EXPORT_SYMBOL(mlx5_create_flow_table);
11551156
1156−struct mlx5_flow_table *mlx5_create_vport_flow_table(struct mlx5_flow_namespace *ns,
1157− int prio, int max_fte,
1158− u32 level, u16 vport)
1157+struct mlx5_flow_table *
1158+mlx5_create_vport_flow_table(struct mlx5_flow_namespace *ns,
1159+ struct mlx5_flow_table_attr *ft_attr, u16 vport)
11591160 {
1160− struct mlx5_flow_table_attr ft_attr = {};
1161−
1162− ft_attr.max_fte = max_fte;
1163− ft_attr.level = level;
1164− ft_attr.prio = prio;
1165−
1166− return __mlx5_create_flow_table(ns, &ft_attr, FS_FT_OP_MOD_NORMAL, vport);
1161+ return __mlx5_create_flow_table(ns, ft_attr, FS_FT_OP_MOD_NORMAL, vport);
11671162 }
11681163
11691164 struct mlx5_flow_table*
@@ -1243,6 +1238,7 @@ struct mlx5_flow_group *mlx5_create_flow_group(struct mlx5_flow_table *ft, · 73 unmodified lines
12431238
12441239 return fg;
12451240 }
1241+EXPORT_SYMBOL(mlx5_create_flow_group);
12461242
12471243 static struct mlx5_flow_rule *alloc_rule(struct mlx5_flow_destination *dest)
12481244 {
@@ -2146,6 +2142,7 @@ void mlx5_destroy_flow_group(struct mlx5_flow_group *fg) · 897 unmodified lines
21462142 mlx5_core_warn(get_dev(&fg->node), "Flow group %d wasn't destroyed, refcount > 1\n",
21472143 fg->id);
21482144 }
2145+EXPORT_SYMBOL(mlx5_destroy_flow_group);
21492146
21502147 struct mlx5_flow_namespace *mlx5_get_fdb_sub_ns(struct mlx5_core_dev *dev,
21512148 int n)
drivers/net/ethernet/mellanox/mlx5/core/fs_core.h+1−1
@@ -194,7 +194,7 @@ struct mlx5_ft_underlay_qp { · 193 unmodified lines
194194 u32 qpn;
195195 };
196196
197−#define MLX5_FTE_MATCH_PARAM_RESERVED reserved_at_a00
197+#define MLX5_FTE_MATCH_PARAM_RESERVED reserved_at_c00
198198 /* Calculate the fte_match_param length and without the reserved length.
199199 * Make sure the reserved field is the last.
200200 */
drivers/net/ethernet/mellanox/mlx5/core/main.c+10−9
@@ -1126,23 +1126,23 @@ static int mlx5_load(struct mlx5_core_dev *dev) · 1125 unmodified lines
11261126 goto err_sriov;
11271127 }
11281128
1129− err = mlx5_sriov_attach(dev);
1130− if (err) {
1131− mlx5_core_err(dev, "sriov init failed %d\n", err);
1132− goto err_sriov;
1133− }
1134−
11351129 err = mlx5_ec_init(dev);
11361130 if (err) {
11371131 mlx5_core_err(dev, "Failed to init embedded CPU\n");
11381132 goto err_ec;
11391133 }
11401134
1135+ err = mlx5_sriov_attach(dev);
1136+ if (err) {
1137+ mlx5_core_err(dev, "sriov init failed %d\n", err);
1138+ goto err_sriov;
1139+ }
1140+
11411141 return 0;
11421142
1143−err_ec:
1144− mlx5_sriov_detach(dev);
11451143 err_sriov:
1144+ mlx5_ec_cleanup(dev);
1145+err_ec:
11461146 mlx5_cleanup_fs(dev);
11471147 err_fs:
11481148 mlx5_accel_tls_cleanup(dev);
@@ -1168,8 +1168,8 @@ err_irq_table: · 19 unmodified lines
11681168
11691169 static void mlx5_unload(struct mlx5_core_dev *dev)
11701170 {
1171− mlx5_ec_cleanup(dev);
11721171 mlx5_sriov_detach(dev);
1172+ mlx5_ec_cleanup(dev);
11731173 mlx5_cleanup_fs(dev);
11741174 mlx5_accel_ipsec_cleanup(dev);
11751175 mlx5_accel_tls_cleanup(dev);
@@ -1594,6 +1594,7 @@ static const struct pci_device_id mlx5_core_pci_table[] = { · 418 unmodified lines
15941594 { PCI_VDEVICE(MELLANOX, 0xa2d2) }, /* BlueField integrated ConnectX-5 network controller */
15951595 { PCI_VDEVICE(MELLANOX, 0xa2d3), MLX5_PCI_DEV_IS_VF}, /* BlueField integrated ConnectX-5 network controller VF */
15961596 { PCI_VDEVICE(MELLANOX, 0xa2d6) }, /* BlueField-2 integrated ConnectX-6 Dx network controller */
1597+ { PCI_VDEVICE(MELLANOX, 0xa2dc) }, /* BlueField-3 integrated ConnectX-7 network controller */
15971598 { 0, }
15981599 };
15991600
drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h+4−0
@@ -122,6 +122,10 @@ enum mlx5_semaphore_space_address { · 121 unmodified lines
122122
123123 int mlx5_query_hca_caps(struct mlx5_core_dev *dev);
124124 int mlx5_query_board_id(struct mlx5_core_dev *dev);
125+int mlx5_cmd_init(struct mlx5_core_dev *dev);
126+void mlx5_cmd_cleanup(struct mlx5_core_dev *dev);
127+void mlx5_cmd_set_state(struct mlx5_core_dev *dev,
128+ enum mlx5_cmdif_state cmdif_state);
125129 int mlx5_cmd_init_hca(struct mlx5_core_dev *dev, uint32_t *sw_owner_id);
126130 int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev);
127131 int mlx5_cmd_force_teardown_hca(struct mlx5_core_dev *dev);
drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c+6−6
@@ -374,7 +374,7 @@ retry: · 373 unmodified lines
374374 if (func_id)
375375 dev->priv.vfs_pages += npages;
376376 else if (mlx5_core_is_ecpf(dev) && !ec_function)
377− dev->priv.peer_pf_pages += npages;
377+ dev->priv.host_pf_pages += npages;
378378
379379 mlx5_core_dbg(dev, "npages %d, ec_function %d, func_id 0x%x, err %d\n",
380380 npages, ec_function, func_id, err);
@@ -416,7 +416,7 @@ static void release_all_pages(struct mlx5_core_dev *dev, u32 func_id, · 35 unmodified lines
416416 if (func_id)
417417 dev->priv.vfs_pages -= npages;
418418 else if (mlx5_core_is_ecpf(dev) && !ec_function)
419− dev->priv.peer_pf_pages -= npages;
419+ dev->priv.host_pf_pages -= npages;
420420
421421 mlx5_core_dbg(dev, "npages %d, ec_function %d, func_id 0x%x\n",
422422 npages, ec_function, func_id);
@@ -506,7 +506,7 @@ static int reclaim_pages(struct mlx5_core_dev *dev, u32 func_id, int npages, · 83 unmodified lines
506506 if (func_id)
507507 dev->priv.vfs_pages -= num_claimed;
508508 else if (mlx5_core_is_ecpf(dev) && !ec_function)
509− dev->priv.peer_pf_pages -= num_claimed;
509+ dev->priv.host_pf_pages -= num_claimed;
510510
511511 out_free:
512512 kvfree(out);
@@ -661,9 +661,9 @@ int mlx5_reclaim_startup_pages(struct mlx5_core_dev *dev) · 148 unmodified lines
661661 WARN(dev->priv.vfs_pages,
662662 "VFs FW pages counter is %d after reclaiming all pages\n",
663663 dev->priv.vfs_pages);
664− WARN(dev->priv.peer_pf_pages,
665− "Peer PF FW pages counter is %d after reclaiming all pages\n",
666− dev->priv.peer_pf_pages);
664+ WARN(dev->priv.host_pf_pages,
665+ "External host PF FW pages counter is %d after reclaiming all pages\n",
666+ dev->priv.host_pf_pages);
667667
668668 return 0;
669669 }
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c+1−1
@@ -643,7 +643,7 @@ static int dr_matcher_init(struct mlx5dr_matcher *matcher, · 642 unmodified lines
643643 }
644644
645645 if (mask) {
646− if (mask->match_sz > sizeof(struct mlx5dr_match_param)) {
646+ if (mask->match_sz > DR_SZ_MATCH_PARAM) {
647647 mlx5dr_err(dmn, "Invalid match size attribute\n");
648648 return -EINVAL;
649649 }
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c+1−2
@@ -874,8 +874,7 @@ static bool dr_rule_verify(struct mlx5dr_matcher *matcher, · 873 unmodified lines
874874 u32 s_idx, e_idx;
875875
876876 if (!value_size ||
877− (value_size > sizeof(struct mlx5dr_match_param) ||
878− (value_size % sizeof(u32)))) {
877+ (value_size > DR_SZ_MATCH_PARAM || (value_size % sizeof(u32)))) {
879878 mlx5dr_err(matcher->tbl->dmn, "Rule parameters length is incorrect\n");
880879 return false;
881880 }
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h+1−0
@@ -17,6 +17,7 @@ · 16 unmodified lines
1717 #define WIRE_PORT 0xFFFF
1818 #define DR_STE_SVLAN 0x1
1919 #define DR_STE_CVLAN 0x2
20+#define DR_SZ_MATCH_PARAM (MLX5_ST_SZ_DW_MATCH_PARAM * 4)
2021
2122 #define mlx5dr_err(dmn, arg...) mlx5_core_err((dmn)->mdev, ##arg)
2223 #define mlx5dr_info(dmn, arg...) mlx5_core_info((dmn)->mdev, ##arg)
include/linux/mlx5/device.h+8−0
@@ -346,6 +346,7 @@ enum mlx5_event { · 345 unmodified lines
346346 MLX5_EVENT_TYPE_NIC_VPORT_CHANGE = 0xd,
347347
348348 MLX5_EVENT_TYPE_ESW_FUNCTIONS_CHANGED = 0xe,
349+ MLX5_EVENT_TYPE_VHCA_STATE_CHANGE = 0xf,
349350
350351 MLX5_EVENT_TYPE_DCT_DRAINED = 0x1c,
351352 MLX5_EVENT_TYPE_DCT_KEY_VIOLATION = 0x1d,
@@ -717,6 +718,11 @@ struct mlx5_eqe_sync_fw_update { · 365 unmodified lines
717718 u8 sync_rst_state;
718719 };
719720
721+struct mlx5_eqe_vhca_state {
722+ __be16 ec_function;
723+ __be16 function_id;
724+} __packed;
725+
720726 union ev_data {
721727 __be32 raw[7];
722728 struct mlx5_eqe_cmd cmd;
@@ -736,6 +742,7 @@ union ev_data { · 13 unmodified lines
736742 struct mlx5_eqe_temp_warning temp_warning;
737743 struct mlx5_eqe_xrq_err xrq_err;
738744 struct mlx5_eqe_sync_fw_update sync_fw_update;
745+ struct mlx5_eqe_vhca_state vhca_state;
739746 } __packed;
740747
741748 struct mlx5_eqe {
@@ -1076,6 +1083,7 @@ enum { · 334 unmodified lines
10761083 MLX5_MATCH_INNER_HEADERS = 1 << 2,
10771084 MLX5_MATCH_MISC_PARAMETERS_2 = 1 << 3,
10781085 MLX5_MATCH_MISC_PARAMETERS_3 = 1 << 4,
1086+ MLX5_MATCH_MISC_PARAMETERS_4 = 1 << 5,
10791087 };
10801088
10811089 enum {
include/linux/mlx5/driver.h+2−6
@@ -547,7 +547,7 @@ struct mlx5_priv { · 546 unmodified lines
547547 atomic_t reg_pages;
548548 struct list_head free_list;
549549 int vfs_pages;
550− int peer_pf_pages;
550+ int host_pf_pages;
551551
552552 struct mlx5_core_health health;
553553
@@ -888,10 +888,6 @@ enum { · 334 unmodified lines
888888 CMD_ALLOWED_OPCODE_ALL,
889889 };
890890
891−int mlx5_cmd_init(struct mlx5_core_dev *dev);
892−void mlx5_cmd_cleanup(struct mlx5_core_dev *dev);
893−void mlx5_cmd_set_state(struct mlx5_core_dev *dev,
894− enum mlx5_cmdif_state cmdif_state);
895891 void mlx5_cmd_use_events(struct mlx5_core_dev *dev);
896892 void mlx5_cmd_use_polling(struct mlx5_core_dev *dev);
897893 void mlx5_cmd_allowed_opcode(struct mlx5_core_dev *dev, u16 opcode);
@@ -1137,7 +1133,7 @@ static inline bool mlx5_core_is_vf(const struct mlx5_core_dev *dev) · 239 unmodified lines
11371133 return dev->coredev_type == MLX5_COREDEV_VF;
11381134 }
11391135
1140−static inline bool mlx5_core_is_ecpf(struct mlx5_core_dev *dev)
1136+static inline bool mlx5_core_is_ecpf(const struct mlx5_core_dev *dev)
11411137 {
11421138 return dev->caps.embedded_cpu;
11431139 }
include/linux/mlx5/fs.h+3−3
@@ -50,6 +50,7 @@ enum { · 49 unmodified lines
5050 MLX5_FLOW_TABLE_TUNNEL_EN_DECAP = BIT(1),
5151 MLX5_FLOW_TABLE_TERMINATION = BIT(2),
5252 MLX5_FLOW_TABLE_UNMANAGED = BIT(3),
53+ MLX5_FLOW_TABLE_OTHER_VPORT = BIT(4),
5354 };
5455
5556 #define LEFTOVERS_RULE_NUM 2
@@ -132,6 +133,7 @@ struct mlx5_flow_destination { · 76 unmodified lines
132133 struct mlx5_pkt_reformat *pkt_reformat;
133134 u8 flags;
134135 } vport;
136+ u32 sampler_id;
135137 };
136138 };
137139
@@ -173,9 +175,7 @@ mlx5_create_auto_grouped_flow_table(struct mlx5_flow_namespace *ns, · 35 unmodified lines
173175
174176 struct mlx5_flow_table *
175177 mlx5_create_vport_flow_table(struct mlx5_flow_namespace *ns,
176− int prio,
177− int num_flow_table_entries,
178− u32 level, u16 vport);
178+ struct mlx5_flow_table_attr *ft_attr, u16 vport);
179179 struct mlx5_flow_table *mlx5_create_lag_demux_flow_table(
180180 struct mlx5_flow_namespace *ns,
181181 int prio, u32 level);
include/linux/mlx5/mlx5_ifc.h+86−8
@@ -299,6 +299,8 @@ enum { · 298 unmodified lines
299299 MLX5_CMD_OP_CREATE_UMEM = 0xa08,
300300 MLX5_CMD_OP_DESTROY_UMEM = 0xa0a,
301301 MLX5_CMD_OP_SYNC_STEERING = 0xb00,
302+ MLX5_CMD_OP_QUERY_VHCA_STATE = 0xb0d,
303+ MLX5_CMD_OP_MODIFY_VHCA_STATE = 0xb0e,
302304 MLX5_CMD_OP_MAX
303305 };
304306
@@ -623,6 +625,26 @@ struct mlx5_ifc_fte_match_set_misc3_bits { · 318 unmodified lines
623625 u8 reserved_at_140[0xc0];
624626 };
625627
628+struct mlx5_ifc_fte_match_set_misc4_bits {
629+ u8 prog_sample_field_value_0[0x20];
630+
631+ u8 prog_sample_field_id_0[0x20];
632+
633+ u8 prog_sample_field_value_1[0x20];
634+
635+ u8 prog_sample_field_id_1[0x20];
636+
637+ u8 prog_sample_field_value_2[0x20];
638+
639+ u8 prog_sample_field_id_2[0x20];
640+
641+ u8 prog_sample_field_value_3[0x20];
642+
643+ u8 prog_sample_field_id_3[0x20];
644+
645+ u8 reserved_at_100[0x100];
646+};
647+
626648 struct mlx5_ifc_cmd_pas_bits {
627649 u8 pa_h[0x20];
628650
@@ -891,7 +913,10 @@ struct mlx5_ifc_per_protocol_networking_offload_caps_bits { · 262 unmodified lines
891913 u8 tunnel_stateless_ipv4_over_vxlan[0x1];
892914 u8 tunnel_stateless_ip_over_ip[0x1];
893915 u8 insert_trailer[0x1];
894− u8 reserved_at_2b[0x5];
916+ u8 reserved_at_2b[0x1];
917+ u8 tunnel_stateless_ip_over_ip_rx[0x1];
918+ u8 tunnel_stateless_ip_over_ip_tx[0x1];
919+ u8 reserved_at_2e[0x2];
895920 u8 max_vxlan_udp_ports[0x8];
896921 u8 reserved_at_38[0x6];
897922 u8 max_geneve_opt_len[0x1];
@@ -1224,7 +1249,16 @@ enum mlx5_fc_bulk_alloc_bitmask { · 326 unmodified lines
12241249 #define MLX5_FC_BULK_NUM_FCS(fc_enum) (MLX5_FC_BULK_SIZE_FACTOR * (fc_enum))
12251250
12261251 struct mlx5_ifc_cmd_hca_cap_bits {
1227− u8 reserved_at_0[0x30];
1252+ u8 reserved_at_0[0x1f];
1253+ u8 vhca_resource_manager[0x1];
1254+
1255+ u8 reserved_at_20[0x3];
1256+ u8 event_on_vhca_state_teardown_request[0x1];
1257+ u8 event_on_vhca_state_in_use[0x1];
1258+ u8 event_on_vhca_state_active[0x1];
1259+ u8 event_on_vhca_state_allocated[0x1];
1260+ u8 event_on_vhca_state_invalid[0x1];
1261+ u8 reserved_at_28[0x8];
12281262 u8 vhca_id[0x10];
12291263
12301264 u8 reserved_at_40[0x40];
@@ -1241,7 +1275,9 @@ struct mlx5_ifc_cmd_hca_cap_bits { · 10 unmodified lines
12411275 u8 ece_support[0x1];
12421276 u8 reserved_at_a4[0x7];
12431277 u8 log_max_srq[0x5];
1244− u8 reserved_at_b0[0x10];
1278+ u8 reserved_at_b0[0x2];
1279+ u8 ts_cqe_to_dest_cqn[0x1];
1280+ u8 reserved_at_b3[0xd];
12451281
12461282 u8 max_sgl_for_optimized_performance[0x8];
12471283 u8 log_max_cq_sz[0x8];
@@ -1512,7 +1548,8 @@ struct mlx5_ifc_cmd_hca_cap_bits { · 264 unmodified lines
15121548 u8 disable_local_lb_uc[0x1];
15131549 u8 disable_local_lb_mc[0x1];
15141550 u8 log_min_hairpin_wq_data_sz[0x5];
1515− u8 reserved_at_3e8[0x3];
1551+ u8 reserved_at_3e8[0x2];
1552+ u8 vhca_state[0x1];
15161553 u8 log_max_vlan_list[0x5];
15171554 u8 reserved_at_3f0[0x3];
15181555 u8 log_max_current_mc_list[0x5];
@@ -1580,7 +1617,7 @@ struct mlx5_ifc_cmd_hca_cap_bits { · 61 unmodified lines
15801617 u8 max_num_of_monitor_counters[0x10];
15811618 u8 num_ppcnt_monitor_counters[0x10];
15821619
1583− u8 reserved_at_640[0x10];
1620+ u8 max_num_sf[0x10];
15841621 u8 num_q_monitor_counters[0x10];
15851622
15861623 u8 reserved_at_660[0x20];
@@ -1616,6 +1653,7 @@ enum mlx5_flow_destination_type { · 29 unmodified lines
16161653 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
16171654 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
16181655 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
1656+ MLX5_FLOW_DESTINATION_TYPE_FLOW_SAMPLER = 0x6,
16191657
16201658 MLX5_FLOW_DESTINATION_TYPE_PORT = 0x99,
16211659 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
@@ -1668,7 +1706,9 @@ struct mlx5_ifc_fte_match_param_bits { · 46 unmodified lines
16681706
16691707 struct mlx5_ifc_fte_match_set_misc3_bits misc_parameters_3;
16701708
1671− u8 reserved_at_a00[0x600];
1709+ struct mlx5_ifc_fte_match_set_misc4_bits misc_parameters_4;
1710+
1711+ u8 reserved_at_c00[0x400];
16721712 };
16731713
16741714 enum {
@@ -3289,8 +3329,12 @@ struct mlx5_ifc_sqc_bits { · 1614 unmodified lines
32893329 u8 reserved_at_80[0x10];
32903330 u8 hairpin_peer_vhca[0x10];
32913331
3292− u8 reserved_at_a0[0x50];
3332+ u8 reserved_at_a0[0x20];
32933333
3334+ u8 reserved_at_c0[0x8];
3335+ u8 ts_cqe_to_dest_cqn[0x18];
3336+
3337+ u8 reserved_at_e0[0x10];
32943338 u8 packet_pacing_rate_limit_index[0x10];
32953339 u8 tis_lst_sz[0x10];
32963340 u8 reserved_at_110[0x10];
@@ -4204,7 +4248,11 @@ struct mlx5_ifc_set_hca_cap_in_bits { · 907 unmodified lines
42044248 u8 reserved_at_20[0x10];
42054249 u8 op_mod[0x10];
42064250
4207− u8 reserved_at_40[0x40];
4251+ u8 other_function[0x1];
4252+ u8 reserved_at_41[0xf];
4253+ u8 function_id[0x10];
4254+
4255+ u8 reserved_at_60[0x20];
42084256
42094257 union mlx5_ifc_hca_cap_union_bits capability;
42104258 };
@@ -5461,6 +5509,7 @@ enum { · 1250 unmodified lines
54615509 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
54625510 MLX5_QUERY_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS_2 = 0x3,
54635511 MLX5_QUERY_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS_3 = 0x4,
5512+ MLX5_QUERY_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS_4 = 0x5,
54645513 };
54655514
54665515 struct mlx5_ifc_query_flow_group_out_bits {
@@ -10657,11 +10706,13 @@ struct mlx5_ifc_affiliated_event_header_bits { · 5190 unmodified lines
1065710706 enum {
1065810707 MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_ENCRYPTION_KEY = BIT(0xc),
1065910708 MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_IPSEC = BIT(0x13),
10709+ MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_SAMPLER = BIT(0x20),
1066010710 };
1066110711
1066210712 enum {
1066310713 MLX5_GENERAL_OBJECT_TYPES_ENCRYPTION_KEY = 0xc,
1066410714 MLX5_GENERAL_OBJECT_TYPES_IPSEC = 0x13,
10715+ MLX5_GENERAL_OBJECT_TYPES_SAMPLER = 0x20,
1066510716 };
1066610717
1066710718 enum {
@@ -10736,6 +10787,33 @@ struct mlx5_ifc_create_encryption_key_in_bits { · 68 unmodified lines
1073610787 struct mlx5_ifc_encryption_key_obj_bits encryption_key_object;
1073710788 };
1073810789
10790+struct mlx5_ifc_sampler_obj_bits {
10791+ u8 modify_field_select[0x40];
10792+
10793+ u8 table_type[0x8];
10794+ u8 level[0x8];
10795+ u8 reserved_at_50[0xf];
10796+ u8 ignore_flow_level[0x1];
10797+
10798+ u8 sample_ratio[0x20];
10799+
10800+ u8 reserved_at_80[0x8];
10801+ u8 sample_table_id[0x18];
10802+
10803+ u8 reserved_at_a0[0x8];
10804+ u8 default_table_id[0x18];
10805+
10806+ u8 sw_steering_icm_address_rx[0x40];
10807+ u8 sw_steering_icm_address_tx[0x40];
10808+
10809+ u8 reserved_at_140[0xa0];
10810+};
10811+
10812+struct mlx5_ifc_create_sampler_obj_in_bits {
10813+ struct mlx5_ifc_general_obj_in_cmd_hdr_bits general_obj_in_cmd_hdr;
10814+ struct mlx5_ifc_sampler_obj_bits sampler_object;
10815+};
10816+
1073910817 enum {
1074010818 MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_KEY_SIZE_128 = 0x0,
1074110819 MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_KEY_SIZE_256 = 0x1,
include/uapi/rdma/mlx5_user_ioctl_cmds.h+1−1
@@ -232,7 +232,7 @@ enum mlx5_ib_device_query_context_attrs { · 231 unmodified lines
232232 MLX5_IB_ATTR_QUERY_CONTEXT_RESP_UCTX = (1U << UVERBS_ID_NS_SHIFT),
233233 };
234234
235−#define MLX5_IB_DW_MATCH_PARAM 0x80
235+#define MLX5_IB_DW_MATCH_PARAM 0x90
236236
237237 struct mlx5_ib_match_params {
238238 __u32 match_params[MLX5_IB_DW_MATCH_PARAM];