* devcoredump support for display errors * dpu: irq cleanup/refactor * dpu: dt bindings conversion to yaml * dsi: dt bindings conversion to yaml * mdp5: alpha/blend_mode/zpos support * a6xx: cached coherent buffer support * a660 support * gpu iova fault improvements: - info about which block triggered the fault, etc - generation of gpu devcoredump on fault * assortment of other cleanups and fixes
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| @@ -94,13 +94,12 @@ struct drm_msm_param { · 93 unmodified lines | |||
| 94 | /* cache modes */ | 94 | /* cache modes */ |
| 95 | #define MSM_BO_CACHED 0x00010000 | 95 | #define MSM_BO_CACHED 0x00010000 |
| 96 | #define MSM_BO_WC 0x00020000 | 96 | #define MSM_BO_WC 0x00020000 |
| 97 | #define MSM_BO_UNCACHED 0x00040000 | 97 | #define MSM_BO_UNCACHED 0x00040000 /* deprecated, use MSM_BO_WC */ |
| 98 | #define MSM_BO_CACHED_COHERENT 0x080000 | ||
| 98 | 99 | ||
| 99 | #define MSM_BO_FLAGS (MSM_BO_SCANOUT | \ | 100 | #define MSM_BO_FLAGS (MSM_BO_SCANOUT | \ |
| 100 | MSM_BO_GPU_READONLY | \ | 101 | MSM_BO_GPU_READONLY | \ |
| 101 | MSM_BO_CACHED | \ | 102 | MSM_BO_CACHE_MASK) |
| 102 | MSM_BO_WC | \ | ||
| 103 | MSM_BO_UNCACHED) | ||
| 104 | 103 | ||
| 105 | struct drm_msm_gem_new { | 104 | struct drm_msm_gem_new { |
| 106 | __u64 size; /* in */ | 105 | __u64 size; /* in */ |