Two easily resolvable overlapping change conflicts, one in TCP and one in the eBPF verifier.
Unified · Split
| @@ -7,7 +7,7 @@ Intro · 6 unmodified lines | ||
| 7 | 7 | ===== |
| 8 | 8 | |
| 9 | 9 | The MSG_ZEROCOPY flag enables copy avoidance for socket send calls. |
| 10 | −The feature is currently implemented for TCP sockets. | |
| 10 | +The feature is currently implemented for TCP and UDP sockets. | |
| 11 | 11 | |
| 12 | 12 | |
| 13 | 13 | Opportunity and Caveats |
| @@ -2,7 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | VERSION = 5 |
| 3 | 3 | PATCHLEVEL = 0 |
| 4 | 4 | SUBLEVEL = 0 |
| 5 | −EXTRAVERSION = -rc6 | |
| 5 | +EXTRAVERSION = -rc7 | |
| 6 | 6 | NAME = Shy Crocodile |
| 7 | 7 | |
| 8 | 8 | # *DOCUMENTATION* |
| @@ -1400,6 +1400,7 @@ config NR_CPUS · 1399 unmodified lines | ||
| 1400 | 1400 | config HOTPLUG_CPU |
| 1401 | 1401 | bool "Support for hot-pluggable CPUs" |
| 1402 | 1402 | depends on SMP |
| 1403 | + select GENERIC_IRQ_MIGRATION | |
| 1403 | 1404 | help |
| 1404 | 1405 | Say Y here to experiment with turning CPUs off and on. CPUs |
| 1405 | 1406 | can be controlled through /sys/devices/system/cpu. |
| @@ -644,6 +644,17 @@ · 643 unmodified lines | ||
| 644 | 644 | }; |
| 645 | 645 | }; |
| 646 | 646 | |
| 647 | +/* Configure pwm clock source for timers 8 & 9 */ | |
| 648 | +&timer8 { | |
| 649 | + assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>; | |
| 650 | + assigned-clock-parents = <&sys_clkin_ck>; | |
| 651 | +}; | |
| 652 | + | |
| 653 | +&timer9 { | |
| 654 | + assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>; | |
| 655 | + assigned-clock-parents = <&sys_clkin_ck>; | |
| 656 | +}; | |
| 657 | + | |
| 647 | 658 | /* |
| 648 | 659 | * As uart1 is wired to mdm6600 with rts and cts, we can use the cts pin for |
| 649 | 660 | * uart1 wakeirq. |
| @@ -317,7 +317,8 @@ · 316 unmodified lines | ||
| 317 | 317 | |
| 318 | 318 | palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins { |
| 319 | 319 | pinctrl-single,pins = < |
| 320 | − OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1 */ | |
| 320 | + /* sys_nirq1 is pulled down as the SoC is inverting it for GIC */ | |
| 321 | + OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0) | |
| 321 | 322 | >; |
| 322 | 323 | }; |
| 323 | 324 | |
| @@ -385,7 +386,8 @@ · 61 unmodified lines | ||
| 385 | 386 | |
| 386 | 387 | palmas: palmas@48 { |
| 387 | 388 | compatible = "ti,palmas"; |
| 388 | − interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */ | |
| 389 | + /* sys_nirq/ext_sys_irq pins get inverted at mpuss wakeupgen */ | |
| 390 | + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_LOW>; | |
| 389 | 391 | reg = <0x48>; |
| 390 | 392 | interrupt-controller; |
| 391 | 393 | #interrupt-cells = <2>; |
| @@ -651,7 +653,8 @@ · 259 unmodified lines | ||
| 651 | 653 | pinctrl-names = "default"; |
| 652 | 654 | pinctrl-0 = <&twl6040_pins>; |
| 653 | 655 | |
| 654 | − interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */ | |
| 656 | + /* sys_nirq/ext_sys_irq pins get inverted at mpuss wakeupgen */ | |
| 657 | + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_LOW>; | |
| 655 | 658 | |
| 656 | 659 | /* audpwron gpio defined in the board specific dts */ |
| 657 | 660 | |
| @@ -181,6 +181,13 @@ · 180 unmodified lines | ||
| 181 | 181 | OMAP5_IOPAD(0x0042, PIN_INPUT_PULLDOWN | MUX_MODE6) /* llib_wakereqin.gpio1_wk15 */ |
| 182 | 182 | >; |
| 183 | 183 | }; |
| 184 | + | |
| 185 | + palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins { | |
| 186 | + pinctrl-single,pins = < | |
| 187 | + /* sys_nirq1 is pulled down as the SoC is inverting it for GIC */ | |
| 188 | + OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0) | |
| 189 | + >; | |
| 190 | + }; | |
| 184 | 191 | }; |
| 185 | 192 | |
| 186 | 193 | &omap5_pmx_core { |
| @@ -414,8 +421,11 @@ · 227 unmodified lines | ||
| 414 | 421 | |
| 415 | 422 | palmas: palmas@48 { |
| 416 | 423 | compatible = "ti,palmas"; |
| 417 | − interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */ | |
| 418 | 424 | reg = <0x48>; |
| 425 | + pinctrl-0 = <&palmas_sys_nirq_pins>; | |
| 426 | + pinctrl-names = "default"; | |
| 427 | + /* sys_nirq/ext_sys_irq pins get inverted at mpuss wakeupgen */ | |
| 428 | + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_LOW>; | |
| 419 | 429 | interrupt-controller; |
| 420 | 430 | #interrupt-cells = <2>; |
| 421 | 431 | ti,system-power-controller; |
| @@ -719,7 +719,6 @@ · 718 unmodified lines | ||
| 719 | 719 | pm_qos = <&qos_lcdc0>, |
| 720 | 720 | <&qos_lcdc1>, |
| 721 | 721 | <&qos_cif0>, |
| 722 | − <&qos_cif1>, | |
| 723 | 722 | <&qos_ipp>, |
| 724 | 723 | <&qos_rga>; |
| 725 | 724 | }; |
| @@ -25,7 +25,6 @@ · 24 unmodified lines | ||
| 25 | 25 | #ifndef __ASSEMBLY__ |
| 26 | 26 | struct irqaction; |
| 27 | 27 | struct pt_regs; |
| 28 | −extern void migrate_irqs(void); | |
| 29 | 28 | |
| 30 | 29 | extern void asm_do_IRQ(unsigned int, struct pt_regs *); |
| 31 | 30 | void handle_IRQ(unsigned int, struct pt_regs *); |
| @@ -48,6 +48,7 @@ · 47 unmodified lines | ||
| 48 | 48 | #define KVM_REQ_SLEEP \ |
| 49 | 49 | KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) |
| 50 | 50 | #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1) |
| 51 | +#define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(2) | |
| 51 | 52 | |
| 52 | 53 | DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use); |
| 53 | 54 | |
| @@ -147,6 +148,13 @@ struct kvm_cpu_context { · 93 unmodified lines | ||
| 147 | 148 | |
| 148 | 149 | typedef struct kvm_cpu_context kvm_cpu_context_t; |
| 149 | 150 | |
| 151 | +struct vcpu_reset_state { | |
| 152 | + unsigned long pc; | |
| 153 | + unsigned long r0; | |
| 154 | + bool be; | |
| 155 | + bool reset; | |
| 156 | +}; | |
| 157 | + | |
| 150 | 158 | struct kvm_vcpu_arch { |
| 151 | 159 | struct kvm_cpu_context ctxt; |
| 152 | 160 | |
| @@ -186,6 +194,8 @@ struct kvm_vcpu_arch { · 33 unmodified lines | ||
| 186 | 194 | /* Cache some mmu pages needed inside spinlock regions */ |
| 187 | 195 | struct kvm_mmu_memory_cache mmu_page_cache; |
| 188 | 196 | |
| 197 | + struct vcpu_reset_state reset_state; | |
| 198 | + | |
| 189 | 199 | /* Detect first run of a vcpu */ |
| 190 | 200 | bool has_run_once; |
| 191 | 201 | }; |
| @@ -76,4 +76,9 @@ static inline bool kvm_stage2_has_pud(struct kvm *kvm) · 75 unmodified lines | ||
| 76 | 76 | #define S2_PMD_MASK PMD_MASK |
| 77 | 77 | #define S2_PMD_SIZE PMD_SIZE |
| 78 | 78 | |
| 79 | +static inline bool kvm_stage2_has_pmd(struct kvm *kvm) | |
| 80 | +{ | |
| 81 | + return true; | |
| 82 | +} | |
| 83 | + | |
| 79 | 84 | #endif /* __ARM_S2_PGTABLE_H_ */ |
| @@ -31,7 +31,6 @@ · 30 unmodified lines | ||
| 31 | 31 | #include <linux/smp.h> |
| 32 | 32 | #include <linux/init.h> |
| 33 | 33 | #include <linux/seq_file.h> |
| 34 | −#include <linux/ratelimit.h> | |
| 35 | 34 | #include <linux/errno.h> |
| 36 | 35 | #include <linux/list.h> |
| 37 | 36 | #include <linux/kallsyms.h> |
| @@ -109,64 +108,3 @@ int __init arch_probe_nr_irqs(void) · 71 unmodified lines | ||
| 109 | 108 | return nr_irqs; |
| 110 | 109 | } |
| 111 | 110 | #endif |
| 112 | − | |
| 113 | −#ifdef CONFIG_HOTPLUG_CPU | |
| 114 | −static bool migrate_one_irq(struct irq_desc *desc) | |
| 115 | −{ | |
| 116 | − struct irq_data *d = irq_desc_get_irq_data(desc); | |
| 117 | − const struct cpumask *affinity = irq_data_get_affinity_mask(d); | |
| 118 | − struct irq_chip *c; | |
| 119 | − bool ret = false; | |
| 120 | − | |
| 121 | − /* | |
| 122 | − * If this is a per-CPU interrupt, or the affinity does not | |
| 123 | − * include this CPU, then we have nothing to do. | |
| 124 | − */ | |
| 125 | − if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity)) | |
| 126 | − return false; | |
| 127 | − | |
| 128 | − if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) { | |
| 129 | − affinity = cpu_online_mask; | |
| 130 | − ret = true; | |
| 131 | − } | |
| 132 | − | |
| 133 | − c = irq_data_get_irq_chip(d); | |
| 134 | − if (!c->irq_set_affinity) | |
| 135 | − pr_debug("IRQ%u: unable to set affinity\n", d->irq); | |
| 136 | − else if (c->irq_set_affinity(d, affinity, false) == IRQ_SET_MASK_OK && ret) | |
| 137 | − cpumask_copy(irq_data_get_affinity_mask(d), affinity); | |
| 138 | − | |
| 139 | − return ret; | |
| 140 | −} | |
| 141 | − | |
| 142 | −/* | |
| 143 | − * The current CPU has been marked offline. Migrate IRQs off this CPU. | |
| 144 | − * If the affinity settings do not allow other CPUs, force them onto any | |
| 145 | − * available CPU. | |
| 146 | − * | |
| 147 | − * Note: we must iterate over all IRQs, whether they have an attached | |
| 148 | − * action structure or not, as we need to get chained interrupts too. | |
| 149 | − */ | |
| 150 | −void migrate_irqs(void) | |
| 151 | −{ | |
| 152 | − unsigned int i; | |
| 153 | − struct irq_desc *desc; | |
| 154 | − unsigned long flags; | |
| 155 | − | |
| 156 | − local_irq_save(flags); | |
| 157 | − | |
| 158 | − for_each_irq_desc(i, desc) { | |
| 159 | − bool affinity_broken; | |
| 160 | − | |
| 161 | − raw_spin_lock(&desc->lock); | |
| 162 | − affinity_broken = migrate_one_irq(desc); | |
| 163 | − raw_spin_unlock(&desc->lock); | |
| 164 | − | |
| 165 | − if (affinity_broken) | |
| 166 | − pr_warn_ratelimited("IRQ%u no longer affine to CPU%u\n", | |
| 167 | − i, smp_processor_id()); | |
| 168 | − } | |
| 169 | − | |
| 170 | − local_irq_restore(flags); | |
| 171 | −} | |
| 172 | −#endif /* CONFIG_HOTPLUG_CPU */ | |
| @@ -254,7 +254,7 @@ int __cpu_disable(void) · 253 unmodified lines | ||
| 254 | 254 | /* |
| 255 | 255 | * OK - migrate IRQs away from this CPU |
| 256 | 256 | */ |
| 257 | − migrate_irqs(); | |
| 257 | + irq_migrate_all_off_this_cpu(); | |
| 258 | 258 | |
| 259 | 259 | /* |
| 260 | 260 | * Flush user cache and TLB mappings, and then remove this CPU |
| @@ -1450,6 +1450,6 @@ void kvm_reset_coprocs(struct kvm_vcpu *vcpu) · 1449 unmodified lines | ||
| 1450 | 1450 | reset_coproc_regs(vcpu, table, num); |
| 1451 | 1451 | |
| 1452 | 1452 | for (num = 1; num < NR_CP15_REGS; num++) |
| 1453 | − if (vcpu_cp15(vcpu, num) == 0x42424242) | |
| 1454 | − panic("Didn't reset vcpu_cp15(vcpu, %zi)", num); | |
| 1453 | + WARN(vcpu_cp15(vcpu, num) == 0x42424242, | |
| 1454 | + "Didn't reset vcpu_cp15(vcpu, %zi)", num); | |
| 1455 | 1455 | } |
| @@ -26,6 +26,7 @@ · 25 unmodified lines | ||
| 26 | 26 | #include <asm/cputype.h> |
| 27 | 27 | #include <asm/kvm_arm.h> |
| 28 | 28 | #include <asm/kvm_coproc.h> |
| 29 | +#include <asm/kvm_emulate.h> | |
| 29 | 30 | |
| 30 | 31 | #include <kvm/arm_arch_timer.h> |
| 31 | 32 | |
| @@ -69,6 +70,29 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) · 37 unmodified lines | ||
| 69 | 70 | /* Reset CP15 registers */ |
| 70 | 71 | kvm_reset_coprocs(vcpu); |
| 71 | 72 | |
| 73 | + /* | |
| 74 | + * Additional reset state handling that PSCI may have imposed on us. | |
| 75 | + * Must be done after all the sys_reg reset. | |
| 76 | + */ | |
| 77 | + if (READ_ONCE(vcpu->arch.reset_state.reset)) { | |
| 78 | + unsigned long target_pc = vcpu->arch.reset_state.pc; | |
| 79 | + | |
| 80 | + /* Gracefully handle Thumb2 entry point */ | |
| 81 | + if (target_pc & 1) { | |
| 82 | + target_pc &= ~1UL; | |
| 83 | + vcpu_set_thumb(vcpu); | |
| 84 | + } | |
| 85 | + | |
| 86 | + /* Propagate caller endianness */ | |
| 87 | + if (vcpu->arch.reset_state.be) | |
| 88 | + kvm_vcpu_set_be(vcpu); | |
| 89 | + | |
| 90 | + *vcpu_pc(vcpu) = target_pc; | |
| 91 | + vcpu_set_reg(vcpu, 0, vcpu->arch.reset_state.r0); | |
| 92 | + | |
| 93 | + vcpu->arch.reset_state.reset = false; | |
| 94 | + } | |
| 95 | + | |
| 72 | 96 | /* Reset arch_timer context */ |
| 73 | 97 | return kvm_timer_vcpu_reset(vcpu); |
| 74 | 98 | } |
| @@ -152,6 +152,10 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, · 151 unmodified lines | ||
| 152 | 152 | mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) && |
| 153 | 153 | (cx->mpu_logic_state == PWRDM_POWER_OFF); |
| 154 | 154 | |
| 155 | + /* Enter broadcast mode for periodic timers */ | |
| 156 | + tick_broadcast_enable(); | |
| 157 | + | |
| 158 | + /* Enter broadcast mode for one-shot timers */ | |
| 155 | 159 | tick_broadcast_enter(); |
| 156 | 160 | |
| 157 | 161 | /* |
| @@ -218,15 +222,6 @@ fail: · 60 unmodified lines | ||
| 218 | 222 | return index; |
| 219 | 223 | } |
| 220 | 224 | |
| 221 | −/* | |
| 222 | − * For each cpu, setup the broadcast timer because local timers | |
| 223 | − * stops for the states above C1. | |
| 224 | − */ | |
| 225 | −static void omap_setup_broadcast_timer(void *arg) | |
| 226 | −{ | |
| 227 | − tick_broadcast_enable(); | |
| 228 | −} | |
| 229 | − | |
| 230 | 225 | static struct cpuidle_driver omap4_idle_driver = { |
| 231 | 226 | .name = "omap4_idle", |
| 232 | 227 | .owner = THIS_MODULE, |
| @@ -319,8 +314,5 @@ int __init omap4_idle_init(void) · 86 unmodified lines | ||
| 319 | 314 | if (!cpu_clkdm[0] || !cpu_clkdm[1]) |
| 320 | 315 | return -ENODEV; |
| 321 | 316 | |
| 322 | − /* Configure the broadcast timer on each cpu */ | |
| 323 | − on_each_cpu(omap_setup_broadcast_timer, NULL, 1); | |
| 324 | − | |
| 325 | 317 | return cpuidle_register(idle_driver, cpu_online_mask); |
| 326 | 318 | } |
| @@ -83,6 +83,7 @@ static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes) · 82 unmodified lines | ||
| 83 | 83 | u32 enable_mask, enable_shift; |
| 84 | 84 | u32 pipd_mask, pipd_shift; |
| 85 | 85 | u32 reg; |
| 86 | + int ret; | |
| 86 | 87 | |
| 87 | 88 | if (dsi_id == 0) { |
| 88 | 89 | enable_mask = OMAP4_DSI1_LANEENABLE_MASK; |
| @@ -98,7 +99,11 @@ static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes) · 9 unmodified lines | ||
| 98 | 99 | return -ENODEV; |
| 99 | 100 | } |
| 100 | 101 | |
| 101 | − regmap_read(omap4_dsi_mux_syscon, OMAP4_DSIPHY_SYSCON_OFFSET, ®); | |
| 102 | + ret = regmap_read(omap4_dsi_mux_syscon, | |
| 103 | + OMAP4_DSIPHY_SYSCON_OFFSET, | |
| 104 | + ®); | |
| 105 | + if (ret) | |
| 106 | + return ret; | |
| 102 | 107 | |
| 103 | 108 | reg &= ~enable_mask; |
| 104 | 109 | reg &= ~pipd_mask; |
| @@ -50,6 +50,9 @@ · 49 unmodified lines | ||
| 50 | 50 | #define OMAP4_NR_BANKS 4 |
| 51 | 51 | #define OMAP4_NR_IRQS 128 |
| 52 | 52 | |
| 53 | +#define SYS_NIRQ1_EXT_SYS_IRQ_1 7 | |
| 54 | +#define SYS_NIRQ2_EXT_SYS_IRQ_2 119 | |
| 55 | + | |
| 53 | 56 | static void __iomem *wakeupgen_base; |
| 54 | 57 | static void __iomem *sar_base; |
| 55 | 58 | static DEFINE_RAW_SPINLOCK(wakeupgen_lock); |
| @@ -153,6 +156,37 @@ static void wakeupgen_unmask(struct irq_data *d) · 97 unmodified lines | ||
| 153 | 156 | irq_chip_unmask_parent(d); |
| 154 | 157 | } |
| 155 | 158 | |
| 159 | +/* | |
| 160 | + * The sys_nirq pins bypass peripheral modules and are wired directly | |
| 161 | + * to MPUSS wakeupgen. They get automatically inverted for GIC. | |
| 162 | + */ | |
| 163 | +static int wakeupgen_irq_set_type(struct irq_data *d, unsigned int type) | |
| 164 | +{ | |
| 165 | + bool inverted = false; | |
| 166 | + | |
| 167 | + switch (type) { | |
| 168 | + case IRQ_TYPE_LEVEL_LOW: | |
| 169 | + type &= ~IRQ_TYPE_LEVEL_MASK; | |
| 170 | + type |= IRQ_TYPE_LEVEL_HIGH; | |
| 171 | + inverted = true; | |
| 172 | + break; | |
| 173 | + case IRQ_TYPE_EDGE_FALLING: | |
| 174 | + type &= ~IRQ_TYPE_EDGE_BOTH; | |
| 175 | + type |= IRQ_TYPE_EDGE_RISING; | |
| 176 | + inverted = true; | |
| 177 | + break; | |
| 178 | + default: | |
| 179 | + break; | |
| 180 | + } | |
| 181 | + | |
| 182 | + if (inverted && d->hwirq != SYS_NIRQ1_EXT_SYS_IRQ_1 && | |
| 183 | + d->hwirq != SYS_NIRQ2_EXT_SYS_IRQ_2) | |
| 184 | + pr_warn("wakeupgen: irq%li polarity inverted in dts\n", | |
| 185 | + d->hwirq); | |
| 186 | + | |
| 187 | + return irq_chip_set_type_parent(d, type); | |
| 188 | +} | |
| 189 | + | |
| 156 | 190 | #ifdef CONFIG_HOTPLUG_CPU |
| 157 | 191 | static DEFINE_PER_CPU(u32 [MAX_NR_REG_BANKS], irqmasks); |
| 158 | 192 | |
| @@ -446,7 +480,7 @@ static struct irq_chip wakeupgen_chip = { · 287 unmodified lines | ||
| 446 | 480 | .irq_mask = wakeupgen_mask, |
| 447 | 481 | .irq_unmask = wakeupgen_unmask, |
| 448 | 482 | .irq_retrigger = irq_chip_retrigger_hierarchy, |
| 449 | − .irq_set_type = irq_chip_set_type_parent, | |
| 483 | + .irq_set_type = wakeupgen_irq_set_type, | |
| 450 | 484 | .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND, |
| 451 | 485 | #ifdef CONFIG_SMP |
| 452 | 486 | .irq_set_affinity = irq_chip_set_affinity_parent, |
| @@ -2390,4 +2390,6 @@ void arch_teardown_dma_ops(struct device *dev) · 2389 unmodified lines | ||
| 2390 | 2390 | return; |
| 2391 | 2391 | |
| 2392 | 2392 | arm_teardown_iommu_dma_ops(dev); |
| 2393 | + /* Let arch_setup_dma_ops() start again from scratch upon re-probe */ | |
| 2394 | + set_dma_ops(dev, NULL); | |
| 2393 | 2395 | } |
| @@ -247,7 +247,7 @@ int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *or · 246 unmodified lines | ||
| 247 | 247 | } |
| 248 | 248 | |
| 249 | 249 | /* Copy arch-dep-instance from template. */ |
| 250 | − memcpy(code, (unsigned char *)optprobe_template_entry, | |
| 250 | + memcpy(code, (unsigned long *)&optprobe_template_entry, | |
| 251 | 251 | TMPL_END_IDX * sizeof(kprobe_opcode_t)); |
| 252 | 252 | |
| 253 | 253 | /* Adjust buffer according to instruction. */ |
| @@ -227,34 +227,34 @@ · 226 unmodified lines | ||
| 227 | 227 | |
| 228 | 228 | pinctrl_usdhc1_100mhz: usdhc1-100grp { |
| 229 | 229 | fsl,pins = < |
| 230 | − MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x85 | |
| 231 | − MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc5 | |
| 232 | − MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc5 | |
| 233 | − MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc5 | |
| 234 | − MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc5 | |
| 235 | − MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc5 | |
| 236 | − MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc5 | |
| 237 | − MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc5 | |
| 238 | − MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc5 | |
| 239 | − MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc5 | |
| 240 | − MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x85 | |
| 230 | + MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d | |
| 231 | + MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd | |
| 232 | + MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd | |
| 233 | + MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd | |
| 234 | + MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd | |
| 235 | + MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd | |
| 236 | + MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd | |
| 237 | + MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd | |
| 238 | + MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd | |
| 239 | + MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd | |
| 240 | + MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x8d | |
| 241 | 241 | MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 |
| 242 | 242 | >; |
| 243 | 243 | }; |
| 244 | 244 | |
| 245 | 245 | pinctrl_usdhc1_200mhz: usdhc1-200grp { |
| 246 | 246 | fsl,pins = < |
| 247 | − MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x87 | |
| 248 | − MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc7 | |
| 249 | − MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc7 | |
| 250 | − MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc7 | |
| 251 | − MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc7 | |
| 252 | − MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc7 | |
| 253 | − MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc7 | |
| 254 | − MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc7 | |
| 255 | − MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc7 | |
| 256 | − MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc7 | |
| 257 | − MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x87 | |
| 247 | + MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f | |
| 248 | + MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf | |
| 249 | + MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf | |
| 250 | + MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf | |
| 251 | + MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf | |
| 252 | + MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf | |
| 253 | + MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf | |
| 254 | + MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf | |
| 255 | + MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf | |
| 256 | + MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf | |
| 257 | + MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x9f | |
| 258 | 258 | MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 |
| 259 | 259 | >; |
| 260 | 260 | }; |
| @@ -360,6 +360,8 @@ · 359 unmodified lines | ||
| 360 | 360 | <&clk IMX8MQ_CLK_NAND_USDHC_BUS>, |
| 361 | 361 | <&clk IMX8MQ_CLK_USDHC1_ROOT>; |
| 362 | 362 | clock-names = "ipg", "ahb", "per"; |
| 363 | + assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>; | |
| 364 | + assigned-clock-rates = <400000000>; | |
| 363 | 365 | fsl,tuning-start-tap = <20>; |
| 364 | 366 | fsl,tuning-step = <2>; |
| 365 | 367 | bus-width = <4>; |
| @@ -40,6 +40,7 @@ · 39 unmodified lines | ||
| 40 | 40 | pinctrl-0 = <&usb30_host_drv>; |
| 41 | 41 | regulator-name = "vcc_host_5v"; |
| 42 | 42 | regulator-always-on; |
| 43 | + regulator-boot-on; | |
| 43 | 44 | vin-supply = <&vcc_sys>; |
| 44 | 45 | }; |
| 45 | 46 | |
| @@ -51,6 +52,7 @@ · 5 unmodified lines | ||
| 51 | 52 | pinctrl-0 = <&usb20_host_drv>; |
| 52 | 53 | regulator-name = "vcc_host1_5v"; |
| 53 | 54 | regulator-always-on; |
| 55 | + regulator-boot-on; | |
| 54 | 56 | vin-supply = <&vcc_sys>; |
| 55 | 57 | }; |
| 56 | 58 | |
| @@ -22,7 +22,7 @@ · 21 unmodified lines | ||
| 22 | 22 | backlight = <&backlight>; |
| 23 | 23 | power-supply = <&pp3300_disp>; |
| 24 | 24 | |
| 25 | − ports { | |
| 25 | + port { | |
| 26 | 26 | panel_in_edp: endpoint { |
| 27 | 27 | remote-endpoint = <&edp_out_panel>; |
| 28 | 28 | }; |
| @@ -43,7 +43,7 @@ · 42 unmodified lines | ||
| 43 | 43 | backlight = <&backlight>; |
| 44 | 44 | power-supply = <&pp3300_disp>; |
| 45 | 45 | |
| 46 | − ports { | |
| 46 | + port { | |
| 47 | 47 | panel_in_edp: endpoint { |
| 48 | 48 | remote-endpoint = <&edp_out_panel>; |
| 49 | 49 | }; |
| @@ -91,7 +91,7 @@ · 90 unmodified lines | ||
| 91 | 91 | pinctrl-0 = <&lcd_panel_reset>; |
| 92 | 92 | power-supply = <&vcc3v3_s0>; |
| 93 | 93 | |
| 94 | − ports { | |
| 94 | + port { | |
| 95 | 95 | panel_in_edp: endpoint { |
| 96 | 96 | remote-endpoint = <&edp_out_panel>; |
| 97 | 97 | }; |
| @@ -48,6 +48,7 @@ · 47 unmodified lines | ||
| 48 | 48 | #define KVM_REQ_SLEEP \ |
| 49 | 49 | KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) |
| 50 | 50 | #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1) |
| 51 | +#define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(2) | |
| 51 | 52 | |
| 52 | 53 | DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use); |
| 53 | 54 | |
| @@ -208,6 +209,13 @@ struct kvm_cpu_context { · 154 unmodified lines | ||
| 208 | 209 | |
| 209 | 210 | typedef struct kvm_cpu_context kvm_cpu_context_t; |
| 210 | 211 | |
| 212 | +struct vcpu_reset_state { | |
| 213 | + unsigned long pc; | |
| 214 | + unsigned long r0; | |
| 215 | + bool be; | |
| 216 | + bool reset; | |
| 217 | +}; | |
| 218 | + | |
| 211 | 219 | struct kvm_vcpu_arch { |
| 212 | 220 | struct kvm_cpu_context ctxt; |
| 213 | 221 | |
| @@ -297,6 +305,9 @@ struct kvm_vcpu_arch { · 83 unmodified lines | ||
| 297 | 305 | /* Virtual SError ESR to restore when HCR_EL2.VSE is set */ |
| 298 | 306 | u64 vsesr_el2; |
| 299 | 307 | |
| 308 | + /* Additional reset state */ | |
| 309 | + struct vcpu_reset_state reset_state; | |
| 310 | + | |
| 300 | 311 | /* True when deferrable sysregs are loaded on the physical CPU, |
| 301 | 312 | * see kvm_vcpu_load_sysregs and kvm_vcpu_put_sysregs. */ |
| 302 | 313 | bool sysregs_loaded_on_cpu; |
| @@ -332,6 +332,17 @@ static inline void *phys_to_virt(phys_addr_t x) · 331 unmodified lines | ||
| 332 | 332 | #define virt_addr_valid(kaddr) \ |
| 333 | 333 | (_virt_addr_is_linear(kaddr) && _virt_addr_valid(kaddr)) |
| 334 | 334 | |
| 335 | +/* | |
| 336 | + * Given that the GIC architecture permits ITS implementations that can only be | |
| 337 | + * configured with a LPI table address once, GICv3 systems with many CPUs may | |
| 338 | + * end up reserving a lot of different regions after a kexec for their LPI | |
| 339 | + * tables (one per CPU), as we are forced to reuse the same memory after kexec | |
| 340 | + * (and thus reserve it persistently with EFI beforehand) | |
| 341 | + */ | |
| 342 | +#if defined(CONFIG_EFI) && defined(CONFIG_ARM_GIC_V3_ITS) | |
| 343 | +# define INIT_MEMBLOCK_RESERVED_REGIONS (INIT_MEMBLOCK_REGIONS + NR_CPUS + 1) | |
| 344 | +#endif | |
| 345 | + | |
| 335 | 346 | #include <asm-generic/memory_model.h> |
| 336 | 347 | |
| 337 | 348 | #endif |
| @@ -313,7 +313,6 @@ void __init setup_arch(char **cmdline_p) · 312 unmodified lines | ||
| 313 | 313 | arm64_memblock_init(); |
| 314 | 314 | |
| 315 | 315 | paging_init(); |
| 316 | − efi_apply_persistent_mem_reservations(); | |
| 317 | 316 | |
| 318 | 317 | acpi_table_upgrade(); |
| 319 | 318 | |
| @@ -23,6 +23,7 @@ · 22 unmodified lines | ||
| 23 | 23 | #include <kvm/arm_psci.h> |
| 24 | 24 | |
| 25 | 25 | #include <asm/cpufeature.h> |
| 26 | +#include <asm/kprobes.h> | |
| 26 | 27 | #include <asm/kvm_asm.h> |
| 27 | 28 | #include <asm/kvm_emulate.h> |
| 28 | 29 | #include <asm/kvm_host.h> |
| @@ -107,6 +108,7 @@ static void activate_traps_vhe(struct kvm_vcpu *vcpu) · 78 unmodified lines | ||
| 107 | 108 | |
| 108 | 109 | write_sysreg(kvm_get_hyp_vector(), vbar_el1); |
| 109 | 110 | } |
| 111 | +NOKPROBE_SYMBOL(activate_traps_vhe); | |
| 110 | 112 | |
| 111 | 113 | static void __hyp_text __activate_traps_nvhe(struct kvm_vcpu *vcpu) |
| 112 | 114 | { |
| @@ -154,6 +156,7 @@ static void deactivate_traps_vhe(void) · 41 unmodified lines | ||
| 154 | 156 | write_sysreg(CPACR_EL1_DEFAULT, cpacr_el1); |
| 155 | 157 | write_sysreg(vectors, vbar_el1); |
| 156 | 158 | } |
| 159 | +NOKPROBE_SYMBOL(deactivate_traps_vhe); | |
| 157 | 160 | |
| 158 | 161 | static void __hyp_text __deactivate_traps_nvhe(void) |
| 159 | 162 | { |
| @@ -513,6 +516,7 @@ int kvm_vcpu_run_vhe(struct kvm_vcpu *vcpu) · 353 unmodified lines | ||
| 513 | 516 | |
| 514 | 517 | return exit_code; |
| 515 | 518 | } |
| 519 | +NOKPROBE_SYMBOL(kvm_vcpu_run_vhe); | |
| 516 | 520 | |
| 517 | 521 | /* Switch to the guest for legacy non-VHE systems */ |
| 518 | 522 | int __hyp_text __kvm_vcpu_run_nvhe(struct kvm_vcpu *vcpu) |
| @@ -620,6 +624,7 @@ static void __hyp_call_panic_vhe(u64 spsr, u64 elr, u64 par, · 101 unmodified lines | ||
| 620 | 624 | read_sysreg_el2(esr), read_sysreg_el2(far), |
| 621 | 625 | read_sysreg(hpfar_el2), par, vcpu); |
| 622 | 626 | } |
| 627 | +NOKPROBE_SYMBOL(__hyp_call_panic_vhe); | |
| 623 | 628 | |
| 624 | 629 | void __hyp_text __noreturn hyp_panic(struct kvm_cpu_context *host_ctxt) |
| 625 | 630 | { |
| @@ -18,6 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | #include <linux/compiler.h> |
| 19 | 19 | #include <linux/kvm_host.h> |
| 20 | 20 | |
| 21 | +#include <asm/kprobes.h> | |
| 21 | 22 | #include <asm/kvm_asm.h> |
| 22 | 23 | #include <asm/kvm_emulate.h> |
| 23 | 24 | #include <asm/kvm_hyp.h> |
| @@ -98,12 +99,14 @@ void sysreg_save_host_state_vhe(struct kvm_cpu_context *ctxt) · 74 unmodified lines | ||
| 98 | 99 | { |
| 99 | 100 | __sysreg_save_common_state(ctxt); |
| 100 | 101 | } |
| 102 | +NOKPROBE_SYMBOL(sysreg_save_host_state_vhe); | |
| 101 | 103 | |
| 102 | 104 | void sysreg_save_guest_state_vhe(struct kvm_cpu_context *ctxt) |
| 103 | 105 | { |
| 104 | 106 | __sysreg_save_common_state(ctxt); |
| 105 | 107 | __sysreg_save_el2_return_state(ctxt); |
| 106 | 108 | } |
| 109 | +NOKPROBE_SYMBOL(sysreg_save_guest_state_vhe); | |
| 107 | 110 | |
| 108 | 111 | static void __hyp_text __sysreg_restore_common_state(struct kvm_cpu_context *ctxt) |
| 109 | 112 | { |
| @@ -188,12 +191,14 @@ void sysreg_restore_host_state_vhe(struct kvm_cpu_context *ctxt) · 78 unmodified lines | ||
| 188 | 191 | { |
| 189 | 192 | __sysreg_restore_common_state(ctxt); |
| 190 | 193 | } |
| 194 | +NOKPROBE_SYMBOL(sysreg_restore_host_state_vhe); | |
| 191 | 195 | |
| 192 | 196 | void sysreg_restore_guest_state_vhe(struct kvm_cpu_context *ctxt) |
| 193 | 197 | { |
| 194 | 198 | __sysreg_restore_common_state(ctxt); |
| 195 | 199 | __sysreg_restore_el2_return_state(ctxt); |
| 196 | 200 | } |
| 201 | +NOKPROBE_SYMBOL(sysreg_restore_guest_state_vhe); | |
| 197 | 202 | |
| 198 | 203 | void __hyp_text __sysreg32_save_state(struct kvm_vcpu *vcpu) |
| 199 | 204 | { |
| @@ -32,6 +32,7 @@ · 31 unmodified lines | ||
| 32 | 32 | #include <asm/kvm_arm.h> |
| 33 | 33 | #include <asm/kvm_asm.h> |
| 34 | 34 | #include <asm/kvm_coproc.h> |
| 35 | +#include <asm/kvm_emulate.h> | |
| 35 | 36 | #include <asm/kvm_mmu.h> |
| 36 | 37 | |
| 37 | 38 | /* Maximum phys_shift supported for any VM on this host */ |
| @@ -105,16 +106,33 @@ int kvm_arch_vm_ioctl_check_extension(struct kvm *kvm, long ext) · 67 unmodified lines | ||
| 105 | 106 | * This function finds the right table above and sets the registers on |
| 106 | 107 | * the virtual CPU struct to their architecturally defined reset |
| 107 | 108 | * values. |
| 109 | + * | |
| 110 | + * Note: This function can be called from two paths: The KVM_ARM_VCPU_INIT | |
| 111 | + * ioctl or as part of handling a request issued by another VCPU in the PSCI | |
| 112 | + * handling code. In the first case, the VCPU will not be loaded, and in the | |
| 113 | + * second case the VCPU will be loaded. Because this function operates purely | |
| 114 | + * on the memory-backed valus of system registers, we want to do a full put if | |
| 115 | + * we were loaded (handling a request) and load the values back at the end of | |
| 116 | + * the function. Otherwise we leave the state alone. In both cases, we | |
| 117 | + * disable preemption around the vcpu reset as we would otherwise race with | |
| 118 | + * preempt notifiers which also call put/load. | |
| 108 | 119 | */ |
| 109 | 120 | int kvm_reset_vcpu(struct kvm_vcpu *vcpu) |
| 110 | 121 | { |
| 111 | 122 | const struct kvm_regs *cpu_reset; |
| 123 | + int ret = -EINVAL; | |
| 124 | + bool loaded; | |
| 125 | + | |
| 126 | + preempt_disable(); | |
| 127 | + loaded = (vcpu->cpu != -1); | |
| 128 | + if (loaded) | |
| 129 | + kvm_arch_vcpu_put(vcpu); | |
| 112 | 130 | |
| 113 | 131 | switch (vcpu->arch.target) { |
| 114 | 132 | default: |
| 115 | 133 | if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features)) { |
| 116 | 134 | if (!cpu_has_32bit_el1()) |
| 117 | − return -EINVAL; | |
| 135 | + goto out; | |
| 118 | 136 | cpu_reset = &default_regs_reset32; |
| 119 | 137 | } else { |
| 120 | 138 | cpu_reset = &default_regs_reset; |
| @@ -129,6 +147,29 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) · 8 unmodified lines | ||
| 129 | 147 | /* Reset system registers */ |
| 130 | 148 | kvm_reset_sys_regs(vcpu); |
| 131 | 149 | |
| 150 | + /* | |
| 151 | + * Additional reset state handling that PSCI may have imposed on us. | |
| 152 | + * Must be done after all the sys_reg reset. | |
| 153 | + */ | |
| 154 | + if (vcpu->arch.reset_state.reset) { | |
| 155 | + unsigned long target_pc = vcpu->arch.reset_state.pc; | |
| 156 | + | |
| 157 | + /* Gracefully handle Thumb2 entry point */ | |
| 158 | + if (vcpu_mode_is_32bit(vcpu) && (target_pc & 1)) { | |
| 159 | + target_pc &= ~1UL; | |
| 160 | + vcpu_set_thumb(vcpu); | |
| 161 | + } | |
| 162 | + | |
| 163 | + /* Propagate caller endianness */ | |
| 164 | + if (vcpu->arch.reset_state.be) | |
| 165 | + kvm_vcpu_set_be(vcpu); | |
| 166 | + | |
| 167 | + *vcpu_pc(vcpu) = target_pc; | |
| 168 | + vcpu_set_reg(vcpu, 0, vcpu->arch.reset_state.r0); | |
| 169 | + | |
| 170 | + vcpu->arch.reset_state.reset = false; | |
| 171 | + } | |
| 172 | + | |
| 132 | 173 | /* Reset PMU */ |
| 133 | 174 | kvm_pmu_vcpu_reset(vcpu); |
| 134 | 175 | |
| @@ -137,7 +178,12 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) · 2 unmodified lines | ||
| 137 | 178 | vcpu->arch.workaround_flags |= VCPU_WORKAROUND_2_FLAG; |
| 138 | 179 | |
| 139 | 180 | /* Reset timer */ |
| 140 | − return kvm_timer_vcpu_reset(vcpu); | |
| 181 | + ret = kvm_timer_vcpu_reset(vcpu); | |
| 182 | +out: | |
| 183 | + if (loaded) | |
| 184 | + kvm_arch_vcpu_load(vcpu, smp_processor_id()); | |
| 185 | + preempt_enable(); | |
| 186 | + return ret; | |
| 141 | 187 | } |
| 142 | 188 | |
| 143 | 189 | void kvm_set_ipa_limit(void) |
| @@ -314,12 +314,29 @@ static bool trap_raz_wi(struct kvm_vcpu *vcpu, · 313 unmodified lines | ||
| 314 | 314 | return read_zero(vcpu, p); |
| 315 | 315 | } |
| 316 | 316 | |
| 317 | −static bool trap_undef(struct kvm_vcpu *vcpu, | |
| 318 | − struct sys_reg_params *p, | |
| 319 | − const struct sys_reg_desc *r) | |
| 317 | +/* | |
| 318 | + * ARMv8.1 mandates at least a trivial LORegion implementation, where all the | |
| 319 | + * RW registers are RES0 (which we can implement as RAZ/WI). On an ARMv8.0 | |
| 320 | + * system, these registers should UNDEF. LORID_EL1 being a RO register, we | |
| 321 | + * treat it separately. | |
| 322 | + */ | |
| 323 | +static bool trap_loregion(struct kvm_vcpu *vcpu, | |
| 324 | + struct sys_reg_params *p, | |
| 325 | + const struct sys_reg_desc *r) | |
| 320 | 326 | { |
| 321 | − kvm_inject_undefined(vcpu); | |
| 322 | − return false; | |
| 327 | + u64 val = read_sanitised_ftr_reg(SYS_ID_AA64MMFR1_EL1); | |
| 328 | + u32 sr = sys_reg((u32)r->Op0, (u32)r->Op1, | |
| 329 | + (u32)r->CRn, (u32)r->CRm, (u32)r->Op2); | |
| 330 | + | |
| 331 | + if (!(val & (0xfUL << ID_AA64MMFR1_LOR_SHIFT))) { | |
| 332 | + kvm_inject_undefined(vcpu); | |
| 333 | + return false; | |
| 334 | + } | |
| 335 | + | |
| 336 | + if (p->is_write && sr == SYS_LORID_EL1) | |
| 337 | + return write_to_read_only(vcpu, p, r); | |
| 338 | + | |
| 339 | + return trap_raz_wi(vcpu, p, r); | |
| 323 | 340 | } |
| 324 | 341 | |
| 325 | 342 | static bool trap_oslsr_el1(struct kvm_vcpu *vcpu, |
| @@ -1048,11 +1065,6 @@ static u64 read_id_reg(struct sys_reg_desc const *r, bool raz) · 722 unmodified lines | ||
| 1048 | 1065 | if (val & ptrauth_mask) |
| 1049 | 1066 | kvm_debug("ptrauth unsupported for guests, suppressing\n"); |
| 1050 | 1067 | val &= ~ptrauth_mask; |
| 1051 | − } else if (id == SYS_ID_AA64MMFR1_EL1) { | |
| 1052 | − if (val & (0xfUL << ID_AA64MMFR1_LOR_SHIFT)) | |
| 1053 | − kvm_debug("LORegions unsupported for guests, suppressing\n"); | |
| 1054 | − | |
| 1055 | − val &= ~(0xfUL << ID_AA64MMFR1_LOR_SHIFT); | |
| 1056 | 1068 | } |
| 1057 | 1069 | |
| 1058 | 1070 | return val; |
| @@ -1338,11 +1350,11 @@ static const struct sys_reg_desc sys_reg_descs[] = { · 279 unmodified lines | ||
| 1338 | 1350 | { SYS_DESC(SYS_MAIR_EL1), access_vm_reg, reset_unknown, MAIR_EL1 }, |
| 1339 | 1351 | { SYS_DESC(SYS_AMAIR_EL1), access_vm_reg, reset_amair_el1, AMAIR_EL1 }, |
| 1340 | 1352 | |
| 1341 | − { SYS_DESC(SYS_LORSA_EL1), trap_undef }, | |
| 1342 | − { SYS_DESC(SYS_LOREA_EL1), trap_undef }, | |
| 1343 | − { SYS_DESC(SYS_LORN_EL1), trap_undef }, | |
| 1344 | − { SYS_DESC(SYS_LORC_EL1), trap_undef }, | |
| 1345 | − { SYS_DESC(SYS_LORID_EL1), trap_undef }, | |
| 1353 | + { SYS_DESC(SYS_LORSA_EL1), trap_loregion }, | |
| 1354 | + { SYS_DESC(SYS_LOREA_EL1), trap_loregion }, | |
| 1355 | + { SYS_DESC(SYS_LORN_EL1), trap_loregion }, | |
| 1356 | + { SYS_DESC(SYS_LORC_EL1), trap_loregion }, | |
| 1357 | + { SYS_DESC(SYS_LORID_EL1), trap_loregion }, | |
| 1346 | 1358 | |
| 1347 | 1359 | { SYS_DESC(SYS_VBAR_EL1), NULL, reset_val, VBAR_EL1, 0 }, |
| 1348 | 1360 | { SYS_DESC(SYS_DISR_EL1), NULL, reset_val, DISR_EL1, 0 }, |
| @@ -2596,7 +2608,9 @@ void kvm_reset_sys_regs(struct kvm_vcpu *vcpu) · 1247 unmodified lines | ||
| 2596 | 2608 | table = get_target_table(vcpu->arch.target, true, &num); |
| 2597 | 2609 | reset_sys_reg_descs(vcpu, table, num); |
| 2598 | 2610 | |
| 2599 | − for (num = 1; num < NR_SYS_REGS; num++) | |
| 2600 | − if (__vcpu_sys_reg(vcpu, num) == 0x4242424242424242) | |
| 2601 | − panic("Didn't reset __vcpu_sys_reg(%zi)", num); | |
| 2611 | + for (num = 1; num < NR_SYS_REGS; num++) { | |
| 2612 | + if (WARN(__vcpu_sys_reg(vcpu, num) == 0x4242424242424242, | |
| 2613 | + "Didn't reset __vcpu_sys_reg(%zi)\n", num)) | |
| 2614 | + break; | |
| 2615 | + } | |
| 2602 | 2616 | } |
| @@ -45,8 +45,8 @@ · 44 unmodified lines | ||
| 45 | 45 | ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset_t(address)) |
| 46 | 46 | #define pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT)) |
| 47 | 47 | #define pte_clear(mm, addr, ptep) set_pte((ptep), \ |
| 48 | − (((unsigned int)addr&0x80000000)?__pte(1):__pte(0))) | |
| 49 | −#define pte_none(pte) (!(pte_val(pte)&0xfffffffe)) | |
| 48 | + (((unsigned int) addr & PAGE_OFFSET) ? __pte(_PAGE_GLOBAL) : __pte(0))) | |
| 49 | +#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL)) | |
| 50 | 50 | #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) |
| 51 | 51 | #define pte_pfn(x) ((unsigned long)((x).pte_low >> PAGE_SHIFT)) |
| 52 | 52 | #define pfn_pte(pfn, prot) __pte(((unsigned long long)(pfn) << PAGE_SHIFT) \ |
| @@ -241,6 +241,11 @@ static inline pte_t pte_mkyoung(pte_t pte) · 188 unmodified lines | ||
| 241 | 241 | |
| 242 | 242 | #define pgd_index(address) ((address) >> PGDIR_SHIFT) |
| 243 | 243 | |
| 244 | +#define __HAVE_PHYS_MEM_ACCESS_PROT | |
| 245 | +struct file; | |
| 246 | +extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, | |
| 247 | + unsigned long size, pgprot_t vma_prot); | |
| 248 | + | |
| 244 | 249 | /* |
| 245 | 250 | * Macro to make mark a page protection value as "uncacheable". Note |
| 246 | 251 | * that "protection" is really a misnomer here as the protection value |
| @@ -49,7 +49,7 @@ struct thread_struct { · 48 unmodified lines | ||
| 49 | 49 | }; |
| 50 | 50 | |
| 51 | 51 | #define INIT_THREAD { \ |
| 52 | − .ksp = (unsigned long) init_thread_union.stack + THREAD_SIZE, \ | |
| 52 | + .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \ | |
| 53 | 53 | .sr = DEFAULT_PSR_VALUE, \ |
| 54 | 54 | } |
| 55 | 55 | |
| @@ -95,7 +95,7 @@ unsigned long get_wchan(struct task_struct *p); · 39 unmodified lines | ||
| 95 | 95 | #define KSTK_ESP(tsk) (task_pt_regs(tsk)->usp) |
| 96 | 96 | |
| 97 | 97 | #define task_pt_regs(p) \ |
| 98 | − ((struct pt_regs *)(THREAD_SIZE + p->stack) - 1) | |
| 98 | + ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1) | |
| 99 | 99 | |
| 100 | 100 | #define cpu_relax() barrier() |
| 101 | 101 | |
| @@ -38,7 +38,11 @@ void show_stack(struct task_struct *task, unsigned long *stack) · 37 unmodified lines | ||
| 38 | 38 | if (task) |
| 39 | 39 | stack = (unsigned long *)thread_saved_fp(task); |
| 40 | 40 | else |
| 41 | +#ifdef CONFIG_STACKTRACE | |
| 42 | + asm volatile("mov %0, r8\n":"=r"(stack)::"memory"); | |
| 43 | +#else | |
| 41 | 44 | stack = (unsigned long *)&stack; |
| 45 | +#endif | |
| 42 | 46 | } |
| 43 | 47 | |
| 44 | 48 | show_trace(stack); |
| @@ -8,6 +8,7 @@ · 7 unmodified lines | ||
| 8 | 8 | #include <linux/ptrace.h> |
| 9 | 9 | #include <linux/regset.h> |
| 10 | 10 | #include <linux/sched.h> |
| 11 | +#include <linux/sched/task_stack.h> | |
| 11 | 12 | #include <linux/signal.h> |
| 12 | 13 | #include <linux/smp.h> |
| 13 | 14 | #include <linux/uaccess.h> |
| @@ -159,7 +160,7 @@ static int fpr_set(struct task_struct *target, · 145 unmodified lines | ||
| 159 | 160 | static const struct user_regset csky_regsets[] = { |
| 160 | 161 | [REGSET_GPR] = { |
| 161 | 162 | .core_note_type = NT_PRSTATUS, |
| 162 | − .n = ELF_NGREG, | |
| 163 | + .n = sizeof(struct pt_regs) / sizeof(u32), | |
| 163 | 164 | .size = sizeof(u32), |
| 164 | 165 | .align = sizeof(u32), |
| 165 | 166 | .get = &gpr_get, |
| @@ -160,7 +160,8 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle) · 159 unmodified lines | ||
| 160 | 160 | { |
| 161 | 161 | unsigned long mask = 1 << cpu; |
| 162 | 162 | |
| 163 | − secondary_stack = (unsigned int)tidle->stack + THREAD_SIZE - 8; | |
| 163 | + secondary_stack = | |
| 164 | + (unsigned int) task_stack_page(tidle) + THREAD_SIZE - 8; | |
| 164 | 165 | secondary_hint = mfcr("cr31"); |
| 165 | 166 | secondary_ccr = mfcr("cr18"); |
| 166 | 167 | |
| @@ -46,3 +46,17 @@ void iounmap(void __iomem *addr) · 45 unmodified lines | ||
| 46 | 46 | vunmap((void *)((unsigned long)addr & PAGE_MASK)); |
| 47 | 47 | } |
| 48 | 48 | EXPORT_SYMBOL(iounmap); |
| 49 | + | |
| 50 | +pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, | |
| 51 | + unsigned long size, pgprot_t vma_prot) | |
| 52 | +{ | |
| 53 | + if (!pfn_valid(pfn)) { | |
| 54 | + vma_prot.pgprot |= _PAGE_SO; | |
| 55 | + return pgprot_noncached(vma_prot); | |
| 56 | + } else if (file->f_flags & O_SYNC) { | |
| 57 | + return pgprot_noncached(vma_prot); | |
| 58 | + } | |
| 59 | + | |
| 60 | + return vma_prot; | |
| 61 | +} | |
| 62 | +EXPORT_SYMBOL(phys_mem_access_prot); | |
| @@ -79,8 +79,6 @@ enum reg_val_type { · 78 unmodified lines | ||
| 79 | 79 | REG_64BIT_32BIT, |
| 80 | 80 | /* 32-bit compatible, need truncation for 64-bit ops. */ |
| 81 | 81 | REG_32BIT, |
| 82 | − /* 32-bit zero extended. */ | |
| 83 | − REG_32BIT_ZERO_EX, | |
| 84 | 82 | /* 32-bit no sign/zero extension needed. */ |
| 85 | 83 | REG_32BIT_POS |
| 86 | 84 | }; |
| @@ -343,12 +341,15 @@ static int build_int_epilogue(struct jit_ctx *ctx, int dest_reg) · 256 unmodified lines | ||
| 343 | 341 | const struct bpf_prog *prog = ctx->skf; |
| 344 | 342 | int stack_adjust = ctx->stack_size; |
| 345 | 343 | int store_offset = stack_adjust - 8; |
| 344 | + enum reg_val_type td; | |
| 346 | 345 | int r0 = MIPS_R_V0; |
| 347 | 346 | |
| 348 | − if (dest_reg == MIPS_R_RA && | |
| 349 | − get_reg_val_type(ctx, prog->len, BPF_REG_0) == REG_32BIT_ZERO_EX) | |
| 347 | + if (dest_reg == MIPS_R_RA) { | |
| 350 | 348 | /* Don't let zero extended value escape. */ |
| 351 | − emit_instr(ctx, sll, r0, r0, 0); | |
| 349 | + td = get_reg_val_type(ctx, prog->len, BPF_REG_0); | |
| 350 | + if (td == REG_64BIT) | |
| 351 | + emit_instr(ctx, sll, r0, r0, 0); | |
| 352 | + } | |
| 352 | 353 | |
| 353 | 354 | if (ctx->flags & EBPF_SAVE_RA) { |
| 354 | 355 | emit_instr(ctx, ld, MIPS_R_RA, store_offset, MIPS_R_SP); |
| @@ -692,7 +693,7 @@ static int build_one_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, · 337 unmodified lines | ||
| 692 | 693 | if (dst < 0) |
| 693 | 694 | return dst; |
| 694 | 695 | td = get_reg_val_type(ctx, this_idx, insn->dst_reg); |
| 695 | − if (td == REG_64BIT || td == REG_32BIT_ZERO_EX) { | |
| 696 | + if (td == REG_64BIT) { | |
| 696 | 697 | /* sign extend */ |
| 697 | 698 | emit_instr(ctx, sll, dst, dst, 0); |
| 698 | 699 | } |
| @@ -707,7 +708,7 @@ static int build_one_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, · 8 unmodified lines | ||
| 707 | 708 | if (dst < 0) |
| 708 | 709 | return dst; |
| 709 | 710 | td = get_reg_val_type(ctx, this_idx, insn->dst_reg); |
| 710 | − if (td == REG_64BIT || td == REG_32BIT_ZERO_EX) { | |
| 711 | + if (td == REG_64BIT) { | |
| 711 | 712 | /* sign extend */ |
| 712 | 713 | emit_instr(ctx, sll, dst, dst, 0); |
| 713 | 714 | } |
| @@ -721,7 +722,7 @@ static int build_one_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, · 7 unmodified lines | ||
| 721 | 722 | if (dst < 0) |
| 722 | 723 | return dst; |
| 723 | 724 | td = get_reg_val_type(ctx, this_idx, insn->dst_reg); |
| 724 | − if (td == REG_64BIT || td == REG_32BIT_ZERO_EX) | |
| 725 | + if (td == REG_64BIT) | |
| 725 | 726 | /* sign extend */ |
| 726 | 727 | emit_instr(ctx, sll, dst, dst, 0); |
| 727 | 728 | if (insn->imm == 1) { |
| @@ -860,13 +861,13 @@ static int build_one_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, · 132 unmodified lines | ||
| 860 | 861 | if (src < 0 || dst < 0) |
| 861 | 862 | return -EINVAL; |
| 862 | 863 | td = get_reg_val_type(ctx, this_idx, insn->dst_reg); |
| 863 | − if (td == REG_64BIT || td == REG_32BIT_ZERO_EX) { | |
| 864 | + if (td == REG_64BIT) { | |
| 864 | 865 | /* sign extend */ |
| 865 | 866 | emit_instr(ctx, sll, dst, dst, 0); |
| 866 | 867 | } |
| 867 | 868 | did_move = false; |
| 868 | 869 | ts = get_reg_val_type(ctx, this_idx, insn->src_reg); |
| 869 | − if (ts == REG_64BIT || ts == REG_32BIT_ZERO_EX) { | |
| 870 | + if (ts == REG_64BIT) { | |
| 870 | 871 | int tmp_reg = MIPS_R_AT; |
| 871 | 872 | |
| 872 | 873 | if (bpf_op == BPF_MOV) { |
| @@ -1254,8 +1255,7 @@ jeq_common: · 381 unmodified lines | ||
| 1254 | 1255 | if (insn->imm == 64 && td == REG_32BIT) |
| 1255 | 1256 | emit_instr(ctx, dinsu, dst, MIPS_R_ZERO, 32, 32); |
| 1256 | 1257 | |
| 1257 | − if (insn->imm != 64 && | |
| 1258 | − (td == REG_64BIT || td == REG_32BIT_ZERO_EX)) { | |
| 1258 | + if (insn->imm != 64 && td == REG_64BIT) { | |
| 1259 | 1259 | /* sign extend */ |
| 1260 | 1260 | emit_instr(ctx, sll, dst, dst, 0); |
| 1261 | 1261 | } |
| @@ -904,7 +904,7 @@ static inline int pud_none(pud_t pud) · 903 unmodified lines | ||
| 904 | 904 | |
| 905 | 905 | static inline int pud_present(pud_t pud) |
| 906 | 906 | { |
| 907 | − return (pud_raw(pud) & cpu_to_be64(_PAGE_PRESENT)); | |
| 907 | + return !!(pud_raw(pud) & cpu_to_be64(_PAGE_PRESENT)); | |
| 908 | 908 | } |
| 909 | 909 | |
| 910 | 910 | extern struct page *pud_page(pud_t pud); |
| @@ -951,7 +951,7 @@ static inline int pgd_none(pgd_t pgd) · 40 unmodified lines | ||
| 951 | 951 | |
| 952 | 952 | static inline int pgd_present(pgd_t pgd) |
| 953 | 953 | { |
| 954 | − return (pgd_raw(pgd) & cpu_to_be64(_PAGE_PRESENT)); | |
| 954 | + return !!(pgd_raw(pgd) & cpu_to_be64(_PAGE_PRESENT)); | |
| 955 | 955 | } |
| 956 | 956 | |
| 957 | 957 | static inline pte_t pgd_pte(pgd_t pgd) |
| @@ -2278,6 +2278,19 @@ void perf_check_microcode(void) · 2277 unmodified lines | ||
| 2278 | 2278 | x86_pmu.check_microcode(); |
| 2279 | 2279 | } |
| 2280 | 2280 | |
| 2281 | +static int x86_pmu_check_period(struct perf_event *event, u64 value) | |
| 2282 | +{ | |
| 2283 | + if (x86_pmu.check_period && x86_pmu.check_period(event, value)) | |
| 2284 | + return -EINVAL; | |
| 2285 | + | |
| 2286 | + if (value && x86_pmu.limit_period) { | |
| 2287 | + if (x86_pmu.limit_period(event, value) > value) | |
| 2288 | + return -EINVAL; | |
| 2289 | + } | |
| 2290 | + | |
| 2291 | + return 0; | |
| 2292 | +} | |
| 2293 | + | |
| 2281 | 2294 | static struct pmu pmu = { |
| 2282 | 2295 | .pmu_enable = x86_pmu_enable, |
| 2283 | 2296 | .pmu_disable = x86_pmu_disable, |
| @@ -2302,6 +2315,7 @@ static struct pmu pmu = { · 18 unmodified lines | ||
| 2302 | 2315 | .event_idx = x86_pmu_event_idx, |
| 2303 | 2316 | .sched_task = x86_pmu_sched_task, |
| 2304 | 2317 | .task_ctx_size = sizeof(struct x86_perf_task_context), |
| 2318 | + .check_period = x86_pmu_check_period, | |
| 2305 | 2319 | }; |
| 2306 | 2320 | |
| 2307 | 2321 | void arch_perf_update_userpage(struct perf_event *event, |
| @@ -3587,6 +3587,11 @@ static void intel_pmu_sched_task(struct perf_event_context *ctx, · 3586 unmodified lines | ||
| 3587 | 3587 | intel_pmu_lbr_sched_task(ctx, sched_in); |
| 3588 | 3588 | } |
| 3589 | 3589 | |
| 3590 | +static int intel_pmu_check_period(struct perf_event *event, u64 value) | |
| 3591 | +{ | |
| 3592 | + return intel_pmu_has_bts_period(event, value) ? -EINVAL : 0; | |
| 3593 | +} | |
| 3594 | + | |
| 3590 | 3595 | PMU_FORMAT_ATTR(offcore_rsp, "config1:0-63"); |
| 3591 | 3596 | |
| 3592 | 3597 | PMU_FORMAT_ATTR(ldlat, "config1:0-15"); |
| @@ -3667,6 +3672,8 @@ static __initconst const struct x86_pmu core_pmu = { · 74 unmodified lines | ||
| 3667 | 3672 | .cpu_starting = intel_pmu_cpu_starting, |
| 3668 | 3673 | .cpu_dying = intel_pmu_cpu_dying, |
| 3669 | 3674 | .cpu_dead = intel_pmu_cpu_dead, |
| 3675 | + | |
| 3676 | + .check_period = intel_pmu_check_period, | |
| 3670 | 3677 | }; |
| 3671 | 3678 | |
| 3672 | 3679 | static struct attribute *intel_pmu_attrs[]; |
| @@ -3711,6 +3718,8 @@ static __initconst const struct x86_pmu intel_pmu = { · 38 unmodified lines | ||
| 3711 | 3718 | |
| 3712 | 3719 | .guest_get_msrs = intel_guest_get_msrs, |
| 3713 | 3720 | .sched_task = intel_pmu_sched_task, |
| 3721 | + | |
| 3722 | + .check_period = intel_pmu_check_period, | |
| 3714 | 3723 | }; |
| 3715 | 3724 | |
| 3716 | 3725 | static __init void intel_clovertown_quirk(void) |
| @@ -646,6 +646,11 @@ struct x86_pmu { · 645 unmodified lines | ||
| 646 | 646 | * Intel host/guest support (KVM) |
| 647 | 647 | */ |
| 648 | 648 | struct perf_guest_switch_msr *(*guest_get_msrs)(int *nr); |
| 649 | + | |
| 650 | + /* | |
| 651 | + * Check period value for PERF_EVENT_IOC_PERIOD ioctl. | |
| 652 | + */ | |
| 653 | + int (*check_period) (struct perf_event *event, u64 period); | |
| 649 | 654 | }; |
| 650 | 655 | |
| 651 | 656 | struct x86_perf_task_context { |
| @@ -857,7 +862,7 @@ static inline int amd_pmu_init(void) · 205 unmodified lines | ||
| 857 | 862 | |
| 858 | 863 | #ifdef CONFIG_CPU_SUP_INTEL |
| 859 | 864 | |
| 860 | −static inline bool intel_pmu_has_bts(struct perf_event *event) | |
| 865 | +static inline bool intel_pmu_has_bts_period(struct perf_event *event, u64 period) | |
| 861 | 866 | { |
| 862 | 867 | struct hw_perf_event *hwc = &event->hw; |
| 863 | 868 | unsigned int hw_event, bts_event; |
| @@ -868,7 +873,14 @@ static inline bool intel_pmu_has_bts(struct perf_event *event) · 4 unmodified lines | ||
| 868 | 873 | hw_event = hwc->config & INTEL_ARCH_EVENT_MASK; |
| 869 | 874 | bts_event = x86_pmu.event_map(PERF_COUNT_HW_BRANCH_INSTRUCTIONS); |
| 870 | 875 | |
| 871 | − return hw_event == bts_event && hwc->sample_period == 1; | |
| 876 | + return hw_event == bts_event && period == 1; | |
| 877 | +} | |
| 878 | + | |
| 879 | +static inline bool intel_pmu_has_bts(struct perf_event *event) | |
| 880 | +{ | |
| 881 | + struct hw_perf_event *hwc = &event->hw; | |
| 882 | + | |
| 883 | + return intel_pmu_has_bts_period(event, hwc->sample_period); | |
| 872 | 884 | } |
| 873 | 885 | |
| 874 | 886 | int intel_pmu_save_and_restart(struct perf_event *event); |
| @@ -51,7 +51,7 @@ static unsigned long get_dr(int n) · 50 unmodified lines | ||
| 51 | 51 | /* |
| 52 | 52 | * fill in the user structure for a core dump.. |
| 53 | 53 | */ |
| 54 | −static void dump_thread32(struct pt_regs *regs, struct user32 *dump) | |
| 54 | +static void fill_dump(struct pt_regs *regs, struct user32 *dump) | |
| 55 | 55 | { |
| 56 | 56 | u32 fs, gs; |
| 57 | 57 | memset(dump, 0, sizeof(*dump)); |
| @@ -157,10 +157,12 @@ static int aout_core_dump(struct coredump_params *cprm) · 99 unmodified lines | ||
| 157 | 157 | fs = get_fs(); |
| 158 | 158 | set_fs(KERNEL_DS); |
| 159 | 159 | has_dumped = 1; |
| 160 | + | |
| 161 | + fill_dump(cprm->regs, &dump); | |
| 162 | + | |
| 160 | 163 | strncpy(dump.u_comm, current->comm, sizeof(current->comm)); |
| 161 | 164 | dump.u_ar0 = offsetof(struct user32, regs); |
| 162 | 165 | dump.signal = cprm->siginfo->si_signo; |
| 163 | − dump_thread32(cprm->regs, &dump); | |
| 164 | 166 | |
| 165 | 167 | /* |
| 166 | 168 | * If the size of the dump file exceeds the rlimit, then see |
| @@ -52,6 +52,8 @@ · 51 unmodified lines | ||
| 52 | 52 | |
| 53 | 53 | #define INTEL_FAM6_CANNONLAKE_MOBILE 0x66 |
| 54 | 54 | |
| 55 | +#define INTEL_FAM6_ICELAKE_MOBILE 0x7E | |
| 56 | + | |
| 55 | 57 | /* "Small Core" Processors (Atom) */ |
| 56 | 58 | |
| 57 | 59 | #define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */ |
| @@ -48,7 +48,8 @@ enum { · 47 unmodified lines | ||
| 48 | 48 | BIOS_STATUS_SUCCESS = 0, |
| 49 | 49 | BIOS_STATUS_UNIMPLEMENTED = -ENOSYS, |
| 50 | 50 | BIOS_STATUS_EINVAL = -EINVAL, |
| 51 | − BIOS_STATUS_UNAVAIL = -EBUSY | |
| 51 | + BIOS_STATUS_UNAVAIL = -EBUSY, | |
| 52 | + BIOS_STATUS_ABORT = -EINTR, | |
| 52 | 53 | }; |
| 53 | 54 | |
| 54 | 55 | /* Address map parameters */ |
| @@ -167,4 +168,9 @@ extern long system_serial_number; · 112 unmodified lines | ||
| 167 | 168 | |
| 168 | 169 | extern struct kobject *sgi_uv_kobj; /* /sys/firmware/sgi_uv */ |
| 169 | 170 | |
| 171 | +/* | |
| 172 | + * EFI runtime lock; cf. firmware/efi/runtime-wrappers.c for details | |
| 173 | + */ | |
| 174 | +extern struct semaphore __efi_uv_runtime_lock; | |
| 175 | + | |
| 170 | 176 | #endif /* _ASM_X86_UV_BIOS_H */ |
| @@ -2473,6 +2473,10 @@ static int nested_check_vm_execution_controls(struct kvm_vcpu *vcpu, · 2472 unmodified lines | ||
| 2473 | 2473 | (nested_cpu_has_vpid(vmcs12) && !vmcs12->virtual_processor_id)) |
| 2474 | 2474 | return -EINVAL; |
| 2475 | 2475 | |
| 2476 | + if (!nested_cpu_has_preemption_timer(vmcs12) && | |
| 2477 | + nested_cpu_has_save_preemption_timer(vmcs12)) | |
| 2478 | + return -EINVAL; | |
| 2479 | + | |
| 2476 | 2480 | if (nested_cpu_has_ept(vmcs12) && |
| 2477 | 2481 | !valid_ept_address(vcpu, vmcs12->ept_pointer)) |
| 2478 | 2482 | return -EINVAL; |
| @@ -5557,9 +5561,11 @@ void nested_vmx_setup_ctls_msrs(struct nested_vmx_msrs *msrs, u32 ept_caps, · 3078 unmodified lines | ||
| 5557 | 5561 | * secondary cpu-based controls. Do not include those that |
| 5558 | 5562 | * depend on CPUID bits, they are added later by vmx_cpuid_update. |
| 5559 | 5563 | */ |
| 5560 | − rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2, | |
| 5561 | − msrs->secondary_ctls_low, | |
| 5562 | − msrs->secondary_ctls_high); | |
| 5564 | + if (msrs->procbased_ctls_high & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS) | |
| 5565 | + rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2, | |
| 5566 | + msrs->secondary_ctls_low, | |
| 5567 | + msrs->secondary_ctls_high); | |
| 5568 | + | |
| 5563 | 5569 | msrs->secondary_ctls_low = 0; |
| 5564 | 5570 | msrs->secondary_ctls_high &= |
| 5565 | 5571 | SECONDARY_EXEC_DESC | |
| @@ -863,7 +863,8 @@ static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr, · 862 unmodified lines | ||
| 863 | 863 | if (!entry_only) |
| 864 | 864 | j = find_msr(&m->host, msr); |
| 865 | 865 | |
| 866 | − if (i == NR_AUTOLOAD_MSRS || j == NR_AUTOLOAD_MSRS) { | |
| 866 | + if ((i < 0 && m->guest.nr == NR_AUTOLOAD_MSRS) || | |
| 867 | + (j < 0 && m->host.nr == NR_AUTOLOAD_MSRS)) { | |
| 867 | 868 | printk_once(KERN_WARNING "Not enough msr switch entries. " |
| 868 | 869 | "Can't add msr %x\n", msr); |
| 869 | 870 | return; |
| @@ -1193,21 +1194,6 @@ static void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu) · 323 unmodified lines | ||
| 1193 | 1194 | if (!pi_test_sn(pi_desc) && vcpu->cpu == cpu) |
| 1194 | 1195 | return; |
| 1195 | 1196 | |
| 1196 | − /* | |
| 1197 | − * First handle the simple case where no cmpxchg is necessary; just | |
| 1198 | − * allow posting non-urgent interrupts. | |
| 1199 | − * | |
| 1200 | − * If the 'nv' field is POSTED_INTR_WAKEUP_VECTOR, do not change | |
| 1201 | − * PI.NDST: pi_post_block will do it for us and the wakeup_handler | |
| 1202 | − * expects the VCPU to be on the blocked_vcpu_list that matches | |
| 1203 | − * PI.NDST. | |
| 1204 | − */ | |
| 1205 | − if (pi_desc->nv == POSTED_INTR_WAKEUP_VECTOR || | |
| 1206 | − vcpu->cpu == cpu) { | |
| 1207 | − pi_clear_sn(pi_desc); | |
| 1208 | − return; | |
| 1209 | − } | |
| 1210 | − | |
| 1211 | 1197 | /* The full case. */ |
| 1212 | 1198 | do { |
| 1213 | 1199 | old.control = new.control = pi_desc->control; |
| @@ -1222,6 +1208,17 @@ static void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu) · 8 unmodified lines | ||
| 1222 | 1208 | new.sn = 0; |
| 1223 | 1209 | } while (cmpxchg64(&pi_desc->control, old.control, |
| 1224 | 1210 | new.control) != old.control); |
| 1211 | + | |
| 1212 | + /* | |
| 1213 | + * Clear SN before reading the bitmap. The VT-d firmware | |
| 1214 | + * writes the bitmap and reads SN atomically (5.2.3 in the | |
| 1215 | + * spec), so it doesn't really have a memory barrier that | |
| 1216 | + * pairs with this, but we cannot do that and we need one. | |
| 1217 | + */ | |
| 1218 | + smp_mb__after_atomic(); | |
| 1219 | + | |
| 1220 | + if (!bitmap_empty((unsigned long *)pi_desc->pir, NR_VECTORS)) | |
| 1221 | + pi_set_on(pi_desc); | |
| 1225 | 1222 | } |
| 1226 | 1223 | |
| 1227 | 1224 | /* |
| @@ -337,16 +337,16 @@ static inline int pi_test_and_set_pir(int vector, struct pi_desc *pi_desc) · 336 unmodified lines | ||
| 337 | 337 | return test_and_set_bit(vector, (unsigned long *)pi_desc->pir); |
| 338 | 338 | } |
| 339 | 339 | |
| 340 | −static inline void pi_clear_sn(struct pi_desc *pi_desc) | |
| 340 | +static inline void pi_set_sn(struct pi_desc *pi_desc) | |
| 341 | 341 | { |
| 342 | − return clear_bit(POSTED_INTR_SN, | |
| 342 | + return set_bit(POSTED_INTR_SN, | |
| 343 | 343 | (unsigned long *)&pi_desc->control); |
| 344 | 344 | } |
| 345 | 345 | |
| 346 | −static inline void pi_set_sn(struct pi_desc *pi_desc) | |
| 346 | +static inline void pi_set_on(struct pi_desc *pi_desc) | |
| 347 | 347 | { |
| 348 | − return set_bit(POSTED_INTR_SN, | |
| 349 | − (unsigned long *)&pi_desc->control); | |
| 348 | + set_bit(POSTED_INTR_ON, | |
| 349 | + (unsigned long *)&pi_desc->control); | |
| 350 | 350 | } |
| 351 | 351 | |
| 352 | 352 | static inline void pi_clear_on(struct pi_desc *pi_desc) |
| @@ -7801,7 +7801,7 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) · 7800 unmodified lines | ||
| 7801 | 7801 | * 1) We should set ->mode before checking ->requests. Please see |
| 7802 | 7802 | * the comment in kvm_vcpu_exiting_guest_mode(). |
| 7803 | 7803 | * |
| 7804 | − * 2) For APICv, we should set ->mode before checking PIR.ON. This | |
| 7804 | + * 2) For APICv, we should set ->mode before checking PID.ON. This | |
| 7805 | 7805 | * pairs with the memory barrier implicit in pi_test_and_set_on |
| 7806 | 7806 | * (see vmx_deliver_posted_interrupt). |
| 7807 | 7807 | * |
| @@ -29,7 +29,8 @@ · 28 unmodified lines | ||
| 29 | 29 | |
| 30 | 30 | struct uv_systab *uv_systab; |
| 31 | 31 | |
| 32 | −s64 uv_bios_call(enum uv_bios_cmd which, u64 a1, u64 a2, u64 a3, u64 a4, u64 a5) | |
| 32 | +static s64 __uv_bios_call(enum uv_bios_cmd which, u64 a1, u64 a2, u64 a3, | |
| 33 | + u64 a4, u64 a5) | |
| 33 | 34 | { |
| 34 | 35 | struct uv_systab *tab = uv_systab; |
| 35 | 36 | s64 ret; |
| @@ -51,6 +52,19 @@ s64 uv_bios_call(enum uv_bios_cmd which, u64 a1, u64 a2, u64 a3, u64 a4, u64 a5) · 15 unmodified lines | ||
| 51 | 52 | |
| 52 | 53 | return ret; |
| 53 | 54 | } |
| 55 | + | |
| 56 | +s64 uv_bios_call(enum uv_bios_cmd which, u64 a1, u64 a2, u64 a3, u64 a4, u64 a5) | |
| 57 | +{ | |
| 58 | + s64 ret; | |
| 59 | + | |
| 60 | + if (down_interruptible(&__efi_uv_runtime_lock)) | |
| 61 | + return BIOS_STATUS_ABORT; | |
| 62 | + | |
| 63 | + ret = __uv_bios_call(which, a1, a2, a3, a4, a5); | |
| 64 | + up(&__efi_uv_runtime_lock); | |
| 65 | + | |
| 66 | + return ret; | |
| 67 | +} | |
| 54 | 68 | EXPORT_SYMBOL_GPL(uv_bios_call); |
| 55 | 69 | |
| 56 | 70 | s64 uv_bios_call_irqsave(enum uv_bios_cmd which, u64 a1, u64 a2, u64 a3, |
| @@ -59,10 +73,15 @@ s64 uv_bios_call_irqsave(enum uv_bios_cmd which, u64 a1, u64 a2, u64 a3, · 2 unmodified lines | ||
| 59 | 73 | unsigned long bios_flags; |
| 60 | 74 | s64 ret; |
| 61 | 75 | |
| 76 | + if (down_interruptible(&__efi_uv_runtime_lock)) | |
| 77 | + return BIOS_STATUS_ABORT; | |
| 78 | + | |
| 62 | 79 | local_irq_save(bios_flags); |
| 63 | − ret = uv_bios_call(which, a1, a2, a3, a4, a5); | |
| 80 | + ret = __uv_bios_call(which, a1, a2, a3, a4, a5); | |
| 64 | 81 | local_irq_restore(bios_flags); |
| 65 | 82 | |
| 83 | + up(&__efi_uv_runtime_lock); | |
| 84 | + | |
| 66 | 85 | return ret; |
| 67 | 86 | } |
| 68 | 87 | |
| @@ -122,8 +122,10 @@ static void alg_do_release(const struct af_alg_type *type, void *private) · 121 unmodified lines | ||
| 122 | 122 | |
| 123 | 123 | int af_alg_release(struct socket *sock) |
| 124 | 124 | { |
| 125 | − if (sock->sk) | |
| 125 | + if (sock->sk) { | |
| 126 | 126 | sock_put(sock->sk); |
| 127 | + sock->sk = NULL; | |
| 128 | + } | |
| 127 | 129 | return 0; |
| 128 | 130 | } |
| 129 | 131 | EXPORT_SYMBOL_GPL(af_alg_release); |
| @@ -509,7 +509,7 @@ static int ht16k33_remove(struct i2c_client *client) · 508 unmodified lines | ||
| 509 | 509 | struct ht16k33_priv *priv = i2c_get_clientdata(client); |
| 510 | 510 | struct ht16k33_fbdev *fbdev = &priv->fbdev; |
| 511 | 511 | |
| 512 | − cancel_delayed_work(&fbdev->work); | |
| 512 | + cancel_delayed_work_sync(&fbdev->work); | |
| 513 | 513 | unregister_framebuffer(fbdev->info); |
| 514 | 514 | framebuffer_release(fbdev->info); |
| 515 | 515 | free_page((unsigned long) fbdev->buffer); |
| @@ -781,12 +781,12 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = { · 780 unmodified lines | ||
| 781 | 781 | SYSC_QUIRK("smartreflex", 0, -1, 0x38, -1, 0x00000000, 0xffffffff, |
| 782 | 782 | SYSC_QUIRK_LEGACY_IDLE), |
| 783 | 783 | SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff, |
| 784 | − SYSC_QUIRK_LEGACY_IDLE), | |
| 784 | + 0), | |
| 785 | 785 | /* Some timers on omap4 and later */ |
| 786 | 786 | SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x50002100, 0xffffffff, |
| 787 | − SYSC_QUIRK_LEGACY_IDLE), | |
| 787 | + 0), | |
| 788 | 788 | SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x4fff1301, 0xffff00ff, |
| 789 | − SYSC_QUIRK_LEGACY_IDLE), | |
| 789 | + 0), | |
| 790 | 790 | SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff, |
| 791 | 791 | SYSC_QUIRK_LEGACY_IDLE), |
| 792 | 792 | /* Uarts on omap4 and later */ |
| @@ -154,6 +154,10 @@ static int omap_dm_timer_of_set_source(struct omap_dm_timer *timer) · 153 unmodified lines | ||
| 154 | 154 | if (IS_ERR(parent)) |
| 155 | 155 | return -ENODEV; |
| 156 | 156 | |
| 157 | + /* Bail out if both clocks point to fck */ | |
| 158 | + if (clk_is_match(parent, timer->fclk)) | |
| 159 | + return 0; | |
| 160 | + | |
| 157 | 161 | ret = clk_set_parent(timer->fclk, parent); |
| 158 | 162 | if (ret < 0) |
| 159 | 163 | pr_err("%s: failed to set parent\n", __func__); |
| @@ -864,7 +868,6 @@ static int omap_dm_timer_probe(struct platform_device *pdev) · 704 unmodified lines | ||
| 864 | 868 | timer->pdev = pdev; |
| 865 | 869 | |
| 866 | 870 | pm_runtime_enable(dev); |
| 867 | − pm_runtime_irq_safe(dev); | |
| 868 | 871 | |
| 869 | 872 | if (!timer->reserved) { |
| 870 | 873 | ret = pm_runtime_get_sync(dev); |
| @@ -592,11 +592,7 @@ int __init efi_config_parse_tables(void *config_tables, int count, int sz, · 591 unmodified lines | ||
| 592 | 592 | |
| 593 | 593 | early_memunmap(tbl, sizeof(*tbl)); |
| 594 | 594 | } |
| 595 | − return 0; | |
| 596 | −} | |
| 597 | 595 | |
| 598 | −int __init efi_apply_persistent_mem_reservations(void) | |
| 599 | −{ | |
| 600 | 596 | if (efi.mem_reserve != EFI_INVALID_TABLE_ADDR) { |
| 601 | 597 | unsigned long prsv = efi.mem_reserve; |
| 602 | 598 | |
| @@ -75,9 +75,6 @@ void install_memreserve_table(efi_system_table_t *sys_table_arg) · 74 unmodified lines | ||
| 75 | 75 | efi_guid_t memreserve_table_guid = LINUX_EFI_MEMRESERVE_TABLE_GUID; |
| 76 | 76 | efi_status_t status; |
| 77 | 77 | |
| 78 | − if (IS_ENABLED(CONFIG_ARM)) | |
| 79 | − return; | |
| 80 | − | |
| 81 | 78 | status = efi_call_early(allocate_pool, EFI_LOADER_DATA, sizeof(*rsv), |
| 82 | 79 | (void **)&rsv); |
| 83 | 80 | if (status != EFI_SUCCESS) { |
| @@ -146,6 +146,13 @@ void efi_call_virt_check_flags(unsigned long flags, const char *call) · 145 unmodified lines | ||
| 146 | 146 | */ |
| 147 | 147 | static DEFINE_SEMAPHORE(efi_runtime_lock); |
| 148 | 148 | |
| 149 | +/* | |
| 150 | + * Expose the EFI runtime lock to the UV platform | |
| 151 | + */ | |
| 152 | +#ifdef CONFIG_X86_UV | |
| 153 | +extern struct semaphore __efi_uv_runtime_lock __alias(efi_runtime_lock); | |
| 154 | +#endif | |
| 155 | + | |
| 149 | 156 | /* |
| 150 | 157 | * Calls the appropriate efi_runtime_service() with the appropriate |
| 151 | 158 | * arguments. |
| @@ -183,6 +183,15 @@ static void bcm2835_i2c_start_transfer(struct bcm2835_i2c_dev *i2c_dev) · 182 unmodified lines | ||
| 183 | 183 | bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c); |
| 184 | 184 | } |
| 185 | 185 | |
| 186 | +static void bcm2835_i2c_finish_transfer(struct bcm2835_i2c_dev *i2c_dev) | |
| 187 | +{ | |
| 188 | + i2c_dev->curr_msg = NULL; | |
| 189 | + i2c_dev->num_msgs = 0; | |
| 190 | + | |
| 191 | + i2c_dev->msg_buf = NULL; | |
| 192 | + i2c_dev->msg_buf_remaining = 0; | |
| 193 | +} | |
| 194 | + | |
| 186 | 195 | /* |
| 187 | 196 | * Note about I2C_C_CLEAR on error: |
| 188 | 197 | * The I2C_C_CLEAR on errors will take some time to resolve -- if you were in |
| @@ -283,6 +292,9 @@ static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], · 94 unmodified lines | ||
| 283 | 292 | |
| 284 | 293 | time_left = wait_for_completion_timeout(&i2c_dev->completion, |
| 285 | 294 | adap->timeout); |
| 295 | + | |
| 296 | + bcm2835_i2c_finish_transfer(i2c_dev); | |
| 297 | + | |
| 286 | 298 | if (!time_left) { |
| 287 | 299 | bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, |
| 288 | 300 | BCM2835_I2C_C_CLEAR); |
| @@ -382,8 +382,10 @@ static void cdns_i2c_mrecv(struct cdns_i2c *id) · 381 unmodified lines | ||
| 382 | 382 | * Check for the message size against FIFO depth and set the |
| 383 | 383 | * 'hold bus' bit if it is greater than FIFO depth. |
| 384 | 384 | */ |
| 385 | − if (id->recv_count > CDNS_I2C_FIFO_DEPTH) | |
| 385 | + if ((id->recv_count > CDNS_I2C_FIFO_DEPTH) || id->bus_hold_flag) | |
| 386 | 386 | ctrl_reg |= CDNS_I2C_CR_HOLD; |
| 387 | + else | |
| 388 | + ctrl_reg = ctrl_reg & ~CDNS_I2C_CR_HOLD; | |
| 387 | 389 | |
| 388 | 390 | cdns_i2c_writereg(ctrl_reg, CDNS_I2C_CR_OFFSET); |
| 389 | 391 | |
| @@ -440,8 +442,11 @@ static void cdns_i2c_msend(struct cdns_i2c *id) · 50 unmodified lines | ||
| 440 | 442 | * Check for the message size against FIFO depth and set the |
| 441 | 443 | * 'hold bus' bit if it is greater than FIFO depth. |
| 442 | 444 | */ |
| 443 | − if (id->send_count > CDNS_I2C_FIFO_DEPTH) | |
| 445 | + if ((id->send_count > CDNS_I2C_FIFO_DEPTH) || id->bus_hold_flag) | |
| 444 | 446 | ctrl_reg |= CDNS_I2C_CR_HOLD; |
| 447 | + else | |
| 448 | + ctrl_reg = ctrl_reg & ~CDNS_I2C_CR_HOLD; | |
| 449 | + | |
| 445 | 450 | cdns_i2c_writereg(ctrl_reg, CDNS_I2C_CR_OFFSET); |
| 446 | 451 | |
| 447 | 452 | /* Clear the interrupts in interrupt status register. */ |
| @@ -420,7 +420,7 @@ config KEYBOARD_MPR121 · 419 unmodified lines | ||
| 420 | 420 | |
| 421 | 421 | config KEYBOARD_SNVS_PWRKEY |
| 422 | 422 | tristate "IMX SNVS Power Key Driver" |
| 423 | − depends on SOC_IMX6SX | |
| 423 | + depends on SOC_IMX6SX || SOC_IMX7D | |
| 424 | 424 | depends on OF |
| 425 | 425 | help |
| 426 | 426 | This is the snvs powerkey driver for the Freescale i.MX application |
| @@ -75,9 +75,7 @@ · 74 unmodified lines | ||
| 75 | 75 | struct cap11xx_led { |
| 76 | 76 | struct cap11xx_priv *priv; |
| 77 | 77 | struct led_classdev cdev; |
| 78 | − struct work_struct work; | |
| 79 | 78 | u32 reg; |
| 80 | − enum led_brightness new_brightness; | |
| 81 | 79 | }; |
| 82 | 80 | #endif |
| 83 | 81 | |
| @@ -233,30 +231,21 @@ static void cap11xx_input_close(struct input_dev *idev) · 149 unmodified lines | ||
| 233 | 231 | } |
| 234 | 232 | |
| 235 | 233 | #ifdef CONFIG_LEDS_CLASS |
| 236 | −static void cap11xx_led_work(struct work_struct *work) | |
| 234 | +static int cap11xx_led_set(struct led_classdev *cdev, | |
| 235 | + enum led_brightness value) | |
| 237 | 236 | { |
| 238 | − struct cap11xx_led *led = container_of(work, struct cap11xx_led, work); | |
| 237 | + struct cap11xx_led *led = container_of(cdev, struct cap11xx_led, cdev); | |
| 239 | 238 | struct cap11xx_priv *priv = led->priv; |
| 240 | − int value = led->new_brightness; | |
| 241 | 239 | |
| 242 | 240 | /* |
| 243 | − * All LEDs share the same duty cycle as this is a HW limitation. | |
| 244 | − * Brightness levels per LED are either 0 (OFF) and 1 (ON). | |
| 241 | + * All LEDs share the same duty cycle as this is a HW | |
| 242 | + * limitation. Brightness levels per LED are either | |
| 243 | + * 0 (OFF) and 1 (ON). | |
| 245 | 244 | */ |
| 246 | − regmap_update_bits(priv->regmap, CAP11XX_REG_LED_OUTPUT_CONTROL, | |
| 247 | − BIT(led->reg), value ? BIT(led->reg) : 0); | |
| 248 | −} | |
| 249 | − | |
| 250 | −static void cap11xx_led_set(struct led_classdev *cdev, | |
| 251 | − enum led_brightness value) | |
| 252 | −{ | |
| 253 | − struct cap11xx_led *led = container_of(cdev, struct cap11xx_led, cdev); | |
| 254 | − | |
| 255 | − if (led->new_brightness == value) | |
| 256 | − return; | |
| 257 | − | |
| 258 | − led->new_brightness = value; | |
| 259 | − schedule_work(&led->work); | |
| 245 | + return regmap_update_bits(priv->regmap, | |
| 246 | + CAP11XX_REG_LED_OUTPUT_CONTROL, | |
| 247 | + BIT(led->reg), | |
| 248 | + value ? BIT(led->reg) : 0); | |
| 260 | 249 | } |
| 261 | 250 | |
| 262 | 251 | static int cap11xx_init_leds(struct device *dev, |
| @@ -299,7 +288,7 @@ static int cap11xx_init_leds(struct device *dev, · 36 unmodified lines | ||
| 299 | 288 | led->cdev.default_trigger = |
| 300 | 289 | of_get_property(child, "linux,default-trigger", NULL); |
| 301 | 290 | led->cdev.flags = 0; |
| 302 | − led->cdev.brightness_set = cap11xx_led_set; | |
| 291 | + led->cdev.brightness_set_blocking = cap11xx_led_set; | |
| 303 | 292 | led->cdev.max_brightness = 1; |
| 304 | 293 | led->cdev.brightness = LED_OFF; |
| 305 | 294 | |
| @@ -312,8 +301,6 @@ static int cap11xx_init_leds(struct device *dev, · 6 unmodified lines | ||
| 312 | 301 | led->reg = reg; |
| 313 | 302 | led->priv = priv; |
| 314 | 303 | |
| 315 | − INIT_WORK(&led->work, cap11xx_led_work); | |
| 316 | − | |
| 317 | 304 | error = devm_led_classdev_register(dev, &led->cdev); |
| 318 | 305 | if (error) { |
| 319 | 306 | of_node_put(child); |
| @@ -222,7 +222,7 @@ static void matrix_keypad_stop(struct input_dev *dev) · 221 unmodified lines | ||
| 222 | 222 | keypad->stopped = true; |
| 223 | 223 | spin_unlock_irq(&keypad->lock); |
| 224 | 224 | |
| 225 | − flush_work(&keypad->work.work); | |
| 225 | + flush_delayed_work(&keypad->work); | |
| 226 | 226 | /* |
| 227 | 227 | * matrix_keypad_scan() will leave IRQs enabled; |
| 228 | 228 | * we should disable them now. |
| @@ -58,10 +58,9 @@ static unsigned char qt2160_key2code[] = { · 57 unmodified lines | ||
| 58 | 58 | struct qt2160_led { |
| 59 | 59 | struct qt2160_data *qt2160; |
| 60 | 60 | struct led_classdev cdev; |
| 61 | − struct work_struct work; | |
| 62 | 61 | char name[32]; |
| 63 | 62 | int id; |
| 64 | − enum led_brightness new_brightness; | |
| 63 | + enum led_brightness brightness; | |
| 65 | 64 | }; |
| 66 | 65 | #endif |
| 67 | 66 | |
| @@ -74,7 +73,6 @@ struct qt2160_data { · 6 unmodified lines | ||
| 74 | 73 | u16 key_matrix; |
| 75 | 74 | #ifdef CONFIG_LEDS_CLASS |
| 76 | 75 | struct qt2160_led leds[QT2160_NUM_LEDS_X]; |
| 77 | − struct mutex led_lock; | |
| 78 | 76 | #endif |
| 79 | 77 | }; |
| 80 | 78 | |
| @@ -83,46 +81,39 @@ static int qt2160_write(struct i2c_client *client, u8 reg, u8 data); · 2 unmodified lines | ||
| 83 | 81 | |
| 84 | 82 | #ifdef CONFIG_LEDS_CLASS |
| 85 | 83 | |
| 86 | −static void qt2160_led_work(struct work_struct *work) | |
| 84 | +static int qt2160_led_set(struct led_classdev *cdev, | |
| 85 | + enum led_brightness value) | |
| 87 | 86 | { |
| 88 | − struct qt2160_led *led = container_of(work, struct qt2160_led, work); | |
| 87 | + struct qt2160_led *led = container_of(cdev, struct qt2160_led, cdev); | |
| 89 | 88 | struct qt2160_data *qt2160 = led->qt2160; |
| 90 | 89 | struct i2c_client *client = qt2160->client; |
| 91 | − int value = led->new_brightness; | |
| 92 | 90 | u32 drive, pwmen; |
| 93 | 91 | |
| 94 | − mutex_lock(&qt2160->led_lock); | |
| 95 | − | |
| 96 | − drive = qt2160_read(client, QT2160_CMD_DRIVE_X); | |
| 97 | − pwmen = qt2160_read(client, QT2160_CMD_PWMEN_X); | |
| 98 | − if (value != LED_OFF) { | |
| 99 | − drive |= (1 << led->id); | |
| 100 | − pwmen |= (1 << led->id); | |
| 101 | − | |
| 102 | − } else { | |
| 103 | − drive &= ~(1 << led->id); | |
| 104 | − pwmen &= ~(1 << led->id); | |
| 105 | − } | |
| 106 | − qt2160_write(client, QT2160_CMD_DRIVE_X, drive); | |
| 107 | − qt2160_write(client, QT2160_CMD_PWMEN_X, pwmen); | |
| 92 | + if (value != led->brightness) { | |
| 93 | + drive = qt2160_read(client, QT2160_CMD_DRIVE_X); | |
| 94 | + pwmen = qt2160_read(client, QT2160_CMD_PWMEN_X); | |
| 95 | + if (value != LED_OFF) { | |
| 96 | + drive |= BIT(led->id); | |
| 97 | + pwmen |= BIT(led->id); | |
| 108 | 98 | |
| 109 | − /* | |
| 110 | − * Changing this register will change the brightness | |
| 111 | − * of every LED in the qt2160. It's a HW limitation. | |
| 112 | − */ | |
| 113 | − if (value != LED_OFF) | |
| 114 | − qt2160_write(client, QT2160_CMD_PWM_DUTY, value); | |
| 99 | + } else { | |
| 100 | + drive &= ~BIT(led->id); | |
| 101 | + pwmen &= ~BIT(led->id); | |
| 102 | + } | |
| 103 | + qt2160_write(client, QT2160_CMD_DRIVE_X, drive); | |
| 104 | + qt2160_write(client, QT2160_CMD_PWMEN_X, pwmen); | |
| 115 | 105 | |
| 116 | − mutex_unlock(&qt2160->led_lock); | |
| 117 | −} | |
| 106 | + /* | |
| 107 | + * Changing this register will change the brightness | |
| 108 | + * of every LED in the qt2160. It's a HW limitation. | |
| 109 | + */ | |
| 110 | + if (value != LED_OFF) | |
| 111 | + qt2160_write(client, QT2160_CMD_PWM_DUTY, value); | |
| 118 | 112 | |
| 119 | −static void qt2160_led_set(struct led_classdev *cdev, | |
| 120 | − enum led_brightness value) | |
| 121 | −{ | |
| 122 | − struct qt2160_led *led = container_of(cdev, struct qt2160_led, cdev); | |
| 113 | + led->brightness = value; | |
| 114 | + } | |
| 123 | 115 | |
| 124 | − led->new_brightness = value; | |
| 125 | − schedule_work(&led->work); | |
| 116 | + return 0; | |
| 126 | 117 | } |
| 127 | 118 | |
| 128 | 119 | #endif /* CONFIG_LEDS_CLASS */ |
| @@ -293,20 +284,16 @@ static int qt2160_register_leds(struct qt2160_data *qt2160) · 164 unmodified lines | ||
| 293 | 284 | int ret; |
| 294 | 285 | int i; |
| 295 | 286 | |
| 296 | − mutex_init(&qt2160->led_lock); | |
| 297 | − | |
| 298 | 287 | for (i = 0; i < QT2160_NUM_LEDS_X; i++) { |
| 299 | 288 | struct qt2160_led *led = &qt2160->leds[i]; |
| 300 | 289 | |
| 301 | 290 | snprintf(led->name, sizeof(led->name), "qt2160:x%d", i); |
| 302 | 291 | led->cdev.name = led->name; |
| 303 | − led->cdev.brightness_set = qt2160_led_set; | |
| 292 | + led->cdev.brightness_set_blocking = qt2160_led_set; | |
| 304 | 293 | led->cdev.brightness = LED_OFF; |
| 305 | 294 | led->id = i; |
| 306 | 295 | led->qt2160 = qt2160; |
| 307 | 296 | |
| 308 | − INIT_WORK(&led->work, qt2160_led_work); | |
| 309 | − | |
| 310 | 297 | ret = led_classdev_register(&client->dev, &led->cdev); |
| 311 | 298 | if (ret < 0) |
| 312 | 299 | return ret; |
| @@ -324,10 +311,8 @@ static void qt2160_unregister_leds(struct qt2160_data *qt2160) · 11 unmodified lines | ||
| 324 | 311 | { |
| 325 | 312 | int i; |
| 326 | 313 | |
| 327 | − for (i = 0; i < QT2160_NUM_LEDS_X; i++) { | |
| 314 | + for (i = 0; i < QT2160_NUM_LEDS_X; i++) | |
| 328 | 315 | led_classdev_unregister(&qt2160->leds[i].cdev); |
| 329 | − cancel_work_sync(&qt2160->leds[i].work); | |
| 330 | − } | |
| 331 | 316 | } |
| 332 | 317 | |
| 333 | 318 | #else |
| @@ -153,6 +153,8 @@ static int keyscan_probe(struct platform_device *pdev) · 152 unmodified lines | ||
| 153 | 153 | |
| 154 | 154 | input_dev->id.bustype = BUS_HOST; |
| 155 | 155 | |
| 156 | + keypad_data->input_dev = input_dev; | |
| 157 | + | |
| 156 | 158 | error = keypad_matrix_key_parse_dt(keypad_data); |
| 157 | 159 | if (error) |
| 158 | 160 | return error; |
| @@ -168,8 +170,6 @@ static int keyscan_probe(struct platform_device *pdev) · 9 unmodified lines | ||
| 168 | 170 | |
| 169 | 171 | input_set_drvdata(input_dev, keypad_data); |
| 170 | 172 | |
| 171 | − keypad_data->input_dev = input_dev; | |
| 172 | − | |
| 173 | 173 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 174 | 174 | keypad_data->base = devm_ioremap_resource(&pdev->dev, res); |
| 175 | 175 | if (IS_ERR(keypad_data->base)) |
| @@ -22,7 +22,6 @@ · 21 unmodified lines | ||
| 22 | 22 | #include <linux/io.h> |
| 23 | 23 | #include <linux/input-polldev.h> |
| 24 | 24 | #include <linux/i2c.h> |
| 25 | −#include <linux/workqueue.h> | |
| 26 | 25 | #include <linux/leds.h> |
| 27 | 26 | |
| 28 | 27 | #define APANEL_NAME "Fujitsu Application Panel" |
| @@ -59,8 +58,6 @@ struct apanel { · 30 unmodified lines | ||
| 59 | 58 | struct i2c_client *client; |
| 60 | 59 | unsigned short keymap[MAX_PANEL_KEYS]; |
| 61 | 60 | u16 nkeys; |
| 62 | − u16 led_bits; | |
| 63 | − struct work_struct led_work; | |
| 64 | 61 | struct led_classdev mail_led; |
| 65 | 62 | }; |
| 66 | 63 | |
| @@ -109,25 +106,13 @@ static void apanel_poll(struct input_polled_dev *ipdev) · 42 unmodified lines | ||
| 109 | 106 | report_key(idev, ap->keymap[i]); |
| 110 | 107 | } |
| 111 | 108 | |
| 112 | −/* Track state changes of LED */ | |
| 113 | −static void led_update(struct work_struct *work) | |
| 114 | −{ | |
| 115 | − struct apanel *ap = container_of(work, struct apanel, led_work); | |
| 116 | − | |
| 117 | − i2c_smbus_write_word_data(ap->client, 0x10, ap->led_bits); | |
| 118 | −} | |
| 119 | − | |
| 120 | −static void mail_led_set(struct led_classdev *led, | |
| 109 | +static int mail_led_set(struct led_classdev *led, | |
| 121 | 110 | enum led_brightness value) |
| 122 | 111 | { |
| 123 | 112 | struct apanel *ap = container_of(led, struct apanel, mail_led); |
| 113 | + u16 led_bits = value != LED_OFF ? 0x8000 : 0x0000; | |
| 124 | 114 | |
| 125 | − if (value != LED_OFF) | |
| 126 | − ap->led_bits |= 0x8000; | |
| 127 | − else | |
| 128 | − ap->led_bits &= ~0x8000; | |
| 129 | − | |
| 130 | − schedule_work(&ap->led_work); | |
| 115 | + return i2c_smbus_write_word_data(ap->client, 0x10, led_bits); | |
| 131 | 116 | } |
| 132 | 117 | |
| 133 | 118 | static int apanel_remove(struct i2c_client *client) |
| @@ -179,7 +164,7 @@ static struct apanel apanel = { · 45 unmodified lines | ||
| 179 | 164 | }, |
| 180 | 165 | .mail_led = { |
| 181 | 166 | .name = "mail:blue", |
| 182 | − .brightness_set = mail_led_set, | |
| 167 | + .brightness_set_blocking = mail_led_set, | |
| 183 | 168 | }, |
| 184 | 169 | }; |
| 185 | 170 | |
| @@ -235,7 +220,6 @@ static int apanel_probe(struct i2c_client *client, · 49 unmodified lines | ||
| 235 | 220 | if (err) |
| 236 | 221 | goto out3; |
| 237 | 222 | |
| 238 | − INIT_WORK(&ap->led_work, led_update); | |
| 239 | 223 | if (device_chip[APANEL_DEV_LED] != CHIP_NONE) { |
| 240 | 224 | err = led_classdev_register(&client->dev, &ap->mail_led); |
| 241 | 225 | if (err) |
| @@ -481,13 +481,14 @@ static int bma150_register_input_device(struct bma150_data *bma150) · 480 unmodified lines | ||
| 481 | 481 | idev->close = bma150_irq_close; |
| 482 | 482 | input_set_drvdata(idev, bma150); |
| 483 | 483 | |
| 484 | + bma150->input = idev; | |
| 485 | + | |
| 484 | 486 | error = input_register_device(idev); |
| 485 | 487 | if (error) { |
| 486 | 488 | input_free_device(idev); |
| 487 | 489 | return error; |
| 488 | 490 | } |
| 489 | 491 | |
| 490 | − bma150->input = idev; | |
| 491 | 492 | return 0; |
| 492 | 493 | } |
| 493 | 494 | |
| @@ -510,15 +511,15 @@ static int bma150_register_polled_device(struct bma150_data *bma150) · 16 unmodified lines | ||
| 510 | 511 | |
| 511 | 512 | bma150_init_input_device(bma150, ipoll_dev->input); |
| 512 | 513 | |
| 514 | + bma150->input_polled = ipoll_dev; | |
| 515 | + bma150->input = ipoll_dev->input; | |
| 516 | + | |
| 513 | 517 | error = input_register_polled_device(ipoll_dev); |
| 514 | 518 | if (error) { |
| 515 | 519 | input_free_polled_device(ipoll_dev); |
| 516 | 520 | return error; |
| 517 | 521 | } |
| 518 | 522 | |
| 519 | − bma150->input_polled = ipoll_dev; | |
| 520 | − bma150->input = ipoll_dev->input; | |
| 521 | − | |
| 522 | 523 | return 0; |
| 523 | 524 | } |
| 524 | 525 | |
| @@ -34,6 +34,7 @@ struct pwm_vibrator { · 33 unmodified lines | ||
| 34 | 34 | struct work_struct play_work; |
| 35 | 35 | u16 level; |
| 36 | 36 | u32 direction_duty_cycle; |
| 37 | + bool vcc_on; | |
| 37 | 38 | }; |
| 38 | 39 | |
| 39 | 40 | static int pwm_vibrator_start(struct pwm_vibrator *vibrator) |
| @@ -42,10 +43,13 @@ static int pwm_vibrator_start(struct pwm_vibrator *vibrator) · 2 unmodified lines | ||
| 42 | 43 | struct pwm_state state; |
| 43 | 44 | int err; |
| 44 | 45 | |
| 45 | − err = regulator_enable(vibrator->vcc); | |
| 46 | − if (err) { | |
| 47 | − dev_err(pdev, "failed to enable regulator: %d", err); | |
| 48 | − return err; | |
| 46 | + if (!vibrator->vcc_on) { | |
| 47 | + err = regulator_enable(vibrator->vcc); | |
| 48 | + if (err) { | |
| 49 | + dev_err(pdev, "failed to enable regulator: %d", err); | |
| 50 | + return err; | |
| 51 | + } | |
| 52 | + vibrator->vcc_on = true; | |
| 49 | 53 | } |
| 50 | 54 | |
| 51 | 55 | pwm_get_state(vibrator->pwm, &state); |
| @@ -76,11 +80,14 @@ static int pwm_vibrator_start(struct pwm_vibrator *vibrator) · 24 unmodified lines | ||
| 76 | 80 | |
| 77 | 81 | static void pwm_vibrator_stop(struct pwm_vibrator *vibrator) |
| 78 | 82 | { |
| 79 | − regulator_disable(vibrator->vcc); | |
| 80 | − | |
| 81 | 83 | if (vibrator->pwm_dir) |
| 82 | 84 | pwm_disable(vibrator->pwm_dir); |
| 83 | 85 | pwm_disable(vibrator->pwm); |
| 86 | + | |
| 87 | + if (vibrator->vcc_on) { | |
| 88 | + regulator_disable(vibrator->vcc); | |
| 89 | + vibrator->vcc_on = false; | |
| 90 | + } | |
| 84 | 91 | } |
| 85 | 92 | |
| 86 | 93 | static void pwm_vibrator_play_work(struct work_struct *work) |
| @@ -1336,7 +1336,6 @@ MODULE_DEVICE_TABLE(i2c, elan_id); · 1335 unmodified lines | ||
| 1336 | 1336 | static const struct acpi_device_id elan_acpi_id[] = { |
| 1337 | 1337 | { "ELAN0000", 0 }, |
| 1338 | 1338 | { "ELAN0100", 0 }, |
| 1339 | − { "ELAN0501", 0 }, | |
| 1340 | 1339 | { "ELAN0600", 0 }, |
| 1341 | 1340 | { "ELAN0602", 0 }, |
| 1342 | 1341 | { "ELAN0605", 0 }, |
| @@ -1346,6 +1345,7 @@ static const struct acpi_device_id elan_acpi_id[] = { · 3 unmodified lines | ||
| 1346 | 1345 | { "ELAN060C", 0 }, |
| 1347 | 1346 | { "ELAN0611", 0 }, |
| 1348 | 1347 | { "ELAN0612", 0 }, |
| 1348 | + { "ELAN0617", 0 }, | |
| 1349 | 1349 | { "ELAN0618", 0 }, |
| 1350 | 1350 | { "ELAN061C", 0 }, |
| 1351 | 1351 | { "ELAN061D", 0 }, |
| @@ -1119,6 +1119,8 @@ static int elantech_get_resolution_v4(struct psmouse *psmouse, · 1118 unmodified lines | ||
| 1119 | 1119 | * Asus UX31 0x361f00 20, 15, 0e clickpad |
| 1120 | 1120 | * Asus UX32VD 0x361f02 00, 15, 0e clickpad |
| 1121 | 1121 | * Avatar AVIU-145A2 0x361f00 ? clickpad |
| 1122 | + * Fujitsu CELSIUS H760 0x570f02 40, 14, 0c 3 hw buttons (**) | |
| 1123 | + * Fujitsu CELSIUS H780 0x5d0f02 41, 16, 0d 3 hw buttons (**) | |
| 1122 | 1124 | * Fujitsu LIFEBOOK E544 0x470f00 d0, 12, 09 2 hw buttons |
| 1123 | 1125 | * Fujitsu LIFEBOOK E546 0x470f00 50, 12, 09 2 hw buttons |
| 1124 | 1126 | * Fujitsu LIFEBOOK E547 0x470f00 50, 12, 09 2 hw buttons |
| @@ -1171,6 +1173,13 @@ static const struct dmi_system_id elantech_dmi_has_middle_button[] = { · 46 unmodified lines | ||
| 1171 | 1173 | DMI_MATCH(DMI_PRODUCT_NAME, "CELSIUS H760"), |
| 1172 | 1174 | }, |
| 1173 | 1175 | }, |
| 1176 | + { | |
| 1177 | + /* Fujitsu H780 also has a middle button */ | |
| 1178 | + .matches = { | |
| 1179 | + DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"), | |
| 1180 | + DMI_MATCH(DMI_PRODUCT_NAME, "CELSIUS H780"), | |
| 1181 | + }, | |
| 1182 | + }, | |
| 1174 | 1183 | #endif |
| 1175 | 1184 | { } |
| 1176 | 1185 | }; |
| @@ -76,6 +76,7 @@ static void ps2_gpio_close(struct serio *serio) · 75 unmodified lines | ||
| 76 | 76 | { |
| 77 | 77 | struct ps2_gpio_data *drvdata = serio->port_data; |
| 78 | 78 | |
| 79 | + flush_delayed_work(&drvdata->tx_work); | |
| 79 | 80 | disable_irq(drvdata->irq); |
| 80 | 81 | } |
| 81 | 82 | |
| @@ -1396,9 +1396,9 @@ static void flexrm_shutdown(struct mbox_chan *chan) · 1395 unmodified lines | ||
| 1396 | 1396 | |
| 1397 | 1397 | /* Clear ring flush state */ |
| 1398 | 1398 | timeout = 1000; /* timeout of 1s */ |
| 1399 | − writel_relaxed(0x0, ring + RING_CONTROL); | |
| 1399 | + writel_relaxed(0x0, ring->regs + RING_CONTROL); | |
| 1400 | 1400 | do { |
| 1401 | − if (!(readl_relaxed(ring + RING_FLUSH_DONE) & | |
| 1401 | + if (!(readl_relaxed(ring->regs + RING_FLUSH_DONE) & | |
| 1402 | 1402 | FLUSH_DONE_MASK)) |
| 1403 | 1403 | break; |
| 1404 | 1404 | mdelay(1); |
| @@ -310,6 +310,7 @@ int mbox_flush(struct mbox_chan *chan, unsigned long timeout) · 309 unmodified lines | ||
| 310 | 310 | |
| 311 | 311 | return ret; |
| 312 | 312 | } |
| 313 | +EXPORT_SYMBOL_GPL(mbox_flush); | |
| 313 | 314 | |
| 314 | 315 | /** |
| 315 | 316 | * mbox_request_channel - Request a mailbox channel. |
| @@ -344,7 +344,8 @@ static void b53_set_forwarding(struct b53_device *dev, int enable) · 343 unmodified lines | ||
| 344 | 344 | b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_CTRL, mgmt); |
| 345 | 345 | } |
| 346 | 346 | |
| 347 | −static void b53_enable_vlan(struct b53_device *dev, bool enable) | |
| 347 | +static void b53_enable_vlan(struct b53_device *dev, bool enable, | |
| 348 | + bool enable_filtering) | |
| 348 | 349 | { |
| 349 | 350 | u8 mgmt, vc0, vc1, vc4 = 0, vc5; |
| 350 | 351 | |
| @@ -369,8 +370,13 @@ static void b53_enable_vlan(struct b53_device *dev, bool enable) · 18 unmodified lines | ||
| 369 | 370 | vc0 |= VC0_VLAN_EN | VC0_VID_CHK_EN | VC0_VID_HASH_VID; |
| 370 | 371 | vc1 |= VC1_RX_MCST_UNTAG_EN | VC1_RX_MCST_FWD_EN; |
| 371 | 372 | vc4 &= ~VC4_ING_VID_CHECK_MASK; |
| 372 | − vc4 |= VC4_ING_VID_VIO_DROP << VC4_ING_VID_CHECK_S; | |
| 373 | − vc5 |= VC5_DROP_VTABLE_MISS; | |
| 373 | + if (enable_filtering) { | |
| 374 | + vc4 |= VC4_ING_VID_VIO_DROP << VC4_ING_VID_CHECK_S; | |
| 375 | + vc5 |= VC5_DROP_VTABLE_MISS; | |
| 376 | + } else { | |
| 377 | + vc4 |= VC4_ING_VID_VIO_FWD << VC4_ING_VID_CHECK_S; | |
| 378 | + vc5 &= ~VC5_DROP_VTABLE_MISS; | |
| 379 | + } | |
| 374 | 380 | |
| 375 | 381 | if (is5325(dev)) |
| 376 | 382 | vc0 &= ~VC0_RESERVED_1; |
| @@ -420,6 +426,9 @@ static void b53_enable_vlan(struct b53_device *dev, bool enable) · 43 unmodified lines | ||
| 420 | 426 | } |
| 421 | 427 | |
| 422 | 428 | b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt); |
| 429 | + | |
| 430 | + dev->vlan_enabled = enable; | |
| 431 | + dev->vlan_filtering_enabled = enable_filtering; | |
| 423 | 432 | } |
| 424 | 433 | |
| 425 | 434 | static int b53_set_jumbo(struct b53_device *dev, bool enable, bool allow_10_100) |
| @@ -632,25 +641,35 @@ static void b53_enable_mib(struct b53_device *dev) · 206 unmodified lines | ||
| 632 | 641 | b53_write8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc); |
| 633 | 642 | } |
| 634 | 643 | |
| 644 | +static u16 b53_default_pvid(struct b53_device *dev) | |
| 645 | +{ | |
| 646 | + if (is5325(dev) || is5365(dev)) | |
| 647 | + return 1; | |
| 648 | + else | |
| 649 | + return 0; | |
| 650 | +} | |
| 651 | + | |
| 635 | 652 | int b53_configure_vlan(struct dsa_switch *ds) |
| 636 | 653 | { |
| 637 | 654 | struct b53_device *dev = ds->priv; |
| 638 | 655 | struct b53_vlan vl = { 0 }; |
| 639 | − int i; | |
| 656 | + int i, def_vid; | |
| 657 | + | |
| 658 | + def_vid = b53_default_pvid(dev); | |
| 640 | 659 | |
| 641 | 660 | /* clear all vlan entries */ |
| 642 | 661 | if (is5325(dev) || is5365(dev)) { |
| 643 | − for (i = 1; i < dev->num_vlans; i++) | |
| 662 | + for (i = def_vid; i < dev->num_vlans; i++) | |
| 644 | 663 | b53_set_vlan_entry(dev, i, &vl); |
| 645 | 664 | } else { |
| 646 | 665 | b53_do_vlan_op(dev, VTA_CMD_CLEAR); |
| 647 | 666 | } |
| 648 | 667 | |
| 649 | − b53_enable_vlan(dev, false); | |
| 668 | + b53_enable_vlan(dev, false, dev->vlan_filtering_enabled); | |
| 650 | 669 | |
| 651 | 670 | b53_for_each_port(dev, i) |
| 652 | 671 | b53_write16(dev, B53_VLAN_PAGE, |
| 653 | − B53_VLAN_PORT_DEF_TAG(i), 1); | |
| 672 | + B53_VLAN_PORT_DEF_TAG(i), def_vid); | |
| 654 | 673 | |
| 655 | 674 | if (!is5325(dev) && !is5365(dev)) |
| 656 | 675 | b53_set_jumbo(dev, dev->enable_jumbo, false); |
| @@ -1255,6 +1274,46 @@ EXPORT_SYMBOL(b53_phylink_mac_link_up); · 598 unmodified lines | ||
| 1255 | 1274 | |
| 1256 | 1275 | int b53_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering) |
| 1257 | 1276 | { |
| 1277 | + struct b53_device *dev = ds->priv; | |
| 1278 | + struct net_device *bridge_dev; | |
| 1279 | + unsigned int i; | |
| 1280 | + u16 pvid, new_pvid; | |
| 1281 | + | |
| 1282 | + /* Handle the case were multiple bridges span the same switch device | |
| 1283 | + * and one of them has a different setting than what is being requested | |
| 1284 | + * which would be breaking filtering semantics for any of the other | |
| 1285 | + * bridge devices. | |
| 1286 | + */ | |
| 1287 | + b53_for_each_port(dev, i) { | |
| 1288 | + bridge_dev = dsa_to_port(ds, i)->bridge_dev; | |
| 1289 | + if (bridge_dev && | |
| 1290 | + bridge_dev != dsa_to_port(ds, port)->bridge_dev && | |
| 1291 | + br_vlan_enabled(bridge_dev) != vlan_filtering) { | |
| 1292 | + netdev_err(bridge_dev, | |
| 1293 | + "VLAN filtering is global to the switch!\n"); | |
| 1294 | + return -EINVAL; | |
| 1295 | + } | |
| 1296 | + } | |
| 1297 | + | |
| 1298 | + b53_read16(dev, B53_VLAN_PAGE, B53_VLAN_PORT_DEF_TAG(port), &pvid); | |
| 1299 | + new_pvid = pvid; | |
| 1300 | + if (dev->vlan_filtering_enabled && !vlan_filtering) { | |
| 1301 | + /* Filtering is currently enabled, use the default PVID since | |
| 1302 | + * the bridge does not expect tagging anymore | |
| 1303 | + */ | |
| 1304 | + dev->ports[port].pvid = pvid; | |
| 1305 | + new_pvid = b53_default_pvid(dev); | |
| 1306 | + } else if (!dev->vlan_filtering_enabled && vlan_filtering) { | |
| 1307 | + /* Filtering is currently disabled, restore the previous PVID */ | |
| 1308 | + new_pvid = dev->ports[port].pvid; | |
| 1309 | + } | |
| 1310 | + | |
| 1311 | + if (pvid != new_pvid) | |
| 1312 | + b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_PORT_DEF_TAG(port), | |
| 1313 | + new_pvid); | |
| 1314 | + | |
| 1315 | + b53_enable_vlan(dev, dev->vlan_enabled, vlan_filtering); | |
| 1316 | + | |
| 1258 | 1317 | return 0; |
| 1259 | 1318 | } |
| 1260 | 1319 | EXPORT_SYMBOL(b53_vlan_filtering); |
| @@ -1270,7 +1329,7 @@ int b53_vlan_prepare(struct dsa_switch *ds, int port, · 9 unmodified lines | ||
| 1270 | 1329 | if (vlan->vid_end > dev->num_vlans) |
| 1271 | 1330 | return -ERANGE; |
| 1272 | 1331 | |
| 1273 | − b53_enable_vlan(dev, true); | |
| 1332 | + b53_enable_vlan(dev, true, dev->vlan_filtering_enabled); | |
| 1274 | 1333 | |
| 1275 | 1334 | return 0; |
| 1276 | 1335 | } |
| @@ -1300,7 +1359,7 @@ void b53_vlan_add(struct dsa_switch *ds, int port, · 23 unmodified lines | ||
| 1300 | 1359 | b53_fast_age_vlan(dev, vid); |
| 1301 | 1360 | } |
| 1302 | 1361 | |
| 1303 | − if (pvid) { | |
| 1362 | + if (pvid && !dsa_is_cpu_port(ds, port)) { | |
| 1304 | 1363 | b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_PORT_DEF_TAG(port), |
| 1305 | 1364 | vlan->vid_end); |
| 1306 | 1365 | b53_fast_age_vlan(dev, vid); |
| @@ -1326,12 +1385,8 @@ int b53_vlan_del(struct dsa_switch *ds, int port, · 19 unmodified lines | ||
| 1326 | 1385 | |
| 1327 | 1386 | vl->members &= ~BIT(port); |
| 1328 | 1387 | |
| 1329 | − if (pvid == vid) { | |
| 1330 | − if (is5325(dev) || is5365(dev)) | |
| 1331 | − pvid = 1; | |
| 1332 | − else | |
| 1333 | − pvid = 0; | |
| 1334 | − } | |
| 1388 | + if (pvid == vid) | |
| 1389 | + pvid = b53_default_pvid(dev); | |
| 1335 | 1390 | |
| 1336 | 1391 | if (untagged && !dsa_is_cpu_port(ds, port)) |
| 1337 | 1392 | vl->untag &= ~(BIT(port)); |
| @@ -1644,10 +1699,7 @@ void b53_br_leave(struct dsa_switch *ds, int port, struct net_device *br) · 306 unmodified lines | ||
| 1644 | 1699 | b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(port), pvlan); |
| 1645 | 1700 | dev->ports[port].vlan_ctl_mask = pvlan; |
| 1646 | 1701 | |
| 1647 | − if (is5325(dev) || is5365(dev)) | |
| 1648 | − pvid = 1; | |
| 1649 | − else | |
| 1650 | − pvid = 0; | |
| 1702 | + pvid = b53_default_pvid(dev); | |
| 1651 | 1703 | |
| 1652 | 1704 | /* Make this port join all VLANs without VLAN entries */ |
| 1653 | 1705 | if (is58xx(dev)) { |
| @@ -91,6 +91,7 @@ enum { · 90 unmodified lines | ||
| 91 | 91 | struct b53_port { |
| 92 | 92 | u16 vlan_ctl_mask; |
| 93 | 93 | struct ethtool_eee eee; |
| 94 | + u16 pvid; | |
| 94 | 95 | }; |
| 95 | 96 | |
| 96 | 97 | struct b53_vlan { |
| @@ -137,6 +138,8 @@ struct b53_device { · 40 unmodified lines | ||
| 137 | 138 | |
| 138 | 139 | unsigned int num_vlans; |
| 139 | 140 | struct b53_vlan *vlans; |
| 141 | + bool vlan_enabled; | |
| 142 | + bool vlan_filtering_enabled; | |
| 140 | 143 | unsigned int num_ports; |
| 141 | 144 | struct b53_port *ports; |
| 142 | 145 | }; |
| @@ -726,10 +726,11 @@ static void bcm_sf2_sw_get_wol(struct dsa_switch *ds, int port, · 725 unmodified lines | ||
| 726 | 726 | { |
| 727 | 727 | struct net_device *p = ds->ports[port].cpu_dp->master; |
| 728 | 728 | struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds); |
| 729 | − struct ethtool_wolinfo pwol; | |
| 729 | + struct ethtool_wolinfo pwol = { }; | |
| 730 | 730 | |
| 731 | 731 | /* Get the parent device WoL settings */ |
| 732 | − p->ethtool_ops->get_wol(p, &pwol); | |
| 732 | + if (p->ethtool_ops->get_wol) | |
| 733 | + p->ethtool_ops->get_wol(p, &pwol); | |
| 733 | 734 | |
| 734 | 735 | /* Advertise the parent device supported settings */ |
| 735 | 736 | wol->supported = pwol.supported; |
| @@ -750,9 +751,10 @@ static int bcm_sf2_sw_set_wol(struct dsa_switch *ds, int port, · 14 unmodified lines | ||
| 750 | 751 | struct net_device *p = ds->ports[port].cpu_dp->master; |
| 751 | 752 | struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds); |
| 752 | 753 | s8 cpu_port = ds->ports[port].cpu_dp->index; |
| 753 | − struct ethtool_wolinfo pwol; | |
| 754 | + struct ethtool_wolinfo pwol = { }; | |
| 754 | 755 | |
| 755 | − p->ethtool_ops->get_wol(p, &pwol); | |
| 756 | + if (p->ethtool_ops->get_wol) | |
| 757 | + p->ethtool_ops->get_wol(p, &pwol); | |
| 756 | 758 | if (wol->wolopts & ~pwol.supported) |
| 757 | 759 | return -EINVAL; |
| 758 | 760 | |
| @@ -134,6 +134,10 @@ static void bcm_sysport_set_rx_csum(struct net_device *dev, · 133 unmodified lines | ||
| 134 | 134 | |
| 135 | 135 | priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM); |
| 136 | 136 | reg = rxchk_readl(priv, RXCHK_CONTROL); |
| 137 | + /* Clear L2 header checks, which would prevent BPDUs | |
| 138 | + * from being received. | |
| 139 | + */ | |
| 140 | + reg &= ~RXCHK_L2_HDR_DIS; | |
| 137 | 141 | if (priv->rx_chk_en) |
| 138 | 142 | reg |= RXCHK_EN; |
| 139 | 143 | else |
| @@ -3128,6 +3128,9 @@ int hns_dsaf_roce_reset(struct fwnode_handle *dsaf_fwnode, bool dereset) · 3127 unmodified lines | ||
| 3128 | 3128 | dsaf_set_bit(credit, DSAF_SBM_ROCEE_CFG_CRD_EN_B, 1); |
| 3129 | 3129 | dsaf_write_dev(dsaf_dev, DSAF_SBM_ROCEE_CFG_REG_REG, credit); |
| 3130 | 3130 | } |
| 3131 | + | |
| 3132 | + put_device(&pdev->dev); | |
| 3133 | + | |
| 3131 | 3134 | return 0; |
| 3132 | 3135 | } |
| 3133 | 3136 | EXPORT_SYMBOL(hns_dsaf_roce_reset); |
| @@ -2879,7 +2879,7 @@ static int mv643xx_eth_shared_probe(struct platform_device *pdev) · 2878 unmodified lines | ||
| 2879 | 2879 | |
| 2880 | 2880 | ret = mv643xx_eth_shared_of_probe(pdev); |
| 2881 | 2881 | if (ret) |
| 2882 | − return ret; | |
| 2882 | + goto err_put_clk; | |
| 2883 | 2883 | pd = dev_get_platdata(&pdev->dev); |
| 2884 | 2884 | |
| 2885 | 2885 | msp->tx_csum_limit = (pd != NULL && pd->tx_csum_limit) ? |
| @@ -2887,6 +2887,11 @@ static int mv643xx_eth_shared_probe(struct platform_device *pdev) · 1 unmodified line | ||
| 2887 | 2887 | infer_hw_params(msp); |
| 2888 | 2888 | |
| 2889 | 2889 | return 0; |
| 2890 | + | |
| 2891 | +err_put_clk: | |
| 2892 | + if (!IS_ERR(msp->clk)) | |
| 2893 | + clk_disable_unprepare(msp->clk); | |
| 2894 | + return ret; | |
| 2890 | 2895 | } |
| 2891 | 2896 | |
| 2892 | 2897 | static int mv643xx_eth_shared_remove(struct platform_device *pdev) |
| @@ -5073,7 +5073,7 @@ static int sky2_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 5072 unmodified lines | ||
| 5073 | 5073 | INIT_WORK(&hw->restart_work, sky2_restart); |
| 5074 | 5074 | |
| 5075 | 5075 | pci_set_drvdata(pdev, hw); |
| 5076 | − pdev->d3_delay = 200; | |
| 5076 | + pdev->d3_delay = 300; | |
| 5077 | 5077 | |
| 5078 | 5078 | return 0; |
| 5079 | 5079 | |
| @@ -3360,7 +3360,7 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, · 3359 unmodified lines | ||
| 3360 | 3360 | dev->addr_len = ETH_ALEN; |
| 3361 | 3361 | mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]); |
| 3362 | 3362 | if (!is_valid_ether_addr(dev->dev_addr)) { |
| 3363 | − en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n", | |
| 3363 | + en_err(priv, "Port: %d, invalid mac burned: %pM, quitting\n", | |
| 3364 | 3364 | priv->port, dev->dev_addr); |
| 3365 | 3365 | err = -EINVAL; |
| 3366 | 3366 | goto out; |
| @@ -862,8 +862,9 @@ int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu, · 861 unmodified lines | ||
| 862 | 862 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { |
| 863 | 863 | bool configure = false; |
| 864 | 864 | bool pfc = false; |
| 865 | + u16 thres_cells; | |
| 866 | + u16 delay_cells; | |
| 865 | 867 | bool lossy; |
| 866 | − u16 thres; | |
| 867 | 868 | |
| 868 | 869 | for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) { |
| 869 | 870 | if (prio_tc[j] == i) { |
| @@ -877,10 +878,11 @@ int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu, · 7 unmodified lines | ||
| 877 | 878 | continue; |
| 878 | 879 | |
| 879 | 880 | lossy = !(pfc || pause_en); |
| 880 | − thres = mlxsw_sp_pg_buf_threshold_get(mlxsw_sp, mtu); | |
| 881 | − delay = mlxsw_sp_pg_buf_delay_get(mlxsw_sp, mtu, delay, pfc, | |
| 882 | − pause_en); | |
| 883 | − mlxsw_sp_pg_buf_pack(pbmc_pl, i, thres + delay, thres, lossy); | |
| 881 | + thres_cells = mlxsw_sp_pg_buf_threshold_get(mlxsw_sp, mtu); | |
| 882 | + delay_cells = mlxsw_sp_pg_buf_delay_get(mlxsw_sp, mtu, delay, | |
| 883 | + pfc, pause_en); | |
| 884 | + mlxsw_sp_pg_buf_pack(pbmc_pl, i, thres_cells + delay_cells, | |
| 885 | + thres_cells, lossy); | |
| 884 | 886 | } |
| 885 | 887 | |
| 886 | 888 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl); |
| @@ -1688,6 +1688,15 @@ qed_iwarp_parse_rx_pkt(struct qed_hwfn *p_hwfn, · 1687 unmodified lines | ||
| 1688 | 1688 | |
| 1689 | 1689 | eth_hlen = ETH_HLEN + (vlan_valid ? sizeof(u32) : 0); |
| 1690 | 1690 | |
| 1691 | + if (!ether_addr_equal(ethh->h_dest, | |
| 1692 | + p_hwfn->p_rdma_info->iwarp.mac_addr)) { | |
| 1693 | + DP_VERBOSE(p_hwfn, | |
| 1694 | + QED_MSG_RDMA, | |
| 1695 | + "Got unexpected mac %pM instead of %pM\n", | |
| 1696 | + ethh->h_dest, p_hwfn->p_rdma_info->iwarp.mac_addr); | |
| 1697 | + return -EINVAL; | |
| 1698 | + } | |
| 1699 | + | |
| 1691 | 1700 | ether_addr_copy(remote_mac_addr, ethh->h_source); |
| 1692 | 1701 | ether_addr_copy(local_mac_addr, ethh->h_dest); |
| 1693 | 1702 | |
| @@ -2605,7 +2614,7 @@ qed_iwarp_ll2_start(struct qed_hwfn *p_hwfn, · 911 unmodified lines | ||
| 2605 | 2614 | struct qed_iwarp_info *iwarp_info; |
| 2606 | 2615 | struct qed_ll2_acquire_data data; |
| 2607 | 2616 | struct qed_ll2_cbs cbs; |
| 2608 | − u32 mpa_buff_size; | |
| 2617 | + u32 buff_size; | |
| 2609 | 2618 | u16 n_ooo_bufs; |
| 2610 | 2619 | int rc = 0; |
| 2611 | 2620 | int i; |
| @@ -2632,7 +2641,7 @@ qed_iwarp_ll2_start(struct qed_hwfn *p_hwfn, · 20 unmodified lines | ||
| 2632 | 2641 | |
| 2633 | 2642 | memset(&data, 0, sizeof(data)); |
| 2634 | 2643 | data.input.conn_type = QED_LL2_TYPE_IWARP; |
| 2635 | − data.input.mtu = QED_IWARP_MAX_SYN_PKT_SIZE; | |
| 2644 | + data.input.mtu = params->max_mtu; | |
| 2636 | 2645 | data.input.rx_num_desc = QED_IWARP_LL2_SYN_RX_SIZE; |
| 2637 | 2646 | data.input.tx_num_desc = QED_IWARP_LL2_SYN_TX_SIZE; |
| 2638 | 2647 | data.input.tx_max_bds_per_packet = 1; /* will never be fragmented */ |
| @@ -2654,9 +2663,10 @@ qed_iwarp_ll2_start(struct qed_hwfn *p_hwfn, · 15 unmodified lines | ||
| 2654 | 2663 | goto err; |
| 2655 | 2664 | } |
| 2656 | 2665 | |
| 2666 | + buff_size = QED_IWARP_MAX_BUF_SIZE(params->max_mtu); | |
| 2657 | 2667 | rc = qed_iwarp_ll2_alloc_buffers(p_hwfn, |
| 2658 | 2668 | QED_IWARP_LL2_SYN_RX_SIZE, |
| 2659 | − QED_IWARP_MAX_SYN_PKT_SIZE, | |
| 2669 | + buff_size, | |
| 2660 | 2670 | iwarp_info->ll2_syn_handle); |
| 2661 | 2671 | if (rc) |
| 2662 | 2672 | goto err; |
| @@ -2710,10 +2720,9 @@ qed_iwarp_ll2_start(struct qed_hwfn *p_hwfn, · 47 unmodified lines | ||
| 2710 | 2720 | if (rc) |
| 2711 | 2721 | goto err; |
| 2712 | 2722 | |
| 2713 | − mpa_buff_size = QED_IWARP_MAX_BUF_SIZE(params->max_mtu); | |
| 2714 | 2723 | rc = qed_iwarp_ll2_alloc_buffers(p_hwfn, |
| 2715 | 2724 | data.input.rx_num_desc, |
| 2716 | − mpa_buff_size, | |
| 2725 | + buff_size, | |
| 2717 | 2726 | iwarp_info->ll2_mpa_handle); |
| 2718 | 2727 | if (rc) |
| 2719 | 2728 | goto err; |
| @@ -2726,7 +2735,7 @@ qed_iwarp_ll2_start(struct qed_hwfn *p_hwfn, · 6 unmodified lines | ||
| 2726 | 2735 | |
| 2727 | 2736 | iwarp_info->max_num_partial_fpdus = (u16)p_hwfn->p_rdma_info->num_qps; |
| 2728 | 2737 | |
| 2729 | − iwarp_info->mpa_intermediate_buf = kzalloc(mpa_buff_size, GFP_KERNEL); | |
| 2738 | + iwarp_info->mpa_intermediate_buf = kzalloc(buff_size, GFP_KERNEL); | |
| 2730 | 2739 | if (!iwarp_info->mpa_intermediate_buf) |
| 2731 | 2740 | goto err; |
| 2732 | 2741 | |
| @@ -46,7 +46,6 @@ enum qed_iwarp_qp_state qed_roce2iwarp_state(enum qed_roce_qp_state state); · 45 unmodified lines | ||
| 46 | 46 | |
| 47 | 47 | #define QED_IWARP_LL2_SYN_TX_SIZE (128) |
| 48 | 48 | #define QED_IWARP_LL2_SYN_RX_SIZE (256) |
| 49 | −#define QED_IWARP_MAX_SYN_PKT_SIZE (128) | |
| 50 | 49 | |
| 51 | 50 | #define QED_IWARP_LL2_OOO_DEF_TX_SIZE (256) |
| 52 | 51 | #define QED_IWARP_MAX_OOO (16) |
| @@ -241,15 +241,18 @@ static inline void dwmac4_get_timestamp(void *desc, u32 ats, u64 *ts) · 240 unmodified lines | ||
| 241 | 241 | static int dwmac4_rx_check_timestamp(void *desc) |
| 242 | 242 | { |
| 243 | 243 | struct dma_desc *p = (struct dma_desc *)desc; |
| 244 | + unsigned int rdes0 = le32_to_cpu(p->des0); | |
| 245 | + unsigned int rdes1 = le32_to_cpu(p->des1); | |
| 246 | + unsigned int rdes3 = le32_to_cpu(p->des3); | |
| 244 | 247 | u32 own, ctxt; |
| 245 | 248 | int ret = 1; |
| 246 | 249 | |
| 247 | − own = p->des3 & RDES3_OWN; | |
| 248 | − ctxt = ((p->des3 & RDES3_CONTEXT_DESCRIPTOR) | |
| 250 | + own = rdes3 & RDES3_OWN; | |
| 251 | + ctxt = ((rdes3 & RDES3_CONTEXT_DESCRIPTOR) | |
| 249 | 252 | >> RDES3_CONTEXT_DESCRIPTOR_SHIFT); |
| 250 | 253 | |
| 251 | 254 | if (likely(!own && ctxt)) { |
| 252 | − if ((p->des0 == 0xffffffff) && (p->des1 == 0xffffffff)) | |
| 255 | + if ((rdes0 == 0xffffffff) && (rdes1 == 0xffffffff)) | |
| 253 | 256 | /* Corrupted value */ |
| 254 | 257 | ret = -EINVAL; |
| 255 | 258 | else |
| @@ -696,25 +696,27 @@ static int stmmac_ethtool_op_set_eee(struct net_device *dev, · 695 unmodified lines | ||
| 696 | 696 | struct ethtool_eee *edata) |
| 697 | 697 | { |
| 698 | 698 | struct stmmac_priv *priv = netdev_priv(dev); |
| 699 | + int ret; | |
| 699 | 700 | |
| 700 | − priv->eee_enabled = edata->eee_enabled; | |
| 701 | − | |
| 702 | − if (!priv->eee_enabled) | |
| 701 | + if (!edata->eee_enabled) { | |
| 703 | 702 | stmmac_disable_eee_mode(priv); |
| 704 | − else { | |
| 703 | + } else { | |
| 705 | 704 | /* We are asking for enabling the EEE but it is safe |
| 706 | 705 | * to verify all by invoking the eee_init function. |
| 707 | 706 | * In case of failure it will return an error. |
| 708 | 707 | */ |
| 709 | − priv->eee_enabled = stmmac_eee_init(priv); | |
| 710 | − if (!priv->eee_enabled) | |
| 708 | + edata->eee_enabled = stmmac_eee_init(priv); | |
| 709 | + if (!edata->eee_enabled) | |
| 711 | 710 | return -EOPNOTSUPP; |
| 712 | − | |
| 713 | − /* Do not change tx_lpi_timer in case of failure */ | |
| 714 | − priv->tx_lpi_timer = edata->tx_lpi_timer; | |
| 715 | 711 | } |
| 716 | 712 | |
| 717 | − return phy_ethtool_set_eee(dev->phydev, edata); | |
| 713 | + ret = phy_ethtool_set_eee(dev->phydev, edata); | |
| 714 | + if (ret) | |
| 715 | + return ret; | |
| 716 | + | |
| 717 | + priv->eee_enabled = edata->eee_enabled; | |
| 718 | + priv->tx_lpi_timer = edata->tx_lpi_timer; | |
| 719 | + return 0; | |
| 718 | 720 | } |
| 719 | 721 | |
| 720 | 722 | static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv) |
| @@ -259,7 +259,7 @@ static int netcp_module_probe(struct netcp_device *netcp_device, · 258 unmodified lines | ||
| 259 | 259 | const char *name; |
| 260 | 260 | char node_name[32]; |
| 261 | 261 | |
| 262 | − if (of_property_read_string(node, "label", &name) < 0) { | |
| 262 | + if (of_property_read_string(child, "label", &name) < 0) { | |
| 263 | 263 | snprintf(node_name, sizeof(node_name), "%pOFn", child); |
| 264 | 264 | name = node_name; |
| 265 | 265 | } |
| @@ -35,7 +35,10 @@ static int xgmiitorgmii_read_status(struct phy_device *phydev) · 34 unmodified lines | ||
| 35 | 35 | u16 val = 0; |
| 36 | 36 | int err; |
| 37 | 37 | |
| 38 | − err = priv->phy_drv->read_status(phydev); | |
| 38 | + if (priv->phy_drv->read_status) | |
| 39 | + err = priv->phy_drv->read_status(phydev); | |
| 40 | + else | |
| 41 | + err = genphy_read_status(phydev); | |
| 39 | 42 | if (err < 0) |
| 40 | 43 | return err; |
| 41 | 44 | |
| @@ -1201,8 +1201,8 @@ static const struct usb_device_id products[] = { · 1200 unmodified lines | ||
| 1201 | 1201 | {QMI_FIXED_INTF(0x114f, 0x68a2, 8)}, /* Sierra Wireless MC7750 */ |
| 1202 | 1202 | {QMI_FIXED_INTF(0x1199, 0x68a2, 8)}, /* Sierra Wireless MC7710 in QMI mode */ |
| 1203 | 1203 | {QMI_FIXED_INTF(0x1199, 0x68a2, 19)}, /* Sierra Wireless MC7710 in QMI mode */ |
| 1204 | − {QMI_FIXED_INTF(0x1199, 0x68c0, 8)}, /* Sierra Wireless MC7304/MC7354 */ | |
| 1205 | − {QMI_FIXED_INTF(0x1199, 0x68c0, 10)}, /* Sierra Wireless MC7304/MC7354 */ | |
| 1204 | + {QMI_QUIRK_SET_DTR(0x1199, 0x68c0, 8)}, /* Sierra Wireless MC7304/MC7354, WP76xx */ | |
| 1205 | + {QMI_QUIRK_SET_DTR(0x1199, 0x68c0, 10)},/* Sierra Wireless MC7304/MC7354 */ | |
| 1206 | 1206 | {QMI_FIXED_INTF(0x1199, 0x901c, 8)}, /* Sierra Wireless EM7700 */ |
| 1207 | 1207 | {QMI_FIXED_INTF(0x1199, 0x901f, 8)}, /* Sierra Wireless EM7355 */ |
| 1208 | 1208 | {QMI_FIXED_INTF(0x1199, 0x9041, 8)}, /* Sierra Wireless MC7305/MC7355 */ |
| @@ -557,6 +557,7 @@ enum spd_duplex { · 556 unmodified lines | ||
| 557 | 557 | /* MAC PASSTHRU */ |
| 558 | 558 | #define AD_MASK 0xfee0 |
| 559 | 559 | #define BND_MASK 0x0004 |
| 560 | +#define BD_MASK 0x0001 | |
| 560 | 561 | #define EFUSE 0xcfdb |
| 561 | 562 | #define PASS_THRU_MASK 0x1 |
| 562 | 563 | |
| @@ -1176,9 +1177,9 @@ static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa) · 613 unmodified lines | ||
| 1176 | 1177 | return -ENODEV; |
| 1177 | 1178 | } |
| 1178 | 1179 | } else { |
| 1179 | − /* test for RTL8153-BND */ | |
| 1180 | + /* test for RTL8153-BND and RTL8153-BD */ | |
| 1180 | 1181 | ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_MISC_1); |
| 1181 | − if ((ocp_data & BND_MASK) == 0) { | |
| 1182 | + if ((ocp_data & BND_MASK) == 0 && (ocp_data & BD_MASK)) { | |
| 1182 | 1183 | netif_dbg(tp, probe, tp->netdev, |
| 1183 | 1184 | "Invalid variant for MAC pass through\n"); |
| 1184 | 1185 | return -ENODEV; |
| @@ -158,39 +158,49 @@ static const struct ieee80211_ops mt76x0u_ops = { · 157 unmodified lines | ||
| 158 | 158 | .get_txpower = mt76_get_txpower, |
| 159 | 159 | }; |
| 160 | 160 | |
| 161 | −static int mt76x0u_register_device(struct mt76x02_dev *dev) | |
| 161 | +static int mt76x0u_init_hardware(struct mt76x02_dev *dev) | |
| 162 | 162 | { |
| 163 | − struct ieee80211_hw *hw = dev->mt76.hw; | |
| 164 | 163 | int err; |
| 165 | 164 | |
| 166 | − err = mt76u_alloc_queues(&dev->mt76); | |
| 167 | − if (err < 0) | |
| 168 | − goto out_err; | |
| 169 | − | |
| 170 | − err = mt76u_mcu_init_rx(&dev->mt76); | |
| 171 | − if (err < 0) | |
| 172 | − goto out_err; | |
| 173 | − | |
| 174 | 165 | mt76x0_chip_onoff(dev, true, true); |
| 175 | − if (!mt76x02_wait_for_mac(&dev->mt76)) { | |
| 176 | − err = -ETIMEDOUT; | |
| 177 | − goto out_err; | |
| 178 | − } | |
| 166 | + | |
| 167 | + if (!mt76x02_wait_for_mac(&dev->mt76)) | |
| 168 | + return -ETIMEDOUT; | |
| 179 | 169 | |
| 180 | 170 | err = mt76x0u_mcu_init(dev); |
| 181 | 171 | if (err < 0) |
| 182 | − goto out_err; | |
| 172 | + return err; | |
| 183 | 173 | |
| 184 | 174 | mt76x0_init_usb_dma(dev); |
| 185 | 175 | err = mt76x0_init_hardware(dev); |
| 186 | 176 | if (err < 0) |
| 187 | − goto out_err; | |
| 177 | + return err; | |
| 188 | 178 | |
| 189 | 179 | mt76_rmw(dev, MT_US_CYC_CFG, MT_US_CYC_CNT, 0x1e); |
| 190 | 180 | mt76_wr(dev, MT_TXOP_CTRL_CFG, |
| 191 | 181 | FIELD_PREP(MT_TXOP_TRUN_EN, 0x3f) | |
| 192 | 182 | FIELD_PREP(MT_TXOP_EXT_CCA_DLY, 0x58)); |
| 193 | 183 | |
| 184 | + return 0; | |
| 185 | +} | |
| 186 | + | |
| 187 | +static int mt76x0u_register_device(struct mt76x02_dev *dev) | |
| 188 | +{ | |
| 189 | + struct ieee80211_hw *hw = dev->mt76.hw; | |
| 190 | + int err; | |
| 191 | + | |
| 192 | + err = mt76u_alloc_queues(&dev->mt76); | |
| 193 | + if (err < 0) | |
| 194 | + goto out_err; | |
| 195 | + | |
| 196 | + err = mt76u_mcu_init_rx(&dev->mt76); | |
| 197 | + if (err < 0) | |
| 198 | + goto out_err; | |
| 199 | + | |
| 200 | + err = mt76x0u_init_hardware(dev); | |
| 201 | + if (err < 0) | |
| 202 | + goto out_err; | |
| 203 | + | |
| 194 | 204 | err = mt76x0_register_device(dev); |
| 195 | 205 | if (err < 0) |
| 196 | 206 | goto out_err; |
| @@ -301,6 +311,8 @@ static int __maybe_unused mt76x0_suspend(struct usb_interface *usb_intf, · 104 unmodified lines | ||
| 301 | 311 | |
| 302 | 312 | mt76u_stop_queues(&dev->mt76); |
| 303 | 313 | mt76x0u_mac_stop(dev); |
| 314 | + clear_bit(MT76_STATE_MCU_RUNNING, &dev->mt76.state); | |
| 315 | + mt76x0_chip_onoff(dev, false, false); | |
| 304 | 316 | usb_kill_urb(usb->mcu.res.urb); |
| 305 | 317 | |
| 306 | 318 | return 0; |
| @@ -328,7 +340,7 @@ static int __maybe_unused mt76x0_resume(struct usb_interface *usb_intf) · 21 unmodified lines | ||
| 328 | 340 | tasklet_enable(&usb->rx_tasklet); |
| 329 | 341 | tasklet_enable(&usb->tx_tasklet); |
| 330 | 342 | |
| 331 | − ret = mt76x0_init_hardware(dev); | |
| 343 | + ret = mt76x0u_init_hardware(dev); | |
| 332 | 344 | if (ret) |
| 333 | 345 | goto err; |
| 334 | 346 | |
| @@ -1785,13 +1785,13 @@ qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, · 1784 unmodified lines | ||
| 1785 | 1785 | |
| 1786 | 1786 | /* Issue Marker IOCB */ |
| 1787 | 1787 | qla2x00_marker(vha, vha->hw->req_q_map[0], |
| 1788 | − vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, | |
| 1788 | + vha->hw->rsp_q_map[0], fcport->loop_id, lun, | |
| 1789 | 1789 | flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); |
| 1790 | 1790 | } |
| 1791 | 1791 | |
| 1792 | 1792 | done_free_sp: |
| 1793 | 1793 | sp->free(sp); |
| 1794 | − sp->fcport->flags &= ~FCF_ASYNC_SENT; | |
| 1794 | + fcport->flags &= ~FCF_ASYNC_SENT; | |
| 1795 | 1795 | done: |
| 1796 | 1796 | return rval; |
| 1797 | 1797 | } |
| @@ -2951,9 +2951,6 @@ static void sd_read_block_characteristics(struct scsi_disk *sdkp) · 2950 unmodified lines | ||
| 2951 | 2951 | if (rot == 1) { |
| 2952 | 2952 | blk_queue_flag_set(QUEUE_FLAG_NONROT, q); |
| 2953 | 2953 | blk_queue_flag_clear(QUEUE_FLAG_ADD_RANDOM, q); |
| 2954 | − } else { | |
| 2955 | − blk_queue_flag_clear(QUEUE_FLAG_NONROT, q); | |
| 2956 | − blk_queue_flag_set(QUEUE_FLAG_ADD_RANDOM, q); | |
| 2957 | 2954 | } |
| 2958 | 2955 | |
| 2959 | 2956 | if (sdkp->device->type == TYPE_ZBC) { |
| @@ -3090,6 +3087,15 @@ static int sd_revalidate_disk(struct gendisk *disk) · 130 unmodified lines | ||
| 3090 | 3087 | if (sdkp->media_present) { |
| 3091 | 3088 | sd_read_capacity(sdkp, buffer); |
| 3092 | 3089 | |
| 3090 | + /* | |
| 3091 | + * set the default to rotational. All non-rotational devices | |
| 3092 | + * support the block characteristics VPD page, which will | |
| 3093 | + * cause this to be updated correctly and any device which | |
| 3094 | + * doesn't support it should be treated as rotational. | |
| 3095 | + */ | |
| 3096 | + blk_queue_flag_clear(QUEUE_FLAG_NONROT, q); | |
| 3097 | + blk_queue_flag_set(QUEUE_FLAG_ADD_RANDOM, q); | |
| 3098 | + | |
| 3093 | 3099 | if (scsi_device_supports_vpd(sdp)) { |
| 3094 | 3100 | sd_read_block_provisioning(sdkp); |
| 3095 | 3101 | sd_read_block_limits(sdkp); |
| @@ -1788,7 +1788,7 @@ static int log_used(struct vhost_virtqueue *vq, u64 used_offset, u64 len) · 1787 unmodified lines | ||
| 1788 | 1788 | |
| 1789 | 1789 | ret = translate_desc(vq, (uintptr_t)vq->used + used_offset, |
| 1790 | 1790 | len, iov, 64, VHOST_ACCESS_WO); |
| 1791 | − if (ret) | |
| 1791 | + if (ret < 0) | |
| 1792 | 1792 | return ret; |
| 1793 | 1793 | |
| 1794 | 1794 | for (i = 0; i < ret; i++) { |
| @@ -14,13 +14,30 @@ · 13 unmodified lines | ||
| 14 | 14 | #include <linux/err.h> |
| 15 | 15 | #include <linux/fs.h> |
| 16 | 16 | |
| 17 | +static inline bool spacetab(char c) { return c == ' ' || c == '\t'; } | |
| 18 | +static inline char *next_non_spacetab(char *first, const char *last) | |
| 19 | +{ | |
| 20 | + for (; first <= last; first++) | |
| 21 | + if (!spacetab(*first)) | |
| 22 | + return first; | |
| 23 | + return NULL; | |
| 24 | +} | |
| 25 | +static inline char *next_terminator(char *first, const char *last) | |
| 26 | +{ | |
| 27 | + for (; first <= last; first++) | |
| 28 | + if (spacetab(*first) || !*first) | |
| 29 | + return first; | |
| 30 | + return NULL; | |
| 31 | +} | |
| 32 | + | |
| 17 | 33 | static int load_script(struct linux_binprm *bprm) |
| 18 | 34 | { |
| 19 | 35 | const char *i_arg, *i_name; |
| 20 | − char *cp; | |
| 36 | + char *cp, *buf_end; | |
| 21 | 37 | struct file *file; |
| 22 | 38 | int retval; |
| 23 | 39 | |
| 40 | + /* Not ours to exec if we don't start with "#!". */ | |
| 24 | 41 | if ((bprm->buf[0] != '#') || (bprm->buf[1] != '!')) |
| 25 | 42 | return -ENOEXEC; |
| 26 | 43 | |
| @@ -33,18 +50,40 @@ static int load_script(struct linux_binprm *bprm) · 6 unmodified lines | ||
| 33 | 50 | if (bprm->interp_flags & BINPRM_FLAGS_PATH_INACCESSIBLE) |
| 34 | 51 | return -ENOENT; |
| 35 | 52 | |
| 36 | − /* | |
| 37 | − * This section does the #! interpretation. | |
| 38 | − * Sorta complicated, but hopefully it will work. -TYT | |
| 39 | − */ | |
| 40 | − | |
| 53 | + /* Release since we are not mapping a binary into memory. */ | |
| 41 | 54 | allow_write_access(bprm->file); |
| 42 | 55 | fput(bprm->file); |
| 43 | 56 | bprm->file = NULL; |
| 44 | 57 | |
| 45 | − bprm->buf[BINPRM_BUF_SIZE - 1] = '\0'; | |
| 46 | − if ((cp = strchr(bprm->buf, '\n')) == NULL) | |
| 47 | − cp = bprm->buf+BINPRM_BUF_SIZE-1; | |
| 58 | + /* | |
| 59 | + * This section handles parsing the #! line into separate | |
| 60 | + * interpreter path and argument strings. We must be careful | |
| 61 | + * because bprm->buf is not yet guaranteed to be NUL-terminated | |
| 62 | + * (though the buffer will have trailing NUL padding when the | |
| 63 | + * file size was smaller than the buffer size). | |
| 64 | + * | |
| 65 | + * We do not want to exec a truncated interpreter path, so either | |
| 66 | + * we find a newline (which indicates nothing is truncated), or | |
| 67 | + * we find a space/tab/NUL after the interpreter path (which | |
| 68 | + * itself may be preceded by spaces/tabs). Truncating the | |
| 69 | + * arguments is fine: the interpreter can re-read the script to | |
| 70 | + * parse them on its own. | |
| 71 | + */ | |
| 72 | + buf_end = bprm->buf + sizeof(bprm->buf) - 1; | |
| 73 | + cp = strnchr(bprm->buf, sizeof(bprm->buf), '\n'); | |
| 74 | + if (!cp) { | |
| 75 | + cp = next_non_spacetab(bprm->buf + 2, buf_end); | |
| 76 | + if (!cp) | |
| 77 | + return -ENOEXEC; /* Entire buf is spaces/tabs */ | |
| 78 | + /* | |
| 79 | + * If there is no later space/tab/NUL we must assume the | |
| 80 | + * interpreter path is truncated. | |
| 81 | + */ | |
| 82 | + if (!next_terminator(cp, buf_end)) | |
| 83 | + return -ENOEXEC; | |
| 84 | + cp = buf_end; | |
| 85 | + } | |
| 86 | + /* NUL-terminate the buffer and any trailing spaces/tabs. */ | |
| 48 | 87 | *cp = '\0'; |
| 49 | 88 | while (cp > bprm->buf) { |
| 50 | 89 | cp--; |
| @@ -238,9 +238,9 @@ out: · 237 unmodified lines | ||
| 238 | 238 | } |
| 239 | 239 | |
| 240 | 240 | /* A writeback failed: mark the page as bad, and invalidate the page cache */ |
| 241 | −static void nfs_set_pageerror(struct page *page) | |
| 241 | +static void nfs_set_pageerror(struct address_space *mapping) | |
| 242 | 242 | { |
| 243 | − nfs_zap_mapping(page_file_mapping(page)->host, page_file_mapping(page)); | |
| 243 | + nfs_zap_mapping(mapping->host, mapping); | |
| 244 | 244 | } |
| 245 | 245 | |
| 246 | 246 | /* |
| @@ -994,7 +994,7 @@ static void nfs_write_completion(struct nfs_pgio_header *hdr) · 747 unmodified lines | ||
| 994 | 994 | nfs_list_remove_request(req); |
| 995 | 995 | if (test_bit(NFS_IOHDR_ERROR, &hdr->flags) && |
| 996 | 996 | (hdr->good_bytes < bytes)) { |
| 997 | − nfs_set_pageerror(req->wb_page); | |
| 997 | + nfs_set_pageerror(page_file_mapping(req->wb_page)); | |
| 998 | 998 | nfs_context_set_write_error(req->wb_context, hdr->error); |
| 999 | 999 | goto remove_req; |
| 1000 | 1000 | } |
| @@ -1348,7 +1348,8 @@ int nfs_updatepage(struct file *file, struct page *page, · 347 unmodified lines | ||
| 1348 | 1348 | unsigned int offset, unsigned int count) |
| 1349 | 1349 | { |
| 1350 | 1350 | struct nfs_open_context *ctx = nfs_file_open_context(file); |
| 1351 | − struct inode *inode = page_file_mapping(page)->host; | |
| 1351 | + struct address_space *mapping = page_file_mapping(page); | |
| 1352 | + struct inode *inode = mapping->host; | |
| 1352 | 1353 | int status = 0; |
| 1353 | 1354 | |
| 1354 | 1355 | nfs_inc_stats(inode, NFSIOS_VFSUPDATEPAGE); |
| @@ -1366,7 +1367,7 @@ int nfs_updatepage(struct file *file, struct page *page, · 11 unmodified lines | ||
| 1366 | 1367 | |
| 1367 | 1368 | status = nfs_writepage_setup(ctx, page, offset, count); |
| 1368 | 1369 | if (status < 0) |
| 1369 | − nfs_set_pageerror(page); | |
| 1370 | + nfs_set_pageerror(mapping); | |
| 1370 | 1371 | else |
| 1371 | 1372 | __set_page_dirty_nobuffers(page); |
| 1372 | 1373 | out: |
| @@ -1239,8 +1239,8 @@ static __net_init int nfsd_init_net(struct net *net) · 1238 unmodified lines | ||
| 1239 | 1239 | retval = nfsd_idmap_init(net); |
| 1240 | 1240 | if (retval) |
| 1241 | 1241 | goto out_idmap_error; |
| 1242 | − nn->nfsd4_lease = 45; /* default lease time */ | |
| 1243 | − nn->nfsd4_grace = 45; | |
| 1242 | + nn->nfsd4_lease = 90; /* default lease time */ | |
| 1243 | + nn->nfsd4_grace = 90; | |
| 1244 | 1244 | nn->somebody_reclaimed = false; |
| 1245 | 1245 | nn->clverifier_counter = prandom_u32(); |
| 1246 | 1246 | nn->clientid_counter = prandom_u32(); |
| @@ -100,7 +100,7 @@ enum vgic_irq_config { · 99 unmodified lines | ||
| 100 | 100 | }; |
| 101 | 101 | |
| 102 | 102 | struct vgic_irq { |
| 103 | − spinlock_t irq_lock; /* Protects the content of the struct */ | |
| 103 | + raw_spinlock_t irq_lock; /* Protects the content of the struct */ | |
| 104 | 104 | struct list_head lpi_list; /* Used to link all LPIs together */ |
| 105 | 105 | struct list_head ap_list; |
| 106 | 106 | |
| @@ -256,7 +256,7 @@ struct vgic_dist { · 149 unmodified lines | ||
| 256 | 256 | u64 propbaser; |
| 257 | 257 | |
| 258 | 258 | /* Protects the lpi_list and the count value below. */ |
| 259 | − spinlock_t lpi_list_lock; | |
| 259 | + raw_spinlock_t lpi_list_lock; | |
| 260 | 260 | struct list_head lpi_list_head; |
| 261 | 261 | int lpi_list_count; |
| 262 | 262 | |
| @@ -307,7 +307,7 @@ struct vgic_cpu { · 44 unmodified lines | ||
| 307 | 307 | unsigned int used_lrs; |
| 308 | 308 | struct vgic_irq private_irqs[VGIC_NR_PRIVATE_IRQS]; |
| 309 | 309 | |
| 310 | − spinlock_t ap_list_lock; /* Protects the ap_list */ | |
| 310 | + raw_spinlock_t ap_list_lock; /* Protects the ap_list */ | |
| 311 | 311 | |
| 312 | 312 | /* |
| 313 | 313 | * List of IRQs that this VCPU should consider because they are either |
| @@ -34,6 +34,7 @@ · 33 unmodified lines | ||
| 34 | 34 | #ifndef __has_attribute |
| 35 | 35 | # define __has_attribute(x) __GCC4_has_attribute_##x |
| 36 | 36 | # define __GCC4_has_attribute___assume_aligned__ (__GNUC_MINOR__ >= 9) |
| 37 | +# define __GCC4_has_attribute___copy__ 0 | |
| 37 | 38 | # define __GCC4_has_attribute___designated_init__ 0 |
| 38 | 39 | # define __GCC4_has_attribute___externally_visible__ 1 |
| 39 | 40 | # define __GCC4_has_attribute___noclone__ 1 |
| @@ -100,6 +101,19 @@ · 60 unmodified lines | ||
| 100 | 101 | */ |
| 101 | 102 | #define __attribute_const__ __attribute__((__const__)) |
| 102 | 103 | |
| 104 | +/* | |
| 105 | + * Optional: only supported since gcc >= 9 | |
| 106 | + * Optional: not supported by clang | |
| 107 | + * Optional: not supported by icc | |
| 108 | + * | |
| 109 | + * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-copy-function-attribute | |
| 110 | + */ | |
| 111 | +#if __has_attribute(__copy__) | |
| 112 | +# define __copy(symbol) __attribute__((__copy__(symbol))) | |
| 113 | +#else | |
| 114 | +# define __copy(symbol) | |
| 115 | +#endif | |
| 116 | + | |
| 103 | 117 | /* |
| 104 | 118 | * Don't. Just don't. See commit 771c035372a0 ("deprecate the '__deprecated' |
| 105 | 119 | * attribute warnings entirely and for good") for more information. |
| @@ -1198,8 +1198,6 @@ static inline bool efi_enabled(int feature) · 1197 unmodified lines | ||
| 1198 | 1198 | extern void efi_reboot(enum reboot_mode reboot_mode, const char *__unused); |
| 1199 | 1199 | |
| 1200 | 1200 | extern bool efi_is_table_address(unsigned long phys_addr); |
| 1201 | − | |
| 1202 | −extern int efi_apply_persistent_mem_reservations(void); | |
| 1203 | 1201 | #else |
| 1204 | 1202 | static inline bool efi_enabled(int feature) |
| 1205 | 1203 | { |
| @@ -1218,11 +1216,6 @@ static inline bool efi_is_table_address(unsigned long phys_addr) · 12 unmodified lines | ||
| 1218 | 1216 | { |
| 1219 | 1217 | return false; |
| 1220 | 1218 | } |
| 1221 | − | |
| 1222 | −static inline int efi_apply_persistent_mem_reservations(void) | |
| 1223 | −{ | |
| 1224 | − return 0; | |
| 1225 | −} | |
| 1226 | 1219 | #endif |
| 1227 | 1220 | |
| 1228 | 1221 | extern int efi_status_to_err(efi_status_t status); |
| @@ -29,9 +29,6 @@ extern unsigned long max_pfn; · 28 unmodified lines | ||
| 29 | 29 | */ |
| 30 | 30 | extern unsigned long long max_possible_pfn; |
| 31 | 31 | |
| 32 | −#define INIT_MEMBLOCK_REGIONS 128 | |
| 33 | −#define INIT_PHYSMEM_REGIONS 4 | |
| 34 | − | |
| 35 | 32 | /** |
| 36 | 33 | * enum memblock_flags - definition of memory region attributes |
| 37 | 34 | * @MEMBLOCK_NONE: no special request |
| @@ -129,13 +129,13 @@ extern void cleanup_module(void); · 128 unmodified lines | ||
| 129 | 129 | #define module_init(initfn) \ |
| 130 | 130 | static inline initcall_t __maybe_unused __inittest(void) \ |
| 131 | 131 | { return initfn; } \ |
| 132 | − int init_module(void) __attribute__((alias(#initfn))); | |
| 132 | + int init_module(void) __copy(initfn) __attribute__((alias(#initfn))); | |
| 133 | 133 | |
| 134 | 134 | /* This is only required if you want to be unloadable. */ |
| 135 | 135 | #define module_exit(exitfn) \ |
| 136 | 136 | static inline exitcall_t __maybe_unused __exittest(void) \ |
| 137 | 137 | { return exitfn; } \ |
| 138 | − void cleanup_module(void) __attribute__((alias(#exitfn))); | |
| 138 | + void cleanup_module(void) __copy(exitfn) __attribute__((alias(#exitfn))); | |
| 139 | 139 | |
| 140 | 140 | #endif |
| 141 | 141 | |
| @@ -11,6 +11,8 @@ · 10 unmodified lines | ||
| 11 | 11 | #define _LINUX_NETDEV_FEATURES_H |
| 12 | 12 | |
| 13 | 13 | #include <linux/types.h> |
| 14 | +#include <linux/bitops.h> | |
| 15 | +#include <asm/byteorder.h> | |
| 14 | 16 | |
| 15 | 17 | typedef u64 netdev_features_t; |
| 16 | 18 | |
| @@ -154,8 +156,26 @@ enum { · 137 unmodified lines | ||
| 154 | 156 | #define NETIF_F_HW_TLS_TX __NETIF_F(HW_TLS_TX) |
| 155 | 157 | #define NETIF_F_HW_TLS_RX __NETIF_F(HW_TLS_RX) |
| 156 | 158 | |
| 157 | −#define for_each_netdev_feature(mask_addr, bit) \ | |
| 158 | − for_each_set_bit(bit, (unsigned long *)mask_addr, NETDEV_FEATURE_COUNT) | |
| 159 | +/* Finds the next feature with the highest number of the range of start till 0. | |
| 160 | + */ | |
| 161 | +static inline int find_next_netdev_feature(u64 feature, unsigned long start) | |
| 162 | +{ | |
| 163 | + /* like BITMAP_LAST_WORD_MASK() for u64 | |
| 164 | + * this sets the most significant 64 - start to 0. | |
| 165 | + */ | |
| 166 | + feature &= ~0ULL >> (-start & ((sizeof(feature) * 8) - 1)); | |
| 167 | + | |
| 168 | + return fls64(feature) - 1; | |
| 169 | +} | |
| 170 | + | |
| 171 | +/* This goes for the MSB to the LSB through the set feature bits, | |
| 172 | + * mask_addr should be a u64 and bit an int | |
| 173 | + */ | |
| 174 | +#define for_each_netdev_feature(mask_addr, bit) \ | |
| 175 | + for ((bit) = find_next_netdev_feature((mask_addr), \ | |
| 176 | + NETDEV_FEATURE_COUNT); \ | |
| 177 | + (bit) >= 0; \ | |
| 178 | + (bit) = find_next_netdev_feature((mask_addr), (bit) - 1)) | |
| 159 | 179 | |
| 160 | 180 | /* Features valid for ethtool to change */ |
| 161 | 181 | /* = all defined minus driver/device-class-related */ |
| @@ -447,6 +447,11 @@ struct pmu { · 446 unmodified lines | ||
| 447 | 447 | * Filter events for PMU-specific reasons. |
| 448 | 448 | */ |
| 449 | 449 | int (*filter_match) (struct perf_event *event); /* optional */ |
| 450 | + | |
| 451 | + /* | |
| 452 | + * Check period value for PERF_EVENT_IOC_PERIOD ioctl. | |
| 453 | + */ | |
| 454 | + int (*check_period) (struct perf_event *event, u64 value); /* optional */ | |
| 450 | 455 | }; |
| 451 | 456 | |
| 452 | 457 | enum perf_addr_filter_action_t { |
| @@ -2439,7 +2439,7 @@ static inline void skb_probe_transport_header(struct sk_buff *skb, · 2438 unmodified lines | ||
| 2439 | 2439 | |
| 2440 | 2440 | if (skb_flow_dissect_flow_keys_basic(skb, &keys, NULL, 0, 0, 0, 0)) |
| 2441 | 2441 | skb_set_transport_header(skb, keys.control.thoff); |
| 2442 | − else | |
| 2442 | + else if (offset_hint >= 0) | |
| 2443 | 2443 | skb_set_transport_header(skb, offset_hint); |
| 2444 | 2444 | } |
| 2445 | 2445 | |
| @@ -4235,6 +4235,12 @@ static inline bool skb_is_gso_sctp(const struct sk_buff *skb) · 1789 unmodified lines | ||
| 4235 | 4235 | return skb_shinfo(skb)->gso_type & SKB_GSO_SCTP; |
| 4236 | 4236 | } |
| 4237 | 4237 | |
| 4238 | +static inline bool skb_is_gso_tcp(const struct sk_buff *skb) | |
| 4239 | +{ | |
| 4240 | + return skb_is_gso(skb) && | |
| 4241 | + skb_shinfo(skb)->gso_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6); | |
| 4242 | +} | |
| 4243 | + | |
| 4238 | 4244 | static inline void skb_gso_reset(struct sk_buff *skb) |
| 4239 | 4245 | { |
| 4240 | 4246 | skb_shinfo(skb)->gso_size = 0; |
| @@ -57,6 +57,15 @@ static inline int virtio_net_hdr_to_skb(struct sk_buff *skb, · 56 unmodified lines | ||
| 57 | 57 | |
| 58 | 58 | if (!skb_partial_csum_set(skb, start, off)) |
| 59 | 59 | return -EINVAL; |
| 60 | + } else { | |
| 61 | + /* gso packets without NEEDS_CSUM do not set transport_offset. | |
| 62 | + * probe and drop if does not match one of the above types. | |
| 63 | + */ | |
| 64 | + if (gso_type) { | |
| 65 | + skb_probe_transport_header(skb, -1); | |
| 66 | + if (!skb_transport_header_was_set(skb)) | |
| 67 | + return -EINVAL; | |
| 68 | + } | |
| 60 | 69 | } |
| 61 | 70 | |
| 62 | 71 | if (hdr->gso_type != VIRTIO_NET_HDR_GSO_NONE) { |
| @@ -44,7 +44,7 @@ static void do_up_read(struct irq_work *entry) · 43 unmodified lines | ||
| 44 | 44 | struct stack_map_irq_work *work; |
| 45 | 45 | |
| 46 | 46 | work = container_of(entry, struct stack_map_irq_work, irq_work); |
| 47 | − up_read(work->sem); | |
| 47 | + up_read_non_owner(work->sem); | |
| 48 | 48 | work->sem = NULL; |
| 49 | 49 | } |
| 50 | 50 | |
| @@ -338,6 +338,12 @@ static void stack_map_get_build_id_offset(struct bpf_stack_build_id *id_offs, · 287 unmodified lines | ||
| 338 | 338 | } else { |
| 339 | 339 | work->sem = ¤t->mm->mmap_sem; |
| 340 | 340 | irq_work_queue(&work->irq_work); |
| 341 | + /* | |
| 342 | + * The irq_work will release the mmap_sem with | |
| 343 | + * up_read_non_owner(). The rwsem_release() is called | |
| 344 | + * here to release the lock from lockdep's perspective. | |
| 345 | + */ | |
| 346 | + rwsem_release(¤t->mm->mmap_sem.dep_map, 1, _RET_IP_); | |
| 341 | 347 | } |
| 342 | 348 | } |
| 343 | 349 | |
| @@ -4963,6 +4963,11 @@ static void __perf_event_period(struct perf_event *event, · 4962 unmodified lines | ||
| 4963 | 4963 | } |
| 4964 | 4964 | } |
| 4965 | 4965 | |
| 4966 | +static int perf_event_check_period(struct perf_event *event, u64 value) | |
| 4967 | +{ | |
| 4968 | + return event->pmu->check_period(event, value); | |
| 4969 | +} | |
| 4970 | + | |
| 4966 | 4971 | static int perf_event_period(struct perf_event *event, u64 __user *arg) |
| 4967 | 4972 | { |
| 4968 | 4973 | u64 value; |
| @@ -4979,6 +4984,9 @@ static int perf_event_period(struct perf_event *event, u64 __user *arg) · 10 unmodified lines | ||
| 4979 | 4984 | if (event->attr.freq && value > sysctl_perf_event_sample_rate) |
| 4980 | 4985 | return -EINVAL; |
| 4981 | 4986 | |
| 4987 | + if (perf_event_check_period(event, value)) | |
| 4988 | + return -EINVAL; | |
| 4989 | + | |
| 4982 | 4990 | event_function_call(event, __perf_event_period, &value); |
| 4983 | 4991 | |
| 4984 | 4992 | return 0; |
| @@ -9391,6 +9399,11 @@ static int perf_pmu_nop_int(struct pmu *pmu) · 4406 unmodified lines | ||
| 9391 | 9399 | return 0; |
| 9392 | 9400 | } |
| 9393 | 9401 | |
| 9402 | +static int perf_event_nop_int(struct perf_event *event, u64 value) | |
| 9403 | +{ | |
| 9404 | + return 0; | |
| 9405 | +} | |
| 9406 | + | |
| 9394 | 9407 | static DEFINE_PER_CPU(unsigned int, nop_txn_flags); |
| 9395 | 9408 | |
| 9396 | 9409 | static void perf_pmu_start_txn(struct pmu *pmu, unsigned int flags) |
| @@ -9691,6 +9704,9 @@ got_cpu_context: · 294 unmodified lines | ||
| 9691 | 9704 | pmu->pmu_disable = perf_pmu_nop_void; |
| 9692 | 9705 | } |
| 9693 | 9706 | |
| 9707 | + if (!pmu->check_period) | |
| 9708 | + pmu->check_period = perf_event_nop_int; | |
| 9709 | + | |
| 9694 | 9710 | if (!pmu->event_idx) |
| 9695 | 9711 | pmu->event_idx = perf_event_idx_default; |
| 9696 | 9712 | |
| @@ -734,7 +734,7 @@ struct ring_buffer *rb_alloc(int nr_pages, long watermark, int cpu, int flags) · 733 unmodified lines | ||
| 734 | 734 | size = sizeof(struct ring_buffer); |
| 735 | 735 | size += nr_pages * sizeof(void *); |
| 736 | 736 | |
| 737 | − if (order_base_2(size) >= MAX_ORDER) | |
| 737 | + if (order_base_2(size) >= PAGE_SHIFT+MAX_ORDER) | |
| 738 | 738 | goto fail; |
| 739 | 739 | |
| 740 | 740 | rb = kzalloc(size, GFP_KERNEL); |
| @@ -3384,6 +3384,8 @@ static void print_func_help_header_irq(struct trace_buffer *buf, struct seq_file · 3383 unmodified lines | ||
| 3384 | 3384 | const char tgid_space[] = " "; |
| 3385 | 3385 | const char space[] = " "; |
| 3386 | 3386 | |
| 3387 | + print_event_info(buf, m); | |
| 3388 | + | |
| 3387 | 3389 | seq_printf(m, "# %s _-----=> irqs-off\n", |
| 3388 | 3390 | tgid ? tgid_space : space); |
| 3389 | 3391 | seq_printf(m, "# %s / _----=> need-resched\n", |
| @@ -861,22 +861,14 @@ static const struct file_operations kprobe_profile_ops = { · 860 unmodified lines | ||
| 861 | 861 | static nokprobe_inline int |
| 862 | 862 | fetch_store_strlen(unsigned long addr) |
| 863 | 863 | { |
| 864 | − mm_segment_t old_fs; | |
| 865 | 864 | int ret, len = 0; |
| 866 | 865 | u8 c; |
| 867 | 866 | |
| 868 | − old_fs = get_fs(); | |
| 869 | − set_fs(KERNEL_DS); | |
| 870 | − pagefault_disable(); | |
| 871 | − | |
| 872 | 867 | do { |
| 873 | − ret = __copy_from_user_inatomic(&c, (u8 *)addr + len, 1); | |
| 868 | + ret = probe_mem_read(&c, (u8 *)addr + len, 1); | |
| 874 | 869 | len++; |
| 875 | 870 | } while (c && ret == 0 && len < MAX_STRING_SIZE); |
| 876 | 871 | |
| 877 | − pagefault_enable(); | |
| 878 | − set_fs(old_fs); | |
| 879 | − | |
| 880 | 872 | return (ret < 0) ? ret : len; |
| 881 | 873 | } |
| 882 | 874 | |
| @@ -206,8 +206,8 @@ u32 __pure __weak __crc32c_le(u32 crc, unsigned char const *p, size_t len) · 205 unmodified lines | ||
| 206 | 206 | EXPORT_SYMBOL(crc32_le); |
| 207 | 207 | EXPORT_SYMBOL(__crc32c_le); |
| 208 | 208 | |
| 209 | −u32 crc32_le_base(u32, unsigned char const *, size_t) __alias(crc32_le); | |
| 210 | −u32 __crc32c_le_base(u32, unsigned char const *, size_t) __alias(__crc32c_le); | |
| 209 | +u32 __pure crc32_le_base(u32, unsigned char const *, size_t) __alias(crc32_le); | |
| 210 | +u32 __pure __crc32c_le_base(u32, unsigned char const *, size_t) __alias(__crc32c_le); | |
| 211 | 211 | |
| 212 | 212 | /* |
| 213 | 213 | * This multiplies the polynomials x and y modulo the given modulus. |
| @@ -26,6 +26,13 @@ · 25 unmodified lines | ||
| 26 | 26 | |
| 27 | 27 | #include "internal.h" |
| 28 | 28 | |
| 29 | +#define INIT_MEMBLOCK_REGIONS 128 | |
| 30 | +#define INIT_PHYSMEM_REGIONS 4 | |
| 31 | + | |
| 32 | +#ifndef INIT_MEMBLOCK_RESERVED_REGIONS | |
| 33 | +# define INIT_MEMBLOCK_RESERVED_REGIONS INIT_MEMBLOCK_REGIONS | |
| 34 | +#endif | |
| 35 | + | |
| 29 | 36 | /** |
| 30 | 37 | * DOC: memblock overview |
| 31 | 38 | * |
| @@ -92,7 +99,7 @@ unsigned long max_pfn; · 60 unmodified lines | ||
| 92 | 99 | unsigned long long max_possible_pfn; |
| 93 | 100 | |
| 94 | 101 | static struct memblock_region memblock_memory_init_regions[INIT_MEMBLOCK_REGIONS] __initdata_memblock; |
| 95 | −static struct memblock_region memblock_reserved_init_regions[INIT_MEMBLOCK_REGIONS] __initdata_memblock; | |
| 102 | +static struct memblock_region memblock_reserved_init_regions[INIT_MEMBLOCK_RESERVED_REGIONS] __initdata_memblock; | |
| 96 | 103 | #ifdef CONFIG_HAVE_MEMBLOCK_PHYS_MAP |
| 97 | 104 | static struct memblock_region memblock_physmem_init_regions[INIT_PHYSMEM_REGIONS] __initdata_memblock; |
| 98 | 105 | #endif |
| @@ -105,7 +112,7 @@ struct memblock memblock __initdata_memblock = { · 6 unmodified lines | ||
| 105 | 112 | |
| 106 | 113 | .reserved.regions = memblock_reserved_init_regions, |
| 107 | 114 | .reserved.cnt = 1, /* empty dummy entry */ |
| 108 | − .reserved.max = INIT_MEMBLOCK_REGIONS, | |
| 115 | + .reserved.max = INIT_MEMBLOCK_RESERVED_REGIONS, | |
| 109 | 116 | .reserved.name = "reserved", |
| 110 | 117 | |
| 111 | 118 | #ifdef CONFIG_HAVE_MEMBLOCK_PHYS_MAP |
| @@ -4675,11 +4675,11 @@ refill: · 4674 unmodified lines | ||
| 4675 | 4675 | /* Even if we own the page, we do not use atomic_set(). |
| 4676 | 4676 | * This would break get_page_unless_zero() users. |
| 4677 | 4677 | */ |
| 4678 | − page_ref_add(page, size); | |
| 4678 | + page_ref_add(page, PAGE_FRAG_CACHE_MAX_SIZE); | |
| 4679 | 4679 | |
| 4680 | 4680 | /* reset page count bias and offset to start of new frag */ |
| 4681 | 4681 | nc->pfmemalloc = page_is_pfmemalloc(page); |
| 4682 | − nc->pagecnt_bias = size + 1; | |
| 4682 | + nc->pagecnt_bias = PAGE_FRAG_CACHE_MAX_SIZE + 1; | |
| 4683 | 4683 | nc->offset = size; |
| 4684 | 4684 | } |
| 4685 | 4685 | |
| @@ -4695,10 +4695,10 @@ refill: · 9 unmodified lines | ||
| 4695 | 4695 | size = nc->size; |
| 4696 | 4696 | #endif |
| 4697 | 4697 | /* OK, page count is 0, we can safely set it */ |
| 4698 | − set_page_count(page, size + 1); | |
| 4698 | + set_page_count(page, PAGE_FRAG_CACHE_MAX_SIZE + 1); | |
| 4699 | 4699 | |
| 4700 | 4700 | /* reset page count bias and offset to start of new frag */ |
| 4701 | − nc->pagecnt_bias = size + 1; | |
| 4701 | + nc->pagecnt_bias = PAGE_FRAG_CACHE_MAX_SIZE + 1; | |
| 4702 | 4702 | offset = size - fragsz; |
| 4703 | 4703 | } |
| 4704 | 4704 | |
| @@ -8215,7 +8215,7 @@ static netdev_features_t netdev_sync_upper_features(struct net_device *lower, · 8214 unmodified lines | ||
| 8215 | 8215 | netdev_features_t feature; |
| 8216 | 8216 | int feature_bit; |
| 8217 | 8217 | |
| 8218 | − for_each_netdev_feature(&upper_disables, feature_bit) { | |
| 8218 | + for_each_netdev_feature(upper_disables, feature_bit) { | |
| 8219 | 8219 | feature = __NETIF_F_BIT(feature_bit); |
| 8220 | 8220 | if (!(upper->wanted_features & feature) |
| 8221 | 8221 | && (features & feature)) { |
| @@ -8235,7 +8235,7 @@ static void netdev_sync_lower_features(struct net_device *upper, · 13 unmodified lines | ||
| 8235 | 8235 | netdev_features_t feature; |
| 8236 | 8236 | int feature_bit; |
| 8237 | 8237 | |
| 8238 | − for_each_netdev_feature(&upper_disables, feature_bit) { | |
| 8238 | + for_each_netdev_feature(upper_disables, feature_bit) { | |
| 8239 | 8239 | feature = __NETIF_F_BIT(feature_bit); |
| 8240 | 8240 | if (!(features & feature) && (lower->features & feature)) { |
| 8241 | 8241 | netdev_dbg(upper, "Disabling feature %pNF on lower dev %s.\n", |
| @@ -2804,8 +2804,7 @@ static int bpf_skb_proto_4_to_6(struct sk_buff *skb) · 2803 unmodified lines | ||
| 2804 | 2804 | u32 off = skb_mac_header_len(skb); |
| 2805 | 2805 | int ret; |
| 2806 | 2806 | |
| 2807 | − /* SCTP uses GSO_BY_FRAGS, thus cannot adjust it. */ | |
| 2808 | − if (skb_is_gso(skb) && unlikely(skb_is_gso_sctp(skb))) | |
| 2807 | + if (!skb_is_gso_tcp(skb)) | |
| 2809 | 2808 | return -ENOTSUPP; |
| 2810 | 2809 | |
| 2811 | 2810 | ret = skb_cow(skb, len_diff); |
| @@ -2846,8 +2845,7 @@ static int bpf_skb_proto_6_to_4(struct sk_buff *skb) · 34 unmodified lines | ||
| 2846 | 2845 | u32 off = skb_mac_header_len(skb); |
| 2847 | 2846 | int ret; |
| 2848 | 2847 | |
| 2849 | − /* SCTP uses GSO_BY_FRAGS, thus cannot adjust it. */ | |
| 2850 | − if (skb_is_gso(skb) && unlikely(skb_is_gso_sctp(skb))) | |
| 2848 | + if (!skb_is_gso_tcp(skb)) | |
| 2851 | 2849 | return -ENOTSUPP; |
| 2852 | 2850 | |
| 2853 | 2851 | ret = skb_unclone(skb, GFP_ATOMIC); |
| @@ -2972,8 +2970,7 @@ static int bpf_skb_net_grow(struct sk_buff *skb, u32 len_diff) · 118 unmodified lines | ||
| 2972 | 2970 | u32 off = skb_mac_header_len(skb) + bpf_skb_net_base_len(skb); |
| 2973 | 2971 | int ret; |
| 2974 | 2972 | |
| 2975 | − /* SCTP uses GSO_BY_FRAGS, thus cannot adjust it. */ | |
| 2976 | − if (skb_is_gso(skb) && unlikely(skb_is_gso_sctp(skb))) | |
| 2973 | + if (!skb_is_gso_tcp(skb)) | |
| 2977 | 2974 | return -ENOTSUPP; |
| 2978 | 2975 | |
| 2979 | 2976 | ret = skb_cow(skb, len_diff); |
| @@ -3002,8 +2999,7 @@ static int bpf_skb_net_shrink(struct sk_buff *skb, u32 len_diff) · 22 unmodified lines | ||
| 3002 | 2999 | u32 off = skb_mac_header_len(skb) + bpf_skb_net_base_len(skb); |
| 3003 | 3000 | int ret; |
| 3004 | 3001 | |
| 3005 | − /* SCTP uses GSO_BY_FRAGS, thus cannot adjust it. */ | |
| 3006 | − if (skb_is_gso(skb) && unlikely(skb_is_gso_sctp(skb))) | |
| 3002 | + if (!skb_is_gso_tcp(skb)) | |
| 3007 | 3003 | return -ENOTSUPP; |
| 3008 | 3004 | |
| 3009 | 3005 | ret = skb_unclone(skb, GFP_ATOMIC); |
| @@ -356,6 +356,8 @@ static void *__netdev_alloc_frag(unsigned int fragsz, gfp_t gfp_mask) · 355 unmodified lines | ||
| 356 | 356 | */ |
| 357 | 357 | void *netdev_alloc_frag(unsigned int fragsz) |
| 358 | 358 | { |
| 359 | + fragsz = SKB_DATA_ALIGN(fragsz); | |
| 360 | + | |
| 359 | 361 | return __netdev_alloc_frag(fragsz, GFP_ATOMIC); |
| 360 | 362 | } |
| 361 | 363 | EXPORT_SYMBOL(netdev_alloc_frag); |
| @@ -369,6 +371,8 @@ static void *__napi_alloc_frag(unsigned int fragsz, gfp_t gfp_mask) · 7 unmodified lines | ||
| 369 | 371 | |
| 370 | 372 | void *napi_alloc_frag(unsigned int fragsz) |
| 371 | 373 | { |
| 374 | + fragsz = SKB_DATA_ALIGN(fragsz); | |
| 375 | + | |
| 372 | 376 | return __napi_alloc_frag(fragsz, GFP_ATOMIC); |
| 373 | 377 | } |
| 374 | 378 | EXPORT_SYMBOL(napi_alloc_frag); |
| @@ -2546,6 +2546,7 @@ void tcp_write_queue_purge(struct sock *sk) · 2545 unmodified lines | ||
| 2546 | 2546 | sk_mem_reclaim(sk); |
| 2547 | 2547 | tcp_clear_all_retrans_hints(tcp_sk(sk)); |
| 2548 | 2548 | tcp_sk(sk)->packets_out = 0; |
| 2549 | + inet_csk(sk)->icsk_backoff = 0; | |
| 2549 | 2550 | } |
| 2550 | 2551 | |
| 2551 | 2552 | int tcp_disconnect(struct sock *sk, int flags) |
| @@ -2596,6 +2597,7 @@ int tcp_disconnect(struct sock *sk, int flags) · 44 unmodified lines | ||
| 2596 | 2597 | if (tp->write_seq == 0) |
| 2597 | 2598 | tp->write_seq = 1; |
| 2598 | 2599 | icsk->icsk_backoff = 0; |
| 2600 | + tp->snd_cwnd = 2; | |
| 2599 | 2601 | icsk->icsk_probes_out = 0; |
| 2600 | 2602 | icsk->icsk_rto = TCP_TIMEOUT_INIT; |
| 2601 | 2603 | tp->snd_ssthresh = TCP_INFINITE_SSTHRESH; |
| @@ -536,12 +536,15 @@ int tcp_v4_err(struct sk_buff *icmp_skb, u32 info) · 535 unmodified lines | ||
| 536 | 536 | if (sock_owned_by_user(sk)) |
| 537 | 537 | break; |
| 538 | 538 | |
| 539 | + skb = tcp_rtx_queue_head(sk); | |
| 540 | + if (WARN_ON_ONCE(!skb)) | |
| 541 | + break; | |
| 542 | + | |
| 539 | 543 | icsk->icsk_backoff--; |
| 540 | 544 | icsk->icsk_rto = tp->srtt_us ? __tcp_set_rto(tp) : |
| 541 | 545 | TCP_TIMEOUT_INIT; |
| 542 | 546 | icsk->icsk_rto = inet_csk_rto_backoff(icsk, TCP_RTO_MAX); |
| 543 | 547 | |
| 544 | − skb = tcp_rtx_queue_head(sk); | |
| 545 | 548 | |
| 546 | 549 | tcp_mstamp_refresh(tp); |
| 547 | 550 | delta_us = (u32)(tp->tcp_mstamp - tcp_skb_timestamp_us(skb)); |
| @@ -1719,6 +1719,24 @@ static int ip6erspan_tap_validate(struct nlattr *tb[], struct nlattr *data[], · 1718 unmodified lines | ||
| 1719 | 1719 | return 0; |
| 1720 | 1720 | } |
| 1721 | 1721 | |
| 1722 | +static void ip6erspan_set_version(struct nlattr *data[], | |
| 1723 | + struct __ip6_tnl_parm *parms) | |
| 1724 | +{ | |
| 1725 | + parms->erspan_ver = 1; | |
| 1726 | + if (data[IFLA_GRE_ERSPAN_VER]) | |
| 1727 | + parms->erspan_ver = nla_get_u8(data[IFLA_GRE_ERSPAN_VER]); | |
| 1728 | + | |
| 1729 | + if (parms->erspan_ver == 1) { | |
| 1730 | + if (data[IFLA_GRE_ERSPAN_INDEX]) | |
| 1731 | + parms->index = nla_get_u32(data[IFLA_GRE_ERSPAN_INDEX]); | |
| 1732 | + } else if (parms->erspan_ver == 2) { | |
| 1733 | + if (data[IFLA_GRE_ERSPAN_DIR]) | |
| 1734 | + parms->dir = nla_get_u8(data[IFLA_GRE_ERSPAN_DIR]); | |
| 1735 | + if (data[IFLA_GRE_ERSPAN_HWID]) | |
| 1736 | + parms->hwid = nla_get_u16(data[IFLA_GRE_ERSPAN_HWID]); | |
| 1737 | + } | |
| 1738 | +} | |
| 1739 | + | |
| 1722 | 1740 | static void ip6gre_netlink_parms(struct nlattr *data[], |
| 1723 | 1741 | struct __ip6_tnl_parm *parms) |
| 1724 | 1742 | { |
| @@ -1767,20 +1785,6 @@ static void ip6gre_netlink_parms(struct nlattr *data[], · 42 unmodified lines | ||
| 1767 | 1785 | |
| 1768 | 1786 | if (data[IFLA_GRE_COLLECT_METADATA]) |
| 1769 | 1787 | parms->collect_md = true; |
| 1770 | − | |
| 1771 | − parms->erspan_ver = 1; | |
| 1772 | − if (data[IFLA_GRE_ERSPAN_VER]) | |
| 1773 | − parms->erspan_ver = nla_get_u8(data[IFLA_GRE_ERSPAN_VER]); | |
| 1774 | − | |
| 1775 | − if (parms->erspan_ver == 1) { | |
| 1776 | − if (data[IFLA_GRE_ERSPAN_INDEX]) | |
| 1777 | − parms->index = nla_get_u32(data[IFLA_GRE_ERSPAN_INDEX]); | |
| 1778 | − } else if (parms->erspan_ver == 2) { | |
| 1779 | − if (data[IFLA_GRE_ERSPAN_DIR]) | |
| 1780 | − parms->dir = nla_get_u8(data[IFLA_GRE_ERSPAN_DIR]); | |
| 1781 | − if (data[IFLA_GRE_ERSPAN_HWID]) | |
| 1782 | − parms->hwid = nla_get_u16(data[IFLA_GRE_ERSPAN_HWID]); | |
| 1783 | − } | |
| 1784 | 1788 | } |
| 1785 | 1789 | |
| 1786 | 1790 | static int ip6gre_tap_init(struct net_device *dev) |
| @@ -2203,6 +2207,7 @@ static int ip6erspan_newlink(struct net *src_net, struct net_device *dev, · 416 unmodified lines | ||
| 2203 | 2207 | int err; |
| 2204 | 2208 | |
| 2205 | 2209 | ip6gre_netlink_parms(data, &nt->parms); |
| 2210 | + ip6erspan_set_version(data, &nt->parms); | |
| 2206 | 2211 | ign = net_generic(net, ip6gre_net_id); |
| 2207 | 2212 | |
| 2208 | 2213 | if (nt->parms.collect_md) { |
| @@ -2248,6 +2253,7 @@ static int ip6erspan_changelink(struct net_device *dev, struct nlattr *tb[], · 39 unmodified lines | ||
| 2248 | 2253 | if (IS_ERR(t)) |
| 2249 | 2254 | return PTR_ERR(t); |
| 2250 | 2255 | |
| 2256 | + ip6erspan_set_version(data, &p); | |
| 2251 | 2257 | ip6gre_tunnel_unlink_md(ign, t); |
| 2252 | 2258 | ip6gre_tunnel_unlink(ign, t); |
| 2253 | 2259 | ip6erspan_tnl_change(t, &p, !tb[IFLA_MTU]); |
| @@ -941,6 +941,7 @@ static int ieee80211_start_ap(struct wiphy *wiphy, struct net_device *dev, · 940 unmodified lines | ||
| 941 | 941 | BSS_CHANGED_P2P_PS | |
| 942 | 942 | BSS_CHANGED_TXPOWER; |
| 943 | 943 | int err; |
| 944 | + int prev_beacon_int; | |
| 944 | 945 | |
| 945 | 946 | old = sdata_dereference(sdata->u.ap.beacon, sdata); |
| 946 | 947 | if (old) |
| @@ -963,6 +964,7 @@ static int ieee80211_start_ap(struct wiphy *wiphy, struct net_device *dev, · 16 unmodified lines | ||
| 963 | 964 | |
| 964 | 965 | sdata->needed_rx_chains = sdata->local->rx_chains; |
| 965 | 966 | |
| 967 | + prev_beacon_int = sdata->vif.bss_conf.beacon_int; | |
| 966 | 968 | sdata->vif.bss_conf.beacon_int = params->beacon_interval; |
| 967 | 969 | |
| 968 | 970 | if (params->he_cap) |
| @@ -974,8 +976,10 @@ static int ieee80211_start_ap(struct wiphy *wiphy, struct net_device *dev, · 5 unmodified lines | ||
| 974 | 976 | if (!err) |
| 975 | 977 | ieee80211_vif_copy_chanctx_to_vlans(sdata, false); |
| 976 | 978 | mutex_unlock(&local->mtx); |
| 977 | − if (err) | |
| 979 | + if (err) { | |
| 980 | + sdata->vif.bss_conf.beacon_int = prev_beacon_int; | |
| 978 | 981 | return err; |
| 982 | + } | |
| 979 | 983 | |
| 980 | 984 | /* |
| 981 | 985 | * Apply control port protocol, this allows us to |
| @@ -70,6 +70,7 @@ enum mesh_deferred_task_flags { · 69 unmodified lines | ||
| 70 | 70 | * @dst: mesh path destination mac address |
| 71 | 71 | * @mpp: mesh proxy mac address |
| 72 | 72 | * @rhash: rhashtable list pointer |
| 73 | + * @walk_list: linked list containing all mesh_path objects. | |
| 73 | 74 | * @gate_list: list pointer for known gates list |
| 74 | 75 | * @sdata: mesh subif |
| 75 | 76 | * @next_hop: mesh neighbor to which frames for this destination will be |
| @@ -106,6 +107,7 @@ struct mesh_path { · 30 unmodified lines | ||
| 106 | 107 | u8 dst[ETH_ALEN]; |
| 107 | 108 | u8 mpp[ETH_ALEN]; /* used for MPP or MAP */ |
| 108 | 109 | struct rhash_head rhash; |
| 110 | + struct hlist_node walk_list; | |
| 109 | 111 | struct hlist_node gate_list; |
| 110 | 112 | struct ieee80211_sub_if_data *sdata; |
| 111 | 113 | struct sta_info __rcu *next_hop; |
| @@ -135,12 +137,16 @@ struct mesh_path { · 23 unmodified lines | ||
| 135 | 137 | * gate's mpath may or may not be resolved and active. |
| 136 | 138 | * @gates_lock: protects updates to known_gates |
| 137 | 139 | * @rhead: the rhashtable containing struct mesh_paths, keyed by dest addr |
| 140 | + * @walk_head: linked list containging all mesh_path objects | |
| 141 | + * @walk_lock: lock protecting walk_head | |
| 138 | 142 | * @entries: number of entries in the table |
| 139 | 143 | */ |
| 140 | 144 | struct mesh_table { |
| 141 | 145 | struct hlist_head known_gates; |
| 142 | 146 | spinlock_t gates_lock; |
| 143 | 147 | struct rhashtable rhead; |
| 148 | + struct hlist_head walk_head; | |
| 149 | + spinlock_t walk_lock; | |
| 144 | 150 | atomic_t entries; /* Up to MAX_MESH_NEIGHBOURS */ |
| 145 | 151 | }; |
| 146 | 152 | |
| @@ -59,8 +59,10 @@ static struct mesh_table *mesh_table_alloc(void) · 58 unmodified lines | ||
| 59 | 59 | return NULL; |
| 60 | 60 | |
| 61 | 61 | INIT_HLIST_HEAD(&newtbl->known_gates); |
| 62 | + INIT_HLIST_HEAD(&newtbl->walk_head); | |
| 62 | 63 | atomic_set(&newtbl->entries, 0); |
| 63 | 64 | spin_lock_init(&newtbl->gates_lock); |
| 65 | + spin_lock_init(&newtbl->walk_lock); | |
| 64 | 66 | |
| 65 | 67 | return newtbl; |
| 66 | 68 | } |
| @@ -249,28 +251,15 @@ mpp_path_lookup(struct ieee80211_sub_if_data *sdata, const u8 *dst) · 182 unmodified lines | ||
| 249 | 251 | static struct mesh_path * |
| 250 | 252 | __mesh_path_lookup_by_idx(struct mesh_table *tbl, int idx) |
| 251 | 253 | { |
| 252 | − int i = 0, ret; | |
| 253 | − struct mesh_path *mpath = NULL; | |
| 254 | − struct rhashtable_iter iter; | |
| 255 | − | |
| 256 | − ret = rhashtable_walk_init(&tbl->rhead, &iter, GFP_ATOMIC); | |
| 257 | − if (ret) | |
| 258 | − return NULL; | |
| 259 | − | |
| 260 | − rhashtable_walk_start(&iter); | |
| 254 | + int i = 0; | |
| 255 | + struct mesh_path *mpath; | |
| 261 | 256 | |
| 262 | − while ((mpath = rhashtable_walk_next(&iter))) { | |
| 263 | − if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN) | |
| 264 | − continue; | |
| 265 | − if (IS_ERR(mpath)) | |
| 266 | − break; | |
| 257 | + hlist_for_each_entry_rcu(mpath, &tbl->walk_head, walk_list) { | |
| 267 | 258 | if (i++ == idx) |
| 268 | 259 | break; |
| 269 | 260 | } |
| 270 | − rhashtable_walk_stop(&iter); | |
| 271 | − rhashtable_walk_exit(&iter); | |
| 272 | 261 | |
| 273 | − if (IS_ERR(mpath) || !mpath) | |
| 262 | + if (!mpath) | |
| 274 | 263 | return NULL; |
| 275 | 264 | |
| 276 | 265 | if (mpath_expired(mpath)) { |
| @@ -432,6 +421,7 @@ struct mesh_path *mesh_path_add(struct ieee80211_sub_if_data *sdata, · 155 unmodified lines | ||
| 432 | 421 | return ERR_PTR(-ENOMEM); |
| 433 | 422 | |
| 434 | 423 | tbl = sdata->u.mesh.mesh_paths; |
| 424 | + spin_lock_bh(&tbl->walk_lock); | |
| 435 | 425 | do { |
| 436 | 426 | ret = rhashtable_lookup_insert_fast(&tbl->rhead, |
| 437 | 427 | &new_mpath->rhash, |
| @@ -441,20 +431,20 @@ struct mesh_path *mesh_path_add(struct ieee80211_sub_if_data *sdata, · 3 unmodified lines | ||
| 441 | 431 | mpath = rhashtable_lookup_fast(&tbl->rhead, |
| 442 | 432 | dst, |
| 443 | 433 | mesh_rht_params); |
| 444 | − | |
| 434 | + else if (!ret) | |
| 435 | + hlist_add_head(&new_mpath->walk_list, &tbl->walk_head); | |
| 445 | 436 | } while (unlikely(ret == -EEXIST && !mpath)); |
| 437 | + spin_unlock_bh(&tbl->walk_lock); | |
| 446 | 438 | |
| 447 | − if (ret && ret != -EEXIST) | |
| 448 | − return ERR_PTR(ret); | |
| 449 | − | |
| 450 | − /* At this point either new_mpath was added, or we found a | |
| 451 | − * matching entry already in the table; in the latter case | |
| 452 | − * free the unnecessary new entry. | |
| 453 | − */ | |
| 454 | − if (ret == -EEXIST) { | |
| 439 | + if (ret) { | |
| 455 | 440 | kfree(new_mpath); |
| 441 | + | |
| 442 | + if (ret != -EEXIST) | |
| 443 | + return ERR_PTR(ret); | |
| 444 | + | |
| 456 | 445 | new_mpath = mpath; |
| 457 | 446 | } |
| 447 | + | |
| 458 | 448 | sdata->u.mesh.mesh_paths_generation++; |
| 459 | 449 | return new_mpath; |
| 460 | 450 | } |
| @@ -480,9 +470,17 @@ int mpp_path_add(struct ieee80211_sub_if_data *sdata, · 19 unmodified lines | ||
| 480 | 470 | |
| 481 | 471 | memcpy(new_mpath->mpp, mpp, ETH_ALEN); |
| 482 | 472 | tbl = sdata->u.mesh.mpp_paths; |
| 473 | + | |
| 474 | + spin_lock_bh(&tbl->walk_lock); | |
| 483 | 475 | ret = rhashtable_lookup_insert_fast(&tbl->rhead, |
| 484 | 476 | &new_mpath->rhash, |
| 485 | 477 | mesh_rht_params); |
| 478 | + if (!ret) | |
| 479 | + hlist_add_head_rcu(&new_mpath->walk_list, &tbl->walk_head); | |
| 480 | + spin_unlock_bh(&tbl->walk_lock); | |
| 481 | + | |
| 482 | + if (ret) | |
| 483 | + kfree(new_mpath); | |
| 486 | 484 | |
| 487 | 485 | sdata->u.mesh.mpp_paths_generation++; |
| 488 | 486 | return ret; |
| @@ -503,20 +501,9 @@ void mesh_plink_broken(struct sta_info *sta) · 14 unmodified lines | ||
| 503 | 501 | struct mesh_table *tbl = sdata->u.mesh.mesh_paths; |
| 504 | 502 | static const u8 bcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; |
| 505 | 503 | struct mesh_path *mpath; |
| 506 | − struct rhashtable_iter iter; | |
| 507 | − int ret; | |
| 508 | − | |
| 509 | − ret = rhashtable_walk_init(&tbl->rhead, &iter, GFP_ATOMIC); | |
| 510 | − if (ret) | |
| 511 | − return; | |
| 512 | 504 | |
| 513 | − rhashtable_walk_start(&iter); | |
| 514 | − | |
| 515 | − while ((mpath = rhashtable_walk_next(&iter))) { | |
| 516 | − if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN) | |
| 517 | − continue; | |
| 518 | − if (IS_ERR(mpath)) | |
| 519 | − break; | |
| 505 | + rcu_read_lock(); | |
| 506 | + hlist_for_each_entry_rcu(mpath, &tbl->walk_head, walk_list) { | |
| 520 | 507 | if (rcu_access_pointer(mpath->next_hop) == sta && |
| 521 | 508 | mpath->flags & MESH_PATH_ACTIVE && |
| 522 | 509 | !(mpath->flags & MESH_PATH_FIXED)) { |
| @@ -530,8 +517,7 @@ void mesh_plink_broken(struct sta_info *sta) · 7 unmodified lines | ||
| 530 | 517 | WLAN_REASON_MESH_PATH_DEST_UNREACHABLE, bcast); |
| 531 | 518 | } |
| 532 | 519 | } |
| 533 | − rhashtable_walk_stop(&iter); | |
| 534 | − rhashtable_walk_exit(&iter); | |
| 520 | + rcu_read_unlock(); | |
| 535 | 521 | } |
| 536 | 522 | |
| 537 | 523 | static void mesh_path_free_rcu(struct mesh_table *tbl, |
| @@ -551,6 +537,7 @@ static void mesh_path_free_rcu(struct mesh_table *tbl, · 13 unmodified lines | ||
| 551 | 537 | |
| 552 | 538 | static void __mesh_path_del(struct mesh_table *tbl, struct mesh_path *mpath) |
| 553 | 539 | { |
| 540 | + hlist_del_rcu(&mpath->walk_list); | |
| 554 | 541 | rhashtable_remove_fast(&tbl->rhead, &mpath->rhash, mesh_rht_params); |
| 555 | 542 | mesh_path_free_rcu(tbl, mpath); |
| 556 | 543 | } |
| @@ -571,27 +558,14 @@ void mesh_path_flush_by_nexthop(struct sta_info *sta) · 14 unmodified lines | ||
| 571 | 558 | struct ieee80211_sub_if_data *sdata = sta->sdata; |
| 572 | 559 | struct mesh_table *tbl = sdata->u.mesh.mesh_paths; |
| 573 | 560 | struct mesh_path *mpath; |
| 574 | − struct rhashtable_iter iter; | |
| 575 | − int ret; | |
| 576 | − | |
| 577 | − ret = rhashtable_walk_init(&tbl->rhead, &iter, GFP_ATOMIC); | |
| 578 | − if (ret) | |
| 579 | − return; | |
| 580 | − | |
| 581 | − rhashtable_walk_start(&iter); | |
| 582 | − | |
| 583 | − while ((mpath = rhashtable_walk_next(&iter))) { | |
| 584 | − if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN) | |
| 585 | − continue; | |
| 586 | − if (IS_ERR(mpath)) | |
| 587 | − break; | |
| 561 | + struct hlist_node *n; | |
| 588 | 562 | |
| 563 | + spin_lock_bh(&tbl->walk_lock); | |
| 564 | + hlist_for_each_entry_safe(mpath, n, &tbl->walk_head, walk_list) { | |
| 589 | 565 | if (rcu_access_pointer(mpath->next_hop) == sta) |
| 590 | 566 | __mesh_path_del(tbl, mpath); |
| 591 | 567 | } |
| 592 | − | |
| 593 | − rhashtable_walk_stop(&iter); | |
| 594 | − rhashtable_walk_exit(&iter); | |
| 568 | + spin_unlock_bh(&tbl->walk_lock); | |
| 595 | 569 | } |
| 596 | 570 | |
| 597 | 571 | static void mpp_flush_by_proxy(struct ieee80211_sub_if_data *sdata, |
| @@ -599,51 +573,26 @@ static void mpp_flush_by_proxy(struct ieee80211_sub_if_data *sdata, · 1 unmodified line | ||
| 599 | 573 | { |
| 600 | 574 | struct mesh_table *tbl = sdata->u.mesh.mpp_paths; |
| 601 | 575 | struct mesh_path *mpath; |
| 602 | − struct rhashtable_iter iter; | |
| 603 | − int ret; | |
| 604 | − | |
| 605 | − ret = rhashtable_walk_init(&tbl->rhead, &iter, GFP_ATOMIC); | |
| 606 | − if (ret) | |
| 607 | − return; | |
| 608 | − | |
| 609 | − rhashtable_walk_start(&iter); | |
| 610 | − | |
| 611 | − while ((mpath = rhashtable_walk_next(&iter))) { | |
| 612 | − if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN) | |
| 613 | − continue; | |
| 614 | − if (IS_ERR(mpath)) | |
| 615 | − break; | |
| 576 | + struct hlist_node *n; | |
| 616 | 577 | |
| 578 | + spin_lock_bh(&tbl->walk_lock); | |
| 579 | + hlist_for_each_entry_safe(mpath, n, &tbl->walk_head, walk_list) { | |
| 617 | 580 | if (ether_addr_equal(mpath->mpp, proxy)) |
| 618 | 581 | __mesh_path_del(tbl, mpath); |
| 619 | 582 | } |
| 620 | − | |
| 621 | − rhashtable_walk_stop(&iter); | |
| 622 | − rhashtable_walk_exit(&iter); | |
| 583 | + spin_unlock_bh(&tbl->walk_lock); | |
| 623 | 584 | } |
| 624 | 585 | |
| 625 | 586 | static void table_flush_by_iface(struct mesh_table *tbl) |
| 626 | 587 | { |
| 627 | 588 | struct mesh_path *mpath; |
| 628 | − struct rhashtable_iter iter; | |
| 629 | − int ret; | |
| 630 | − | |
| 631 | − ret = rhashtable_walk_init(&tbl->rhead, &iter, GFP_ATOMIC); | |
| 632 | − if (ret) | |
| 633 | − return; | |
| 634 | − | |
| 635 | − rhashtable_walk_start(&iter); | |
| 589 | + struct hlist_node *n; | |
| 636 | 590 | |
| 637 | − while ((mpath = rhashtable_walk_next(&iter))) { | |
| 638 | − if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN) | |
| 639 | − continue; | |
| 640 | − if (IS_ERR(mpath)) | |
| 641 | − break; | |
| 591 | + spin_lock_bh(&tbl->walk_lock); | |
| 592 | + hlist_for_each_entry_safe(mpath, n, &tbl->walk_head, walk_list) { | |
| 642 | 593 | __mesh_path_del(tbl, mpath); |
| 643 | 594 | } |
| 644 | − | |
| 645 | − rhashtable_walk_stop(&iter); | |
| 646 | − rhashtable_walk_exit(&iter); | |
| 595 | + spin_unlock_bh(&tbl->walk_lock); | |
| 647 | 596 | } |
| 648 | 597 | |
| 649 | 598 | /** |
| @@ -675,15 +624,15 @@ static int table_path_del(struct mesh_table *tbl, · 25 unmodified lines | ||
| 675 | 624 | { |
| 676 | 625 | struct mesh_path *mpath; |
| 677 | 626 | |
| 678 | − rcu_read_lock(); | |
| 627 | + spin_lock_bh(&tbl->walk_lock); | |
| 679 | 628 | mpath = rhashtable_lookup_fast(&tbl->rhead, addr, mesh_rht_params); |
| 680 | 629 | if (!mpath) { |
| 681 | − rcu_read_unlock(); | |
| 630 | + spin_unlock_bh(&tbl->walk_lock); | |
| 682 | 631 | return -ENXIO; |
| 683 | 632 | } |
| 684 | 633 | |
| 685 | 634 | __mesh_path_del(tbl, mpath); |
| 686 | − rcu_read_unlock(); | |
| 635 | + spin_unlock_bh(&tbl->walk_lock); | |
| 687 | 636 | return 0; |
| 688 | 637 | } |
| 689 | 638 | |
| @@ -854,28 +803,16 @@ void mesh_path_tbl_expire(struct ieee80211_sub_if_data *sdata, · 164 unmodified lines | ||
| 854 | 803 | struct mesh_table *tbl) |
| 855 | 804 | { |
| 856 | 805 | struct mesh_path *mpath; |
| 857 | − struct rhashtable_iter iter; | |
| 858 | − int ret; | |
| 806 | + struct hlist_node *n; | |
| 859 | 807 | |
| 860 | − ret = rhashtable_walk_init(&tbl->rhead, &iter, GFP_KERNEL); | |
| 861 | − if (ret) | |
| 862 | − return; | |
| 863 | − | |
| 864 | − rhashtable_walk_start(&iter); | |
| 865 | − | |
| 866 | − while ((mpath = rhashtable_walk_next(&iter))) { | |
| 867 | − if (IS_ERR(mpath) && PTR_ERR(mpath) == -EAGAIN) | |
| 868 | − continue; | |
| 869 | − if (IS_ERR(mpath)) | |
| 870 | − break; | |
| 808 | + spin_lock_bh(&tbl->walk_lock); | |
| 809 | + hlist_for_each_entry_safe(mpath, n, &tbl->walk_head, walk_list) { | |
| 871 | 810 | if ((!(mpath->flags & MESH_PATH_RESOLVING)) && |
| 872 | 811 | (!(mpath->flags & MESH_PATH_FIXED)) && |
| 873 | 812 | time_after(jiffies, mpath->exp_time + MESH_PATH_EXPIRE)) |
| 874 | 813 | __mesh_path_del(tbl, mpath); |
| 875 | 814 | } |
| 876 | − | |
| 877 | − rhashtable_walk_stop(&iter); | |
| 878 | − rhashtable_walk_exit(&iter); | |
| 815 | + spin_unlock_bh(&tbl->walk_lock); | |
| 879 | 816 | } |
| 880 | 817 | |
| 881 | 818 | void mesh_path_expire(struct ieee80211_sub_if_data *sdata) |
| @@ -896,12 +896,13 @@ ip_vs_new_dest(struct ip_vs_service *svc, struct ip_vs_dest_user_kern *udest, · 895 unmodified lines | ||
| 896 | 896 | { |
| 897 | 897 | struct ip_vs_dest *dest; |
| 898 | 898 | unsigned int atype, i; |
| 899 | − int ret = 0; | |
| 900 | 899 | |
| 901 | 900 | EnterFunction(2); |
| 902 | 901 | |
| 903 | 902 | #ifdef CONFIG_IP_VS_IPV6 |
| 904 | 903 | if (udest->af == AF_INET6) { |
| 904 | + int ret; | |
| 905 | + | |
| 905 | 906 | atype = ipv6_addr_type(&udest->addr.in6); |
| 906 | 907 | if ((!(atype & IPV6_ADDR_UNICAST) || |
| 907 | 908 | atype & IPV6_ADDR_LINKLOCAL) && |
| @@ -328,6 +328,9 @@ static int nft_delrule_by_chain(struct nft_ctx *ctx) · 327 unmodified lines | ||
| 328 | 328 | int err; |
| 329 | 329 | |
| 330 | 330 | list_for_each_entry(rule, &ctx->chain->rules, list) { |
| 331 | + if (!nft_is_active_next(ctx->net, rule)) | |
| 332 | + continue; | |
| 333 | + | |
| 331 | 334 | err = nft_delrule(ctx, rule); |
| 332 | 335 | if (err < 0) |
| 333 | 336 | return err; |
| @@ -44,7 +44,7 @@ krb5_make_rc4_seq_num(struct krb5_ctx *kctx, int direction, s32 seqnum, · 43 unmodified lines | ||
| 44 | 44 | unsigned char *cksum, unsigned char *buf) |
| 45 | 45 | { |
| 46 | 46 | struct crypto_sync_skcipher *cipher; |
| 47 | − unsigned char plain[8]; | |
| 47 | + unsigned char *plain; | |
| 48 | 48 | s32 code; |
| 49 | 49 | |
| 50 | 50 | dprintk("RPC: %s:\n", __func__); |
| @@ -52,6 +52,10 @@ krb5_make_rc4_seq_num(struct krb5_ctx *kctx, int direction, s32 seqnum, · 1 unmodified line | ||
| 52 | 52 | if (IS_ERR(cipher)) |
| 53 | 53 | return PTR_ERR(cipher); |
| 54 | 54 | |
| 55 | + plain = kmalloc(8, GFP_NOFS); | |
| 56 | + if (!plain) | |
| 57 | + return -ENOMEM; | |
| 58 | + | |
| 55 | 59 | plain[0] = (unsigned char) ((seqnum >> 24) & 0xff); |
| 56 | 60 | plain[1] = (unsigned char) ((seqnum >> 16) & 0xff); |
| 57 | 61 | plain[2] = (unsigned char) ((seqnum >> 8) & 0xff); |
| @@ -67,6 +71,7 @@ krb5_make_rc4_seq_num(struct krb5_ctx *kctx, int direction, s32 seqnum, · 9 unmodified lines | ||
| 67 | 71 | |
| 68 | 72 | code = krb5_encrypt(cipher, cksum, plain, buf, 8); |
| 69 | 73 | out: |
| 74 | + kfree(plain); | |
| 70 | 75 | crypto_free_sync_skcipher(cipher); |
| 71 | 76 | return code; |
| 72 | 77 | } |
| @@ -77,12 +82,17 @@ krb5_make_seq_num(struct krb5_ctx *kctx, · 4 unmodified lines | ||
| 77 | 82 | u32 seqnum, |
| 78 | 83 | unsigned char *cksum, unsigned char *buf) |
| 79 | 84 | { |
| 80 | − unsigned char plain[8]; | |
| 85 | + unsigned char *plain; | |
| 86 | + s32 code; | |
| 81 | 87 | |
| 82 | 88 | if (kctx->enctype == ENCTYPE_ARCFOUR_HMAC) |
| 83 | 89 | return krb5_make_rc4_seq_num(kctx, direction, seqnum, |
| 84 | 90 | cksum, buf); |
| 85 | 91 | |
| 92 | + plain = kmalloc(8, GFP_NOFS); | |
| 93 | + if (!plain) | |
| 94 | + return -ENOMEM; | |
| 95 | + | |
| 86 | 96 | plain[0] = (unsigned char) (seqnum & 0xff); |
| 87 | 97 | plain[1] = (unsigned char) ((seqnum >> 8) & 0xff); |
| 88 | 98 | plain[2] = (unsigned char) ((seqnum >> 16) & 0xff); |
| @@ -93,7 +103,9 @@ krb5_make_seq_num(struct krb5_ctx *kctx, · 4 unmodified lines | ||
| 93 | 103 | plain[6] = direction; |
| 94 | 104 | plain[7] = direction; |
| 95 | 105 | |
| 96 | − return krb5_encrypt(key, cksum, plain, buf, 8); | |
| 106 | + code = krb5_encrypt(key, cksum, plain, buf, 8); | |
| 107 | + kfree(plain); | |
| 108 | + return code; | |
| 97 | 109 | } |
| 98 | 110 | |
| 99 | 111 | static s32 |
| @@ -101,7 +113,7 @@ krb5_get_rc4_seq_num(struct krb5_ctx *kctx, unsigned char *cksum, · 1 unmodified line | ||
| 101 | 113 | unsigned char *buf, int *direction, s32 *seqnum) |
| 102 | 114 | { |
| 103 | 115 | struct crypto_sync_skcipher *cipher; |
| 104 | − unsigned char plain[8]; | |
| 116 | + unsigned char *plain; | |
| 105 | 117 | s32 code; |
| 106 | 118 | |
| 107 | 119 | dprintk("RPC: %s:\n", __func__); |
| @@ -113,20 +125,28 @@ krb5_get_rc4_seq_num(struct krb5_ctx *kctx, unsigned char *cksum, · 5 unmodified lines | ||
| 113 | 125 | if (code) |
| 114 | 126 | goto out; |
| 115 | 127 | |
| 128 | + plain = kmalloc(8, GFP_NOFS); | |
| 129 | + if (!plain) { | |
| 130 | + code = -ENOMEM; | |
| 131 | + goto out; | |
| 132 | + } | |
| 133 | + | |
| 116 | 134 | code = krb5_decrypt(cipher, cksum, buf, plain, 8); |
| 117 | 135 | if (code) |
| 118 | − goto out; | |
| 136 | + goto out_plain; | |
| 119 | 137 | |
| 120 | 138 | if ((plain[4] != plain[5]) || (plain[4] != plain[6]) |
| 121 | 139 | || (plain[4] != plain[7])) { |
| 122 | 140 | code = (s32)KG_BAD_SEQ; |
| 123 | − goto out; | |
| 141 | + goto out_plain; | |
| 124 | 142 | } |
| 125 | 143 | |
| 126 | 144 | *direction = plain[4]; |
| 127 | 145 | |
| 128 | 146 | *seqnum = ((plain[0] << 24) | (plain[1] << 16) | |
| 129 | 147 | (plain[2] << 8) | (plain[3])); |
| 148 | +out_plain: | |
| 149 | + kfree(plain); | |
| 130 | 150 | out: |
| 131 | 151 | crypto_free_sync_skcipher(cipher); |
| 132 | 152 | return code; |
| @@ -139,7 +159,7 @@ krb5_get_seq_num(struct krb5_ctx *kctx, · 6 unmodified lines | ||
| 139 | 159 | int *direction, u32 *seqnum) |
| 140 | 160 | { |
| 141 | 161 | s32 code; |
| 142 | − unsigned char plain[8]; | |
| 162 | + unsigned char *plain; | |
| 143 | 163 | struct crypto_sync_skcipher *key = kctx->seq; |
| 144 | 164 | |
| 145 | 165 | dprintk("RPC: krb5_get_seq_num:\n"); |
| @@ -147,18 +167,25 @@ krb5_get_seq_num(struct krb5_ctx *kctx, · 1 unmodified line | ||
| 147 | 167 | if (kctx->enctype == ENCTYPE_ARCFOUR_HMAC) |
| 148 | 168 | return krb5_get_rc4_seq_num(kctx, cksum, buf, |
| 149 | 169 | direction, seqnum); |
| 170 | + plain = kmalloc(8, GFP_NOFS); | |
| 171 | + if (!plain) | |
| 172 | + return -ENOMEM; | |
| 150 | 173 | |
| 151 | 174 | if ((code = krb5_decrypt(key, cksum, buf, plain, 8))) |
| 152 | − return code; | |
| 175 | + goto out; | |
| 153 | 176 | |
| 154 | 177 | if ((plain[4] != plain[5]) || (plain[4] != plain[6]) || |
| 155 | − (plain[4] != plain[7])) | |
| 156 | − return (s32)KG_BAD_SEQ; | |
| 178 | + (plain[4] != plain[7])) { | |
| 179 | + code = (s32)KG_BAD_SEQ; | |
| 180 | + goto out; | |
| 181 | + } | |
| 157 | 182 | |
| 158 | 183 | *direction = plain[4]; |
| 159 | 184 | |
| 160 | 185 | *seqnum = ((plain[0]) | |
| 161 | 186 | (plain[1] << 8) | (plain[2] << 16) | (plain[3] << 24)); |
| 162 | 187 | |
| 163 | − return 0; | |
| 188 | +out: | |
| 189 | + kfree(plain); | |
| 190 | + return code; | |
| 164 | 191 | } |
| @@ -146,7 +146,7 @@ rpc_clnt_debugfs_register(struct rpc_clnt *clnt) · 145 unmodified lines | ||
| 146 | 146 | rcu_read_lock(); |
| 147 | 147 | xprt = rcu_dereference(clnt->cl_xprt); |
| 148 | 148 | /* no "debugfs" dentry? Don't bother with the symlink. */ |
| 149 | − if (!xprt->debugfs) { | |
| 149 | + if (IS_ERR_OR_NULL(xprt->debugfs)) { | |
| 150 | 150 | rcu_read_unlock(); |
| 151 | 151 | return; |
| 152 | 152 | } |
| @@ -527,7 +527,8 @@ rpcrdma_ep_create(struct rpcrdma_ep *ep, struct rpcrdma_ia *ia, · 526 unmodified lines | ||
| 527 | 527 | |
| 528 | 528 | sendcq = ib_alloc_cq(ia->ri_device, NULL, |
| 529 | 529 | ep->rep_attr.cap.max_send_wr + 1, |
| 530 | − 1, IB_POLL_WORKQUEUE); | |
| 530 | + ia->ri_device->num_comp_vectors > 1 ? 1 : 0, | |
| 531 | + IB_POLL_WORKQUEUE); | |
| 531 | 532 | if (IS_ERR(sendcq)) { |
| 532 | 533 | rc = PTR_ERR(sendcq); |
| 533 | 534 | goto out1; |
| @@ -129,9 +129,10 @@ int xdp_umem_assign_dev(struct xdp_umem *umem, struct net_device *dev, · 128 unmodified lines | ||
| 129 | 129 | return 0; |
| 130 | 130 | |
| 131 | 131 | err_unreg_umem: |
| 132 | − xdp_clear_umem_at_qid(dev, queue_id); | |
| 133 | 132 | if (!force_zc) |
| 134 | 133 | err = 0; /* fallback to copy mode */ |
| 134 | + if (err) | |
| 135 | + xdp_clear_umem_at_qid(dev, queue_id); | |
| 135 | 136 | out_rtnl_unlock: |
| 136 | 137 | rtnl_unlock(); |
| 137 | 138 | return err; |
| @@ -265,10 +266,10 @@ static int xdp_umem_pin_pages(struct xdp_umem *umem) · 127 unmodified lines | ||
| 265 | 266 | if (!umem->pgs) |
| 266 | 267 | return -ENOMEM; |
| 267 | 268 | |
| 268 | − down_write(¤t->mm->mmap_sem); | |
| 269 | − npgs = get_user_pages(umem->address, umem->npgs, | |
| 270 | − gup_flags, &umem->pgs[0], NULL); | |
| 271 | − up_write(¤t->mm->mmap_sem); | |
| 269 | + down_read(¤t->mm->mmap_sem); | |
| 270 | + npgs = get_user_pages_longterm(umem->address, umem->npgs, | |
| 271 | + gup_flags, &umem->pgs[0], NULL); | |
| 272 | + up_read(¤t->mm->mmap_sem); | |
| 272 | 273 | |
| 273 | 274 | if (npgs != umem->npgs) { |
| 274 | 275 | if (npgs >= 0) { |
| @@ -669,6 +669,8 @@ static int xsk_mmap(struct file *file, struct socket *sock, · 668 unmodified lines | ||
| 669 | 669 | if (!umem) |
| 670 | 670 | return -EINVAL; |
| 671 | 671 | |
| 672 | + /* Matches the smp_wmb() in XDP_UMEM_REG */ | |
| 673 | + smp_rmb(); | |
| 672 | 674 | if (offset == XDP_UMEM_PGOFF_FILL_RING) |
| 673 | 675 | q = READ_ONCE(umem->fq); |
| 674 | 676 | else if (offset == XDP_UMEM_PGOFF_COMPLETION_RING) |
| @@ -678,6 +680,8 @@ static int xsk_mmap(struct file *file, struct socket *sock, · 3 unmodified lines | ||
| 678 | 680 | if (!q) |
| 679 | 681 | return -EINVAL; |
| 680 | 682 | |
| 683 | + /* Matches the smp_wmb() in xsk_init_queue */ | |
| 684 | + smp_rmb(); | |
| 681 | 685 | qpg = virt_to_head_page(q->ring); |
| 682 | 686 | if (size > (PAGE_SIZE << compound_order(qpg))) |
| 683 | 687 | return -EINVAL; |
| @@ -626,6 +626,13 @@ static void vcpu_req_sleep(struct kvm_vcpu *vcpu) · 625 unmodified lines | ||
| 626 | 626 | /* Awaken to handle a signal, request we sleep again later. */ |
| 627 | 627 | kvm_make_request(KVM_REQ_SLEEP, vcpu); |
| 628 | 628 | } |
| 629 | + | |
| 630 | + /* | |
| 631 | + * Make sure we will observe a potential reset request if we've | |
| 632 | + * observed a change to the power state. Pairs with the smp_wmb() in | |
| 633 | + * kvm_psci_vcpu_on(). | |
| 634 | + */ | |
| 635 | + smp_rmb(); | |
| 629 | 636 | } |
| 630 | 637 | |
| 631 | 638 | static int kvm_vcpu_initialized(struct kvm_vcpu *vcpu) |
| @@ -639,6 +646,9 @@ static void check_vcpu_requests(struct kvm_vcpu *vcpu) · 7 unmodified lines | ||
| 639 | 646 | if (kvm_check_request(KVM_REQ_SLEEP, vcpu)) |
| 640 | 647 | vcpu_req_sleep(vcpu); |
| 641 | 648 | |
| 649 | + if (kvm_check_request(KVM_REQ_VCPU_RESET, vcpu)) | |
| 650 | + kvm_reset_vcpu(vcpu); | |
| 651 | + | |
| 642 | 652 | /* |
| 643 | 653 | * Clear IRQ_PENDING requests that were made to guarantee |
| 644 | 654 | * that a VCPU sees new virtual interrupts. |
| @@ -1695,11 +1695,14 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, · 1694 unmodified lines | ||
| 1695 | 1695 | |
| 1696 | 1696 | vma_pagesize = vma_kernel_pagesize(vma); |
| 1697 | 1697 | /* |
| 1698 | − * PUD level may not exist for a VM but PMD is guaranteed to | |
| 1699 | − * exist. | |
| 1698 | + * The stage2 has a minimum of 2 level table (For arm64 see | |
| 1699 | + * kvm_arm_setup_stage2()). Hence, we are guaranteed that we can | |
| 1700 | + * use PMD_SIZE huge mappings (even when the PMD is folded into PGD). | |
| 1701 | + * As for PUD huge maps, we must make sure that we have at least | |
| 1702 | + * 3 levels, i.e, PMD is not folded. | |
| 1700 | 1703 | */ |
| 1701 | 1704 | if ((vma_pagesize == PMD_SIZE || |
| 1702 | − (vma_pagesize == PUD_SIZE && kvm_stage2_has_pud(kvm))) && | |
| 1705 | + (vma_pagesize == PUD_SIZE && kvm_stage2_has_pmd(kvm))) && | |
| 1703 | 1706 | !force_pte) { |
| 1704 | 1707 | gfn = (fault_ipa & huge_page_mask(hstate_vma(vma))) >> PAGE_SHIFT; |
| 1705 | 1708 | } |
| @@ -104,12 +104,10 @@ static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu) · 103 unmodified lines | ||
| 104 | 104 | |
| 105 | 105 | static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu) |
| 106 | 106 | { |
| 107 | + struct vcpu_reset_state *reset_state; | |
| 107 | 108 | struct kvm *kvm = source_vcpu->kvm; |
| 108 | 109 | struct kvm_vcpu *vcpu = NULL; |
| 109 | − struct swait_queue_head *wq; | |
| 110 | 110 | unsigned long cpu_id; |
| 111 | − unsigned long context_id; | |
| 112 | − phys_addr_t target_pc; | |
| 113 | 111 | |
| 114 | 112 | cpu_id = smccc_get_arg1(source_vcpu) & MPIDR_HWID_BITMASK; |
| 115 | 113 | if (vcpu_mode_is_32bit(source_vcpu)) |
| @@ -130,32 +128,30 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu) · 14 unmodified lines | ||
| 130 | 128 | return PSCI_RET_INVALID_PARAMS; |
| 131 | 129 | } |
| 132 | 130 | |
| 133 | − target_pc = smccc_get_arg2(source_vcpu); | |
| 134 | − context_id = smccc_get_arg3(source_vcpu); | |
| 131 | + reset_state = &vcpu->arch.reset_state; | |
| 135 | 132 | |
| 136 | − kvm_reset_vcpu(vcpu); | |
| 137 | − | |
| 138 | − /* Gracefully handle Thumb2 entry point */ | |
| 139 | − if (vcpu_mode_is_32bit(vcpu) && (target_pc & 1)) { | |
| 140 | − target_pc &= ~((phys_addr_t) 1); | |
| 141 | − vcpu_set_thumb(vcpu); | |
| 142 | − } | |
| 133 | + reset_state->pc = smccc_get_arg2(source_vcpu); | |
| 143 | 134 | |
| 144 | 135 | /* Propagate caller endianness */ |
| 145 | − if (kvm_vcpu_is_be(source_vcpu)) | |
| 146 | − kvm_vcpu_set_be(vcpu); | |
| 136 | + reset_state->be = kvm_vcpu_is_be(source_vcpu); | |
| 147 | 137 | |
| 148 | − *vcpu_pc(vcpu) = target_pc; | |
| 149 | 138 | /* |
| 150 | 139 | * NOTE: We always update r0 (or x0) because for PSCI v0.1 |
| 151 | 140 | * the general puspose registers are undefined upon CPU_ON. |
| 152 | 141 | */ |
| 153 | − smccc_set_retval(vcpu, context_id, 0, 0, 0); | |
| 154 | − vcpu->arch.power_off = false; | |
| 155 | − smp_mb(); /* Make sure the above is visible */ | |
| 142 | + reset_state->r0 = smccc_get_arg3(source_vcpu); | |
| 143 | + | |
| 144 | + WRITE_ONCE(reset_state->reset, true); | |
| 145 | + kvm_make_request(KVM_REQ_VCPU_RESET, vcpu); | |
| 156 | 146 | |
| 157 | − wq = kvm_arch_vcpu_wq(vcpu); | |
| 158 | − swake_up_one(wq); | |
| 147 | + /* | |
| 148 | + * Make sure the reset request is observed if the change to | |
| 149 | + * power_state is observed. | |
| 150 | + */ | |
| 151 | + smp_wmb(); | |
| 152 | + | |
| 153 | + vcpu->arch.power_off = false; | |
| 154 | + kvm_vcpu_wake_up(vcpu); | |
| 159 | 155 | |
| 160 | 156 | return PSCI_RET_SUCCESS; |
| 161 | 157 | } |
| @@ -251,9 +251,9 @@ static int vgic_debug_show(struct seq_file *s, void *v) · 250 unmodified lines | ||
| 251 | 251 | return 0; |
| 252 | 252 | } |
| 253 | 253 | |
| 254 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 254 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 255 | 255 | print_irq_state(s, irq, vcpu); |
| 256 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 256 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 257 | 257 | |
| 258 | 258 | vgic_put_irq(kvm, irq); |
| 259 | 259 | return 0; |
| @@ -64,7 +64,7 @@ void kvm_vgic_early_init(struct kvm *kvm) · 63 unmodified lines | ||
| 64 | 64 | struct vgic_dist *dist = &kvm->arch.vgic; |
| 65 | 65 | |
| 66 | 66 | INIT_LIST_HEAD(&dist->lpi_list_head); |
| 67 | − spin_lock_init(&dist->lpi_list_lock); | |
| 67 | + raw_spin_lock_init(&dist->lpi_list_lock); | |
| 68 | 68 | } |
| 69 | 69 | |
| 70 | 70 | /* CREATION */ |
| @@ -171,7 +171,7 @@ static int kvm_vgic_dist_init(struct kvm *kvm, unsigned int nr_spis) · 100 unmodified lines | ||
| 171 | 171 | |
| 172 | 172 | irq->intid = i + VGIC_NR_PRIVATE_IRQS; |
| 173 | 173 | INIT_LIST_HEAD(&irq->ap_list); |
| 174 | − spin_lock_init(&irq->irq_lock); | |
| 174 | + raw_spin_lock_init(&irq->irq_lock); | |
| 175 | 175 | irq->vcpu = NULL; |
| 176 | 176 | irq->target_vcpu = vcpu0; |
| 177 | 177 | kref_init(&irq->refcount); |
| @@ -206,7 +206,7 @@ int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu) · 28 unmodified lines | ||
| 206 | 206 | vgic_cpu->sgi_iodev.base_addr = VGIC_ADDR_UNDEF; |
| 207 | 207 | |
| 208 | 208 | INIT_LIST_HEAD(&vgic_cpu->ap_list_head); |
| 209 | − spin_lock_init(&vgic_cpu->ap_list_lock); | |
| 209 | + raw_spin_lock_init(&vgic_cpu->ap_list_lock); | |
| 210 | 210 | |
| 211 | 211 | /* |
| 212 | 212 | * Enable and configure all SGIs to be edge-triggered and |
| @@ -216,7 +216,7 @@ int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu) · 3 unmodified lines | ||
| 216 | 216 | struct vgic_irq *irq = &vgic_cpu->private_irqs[i]; |
| 217 | 217 | |
| 218 | 218 | INIT_LIST_HEAD(&irq->ap_list); |
| 219 | − spin_lock_init(&irq->irq_lock); | |
| 219 | + raw_spin_lock_init(&irq->irq_lock); | |
| 220 | 220 | irq->intid = i; |
| 221 | 221 | irq->vcpu = NULL; |
| 222 | 222 | irq->target_vcpu = vcpu; |
| @@ -231,13 +231,6 @@ int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu) · 8 unmodified lines | ||
| 231 | 231 | irq->config = VGIC_CONFIG_LEVEL; |
| 232 | 232 | } |
| 233 | 233 | |
| 234 | − /* | |
| 235 | − * GICv3 can only be created via the KVM_DEVICE_CREATE API and | |
| 236 | − * so we always know the emulation type at this point as it's | |
| 237 | − * either explicitly configured as GICv3, or explicitly | |
| 238 | − * configured as GICv2, or not configured yet which also | |
| 239 | − * implies GICv2. | |
| 240 | − */ | |
| 241 | 234 | if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) |
| 242 | 235 | irq->group = 1; |
| 243 | 236 | else |
| @@ -281,7 +274,7 @@ int vgic_init(struct kvm *kvm) · 37 unmodified lines | ||
| 281 | 274 | { |
| 282 | 275 | struct vgic_dist *dist = &kvm->arch.vgic; |
| 283 | 276 | struct kvm_vcpu *vcpu; |
| 284 | − int ret = 0, i; | |
| 277 | + int ret = 0, i, idx; | |
| 285 | 278 | |
| 286 | 279 | if (vgic_initialized(kvm)) |
| 287 | 280 | return 0; |
| @@ -298,6 +291,19 @@ int vgic_init(struct kvm *kvm) · 10 unmodified lines | ||
| 298 | 291 | if (ret) |
| 299 | 292 | goto out; |
| 300 | 293 | |
| 294 | + /* Initialize groups on CPUs created before the VGIC type was known */ | |
| 295 | + kvm_for_each_vcpu(idx, vcpu, kvm) { | |
| 296 | + struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; | |
| 297 | + | |
| 298 | + for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) { | |
| 299 | + struct vgic_irq *irq = &vgic_cpu->private_irqs[i]; | |
| 300 | + if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) | |
| 301 | + irq->group = 1; | |
| 302 | + else | |
| 303 | + irq->group = 0; | |
| 304 | + } | |
| 305 | + } | |
| 306 | + | |
| 301 | 307 | if (vgic_has_its(kvm)) { |
| 302 | 308 | ret = vgic_v4_init(kvm); |
| 303 | 309 | if (ret) |
| @@ -65,7 +65,7 @@ static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid, · 64 unmodified lines | ||
| 65 | 65 | |
| 66 | 66 | INIT_LIST_HEAD(&irq->lpi_list); |
| 67 | 67 | INIT_LIST_HEAD(&irq->ap_list); |
| 68 | − spin_lock_init(&irq->irq_lock); | |
| 68 | + raw_spin_lock_init(&irq->irq_lock); | |
| 69 | 69 | |
| 70 | 70 | irq->config = VGIC_CONFIG_EDGE; |
| 71 | 71 | kref_init(&irq->refcount); |
| @@ -73,7 +73,7 @@ static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid, · 1 unmodified line | ||
| 73 | 73 | irq->target_vcpu = vcpu; |
| 74 | 74 | irq->group = 1; |
| 75 | 75 | |
| 76 | − spin_lock_irqsave(&dist->lpi_list_lock, flags); | |
| 76 | + raw_spin_lock_irqsave(&dist->lpi_list_lock, flags); | |
| 77 | 77 | |
| 78 | 78 | /* |
| 79 | 79 | * There could be a race with another vgic_add_lpi(), so we need to |
| @@ -101,7 +101,7 @@ static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid, · 21 unmodified lines | ||
| 101 | 101 | dist->lpi_list_count++; |
| 102 | 102 | |
| 103 | 103 | out_unlock: |
| 104 | − spin_unlock_irqrestore(&dist->lpi_list_lock, flags); | |
| 104 | + raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags); | |
| 105 | 105 | |
| 106 | 106 | /* |
| 107 | 107 | * We "cache" the configuration table entries in our struct vgic_irq's. |
| @@ -287,7 +287,7 @@ static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq, · 179 unmodified lines | ||
| 287 | 287 | if (ret) |
| 288 | 288 | return ret; |
| 289 | 289 | |
| 290 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 290 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 291 | 291 | |
| 292 | 292 | if (!filter_vcpu || filter_vcpu == irq->target_vcpu) { |
| 293 | 293 | irq->priority = LPI_PROP_PRIORITY(prop); |
| @@ -299,7 +299,7 @@ static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq, · 5 unmodified lines | ||
| 299 | 299 | } |
| 300 | 300 | } |
| 301 | 301 | |
| 302 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 302 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 303 | 303 | |
| 304 | 304 | if (irq->hw) |
| 305 | 305 | return its_prop_update_vlpi(irq->host_irq, prop, needs_inv); |
| @@ -332,7 +332,7 @@ int vgic_copy_lpi_list(struct kvm *kvm, struct kvm_vcpu *vcpu, u32 **intid_ptr) · 26 unmodified lines | ||
| 332 | 332 | if (!intids) |
| 333 | 333 | return -ENOMEM; |
| 334 | 334 | |
| 335 | − spin_lock_irqsave(&dist->lpi_list_lock, flags); | |
| 335 | + raw_spin_lock_irqsave(&dist->lpi_list_lock, flags); | |
| 336 | 336 | list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) { |
| 337 | 337 | if (i == irq_count) |
| 338 | 338 | break; |
| @@ -341,7 +341,7 @@ int vgic_copy_lpi_list(struct kvm *kvm, struct kvm_vcpu *vcpu, u32 **intid_ptr) · 2 unmodified lines | ||
| 341 | 341 | continue; |
| 342 | 342 | intids[i++] = irq->intid; |
| 343 | 343 | } |
| 344 | − spin_unlock_irqrestore(&dist->lpi_list_lock, flags); | |
| 344 | + raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags); | |
| 345 | 345 | |
| 346 | 346 | *intid_ptr = intids; |
| 347 | 347 | return i; |
| @@ -352,9 +352,9 @@ static int update_affinity(struct vgic_irq *irq, struct kvm_vcpu *vcpu) · 4 unmodified lines | ||
| 352 | 352 | int ret = 0; |
| 353 | 353 | unsigned long flags; |
| 354 | 354 | |
| 355 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 355 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 356 | 356 | irq->target_vcpu = vcpu; |
| 357 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 357 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 358 | 358 | |
| 359 | 359 | if (irq->hw) { |
| 360 | 360 | struct its_vlpi_map map; |
| @@ -455,7 +455,7 @@ static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu) · 94 unmodified lines | ||
| 455 | 455 | } |
| 456 | 456 | |
| 457 | 457 | irq = vgic_get_irq(vcpu->kvm, NULL, intids[i]); |
| 458 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 458 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 459 | 459 | irq->pending_latch = pendmask & (1U << bit_nr); |
| 460 | 460 | vgic_queue_irq_unlock(vcpu->kvm, irq, flags); |
| 461 | 461 | vgic_put_irq(vcpu->kvm, irq); |
| @@ -612,7 +612,7 @@ static int vgic_its_trigger_msi(struct kvm *kvm, struct vgic_its *its, · 150 unmodified lines | ||
| 612 | 612 | return irq_set_irqchip_state(irq->host_irq, |
| 613 | 613 | IRQCHIP_STATE_PENDING, true); |
| 614 | 614 | |
| 615 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 615 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 616 | 616 | irq->pending_latch = true; |
| 617 | 617 | vgic_queue_irq_unlock(kvm, irq, flags); |
| 618 | 618 | |
| @@ -147,7 +147,7 @@ static void vgic_mmio_write_sgir(struct kvm_vcpu *source_vcpu, · 146 unmodified lines | ||
| 147 | 147 | |
| 148 | 148 | irq = vgic_get_irq(source_vcpu->kvm, vcpu, intid); |
| 149 | 149 | |
| 150 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 150 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 151 | 151 | irq->pending_latch = true; |
| 152 | 152 | irq->source |= 1U << source_vcpu->vcpu_id; |
| 153 | 153 | |
| @@ -191,13 +191,13 @@ static void vgic_mmio_write_target(struct kvm_vcpu *vcpu, · 37 unmodified lines | ||
| 191 | 191 | struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, NULL, intid + i); |
| 192 | 192 | int target; |
| 193 | 193 | |
| 194 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 194 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 195 | 195 | |
| 196 | 196 | irq->targets = (val >> (i * 8)) & cpu_mask; |
| 197 | 197 | target = irq->targets ? __ffs(irq->targets) : 0; |
| 198 | 198 | irq->target_vcpu = kvm_get_vcpu(vcpu->kvm, target); |
| 199 | 199 | |
| 200 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 200 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 201 | 201 | vgic_put_irq(vcpu->kvm, irq); |
| 202 | 202 | } |
| 203 | 203 | } |
| @@ -230,13 +230,13 @@ static void vgic_mmio_write_sgipendc(struct kvm_vcpu *vcpu, · 26 unmodified lines | ||
| 230 | 230 | for (i = 0; i < len; i++) { |
| 231 | 231 | struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); |
| 232 | 232 | |
| 233 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 233 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 234 | 234 | |
| 235 | 235 | irq->source &= ~((val >> (i * 8)) & 0xff); |
| 236 | 236 | if (!irq->source) |
| 237 | 237 | irq->pending_latch = false; |
| 238 | 238 | |
| 239 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 239 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 240 | 240 | vgic_put_irq(vcpu->kvm, irq); |
| 241 | 241 | } |
| 242 | 242 | } |
| @@ -252,7 +252,7 @@ static void vgic_mmio_write_sgipends(struct kvm_vcpu *vcpu, · 9 unmodified lines | ||
| 252 | 252 | for (i = 0; i < len; i++) { |
| 253 | 253 | struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); |
| 254 | 254 | |
| 255 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 255 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 256 | 256 | |
| 257 | 257 | irq->source |= (val >> (i * 8)) & 0xff; |
| 258 | 258 | |
| @@ -260,7 +260,7 @@ static void vgic_mmio_write_sgipends(struct kvm_vcpu *vcpu, · 1 unmodified line | ||
| 260 | 260 | irq->pending_latch = true; |
| 261 | 261 | vgic_queue_irq_unlock(vcpu->kvm, irq, flags); |
| 262 | 262 | } else { |
| 263 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 263 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 264 | 264 | } |
| 265 | 265 | vgic_put_irq(vcpu->kvm, irq); |
| 266 | 266 | } |
| @@ -169,13 +169,13 @@ static void vgic_mmio_write_irouter(struct kvm_vcpu *vcpu, · 168 unmodified lines | ||
| 169 | 169 | if (!irq) |
| 170 | 170 | return; |
| 171 | 171 | |
| 172 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 172 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 173 | 173 | |
| 174 | 174 | /* We only care about and preserve Aff0, Aff1 and Aff2. */ |
| 175 | 175 | irq->mpidr = val & GENMASK(23, 0); |
| 176 | 176 | irq->target_vcpu = kvm_mpidr_to_vcpu(vcpu->kvm, irq->mpidr); |
| 177 | 177 | |
| 178 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 178 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 179 | 179 | vgic_put_irq(vcpu->kvm, irq); |
| 180 | 180 | } |
| 181 | 181 | |
| @@ -281,7 +281,7 @@ static int vgic_v3_uaccess_write_pending(struct kvm_vcpu *vcpu, · 99 unmodified lines | ||
| 281 | 281 | for (i = 0; i < len * 8; i++) { |
| 282 | 282 | struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); |
| 283 | 283 | |
| 284 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 284 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 285 | 285 | if (test_bit(i, &val)) { |
| 286 | 286 | /* |
| 287 | 287 | * pending_latch is set irrespective of irq type |
| @@ -292,7 +292,7 @@ static int vgic_v3_uaccess_write_pending(struct kvm_vcpu *vcpu, · 4 unmodified lines | ||
| 292 | 292 | vgic_queue_irq_unlock(vcpu->kvm, irq, flags); |
| 293 | 293 | } else { |
| 294 | 294 | irq->pending_latch = false; |
| 295 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 295 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 296 | 296 | } |
| 297 | 297 | |
| 298 | 298 | vgic_put_irq(vcpu->kvm, irq); |
| @@ -957,7 +957,7 @@ void vgic_v3_dispatch_sgi(struct kvm_vcpu *vcpu, u64 reg, bool allow_group1) · 658 unmodified lines | ||
| 957 | 957 | |
| 958 | 958 | irq = vgic_get_irq(vcpu->kvm, c_vcpu, sgi); |
| 959 | 959 | |
| 960 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 960 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 961 | 961 | |
| 962 | 962 | /* |
| 963 | 963 | * An access targetting Group0 SGIs can only generate |
| @@ -968,7 +968,7 @@ void vgic_v3_dispatch_sgi(struct kvm_vcpu *vcpu, u64 reg, bool allow_group1) · 4 unmodified lines | ||
| 968 | 968 | irq->pending_latch = true; |
| 969 | 969 | vgic_queue_irq_unlock(vcpu->kvm, irq, flags); |
| 970 | 970 | } else { |
| 971 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 971 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 972 | 972 | } |
| 973 | 973 | |
| 974 | 974 | vgic_put_irq(vcpu->kvm, irq); |
| @@ -77,7 +77,7 @@ void vgic_mmio_write_group(struct kvm_vcpu *vcpu, gpa_t addr, · 76 unmodified lines | ||
| 77 | 77 | for (i = 0; i < len * 8; i++) { |
| 78 | 78 | struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); |
| 79 | 79 | |
| 80 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 80 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 81 | 81 | irq->group = !!(val & BIT(i)); |
| 82 | 82 | vgic_queue_irq_unlock(vcpu->kvm, irq, flags); |
| 83 | 83 | |
| @@ -120,7 +120,7 @@ void vgic_mmio_write_senable(struct kvm_vcpu *vcpu, · 36 unmodified lines | ||
| 120 | 120 | for_each_set_bit(i, &val, len * 8) { |
| 121 | 121 | struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); |
| 122 | 122 | |
| 123 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 123 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 124 | 124 | irq->enabled = true; |
| 125 | 125 | vgic_queue_irq_unlock(vcpu->kvm, irq, flags); |
| 126 | 126 | |
| @@ -139,11 +139,11 @@ void vgic_mmio_write_cenable(struct kvm_vcpu *vcpu, · 12 unmodified lines | ||
| 139 | 139 | for_each_set_bit(i, &val, len * 8) { |
| 140 | 140 | struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); |
| 141 | 141 | |
| 142 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 142 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 143 | 143 | |
| 144 | 144 | irq->enabled = false; |
| 145 | 145 | |
| 146 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 146 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 147 | 147 | vgic_put_irq(vcpu->kvm, irq); |
| 148 | 148 | } |
| 149 | 149 | } |
| @@ -160,10 +160,10 @@ unsigned long vgic_mmio_read_pending(struct kvm_vcpu *vcpu, · 10 unmodified lines | ||
| 160 | 160 | struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); |
| 161 | 161 | unsigned long flags; |
| 162 | 162 | |
| 163 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 163 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 164 | 164 | if (irq_is_pending(irq)) |
| 165 | 165 | value |= (1U << i); |
| 166 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 166 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 167 | 167 | |
| 168 | 168 | vgic_put_irq(vcpu->kvm, irq); |
| 169 | 169 | } |
| @@ -215,7 +215,7 @@ void vgic_mmio_write_spending(struct kvm_vcpu *vcpu, · 45 unmodified lines | ||
| 215 | 215 | for_each_set_bit(i, &val, len * 8) { |
| 216 | 216 | struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); |
| 217 | 217 | |
| 218 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 218 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 219 | 219 | if (irq->hw) |
| 220 | 220 | vgic_hw_irq_spending(vcpu, irq, is_uaccess); |
| 221 | 221 | else |
| @@ -262,14 +262,14 @@ void vgic_mmio_write_cpending(struct kvm_vcpu *vcpu, · 40 unmodified lines | ||
| 262 | 262 | for_each_set_bit(i, &val, len * 8) { |
| 263 | 263 | struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); |
| 264 | 264 | |
| 265 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 265 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 266 | 266 | |
| 267 | 267 | if (irq->hw) |
| 268 | 268 | vgic_hw_irq_cpending(vcpu, irq, is_uaccess); |
| 269 | 269 | else |
| 270 | 270 | irq->pending_latch = false; |
| 271 | 271 | |
| 272 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 272 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 273 | 273 | vgic_put_irq(vcpu->kvm, irq); |
| 274 | 274 | } |
| 275 | 275 | } |
| @@ -311,7 +311,7 @@ static void vgic_mmio_change_active(struct kvm_vcpu *vcpu, struct vgic_irq *irq, · 35 unmodified lines | ||
| 311 | 311 | unsigned long flags; |
| 312 | 312 | struct kvm_vcpu *requester_vcpu = vgic_get_mmio_requester_vcpu(); |
| 313 | 313 | |
| 314 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 314 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 315 | 315 | |
| 316 | 316 | if (irq->hw) { |
| 317 | 317 | vgic_hw_irq_change_active(vcpu, irq, active, !requester_vcpu); |
| @@ -342,7 +342,7 @@ static void vgic_mmio_change_active(struct kvm_vcpu *vcpu, struct vgic_irq *irq, · 24 unmodified lines | ||
| 342 | 342 | if (irq->active) |
| 343 | 343 | vgic_queue_irq_unlock(vcpu->kvm, irq, flags); |
| 344 | 344 | else |
| 345 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 345 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 346 | 346 | } |
| 347 | 347 | |
| 348 | 348 | /* |
| @@ -485,10 +485,10 @@ void vgic_mmio_write_priority(struct kvm_vcpu *vcpu, · 136 unmodified lines | ||
| 485 | 485 | for (i = 0; i < len; i++) { |
| 486 | 486 | struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); |
| 487 | 487 | |
| 488 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 488 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 489 | 489 | /* Narrow the priority range to what we actually support */ |
| 490 | 490 | irq->priority = (val >> (i * 8)) & GENMASK(7, 8 - VGIC_PRI_BITS); |
| 491 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 491 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 492 | 492 | |
| 493 | 493 | vgic_put_irq(vcpu->kvm, irq); |
| 494 | 494 | } |
| @@ -534,14 +534,14 @@ void vgic_mmio_write_config(struct kvm_vcpu *vcpu, · 39 unmodified lines | ||
| 534 | 534 | continue; |
| 535 | 535 | |
| 536 | 536 | irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); |
| 537 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 537 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 538 | 538 | |
| 539 | 539 | if (test_bit(i * 2 + 1, &val)) |
| 540 | 540 | irq->config = VGIC_CONFIG_EDGE; |
| 541 | 541 | else |
| 542 | 542 | irq->config = VGIC_CONFIG_LEVEL; |
| 543 | 543 | |
| 544 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 544 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 545 | 545 | vgic_put_irq(vcpu->kvm, irq); |
| 546 | 546 | } |
| 547 | 547 | } |
| @@ -590,12 +590,12 @@ void vgic_write_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid, · 42 unmodified lines | ||
| 590 | 590 | * restore irq config before line level. |
| 591 | 591 | */ |
| 592 | 592 | new_level = !!(val & (1U << i)); |
| 593 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 593 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 594 | 594 | irq->line_level = new_level; |
| 595 | 595 | if (new_level) |
| 596 | 596 | vgic_queue_irq_unlock(vcpu->kvm, irq, flags); |
| 597 | 597 | else |
| 598 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 598 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 599 | 599 | |
| 600 | 600 | vgic_put_irq(vcpu->kvm, irq); |
| 601 | 601 | } |
| @@ -84,7 +84,7 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu) · 83 unmodified lines | ||
| 84 | 84 | |
| 85 | 85 | irq = vgic_get_irq(vcpu->kvm, vcpu, intid); |
| 86 | 86 | |
| 87 | − spin_lock(&irq->irq_lock); | |
| 87 | + raw_spin_lock(&irq->irq_lock); | |
| 88 | 88 | |
| 89 | 89 | /* Always preserve the active bit */ |
| 90 | 90 | irq->active = !!(val & GICH_LR_ACTIVE_BIT); |
| @@ -127,7 +127,7 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu) · 36 unmodified lines | ||
| 127 | 127 | vgic_irq_set_phys_active(irq, false); |
| 128 | 128 | } |
| 129 | 129 | |
| 130 | − spin_unlock(&irq->irq_lock); | |
| 130 | + raw_spin_unlock(&irq->irq_lock); | |
| 131 | 131 | vgic_put_irq(vcpu->kvm, irq); |
| 132 | 132 | } |
| 133 | 133 | |
| @@ -76,7 +76,7 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu) · 75 unmodified lines | ||
| 76 | 76 | if (!irq) /* An LPI could have been unmapped. */ |
| 77 | 77 | continue; |
| 78 | 78 | |
| 79 | − spin_lock(&irq->irq_lock); | |
| 79 | + raw_spin_lock(&irq->irq_lock); | |
| 80 | 80 | |
| 81 | 81 | /* Always preserve the active bit */ |
| 82 | 82 | irq->active = !!(val & ICH_LR_ACTIVE_BIT); |
| @@ -119,7 +119,7 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu) · 36 unmodified lines | ||
| 119 | 119 | vgic_irq_set_phys_active(irq, false); |
| 120 | 120 | } |
| 121 | 121 | |
| 122 | − spin_unlock(&irq->irq_lock); | |
| 122 | + raw_spin_unlock(&irq->irq_lock); | |
| 123 | 123 | vgic_put_irq(vcpu->kvm, irq); |
| 124 | 124 | } |
| 125 | 125 | |
| @@ -347,9 +347,9 @@ retry: · 221 unmodified lines | ||
| 347 | 347 | |
| 348 | 348 | status = val & (1 << bit_nr); |
| 349 | 349 | |
| 350 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 350 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 351 | 351 | if (irq->target_vcpu != vcpu) { |
| 352 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 352 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 353 | 353 | goto retry; |
| 354 | 354 | } |
| 355 | 355 | irq->pending_latch = status; |
| @@ -54,11 +54,11 @@ struct vgic_global kvm_vgic_global_state __ro_after_init = { · 53 unmodified lines | ||
| 54 | 54 | * When taking more than one ap_list_lock at the same time, always take the |
| 55 | 55 | * lowest numbered VCPU's ap_list_lock first, so: |
| 56 | 56 | * vcpuX->vcpu_id < vcpuY->vcpu_id: |
| 57 | − * spin_lock(vcpuX->arch.vgic_cpu.ap_list_lock); | |
| 58 | − * spin_lock(vcpuY->arch.vgic_cpu.ap_list_lock); | |
| 57 | + * raw_spin_lock(vcpuX->arch.vgic_cpu.ap_list_lock); | |
| 58 | + * raw_spin_lock(vcpuY->arch.vgic_cpu.ap_list_lock); | |
| 59 | 59 | * |
| 60 | 60 | * Since the VGIC must support injecting virtual interrupts from ISRs, we have |
| 61 | − * to use the spin_lock_irqsave/spin_unlock_irqrestore versions of outer | |
| 61 | + * to use the raw_spin_lock_irqsave/raw_spin_unlock_irqrestore versions of outer | |
| 62 | 62 | * spinlocks for any lock that may be taken while injecting an interrupt. |
| 63 | 63 | */ |
| 64 | 64 | |
| @@ -72,7 +72,7 @@ static struct vgic_irq *vgic_get_lpi(struct kvm *kvm, u32 intid) · 7 unmodified lines | ||
| 72 | 72 | struct vgic_irq *irq = NULL; |
| 73 | 73 | unsigned long flags; |
| 74 | 74 | |
| 75 | − spin_lock_irqsave(&dist->lpi_list_lock, flags); | |
| 75 | + raw_spin_lock_irqsave(&dist->lpi_list_lock, flags); | |
| 76 | 76 | |
| 77 | 77 | list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) { |
| 78 | 78 | if (irq->intid != intid) |
| @@ -88,7 +88,7 @@ static struct vgic_irq *vgic_get_lpi(struct kvm *kvm, u32 intid) · 9 unmodified lines | ||
| 88 | 88 | irq = NULL; |
| 89 | 89 | |
| 90 | 90 | out_unlock: |
| 91 | − spin_unlock_irqrestore(&dist->lpi_list_lock, flags); | |
| 91 | + raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags); | |
| 92 | 92 | |
| 93 | 93 | return irq; |
| 94 | 94 | } |
| @@ -138,15 +138,15 @@ void vgic_put_irq(struct kvm *kvm, struct vgic_irq *irq) · 43 unmodified lines | ||
| 138 | 138 | if (irq->intid < VGIC_MIN_LPI) |
| 139 | 139 | return; |
| 140 | 140 | |
| 141 | − spin_lock_irqsave(&dist->lpi_list_lock, flags); | |
| 141 | + raw_spin_lock_irqsave(&dist->lpi_list_lock, flags); | |
| 142 | 142 | if (!kref_put(&irq->refcount, vgic_irq_release)) { |
| 143 | − spin_unlock_irqrestore(&dist->lpi_list_lock, flags); | |
| 143 | + raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags); | |
| 144 | 144 | return; |
| 145 | 145 | }; |
| 146 | 146 | |
| 147 | 147 | list_del(&irq->lpi_list); |
| 148 | 148 | dist->lpi_list_count--; |
| 149 | − spin_unlock_irqrestore(&dist->lpi_list_lock, flags); | |
| 149 | + raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags); | |
| 150 | 150 | |
| 151 | 151 | kfree(irq); |
| 152 | 152 | } |
| @@ -244,8 +244,8 @@ static int vgic_irq_cmp(void *priv, struct list_head *a, struct list_head *b) · 91 unmodified lines | ||
| 244 | 244 | bool penda, pendb; |
| 245 | 245 | int ret; |
| 246 | 246 | |
| 247 | − spin_lock(&irqa->irq_lock); | |
| 248 | − spin_lock_nested(&irqb->irq_lock, SINGLE_DEPTH_NESTING); | |
| 247 | + raw_spin_lock(&irqa->irq_lock); | |
| 248 | + raw_spin_lock_nested(&irqb->irq_lock, SINGLE_DEPTH_NESTING); | |
| 249 | 249 | |
| 250 | 250 | if (irqa->active || irqb->active) { |
| 251 | 251 | ret = (int)irqb->active - (int)irqa->active; |
| @@ -263,8 +263,8 @@ static int vgic_irq_cmp(void *priv, struct list_head *a, struct list_head *b) · 11 unmodified lines | ||
| 263 | 263 | /* Both pending and enabled, sort by priority */ |
| 264 | 264 | ret = irqa->priority - irqb->priority; |
| 265 | 265 | out: |
| 266 | − spin_unlock(&irqb->irq_lock); | |
| 267 | − spin_unlock(&irqa->irq_lock); | |
| 266 | + raw_spin_unlock(&irqb->irq_lock); | |
| 267 | + raw_spin_unlock(&irqa->irq_lock); | |
| 268 | 268 | return ret; |
| 269 | 269 | } |
| 270 | 270 | |
| @@ -325,7 +325,7 @@ retry: · 54 unmodified lines | ||
| 325 | 325 | * not need to be inserted into an ap_list and there is also |
| 326 | 326 | * no more work for us to do. |
| 327 | 327 | */ |
| 328 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 328 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 329 | 329 | |
| 330 | 330 | /* |
| 331 | 331 | * We have to kick the VCPU here, because we could be |
| @@ -347,12 +347,12 @@ retry: · 15 unmodified lines | ||
| 347 | 347 | * We must unlock the irq lock to take the ap_list_lock where |
| 348 | 348 | * we are going to insert this new pending interrupt. |
| 349 | 349 | */ |
| 350 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 350 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 351 | 351 | |
| 352 | 352 | /* someone can do stuff here, which we re-check below */ |
| 353 | 353 | |
| 354 | − spin_lock_irqsave(&vcpu->arch.vgic_cpu.ap_list_lock, flags); | |
| 355 | − spin_lock(&irq->irq_lock); | |
| 354 | + raw_spin_lock_irqsave(&vcpu->arch.vgic_cpu.ap_list_lock, flags); | |
| 355 | + raw_spin_lock(&irq->irq_lock); | |
| 356 | 356 | |
| 357 | 357 | /* |
| 358 | 358 | * Did something change behind our backs? |
| @@ -367,10 +367,11 @@ retry: · 8 unmodified lines | ||
| 367 | 367 | */ |
| 368 | 368 | |
| 369 | 369 | if (unlikely(irq->vcpu || vcpu != vgic_target_oracle(irq))) { |
| 370 | − spin_unlock(&irq->irq_lock); | |
| 371 | − spin_unlock_irqrestore(&vcpu->arch.vgic_cpu.ap_list_lock, flags); | |
| 370 | + raw_spin_unlock(&irq->irq_lock); | |
| 371 | + raw_spin_unlock_irqrestore(&vcpu->arch.vgic_cpu.ap_list_lock, | |
| 372 | + flags); | |
| 372 | 373 | |
| 373 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 374 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 374 | 375 | goto retry; |
| 375 | 376 | } |
| 376 | 377 | |
| @@ -382,8 +383,8 @@ retry: · 5 unmodified lines | ||
| 382 | 383 | list_add_tail(&irq->ap_list, &vcpu->arch.vgic_cpu.ap_list_head); |
| 383 | 384 | irq->vcpu = vcpu; |
| 384 | 385 | |
| 385 | − spin_unlock(&irq->irq_lock); | |
| 386 | − spin_unlock_irqrestore(&vcpu->arch.vgic_cpu.ap_list_lock, flags); | |
| 386 | + raw_spin_unlock(&irq->irq_lock); | |
| 387 | + raw_spin_unlock_irqrestore(&vcpu->arch.vgic_cpu.ap_list_lock, flags); | |
| 387 | 388 | |
| 388 | 389 | kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu); |
| 389 | 390 | kvm_vcpu_kick(vcpu); |
| @@ -430,11 +431,11 @@ int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid, · 40 unmodified lines | ||
| 430 | 431 | if (!irq) |
| 431 | 432 | return -EINVAL; |
| 432 | 433 | |
| 433 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 434 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 434 | 435 | |
| 435 | 436 | if (!vgic_validate_injection(irq, level, owner)) { |
| 436 | 437 | /* Nothing to see here, move along... */ |
| 437 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 438 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 438 | 439 | vgic_put_irq(kvm, irq); |
| 439 | 440 | return 0; |
| 440 | 441 | } |
| @@ -494,9 +495,9 @@ int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, unsigned int host_irq, · 53 unmodified lines | ||
| 494 | 495 | |
| 495 | 496 | BUG_ON(!irq); |
| 496 | 497 | |
| 497 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 498 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 498 | 499 | ret = kvm_vgic_map_irq(vcpu, irq, host_irq, get_input_level); |
| 499 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 500 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 500 | 501 | vgic_put_irq(vcpu->kvm, irq); |
| 501 | 502 | |
| 502 | 503 | return ret; |
| @@ -519,11 +520,11 @@ void kvm_vgic_reset_mapped_irq(struct kvm_vcpu *vcpu, u32 vintid) · 16 unmodified lines | ||
| 519 | 520 | if (!irq->hw) |
| 520 | 521 | goto out; |
| 521 | 522 | |
| 522 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 523 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 523 | 524 | irq->active = false; |
| 524 | 525 | irq->pending_latch = false; |
| 525 | 526 | irq->line_level = false; |
| 526 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 527 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 527 | 528 | out: |
| 528 | 529 | vgic_put_irq(vcpu->kvm, irq); |
| 529 | 530 | } |
| @@ -539,9 +540,9 @@ int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, unsigned int vintid) · 9 unmodified lines | ||
| 539 | 540 | irq = vgic_get_irq(vcpu->kvm, vcpu, vintid); |
| 540 | 541 | BUG_ON(!irq); |
| 541 | 542 | |
| 542 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 543 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 543 | 544 | kvm_vgic_unmap_irq(irq); |
| 544 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 545 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 545 | 546 | vgic_put_irq(vcpu->kvm, irq); |
| 546 | 547 | |
| 547 | 548 | return 0; |
| @@ -571,12 +572,12 @@ int kvm_vgic_set_owner(struct kvm_vcpu *vcpu, unsigned int intid, void *owner) · 23 unmodified lines | ||
| 571 | 572 | return -EINVAL; |
| 572 | 573 | |
| 573 | 574 | irq = vgic_get_irq(vcpu->kvm, vcpu, intid); |
| 574 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 575 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 575 | 576 | if (irq->owner && irq->owner != owner) |
| 576 | 577 | ret = -EEXIST; |
| 577 | 578 | else |
| 578 | 579 | irq->owner = owner; |
| 579 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 580 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 580 | 581 | |
| 581 | 582 | return ret; |
| 582 | 583 | } |
| @@ -597,13 +598,13 @@ static void vgic_prune_ap_list(struct kvm_vcpu *vcpu) · 14 unmodified lines | ||
| 597 | 598 | DEBUG_SPINLOCK_BUG_ON(!irqs_disabled()); |
| 598 | 599 | |
| 599 | 600 | retry: |
| 600 | − spin_lock(&vgic_cpu->ap_list_lock); | |
| 601 | + raw_spin_lock(&vgic_cpu->ap_list_lock); | |
| 601 | 602 | |
| 602 | 603 | list_for_each_entry_safe(irq, tmp, &vgic_cpu->ap_list_head, ap_list) { |
| 603 | 604 | struct kvm_vcpu *target_vcpu, *vcpuA, *vcpuB; |
| 604 | 605 | bool target_vcpu_needs_kick = false; |
| 605 | 606 | |
| 606 | − spin_lock(&irq->irq_lock); | |
| 607 | + raw_spin_lock(&irq->irq_lock); | |
| 607 | 608 | |
| 608 | 609 | BUG_ON(vcpu != irq->vcpu); |
| 609 | 610 | |
| @@ -616,7 +617,7 @@ retry: · 6 unmodified lines | ||
| 616 | 617 | */ |
| 617 | 618 | list_del(&irq->ap_list); |
| 618 | 619 | irq->vcpu = NULL; |
| 619 | − spin_unlock(&irq->irq_lock); | |
| 620 | + raw_spin_unlock(&irq->irq_lock); | |
| 620 | 621 | |
| 621 | 622 | /* |
| 622 | 623 | * This vgic_put_irq call matches the |
| @@ -631,14 +632,14 @@ retry: · 8 unmodified lines | ||
| 631 | 632 | |
| 632 | 633 | if (target_vcpu == vcpu) { |
| 633 | 634 | /* We're on the right CPU */ |
| 634 | − spin_unlock(&irq->irq_lock); | |
| 635 | + raw_spin_unlock(&irq->irq_lock); | |
| 635 | 636 | continue; |
| 636 | 637 | } |
| 637 | 638 | |
| 638 | 639 | /* This interrupt looks like it has to be migrated. */ |
| 639 | 640 | |
| 640 | − spin_unlock(&irq->irq_lock); | |
| 641 | − spin_unlock(&vgic_cpu->ap_list_lock); | |
| 641 | + raw_spin_unlock(&irq->irq_lock); | |
| 642 | + raw_spin_unlock(&vgic_cpu->ap_list_lock); | |
| 642 | 643 | |
| 643 | 644 | /* |
| 644 | 645 | * Ensure locking order by always locking the smallest |
| @@ -652,10 +653,10 @@ retry: · 7 unmodified lines | ||
| 652 | 653 | vcpuB = vcpu; |
| 653 | 654 | } |
| 654 | 655 | |
| 655 | − spin_lock(&vcpuA->arch.vgic_cpu.ap_list_lock); | |
| 656 | − spin_lock_nested(&vcpuB->arch.vgic_cpu.ap_list_lock, | |
| 657 | − SINGLE_DEPTH_NESTING); | |
| 658 | − spin_lock(&irq->irq_lock); | |
| 656 | + raw_spin_lock(&vcpuA->arch.vgic_cpu.ap_list_lock); | |
| 657 | + raw_spin_lock_nested(&vcpuB->arch.vgic_cpu.ap_list_lock, | |
| 658 | + SINGLE_DEPTH_NESTING); | |
| 659 | + raw_spin_lock(&irq->irq_lock); | |
| 659 | 660 | |
| 660 | 661 | /* |
| 661 | 662 | * If the affinity has been preserved, move the |
| @@ -675,9 +676,9 @@ retry: · 13 unmodified lines | ||
| 675 | 676 | target_vcpu_needs_kick = true; |
| 676 | 677 | } |
| 677 | 678 | |
| 678 | − spin_unlock(&irq->irq_lock); | |
| 679 | − spin_unlock(&vcpuB->arch.vgic_cpu.ap_list_lock); | |
| 680 | − spin_unlock(&vcpuA->arch.vgic_cpu.ap_list_lock); | |
| 679 | + raw_spin_unlock(&irq->irq_lock); | |
| 680 | + raw_spin_unlock(&vcpuB->arch.vgic_cpu.ap_list_lock); | |
| 681 | + raw_spin_unlock(&vcpuA->arch.vgic_cpu.ap_list_lock); | |
| 681 | 682 | |
| 682 | 683 | if (target_vcpu_needs_kick) { |
| 683 | 684 | kvm_make_request(KVM_REQ_IRQ_PENDING, target_vcpu); |
| @@ -687,7 +688,7 @@ retry: · 3 unmodified lines | ||
| 687 | 688 | goto retry; |
| 688 | 689 | } |
| 689 | 690 | |
| 690 | − spin_unlock(&vgic_cpu->ap_list_lock); | |
| 691 | + raw_spin_unlock(&vgic_cpu->ap_list_lock); | |
| 691 | 692 | } |
| 692 | 693 | |
| 693 | 694 | static inline void vgic_fold_lr_state(struct kvm_vcpu *vcpu) |
| @@ -741,10 +742,10 @@ static int compute_ap_list_depth(struct kvm_vcpu *vcpu, · 47 unmodified lines | ||
| 741 | 742 | list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) { |
| 742 | 743 | int w; |
| 743 | 744 | |
| 744 | − spin_lock(&irq->irq_lock); | |
| 745 | + raw_spin_lock(&irq->irq_lock); | |
| 745 | 746 | /* GICv2 SGIs can count for more than one... */ |
| 746 | 747 | w = vgic_irq_get_lr_count(irq); |
| 747 | − spin_unlock(&irq->irq_lock); | |
| 748 | + raw_spin_unlock(&irq->irq_lock); | |
| 748 | 749 | |
| 749 | 750 | count += w; |
| 750 | 751 | *multi_sgi |= (w > 1); |
| @@ -770,7 +771,7 @@ static void vgic_flush_lr_state(struct kvm_vcpu *vcpu) · 19 unmodified lines | ||
| 770 | 771 | count = 0; |
| 771 | 772 | |
| 772 | 773 | list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) { |
| 773 | − spin_lock(&irq->irq_lock); | |
| 774 | + raw_spin_lock(&irq->irq_lock); | |
| 774 | 775 | |
| 775 | 776 | /* |
| 776 | 777 | * If we have multi-SGIs in the pipeline, we need to |
| @@ -780,7 +781,7 @@ static void vgic_flush_lr_state(struct kvm_vcpu *vcpu) · 3 unmodified lines | ||
| 780 | 781 | * the AP list has been sorted already. |
| 781 | 782 | */ |
| 782 | 783 | if (multi_sgi && irq->priority > prio) { |
| 783 | − spin_unlock(&irq->irq_lock); | |
| 784 | + _raw_spin_unlock(&irq->irq_lock); | |
| 784 | 785 | break; |
| 785 | 786 | } |
| 786 | 787 | |
| @@ -791,7 +792,7 @@ static void vgic_flush_lr_state(struct kvm_vcpu *vcpu) · 4 unmodified lines | ||
| 791 | 792 | prio = irq->priority; |
| 792 | 793 | } |
| 793 | 794 | |
| 794 | − spin_unlock(&irq->irq_lock); | |
| 795 | + raw_spin_unlock(&irq->irq_lock); | |
| 795 | 796 | |
| 796 | 797 | if (count == kvm_vgic_global_state.nr_lr) { |
| 797 | 798 | if (!list_is_last(&irq->ap_list, |
| @@ -872,9 +873,9 @@ void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu) · 74 unmodified lines | ||
| 872 | 873 | |
| 873 | 874 | DEBUG_SPINLOCK_BUG_ON(!irqs_disabled()); |
| 874 | 875 | |
| 875 | − spin_lock(&vcpu->arch.vgic_cpu.ap_list_lock); | |
| 876 | + raw_spin_lock(&vcpu->arch.vgic_cpu.ap_list_lock); | |
| 876 | 877 | vgic_flush_lr_state(vcpu); |
| 877 | − spin_unlock(&vcpu->arch.vgic_cpu.ap_list_lock); | |
| 878 | + raw_spin_unlock(&vcpu->arch.vgic_cpu.ap_list_lock); | |
| 878 | 879 | |
| 879 | 880 | if (can_access_vgic_from_kernel()) |
| 880 | 881 | vgic_restore_state(vcpu); |
| @@ -918,20 +919,20 @@ int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu) · 37 unmodified lines | ||
| 918 | 919 | |
| 919 | 920 | vgic_get_vmcr(vcpu, &vmcr); |
| 920 | 921 | |
| 921 | − spin_lock_irqsave(&vgic_cpu->ap_list_lock, flags); | |
| 922 | + raw_spin_lock_irqsave(&vgic_cpu->ap_list_lock, flags); | |
| 922 | 923 | |
| 923 | 924 | list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) { |
| 924 | − spin_lock(&irq->irq_lock); | |
| 925 | + raw_spin_lock(&irq->irq_lock); | |
| 925 | 926 | pending = irq_is_pending(irq) && irq->enabled && |
| 926 | 927 | !irq->active && |
| 927 | 928 | irq->priority < vmcr.pmr; |
| 928 | − spin_unlock(&irq->irq_lock); | |
| 929 | + raw_spin_unlock(&irq->irq_lock); | |
| 929 | 930 | |
| 930 | 931 | if (pending) |
| 931 | 932 | break; |
| 932 | 933 | } |
| 933 | 934 | |
| 934 | − spin_unlock_irqrestore(&vgic_cpu->ap_list_lock, flags); | |
| 935 | + raw_spin_unlock_irqrestore(&vgic_cpu->ap_list_lock, flags); | |
| 935 | 936 | |
| 936 | 937 | return pending; |
| 937 | 938 | } |
| @@ -963,11 +964,10 @@ bool kvm_vgic_map_is_active(struct kvm_vcpu *vcpu, unsigned int vintid) · 25 unmodified lines | ||
| 963 | 964 | return false; |
| 964 | 965 | |
| 965 | 966 | irq = vgic_get_irq(vcpu->kvm, vcpu, vintid); |
| 966 | − spin_lock_irqsave(&irq->irq_lock, flags); | |
| 967 | + raw_spin_lock_irqsave(&irq->irq_lock, flags); | |
| 967 | 968 | map_is_active = irq->hw && irq->active; |
| 968 | − spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 969 | + raw_spin_unlock_irqrestore(&irq->irq_lock, flags); | |
| 969 | 970 | vgic_put_irq(vcpu->kvm, irq); |
| 970 | 971 | |
| 971 | 972 | return map_is_active; |
| 972 | 973 | } |
| 973 | − | |