Merge Linux v3.12-rc4 to fix a conflict and also to refresh the tree before applying more scheduler patches. Conflicts: arch/avr32/include/asm/Kbuild
Unified · Split
| @@ -2808,8 +2808,7 @@ S: Ottawa, Ontario · 2807 unmodified lines | ||
| 2808 | 2808 | S: Canada K2P 0X8 |
| 2809 | 2809 | |
| 2810 | 2810 | N: Mikael Pettersson |
| 2811 | −E: mikpe@it.uu.se | |
| 2812 | −W: http://user.it.uu.se/~mikpe/linux/ | |
| 2811 | +E: mikpelinux@gmail.com | |
| 2813 | 2812 | D: Miscellaneous fixes |
| 2814 | 2813 | |
| 2815 | 2814 | N: Reed H. Petty |
| @@ -18,17 +18,17 @@ this byte for application use, with the following caveats: · 17 unmodified lines | ||
| 18 | 18 | parameters containing user virtual addresses *must* have |
| 19 | 19 | their top byte cleared before trapping to the kernel. |
| 20 | 20 | |
| 21 | − (2) Tags are not guaranteed to be preserved when delivering | |
| 22 | − signals. This means that signal handlers in applications | |
| 23 | − making use of tags cannot rely on the tag information for | |
| 24 | − user virtual addresses being maintained for fields inside | |
| 25 | − siginfo_t. One exception to this rule is for signals raised | |
| 26 | − in response to debug exceptions, where the tag information | |
| 21 | + (2) Non-zero tags are not preserved when delivering signals. | |
| 22 | + This means that signal handlers in applications making use | |
| 23 | + of tags cannot rely on the tag information for user virtual | |
| 24 | + addresses being maintained for fields inside siginfo_t. | |
| 25 | + One exception to this rule is for signals raised in response | |
| 26 | + to watchpoint debug exceptions, where the tag information | |
| 27 | 27 | will be preserved. |
| 28 | 28 | |
| 29 | 29 | (3) Special care should be taken when using tagged pointers, |
| 30 | 30 | since it is likely that C compilers will not hazard two |
| 31 | − addresses differing only in the upper bits. | |
| 31 | + virtual addresses differing only in the upper byte. | |
| 32 | 32 | |
| 33 | 33 | The architecture prevents the use of a tagged PC, so the upper byte will |
| 34 | 34 | be set to a sign-extension of bit 55 on exception return. |
| @@ -6,6 +6,8 @@ capability.txt · 5 unmodified lines | ||
| 6 | 6 | - Generic Block Device Capability (/sys/block/<device>/capability) |
| 7 | 7 | cfq-iosched.txt |
| 8 | 8 | - CFQ IO scheduler tunables |
| 9 | +cmdline-partition.txt | |
| 10 | + - how to specify block device partitions on kernel command line | |
| 9 | 11 | data-integrity.txt |
| 10 | 12 | - Block data integrity |
| 11 | 13 | deadline-iosched.txt |
| @@ -1,9 +1,9 @@ | ||
| 1 | −Embedded device command line partition | |
| 1 | +Embedded device command line partition parsing | |
| 2 | 2 | ===================================================================== |
| 3 | 3 | |
| 4 | −Read block device partition table from command line. | |
| 5 | −The partition used for fixed block device (eMMC) embedded device. | |
| 6 | −It is no MBR, save storage space. Bootloader can be easily accessed | |
| 4 | +Support for reading the block device partition table from the command line. | |
| 5 | +It is typically used for fixed block (eMMC) embedded devices. | |
| 6 | +It has no MBR, so saves storage space. Bootloader can be easily accessed | |
| 7 | 7 | by absolute address of data on the block device. |
| 8 | 8 | Users can easily change the partition. |
| 9 | 9 | |
| @@ -1,11 +1,11 @@ | ||
| 1 | −* Samsung Exynos specific extensions to the Synopsis Designware Mobile | |
| 1 | +* Samsung Exynos specific extensions to the Synopsys Designware Mobile | |
| 2 | 2 | Storage Host Controller |
| 3 | 3 | |
| 4 | −The Synopsis designware mobile storage host controller is used to interface | |
| 4 | +The Synopsys designware mobile storage host controller is used to interface | |
| 5 | 5 | a SoC with storage medium such as eMMC or SD/MMC cards. This file documents |
| 6 | −differences between the core Synopsis dw mshc controller properties described | |
| 7 | −by synopsis-dw-mshc.txt and the properties used by the Samsung Exynos specific | |
| 8 | −extensions to the Synopsis Designware Mobile Storage Host Controller. | |
| 6 | +differences between the core Synopsys dw mshc controller properties described | |
| 7 | +by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific | |
| 8 | +extensions to the Synopsys Designware Mobile Storage Host Controller. | |
| 9 | 9 | |
| 10 | 10 | Required Properties: |
| 11 | 11 | |
| @@ -1,11 +1,11 @@ | ||
| 1 | −* Rockchip specific extensions to the Synopsis Designware Mobile | |
| 1 | +* Rockchip specific extensions to the Synopsys Designware Mobile | |
| 2 | 2 | Storage Host Controller |
| 3 | 3 | |
| 4 | −The Synopsis designware mobile storage host controller is used to interface | |
| 4 | +The Synopsys designware mobile storage host controller is used to interface | |
| 5 | 5 | a SoC with storage medium such as eMMC or SD/MMC cards. This file documents |
| 6 | −differences between the core Synopsis dw mshc controller properties described | |
| 7 | −by synopsis-dw-mshc.txt and the properties used by the Rockchip specific | |
| 8 | −extensions to the Synopsis Designware Mobile Storage Host Controller. | |
| 6 | +differences between the core Synopsys dw mshc controller properties described | |
| 7 | +by synopsys-dw-mshc.txt and the properties used by the Rockchip specific | |
| 8 | +extensions to the Synopsys Designware Mobile Storage Host Controller. | |
| 9 | 9 | |
| 10 | 10 | Required Properties: |
| 11 | 11 | |
| @@ -1,14 +1,14 @@ | ||
| 1 | −* Synopsis Designware Mobile Storage Host Controller | |
| 1 | +* Synopsys Designware Mobile Storage Host Controller | |
| 2 | 2 | |
| 3 | −The Synopsis designware mobile storage host controller is used to interface | |
| 3 | +The Synopsys designware mobile storage host controller is used to interface | |
| 4 | 4 | a SoC with storage medium such as eMMC or SD/MMC cards. This file documents |
| 5 | 5 | differences between the core mmc properties described by mmc.txt and the |
| 6 | −properties used by the Synopsis Designware Mobile Storage Host Controller. | |
| 6 | +properties used by the Synopsys Designware Mobile Storage Host Controller. | |
| 7 | 7 | |
| 8 | 8 | Required Properties: |
| 9 | 9 | |
| 10 | 10 | * compatible: should be |
| 11 | − - snps,dw-mshc: for controllers compliant with synopsis dw-mshc. | |
| 11 | + - snps,dw-mshc: for controllers compliant with synopsys dw-mshc. | |
| 12 | 12 | * #address-cells: should be 1. |
| 13 | 13 | * #size-cells: should be 0. |
| 14 | 14 | |
| @@ -9,12 +9,15 @@ compulsory and any optional properties, common to all SD/MMC drivers, as · 8 unmodified lines | ||
| 9 | 9 | described in mmc.txt, can be used. Additionally the following tmio_mmc-specific |
| 10 | 10 | optional bindings can be used. |
| 11 | 11 | |
| 12 | +Required properties: | |
| 13 | +- compatible: "renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit | |
| 14 | + "renesas,sdhi-sh7372" - SDHI IP on SH7372 SoC | |
| 15 | + "renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC | |
| 16 | + "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC | |
| 17 | + "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC | |
| 18 | + "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC | |
| 19 | + "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC | |
| 20 | + "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC | |
| 21 | + | |
| 12 | 22 | Optional properties: |
| 13 | 23 | - toshiba,mmc-wrprotect-disable: write-protect detection is unavailable |
| 14 | − | |
| 15 | −When used with Renesas SDHI hardware, the following compatibility strings | |
| 16 | −configure various model-specific properties: | |
| 17 | − | |
| 18 | −"renesas,sh7372-sdhi": (default) compatible with SH7372 | |
| 19 | −"renesas,r8a7740-sdhi": compatible with R8A7740: certain MMC/SD commands have to | |
| 20 | − wait for the interface to become idle. | |
| @@ -86,6 +86,7 @@ General Properties: · 85 unmodified lines | ||
| 86 | 86 | |
| 87 | 87 | Clock Properties: |
| 88 | 88 | |
| 89 | + - fsl,cksel Timer reference clock source. | |
| 89 | 90 | - fsl,tclk-period Timer reference clock period in nanoseconds. |
| 90 | 91 | - fsl,tmr-prsc Prescaler, divides the output clock. |
| 91 | 92 | - fsl,tmr-add Frequency compensation value. |
| @@ -97,7 +98,7 @@ Clock Properties: · 5 unmodified lines | ||
| 97 | 98 | clock. You must choose these carefully for the clock to work right. |
| 98 | 99 | Here is how to figure good values: |
| 99 | 100 | |
| 100 | − TimerOsc = system clock MHz | |
| 101 | + TimerOsc = selected reference clock MHz | |
| 101 | 102 | tclk_period = desired clock period nanoseconds |
| 102 | 103 | NominalFreq = 1000 / tclk_period MHz |
| 103 | 104 | FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0) |
| @@ -114,6 +115,20 @@ Clock Properties: · 10 unmodified lines | ||
| 114 | 115 | Pulse Per Second (PPS) signal, since this will be offered to the PPS |
| 115 | 116 | subsystem to synchronize the Linux clock. |
| 116 | 117 | |
| 118 | + Reference clock source is determined by the value, which is holded | |
| 119 | + in CKSEL bits in TMR_CTRL register. "fsl,cksel" property keeps the | |
| 120 | + value, which will be directly written in those bits, that is why, | |
| 121 | + according to reference manual, the next clock sources can be used: | |
| 122 | + | |
| 123 | + <0> - external high precision timer reference clock (TSEC_TMR_CLK | |
| 124 | + input is used for this purpose); | |
| 125 | + <1> - eTSEC system clock; | |
| 126 | + <2> - eTSEC1 transmit clock; | |
| 127 | + <3> - RTC clock input. | |
| 128 | + | |
| 129 | + When this attribute is not used, eTSEC system clock will serve as | |
| 130 | + IEEE 1588 timer reference clock. | |
| 131 | + | |
| 117 | 132 | Example: |
| 118 | 133 | |
| 119 | 134 | ptp_clock@24E00 { |
| @@ -121,6 +136,7 @@ Example: · 1 unmodified line | ||
| 121 | 136 | reg = <0x24E00 0xB0>; |
| 122 | 137 | interrupts = <12 0x8 13 0x8>; |
| 123 | 138 | interrupt-parent = < &ipic >; |
| 139 | + fsl,cksel = <1>; | |
| 124 | 140 | fsl,tclk-period = <10>; |
| 125 | 141 | fsl,tmr-prsc = <100>; |
| 126 | 142 | fsl,tmr-add = <0x999999A4>; |
| @@ -1,4 +1,4 @@ | ||
| 1 | −* Synopsis Designware PCIe interface | |
| 1 | +* Synopsys Designware PCIe interface | |
| 2 | 2 | |
| 3 | 3 | Required properties: |
| 4 | 4 | - compatible: should contain "snps,dw-pcie" to identify the |
File renamed without changes.
| @@ -359,11 +359,9 @@ struct inode_operations { · 358 unmodified lines | ||
| 359 | 359 | ssize_t (*listxattr) (struct dentry *, char *, size_t); |
| 360 | 360 | int (*removexattr) (struct dentry *, const char *); |
| 361 | 361 | void (*update_time)(struct inode *, struct timespec *, int); |
| 362 | − int (*atomic_open)(struct inode *, struct dentry *, | |
| 362 | + int (*atomic_open)(struct inode *, struct dentry *, struct file *, | |
| 363 | + unsigned open_flag, umode_t create_mode, int *opened); | |
| 363 | 364 | int (*tmpfile) (struct inode *, struct dentry *, umode_t); |
| 364 | −} ____cacheline_aligned; | |
| 365 | − struct file *, unsigned open_flag, | |
| 366 | − umode_t create_mode, int *opened); | |
| 367 | 365 | }; |
| 368 | 366 | |
| 369 | 367 | Again, all methods are called without any locks being held, unless |
| @@ -470,9 +468,11 @@ otherwise noted. · 100 unmodified lines | ||
| 470 | 468 | method the filesystem can look up, possibly create and open the file in |
| 471 | 469 | one atomic operation. If it cannot perform this (e.g. the file type |
| 472 | 470 | turned out to be wrong) it may signal this by returning 1 instead of |
| 473 | − usual 0 or -ve . This method is only called if the last | |
| 474 | − component is negative or needs lookup. Cached positive dentries are | |
| 475 | − still handled by f_op->open(). | |
| 471 | + usual 0 or -ve . This method is only called if the last component is | |
| 472 | + negative or needs lookup. Cached positive dentries are still handled by | |
| 473 | + f_op->open(). If the file was created, the FILE_CREATED flag should be | |
| 474 | + set in "opened". In case of O_EXCL the method must only succeed if the | |
| 475 | + file didn't exist and hence FILE_CREATED shall always be set on success. | |
| 476 | 476 | |
| 477 | 477 | tmpfile: called in the end of O_TMPFILE open(). Optional, equivalent to |
| 478 | 478 | atomically creating, opening and unlinking a file in given directory. |
| @@ -480,6 +480,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 479 unmodified lines | ||
| 480 | 480 | Format: <io>,<irq>,<mode> |
| 481 | 481 | See header of drivers/net/hamradio/baycom_ser_hdx.c. |
| 482 | 482 | |
| 483 | + blkdevparts= Manual partition parsing of block device(s) for | |
| 484 | + embedded devices based on command line input. | |
| 485 | + See Documentation/block/cmdline-partition.txt | |
| 486 | + | |
| 483 | 487 | boot_delay= Milliseconds to delay each printk during boot. |
| 484 | 488 | Values larger than 10 seconds (10000) are changed to |
| 485 | 489 | no delay (0). |
| @@ -1357,7 +1361,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 871 unmodified lines | ||
| 1357 | 1361 | pages. In the event, a node is too small to have both |
| 1358 | 1362 | kernelcore and Movable pages, kernelcore pages will |
| 1359 | 1363 | take priority and other nodes will have a larger number |
| 1360 | − of kernelcore pages. The Movable zone is used for the | |
| 1364 | + of Movable pages. The Movable zone is used for the | |
| 1361 | 1365 | allocation of pages that may be reclaimed or moved |
| 1362 | 1366 | by the page migration subsystem. This means that |
| 1363 | 1367 | HugeTLB pages may not be allocated from this zone. |
| @@ -3485,6 +3489,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 2121 unmodified lines | ||
| 3485 | 3489 | the unplug protocol |
| 3486 | 3490 | never -- do not unplug even if version check succeeds |
| 3487 | 3491 | |
| 3492 | + xen_nopvspin [X86,XEN] | |
| 3493 | + Disables the ticketlock slowpath using Xen PV | |
| 3494 | + optimizations. | |
| 3495 | + | |
| 3488 | 3496 | xirc2ps_cs= [NET,PCMCIA] |
| 3489 | 3497 | Format: |
| 3490 | 3498 | <irq>,<irq_mask>,<io>,<full_duplex>,<do_sound>,<lockup_hack>[,<irq2>[,<irq3>[,<irq4>]]] |
| @@ -1362,6 +1362,12 @@ To add ARP targets: · 1361 unmodified lines | ||
| 1362 | 1362 | To remove an ARP target: |
| 1363 | 1363 | # echo -192.168.0.100 > /sys/class/net/bond0/bonding/arp_ip_target |
| 1364 | 1364 | |
| 1365 | +To configure the interval between learning packet transmits: | |
| 1366 | +# echo 12 > /sys/class/net/bond0/bonding/lp_interval | |
| 1367 | + NOTE: the lp_inteval is the number of seconds between instances where | |
| 1368 | +the bonding driver sends learning packets to each slaves peer switch. The | |
| 1369 | +default interval is 1 second. | |
| 1370 | + | |
| 1365 | 1371 | Example Configuration |
| 1366 | 1372 | --------------------- |
| 1367 | 1373 | We begin with the same example that is shown in section 3.3, |
| @@ -296,6 +296,12 @@ Cirrus Logic CS4206/4207 · 295 unmodified lines | ||
| 296 | 296 | imac27 IMac 27 Inch |
| 297 | 297 | auto BIOS setup (default) |
| 298 | 298 | |
| 299 | +Cirrus Logic CS4208 | |
| 300 | +=================== | |
| 301 | + mba6 MacBook Air 6,1 and 6,2 | |
| 302 | + gpio0 Enable GPIO 0 amp | |
| 303 | + auto BIOS setup (default) | |
| 304 | + | |
| 299 | 305 | VIA VT17xx/VT18xx/VT20xx |
| 300 | 306 | ======================== |
| 301 | 307 | auto BIOS setup (default) |
| @@ -824,15 +824,21 @@ S: Maintained · 823 unmodified lines | ||
| 824 | 824 | F: arch/arm/mach-gemini/ |
| 825 | 825 | |
| 826 | 826 | ARM/CSR SIRFPRIMA2 MACHINE SUPPORT |
| 827 | −M: Barry Song <baohua.song@csr.com> | |
| 827 | +M: Barry Song <baohua@kernel.org> | |
| 828 | 828 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 829 | 829 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux.git |
| 830 | 830 | S: Maintained |
| 831 | 831 | F: arch/arm/mach-prima2/ |
| 832 | +F: drivers/clk/clk-prima2.c | |
| 833 | +F: drivers/clocksource/timer-prima2.c | |
| 834 | +F: drivers/clocksource/timer-marco.c | |
| 832 | 835 | F: drivers/dma/sirf-dma.c |
| 833 | 836 | F: drivers/i2c/busses/i2c-sirf.c |
| 837 | +F: drivers/input/misc/sirfsoc-onkey.c | |
| 838 | +F: drivers/irqchip/irq-sirfsoc.c | |
| 834 | 839 | F: drivers/mmc/host/sdhci-sirf.c |
| 835 | 840 | F: drivers/pinctrl/sirf/ |
| 841 | +F: drivers/rtc/rtc-sirfsoc.c | |
| 836 | 842 | F: drivers/spi/spi-sirf.c |
| 837 | 843 | |
| 838 | 844 | ARM/EBSA110 MACHINE SUPPORT |
| @@ -1812,7 +1818,8 @@ S: Supported · 973 unmodified lines | ||
| 1812 | 1818 | F: drivers/net/ethernet/broadcom/bnx2x/ |
| 1813 | 1819 | |
| 1814 | 1820 | BROADCOM BCM281XX/BCM11XXX ARM ARCHITECTURE |
| 1815 | −M: Christian Daudt <csd@broadcom.com> | |
| 1821 | +M: Christian Daudt <bcm@fixthebug.org> | |
| 1822 | +L: bcm-kernel-feedback-list@broadcom.com | |
| 1816 | 1823 | T: git git://git.github.com/broadcom/bcm11351 |
| 1817 | 1824 | S: Maintained |
| 1818 | 1825 | F: arch/arm/mach-bcm/ |
| @@ -2639,6 +2646,18 @@ F: include/linux/device-mapper.h · 820 unmodified lines | ||
| 2639 | 2646 | F: include/linux/dm-*.h |
| 2640 | 2647 | F: include/uapi/linux/dm-*.h |
| 2641 | 2648 | |
| 2649 | +DIGI NEO AND CLASSIC PCI PRODUCTS | |
| 2650 | +M: Lidza Louina <lidza.louina@gmail.com> | |
| 2651 | +L: driverdev-devel@linuxdriverproject.org | |
| 2652 | +S: Maintained | |
| 2653 | +F: drivers/staging/dgnc/ | |
| 2654 | + | |
| 2655 | +DIGI EPCA PCI PRODUCTS | |
| 2656 | +M: Lidza Louina <lidza.louina@gmail.com> | |
| 2657 | +L: driverdev-devel@linuxdriverproject.org | |
| 2658 | +S: Maintained | |
| 2659 | +F: drivers/staging/dgap/ | |
| 2660 | + | |
| 2642 | 2661 | DIOLAN U2C-12 I2C DRIVER |
| 2643 | 2662 | M: Guenter Roeck <linux@roeck-us.net> |
| 2644 | 2663 | L: linux-i2c@vger.kernel.org |
| @@ -4457,6 +4476,13 @@ L: linux-serial@vger.kernel.org · 1812 unmodified lines | ||
| 4457 | 4476 | S: Maintained |
| 4458 | 4477 | F: drivers/tty/serial/ioc3_serial.c |
| 4459 | 4478 | |
| 4479 | +IOMMU DRIVERS | |
| 4480 | +M: Joerg Roedel <joro@8bytes.org> | |
| 4481 | +L: iommu@lists.linux-foundation.org | |
| 4482 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git | |
| 4483 | +S: Maintained | |
| 4484 | +F: drivers/iommu/ | |
| 4485 | + | |
| 4460 | 4486 | IP MASQUERADING |
| 4461 | 4487 | M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar> |
| 4462 | 4488 | S: Maintained |
| @@ -6595,7 +6621,7 @@ S: Obsolete · 2132 unmodified lines | ||
| 6595 | 6621 | F: drivers/net/wireless/prism54/ |
| 6596 | 6622 | |
| 6597 | 6623 | PROMISE SATA TX2/TX4 CONTROLLER LIBATA DRIVER |
| 6598 | −M: Mikael Pettersson <mikpe@it.uu.se> | |
| 6624 | +M: Mikael Pettersson <mikpelinux@gmail.com> | |
| 6599 | 6625 | L: linux-ide@vger.kernel.org |
| 6600 | 6626 | S: Maintained |
| 6601 | 6627 | F: drivers/ata/sata_promise.* |
| @@ -7260,9 +7286,9 @@ F: kernel/wait.c · 658 unmodified lines | ||
| 7260 | 7286 | F: include/linux/wait.h |
| 7261 | 7287 | |
| 7262 | 7288 | SCORE ARCHITECTURE |
| 7263 | −M: Chen Liqin <liqin.chen@sunplusct.com> | |
| 7289 | +M: Chen Liqin <liqin.linux@gmail.com> | |
| 7264 | 7290 | M: Lennox Wu <lennox.wu@gmail.com> |
| 7265 | −W: http://www.sunplusct.com | |
| 7291 | +W: http://www.sunplus.com | |
| 7266 | 7292 | S: Supported |
| 7267 | 7293 | F: arch/score/ |
| 7268 | 7294 | |
| @@ -8726,9 +8752,8 @@ F: Documentation/hid/hiddev.txt · 1457 unmodified lines | ||
| 8726 | 8752 | F: drivers/hid/usbhid/ |
| 8727 | 8753 | |
| 8728 | 8754 | USB/IP DRIVERS |
| 8729 | −M: Matt Mooney <mfm@muteddisk.com> | |
| 8730 | 8755 | L: linux-usb@vger.kernel.org |
| 8731 | −S: Maintained | |
| 8756 | +S: Orphan | |
| 8732 | 8757 | F: drivers/staging/usbip/ |
| 8733 | 8758 | |
| 8734 | 8759 | USB ISP116X DRIVER |
| @@ -9368,6 +9393,7 @@ F: arch/arm64/include/asm/xen/ · 633 unmodified lines | ||
| 9368 | 9393 | |
| 9369 | 9394 | XEN NETWORK BACKEND DRIVER |
| 9370 | 9395 | M: Ian Campbell <ian.campbell@citrix.com> |
| 9396 | +M: Wei Liu <wei.liu2@citrix.com> | |
| 9371 | 9397 | L: xen-devel@lists.xenproject.org (moderated for non-subscribers) |
| 9372 | 9398 | L: netdev@vger.kernel.org |
| 9373 | 9399 | S: Supported |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | VERSION = 3 |
| 2 | 2 | PATCHLEVEL = 12 |
| 3 | 3 | SUBLEVEL = 0 |
| 4 | −EXTRAVERSION = -rc1 | |
| 4 | +EXTRAVERSION = -rc4 | |
| 5 | 5 | NAME = One Giant Leap for Frogkind |
| 6 | 6 | |
| 7 | 7 | # *DOCUMENTATION* |
| @@ -286,9 +286,6 @@ config HAVE_PERF_USER_STACK_DUMP · 285 unmodified lines | ||
| 286 | 286 | config HAVE_ARCH_JUMP_LABEL |
| 287 | 287 | bool |
| 288 | 288 | |
| 289 | −config HAVE_ARCH_MUTEX_CPU_RELAX | |
| 290 | − bool | |
| 291 | − | |
| 292 | 289 | config HAVE_RCU_TABLE_FREE |
| 293 | 290 | bool |
| 294 | 291 | |
| @@ -45,7 +45,14 @@ static inline int arch_spin_trylock(arch_spinlock_t *lock) · 44 unmodified lines | ||
| 45 | 45 | |
| 46 | 46 | static inline void arch_spin_unlock(arch_spinlock_t *lock) |
| 47 | 47 | { |
| 48 | − lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__; | |
| 48 | + unsigned int tmp = __ARCH_SPIN_LOCK_UNLOCKED__; | |
| 49 | + | |
| 50 | + __asm__ __volatile__( | |
| 51 | + " ex %0, [%1] \n" | |
| 52 | + : "+r" (tmp) | |
| 53 | + : "r"(&(lock->slock)) | |
| 54 | + : "memory"); | |
| 55 | + | |
| 49 | 56 | smp_mb(); |
| 50 | 57 | } |
| 51 | 58 | |
| @@ -43,7 +43,7 @@ · 42 unmodified lines | ||
| 43 | 43 | * Because it essentially checks if buffer end is within limit and @len is |
| 44 | 44 | * non-ngeative, which implies that buffer start will be within limit too. |
| 45 | 45 | * |
| 46 | − * The reason for rewriting being, for majorit yof cases, @len is generally | |
| 46 | + * The reason for rewriting being, for majority of cases, @len is generally | |
| 47 | 47 | * compile time constant, causing first sub-expression to be compile time |
| 48 | 48 | * subsumed. |
| 49 | 49 | * |
| @@ -53,7 +53,7 @@ · 3 unmodified lines | ||
| 53 | 53 | * |
| 54 | 54 | */ |
| 55 | 55 | #define __user_ok(addr, sz) (((sz) <= TASK_SIZE) && \ |
| 56 | − (((addr)+(sz)) <= get_fs())) | |
| 56 | + ((addr) <= (get_fs() - (sz)))) | |
| 57 | 57 | #define __access_ok(addr, sz) (unlikely(__kernel_ok) || \ |
| 58 | 58 | likely(__user_ok((addr), (sz)))) |
| 59 | 59 | |
| @@ -101,7 +101,6 @@ SYSCALL_DEFINE0(rt_sigreturn) · 100 unmodified lines | ||
| 101 | 101 | { |
| 102 | 102 | struct rt_sigframe __user *sf; |
| 103 | 103 | unsigned int magic; |
| 104 | − int err; | |
| 105 | 104 | struct pt_regs *regs = current_pt_regs(); |
| 106 | 105 | |
| 107 | 106 | /* Always make any pending restarted system calls return -EINTR */ |
| @@ -119,15 +118,16 @@ SYSCALL_DEFINE0(rt_sigreturn) · 11 unmodified lines | ||
| 119 | 118 | if (!access_ok(VERIFY_READ, sf, sizeof(*sf))) |
| 120 | 119 | goto badframe; |
| 121 | 120 | |
| 122 | − err = restore_usr_regs(regs, sf); | |
| 123 | − err |= __get_user(magic, &sf->sigret_magic); | |
| 124 | − if (err) | |
| 121 | + if (__get_user(magic, &sf->sigret_magic)) | |
| 125 | 122 | goto badframe; |
| 126 | 123 | |
| 127 | 124 | if (unlikely(is_do_ss_needed(magic))) |
| 128 | 125 | if (restore_altstack(&sf->uc.uc_stack)) |
| 129 | 126 | goto badframe; |
| 130 | 127 | |
| 128 | + if (restore_usr_regs(regs, sf)) | |
| 129 | + goto badframe; | |
| 130 | + | |
| 131 | 131 | /* Don't restart from sigreturn */ |
| 132 | 132 | syscall_wont_restart(regs); |
| 133 | 133 | |
| @@ -190,6 +190,15 @@ setup_rt_frame(int signo, struct k_sigaction *ka, siginfo_t *info, · 56 unmodified lines | ||
| 190 | 190 | if (!sf) |
| 191 | 191 | return 1; |
| 192 | 192 | |
| 193 | + /* | |
| 194 | + * w/o SA_SIGINFO, struct ucontext is partially populated (only | |
| 195 | + * uc_mcontext/uc_sigmask) for kernel's normal user state preservation | |
| 196 | + * during signal handler execution. This works for SA_SIGINFO as well | |
| 197 | + * although the semantics are now overloaded (the same reg state can be | |
| 198 | + * inspected by userland: but are they allowed to fiddle with it ? | |
| 199 | + */ | |
| 200 | + err |= stash_usr_regs(sf, regs, set); | |
| 201 | + | |
| 193 | 202 | /* |
| 194 | 203 | * SA_SIGINFO requires 3 args to signal handler: |
| 195 | 204 | * #1: sig-no (common to any handler) |
| @@ -213,14 +222,6 @@ setup_rt_frame(int signo, struct k_sigaction *ka, siginfo_t *info, · 17 unmodified lines | ||
| 213 | 222 | magic = MAGIC_SIGALTSTK; |
| 214 | 223 | } |
| 215 | 224 | |
| 216 | − /* | |
| 217 | − * w/o SA_SIGINFO, struct ucontext is partially populated (only | |
| 218 | − * uc_mcontext/uc_sigmask) for kernel's normal user state preservation | |
| 219 | − * during signal handler execution. This works for SA_SIGINFO as well | |
| 220 | − * although the semantics are now overloaded (the same reg state can be | |
| 221 | − * inspected by userland: but are they allowed to fiddle with it ? | |
| 222 | − */ | |
| 223 | − err |= stash_usr_regs(sf, regs, set); | |
| 224 | 225 | err |= __put_user(magic, &sf->sigret_magic); |
| 225 | 226 | if (err) |
| 226 | 227 | return err; |
| @@ -227,12 +227,9 @@ void __attribute__((weak)) arc_local_timer_setup(unsigned int cpu) · 226 unmodified lines | ||
| 227 | 227 | { |
| 228 | 228 | struct clock_event_device *clk = &per_cpu(arc_clockevent_device, cpu); |
| 229 | 229 | |
| 230 | − clockevents_calc_mult_shift(clk, arc_get_core_freq(), 5); | |
| 231 | − | |
| 232 | − clk->max_delta_ns = clockevent_delta2ns(ARC_TIMER_MAX, clk); | |
| 233 | 230 | clk->cpumask = cpumask_of(cpu); |
| 234 | − | |
| 235 | − clockevents_register_device(clk); | |
| 231 | + clockevents_config_and_register(clk, arc_get_core_freq(), | |
| 232 | + 0, ARC_TIMER_MAX); | |
| 236 | 233 | |
| 237 | 234 | /* |
| 238 | 235 | * setup the per-cpu timer IRQ handler - for all cpus |
| @@ -245,6 +245,12 @@ int misaligned_fixup(unsigned long address, struct pt_regs *regs, · 244 unmodified lines | ||
| 245 | 245 | regs->status32 &= ~STATUS_DE_MASK; |
| 246 | 246 | } else { |
| 247 | 247 | regs->ret += state.instr_len; |
| 248 | + | |
| 249 | + /* handle zero-overhead-loop */ | |
| 250 | + if ((regs->ret == regs->lp_end) && (regs->lp_count)) { | |
| 251 | + regs->ret = regs->lp_start; | |
| 252 | + regs->lp_count--; | |
| 253 | + } | |
| 248 | 254 | } |
| 249 | 255 | |
| 250 | 256 | return 0; |
| @@ -2217,8 +2217,7 @@ config NEON · 2216 unmodified lines | ||
| 2217 | 2217 | |
| 2218 | 2218 | config KERNEL_MODE_NEON |
| 2219 | 2219 | bool "Support for NEON in kernel mode" |
| 2220 | − default n | |
| 2221 | − depends on NEON | |
| 2220 | + depends on NEON && AEABI | |
| 2222 | 2221 | help |
| 2223 | 2222 | Say Y to include support for NEON in kernel mode. |
| 2224 | 2223 | |
| @@ -41,6 +41,8 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb · 40 unmodified lines | ||
| 41 | 41 | dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb |
| 42 | 42 | dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb |
| 43 | 43 | |
| 44 | +dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb | |
| 45 | + | |
| 44 | 46 | dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb |
| 45 | 47 | dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb \ |
| 46 | 48 | bcm28155-ap.dtb |
| @@ -183,6 +185,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ · 136 unmodified lines | ||
| 183 | 185 | am335x-evm.dtb \ |
| 184 | 186 | am335x-evmsk.dtb \ |
| 185 | 187 | am335x-bone.dtb \ |
| 188 | + am335x-boneblack.dtb \ | |
| 186 | 189 | am3517-evm.dtb \ |
| 187 | 190 | am3517_mt_ventoux.dtb \ |
| 188 | 191 | am43x-epos-evm.dtb |
| @@ -0,0 +1,262 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | |
| 3 | + * | |
| 4 | + * This program is free software; you can redistribute it and/or modify | |
| 5 | + * it under the terms of the GNU General Public License version 2 as | |
| 6 | + * published by the Free Software Foundation. | |
| 7 | + */ | |
| 8 | + | |
| 9 | +/ { | |
| 10 | + model = "TI AM335x BeagleBone"; | |
| 11 | + compatible = "ti,am335x-bone", "ti,am33xx"; | |
| 12 | + | |
| 13 | + cpus { | |
| 14 | + cpu@0 { | |
| 15 | + cpu0-supply = <&dcdc2_reg>; | |
| 16 | + }; | |
| 17 | + }; | |
| 18 | + | |
| 19 | + memory { | |
| 20 | + device_type = "memory"; | |
| 21 | + reg = <0x80000000 0x10000000>; /* 256 MB */ | |
| 22 | + }; | |
| 23 | + | |
| 24 | + am33xx_pinmux: pinmux@44e10800 { | |
| 25 | + pinctrl-names = "default"; | |
| 26 | + pinctrl-0 = <&clkout2_pin>; | |
| 27 | + | |
| 28 | + user_leds_s0: user_leds_s0 { | |
| 29 | + pinctrl-single,pins = < | |
| 30 | + 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ | |
| 31 | + 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ | |
| 32 | + 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ | |
| 33 | + 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ | |
| 34 | + >; | |
| 35 | + }; | |
| 36 | + | |
| 37 | + i2c0_pins: pinmux_i2c0_pins { | |
| 38 | + pinctrl-single,pins = < | |
| 39 | + 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ | |
| 40 | + 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ | |
| 41 | + >; | |
| 42 | + }; | |
| 43 | + | |
| 44 | + uart0_pins: pinmux_uart0_pins { | |
| 45 | + pinctrl-single,pins = < | |
| 46 | + 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ | |
| 47 | + 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ | |
| 48 | + >; | |
| 49 | + }; | |
| 50 | + | |
| 51 | + clkout2_pin: pinmux_clkout2_pin { | |
| 52 | + pinctrl-single,pins = < | |
| 53 | + 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ | |
| 54 | + >; | |
| 55 | + }; | |
| 56 | + | |
| 57 | + cpsw_default: cpsw_default { | |
| 58 | + pinctrl-single,pins = < | |
| 59 | + /* Slave 1 */ | |
| 60 | + 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ | |
| 61 | + 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ | |
| 62 | + 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ | |
| 63 | + 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ | |
| 64 | + 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ | |
| 65 | + 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ | |
| 66 | + 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ | |
| 67 | + 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ | |
| 68 | + 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ | |
| 69 | + 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ | |
| 70 | + 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ | |
| 71 | + 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ | |
| 72 | + 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ | |
| 73 | + >; | |
| 74 | + }; | |
| 75 | + | |
| 76 | + cpsw_sleep: cpsw_sleep { | |
| 77 | + pinctrl-single,pins = < | |
| 78 | + /* Slave 1 reset value */ | |
| 79 | + 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 80 | + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 81 | + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 82 | + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 83 | + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 84 | + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 85 | + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 86 | + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 87 | + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 88 | + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 89 | + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 90 | + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 91 | + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 92 | + >; | |
| 93 | + }; | |
| 94 | + | |
| 95 | + davinci_mdio_default: davinci_mdio_default { | |
| 96 | + pinctrl-single,pins = < | |
| 97 | + /* MDIO */ | |
| 98 | + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ | |
| 99 | + 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ | |
| 100 | + >; | |
| 101 | + }; | |
| 102 | + | |
| 103 | + davinci_mdio_sleep: davinci_mdio_sleep { | |
| 104 | + pinctrl-single,pins = < | |
| 105 | + /* MDIO reset value */ | |
| 106 | + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 107 | + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 108 | + >; | |
| 109 | + }; | |
| 110 | + }; | |
| 111 | + | |
| 112 | + ocp { | |
| 113 | + uart0: serial@44e09000 { | |
| 114 | + pinctrl-names = "default"; | |
| 115 | + pinctrl-0 = <&uart0_pins>; | |
| 116 | + | |
| 117 | + status = "okay"; | |
| 118 | + }; | |
| 119 | + | |
| 120 | + musb: usb@47400000 { | |
| 121 | + status = "okay"; | |
| 122 | + | |
| 123 | + control@44e10000 { | |
| 124 | + status = "okay"; | |
| 125 | + }; | |
| 126 | + | |
| 127 | + usb-phy@47401300 { | |
| 128 | + status = "okay"; | |
| 129 | + }; | |
| 130 | + | |
| 131 | + usb-phy@47401b00 { | |
| 132 | + status = "okay"; | |
| 133 | + }; | |
| 134 | + | |
| 135 | + usb@47401000 { | |
| 136 | + status = "okay"; | |
| 137 | + }; | |
| 138 | + | |
| 139 | + usb@47401800 { | |
| 140 | + status = "okay"; | |
| 141 | + dr_mode = "host"; | |
| 142 | + }; | |
| 143 | + | |
| 144 | + dma-controller@07402000 { | |
| 145 | + status = "okay"; | |
| 146 | + }; | |
| 147 | + }; | |
| 148 | + | |
| 149 | + i2c0: i2c@44e0b000 { | |
| 150 | + pinctrl-names = "default"; | |
| 151 | + pinctrl-0 = <&i2c0_pins>; | |
| 152 | + | |
| 153 | + status = "okay"; | |
| 154 | + clock-frequency = <400000>; | |
| 155 | + | |
| 156 | + tps: tps@24 { | |
| 157 | + reg = <0x24>; | |
| 158 | + }; | |
| 159 | + | |
| 160 | + }; | |
| 161 | + }; | |
| 162 | + | |
| 163 | + leds { | |
| 164 | + pinctrl-names = "default"; | |
| 165 | + pinctrl-0 = <&user_leds_s0>; | |
| 166 | + | |
| 167 | + compatible = "gpio-leds"; | |
| 168 | + | |
| 169 | + led@2 { | |
| 170 | + label = "beaglebone:green:heartbeat"; | |
| 171 | + gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; | |
| 172 | + linux,default-trigger = "heartbeat"; | |
| 173 | + default-state = "off"; | |
| 174 | + }; | |
| 175 | + | |
| 176 | + led@3 { | |
| 177 | + label = "beaglebone:green:mmc0"; | |
| 178 | + gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; | |
| 179 | + linux,default-trigger = "mmc0"; | |
| 180 | + default-state = "off"; | |
| 181 | + }; | |
| 182 | + | |
| 183 | + led@4 { | |
| 184 | + label = "beaglebone:green:usr2"; | |
| 185 | + gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; | |
| 186 | + default-state = "off"; | |
| 187 | + }; | |
| 188 | + | |
| 189 | + led@5 { | |
| 190 | + label = "beaglebone:green:usr3"; | |
| 191 | + gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; | |
| 192 | + default-state = "off"; | |
| 193 | + }; | |
| 194 | + }; | |
| 195 | +}; | |
| 196 | + | |
| 197 | +/include/ "tps65217.dtsi" | |
| 198 | + | |
| 199 | +&tps { | |
| 200 | + regulators { | |
| 201 | + dcdc1_reg: regulator@0 { | |
| 202 | + regulator-always-on; | |
| 203 | + }; | |
| 204 | + | |
| 205 | + dcdc2_reg: regulator@1 { | |
| 206 | + /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ | |
| 207 | + regulator-name = "vdd_mpu"; | |
| 208 | + regulator-min-microvolt = <925000>; | |
| 209 | + regulator-max-microvolt = <1325000>; | |
| 210 | + regulator-boot-on; | |
| 211 | + regulator-always-on; | |
| 212 | + }; | |
| 213 | + | |
| 214 | + dcdc3_reg: regulator@2 { | |
| 215 | + /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ | |
| 216 | + regulator-name = "vdd_core"; | |
| 217 | + regulator-min-microvolt = <925000>; | |
| 218 | + regulator-max-microvolt = <1150000>; | |
| 219 | + regulator-boot-on; | |
| 220 | + regulator-always-on; | |
| 221 | + }; | |
| 222 | + | |
| 223 | + ldo1_reg: regulator@3 { | |
| 224 | + regulator-always-on; | |
| 225 | + }; | |
| 226 | + | |
| 227 | + ldo2_reg: regulator@4 { | |
| 228 | + regulator-always-on; | |
| 229 | + }; | |
| 230 | + | |
| 231 | + ldo3_reg: regulator@5 { | |
| 232 | + regulator-always-on; | |
| 233 | + }; | |
| 234 | + | |
| 235 | + ldo4_reg: regulator@6 { | |
| 236 | + regulator-always-on; | |
| 237 | + }; | |
| 238 | + }; | |
| 239 | +}; | |
| 240 | + | |
| 241 | +&cpsw_emac0 { | |
| 242 | + phy_id = <&davinci_mdio>, <0>; | |
| 243 | + phy-mode = "mii"; | |
| 244 | +}; | |
| 245 | + | |
| 246 | +&cpsw_emac1 { | |
| 247 | + phy_id = <&davinci_mdio>, <1>; | |
| 248 | + phy-mode = "mii"; | |
| 249 | +}; | |
| 250 | + | |
| 251 | +&mac { | |
| 252 | + pinctrl-names = "default", "sleep"; | |
| 253 | + pinctrl-0 = <&cpsw_default>; | |
| 254 | + pinctrl-1 = <&cpsw_sleep>; | |
| 255 | + | |
| 256 | +}; | |
| 257 | + | |
| 258 | +&davinci_mdio { | |
| 259 | + pinctrl-names = "default", "sleep"; | |
| 260 | + pinctrl-0 = <&davinci_mdio_default>; | |
| 261 | + pinctrl-1 = <&davinci_mdio_sleep>; | |
| 262 | +}; | |
| @@ -8,258 +8,4 @@ · 7 unmodified lines | ||
| 8 | 8 | /dts-v1/; |
| 9 | 9 | |
| 10 | 10 | #include "am33xx.dtsi" |
| 11 | − | |
| 12 | −/ { | |
| 13 | − model = "TI AM335x BeagleBone"; | |
| 14 | − compatible = "ti,am335x-bone", "ti,am33xx"; | |
| 15 | − | |
| 16 | − cpus { | |
| 17 | − cpu@0 { | |
| 18 | − cpu0-supply = <&dcdc2_reg>; | |
| 19 | − }; | |
| 20 | − }; | |
| 21 | − | |
| 22 | − memory { | |
| 23 | − device_type = "memory"; | |
| 24 | − reg = <0x80000000 0x10000000>; /* 256 MB */ | |
| 25 | − }; | |
| 26 | − | |
| 27 | − am33xx_pinmux: pinmux@44e10800 { | |
| 28 | − pinctrl-names = "default"; | |
| 29 | − pinctrl-0 = <&clkout2_pin>; | |
| 30 | − | |
| 31 | − user_leds_s0: user_leds_s0 { | |
| 32 | − pinctrl-single,pins = < | |
| 33 | − 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ | |
| 34 | − 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ | |
| 35 | − 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ | |
| 36 | − 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ | |
| 37 | − >; | |
| 38 | − }; | |
| 39 | − | |
| 40 | − i2c0_pins: pinmux_i2c0_pins { | |
| 41 | − pinctrl-single,pins = < | |
| 42 | − 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ | |
| 43 | − 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ | |
| 44 | − >; | |
| 45 | − }; | |
| 46 | − | |
| 47 | − uart0_pins: pinmux_uart0_pins { | |
| 48 | − pinctrl-single,pins = < | |
| 49 | − 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ | |
| 50 | − 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ | |
| 51 | − >; | |
| 52 | − }; | |
| 53 | − | |
| 54 | − clkout2_pin: pinmux_clkout2_pin { | |
| 55 | − pinctrl-single,pins = < | |
| 56 | − 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ | |
| 57 | − >; | |
| 58 | − }; | |
| 59 | − | |
| 60 | − cpsw_default: cpsw_default { | |
| 61 | − pinctrl-single,pins = < | |
| 62 | − /* Slave 1 */ | |
| 63 | − 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ | |
| 64 | − 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ | |
| 65 | − 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ | |
| 66 | − 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ | |
| 67 | − 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ | |
| 68 | − 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ | |
| 69 | − 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ | |
| 70 | − 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ | |
| 71 | − 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ | |
| 72 | − 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ | |
| 73 | − 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ | |
| 74 | − 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ | |
| 75 | − 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ | |
| 76 | − >; | |
| 77 | − }; | |
| 78 | − | |
| 79 | − cpsw_sleep: cpsw_sleep { | |
| 80 | − pinctrl-single,pins = < | |
| 81 | − /* Slave 1 reset value */ | |
| 82 | − 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 83 | − 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 84 | − 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 85 | − 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 86 | − 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 87 | − 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 88 | − 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 89 | − 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 90 | − 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 91 | − 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 92 | − 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 93 | − 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 94 | − 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 95 | − >; | |
| 96 | − }; | |
| 97 | − | |
| 98 | − davinci_mdio_default: davinci_mdio_default { | |
| 99 | − pinctrl-single,pins = < | |
| 100 | − /* MDIO */ | |
| 101 | − 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ | |
| 102 | − 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ | |
| 103 | − >; | |
| 104 | − }; | |
| 105 | − | |
| 106 | − davinci_mdio_sleep: davinci_mdio_sleep { | |
| 107 | − pinctrl-single,pins = < | |
| 108 | − /* MDIO reset value */ | |
| 109 | − 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 110 | − 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 111 | − >; | |
| 112 | − }; | |
| 113 | − }; | |
| 114 | − | |
| 115 | − ocp { | |
| 116 | − uart0: serial@44e09000 { | |
| 117 | − pinctrl-names = "default"; | |
| 118 | − pinctrl-0 = <&uart0_pins>; | |
| 119 | − | |
| 120 | − status = "okay"; | |
| 121 | − }; | |
| 122 | − | |
| 123 | − musb: usb@47400000 { | |
| 124 | − status = "okay"; | |
| 125 | − | |
| 126 | − control@44e10000 { | |
| 127 | − status = "okay"; | |
| 128 | − }; | |
| 129 | − | |
| 130 | − usb-phy@47401300 { | |
| 131 | − status = "okay"; | |
| 132 | − }; | |
| 133 | − | |
| 134 | − usb-phy@47401b00 { | |
| 135 | − status = "okay"; | |
| 136 | − }; | |
| 137 | − | |
| 138 | − usb@47401000 { | |
| 139 | − status = "okay"; | |
| 140 | − }; | |
| 141 | − | |
| 142 | − usb@47401800 { | |
| 143 | − status = "okay"; | |
| 144 | − dr_mode = "host"; | |
| 145 | − }; | |
| 146 | − | |
| 147 | − dma-controller@07402000 { | |
| 148 | − status = "okay"; | |
| 149 | − }; | |
| 150 | − }; | |
| 151 | − | |
| 152 | − i2c0: i2c@44e0b000 { | |
| 153 | − pinctrl-names = "default"; | |
| 154 | − pinctrl-0 = <&i2c0_pins>; | |
| 155 | − | |
| 156 | − status = "okay"; | |
| 157 | − clock-frequency = <400000>; | |
| 158 | − | |
| 159 | − tps: tps@24 { | |
| 160 | − reg = <0x24>; | |
| 161 | − }; | |
| 162 | − | |
| 163 | − }; | |
| 164 | − }; | |
| 165 | − | |
| 166 | − leds { | |
| 167 | − pinctrl-names = "default"; | |
| 168 | − pinctrl-0 = <&user_leds_s0>; | |
| 169 | − | |
| 170 | − compatible = "gpio-leds"; | |
| 171 | − | |
| 172 | − led@2 { | |
| 173 | − label = "beaglebone:green:heartbeat"; | |
| 174 | − gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; | |
| 175 | − linux,default-trigger = "heartbeat"; | |
| 176 | − default-state = "off"; | |
| 177 | − }; | |
| 178 | − | |
| 179 | − led@3 { | |
| 180 | − label = "beaglebone:green:mmc0"; | |
| 181 | − gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; | |
| 182 | − linux,default-trigger = "mmc0"; | |
| 183 | − default-state = "off"; | |
| 184 | − }; | |
| 185 | − | |
| 186 | − led@4 { | |
| 187 | − label = "beaglebone:green:usr2"; | |
| 188 | − gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; | |
| 189 | − default-state = "off"; | |
| 190 | − }; | |
| 191 | − | |
| 192 | − led@5 { | |
| 193 | − label = "beaglebone:green:usr3"; | |
| 194 | − gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; | |
| 195 | − default-state = "off"; | |
| 196 | − }; | |
| 197 | − }; | |
| 198 | −}; | |
| 199 | − | |
| 200 | −/include/ "tps65217.dtsi" | |
| 201 | − | |
| 202 | −&tps { | |
| 203 | − regulators { | |
| 204 | − dcdc1_reg: regulator@0 { | |
| 205 | − regulator-always-on; | |
| 206 | − }; | |
| 207 | − | |
| 208 | − dcdc2_reg: regulator@1 { | |
| 209 | − /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ | |
| 210 | − regulator-name = "vdd_mpu"; | |
| 211 | − regulator-min-microvolt = <925000>; | |
| 212 | − regulator-max-microvolt = <1325000>; | |
| 213 | − regulator-boot-on; | |
| 214 | − regulator-always-on; | |
| 215 | − }; | |
| 216 | − | |
| 217 | − dcdc3_reg: regulator@2 { | |
| 218 | − /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ | |
| 219 | − regulator-name = "vdd_core"; | |
| 220 | − regulator-min-microvolt = <925000>; | |
| 221 | − regulator-max-microvolt = <1150000>; | |
| 222 | − regulator-boot-on; | |
| 223 | − regulator-always-on; | |
| 224 | − }; | |
| 225 | − | |
| 226 | − ldo1_reg: regulator@3 { | |
| 227 | − regulator-always-on; | |
| 228 | − }; | |
| 229 | − | |
| 230 | − ldo2_reg: regulator@4 { | |
| 231 | − regulator-always-on; | |
| 232 | − }; | |
| 233 | − | |
| 234 | − ldo3_reg: regulator@5 { | |
| 235 | − regulator-always-on; | |
| 236 | − }; | |
| 237 | − | |
| 238 | − ldo4_reg: regulator@6 { | |
| 239 | − regulator-always-on; | |
| 240 | − }; | |
| 241 | − }; | |
| 242 | −}; | |
| 243 | − | |
| 244 | −&cpsw_emac0 { | |
| 245 | − phy_id = <&davinci_mdio>, <0>; | |
| 246 | − phy-mode = "mii"; | |
| 247 | −}; | |
| 248 | − | |
| 249 | −&cpsw_emac1 { | |
| 250 | − phy_id = <&davinci_mdio>, <1>; | |
| 251 | − phy-mode = "mii"; | |
| 252 | −}; | |
| 253 | − | |
| 254 | −&mac { | |
| 255 | − pinctrl-names = "default", "sleep"; | |
| 256 | − pinctrl-0 = <&cpsw_default>; | |
| 257 | − pinctrl-1 = <&cpsw_sleep>; | |
| 258 | − | |
| 259 | −}; | |
| 260 | − | |
| 261 | −&davinci_mdio { | |
| 262 | − pinctrl-names = "default", "sleep"; | |
| 263 | − pinctrl-0 = <&davinci_mdio_default>; | |
| 264 | − pinctrl-1 = <&davinci_mdio_sleep>; | |
| 265 | −}; | |
| 11 | +#include "am335x-bone-common.dtsi" | |
| @@ -0,0 +1,17 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | |
| 3 | + * | |
| 4 | + * This program is free software; you can redistribute it and/or modify | |
| 5 | + * it under the terms of the GNU General Public License version 2 as | |
| 6 | + * published by the Free Software Foundation. | |
| 7 | + */ | |
| 8 | +/dts-v1/; | |
| 9 | + | |
| 10 | +#include "am33xx.dtsi" | |
| 11 | +#include "am335x-bone-common.dtsi" | |
| 12 | + | |
| 13 | +&ldo3_reg { | |
| 14 | + regulator-min-microvolt = <1800000>; | |
| 15 | + regulator-max-microvolt = <1800000>; | |
| 16 | + regulator-always-on; | |
| 17 | +}; | |
| @@ -27,6 +27,25 @@ · 26 unmodified lines | ||
| 27 | 27 | }; |
| 28 | 28 | |
| 29 | 29 | soc { |
| 30 | + ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 | |
| 31 | + MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; | |
| 32 | + | |
| 33 | + pcie-controller { | |
| 34 | + status = "okay"; | |
| 35 | + | |
| 36 | + /* Connected to Marvell SATA controller */ | |
| 37 | + pcie@1,0 { | |
| 38 | + /* Port 0, Lane 0 */ | |
| 39 | + status = "okay"; | |
| 40 | + }; | |
| 41 | + | |
| 42 | + /* Connected to FL1009 USB 3.0 controller */ | |
| 43 | + pcie@2,0 { | |
| 44 | + /* Port 1, Lane 0 */ | |
| 45 | + status = "okay"; | |
| 46 | + }; | |
| 47 | + }; | |
| 48 | + | |
| 30 | 49 | internal-regs { |
| 31 | 50 | serial@12000 { |
| 32 | 51 | clock-frequency = <200000000>; |
| @@ -57,6 +76,11 @@ · 24 unmodified lines | ||
| 57 | 76 | marvell,pins = "mpp56"; |
| 58 | 77 | marvell,function = "gpio"; |
| 59 | 78 | }; |
| 79 | + | |
| 80 | + poweroff: poweroff { | |
| 81 | + marvell,pins = "mpp8"; | |
| 82 | + marvell,function = "gpio"; | |
| 83 | + }; | |
| 60 | 84 | }; |
| 61 | 85 | |
| 62 | 86 | mdio { |
| @@ -89,22 +113,6 @@ · 26 unmodified lines | ||
| 89 | 113 | pwm_polarity = <0>; |
| 90 | 114 | }; |
| 91 | 115 | }; |
| 92 | − | |
| 93 | − pcie-controller { | |
| 94 | − status = "okay"; | |
| 95 | − | |
| 96 | − /* Connected to Marvell SATA controller */ | |
| 97 | − pcie@1,0 { | |
| 98 | − /* Port 0, Lane 0 */ | |
| 99 | − status = "okay"; | |
| 100 | − }; | |
| 101 | − | |
| 102 | − /* Connected to FL1009 USB 3.0 controller */ | |
| 103 | − pcie@2,0 { | |
| 104 | − /* Port 1, Lane 0 */ | |
| 105 | − status = "okay"; | |
| 106 | − }; | |
| 107 | − }; | |
| 108 | 116 | }; |
| 109 | 117 | }; |
| 110 | 118 | |
| @@ -160,7 +168,7 @@ · 49 unmodified lines | ||
| 160 | 168 | button@1 { |
| 161 | 169 | label = "Power Button"; |
| 162 | 170 | linux,code = <116>; /* KEY_POWER */ |
| 163 | − gpios = <&gpio1 30 1>; | |
| 171 | + gpios = <&gpio1 30 0>; | |
| 164 | 172 | }; |
| 165 | 173 | |
| 166 | 174 | button@2 { |
| @@ -176,4 +184,11 @@ · 9 unmodified lines | ||
| 176 | 184 | }; |
| 177 | 185 | }; |
| 178 | 186 | |
| 187 | + gpio_poweroff { | |
| 188 | + compatible = "gpio-poweroff"; | |
| 189 | + pinctrl-0 = <&poweroff>; | |
| 190 | + pinctrl-names = "default"; | |
| 191 | + gpios = <&gpio0 8 1>; | |
| 192 | + }; | |
| 193 | + | |
| 179 | 194 | }; |
| @@ -70,6 +70,8 @@ · 69 unmodified lines | ||
| 70 | 70 | |
| 71 | 71 | timer@20300 { |
| 72 | 72 | compatible = "marvell,armada-xp-timer"; |
| 73 | + clocks = <&coreclk 2>, <&refclk>; | |
| 74 | + clock-names = "nbclk", "fixed"; | |
| 73 | 75 | }; |
| 74 | 76 | |
| 75 | 77 | coreclk: mvebu-sar@18230 { |
| @@ -169,4 +171,13 @@ · 93 unmodified lines | ||
| 169 | 171 | }; |
| 170 | 172 | }; |
| 171 | 173 | }; |
| 174 | + | |
| 175 | + clocks { | |
| 176 | + /* 25 MHz reference crystal */ | |
| 177 | + refclk: oscillator { | |
| 178 | + compatible = "fixed-clock"; | |
| 179 | + #clock-cells = <0>; | |
| 180 | + clock-frequency = <25000000>; | |
| 181 | + }; | |
| 182 | + }; | |
| 172 | 183 | }; |
| @@ -190,12 +190,12 @@ · 189 unmodified lines | ||
| 190 | 190 | AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */ |
| 191 | 191 | }; |
| 192 | 192 | |
| 193 | − pinctrl_uart2_rts: uart2_rts-0 { | |
| 193 | + pinctrl_usart2_rts: usart2_rts-0 { | |
| 194 | 194 | atmel,pins = |
| 195 | 195 | <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */ |
| 196 | 196 | }; |
| 197 | 197 | |
| 198 | − pinctrl_uart2_cts: uart2_cts-0 { | |
| 198 | + pinctrl_usart2_cts: usart2_cts-0 { | |
| 199 | 199 | atmel,pins = |
| 200 | 200 | <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */ |
| 201 | 201 | }; |
| @@ -556,6 +556,7 @@ · 354 unmodified lines | ||
| 556 | 556 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; |
| 557 | 557 | dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>; |
| 558 | 558 | dma-names = "rxtx"; |
| 559 | + pinctrl-names = "default"; | |
| 559 | 560 | #address-cells = <1>; |
| 560 | 561 | #size-cells = <0>; |
| 561 | 562 | status = "disabled"; |
| @@ -567,6 +568,7 @@ · 5 unmodified lines | ||
| 567 | 568 | interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; |
| 568 | 569 | dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>; |
| 569 | 570 | dma-names = "rxtx"; |
| 571 | + pinctrl-names = "default"; | |
| 570 | 572 | #address-cells = <1>; |
| 571 | 573 | #size-cells = <0>; |
| 572 | 574 | status = "disabled"; |
| @@ -181,6 +181,8 @@ · 180 unmodified lines | ||
| 181 | 181 | interrupts = <17>; |
| 182 | 182 | fifosize = <128>; |
| 183 | 183 | clocks = <&clks 13>; |
| 184 | + sirf,uart-dma-rx-channel = <21>; | |
| 185 | + sirf,uart-dma-tx-channel = <2>; | |
| 184 | 186 | }; |
| 185 | 187 | |
| 186 | 188 | uart1: uart@b0060000 { |
| @@ -199,6 +201,8 @@ · 12 unmodified lines | ||
| 199 | 201 | interrupts = <19>; |
| 200 | 202 | fifosize = <128>; |
| 201 | 203 | clocks = <&clks 15>; |
| 204 | + sirf,uart-dma-rx-channel = <6>; | |
| 205 | + sirf,uart-dma-tx-channel = <7>; | |
| 202 | 206 | }; |
| 203 | 207 | |
| 204 | 208 | usp0: usp@b0080000 { |
| @@ -206,7 +210,10 @@ · 1 unmodified line | ||
| 206 | 210 | compatible = "sirf,prima2-usp"; |
| 207 | 211 | reg = <0xb0080000 0x10000>; |
| 208 | 212 | interrupts = <20>; |
| 213 | + fifosize = <128>; | |
| 209 | 214 | clocks = <&clks 28>; |
| 215 | + sirf,usp-dma-rx-channel = <17>; | |
| 216 | + sirf,usp-dma-tx-channel = <18>; | |
| 210 | 217 | }; |
| 211 | 218 | |
| 212 | 219 | usp1: usp@b0090000 { |
| @@ -214,7 +221,10 @@ · 1 unmodified line | ||
| 214 | 221 | compatible = "sirf,prima2-usp"; |
| 215 | 222 | reg = <0xb0090000 0x10000>; |
| 216 | 223 | interrupts = <21>; |
| 224 | + fifosize = <128>; | |
| 217 | 225 | clocks = <&clks 29>; |
| 226 | + sirf,usp-dma-rx-channel = <14>; | |
| 227 | + sirf,usp-dma-tx-channel = <15>; | |
| 218 | 228 | }; |
| 219 | 229 | |
| 220 | 230 | dmac0: dma-controller@b00b0000 { |
| @@ -237,6 +247,8 @@ · 16 unmodified lines | ||
| 237 | 247 | compatible = "sirf,prima2-vip"; |
| 238 | 248 | reg = <0xb00C0000 0x10000>; |
| 239 | 249 | clocks = <&clks 31>; |
| 250 | + interrupts = <14>; | |
| 251 | + sirf,vip-dma-rx-channel = <16>; | |
| 240 | 252 | }; |
| 241 | 253 | |
| 242 | 254 | spi0: spi@b00d0000 { |
| @@ -187,7 +187,7 @@ · 186 unmodified lines | ||
| 187 | 187 | compatible = "fsl,imx27-cspi"; |
| 188 | 188 | reg = <0x1000e000 0x1000>; |
| 189 | 189 | interrupts = <16>; |
| 190 | − clocks = <&clks 53>, <&clks 53>; | |
| 190 | + clocks = <&clks 53>, <&clks 60>; | |
| 191 | 191 | clock-names = "ipg", "per"; |
| 192 | 192 | status = "disabled"; |
| 193 | 193 | }; |
| @@ -198,7 +198,7 @@ · 4 unmodified lines | ||
| 198 | 198 | compatible = "fsl,imx27-cspi"; |
| 199 | 199 | reg = <0x1000f000 0x1000>; |
| 200 | 200 | interrupts = <15>; |
| 201 | − clocks = <&clks 52>, <&clks 52>; | |
| 201 | + clocks = <&clks 52>, <&clks 60>; | |
| 202 | 202 | clock-names = "ipg", "per"; |
| 203 | 203 | status = "disabled"; |
| 204 | 204 | }; |
| @@ -309,7 +309,7 @@ · 104 unmodified lines | ||
| 309 | 309 | compatible = "fsl,imx27-cspi"; |
| 310 | 310 | reg = <0x10017000 0x1000>; |
| 311 | 311 | interrupts = <6>; |
| 312 | − clocks = <&clks 51>, <&clks 51>; | |
| 312 | + clocks = <&clks 51>, <&clks 60>; | |
| 313 | 313 | clock-names = "ipg", "per"; |
| 314 | 314 | status = "disabled"; |
| 315 | 315 | }; |
| @@ -474,7 +474,7 @@ · 473 unmodified lines | ||
| 474 | 474 | compatible = "fsl,imx51-pata", "fsl,imx27-pata"; |
| 475 | 475 | reg = <0x83fe0000 0x4000>; |
| 476 | 476 | interrupts = <70>; |
| 477 | − clocks = <&clks 161>; | |
| 477 | + clocks = <&clks 172>; | |
| 478 | 478 | status = "disabled"; |
| 479 | 479 | }; |
| 480 | 480 | |
| @@ -207,8 +207,8 @@ · 206 unmodified lines | ||
| 207 | 207 | #define MX6QDL_PAD_EIM_D29__ECSPI4_SS0 0x0c8 0x3dc 0x824 0x2 0x1 |
| 208 | 208 | #define MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x0c8 0x3dc 0x924 0x4 0x1 |
| 209 | 209 | #define MX6QDL_PAD_EIM_D29__UART2_CTS_B 0x0c8 0x3dc 0x000 0x4 0x0 |
| 210 | −#define MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x0c4 0x3dc 0x000 0x4 0x0 | |
| 211 | −#define MX6QDL_PAD_EIM_D29__UART2_DTE_CTS_B 0x0c4 0x3dc 0x924 0x4 0x1 | |
| 210 | +#define MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x0c8 0x3dc 0x000 0x4 0x0 | |
| 211 | +#define MX6QDL_PAD_EIM_D29__UART2_DTE_CTS_B 0x0c8 0x3dc 0x924 0x4 0x1 | |
| 212 | 212 | #define MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x0c8 0x3dc 0x000 0x5 0x0 |
| 213 | 213 | #define MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x0c8 0x3dc 0x8e4 0x6 0x0 |
| 214 | 214 | #define MX6QDL_PAD_EIM_D29__IPU1_DI0_PIN14 0x0c8 0x3dc 0x000 0x7 0x0 |
| @@ -13,6 +13,7 @@ · 12 unmodified lines | ||
| 13 | 13 | cpu@0 { |
| 14 | 14 | device_type = "cpu"; |
| 15 | 15 | compatible = "marvell,feroceon"; |
| 16 | + reg = <0>; | |
| 16 | 17 | clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>; |
| 17 | 18 | clock-names = "cpu_clk", "ddrclk", "powersave"; |
| 18 | 19 | }; |
| @@ -167,7 +168,7 @@ · 148 unmodified lines | ||
| 167 | 168 | xor@60900 { |
| 168 | 169 | compatible = "marvell,orion-xor"; |
| 169 | 170 | reg = <0x60900 0x100 |
| 170 | − 0xd0B00 0x100>; | |
| 171 | + 0x60B00 0x100>; | |
| 171 | 172 | status = "okay"; |
| 172 | 173 | clocks = <&gate_clk 16>; |
| 173 | 174 | |
| @@ -11,7 +11,7 @@ · 10 unmodified lines | ||
| 11 | 11 | |
| 12 | 12 | / { |
| 13 | 13 | model = "TI OMAP3 BeagleBoard xM"; |
| 14 | − compatible = "ti,omap3-beagle-xm, ti,omap3-beagle", "ti,omap3"; | |
| 14 | + compatible = "ti,omap3-beagle-xm", "ti,omap3-beagle", "ti,omap3"; | |
| 15 | 15 | |
| 16 | 16 | cpus { |
| 17 | 17 | cpu@0 { |
| @@ -48,6 +48,15 @@ · 47 unmodified lines | ||
| 48 | 48 | >; |
| 49 | 49 | }; |
| 50 | 50 | |
| 51 | + mcbsp2_pins: pinmux_mcbsp2_pins { | |
| 52 | + pinctrl-single,pins = < | |
| 53 | + 0x10c (PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */ | |
| 54 | + 0x10e (PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */ | |
| 55 | + 0x110 (PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */ | |
| 56 | + 0x112 (PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */ | |
| 57 | + >; | |
| 58 | + }; | |
| 59 | + | |
| 51 | 60 | mmc1_pins: pinmux_mmc1_pins { |
| 52 | 61 | pinctrl-single,pins = < |
| 53 | 62 | 0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ |
| @@ -93,6 +102,11 @@ · 39 unmodified lines | ||
| 93 | 102 | clock-frequency = <400000>; |
| 94 | 103 | }; |
| 95 | 104 | |
| 105 | +&mcbsp2 { | |
| 106 | + pinctrl-names = "default"; | |
| 107 | + pinctrl-0 = <&mcbsp2_pins>; | |
| 108 | +}; | |
| 109 | + | |
| 96 | 110 | &mmc1 { |
| 97 | 111 | pinctrl-names = "default"; |
| 98 | 112 | pinctrl-0 = <&mmc1_pins>; |
| @@ -107,6 +107,19 @@ · 106 unmodified lines | ||
| 107 | 107 | */ |
| 108 | 108 | clock-frequency = <19200000>; |
| 109 | 109 | }; |
| 110 | + | |
| 111 | + /* regulator for wl12xx on sdio5 */ | |
| 112 | + wl12xx_vmmc: wl12xx_vmmc { | |
| 113 | + pinctrl-names = "default"; | |
| 114 | + pinctrl-0 = <&wl12xx_gpio>; | |
| 115 | + compatible = "regulator-fixed"; | |
| 116 | + regulator-name = "vwl1271"; | |
| 117 | + regulator-min-microvolt = <1800000>; | |
| 118 | + regulator-max-microvolt = <1800000>; | |
| 119 | + gpio = <&gpio2 11 0>; | |
| 120 | + startup-delay-us = <70000>; | |
| 121 | + enable-active-high; | |
| 122 | + }; | |
| 110 | 123 | }; |
| 111 | 124 | |
| 112 | 125 | &omap4_pmx_wkup { |
| @@ -235,6 +248,33 @@ · 122 unmodified lines | ||
| 235 | 248 | 0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */ |
| 236 | 249 | >; |
| 237 | 250 | }; |
| 251 | + | |
| 252 | + /* | |
| 253 | + * wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP | |
| 254 | + * REVISIT: Are the pull-ups needed for GPIO 48 and 49? | |
| 255 | + */ | |
| 256 | + wl12xx_gpio: pinmux_wl12xx_gpio { | |
| 257 | + pinctrl-single,pins = < | |
| 258 | + 0x26 (PIN_OUTPUT | MUX_MODE3) /* gpmc_a19.gpio_43 */ | |
| 259 | + 0x2c (PIN_OUTPUT | MUX_MODE3) /* gpmc_a22.gpio_46 */ | |
| 260 | + 0x30 (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a24.gpio_48 */ | |
| 261 | + 0x32 (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_a25.gpio_49 */ | |
| 262 | + >; | |
| 263 | + }; | |
| 264 | + | |
| 265 | + /* wl12xx GPIO inputs and SDIO pins */ | |
| 266 | + wl12xx_pins: pinmux_wl12xx_pins { | |
| 267 | + pinctrl-single,pins = < | |
| 268 | + 0x38 (PIN_INPUT | MUX_MODE3) /* gpmc_ncs2.gpio_52 */ | |
| 269 | + 0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */ | |
| 270 | + 0x108 (PIN_OUTPUT | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */ | |
| 271 | + 0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */ | |
| 272 | + 0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */ | |
| 273 | + 0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */ | |
| 274 | + 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */ | |
| 275 | + 0x112 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */ | |
| 276 | + >; | |
| 277 | + }; | |
| 238 | 278 | }; |
| 239 | 279 | |
| 240 | 280 | &i2c1 { |
| @@ -314,8 +354,12 @@ · 73 unmodified lines | ||
| 314 | 354 | }; |
| 315 | 355 | |
| 316 | 356 | &mmc5 { |
| 317 | − ti,non-removable; | |
| 357 | + pinctrl-names = "default"; | |
| 358 | + pinctrl-0 = <&wl12xx_pins>; | |
| 359 | + vmmc-supply = <&wl12xx_vmmc>; | |
| 360 | + non-removable; | |
| 318 | 361 | bus-width = <4>; |
| 362 | + cap-power-off-card; | |
| 319 | 363 | }; |
| 320 | 364 | |
| 321 | 365 | &emif1 { |
| @@ -140,6 +140,19 @@ · 139 unmodified lines | ||
| 140 | 140 | "DMic", "Digital Mic", |
| 141 | 141 | "Digital Mic", "Digital Mic1 Bias"; |
| 142 | 142 | }; |
| 143 | + | |
| 144 | + /* regulator for wl12xx on sdio5 */ | |
| 145 | + wl12xx_vmmc: wl12xx_vmmc { | |
| 146 | + pinctrl-names = "default"; | |
| 147 | + pinctrl-0 = <&wl12xx_gpio>; | |
| 148 | + compatible = "regulator-fixed"; | |
| 149 | + regulator-name = "vwl1271"; | |
| 150 | + regulator-min-microvolt = <1800000>; | |
| 151 | + regulator-max-microvolt = <1800000>; | |
| 152 | + gpio = <&gpio2 22 0>; | |
| 153 | + startup-delay-us = <70000>; | |
| 154 | + enable-active-high; | |
| 155 | + }; | |
| 143 | 156 | }; |
| 144 | 157 | |
| 145 | 158 | &omap4_pmx_wkup { |
| @@ -295,6 +308,26 @@ · 149 unmodified lines | ||
| 295 | 308 | 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */ |
| 296 | 309 | >; |
| 297 | 310 | }; |
| 311 | + | |
| 312 | + /* wl12xx GPIO output for WLAN_EN */ | |
| 313 | + wl12xx_gpio: pinmux_wl12xx_gpio { | |
| 314 | + pinctrl-single,pins = < | |
| 315 | + 0x3c (PIN_OUTPUT | MUX_MODE3) /* gpmc_nwp.gpio_54 */ | |
| 316 | + >; | |
| 317 | + }; | |
| 318 | + | |
| 319 | + /* wl12xx GPIO inputs and SDIO pins */ | |
| 320 | + wl12xx_pins: pinmux_wl12xx_pins { | |
| 321 | + pinctrl-single,pins = < | |
| 322 | + 0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */ | |
| 323 | + 0x108 (PIN_OUTPUT | MUX_MODE3) /* sdmmc5_clk.sdmmc5_clk */ | |
| 324 | + 0x10a (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_cmd.sdmmc5_cmd */ | |
| 325 | + 0x10c (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat0.sdmmc5_dat0 */ | |
| 326 | + 0x10e (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat1.sdmmc5_dat1 */ | |
| 327 | + 0x110 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat2.sdmmc5_dat2 */ | |
| 328 | + 0x112 (PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc5_dat3.sdmmc5_dat3 */ | |
| 329 | + >; | |
| 330 | + }; | |
| 298 | 331 | }; |
| 299 | 332 | |
| 300 | 333 | &i2c1 { |
| @@ -420,8 +453,12 @@ · 119 unmodified lines | ||
| 420 | 453 | }; |
| 421 | 454 | |
| 422 | 455 | &mmc5 { |
| 456 | + pinctrl-names = "default"; | |
| 457 | + pinctrl-0 = <&wl12xx_pins>; | |
| 458 | + vmmc-supply = <&wl12xx_vmmc>; | |
| 459 | + non-removable; | |
| 423 | 460 | bus-width = <4>; |
| 424 | − ti,non-removable; | |
| 461 | + cap-power-off-card; | |
| 425 | 462 | }; |
| 426 | 463 | |
| 427 | 464 | &emif1 { |
| @@ -637,7 +637,7 @@ · 636 unmodified lines | ||
| 637 | 637 | omap_dwc3@4a020000 { |
| 638 | 638 | compatible = "ti,dwc3"; |
| 639 | 639 | ti,hwmods = "usb_otg_ss"; |
| 640 | − reg = <0x4a020000 0x1000>; | |
| 640 | + reg = <0x4a020000 0x10000>; | |
| 641 | 641 | interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; |
| 642 | 642 | #address-cells = <1>; |
| 643 | 643 | #size-cells = <1>; |
| @@ -645,17 +645,18 @@ · 1 unmodified line | ||
| 645 | 645 | ranges; |
| 646 | 646 | dwc3@4a030000 { |
| 647 | 647 | compatible = "snps,dwc3"; |
| 648 | − reg = <0x4a030000 0x1000>; | |
| 648 | + reg = <0x4a030000 0x10000>; | |
| 649 | 649 | interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; |
| 650 | 650 | usb-phy = <&usb2_phy>, <&usb3_phy>; |
| 651 | 651 | tx-fifo-resize; |
| 652 | 652 | }; |
| 653 | 653 | }; |
| 654 | 654 | |
| 655 | − ocp2scp { | |
| 655 | + ocp2scp@4a080000 { | |
| 656 | 656 | compatible = "ti,omap-ocp2scp"; |
| 657 | 657 | #address-cells = <1>; |
| 658 | 658 | #size-cells = <1>; |
| 659 | + reg = <0x4a080000 0x20>; | |
| 659 | 660 | ranges; |
| 660 | 661 | ti,hwmods = "ocp2scp1"; |
| 661 | 662 | usb2_phy: usb2phy@4a084000 { |
| @@ -171,7 +171,8 @@ · 170 unmodified lines | ||
| 171 | 171 | compatible = "simple-bus"; |
| 172 | 172 | #address-cells = <1>; |
| 173 | 173 | #size-cells = <1>; |
| 174 | − ranges = <0xb0000000 0xb0000000 0x180000>; | |
| 174 | + ranges = <0xb0000000 0xb0000000 0x180000>, | |
| 175 | + <0x56000000 0x56000000 0x1b00000>; | |
| 175 | 176 | |
| 176 | 177 | timer@b0020000 { |
| 177 | 178 | compatible = "sirf,prima2-tick"; |
| @@ -196,25 +197,32 @@ · 18 unmodified lines | ||
| 196 | 197 | uart0: uart@b0050000 { |
| 197 | 198 | cell-index = <0>; |
| 198 | 199 | compatible = "sirf,prima2-uart"; |
| 199 | − reg = <0xb0050000 0x10000>; | |
| 200 | + reg = <0xb0050000 0x1000>; | |
| 200 | 201 | interrupts = <17>; |
| 202 | + fifosize = <128>; | |
| 201 | 203 | clocks = <&clks 13>; |
| 204 | + sirf,uart-dma-rx-channel = <21>; | |
| 205 | + sirf,uart-dma-tx-channel = <2>; | |
| 202 | 206 | }; |
| 203 | 207 | |
| 204 | 208 | uart1: uart@b0060000 { |
| 205 | 209 | cell-index = <1>; |
| 206 | 210 | compatible = "sirf,prima2-uart"; |
| 207 | − reg = <0xb0060000 0x10000>; | |
| 211 | + reg = <0xb0060000 0x1000>; | |
| 208 | 212 | interrupts = <18>; |
| 213 | + fifosize = <32>; | |
| 209 | 214 | clocks = <&clks 14>; |
| 210 | 215 | }; |
| 211 | 216 | |
| 212 | 217 | uart2: uart@b0070000 { |
| 213 | 218 | cell-index = <2>; |
| 214 | 219 | compatible = "sirf,prima2-uart"; |
| 215 | − reg = <0xb0070000 0x10000>; | |
| 220 | + reg = <0xb0070000 0x1000>; | |
| 216 | 221 | interrupts = <19>; |
| 222 | + fifosize = <128>; | |
| 217 | 223 | clocks = <&clks 15>; |
| 224 | + sirf,uart-dma-rx-channel = <6>; | |
| 225 | + sirf,uart-dma-tx-channel = <7>; | |
| 218 | 226 | }; |
| 219 | 227 | |
| 220 | 228 | usp0: usp@b0080000 { |
| @@ -222,7 +230,10 @@ · 1 unmodified line | ||
| 222 | 230 | compatible = "sirf,prima2-usp"; |
| 223 | 231 | reg = <0xb0080000 0x10000>; |
| 224 | 232 | interrupts = <20>; |
| 233 | + fifosize = <128>; | |
| 225 | 234 | clocks = <&clks 28>; |
| 235 | + sirf,usp-dma-rx-channel = <17>; | |
| 236 | + sirf,usp-dma-tx-channel = <18>; | |
| 226 | 237 | }; |
| 227 | 238 | |
| 228 | 239 | usp1: usp@b0090000 { |
| @@ -230,7 +241,10 @@ · 1 unmodified line | ||
| 230 | 241 | compatible = "sirf,prima2-usp"; |
| 231 | 242 | reg = <0xb0090000 0x10000>; |
| 232 | 243 | interrupts = <21>; |
| 244 | + fifosize = <128>; | |
| 233 | 245 | clocks = <&clks 29>; |
| 246 | + sirf,usp-dma-rx-channel = <14>; | |
| 247 | + sirf,usp-dma-tx-channel = <15>; | |
| 234 | 248 | }; |
| 235 | 249 | |
| 236 | 250 | usp2: usp@b00a0000 { |
| @@ -238,7 +252,10 @@ · 1 unmodified line | ||
| 238 | 252 | compatible = "sirf,prima2-usp"; |
| 239 | 253 | reg = <0xb00a0000 0x10000>; |
| 240 | 254 | interrupts = <22>; |
| 255 | + fifosize = <128>; | |
| 241 | 256 | clocks = <&clks 30>; |
| 257 | + sirf,usp-dma-rx-channel = <10>; | |
| 258 | + sirf,usp-dma-tx-channel = <11>; | |
| 242 | 259 | }; |
| 243 | 260 | |
| 244 | 261 | dmac0: dma-controller@b00b0000 { |
| @@ -261,6 +278,8 @@ · 16 unmodified lines | ||
| 261 | 278 | compatible = "sirf,prima2-vip"; |
| 262 | 279 | reg = <0xb00C0000 0x10000>; |
| 263 | 280 | clocks = <&clks 31>; |
| 281 | + interrupts = <14>; | |
| 282 | + sirf,vip-dma-rx-channel = <16>; | |
| 264 | 283 | }; |
| 265 | 284 | |
| 266 | 285 | spi0: spi@b00d0000 { |
| @@ -193,7 +193,7 @@ · 192 unmodified lines | ||
| 193 | 193 | }; |
| 194 | 194 | |
| 195 | 195 | sdhi0: sdhi@ee100000 { |
| 196 | − compatible = "renesas,r8a73a4-sdhi"; | |
| 196 | + compatible = "renesas,sdhi-r8a73a4"; | |
| 197 | 197 | reg = <0 0xee100000 0 0x100>; |
| 198 | 198 | interrupt-parent = <&gic>; |
| 199 | 199 | interrupts = <0 165 4>; |
| @@ -202,7 +202,7 @@ · 2 unmodified lines | ||
| 202 | 202 | }; |
| 203 | 203 | |
| 204 | 204 | sdhi1: sdhi@ee120000 { |
| 205 | − compatible = "renesas,r8a73a4-sdhi"; | |
| 205 | + compatible = "renesas,sdhi-r8a73a4"; | |
| 206 | 206 | reg = <0 0xee120000 0 0x100>; |
| 207 | 207 | interrupt-parent = <&gic>; |
| 208 | 208 | interrupts = <0 166 4>; |
| @@ -211,7 +211,7 @@ · 2 unmodified lines | ||
| 211 | 211 | }; |
| 212 | 212 | |
| 213 | 213 | sdhi2: sdhi@ee140000 { |
| 214 | − compatible = "renesas,r8a73a4-sdhi"; | |
| 214 | + compatible = "renesas,sdhi-r8a73a4"; | |
| 215 | 215 | reg = <0 0xee140000 0 0x100>; |
| 216 | 216 | interrupt-parent = <&gic>; |
| 217 | 217 | interrupts = <0 167 4>; |
| @@ -96,6 +96,5 @@ · 95 unmodified lines | ||
| 96 | 96 | pfc: pfc@fffc0000 { |
| 97 | 97 | compatible = "renesas,pfc-r8a7778"; |
| 98 | 98 | reg = <0xfffc000 0x118>; |
| 99 | − #gpio-range-cells = <3>; | |
| 100 | 99 | }; |
| 101 | 100 | }; |
| @@ -188,7 +188,6 @@ · 187 unmodified lines | ||
| 188 | 188 | pfc: pfc@fffc0000 { |
| 189 | 189 | compatible = "renesas,pfc-r8a7779"; |
| 190 | 190 | reg = <0xfffc0000 0x23c>; |
| 191 | − #gpio-range-cells = <3>; | |
| 192 | 191 | }; |
| 193 | 192 | |
| 194 | 193 | thermal@ffc48000 { |
| @@ -148,11 +148,10 @@ · 147 unmodified lines | ||
| 148 | 148 | pfc: pfc@e6060000 { |
| 149 | 149 | compatible = "renesas,pfc-r8a7790"; |
| 150 | 150 | reg = <0 0xe6060000 0 0x250>; |
| 151 | − #gpio-range-cells = <3>; | |
| 152 | 151 | }; |
| 153 | 152 | |
| 154 | 153 | sdhi0: sdhi@ee100000 { |
| 155 | − compatible = "renesas,r8a7790-sdhi"; | |
| 154 | + compatible = "renesas,sdhi-r8a7790"; | |
| 156 | 155 | reg = <0 0xee100000 0 0x100>; |
| 157 | 156 | interrupt-parent = <&gic>; |
| 158 | 157 | interrupts = <0 165 4>; |
| @@ -161,7 +160,7 @@ · 2 unmodified lines | ||
| 161 | 160 | }; |
| 162 | 161 | |
| 163 | 162 | sdhi1: sdhi@ee120000 { |
| 164 | − compatible = "renesas,r8a7790-sdhi"; | |
| 163 | + compatible = "renesas,sdhi-r8a7790"; | |
| 165 | 164 | reg = <0 0xee120000 0 0x100>; |
| 166 | 165 | interrupt-parent = <&gic>; |
| 167 | 166 | interrupts = <0 166 4>; |
| @@ -170,7 +169,7 @@ · 2 unmodified lines | ||
| 170 | 169 | }; |
| 171 | 170 | |
| 172 | 171 | sdhi2: sdhi@ee140000 { |
| 173 | − compatible = "renesas,r8a7790-sdhi"; | |
| 172 | + compatible = "renesas,sdhi-r8a7790"; | |
| 174 | 173 | reg = <0 0xee140000 0 0x100>; |
| 175 | 174 | interrupt-parent = <&gic>; |
| 176 | 175 | interrupts = <0 167 4>; |
| @@ -179,7 +178,7 @@ · 2 unmodified lines | ||
| 179 | 178 | }; |
| 180 | 179 | |
| 181 | 180 | sdhi3: sdhi@ee160000 { |
| 182 | − compatible = "renesas,r8a7790-sdhi"; | |
| 181 | + compatible = "renesas,sdhi-r8a7790"; | |
| 183 | 182 | reg = <0 0xee160000 0 0x100>; |
| 184 | 183 | interrupt-parent = <&gic>; |
| 185 | 184 | interrupts = <0 168 4>; |
| @@ -196,7 +196,7 @@ · 195 unmodified lines | ||
| 196 | 196 | }; |
| 197 | 197 | |
| 198 | 198 | sdhi0: sdhi@ee100000 { |
| 199 | − compatible = "renesas,r8a7740-sdhi"; | |
| 199 | + compatible = "renesas,sdhi-r8a7740"; | |
| 200 | 200 | reg = <0xee100000 0x100>; |
| 201 | 201 | interrupt-parent = <&gic>; |
| 202 | 202 | interrupts = <0 83 4 |
| @@ -208,7 +208,7 @@ · 5 unmodified lines | ||
| 208 | 208 | |
| 209 | 209 | /* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */ |
| 210 | 210 | sdhi1: sdhi@ee120000 { |
| 211 | − compatible = "renesas,r8a7740-sdhi"; | |
| 211 | + compatible = "renesas,sdhi-r8a7740"; | |
| 212 | 212 | reg = <0xee120000 0x100>; |
| 213 | 213 | interrupt-parent = <&gic>; |
| 214 | 214 | interrupts = <0 88 4 |
| @@ -219,7 +219,7 @@ · 4 unmodified lines | ||
| 219 | 219 | }; |
| 220 | 220 | |
| 221 | 221 | sdhi2: sdhi@ee140000 { |
| 222 | − compatible = "renesas,r8a7740-sdhi"; | |
| 222 | + compatible = "renesas,sdhi-r8a7740"; | |
| 223 | 223 | reg = <0xee140000 0x100>; |
| 224 | 224 | interrupt-parent = <&gic>; |
| 225 | 225 | interrupts = <0 104 4 |
| @@ -269,6 +269,11 @@ static const struct edmacc_param dummy_paramset = { · 268 unmodified lines | ||
| 269 | 269 | .ccnt = 1, |
| 270 | 270 | }; |
| 271 | 271 | |
| 272 | +static const struct of_device_id edma_of_ids[] = { | |
| 273 | + { .compatible = "ti,edma3", }, | |
| 274 | + {} | |
| 275 | +}; | |
| 276 | + | |
| 272 | 277 | /*****************************************************************************/ |
| 273 | 278 | |
| 274 | 279 | static void map_dmach_queue(unsigned ctlr, unsigned ch_no, |
| @@ -560,14 +565,38 @@ static int reserve_contiguous_slots(int ctlr, unsigned int id, · 285 unmodified lines | ||
| 560 | 565 | static int prepare_unused_channel_list(struct device *dev, void *data) |
| 561 | 566 | { |
| 562 | 567 | struct platform_device *pdev = to_platform_device(dev); |
| 563 | − int i, ctlr; | |
| 568 | + int i, count, ctlr; | |
| 569 | + struct of_phandle_args dma_spec; | |
| 564 | 570 | |
| 571 | + if (dev->of_node) { | |
| 572 | + count = of_property_count_strings(dev->of_node, "dma-names"); | |
| 573 | + if (count < 0) | |
| 574 | + return 0; | |
| 575 | + for (i = 0; i < count; i++) { | |
| 576 | + if (of_parse_phandle_with_args(dev->of_node, "dmas", | |
| 577 | + "#dma-cells", i, | |
| 578 | + &dma_spec)) | |
| 579 | + continue; | |
| 580 | + | |
| 581 | + if (!of_match_node(edma_of_ids, dma_spec.np)) { | |
| 582 | + of_node_put(dma_spec.np); | |
| 583 | + continue; | |
| 584 | + } | |
| 585 | + | |
| 586 | + clear_bit(EDMA_CHAN_SLOT(dma_spec.args[0]), | |
| 587 | + edma_cc[0]->edma_unused); | |
| 588 | + of_node_put(dma_spec.np); | |
| 589 | + } | |
| 590 | + return 0; | |
| 591 | + } | |
| 592 | + | |
| 593 | + /* For non-OF case */ | |
| 565 | 594 | for (i = 0; i < pdev->num_resources; i++) { |
| 566 | 595 | if ((pdev->resource[i].flags & IORESOURCE_DMA) && |
| 567 | 596 | (int)pdev->resource[i].start >= 0) { |
| 568 | 597 | ctlr = EDMA_CTLR(pdev->resource[i].start); |
| 569 | 598 | clear_bit(EDMA_CHAN_SLOT(pdev->resource[i].start), |
| 570 | − edma_cc[ctlr]->edma_unused); | |
| 599 | + edma_cc[ctlr]->edma_unused); | |
| 571 | 600 | } |
| 572 | 601 | } |
| 573 | 602 | |
| @@ -1762,11 +1791,6 @@ static int edma_probe(struct platform_device *pdev) · 1188 unmodified lines | ||
| 1762 | 1791 | return 0; |
| 1763 | 1792 | } |
| 1764 | 1793 | |
| 1765 | −static const struct of_device_id edma_of_ids[] = { | |
| 1766 | − { .compatible = "ti,edma3", }, | |
| 1767 | − {} | |
| 1768 | −}; | |
| 1769 | − | |
| 1770 | 1794 | static struct platform_driver edma_driver = { |
| 1771 | 1795 | .driver = { |
| 1772 | 1796 | .name = "edma", |
| @@ -36,6 +36,7 @@ CONFIG_ARCH_TEGRA_114_SOC=y · 35 unmodified lines | ||
| 36 | 36 | CONFIG_TEGRA_PCI=y |
| 37 | 37 | CONFIG_TEGRA_EMC_SCALING_ENABLE=y |
| 38 | 38 | CONFIG_ARCH_U8500=y |
| 39 | +CONFIG_MACH_HREFV60=y | |
| 39 | 40 | CONFIG_MACH_SNOWBALL=y |
| 40 | 41 | CONFIG_MACH_UX500_DT=y |
| 41 | 42 | CONFIG_ARCH_VEXPRESS=y |
| @@ -46,6 +47,7 @@ CONFIG_ARCH_ZYNQ=y · 4 unmodified lines | ||
| 46 | 47 | CONFIG_SMP=y |
| 47 | 48 | CONFIG_HIGHPTE=y |
| 48 | 49 | CONFIG_ARM_APPENDED_DTB=y |
| 50 | +CONFIG_ARM_ATAG_DTB_COMPAT=y | |
| 49 | 51 | CONFIG_NET=y |
| 50 | 52 | CONFIG_UNIX=y |
| 51 | 53 | CONFIG_INET=y |
| @@ -133,6 +135,7 @@ CONFIG_MMC=y · 81 unmodified lines | ||
| 133 | 135 | CONFIG_MMC_ARMMMCI=y |
| 134 | 136 | CONFIG_MMC_SDHCI=y |
| 135 | 137 | CONFIG_MMC_SDHCI_PLTFM=y |
| 138 | +CONFIG_MMC_SDHCI_ESDHC_IMX=y | |
| 136 | 139 | CONFIG_MMC_SDHCI_TEGRA=y |
| 137 | 140 | CONFIG_MMC_SDHCI_SPEAR=y |
| 138 | 141 | CONFIG_MMC_OMAP=y |
| @@ -148,7 +148,7 @@ AES_Te: · 147 unmodified lines | ||
| 148 | 148 | @ const AES_KEY *key) { |
| 149 | 149 | .align 5 |
| 150 | 150 | ENTRY(AES_encrypt) |
| 151 | − sub r3,pc,#8 @ AES_encrypt | |
| 151 | + adr r3,AES_encrypt | |
| 152 | 152 | stmdb sp!,{r1,r4-r12,lr} |
| 153 | 153 | mov r12,r0 @ inp |
| 154 | 154 | mov r11,r2 |
| @@ -381,7 +381,7 @@ _armv4_AES_encrypt: · 226 unmodified lines | ||
| 381 | 381 | .align 5 |
| 382 | 382 | ENTRY(private_AES_set_encrypt_key) |
| 383 | 383 | _armv4_AES_set_encrypt_key: |
| 384 | − sub r3,pc,#8 @ AES_set_encrypt_key | |
| 384 | + adr r3,_armv4_AES_set_encrypt_key | |
| 385 | 385 | teq r0,#0 |
| 386 | 386 | moveq r0,#-1 |
| 387 | 387 | beq .Labrt |
| @@ -843,7 +843,7 @@ AES_Td: · 455 unmodified lines | ||
| 843 | 843 | @ const AES_KEY *key) { |
| 844 | 844 | .align 5 |
| 845 | 845 | ENTRY(AES_decrypt) |
| 846 | − sub r3,pc,#8 @ AES_decrypt | |
| 846 | + adr r3,AES_decrypt | |
| 847 | 847 | stmdb sp!,{r1,r4-r12,lr} |
| 848 | 848 | mov r12,r0 @ inp |
| 849 | 849 | mov r11,r2 |
| @@ -19,6 +19,13 @@ · 18 unmodified lines | ||
| 19 | 19 | #include <asm/unified.h> |
| 20 | 20 | #include <asm/compiler.h> |
| 21 | 21 | |
| 22 | +#if __LINUX_ARM_ARCH__ < 6 | |
| 23 | +#include <asm-generic/uaccess-unaligned.h> | |
| 24 | +#else | |
| 25 | +#define __get_user_unaligned __get_user | |
| 26 | +#define __put_user_unaligned __put_user | |
| 27 | +#endif | |
| 28 | + | |
| 22 | 29 | #define VERIFY_READ 0 |
| 23 | 30 | #define VERIFY_WRITE 1 |
| 24 | 31 | |
| @@ -442,10 +442,10 @@ local_restart: · 441 unmodified lines | ||
| 442 | 442 | ldrcc pc, [tbl, scno, lsl #2] @ call sys_* routine |
| 443 | 443 | |
| 444 | 444 | add r1, sp, #S_OFF |
| 445 | − cmp scno, #(__ARM_NR_BASE - __NR_SYSCALL_BASE) | |
| 445 | +2: cmp scno, #(__ARM_NR_BASE - __NR_SYSCALL_BASE) | |
| 446 | 446 | eor r0, scno, #__NR_SYSCALL_BASE @ put OS number back |
| 447 | 447 | bcs arm_syscall |
| 448 | −2: mov why, #0 @ no longer a real syscall | |
| 448 | + mov why, #0 @ no longer a real syscall | |
| 449 | 449 | b sys_ni_syscall @ not private func |
| 450 | 450 | |
| 451 | 451 | #if defined(CONFIG_OABI_COMPAT) || !defined(CONFIG_AEABI) |
| @@ -329,10 +329,10 @@ · 328 unmodified lines | ||
| 329 | 329 | #ifdef CONFIG_CONTEXT_TRACKING |
| 330 | 330 | .if \save |
| 331 | 331 | stmdb sp!, {r0-r3, ip, lr} |
| 332 | − bl user_exit | |
| 332 | + bl context_tracking_user_exit | |
| 333 | 333 | ldmia sp!, {r0-r3, ip, lr} |
| 334 | 334 | .else |
| 335 | − bl user_exit | |
| 335 | + bl context_tracking_user_exit | |
| 336 | 336 | .endif |
| 337 | 337 | #endif |
| 338 | 338 | .endm |
| @@ -341,10 +341,10 @@ · 2 unmodified lines | ||
| 341 | 341 | #ifdef CONFIG_CONTEXT_TRACKING |
| 342 | 342 | .if \save |
| 343 | 343 | stmdb sp!, {r0-r3, ip, lr} |
| 344 | − bl user_enter | |
| 344 | + bl context_tracking_user_enter | |
| 345 | 345 | ldmia sp!, {r0-r3, ip, lr} |
| 346 | 346 | .else |
| 347 | − bl user_enter | |
| 347 | + bl context_tracking_user_enter | |
| 348 | 348 | .endif |
| 349 | 349 | #endif |
| 350 | 350 | .endm |
| @@ -58,14 +58,14 @@ static const struct kvm_irq_level a15_vtimer_irq = { · 57 unmodified lines | ||
| 58 | 58 | */ |
| 59 | 59 | int kvm_reset_vcpu(struct kvm_vcpu *vcpu) |
| 60 | 60 | { |
| 61 | − struct kvm_regs *cpu_reset; | |
| 61 | + struct kvm_regs *reset_regs; | |
| 62 | 62 | const struct kvm_irq_level *cpu_vtimer_irq; |
| 63 | 63 | |
| 64 | 64 | switch (vcpu->arch.target) { |
| 65 | 65 | case KVM_ARM_TARGET_CORTEX_A15: |
| 66 | 66 | if (vcpu->vcpu_id > a15_max_cpu_idx) |
| 67 | 67 | return -EINVAL; |
| 68 | − cpu_reset = &a15_regs_reset; | |
| 68 | + reset_regs = &a15_regs_reset; | |
| 69 | 69 | vcpu->arch.midr = read_cpuid_id(); |
| 70 | 70 | cpu_vtimer_irq = &a15_vtimer_irq; |
| 71 | 71 | break; |
| @@ -74,7 +74,7 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) · 2 unmodified lines | ||
| 74 | 74 | } |
| 75 | 75 | |
| 76 | 76 | /* Reset core registers */ |
| 77 | − memcpy(&vcpu->arch.regs, cpu_reset, sizeof(vcpu->arch.regs)); | |
| 77 | + memcpy(&vcpu->arch.regs, reset_regs, sizeof(vcpu->arch.regs)); | |
| 78 | 78 | |
| 79 | 79 | /* Reset CP15 registers */ |
| 80 | 80 | kvm_reset_coprocs(vcpu); |
| @@ -93,7 +93,7 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id) · 92 unmodified lines | ||
| 93 | 93 | |
| 94 | 94 | static struct irqaction at91rm9200_timer_irq = { |
| 95 | 95 | .name = "at91_tick", |
| 96 | − .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | |
| 96 | + .flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL, | |
| 97 | 97 | .handler = at91rm9200_timer_interrupt, |
| 98 | 98 | .irq = NR_IRQS_LEGACY + AT91_ID_SYS, |
| 99 | 99 | }; |
| @@ -171,7 +171,7 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id) · 170 unmodified lines | ||
| 171 | 171 | |
| 172 | 172 | static struct irqaction at91sam926x_pit_irq = { |
| 173 | 173 | .name = "at91_tick", |
| 174 | − .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | |
| 174 | + .flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL, | |
| 175 | 175 | .handler = at91sam926x_pit_interrupt, |
| 176 | 176 | .irq = NR_IRQS_LEGACY + AT91_ID_SYS, |
| 177 | 177 | }; |
| @@ -16,11 +16,17 @@ · 15 unmodified lines | ||
| 16 | 16 | #include "at91_rstc.h" |
| 17 | 17 | .arm |
| 18 | 18 | |
| 19 | +/* | |
| 20 | + * at91_ramc_base is an array void* | |
| 21 | + * init at NULL if only one DDR controler is present in or DT | |
| 22 | + */ | |
| 19 | 23 | .globl at91sam9g45_restart |
| 20 | 24 | |
| 21 | 25 | at91sam9g45_restart: |
| 22 | 26 | ldr r5, =at91_ramc_base @ preload constants |
| 23 | 27 | ldr r0, [r5] |
| 28 | + ldr r5, [r5, #4] @ ddr1 | |
| 29 | + cmp r5, #0 | |
| 24 | 30 | ldr r4, =at91_rstc_base |
| 25 | 31 | ldr r1, [r4] |
| 26 | 32 | |
| @@ -30,6 +36,8 @@ at91sam9g45_restart: · 3 unmodified lines | ||
| 30 | 36 | |
| 31 | 37 | .balign 32 @ align to cache line |
| 32 | 38 | |
| 39 | + strne r2, [r5, #AT91_DDRSDRC_RTR] @ disable DDR1 access | |
| 40 | + strne r3, [r5, #AT91_DDRSDRC_LPR] @ power down DDR1 | |
| 33 | 41 | str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access |
| 34 | 42 | str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0 |
| 35 | 43 | str r4, [r1, #AT91_RSTC_CR] @ reset processor |
| @@ -57,7 +57,7 @@ static irqreturn_t at91x40_timer_interrupt(int irq, void *dev_id) · 56 unmodified lines | ||
| 57 | 57 | |
| 58 | 58 | static struct irqaction at91x40_timer_irq = { |
| 59 | 59 | .name = "at91_tick", |
| 60 | − .flags = IRQF_DISABLED | IRQF_TIMER, | |
| 60 | + .flags = IRQF_TIMER, | |
| 61 | 61 | .handler = at91x40_timer_interrupt |
| 62 | 62 | }; |
| 63 | 63 | |
| @@ -176,7 +176,7 @@ static struct at24_platform_data eeprom_info = { · 175 unmodified lines | ||
| 176 | 176 | .context = (void *)0x7f00, |
| 177 | 177 | }; |
| 178 | 178 | |
| 179 | −static struct snd_platform_data dm365_evm_snd_data = { | |
| 179 | +static struct snd_platform_data dm365_evm_snd_data __maybe_unused = { | |
| 180 | 180 | .asp_chan_q = EVENTQ_3, |
| 181 | 181 | }; |
| 182 | 182 | |
| @@ -15,8 +15,6 @@ · 14 unmodified lines | ||
| 15 | 15 | |
| 16 | 16 | #include <mach/hardware.h> |
| 17 | 17 | |
| 18 | −#include <linux/platform_device.h> | |
| 19 | − | |
| 20 | 18 | #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) |
| 21 | 19 | #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) |
| 22 | 20 | #define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) |
| @@ -39,6 +37,8 @@ · 16 unmodified lines | ||
| 39 | 37 | #define UART_DM646X_SCR_TX_WATERMARK 0x08 |
| 40 | 38 | |
| 41 | 39 | #ifndef __ASSEMBLY__ |
| 40 | +#include <linux/platform_device.h> | |
| 41 | + | |
| 42 | 42 | extern int davinci_serial_init(struct platform_device *); |
| 43 | 43 | #endif |
| 44 | 44 | |
| @@ -90,6 +90,7 @@ struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg, · 89 unmodified lines | ||
| 90 | 90 | init.ops = &clk_fixup_mux_ops; |
| 91 | 91 | init.parent_names = parents; |
| 92 | 92 | init.num_parents = num_parents; |
| 93 | + init.flags = 0; | |
| 93 | 94 | |
| 94 | 95 | fixup_mux->mux.reg = reg; |
| 95 | 96 | fixup_mux->mux.shift = shift; |
| @@ -285,7 +285,7 @@ int __init mx27_clocks_init(unsigned long fref) · 284 unmodified lines | ||
| 285 | 285 | clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL); |
| 286 | 286 | clk_register_clkdev(clk[rtc_ipg_gate], NULL, "imx21-rtc"); |
| 287 | 287 | clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL); |
| 288 | − clk_register_clkdev(clk[cpu_div], NULL, "cpufreq-cpu0.0"); | |
| 288 | + clk_register_clkdev(clk[cpu_div], NULL, "cpu0"); | |
| 289 | 289 | clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL); |
| 290 | 290 | |
| 291 | 291 | mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1); |
| @@ -328,7 +328,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, · 327 unmodified lines | ||
| 328 | 328 | clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1"); |
| 329 | 329 | clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2"); |
| 330 | 330 | clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma"); |
| 331 | − clk_register_clkdev(clk[cpu_podf], NULL, "cpufreq-cpu0.0"); | |
| 331 | + clk_register_clkdev(clk[cpu_podf], NULL, "cpu0"); | |
| 332 | 332 | clk_register_clkdev(clk[iim_gate], "iim", NULL); |
| 333 | 333 | clk_register_clkdev(clk[dummy], NULL, "imx2-wdt.0"); |
| 334 | 334 | clk_register_clkdev(clk[dummy], NULL, "imx2-wdt.1"); |
| @@ -397,7 +397,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, · 62 unmodified lines | ||
| 397 | 397 | mx51_spdif_xtal_sel, ARRAY_SIZE(mx51_spdif_xtal_sel)); |
| 398 | 398 | clk[spdif1_sel] = imx_clk_mux("spdif1_sel", MXC_CCM_CSCMR2, 2, 2, |
| 399 | 399 | spdif_sel, ARRAY_SIZE(spdif_sel)); |
| 400 | − clk[spdif1_pred] = imx_clk_divider("spdif1_podf", "spdif1_sel", MXC_CCM_CDCDR, 16, 3); | |
| 400 | + clk[spdif1_pred] = imx_clk_divider("spdif1_pred", "spdif1_sel", MXC_CCM_CDCDR, 16, 3); | |
| 401 | 401 | clk[spdif1_podf] = imx_clk_divider("spdif1_podf", "spdif1_pred", MXC_CCM_CDCDR, 9, 6); |
| 402 | 402 | clk[spdif1_com_sel] = imx_clk_mux("spdif1_com_sel", MXC_CCM_CSCMR2, 5, 1, |
| 403 | 403 | mx51_spdif1_com_sel, ARRAY_SIZE(mx51_spdif1_com_sel)); |
| @@ -233,10 +233,15 @@ put_node: · 232 unmodified lines | ||
| 233 | 233 | of_node_put(np); |
| 234 | 234 | } |
| 235 | 235 | |
| 236 | −static void __init imx6q_opp_init(struct device *cpu_dev) | |
| 236 | +static void __init imx6q_opp_init(void) | |
| 237 | 237 | { |
| 238 | 238 | struct device_node *np; |
| 239 | + struct device *cpu_dev = get_cpu_device(0); | |
| 239 | 240 | |
| 241 | + if (!cpu_dev) { | |
| 242 | + pr_warn("failed to get cpu0 device\n"); | |
| 243 | + return; | |
| 244 | + } | |
| 240 | 245 | np = of_node_get(cpu_dev->of_node); |
| 241 | 246 | if (!np) { |
| 242 | 247 | pr_warn("failed to find cpu0 node\n"); |
| @@ -268,7 +273,7 @@ static void __init imx6q_init_late(void) · 25 unmodified lines | ||
| 268 | 273 | imx6q_cpuidle_init(); |
| 269 | 274 | |
| 270 | 275 | if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) { |
| 271 | − imx6q_opp_init(&imx6q_cpufreq_pdev.dev); | |
| 276 | + imx6q_opp_init(); | |
| 272 | 277 | platform_device_register(&imx6q_cpufreq_pdev); |
| 273 | 278 | } |
| 274 | 279 | } |
| @@ -117,6 +117,17 @@ void __init imx_init_l2cache(void) · 116 unmodified lines | ||
| 117 | 117 | /* Configure the L2 PREFETCH and POWER registers */ |
| 118 | 118 | val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL); |
| 119 | 119 | val |= 0x70800000; |
| 120 | + /* | |
| 121 | + * The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0 | |
| 122 | + * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2 | |
| 123 | + * But according to ARM PL310 errata: 752271 | |
| 124 | + * ID: 752271: Double linefill feature can cause data corruption | |
| 125 | + * Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2 | |
| 126 | + * Workaround: The only workaround to this erratum is to disable the | |
| 127 | + * double linefill feature. This is the default behavior. | |
| 128 | + */ | |
| 129 | + if (cpu_is_imx6q()) | |
| 130 | + val &= ~(1 << 30 | 1 << 23); | |
| 120 | 131 | writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL); |
| 121 | 132 | val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN; |
| 122 | 133 | writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL); |
| @@ -1,2 +1,9 @@ | ||
| 1 | 1 | /* Simple oneliner include to the PCIv3 early init */ |
| 2 | +#ifdef CONFIG_PCI | |
| 2 | 3 | extern int pci_v3_early_init(void); |
| 4 | +#else | |
| 5 | +static inline int pci_v3_early_init(void) | |
| 6 | +{ | |
| 7 | + return 0; | |
| 8 | +} | |
| 9 | +#endif | |
| @@ -140,6 +140,7 @@ int __init coherency_init(void) · 139 unmodified lines | ||
| 140 | 140 | coherency_base = of_iomap(np, 0); |
| 141 | 141 | coherency_cpu_base = of_iomap(np, 1); |
| 142 | 142 | set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0); |
| 143 | + of_node_put(np); | |
| 143 | 144 | } |
| 144 | 145 | |
| 145 | 146 | return 0; |
| @@ -147,9 +148,14 @@ int __init coherency_init(void) · 1 unmodified line | ||
| 147 | 148 | |
| 148 | 149 | static int __init coherency_late_init(void) |
| 149 | 150 | { |
| 150 | − if (of_find_matching_node(NULL, of_coherency_table)) | |
| 151 | + struct device_node *np; | |
| 152 | + | |
| 153 | + np = of_find_matching_node(NULL, of_coherency_table); | |
| 154 | + if (np) { | |
| 151 | 155 | bus_register_notifier(&platform_bus_type, |
| 152 | 156 | &mvebu_hwcc_platform_nb); |
| 157 | + of_node_put(np); | |
| 158 | + } | |
| 153 | 159 | return 0; |
| 154 | 160 | } |
| 155 | 161 | |
| @@ -67,6 +67,7 @@ int __init armada_370_xp_pmsu_init(void) · 66 unmodified lines | ||
| 67 | 67 | pr_info("Initializing Power Management Service Unit\n"); |
| 68 | 68 | pmsu_mp_base = of_iomap(np, 0); |
| 69 | 69 | pmsu_reset_base = of_iomap(np, 1); |
| 70 | + of_node_put(np); | |
| 70 | 71 | } |
| 71 | 72 | |
| 72 | 73 | return 0; |
| @@ -98,6 +98,7 @@ static int __init mvebu_system_controller_init(void) · 97 unmodified lines | ||
| 98 | 98 | BUG_ON(!match); |
| 99 | 99 | system_controller_base = of_iomap(np, 0); |
| 100 | 100 | mvebu_sc = (struct mvebu_system_controller *)match->data; |
| 101 | + of_node_put(np); | |
| 101 | 102 | } |
| 102 | 103 | |
| 103 | 104 | return 0; |
| @@ -1632,7 +1632,7 @@ static struct omap_clk omap44xx_clks[] = { · 1631 unmodified lines | ||
| 1632 | 1632 | CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck), |
| 1633 | 1633 | CLK(NULL, "auxclk5_ck", &auxclk5_ck), |
| 1634 | 1634 | CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck), |
| 1635 | − CLK("omap-gpmc", "fck", &dummy_ck), | |
| 1635 | + CLK("50000000.gpmc", "fck", &dummy_ck), | |
| 1636 | 1636 | CLK("omap_i2c.1", "ick", &dummy_ck), |
| 1637 | 1637 | CLK("omap_i2c.2", "ick", &dummy_ck), |
| 1638 | 1638 | CLK("omap_i2c.3", "ick", &dummy_ck), |
| @@ -143,7 +143,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, · 142 unmodified lines | ||
| 143 | 143 | * Call idle CPU cluster PM exit notifier chain |
| 144 | 144 | * to restore GIC and wakeupgen context. |
| 145 | 145 | */ |
| 146 | − if ((cx->mpu_state == PWRDM_POWER_RET) && | |
| 146 | + if (dev->cpu == 0 && (cx->mpu_state == PWRDM_POWER_RET) && | |
| 147 | 147 | (cx->mpu_logic_state == PWRDM_POWER_OFF)) |
| 148 | 148 | cpu_cluster_pm_exit(); |
| 149 | 149 | |
| @@ -1491,8 +1491,8 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, · 1490 unmodified lines | ||
| 1491 | 1491 | */ |
| 1492 | 1492 | ret = gpmc_cs_remap(cs, res.start); |
| 1493 | 1493 | if (ret < 0) { |
| 1494 | − dev_err(&pdev->dev, "cannot remap GPMC CS %d to 0x%x\n", | |
| 1495 | − cs, res.start); | |
| 1494 | + dev_err(&pdev->dev, "cannot remap GPMC CS %d to %pa\n", | |
| 1495 | + cs, &res.start); | |
| 1496 | 1496 | goto err; |
| 1497 | 1497 | } |
| 1498 | 1498 | |
| @@ -620,7 +620,7 @@ static struct omap_mux __initdata omap3_muxmodes[] = { · 619 unmodified lines | ||
| 620 | 620 | "uart1_rts", "ssi1_flag_tx", NULL, NULL, |
| 621 | 621 | "gpio_149", NULL, NULL, "safe_mode"), |
| 622 | 622 | _OMAP3_MUXENTRY(UART1_RX, 151, |
| 623 | − "uart1_rx", "ss1_wake_tx", "mcbsp1_clkr", "mcspi4_clk", | |
| 623 | + "uart1_rx", "ssi1_wake_tx", "mcbsp1_clkr", "mcspi4_clk", | |
| 624 | 624 | "gpio_151", NULL, NULL, "safe_mode"), |
| 625 | 625 | _OMAP3_MUXENTRY(UART1_TX, 148, |
| 626 | 626 | "uart1_tx", "ssi1_dat_tx", NULL, NULL, |
| @@ -1,5 +1,5 @@ | ||
| 1 | 1 | /* |
| 2 | − * OMAP4 SMP source file. It contains platform specific fucntions | |
| 2 | + * OMAP4 SMP source file. It contains platform specific functions | |
| 3 | 3 | * needed for the linux smp kernel. |
| 4 | 4 | * |
| 5 | 5 | * Copyright (C) 2009 Texas Instruments, Inc. |
| @@ -158,7 +158,7 @@ static int omap_device_build_from_dt(struct platform_device *pdev) · 157 unmodified lines | ||
| 158 | 158 | } |
| 159 | 159 | |
| 160 | 160 | od = omap_device_alloc(pdev, hwmods, oh_cnt); |
| 161 | − if (!od) { | |
| 161 | + if (IS_ERR(od)) { | |
| 162 | 162 | dev_err(&pdev->dev, "Cannot allocate omap_device for :%s\n", |
| 163 | 163 | oh_name); |
| 164 | 164 | ret = PTR_ERR(od); |
| @@ -289,7 +289,7 @@ static void collie_flash_exit(void) · 288 unmodified lines | ||
| 289 | 289 | } |
| 290 | 290 | |
| 291 | 291 | static struct flash_platform_data collie_flash_data = { |
| 292 | − .map_name = "cfi_probe", | |
| 292 | + .map_name = "jedec_probe", | |
| 293 | 293 | .init = collie_flash_init, |
| 294 | 294 | .set_vpp = collie_set_vpp, |
| 295 | 295 | .exit = collie_flash_exit, |
| @@ -1108,9 +1108,9 @@ static const struct pinctrl_map eva_pinctrl_map[] = { · 1107 unmodified lines | ||
| 1108 | 1108 | PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-r8a7740", |
| 1109 | 1109 | "fsib_mclk_in", "fsib"), |
| 1110 | 1110 | /* GETHER */ |
| 1111 | − PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740", | |
| 1111 | + PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740", | |
| 1112 | 1112 | "gether_mii", "gether"), |
| 1113 | − PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740", | |
| 1113 | + PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740", | |
| 1114 | 1114 | "gether_int", "gether"), |
| 1115 | 1115 | /* HDMI */ |
| 1116 | 1116 | PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-r8a7740", |
| @@ -29,6 +29,7 @@ · 28 unmodified lines | ||
| 29 | 29 | #include <linux/pinctrl/machine.h> |
| 30 | 30 | #include <linux/platform_data/gpio-rcar.h> |
| 31 | 31 | #include <linux/platform_device.h> |
| 32 | +#include <linux/phy.h> | |
| 32 | 33 | #include <linux/regulator/fixed.h> |
| 33 | 34 | #include <linux/regulator/machine.h> |
| 34 | 35 | #include <linux/sh_eth.h> |
| @@ -155,6 +156,30 @@ static void __init lager_add_standard_devices(void) · 120 unmodified lines | ||
| 155 | 156 | ðer_pdata, sizeof(ether_pdata)); |
| 156 | 157 | } |
| 157 | 158 | |
| 159 | +/* | |
| 160 | + * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds | |
| 161 | + * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits | |
| 162 | + * 14-15. We have to set them back to 01 from the default 00 value each time | |
| 163 | + * the PHY is reset. It's also important because the PHY's LED0 signal is | |
| 164 | + * connected to SoC's ETH_LINK signal and in the PHY's default mode it will | |
| 165 | + * bounce on and off after each packet, which we apparently want to avoid. | |
| 166 | + */ | |
| 167 | +static int lager_ksz8041_fixup(struct phy_device *phydev) | |
| 168 | +{ | |
| 169 | + u16 phyctrl1 = phy_read(phydev, 0x1e); | |
| 170 | + | |
| 171 | + phyctrl1 &= ~0xc000; | |
| 172 | + phyctrl1 |= 0x4000; | |
| 173 | + return phy_write(phydev, 0x1e, phyctrl1); | |
| 174 | +} | |
| 175 | + | |
| 176 | +static void __init lager_init(void) | |
| 177 | +{ | |
| 178 | + lager_add_standard_devices(); | |
| 179 | + | |
| 180 | + phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup); | |
| 181 | +} | |
| 182 | + | |
| 158 | 183 | static const char *lager_boards_compat_dt[] __initdata = { |
| 159 | 184 | "renesas,lager", |
| 160 | 185 | NULL, |
| @@ -163,6 +188,6 @@ static const char *lager_boards_compat_dt[] __initdata = { · 2 unmodified lines | ||
| 163 | 188 | DT_MACHINE_START(LAGER_DT, "lager") |
| 164 | 189 | .init_early = r8a7790_init_delay, |
| 165 | 190 | .init_time = r8a7790_timer_init, |
| 166 | − .init_machine = lager_add_standard_devices, | |
| 191 | + .init_machine = lager_init, | |
| 167 | 192 | .dt_compat = lager_boards_compat_dt, |
| 168 | 193 | MACHINE_END |
| @@ -555,7 +555,7 @@ static struct clk_lookup lookups[] = { · 554 unmodified lines | ||
| 555 | 555 | CLKDEV_CON_ID("pll2h", &pll2h_clk), |
| 556 | 556 | |
| 557 | 557 | /* CPU clock */ |
| 558 | − CLKDEV_DEV_ID("cpufreq-cpu0", &z_clk), | |
| 558 | + CLKDEV_DEV_ID("cpu0", &z_clk), | |
| 559 | 559 | |
| 560 | 560 | /* DIV6 */ |
| 561 | 561 | CLKDEV_CON_ID("zb", &div6_clks[DIV6_ZB]), |
| @@ -616,7 +616,7 @@ static struct clk_lookup lookups[] = { · 615 unmodified lines | ||
| 616 | 616 | CLKDEV_DEV_ID("smp_twd", &twd_clk), /* smp_twd */ |
| 617 | 617 | |
| 618 | 618 | /* DIV4 clocks */ |
| 619 | − CLKDEV_DEV_ID("cpufreq-cpu0", &div4_clks[DIV4_Z]), | |
| 619 | + CLKDEV_DEV_ID("cpu0", &div4_clks[DIV4_Z]), | |
| 620 | 620 | |
| 621 | 621 | /* DIV6 clocks */ |
| 622 | 622 | CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]), |
| @@ -1,7 +1,3 @@ | ||
| 1 | −menu "ST-Ericsson AB U300/U335 Platform" | |
| 2 | − | |
| 3 | −comment "ST-Ericsson Mobile Platform Products" | |
| 4 | − | |
| 5 | 1 | config ARCH_U300 |
| 6 | 2 | bool "ST-Ericsson U300 Series" if ARCH_MULTI_V5 |
| 7 | 3 | depends on MMU |
| @@ -25,7 +21,9 @@ config ARCH_U300 · 17 unmodified lines | ||
| 25 | 21 | help |
| 26 | 22 | Support for ST-Ericsson U300 series mobile platforms. |
| 27 | 23 | |
| 28 | −comment "ST-Ericsson U300/U335 Feature Selections" | |
| 24 | +if ARCH_U300 | |
| 25 | + | |
| 26 | +menu "ST-Ericsson AB U300/U335 Platform" | |
| 29 | 27 | |
| 30 | 28 | config MACH_U300 |
| 31 | 29 | depends on ARCH_U300 |
| @@ -53,3 +51,5 @@ config MACH_U300_SPIDUMMY · 21 unmodified lines | ||
| 53 | 51 | SPI framework and ARM PL022 support. |
| 54 | 52 | |
| 55 | 53 | endmenu |
| 54 | + | |
| 55 | +endif | |
| @@ -69,6 +69,7 @@ static int __init ux500_l2x0_init(void) · 68 unmodified lines | ||
| 69 | 69 | * some SMI service available. |
| 70 | 70 | */ |
| 71 | 71 | outer_cache.disable = NULL; |
| 72 | + outer_cache.set_debug = NULL; | |
| 72 | 73 | |
| 73 | 74 | return 0; |
| 74 | 75 | } |
| @@ -131,6 +131,16 @@ static void tc2_pm_down(u64 residency) · 130 unmodified lines | ||
| 131 | 131 | } else |
| 132 | 132 | BUG(); |
| 133 | 133 | |
| 134 | + /* | |
| 135 | + * If the CPU is committed to power down, make sure | |
| 136 | + * the power controller will be in charge of waking it | |
| 137 | + * up upon IRQ, ie IRQ lines are cut from GIC CPU IF | |
| 138 | + * to the CPU by disabling the GIC CPU IF to prevent wfi | |
| 139 | + * from completing execution behind power controller back | |
| 140 | + */ | |
| 141 | + if (!skip_wfi) | |
| 142 | + gic_cpu_if_down(); | |
| 143 | + | |
| 134 | 144 | if (last_man && __mcpm_outbound_enter_critical(cpu, cluster)) { |
| 135 | 145 | arch_spin_unlock(&tc2_pm_lock); |
| 136 | 146 | |
| @@ -231,7 +241,6 @@ static void tc2_pm_suspend(u64 residency) · 94 unmodified lines | ||
| 231 | 241 | cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); |
| 232 | 242 | cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); |
| 233 | 243 | ve_spc_set_resume_addr(cluster, cpu, virt_to_phys(mcpm_entry_point)); |
| 234 | − gic_cpu_if_down(); | |
| 235 | 244 | tc2_pm_down(residency); |
| 236 | 245 | } |
| 237 | 246 | |
| @@ -6,13 +6,6 @@ config FRAME_POINTER · 5 unmodified lines | ||
| 6 | 6 | bool |
| 7 | 7 | default y |
| 8 | 8 | |
| 9 | −config DEBUG_STACK_USAGE | |
| 10 | − bool "Enable stack utilization instrumentation" | |
| 11 | − depends on DEBUG_KERNEL | |
| 12 | − help | |
| 13 | − Enables the display of the minimum amount of free stack which each | |
| 14 | − task has ever had available in the sysrq-T output. | |
| 15 | − | |
| 16 | 9 | config EARLY_PRINTK |
| 17 | 10 | bool "Early printk support" |
| 18 | 11 | default y |
| @@ -42,7 +42,7 @@ CONFIG_IP_PNP_BOOTP=y · 41 unmodified lines | ||
| 42 | 42 | # CONFIG_WIRELESS is not set |
| 43 | 43 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 44 | 44 | CONFIG_DEVTMPFS=y |
| 45 | −# CONFIG_BLK_DEV is not set | |
| 45 | +CONFIG_BLK_DEV=y | |
| 46 | 46 | CONFIG_SCSI=y |
| 47 | 47 | # CONFIG_SCSI_PROC_FS is not set |
| 48 | 48 | CONFIG_BLK_DEV_SD=y |
| @@ -72,6 +72,7 @@ CONFIG_LOGO=y · 23 unmodified lines | ||
| 72 | 72 | # CONFIG_IOMMU_SUPPORT is not set |
| 73 | 73 | CONFIG_EXT2_FS=y |
| 74 | 74 | CONFIG_EXT3_FS=y |
| 75 | +CONFIG_EXT4_FS=y | |
| 75 | 76 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set |
| 76 | 77 | # CONFIG_EXT3_FS_XATTR is not set |
| 77 | 78 | CONFIG_FUSE_FS=y |
| @@ -90,3 +91,5 @@ CONFIG_DEBUG_KERNEL=y · 12 unmodified lines | ||
| 90 | 91 | CONFIG_DEBUG_INFO=y |
| 91 | 92 | # CONFIG_FTRACE is not set |
| 92 | 93 | CONFIG_ATOMIC64_SELFTEST=y |
| 94 | +CONFIG_VIRTIO_MMIO=y | |
| 95 | +CONFIG_VIRTIO_BLK=y | |
| @@ -43,6 +43,6 @@ · 42 unmodified lines | ||
| 43 | 43 | COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\ |
| 44 | 44 | COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV) |
| 45 | 45 | |
| 46 | −extern unsigned int elf_hwcap; | |
| 46 | +extern unsigned long elf_hwcap; | |
| 47 | 47 | #endif |
| 48 | 48 | #endif |
| @@ -166,9 +166,10 @@ do { \ · 165 unmodified lines | ||
| 166 | 166 | |
| 167 | 167 | #define get_user(x, ptr) \ |
| 168 | 168 | ({ \ |
| 169 | + __typeof__(*(ptr)) __user *__p = (ptr); \ | |
| 169 | 170 | might_fault(); \ |
| 170 | − access_ok(VERIFY_READ, (ptr), sizeof(*(ptr))) ? \ | |
| 171 | − __get_user((x), (ptr)) : \ | |
| 171 | + access_ok(VERIFY_READ, __p, sizeof(*__p)) ? \ | |
| 172 | + __get_user((x), __p) : \ | |
| 172 | 173 | ((x) = 0, -EFAULT); \ |
| 173 | 174 | }) |
| 174 | 175 | |
| @@ -227,9 +228,10 @@ do { \ · 52 unmodified lines | ||
| 227 | 228 | |
| 228 | 229 | #define put_user(x, ptr) \ |
| 229 | 230 | ({ \ |
| 231 | + __typeof__(*(ptr)) __user *__p = (ptr); \ | |
| 230 | 232 | might_fault(); \ |
| 231 | − access_ok(VERIFY_WRITE, (ptr), sizeof(*(ptr))) ? \ | |
| 232 | − __put_user((x), (ptr)) : \ | |
| 233 | + access_ok(VERIFY_WRITE, __p, sizeof(*__p)) ? \ | |
| 234 | + __put_user((x), __p) : \ | |
| 233 | 235 | -EFAULT; \ |
| 234 | 236 | }) |
| 235 | 237 | |
| @@ -80,8 +80,10 @@ void fpsimd_thread_switch(struct task_struct *next) · 79 unmodified lines | ||
| 80 | 80 | |
| 81 | 81 | void fpsimd_flush_thread(void) |
| 82 | 82 | { |
| 83 | + preempt_disable(); | |
| 83 | 84 | memset(¤t->thread.fpsimd_state, 0, sizeof(struct fpsimd_state)); |
| 84 | 85 | fpsimd_load_state(¤t->thread.fpsimd_state); |
| 86 | + preempt_enable(); | |
| 85 | 87 | } |
| 86 | 88 | |
| 87 | 89 | #ifdef CONFIG_KERNEL_MODE_NEON |
| @@ -143,15 +143,26 @@ void machine_restart(char *cmd) · 142 unmodified lines | ||
| 143 | 143 | |
| 144 | 144 | void __show_regs(struct pt_regs *regs) |
| 145 | 145 | { |
| 146 | − int i; | |
| 146 | + int i, top_reg; | |
| 147 | + u64 lr, sp; | |
| 148 | + | |
| 149 | + if (compat_user_mode(regs)) { | |
| 150 | + lr = regs->compat_lr; | |
| 151 | + sp = regs->compat_sp; | |
| 152 | + top_reg = 12; | |
| 153 | + } else { | |
| 154 | + lr = regs->regs[30]; | |
| 155 | + sp = regs->sp; | |
| 156 | + top_reg = 29; | |
| 157 | + } | |
| 147 | 158 | |
| 148 | 159 | show_regs_print_info(KERN_DEFAULT); |
| 149 | 160 | print_symbol("PC is at %s\n", instruction_pointer(regs)); |
| 150 | − print_symbol("LR is at %s\n", regs->regs[30]); | |
| 161 | + print_symbol("LR is at %s\n", lr); | |
| 151 | 162 | printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n", |
| 152 | − regs->pc, regs->regs[30], regs->pstate); | |
| 153 | − printk("sp : %016llx\n", regs->sp); | |
| 154 | − for (i = 29; i >= 0; i--) { | |
| 163 | + regs->pc, lr, regs->pstate); | |
| 164 | + printk("sp : %016llx\n", sp); | |
| 165 | + for (i = top_reg; i >= 0; i--) { | |
| 155 | 166 | printk("x%-2d: %016llx ", i, regs->regs[i]); |
| 156 | 167 | if (i % 2 == 0) |
| 157 | 168 | printk("\n"); |
| @@ -57,7 +57,7 @@ · 56 unmodified lines | ||
| 57 | 57 | unsigned int processor_id; |
| 58 | 58 | EXPORT_SYMBOL(processor_id); |
| 59 | 59 | |
| 60 | −unsigned int elf_hwcap __read_mostly; | |
| 60 | +unsigned long elf_hwcap __read_mostly; | |
| 61 | 61 | EXPORT_SYMBOL_GPL(elf_hwcap); |
| 62 | 62 | |
| 63 | 63 | static const char *cpu_name; |
| @@ -130,7 +130,7 @@ static void __do_user_fault(struct task_struct *tsk, unsigned long addr, · 129 unmodified lines | ||
| 130 | 130 | force_sig_info(sig, &si, tsk); |
| 131 | 131 | } |
| 132 | 132 | |
| 133 | −void do_bad_area(unsigned long addr, unsigned int esr, struct pt_regs *regs) | |
| 133 | +static void do_bad_area(unsigned long addr, unsigned int esr, struct pt_regs *regs) | |
| 134 | 134 | { |
| 135 | 135 | struct task_struct *tsk = current; |
| 136 | 136 | struct mm_struct *mm = tsk->active_mm; |
| @@ -35,7 +35,7 @@ · 34 unmodified lines | ||
| 35 | 35 | */ |
| 36 | 36 | ENTRY(__cpu_flush_user_tlb_range) |
| 37 | 37 | vma_vm_mm x3, x2 // get vma->vm_mm |
| 38 | − mmid x3, x3 // get vm_mm->context.id | |
| 38 | + mmid w3, x3 // get vm_mm->context.id | |
| 39 | 39 | dsb sy |
| 40 | 40 | lsr x0, x0, #12 // align address |
| 41 | 41 | lsr x1, x1, #12 |
| @@ -1,6 +1,20 @@ | ||
| 1 | 1 | |
| 2 | 2 | generic-y += clkdev.h |
| 3 | +generic-y += cputime.h | |
| 4 | +generic-y += delay.h | |
| 5 | +generic-y += device.h | |
| 6 | +generic-y += div64.h | |
| 7 | +generic-y += emergency-restart.h | |
| 3 | 8 | generic-y += exec.h |
| 4 | −generic-y += trace_clock.h | |
| 9 | +generic-y += futex.h | |
| 10 | +generic-y += preempt.h | |
| 11 | +generic-y += irq_regs.h | |
| 5 | 12 | generic-y += param.h |
| 6 | −generic-y += preempt.h | |
| 13 | +generic-y += local.h | |
| 14 | +generic-y += local64.h | |
| 15 | +generic-y += percpu.h | |
| 16 | +generic-y += scatterlist.h | |
| 17 | +generic-y += sections.h | |
| 18 | +generic-y += topology.h | |
| 19 | +generic-y += trace_clock.h | |
| 20 | +generic-y += xor.h | |
| @@ -1,6 +0,0 @@ | ||
| 1 | −#ifndef __ASM_AVR32_CPUTIME_H | |
| 2 | −#define __ASM_AVR32_CPUTIME_H | |
| 3 | − | |
| 4 | −#include <asm-generic/cputime.h> | |
| 5 | − | |
| 6 | −#endif /* __ASM_AVR32_CPUTIME_H */ | |
| @@ -1 +0,0 @@ | ||
| 1 | −#include <asm-generic/delay.h> | |
| @@ -1,7 +0,0 @@ | ||
| 1 | −/* | |
| 2 | − * Arch specific extensions to struct device | |
| 3 | − * | |
| 4 | − * This file is released under the GPLv2 | |
| 5 | − */ | |
| 6 | −#include <asm-generic/device.h> | |
| 7 | − | |
| @@ -1,6 +0,0 @@ | ||
| 1 | −#ifndef __ASM_AVR32_DIV64_H | |
| 2 | −#define __ASM_AVR32_DIV64_H | |
| 3 | − | |
| 4 | −#include <asm-generic/div64.h> | |
| 5 | − | |
| 6 | −#endif /* __ASM_AVR32_DIV64_H */ | |
| @@ -1,6 +0,0 @@ | ||
| 1 | −#ifndef __ASM_AVR32_EMERGENCY_RESTART_H | |
| 2 | −#define __ASM_AVR32_EMERGENCY_RESTART_H | |
| 3 | − | |
| 4 | −#include <asm-generic/emergency-restart.h> | |
| 5 | − | |
| 6 | −#endif /* __ASM_AVR32_EMERGENCY_RESTART_H */ | |
| @@ -1,6 +0,0 @@ | ||
| 1 | −#ifndef __ASM_AVR32_FUTEX_H | |
| 2 | −#define __ASM_AVR32_FUTEX_H | |
| 3 | − | |
| 4 | −#include <asm-generic/futex.h> | |
| 5 | − | |
| 6 | −#endif /* __ASM_AVR32_FUTEX_H */ | |
| @@ -1 +0,0 @@ | ||
| 1 | −#include <asm-generic/irq_regs.h> | |
| @@ -1,6 +0,0 @@ | ||
| 1 | −#ifndef __ASM_AVR32_LOCAL_H | |
| 2 | −#define __ASM_AVR32_LOCAL_H | |
| 3 | − | |
| 4 | −#include <asm-generic/local.h> | |
| 5 | − | |
| 6 | −#endif /* __ASM_AVR32_LOCAL_H */ | |
| @@ -1 +0,0 @@ | ||
| 1 | −#include <asm-generic/local64.h> | |
| @@ -1,6 +0,0 @@ | ||
| 1 | −#ifndef __ASM_AVR32_PERCPU_H | |
| 2 | −#define __ASM_AVR32_PERCPU_H | |
| 3 | − | |
| 4 | −#include <asm-generic/percpu.h> | |
| 5 | − | |
| 6 | −#endif /* __ASM_AVR32_PERCPU_H */ | |
| @@ -1,6 +0,0 @@ | ||
| 1 | −#ifndef __ASM_AVR32_SCATTERLIST_H | |
| 2 | −#define __ASM_AVR32_SCATTERLIST_H | |
| 3 | − | |
| 4 | −#include <asm-generic/scatterlist.h> | |
| 5 | − | |
| 6 | −#endif /* __ASM_AVR32_SCATTERLIST_H */ | |
| @@ -1,6 +0,0 @@ | ||
| 1 | −#ifndef __ASM_AVR32_SECTIONS_H | |
| 2 | −#define __ASM_AVR32_SECTIONS_H | |
| 3 | − | |
| 4 | −#include <asm-generic/sections.h> | |
| 5 | − | |
| 6 | −#endif /* __ASM_AVR32_SECTIONS_H */ | |
| @@ -1,6 +0,0 @@ | ||
| 1 | −#ifndef __ASM_AVR32_TOPOLOGY_H | |
| 2 | −#define __ASM_AVR32_TOPOLOGY_H | |
| 3 | − | |
| 4 | −#include <asm-generic/topology.h> | |
| 5 | − | |
| 6 | −#endif /* __ASM_AVR32_TOPOLOGY_H */ | |
| @@ -1,6 +0,0 @@ | ||
| 1 | −#ifndef _ASM_XOR_H | |
| 2 | −#define _ASM_XOR_H | |
| 3 | − | |
| 4 | −#include <asm-generic/xor.h> | |
| 5 | − | |
| 6 | −#endif | |
| @@ -289,7 +289,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, · 288 unmodified lines | ||
| 289 | 289 | memset(childregs, 0, sizeof(struct pt_regs)); |
| 290 | 290 | p->thread.cpu_context.r0 = arg; |
| 291 | 291 | p->thread.cpu_context.r1 = usp; /* fn */ |
| 292 | − p->thread.cpu_context.r2 = syscall_return; | |
| 292 | + p->thread.cpu_context.r2 = (unsigned long)syscall_return; | |
| 293 | 293 | p->thread.cpu_context.pc = (unsigned long)ret_from_kernel_thread; |
| 294 | 294 | childregs->sr = MODE_SUPERVISOR; |
| 295 | 295 | } else { |
| @@ -98,7 +98,14 @@ static void comparator_mode(enum clock_event_mode mode, · 97 unmodified lines | ||
| 98 | 98 | case CLOCK_EVT_MODE_SHUTDOWN: |
| 99 | 99 | sysreg_write(COMPARE, 0); |
| 100 | 100 | pr_debug("%s: stop\n", evdev->name); |
| 101 | − cpu_idle_poll_ctrl(false); | |
| 101 | + if (evdev->mode == CLOCK_EVT_MODE_ONESHOT || | |
| 102 | + evdev->mode == CLOCK_EVT_MODE_RESUME) { | |
| 103 | + /* | |
| 104 | + * Only disable idle poll if we have forced that | |
| 105 | + * in a previous call. | |
| 106 | + */ | |
| 107 | + cpu_idle_poll_ctrl(false); | |
| 108 | + } | |
| 102 | 109 | break; |
| 103 | 110 | default: |
| 104 | 111 | BUG(); |
| @@ -288,9 +288,6 @@ endif · 287 unmodified lines | ||
| 288 | 288 | vmlinux.32: vmlinux |
| 289 | 289 | $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@ |
| 290 | 290 | |
| 291 | − | |
| 292 | −#obj-$(CONFIG_KPROBES) += kprobes.o | |
| 293 | − | |
| 294 | 291 | # |
| 295 | 292 | # The 64-bit ELF tools are pretty broken so at this time we generate 64-bit |
| 296 | 293 | # ELF files from 32-bit files by conversion. |
| @@ -276,7 +276,7 @@ static struct platform_device mtx1_pci_host = { · 275 unmodified lines | ||
| 276 | 276 | .resource = alchemy_pci_host_res, |
| 277 | 277 | }; |
| 278 | 278 | |
| 279 | −static struct __initdata platform_device * mtx1_devs[] = { | |
| 279 | +static struct platform_device *mtx1_devs[] __initdata = { | |
| 280 | 280 | &mtx1_pci_host, |
| 281 | 281 | &mtx1_gpio_leds, |
| 282 | 282 | &mtx1_wdt, |
| @@ -14,6 +14,7 @@ · 13 unmodified lines | ||
| 14 | 14 | #include <linux/module.h> |
| 15 | 15 | #include <linux/spinlock.h> |
| 16 | 16 | #include <linux/syscore_ops.h> |
| 17 | +#include <asm/cpu.h> | |
| 17 | 18 | #include <asm/mach-au1x00/au1000.h> |
| 18 | 19 | |
| 19 | 20 | /* control register offsets */ |
| @@ -358,7 +359,7 @@ static inline int au1200_coherency_bug(void) · 338 unmodified lines | ||
| 358 | 359 | { |
| 359 | 360 | #if defined(CONFIG_DMA_COHERENT) |
| 360 | 361 | /* Au1200 AB USB does not support coherent memory */ |
| 361 | − if (!(read_c0_prid() & 0xff)) { | |
| 362 | + if (!(read_c0_prid() & PRID_REV_MASK)) { | |
| 362 | 363 | printk(KERN_INFO "Au1200 USB: this is chip revision AB !!\n"); |
| 363 | 364 | printk(KERN_INFO "Au1200 USB: update your board or re-configure" |
| 364 | 365 | " the kernel\n"); |
| @@ -306,14 +306,14 @@ void __init bcm63xx_cpu_init(void) · 305 unmodified lines | ||
| 306 | 306 | |
| 307 | 307 | switch (c->cputype) { |
| 308 | 308 | case CPU_BMIPS3300: |
| 309 | − if ((read_c0_prid() & 0xff00) != PRID_IMP_BMIPS3300_ALT) | |
| 309 | + if ((read_c0_prid() & PRID_IMP_MASK) != PRID_IMP_BMIPS3300_ALT) | |
| 310 | 310 | __cpu_name[cpu] = "Broadcom BCM6338"; |
| 311 | 311 | /* fall-through */ |
| 312 | 312 | case CPU_BMIPS32: |
| 313 | 313 | chipid_reg = BCM_6345_PERF_BASE; |
| 314 | 314 | break; |
| 315 | 315 | case CPU_BMIPS4350: |
| 316 | − switch ((read_c0_prid() & 0xff)) { | |
| 316 | + switch ((read_c0_prid() & PRID_REV_MASK)) { | |
| 317 | 317 | case 0x04: |
| 318 | 318 | chipid_reg = BCM_3368_PERF_BASE; |
| 319 | 319 | break; |
| @@ -1 +1 @@ | ||
| 1 | −../../../../../include/dt-bindings | |
| 1 | +../../../../../include/dt-bindings | |
| @@ -12,6 +12,7 @@ · 11 unmodified lines | ||
| 12 | 12 | #include <linux/smp.h> |
| 13 | 13 | |
| 14 | 14 | #include <asm/cpu-info.h> |
| 15 | +#include <asm/cpu-type.h> | |
| 15 | 16 | #include <asm/time.h> |
| 16 | 17 | |
| 17 | 18 | #include <asm/octeon/octeon.h> |
| @@ -13,6 +13,7 @@ · 12 unmodified lines | ||
| 13 | 13 | |
| 14 | 14 | #include <asm/bootinfo.h> |
| 15 | 15 | #include <asm/cpu.h> |
| 16 | +#include <asm/cpu-type.h> | |
| 16 | 17 | #include <asm/processor.h> |
| 17 | 18 | |
| 18 | 19 | #include <asm/dec/prom.h> |
| @@ -13,12 +13,6 @@ · 12 unmodified lines | ||
| 13 | 13 | #include <asm/cpu-info.h> |
| 14 | 14 | #include <cpu-feature-overrides.h> |
| 15 | 15 | |
| 16 | −#ifndef current_cpu_type | |
| 17 | −#define current_cpu_type() current_cpu_data.cputype | |
| 18 | −#endif | |
| 19 | − | |
| 20 | −#define boot_cpu_type() cpu_data[0].cputype | |
| 21 | − | |
| 22 | 16 | /* |
| 23 | 17 | * SMP assumption: Options of CPU 0 are a superset of all processors. |
| 24 | 18 | * This is true for all known MIPS systems. |
| @@ -193,7 +187,7 @@ · 168 unmodified lines | ||
| 193 | 187 | |
| 194 | 188 | /* |
| 195 | 189 | * MIPS32, MIPS64, VR5500, IDT32332, IDT32334 and maybe a few other |
| 196 | − * pre-MIPS32/MIPS53 processors have CLO, CLZ. The IDT RC64574 is 64-bit and | |
| 190 | + * pre-MIPS32/MIPS64 processors have CLO, CLZ. The IDT RC64574 is 64-bit and | |
| 197 | 191 | * has CLO and CLZ but not DCLO nor DCLZ. For 64-bit kernels |
| 198 | 192 | * cpu_has_clo_clz also indicates the availability of DCLO and DCLZ. |
| 199 | 193 | */ |
| @@ -84,6 +84,7 @@ struct cpuinfo_mips { · 83 unmodified lines | ||
| 84 | 84 | extern struct cpuinfo_mips cpu_data[]; |
| 85 | 85 | #define current_cpu_data cpu_data[smp_processor_id()] |
| 86 | 86 | #define raw_current_cpu_data cpu_data[raw_smp_processor_id()] |
| 87 | +#define boot_cpu_data cpu_data[0] | |
| 87 | 88 | |
| 88 | 89 | extern void cpu_probe(void); |
| 89 | 90 | extern void cpu_report(void); |
| @@ -0,0 +1,203 @@ | ||
| 1 | +/* | |
| 2 | + * This file is subject to the terms and conditions of the GNU General Public | |
| 3 | + * License. See the file "COPYING" in the main directory of this archive | |
| 4 | + * for more details. | |
| 5 | + * | |
| 6 | + * Copyright (C) 2003, 2004 Ralf Baechle | |
| 7 | + * Copyright (C) 2004 Maciej W. Rozycki | |
| 8 | + */ | |
| 9 | +#ifndef __ASM_CPU_TYPE_H | |
| 10 | +#define __ASM_CPU_TYPE_H | |
| 11 | + | |
| 12 | +#include <linux/smp.h> | |
| 13 | +#include <linux/compiler.h> | |
| 14 | + | |
| 15 | +static inline int __pure __get_cpu_type(const int cpu_type) | |
| 16 | +{ | |
| 17 | + switch (cpu_type) { | |
| 18 | +#if defined(CONFIG_SYS_HAS_CPU_LOONGSON2E) || \ | |
| 19 | + defined(CONFIG_SYS_HAS_CPU_LOONGSON2F) | |
| 20 | + case CPU_LOONGSON2: | |
| 21 | +#endif | |
| 22 | + | |
| 23 | +#ifdef CONFIG_SYS_HAS_CPU_LOONGSON1B | |
| 24 | + case CPU_LOONGSON1: | |
| 25 | +#endif | |
| 26 | + | |
| 27 | +#ifdef CONFIG_SYS_HAS_CPU_MIPS32_R1 | |
| 28 | + case CPU_4KC: | |
| 29 | + case CPU_ALCHEMY: | |
| 30 | + case CPU_BMIPS3300: | |
| 31 | + case CPU_BMIPS4350: | |
| 32 | + case CPU_PR4450: | |
| 33 | + case CPU_BMIPS32: | |
| 34 | + case CPU_JZRISC: | |
| 35 | +#endif | |
| 36 | + | |
| 37 | +#if defined(CONFIG_SYS_HAS_CPU_MIPS32_R1) || \ | |
| 38 | + defined(CONFIG_SYS_HAS_CPU_MIPS32_R2) | |
| 39 | + case CPU_4KEC: | |
| 40 | +#endif | |
| 41 | + | |
| 42 | +#ifdef CONFIG_SYS_HAS_CPU_MIPS32_R2 | |
| 43 | + case CPU_4KSC: | |
| 44 | + case CPU_24K: | |
| 45 | + case CPU_34K: | |
| 46 | + case CPU_1004K: | |
| 47 | + case CPU_74K: | |
| 48 | + case CPU_M14KC: | |
| 49 | + case CPU_M14KEC: | |
| 50 | +#endif | |
| 51 | + | |
| 52 | +#ifdef CONFIG_SYS_HAS_CPU_MIPS64_R1 | |
| 53 | + case CPU_5KC: | |
| 54 | + case CPU_5KE: | |
| 55 | + case CPU_20KC: | |
| 56 | + case CPU_25KF: | |
| 57 | + case CPU_SB1: | |
| 58 | + case CPU_SB1A: | |
| 59 | +#endif | |
| 60 | + | |
| 61 | +#ifdef CONFIG_SYS_HAS_CPU_MIPS64_R2 | |
| 62 | + /* | |
| 63 | + * All MIPS64 R2 processors have their own special symbols. That is, | |
| 64 | + * there currently is no pure R2 core | |
| 65 | + */ | |
| 66 | +#endif | |
| 67 | + | |
| 68 | +#ifdef CONFIG_SYS_HAS_CPU_R3000 | |
| 69 | + case CPU_R2000: | |
| 70 | + case CPU_R3000: | |
| 71 | + case CPU_R3000A: | |
| 72 | + case CPU_R3041: | |
| 73 | + case CPU_R3051: | |
| 74 | + case CPU_R3052: | |
| 75 | + case CPU_R3081: | |
| 76 | + case CPU_R3081E: | |
| 77 | +#endif | |
| 78 | + | |
| 79 | +#ifdef CONFIG_SYS_HAS_CPU_TX39XX | |
| 80 | + case CPU_TX3912: | |
| 81 | + case CPU_TX3922: | |
| 82 | + case CPU_TX3927: | |
| 83 | +#endif | |
| 84 | + | |
| 85 | +#ifdef CONFIG_SYS_HAS_CPU_VR41XX | |
| 86 | + case CPU_VR41XX: | |
| 87 | + case CPU_VR4111: | |
| 88 | + case CPU_VR4121: | |
| 89 | + case CPU_VR4122: | |
| 90 | + case CPU_VR4131: | |
| 91 | + case CPU_VR4133: | |
| 92 | + case CPU_VR4181: | |
| 93 | + case CPU_VR4181A: | |
| 94 | +#endif | |
| 95 | + | |
| 96 | +#ifdef CONFIG_SYS_HAS_CPU_R4300 | |
| 97 | + case CPU_R4300: | |
| 98 | + case CPU_R4310: | |
| 99 | +#endif | |
| 100 | + | |
| 101 | +#ifdef CONFIG_SYS_HAS_CPU_R4X00 | |
| 102 | + case CPU_R4000PC: | |
| 103 | + case CPU_R4000SC: | |
| 104 | + case CPU_R4000MC: | |
| 105 | + case CPU_R4200: | |
| 106 | + case CPU_R4400PC: | |
| 107 | + case CPU_R4400SC: | |
| 108 | + case CPU_R4400MC: | |
| 109 | + case CPU_R4600: | |
| 110 | + case CPU_R4700: | |
| 111 | + case CPU_R4640: | |
| 112 | + case CPU_R4650: | |
| 113 | +#endif | |
| 114 | + | |
| 115 | +#ifdef CONFIG_SYS_HAS_CPU_TX49XX | |
| 116 | + case CPU_TX49XX: | |
| 117 | +#endif | |
| 118 | + | |
| 119 | +#ifdef CONFIG_SYS_HAS_CPU_R5000 | |
| 120 | + case CPU_R5000: | |
| 121 | +#endif | |
| 122 | + | |
| 123 | +#ifdef CONFIG_SYS_HAS_CPU_R5432 | |
| 124 | + case CPU_R5432: | |
| 125 | +#endif | |
| 126 | + | |
| 127 | +#ifdef CONFIG_SYS_HAS_CPU_R5500 | |
| 128 | + case CPU_R5500: | |
| 129 | +#endif | |
| 130 | + | |
| 131 | +#ifdef CONFIG_SYS_HAS_CPU_R6000 | |
| 132 | + case CPU_R6000: | |
| 133 | + case CPU_R6000A: | |
| 134 | +#endif | |
| 135 | + | |
| 136 | +#ifdef CONFIG_SYS_HAS_CPU_NEVADA | |
| 137 | + case CPU_NEVADA: | |
| 138 | +#endif | |
| 139 | + | |
| 140 | +#ifdef CONFIG_SYS_HAS_CPU_R8000 | |
| 141 | + case CPU_R8000: | |
| 142 | +#endif | |
| 143 | + | |
| 144 | +#ifdef CONFIG_SYS_HAS_CPU_R10000 | |
| 145 | + case CPU_R10000: | |
| 146 | + case CPU_R12000: | |
| 147 | + case CPU_R14000: | |
| 148 | +#endif | |
| 149 | +#ifdef CONFIG_SYS_HAS_CPU_RM7000 | |
| 150 | + case CPU_RM7000: | |
| 151 | + case CPU_SR71000: | |
| 152 | +#endif | |
| 153 | +#ifdef CONFIG_SYS_HAS_CPU_RM9000 | |
| 154 | + case CPU_RM9000: | |
| 155 | +#endif | |
| 156 | +#ifdef CONFIG_SYS_HAS_CPU_SB1 | |
| 157 | + case CPU_SB1: | |
| 158 | + case CPU_SB1A: | |
| 159 | +#endif | |
| 160 | +#ifdef CONFIG_SYS_HAS_CPU_CAVIUM_OCTEON | |
| 161 | + case CPU_CAVIUM_OCTEON: | |
| 162 | + case CPU_CAVIUM_OCTEON_PLUS: | |
| 163 | + case CPU_CAVIUM_OCTEON2: | |
| 164 | +#endif | |
| 165 | + | |
| 166 | +#ifdef CONFIG_SYS_HAS_CPU_BMIPS4380 | |
| 167 | + case CPU_BMIPS4380: | |
| 168 | +#endif | |
| 169 | + | |
| 170 | +#ifdef CONFIG_SYS_HAS_CPU_BMIPS5000 | |
| 171 | + case CPU_BMIPS5000: | |
| 172 | +#endif | |
| 173 | + | |
| 174 | +#ifdef CONFIG_SYS_HAS_CPU_XLP | |
| 175 | + case CPU_XLP: | |
| 176 | +#endif | |
| 177 | + | |
| 178 | +#ifdef CONFIG_SYS_HAS_CPU_XLR | |
| 179 | + case CPU_XLR: | |
| 180 | +#endif | |
| 181 | + break; | |
| 182 | + default: | |
| 183 | + unreachable(); | |
| 184 | + } | |
| 185 | + | |
| 186 | + return cpu_type; | |
| 187 | +} | |
| 188 | + | |
| 189 | +static inline int __pure current_cpu_type(void) | |
| 190 | +{ | |
| 191 | + const int cpu_type = current_cpu_data.cputype; | |
| 192 | + | |
| 193 | + return __get_cpu_type(cpu_type); | |
| 194 | +} | |
| 195 | + | |
| 196 | +static inline int __pure boot_cpu_type(void) | |
| 197 | +{ | |
| 198 | + const int cpu_type = cpu_data[0].cputype; | |
| 199 | + | |
| 200 | + return __get_cpu_type(cpu_type); | |
| 201 | +} | |
| 202 | + | |
| 203 | +#endif /* __ASM_CPU_TYPE_H */ | |
| @@ -3,15 +3,14 @@ · 2 unmodified lines | ||
| 3 | 3 | * various MIPS cpu types. |
| 4 | 4 | * |
| 5 | 5 | * Copyright (C) 1996 David S. Miller (davem@davemloft.net) |
| 6 | − * Copyright (C) 2004 Maciej W. Rozycki | |
| 6 | + * Copyright (C) 2004, 2013 Maciej W. Rozycki | |
| 7 | 7 | */ |
| 8 | 8 | #ifndef _ASM_CPU_H |
| 9 | 9 | #define _ASM_CPU_H |
| 10 | 10 | |
| 11 | −/* Assigned Company values for bits 23:16 of the PRId Register | |
| 12 | − (CP0 register 15, select 0). As of the MIPS32 and MIPS64 specs from | |
| 13 | − MTI, the PRId register is defined in this (backwards compatible) | |
| 14 | − way: | |
| 11 | +/* | |
| 12 | + As of the MIPS32 and MIPS64 specs from MTI, the PRId register (CP0 | |
| 13 | + register 15, select 0) is defined in this (backwards compatible) way: | |
| 15 | 14 | |
| 16 | 15 | +----------------+----------------+----------------+----------------+ |
| 17 | 16 | | Company Options| Company ID | Processor ID | Revision | |
| @@ -23,6 +22,14 @@ · 5 unmodified lines | ||
| 23 | 22 | spec. |
| 24 | 23 | */ |
| 25 | 24 | |
| 25 | +#define PRID_OPT_MASK 0xff000000 | |
| 26 | + | |
| 27 | +/* | |
| 28 | + * Assigned Company values for bits 23:16 of the PRId register. | |
| 29 | + */ | |
| 30 | + | |
| 31 | +#define PRID_COMP_MASK 0xff0000 | |
| 32 | + | |
| 26 | 33 | #define PRID_COMP_LEGACY 0x000000 |
| 27 | 34 | #define PRID_COMP_MIPS 0x010000 |
| 28 | 35 | #define PRID_COMP_BROADCOM 0x020000 |
| @@ -38,10 +45,17 @@ · 9 unmodified lines | ||
| 38 | 45 | #define PRID_COMP_INGENIC 0xd00000 |
| 39 | 46 | |
| 40 | 47 | /* |
| 41 | − * Assigned values for the product ID register. In order to detect a | |
| 42 | − * certain CPU type exactly eventually additional registers may need to | |
| 43 | − * be examined. These are valid when 23:16 == PRID_COMP_LEGACY | |
| 48 | + * Assigned Processor ID (implementation) values for bits 15:8 of the PRId | |
| 49 | + * register. In order to detect a certain CPU type exactly eventually | |
| 50 | + * additional registers may need to be examined. | |
| 44 | 51 | */ |
| 52 | + | |
| 53 | +#define PRID_IMP_MASK 0xff00 | |
| 54 | + | |
| 55 | +/* | |
| 56 | + * These are valid when 23:16 == PRID_COMP_LEGACY | |
| 57 | + */ | |
| 58 | + | |
| 45 | 59 | #define PRID_IMP_R2000 0x0100 |
| 46 | 60 | #define PRID_IMP_AU1_REV1 0x0100 |
| 47 | 61 | #define PRID_IMP_AU1_REV2 0x0200 |
| @@ -182,11 +196,15 @@ · 134 unmodified lines | ||
| 182 | 196 | #define PRID_IMP_NETLOGIC_XLP2XX 0x1200 |
| 183 | 197 | |
| 184 | 198 | /* |
| 185 | − * Definitions for 7:0 on legacy processors | |
| 199 | + * Particular Revision values for bits 7:0 of the PRId register. | |
| 186 | 200 | */ |
| 187 | 201 | |
| 188 | 202 | #define PRID_REV_MASK 0x00ff |
| 189 | 203 | |
| 204 | +/* | |
| 205 | + * Definitions for 7:0 on legacy processors | |
| 206 | + */ | |
| 207 | + | |
| 190 | 208 | #define PRID_REV_TX4927 0x0022 |
| 191 | 209 | #define PRID_REV_TX4937 0x0030 |
| 192 | 210 | #define PRID_REV_R4400 0x0040 |
| @@ -227,6 +245,8 @@ · 34 unmodified lines | ||
| 227 | 245 | * 31 16 15 8 7 0 |
| 228 | 246 | */ |
| 229 | 247 | |
| 248 | +#define FPIR_IMP_MASK 0xff00 | |
| 249 | + | |
| 230 | 250 | #define FPIR_IMP_NONE 0x0000 |
| 231 | 251 | |
| 232 | 252 | enum cpu_type_enum { |
| @@ -43,6 +43,8 @@ · 42 unmodified lines | ||
| 43 | 43 | #include <linux/io.h> |
| 44 | 44 | #include <linux/irq.h> |
| 45 | 45 | |
| 46 | +#include <asm/cpu.h> | |
| 47 | + | |
| 46 | 48 | /* cpu pipeline flush */ |
| 47 | 49 | void static inline au_sync(void) |
| 48 | 50 | { |
| @@ -140,7 +142,7 @@ static inline int au1xxx_cpu_needs_config_od(void) · 91 unmodified lines | ||
| 140 | 142 | |
| 141 | 143 | static inline int alchemy_get_cputype(void) |
| 142 | 144 | { |
| 143 | − switch (read_c0_prid() & 0xffff0000) { | |
| 145 | + switch (read_c0_prid() & (PRID_OPT_MASK | PRID_COMP_MASK)) { | |
| 144 | 146 | case 0x00030000: |
| 145 | 147 | return ALCHEMY_CPU_AU1000; |
| 146 | 148 | break; |
| @@ -8,6 +8,8 @@ · 7 unmodified lines | ||
| 8 | 8 | #ifndef __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H |
| 9 | 9 | #define __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H |
| 10 | 10 | |
| 11 | +#include <asm/cpu.h> | |
| 12 | + | |
| 11 | 13 | /* |
| 12 | 14 | * IP22 with a variety of processors so we can't use defaults for everything. |
| 13 | 15 | */ |
| @@ -8,6 +8,8 @@ · 7 unmodified lines | ||
| 8 | 8 | #ifndef __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H |
| 9 | 9 | #define __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H |
| 10 | 10 | |
| 11 | +#include <asm/cpu.h> | |
| 12 | + | |
| 11 | 13 | /* |
| 12 | 14 | * IP27 only comes with R10000 family processors all using the same config |
| 13 | 15 | */ |
| @@ -9,6 +9,8 @@ · 8 unmodified lines | ||
| 9 | 9 | #ifndef __ASM_MACH_IP28_CPU_FEATURE_OVERRIDES_H |
| 10 | 10 | #define __ASM_MACH_IP28_CPU_FEATURE_OVERRIDES_H |
| 11 | 11 | |
| 12 | +#include <asm/cpu.h> | |
| 13 | + | |
| 12 | 14 | /* |
| 13 | 15 | * IP28 only comes with R10000 family processors all using the same config |
| 14 | 16 | */ |
| @@ -603,6 +603,13 @@ · 602 unmodified lines | ||
| 603 | 603 | #define MIPS_CONF4_MMUEXTDEF (_ULCAST_(3) << 14) |
| 604 | 604 | #define MIPS_CONF4_MMUEXTDEF_MMUSIZEEXT (_ULCAST_(1) << 14) |
| 605 | 605 | |
| 606 | +#define MIPS_CONF5_NF (_ULCAST_(1) << 0) | |
| 607 | +#define MIPS_CONF5_UFR (_ULCAST_(1) << 2) | |
| 608 | +#define MIPS_CONF5_MSAEN (_ULCAST_(1) << 27) | |
| 609 | +#define MIPS_CONF5_EVA (_ULCAST_(1) << 28) | |
| 610 | +#define MIPS_CONF5_CV (_ULCAST_(1) << 29) | |
| 611 | +#define MIPS_CONF5_K (_ULCAST_(1) << 30) | |
| 612 | + | |
| 606 | 613 | #define MIPS_CONF6_SYND (_ULCAST_(1) << 13) |
| 607 | 614 | |
| 608 | 615 | #define MIPS_CONF7_WII (_ULCAST_(1) << 31) |
| @@ -83,6 +83,18 @@ static inline void pcibios_penalize_isa_irq(int irq, int active) · 82 unmodified lines | ||
| 83 | 83 | extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, |
| 84 | 84 | enum pci_mmap_state mmap_state, int write_combine); |
| 85 | 85 | |
| 86 | +#define HAVE_ARCH_PCI_RESOURCE_TO_USER | |
| 87 | + | |
| 88 | +static inline void pci_resource_to_user(const struct pci_dev *dev, int bar, | |
| 89 | + const struct resource *rsrc, resource_size_t *start, | |
| 90 | + resource_size_t *end) | |
| 91 | +{ | |
| 92 | + phys_t size = resource_size(rsrc); | |
| 93 | + | |
| 94 | + *start = fixup_bigphys_addr(rsrc->start, size); | |
| 95 | + *end = rsrc->start + size; | |
| 96 | +} | |
| 97 | + | |
| 86 | 98 | /* |
| 87 | 99 | * Dynamic DMA mapping stuff. |
| 88 | 100 | * MIPS has everything mapped statically. |
| @@ -10,7 +10,9 @@ · 9 unmodified lines | ||
| 10 | 10 | |
| 11 | 11 | #ifdef __KERNEL__ |
| 12 | 12 | |
| 13 | +#include <asm/cpu-features.h> | |
| 13 | 14 | #include <asm/mipsregs.h> |
| 15 | +#include <asm/cpu-type.h> | |
| 14 | 16 | |
| 15 | 17 | /* |
| 16 | 18 | * This is the clock rate of the i8253 PIT. A MIPS system may not have |
| @@ -33,9 +35,38 @@ · 16 unmodified lines | ||
| 33 | 35 | |
| 34 | 36 | typedef unsigned int cycles_t; |
| 35 | 37 | |
| 38 | +/* | |
| 39 | + * On R4000/R4400 before version 5.0 an erratum exists such that if the | |
| 40 | + * cycle counter is read in the exact moment that it is matching the | |
| 41 | + * compare register, no interrupt will be generated. | |
| 42 | + * | |
| 43 | + * There is a suggested workaround and also the erratum can't strike if | |
| 44 | + * the compare interrupt isn't being used as the clock source device. | |
| 45 | + * However for now the implementaton of this function doesn't get these | |
| 46 | + * fine details right. | |
| 47 | + */ | |
| 36 | 48 | static inline cycles_t get_cycles(void) |
| 37 | 49 | { |
| 38 | − return 0; | |
| 50 | + switch (boot_cpu_type()) { | |
| 51 | + case CPU_R4400PC: | |
| 52 | + case CPU_R4400SC: | |
| 53 | + case CPU_R4400MC: | |
| 54 | + if ((read_c0_prid() & 0xff) >= 0x0050) | |
| 55 | + return read_c0_count(); | |
| 56 | + break; | |
| 57 | + | |
| 58 | + case CPU_R4000PC: | |
| 59 | + case CPU_R4000SC: | |
| 60 | + case CPU_R4000MC: | |
| 61 | + break; | |
| 62 | + | |
| 63 | + default: | |
| 64 | + if (cpu_has_counter) | |
| 65 | + return read_c0_count(); | |
| 66 | + break; | |
| 67 | + } | |
| 68 | + | |
| 69 | + return 0; /* no usable counter */ | |
| 39 | 70 | } |
| 40 | 71 | |
| 41 | 72 | #endif /* __KERNEL__ */ |
| @@ -6,6 +6,7 @@ · 5 unmodified lines | ||
| 6 | 6 | #ifndef _ASM_VGA_H |
| 7 | 7 | #define _ASM_VGA_H |
| 8 | 8 | |
| 9 | +#include <asm/addrspace.h> | |
| 9 | 10 | #include <asm/byteorder.h> |
| 10 | 11 | |
| 11 | 12 | /* |
| @@ -13,7 +14,7 @@ · 1 unmodified line | ||
| 13 | 14 | * access the videoram directly without any black magic. |
| 14 | 15 | */ |
| 15 | 16 | |
| 16 | −#define VGA_MAP_MEM(x, s) (0xb0000000L + (unsigned long)(x)) | |
| 17 | +#define VGA_MAP_MEM(x, s) CKSEG1ADDR(0x10000000L + (unsigned long)(x)) | |
| 17 | 18 | |
| 18 | 19 | #define vga_readb(x) (*(x)) |
| 19 | 20 | #define vga_writeb(x, y) (*(y) = (x)) |
| @@ -20,6 +20,7 @@ · 19 unmodified lines | ||
| 20 | 20 | |
| 21 | 21 | #include <asm/bugs.h> |
| 22 | 22 | #include <asm/cpu.h> |
| 23 | +#include <asm/cpu-type.h> | |
| 23 | 24 | #include <asm/fpu.h> |
| 24 | 25 | #include <asm/mipsregs.h> |
| 25 | 26 | #include <asm/watch.h> |
| @@ -55,7 +56,7 @@ static inline void check_errata(void) · 29 unmodified lines | ||
| 55 | 56 | { |
| 56 | 57 | struct cpuinfo_mips *c = ¤t_cpu_data; |
| 57 | 58 | |
| 58 | − switch (c->cputype) { | |
| 59 | + switch (current_cpu_type()) { | |
| 59 | 60 | case CPU_34K: |
| 60 | 61 | /* |
| 61 | 62 | * Erratum "RPS May Cause Incorrect Instruction Execution" |
| @@ -122,7 +123,7 @@ static inline unsigned long cpu_get_fpu_id(void) · 60 unmodified lines | ||
| 122 | 123 | */ |
| 123 | 124 | static inline int __cpu_has_fpu(void) |
| 124 | 125 | { |
| 125 | − return ((cpu_get_fpu_id() & 0xff00) != FPIR_IMP_NONE); | |
| 126 | + return ((cpu_get_fpu_id() & FPIR_IMP_MASK) != FPIR_IMP_NONE); | |
| 126 | 127 | } |
| 127 | 128 | |
| 128 | 129 | static inline void cpu_probe_vmbits(struct cpuinfo_mips *c) |
| @@ -290,6 +291,17 @@ static inline unsigned int decode_config4(struct cpuinfo_mips *c) · 161 unmodified lines | ||
| 290 | 291 | return config4 & MIPS_CONF_M; |
| 291 | 292 | } |
| 292 | 293 | |
| 294 | +static inline unsigned int decode_config5(struct cpuinfo_mips *c) | |
| 295 | +{ | |
| 296 | + unsigned int config5; | |
| 297 | + | |
| 298 | + config5 = read_c0_config5(); | |
| 299 | + config5 &= ~MIPS_CONF5_UFR; | |
| 300 | + write_c0_config5(config5); | |
| 301 | + | |
| 302 | + return config5 & MIPS_CONF_M; | |
| 303 | +} | |
| 304 | + | |
| 293 | 305 | static void decode_configs(struct cpuinfo_mips *c) |
| 294 | 306 | { |
| 295 | 307 | int ok; |
| @@ -310,6 +322,8 @@ static void decode_configs(struct cpuinfo_mips *c) · 14 unmodified lines | ||
| 310 | 322 | ok = decode_config3(c); |
| 311 | 323 | if (ok) |
| 312 | 324 | ok = decode_config4(c); |
| 325 | + if (ok) | |
| 326 | + ok = decode_config5(c); | |
| 313 | 327 | |
| 314 | 328 | mips_probe_watch_registers(c); |
| 315 | 329 | |
| @@ -322,7 +336,7 @@ static void decode_configs(struct cpuinfo_mips *c) · 6 unmodified lines | ||
| 322 | 336 | |
| 323 | 337 | static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) |
| 324 | 338 | { |
| 325 | − switch (c->processor_id & 0xff00) { | |
| 339 | + switch (c->processor_id & PRID_IMP_MASK) { | |
| 326 | 340 | case PRID_IMP_R2000: |
| 327 | 341 | c->cputype = CPU_R2000; |
| 328 | 342 | __cpu_name[cpu] = "R2000"; |
| @@ -333,7 +347,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) · 4 unmodified lines | ||
| 333 | 347 | c->tlbsize = 64; |
| 334 | 348 | break; |
| 335 | 349 | case PRID_IMP_R3000: |
| 336 | − if ((c->processor_id & 0xff) == PRID_REV_R3000A) { | |
| 350 | + if ((c->processor_id & PRID_REV_MASK) == PRID_REV_R3000A) { | |
| 337 | 351 | if (cpu_has_confreg()) { |
| 338 | 352 | c->cputype = CPU_R3081E; |
| 339 | 353 | __cpu_name[cpu] = "R3081"; |
| @@ -353,7 +367,8 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) · 13 unmodified lines | ||
| 353 | 367 | break; |
| 354 | 368 | case PRID_IMP_R4000: |
| 355 | 369 | if (read_c0_config() & CONF_SC) { |
| 356 | − if ((c->processor_id & 0xff) >= PRID_REV_R4400) { | |
| 370 | + if ((c->processor_id & PRID_REV_MASK) >= | |
| 371 | + PRID_REV_R4400) { | |
| 357 | 372 | c->cputype = CPU_R4400PC; |
| 358 | 373 | __cpu_name[cpu] = "R4400PC"; |
| 359 | 374 | } else { |
| @@ -361,7 +376,8 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) · 1 unmodified line | ||
| 361 | 376 | __cpu_name[cpu] = "R4000PC"; |
| 362 | 377 | } |
| 363 | 378 | } else { |
| 364 | − if ((c->processor_id & 0xff) >= PRID_REV_R4400) { | |
| 379 | + if ((c->processor_id & PRID_REV_MASK) >= | |
| 380 | + PRID_REV_R4400) { | |
| 365 | 381 | c->cputype = CPU_R4400SC; |
| 366 | 382 | __cpu_name[cpu] = "R4400SC"; |
| 367 | 383 | } else { |
| @@ -454,7 +470,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) · 86 unmodified lines | ||
| 454 | 470 | __cpu_name[cpu] = "TX3927"; |
| 455 | 471 | c->tlbsize = 64; |
| 456 | 472 | } else { |
| 457 | − switch (c->processor_id & 0xff) { | |
| 473 | + switch (c->processor_id & PRID_REV_MASK) { | |
| 458 | 474 | case PRID_REV_TX3912: |
| 459 | 475 | c->cputype = CPU_TX3912; |
| 460 | 476 | __cpu_name[cpu] = "TX3912"; |
| @@ -640,7 +656,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) · 179 unmodified lines | ||
| 640 | 656 | static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu) |
| 641 | 657 | { |
| 642 | 658 | decode_configs(c); |
| 643 | − switch (c->processor_id & 0xff00) { | |
| 659 | + switch (c->processor_id & PRID_IMP_MASK) { | |
| 644 | 660 | case PRID_IMP_4KC: |
| 645 | 661 | c->cputype = CPU_4KC; |
| 646 | 662 | __cpu_name[cpu] = "MIPS 4Kc"; |
| @@ -711,7 +727,7 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu) · 64 unmodified lines | ||
| 711 | 727 | static inline void cpu_probe_alchemy(struct cpuinfo_mips *c, unsigned int cpu) |
| 712 | 728 | { |
| 713 | 729 | decode_configs(c); |
| 714 | − switch (c->processor_id & 0xff00) { | |
| 730 | + switch (c->processor_id & PRID_IMP_MASK) { | |
| 715 | 731 | case PRID_IMP_AU1_REV1: |
| 716 | 732 | case PRID_IMP_AU1_REV2: |
| 717 | 733 | c->cputype = CPU_ALCHEMY; |
| @@ -730,7 +746,7 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c, unsigned int cpu) · 12 unmodified lines | ||
| 730 | 746 | break; |
| 731 | 747 | case 4: |
| 732 | 748 | __cpu_name[cpu] = "Au1200"; |
| 733 | − if ((c->processor_id & 0xff) == 2) | |
| 749 | + if ((c->processor_id & PRID_REV_MASK) == 2) | |
| 734 | 750 | __cpu_name[cpu] = "Au1250"; |
| 735 | 751 | break; |
| 736 | 752 | case 5: |
| @@ -748,12 +764,12 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c, unsigned int cpu) · 11 unmodified lines | ||
| 748 | 764 | { |
| 749 | 765 | decode_configs(c); |
| 750 | 766 | |
| 751 | − switch (c->processor_id & 0xff00) { | |
| 767 | + switch (c->processor_id & PRID_IMP_MASK) { | |
| 752 | 768 | case PRID_IMP_SB1: |
| 753 | 769 | c->cputype = CPU_SB1; |
| 754 | 770 | __cpu_name[cpu] = "SiByte SB1"; |
| 755 | 771 | /* FPU in pass1 is known to have issues. */ |
| 756 | − if ((c->processor_id & 0xff) < 0x02) | |
| 772 | + if ((c->processor_id & PRID_REV_MASK) < 0x02) | |
| 757 | 773 | c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR); |
| 758 | 774 | break; |
| 759 | 775 | case PRID_IMP_SB1A: |
| @@ -766,7 +782,7 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c, unsigned int cpu) · 6 unmodified lines | ||
| 766 | 782 | static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c, unsigned int cpu) |
| 767 | 783 | { |
| 768 | 784 | decode_configs(c); |
| 769 | − switch (c->processor_id & 0xff00) { | |
| 785 | + switch (c->processor_id & PRID_IMP_MASK) { | |
| 770 | 786 | case PRID_IMP_SR71000: |
| 771 | 787 | c->cputype = CPU_SR71000; |
| 772 | 788 | __cpu_name[cpu] = "Sandcraft SR71000"; |
| @@ -779,7 +795,7 @@ static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c, unsigned int cpu) · 6 unmodified lines | ||
| 779 | 795 | static inline void cpu_probe_nxp(struct cpuinfo_mips *c, unsigned int cpu) |
| 780 | 796 | { |
| 781 | 797 | decode_configs(c); |
| 782 | − switch (c->processor_id & 0xff00) { | |
| 798 | + switch (c->processor_id & PRID_IMP_MASK) { | |
| 783 | 799 | case PRID_IMP_PR4450: |
| 784 | 800 | c->cputype = CPU_PR4450; |
| 785 | 801 | __cpu_name[cpu] = "Philips PR4450"; |
| @@ -791,7 +807,7 @@ static inline void cpu_probe_nxp(struct cpuinfo_mips *c, unsigned int cpu) · 5 unmodified lines | ||
| 791 | 807 | static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu) |
| 792 | 808 | { |
| 793 | 809 | decode_configs(c); |
| 794 | − switch (c->processor_id & 0xff00) { | |
| 810 | + switch (c->processor_id & PRID_IMP_MASK) { | |
| 795 | 811 | case PRID_IMP_BMIPS32_REV4: |
| 796 | 812 | case PRID_IMP_BMIPS32_REV8: |
| 797 | 813 | c->cputype = CPU_BMIPS32; |
| @@ -806,7 +822,7 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu) · 8 unmodified lines | ||
| 806 | 822 | set_elf_platform(cpu, "bmips3300"); |
| 807 | 823 | break; |
| 808 | 824 | case PRID_IMP_BMIPS43XX: { |
| 809 | − int rev = c->processor_id & 0xff; | |
| 825 | + int rev = c->processor_id & PRID_REV_MASK; | |
| 810 | 826 | |
| 811 | 827 | if (rev >= PRID_REV_BMIPS4380_LO && |
| 812 | 828 | rev <= PRID_REV_BMIPS4380_HI) { |
| @@ -832,7 +848,7 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu) · 19 unmodified lines | ||
| 832 | 848 | static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu) |
| 833 | 849 | { |
| 834 | 850 | decode_configs(c); |
| 835 | − switch (c->processor_id & 0xff00) { | |
| 851 | + switch (c->processor_id & PRID_IMP_MASK) { | |
| 836 | 852 | case PRID_IMP_CAVIUM_CN38XX: |
| 837 | 853 | case PRID_IMP_CAVIUM_CN31XX: |
| 838 | 854 | case PRID_IMP_CAVIUM_CN30XX: |
| @@ -875,7 +891,7 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu) · 36 unmodified lines | ||
| 875 | 891 | decode_configs(c); |
| 876 | 892 | /* JZRISC does not implement the CP0 counter. */ |
| 877 | 893 | c->options &= ~MIPS_CPU_COUNTER; |
| 878 | − switch (c->processor_id & 0xff00) { | |
| 894 | + switch (c->processor_id & PRID_IMP_MASK) { | |
| 879 | 895 | case PRID_IMP_JZRISC: |
| 880 | 896 | c->cputype = CPU_JZRISC; |
| 881 | 897 | __cpu_name[cpu] = "Ingenic JZRISC"; |
| @@ -890,7 +906,7 @@ static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu) · 8 unmodified lines | ||
| 890 | 906 | { |
| 891 | 907 | decode_configs(c); |
| 892 | 908 | |
| 893 | − if ((c->processor_id & 0xff00) == PRID_IMP_NETLOGIC_AU13XX) { | |
| 909 | + if ((c->processor_id & PRID_IMP_MASK) == PRID_IMP_NETLOGIC_AU13XX) { | |
| 894 | 910 | c->cputype = CPU_ALCHEMY; |
| 895 | 911 | __cpu_name[cpu] = "Au1300"; |
| 896 | 912 | /* following stuff is not for Alchemy */ |
| @@ -905,7 +921,7 @@ static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu) · 8 unmodified lines | ||
| 905 | 921 | MIPS_CPU_EJTAG | |
| 906 | 922 | MIPS_CPU_LLSC); |
| 907 | 923 | |
| 908 | − switch (c->processor_id & 0xff00) { | |
| 924 | + switch (c->processor_id & PRID_IMP_MASK) { | |
| 909 | 925 | case PRID_IMP_NETLOGIC_XLP2XX: |
| 910 | 926 | c->cputype = CPU_XLP; |
| 911 | 927 | __cpu_name[cpu] = "Broadcom XLPII"; |
| @@ -984,7 +1000,7 @@ void cpu_probe(void) · 72 unmodified lines | ||
| 984 | 1000 | c->cputype = CPU_UNKNOWN; |
| 985 | 1001 | |
| 986 | 1002 | c->processor_id = read_c0_prid(); |
| 987 | − switch (c->processor_id & 0xff0000) { | |
| 1003 | + switch (c->processor_id & PRID_COMP_MASK) { | |
| 988 | 1004 | case PRID_COMP_LEGACY: |
| 989 | 1005 | cpu_probe_legacy(c, cpu); |
| 990 | 1006 | break; |
| @@ -18,6 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | #include <linux/sched.h> |
| 19 | 19 | #include <asm/cpu.h> |
| 20 | 20 | #include <asm/cpu-info.h> |
| 21 | +#include <asm/cpu-type.h> | |
| 21 | 22 | #include <asm/idle.h> |
| 22 | 23 | #include <asm/mipsregs.h> |
| 23 | 24 | |
| @@ -136,7 +137,7 @@ void __init check_wait(void) · 112 unmodified lines | ||
| 136 | 137 | return; |
| 137 | 138 | } |
| 138 | 139 | |
| 139 | − switch (c->cputype) { | |
| 140 | + switch (current_cpu_type()) { | |
| 140 | 141 | case CPU_R3081: |
| 141 | 142 | case CPU_R3081E: |
| 142 | 143 | cpu_wait = r3081_wait; |
| @@ -24,6 +24,7 @@ · 23 unmodified lines | ||
| 24 | 24 | #include <linux/export.h> |
| 25 | 25 | |
| 26 | 26 | #include <asm/cpu-features.h> |
| 27 | +#include <asm/cpu-type.h> | |
| 27 | 28 | #include <asm/div64.h> |
| 28 | 29 | #include <asm/smtc_ipi.h> |
| 29 | 30 | #include <asm/time.h> |
| @@ -39,6 +39,7 @@ · 38 unmodified lines | ||
| 39 | 39 | #include <asm/break.h> |
| 40 | 40 | #include <asm/cop2.h> |
| 41 | 41 | #include <asm/cpu.h> |
| 42 | +#include <asm/cpu-type.h> | |
| 42 | 43 | #include <asm/dsp.h> |
| 43 | 44 | #include <asm/fpu.h> |
| 44 | 45 | #include <asm/fpu_emulator.h> |
| @@ -622,7 +623,7 @@ static int simulate_rdhwr(struct pt_regs *regs, int rd, int rt) · 577 unmodified lines | ||
| 622 | 623 | regs->regs[rt] = read_c0_count(); |
| 623 | 624 | return 0; |
| 624 | 625 | case 3: /* Count register resolution */ |
| 625 | − switch (current_cpu_data.cputype) { | |
| 626 | + switch (current_cpu_type()) { | |
| 626 | 627 | case CPU_20KC: |
| 627 | 628 | case CPU_25KF: |
| 628 | 629 | regs->regs[rt] = 1; |
| @@ -19,6 +19,7 @@ · 18 unmodified lines | ||
| 19 | 19 | #include <asm/bootinfo.h> |
| 20 | 20 | #include <asm/cacheops.h> |
| 21 | 21 | #include <asm/cpu-features.h> |
| 22 | +#include <asm/cpu-type.h> | |
| 22 | 23 | #include <asm/page.h> |
| 23 | 24 | #include <asm/pgtable.h> |
| 24 | 25 | #include <asm/r4kcache.h> |
| @@ -186,9 +187,10 @@ static void probe_octeon(void) · 161 unmodified lines | ||
| 186 | 187 | unsigned long dcache_size; |
| 187 | 188 | unsigned int config1; |
| 188 | 189 | struct cpuinfo_mips *c = ¤t_cpu_data; |
| 190 | + int cputype = current_cpu_type(); | |
| 189 | 191 | |
| 190 | 192 | config1 = read_c0_config1(); |
| 191 | − switch (c->cputype) { | |
| 193 | + switch (cputype) { | |
| 192 | 194 | case CPU_CAVIUM_OCTEON: |
| 193 | 195 | case CPU_CAVIUM_OCTEON_PLUS: |
| 194 | 196 | c->icache.linesz = 2 << ((config1 >> 19) & 7); |
| @@ -199,7 +201,7 @@ static void probe_octeon(void) · 4 unmodified lines | ||
| 199 | 201 | c->icache.sets * c->icache.ways * c->icache.linesz; |
| 200 | 202 | c->icache.waybit = ffs(icache_size / c->icache.ways) - 1; |
| 201 | 203 | c->dcache.linesz = 128; |
| 202 | − if (c->cputype == CPU_CAVIUM_OCTEON_PLUS) | |
| 204 | + if (cputype == CPU_CAVIUM_OCTEON_PLUS) | |
| 203 | 205 | c->dcache.sets = 2; /* CN5XXX has two Dcache sets */ |
| 204 | 206 | else |
| 205 | 207 | c->dcache.sets = 1; /* CN3XXX has one Dcache set */ |
| @@ -12,6 +12,7 @@ · 11 unmodified lines | ||
| 12 | 12 | #include <linux/highmem.h> |
| 13 | 13 | #include <linux/kernel.h> |
| 14 | 14 | #include <linux/linkage.h> |
| 15 | +#include <linux/preempt.h> | |
| 15 | 16 | #include <linux/sched.h> |
| 16 | 17 | #include <linux/smp.h> |
| 17 | 18 | #include <linux/mm.h> |
| @@ -24,6 +25,7 @@ · 6 unmodified lines | ||
| 24 | 25 | #include <asm/cacheops.h> |
| 25 | 26 | #include <asm/cpu.h> |
| 26 | 27 | #include <asm/cpu-features.h> |
| 28 | +#include <asm/cpu-type.h> | |
| 27 | 29 | #include <asm/io.h> |
| 28 | 30 | #include <asm/page.h> |
| 29 | 31 | #include <asm/pgtable.h> |
| @@ -601,11 +603,13 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size) · 571 unmodified lines | ||
| 601 | 603 | /* Catch bad driver code */ |
| 602 | 604 | BUG_ON(size == 0); |
| 603 | 605 | |
| 606 | + preempt_disable(); | |
| 604 | 607 | if (cpu_has_inclusive_pcaches) { |
| 605 | 608 | if (size >= scache_size) |
| 606 | 609 | r4k_blast_scache(); |
| 607 | 610 | else |
| 608 | 611 | blast_scache_range(addr, addr + size); |
| 612 | + preempt_enable(); | |
| 609 | 613 | __sync(); |
| 610 | 614 | return; |
| 611 | 615 | } |
| @@ -621,6 +625,7 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size) · 9 unmodified lines | ||
| 621 | 625 | R4600_HIT_CACHEOP_WAR_IMPL; |
| 622 | 626 | blast_dcache_range(addr, addr + size); |
| 623 | 627 | } |
| 628 | + preempt_enable(); | |
| 624 | 629 | |
| 625 | 630 | bc_wback_inv(addr, size); |
| 626 | 631 | __sync(); |
| @@ -631,6 +636,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size) · 4 unmodified lines | ||
| 631 | 636 | /* Catch bad driver code */ |
| 632 | 637 | BUG_ON(size == 0); |
| 633 | 638 | |
| 639 | + preempt_disable(); | |
| 634 | 640 | if (cpu_has_inclusive_pcaches) { |
| 635 | 641 | if (size >= scache_size) |
| 636 | 642 | r4k_blast_scache(); |
| @@ -645,6 +651,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size) · 8 unmodified lines | ||
| 645 | 651 | */ |
| 646 | 652 | blast_inv_scache_range(addr, addr + size); |
| 647 | 653 | } |
| 654 | + preempt_enable(); | |
| 648 | 655 | __sync(); |
| 649 | 656 | return; |
| 650 | 657 | } |
| @@ -655,6 +662,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size) · 4 unmodified lines | ||
| 655 | 662 | R4600_HIT_CACHEOP_WAR_IMPL; |
| 656 | 663 | blast_inv_dcache_range(addr, addr + size); |
| 657 | 664 | } |
| 665 | + preempt_enable(); | |
| 658 | 666 | |
| 659 | 667 | bc_inv(addr, size); |
| 660 | 668 | __sync(); |
| @@ -780,20 +788,30 @@ static inline void rm7k_erratum31(void) · 119 unmodified lines | ||
| 780 | 788 | |
| 781 | 789 | static inline void alias_74k_erratum(struct cpuinfo_mips *c) |
| 782 | 790 | { |
| 791 | + unsigned int imp = c->processor_id & PRID_IMP_MASK; | |
| 792 | + unsigned int rev = c->processor_id & PRID_REV_MASK; | |
| 793 | + | |
| 783 | 794 | /* |
| 784 | 795 | * Early versions of the 74K do not update the cache tags on a |
| 785 | 796 | * vtag miss/ptag hit which can occur in the case of KSEG0/KUSEG |
| 786 | 797 | * aliases. In this case it is better to treat the cache as always |
| 787 | 798 | * having aliases. |
| 788 | 799 | */ |
| 789 | − if ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(2, 4, 0)) | |
| 790 | − c->dcache.flags |= MIPS_CACHE_VTAG; | |
| 791 | − if ((c->processor_id & 0xff) == PRID_REV_ENCODE_332(2, 4, 0)) | |
| 792 | − write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND); | |
| 793 | − if (((c->processor_id & 0xff00) == PRID_IMP_1074K) && | |
| 794 | − ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(1, 1, 0))) { | |
| 795 | − c->dcache.flags |= MIPS_CACHE_VTAG; | |
| 796 | − write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND); | |
| 800 | + switch (imp) { | |
| 801 | + case PRID_IMP_74K: | |
| 802 | + if (rev <= PRID_REV_ENCODE_332(2, 4, 0)) | |
| 803 | + c->dcache.flags |= MIPS_CACHE_VTAG; | |
| 804 | + if (rev == PRID_REV_ENCODE_332(2, 4, 0)) | |
| 805 | + write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND); | |
| 806 | + break; | |
| 807 | + case PRID_IMP_1074K: | |
| 808 | + if (rev <= PRID_REV_ENCODE_332(1, 1, 0)) { | |
| 809 | + c->dcache.flags |= MIPS_CACHE_VTAG; | |
| 810 | + write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND); | |
| 811 | + } | |
| 812 | + break; | |
| 813 | + default: | |
| 814 | + BUG(); | |
| 797 | 815 | } |
| 798 | 816 | } |
| 799 | 817 | |
| @@ -809,7 +827,7 @@ static void probe_pcache(void) · 9 unmodified lines | ||
| 809 | 827 | unsigned long config1; |
| 810 | 828 | unsigned int lsize; |
| 811 | 829 | |
| 812 | − switch (c->cputype) { | |
| 830 | + switch (current_cpu_type()) { | |
| 813 | 831 | case CPU_R4600: /* QED style two way caches? */ |
| 814 | 832 | case CPU_R4700: |
| 815 | 833 | case CPU_R5000: |
| @@ -1025,7 +1043,8 @@ static void probe_pcache(void) · 209 unmodified lines | ||
| 1025 | 1043 | * presumably no vendor is shipping his hardware in the "bad" |
| 1026 | 1044 | * configuration. |
| 1027 | 1045 | */ |
| 1028 | − if ((prid & 0xff00) == PRID_IMP_R4000 && (prid & 0xff) < 0x40 && | |
| 1046 | + if ((prid & PRID_IMP_MASK) == PRID_IMP_R4000 && | |
| 1047 | + (prid & PRID_REV_MASK) < PRID_REV_R4400 && | |
| 1029 | 1048 | !(config & CONF_SC) && c->icache.linesz != 16 && |
| 1030 | 1049 | PAGE_SIZE <= 0x8000) |
| 1031 | 1050 | panic("Improper R4000SC processor configuration detected"); |
| @@ -1045,7 +1064,7 @@ static void probe_pcache(void) · 13 unmodified lines | ||
| 1045 | 1064 | * normally they'd suffer from aliases but magic in the hardware deals |
| 1046 | 1065 | * with that for us so we don't need to take care ourselves. |
| 1047 | 1066 | */ |
| 1048 | − switch (c->cputype) { | |
| 1067 | + switch (current_cpu_type()) { | |
| 1049 | 1068 | case CPU_20KC: |
| 1050 | 1069 | case CPU_25KF: |
| 1051 | 1070 | case CPU_SB1: |
| @@ -1065,7 +1084,7 @@ static void probe_pcache(void) · 13 unmodified lines | ||
| 1065 | 1084 | case CPU_34K: |
| 1066 | 1085 | case CPU_74K: |
| 1067 | 1086 | case CPU_1004K: |
| 1068 | − if (c->cputype == CPU_74K) | |
| 1087 | + if (current_cpu_type() == CPU_74K) | |
| 1069 | 1088 | alias_74k_erratum(c); |
| 1070 | 1089 | if ((read_c0_config7() & (1 << 16))) { |
| 1071 | 1090 | /* effectively physically indexed dcache, |
| @@ -1078,7 +1097,7 @@ static void probe_pcache(void) · 6 unmodified lines | ||
| 1078 | 1097 | c->dcache.flags |= MIPS_CACHE_ALIASES; |
| 1079 | 1098 | } |
| 1080 | 1099 | |
| 1081 | − switch (c->cputype) { | |
| 1100 | + switch (current_cpu_type()) { | |
| 1082 | 1101 | case CPU_20KC: |
| 1083 | 1102 | /* |
| 1084 | 1103 | * Some older 20Kc chips doesn't have the 'VI' bit in |
| @@ -1207,7 +1226,7 @@ static void setup_scache(void) · 122 unmodified lines | ||
| 1207 | 1226 | * processors don't have a S-cache that would be relevant to the |
| 1208 | 1227 | * Linux memory management. |
| 1209 | 1228 | */ |
| 1210 | − switch (c->cputype) { | |
| 1229 | + switch (current_cpu_type()) { | |
| 1211 | 1230 | case CPU_R4000SC: |
| 1212 | 1231 | case CPU_R4000MC: |
| 1213 | 1232 | case CPU_R4400SC: |
| @@ -1384,9 +1403,8 @@ static void r4k_cache_error_setup(void) · 170 unmodified lines | ||
| 1384 | 1403 | { |
| 1385 | 1404 | extern char __weak except_vec2_generic; |
| 1386 | 1405 | extern char __weak except_vec2_sb1; |
| 1387 | − struct cpuinfo_mips *c = ¤t_cpu_data; | |
| 1388 | 1406 | |
| 1389 | − switch (c->cputype) { | |
| 1407 | + switch (current_cpu_type()) { | |
| 1390 | 1408 | case CPU_SB1: |
| 1391 | 1409 | case CPU_SB1A: |
| 1392 | 1410 | set_uncached_handler(0x100, &except_vec2_sb1, 0x80); |
| @@ -18,6 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | #include <linux/highmem.h> |
| 19 | 19 | |
| 20 | 20 | #include <asm/cache.h> |
| 21 | +#include <asm/cpu-type.h> | |
| 21 | 22 | #include <asm/io.h> |
| 22 | 23 | |
| 23 | 24 | #include <dma-coherence.h> |
| @@ -307,12 +308,10 @@ static void mips_dma_sync_sg_for_cpu(struct device *dev, · 283 unmodified lines | ||
| 307 | 308 | { |
| 308 | 309 | int i; |
| 309 | 310 | |
| 310 | − /* Make sure that gcc doesn't leave the empty loop body. */ | |
| 311 | − for (i = 0; i < nelems; i++, sg++) { | |
| 312 | − if (cpu_needs_post_dma_flush(dev)) | |
| 311 | + if (cpu_needs_post_dma_flush(dev)) | |
| 312 | + for (i = 0; i < nelems; i++, sg++) | |
| 313 | 313 | __dma_sync(sg_page(sg), sg->offset, sg->length, |
| 314 | 314 | direction); |
| 315 | − } | |
| 316 | 315 | } |
| 317 | 316 | |
| 318 | 317 | static void mips_dma_sync_sg_for_device(struct device *dev, |
| @@ -320,12 +319,10 @@ static void mips_dma_sync_sg_for_device(struct device *dev, · 1 unmodified line | ||
| 320 | 319 | { |
| 321 | 320 | int i; |
| 322 | 321 | |
| 323 | − /* Make sure that gcc doesn't leave the empty loop body. */ | |
| 324 | − for (i = 0; i < nelems; i++, sg++) { | |
| 325 | − if (!plat_device_is_coherent(dev)) | |
| 322 | + if (!plat_device_is_coherent(dev)) | |
| 323 | + for (i = 0; i < nelems; i++, sg++) | |
| 326 | 324 | __dma_sync(sg_page(sg), sg->offset, sg->length, |
| 327 | 325 | direction); |
| 328 | − } | |
| 329 | 326 | } |
| 330 | 327 | |
| 331 | 328 | int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
| @@ -18,6 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | #include <asm/bugs.h> |
| 20 | 20 | #include <asm/cacheops.h> |
| 21 | +#include <asm/cpu-type.h> | |
| 21 | 22 | #include <asm/inst.h> |
| 22 | 23 | #include <asm/io.h> |
| 23 | 24 | #include <asm/page.h> |
| @@ -6,6 +6,7 @@ · 5 unmodified lines | ||
| 6 | 6 | #include <linux/sched.h> |
| 7 | 7 | #include <linux/mm.h> |
| 8 | 8 | |
| 9 | +#include <asm/cpu-type.h> | |
| 9 | 10 | #include <asm/mipsregs.h> |
| 10 | 11 | #include <asm/bcache.h> |
| 11 | 12 | #include <asm/cacheops.h> |
| @@ -71,7 +72,7 @@ static inline int mips_sc_is_activated(struct cpuinfo_mips *c) · 59 unmodified lines | ||
| 71 | 72 | unsigned int tmp; |
| 72 | 73 | |
| 73 | 74 | /* Check the bypass bit (L2B) */ |
| 74 | − switch (c->cputype) { | |
| 75 | + switch (current_cpu_type()) { | |
| 75 | 76 | case CPU_34K: |
| 76 | 77 | case CPU_74K: |
| 77 | 78 | case CPU_1004K: |
| @@ -16,6 +16,7 @@ · 15 unmodified lines | ||
| 16 | 16 | #include <linux/module.h> |
| 17 | 17 | |
| 18 | 18 | #include <asm/cpu.h> |
| 19 | +#include <asm/cpu-type.h> | |
| 19 | 20 | #include <asm/bootinfo.h> |
| 20 | 21 | #include <asm/mmu_context.h> |
| 21 | 22 | #include <asm/pgtable.h> |
| @@ -30,6 +30,7 @@ · 29 unmodified lines | ||
| 30 | 30 | #include <linux/cache.h> |
| 31 | 31 | |
| 32 | 32 | #include <asm/cacheflush.h> |
| 33 | +#include <asm/cpu-type.h> | |
| 33 | 34 | #include <asm/pgtable.h> |
| 34 | 35 | #include <asm/war.h> |
| 35 | 36 | #include <asm/uasm.h> |
| @@ -27,6 +27,7 @@ · 26 unmodified lines | ||
| 27 | 27 | #include <linux/timex.h> |
| 28 | 28 | #include <linux/mc146818rtc.h> |
| 29 | 29 | |
| 30 | +#include <asm/cpu.h> | |
| 30 | 31 | #include <asm/mipsregs.h> |
| 31 | 32 | #include <asm/mipsmtregs.h> |
| 32 | 33 | #include <asm/hardirq.h> |
| @@ -76,7 +77,7 @@ static void __init estimate_frequencies(void) · 43 unmodified lines | ||
| 76 | 77 | #endif |
| 77 | 78 | |
| 78 | 79 | #if defined (CONFIG_KVM_GUEST) && defined (CONFIG_KVM_HOST_FREQ) |
| 79 | − unsigned int prid = read_c0_prid() & 0xffff00; | |
| 80 | + unsigned int prid = read_c0_prid() & (PRID_COMP_MASK | PRID_IMP_MASK); | |
| 80 | 81 | |
| 81 | 82 | /* |
| 82 | 83 | * XXXKYMA: hardwire the CPU frequency to Host Freq/4 |
| @@ -169,7 +170,7 @@ unsigned int get_c0_compare_int(void) · 86 unmodified lines | ||
| 169 | 170 | |
| 170 | 171 | void __init plat_time_init(void) |
| 171 | 172 | { |
| 172 | − unsigned int prid = read_c0_prid() & 0xffff00; | |
| 173 | + unsigned int prid = read_c0_prid() & (PRID_COMP_MASK | PRID_IMP_MASK); | |
| 173 | 174 | unsigned int freq; |
| 174 | 175 | |
| 175 | 176 | estimate_frequencies(); |
| @@ -7,6 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | */ |
| 8 | 8 | #include <linux/init.h> |
| 9 | 9 | |
| 10 | +#include <asm/cpu.h> | |
| 10 | 11 | #include <asm/setup.h> |
| 11 | 12 | #include <asm/time.h> |
| 12 | 13 | #include <asm/irq.h> |
| @@ -34,7 +35,7 @@ static void __iomem *status_reg = (void __iomem *)0xbf000410; · 21 unmodified lines | ||
| 34 | 35 | */ |
| 35 | 36 | static unsigned int __init estimate_cpu_frequency(void) |
| 36 | 37 | { |
| 37 | − unsigned int prid = read_c0_prid() & 0xffff00; | |
| 38 | + unsigned int prid = read_c0_prid() & (PRID_COMP_MASK | PRID_IMP_MASK); | |
| 38 | 39 | unsigned int tick = 0; |
| 39 | 40 | unsigned int freq; |
| 40 | 41 | unsigned int orig; |
| @@ -36,6 +36,7 @@ · 35 unmodified lines | ||
| 36 | 36 | #include <linux/irq.h> |
| 37 | 37 | #include <linux/interrupt.h> |
| 38 | 38 | |
| 39 | +#include <asm/cpu.h> | |
| 39 | 40 | #include <asm/mipsregs.h> |
| 40 | 41 | #include <asm/netlogic/xlr/fmn.h> |
| 41 | 42 | #include <asm/netlogic/xlr/xlr.h> |
| @@ -187,7 +188,7 @@ void xlr_board_info_setup(void) · 145 unmodified lines | ||
| 187 | 188 | int processor_id, num_core; |
| 188 | 189 | |
| 189 | 190 | num_core = hweight32(nlm_current_node()->coremask); |
| 190 | − processor_id = read_c0_prid() & 0xff00; | |
| 191 | + processor_id = read_c0_prid() & PRID_IMP_MASK; | |
| 191 | 192 | |
| 192 | 193 | setup_cpu_fmninfo(cpu, num_core); |
| 193 | 194 | switch (processor_id) { |
| @@ -12,6 +12,7 @@ · 11 unmodified lines | ||
| 12 | 12 | #include <linux/oprofile.h> |
| 13 | 13 | #include <linux/smp.h> |
| 14 | 14 | #include <asm/cpu-info.h> |
| 15 | +#include <asm/cpu-type.h> | |
| 15 | 16 | |
| 16 | 17 | #include "op_impl.h" |
| 17 | 18 | |
| @@ -39,6 +39,7 @@ · 38 unmodified lines | ||
| 39 | 39 | #include <linux/mm.h> |
| 40 | 40 | #include <linux/console.h> |
| 41 | 41 | #include <linux/tty.h> |
| 42 | +#include <linux/vt.h> | |
| 42 | 43 | |
| 43 | 44 | #include <asm/sibyte/bcm1480_regs.h> |
| 44 | 45 | #include <asm/sibyte/bcm1480_scd.h> |
| @@ -22,6 +22,7 @@ · 21 unmodified lines | ||
| 22 | 22 | #include <linux/string.h> |
| 23 | 23 | |
| 24 | 24 | #include <asm/bootinfo.h> |
| 25 | +#include <asm/cpu.h> | |
| 25 | 26 | #include <asm/mipsregs.h> |
| 26 | 27 | #include <asm/io.h> |
| 27 | 28 | #include <asm/sibyte/sb1250.h> |
| @@ -119,7 +120,7 @@ void __init bcm1480_setup(void) · 91 unmodified lines | ||
| 119 | 120 | uint64_t sys_rev; |
| 120 | 121 | int plldiv; |
| 121 | 122 | |
| 122 | − sb1_pass = read_c0_prid() & 0xff; | |
| 123 | + sb1_pass = read_c0_prid() & PRID_REV_MASK; | |
| 123 | 124 | sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION)); |
| 124 | 125 | soc_type = SYS_SOC_TYPE(sys_rev); |
| 125 | 126 | part_type = G_SYS_PART(sys_rev); |
| @@ -22,6 +22,7 @@ · 21 unmodified lines | ||
| 22 | 22 | #include <linux/string.h> |
| 23 | 23 | |
| 24 | 24 | #include <asm/bootinfo.h> |
| 25 | +#include <asm/cpu.h> | |
| 25 | 26 | #include <asm/mipsregs.h> |
| 26 | 27 | #include <asm/io.h> |
| 27 | 28 | #include <asm/sibyte/sb1250.h> |
| @@ -182,7 +183,7 @@ void __init sb1250_setup(void) · 154 unmodified lines | ||
| 182 | 183 | int plldiv; |
| 183 | 184 | int bad_config = 0; |
| 184 | 185 | |
| 185 | − sb1_pass = read_c0_prid() & 0xff; | |
| 186 | + sb1_pass = read_c0_prid() & PRID_REV_MASK; | |
| 186 | 187 | sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION)); |
| 187 | 188 | soc_type = SYS_SOC_TYPE(sys_rev); |
| 188 | 189 | soc_pass = G_SYS_REVISION(sys_rev); |
| @@ -25,6 +25,7 @@ · 24 unmodified lines | ||
| 25 | 25 | #endif |
| 26 | 26 | |
| 27 | 27 | #include <asm/bootinfo.h> |
| 28 | +#include <asm/cpu.h> | |
| 28 | 29 | #include <asm/io.h> |
| 29 | 30 | #include <asm/reboot.h> |
| 30 | 31 | #include <asm/sni.h> |
| @@ -173,7 +174,7 @@ void __init plat_mem_setup(void) · 142 unmodified lines | ||
| 173 | 174 | system_type = "RM300-Cxx"; |
| 174 | 175 | break; |
| 175 | 176 | case SNI_BRD_PCI_DESKTOP: |
| 176 | − switch (read_c0_prid() & 0xff00) { | |
| 177 | + switch (read_c0_prid() & PRID_IMP_MASK) { | |
| 177 | 178 | case PRID_IMP_R4600: |
| 178 | 179 | case PRID_IMP_R4700: |
| 179 | 180 | system_type = "RM200-C20"; |
| @@ -14,53 +14,9 @@ · 13 unmodified lines | ||
| 14 | 14 | * the Free Software Foundation; either version 2 of the License, or |
| 15 | 15 | * (at your option) any later version. |
| 16 | 16 | */ |
| 17 | − | |
| 18 | −#include <linux/of.h> /* linux/of.h gets to determine #include ordering */ | |
| 19 | − | |
| 20 | 17 | #ifndef _ASM_OPENRISC_PROM_H |
| 21 | 18 | #define _ASM_OPENRISC_PROM_H |
| 22 | −#ifdef __KERNEL__ | |
| 23 | −#ifndef __ASSEMBLY__ | |
| 24 | 19 | |
| 25 | −#include <linux/types.h> | |
| 26 | −#include <asm/irq.h> | |
| 27 | −#include <linux/irqdomain.h> | |
| 28 | −#include <linux/atomic.h> | |
| 29 | −#include <linux/of_irq.h> | |
| 30 | −#include <linux/of_fdt.h> | |
| 31 | −#include <linux/of_address.h> | |
| 32 | −#include <linux/proc_fs.h> | |
| 33 | −#include <linux/platform_device.h> | |
| 34 | 20 | #define HAVE_ARCH_DEVTREE_FIXUPS |
| 35 | 21 | |
| 36 | −/* Other Prototypes */ | |
| 37 | −extern int early_uartlite_console(void); | |
| 38 | − | |
| 39 | −/* Parse the ibm,dma-window property of an OF node into the busno, phys and | |
| 40 | − * size parameters. | |
| 41 | − */ | |
| 42 | −void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop, | |
| 43 | − unsigned long *busno, unsigned long *phys, unsigned long *size); | |
| 44 | − | |
| 45 | −extern void kdump_move_device_tree(void); | |
| 46 | − | |
| 47 | −/* Get the MAC address */ | |
| 48 | −extern const void *of_get_mac_address(struct device_node *np); | |
| 49 | − | |
| 50 | −/** | |
| 51 | − * of_irq_map_pci - Resolve the interrupt for a PCI device | |
| 52 | − * @pdev: the device whose interrupt is to be resolved | |
| 53 | − * @out_irq: structure of_irq filled by this function | |
| 54 | − * | |
| 55 | − * This function resolves the PCI interrupt for a given PCI device. If a | |
| 56 | − * device-node exists for a given pci_dev, it will use normal OF tree | |
| 57 | − * walking. If not, it will implement standard swizzling and walk up the | |
| 58 | − * PCI tree until an device-node is found, at which point it will finish | |
| 59 | − * resolving using the OF tree walking. | |
| 60 | − */ | |
| 61 | −struct pci_dev; | |
| 62 | −extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq); | |
| 63 | − | |
| 64 | −#endif /* __ASSEMBLY__ */ | |
| 65 | −#endif /* __KERNEL__ */ | |
| 66 | 22 | #endif /* _ASM_OPENRISC_PROM_H */ |
| @@ -182,6 +182,9 @@ void do_page_fault(struct pt_regs *regs, unsigned long code, · 181 unmodified lines | ||
| 182 | 182 | |
| 183 | 183 | if (user_mode(regs)) |
| 184 | 184 | flags |= FAULT_FLAG_USER; |
| 185 | + | |
| 186 | + acc_type = parisc_acctyp(code, regs->iir); | |
| 187 | + | |
| 185 | 188 | if (acc_type & VM_WRITE) |
| 186 | 189 | flags |= FAULT_FLAG_WRITE; |
| 187 | 190 | retry: |
| @@ -196,8 +199,6 @@ retry: · 8 unmodified lines | ||
| 196 | 199 | |
| 197 | 200 | good_area: |
| 198 | 201 | |
| 199 | − acc_type = parisc_acctyp(code,regs->iir); | |
| 200 | − | |
| 201 | 202 | if ((vma->vm_flags & acc_type) != acc_type) |
| 202 | 203 | goto bad_area; |
| 203 | 204 | |
| @@ -74,7 +74,7 @@ src-wlib-$(CONFIG_8xx) += mpc8xx.c planetcore.c · 73 unmodified lines | ||
| 74 | 74 | src-wlib-$(CONFIG_PPC_82xx) += pq2.c fsl-soc.c planetcore.c |
| 75 | 75 | src-wlib-$(CONFIG_EMBEDDED6xx) += mv64x60.c mv64x60_i2c.c ugecon.c |
| 76 | 76 | |
| 77 | −src-plat-y := of.c | |
| 77 | +src-plat-y := of.c epapr.c | |
| 78 | 78 | src-plat-$(CONFIG_40x) += fixed-head.S ep405.c cuboot-hotfoot.c \ |
| 79 | 79 | treeboot-walnut.c cuboot-acadia.c \ |
| 80 | 80 | cuboot-kilauea.c simpleboot.c \ |
| @@ -97,7 +97,7 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \ · 16 unmodified lines | ||
| 97 | 97 | prpmc2800.c |
| 98 | 98 | src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c |
| 99 | 99 | src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c |
| 100 | −src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c | |
| 100 | +src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c | |
| 101 | 101 | |
| 102 | 102 | src-wlib := $(sort $(src-wlib-y)) |
| 103 | 103 | src-plat := $(sort $(src-plat-y)) |
| @@ -0,0 +1,9 @@ | ||
| 1 | +extern void epapr_platform_init(unsigned long r3, unsigned long r4, | |
| 2 | + unsigned long r5, unsigned long r6, | |
| 3 | + unsigned long r7); | |
| 4 | + | |
| 5 | +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | |
| 6 | + unsigned long r6, unsigned long r7) | |
| 7 | +{ | |
| 8 | + epapr_platform_init(r3, r4, r5, r6, r7); | |
| 9 | +} | |
| @@ -48,8 +48,8 @@ static void platform_fixups(void) · 47 unmodified lines | ||
| 48 | 48 | fdt_addr, fdt_totalsize((void *)fdt_addr), ima_size); |
| 49 | 49 | } |
| 50 | 50 | |
| 51 | −void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | |
| 52 | − unsigned long r6, unsigned long r7) | |
| 51 | +void epapr_platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | |
| 52 | + unsigned long r6, unsigned long r7) | |
| 53 | 53 | { |
| 54 | 54 | epapr_magic = r6; |
| 55 | 55 | ima_size = r7; |
| @@ -26,6 +26,9 @@ · 25 unmodified lines | ||
| 26 | 26 | |
| 27 | 27 | static unsigned long claim_base; |
| 28 | 28 | |
| 29 | +void epapr_platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | |
| 30 | + unsigned long r6, unsigned long r7); | |
| 31 | + | |
| 29 | 32 | static void *of_try_claim(unsigned long size) |
| 30 | 33 | { |
| 31 | 34 | unsigned long addr = 0; |
| @@ -61,7 +64,7 @@ static void of_image_hdr(const void *hdr) · 29 unmodified lines | ||
| 61 | 64 | } |
| 62 | 65 | } |
| 63 | 66 | |
| 64 | −void platform_init(unsigned long a1, unsigned long a2, void *promptr) | |
| 67 | +static void of_platform_init(unsigned long a1, unsigned long a2, void *promptr) | |
| 65 | 68 | { |
| 66 | 69 | platform_ops.image_hdr = of_image_hdr; |
| 67 | 70 | platform_ops.malloc = of_try_claim; |
| @@ -81,3 +84,14 @@ void platform_init(unsigned long a1, unsigned long a2, void *promptr) · 13 unmodified lines | ||
| 81 | 84 | loader_info.initrd_size = a2; |
| 82 | 85 | } |
| 83 | 86 | } |
| 87 | + | |
| 88 | +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | |
| 89 | + unsigned long r6, unsigned long r7) | |
| 90 | +{ | |
| 91 | + /* Detect OF vs. ePAPR boot */ | |
| 92 | + if (r5) | |
| 93 | + of_platform_init(r3, r4, (void *)r5); | |
| 94 | + else | |
| 95 | + epapr_platform_init(r3, r4, r5, r6, r7); | |
| 96 | +} | |
| 97 | + | |
| @@ -148,18 +148,18 @@ make_space=y · 147 unmodified lines | ||
| 148 | 148 | |
| 149 | 149 | case "$platform" in |
| 150 | 150 | pseries) |
| 151 | − platformo=$object/of.o | |
| 151 | + platformo="$object/of.o $object/epapr.o" | |
| 152 | 152 | link_address='0x4000000' |
| 153 | 153 | ;; |
| 154 | 154 | maple) |
| 155 | − platformo=$object/of.o | |
| 155 | + platformo="$object/of.o $object/epapr.o" | |
| 156 | 156 | link_address='0x400000' |
| 157 | 157 | ;; |
| 158 | 158 | pmac|chrp) |
| 159 | − platformo=$object/of.o | |
| 159 | + platformo="$object/of.o $object/epapr.o" | |
| 160 | 160 | ;; |
| 161 | 161 | coff) |
| 162 | − platformo="$object/crt0.o $object/of.o" | |
| 162 | + platformo="$object/crt0.o $object/of.o $object/epapr.o" | |
| 163 | 163 | lds=$object/zImage.coff.lds |
| 164 | 164 | link_address='0x500000' |
| 165 | 165 | pie= |
| @@ -253,6 +253,7 @@ treeboot-iss4xx-mpic) · 87 unmodified lines | ||
| 253 | 253 | platformo="$object/treeboot-iss4xx.o" |
| 254 | 254 | ;; |
| 255 | 255 | epapr) |
| 256 | + platformo="$object/epapr.o $object/epapr-wrapper.o" | |
| 256 | 257 | link_address='0x20000000' |
| 257 | 258 | pie=-pie |
| 258 | 259 | ;; |
| @@ -69,9 +69,9 @@ extern struct thread_info *softirq_ctx[NR_CPUS]; · 68 unmodified lines | ||
| 69 | 69 | |
| 70 | 70 | extern void irq_ctx_init(void); |
| 71 | 71 | extern void call_do_softirq(struct thread_info *tp); |
| 72 | −extern int call_handle_irq(int irq, void *p1, | |
| 73 | − struct thread_info *tp, void *func); | |
| 72 | +extern void call_do_irq(struct pt_regs *regs, struct thread_info *tp); | |
| 74 | 73 | extern void do_IRQ(struct pt_regs *regs); |
| 74 | +extern void __do_irq(struct pt_regs *regs); | |
| 75 | 75 | |
| 76 | 76 | int irq_choose_cpu(const struct cpumask *mask); |
| 77 | 77 | |
| @@ -149,8 +149,6 @@ typedef struct { · 148 unmodified lines | ||
| 149 | 149 | |
| 150 | 150 | struct thread_struct { |
| 151 | 151 | unsigned long ksp; /* Kernel stack pointer */ |
| 152 | − unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow */ | |
| 153 | − | |
| 154 | 152 | #ifdef CONFIG_PPC64 |
| 155 | 153 | unsigned long ksp_vsid; |
| 156 | 154 | #endif |
| @@ -162,6 +160,7 @@ struct thread_struct { · 5 unmodified lines | ||
| 162 | 160 | #endif |
| 163 | 161 | #ifdef CONFIG_PPC32 |
| 164 | 162 | void *pgdir; /* root of page-table tree */ |
| 163 | + unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow */ | |
| 165 | 164 | #endif |
| 166 | 165 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
| 167 | 166 | /* |
| @@ -321,7 +320,6 @@ struct thread_struct { · 153 unmodified lines | ||
| 321 | 320 | #else |
| 322 | 321 | #define INIT_THREAD { \ |
| 323 | 322 | .ksp = INIT_SP, \ |
| 324 | − .ksp_limit = INIT_SP_LIMIT, \ | |
| 325 | 323 | .regs = (struct pt_regs *)INIT_SP - 1, /* XXX bogus, I think */ \ |
| 326 | 324 | .fs = KERNEL_DS, \ |
| 327 | 325 | .fpr = {{0}}, \ |
| @@ -80,10 +80,11 @@ int main(void) · 79 unmodified lines | ||
| 80 | 80 | DEFINE(TASKTHREADPPR, offsetof(struct task_struct, thread.ppr)); |
| 81 | 81 | #else |
| 82 | 82 | DEFINE(THREAD_INFO, offsetof(struct task_struct, stack)); |
| 83 | + DEFINE(THREAD_INFO_GAP, _ALIGN_UP(sizeof(struct thread_info), 16)); | |
| 84 | + DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit)); | |
| 83 | 85 | #endif /* CONFIG_PPC64 */ |
| 84 | 86 | |
| 85 | 87 | DEFINE(KSP, offsetof(struct thread_struct, ksp)); |
| 86 | − DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit)); | |
| 87 | 88 | DEFINE(PT_REGS, offsetof(struct thread_struct, regs)); |
| 88 | 89 | #ifdef CONFIG_BOOKE |
| 89 | 90 | DEFINE(THREAD_NORMSAVES, offsetof(struct thread_struct, normsave[0])); |
| @@ -661,7 +661,7 @@ struct iommu_table *iommu_init_table(struct iommu_table *tbl, int nid) · 660 unmodified lines | ||
| 661 | 661 | /* number of bytes needed for the bitmap */ |
| 662 | 662 | sz = BITS_TO_LONGS(tbl->it_size) * sizeof(unsigned long); |
| 663 | 663 | |
| 664 | − page = alloc_pages_node(nid, GFP_ATOMIC, get_order(sz)); | |
| 664 | + page = alloc_pages_node(nid, GFP_KERNEL, get_order(sz)); | |
| 665 | 665 | if (!page) |
| 666 | 666 | panic("iommu_init_table: Can't allocate %ld bytes\n", sz); |
| 667 | 667 | tbl->it_map = page_address(page); |
| @@ -441,50 +441,6 @@ void migrate_irqs(void) · 440 unmodified lines | ||
| 441 | 441 | } |
| 442 | 442 | #endif |
| 443 | 443 | |
| 444 | −static inline void handle_one_irq(unsigned int irq) | |
| 445 | −{ | |
| 446 | − struct thread_info *curtp, *irqtp; | |
| 447 | − unsigned long saved_sp_limit; | |
| 448 | − struct irq_desc *desc; | |
| 449 | − | |
| 450 | − desc = irq_to_desc(irq); | |
| 451 | − if (!desc) | |
| 452 | − return; | |
| 453 | − | |
| 454 | − /* Switch to the irq stack to handle this */ | |
| 455 | − curtp = current_thread_info(); | |
| 456 | − irqtp = hardirq_ctx[smp_processor_id()]; | |
| 457 | − | |
| 458 | − if (curtp == irqtp) { | |
| 459 | − /* We're already on the irq stack, just handle it */ | |
| 460 | − desc->handle_irq(irq, desc); | |
| 461 | − return; | |
| 462 | − } | |
| 463 | − | |
| 464 | − saved_sp_limit = current->thread.ksp_limit; | |
| 465 | − | |
| 466 | − irqtp->task = curtp->task; | |
| 467 | − irqtp->flags = 0; | |
| 468 | − | |
| 469 | − /* Copy the softirq bits in preempt_count so that the | |
| 470 | − * softirq checks work in the hardirq context. */ | |
| 471 | − irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) | | |
| 472 | − (curtp->preempt_count & SOFTIRQ_MASK); | |
| 473 | − | |
| 474 | − current->thread.ksp_limit = (unsigned long)irqtp + | |
| 475 | − _ALIGN_UP(sizeof(struct thread_info), 16); | |
| 476 | − | |
| 477 | − call_handle_irq(irq, desc, irqtp, desc->handle_irq); | |
| 478 | − current->thread.ksp_limit = saved_sp_limit; | |
| 479 | − irqtp->task = NULL; | |
| 480 | − | |
| 481 | − /* Set any flag that may have been set on the | |
| 482 | − * alternate stack | |
| 483 | − */ | |
| 484 | − if (irqtp->flags) | |
| 485 | − set_bits(irqtp->flags, &curtp->flags); | |
| 486 | −} | |
| 487 | − | |
| 488 | 444 | static inline void check_stack_overflow(void) |
| 489 | 445 | { |
| 490 | 446 | #ifdef CONFIG_DEBUG_STACKOVERFLOW |
| @@ -501,9 +457,9 @@ static inline void check_stack_overflow(void) · 10 unmodified lines | ||
| 501 | 457 | #endif |
| 502 | 458 | } |
| 503 | 459 | |
| 504 | −void do_IRQ(struct pt_regs *regs) | |
| 460 | +void __do_irq(struct pt_regs *regs) | |
| 505 | 461 | { |
| 506 | − struct pt_regs *old_regs = set_irq_regs(regs); | |
| 462 | + struct irq_desc *desc; | |
| 507 | 463 | unsigned int irq; |
| 508 | 464 | |
| 509 | 465 | irq_enter(); |
| @@ -519,18 +475,56 @@ void do_IRQ(struct pt_regs *regs) · 9 unmodified lines | ||
| 519 | 475 | */ |
| 520 | 476 | irq = ppc_md.get_irq(); |
| 521 | 477 | |
| 522 | − /* We can hard enable interrupts now */ | |
| 478 | + /* We can hard enable interrupts now to allow perf interrupts */ | |
| 523 | 479 | may_hard_irq_enable(); |
| 524 | 480 | |
| 525 | 481 | /* And finally process it */ |
| 526 | − if (irq != NO_IRQ) | |
| 527 | − handle_one_irq(irq); | |
| 528 | − else | |
| 482 | + if (unlikely(irq == NO_IRQ)) | |
| 529 | 483 | __get_cpu_var(irq_stat).spurious_irqs++; |
| 484 | + else { | |
| 485 | + desc = irq_to_desc(irq); | |
| 486 | + if (likely(desc)) | |
| 487 | + desc->handle_irq(irq, desc); | |
| 488 | + } | |
| 530 | 489 | |
| 531 | 490 | trace_irq_exit(regs); |
| 532 | 491 | |
| 533 | 492 | irq_exit(); |
| 493 | +} | |
| 494 | + | |
| 495 | +void do_IRQ(struct pt_regs *regs) | |
| 496 | +{ | |
| 497 | + struct pt_regs *old_regs = set_irq_regs(regs); | |
| 498 | + struct thread_info *curtp, *irqtp; | |
| 499 | + | |
| 500 | + /* Switch to the irq stack to handle this */ | |
| 501 | + curtp = current_thread_info(); | |
| 502 | + irqtp = hardirq_ctx[raw_smp_processor_id()]; | |
| 503 | + | |
| 504 | + /* Already there ? */ | |
| 505 | + if (unlikely(curtp == irqtp)) { | |
| 506 | + __do_irq(regs); | |
| 507 | + set_irq_regs(old_regs); | |
| 508 | + return; | |
| 509 | + } | |
| 510 | + | |
| 511 | + /* Prepare the thread_info in the irq stack */ | |
| 512 | + irqtp->task = curtp->task; | |
| 513 | + irqtp->flags = 0; | |
| 514 | + | |
| 515 | + /* Copy the preempt_count so that the [soft]irq checks work. */ | |
| 516 | + irqtp->preempt_count = curtp->preempt_count; | |
| 517 | + | |
| 518 | + /* Switch stack and call */ | |
| 519 | + call_do_irq(regs, irqtp); | |
| 520 | + | |
| 521 | + /* Restore stack limit */ | |
| 522 | + irqtp->task = NULL; | |
| 523 | + | |
| 524 | + /* Copy back updates to the thread_info */ | |
| 525 | + if (irqtp->flags) | |
| 526 | + set_bits(irqtp->flags, &curtp->flags); | |
| 527 | + | |
| 534 | 528 | set_irq_regs(old_regs); |
| 535 | 529 | } |
| 536 | 530 | |
| @@ -592,28 +586,22 @@ void irq_ctx_init(void) · 55 unmodified lines | ||
| 592 | 586 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); |
| 593 | 587 | tp = softirq_ctx[i]; |
| 594 | 588 | tp->cpu = i; |
| 595 | − tp->preempt_count = 0; | |
| 596 | 589 | |
| 597 | 590 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); |
| 598 | 591 | tp = hardirq_ctx[i]; |
| 599 | 592 | tp->cpu = i; |
| 600 | − tp->preempt_count = HARDIRQ_OFFSET; | |
| 601 | 593 | } |
| 602 | 594 | } |
| 603 | 595 | |
| 604 | 596 | static inline void do_softirq_onstack(void) |
| 605 | 597 | { |
| 606 | 598 | struct thread_info *curtp, *irqtp; |
| 607 | − unsigned long saved_sp_limit = current->thread.ksp_limit; | |
| 608 | 599 | |
| 609 | 600 | curtp = current_thread_info(); |
| 610 | 601 | irqtp = softirq_ctx[smp_processor_id()]; |
| 611 | 602 | irqtp->task = curtp->task; |
| 612 | 603 | irqtp->flags = 0; |
| 613 | − current->thread.ksp_limit = (unsigned long)irqtp + | |
| 614 | − _ALIGN_UP(sizeof(struct thread_info), 16); | |
| 615 | 604 | call_do_softirq(irqtp); |
| 616 | − current->thread.ksp_limit = saved_sp_limit; | |
| 617 | 605 | irqtp->task = NULL; |
| 618 | 606 | |
| 619 | 607 | /* Set any flag that may have been set on the |
| @@ -36,26 +36,41 @@ · 35 unmodified lines | ||
| 36 | 36 | |
| 37 | 37 | .text |
| 38 | 38 | |
| 39 | +/* | |
| 40 | + * We store the saved ksp_limit in the unused part | |
| 41 | + * of the STACK_FRAME_OVERHEAD | |
| 42 | + */ | |
| 39 | 43 | _GLOBAL(call_do_softirq) |
| 40 | 44 | mflr r0 |
| 41 | 45 | stw r0,4(r1) |
| 46 | + lwz r10,THREAD+KSP_LIMIT(r2) | |
| 47 | + addi r11,r3,THREAD_INFO_GAP | |
| 42 | 48 | stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r3) |
| 43 | 49 | mr r1,r3 |
| 50 | + stw r10,8(r1) | |
| 51 | + stw r11,THREAD+KSP_LIMIT(r2) | |
| 44 | 52 | bl __do_softirq |
| 53 | + lwz r10,8(r1) | |
| 45 | 54 | lwz r1,0(r1) |
| 46 | 55 | lwz r0,4(r1) |
| 56 | + stw r10,THREAD+KSP_LIMIT(r2) | |
| 47 | 57 | mtlr r0 |
| 48 | 58 | blr |
| 49 | 59 | |
| 50 | −_GLOBAL(call_handle_irq) | |
| 60 | +_GLOBAL(call_do_irq) | |
| 51 | 61 | mflr r0 |
| 52 | 62 | stw r0,4(r1) |
| 53 | − mtctr r6 | |
| 54 | − stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r5) | |
| 55 | − mr r1,r5 | |
| 56 | − bctrl | |
| 63 | + lwz r10,THREAD+KSP_LIMIT(r2) | |
| 64 | + addi r11,r3,THREAD_INFO_GAP | |
| 65 | + stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r4) | |
| 66 | + mr r1,r4 | |
| 67 | + stw r10,8(r1) | |
| 68 | + stw r11,THREAD+KSP_LIMIT(r2) | |
| 69 | + bl __do_irq | |
| 70 | + lwz r10,8(r1) | |
| 57 | 71 | lwz r1,0(r1) |
| 58 | 72 | lwz r0,4(r1) |
| 73 | + stw r10,THREAD+KSP_LIMIT(r2) | |
| 59 | 74 | mtlr r0 |
| 60 | 75 | blr |
| 61 | 76 | |
| @@ -40,14 +40,12 @@ _GLOBAL(call_do_softirq) · 39 unmodified lines | ||
| 40 | 40 | mtlr r0 |
| 41 | 41 | blr |
| 42 | 42 | |
| 43 | −_GLOBAL(call_handle_irq) | |
| 44 | − ld r8,0(r6) | |
| 43 | +_GLOBAL(call_do_irq) | |
| 45 | 44 | mflr r0 |
| 46 | 45 | std r0,16(r1) |
| 47 | − mtctr r8 | |
| 48 | − stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r5) | |
| 49 | − mr r1,r5 | |
| 50 | − bctrl | |
| 46 | + stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r4) | |
| 47 | + mr r1,r4 | |
| 48 | + bl .__do_irq | |
| 51 | 49 | ld r1,0(r1) |
| 52 | 50 | ld r0,16(r1) |
| 53 | 51 | mtlr r0 |
| @@ -1000,9 +1000,10 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, · 999 unmodified lines | ||
| 1000 | 1000 | kregs = (struct pt_regs *) sp; |
| 1001 | 1001 | sp -= STACK_FRAME_OVERHEAD; |
| 1002 | 1002 | p->thread.ksp = sp; |
| 1003 | +#ifdef CONFIG_PPC32 | |
| 1003 | 1004 | p->thread.ksp_limit = (unsigned long)task_stack_page(p) + |
| 1004 | 1005 | _ALIGN_UP(sizeof(struct thread_info), 16); |
| 1005 | − | |
| 1006 | +#endif | |
| 1006 | 1007 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
| 1007 | 1008 | p->thread.ptrace_bps[0] = NULL; |
| 1008 | 1009 | #endif |
| @@ -196,6 +196,8 @@ static int __initdata mem_reserve_cnt; · 195 unmodified lines | ||
| 196 | 196 | |
| 197 | 197 | static cell_t __initdata regbuf[1024]; |
| 198 | 198 | |
| 199 | +static bool rtas_has_query_cpu_stopped; | |
| 200 | + | |
| 199 | 201 | |
| 200 | 202 | /* |
| 201 | 203 | * Error results ... some OF calls will return "-1" on error, some |
| @@ -1574,6 +1576,11 @@ static void __init prom_instantiate_rtas(void) · 1372 unmodified lines | ||
| 1574 | 1576 | prom_setprop(rtas_node, "/rtas", "linux,rtas-entry", |
| 1575 | 1577 | &val, sizeof(val)); |
| 1576 | 1578 | |
| 1579 | + /* Check if it supports "query-cpu-stopped-state" */ | |
| 1580 | + if (prom_getprop(rtas_node, "query-cpu-stopped-state", | |
| 1581 | + &val, sizeof(val)) != PROM_ERROR) | |
| 1582 | + rtas_has_query_cpu_stopped = true; | |
| 1583 | + | |
| 1577 | 1584 | #if defined(CONFIG_PPC_POWERNV) && defined(__BIG_ENDIAN__) |
| 1578 | 1585 | /* PowerVN takeover hack */ |
| 1579 | 1586 | prom_rtas_data = base; |
| @@ -1815,6 +1822,18 @@ static void __init prom_hold_cpus(void) · 235 unmodified lines | ||
| 1815 | 1822 | = (void *) LOW_ADDR(__secondary_hold_acknowledge); |
| 1816 | 1823 | unsigned long secondary_hold = LOW_ADDR(__secondary_hold); |
| 1817 | 1824 | |
| 1825 | + /* | |
| 1826 | + * On pseries, if RTAS supports "query-cpu-stopped-state", | |
| 1827 | + * we skip this stage, the CPUs will be started by the | |
| 1828 | + * kernel using RTAS. | |
| 1829 | + */ | |
| 1830 | + if ((of_platform == PLATFORM_PSERIES || | |
| 1831 | + of_platform == PLATFORM_PSERIES_LPAR) && | |
| 1832 | + rtas_has_query_cpu_stopped) { | |
| 1833 | + prom_printf("prom_hold_cpus: skipped\n"); | |
| 1834 | + return; | |
| 1835 | + } | |
| 1836 | + | |
| 1818 | 1837 | prom_debug("prom_hold_cpus: start...\n"); |
| 1819 | 1838 | prom_debug(" 1) spinloop = 0x%x\n", (unsigned long)spinloop); |
| 1820 | 1839 | prom_debug(" 1) *spinloop = 0x%x\n", *spinloop); |
| @@ -3011,6 +3030,8 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4, · 1190 unmodified lines | ||
| 3011 | 3030 | * On non-powermacs, put all CPUs in spin-loops. |
| 3012 | 3031 | * |
| 3013 | 3032 | * PowerMacs use a different mechanism to spin CPUs |
| 3033 | + * | |
| 3034 | + * (This must be done after instanciating RTAS) | |
| 3014 | 3035 | */ |
| 3015 | 3036 | if (of_platform != PLATFORM_POWERMAC && |
| 3016 | 3037 | of_platform != PLATFORM_OPAL) |
| @@ -17,6 +17,7 @@ · 16 unmodified lines | ||
| 17 | 17 | #include <asm/machdep.h> |
| 18 | 18 | #include <asm/smp.h> |
| 19 | 19 | #include <asm/pmc.h> |
| 20 | +#include <asm/firmware.h> | |
| 20 | 21 | |
| 21 | 22 | #include "cacheinfo.h" |
| 22 | 23 | |
| @@ -179,15 +180,25 @@ SYSFS_PMCSETUP(spurr, SPRN_SPURR); · 156 unmodified lines | ||
| 179 | 180 | SYSFS_PMCSETUP(dscr, SPRN_DSCR); |
| 180 | 181 | SYSFS_PMCSETUP(pir, SPRN_PIR); |
| 181 | 182 | |
| 183 | +/* | |
| 184 | + Lets only enable read for phyp resources and | |
| 185 | + enable write when needed with a separate function. | |
| 186 | + Lets be conservative and default to pseries. | |
| 187 | +*/ | |
| 182 | 188 | static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra); |
| 183 | 189 | static DEVICE_ATTR(spurr, 0400, show_spurr, NULL); |
| 184 | 190 | static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr); |
| 185 | −static DEVICE_ATTR(purr, 0600, show_purr, store_purr); | |
| 191 | +static DEVICE_ATTR(purr, 0400, show_purr, store_purr); | |
| 186 | 192 | static DEVICE_ATTR(pir, 0400, show_pir, NULL); |
| 187 | 193 | |
| 188 | 194 | unsigned long dscr_default = 0; |
| 189 | 195 | EXPORT_SYMBOL(dscr_default); |
| 190 | 196 | |
| 197 | +static void add_write_permission_dev_attr(struct device_attribute *attr) | |
| 198 | +{ | |
| 199 | + attr->attr.mode |= 0200; | |
| 200 | +} | |
| 201 | + | |
| 191 | 202 | static ssize_t show_dscr_default(struct device *dev, |
| 192 | 203 | struct device_attribute *attr, char *buf) |
| 193 | 204 | { |
| @@ -394,8 +405,11 @@ static void register_cpu_online(unsigned int cpu) · 200 unmodified lines | ||
| 394 | 405 | if (cpu_has_feature(CPU_FTR_MMCRA)) |
| 395 | 406 | device_create_file(s, &dev_attr_mmcra); |
| 396 | 407 | |
| 397 | − if (cpu_has_feature(CPU_FTR_PURR)) | |
| 408 | + if (cpu_has_feature(CPU_FTR_PURR)) { | |
| 409 | + if (!firmware_has_feature(FW_FEATURE_LPAR)) | |
| 410 | + add_write_permission_dev_attr(&dev_attr_purr); | |
| 398 | 411 | device_create_file(s, &dev_attr_purr); |
| 412 | + } | |
| 399 | 413 | |
| 400 | 414 | if (cpu_has_feature(CPU_FTR_SPURR)) |
| 401 | 415 | device_create_file(s, &dev_attr_spurr); |
| @@ -79,6 +79,11 @@ _GLOBAL(tm_abort) · 78 unmodified lines | ||
| 79 | 79 | TABORT(R3) |
| 80 | 80 | blr |
| 81 | 81 | |
| 82 | + .section ".toc","aw" | |
| 83 | +DSCR_DEFAULT: | |
| 84 | + .tc dscr_default[TC],dscr_default | |
| 85 | + | |
| 86 | + .section ".text" | |
| 82 | 87 | |
| 83 | 88 | /* void tm_reclaim(struct thread_struct *thread, |
| 84 | 89 | * unsigned long orig_msr, |
| @@ -123,6 +128,7 @@ _GLOBAL(tm_reclaim) · 38 unmodified lines | ||
| 123 | 128 | mr r15, r14 |
| 124 | 129 | ori r15, r15, MSR_FP |
| 125 | 130 | li r16, MSR_RI |
| 131 | + ori r16, r16, MSR_EE /* IRQs hard off */ | |
| 126 | 132 | andc r15, r15, r16 |
| 127 | 133 | oris r15, r15, MSR_VEC@h |
| 128 | 134 | #ifdef CONFIG_VSX |
| @@ -187,11 +193,18 @@ dont_backup_fp: · 58 unmodified lines | ||
| 187 | 193 | std r1, PACATMSCRATCH(r13) |
| 188 | 194 | ld r1, PACAR1(r13) |
| 189 | 195 | |
| 196 | + /* Store the PPR in r11 and reset to decent value */ | |
| 197 | + std r11, GPR11(r1) /* Temporary stash */ | |
| 198 | + mfspr r11, SPRN_PPR | |
| 199 | + HMT_MEDIUM | |
| 200 | + | |
| 190 | 201 | /* Now get some more GPRS free */ |
| 191 | 202 | std r7, GPR7(r1) /* Temporary stash */ |
| 192 | 203 | std r12, GPR12(r1) /* '' '' '' */ |
| 193 | 204 | ld r12, STACK_PARAM(0)(r1) /* Param 0, thread_struct * */ |
| 194 | 205 | |
| 206 | + std r11, THREAD_TM_PPR(r12) /* Store PPR and free r11 */ | |
| 207 | + | |
| 195 | 208 | addi r7, r12, PT_CKPT_REGS /* Thread's ckpt_regs */ |
| 196 | 209 | |
| 197 | 210 | /* Make r7 look like an exception frame so that we |
| @@ -203,15 +216,19 @@ dont_backup_fp: · 5 unmodified lines | ||
| 203 | 216 | SAVE_GPR(0, r7) /* user r0 */ |
| 204 | 217 | SAVE_GPR(2, r7) /* user r2 */ |
| 205 | 218 | SAVE_4GPRS(3, r7) /* user r3-r6 */ |
| 206 | − SAVE_4GPRS(8, r7) /* user r8-r11 */ | |
| 219 | + SAVE_GPR(8, r7) /* user r8 */ | |
| 220 | + SAVE_GPR(9, r7) /* user r9 */ | |
| 221 | + SAVE_GPR(10, r7) /* user r10 */ | |
| 207 | 222 | ld r3, PACATMSCRATCH(r13) /* user r1 */ |
| 208 | 223 | ld r4, GPR7(r1) /* user r7 */ |
| 209 | − ld r5, GPR12(r1) /* user r12 */ | |
| 210 | − GET_SCRATCH0(6) /* user r13 */ | |
| 224 | + ld r5, GPR11(r1) /* user r11 */ | |
| 225 | + ld r6, GPR12(r1) /* user r12 */ | |
| 226 | + GET_SCRATCH0(8) /* user r13 */ | |
| 211 | 227 | std r3, GPR1(r7) |
| 212 | 228 | std r4, GPR7(r7) |
| 213 | − std r5, GPR12(r7) | |
| 214 | − std r6, GPR13(r7) | |
| 229 | + std r5, GPR11(r7) | |
| 230 | + std r6, GPR12(r7) | |
| 231 | + std r8, GPR13(r7) | |
| 215 | 232 | |
| 216 | 233 | SAVE_NVGPRS(r7) /* user r14-r31 */ |
| 217 | 234 | |
| @@ -234,14 +251,12 @@ dont_backup_fp: · 16 unmodified lines | ||
| 234 | 251 | std r6, _XER(r7) |
| 235 | 252 | |
| 236 | 253 | |
| 237 | − /* ******************** TAR, PPR, DSCR ********** */ | |
| 254 | + /* ******************** TAR, DSCR ********** */ | |
| 238 | 255 | mfspr r3, SPRN_TAR |
| 239 | − mfspr r4, SPRN_PPR | |
| 240 | − mfspr r5, SPRN_DSCR | |
| 256 | + mfspr r4, SPRN_DSCR | |
| 241 | 257 | |
| 242 | 258 | std r3, THREAD_TM_TAR(r12) |
| 243 | − std r4, THREAD_TM_PPR(r12) | |
| 244 | − std r5, THREAD_TM_DSCR(r12) | |
| 259 | + std r4, THREAD_TM_DSCR(r12) | |
| 245 | 260 | |
| 246 | 261 | /* MSR and flags: We don't change CRs, and we don't need to alter |
| 247 | 262 | * MSR. |
| @@ -258,7 +273,7 @@ dont_backup_fp: · 10 unmodified lines | ||
| 258 | 273 | std r3, THREAD_TM_TFHAR(r12) |
| 259 | 274 | std r4, THREAD_TM_TFIAR(r12) |
| 260 | 275 | |
| 261 | − /* AMR and PPR are checkpointed too, but are unsupported by Linux. */ | |
| 276 | + /* AMR is checkpointed too, but is unsupported by Linux. */ | |
| 262 | 277 | |
| 263 | 278 | /* Restore original MSR/IRQ state & clear TM mode */ |
| 264 | 279 | ld r14, TM_FRAME_L0(r1) /* Orig MSR */ |
| @@ -274,6 +289,12 @@ dont_backup_fp: · 9 unmodified lines | ||
| 274 | 289 | mtcr r4 |
| 275 | 290 | mtlr r0 |
| 276 | 291 | ld r2, 40(r1) |
| 292 | + | |
| 293 | + /* Load system default DSCR */ | |
| 294 | + ld r4, DSCR_DEFAULT@toc(r2) | |
| 295 | + ld r0, 0(r4) | |
| 296 | + mtspr SPRN_DSCR, r0 | |
| 297 | + | |
| 277 | 298 | blr |
| 278 | 299 | |
| 279 | 300 | |
| @@ -358,25 +379,24 @@ dont_restore_fp: · 78 unmodified lines | ||
| 358 | 379 | |
| 359 | 380 | restore_gprs: |
| 360 | 381 | |
| 361 | − /* ******************** TAR, PPR, DSCR ********** */ | |
| 362 | − ld r4, THREAD_TM_TAR(r3) | |
| 363 | − ld r5, THREAD_TM_PPR(r3) | |
| 364 | − ld r6, THREAD_TM_DSCR(r3) | |
| 382 | + /* ******************** CR,LR,CCR,MSR ********** */ | |
| 383 | + ld r4, _CTR(r7) | |
| 384 | + ld r5, _LINK(r7) | |
| 385 | + ld r6, _CCR(r7) | |
| 386 | + ld r8, _XER(r7) | |
| 365 | 387 | |
| 366 | − mtspr SPRN_TAR, r4 | |
| 367 | − mtspr SPRN_PPR, r5 | |
| 368 | − mtspr SPRN_DSCR, r6 | |
| 388 | + mtctr r4 | |
| 389 | + mtlr r5 | |
| 390 | + mtcr r6 | |
| 391 | + mtxer r8 | |
| 369 | 392 | |
| 370 | − /* ******************** CR,LR,CCR,MSR ********** */ | |
| 371 | − ld r3, _CTR(r7) | |
| 372 | − ld r4, _LINK(r7) | |
| 373 | − ld r5, _CCR(r7) | |
| 374 | − ld r6, _XER(r7) | |
| 393 | + /* ******************** TAR ******************** */ | |
| 394 | + ld r4, THREAD_TM_TAR(r3) | |
| 395 | + mtspr SPRN_TAR, r4 | |
| 375 | 396 | |
| 376 | − mtctr r3 | |
| 377 | − mtlr r4 | |
| 378 | − mtcr r5 | |
| 379 | − mtxer r6 | |
| 397 | + /* Load up the PPR and DSCR in GPRs only at this stage */ | |
| 398 | + ld r5, THREAD_TM_DSCR(r3) | |
| 399 | + ld r6, THREAD_TM_PPR(r3) | |
| 380 | 400 | |
| 381 | 401 | /* Clear the MSR RI since we are about to change R1. EE is already off |
| 382 | 402 | */ |
| @@ -384,19 +404,26 @@ restore_gprs: · 1 unmodified line | ||
| 384 | 404 | mtmsrd r4, 1 |
| 385 | 405 | |
| 386 | 406 | REST_4GPRS(0, r7) /* GPR0-3 */ |
| 387 | − REST_GPR(4, r7) /* GPR4-6 */ | |
| 388 | − REST_GPR(5, r7) | |
| 389 | − REST_GPR(6, r7) | |
| 407 | + REST_GPR(4, r7) /* GPR4 */ | |
| 390 | 408 | REST_4GPRS(8, r7) /* GPR8-11 */ |
| 391 | 409 | REST_2GPRS(12, r7) /* GPR12-13 */ |
| 392 | 410 | |
| 393 | 411 | REST_NVGPRS(r7) /* GPR14-31 */ |
| 394 | 412 | |
| 395 | − ld r7, GPR7(r7) /* GPR7 */ | |
| 413 | + /* Load up PPR and DSCR here so we don't run with user values for long | |
| 414 | + */ | |
| 415 | + mtspr SPRN_DSCR, r5 | |
| 416 | + mtspr SPRN_PPR, r6 | |
| 417 | + | |
| 418 | + REST_GPR(5, r7) /* GPR5-7 */ | |
| 419 | + REST_GPR(6, r7) | |
| 420 | + ld r7, GPR7(r7) | |
| 396 | 421 | |
| 397 | 422 | /* Commit register state as checkpointed state: */ |
| 398 | 423 | TRECHKPT |
| 399 | 424 | |
| 425 | + HMT_MEDIUM | |
| 426 | + | |
| 400 | 427 | /* Our transactional state has now changed. |
| 401 | 428 | * |
| 402 | 429 | * Now just get out of here. Transactional (current) state will be |
| @@ -419,6 +446,12 @@ restore_gprs: · 16 unmodified lines | ||
| 419 | 446 | mtcr r4 |
| 420 | 447 | mtlr r0 |
| 421 | 448 | ld r2, 40(r1) |
| 449 | + | |
| 450 | + /* Load system default DSCR */ | |
| 451 | + ld r4, DSCR_DEFAULT@toc(r2) | |
| 452 | + ld r0, 0(r4) | |
| 453 | + mtspr SPRN_DSCR, r0 | |
| 454 | + | |
| 422 | 455 | blr |
| 423 | 456 | |
| 424 | 457 | /* ****************************************************************** */ |
| @@ -1530,11 +1530,15 @@ static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, · 1529 unmodified lines | ||
| 1530 | 1530 | const char *cp; |
| 1531 | 1531 | |
| 1532 | 1532 | dn = dev->of_node; |
| 1533 | − if (!dn) | |
| 1534 | − return -ENODEV; | |
| 1533 | + if (!dn) { | |
| 1534 | + strcat(buf, "\n"); | |
| 1535 | + return strlen(buf); | |
| 1536 | + } | |
| 1535 | 1537 | cp = of_get_property(dn, "compatible", NULL); |
| 1536 | − if (!cp) | |
| 1537 | − return -ENODEV; | |
| 1538 | + if (!cp) { | |
| 1539 | + strcat(buf, "\n"); | |
| 1540 | + return strlen(buf); | |
| 1541 | + } | |
| 1538 | 1542 | |
| 1539 | 1543 | return sprintf(buf, "vio:T%sS%s\n", vio_dev->type, cp); |
| 1540 | 1544 | } |
| @@ -226,19 +226,35 @@ _GLOBAL(csum_partial) · 225 unmodified lines | ||
| 226 | 226 | blr |
| 227 | 227 | |
| 228 | 228 | |
| 229 | − .macro source | |
| 229 | + .macro srcnr | |
| 230 | 230 | 100: |
| 231 | 231 | .section __ex_table,"a" |
| 232 | 232 | .align 3 |
| 233 | − .llong 100b,.Lsrc_error | |
| 233 | + .llong 100b,.Lsrc_error_nr | |
| 234 | 234 | .previous |
| 235 | 235 | .endm |
| 236 | 236 | |
| 237 | − .macro dest | |
| 237 | + .macro source | |
| 238 | +150: | |
| 239 | + .section __ex_table,"a" | |
| 240 | + .align 3 | |
| 241 | + .llong 150b,.Lsrc_error | |
| 242 | + .previous | |
| 243 | + .endm | |
| 244 | + | |
| 245 | + .macro dstnr | |
| 238 | 246 | 200: |
| 239 | 247 | .section __ex_table,"a" |
| 240 | 248 | .align 3 |
| 241 | − .llong 200b,.Ldest_error | |
| 249 | + .llong 200b,.Ldest_error_nr | |
| 250 | + .previous | |
| 251 | + .endm | |
| 252 | + | |
| 253 | + .macro dest | |
| 254 | +250: | |
| 255 | + .section __ex_table,"a" | |
| 256 | + .align 3 | |
| 257 | + .llong 250b,.Ldest_error | |
| 242 | 258 | .previous |
| 243 | 259 | .endm |
| 244 | 260 | |
| @@ -269,16 +285,16 @@ _GLOBAL(csum_partial_copy_generic) · 24 unmodified lines | ||
| 269 | 285 | rldicl. r6,r3,64-1,64-2 /* r6 = (r3 & 0x3) >> 1 */ |
| 270 | 286 | beq .Lcopy_aligned |
| 271 | 287 | |
| 272 | − li r7,4 | |
| 273 | − sub r6,r7,r6 | |
| 288 | + li r9,4 | |
| 289 | + sub r6,r9,r6 | |
| 274 | 290 | mtctr r6 |
| 275 | 291 | |
| 276 | 292 | 1: |
| 277 | −source; lhz r6,0(r3) /* align to doubleword */ | |
| 293 | +srcnr; lhz r6,0(r3) /* align to doubleword */ | |
| 278 | 294 | subi r5,r5,2 |
| 279 | 295 | addi r3,r3,2 |
| 280 | 296 | adde r0,r0,r6 |
| 281 | −dest; sth r6,0(r4) | |
| 297 | +dstnr; sth r6,0(r4) | |
| 282 | 298 | addi r4,r4,2 |
| 283 | 299 | bdnz 1b |
| 284 | 300 | |
| @@ -392,10 +408,10 @@ dest; std r16,56(r4) · 107 unmodified lines | ||
| 392 | 408 | |
| 393 | 409 | mtctr r6 |
| 394 | 410 | 3: |
| 395 | −source; ld r6,0(r3) | |
| 411 | +srcnr; ld r6,0(r3) | |
| 396 | 412 | addi r3,r3,8 |
| 397 | 413 | adde r0,r0,r6 |
| 398 | −dest; std r6,0(r4) | |
| 414 | +dstnr; std r6,0(r4) | |
| 399 | 415 | addi r4,r4,8 |
| 400 | 416 | bdnz 3b |
| 401 | 417 | |
| @@ -405,10 +421,10 @@ dest; std r6,0(r4) · 3 unmodified lines | ||
| 405 | 421 | srdi. r6,r5,2 |
| 406 | 422 | beq .Lcopy_tail_halfword |
| 407 | 423 | |
| 408 | −source; lwz r6,0(r3) | |
| 424 | +srcnr; lwz r6,0(r3) | |
| 409 | 425 | addi r3,r3,4 |
| 410 | 426 | adde r0,r0,r6 |
| 411 | −dest; stw r6,0(r4) | |
| 427 | +dstnr; stw r6,0(r4) | |
| 412 | 428 | addi r4,r4,4 |
| 413 | 429 | subi r5,r5,4 |
| 414 | 430 | |
| @@ -416,10 +432,10 @@ dest; stw r6,0(r4) · 1 unmodified line | ||
| 416 | 432 | srdi. r6,r5,1 |
| 417 | 433 | beq .Lcopy_tail_byte |
| 418 | 434 | |
| 419 | −source; lhz r6,0(r3) | |
| 435 | +srcnr; lhz r6,0(r3) | |
| 420 | 436 | addi r3,r3,2 |
| 421 | 437 | adde r0,r0,r6 |
| 422 | −dest; sth r6,0(r4) | |
| 438 | +dstnr; sth r6,0(r4) | |
| 423 | 439 | addi r4,r4,2 |
| 424 | 440 | subi r5,r5,2 |
| 425 | 441 | |
| @@ -427,10 +443,10 @@ dest; sth r6,0(r4) · 1 unmodified line | ||
| 427 | 443 | andi. r6,r5,1 |
| 428 | 444 | beq .Lcopy_finish |
| 429 | 445 | |
| 430 | −source; lbz r6,0(r3) | |
| 446 | +srcnr; lbz r6,0(r3) | |
| 431 | 447 | sldi r9,r6,8 /* Pad the byte out to 16 bits */ |
| 432 | 448 | adde r0,r0,r9 |
| 433 | −dest; stb r6,0(r4) | |
| 449 | +dstnr; stb r6,0(r4) | |
| 434 | 450 | |
| 435 | 451 | .Lcopy_finish: |
| 436 | 452 | addze r0,r0 /* add in final carry */ |
| @@ -440,6 +456,11 @@ dest; stb r6,0(r4) · 3 unmodified lines | ||
| 440 | 456 | blr |
| 441 | 457 | |
| 442 | 458 | .Lsrc_error: |
| 459 | + ld r14,STK_REG(R14)(r1) | |
| 460 | + ld r15,STK_REG(R15)(r1) | |
| 461 | + ld r16,STK_REG(R16)(r1) | |
| 462 | + addi r1,r1,STACKFRAMESIZE | |
| 463 | +.Lsrc_error_nr: | |
| 443 | 464 | cmpdi 0,r7,0 |
| 444 | 465 | beqlr |
| 445 | 466 | li r6,-EFAULT |
| @@ -447,6 +468,11 @@ dest; stb r6,0(r4) · 1 unmodified line | ||
| 447 | 468 | blr |
| 448 | 469 | |
| 449 | 470 | .Ldest_error: |
| 471 | + ld r14,STK_REG(R14)(r1) | |
| 472 | + ld r15,STK_REG(R15)(r1) | |
| 473 | + ld r16,STK_REG(R16)(r1) | |
| 474 | + addi r1,r1,STACKFRAMESIZE | |
| 475 | +.Ldest_error_nr: | |
| 450 | 476 | cmpdi 0,r8,0 |
| 451 | 477 | beqlr |
| 452 | 478 | li r6,-EFAULT |
| @@ -1505,6 +1505,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr) · 1504 unmodified lines | ||
| 1505 | 1505 | */ |
| 1506 | 1506 | if ((ra == 1) && !(regs->msr & MSR_PR) \ |
| 1507 | 1507 | && (val3 >= (regs->gpr[1] - STACK_INT_FRAME_SIZE))) { |
| 1508 | +#ifdef CONFIG_PPC32 | |
| 1508 | 1509 | /* |
| 1509 | 1510 | * Check if we will touch kernel sack overflow |
| 1510 | 1511 | */ |
| @@ -1513,7 +1514,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr) · 2 unmodified lines | ||
| 1513 | 1514 | err = -EINVAL; |
| 1514 | 1515 | break; |
| 1515 | 1516 | } |
| 1516 | − | |
| 1517 | +#endif /* CONFIG_PPC32 */ | |
| 1517 | 1518 | /* |
| 1518 | 1519 | * Check if we already set since that means we'll |
| 1519 | 1520 | * lose the previous value. |
| @@ -300,5 +300,9 @@ void vmemmap_free(unsigned long start, unsigned long end) · 299 unmodified lines | ||
| 300 | 300 | { |
| 301 | 301 | } |
| 302 | 302 | |
| 303 | +void register_page_bootmem_memmap(unsigned long section_nr, | |
| 304 | + struct page *start_page, unsigned long size) | |
| 305 | +{ | |
| 306 | +} | |
| 303 | 307 | #endif /* CONFIG_SPARSEMEM_VMEMMAP */ |
| 304 | 308 | |
| @@ -297,12 +297,21 @@ void __init paging_init(void) · 296 unmodified lines | ||
| 297 | 297 | } |
| 298 | 298 | #endif /* ! CONFIG_NEED_MULTIPLE_NODES */ |
| 299 | 299 | |
| 300 | +static void __init register_page_bootmem_info(void) | |
| 301 | +{ | |
| 302 | + int i; | |
| 303 | + | |
| 304 | + for_each_online_node(i) | |
| 305 | + register_page_bootmem_info_node(NODE_DATA(i)); | |
| 306 | +} | |
| 307 | + | |
| 300 | 308 | void __init mem_init(void) |
| 301 | 309 | { |
| 302 | 310 | #ifdef CONFIG_SWIOTLB |
| 303 | 311 | swiotlb_init(0); |
| 304 | 312 | #endif |
| 305 | 313 | |
| 314 | + register_page_bootmem_info(); | |
| 306 | 315 | high_memory = (void *) __va(max_low_pfn * PAGE_SIZE); |
| 307 | 316 | set_max_mapnr(max_pfn); |
| 308 | 317 | free_all_bootmem(); |
| @@ -199,6 +199,7 @@ · 198 unmodified lines | ||
| 199 | 199 | #define MMCR1_UNIT_SHIFT(pmc) (60 - (4 * ((pmc) - 1))) |
| 200 | 200 | #define MMCR1_COMBINE_SHIFT(pmc) (35 - ((pmc) - 1)) |
| 201 | 201 | #define MMCR1_PMCSEL_SHIFT(pmc) (24 - (((pmc) - 1)) * 8) |
| 202 | +#define MMCR1_FAB_SHIFT 36 | |
| 202 | 203 | #define MMCR1_DC_QUAL_SHIFT 47 |
| 203 | 204 | #define MMCR1_IC_QUAL_SHIFT 46 |
| 204 | 205 | |
| @@ -388,8 +389,8 @@ static int power8_compute_mmcr(u64 event[], int n_ev, · 183 unmodified lines | ||
| 388 | 389 | * the threshold bits are used for the match value. |
| 389 | 390 | */ |
| 390 | 391 | if (event_is_fab_match(event[i])) { |
| 391 | − mmcr1 |= (event[i] >> EVENT_THR_CTL_SHIFT) & | |
| 392 | − EVENT_THR_CTL_MASK; | |
| 392 | + mmcr1 |= ((event[i] >> EVENT_THR_CTL_SHIFT) & | |
| 393 | + EVENT_THR_CTL_MASK) << MMCR1_FAB_SHIFT; | |
| 393 | 394 | } else { |
| 394 | 395 | val = (event[i] >> EVENT_THR_CTL_SHIFT) & EVENT_THR_CTL_MASK; |
| 395 | 396 | mmcra |= val << MMCRA_THR_CTL_SHIFT; |
| @@ -233,18 +233,24 @@ static void __init smp_init_pseries(void) · 232 unmodified lines | ||
| 233 | 233 | |
| 234 | 234 | alloc_bootmem_cpumask_var(&of_spin_mask); |
| 235 | 235 | |
| 236 | − /* Mark threads which are still spinning in hold loops. */ | |
| 237 | − if (cpu_has_feature(CPU_FTR_SMT)) { | |
| 238 | − for_each_present_cpu(i) { | |
| 239 | − if (cpu_thread_in_core(i) == 0) | |
| 240 | − cpumask_set_cpu(i, of_spin_mask); | |
| 241 | − } | |
| 242 | − } else { | |
| 243 | − cpumask_copy(of_spin_mask, cpu_present_mask); | |
| 236 | + /* | |
| 237 | + * Mark threads which are still spinning in hold loops | |
| 238 | + * | |
| 239 | + * We know prom_init will not have started them if RTAS supports | |
| 240 | + * query-cpu-stopped-state. | |
| 241 | + */ | |
| 242 | + if (rtas_token("query-cpu-stopped-state") == RTAS_UNKNOWN_SERVICE) { | |
| 243 | + if (cpu_has_feature(CPU_FTR_SMT)) { | |
| 244 | + for_each_present_cpu(i) { | |
| 245 | + if (cpu_thread_in_core(i) == 0) | |
| 246 | + cpumask_set_cpu(i, of_spin_mask); | |
| 247 | + } | |
| 248 | + } else | |
| 249 | + cpumask_copy(of_spin_mask, cpu_present_mask); | |
| 250 | + | |
| 251 | + cpumask_clear_cpu(boot_cpuid, of_spin_mask); | |
| 244 | 252 | } |
| 245 | 253 | |
| 246 | − cpumask_clear_cpu(boot_cpuid, of_spin_mask); | |
| 247 | − | |
| 248 | 254 | /* Non-lpar has additional take/give timebase */ |
| 249 | 255 | if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) { |
| 250 | 256 | smp_ops->give_timebase = rtas_give_timebase; |
| @@ -93,6 +93,7 @@ config S390 · 92 unmodified lines | ||
| 93 | 93 | select ARCH_INLINE_WRITE_UNLOCK_IRQ |
| 94 | 94 | select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE |
| 95 | 95 | select ARCH_SAVE_PAGE_KEYS if HIBERNATION |
| 96 | + select ARCH_USE_CMPXCHG_LOCKREF | |
| 96 | 97 | select ARCH_WANT_IPC_PARSE_VERSION |
| 97 | 98 | select BUILDTIME_EXTABLE_SORT |
| 98 | 99 | select CLONE_BACKWARDS2 |
| @@ -102,7 +103,6 @@ config S390 · 3 unmodified lines | ||
| 102 | 103 | select GENERIC_TIME_VSYSCALL_OLD |
| 103 | 104 | select HAVE_ALIGNED_STRUCT_PAGE if SLUB |
| 104 | 105 | select HAVE_ARCH_JUMP_LABEL if !MARCH_G5 |
| 105 | − select HAVE_ARCH_MUTEX_CPU_RELAX | |
| 106 | 106 | select HAVE_ARCH_SECCOMP_FILTER |
| 107 | 107 | select HAVE_ARCH_TRACEHOOK |
| 108 | 108 | select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT |
| @@ -7,5 +7,3 @@ · 6 unmodified lines | ||
| 7 | 7 | */ |
| 8 | 8 | |
| 9 | 9 | #include <asm-generic/mutex-dec.h> |
| 10 | − | |
| 11 | −#define arch_mutex_cpu_relax() barrier() | |
| @@ -198,6 +198,8 @@ static inline void cpu_relax(void) · 197 unmodified lines | ||
| 198 | 198 | barrier(); |
| 199 | 199 | } |
| 200 | 200 | |
| 201 | +#define arch_mutex_cpu_relax() barrier() | |
| 202 | + | |
| 201 | 203 | static inline void psw_set_key(unsigned int key) |
| 202 | 204 | { |
| 203 | 205 | asm volatile("spka 0(%0)" : : "d" (key)); |
| @@ -44,6 +44,11 @@ extern void arch_spin_lock_wait_flags(arch_spinlock_t *, unsigned long flags); · 43 unmodified lines | ||
| 44 | 44 | extern int arch_spin_trylock_retry(arch_spinlock_t *); |
| 45 | 45 | extern void arch_spin_relax(arch_spinlock_t *lock); |
| 46 | 46 | |
| 47 | +static inline int arch_spin_value_unlocked(arch_spinlock_t lock) | |
| 48 | +{ | |
| 49 | + return lock.owner_cpu == 0; | |
| 50 | +} | |
| 51 | + | |
| 47 | 52 | static inline void arch_spin_lock(arch_spinlock_t *lp) |
| 48 | 53 | { |
| 49 | 54 | int old; |
| @@ -2,6 +2,7 @@ menu "Machine selection" · 1 unmodified line | ||
| 2 | 2 | |
| 3 | 3 | config SCORE |
| 4 | 4 | def_bool y |
| 5 | + select HAVE_GENERIC_HARDIRQS | |
| 5 | 6 | select GENERIC_IRQ_SHOW |
| 6 | 7 | select GENERIC_IOMAP |
| 7 | 8 | select GENERIC_ATOMIC64 |
| @@ -110,3 +111,6 @@ source "security/Kconfig" · 102 unmodified lines | ||
| 110 | 111 | source "crypto/Kconfig" |
| 111 | 112 | |
| 112 | 113 | source "lib/Kconfig" |
| 114 | + | |
| 115 | +config NO_IOMEM | |
| 116 | + def_bool y | |
| @@ -20,8 +20,8 @@ cflags-y += -G0 -pipe -mel -mnhwloop -D__SCOREEL__ \ · 19 unmodified lines | ||
| 20 | 20 | # |
| 21 | 21 | KBUILD_AFLAGS += $(cflags-y) |
| 22 | 22 | KBUILD_CFLAGS += $(cflags-y) |
| 23 | −KBUILD_AFLAGS_MODULE += -mlong-calls | |
| 24 | −KBUILD_CFLAGS_MODULE += -mlong-calls | |
| 23 | +KBUILD_AFLAGS_MODULE += | |
| 24 | +KBUILD_CFLAGS_MODULE += | |
| 25 | 25 | LDFLAGS += --oformat elf32-littlescore |
| 26 | 26 | LDFLAGS_vmlinux += -G0 -static -nostdlib |
| 27 | 27 | |
| @@ -184,48 +184,57 @@ static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, · 183 unmodified lines | ||
| 184 | 184 | __wsum sum) |
| 185 | 185 | { |
| 186 | 186 | __asm__ __volatile__( |
| 187 | − ".set\tnoreorder\t\t\t# csum_ipv6_magic\n\t" | |
| 188 | − ".set\tnoat\n\t" | |
| 189 | − "addu\t%0, %5\t\t\t# proto (long in network byte order)\n\t" | |
| 190 | − "sltu\t$1, %0, %5\n\t" | |
| 191 | − "addu\t%0, $1\n\t" | |
| 192 | − "addu\t%0, %6\t\t\t# csum\n\t" | |
| 193 | − "sltu\t$1, %0, %6\n\t" | |
| 194 | − "lw\t%1, 0(%2)\t\t\t# four words source address\n\t" | |
| 195 | − "addu\t%0, $1\n\t" | |
| 196 | − "addu\t%0, %1\n\t" | |
| 197 | − "sltu\t$1, %0, %1\n\t" | |
| 198 | − "lw\t%1, 4(%2)\n\t" | |
| 199 | − "addu\t%0, $1\n\t" | |
| 200 | − "addu\t%0, %1\n\t" | |
| 201 | − "sltu\t$1, %0, %1\n\t" | |
| 202 | − "lw\t%1, 8(%2)\n\t" | |
| 203 | − "addu\t%0, $1\n\t" | |
| 204 | − "addu\t%0, %1\n\t" | |
| 205 | − "sltu\t$1, %0, %1\n\t" | |
| 206 | − "lw\t%1, 12(%2)\n\t" | |
| 207 | − "addu\t%0, $1\n\t" | |
| 208 | − "addu\t%0, %1\n\t" | |
| 209 | − "sltu\t$1, %0, %1\n\t" | |
| 210 | − "lw\t%1, 0(%3)\n\t" | |
| 211 | − "addu\t%0, $1\n\t" | |
| 212 | − "addu\t%0, %1\n\t" | |
| 213 | − "sltu\t$1, %0, %1\n\t" | |
| 214 | − "lw\t%1, 4(%3)\n\t" | |
| 215 | − "addu\t%0, $1\n\t" | |
| 216 | − "addu\t%0, %1\n\t" | |
| 217 | − "sltu\t$1, %0, %1\n\t" | |
| 218 | − "lw\t%1, 8(%3)\n\t" | |
| 219 | − "addu\t%0, $1\n\t" | |
| 220 | − "addu\t%0, %1\n\t" | |
| 221 | − "sltu\t$1, %0, %1\n\t" | |
| 222 | − "lw\t%1, 12(%3)\n\t" | |
| 223 | − "addu\t%0, $1\n\t" | |
| 224 | − "addu\t%0, %1\n\t" | |
| 225 | − "sltu\t$1, %0, %1\n\t" | |
| 226 | − "addu\t%0, $1\t\t\t# Add final carry\n\t" | |
| 227 | − ".set\tnoat\n\t" | |
| 228 | − ".set\tnoreorder" | |
| 187 | + ".set\tvolatile\t\t\t# csum_ipv6_magic\n\t" | |
| 188 | + "add\t%0, %0, %5\t\t\t# proto (long in network byte order)\n\t" | |
| 189 | + "cmp.c\t%5, %0\n\t" | |
| 190 | + "bleu 1f\n\t" | |
| 191 | + "addi\t%0, 0x1\n\t" | |
| 192 | + "1:add\t%0, %0, %6\t\t\t# csum\n\t" | |
| 193 | + "cmp.c\t%6, %0\n\t" | |
| 194 | + "lw\t%1, [%2, 0]\t\t\t# four words source address\n\t" | |
| 195 | + "bleu 1f\n\t" | |
| 196 | + "addi\t%0, 0x1\n\t" | |
| 197 | + "1:add\t%0, %0, %1\n\t" | |
| 198 | + "cmp.c\t%1, %0\n\t" | |
| 199 | + "1:lw\t%1, [%2, 4]\n\t" | |
| 200 | + "bleu 1f\n\t" | |
| 201 | + "addi\t%0, 0x1\n\t" | |
| 202 | + "1:add\t%0, %0, %1\n\t" | |
| 203 | + "cmp.c\t%1, %0\n\t" | |
| 204 | + "lw\t%1, [%2,8]\n\t" | |
| 205 | + "bleu 1f\n\t" | |
| 206 | + "addi\t%0, 0x1\n\t" | |
| 207 | + "1:add\t%0, %0, %1\n\t" | |
| 208 | + "cmp.c\t%1, %0\n\t" | |
| 209 | + "lw\t%1, [%2, 12]\n\t" | |
| 210 | + "bleu 1f\n\t" | |
| 211 | + "addi\t%0, 0x1\n\t" | |
| 212 | + "1:add\t%0, %0,%1\n\t" | |
| 213 | + "cmp.c\t%1, %0\n\t" | |
| 214 | + "lw\t%1, [%3, 0]\n\t" | |
| 215 | + "bleu 1f\n\t" | |
| 216 | + "addi\t%0, 0x1\n\t" | |
| 217 | + "1:add\t%0, %0, %1\n\t" | |
| 218 | + "cmp.c\t%1, %0\n\t" | |
| 219 | + "lw\t%1, [%3, 4]\n\t" | |
| 220 | + "bleu 1f\n\t" | |
| 221 | + "addi\t%0, 0x1\n\t" | |
| 222 | + "1:add\t%0, %0, %1\n\t" | |
| 223 | + "cmp.c\t%1, %0\n\t" | |
| 224 | + "lw\t%1, [%3, 8]\n\t" | |
| 225 | + "bleu 1f\n\t" | |
| 226 | + "addi\t%0, 0x1\n\t" | |
| 227 | + "1:add\t%0, %0, %1\n\t" | |
| 228 | + "cmp.c\t%1, %0\n\t" | |
| 229 | + "lw\t%1, [%3, 12]\n\t" | |
| 230 | + "bleu 1f\n\t" | |
| 231 | + "addi\t%0, 0x1\n\t" | |
| 232 | + "1:add\t%0, %0, %1\n\t" | |
| 233 | + "cmp.c\t%1, %0\n\t" | |
| 234 | + "bleu 1f\n\t" | |
| 235 | + "addi\t%0, 0x1\n\t" | |
| 236 | + "1:\n\t" | |
| 237 | + ".set\toptimize" | |
| 229 | 238 | : "=r" (sum), "=r" (proto) |
| 230 | 239 | : "r" (saddr), "r" (daddr), |
| 231 | 240 | "0" (htonl(len)), "1" (htonl(proto)), "r" (sum)); |
| @@ -5,5 +5,4 @@ · 4 unmodified lines | ||
| 5 | 5 | |
| 6 | 6 | #define virt_to_bus virt_to_phys |
| 7 | 7 | #define bus_to_virt phys_to_virt |
| 8 | − | |
| 9 | 8 | #endif /* _ASM_SCORE_IO_H */ |
| @@ -2,7 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | #define _ASM_SCORE_PGALLOC_H |
| 3 | 3 | |
| 4 | 4 | #include <linux/mm.h> |
| 5 | − | |
| 5 | +#include <linux/highmem.h> | |
| 6 | 6 | static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, |
| 7 | 7 | pte_t *pte) |
| 8 | 8 | { |
| @@ -264,7 +264,7 @@ resume_kernel: · 263 unmodified lines | ||
| 264 | 264 | disable_irq |
| 265 | 265 | lw r8, [r28, TI_PRE_COUNT] |
| 266 | 266 | cmpz.c r8 |
| 267 | − bne r8, restore_all | |
| 267 | + bne restore_all | |
| 268 | 268 | need_resched: |
| 269 | 269 | lw r8, [r28, TI_FLAGS] |
| 270 | 270 | andri.c r9, r8, _TIF_NEED_RESCHED |
| @@ -415,7 +415,7 @@ ENTRY(handle_sys) · 144 unmodified lines | ||
| 415 | 415 | sw r9, [r0, PT_EPC] |
| 416 | 416 | |
| 417 | 417 | cmpi.c r27, __NR_syscalls # check syscall number |
| 418 | − bgeu illegal_syscall | |
| 418 | + bcs illegal_syscall | |
| 419 | 419 | |
| 420 | 420 | slli r8, r27, 2 # get syscall routine |
| 421 | 421 | la r11, sys_call_table |
| @@ -78,8 +78,8 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, · 77 unmodified lines | ||
| 78 | 78 | p->thread.reg0 = (unsigned long) childregs; |
| 79 | 79 | if (unlikely(p->flags & PF_KTHREAD)) { |
| 80 | 80 | memset(childregs, 0, sizeof(struct pt_regs)); |
| 81 | − p->thread->reg12 = usp; | |
| 82 | − p->thread->reg13 = arg; | |
| 81 | + p->thread.reg12 = usp; | |
| 82 | + p->thread.reg13 = arg; | |
| 83 | 83 | p->thread.reg3 = (unsigned long) ret_from_kernel_thread; |
| 84 | 84 | } else { |
| 85 | 85 | *childregs = *current_pt_regs(); |
| @@ -506,12 +506,17 @@ config SUN_OPENPROMFS · 505 unmodified lines | ||
| 506 | 506 | Only choose N if you know in advance that you will not need to modify |
| 507 | 507 | OpenPROM settings on the running system. |
| 508 | 508 | |
| 509 | −# Makefile helper | |
| 509 | +# Makefile helpers | |
| 510 | 510 | config SPARC64_PCI |
| 511 | 511 | bool |
| 512 | 512 | default y |
| 513 | 513 | depends on SPARC64 && PCI |
| 514 | 514 | |
| 515 | +config SPARC64_PCI_MSI | |
| 516 | + bool | |
| 517 | + default y | |
| 518 | + depends on SPARC64_PCI && PCI_MSI | |
| 519 | + | |
| 515 | 520 | endmenu |
| 516 | 521 | |
| 517 | 522 | menu "Executable file formats" |
| @@ -254,7 +254,7 @@ static int sun_fd_request_irq(void) · 253 unmodified lines | ||
| 254 | 254 | once = 1; |
| 255 | 255 | |
| 256 | 256 | error = request_irq(FLOPPY_IRQ, sparc_floppy_irq, |
| 257 | − IRQF_DISABLED, "floppy", NULL); | |
| 257 | + 0, "floppy", NULL); | |
| 258 | 258 | |
| 259 | 259 | return ((error == 0) ? 0 : -1); |
| 260 | 260 | } |
| @@ -1,3 +1,4 @@ | ||
| 1 | + | |
| 1 | 2 | # |
| 2 | 3 | # Makefile for the linux kernel. |
| 3 | 4 | # |
| @@ -99,7 +100,7 @@ obj-$(CONFIG_STACKTRACE) += stacktrace.o · 95 unmodified lines | ||
| 99 | 100 | obj-$(CONFIG_SPARC64_PCI) += pci.o pci_common.o psycho_common.o |
| 100 | 101 | obj-$(CONFIG_SPARC64_PCI) += pci_psycho.o pci_sabre.o pci_schizo.o |
| 101 | 102 | obj-$(CONFIG_SPARC64_PCI) += pci_sun4v.o pci_sun4v_asm.o pci_fire.o |
| 102 | −obj-$(CONFIG_PCI_MSI) += pci_msi.o | |
| 103 | +obj-$(CONFIG_SPARC64_PCI_MSI) += pci_msi.o | |
| 103 | 104 | |
| 104 | 105 | obj-$(CONFIG_COMPAT) += sys32.o sys_sparc32.o signal32.o |
| 105 | 106 | |
| @@ -849,9 +849,8 @@ void ldom_reboot(const char *boot_command) · 848 unmodified lines | ||
| 849 | 849 | if (boot_command && strlen(boot_command)) { |
| 850 | 850 | unsigned long len; |
| 851 | 851 | |
| 852 | − strcpy(full_boot_str, "boot "); | |
| 853 | − strlcpy(full_boot_str + strlen("boot "), boot_command, | |
| 854 | − sizeof(full_boot_str + strlen("boot "))); | |
| 852 | + snprintf(full_boot_str, sizeof(full_boot_str), "boot %s", | |
| 853 | + boot_command); | |
| 855 | 854 | len = strlen(full_boot_str); |
| 856 | 855 | |
| 857 | 856 | if (reboot_data_supported) { |
| @@ -1249,12 +1249,12 @@ int ldc_bind(struct ldc_channel *lp, const char *name) · 1248 unmodified lines | ||
| 1249 | 1249 | snprintf(lp->rx_irq_name, LDC_IRQ_NAME_MAX, "%s RX", name); |
| 1250 | 1250 | snprintf(lp->tx_irq_name, LDC_IRQ_NAME_MAX, "%s TX", name); |
| 1251 | 1251 | |
| 1252 | − err = request_irq(lp->cfg.rx_irq, ldc_rx, IRQF_DISABLED, | |
| 1252 | + err = request_irq(lp->cfg.rx_irq, ldc_rx, 0, | |
| 1253 | 1253 | lp->rx_irq_name, lp); |
| 1254 | 1254 | if (err) |
| 1255 | 1255 | return err; |
| 1256 | 1256 | |
| 1257 | − err = request_irq(lp->cfg.tx_irq, ldc_tx, IRQF_DISABLED, | |
| 1257 | + err = request_irq(lp->cfg.tx_irq, ldc_tx, 0, | |
| 1258 | 1258 | lp->tx_irq_name, lp); |
| 1259 | 1259 | if (err) { |
| 1260 | 1260 | free_irq(lp->cfg.rx_irq, lp); |
| @@ -481,11 +481,12 @@ config X86_INTEL_LPSS · 480 unmodified lines | ||
| 481 | 481 | bool "Intel Low Power Subsystem Support" |
| 482 | 482 | depends on ACPI |
| 483 | 483 | select COMMON_CLK |
| 484 | + select PINCTRL | |
| 484 | 485 | ---help--- |
| 485 | 486 | Select to build support for Intel Low Power Subsystem such as |
| 486 | 487 | found on Intel Lynxpoint PCH. Selecting this option enables |
| 487 | − things like clock tree (common clock framework) which are needed | |
| 488 | − by the LPSS peripheral drivers. | |
| 488 | + things like clock tree (common clock framework) and pincontrol | |
| 489 | + which are needed by the LPSS peripheral drivers. | |
| 489 | 490 | |
| 490 | 491 | config X86_RDC321X |
| 491 | 492 | bool "RDC R-321x SoC" |
| @@ -79,30 +79,38 @@ static inline int phys_to_machine_mapping_valid(unsigned long pfn) · 78 unmodified lines | ||
| 79 | 79 | return get_phys_to_machine(pfn) != INVALID_P2M_ENTRY; |
| 80 | 80 | } |
| 81 | 81 | |
| 82 | −static inline unsigned long mfn_to_pfn(unsigned long mfn) | |
| 82 | +static inline unsigned long mfn_to_pfn_no_overrides(unsigned long mfn) | |
| 83 | 83 | { |
| 84 | 84 | unsigned long pfn; |
| 85 | − int ret = 0; | |
| 85 | + int ret; | |
| 86 | 86 | |
| 87 | 87 | if (xen_feature(XENFEAT_auto_translated_physmap)) |
| 88 | 88 | return mfn; |
| 89 | 89 | |
| 90 | − if (unlikely(mfn >= machine_to_phys_nr)) { | |
| 91 | − pfn = ~0; | |
| 92 | − goto try_override; | |
| 93 | − } | |
| 94 | − pfn = 0; | |
| 90 | + if (unlikely(mfn >= machine_to_phys_nr)) | |
| 91 | + return ~0; | |
| 92 | + | |
| 95 | 93 | /* |
| 96 | 94 | * The array access can fail (e.g., device space beyond end of RAM). |
| 97 | 95 | * In such cases it doesn't matter what we return (we return garbage), |
| 98 | 96 | * but we must handle the fault without crashing! |
| 99 | 97 | */ |
| 100 | 98 | ret = __get_user(pfn, &machine_to_phys_mapping[mfn]); |
| 101 | −try_override: | |
| 102 | − /* ret might be < 0 if there are no entries in the m2p for mfn */ | |
| 103 | 99 | if (ret < 0) |
| 104 | − pfn = ~0; | |
| 105 | − else if (get_phys_to_machine(pfn) != mfn) | |
| 100 | + return ~0; | |
| 101 | + | |
| 102 | + return pfn; | |
| 103 | +} | |
| 104 | + | |
| 105 | +static inline unsigned long mfn_to_pfn(unsigned long mfn) | |
| 106 | +{ | |
| 107 | + unsigned long pfn; | |
| 108 | + | |
| 109 | + if (xen_feature(XENFEAT_auto_translated_physmap)) | |
| 110 | + return mfn; | |
| 111 | + | |
| 112 | + pfn = mfn_to_pfn_no_overrides(mfn); | |
| 113 | + if (get_phys_to_machine(pfn) != mfn) { | |
| 106 | 114 | /* |
| 107 | 115 | * If this appears to be a foreign mfn (because the pfn |
| 108 | 116 | * doesn't map back to the mfn), then check the local override |
| @@ -111,6 +119,7 @@ try_override: · 2 unmodified lines | ||
| 111 | 119 | * m2p_find_override_pfn returns ~0 if it doesn't find anything. |
| 112 | 120 | */ |
| 113 | 121 | pfn = m2p_find_override_pfn(mfn, ~0); |
| 122 | + } | |
| 114 | 123 | |
| 115 | 124 | /* |
| 116 | 125 | * pfn is ~0 if there are no entries in the m2p for mfn or if the |
| @@ -1506,7 +1506,7 @@ static int __init init_hw_perf_events(void) · 1505 unmodified lines | ||
| 1506 | 1506 | err = amd_pmu_init(); |
| 1507 | 1507 | break; |
| 1508 | 1508 | default: |
| 1509 | − return 0; | |
| 1509 | + err = -ENOTSUPP; | |
| 1510 | 1510 | } |
| 1511 | 1511 | if (err != 0) { |
| 1512 | 1512 | pr_cont("no PMU driver, software events only.\n"); |
| @@ -1883,9 +1883,9 @@ static struct pmu pmu = { · 370 unmodified lines | ||
| 1883 | 1883 | |
| 1884 | 1884 | void arch_perf_update_userpage(struct perf_event_mmap_page *userpg, u64 now) |
| 1885 | 1885 | { |
| 1886 | − userpg->cap_usr_time = 0; | |
| 1887 | − userpg->cap_usr_time_zero = 0; | |
| 1888 | − userpg->cap_usr_rdpmc = x86_pmu.attr_rdpmc; | |
| 1886 | + userpg->cap_user_time = 0; | |
| 1887 | + userpg->cap_user_time_zero = 0; | |
| 1888 | + userpg->cap_user_rdpmc = x86_pmu.attr_rdpmc; | |
| 1889 | 1889 | userpg->pmc_width = x86_pmu.cntval_bits; |
| 1890 | 1890 | |
| 1891 | 1891 | if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) |
| @@ -1894,13 +1894,13 @@ void arch_perf_update_userpage(struct perf_event_mmap_page *userpg, u64 now) · 2 unmodified lines | ||
| 1894 | 1894 | if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) |
| 1895 | 1895 | return; |
| 1896 | 1896 | |
| 1897 | − userpg->cap_usr_time = 1; | |
| 1897 | + userpg->cap_user_time = 1; | |
| 1898 | 1898 | userpg->time_mult = this_cpu_read(cyc2ns); |
| 1899 | 1899 | userpg->time_shift = CYC2NS_SCALE_FACTOR; |
| 1900 | 1900 | userpg->time_offset = this_cpu_read(cyc2ns_offset) - now; |
| 1901 | 1901 | |
| 1902 | 1902 | if (sched_clock_stable && !check_tsc_disabled()) { |
| 1903 | − userpg->cap_usr_time_zero = 1; | |
| 1903 | + userpg->cap_user_time_zero = 1; | |
| 1904 | 1904 | userpg->time_zero = this_cpu_read(cyc2ns_offset); |
| 1905 | 1905 | } |
| 1906 | 1906 | } |
| @@ -2325,6 +2325,7 @@ __init int intel_pmu_init(void) · 2324 unmodified lines | ||
| 2325 | 2325 | break; |
| 2326 | 2326 | |
| 2327 | 2327 | case 55: /* Atom 22nm "Silvermont" */ |
| 2328 | + case 77: /* Avoton "Silvermont" */ | |
| 2328 | 2329 | memcpy(hw_cache_event_ids, slm_hw_cache_event_ids, |
| 2329 | 2330 | sizeof(hw_cache_event_ids)); |
| 2330 | 2331 | memcpy(hw_cache_extra_regs, slm_hw_cache_extra_regs, |
| @@ -584,6 +584,7 @@ struct event_constraint intel_snb_pebs_event_constraints[] = { · 583 unmodified lines | ||
| 584 | 584 | INTEL_EVENT_CONSTRAINT(0xd0, 0xf), /* MEM_UOP_RETIRED.* */ |
| 585 | 585 | INTEL_EVENT_CONSTRAINT(0xd1, 0xf), /* MEM_LOAD_UOPS_RETIRED.* */ |
| 586 | 586 | INTEL_EVENT_CONSTRAINT(0xd2, 0xf), /* MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */ |
| 587 | + INTEL_EVENT_CONSTRAINT(0xd3, 0xf), /* MEM_LOAD_UOPS_LLC_MISS_RETIRED.* */ | |
| 587 | 588 | INTEL_UEVENT_CONSTRAINT(0x02d4, 0xf), /* MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS */ |
| 588 | 589 | EVENT_CONSTRAINT_END |
| 589 | 590 | }; |
| @@ -2706,14 +2706,14 @@ static void uncore_pmu_init_hrtimer(struct intel_uncore_box *box) · 2705 unmodified lines | ||
| 2706 | 2706 | box->hrtimer.function = uncore_pmu_hrtimer; |
| 2707 | 2707 | } |
| 2708 | 2708 | |
| 2709 | −struct intel_uncore_box *uncore_alloc_box(struct intel_uncore_type *type, int cpu) | |
| 2709 | +static struct intel_uncore_box *uncore_alloc_box(struct intel_uncore_type *type, int node) | |
| 2710 | 2710 | { |
| 2711 | 2711 | struct intel_uncore_box *box; |
| 2712 | 2712 | int i, size; |
| 2713 | 2713 | |
| 2714 | 2714 | size = sizeof(*box) + type->num_shared_regs * sizeof(struct intel_uncore_extra_reg); |
| 2715 | 2715 | |
| 2716 | − box = kzalloc_node(size, GFP_KERNEL, cpu_to_node(cpu)); | |
| 2716 | + box = kzalloc_node(size, GFP_KERNEL, node); | |
| 2717 | 2717 | if (!box) |
| 2718 | 2718 | return NULL; |
| 2719 | 2719 | |
| @@ -3031,7 +3031,7 @@ static int uncore_validate_group(struct intel_uncore_pmu *pmu, · 311 unmodified lines | ||
| 3031 | 3031 | struct intel_uncore_box *fake_box; |
| 3032 | 3032 | int ret = -EINVAL, n; |
| 3033 | 3033 | |
| 3034 | − fake_box = uncore_alloc_box(pmu->type, smp_processor_id()); | |
| 3034 | + fake_box = uncore_alloc_box(pmu->type, NUMA_NO_NODE); | |
| 3035 | 3035 | if (!fake_box) |
| 3036 | 3036 | return -ENOMEM; |
| 3037 | 3037 | |
| @@ -3294,7 +3294,7 @@ static int uncore_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id · 256 unmodified lines | ||
| 3294 | 3294 | } |
| 3295 | 3295 | |
| 3296 | 3296 | type = pci_uncores[UNCORE_PCI_DEV_TYPE(id->driver_data)]; |
| 3297 | − box = uncore_alloc_box(type, 0); | |
| 3297 | + box = uncore_alloc_box(type, NUMA_NO_NODE); | |
| 3298 | 3298 | if (!box) |
| 3299 | 3299 | return -ENOMEM; |
| 3300 | 3300 | |
| @@ -3499,7 +3499,7 @@ static int uncore_cpu_prepare(int cpu, int phys_id) · 198 unmodified lines | ||
| 3499 | 3499 | if (pmu->func_id < 0) |
| 3500 | 3500 | pmu->func_id = j; |
| 3501 | 3501 | |
| 3502 | − box = uncore_alloc_box(type, cpu); | |
| 3502 | + box = uncore_alloc_box(type, cpu_to_node(cpu)); | |
| 3503 | 3503 | if (!box) |
| 3504 | 3504 | return -ENOMEM; |
| 3505 | 3505 | |
| @@ -487,21 +487,6 @@ ENDPROC(native_usergs_sysret64) · 486 unmodified lines | ||
| 487 | 487 | TRACE_IRQS_OFF |
| 488 | 488 | .endm |
| 489 | 489 | |
| 490 | −ENTRY(save_rest) | |
| 491 | − PARTIAL_FRAME 1 (REST_SKIP+8) | |
| 492 | − movq 5*8+16(%rsp), %r11 /* save return address */ | |
| 493 | − movq_cfi rbx, RBX+16 | |
| 494 | − movq_cfi rbp, RBP+16 | |
| 495 | − movq_cfi r12, R12+16 | |
| 496 | − movq_cfi r13, R13+16 | |
| 497 | − movq_cfi r14, R14+16 | |
| 498 | − movq_cfi r15, R15+16 | |
| 499 | − movq %r11, 8(%rsp) /* return address */ | |
| 500 | − FIXUP_TOP_OF_STACK %r11, 16 | |
| 501 | − ret | |
| 502 | − CFI_ENDPROC | |
| 503 | −END(save_rest) | |
| 504 | − | |
| 505 | 490 | /* save complete stack frame */ |
| 506 | 491 | .pushsection .kprobes.text, "ax" |
| 507 | 492 | ENTRY(save_paranoid) |
| @@ -216,6 +216,7 @@ int apply_microcode_amd(int cpu) · 215 unmodified lines | ||
| 216 | 216 | /* need to apply patch? */ |
| 217 | 217 | if (rev >= mc_amd->hdr.patch_id) { |
| 218 | 218 | c->microcode = rev; |
| 219 | + uci->cpu_sig.rev = rev; | |
| 219 | 220 | return 0; |
| 220 | 221 | } |
| 221 | 222 | |
| @@ -352,12 +352,28 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = { · 351 unmodified lines | ||
| 352 | 352 | }, |
| 353 | 353 | { /* Handle problems with rebooting on the Precision M6600. */ |
| 354 | 354 | .callback = set_pci_reboot, |
| 355 | − .ident = "Dell OptiPlex 990", | |
| 355 | + .ident = "Dell Precision M6600", | |
| 356 | 356 | .matches = { |
| 357 | 357 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), |
| 358 | 358 | DMI_MATCH(DMI_PRODUCT_NAME, "Precision M6600"), |
| 359 | 359 | }, |
| 360 | 360 | }, |
| 361 | + { /* Handle problems with rebooting on the Dell PowerEdge C6100. */ | |
| 362 | + .callback = set_pci_reboot, | |
| 363 | + .ident = "Dell PowerEdge C6100", | |
| 364 | + .matches = { | |
| 365 | + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
| 366 | + DMI_MATCH(DMI_PRODUCT_NAME, "C6100"), | |
| 367 | + }, | |
| 368 | + }, | |
| 369 | + { /* Some C6100 machines were shipped with vendor being 'Dell'. */ | |
| 370 | + .callback = set_pci_reboot, | |
| 371 | + .ident = "Dell PowerEdge C6100", | |
| 372 | + .matches = { | |
| 373 | + DMI_MATCH(DMI_SYS_VENDOR, "Dell"), | |
| 374 | + DMI_MATCH(DMI_PRODUCT_NAME, "C6100"), | |
| 375 | + }, | |
| 376 | + }, | |
| 361 | 377 | { } |
| 362 | 378 | }; |
| 363 | 379 | |
| @@ -653,6 +653,7 @@ static void announce_cpu(int cpu, int apicid) · 652 unmodified lines | ||
| 653 | 653 | { |
| 654 | 654 | static int current_node = -1; |
| 655 | 655 | int node = early_cpu_to_node(cpu); |
| 656 | + int max_cpu_present = find_last_bit(cpumask_bits(cpu_present_mask), NR_CPUS); | |
| 656 | 657 | |
| 657 | 658 | if (system_state == SYSTEM_BOOTING) { |
| 658 | 659 | if (node != current_node) { |
| @@ -661,7 +662,7 @@ static void announce_cpu(int cpu, int apicid) · 2 unmodified lines | ||
| 661 | 662 | current_node = node; |
| 662 | 663 | pr_info("Booting Node %3d, Processors ", node); |
| 663 | 664 | } |
| 664 | − pr_cont(" #%d%s", cpu, cpu == (nr_cpu_ids - 1) ? " OK\n" : ""); | |
| 665 | + pr_cont(" #%4d%s", cpu, cpu == max_cpu_present ? " OK\n" : ""); | |
| 665 | 666 | return; |
| 666 | 667 | } else |
| 667 | 668 | pr_info("Booting Node %d Processor %d APIC 0x%x\n", |
| @@ -72,14 +72,14 @@ __init int create_simplefb(const struct screen_info *si, · 71 unmodified lines | ||
| 72 | 72 | * the part that is occupied by the framebuffer */ |
| 73 | 73 | len = mode->height * mode->stride; |
| 74 | 74 | len = PAGE_ALIGN(len); |
| 75 | − if (len > si->lfb_size << 16) { | |
| 75 | + if (len > (u64)si->lfb_size << 16) { | |
| 76 | 76 | printk(KERN_WARNING "sysfb: VRAM smaller than advertised\n"); |
| 77 | 77 | return -EINVAL; |
| 78 | 78 | } |
| 79 | 79 | |
| 80 | 80 | /* setup IORESOURCE_MEM as framebuffer memory */ |
| 81 | 81 | memset(&res, 0, sizeof(res)); |
| 82 | − res.flags = IORESOURCE_MEM; | |
| 82 | + res.flags = IORESOURCE_MEM | IORESOURCE_BUSY; | |
| 83 | 83 | res.name = simplefb_resname; |
| 84 | 84 | res.start = si->lfb_base; |
| 85 | 85 | res.end = si->lfb_base + len - 1; |
| @@ -5345,7 +5345,9 @@ static int handle_ept_violation(struct kvm_vcpu *vcpu) · 5344 unmodified lines | ||
| 5345 | 5345 | * There are errata that may cause this bit to not be set: |
| 5346 | 5346 | * AAK134, BY25. |
| 5347 | 5347 | */ |
| 5348 | − if (exit_qualification & INTR_INFO_UNBLOCK_NMI) | |
| 5348 | + if (!(to_vmx(vcpu)->idt_vectoring_info & VECTORING_INFO_VALID_MASK) && | |
| 5349 | + cpu_has_virtual_nmis() && | |
| 5350 | + (exit_qualification & INTR_INFO_UNBLOCK_NMI)) | |
| 5349 | 5351 | vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO, GUEST_INTR_STATE_NMI); |
| 5350 | 5352 | |
| 5351 | 5353 | gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS); |
| @@ -700,7 +700,7 @@ int pci_mmconfig_insert(struct device *dev, u16 seg, u8 start, u8 end, · 699 unmodified lines | ||
| 700 | 700 | if (!(pci_probe & PCI_PROBE_MMCONF) || pci_mmcfg_arch_init_failed) |
| 701 | 701 | return -ENODEV; |
| 702 | 702 | |
| 703 | − if (start > end || !addr) | |
| 703 | + if (start > end) | |
| 704 | 704 | return -EINVAL; |
| 705 | 705 | |
| 706 | 706 | mutex_lock(&pci_mmcfg_lock); |
| @@ -716,6 +716,11 @@ int pci_mmconfig_insert(struct device *dev, u16 seg, u8 start, u8 end, · 9 unmodified lines | ||
| 716 | 716 | return -EEXIST; |
| 717 | 717 | } |
| 718 | 718 | |
| 719 | + if (!addr) { | |
| 720 | + mutex_unlock(&pci_mmcfg_lock); | |
| 721 | + return -EINVAL; | |
| 722 | + } | |
| 723 | + | |
| 719 | 724 | rc = -EBUSY; |
| 720 | 725 | cfg = pci_mmconfig_alloc(seg, start, end, addr); |
| 721 | 726 | if (cfg == NULL) { |
| @@ -912,10 +912,13 @@ void __init efi_enter_virtual_mode(void) · 911 unmodified lines | ||
| 912 | 912 | |
| 913 | 913 | for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) { |
| 914 | 914 | md = p; |
| 915 | − if (!(md->attribute & EFI_MEMORY_RUNTIME) && | |
| 916 | − md->type != EFI_BOOT_SERVICES_CODE && | |
| 917 | − md->type != EFI_BOOT_SERVICES_DATA) | |
| 918 | − continue; | |
| 915 | + if (!(md->attribute & EFI_MEMORY_RUNTIME)) { | |
| 916 | +#ifdef CONFIG_X86_64 | |
| 917 | + if (md->type != EFI_BOOT_SERVICES_CODE && | |
| 918 | + md->type != EFI_BOOT_SERVICES_DATA) | |
| 919 | +#endif | |
| 920 | + continue; | |
| 921 | + } | |
| 919 | 922 | |
| 920 | 923 | size = md->num_pages << EFI_PAGE_SHIFT; |
| 921 | 924 | end = md->phys_addr + size; |
| @@ -879,7 +879,6 @@ int m2p_add_override(unsigned long mfn, struct page *page, · 878 unmodified lines | ||
| 879 | 879 | unsigned long uninitialized_var(address); |
| 880 | 880 | unsigned level; |
| 881 | 881 | pte_t *ptep = NULL; |
| 882 | − int ret = 0; | |
| 883 | 882 | |
| 884 | 883 | pfn = page_to_pfn(page); |
| 885 | 884 | if (!PageHighMem(page)) { |
| @@ -926,8 +925,8 @@ int m2p_add_override(unsigned long mfn, struct page *page, · 40 unmodified lines | ||
| 926 | 925 | * frontend pages while they are being shared with the backend, |
| 927 | 926 | * because mfn_to_pfn (that ends up being called by GUPF) will |
| 928 | 927 | * return the backend pfn rather than the frontend pfn. */ |
| 929 | − ret = __get_user(pfn, &machine_to_phys_mapping[mfn]); | |
| 930 | − if (ret == 0 && get_phys_to_machine(pfn) == mfn) | |
| 928 | + pfn = mfn_to_pfn_no_overrides(mfn); | |
| 929 | + if (get_phys_to_machine(pfn) == mfn) | |
| 931 | 930 | set_phys_to_machine(pfn, FOREIGN_FRAME(mfn)); |
| 932 | 931 | |
| 933 | 932 | return 0; |
| @@ -942,7 +941,6 @@ int m2p_remove_override(struct page *page, · 8 unmodified lines | ||
| 942 | 941 | unsigned long uninitialized_var(address); |
| 943 | 942 | unsigned level; |
| 944 | 943 | pte_t *ptep = NULL; |
| 945 | − int ret = 0; | |
| 946 | 944 | |
| 947 | 945 | pfn = page_to_pfn(page); |
| 948 | 946 | mfn = get_phys_to_machine(pfn); |
| @@ -1029,8 +1027,8 @@ int m2p_remove_override(struct page *page, · 80 unmodified lines | ||
| 1029 | 1027 | * the original pfn causes mfn_to_pfn(mfn) to return the frontend |
| 1030 | 1028 | * pfn again. */ |
| 1031 | 1029 | mfn &= ~FOREIGN_FRAME_BIT; |
| 1032 | − ret = __get_user(pfn, &machine_to_phys_mapping[mfn]); | |
| 1033 | − if (ret == 0 && get_phys_to_machine(pfn) == FOREIGN_FRAME(mfn) && | |
| 1030 | + pfn = mfn_to_pfn_no_overrides(mfn); | |
| 1031 | + if (get_phys_to_machine(pfn) == FOREIGN_FRAME(mfn) && | |
| 1034 | 1032 | m2p_find_override(mfn) == NULL) |
| 1035 | 1033 | set_phys_to_machine(pfn, mfn); |
| 1036 | 1034 | |
| @@ -259,6 +259,14 @@ void xen_uninit_lock_cpu(int cpu) · 258 unmodified lines | ||
| 259 | 259 | } |
| 260 | 260 | |
| 261 | 261 | |
| 262 | +/* | |
| 263 | + * Our init of PV spinlocks is split in two init functions due to us | |
| 264 | + * using paravirt patching and jump labels patching and having to do | |
| 265 | + * all of this before SMP code is invoked. | |
| 266 | + * | |
| 267 | + * The paravirt patching needs to be done _before_ the alternative asm code | |
| 268 | + * is started, otherwise we would not patch the core kernel code. | |
| 269 | + */ | |
| 262 | 270 | void __init xen_init_spinlocks(void) |
| 263 | 271 | { |
| 264 | 272 | |
| @@ -267,12 +275,26 @@ void __init xen_init_spinlocks(void) · 2 unmodified lines | ||
| 267 | 275 | return; |
| 268 | 276 | } |
| 269 | 277 | |
| 270 | − static_key_slow_inc(¶virt_ticketlocks_enabled); | |
| 271 | − | |
| 272 | 278 | pv_lock_ops.lock_spinning = PV_CALLEE_SAVE(xen_lock_spinning); |
| 273 | 279 | pv_lock_ops.unlock_kick = xen_unlock_kick; |
| 274 | 280 | } |
| 275 | 281 | |
| 282 | +/* | |
| 283 | + * While the jump_label init code needs to happend _after_ the jump labels are | |
| 284 | + * enabled and before SMP is started. Hence we use pre-SMP initcall level | |
| 285 | + * init. We cannot do it in xen_init_spinlocks as that is done before | |
| 286 | + * jump labels are activated. | |
| 287 | + */ | |
| 288 | +static __init int xen_init_spinlocks_jump(void) | |
| 289 | +{ | |
| 290 | + if (!xen_pvspin) | |
| 291 | + return 0; | |
| 292 | + | |
| 293 | + static_key_slow_inc(¶virt_ticketlocks_enabled); | |
| 294 | + return 0; | |
| 295 | +} | |
| 296 | +early_initcall(xen_init_spinlocks_jump); | |
| 297 | + | |
| 276 | 298 | static __init int xen_parse_nopvspin(char *arg) |
| 277 | 299 | { |
| 278 | 300 | xen_pvspin = false; |
| @@ -99,11 +99,16 @@ config BLK_DEV_THROTTLING · 98 unmodified lines | ||
| 99 | 99 | |
| 100 | 100 | See Documentation/cgroups/blkio-controller.txt for more information. |
| 101 | 101 | |
| 102 | −config CMDLINE_PARSER | |
| 102 | +config BLK_CMDLINE_PARSER | |
| 103 | 103 | bool "Block device command line partition parser" |
| 104 | 104 | default n |
| 105 | 105 | ---help--- |
| 106 | − Parsing command line, get the partitions information. | |
| 106 | + Enabling this option allows you to specify the partition layout from | |
| 107 | + the kernel boot args. This is typically of use for embedded devices | |
| 108 | + which don't otherwise have any standardized method for listing the | |
| 109 | + partitions on a block device. | |
| 110 | + | |
| 111 | + See Documentation/block/cmdline-partition.txt for more information. | |
| 107 | 112 | |
| 108 | 113 | menu "Partition Types" |
| 109 | 114 | |
| @@ -18,4 +18,4 @@ obj-$(CONFIG_IOSCHED_CFQ) += cfq-iosched.o · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | obj-$(CONFIG_BLOCK_COMPAT) += compat_ioctl.o |
| 20 | 20 | obj-$(CONFIG_BLK_DEV_INTEGRITY) += blk-integrity.o |
| 21 | −obj-$(CONFIG_CMDLINE_PARSER) += cmdline-parser.o | |
| 21 | +obj-$(CONFIG_BLK_CMDLINE_PARSER) += cmdline-parser.o | |
| @@ -235,8 +235,13 @@ static struct blkcg_gq *blkg_create(struct blkcg *blkcg, · 234 unmodified lines | ||
| 235 | 235 | blkg->online = true; |
| 236 | 236 | spin_unlock(&blkcg->lock); |
| 237 | 237 | |
| 238 | − if (!ret) | |
| 238 | + if (!ret) { | |
| 239 | + if (blkcg == &blkcg_root) { | |
| 240 | + q->root_blkg = blkg; | |
| 241 | + q->root_rl.blkg = blkg; | |
| 242 | + } | |
| 239 | 243 | return blkg; |
| 244 | + } | |
| 240 | 245 | |
| 241 | 246 | /* @blkg failed fully initialized, use the usual release path */ |
| 242 | 247 | blkg_put(blkg); |
| @@ -334,6 +339,15 @@ static void blkg_destroy(struct blkcg_gq *blkg) · 91 unmodified lines | ||
| 334 | 339 | if (rcu_dereference_raw(blkcg->blkg_hint) == blkg) |
| 335 | 340 | rcu_assign_pointer(blkcg->blkg_hint, NULL); |
| 336 | 341 | |
| 342 | + /* | |
| 343 | + * If root blkg is destroyed. Just clear the pointer since root_rl | |
| 344 | + * does not take reference on root blkg. | |
| 345 | + */ | |
| 346 | + if (blkcg == &blkcg_root) { | |
| 347 | + blkg->q->root_blkg = NULL; | |
| 348 | + blkg->q->root_rl.blkg = NULL; | |
| 349 | + } | |
| 350 | + | |
| 337 | 351 | /* |
| 338 | 352 | * Put the reference taken at the time of creation so that when all |
| 339 | 353 | * queues are gone, group can be destroyed. |
| @@ -360,13 +374,6 @@ static void blkg_destroy_all(struct request_queue *q) · 20 unmodified lines | ||
| 360 | 374 | blkg_destroy(blkg); |
| 361 | 375 | spin_unlock(&blkcg->lock); |
| 362 | 376 | } |
| 363 | − | |
| 364 | − /* | |
| 365 | − * root blkg is destroyed. Just clear the pointer since | |
| 366 | − * root_rl does not take reference on root blkg. | |
| 367 | − */ | |
| 368 | − q->root_blkg = NULL; | |
| 369 | − q->root_rl.blkg = NULL; | |
| 370 | 377 | } |
| 371 | 378 | |
| 372 | 379 | /* |
| @@ -970,8 +977,6 @@ int blkcg_activate_policy(struct request_queue *q, · 597 unmodified lines | ||
| 970 | 977 | ret = PTR_ERR(blkg); |
| 971 | 978 | goto out_unlock; |
| 972 | 979 | } |
| 973 | − q->root_blkg = blkg; | |
| 974 | − q->root_rl.blkg = blkg; | |
| 975 | 980 | |
| 976 | 981 | list_for_each_entry(blkg, &q->blkg_list, q_node) |
| 977 | 982 | cnt++; |
| @@ -1549,11 +1549,9 @@ get_rq: · 1548 unmodified lines | ||
| 1549 | 1549 | if (plug) { |
| 1550 | 1550 | /* |
| 1551 | 1551 | * If this is the first request added after a plug, fire |
| 1552 | − * of a plug trace. If others have been added before, check | |
| 1553 | − * if we have multiple devices in this plug. If so, make a | |
| 1554 | − * note to sort the list before dispatch. | |
| 1552 | + * of a plug trace. | |
| 1555 | 1553 | */ |
| 1556 | − if (list_empty(&plug->list)) | |
| 1554 | + if (!request_count) | |
| 1557 | 1555 | trace_block_plug(q); |
| 1558 | 1556 | else { |
| 1559 | 1557 | if (request_count >= BLK_MAX_REQUEST_COUNT) { |
| @@ -68,9 +68,9 @@ void blk_execute_rq_nowait(struct request_queue *q, struct gendisk *bd_disk, · 67 unmodified lines | ||
| 68 | 68 | spin_lock_irq(q->queue_lock); |
| 69 | 69 | |
| 70 | 70 | if (unlikely(blk_queue_dying(q))) { |
| 71 | + rq->cmd_flags |= REQ_QUIET; | |
| 71 | 72 | rq->errors = -ENXIO; |
| 72 | − if (rq->end_io) | |
| 73 | − rq->end_io(rq, rq->errors); | |
| 73 | + __blk_end_request_all(rq, rq->errors); | |
| 74 | 74 | spin_unlock_irq(q->queue_lock); |
| 75 | 75 | return; |
| 76 | 76 | } |
| @@ -1803,7 +1803,7 @@ static u64 cfqg_prfill_avg_queue_size(struct seq_file *sf, · 1802 unmodified lines | ||
| 1803 | 1803 | |
| 1804 | 1804 | if (samples) { |
| 1805 | 1805 | v = blkg_stat_read(&cfqg->stats.avg_queue_size_sum); |
| 1806 | − do_div(v, samples); | |
| 1806 | + v = div64_u64(v, samples); | |
| 1807 | 1807 | } |
| 1808 | 1808 | __blkg_prfill_u64(sf, pd, v); |
| 1809 | 1809 | return 0; |
| @@ -4358,7 +4358,7 @@ static int cfq_init_queue(struct request_queue *q, struct elevator_type *e) · 2548 unmodified lines | ||
| 4358 | 4358 | if (!eq) |
| 4359 | 4359 | return -ENOMEM; |
| 4360 | 4360 | |
| 4361 | − cfqd = kmalloc_node(sizeof(*cfqd), GFP_KERNEL | __GFP_ZERO, q->node); | |
| 4361 | + cfqd = kzalloc_node(sizeof(*cfqd), GFP_KERNEL, q->node); | |
| 4362 | 4362 | if (!cfqd) { |
| 4363 | 4363 | kobject_put(&eq->kobj); |
| 4364 | 4364 | return -ENOMEM; |
| @@ -346,7 +346,7 @@ static int deadline_init_queue(struct request_queue *q, struct elevator_type *e) · 345 unmodified lines | ||
| 346 | 346 | if (!eq) |
| 347 | 347 | return -ENOMEM; |
| 348 | 348 | |
| 349 | − dd = kmalloc_node(sizeof(*dd), GFP_KERNEL | __GFP_ZERO, q->node); | |
| 349 | + dd = kzalloc_node(sizeof(*dd), GFP_KERNEL, q->node); | |
| 350 | 350 | if (!dd) { |
| 351 | 351 | kobject_put(&eq->kobj); |
| 352 | 352 | return -ENOMEM; |
| @@ -155,7 +155,7 @@ struct elevator_queue *elevator_alloc(struct request_queue *q, · 154 unmodified lines | ||
| 155 | 155 | { |
| 156 | 156 | struct elevator_queue *eq; |
| 157 | 157 | |
| 158 | − eq = kmalloc_node(sizeof(*eq), GFP_KERNEL | __GFP_ZERO, q->node); | |
| 158 | + eq = kzalloc_node(sizeof(*eq), GFP_KERNEL, q->node); | |
| 159 | 159 | if (unlikely(!eq)) |
| 160 | 160 | goto err; |
| 161 | 161 | |
| @@ -1252,8 +1252,7 @@ struct gendisk *alloc_disk_node(int minors, int node_id) · 1251 unmodified lines | ||
| 1252 | 1252 | { |
| 1253 | 1253 | struct gendisk *disk; |
| 1254 | 1254 | |
| 1255 | − disk = kmalloc_node(sizeof(struct gendisk), | |
| 1256 | − GFP_KERNEL | __GFP_ZERO, node_id); | |
| 1255 | + disk = kzalloc_node(sizeof(struct gendisk), GFP_KERNEL, node_id); | |
| 1257 | 1256 | if (disk) { |
| 1258 | 1257 | if (!init_part_stats(&disk->part0)) { |
| 1259 | 1258 | kfree(disk); |
| @@ -263,7 +263,7 @@ config SYSV68_PARTITION · 262 unmodified lines | ||
| 263 | 263 | |
| 264 | 264 | config CMDLINE_PARTITION |
| 265 | 265 | bool "Command line partition support" if PARTITION_ADVANCED |
| 266 | − select CMDLINE_PARSER | |
| 266 | + select BLK_CMDLINE_PARSER | |
| 267 | 267 | help |
| 268 | − Say Y here if you would read the partitions table from bootargs. | |
| 268 | + Say Y here if you want to read the partition table from bootargs. | |
| 269 | 269 | The format for the command line is just like mtdparts. |
| @@ -2,15 +2,15 @@ · 1 unmodified line | ||
| 2 | 2 | * Copyright (C) 2013 HUAWEI |
| 3 | 3 | * Author: Cai Zhiyong <caizhiyong@huawei.com> |
| 4 | 4 | * |
| 5 | − * Read block device partition table from command line. | |
| 6 | − * The partition used for fixed block device (eMMC) embedded device. | |
| 7 | − * It is no MBR, save storage space. Bootloader can be easily accessed | |
| 5 | + * Read block device partition table from the command line. | |
| 6 | + * Typically used for fixed block (eMMC) embedded devices. | |
| 7 | + * It has no MBR, so saves storage space. Bootloader can be easily accessed | |
| 8 | 8 | * by absolute address of data on the block device. |
| 9 | 9 | * Users can easily change the partition. |
| 10 | 10 | * |
| 11 | 11 | * The format for the command line is just like mtdparts. |
| 12 | 12 | * |
| 13 | − * Verbose config please reference "Documentation/block/cmdline-partition.txt" | |
| 13 | + * For further information, see "Documentation/block/cmdline-partition.txt" | |
| 14 | 14 | * |
| 15 | 15 | */ |
| 16 | 16 | |
| @@ -39,6 +39,7 @@ · 38 unmodified lines | ||
| 39 | 39 | #include <linux/ipmi.h> |
| 40 | 40 | #include <linux/device.h> |
| 41 | 41 | #include <linux/pnp.h> |
| 42 | +#include <linux/spinlock.h> | |
| 42 | 43 | |
| 43 | 44 | MODULE_AUTHOR("Zhao Yakui"); |
| 44 | 45 | MODULE_DESCRIPTION("ACPI IPMI Opregion driver"); |
| @@ -57,7 +58,7 @@ struct acpi_ipmi_device { · 12 unmodified lines | ||
| 57 | 58 | struct list_head head; |
| 58 | 59 | /* the IPMI request message list */ |
| 59 | 60 | struct list_head tx_msg_list; |
| 60 | − struct mutex tx_msg_lock; | |
| 61 | + spinlock_t tx_msg_lock; | |
| 61 | 62 | acpi_handle handle; |
| 62 | 63 | struct pnp_dev *pnp_dev; |
| 63 | 64 | ipmi_user_t user_interface; |
| @@ -147,6 +148,7 @@ static void acpi_format_ipmi_msg(struct acpi_ipmi_msg *tx_msg, · 83 unmodified lines | ||
| 147 | 148 | struct kernel_ipmi_msg *msg; |
| 148 | 149 | struct acpi_ipmi_buffer *buffer; |
| 149 | 150 | struct acpi_ipmi_device *device; |
| 151 | + unsigned long flags; | |
| 150 | 152 | |
| 151 | 153 | msg = &tx_msg->tx_message; |
| 152 | 154 | /* |
| @@ -177,10 +179,10 @@ static void acpi_format_ipmi_msg(struct acpi_ipmi_msg *tx_msg, · 24 unmodified lines | ||
| 177 | 179 | |
| 178 | 180 | /* Get the msgid */ |
| 179 | 181 | device = tx_msg->device; |
| 180 | − mutex_lock(&device->tx_msg_lock); | |
| 182 | + spin_lock_irqsave(&device->tx_msg_lock, flags); | |
| 181 | 183 | device->curr_msgid++; |
| 182 | 184 | tx_msg->tx_msgid = device->curr_msgid; |
| 183 | − mutex_unlock(&device->tx_msg_lock); | |
| 185 | + spin_unlock_irqrestore(&device->tx_msg_lock, flags); | |
| 184 | 186 | } |
| 185 | 187 | |
| 186 | 188 | static void acpi_format_ipmi_response(struct acpi_ipmi_msg *msg, |
| @@ -242,6 +244,7 @@ static void ipmi_msg_handler(struct ipmi_recv_msg *msg, void *user_msg_data) · 55 unmodified lines | ||
| 242 | 244 | int msg_found = 0; |
| 243 | 245 | struct acpi_ipmi_msg *tx_msg; |
| 244 | 246 | struct pnp_dev *pnp_dev = ipmi_device->pnp_dev; |
| 247 | + unsigned long flags; | |
| 245 | 248 | |
| 246 | 249 | if (msg->user != ipmi_device->user_interface) { |
| 247 | 250 | dev_warn(&pnp_dev->dev, "Unexpected response is returned. " |
| @@ -250,7 +253,7 @@ static void ipmi_msg_handler(struct ipmi_recv_msg *msg, void *user_msg_data) · 2 unmodified lines | ||
| 250 | 253 | ipmi_free_recv_msg(msg); |
| 251 | 254 | return; |
| 252 | 255 | } |
| 253 | − mutex_lock(&ipmi_device->tx_msg_lock); | |
| 256 | + spin_lock_irqsave(&ipmi_device->tx_msg_lock, flags); | |
| 254 | 257 | list_for_each_entry(tx_msg, &ipmi_device->tx_msg_list, head) { |
| 255 | 258 | if (msg->msgid == tx_msg->tx_msgid) { |
| 256 | 259 | msg_found = 1; |
| @@ -258,7 +261,7 @@ static void ipmi_msg_handler(struct ipmi_recv_msg *msg, void *user_msg_data) · 1 unmodified line | ||
| 258 | 261 | } |
| 259 | 262 | } |
| 260 | 263 | |
| 261 | − mutex_unlock(&ipmi_device->tx_msg_lock); | |
| 264 | + spin_unlock_irqrestore(&ipmi_device->tx_msg_lock, flags); | |
| 262 | 265 | if (!msg_found) { |
| 263 | 266 | dev_warn(&pnp_dev->dev, "Unexpected response (msg id %ld) is " |
| 264 | 267 | "returned.\n", msg->msgid); |
| @@ -378,6 +381,7 @@ acpi_ipmi_space_handler(u32 function, acpi_physical_address address, · 113 unmodified lines | ||
| 378 | 381 | struct acpi_ipmi_device *ipmi_device = handler_context; |
| 379 | 382 | int err, rem_time; |
| 380 | 383 | acpi_status status; |
| 384 | + unsigned long flags; | |
| 381 | 385 | /* |
| 382 | 386 | * IPMI opregion message. |
| 383 | 387 | * IPMI message is firstly written to the BMC and system software |
| @@ -395,9 +399,9 @@ acpi_ipmi_space_handler(u32 function, acpi_physical_address address, · 11 unmodified lines | ||
| 395 | 399 | return AE_NO_MEMORY; |
| 396 | 400 | |
| 397 | 401 | acpi_format_ipmi_msg(tx_msg, address, value); |
| 398 | − mutex_lock(&ipmi_device->tx_msg_lock); | |
| 402 | + spin_lock_irqsave(&ipmi_device->tx_msg_lock, flags); | |
| 399 | 403 | list_add_tail(&tx_msg->head, &ipmi_device->tx_msg_list); |
| 400 | − mutex_unlock(&ipmi_device->tx_msg_lock); | |
| 404 | + spin_unlock_irqrestore(&ipmi_device->tx_msg_lock, flags); | |
| 401 | 405 | err = ipmi_request_settime(ipmi_device->user_interface, |
| 402 | 406 | &tx_msg->addr, |
| 403 | 407 | tx_msg->tx_msgid, |
| @@ -413,9 +417,9 @@ acpi_ipmi_space_handler(u32 function, acpi_physical_address address, · 9 unmodified lines | ||
| 413 | 417 | status = AE_OK; |
| 414 | 418 | |
| 415 | 419 | end_label: |
| 416 | − mutex_lock(&ipmi_device->tx_msg_lock); | |
| 420 | + spin_lock_irqsave(&ipmi_device->tx_msg_lock, flags); | |
| 417 | 421 | list_del(&tx_msg->head); |
| 418 | − mutex_unlock(&ipmi_device->tx_msg_lock); | |
| 422 | + spin_unlock_irqrestore(&ipmi_device->tx_msg_lock, flags); | |
| 419 | 423 | kfree(tx_msg); |
| 420 | 424 | return status; |
| 421 | 425 | } |
| @@ -457,7 +461,7 @@ static void acpi_add_ipmi_device(struct acpi_ipmi_device *ipmi_device) · 35 unmodified lines | ||
| 457 | 461 | |
| 458 | 462 | INIT_LIST_HEAD(&ipmi_device->head); |
| 459 | 463 | |
| 460 | − mutex_init(&ipmi_device->tx_msg_lock); | |
| 464 | + spin_lock_init(&ipmi_device->tx_msg_lock); | |
| 461 | 465 | INIT_LIST_HEAD(&ipmi_device->tx_msg_list); |
| 462 | 466 | ipmi_install_space_handler(ipmi_device); |
| 463 | 467 | |
| @@ -968,7 +968,7 @@ int acpi_bus_get_device(acpi_handle handle, struct acpi_device **device) · 967 unmodified lines | ||
| 968 | 968 | } |
| 969 | 969 | return 0; |
| 970 | 970 | } |
| 971 | −EXPORT_SYMBOL_GPL(acpi_bus_get_device); | |
| 971 | +EXPORT_SYMBOL(acpi_bus_get_device); | |
| 972 | 972 | |
| 973 | 973 | int acpi_device_add(struct acpi_device *device, |
| 974 | 974 | void (*release)(struct device *)) |
| @@ -1121,7 +1121,7 @@ int acpi_bus_register_driver(struct acpi_driver *driver) · 146 unmodified lines | ||
| 1121 | 1121 | EXPORT_SYMBOL(acpi_bus_register_driver); |
| 1122 | 1122 | |
| 1123 | 1123 | /** |
| 1124 | − * acpi_bus_unregister_driver - unregisters a driver with the APIC bus | |
| 1124 | + * acpi_bus_unregister_driver - unregisters a driver with the ACPI bus | |
| 1125 | 1125 | * @driver: driver to unregister |
| 1126 | 1126 | * |
| 1127 | 1127 | * Unregisters a driver with the ACPI bus. Searches the namespace for all |
| @@ -2,7 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | * sata_promise.c - Promise SATA |
| 3 | 3 | * |
| 4 | 4 | * Maintained by: Tejun Heo <tj@kernel.org> |
| 5 | − * Mikael Pettersson <mikpe@it.uu.se> | |
| 5 | + * Mikael Pettersson | |
| 6 | 6 | * Please ALWAYS copy linux-ide@vger.kernel.org |
| 7 | 7 | * on emails. |
| 8 | 8 | * |
| @@ -2865,15 +2865,4 @@ static struct pci_driver he_driver = { · 2864 unmodified lines | ||
| 2865 | 2865 | .id_table = he_pci_tbl, |
| 2866 | 2866 | }; |
| 2867 | 2867 | |
| 2868 | −static int __init he_init(void) | |
| 2869 | −{ | |
| 2870 | − return pci_register_driver(&he_driver); | |
| 2871 | −} | |
| 2872 | − | |
| 2873 | −static void __exit he_cleanup(void) | |
| 2874 | −{ | |
| 2875 | − pci_unregister_driver(&he_driver); | |
| 2876 | −} | |
| 2877 | − | |
| 2878 | −module_init(he_init); | |
| 2879 | −module_exit(he_cleanup); | |
| 2868 | +module_pci_driver(he_driver); | |
| @@ -778,7 +778,7 @@ static int ns_init_card(int i, struct pci_dev *pcidev) · 777 unmodified lines | ||
| 778 | 778 | return error; |
| 779 | 779 | } |
| 780 | 780 | |
| 781 | − if (mac[i] == NULL || mac_pton(mac[i], card->atmdev->esi)) { | |
| 781 | + if (mac[i] == NULL || !mac_pton(mac[i], card->atmdev->esi)) { | |
| 782 | 782 | nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET, |
| 783 | 783 | card->atmdev->esi, 6); |
| 784 | 784 | if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) == |
| @@ -2017,7 +2017,7 @@ EXPORT_SYMBOL_GPL(device_move); · 2016 unmodified lines | ||
| 2017 | 2017 | */ |
| 2018 | 2018 | void device_shutdown(void) |
| 2019 | 2019 | { |
| 2020 | − struct device *dev; | |
| 2020 | + struct device *dev, *parent; | |
| 2021 | 2021 | |
| 2022 | 2022 | spin_lock(&devices_kset->list_lock); |
| 2023 | 2023 | /* |
| @@ -2034,7 +2034,7 @@ void device_shutdown(void) · 10 unmodified lines | ||
| 2034 | 2034 | * prevent it from being freed because parent's |
| 2035 | 2035 | * lock is to be held |
| 2036 | 2036 | */ |
| 2037 | − get_device(dev->parent); | |
| 2037 | + parent = get_device(dev->parent); | |
| 2038 | 2038 | get_device(dev); |
| 2039 | 2039 | /* |
| 2040 | 2040 | * Make sure the device is off the kset list, in the |
| @@ -2044,8 +2044,8 @@ void device_shutdown(void) · 3 unmodified lines | ||
| 2044 | 2044 | spin_unlock(&devices_kset->list_lock); |
| 2045 | 2045 | |
| 2046 | 2046 | /* hold lock to avoid race with probe/release */ |
| 2047 | − if (dev->parent) | |
| 2048 | − device_lock(dev->parent); | |
| 2047 | + if (parent) | |
| 2048 | + device_lock(parent); | |
| 2049 | 2049 | device_lock(dev); |
| 2050 | 2050 | |
| 2051 | 2051 | /* Don't allow any more runtime suspends */ |
| @@ -2063,11 +2063,11 @@ void device_shutdown(void) · 11 unmodified lines | ||
| 2063 | 2063 | } |
| 2064 | 2064 | |
| 2065 | 2065 | device_unlock(dev); |
| 2066 | − if (dev->parent) | |
| 2067 | − device_unlock(dev->parent); | |
| 2066 | + if (parent) | |
| 2067 | + device_unlock(parent); | |
| 2068 | 2068 | |
| 2069 | 2069 | put_device(dev); |
| 2070 | − put_device(dev->parent); | |
| 2070 | + put_device(parent); | |
| 2071 | 2071 | |
| 2072 | 2072 | spin_lock(&devices_kset->list_lock); |
| 2073 | 2073 | } |
| @@ -210,25 +210,6 @@ static void bcma_core_pci_config_fixup(struct bcma_drv_pci *pc) · 209 unmodified lines | ||
| 210 | 210 | } |
| 211 | 211 | } |
| 212 | 212 | |
| 213 | −static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up) | |
| 214 | −{ | |
| 215 | − u16 data; | |
| 216 | − | |
| 217 | − if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) { | |
| 218 | − data = up ? 0x74 : 0x7C; | |
| 219 | − bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, | |
| 220 | − BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64); | |
| 221 | − bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, | |
| 222 | − BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); | |
| 223 | − } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) { | |
| 224 | − data = up ? 0x75 : 0x7D; | |
| 225 | − bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, | |
| 226 | − BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65); | |
| 227 | − bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, | |
| 228 | − BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); | |
| 229 | − } | |
| 230 | −} | |
| 231 | − | |
| 232 | 213 | /************************************************** |
| 233 | 214 | * Init. |
| 234 | 215 | **************************************************/ |
| @@ -255,6 +236,32 @@ void bcma_core_pci_init(struct bcma_drv_pci *pc) · 20 unmodified lines | ||
| 255 | 236 | bcma_core_pci_clientmode_init(pc); |
| 256 | 237 | } |
| 257 | 238 | |
| 239 | +void bcma_core_pci_power_save(struct bcma_bus *bus, bool up) | |
| 240 | +{ | |
| 241 | + struct bcma_drv_pci *pc; | |
| 242 | + u16 data; | |
| 243 | + | |
| 244 | + if (bus->hosttype != BCMA_HOSTTYPE_PCI) | |
| 245 | + return; | |
| 246 | + | |
| 247 | + pc = &bus->drv_pci[0]; | |
| 248 | + | |
| 249 | + if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) { | |
| 250 | + data = up ? 0x74 : 0x7C; | |
| 251 | + bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, | |
| 252 | + BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64); | |
| 253 | + bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, | |
| 254 | + BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); | |
| 255 | + } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) { | |
| 256 | + data = up ? 0x75 : 0x7D; | |
| 257 | + bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, | |
| 258 | + BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65); | |
| 259 | + bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, | |
| 260 | + BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); | |
| 261 | + } | |
| 262 | +} | |
| 263 | +EXPORT_SYMBOL_GPL(bcma_core_pci_power_save); | |
| 264 | + | |
| 258 | 265 | int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc, struct bcma_device *core, |
| 259 | 266 | bool enable) |
| 260 | 267 | { |
| @@ -310,8 +317,6 @@ void bcma_core_pci_up(struct bcma_bus *bus) · 49 unmodified lines | ||
| 310 | 317 | |
| 311 | 318 | pc = &bus->drv_pci[0]; |
| 312 | 319 | |
| 313 | − bcma_core_pci_power_save(pc, true); | |
| 314 | − | |
| 315 | 320 | bcma_core_pci_extend_L1timer(pc, true); |
| 316 | 321 | } |
| 317 | 322 | EXPORT_SYMBOL_GPL(bcma_core_pci_up); |
| @@ -326,7 +331,5 @@ void bcma_core_pci_down(struct bcma_bus *bus) · 8 unmodified lines | ||
| 326 | 331 | pc = &bus->drv_pci[0]; |
| 327 | 332 | |
| 328 | 333 | bcma_core_pci_extend_L1timer(pc, false); |
| 329 | − | |
| 330 | − bcma_core_pci_power_save(pc, false); | |
| 331 | 334 | } |
| 332 | 335 | EXPORT_SYMBOL_GPL(bcma_core_pci_down); |
| @@ -269,6 +269,8 @@ static struct bcma_device *bcma_find_core_reverse(struct bcma_bus *bus, u16 core · 268 unmodified lines | ||
| 269 | 269 | return NULL; |
| 270 | 270 | } |
| 271 | 271 | |
| 272 | +#define IS_ERR_VALUE_U32(x) ((x) >= (u32)-MAX_ERRNO) | |
| 273 | + | |
| 272 | 274 | static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr, |
| 273 | 275 | struct bcma_device_id *match, int core_num, |
| 274 | 276 | struct bcma_device *core) |
| @@ -351,11 +353,11 @@ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr, · 76 unmodified lines | ||
| 351 | 353 | * the main register space for the core |
| 352 | 354 | */ |
| 353 | 355 | tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, 0); |
| 354 | − if (tmp == 0 || IS_ERR_VALUE(tmp)) { | |
| 356 | + if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) { | |
| 355 | 357 | /* Try again to see if it is a bridge */ |
| 356 | 358 | tmp = bcma_erom_get_addr_desc(bus, eromptr, |
| 357 | 359 | SCAN_ADDR_TYPE_BRIDGE, 0); |
| 358 | − if (tmp == 0 || IS_ERR_VALUE(tmp)) { | |
| 360 | + if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) { | |
| 359 | 361 | return -EILSEQ; |
| 360 | 362 | } else { |
| 361 | 363 | bcma_info(bus, "Bridge found\n"); |
| @@ -369,7 +371,7 @@ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr, · 7 unmodified lines | ||
| 369 | 371 | for (j = 0; ; j++) { |
| 370 | 372 | tmp = bcma_erom_get_addr_desc(bus, eromptr, |
| 371 | 373 | SCAN_ADDR_TYPE_SLAVE, i); |
| 372 | − if (IS_ERR_VALUE(tmp)) { | |
| 374 | + if (IS_ERR_VALUE_U32(tmp)) { | |
| 373 | 375 | /* no more entries for port _i_ */ |
| 374 | 376 | /* pr_debug("erom: slave port %d " |
| 375 | 377 | * "has %d descriptors\n", i, j); */ |
| @@ -386,7 +388,7 @@ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr, · 10 unmodified lines | ||
| 386 | 388 | for (j = 0; ; j++) { |
| 387 | 389 | tmp = bcma_erom_get_addr_desc(bus, eromptr, |
| 388 | 390 | SCAN_ADDR_TYPE_MWRAP, i); |
| 389 | − if (IS_ERR_VALUE(tmp)) { | |
| 391 | + if (IS_ERR_VALUE_U32(tmp)) { | |
| 390 | 392 | /* no more entries for port _i_ */ |
| 391 | 393 | /* pr_debug("erom: master wrapper %d " |
| 392 | 394 | * "has %d descriptors\n", i, j); */ |
| @@ -404,7 +406,7 @@ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr, · 11 unmodified lines | ||
| 404 | 406 | for (j = 0; ; j++) { |
| 405 | 407 | tmp = bcma_erom_get_addr_desc(bus, eromptr, |
| 406 | 408 | SCAN_ADDR_TYPE_SWRAP, i + hack); |
| 407 | − if (IS_ERR_VALUE(tmp)) { | |
| 409 | + if (IS_ERR_VALUE_U32(tmp)) { | |
| 408 | 410 | /* no more entries for port _i_ */ |
| 409 | 411 | /* pr_debug("erom: master wrapper %d " |
| 410 | 412 | * has %d descriptors\n", i, j); */ |
| @@ -1189,6 +1189,7 @@ static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode, · 1188 unmodified lines | ||
| 1189 | 1189 | int err; |
| 1190 | 1190 | u32 cp; |
| 1191 | 1191 | |
| 1192 | + memset(&arg64, 0, sizeof(arg64)); | |
| 1192 | 1193 | err = 0; |
| 1193 | 1194 | err |= |
| 1194 | 1195 | copy_from_user(&arg64.LUN_info, &arg32->LUN_info, |
| @@ -1193,6 +1193,7 @@ out_passthru: · 1192 unmodified lines | ||
| 1193 | 1193 | ida_pci_info_struct pciinfo; |
| 1194 | 1194 | |
| 1195 | 1195 | if (!arg) return -EINVAL; |
| 1196 | + memset(&pciinfo, 0, sizeof(pciinfo)); | |
| 1196 | 1197 | pciinfo.bus = host->pci_dev->bus->number; |
| 1197 | 1198 | pciinfo.dev_fn = host->pci_dev->devfn; |
| 1198 | 1199 | pciinfo.board_id = host->board_id; |
| @@ -931,12 +931,14 @@ static const char *rbd_dev_v1_snap_name(struct rbd_device *rbd_dev, · 930 unmodified lines | ||
| 931 | 931 | u64 snap_id) |
| 932 | 932 | { |
| 933 | 933 | u32 which; |
| 934 | + const char *snap_name; | |
| 934 | 935 | |
| 935 | 936 | which = rbd_dev_snap_index(rbd_dev, snap_id); |
| 936 | 937 | if (which == BAD_SNAP_INDEX) |
| 937 | − return NULL; | |
| 938 | + return ERR_PTR(-ENOENT); | |
| 938 | 939 | |
| 939 | − return _rbd_dev_v1_snap_name(rbd_dev, which); | |
| 940 | + snap_name = _rbd_dev_v1_snap_name(rbd_dev, which); | |
| 941 | + return snap_name ? snap_name : ERR_PTR(-ENOMEM); | |
| 940 | 942 | } |
| 941 | 943 | |
| 942 | 944 | static const char *rbd_snap_name(struct rbd_device *rbd_dev, u64 snap_id) |
| @@ -2812,7 +2814,7 @@ out_err: · 1869 unmodified lines | ||
| 2812 | 2814 | obj_request_done_set(obj_request); |
| 2813 | 2815 | } |
| 2814 | 2816 | |
| 2815 | −static int rbd_obj_notify_ack(struct rbd_device *rbd_dev, u64 notify_id) | |
| 2817 | +static int rbd_obj_notify_ack_sync(struct rbd_device *rbd_dev, u64 notify_id) | |
| 2816 | 2818 | { |
| 2817 | 2819 | struct rbd_obj_request *obj_request; |
| 2818 | 2820 | struct ceph_osd_client *osdc = &rbd_dev->rbd_client->client->osdc; |
| @@ -2827,16 +2829,17 @@ static int rbd_obj_notify_ack(struct rbd_device *rbd_dev, u64 notify_id) · 8 unmodified lines | ||
| 2827 | 2829 | obj_request->osd_req = rbd_osd_req_create(rbd_dev, false, obj_request); |
| 2828 | 2830 | if (!obj_request->osd_req) |
| 2829 | 2831 | goto out; |
| 2830 | − obj_request->callback = rbd_obj_request_put; | |
| 2831 | 2832 | |
| 2832 | 2833 | osd_req_op_watch_init(obj_request->osd_req, 0, CEPH_OSD_OP_NOTIFY_ACK, |
| 2833 | 2834 | notify_id, 0, 0); |
| 2834 | 2835 | rbd_osd_req_format_read(obj_request); |
| 2835 | 2836 | |
| 2836 | 2837 | ret = rbd_obj_request_submit(osdc, obj_request); |
| 2837 | −out: | |
| 2838 | 2838 | if (ret) |
| 2839 | − rbd_obj_request_put(obj_request); | |
| 2839 | + goto out; | |
| 2840 | + ret = rbd_obj_request_wait(obj_request); | |
| 2841 | +out: | |
| 2842 | + rbd_obj_request_put(obj_request); | |
| 2840 | 2843 | |
| 2841 | 2844 | return ret; |
| 2842 | 2845 | } |
| @@ -2856,7 +2859,7 @@ static void rbd_watch_cb(u64 ver, u64 notify_id, u8 opcode, void *data) · 13 unmodified lines | ||
| 2856 | 2859 | if (ret) |
| 2857 | 2860 | rbd_warn(rbd_dev, "header refresh error (%d)\n", ret); |
| 2858 | 2861 | |
| 2859 | − rbd_obj_notify_ack(rbd_dev, notify_id); | |
| 2862 | + rbd_obj_notify_ack_sync(rbd_dev, notify_id); | |
| 2860 | 2863 | } |
| 2861 | 2864 | |
| 2862 | 2865 | /* |
| @@ -3328,6 +3331,31 @@ static void rbd_exists_validate(struct rbd_device *rbd_dev) · 465 unmodified lines | ||
| 3328 | 3331 | clear_bit(RBD_DEV_FLAG_EXISTS, &rbd_dev->flags); |
| 3329 | 3332 | } |
| 3330 | 3333 | |
| 3334 | +static void rbd_dev_update_size(struct rbd_device *rbd_dev) | |
| 3335 | +{ | |
| 3336 | + sector_t size; | |
| 3337 | + bool removing; | |
| 3338 | + | |
| 3339 | + /* | |
| 3340 | + * Don't hold the lock while doing disk operations, | |
| 3341 | + * or lock ordering will conflict with the bdev mutex via: | |
| 3342 | + * rbd_add() -> blkdev_get() -> rbd_open() | |
| 3343 | + */ | |
| 3344 | + spin_lock_irq(&rbd_dev->lock); | |
| 3345 | + removing = test_bit(RBD_DEV_FLAG_REMOVING, &rbd_dev->flags); | |
| 3346 | + spin_unlock_irq(&rbd_dev->lock); | |
| 3347 | + /* | |
| 3348 | + * If the device is being removed, rbd_dev->disk has | |
| 3349 | + * been destroyed, so don't try to update its size | |
| 3350 | + */ | |
| 3351 | + if (!removing) { | |
| 3352 | + size = (sector_t)rbd_dev->mapping.size / SECTOR_SIZE; | |
| 3353 | + dout("setting size to %llu sectors", (unsigned long long)size); | |
| 3354 | + set_capacity(rbd_dev->disk, size); | |
| 3355 | + revalidate_disk(rbd_dev->disk); | |
| 3356 | + } | |
| 3357 | +} | |
| 3358 | + | |
| 3331 | 3359 | static int rbd_dev_refresh(struct rbd_device *rbd_dev) |
| 3332 | 3360 | { |
| 3333 | 3361 | u64 mapping_size; |
| @@ -3347,12 +3375,7 @@ static int rbd_dev_refresh(struct rbd_device *rbd_dev) · 13 unmodified lines | ||
| 3347 | 3375 | up_write(&rbd_dev->header_rwsem); |
| 3348 | 3376 | |
| 3349 | 3377 | if (mapping_size != rbd_dev->mapping.size) { |
| 3350 | − sector_t size; | |
| 3351 | − | |
| 3352 | − size = (sector_t)rbd_dev->mapping.size / SECTOR_SIZE; | |
| 3353 | − dout("setting size to %llu sectors", (unsigned long long)size); | |
| 3354 | − set_capacity(rbd_dev->disk, size); | |
| 3355 | − revalidate_disk(rbd_dev->disk); | |
| 3378 | + rbd_dev_update_size(rbd_dev); | |
| 3356 | 3379 | } |
| 3357 | 3380 | |
| 3358 | 3381 | return ret; |
| @@ -4061,8 +4084,13 @@ static u64 rbd_v2_snap_id_by_name(struct rbd_device *rbd_dev, const char *name) · 702 unmodified lines | ||
| 4061 | 4084 | |
| 4062 | 4085 | snap_id = snapc->snaps[which]; |
| 4063 | 4086 | snap_name = rbd_dev_v2_snap_name(rbd_dev, snap_id); |
| 4064 | − if (IS_ERR(snap_name)) | |
| 4065 | − break; | |
| 4087 | + if (IS_ERR(snap_name)) { | |
| 4088 | + /* ignore no-longer existing snapshots */ | |
| 4089 | + if (PTR_ERR(snap_name) == -ENOENT) | |
| 4090 | + continue; | |
| 4091 | + else | |
| 4092 | + break; | |
| 4093 | + } | |
| 4066 | 4094 | found = !strcmp(name, snap_name); |
| 4067 | 4095 | kfree(snap_name); |
| 4068 | 4096 | } |
| @@ -4141,8 +4169,8 @@ static int rbd_dev_spec_update(struct rbd_device *rbd_dev) · 72 unmodified lines | ||
| 4141 | 4169 | /* Look up the snapshot name, and make a copy */ |
| 4142 | 4170 | |
| 4143 | 4171 | snap_name = rbd_snap_name(rbd_dev, spec->snap_id); |
| 4144 | − if (!snap_name) { | |
| 4145 | − ret = -ENOMEM; | |
| 4172 | + if (IS_ERR(snap_name)) { | |
| 4173 | + ret = PTR_ERR(snap_name); | |
| 4146 | 4174 | goto out_err; |
| 4147 | 4175 | } |
| 4148 | 4176 | |
| @@ -5163,10 +5191,23 @@ static ssize_t rbd_remove(struct bus_type *bus, · 1014 unmodified lines | ||
| 5163 | 5191 | if (ret < 0 || already) |
| 5164 | 5192 | return ret; |
| 5165 | 5193 | |
| 5166 | − rbd_bus_del_dev(rbd_dev); | |
| 5167 | 5194 | ret = rbd_dev_header_watch_sync(rbd_dev, false); |
| 5168 | 5195 | if (ret) |
| 5169 | 5196 | rbd_warn(rbd_dev, "failed to cancel watch event (%d)\n", ret); |
| 5197 | + | |
| 5198 | + /* | |
| 5199 | + * flush remaining watch callbacks - these must be complete | |
| 5200 | + * before the osd_client is shutdown | |
| 5201 | + */ | |
| 5202 | + dout("%s: flushing notifies", __func__); | |
| 5203 | + ceph_osdc_flush_notifies(&rbd_dev->rbd_client->client->osdc); | |
| 5204 | + /* | |
| 5205 | + * Don't free anything from rbd_dev->disk until after all | |
| 5206 | + * notifies are completely processed. Otherwise | |
| 5207 | + * rbd_bus_del_dev() will race with rbd_watch_cb(), resulting | |
| 5208 | + * in a potential use after free of rbd_dev->disk or rbd_dev. | |
| 5209 | + */ | |
| 5210 | + rbd_bus_del_dev(rbd_dev); | |
| 5170 | 5211 | rbd_dev_image_release(rbd_dev); |
| 5171 | 5212 | module_put(THIS_MODULE); |
| 5172 | 5213 | |
| @@ -85,6 +85,7 @@ static struct usb_device_id ath3k_table[] = { · 84 unmodified lines | ||
| 85 | 85 | { USB_DEVICE(0x04CA, 0x3008) }, |
| 86 | 86 | { USB_DEVICE(0x13d3, 0x3362) }, |
| 87 | 87 | { USB_DEVICE(0x0CF3, 0xE004) }, |
| 88 | + { USB_DEVICE(0x0CF3, 0xE005) }, | |
| 88 | 89 | { USB_DEVICE(0x0930, 0x0219) }, |
| 89 | 90 | { USB_DEVICE(0x0489, 0xe057) }, |
| 90 | 91 | { USB_DEVICE(0x13d3, 0x3393) }, |
| @@ -126,6 +127,7 @@ static struct usb_device_id ath3k_blist_tbl[] = { · 35 unmodified lines | ||
| 126 | 127 | { USB_DEVICE(0x04ca, 0x3008), .driver_info = BTUSB_ATH3012 }, |
| 127 | 128 | { USB_DEVICE(0x13d3, 0x3362), .driver_info = BTUSB_ATH3012 }, |
| 128 | 129 | { USB_DEVICE(0x0cf3, 0xe004), .driver_info = BTUSB_ATH3012 }, |
| 130 | + { USB_DEVICE(0x0cf3, 0xe005), .driver_info = BTUSB_ATH3012 }, | |
| 129 | 131 | { USB_DEVICE(0x0930, 0x0219), .driver_info = BTUSB_ATH3012 }, |
| 130 | 132 | { USB_DEVICE(0x0489, 0xe057), .driver_info = BTUSB_ATH3012 }, |
| 131 | 133 | { USB_DEVICE(0x13d3, 0x3393), .driver_info = BTUSB_ATH3012 }, |
| @@ -102,6 +102,7 @@ static struct usb_device_id btusb_table[] = { · 101 unmodified lines | ||
| 102 | 102 | |
| 103 | 103 | /* Broadcom BCM20702A0 */ |
| 104 | 104 | { USB_DEVICE(0x0b05, 0x17b5) }, |
| 105 | + { USB_DEVICE(0x0b05, 0x17cb) }, | |
| 105 | 106 | { USB_DEVICE(0x04ca, 0x2003) }, |
| 106 | 107 | { USB_DEVICE(0x0489, 0xe042) }, |
| 107 | 108 | { USB_DEVICE(0x413c, 0x8197) }, |
| @@ -112,6 +113,9 @@ static struct usb_device_id btusb_table[] = { · 4 unmodified lines | ||
| 112 | 113 | /*Broadcom devices with vendor specific id */ |
| 113 | 114 | { USB_VENDOR_AND_INTERFACE_INFO(0x0a5c, 0xff, 0x01, 0x01) }, |
| 114 | 115 | |
| 116 | + /* Belkin F8065bf - Broadcom based */ | |
| 117 | + { USB_VENDOR_AND_INTERFACE_INFO(0x050d, 0xff, 0x01, 0x01) }, | |
| 118 | + | |
| 115 | 119 | { } /* Terminating entry */ |
| 116 | 120 | }; |
| 117 | 121 | |
| @@ -148,6 +152,7 @@ static struct usb_device_id blacklist_table[] = { · 30 unmodified lines | ||
| 148 | 152 | { USB_DEVICE(0x04ca, 0x3008), .driver_info = BTUSB_ATH3012 }, |
| 149 | 153 | { USB_DEVICE(0x13d3, 0x3362), .driver_info = BTUSB_ATH3012 }, |
| 150 | 154 | { USB_DEVICE(0x0cf3, 0xe004), .driver_info = BTUSB_ATH3012 }, |
| 155 | + { USB_DEVICE(0x0cf3, 0xe005), .driver_info = BTUSB_ATH3012 }, | |
| 151 | 156 | { USB_DEVICE(0x0930, 0x0219), .driver_info = BTUSB_ATH3012 }, |
| 152 | 157 | { USB_DEVICE(0x0489, 0xe057), .driver_info = BTUSB_ATH3012 }, |
| 153 | 158 | { USB_DEVICE(0x13d3, 0x3393), .driver_info = BTUSB_ATH3012 }, |
| @@ -700,6 +700,7 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus, · 699 unmodified lines | ||
| 700 | 700 | phys_addr_t sdramwins_phys_base, |
| 701 | 701 | size_t sdramwins_size) |
| 702 | 702 | { |
| 703 | + struct device_node *np; | |
| 703 | 704 | int win; |
| 704 | 705 | |
| 705 | 706 | mbus->mbuswins_base = ioremap(mbuswins_phys_base, mbuswins_size); |
| @@ -712,8 +713,11 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus, · 6 unmodified lines | ||
| 712 | 713 | return -ENOMEM; |
| 713 | 714 | } |
| 714 | 715 | |
| 715 | − if (of_find_compatible_node(NULL, NULL, "marvell,coherency-fabric")) | |
| 716 | + np = of_find_compatible_node(NULL, NULL, "marvell,coherency-fabric"); | |
| 717 | + if (np) { | |
| 716 | 718 | mbus->hw_io_coherency = 1; |
| 719 | + of_node_put(np); | |
| 720 | + } | |
| 717 | 721 | |
| 718 | 722 | for (win = 0; win < mbus->soc->num_wins; win++) |
| 719 | 723 | mvebu_mbus_disable_window(mbus, win); |
| @@ -861,11 +865,13 @@ static void __init mvebu_mbus_get_pcie_resources(struct device_node *np, · 141 unmodified lines | ||
| 861 | 865 | int ret; |
| 862 | 866 | |
| 863 | 867 | /* |
| 864 | − * These are optional, so we clear them and they'll | |
| 865 | − * be zero if they are missing from the DT. | |
| 868 | + * These are optional, so we make sure that resource_size(x) will | |
| 869 | + * return 0. | |
| 866 | 870 | */ |
| 867 | 871 | memset(mem, 0, sizeof(struct resource)); |
| 872 | + mem->end = -1; | |
| 868 | 873 | memset(io, 0, sizeof(struct resource)); |
| 874 | + io->end = -1; | |
| 869 | 875 | |
| 870 | 876 | ret = of_property_read_u32_array(np, "pcie-mem-aperture", reg, ARRAY_SIZE(reg)); |
| 871 | 877 | if (!ret) { |
| @@ -142,32 +142,6 @@ static int vtpm_recv(struct tpm_chip *chip, u8 *buf, size_t count) · 141 unmodified lines | ||
| 142 | 142 | return length; |
| 143 | 143 | } |
| 144 | 144 | |
| 145 | −ssize_t tpm_show_locality(struct device *dev, struct device_attribute *attr, | |
| 146 | − char *buf) | |
| 147 | −{ | |
| 148 | − struct tpm_chip *chip = dev_get_drvdata(dev); | |
| 149 | − struct tpm_private *priv = TPM_VPRIV(chip); | |
| 150 | − u8 locality = priv->shr->locality; | |
| 151 | − | |
| 152 | − return sprintf(buf, "%d\n", locality); | |
| 153 | −} | |
| 154 | − | |
| 155 | −ssize_t tpm_store_locality(struct device *dev, struct device_attribute *attr, | |
| 156 | − const char *buf, size_t len) | |
| 157 | −{ | |
| 158 | − struct tpm_chip *chip = dev_get_drvdata(dev); | |
| 159 | − struct tpm_private *priv = TPM_VPRIV(chip); | |
| 160 | − u8 val; | |
| 161 | − | |
| 162 | − int rv = kstrtou8(buf, 0, &val); | |
| 163 | − if (rv) | |
| 164 | − return rv; | |
| 165 | − | |
| 166 | − priv->shr->locality = val; | |
| 167 | − | |
| 168 | − return len; | |
| 169 | −} | |
| 170 | − | |
| 171 | 145 | static const struct file_operations vtpm_ops = { |
| 172 | 146 | .owner = THIS_MODULE, |
| 173 | 147 | .llseek = no_llseek, |
| @@ -188,8 +162,6 @@ static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps, NULL); · 14 unmodified lines | ||
| 188 | 162 | static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel); |
| 189 | 163 | static DEVICE_ATTR(durations, S_IRUGO, tpm_show_durations, NULL); |
| 190 | 164 | static DEVICE_ATTR(timeouts, S_IRUGO, tpm_show_timeouts, NULL); |
| 191 | −static DEVICE_ATTR(locality, S_IRUGO | S_IWUSR, tpm_show_locality, | |
| 192 | − tpm_store_locality); | |
| 193 | 165 | |
| 194 | 166 | static struct attribute *vtpm_attrs[] = { |
| 195 | 167 | &dev_attr_pubek.attr, |
| @@ -202,7 +174,6 @@ static struct attribute *vtpm_attrs[] = { · 6 unmodified lines | ||
| 202 | 174 | &dev_attr_cancel.attr, |
| 203 | 175 | &dev_attr_durations.attr, |
| 204 | 176 | &dev_attr_timeouts.attr, |
| 205 | − &dev_attr_locality.attr, | |
| 206 | 177 | NULL, |
| 207 | 178 | }; |
| 208 | 179 | |
| @@ -210,8 +181,6 @@ static struct attribute_group vtpm_attr_grp = { · 1 unmodified line | ||
| 210 | 181 | .attrs = vtpm_attrs, |
| 211 | 182 | }; |
| 212 | 183 | |
| 213 | −#define TPM_LONG_TIMEOUT (10 * 60 * HZ) | |
| 214 | − | |
| 215 | 184 | static const struct tpm_vendor_specific tpm_vtpm = { |
| 216 | 185 | .status = vtpm_status, |
| 217 | 186 | .recv = vtpm_recv, |
| @@ -224,11 +193,6 @@ static const struct tpm_vendor_specific tpm_vtpm = { · 6 unmodified lines | ||
| 224 | 193 | .miscdev = { |
| 225 | 194 | .fops = &vtpm_ops, |
| 226 | 195 | }, |
| 227 | − .duration = { | |
| 228 | − TPM_LONG_TIMEOUT, | |
| 229 | − TPM_LONG_TIMEOUT, | |
| 230 | − TPM_LONG_TIMEOUT, | |
| 231 | − }, | |
| 232 | 196 | }; |
| 233 | 197 | |
| 234 | 198 | static irqreturn_t tpmif_interrupt(int dummy, void *dev_id) |
| @@ -26,6 +26,7 @@ config DW_APB_TIMER_OF · 25 unmodified lines | ||
| 26 | 26 | |
| 27 | 27 | config ARMADA_370_XP_TIMER |
| 28 | 28 | bool |
| 29 | + select CLKSRC_OF | |
| 29 | 30 | |
| 30 | 31 | config ORION_TIMER |
| 31 | 32 | select CLKSRC_OF |
| @@ -30,6 +30,9 @@ void __init clocksource_of_init(void) · 29 unmodified lines | ||
| 30 | 30 | clocksource_of_init_fn init_func; |
| 31 | 31 | |
| 32 | 32 | for_each_matching_node_and_match(np, __clksrc_of_table, &match) { |
| 33 | + if (!of_device_is_available(np)) | |
| 34 | + continue; | |
| 35 | + | |
| 33 | 36 | init_func = match->data; |
| 34 | 37 | init_func(np); |
| 35 | 38 | } |
| @@ -301,7 +301,7 @@ static void em_sti_register_clockevent(struct em_sti_priv *p) · 300 unmodified lines | ||
| 301 | 301 | ced->name = dev_name(&p->pdev->dev); |
| 302 | 302 | ced->features = CLOCK_EVT_FEAT_ONESHOT; |
| 303 | 303 | ced->rating = 200; |
| 304 | − ced->cpumask = cpumask_of(0); | |
| 304 | + ced->cpumask = cpu_possible_mask; | |
| 305 | 305 | ced->set_next_event = em_sti_clock_event_next; |
| 306 | 306 | ced->set_mode = em_sti_clock_event_mode; |
| 307 | 307 | |
| @@ -428,7 +428,6 @@ static int exynos4_local_timer_setup(struct clock_event_device *evt) · 427 unmodified lines | ||
| 428 | 428 | evt->irq); |
| 429 | 429 | return -EIO; |
| 430 | 430 | } |
| 431 | − irq_set_affinity(evt->irq, cpumask_of(cpu)); | |
| 432 | 431 | } else { |
| 433 | 432 | enable_percpu_irq(mct_irqs[MCT_L0_IRQ], 0); |
| 434 | 433 | } |
| @@ -449,6 +448,7 @@ static int exynos4_mct_cpu_notify(struct notifier_block *self, · 14 unmodified lines | ||
| 449 | 448 | unsigned long action, void *hcpu) |
| 450 | 449 | { |
| 451 | 450 | struct mct_clock_event_device *mevt; |
| 451 | + unsigned int cpu; | |
| 452 | 452 | |
| 453 | 453 | /* |
| 454 | 454 | * Grab cpu pointer in each case to avoid spurious |
| @@ -459,6 +459,12 @@ static int exynos4_mct_cpu_notify(struct notifier_block *self, · 4 unmodified lines | ||
| 459 | 459 | mevt = this_cpu_ptr(&percpu_mct_tick); |
| 460 | 460 | exynos4_local_timer_setup(&mevt->evt); |
| 461 | 461 | break; |
| 462 | + case CPU_ONLINE: | |
| 463 | + cpu = (unsigned long)hcpu; | |
| 464 | + if (mct_int_type == MCT_INT_SPI) | |
| 465 | + irq_set_affinity(mct_irqs[MCT_L0_IRQ + cpu], | |
| 466 | + cpumask_of(cpu)); | |
| 467 | + break; | |
| 462 | 468 | case CPU_DYING: |
| 463 | 469 | mevt = this_cpu_ptr(&percpu_mct_tick); |
| 464 | 470 | exynos4_local_timer_stop(&mevt->evt); |
| @@ -500,6 +506,8 @@ static void __init exynos4_timer_resources(struct device_node *np, void __iomem · 35 unmodified lines | ||
| 500 | 506 | &percpu_mct_tick); |
| 501 | 507 | WARN(err, "MCT: can't request IRQ %d (%d)\n", |
| 502 | 508 | mct_irqs[MCT_L0_IRQ], err); |
| 509 | + } else { | |
| 510 | + irq_set_affinity(mct_irqs[MCT_L0_IRQ], cpumask_of(0)); | |
| 503 | 511 | } |
| 504 | 512 | |
| 505 | 513 | err = register_cpu_notifier(&exynos4_mct_cpu_nb); |
| @@ -986,6 +986,10 @@ static int __init acpi_cpufreq_init(void) · 985 unmodified lines | ||
| 986 | 986 | { |
| 987 | 987 | int ret; |
| 988 | 988 | |
| 989 | + /* don't keep reloading if cpufreq_driver exists */ | |
| 990 | + if (cpufreq_get_current_driver()) | |
| 991 | + return 0; | |
| 992 | + | |
| 989 | 993 | if (acpi_disabled) |
| 990 | 994 | return 0; |
| 991 | 995 | |
| @@ -12,6 +12,7 @@ · 11 unmodified lines | ||
| 12 | 12 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 13 | 13 | |
| 14 | 14 | #include <linux/clk.h> |
| 15 | +#include <linux/cpu.h> | |
| 15 | 16 | #include <linux/cpufreq.h> |
| 16 | 17 | #include <linux/err.h> |
| 17 | 18 | #include <linux/module.h> |
| @@ -177,7 +178,11 @@ static int cpu0_cpufreq_probe(struct platform_device *pdev) · 159 unmodified lines | ||
| 177 | 178 | struct device_node *np; |
| 178 | 179 | int ret; |
| 179 | 180 | |
| 180 | − cpu_dev = &pdev->dev; | |
| 181 | + cpu_dev = get_cpu_device(0); | |
| 182 | + if (!cpu_dev) { | |
| 183 | + pr_err("failed to get cpu0 device\n"); | |
| 184 | + return -ENODEV; | |
| 185 | + } | |
| 181 | 186 | |
| 182 | 187 | np = of_node_get(cpu_dev->of_node); |
| 183 | 188 | if (!np) { |
| @@ -224,7 +229,7 @@ static int cpu0_cpufreq_probe(struct platform_device *pdev) · 40 unmodified lines | ||
| 224 | 229 | if (of_property_read_u32(np, "clock-latency", &transition_latency)) |
| 225 | 230 | transition_latency = CPUFREQ_ETERNAL; |
| 226 | 231 | |
| 227 | − if (cpu_reg) { | |
| 232 | + if (!IS_ERR(cpu_reg)) { | |
| 228 | 233 | struct opp *opp; |
| 229 | 234 | unsigned long min_uV, max_uV; |
| 230 | 235 | int i; |
| @@ -952,9 +952,20 @@ static void update_policy_cpu(struct cpufreq_policy *policy, unsigned int cpu) · 951 unmodified lines | ||
| 952 | 952 | if (cpu == policy->cpu) |
| 953 | 953 | return; |
| 954 | 954 | |
| 955 | + /* | |
| 956 | + * Take direct locks as lock_policy_rwsem_write wouldn't work here. | |
| 957 | + * Also lock for last cpu is enough here as contention will happen only | |
| 958 | + * after policy->cpu is changed and after it is changed, other threads | |
| 959 | + * will try to acquire lock for new cpu. And policy is already updated | |
| 960 | + * by then. | |
| 961 | + */ | |
| 962 | + down_write(&per_cpu(cpu_policy_rwsem, policy->cpu)); | |
| 963 | + | |
| 955 | 964 | policy->last_cpu = policy->cpu; |
| 956 | 965 | policy->cpu = cpu; |
| 957 | 966 | |
| 967 | + up_write(&per_cpu(cpu_policy_rwsem, policy->last_cpu)); | |
| 968 | + | |
| 958 | 969 | #ifdef CONFIG_CPU_FREQ_TABLE |
| 959 | 970 | cpufreq_frequency_table_update_policy_cpu(policy); |
| 960 | 971 | #endif |
| @@ -1125,7 +1136,7 @@ static int cpufreq_nominate_new_policy_cpu(struct cpufreq_policy *policy, · 164 unmodified lines | ||
| 1125 | 1136 | int ret; |
| 1126 | 1137 | |
| 1127 | 1138 | /* first sibling now owns the new sysfs dir */ |
| 1128 | − cpu_dev = get_cpu_device(cpumask_first(policy->cpus)); | |
| 1139 | + cpu_dev = get_cpu_device(cpumask_any_but(policy->cpus, old_cpu)); | |
| 1129 | 1140 | |
| 1130 | 1141 | /* Don't touch sysfs files during light-weight tear-down */ |
| 1131 | 1142 | if (frozen) |
| @@ -1189,12 +1200,9 @@ static int __cpufreq_remove_dev_prepare(struct device *dev, · 57 unmodified lines | ||
| 1189 | 1200 | policy->governor->name, CPUFREQ_NAME_LEN); |
| 1190 | 1201 | #endif |
| 1191 | 1202 | |
| 1192 | − WARN_ON(lock_policy_rwsem_write(cpu)); | |
| 1203 | + lock_policy_rwsem_read(cpu); | |
| 1193 | 1204 | cpus = cpumask_weight(policy->cpus); |
| 1194 | − | |
| 1195 | − if (cpus > 1) | |
| 1196 | − cpumask_clear_cpu(cpu, policy->cpus); | |
| 1197 | − unlock_policy_rwsem_write(cpu); | |
| 1205 | + unlock_policy_rwsem_read(cpu); | |
| 1198 | 1206 | |
| 1199 | 1207 | if (cpu != policy->cpu) { |
| 1200 | 1208 | if (!frozen) |
| @@ -1203,9 +1211,7 @@ static int __cpufreq_remove_dev_prepare(struct device *dev, · 2 unmodified lines | ||
| 1203 | 1211 | |
| 1204 | 1212 | new_cpu = cpufreq_nominate_new_policy_cpu(policy, cpu, frozen); |
| 1205 | 1213 | if (new_cpu >= 0) { |
| 1206 | − WARN_ON(lock_policy_rwsem_write(cpu)); | |
| 1207 | 1214 | update_policy_cpu(policy, new_cpu); |
| 1208 | − unlock_policy_rwsem_write(cpu); | |
| 1209 | 1215 | |
| 1210 | 1216 | if (!frozen) { |
| 1211 | 1217 | pr_debug("%s: policy Kobject moved to cpu: %d " |
| @@ -1237,9 +1243,12 @@ static int __cpufreq_remove_dev_finish(struct device *dev, · 25 unmodified lines | ||
| 1237 | 1243 | return -EINVAL; |
| 1238 | 1244 | } |
| 1239 | 1245 | |
| 1240 | − lock_policy_rwsem_read(cpu); | |
| 1246 | + WARN_ON(lock_policy_rwsem_write(cpu)); | |
| 1241 | 1247 | cpus = cpumask_weight(policy->cpus); |
| 1242 | − unlock_policy_rwsem_read(cpu); | |
| 1248 | + | |
| 1249 | + if (cpus > 1) | |
| 1250 | + cpumask_clear_cpu(cpu, policy->cpus); | |
| 1251 | + unlock_policy_rwsem_write(cpu); | |
| 1243 | 1252 | |
| 1244 | 1253 | /* If cpu is last user of policy, free policy */ |
| 1245 | 1254 | if (cpus == 1) { |
| @@ -1451,6 +1460,9 @@ unsigned int cpufreq_get(unsigned int cpu) · 205 unmodified lines | ||
| 1451 | 1460 | { |
| 1452 | 1461 | unsigned int ret_freq = 0; |
| 1453 | 1462 | |
| 1463 | + if (cpufreq_disabled() || !cpufreq_driver) | |
| 1464 | + return -ENOENT; | |
| 1465 | + | |
| 1454 | 1466 | if (!down_read_trylock(&cpufreq_rwsem)) |
| 1455 | 1467 | return 0; |
| 1456 | 1468 | |
| @@ -2095,7 +2107,7 @@ int cpufreq_register_driver(struct cpufreq_driver *driver_data) · 638 unmodified lines | ||
| 2095 | 2107 | write_lock_irqsave(&cpufreq_driver_lock, flags); |
| 2096 | 2108 | if (cpufreq_driver) { |
| 2097 | 2109 | write_unlock_irqrestore(&cpufreq_driver_lock, flags); |
| 2098 | − return -EBUSY; | |
| 2110 | + return -EEXIST; | |
| 2099 | 2111 | } |
| 2100 | 2112 | cpufreq_driver = driver_data; |
| 2101 | 2113 | write_unlock_irqrestore(&cpufreq_driver_lock, flags); |
| @@ -457,7 +457,7 @@ err_free_table: · 456 unmodified lines | ||
| 457 | 457 | opp_free_cpufreq_table(dvfs_info->dev, &dvfs_info->freq_table); |
| 458 | 458 | err_put_node: |
| 459 | 459 | of_node_put(np); |
| 460 | − dev_err(dvfs_info->dev, "%s: failed initialization\n", __func__); | |
| 460 | + dev_err(&pdev->dev, "%s: failed initialization\n", __func__); | |
| 461 | 461 | return ret; |
| 462 | 462 | } |
| 463 | 463 | |
| @@ -7,6 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | */ |
| 8 | 8 | |
| 9 | 9 | #include <linux/clk.h> |
| 10 | +#include <linux/cpu.h> | |
| 10 | 11 | #include <linux/cpufreq.h> |
| 11 | 12 | #include <linux/delay.h> |
| 12 | 13 | #include <linux/err.h> |
| @@ -202,7 +203,11 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev) · 189 unmodified lines | ||
| 202 | 203 | unsigned long min_volt, max_volt; |
| 203 | 204 | int num, ret; |
| 204 | 205 | |
| 205 | − cpu_dev = &pdev->dev; | |
| 206 | + cpu_dev = get_cpu_device(0); | |
| 207 | + if (!cpu_dev) { | |
| 208 | + pr_err("failed to get cpu0 device\n"); | |
| 209 | + return -ENODEV; | |
| 210 | + } | |
| 206 | 211 | |
| 207 | 212 | np = of_node_get(cpu_dev->of_node); |
| 208 | 213 | if (!np) { |
| @@ -394,7 +394,10 @@ static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate) · 393 unmodified lines | ||
| 394 | 394 | trace_cpu_frequency(pstate * 100000, cpu->cpu); |
| 395 | 395 | |
| 396 | 396 | cpu->pstate.current_pstate = pstate; |
| 397 | − wrmsrl(MSR_IA32_PERF_CTL, pstate << 8); | |
| 397 | + if (limits.no_turbo) | |
| 398 | + wrmsrl(MSR_IA32_PERF_CTL, BIT(32) | (pstate << 8)); | |
| 399 | + else | |
| 400 | + wrmsrl(MSR_IA32_PERF_CTL, pstate << 8); | |
| 398 | 401 | |
| 399 | 402 | } |
| 400 | 403 | |
| @@ -113,7 +113,7 @@ static int spear_cpufreq_target(struct cpufreq_policy *policy, · 112 unmodified lines | ||
| 113 | 113 | unsigned int target_freq, unsigned int relation) |
| 114 | 114 | { |
| 115 | 115 | struct cpufreq_freqs freqs; |
| 116 | − unsigned long newfreq; | |
| 116 | + long newfreq; | |
| 117 | 117 | struct clk *srcclk; |
| 118 | 118 | int index, ret, mult = 1; |
| 119 | 119 | |
| @@ -198,6 +198,7 @@ config TI_EDMA · 197 unmodified lines | ||
| 198 | 198 | depends on ARCH_DAVINCI || ARCH_OMAP |
| 199 | 199 | select DMA_ENGINE |
| 200 | 200 | select DMA_VIRTUAL_CHANNELS |
| 201 | + select TI_PRIV_EDMA | |
| 201 | 202 | default n |
| 202 | 203 | help |
| 203 | 204 | Enable support for the TI EDMA controller. This DMA |
| @@ -749,6 +749,6 @@ static void __exit edma_exit(void) · 748 unmodified lines | ||
| 749 | 749 | } |
| 750 | 750 | module_exit(edma_exit); |
| 751 | 751 | |
| 752 | −MODULE_AUTHOR("Matt Porter <mporter@ti.com>"); | |
| 752 | +MODULE_AUTHOR("Matt Porter <matt.porter@linaro.org>"); | |
| 753 | 753 | MODULE_DESCRIPTION("TI EDMA DMA engine driver"); |
| 754 | 754 | MODULE_LICENSE("GPL v2"); |
| @@ -437,17 +437,18 @@ static void dma_irq_handle_channel(struct imxdma_channel *imxdmac) · 436 unmodified lines | ||
| 437 | 437 | struct imxdma_engine *imxdma = imxdmac->imxdma; |
| 438 | 438 | int chno = imxdmac->channel; |
| 439 | 439 | struct imxdma_desc *desc; |
| 440 | + unsigned long flags; | |
| 440 | 441 | |
| 441 | − spin_lock(&imxdma->lock); | |
| 442 | + spin_lock_irqsave(&imxdma->lock, flags); | |
| 442 | 443 | if (list_empty(&imxdmac->ld_active)) { |
| 443 | − spin_unlock(&imxdma->lock); | |
| 444 | + spin_unlock_irqrestore(&imxdma->lock, flags); | |
| 444 | 445 | goto out; |
| 445 | 446 | } |
| 446 | 447 | |
| 447 | 448 | desc = list_first_entry(&imxdmac->ld_active, |
| 448 | 449 | struct imxdma_desc, |
| 449 | 450 | node); |
| 450 | − spin_unlock(&imxdma->lock); | |
| 451 | + spin_unlock_irqrestore(&imxdma->lock, flags); | |
| 451 | 452 | |
| 452 | 453 | if (desc->sg) { |
| 453 | 454 | u32 tmp; |
| @@ -519,7 +520,6 @@ static int imxdma_xfer_desc(struct imxdma_desc *d) · 65 unmodified lines | ||
| 519 | 520 | { |
| 520 | 521 | struct imxdma_channel *imxdmac = to_imxdma_chan(d->desc.chan); |
| 521 | 522 | struct imxdma_engine *imxdma = imxdmac->imxdma; |
| 522 | − unsigned long flags; | |
| 523 | 523 | int slot = -1; |
| 524 | 524 | int i; |
| 525 | 525 | |
| @@ -527,7 +527,6 @@ static int imxdma_xfer_desc(struct imxdma_desc *d) · 1 unmodified line | ||
| 527 | 527 | switch (d->type) { |
| 528 | 528 | case IMXDMA_DESC_INTERLEAVED: |
| 529 | 529 | /* Try to get a free 2D slot */ |
| 530 | − spin_lock_irqsave(&imxdma->lock, flags); | |
| 531 | 530 | for (i = 0; i < IMX_DMA_2D_SLOTS; i++) { |
| 532 | 531 | if ((imxdma->slots_2d[i].count > 0) && |
| 533 | 532 | ((imxdma->slots_2d[i].xsr != d->x) || |
| @@ -537,10 +536,8 @@ static int imxdma_xfer_desc(struct imxdma_desc *d) · 3 unmodified lines | ||
| 537 | 536 | slot = i; |
| 538 | 537 | break; |
| 539 | 538 | } |
| 540 | − if (slot < 0) { | |
| 541 | − spin_unlock_irqrestore(&imxdma->lock, flags); | |
| 539 | + if (slot < 0) | |
| 542 | 540 | return -EBUSY; |
| 543 | − } | |
| 544 | 541 | |
| 545 | 542 | imxdma->slots_2d[slot].xsr = d->x; |
| 546 | 543 | imxdma->slots_2d[slot].ysr = d->y; |
| @@ -549,7 +546,6 @@ static int imxdma_xfer_desc(struct imxdma_desc *d) · 2 unmodified lines | ||
| 549 | 546 | |
| 550 | 547 | imxdmac->slot_2d = slot; |
| 551 | 548 | imxdmac->enabled_2d = true; |
| 552 | − spin_unlock_irqrestore(&imxdma->lock, flags); | |
| 553 | 549 | |
| 554 | 550 | if (slot == IMX_DMA_2D_SLOT_A) { |
| 555 | 551 | d->config_mem &= ~CCR_MSEL_B; |
| @@ -625,18 +621,17 @@ static void imxdma_tasklet(unsigned long data) · 69 unmodified lines | ||
| 625 | 621 | struct imxdma_channel *imxdmac = (void *)data; |
| 626 | 622 | struct imxdma_engine *imxdma = imxdmac->imxdma; |
| 627 | 623 | struct imxdma_desc *desc; |
| 624 | + unsigned long flags; | |
| 628 | 625 | |
| 629 | − spin_lock(&imxdma->lock); | |
| 626 | + spin_lock_irqsave(&imxdma->lock, flags); | |
| 630 | 627 | |
| 631 | 628 | if (list_empty(&imxdmac->ld_active)) { |
| 632 | 629 | /* Someone might have called terminate all */ |
| 633 | − goto out; | |
| 630 | + spin_unlock_irqrestore(&imxdma->lock, flags); | |
| 631 | + return; | |
| 634 | 632 | } |
| 635 | 633 | desc = list_first_entry(&imxdmac->ld_active, struct imxdma_desc, node); |
| 636 | 634 | |
| 637 | − if (desc->desc.callback) | |
| 638 | − desc->desc.callback(desc->desc.callback_param); | |
| 639 | − | |
| 640 | 635 | /* If we are dealing with a cyclic descriptor, keep it on ld_active |
| 641 | 636 | * and dont mark the descriptor as complete. |
| 642 | 637 | * Only in non-cyclic cases it would be marked as complete |
| @@ -663,7 +658,11 @@ static void imxdma_tasklet(unsigned long data) · 20 unmodified lines | ||
| 663 | 658 | __func__, imxdmac->channel); |
| 664 | 659 | } |
| 665 | 660 | out: |
| 666 | − spin_unlock(&imxdma->lock); | |
| 661 | + spin_unlock_irqrestore(&imxdma->lock, flags); | |
| 662 | + | |
| 663 | + if (desc->desc.callback) | |
| 664 | + desc->desc.callback(desc->desc.callback_param); | |
| 665 | + | |
| 667 | 666 | } |
| 668 | 667 | |
| 669 | 668 | static int imxdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, |
| @@ -883,7 +882,7 @@ static struct dma_async_tx_descriptor *imxdma_prep_dma_cyclic( · 213 unmodified lines | ||
| 883 | 882 | kfree(imxdmac->sg_list); |
| 884 | 883 | |
| 885 | 884 | imxdmac->sg_list = kcalloc(periods + 1, |
| 886 | − sizeof(struct scatterlist), GFP_KERNEL); | |
| 885 | + sizeof(struct scatterlist), GFP_ATOMIC); | |
| 887 | 886 | if (!imxdmac->sg_list) |
| 888 | 887 | return NULL; |
| 889 | 888 | |
| @@ -63,6 +63,7 @@ struct gpio_bank { · 62 unmodified lines | ||
| 63 | 63 | struct gpio_chip chip; |
| 64 | 64 | struct clk *dbck; |
| 65 | 65 | u32 mod_usage; |
| 66 | + u32 irq_usage; | |
| 66 | 67 | u32 dbck_enable_mask; |
| 67 | 68 | bool dbck_enabled; |
| 68 | 69 | struct device *dev; |
| @@ -86,6 +87,9 @@ struct gpio_bank { · 17 unmodified lines | ||
| 86 | 87 | #define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio)) |
| 87 | 88 | #define GPIO_MOD_CTRL_BIT BIT(0) |
| 88 | 89 | |
| 90 | +#define BANK_USED(bank) (bank->mod_usage || bank->irq_usage) | |
| 91 | +#define LINE_USED(line, offset) (line & (1 << offset)) | |
| 92 | + | |
| 89 | 93 | static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq) |
| 90 | 94 | { |
| 91 | 95 | return bank->chip.base + gpio_irq; |
| @@ -420,15 +424,69 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, · 328 unmodified lines | ||
| 420 | 424 | return 0; |
| 421 | 425 | } |
| 422 | 426 | |
| 427 | +static void _enable_gpio_module(struct gpio_bank *bank, unsigned offset) | |
| 428 | +{ | |
| 429 | + if (bank->regs->pinctrl) { | |
| 430 | + void __iomem *reg = bank->base + bank->regs->pinctrl; | |
| 431 | + | |
| 432 | + /* Claim the pin for MPU */ | |
| 433 | + __raw_writel(__raw_readl(reg) | (1 << offset), reg); | |
| 434 | + } | |
| 435 | + | |
| 436 | + if (bank->regs->ctrl && !BANK_USED(bank)) { | |
| 437 | + void __iomem *reg = bank->base + bank->regs->ctrl; | |
| 438 | + u32 ctrl; | |
| 439 | + | |
| 440 | + ctrl = __raw_readl(reg); | |
| 441 | + /* Module is enabled, clocks are not gated */ | |
| 442 | + ctrl &= ~GPIO_MOD_CTRL_BIT; | |
| 443 | + __raw_writel(ctrl, reg); | |
| 444 | + bank->context.ctrl = ctrl; | |
| 445 | + } | |
| 446 | +} | |
| 447 | + | |
| 448 | +static void _disable_gpio_module(struct gpio_bank *bank, unsigned offset) | |
| 449 | +{ | |
| 450 | + void __iomem *base = bank->base; | |
| 451 | + | |
| 452 | + if (bank->regs->wkup_en && | |
| 453 | + !LINE_USED(bank->mod_usage, offset) && | |
| 454 | + !LINE_USED(bank->irq_usage, offset)) { | |
| 455 | + /* Disable wake-up during idle for dynamic tick */ | |
| 456 | + _gpio_rmw(base, bank->regs->wkup_en, 1 << offset, 0); | |
| 457 | + bank->context.wake_en = | |
| 458 | + __raw_readl(bank->base + bank->regs->wkup_en); | |
| 459 | + } | |
| 460 | + | |
| 461 | + if (bank->regs->ctrl && !BANK_USED(bank)) { | |
| 462 | + void __iomem *reg = bank->base + bank->regs->ctrl; | |
| 463 | + u32 ctrl; | |
| 464 | + | |
| 465 | + ctrl = __raw_readl(reg); | |
| 466 | + /* Module is disabled, clocks are gated */ | |
| 467 | + ctrl |= GPIO_MOD_CTRL_BIT; | |
| 468 | + __raw_writel(ctrl, reg); | |
| 469 | + bank->context.ctrl = ctrl; | |
| 470 | + } | |
| 471 | +} | |
| 472 | + | |
| 473 | +static int gpio_is_input(struct gpio_bank *bank, int mask) | |
| 474 | +{ | |
| 475 | + void __iomem *reg = bank->base + bank->regs->direction; | |
| 476 | + | |
| 477 | + return __raw_readl(reg) & mask; | |
| 478 | +} | |
| 479 | + | |
| 423 | 480 | static int gpio_irq_type(struct irq_data *d, unsigned type) |
| 424 | 481 | { |
| 425 | 482 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
| 426 | 483 | unsigned gpio = 0; |
| 427 | 484 | int retval; |
| 428 | 485 | unsigned long flags; |
| 486 | + unsigned offset; | |
| 429 | 487 | |
| 430 | − if (WARN_ON(!bank->mod_usage)) | |
| 431 | − return -EINVAL; | |
| 488 | + if (!BANK_USED(bank)) | |
| 489 | + pm_runtime_get_sync(bank->dev); | |
| 432 | 490 | |
| 433 | 491 | #ifdef CONFIG_ARCH_OMAP1 |
| 434 | 492 | if (d->irq > IH_MPUIO_BASE) |
| @@ -446,7 +504,17 @@ static int gpio_irq_type(struct irq_data *d, unsigned type) · 11 unmodified lines | ||
| 446 | 504 | return -EINVAL; |
| 447 | 505 | |
| 448 | 506 | spin_lock_irqsave(&bank->lock, flags); |
| 449 | − retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type); | |
| 507 | + offset = GPIO_INDEX(bank, gpio); | |
| 508 | + retval = _set_gpio_triggering(bank, offset, type); | |
| 509 | + if (!LINE_USED(bank->mod_usage, offset)) { | |
| 510 | + _enable_gpio_module(bank, offset); | |
| 511 | + _set_gpio_direction(bank, offset, 1); | |
| 512 | + } else if (!gpio_is_input(bank, 1 << offset)) { | |
| 513 | + spin_unlock_irqrestore(&bank->lock, flags); | |
| 514 | + return -EINVAL; | |
| 515 | + } | |
| 516 | + | |
| 517 | + bank->irq_usage |= 1 << GPIO_INDEX(bank, gpio); | |
| 450 | 518 | spin_unlock_irqrestore(&bank->lock, flags); |
| 451 | 519 | |
| 452 | 520 | if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) |
| @@ -603,35 +671,19 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) · 150 unmodified lines | ||
| 603 | 671 | * If this is the first gpio_request for the bank, |
| 604 | 672 | * enable the bank module. |
| 605 | 673 | */ |
| 606 | − if (!bank->mod_usage) | |
| 674 | + if (!BANK_USED(bank)) | |
| 607 | 675 | pm_runtime_get_sync(bank->dev); |
| 608 | 676 | |
| 609 | 677 | spin_lock_irqsave(&bank->lock, flags); |
| 610 | 678 | /* Set trigger to none. You need to enable the desired trigger with |
| 611 | − * request_irq() or set_irq_type(). | |
| 679 | + * request_irq() or set_irq_type(). Only do this if the IRQ line has | |
| 680 | + * not already been requested. | |
| 612 | 681 | */ |
| 613 | − _set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); | |
| 614 | − | |
| 615 | − if (bank->regs->pinctrl) { | |
| 616 | − void __iomem *reg = bank->base + bank->regs->pinctrl; | |
| 617 | − | |
| 618 | − /* Claim the pin for MPU */ | |
| 619 | − __raw_writel(__raw_readl(reg) | (1 << offset), reg); | |
| 620 | − } | |
| 621 | − | |
| 622 | − if (bank->regs->ctrl && !bank->mod_usage) { | |
| 623 | − void __iomem *reg = bank->base + bank->regs->ctrl; | |
| 624 | − u32 ctrl; | |
| 625 | − | |
| 626 | − ctrl = __raw_readl(reg); | |
| 627 | − /* Module is enabled, clocks are not gated */ | |
| 628 | − ctrl &= ~GPIO_MOD_CTRL_BIT; | |
| 629 | − __raw_writel(ctrl, reg); | |
| 630 | − bank->context.ctrl = ctrl; | |
| 682 | + if (!LINE_USED(bank->irq_usage, offset)) { | |
| 683 | + _set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); | |
| 684 | + _enable_gpio_module(bank, offset); | |
| 631 | 685 | } |
| 632 | − | |
| 633 | 686 | bank->mod_usage |= 1 << offset; |
| 634 | − | |
| 635 | 687 | spin_unlock_irqrestore(&bank->lock, flags); |
| 636 | 688 | |
| 637 | 689 | return 0; |
| @@ -640,31 +692,11 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) · 2 unmodified lines | ||
| 640 | 692 | static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) |
| 641 | 693 | { |
| 642 | 694 | struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); |
| 643 | − void __iomem *base = bank->base; | |
| 644 | 695 | unsigned long flags; |
| 645 | 696 | |
| 646 | 697 | spin_lock_irqsave(&bank->lock, flags); |
| 647 | − | |
| 648 | − if (bank->regs->wkup_en) { | |
| 649 | − /* Disable wake-up during idle for dynamic tick */ | |
| 650 | − _gpio_rmw(base, bank->regs->wkup_en, 1 << offset, 0); | |
| 651 | − bank->context.wake_en = | |
| 652 | − __raw_readl(bank->base + bank->regs->wkup_en); | |
| 653 | − } | |
| 654 | − | |
| 655 | 698 | bank->mod_usage &= ~(1 << offset); |
| 656 | − | |
| 657 | − if (bank->regs->ctrl && !bank->mod_usage) { | |
| 658 | − void __iomem *reg = bank->base + bank->regs->ctrl; | |
| 659 | − u32 ctrl; | |
| 660 | − | |
| 661 | − ctrl = __raw_readl(reg); | |
| 662 | − /* Module is disabled, clocks are gated */ | |
| 663 | − ctrl |= GPIO_MOD_CTRL_BIT; | |
| 664 | − __raw_writel(ctrl, reg); | |
| 665 | − bank->context.ctrl = ctrl; | |
| 666 | − } | |
| 667 | − | |
| 699 | + _disable_gpio_module(bank, offset); | |
| 668 | 700 | _reset_gpio(bank, bank->chip.base + offset); |
| 669 | 701 | spin_unlock_irqrestore(&bank->lock, flags); |
| 670 | 702 | |
| @@ -672,7 +704,7 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) · 1 unmodified line | ||
| 672 | 704 | * If this is the last gpio to be freed in the bank, |
| 673 | 705 | * disable the bank module. |
| 674 | 706 | */ |
| 675 | − if (!bank->mod_usage) | |
| 707 | + if (!BANK_USED(bank)) | |
| 676 | 708 | pm_runtime_put(bank->dev); |
| 677 | 709 | } |
| 678 | 710 | |
| @@ -762,10 +794,20 @@ static void gpio_irq_shutdown(struct irq_data *d) · 83 unmodified lines | ||
| 762 | 794 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
| 763 | 795 | unsigned int gpio = irq_to_gpio(bank, d->hwirq); |
| 764 | 796 | unsigned long flags; |
| 797 | + unsigned offset = GPIO_INDEX(bank, gpio); | |
| 765 | 798 | |
| 766 | 799 | spin_lock_irqsave(&bank->lock, flags); |
| 800 | + bank->irq_usage &= ~(1 << offset); | |
| 801 | + _disable_gpio_module(bank, offset); | |
| 767 | 802 | _reset_gpio(bank, gpio); |
| 768 | 803 | spin_unlock_irqrestore(&bank->lock, flags); |
| 804 | + | |
| 805 | + /* | |
| 806 | + * If this is the last IRQ to be freed in the bank, | |
| 807 | + * disable the bank module. | |
| 808 | + */ | |
| 809 | + if (!BANK_USED(bank)) | |
| 810 | + pm_runtime_put(bank->dev); | |
| 769 | 811 | } |
| 770 | 812 | |
| 771 | 813 | static void gpio_ack_irq(struct irq_data *d) |
| @@ -897,13 +939,6 @@ static int gpio_input(struct gpio_chip *chip, unsigned offset) · 125 unmodified lines | ||
| 897 | 939 | return 0; |
| 898 | 940 | } |
| 899 | 941 | |
| 900 | −static int gpio_is_input(struct gpio_bank *bank, int mask) | |
| 901 | −{ | |
| 902 | − void __iomem *reg = bank->base + bank->regs->direction; | |
| 903 | − | |
| 904 | − return __raw_readl(reg) & mask; | |
| 905 | −} | |
| 906 | − | |
| 907 | 942 | static int gpio_get(struct gpio_chip *chip, unsigned offset) |
| 908 | 943 | { |
| 909 | 944 | struct gpio_bank *bank; |
| @@ -922,13 +957,22 @@ static int gpio_output(struct gpio_chip *chip, unsigned offset, int value) · 12 unmodified lines | ||
| 922 | 957 | { |
| 923 | 958 | struct gpio_bank *bank; |
| 924 | 959 | unsigned long flags; |
| 960 | + int retval = 0; | |
| 925 | 961 | |
| 926 | 962 | bank = container_of(chip, struct gpio_bank, chip); |
| 927 | 963 | spin_lock_irqsave(&bank->lock, flags); |
| 964 | + | |
| 965 | + if (LINE_USED(bank->irq_usage, offset)) { | |
| 966 | + retval = -EINVAL; | |
| 967 | + goto exit; | |
| 968 | + } | |
| 969 | + | |
| 928 | 970 | bank->set_dataout(bank, offset, value); |
| 929 | 971 | _set_gpio_direction(bank, offset, 0); |
| 972 | + | |
| 973 | +exit: | |
| 930 | 974 | spin_unlock_irqrestore(&bank->lock, flags); |
| 931 | − return 0; | |
| 975 | + return retval; | |
| 932 | 976 | } |
| 933 | 977 | |
| 934 | 978 | static int gpio_debounce(struct gpio_chip *chip, unsigned offset, |
| @@ -1400,7 +1444,7 @@ void omap2_gpio_prepare_for_idle(int pwr_mode) · 465 unmodified lines | ||
| 1400 | 1444 | struct gpio_bank *bank; |
| 1401 | 1445 | |
| 1402 | 1446 | list_for_each_entry(bank, &omap_gpio_list, node) { |
| 1403 | − if (!bank->mod_usage || !bank->loses_context) | |
| 1447 | + if (!BANK_USED(bank) || !bank->loses_context) | |
| 1404 | 1448 | continue; |
| 1405 | 1449 | |
| 1406 | 1450 | bank->power_mode = pwr_mode; |
| @@ -1414,7 +1458,7 @@ void omap2_gpio_resume_after_idle(void) · 7 unmodified lines | ||
| 1414 | 1458 | struct gpio_bank *bank; |
| 1415 | 1459 | |
| 1416 | 1460 | list_for_each_entry(bank, &omap_gpio_list, node) { |
| 1417 | − if (!bank->mod_usage || !bank->loses_context) | |
| 1461 | + if (!BANK_USED(bank) || !bank->loses_context) | |
| 1418 | 1462 | continue; |
| 1419 | 1463 | |
| 1420 | 1464 | pm_runtime_get_sync(bank->dev); |
| @@ -293,10 +293,9 @@ static void gpio_rcar_parse_pdata(struct gpio_rcar_priv *p) · 292 unmodified lines | ||
| 293 | 293 | if (pdata) { |
| 294 | 294 | p->config = *pdata; |
| 295 | 295 | } else if (IS_ENABLED(CONFIG_OF) && np) { |
| 296 | − ret = of_parse_phandle_with_args(np, "gpio-ranges", | |
| 297 | − "#gpio-range-cells", 0, &args); | |
| 298 | − p->config.number_of_pins = ret == 0 && args.args_count == 3 | |
| 299 | − ? args.args[2] | |
| 296 | + ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, | |
| 297 | + &args); | |
| 298 | + p->config.number_of_pins = ret == 0 ? args.args[2] | |
| 300 | 299 | : RCAR_MAX_GPIO_PER_BANK; |
| 301 | 300 | p->config.gpio_base = -1; |
| 302 | 301 | } |
| @@ -177,7 +177,7 @@ uint8_t ast_get_index_reg_mask(struct ast_private *ast, · 176 unmodified lines | ||
| 177 | 177 | |
| 178 | 178 | static inline void ast_open_key(struct ast_private *ast) |
| 179 | 179 | { |
| 180 | − ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xA1, 0xFF, 0x04); | |
| 180 | + ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x80, 0xA8); | |
| 181 | 181 | } |
| 182 | 182 | |
| 183 | 183 | #define AST_VIDMEM_SIZE_8M 0x00800000 |
| @@ -42,6 +42,10 @@ · 41 unmodified lines | ||
| 42 | 42 | |
| 43 | 43 | #include <drm/drmP.h> |
| 44 | 44 | |
| 45 | +/******************************************************************/ | |
| 46 | +/** \name Context bitmap support */ | |
| 47 | +/*@{*/ | |
| 48 | + | |
| 45 | 49 | /** |
| 46 | 50 | * Free a handle from the context bitmap. |
| 47 | 51 | * |
| @@ -52,48 +56,13 @@ · 4 unmodified lines | ||
| 52 | 56 | * in drm_device::ctx_idr, while holding the drm_device::struct_mutex |
| 53 | 57 | * lock. |
| 54 | 58 | */ |
| 55 | −static void drm_ctxbitmap_free(struct drm_device * dev, int ctx_handle) | |
| 59 | +void drm_ctxbitmap_free(struct drm_device * dev, int ctx_handle) | |
| 56 | 60 | { |
| 57 | − if (drm_core_check_feature(dev, DRIVER_MODESET)) | |
| 58 | − return; | |
| 59 | − | |
| 60 | 61 | mutex_lock(&dev->struct_mutex); |
| 61 | 62 | idr_remove(&dev->ctx_idr, ctx_handle); |
| 62 | 63 | mutex_unlock(&dev->struct_mutex); |
| 63 | 64 | } |
| 64 | 65 | |
| 65 | −/******************************************************************/ | |
| 66 | −/** \name Context bitmap support */ | |
| 67 | −/*@{*/ | |
| 68 | − | |
| 69 | −void drm_legacy_ctxbitmap_release(struct drm_device *dev, | |
| 70 | − struct drm_file *file_priv) | |
| 71 | −{ | |
| 72 | − if (drm_core_check_feature(dev, DRIVER_MODESET)) | |
| 73 | − return; | |
| 74 | − | |
| 75 | − mutex_lock(&dev->ctxlist_mutex); | |
| 76 | − if (!list_empty(&dev->ctxlist)) { | |
| 77 | − struct drm_ctx_list *pos, *n; | |
| 78 | − | |
| 79 | − list_for_each_entry_safe(pos, n, &dev->ctxlist, head) { | |
| 80 | − if (pos->tag == file_priv && | |
| 81 | − pos->handle != DRM_KERNEL_CONTEXT) { | |
| 82 | − if (dev->driver->context_dtor) | |
| 83 | − dev->driver->context_dtor(dev, | |
| 84 | − pos->handle); | |
| 85 | − | |
| 86 | − drm_ctxbitmap_free(dev, pos->handle); | |
| 87 | − | |
| 88 | − list_del(&pos->head); | |
| 89 | − kfree(pos); | |
| 90 | − --dev->ctx_count; | |
| 91 | − } | |
| 92 | − } | |
| 93 | − } | |
| 94 | − mutex_unlock(&dev->ctxlist_mutex); | |
| 95 | −} | |
| 96 | − | |
| 97 | 66 | /** |
| 98 | 67 | * Context bitmap allocation. |
| 99 | 68 | * |
| @@ -121,12 +90,10 @@ static int drm_ctxbitmap_next(struct drm_device * dev) · 21 unmodified lines | ||
| 121 | 90 | * |
| 122 | 91 | * Initialise the drm_device::ctx_idr |
| 123 | 92 | */ |
| 124 | −void drm_legacy_ctxbitmap_init(struct drm_device * dev) | |
| 93 | +int drm_ctxbitmap_init(struct drm_device * dev) | |
| 125 | 94 | { |
| 126 | − if (drm_core_check_feature(dev, DRIVER_MODESET)) | |
| 127 | − return; | |
| 128 | − | |
| 129 | 95 | idr_init(&dev->ctx_idr); |
| 96 | + return 0; | |
| 130 | 97 | } |
| 131 | 98 | |
| 132 | 99 | /** |
| @@ -137,7 +104,7 @@ void drm_legacy_ctxbitmap_init(struct drm_device * dev) · 4 unmodified lines | ||
| 137 | 104 | * Free all idr members using drm_ctx_sarea_free helper function |
| 138 | 105 | * while holding the drm_device::struct_mutex lock. |
| 139 | 106 | */ |
| 140 | −void drm_legacy_ctxbitmap_cleanup(struct drm_device * dev) | |
| 107 | +void drm_ctxbitmap_cleanup(struct drm_device * dev) | |
| 141 | 108 | { |
| 142 | 109 | mutex_lock(&dev->struct_mutex); |
| 143 | 110 | idr_destroy(&dev->ctx_idr); |
| @@ -169,9 +136,6 @@ int drm_getsareactx(struct drm_device *dev, void *data, · 25 unmodified lines | ||
| 169 | 136 | struct drm_local_map *map; |
| 170 | 137 | struct drm_map_list *_entry; |
| 171 | 138 | |
| 172 | − if (drm_core_check_feature(dev, DRIVER_MODESET)) | |
| 173 | − return -EINVAL; | |
| 174 | − | |
| 175 | 139 | mutex_lock(&dev->struct_mutex); |
| 176 | 140 | |
| 177 | 141 | map = idr_find(&dev->ctx_idr, request->ctx_id); |
| @@ -216,9 +180,6 @@ int drm_setsareactx(struct drm_device *dev, void *data, · 38 unmodified lines | ||
| 216 | 180 | struct drm_local_map *map = NULL; |
| 217 | 181 | struct drm_map_list *r_list = NULL; |
| 218 | 182 | |
| 219 | − if (drm_core_check_feature(dev, DRIVER_MODESET)) | |
| 220 | − return -EINVAL; | |
| 221 | − | |
| 222 | 183 | mutex_lock(&dev->struct_mutex); |
| 223 | 184 | list_for_each_entry(r_list, &dev->maplist, head) { |
| 224 | 185 | if (r_list->map |
| @@ -319,9 +280,6 @@ int drm_resctx(struct drm_device *dev, void *data, · 94 unmodified lines | ||
| 319 | 280 | struct drm_ctx ctx; |
| 320 | 281 | int i; |
| 321 | 282 | |
| 322 | − if (drm_core_check_feature(dev, DRIVER_MODESET)) | |
| 323 | − return -EINVAL; | |
| 324 | − | |
| 325 | 283 | if (res->count >= DRM_RESERVED_CONTEXTS) { |
| 326 | 284 | memset(&ctx, 0, sizeof(ctx)); |
| 327 | 285 | for (i = 0; i < DRM_RESERVED_CONTEXTS; i++) { |
| @@ -352,9 +310,6 @@ int drm_addctx(struct drm_device *dev, void *data, · 24 unmodified lines | ||
| 352 | 310 | struct drm_ctx_list *ctx_entry; |
| 353 | 311 | struct drm_ctx *ctx = data; |
| 354 | 312 | |
| 355 | − if (drm_core_check_feature(dev, DRIVER_MODESET)) | |
| 356 | − return -EINVAL; | |
| 357 | − | |
| 358 | 313 | ctx->handle = drm_ctxbitmap_next(dev); |
| 359 | 314 | if (ctx->handle == DRM_KERNEL_CONTEXT) { |
| 360 | 315 | /* Skip kernel's context and get a new one. */ |
| @@ -398,9 +353,6 @@ int drm_getctx(struct drm_device *dev, void *data, struct drm_file *file_priv) · 37 unmodified lines | ||
| 398 | 353 | { |
| 399 | 354 | struct drm_ctx *ctx = data; |
| 400 | 355 | |
| 401 | − if (drm_core_check_feature(dev, DRIVER_MODESET)) | |
| 402 | − return -EINVAL; | |
| 403 | − | |
| 404 | 356 | /* This is 0, because we don't handle any context flags */ |
| 405 | 357 | ctx->flags = 0; |
| 406 | 358 | |
| @@ -423,9 +375,6 @@ int drm_switchctx(struct drm_device *dev, void *data, · 16 unmodified lines | ||
| 423 | 375 | { |
| 424 | 376 | struct drm_ctx *ctx = data; |
| 425 | 377 | |
| 426 | − if (drm_core_check_feature(dev, DRIVER_MODESET)) | |
| 427 | − return -EINVAL; | |
| 428 | − | |
| 429 | 378 | DRM_DEBUG("%d\n", ctx->handle); |
| 430 | 379 | return drm_context_switch(dev, dev->last_context, ctx->handle); |
| 431 | 380 | } |
| @@ -446,9 +395,6 @@ int drm_newctx(struct drm_device *dev, void *data, · 14 unmodified lines | ||
| 446 | 395 | { |
| 447 | 396 | struct drm_ctx *ctx = data; |
| 448 | 397 | |
| 449 | − if (drm_core_check_feature(dev, DRIVER_MODESET)) | |
| 450 | − return -EINVAL; | |
| 451 | − | |
| 452 | 398 | DRM_DEBUG("%d\n", ctx->handle); |
| 453 | 399 | drm_context_switch_complete(dev, file_priv, ctx->handle); |
| 454 | 400 | |
| @@ -471,9 +417,6 @@ int drm_rmctx(struct drm_device *dev, void *data, · 16 unmodified lines | ||
| 471 | 417 | { |
| 472 | 418 | struct drm_ctx *ctx = data; |
| 473 | 419 | |
| 474 | − if (drm_core_check_feature(dev, DRIVER_MODESET)) | |
| 475 | − return -EINVAL; | |
| 476 | − | |
| 477 | 420 | DRM_DEBUG("%d\n", ctx->handle); |
| 478 | 421 | if (ctx->handle != DRM_KERNEL_CONTEXT) { |
| 479 | 422 | if (dev->driver->context_dtor) |
| @@ -407,6 +407,14 @@ static void drm_fb_helper_dpms(struct fb_info *info, int dpms_mode) · 406 unmodified lines | ||
| 407 | 407 | struct drm_connector *connector; |
| 408 | 408 | int i, j; |
| 409 | 409 | |
| 410 | + /* | |
| 411 | + * fbdev->blank can be called from irq context in case of a panic. | |
| 412 | + * Since we already have our own special panic handler which will | |
| 413 | + * restore the fbdev console mode completely, just bail out early. | |
| 414 | + */ | |
| 415 | + if (oops_in_progress) | |
| 416 | + return; | |
| 417 | + | |
| 410 | 418 | /* |
| 411 | 419 | * fbdev->blank can be called from irq context in case of a panic. |
| 412 | 420 | * Since we already have our own special panic handler which will |
| @@ -439,7 +439,26 @@ int drm_release(struct inode *inode, struct file *filp) · 438 unmodified lines | ||
| 439 | 439 | if (dev->driver->driver_features & DRIVER_GEM) |
| 440 | 440 | drm_gem_release(dev, file_priv); |
| 441 | 441 | |
| 442 | − drm_legacy_ctxbitmap_release(dev, file_priv); | |
| 442 | + mutex_lock(&dev->ctxlist_mutex); | |
| 443 | + if (!list_empty(&dev->ctxlist)) { | |
| 444 | + struct drm_ctx_list *pos, *n; | |
| 445 | + | |
| 446 | + list_for_each_entry_safe(pos, n, &dev->ctxlist, head) { | |
| 447 | + if (pos->tag == file_priv && | |
| 448 | + pos->handle != DRM_KERNEL_CONTEXT) { | |
| 449 | + if (dev->driver->context_dtor) | |
| 450 | + dev->driver->context_dtor(dev, | |
| 451 | + pos->handle); | |
| 452 | + | |
| 453 | + drm_ctxbitmap_free(dev, pos->handle); | |
| 454 | + | |
| 455 | + list_del(&pos->head); | |
| 456 | + kfree(pos); | |
| 457 | + --dev->ctx_count; | |
| 458 | + } | |
| 459 | + } | |
| 460 | + } | |
| 461 | + mutex_unlock(&dev->ctxlist_mutex); | |
| 443 | 462 | |
| 444 | 463 | mutex_lock(&dev->struct_mutex); |
| 445 | 464 | |
| @@ -292,7 +292,13 @@ int drm_fill_in_dev(struct drm_device *dev, · 291 unmodified lines | ||
| 292 | 292 | goto error_out_unreg; |
| 293 | 293 | } |
| 294 | 294 | |
| 295 | − drm_legacy_ctxbitmap_init(dev); | |
| 295 | + | |
| 296 | + | |
| 297 | + retcode = drm_ctxbitmap_init(dev); | |
| 298 | + if (retcode) { | |
| 299 | + DRM_ERROR("Cannot allocate memory for context bitmap.\n"); | |
| 300 | + goto error_out_unreg; | |
| 301 | + } | |
| 296 | 302 | |
| 297 | 303 | if (driver->driver_features & DRIVER_GEM) { |
| 298 | 304 | retcode = drm_gem_init(dev); |
| @@ -446,7 +452,7 @@ void drm_put_dev(struct drm_device *dev) · 147 unmodified lines | ||
| 446 | 452 | drm_rmmap(dev, r_list->map); |
| 447 | 453 | drm_ht_remove(&dev->map_hash); |
| 448 | 454 | |
| 449 | − drm_legacy_ctxbitmap_cleanup(dev); | |
| 455 | + drm_ctxbitmap_cleanup(dev); | |
| 450 | 456 | |
| 451 | 457 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
| 452 | 458 | drm_put_minor(&dev->control); |
| @@ -56,7 +56,7 @@ config DRM_EXYNOS_IPP · 55 unmodified lines | ||
| 56 | 56 | |
| 57 | 57 | config DRM_EXYNOS_FIMC |
| 58 | 58 | bool "Exynos DRM FIMC" |
| 59 | − depends on DRM_EXYNOS_IPP && MFD_SYSCON && OF | |
| 59 | + depends on DRM_EXYNOS_IPP && MFD_SYSCON | |
| 60 | 60 | help |
| 61 | 61 | Choose this option if you want to use Exynos FIMC for DRM. |
| 62 | 62 | |
| @@ -63,7 +63,8 @@ static int lowlevel_buffer_allocate(struct drm_device *dev, · 62 unmodified lines | ||
| 63 | 63 | return -ENOMEM; |
| 64 | 64 | } |
| 65 | 65 | |
| 66 | − buf->kvaddr = dma_alloc_attrs(dev->dev, buf->size, | |
| 66 | + buf->kvaddr = (void __iomem *)dma_alloc_attrs(dev->dev, | |
| 67 | + buf->size, | |
| 67 | 68 | &buf->dma_addr, GFP_KERNEL, |
| 68 | 69 | &buf->dma_attrs); |
| 69 | 70 | if (!buf->kvaddr) { |
| @@ -90,9 +91,9 @@ static int lowlevel_buffer_allocate(struct drm_device *dev, · 20 unmodified lines | ||
| 90 | 91 | } |
| 91 | 92 | |
| 92 | 93 | buf->sgt = drm_prime_pages_to_sg(buf->pages, nr_pages); |
| 93 | − if (!buf->sgt) { | |
| 94 | + if (IS_ERR(buf->sgt)) { | |
| 94 | 95 | DRM_ERROR("failed to get sg table.\n"); |
| 95 | − ret = -ENOMEM; | |
| 96 | + ret = PTR_ERR(buf->sgt); | |
| 96 | 97 | goto err_free_attrs; |
| 97 | 98 | } |
| 98 | 99 | |
| @@ -99,12 +99,13 @@ static int exynos_drm_fbdev_update(struct drm_fb_helper *helper, · 98 unmodified lines | ||
| 99 | 99 | if (is_drm_iommu_supported(dev)) { |
| 100 | 100 | unsigned int nr_pages = buffer->size >> PAGE_SHIFT; |
| 101 | 101 | |
| 102 | − buffer->kvaddr = vmap(buffer->pages, nr_pages, VM_MAP, | |
| 102 | + buffer->kvaddr = (void __iomem *) vmap(buffer->pages, | |
| 103 | + nr_pages, VM_MAP, | |
| 103 | 104 | pgprot_writecombine(PAGE_KERNEL)); |
| 104 | 105 | } else { |
| 105 | 106 | phys_addr_t dma_addr = buffer->dma_addr; |
| 106 | 107 | if (dma_addr) |
| 107 | − buffer->kvaddr = phys_to_virt(dma_addr); | |
| 108 | + buffer->kvaddr = (void __iomem *)phys_to_virt(dma_addr); | |
| 108 | 109 | else |
| 109 | 110 | buffer->kvaddr = (void __iomem *)NULL; |
| 110 | 111 | } |
| @@ -707,8 +707,7 @@ tda998x_encoder_dpms(struct drm_encoder *encoder, int mode) · 706 unmodified lines | ||
| 707 | 707 | reg_write(encoder, REG_VIP_CNTRL_2, priv->vip_cntrl_2); |
| 708 | 708 | break; |
| 709 | 709 | case DRM_MODE_DPMS_OFF: |
| 710 | − /* disable audio and video ports */ | |
| 711 | − reg_write(encoder, REG_ENA_AP, 0x00); | |
| 710 | + /* disable video ports */ | |
| 712 | 711 | reg_write(encoder, REG_ENA_VP_0, 0x00); |
| 713 | 712 | reg_write(encoder, REG_ENA_VP_1, 0x00); |
| 714 | 713 | reg_write(encoder, REG_ENA_VP_2, 0x00); |
| @@ -1392,14 +1392,11 @@ out: · 1391 unmodified lines | ||
| 1392 | 1392 | if (i915_terminally_wedged(&dev_priv->gpu_error)) |
| 1393 | 1393 | return VM_FAULT_SIGBUS; |
| 1394 | 1394 | case -EAGAIN: |
| 1395 | − /* Give the error handler a chance to run and move the | |
| 1396 | − * objects off the GPU active list. Next time we service the | |
| 1397 | − * fault, we should be able to transition the page into the | |
| 1398 | − * GTT without touching the GPU (and so avoid further | |
| 1399 | − * EIO/EGAIN). If the GPU is wedged, then there is no issue | |
| 1400 | − * with coherency, just lost writes. | |
| 1395 | + /* | |
| 1396 | + * EAGAIN means the gpu is hung and we'll wait for the error | |
| 1397 | + * handler to reset everything when re-faulting in | |
| 1398 | + * i915_mutex_lock_interruptible. | |
| 1401 | 1399 | */ |
| 1402 | − set_need_resched(); | |
| 1403 | 1400 | case 0: |
| 1404 | 1401 | case -ERESTARTSYS: |
| 1405 | 1402 | case -EINTR: |
| @@ -4803,10 +4800,10 @@ i915_gem_inactive_count(struct shrinker *shrinker, struct shrink_control *sc) · 3397 unmodified lines | ||
| 4803 | 4800 | |
| 4804 | 4801 | if (!mutex_trylock(&dev->struct_mutex)) { |
| 4805 | 4802 | if (!mutex_is_locked_by(&dev->struct_mutex, current)) |
| 4806 | − return SHRINK_STOP; | |
| 4803 | + return 0; | |
| 4807 | 4804 | |
| 4808 | 4805 | if (dev_priv->mm.shrinker_no_lock_stealing) |
| 4809 | − return SHRINK_STOP; | |
| 4806 | + return 0; | |
| 4810 | 4807 | |
| 4811 | 4808 | unlock = false; |
| 4812 | 4809 | } |
| @@ -4904,10 +4901,10 @@ i915_gem_inactive_scan(struct shrinker *shrinker, struct shrink_control *sc) · 91 unmodified lines | ||
| 4904 | 4901 | |
| 4905 | 4902 | if (!mutex_trylock(&dev->struct_mutex)) { |
| 4906 | 4903 | if (!mutex_is_locked_by(&dev->struct_mutex, current)) |
| 4907 | − return 0; | |
| 4904 | + return SHRINK_STOP; | |
| 4908 | 4905 | |
| 4909 | 4906 | if (dev_priv->mm.shrinker_no_lock_stealing) |
| 4910 | − return 0; | |
| 4907 | + return SHRINK_STOP; | |
| 4911 | 4908 | |
| 4912 | 4909 | unlock = false; |
| 4913 | 4910 | } |
| @@ -143,8 +143,10 @@ static void i915_error_vprintf(struct drm_i915_error_state_buf *e, · 142 unmodified lines | ||
| 143 | 143 | |
| 144 | 144 | /* Seek the first printf which is hits start position */ |
| 145 | 145 | if (e->pos < e->start) { |
| 146 | − len = vsnprintf(NULL, 0, f, args); | |
| 147 | − if (!__i915_error_seek(e, len)) | |
| 146 | + va_list tmp; | |
| 147 | + | |
| 148 | + va_copy(tmp, args); | |
| 149 | + if (!__i915_error_seek(e, vsnprintf(NULL, 0, f, tmp))) | |
| 148 | 150 | return; |
| 149 | 151 | } |
| 150 | 152 | |
| @@ -1469,6 +1469,34 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg) · 1468 unmodified lines | ||
| 1469 | 1469 | return ret; |
| 1470 | 1470 | } |
| 1471 | 1471 | |
| 1472 | +static void i915_error_wake_up(struct drm_i915_private *dev_priv, | |
| 1473 | + bool reset_completed) | |
| 1474 | +{ | |
| 1475 | + struct intel_ring_buffer *ring; | |
| 1476 | + int i; | |
| 1477 | + | |
| 1478 | + /* | |
| 1479 | + * Notify all waiters for GPU completion events that reset state has | |
| 1480 | + * been changed, and that they need to restart their wait after | |
| 1481 | + * checking for potential errors (and bail out to drop locks if there is | |
| 1482 | + * a gpu reset pending so that i915_error_work_func can acquire them). | |
| 1483 | + */ | |
| 1484 | + | |
| 1485 | + /* Wake up __wait_seqno, potentially holding dev->struct_mutex. */ | |
| 1486 | + for_each_ring(ring, dev_priv, i) | |
| 1487 | + wake_up_all(&ring->irq_queue); | |
| 1488 | + | |
| 1489 | + /* Wake up intel_crtc_wait_for_pending_flips, holding crtc->mutex. */ | |
| 1490 | + wake_up_all(&dev_priv->pending_flip_queue); | |
| 1491 | + | |
| 1492 | + /* | |
| 1493 | + * Signal tasks blocked in i915_gem_wait_for_error that the pending | |
| 1494 | + * reset state is cleared. | |
| 1495 | + */ | |
| 1496 | + if (reset_completed) | |
| 1497 | + wake_up_all(&dev_priv->gpu_error.reset_queue); | |
| 1498 | +} | |
| 1499 | + | |
| 1472 | 1500 | /** |
| 1473 | 1501 | * i915_error_work_func - do process context error handling work |
| 1474 | 1502 | * @work: work struct |
| @@ -1483,11 +1511,10 @@ static void i915_error_work_func(struct work_struct *work) · 8 unmodified lines | ||
| 1483 | 1511 | drm_i915_private_t *dev_priv = container_of(error, drm_i915_private_t, |
| 1484 | 1512 | gpu_error); |
| 1485 | 1513 | struct drm_device *dev = dev_priv->dev; |
| 1486 | − struct intel_ring_buffer *ring; | |
| 1487 | 1514 | char *error_event[] = { I915_ERROR_UEVENT "=1", NULL }; |
| 1488 | 1515 | char *reset_event[] = { I915_RESET_UEVENT "=1", NULL }; |
| 1489 | 1516 | char *reset_done_event[] = { I915_ERROR_UEVENT "=0", NULL }; |
| 1490 | − int i, ret; | |
| 1517 | + int ret; | |
| 1491 | 1518 | |
| 1492 | 1519 | kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, error_event); |
| 1493 | 1520 | |
| @@ -1506,8 +1533,16 @@ static void i915_error_work_func(struct work_struct *work) · 12 unmodified lines | ||
| 1506 | 1533 | kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, |
| 1507 | 1534 | reset_event); |
| 1508 | 1535 | |
| 1536 | + /* | |
| 1537 | + * All state reset _must_ be completed before we update the | |
| 1538 | + * reset counter, for otherwise waiters might miss the reset | |
| 1539 | + * pending state and not properly drop locks, resulting in | |
| 1540 | + * deadlocks with the reset work. | |
| 1541 | + */ | |
| 1509 | 1542 | ret = i915_reset(dev); |
| 1510 | 1543 | |
| 1544 | + intel_display_handle_reset(dev); | |
| 1545 | + | |
| 1511 | 1546 | if (ret == 0) { |
| 1512 | 1547 | /* |
| 1513 | 1548 | * After all the gem state is reset, increment the reset |
| @@ -1528,12 +1563,11 @@ static void i915_error_work_func(struct work_struct *work) · 14 unmodified lines | ||
| 1528 | 1563 | atomic_set(&error->reset_counter, I915_WEDGED); |
| 1529 | 1564 | } |
| 1530 | 1565 | |
| 1531 | − for_each_ring(ring, dev_priv, i) | |
| 1532 | − wake_up_all(&ring->irq_queue); | |
| 1533 | − | |
| 1534 | − intel_display_handle_reset(dev); | |
| 1535 | − | |
| 1536 | − wake_up_all(&dev_priv->gpu_error.reset_queue); | |
| 1566 | + /* | |
| 1567 | + * Note: The wake_up also serves as a memory barrier so that | |
| 1568 | + * waiters see the update value of the reset counter atomic_t. | |
| 1569 | + */ | |
| 1570 | + i915_error_wake_up(dev_priv, true); | |
| 1537 | 1571 | } |
| 1538 | 1572 | } |
| 1539 | 1573 | |
| @@ -1642,8 +1676,6 @@ static void i915_report_and_clear_eir(struct drm_device *dev) · 102 unmodified lines | ||
| 1642 | 1676 | void i915_handle_error(struct drm_device *dev, bool wedged) |
| 1643 | 1677 | { |
| 1644 | 1678 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1645 | − struct intel_ring_buffer *ring; | |
| 1646 | − int i; | |
| 1647 | 1679 | |
| 1648 | 1680 | i915_capture_error_state(dev); |
| 1649 | 1681 | i915_report_and_clear_eir(dev); |
| @@ -1653,11 +1685,19 @@ void i915_handle_error(struct drm_device *dev, bool wedged) · 3 unmodified lines | ||
| 1653 | 1685 | &dev_priv->gpu_error.reset_counter); |
| 1654 | 1686 | |
| 1655 | 1687 | /* |
| 1656 | − * Wakeup waiting processes so that the reset work item | |
| 1657 | − * doesn't deadlock trying to grab various locks. | |
| 1688 | + * Wakeup waiting processes so that the reset work function | |
| 1689 | + * i915_error_work_func doesn't deadlock trying to grab various | |
| 1690 | + * locks. By bumping the reset counter first, the woken | |
| 1691 | + * processes will see a reset in progress and back off, | |
| 1692 | + * releasing their locks and then wait for the reset completion. | |
| 1693 | + * We must do this for _all_ gpu waiters that might hold locks | |
| 1694 | + * that the reset work needs to acquire. | |
| 1695 | + * | |
| 1696 | + * Note: The wake_up serves as the required memory barrier to | |
| 1697 | + * ensure that the waiters see the updated value of the reset | |
| 1698 | + * counter atomic_t. | |
| 1658 | 1699 | */ |
| 1659 | − for_each_ring(ring, dev_priv, i) | |
| 1660 | − wake_up_all(&ring->irq_queue); | |
| 1700 | + i915_error_wake_up(dev_priv, false); | |
| 1661 | 1701 | } |
| 1662 | 1702 | |
| 1663 | 1703 | /* |
| @@ -778,7 +778,7 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc) · 777 unmodified lines | ||
| 778 | 778 | /* Can only use the always-on power well for eDP when |
| 779 | 779 | * not using the panel fitter, and when not using motion |
| 780 | 780 | * blur mitigation (which we don't support). */ |
| 781 | − if (intel_crtc->config.pch_pfit.size) | |
| 781 | + if (intel_crtc->config.pch_pfit.enabled) | |
| 782 | 782 | temp |= TRANS_DDI_EDP_INPUT_A_ONOFF; |
| 783 | 783 | else |
| 784 | 784 | temp |= TRANS_DDI_EDP_INPUT_A_ON; |
| @@ -2249,7 +2249,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, · 2248 unmodified lines | ||
| 2249 | 2249 | I915_WRITE(PIPESRC(intel_crtc->pipe), |
| 2250 | 2250 | ((crtc->mode.hdisplay - 1) << 16) | |
| 2251 | 2251 | (crtc->mode.vdisplay - 1)); |
| 2252 | − if (!intel_crtc->config.pch_pfit.size && | |
| 2252 | + if (!intel_crtc->config.pch_pfit.enabled && | |
| 2253 | 2253 | (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) || |
| 2254 | 2254 | intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP))) { |
| 2255 | 2255 | I915_WRITE(PF_CTL(intel_crtc->pipe), 0); |
| @@ -3203,7 +3203,7 @@ static void ironlake_pfit_enable(struct intel_crtc *crtc) · 947 unmodified lines | ||
| 3203 | 3203 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 3204 | 3204 | int pipe = crtc->pipe; |
| 3205 | 3205 | |
| 3206 | − if (crtc->config.pch_pfit.size) { | |
| 3206 | + if (crtc->config.pch_pfit.enabled) { | |
| 3207 | 3207 | /* Force use of hard-coded filter coefficients |
| 3208 | 3208 | * as some pre-programmed values are broken, |
| 3209 | 3209 | * e.g. x201. |
| @@ -3428,7 +3428,7 @@ static void ironlake_pfit_disable(struct intel_crtc *crtc) · 218 unmodified lines | ||
| 3428 | 3428 | |
| 3429 | 3429 | /* To avoid upsetting the power well on haswell only disable the pfit if |
| 3430 | 3430 | * it's in use. The hw state code will make sure we get this right. */ |
| 3431 | − if (crtc->config.pch_pfit.size) { | |
| 3431 | + if (crtc->config.pch_pfit.enabled) { | |
| 3432 | 3432 | I915_WRITE(PF_CTL(pipe), 0); |
| 3433 | 3433 | I915_WRITE(PF_WIN_POS(pipe), 0); |
| 3434 | 3434 | I915_WRITE(PF_WIN_SZ(pipe), 0); |
| @@ -4775,6 +4775,10 @@ static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc) · 1340 unmodified lines | ||
| 4775 | 4775 | |
| 4776 | 4776 | pipeconf = 0; |
| 4777 | 4777 | |
| 4778 | + if (dev_priv->quirks & QUIRK_PIPEA_FORCE && | |
| 4779 | + I915_READ(PIPECONF(intel_crtc->pipe)) & PIPECONF_ENABLE) | |
| 4780 | + pipeconf |= PIPECONF_ENABLE; | |
| 4781 | + | |
| 4778 | 4782 | if (intel_crtc->pipe == 0 && INTEL_INFO(dev)->gen < 4) { |
| 4779 | 4783 | /* Enable pixel doubling when the dot clock is > 90% of the (display) |
| 4780 | 4784 | * core speed. |
| @@ -4877,9 +4881,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, · 96 unmodified lines | ||
| 4877 | 4881 | return -EINVAL; |
| 4878 | 4882 | } |
| 4879 | 4883 | |
| 4880 | − /* Ensure that the cursor is valid for the new mode before changing... */ | |
| 4881 | − intel_crtc_update_cursor(crtc, true); | |
| 4882 | − | |
| 4883 | 4884 | if (is_lvds && dev_priv->lvds_downclock_avail) { |
| 4884 | 4885 | /* |
| 4885 | 4886 | * Ensure we match the reduced clock's P to the target clock. |
| @@ -5768,9 +5769,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, · 882 unmodified lines | ||
| 5768 | 5769 | intel_crtc->config.dpll.p2 = clock.p2; |
| 5769 | 5770 | } |
| 5770 | 5771 | |
| 5771 | − /* Ensure that the cursor is valid for the new mode before changing... */ | |
| 5772 | − intel_crtc_update_cursor(crtc, true); | |
| 5773 | − | |
| 5774 | 5772 | /* CPU eDP is the only output that doesn't need a PCH PLL of its own. */ |
| 5775 | 5773 | if (intel_crtc->config.has_pch_encoder) { |
| 5776 | 5774 | fp = i9xx_dpll_compute_fp(&intel_crtc->config.dpll); |
| @@ -5859,6 +5857,7 @@ static void ironlake_get_pfit_config(struct intel_crtc *crtc, · 82 unmodified lines | ||
| 5859 | 5857 | tmp = I915_READ(PF_CTL(crtc->pipe)); |
| 5860 | 5858 | |
| 5861 | 5859 | if (tmp & PF_ENABLE) { |
| 5860 | + pipe_config->pch_pfit.enabled = true; | |
| 5862 | 5861 | pipe_config->pch_pfit.pos = I915_READ(PF_WIN_POS(crtc->pipe)); |
| 5863 | 5862 | pipe_config->pch_pfit.size = I915_READ(PF_WIN_SZ(crtc->pipe)); |
| 5864 | 5863 | |
| @@ -6236,7 +6235,7 @@ static void haswell_modeset_global_resources(struct drm_device *dev) · 371 unmodified lines | ||
| 6236 | 6235 | if (!crtc->base.enabled) |
| 6237 | 6236 | continue; |
| 6238 | 6237 | |
| 6239 | − if (crtc->pipe != PIPE_A || crtc->config.pch_pfit.size || | |
| 6238 | + if (crtc->pipe != PIPE_A || crtc->config.pch_pfit.enabled || | |
| 6240 | 6239 | crtc->config.cpu_transcoder != TRANSCODER_EDP) |
| 6241 | 6240 | enable = true; |
| 6242 | 6241 | } |
| @@ -6259,9 +6258,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, · 16 unmodified lines | ||
| 6259 | 6258 | if (!intel_ddi_pll_mode_set(crtc)) |
| 6260 | 6259 | return -EINVAL; |
| 6261 | 6260 | |
| 6262 | − /* Ensure that the cursor is valid for the new mode before changing... */ | |
| 6263 | − intel_crtc_update_cursor(crtc, true); | |
| 6264 | − | |
| 6265 | 6261 | if (intel_crtc->config.has_dp_encoder) |
| 6266 | 6262 | intel_dp_set_m_n(intel_crtc); |
| 6267 | 6263 | |
| @@ -6494,15 +6490,15 @@ static void haswell_write_eld(struct drm_connector *connector, · 226 unmodified lines | ||
| 6494 | 6490 | |
| 6495 | 6491 | /* Set ELD valid state */ |
| 6496 | 6492 | tmp = I915_READ(aud_cntrl_st2); |
| 6497 | − DRM_DEBUG_DRIVER("HDMI audio: pin eld vld status=0x%8x\n", tmp); | |
| 6493 | + DRM_DEBUG_DRIVER("HDMI audio: pin eld vld status=0x%08x\n", tmp); | |
| 6498 | 6494 | tmp |= (AUDIO_ELD_VALID_A << (pipe * 4)); |
| 6499 | 6495 | I915_WRITE(aud_cntrl_st2, tmp); |
| 6500 | 6496 | tmp = I915_READ(aud_cntrl_st2); |
| 6501 | − DRM_DEBUG_DRIVER("HDMI audio: eld vld status=0x%8x\n", tmp); | |
| 6497 | + DRM_DEBUG_DRIVER("HDMI audio: eld vld status=0x%08x\n", tmp); | |
| 6502 | 6498 | |
| 6503 | 6499 | /* Enable HDMI mode */ |
| 6504 | 6500 | tmp = I915_READ(aud_config); |
| 6505 | − DRM_DEBUG_DRIVER("HDMI audio: audio conf: 0x%8x\n", tmp); | |
| 6501 | + DRM_DEBUG_DRIVER("HDMI audio: audio conf: 0x%08x\n", tmp); | |
| 6506 | 6502 | /* clear N_programing_enable and N_value_index */ |
| 6507 | 6503 | tmp &= ~(AUD_CONFIG_N_VALUE_INDEX | AUD_CONFIG_N_PROG_ENABLE); |
| 6508 | 6504 | I915_WRITE(aud_config, tmp); |
| @@ -6937,7 +6933,8 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc, · 428 unmodified lines | ||
| 6937 | 6933 | intel_crtc->cursor_width = width; |
| 6938 | 6934 | intel_crtc->cursor_height = height; |
| 6939 | 6935 | |
| 6940 | − intel_crtc_update_cursor(crtc, intel_crtc->cursor_bo != NULL); | |
| 6936 | + if (intel_crtc->active) | |
| 6937 | + intel_crtc_update_cursor(crtc, intel_crtc->cursor_bo != NULL); | |
| 6941 | 6938 | |
| 6942 | 6939 | return 0; |
| 6943 | 6940 | fail_unpin: |
| @@ -6956,7 +6953,8 @@ static int intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) · 12 unmodified lines | ||
| 6956 | 6953 | intel_crtc->cursor_x = x; |
| 6957 | 6954 | intel_crtc->cursor_y = y; |
| 6958 | 6955 | |
| 6959 | − intel_crtc_update_cursor(crtc, intel_crtc->cursor_bo != NULL); | |
| 6956 | + if (intel_crtc->active) | |
| 6957 | + intel_crtc_update_cursor(crtc, intel_crtc->cursor_bo != NULL); | |
| 6960 | 6958 | |
| 6961 | 6959 | return 0; |
| 6962 | 6960 | } |
| @@ -8205,9 +8203,10 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc, · 1242 unmodified lines | ||
| 8205 | 8203 | pipe_config->gmch_pfit.control, |
| 8206 | 8204 | pipe_config->gmch_pfit.pgm_ratios, |
| 8207 | 8205 | pipe_config->gmch_pfit.lvds_border_bits); |
| 8208 | − DRM_DEBUG_KMS("pch pfit: pos: 0x%08x, size: 0x%08x\n", | |
| 8206 | + DRM_DEBUG_KMS("pch pfit: pos: 0x%08x, size: 0x%08x, %s\n", | |
| 8209 | 8207 | pipe_config->pch_pfit.pos, |
| 8210 | − pipe_config->pch_pfit.size); | |
| 8208 | + pipe_config->pch_pfit.size, | |
| 8209 | + pipe_config->pch_pfit.enabled ? "enabled" : "disabled"); | |
| 8211 | 8210 | DRM_DEBUG_KMS("ips: %i\n", pipe_config->ips_enabled); |
| 8212 | 8211 | } |
| 8213 | 8212 | |
| @@ -8603,8 +8602,11 @@ intel_pipe_config_compare(struct drm_device *dev, · 389 unmodified lines | ||
| 8603 | 8602 | if (INTEL_INFO(dev)->gen < 4) |
| 8604 | 8603 | PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios); |
| 8605 | 8604 | PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits); |
| 8606 | − PIPE_CONF_CHECK_I(pch_pfit.pos); | |
| 8607 | − PIPE_CONF_CHECK_I(pch_pfit.size); | |
| 8605 | + PIPE_CONF_CHECK_I(pch_pfit.enabled); | |
| 8606 | + if (current_config->pch_pfit.enabled) { | |
| 8607 | + PIPE_CONF_CHECK_I(pch_pfit.pos); | |
| 8608 | + PIPE_CONF_CHECK_I(pch_pfit.size); | |
| 8609 | + } | |
| 8608 | 8610 | |
| 8609 | 8611 | PIPE_CONF_CHECK_I(ips_enabled); |
| 8610 | 8612 | |
| @@ -588,7 +588,18 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, · 587 unmodified lines | ||
| 588 | 588 | DRM_DEBUG_KMS("aux_ch native nack\n"); |
| 589 | 589 | return -EREMOTEIO; |
| 590 | 590 | case AUX_NATIVE_REPLY_DEFER: |
| 591 | − udelay(100); | |
| 591 | + /* | |
| 592 | + * For now, just give more slack to branch devices. We | |
| 593 | + * could check the DPCD for I2C bit rate capabilities, | |
| 594 | + * and if available, adjust the interval. We could also | |
| 595 | + * be more careful with DP-to-Legacy adapters where a | |
| 596 | + * long legacy cable may force very low I2C bit rates. | |
| 597 | + */ | |
| 598 | + if (intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & | |
| 599 | + DP_DWN_STRM_PORT_PRESENT) | |
| 600 | + usleep_range(500, 600); | |
| 601 | + else | |
| 602 | + usleep_range(300, 400); | |
| 592 | 603 | continue; |
| 593 | 604 | default: |
| 594 | 605 | DRM_ERROR("aux_ch invalid native reply 0x%02x\n", |
| @@ -280,6 +280,7 @@ struct intel_crtc_config { · 279 unmodified lines | ||
| 280 | 280 | struct { |
| 281 | 281 | u32 pos; |
| 282 | 282 | u32 size; |
| 283 | + bool enabled; | |
| 283 | 284 | } pch_pfit; |
| 284 | 285 | |
| 285 | 286 | /* FDI configuration, only valid if has_pch_encoder is set. */ |
| @@ -263,6 +263,8 @@ static bool intel_dvo_compute_config(struct intel_encoder *encoder, · 262 unmodified lines | ||
| 263 | 263 | C(vtotal); |
| 264 | 264 | C(clock); |
| 265 | 265 | #undef C |
| 266 | + | |
| 267 | + drm_mode_set_crtcinfo(adjusted_mode, 0); | |
| 266 | 268 | } |
| 267 | 269 | |
| 268 | 270 | if (intel_dvo->dev.dev_ops->mode_fixup) |
| @@ -112,6 +112,7 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc, · 111 unmodified lines | ||
| 112 | 112 | done: |
| 113 | 113 | pipe_config->pch_pfit.pos = (x << 16) | y; |
| 114 | 114 | pipe_config->pch_pfit.size = (width << 16) | height; |
| 115 | + pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0; | |
| 115 | 116 | } |
| 116 | 117 | |
| 117 | 118 | static void |
| @@ -2096,16 +2096,16 @@ static uint32_t ilk_pipe_pixel_rate(struct drm_device *dev, · 2095 unmodified lines | ||
| 2096 | 2096 | struct drm_crtc *crtc) |
| 2097 | 2097 | { |
| 2098 | 2098 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
| 2099 | − uint32_t pixel_rate, pfit_size; | |
| 2099 | + uint32_t pixel_rate; | |
| 2100 | 2100 | |
| 2101 | 2101 | pixel_rate = intel_crtc->config.adjusted_mode.clock; |
| 2102 | 2102 | |
| 2103 | 2103 | /* We only use IF-ID interlacing. If we ever use PF-ID we'll need to |
| 2104 | 2104 | * adjust the pixel_rate here. */ |
| 2105 | 2105 | |
| 2106 | − pfit_size = intel_crtc->config.pch_pfit.size; | |
| 2107 | − if (pfit_size) { | |
| 2106 | + if (intel_crtc->config.pch_pfit.enabled) { | |
| 2108 | 2107 | uint64_t pipe_w, pipe_h, pfit_w, pfit_h; |
| 2108 | + uint32_t pfit_size = intel_crtc->config.pch_pfit.size; | |
| 2109 | 2109 | |
| 2110 | 2110 | pipe_w = intel_crtc->config.requested_mode.hdisplay; |
| 2111 | 2111 | pipe_h = intel_crtc->config.requested_mode.vdisplay; |
| @@ -788,6 +788,8 @@ static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, · 787 unmodified lines | ||
| 788 | 788 | uint16_t h_sync_offset, v_sync_offset; |
| 789 | 789 | int mode_clock; |
| 790 | 790 | |
| 791 | + memset(dtd, 0, sizeof(*dtd)); | |
| 792 | + | |
| 791 | 793 | width = mode->hdisplay; |
| 792 | 794 | height = mode->vdisplay; |
| 793 | 795 | |
| @@ -830,44 +832,51 @@ static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, · 36 unmodified lines | ||
| 830 | 832 | if (mode->flags & DRM_MODE_FLAG_PVSYNC) |
| 831 | 833 | dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE; |
| 832 | 834 | |
| 833 | − dtd->part2.sdvo_flags = 0; | |
| 834 | 835 | dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; |
| 835 | − dtd->part2.reserved = 0; | |
| 836 | 836 | } |
| 837 | 837 | |
| 838 | −static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, | |
| 838 | +static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode, | |
| 839 | 839 | const struct intel_sdvo_dtd *dtd) |
| 840 | 840 | { |
| 841 | − mode->hdisplay = dtd->part1.h_active; | |
| 842 | − mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; | |
| 843 | − mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; | |
| 844 | − mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; | |
| 845 | − mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; | |
| 846 | − mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; | |
| 847 | − mode->htotal = mode->hdisplay + dtd->part1.h_blank; | |
| 848 | − mode->htotal += (dtd->part1.h_high & 0xf) << 8; | |
| 849 | − | |
| 850 | − mode->vdisplay = dtd->part1.v_active; | |
| 851 | − mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; | |
| 852 | − mode->vsync_start = mode->vdisplay; | |
| 853 | − mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; | |
| 854 | − mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; | |
| 855 | − mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0; | |
| 856 | − mode->vsync_end = mode->vsync_start + | |
| 841 | + struct drm_display_mode mode = {}; | |
| 842 | + | |
| 843 | + mode.hdisplay = dtd->part1.h_active; | |
| 844 | + mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; | |
| 845 | + mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off; | |
| 846 | + mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; | |
| 847 | + mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width; | |
| 848 | + mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; | |
| 849 | + mode.htotal = mode.hdisplay + dtd->part1.h_blank; | |
| 850 | + mode.htotal += (dtd->part1.h_high & 0xf) << 8; | |
| 851 | + | |
| 852 | + mode.vdisplay = dtd->part1.v_active; | |
| 853 | + mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; | |
| 854 | + mode.vsync_start = mode.vdisplay; | |
| 855 | + mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; | |
| 856 | + mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; | |
| 857 | + mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0; | |
| 858 | + mode.vsync_end = mode.vsync_start + | |
| 857 | 859 | (dtd->part2.v_sync_off_width & 0xf); |
| 858 | − mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; | |
| 859 | − mode->vtotal = mode->vdisplay + dtd->part1.v_blank; | |
| 860 | − mode->vtotal += (dtd->part1.v_high & 0xf) << 8; | |
| 860 | + mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; | |
| 861 | + mode.vtotal = mode.vdisplay + dtd->part1.v_blank; | |
| 862 | + mode.vtotal += (dtd->part1.v_high & 0xf) << 8; | |
| 861 | 863 | |
| 862 | − mode->clock = dtd->part1.clock * 10; | |
| 864 | + mode.clock = dtd->part1.clock * 10; | |
| 863 | 865 | |
| 864 | − mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); | |
| 865 | 866 | if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE) |
| 866 | − mode->flags |= DRM_MODE_FLAG_INTERLACE; | |
| 867 | + mode.flags |= DRM_MODE_FLAG_INTERLACE; | |
| 867 | 868 | if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) |
| 868 | − mode->flags |= DRM_MODE_FLAG_PHSYNC; | |
| 869 | + mode.flags |= DRM_MODE_FLAG_PHSYNC; | |
| 870 | + else | |
| 871 | + mode.flags |= DRM_MODE_FLAG_NHSYNC; | |
| 869 | 872 | if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) |
| 870 | − mode->flags |= DRM_MODE_FLAG_PVSYNC; | |
| 873 | + mode.flags |= DRM_MODE_FLAG_PVSYNC; | |
| 874 | + else | |
| 875 | + mode.flags |= DRM_MODE_FLAG_NVSYNC; | |
| 876 | + | |
| 877 | + drm_mode_set_crtcinfo(&mode, 0); | |
| 878 | + | |
| 879 | + drm_mode_copy(pmode, &mode); | |
| 871 | 880 | } |
| 872 | 881 | |
| 873 | 882 | static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo) |
| @@ -916,6 +916,14 @@ intel_tv_compute_config(struct intel_encoder *encoder, · 915 unmodified lines | ||
| 916 | 916 | DRM_DEBUG_KMS("forcing bpc to 8 for TV\n"); |
| 917 | 917 | pipe_config->pipe_bpp = 8*3; |
| 918 | 918 | |
| 919 | + /* TV has it's own notion of sync and other mode flags, so clear them. */ | |
| 920 | + pipe_config->adjusted_mode.flags = 0; | |
| 921 | + | |
| 922 | + /* | |
| 923 | + * FIXME: We don't check whether the input mode is actually what we want | |
| 924 | + * or whether userspace is doing something stupid. | |
| 925 | + */ | |
| 926 | + | |
| 919 | 927 | return true; |
| 920 | 928 | } |
| 921 | 929 | |
| @@ -124,6 +124,8 @@ void adreno_recover(struct msm_gpu *gpu) · 123 unmodified lines | ||
| 124 | 124 | |
| 125 | 125 | /* reset completed fence seqno, just discard anything pending: */ |
| 126 | 126 | adreno_gpu->memptrs->fence = gpu->submitted_fence; |
| 127 | + adreno_gpu->memptrs->rptr = 0; | |
| 128 | + adreno_gpu->memptrs->wptr = 0; | |
| 127 | 129 | |
| 128 | 130 | gpu->funcs->pm_resume(gpu); |
| 129 | 131 | ret = gpu->funcs->hw_init(gpu); |
| @@ -229,7 +231,7 @@ void adreno_idle(struct msm_gpu *gpu) · 99 unmodified lines | ||
| 229 | 231 | return; |
| 230 | 232 | } while(time_before(jiffies, t)); |
| 231 | 233 | |
| 232 | − DRM_ERROR("timeout waiting for %s to drain ringbuffer!\n", gpu->name); | |
| 234 | + DRM_ERROR("%s: timeout waiting to drain ringbuffer!\n", gpu->name); | |
| 233 | 235 | |
| 234 | 236 | /* TODO maybe we need to reset GPU here to recover from hang? */ |
| 235 | 237 | } |
| @@ -256,11 +258,17 @@ void adreno_wait_ring(struct msm_gpu *gpu, uint32_t ndwords) · 20 unmodified lines | ||
| 256 | 258 | { |
| 257 | 259 | struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); |
| 258 | 260 | uint32_t freedwords; |
| 261 | + unsigned long t = jiffies + ADRENO_IDLE_TIMEOUT; | |
| 259 | 262 | do { |
| 260 | 263 | uint32_t size = gpu->rb->size / 4; |
| 261 | 264 | uint32_t wptr = get_wptr(gpu->rb); |
| 262 | 265 | uint32_t rptr = adreno_gpu->memptrs->rptr; |
| 263 | 266 | freedwords = (rptr + (size - 1) - wptr) % size; |
| 267 | + | |
| 268 | + if (time_after(jiffies, t)) { | |
| 269 | + DRM_ERROR("%s: timeout waiting for ringbuffer space\n", gpu->name); | |
| 270 | + break; | |
| 271 | + } | |
| 264 | 272 | } while(freedwords < ndwords); |
| 265 | 273 | } |
| 266 | 274 | |
| @@ -19,8 +19,6 @@ · 18 unmodified lines | ||
| 19 | 19 | #include "msm_drv.h" |
| 20 | 20 | #include "mdp4_kms.h" |
| 21 | 21 | |
| 22 | −#include <mach/iommu.h> | |
| 23 | − | |
| 24 | 22 | static struct mdp4_platform_config *mdp4_get_config(struct platform_device *dev); |
| 25 | 23 | |
| 26 | 24 | static int mdp4_hw_init(struct msm_kms *kms) |
| @@ -18,8 +18,6 @@ · 17 unmodified lines | ||
| 18 | 18 | #include "msm_drv.h" |
| 19 | 19 | #include "msm_gpu.h" |
| 20 | 20 | |
| 21 | −#include <mach/iommu.h> | |
| 22 | − | |
| 23 | 21 | static void msm_fb_output_poll_changed(struct drm_device *dev) |
| 24 | 22 | { |
| 25 | 23 | struct msm_drm_private *priv = dev->dev_private; |
| @@ -62,6 +60,8 @@ int msm_iommu_attach(struct drm_device *dev, struct iommu_domain *iommu, · 36 unmodified lines | ||
| 62 | 60 | int i, ret; |
| 63 | 61 | |
| 64 | 62 | for (i = 0; i < cnt; i++) { |
| 63 | + /* TODO maybe some day msm iommu won't require this hack: */ | |
| 64 | + struct device *msm_iommu_get_ctx(const char *ctx_name); | |
| 65 | 65 | struct device *ctx = msm_iommu_get_ctx(names[i]); |
| 66 | 66 | if (!ctx) |
| 67 | 67 | continue; |
| @@ -199,7 +199,7 @@ static int msm_load(struct drm_device *dev, unsigned long flags) · 131 unmodified lines | ||
| 199 | 199 | * imx drm driver on iMX5 |
| 200 | 200 | */ |
| 201 | 201 | dev_err(dev->dev, "failed to load kms\n"); |
| 202 | − ret = PTR_ERR(priv->kms); | |
| 202 | + ret = PTR_ERR(kms); | |
| 203 | 203 | goto fail; |
| 204 | 204 | } |
| 205 | 205 | |
| @@ -499,25 +499,41 @@ int msm_wait_fence_interruptable(struct drm_device *dev, uint32_t fence, · 293 unmodified lines | ||
| 499 | 499 | struct timespec *timeout) |
| 500 | 500 | { |
| 501 | 501 | struct msm_drm_private *priv = dev->dev_private; |
| 502 | − unsigned long timeout_jiffies = timespec_to_jiffies(timeout); | |
| 503 | − unsigned long start_jiffies = jiffies; | |
| 504 | − unsigned long remaining_jiffies; | |
| 505 | 502 | int ret; |
| 506 | 503 | |
| 507 | − if (time_after(start_jiffies, timeout_jiffies)) | |
| 508 | − remaining_jiffies = 0; | |
| 509 | − else | |
| 510 | − remaining_jiffies = timeout_jiffies - start_jiffies; | |
| 511 | − | |
| 512 | − ret = wait_event_interruptible_timeout(priv->fence_event, | |
| 513 | − priv->completed_fence >= fence, | |
| 514 | − remaining_jiffies); | |
| 515 | − if (ret == 0) { | |
| 516 | − DBG("timeout waiting for fence: %u (completed: %u)", | |
| 517 | − fence, priv->completed_fence); | |
| 518 | − ret = -ETIMEDOUT; | |
| 519 | − } else if (ret != -ERESTARTSYS) { | |
| 520 | − ret = 0; | |
| 504 | + if (!priv->gpu) | |
| 505 | + return 0; | |
| 506 | + | |
| 507 | + if (fence > priv->gpu->submitted_fence) { | |
| 508 | + DRM_ERROR("waiting on invalid fence: %u (of %u)\n", | |
| 509 | + fence, priv->gpu->submitted_fence); | |
| 510 | + return -EINVAL; | |
| 511 | + } | |
| 512 | + | |
| 513 | + if (!timeout) { | |
| 514 | + /* no-wait: */ | |
| 515 | + ret = fence_completed(dev, fence) ? 0 : -EBUSY; | |
| 516 | + } else { | |
| 517 | + unsigned long timeout_jiffies = timespec_to_jiffies(timeout); | |
| 518 | + unsigned long start_jiffies = jiffies; | |
| 519 | + unsigned long remaining_jiffies; | |
| 520 | + | |
| 521 | + if (time_after(start_jiffies, timeout_jiffies)) | |
| 522 | + remaining_jiffies = 0; | |
| 523 | + else | |
| 524 | + remaining_jiffies = timeout_jiffies - start_jiffies; | |
| 525 | + | |
| 526 | + ret = wait_event_interruptible_timeout(priv->fence_event, | |
| 527 | + fence_completed(dev, fence), | |
| 528 | + remaining_jiffies); | |
| 529 | + | |
| 530 | + if (ret == 0) { | |
| 531 | + DBG("timeout waiting for fence: %u (completed: %u)", | |
| 532 | + fence, priv->completed_fence); | |
| 533 | + ret = -ETIMEDOUT; | |
| 534 | + } else if (ret != -ERESTARTSYS) { | |
| 535 | + ret = 0; | |
| 536 | + } | |
| 521 | 537 | } |
| 522 | 538 | |
| 523 | 539 | return ret; |
| @@ -681,7 +697,7 @@ static struct drm_driver msm_driver = { · 157 unmodified lines | ||
| 681 | 697 | .gem_vm_ops = &vm_ops, |
| 682 | 698 | .dumb_create = msm_gem_dumb_create, |
| 683 | 699 | .dumb_map_offset = msm_gem_dumb_map_offset, |
| 684 | − .dumb_destroy = msm_gem_dumb_destroy, | |
| 700 | + .dumb_destroy = drm_gem_dumb_destroy, | |
| 685 | 701 | #ifdef CONFIG_DEBUG_FS |
| 686 | 702 | .debugfs_init = msm_debugfs_init, |
| 687 | 703 | .debugfs_cleanup = msm_debugfs_cleanup, |
| @@ -153,7 +153,7 @@ void *msm_gem_vaddr(struct drm_gem_object *obj); · 152 unmodified lines | ||
| 153 | 153 | int msm_gem_queue_inactive_work(struct drm_gem_object *obj, |
| 154 | 154 | struct work_struct *work); |
| 155 | 155 | void msm_gem_move_to_active(struct drm_gem_object *obj, |
| 156 | − struct msm_gpu *gpu, uint32_t fence); | |
| 156 | + struct msm_gpu *gpu, bool write, uint32_t fence); | |
| 157 | 157 | void msm_gem_move_to_inactive(struct drm_gem_object *obj); |
| 158 | 158 | int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, |
| 159 | 159 | struct timespec *timeout); |
| @@ -191,6 +191,12 @@ u32 msm_readl(const void __iomem *addr); · 31 unmodified lines | ||
| 191 | 191 | #define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__) |
| 192 | 192 | #define VERB(fmt, ...) if (0) DRM_DEBUG(fmt"\n", ##__VA_ARGS__) |
| 193 | 193 | |
| 194 | +static inline bool fence_completed(struct drm_device *dev, uint32_t fence) | |
| 195 | +{ | |
| 196 | + struct msm_drm_private *priv = dev->dev_private; | |
| 197 | + return priv->completed_fence >= fence; | |
| 198 | +} | |
| 199 | + | |
| 194 | 200 | static inline int align_pitch(int width, int bpp) |
| 195 | 201 | { |
| 196 | 202 | int bytespp = (bpp + 7) / 8; |
| @@ -40,9 +40,9 @@ static struct page **get_pages(struct drm_gem_object *obj) · 39 unmodified lines | ||
| 40 | 40 | } |
| 41 | 41 | |
| 42 | 42 | msm_obj->sgt = drm_prime_pages_to_sg(p, npages); |
| 43 | − if (!msm_obj->sgt) { | |
| 43 | + if (IS_ERR(msm_obj->sgt)) { | |
| 44 | 44 | dev_err(dev->dev, "failed to allocate sgt\n"); |
| 45 | − return ERR_PTR(-ENOMEM); | |
| 45 | + return ERR_CAST(msm_obj->sgt); | |
| 46 | 46 | } |
| 47 | 47 | |
| 48 | 48 | msm_obj->pages = p; |
| @@ -159,7 +159,6 @@ out_unlock: · 110 unmodified lines | ||
| 159 | 159 | out: |
| 160 | 160 | switch (ret) { |
| 161 | 161 | case -EAGAIN: |
| 162 | − set_need_resched(); | |
| 163 | 162 | case 0: |
| 164 | 163 | case -ERESTARTSYS: |
| 165 | 164 | case -EINTR: |
| @@ -320,13 +319,6 @@ int msm_gem_dumb_create(struct drm_file *file, struct drm_device *dev, · 154 unmodified lines | ||
| 320 | 319 | MSM_BO_SCANOUT | MSM_BO_WC, &args->handle); |
| 321 | 320 | } |
| 322 | 321 | |
| 323 | −int msm_gem_dumb_destroy(struct drm_file *file, struct drm_device *dev, | |
| 324 | − uint32_t handle) | |
| 325 | −{ | |
| 326 | − /* No special work needed, drop the reference and see what falls out */ | |
| 327 | − return drm_gem_handle_delete(file, handle); | |
| 328 | −} | |
| 329 | − | |
| 330 | 322 | int msm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev, |
| 331 | 323 | uint32_t handle, uint64_t *offset) |
| 332 | 324 | { |
| @@ -393,11 +385,14 @@ int msm_gem_queue_inactive_work(struct drm_gem_object *obj, · 60 unmodified lines | ||
| 393 | 385 | } |
| 394 | 386 | |
| 395 | 387 | void msm_gem_move_to_active(struct drm_gem_object *obj, |
| 396 | − struct msm_gpu *gpu, uint32_t fence) | |
| 388 | + struct msm_gpu *gpu, bool write, uint32_t fence) | |
| 397 | 389 | { |
| 398 | 390 | struct msm_gem_object *msm_obj = to_msm_bo(obj); |
| 399 | 391 | msm_obj->gpu = gpu; |
| 400 | − msm_obj->fence = fence; | |
| 392 | + if (write) | |
| 393 | + msm_obj->write_fence = fence; | |
| 394 | + else | |
| 395 | + msm_obj->read_fence = fence; | |
| 401 | 396 | list_del_init(&msm_obj->mm_list); |
| 402 | 397 | list_add_tail(&msm_obj->mm_list, &gpu->active_list); |
| 403 | 398 | } |
| @@ -411,7 +406,8 @@ void msm_gem_move_to_inactive(struct drm_gem_object *obj) · 7 unmodified lines | ||
| 411 | 406 | WARN_ON(!mutex_is_locked(&dev->struct_mutex)); |
| 412 | 407 | |
| 413 | 408 | msm_obj->gpu = NULL; |
| 414 | − msm_obj->fence = 0; | |
| 409 | + msm_obj->read_fence = 0; | |
| 410 | + msm_obj->write_fence = 0; | |
| 415 | 411 | list_del_init(&msm_obj->mm_list); |
| 416 | 412 | list_add_tail(&msm_obj->mm_list, &priv->inactive_list); |
| 417 | 413 | |
| @@ -433,8 +429,18 @@ int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, · 15 unmodified lines | ||
| 433 | 429 | struct msm_gem_object *msm_obj = to_msm_bo(obj); |
| 434 | 430 | int ret = 0; |
| 435 | 431 | |
| 436 | − if (is_active(msm_obj) && !(op & MSM_PREP_NOSYNC)) | |
| 437 | − ret = msm_wait_fence_interruptable(dev, msm_obj->fence, timeout); | |
| 432 | + if (is_active(msm_obj)) { | |
| 433 | + uint32_t fence = 0; | |
| 434 | + | |
| 435 | + if (op & MSM_PREP_READ) | |
| 436 | + fence = msm_obj->write_fence; | |
| 437 | + if (op & MSM_PREP_WRITE) | |
| 438 | + fence = max(fence, msm_obj->read_fence); | |
| 439 | + if (op & MSM_PREP_NOSYNC) | |
| 440 | + timeout = NULL; | |
| 441 | + | |
| 442 | + ret = msm_wait_fence_interruptable(dev, fence, timeout); | |
| 443 | + } | |
| 438 | 444 | |
| 439 | 445 | /* TODO cache maintenance */ |
| 440 | 446 | |
| @@ -455,9 +461,10 @@ void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m) · 14 unmodified lines | ||
| 455 | 461 | uint64_t off = drm_vma_node_start(&obj->vma_node); |
| 456 | 462 | |
| 457 | 463 | WARN_ON(!mutex_is_locked(&dev->struct_mutex)); |
| 458 | − seq_printf(m, "%08x: %c(%d) %2d (%2d) %08llx %p %d\n", | |
| 464 | + seq_printf(m, "%08x: %c(r=%u,w=%u) %2d (%2d) %08llx %p %d\n", | |
| 459 | 465 | msm_obj->flags, is_active(msm_obj) ? 'A' : 'I', |
| 460 | − msm_obj->fence, obj->name, obj->refcount.refcount.counter, | |
| 466 | + msm_obj->read_fence, msm_obj->write_fence, | |
| 467 | + obj->name, obj->refcount.refcount.counter, | |
| 461 | 468 | off, msm_obj->vaddr, obj->size); |
| 462 | 469 | } |
| 463 | 470 | |
| @@ -36,7 +36,7 @@ struct msm_gem_object { · 35 unmodified lines | ||
| 36 | 36 | */ |
| 37 | 37 | struct list_head mm_list; |
| 38 | 38 | struct msm_gpu *gpu; /* non-null if active */ |
| 39 | − uint32_t fence; | |
| 39 | + uint32_t read_fence, write_fence; | |
| 40 | 40 | |
| 41 | 41 | /* Transiently in the process of submit ioctl, objects associated |
| 42 | 42 | * with the submit are on submit->bo_list.. this only lasts for |
| @@ -78,7 +78,7 @@ static int submit_lookup_objects(struct msm_gem_submit *submit, · 77 unmodified lines | ||
| 78 | 78 | } |
| 79 | 79 | |
| 80 | 80 | if (submit_bo.flags & BO_INVALID_FLAGS) { |
| 81 | − DBG("invalid flags: %x", submit_bo.flags); | |
| 81 | + DRM_ERROR("invalid flags: %x\n", submit_bo.flags); | |
| 82 | 82 | ret = -EINVAL; |
| 83 | 83 | goto out_unlock; |
| 84 | 84 | } |
| @@ -92,7 +92,7 @@ static int submit_lookup_objects(struct msm_gem_submit *submit, · 7 unmodified lines | ||
| 92 | 92 | */ |
| 93 | 93 | obj = idr_find(&file->object_idr, submit_bo.handle); |
| 94 | 94 | if (!obj) { |
| 95 | − DBG("invalid handle %u at index %u", submit_bo.handle, i); | |
| 95 | + DRM_ERROR("invalid handle %u at index %u\n", submit_bo.handle, i); | |
| 96 | 96 | ret = -EINVAL; |
| 97 | 97 | goto out_unlock; |
| 98 | 98 | } |
| @@ -100,7 +100,7 @@ static int submit_lookup_objects(struct msm_gem_submit *submit, · 1 unmodified line | ||
| 100 | 100 | msm_obj = to_msm_bo(obj); |
| 101 | 101 | |
| 102 | 102 | if (!list_empty(&msm_obj->submit_entry)) { |
| 103 | − DBG("handle %u at index %u already on submit list", | |
| 103 | + DRM_ERROR("handle %u at index %u already on submit list\n", | |
| 104 | 104 | submit_bo.handle, i); |
| 105 | 105 | ret = -EINVAL; |
| 106 | 106 | goto out_unlock; |
| @@ -216,8 +216,9 @@ static int submit_bo(struct msm_gem_submit *submit, uint32_t idx, · 109 unmodified lines | ||
| 216 | 216 | struct msm_gem_object **obj, uint32_t *iova, bool *valid) |
| 217 | 217 | { |
| 218 | 218 | if (idx >= submit->nr_bos) { |
| 219 | − DBG("invalid buffer index: %u (out of %u)", idx, submit->nr_bos); | |
| 220 | − return EINVAL; | |
| 219 | + DRM_ERROR("invalid buffer index: %u (out of %u)\n", | |
| 220 | + idx, submit->nr_bos); | |
| 221 | + return -EINVAL; | |
| 221 | 222 | } |
| 222 | 223 | |
| 223 | 224 | if (obj) |
| @@ -239,7 +240,7 @@ static int submit_reloc(struct msm_gem_submit *submit, struct msm_gem_object *ob · 15 unmodified lines | ||
| 239 | 240 | int ret; |
| 240 | 241 | |
| 241 | 242 | if (offset % 4) { |
| 242 | − DBG("non-aligned cmdstream buffer: %u", offset); | |
| 243 | + DRM_ERROR("non-aligned cmdstream buffer: %u\n", offset); | |
| 243 | 244 | return -EINVAL; |
| 244 | 245 | } |
| 245 | 246 | |
| @@ -266,7 +267,7 @@ static int submit_reloc(struct msm_gem_submit *submit, struct msm_gem_object *ob · 20 unmodified lines | ||
| 266 | 267 | return -EFAULT; |
| 267 | 268 | |
| 268 | 269 | if (submit_reloc.submit_offset % 4) { |
| 269 | − DBG("non-aligned reloc offset: %u", | |
| 270 | + DRM_ERROR("non-aligned reloc offset: %u\n", | |
| 270 | 271 | submit_reloc.submit_offset); |
| 271 | 272 | return -EINVAL; |
| 272 | 273 | } |
| @@ -276,7 +277,7 @@ static int submit_reloc(struct msm_gem_submit *submit, struct msm_gem_object *ob · 3 unmodified lines | ||
| 276 | 277 | |
| 277 | 278 | if ((off >= (obj->base.size / 4)) || |
| 278 | 279 | (off < last_offset)) { |
| 279 | − DBG("invalid offset %u at reloc %u", off, i); | |
| 280 | + DRM_ERROR("invalid offset %u at reloc %u\n", off, i); | |
| 280 | 281 | return -EINVAL; |
| 281 | 282 | } |
| 282 | 283 | |
| @@ -374,14 +375,15 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data, · 91 unmodified lines | ||
| 374 | 375 | goto out; |
| 375 | 376 | |
| 376 | 377 | if (submit_cmd.size % 4) { |
| 377 | − DBG("non-aligned cmdstream buffer size: %u", | |
| 378 | + DRM_ERROR("non-aligned cmdstream buffer size: %u\n", | |
| 378 | 379 | submit_cmd.size); |
| 379 | 380 | ret = -EINVAL; |
| 380 | 381 | goto out; |
| 381 | 382 | } |
| 382 | 383 | |
| 383 | − if (submit_cmd.size >= msm_obj->base.size) { | |
| 384 | − DBG("invalid cmdstream size: %u", submit_cmd.size); | |
| 384 | + if ((submit_cmd.size + submit_cmd.submit_offset) >= | |
| 385 | + msm_obj->base.size) { | |
| 386 | + DRM_ERROR("invalid cmdstream size: %u\n", submit_cmd.size); | |
| 385 | 387 | ret = -EINVAL; |
| 386 | 388 | goto out; |
| 387 | 389 | } |
| @@ -29,13 +29,14 @@ · 28 unmodified lines | ||
| 29 | 29 | static void bs_init(struct msm_gpu *gpu, struct platform_device *pdev) |
| 30 | 30 | { |
| 31 | 31 | struct drm_device *dev = gpu->dev; |
| 32 | − struct kgsl_device_platform_data *pdata = pdev->dev.platform_data; | |
| 32 | + struct kgsl_device_platform_data *pdata; | |
| 33 | 33 | |
| 34 | 34 | if (!pdev) { |
| 35 | 35 | dev_err(dev->dev, "could not find dtv pdata\n"); |
| 36 | 36 | return; |
| 37 | 37 | } |
| 38 | 38 | |
| 39 | + pdata = pdev->dev.platform_data; | |
| 39 | 40 | if (pdata->bus_scale_table) { |
| 40 | 41 | gpu->bsc = msm_bus_scale_register_client(pdata->bus_scale_table); |
| 41 | 42 | DBG("bus scale client: %08x", gpu->bsc); |
| @@ -230,6 +231,8 @@ static void hangcheck_timer_reset(struct msm_gpu *gpu) · 188 unmodified lines | ||
| 230 | 231 | static void hangcheck_handler(unsigned long data) |
| 231 | 232 | { |
| 232 | 233 | struct msm_gpu *gpu = (struct msm_gpu *)data; |
| 234 | + struct drm_device *dev = gpu->dev; | |
| 235 | + struct msm_drm_private *priv = dev->dev_private; | |
| 233 | 236 | uint32_t fence = gpu->funcs->last_fence(gpu); |
| 234 | 237 | |
| 235 | 238 | if (fence != gpu->hangcheck_fence) { |
| @@ -237,14 +240,22 @@ static void hangcheck_handler(unsigned long data) · 1 unmodified line | ||
| 237 | 240 | gpu->hangcheck_fence = fence; |
| 238 | 241 | } else if (fence < gpu->submitted_fence) { |
| 239 | 242 | /* no progress and not done.. hung! */ |
| 240 | − struct msm_drm_private *priv = gpu->dev->dev_private; | |
| 241 | 243 | gpu->hangcheck_fence = fence; |
| 244 | + dev_err(dev->dev, "%s: hangcheck detected gpu lockup!\n", | |
| 245 | + gpu->name); | |
| 246 | + dev_err(dev->dev, "%s: completed fence: %u\n", | |
| 247 | + gpu->name, fence); | |
| 248 | + dev_err(dev->dev, "%s: submitted fence: %u\n", | |
| 249 | + gpu->name, gpu->submitted_fence); | |
| 242 | 250 | queue_work(priv->wq, &gpu->recover_work); |
| 243 | 251 | } |
| 244 | 252 | |
| 245 | 253 | /* if still more pending work, reset the hangcheck timer: */ |
| 246 | 254 | if (gpu->submitted_fence > gpu->hangcheck_fence) |
| 247 | 255 | hangcheck_timer_reset(gpu); |
| 256 | + | |
| 257 | + /* workaround for missing irq: */ | |
| 258 | + queue_work(priv->wq, &gpu->retire_work); | |
| 248 | 259 | } |
| 249 | 260 | |
| 250 | 261 | /* |
| @@ -265,7 +276,8 @@ static void retire_worker(struct work_struct *work) · 14 unmodified lines | ||
| 265 | 276 | obj = list_first_entry(&gpu->active_list, |
| 266 | 277 | struct msm_gem_object, mm_list); |
| 267 | 278 | |
| 268 | − if (obj->fence <= fence) { | |
| 279 | + if ((obj->read_fence <= fence) && | |
| 280 | + (obj->write_fence <= fence)) { | |
| 269 | 281 | /* move to inactive: */ |
| 270 | 282 | msm_gem_move_to_inactive(&obj->base); |
| 271 | 283 | msm_gem_put_iova(&obj->base, gpu->id); |
| @@ -321,7 +333,11 @@ int msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, · 49 unmodified lines | ||
| 321 | 333 | submit->gpu->id, &iova); |
| 322 | 334 | } |
| 323 | 335 | |
| 324 | − msm_gem_move_to_active(&msm_obj->base, gpu, submit->fence); | |
| 336 | + if (submit->bos[i].flags & MSM_SUBMIT_BO_READ) | |
| 337 | + msm_gem_move_to_active(&msm_obj->base, gpu, false, submit->fence); | |
| 338 | + | |
| 339 | + if (submit->bos[i].flags & MSM_SUBMIT_BO_WRITE) | |
| 340 | + msm_gem_move_to_active(&msm_obj->base, gpu, true, submit->fence); | |
| 325 | 341 | } |
| 326 | 342 | hangcheck_timer_reset(gpu); |
| 327 | 343 | mutex_unlock(&dev->struct_mutex); |
| @@ -579,8 +579,22 @@ static void · 578 unmodified lines | ||
| 579 | 579 | init_reserved(struct nvbios_init *init) |
| 580 | 580 | { |
| 581 | 581 | u8 opcode = nv_ro08(init->bios, init->offset); |
| 582 | − trace("RESERVED\t0x%02x\n", opcode); | |
| 583 | − init->offset += 1; | |
| 582 | + u8 length, i; | |
| 583 | + | |
| 584 | + switch (opcode) { | |
| 585 | + case 0xaa: | |
| 586 | + length = 4; | |
| 587 | + break; | |
| 588 | + default: | |
| 589 | + length = 1; | |
| 590 | + break; | |
| 591 | + } | |
| 592 | + | |
| 593 | + trace("RESERVED 0x%02x\t", opcode); | |
| 594 | + for (i = 1; i < length; i++) | |
| 595 | + cont(" 0x%02x", nv_ro08(init->bios, init->offset + i)); | |
| 596 | + cont("\n"); | |
| 597 | + init->offset += length; | |
| 584 | 598 | } |
| 585 | 599 | |
| 586 | 600 | /** |
| @@ -1437,7 +1451,7 @@ init_configure_mem(struct nvbios_init *init) · 850 unmodified lines | ||
| 1437 | 1451 | data = init_rdvgai(init, 0x03c4, 0x01); |
| 1438 | 1452 | init_wrvgai(init, 0x03c4, 0x01, data | 0x20); |
| 1439 | 1453 | |
| 1440 | − while ((addr = nv_ro32(bios, sdata)) != 0xffffffff) { | |
| 1454 | + for (; (addr = nv_ro32(bios, sdata)) != 0xffffffff; sdata += 4) { | |
| 1441 | 1455 | switch (addr) { |
| 1442 | 1456 | case 0x10021c: /* CKE_NORMAL */ |
| 1443 | 1457 | case 0x1002d0: /* CMD_REFRESH */ |
| @@ -2135,6 +2149,7 @@ static struct nvbios_init_opcode { · 691 unmodified lines | ||
| 2135 | 2149 | [0x99] = { init_zm_auxch }, |
| 2136 | 2150 | [0x9a] = { init_i2c_long_if }, |
| 2137 | 2151 | [0xa9] = { init_gpio_ne }, |
| 2152 | + [0xaa] = { init_reserved }, | |
| 2138 | 2153 | }; |
| 2139 | 2154 | |
| 2140 | 2155 | #define init_opcode_nr (sizeof(init_opcode) / sizeof(init_opcode[0])) |
| @@ -278,7 +278,6 @@ nouveau_display_create(struct drm_device *dev) · 277 unmodified lines | ||
| 278 | 278 | { |
| 279 | 279 | struct nouveau_drm *drm = nouveau_drm(dev); |
| 280 | 280 | struct nouveau_display *disp; |
| 281 | − u32 pclass = dev->pdev->class >> 8; | |
| 282 | 281 | int ret, gen; |
| 283 | 282 | |
| 284 | 283 | disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL); |
| @@ -340,29 +339,25 @@ nouveau_display_create(struct drm_device *dev) · 55 unmodified lines | ||
| 340 | 339 | drm_kms_helper_poll_init(dev); |
| 341 | 340 | drm_kms_helper_poll_disable(dev); |
| 342 | 341 | |
| 343 | − if (nouveau_modeset == 1 || | |
| 344 | − (nouveau_modeset < 0 && pclass == PCI_CLASS_DISPLAY_VGA)) { | |
| 345 | − if (drm->vbios.dcb.entries) { | |
| 346 | − if (nv_device(drm->device)->card_type < NV_50) | |
| 347 | − ret = nv04_display_create(dev); | |
| 348 | − else | |
| 349 | − ret = nv50_display_create(dev); | |
| 350 | − } else { | |
| 351 | − ret = 0; | |
| 352 | − } | |
| 353 | − | |
| 354 | − if (ret) | |
| 355 | − goto disp_create_err; | |
| 342 | + if (drm->vbios.dcb.entries) { | |
| 343 | + if (nv_device(drm->device)->card_type < NV_50) | |
| 344 | + ret = nv04_display_create(dev); | |
| 345 | + else | |
| 346 | + ret = nv50_display_create(dev); | |
| 347 | + } else { | |
| 348 | + ret = 0; | |
| 349 | + } | |
| 356 | 350 | |
| 357 | − if (dev->mode_config.num_crtc) { | |
| 358 | − ret = drm_vblank_init(dev, dev->mode_config.num_crtc); | |
| 359 | − if (ret) | |
| 360 | − goto vblank_err; | |
| 361 | − } | |
| 351 | + if (ret) | |
| 352 | + goto disp_create_err; | |
| 362 | 353 | |
| 363 | − nouveau_backlight_init(dev); | |
| 354 | + if (dev->mode_config.num_crtc) { | |
| 355 | + ret = drm_vblank_init(dev, dev->mode_config.num_crtc); | |
| 356 | + if (ret) | |
| 357 | + goto vblank_err; | |
| 364 | 358 | } |
| 365 | 359 | |
| 360 | + nouveau_backlight_init(dev); | |
| 366 | 361 | return 0; |
| 367 | 362 | |
| 368 | 363 | vblank_err: |
| @@ -454,7 +454,8 @@ nouveau_fbcon_init(struct drm_device *dev) · 453 unmodified lines | ||
| 454 | 454 | int preferred_bpp; |
| 455 | 455 | int ret; |
| 456 | 456 | |
| 457 | − if (!dev->mode_config.num_crtc) | |
| 457 | + if (!dev->mode_config.num_crtc || | |
| 458 | + (dev->pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) | |
| 458 | 459 | return 0; |
| 459 | 460 | |
| 460 | 461 | fbcon = kzalloc(sizeof(struct nouveau_fbdev), GFP_KERNEL); |
| @@ -104,9 +104,7 @@ nouveau_sgdma_create_ttm(struct ttm_bo_device *bdev, · 103 unmodified lines | ||
| 104 | 104 | else |
| 105 | 105 | nvbe->ttm.ttm.func = &nv50_sgdma_backend; |
| 106 | 106 | |
| 107 | − if (ttm_dma_tt_init(&nvbe->ttm, bdev, size, page_flags, dummy_read_page)) { | |
| 108 | − kfree(nvbe); | |
| 107 | + if (ttm_dma_tt_init(&nvbe->ttm, bdev, size, page_flags, dummy_read_page)) | |
| 109 | 108 | return NULL; |
| 110 | − } | |
| 111 | 109 | return &nvbe->ttm.ttm; |
| 112 | 110 | } |
| @@ -707,8 +707,9 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) · 706 unmodified lines | ||
| 707 | 707 | switch (connector->connector_type) { |
| 708 | 708 | case DRM_MODE_CONNECTOR_DVII: |
| 709 | 709 | case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */ |
| 710 | − if (drm_detect_hdmi_monitor(radeon_connector->edid) && | |
| 711 | − radeon_audio) | |
| 710 | + if ((radeon_connector->audio == RADEON_AUDIO_ENABLE) || | |
| 711 | + (drm_detect_hdmi_monitor(radeon_connector->edid) && | |
| 712 | + (radeon_connector->audio == RADEON_AUDIO_AUTO))) | |
| 712 | 713 | return ATOM_ENCODER_MODE_HDMI; |
| 713 | 714 | else if (radeon_connector->use_digital) |
| 714 | 715 | return ATOM_ENCODER_MODE_DVI; |
| @@ -718,8 +719,9 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) · 3 unmodified lines | ||
| 718 | 719 | case DRM_MODE_CONNECTOR_DVID: |
| 719 | 720 | case DRM_MODE_CONNECTOR_HDMIA: |
| 720 | 721 | default: |
| 721 | − if (drm_detect_hdmi_monitor(radeon_connector->edid) && | |
| 722 | − radeon_audio) | |
| 722 | + if ((radeon_connector->audio == RADEON_AUDIO_ENABLE) || | |
| 723 | + (drm_detect_hdmi_monitor(radeon_connector->edid) && | |
| 724 | + (radeon_connector->audio == RADEON_AUDIO_AUTO))) | |
| 723 | 725 | return ATOM_ENCODER_MODE_HDMI; |
| 724 | 726 | else |
| 725 | 727 | return ATOM_ENCODER_MODE_DVI; |
| @@ -732,8 +734,9 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) · 6 unmodified lines | ||
| 732 | 734 | if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || |
| 733 | 735 | (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) |
| 734 | 736 | return ATOM_ENCODER_MODE_DP; |
| 735 | − else if (drm_detect_hdmi_monitor(radeon_connector->edid) && | |
| 736 | − radeon_audio) | |
| 737 | + else if ((radeon_connector->audio == RADEON_AUDIO_ENABLE) || | |
| 738 | + (drm_detect_hdmi_monitor(radeon_connector->edid) && | |
| 739 | + (radeon_connector->audio == RADEON_AUDIO_AUTO))) | |
| 737 | 740 | return ATOM_ENCODER_MODE_HDMI; |
| 738 | 741 | else |
| 739 | 742 | return ATOM_ENCODER_MODE_DVI; |
| @@ -1647,8 +1650,12 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode) · 907 unmodified lines | ||
| 1647 | 1650 | atombios_dig_encoder_setup(encoder, ATOM_ENABLE, 0); |
| 1648 | 1651 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0); |
| 1649 | 1652 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0); |
| 1650 | − /* some early dce3.2 boards have a bug in their transmitter control table */ | |
| 1651 | − if ((rdev->family != CHIP_RV710) && (rdev->family != CHIP_RV730)) | |
| 1653 | + /* some dce3.x boards have a bug in their transmitter control table. | |
| 1654 | + * ACTION_ENABLE_OUTPUT can probably be dropped since ACTION_ENABLE | |
| 1655 | + * does the same thing and more. | |
| 1656 | + */ | |
| 1657 | + if ((rdev->family != CHIP_RV710) && (rdev->family != CHIP_RV730) && | |
| 1658 | + (rdev->family != CHIP_RS880)) | |
| 1652 | 1659 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0); |
| 1653 | 1660 | } |
| 1654 | 1661 | if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) { |
| @@ -1168,6 +1168,23 @@ static const struct radeon_blacklist_clocks btc_blacklist_clocks[] = · 1167 unmodified lines | ||
| 1168 | 1168 | { 25000, 30000, RADEON_SCLK_UP } |
| 1169 | 1169 | }; |
| 1170 | 1170 | |
| 1171 | +void btc_get_max_clock_from_voltage_dependency_table(struct radeon_clock_voltage_dependency_table *table, | |
| 1172 | + u32 *max_clock) | |
| 1173 | +{ | |
| 1174 | + u32 i, clock = 0; | |
| 1175 | + | |
| 1176 | + if ((table == NULL) || (table->count == 0)) { | |
| 1177 | + *max_clock = clock; | |
| 1178 | + return; | |
| 1179 | + } | |
| 1180 | + | |
| 1181 | + for (i = 0; i < table->count; i++) { | |
| 1182 | + if (clock < table->entries[i].clk) | |
| 1183 | + clock = table->entries[i].clk; | |
| 1184 | + } | |
| 1185 | + *max_clock = clock; | |
| 1186 | +} | |
| 1187 | + | |
| 1171 | 1188 | void btc_apply_voltage_dependency_rules(struct radeon_clock_voltage_dependency_table *table, |
| 1172 | 1189 | u32 clock, u16 max_voltage, u16 *voltage) |
| 1173 | 1190 | { |
| @@ -2080,6 +2097,7 @@ static void btc_apply_state_adjust_rules(struct radeon_device *rdev, · 906 unmodified lines | ||
| 2080 | 2097 | bool disable_mclk_switching; |
| 2081 | 2098 | u32 mclk, sclk; |
| 2082 | 2099 | u16 vddc, vddci; |
| 2100 | + u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc; | |
| 2083 | 2101 | |
| 2084 | 2102 | if ((rdev->pm.dpm.new_active_crtc_count > 1) || |
| 2085 | 2103 | btc_dpm_vblank_too_short(rdev)) |
| @@ -2121,6 +2139,39 @@ static void btc_apply_state_adjust_rules(struct radeon_device *rdev, · 35 unmodified lines | ||
| 2121 | 2139 | ps->low.vddci = max_limits->vddci; |
| 2122 | 2140 | } |
| 2123 | 2141 | |
| 2142 | + /* limit clocks to max supported clocks based on voltage dependency tables */ | |
| 2143 | + btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, | |
| 2144 | + &max_sclk_vddc); | |
| 2145 | + btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, | |
| 2146 | + &max_mclk_vddci); | |
| 2147 | + btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, | |
| 2148 | + &max_mclk_vddc); | |
| 2149 | + | |
| 2150 | + if (max_sclk_vddc) { | |
| 2151 | + if (ps->low.sclk > max_sclk_vddc) | |
| 2152 | + ps->low.sclk = max_sclk_vddc; | |
| 2153 | + if (ps->medium.sclk > max_sclk_vddc) | |
| 2154 | + ps->medium.sclk = max_sclk_vddc; | |
| 2155 | + if (ps->high.sclk > max_sclk_vddc) | |
| 2156 | + ps->high.sclk = max_sclk_vddc; | |
| 2157 | + } | |
| 2158 | + if (max_mclk_vddci) { | |
| 2159 | + if (ps->low.mclk > max_mclk_vddci) | |
| 2160 | + ps->low.mclk = max_mclk_vddci; | |
| 2161 | + if (ps->medium.mclk > max_mclk_vddci) | |
| 2162 | + ps->medium.mclk = max_mclk_vddci; | |
| 2163 | + if (ps->high.mclk > max_mclk_vddci) | |
| 2164 | + ps->high.mclk = max_mclk_vddci; | |
| 2165 | + } | |
| 2166 | + if (max_mclk_vddc) { | |
| 2167 | + if (ps->low.mclk > max_mclk_vddc) | |
| 2168 | + ps->low.mclk = max_mclk_vddc; | |
| 2169 | + if (ps->medium.mclk > max_mclk_vddc) | |
| 2170 | + ps->medium.mclk = max_mclk_vddc; | |
| 2171 | + if (ps->high.mclk > max_mclk_vddc) | |
| 2172 | + ps->high.mclk = max_mclk_vddc; | |
| 2173 | + } | |
| 2174 | + | |
| 2124 | 2175 | /* XXX validate the min clocks required for display */ |
| 2125 | 2176 | |
| 2126 | 2177 | if (disable_mclk_switching) { |
| @@ -2340,12 +2391,6 @@ int btc_dpm_set_power_state(struct radeon_device *rdev) · 213 unmodified lines | ||
| 2340 | 2391 | return ret; |
| 2341 | 2392 | } |
| 2342 | 2393 | |
| 2343 | − ret = rv770_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO); | |
| 2344 | − if (ret) { | |
| 2345 | − DRM_ERROR("rv770_dpm_force_performance_level failed\n"); | |
| 2346 | − return ret; | |
| 2347 | − } | |
| 2348 | − | |
| 2349 | 2394 | return 0; |
| 2350 | 2395 | } |
| 2351 | 2396 | |
| @@ -46,6 +46,8 @@ void btc_adjust_clock_combinations(struct radeon_device *rdev, · 45 unmodified lines | ||
| 46 | 46 | struct rv7xx_pl *pl); |
| 47 | 47 | void btc_apply_voltage_dependency_rules(struct radeon_clock_voltage_dependency_table *table, |
| 48 | 48 | u32 clock, u16 max_voltage, u16 *voltage); |
| 49 | +void btc_get_max_clock_from_voltage_dependency_table(struct radeon_clock_voltage_dependency_table *table, | |
| 50 | + u32 *max_clock); | |
| 49 | 51 | void btc_apply_voltage_delta_rules(struct radeon_device *rdev, |
| 50 | 52 | u16 max_vddc, u16 max_vddci, |
| 51 | 53 | u16 *vddc, u16 *vddci); |
| @@ -146,6 +146,8 @@ static const struct ci_pt_config_reg didt_config_ci[] = · 145 unmodified lines | ||
| 146 | 146 | }; |
| 147 | 147 | |
| 148 | 148 | extern u8 rv770_get_memory_module_index(struct radeon_device *rdev); |
| 149 | +extern void btc_get_max_clock_from_voltage_dependency_table(struct radeon_clock_voltage_dependency_table *table, | |
| 150 | + u32 *max_clock); | |
| 149 | 151 | extern int ni_copy_and_switch_arb_sets(struct radeon_device *rdev, |
| 150 | 152 | u32 arb_freq_src, u32 arb_freq_dest); |
| 151 | 153 | extern u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock); |
| @@ -712,6 +714,7 @@ static void ci_apply_state_adjust_rules(struct radeon_device *rdev, · 560 unmodified lines | ||
| 712 | 714 | struct radeon_clock_and_voltage_limits *max_limits; |
| 713 | 715 | bool disable_mclk_switching; |
| 714 | 716 | u32 sclk, mclk; |
| 717 | + u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc; | |
| 715 | 718 | int i; |
| 716 | 719 | |
| 717 | 720 | if ((rdev->pm.dpm.new_active_crtc_count > 1) || |
| @@ -739,6 +742,29 @@ static void ci_apply_state_adjust_rules(struct radeon_device *rdev, · 21 unmodified lines | ||
| 739 | 742 | } |
| 740 | 743 | } |
| 741 | 744 | |
| 745 | + /* limit clocks to max supported clocks based on voltage dependency tables */ | |
| 746 | + btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, | |
| 747 | + &max_sclk_vddc); | |
| 748 | + btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, | |
| 749 | + &max_mclk_vddci); | |
| 750 | + btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, | |
| 751 | + &max_mclk_vddc); | |
| 752 | + | |
| 753 | + for (i = 0; i < ps->performance_level_count; i++) { | |
| 754 | + if (max_sclk_vddc) { | |
| 755 | + if (ps->performance_levels[i].sclk > max_sclk_vddc) | |
| 756 | + ps->performance_levels[i].sclk = max_sclk_vddc; | |
| 757 | + } | |
| 758 | + if (max_mclk_vddci) { | |
| 759 | + if (ps->performance_levels[i].mclk > max_mclk_vddci) | |
| 760 | + ps->performance_levels[i].mclk = max_mclk_vddci; | |
| 761 | + } | |
| 762 | + if (max_mclk_vddc) { | |
| 763 | + if (ps->performance_levels[i].mclk > max_mclk_vddc) | |
| 764 | + ps->performance_levels[i].mclk = max_mclk_vddc; | |
| 765 | + } | |
| 766 | + } | |
| 767 | + | |
| 742 | 768 | /* XXX validate the min clocks required for display */ |
| 743 | 769 | |
| 744 | 770 | if (disable_mclk_switching) { |
| @@ -4748,12 +4774,6 @@ int ci_dpm_set_power_state(struct radeon_device *rdev) · 4003 unmodified lines | ||
| 4748 | 4774 | if (pi->pcie_performance_request) |
| 4749 | 4775 | ci_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps); |
| 4750 | 4776 | |
| 4751 | − ret = ci_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO); | |
| 4752 | − if (ret) { | |
| 4753 | − DRM_ERROR("ci_dpm_force_performance_level failed\n"); | |
| 4754 | − return ret; | |
| 4755 | − } | |
| 4756 | − | |
| 4757 | 4777 | cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX | |
| 4758 | 4778 | RADEON_CG_BLOCK_MC | |
| 4759 | 4779 | RADEON_CG_BLOCK_SDMA | |
| @@ -47,10 +47,11 @@ int ci_copy_bytes_to_smc(struct radeon_device *rdev, · 46 unmodified lines | ||
| 47 | 47 | u32 smc_start_address, |
| 48 | 48 | const u8 *src, u32 byte_count, u32 limit) |
| 49 | 49 | { |
| 50 | + unsigned long flags; | |
| 50 | 51 | u32 data, original_data; |
| 51 | 52 | u32 addr; |
| 52 | 53 | u32 extra_shift; |
| 53 | − int ret; | |
| 54 | + int ret = 0; | |
| 54 | 55 | |
| 55 | 56 | if (smc_start_address & 3) |
| 56 | 57 | return -EINVAL; |
| @@ -59,13 +60,14 @@ int ci_copy_bytes_to_smc(struct radeon_device *rdev, · 2 unmodified lines | ||
| 59 | 60 | |
| 60 | 61 | addr = smc_start_address; |
| 61 | 62 | |
| 63 | + spin_lock_irqsave(&rdev->smc_idx_lock, flags); | |
| 62 | 64 | while (byte_count >= 4) { |
| 63 | 65 | /* SMC address space is BE */ |
| 64 | 66 | data = (src[0] << 24) | (src[1] << 16) | (src[2] << 8) | src[3]; |
| 65 | 67 | |
| 66 | 68 | ret = ci_set_smc_sram_address(rdev, addr, limit); |
| 67 | 69 | if (ret) |
| 68 | − return ret; | |
| 70 | + goto done; | |
| 69 | 71 | |
| 70 | 72 | WREG32(SMC_IND_DATA_0, data); |
| 71 | 73 | |
| @@ -80,7 +82,7 @@ int ci_copy_bytes_to_smc(struct radeon_device *rdev, · 8 unmodified lines | ||
| 80 | 82 | |
| 81 | 83 | ret = ci_set_smc_sram_address(rdev, addr, limit); |
| 82 | 84 | if (ret) |
| 83 | − return ret; | |
| 85 | + goto done; | |
| 84 | 86 | |
| 85 | 87 | original_data = RREG32(SMC_IND_DATA_0); |
| 86 | 88 | |
| @@ -97,11 +99,15 @@ int ci_copy_bytes_to_smc(struct radeon_device *rdev, · 10 unmodified lines | ||
| 97 | 99 | |
| 98 | 100 | ret = ci_set_smc_sram_address(rdev, addr, limit); |
| 99 | 101 | if (ret) |
| 100 | − return ret; | |
| 102 | + goto done; | |
| 101 | 103 | |
| 102 | 104 | WREG32(SMC_IND_DATA_0, data); |
| 103 | 105 | } |
| 104 | − return 0; | |
| 106 | + | |
| 107 | +done: | |
| 108 | + spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); | |
| 109 | + | |
| 110 | + return ret; | |
| 105 | 111 | } |
| 106 | 112 | |
| 107 | 113 | void ci_start_smc(struct radeon_device *rdev) |
| @@ -197,6 +203,7 @@ PPSMC_Result ci_wait_for_smc_inactive(struct radeon_device *rdev) · 89 unmodified lines | ||
| 197 | 203 | |
| 198 | 204 | int ci_load_smc_ucode(struct radeon_device *rdev, u32 limit) |
| 199 | 205 | { |
| 206 | + unsigned long flags; | |
| 200 | 207 | u32 ucode_start_address; |
| 201 | 208 | u32 ucode_size; |
| 202 | 209 | const u8 *src; |
| @@ -219,6 +226,7 @@ int ci_load_smc_ucode(struct radeon_device *rdev, u32 limit) · 16 unmodified lines | ||
| 219 | 226 | return -EINVAL; |
| 220 | 227 | |
| 221 | 228 | src = (const u8 *)rdev->smc_fw->data; |
| 229 | + spin_lock_irqsave(&rdev->smc_idx_lock, flags); | |
| 222 | 230 | WREG32(SMC_IND_INDEX_0, ucode_start_address); |
| 223 | 231 | WREG32_P(SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, ~AUTO_INCREMENT_IND_0); |
| 224 | 232 | while (ucode_size >= 4) { |
| @@ -231,6 +239,7 @@ int ci_load_smc_ucode(struct radeon_device *rdev, u32 limit) · 6 unmodified lines | ||
| 231 | 239 | ucode_size -= 4; |
| 232 | 240 | } |
| 233 | 241 | WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); |
| 242 | + spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); | |
| 234 | 243 | |
| 235 | 244 | return 0; |
| 236 | 245 | } |
| @@ -238,25 +247,29 @@ int ci_load_smc_ucode(struct radeon_device *rdev, u32 limit) · 1 unmodified line | ||
| 238 | 247 | int ci_read_smc_sram_dword(struct radeon_device *rdev, |
| 239 | 248 | u32 smc_address, u32 *value, u32 limit) |
| 240 | 249 | { |
| 250 | + unsigned long flags; | |
| 241 | 251 | int ret; |
| 242 | 252 | |
| 253 | + spin_lock_irqsave(&rdev->smc_idx_lock, flags); | |
| 243 | 254 | ret = ci_set_smc_sram_address(rdev, smc_address, limit); |
| 244 | − if (ret) | |
| 245 | − return ret; | |
| 255 | + if (ret == 0) | |
| 256 | + *value = RREG32(SMC_IND_DATA_0); | |
| 257 | + spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); | |
| 246 | 258 | |
| 247 | − *value = RREG32(SMC_IND_DATA_0); | |
| 248 | − return 0; | |
| 259 | + return ret; | |
| 249 | 260 | } |
| 250 | 261 | |
| 251 | 262 | int ci_write_smc_sram_dword(struct radeon_device *rdev, |
| 252 | 263 | u32 smc_address, u32 value, u32 limit) |
| 253 | 264 | { |
| 265 | + unsigned long flags; | |
| 254 | 266 | int ret; |
| 255 | 267 | |
| 268 | + spin_lock_irqsave(&rdev->smc_idx_lock, flags); | |
| 256 | 269 | ret = ci_set_smc_sram_address(rdev, smc_address, limit); |
| 257 | − if (ret) | |
| 258 | − return ret; | |
| 270 | + if (ret == 0) | |
| 271 | + WREG32(SMC_IND_DATA_0, value); | |
| 272 | + spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); | |
| 259 | 273 | |
| 260 | − WREG32(SMC_IND_DATA_0, value); | |
| 261 | − return 0; | |
| 274 | + return ret; | |
| 262 | 275 | } |
| @@ -77,6 +77,8 @@ static void cik_pcie_gen3_enable(struct radeon_device *rdev); · 76 unmodified lines | ||
| 77 | 77 | static void cik_program_aspm(struct radeon_device *rdev); |
| 78 | 78 | static void cik_init_pg(struct radeon_device *rdev); |
| 79 | 79 | static void cik_init_cg(struct radeon_device *rdev); |
| 80 | +static void cik_enable_gui_idle_interrupt(struct radeon_device *rdev, | |
| 81 | + bool enable); | |
| 80 | 82 | |
| 81 | 83 | /* get temperature in millidegrees */ |
| 82 | 84 | int ci_get_temp(struct radeon_device *rdev) |
| @@ -120,20 +122,27 @@ int kv_get_temp(struct radeon_device *rdev) · 37 unmodified lines | ||
| 120 | 122 | */ |
| 121 | 123 | u32 cik_pciep_rreg(struct radeon_device *rdev, u32 reg) |
| 122 | 124 | { |
| 125 | + unsigned long flags; | |
| 123 | 126 | u32 r; |
| 124 | 127 | |
| 128 | + spin_lock_irqsave(&rdev->pciep_idx_lock, flags); | |
| 125 | 129 | WREG32(PCIE_INDEX, reg); |
| 126 | 130 | (void)RREG32(PCIE_INDEX); |
| 127 | 131 | r = RREG32(PCIE_DATA); |
| 132 | + spin_unlock_irqrestore(&rdev->pciep_idx_lock, flags); | |
| 128 | 133 | return r; |
| 129 | 134 | } |
| 130 | 135 | |
| 131 | 136 | void cik_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v) |
| 132 | 137 | { |
| 138 | + unsigned long flags; | |
| 139 | + | |
| 140 | + spin_lock_irqsave(&rdev->pciep_idx_lock, flags); | |
| 133 | 141 | WREG32(PCIE_INDEX, reg); |
| 134 | 142 | (void)RREG32(PCIE_INDEX); |
| 135 | 143 | WREG32(PCIE_DATA, v); |
| 136 | 144 | (void)RREG32(PCIE_DATA); |
| 145 | + spin_unlock_irqrestore(&rdev->pciep_idx_lock, flags); | |
| 137 | 146 | } |
| 138 | 147 | |
| 139 | 148 | static const u32 spectre_rlc_save_restore_register_list[] = |
| @@ -2722,7 +2731,8 @@ static void cik_gpu_init(struct radeon_device *rdev) · 2582 unmodified lines | ||
| 2722 | 2731 | } else if ((rdev->pdev->device == 0x1309) || |
| 2723 | 2732 | (rdev->pdev->device == 0x130A) || |
| 2724 | 2733 | (rdev->pdev->device == 0x130D) || |
| 2725 | − (rdev->pdev->device == 0x1313)) { | |
| 2734 | + (rdev->pdev->device == 0x1313) || | |
| 2735 | + (rdev->pdev->device == 0x131D)) { | |
| 2726 | 2736 | rdev->config.cik.max_cu_per_sh = 6; |
| 2727 | 2737 | rdev->config.cik.max_backends_per_se = 2; |
| 2728 | 2738 | } else if ((rdev->pdev->device == 0x1306) || |
| @@ -2835,10 +2845,8 @@ static void cik_gpu_init(struct radeon_device *rdev) · 106 unmodified lines | ||
| 2835 | 2845 | rdev->config.cik.tile_config |= (3 << 0); |
| 2836 | 2846 | break; |
| 2837 | 2847 | } |
| 2838 | − if ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) | |
| 2839 | − rdev->config.cik.tile_config |= 1 << 4; | |
| 2840 | − else | |
| 2841 | − rdev->config.cik.tile_config |= 0 << 4; | |
| 2848 | + rdev->config.cik.tile_config |= | |
| 2849 | + ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4; | |
| 2842 | 2850 | rdev->config.cik.tile_config |= |
| 2843 | 2851 | ((gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT) << 8; |
| 2844 | 2852 | rdev->config.cik.tile_config |= |
| @@ -4013,6 +4021,8 @@ static int cik_cp_resume(struct radeon_device *rdev) · 1168 unmodified lines | ||
| 4013 | 4021 | { |
| 4014 | 4022 | int r; |
| 4015 | 4023 | |
| 4024 | + cik_enable_gui_idle_interrupt(rdev, false); | |
| 4025 | + | |
| 4016 | 4026 | r = cik_cp_load_microcode(rdev); |
| 4017 | 4027 | if (r) |
| 4018 | 4028 | return r; |
| @@ -4024,6 +4034,8 @@ static int cik_cp_resume(struct radeon_device *rdev) · 5 unmodified lines | ||
| 4024 | 4034 | if (r) |
| 4025 | 4035 | return r; |
| 4026 | 4036 | |
| 4037 | + cik_enable_gui_idle_interrupt(rdev, true); | |
| 4038 | + | |
| 4027 | 4039 | return 0; |
| 4028 | 4040 | } |
| 4029 | 4041 | |
| @@ -4442,8 +4454,8 @@ static int cik_mc_init(struct radeon_device *rdev) · 412 unmodified lines | ||
| 4442 | 4454 | rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); |
| 4443 | 4455 | rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); |
| 4444 | 4456 | /* size in MB on si */ |
| 4445 | − rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; | |
| 4446 | − rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; | |
| 4457 | + rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL; | |
| 4458 | + rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL; | |
| 4447 | 4459 | rdev->mc.visible_vram_size = rdev->mc.aper_size; |
| 4448 | 4460 | si_vram_gtt_location(rdev, &rdev->mc); |
| 4449 | 4461 | radeon_update_bandwidth_info(rdev); |
| @@ -4721,12 +4733,13 @@ static void cik_vm_decode_fault(struct radeon_device *rdev, · 271 unmodified lines | ||
| 4721 | 4733 | u32 mc_id = (status & MEMORY_CLIENT_ID_MASK) >> MEMORY_CLIENT_ID_SHIFT; |
| 4722 | 4734 | u32 vmid = (status & FAULT_VMID_MASK) >> FAULT_VMID_SHIFT; |
| 4723 | 4735 | u32 protections = (status & PROTECTIONS_MASK) >> PROTECTIONS_SHIFT; |
| 4724 | − char *block = (char *)&mc_client; | |
| 4736 | + char block[5] = { mc_client >> 24, (mc_client >> 16) & 0xff, | |
| 4737 | + (mc_client >> 8) & 0xff, mc_client & 0xff, 0 }; | |
| 4725 | 4738 | |
| 4726 | − printk("VM fault (0x%02x, vmid %d) at page %u, %s from %s (%d)\n", | |
| 4739 | + printk("VM fault (0x%02x, vmid %d) at page %u, %s from '%s' (0x%08x) (%d)\n", | |
| 4727 | 4740 | protections, vmid, addr, |
| 4728 | 4741 | (status & MEMORY_CLIENT_RW_MASK) ? "write" : "read", |
| 4729 | − block, mc_id); | |
| 4742 | + block, mc_client, mc_id); | |
| 4730 | 4743 | } |
| 4731 | 4744 | |
| 4732 | 4745 | /** |
| @@ -5376,7 +5389,9 @@ static void cik_enable_hdp_ls(struct radeon_device *rdev, · 643 unmodified lines | ||
| 5376 | 5389 | void cik_update_cg(struct radeon_device *rdev, |
| 5377 | 5390 | u32 block, bool enable) |
| 5378 | 5391 | { |
| 5392 | + | |
| 5379 | 5393 | if (block & RADEON_CG_BLOCK_GFX) { |
| 5394 | + cik_enable_gui_idle_interrupt(rdev, false); | |
| 5380 | 5395 | /* order matters! */ |
| 5381 | 5396 | if (enable) { |
| 5382 | 5397 | cik_enable_mgcg(rdev, true); |
| @@ -5385,6 +5400,7 @@ void cik_update_cg(struct radeon_device *rdev, · 2 unmodified lines | ||
| 5385 | 5400 | cik_enable_cgcg(rdev, false); |
| 5386 | 5401 | cik_enable_mgcg(rdev, false); |
| 5387 | 5402 | } |
| 5403 | + cik_enable_gui_idle_interrupt(rdev, true); | |
| 5388 | 5404 | } |
| 5389 | 5405 | |
| 5390 | 5406 | if (block & RADEON_CG_BLOCK_MC) { |
| @@ -5541,7 +5557,7 @@ static void cik_enable_gfx_cgpg(struct radeon_device *rdev, · 150 unmodified lines | ||
| 5541 | 5557 | { |
| 5542 | 5558 | u32 data, orig; |
| 5543 | 5559 | |
| 5544 | − if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_CG)) { | |
| 5560 | + if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG)) { | |
| 5545 | 5561 | orig = data = RREG32(RLC_PG_CNTL); |
| 5546 | 5562 | data |= GFX_PG_ENABLE; |
| 5547 | 5563 | if (orig != data) |
| @@ -5805,7 +5821,7 @@ static void cik_init_pg(struct radeon_device *rdev) · 257 unmodified lines | ||
| 5805 | 5821 | if (rdev->pg_flags) { |
| 5806 | 5822 | cik_enable_sck_slowdown_on_pu(rdev, true); |
| 5807 | 5823 | cik_enable_sck_slowdown_on_pd(rdev, true); |
| 5808 | − if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_CG) { | |
| 5824 | + if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG) { | |
| 5809 | 5825 | cik_init_gfx_cgpg(rdev); |
| 5810 | 5826 | cik_enable_cp_pg(rdev, true); |
| 5811 | 5827 | cik_enable_gds_pg(rdev, true); |
| @@ -5819,7 +5835,7 @@ static void cik_fini_pg(struct radeon_device *rdev) · 7 unmodified lines | ||
| 5819 | 5835 | { |
| 5820 | 5836 | if (rdev->pg_flags) { |
| 5821 | 5837 | cik_update_gfx_pg(rdev, false); |
| 5822 | − if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_CG) { | |
| 5838 | + if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG) { | |
| 5823 | 5839 | cik_enable_cp_pg(rdev, false); |
| 5824 | 5840 | cik_enable_gds_pg(rdev, false); |
| 5825 | 5841 | } |
| @@ -5895,7 +5911,9 @@ static void cik_disable_interrupt_state(struct radeon_device *rdev) · 69 unmodified lines | ||
| 5895 | 5911 | u32 tmp; |
| 5896 | 5912 | |
| 5897 | 5913 | /* gfx ring */ |
| 5898 | − WREG32(CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); | |
| 5914 | + tmp = RREG32(CP_INT_CNTL_RING0) & | |
| 5915 | + (CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); | |
| 5916 | + WREG32(CP_INT_CNTL_RING0, tmp); | |
| 5899 | 5917 | /* sdma */ |
| 5900 | 5918 | tmp = RREG32(SDMA0_CNTL + SDMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; |
| 5901 | 5919 | WREG32(SDMA0_CNTL + SDMA0_REGISTER_OFFSET, tmp); |
| @@ -6036,8 +6054,7 @@ static int cik_irq_init(struct radeon_device *rdev) · 134 unmodified lines | ||
| 6036 | 6054 | */ |
| 6037 | 6055 | int cik_irq_set(struct radeon_device *rdev) |
| 6038 | 6056 | { |
| 6039 | − u32 cp_int_cntl = CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE | | |
| 6040 | − PRIV_INSTR_INT_ENABLE | PRIV_REG_INT_ENABLE; | |
| 6057 | + u32 cp_int_cntl; | |
| 6041 | 6058 | u32 cp_m1p0, cp_m1p1, cp_m1p2, cp_m1p3; |
| 6042 | 6059 | u32 cp_m2p0, cp_m2p1, cp_m2p2, cp_m2p3; |
| 6043 | 6060 | u32 crtc1 = 0, crtc2 = 0, crtc3 = 0, crtc4 = 0, crtc5 = 0, crtc6 = 0; |
| @@ -6058,6 +6075,10 @@ int cik_irq_set(struct radeon_device *rdev) · 14 unmodified lines | ||
| 6058 | 6075 | return 0; |
| 6059 | 6076 | } |
| 6060 | 6077 | |
| 6078 | + cp_int_cntl = RREG32(CP_INT_CNTL_RING0) & | |
| 6079 | + (CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); | |
| 6080 | + cp_int_cntl |= PRIV_INSTR_INT_ENABLE | PRIV_REG_INT_ENABLE; | |
| 6081 | + | |
| 6061 | 6082 | hpd1 = RREG32(DC_HPD1_INT_CONTROL) & ~DC_HPDx_INT_EN; |
| 6062 | 6083 | hpd2 = RREG32(DC_HPD2_INT_CONTROL) & ~DC_HPDx_INT_EN; |
| 6063 | 6084 | hpd3 = RREG32(DC_HPD3_INT_CONTROL) & ~DC_HPDx_INT_EN; |
| @@ -2014,12 +2014,6 @@ int cypress_dpm_set_power_state(struct radeon_device *rdev) · 2013 unmodified lines | ||
| 2014 | 2014 | if (eg_pi->pcie_performance_request) |
| 2015 | 2015 | cypress_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps); |
| 2016 | 2016 | |
| 2017 | − ret = rv770_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO); | |
| 2018 | − if (ret) { | |
| 2019 | − DRM_ERROR("rv770_dpm_force_performance_level failed\n"); | |
| 2020 | − return ret; | |
| 2021 | − } | |
| 2022 | − | |
| 2023 | 2017 | return 0; |
| 2024 | 2018 | } |
| 2025 | 2019 | |
| @@ -28,22 +28,30 @@ · 27 unmodified lines | ||
| 28 | 28 | static u32 dce6_endpoint_rreg(struct radeon_device *rdev, |
| 29 | 29 | u32 block_offset, u32 reg) |
| 30 | 30 | { |
| 31 | + unsigned long flags; | |
| 31 | 32 | u32 r; |
| 32 | 33 | |
| 34 | + spin_lock_irqsave(&rdev->end_idx_lock, flags); | |
| 33 | 35 | WREG32(AZ_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); |
| 34 | 36 | r = RREG32(AZ_F0_CODEC_ENDPOINT_DATA + block_offset); |
| 37 | + spin_unlock_irqrestore(&rdev->end_idx_lock, flags); | |
| 38 | + | |
| 35 | 39 | return r; |
| 36 | 40 | } |
| 37 | 41 | |
| 38 | 42 | static void dce6_endpoint_wreg(struct radeon_device *rdev, |
| 39 | 43 | u32 block_offset, u32 reg, u32 v) |
| 40 | 44 | { |
| 45 | + unsigned long flags; | |
| 46 | + | |
| 47 | + spin_lock_irqsave(&rdev->end_idx_lock, flags); | |
| 41 | 48 | if (ASIC_IS_DCE8(rdev)) |
| 42 | 49 | WREG32(AZ_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); |
| 43 | 50 | else |
| 44 | 51 | WREG32(AZ_F0_CODEC_ENDPOINT_INDEX + block_offset, |
| 45 | 52 | AZ_ENDPOINT_REG_WRITE_EN | AZ_ENDPOINT_REG_INDEX(reg)); |
| 46 | 53 | WREG32(AZ_F0_CODEC_ENDPOINT_DATA + block_offset, v); |
| 54 | + spin_unlock_irqrestore(&rdev->end_idx_lock, flags); | |
| 47 | 55 | } |
| 48 | 56 | |
| 49 | 57 | #define RREG32_ENDPOINT(block, reg) dce6_endpoint_rreg(rdev, (block), (reg)) |
| @@ -86,12 +94,12 @@ void dce6_afmt_select_pin(struct drm_encoder *encoder) · 36 unmodified lines | ||
| 86 | 94 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
| 87 | 95 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
| 88 | 96 | u32 offset = dig->afmt->offset; |
| 89 | − u32 id = dig->afmt->pin->id; | |
| 90 | 97 | |
| 91 | 98 | if (!dig->afmt->pin) |
| 92 | 99 | return; |
| 93 | 100 | |
| 94 | − WREG32(AFMT_AUDIO_SRC_CONTROL + offset, AFMT_AUDIO_SRC_SELECT(id)); | |
| 101 | + WREG32(AFMT_AUDIO_SRC_CONTROL + offset, | |
| 102 | + AFMT_AUDIO_SRC_SELECT(dig->afmt->pin->id)); | |
| 95 | 103 | } |
| 96 | 104 | |
| 97 | 105 | void dce6_afmt_write_speaker_allocation(struct drm_encoder *encoder) |
| @@ -40,6 +40,7 @@ static int kv_calculate_dpm_settings(struct radeon_device *rdev); · 39 unmodified lines | ||
| 40 | 40 | static void kv_enable_new_levels(struct radeon_device *rdev); |
| 41 | 41 | static void kv_program_nbps_index_settings(struct radeon_device *rdev, |
| 42 | 42 | struct radeon_ps *new_rps); |
| 43 | +static int kv_set_enabled_level(struct radeon_device *rdev, u32 level); | |
| 43 | 44 | static int kv_set_enabled_levels(struct radeon_device *rdev); |
| 44 | 45 | static int kv_force_dpm_highest(struct radeon_device *rdev); |
| 45 | 46 | static int kv_force_dpm_lowest(struct radeon_device *rdev); |
| @@ -519,7 +520,7 @@ static int kv_set_dpm_boot_state(struct radeon_device *rdev) · 473 unmodified lines | ||
| 519 | 520 | |
| 520 | 521 | static void kv_program_vc(struct radeon_device *rdev) |
| 521 | 522 | { |
| 522 | − WREG32_SMC(CG_FTV_0, 0x3FFFC000); | |
| 523 | + WREG32_SMC(CG_FTV_0, 0x3FFFC100); | |
| 523 | 524 | } |
| 524 | 525 | |
| 525 | 526 | static void kv_clear_vc(struct radeon_device *rdev) |
| @@ -638,7 +639,10 @@ static int kv_force_lowest_valid(struct radeon_device *rdev) · 112 unmodified lines | ||
| 638 | 639 | |
| 639 | 640 | static int kv_unforce_levels(struct radeon_device *rdev) |
| 640 | 641 | { |
| 641 | − return kv_notify_message_to_smu(rdev, PPSMC_MSG_NoForcedLevel); | |
| 642 | + if (rdev->family == CHIP_KABINI) | |
| 643 | + return kv_notify_message_to_smu(rdev, PPSMC_MSG_NoForcedLevel); | |
| 644 | + else | |
| 645 | + return kv_set_enabled_levels(rdev); | |
| 642 | 646 | } |
| 643 | 647 | |
| 644 | 648 | static int kv_update_sclk_t(struct radeon_device *rdev) |
| @@ -667,9 +671,8 @@ static int kv_program_bootup_state(struct radeon_device *rdev) · 22 unmodified lines | ||
| 667 | 671 | &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; |
| 668 | 672 | |
| 669 | 673 | if (table && table->count) { |
| 670 | − for (i = pi->graphics_dpm_level_count - 1; i >= 0; i--) { | |
| 671 | − if ((table->entries[i].clk == pi->boot_pl.sclk) || | |
| 672 | − (i == 0)) | |
| 674 | + for (i = pi->graphics_dpm_level_count - 1; i > 0; i--) { | |
| 675 | + if (table->entries[i].clk == pi->boot_pl.sclk) | |
| 673 | 676 | break; |
| 674 | 677 | } |
| 675 | 678 | |
| @@ -682,9 +685,8 @@ static int kv_program_bootup_state(struct radeon_device *rdev) · 6 unmodified lines | ||
| 682 | 685 | if (table->num_max_dpm_entries == 0) |
| 683 | 686 | return -EINVAL; |
| 684 | 687 | |
| 685 | − for (i = pi->graphics_dpm_level_count - 1; i >= 0; i--) { | |
| 686 | − if ((table->entries[i].sclk_frequency == pi->boot_pl.sclk) || | |
| 687 | − (i == 0)) | |
| 688 | + for (i = pi->graphics_dpm_level_count - 1; i > 0; i--) { | |
| 689 | + if (table->entries[i].sclk_frequency == pi->boot_pl.sclk) | |
| 688 | 690 | break; |
| 689 | 691 | } |
| 690 | 692 | |
| @@ -1078,6 +1080,13 @@ static int kv_enable_ulv(struct radeon_device *rdev, bool enable) · 387 unmodified lines | ||
| 1078 | 1080 | PPSMC_MSG_EnableULV : PPSMC_MSG_DisableULV); |
| 1079 | 1081 | } |
| 1080 | 1082 | |
| 1083 | +static void kv_reset_acp_boot_level(struct radeon_device *rdev) | |
| 1084 | +{ | |
| 1085 | + struct kv_power_info *pi = kv_get_pi(rdev); | |
| 1086 | + | |
| 1087 | + pi->acp_boot_level = 0xff; | |
| 1088 | +} | |
| 1089 | + | |
| 1081 | 1090 | static void kv_update_current_ps(struct radeon_device *rdev, |
| 1082 | 1091 | struct radeon_ps *rps) |
| 1083 | 1092 | { |
| @@ -1100,6 +1109,18 @@ static void kv_update_requested_ps(struct radeon_device *rdev, · 16 unmodified lines | ||
| 1100 | 1109 | pi->requested_rps.ps_priv = &pi->requested_ps; |
| 1101 | 1110 | } |
| 1102 | 1111 | |
| 1112 | +void kv_dpm_enable_bapm(struct radeon_device *rdev, bool enable) | |
| 1113 | +{ | |
| 1114 | + struct kv_power_info *pi = kv_get_pi(rdev); | |
| 1115 | + int ret; | |
| 1116 | + | |
| 1117 | + if (pi->bapm_enable) { | |
| 1118 | + ret = kv_smc_bapm_enable(rdev, enable); | |
| 1119 | + if (ret) | |
| 1120 | + DRM_ERROR("kv_smc_bapm_enable failed\n"); | |
| 1121 | + } | |
| 1122 | +} | |
| 1123 | + | |
| 1103 | 1124 | int kv_dpm_enable(struct radeon_device *rdev) |
| 1104 | 1125 | { |
| 1105 | 1126 | struct kv_power_info *pi = kv_get_pi(rdev); |
| @@ -1192,6 +1213,8 @@ int kv_dpm_enable(struct radeon_device *rdev) · 86 unmodified lines | ||
| 1192 | 1213 | return ret; |
| 1193 | 1214 | } |
| 1194 | 1215 | |
| 1216 | + kv_reset_acp_boot_level(rdev); | |
| 1217 | + | |
| 1195 | 1218 | if (rdev->irq.installed && |
| 1196 | 1219 | r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { |
| 1197 | 1220 | ret = kv_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); |
| @@ -1203,6 +1226,12 @@ int kv_dpm_enable(struct radeon_device *rdev) · 5 unmodified lines | ||
| 1203 | 1226 | radeon_irq_set(rdev); |
| 1204 | 1227 | } |
| 1205 | 1228 | |
| 1229 | + ret = kv_smc_bapm_enable(rdev, false); | |
| 1230 | + if (ret) { | |
| 1231 | + DRM_ERROR("kv_smc_bapm_enable failed\n"); | |
| 1232 | + return ret; | |
| 1233 | + } | |
| 1234 | + | |
| 1206 | 1235 | /* powerdown unused blocks for now */ |
| 1207 | 1236 | kv_dpm_powergate_acp(rdev, true); |
| 1208 | 1237 | kv_dpm_powergate_samu(rdev, true); |
| @@ -1226,6 +1255,8 @@ void kv_dpm_disable(struct radeon_device *rdev) · 17 unmodified lines | ||
| 1226 | 1255 | RADEON_CG_BLOCK_BIF | |
| 1227 | 1256 | RADEON_CG_BLOCK_HDP), false); |
| 1228 | 1257 | |
| 1258 | + kv_smc_bapm_enable(rdev, false); | |
| 1259 | + | |
| 1229 | 1260 | /* powerup blocks */ |
| 1230 | 1261 | kv_dpm_powergate_acp(rdev, false); |
| 1231 | 1262 | kv_dpm_powergate_samu(rdev, false); |
| @@ -1450,6 +1481,39 @@ static int kv_update_samu_dpm(struct radeon_device *rdev, bool gate) · 218 unmodified lines | ||
| 1450 | 1481 | return kv_enable_samu_dpm(rdev, !gate); |
| 1451 | 1482 | } |
| 1452 | 1483 | |
| 1484 | +static u8 kv_get_acp_boot_level(struct radeon_device *rdev) | |
| 1485 | +{ | |
| 1486 | + u8 i; | |
| 1487 | + struct radeon_clock_voltage_dependency_table *table = | |
| 1488 | + &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; | |
| 1489 | + | |
| 1490 | + for (i = 0; i < table->count; i++) { | |
| 1491 | + if (table->entries[i].clk >= 0) /* XXX */ | |
| 1492 | + break; | |
| 1493 | + } | |
| 1494 | + | |
| 1495 | + if (i >= table->count) | |
| 1496 | + i = table->count - 1; | |
| 1497 | + | |
| 1498 | + return i; | |
| 1499 | +} | |
| 1500 | + | |
| 1501 | +static void kv_update_acp_boot_level(struct radeon_device *rdev) | |
| 1502 | +{ | |
| 1503 | + struct kv_power_info *pi = kv_get_pi(rdev); | |
| 1504 | + u8 acp_boot_level; | |
| 1505 | + | |
| 1506 | + if (!pi->caps_stable_p_state) { | |
| 1507 | + acp_boot_level = kv_get_acp_boot_level(rdev); | |
| 1508 | + if (acp_boot_level != pi->acp_boot_level) { | |
| 1509 | + pi->acp_boot_level = acp_boot_level; | |
| 1510 | + kv_send_msg_to_smc_with_parameter(rdev, | |
| 1511 | + PPSMC_MSG_ACPDPM_SetEnabledMask, | |
| 1512 | + (1 << pi->acp_boot_level)); | |
| 1513 | + } | |
| 1514 | + } | |
| 1515 | +} | |
| 1516 | + | |
| 1453 | 1517 | static int kv_update_acp_dpm(struct radeon_device *rdev, bool gate) |
| 1454 | 1518 | { |
| 1455 | 1519 | struct kv_power_info *pi = kv_get_pi(rdev); |
| @@ -1461,7 +1525,7 @@ static int kv_update_acp_dpm(struct radeon_device *rdev, bool gate) · 5 unmodified lines | ||
| 1461 | 1525 | if (pi->caps_stable_p_state) |
| 1462 | 1526 | pi->acp_boot_level = table->count - 1; |
| 1463 | 1527 | else |
| 1464 | − pi->acp_boot_level = 0; | |
| 1528 | + pi->acp_boot_level = kv_get_acp_boot_level(rdev); | |
| 1465 | 1529 | |
| 1466 | 1530 | ret = kv_copy_bytes_to_smc(rdev, |
| 1467 | 1531 | pi->dpm_table_start + |
| @@ -1588,13 +1652,11 @@ static void kv_set_valid_clock_range(struct radeon_device *rdev, · 120 unmodified lines | ||
| 1588 | 1652 | } |
| 1589 | 1653 | } |
| 1590 | 1654 | |
| 1591 | − for (i = pi->graphics_dpm_level_count - 1; i >= 0; i--) { | |
| 1592 | − if ((table->entries[i].clk <= new_ps->levels[new_ps->num_levels -1].sclk) || | |
| 1593 | − (i == 0)) { | |
| 1594 | − pi->highest_valid = i; | |
| 1655 | + for (i = pi->graphics_dpm_level_count - 1; i > 0; i--) { | |
| 1656 | + if (table->entries[i].clk <= new_ps->levels[new_ps->num_levels - 1].sclk) | |
| 1595 | 1657 | break; |
| 1596 | − } | |
| 1597 | 1658 | } |
| 1659 | + pi->highest_valid = i; | |
| 1598 | 1660 | |
| 1599 | 1661 | if (pi->lowest_valid > pi->highest_valid) { |
| 1600 | 1662 | if ((new_ps->levels[0].sclk - table->entries[pi->highest_valid].clk) > |
| @@ -1615,14 +1677,12 @@ static void kv_set_valid_clock_range(struct radeon_device *rdev, · 14 unmodified lines | ||
| 1615 | 1677 | } |
| 1616 | 1678 | } |
| 1617 | 1679 | |
| 1618 | − for (i = pi->graphics_dpm_level_count - 1; i >= 0; i--) { | |
| 1680 | + for (i = pi->graphics_dpm_level_count - 1; i > 0; i--) { | |
| 1619 | 1681 | if (table->entries[i].sclk_frequency <= |
| 1620 | − new_ps->levels[new_ps->num_levels - 1].sclk || | |
| 1621 | − i == 0) { | |
| 1622 | − pi->highest_valid = i; | |
| 1682 | + new_ps->levels[new_ps->num_levels - 1].sclk) | |
| 1623 | 1683 | break; |
| 1624 | − } | |
| 1625 | 1684 | } |
| 1685 | + pi->highest_valid = i; | |
| 1626 | 1686 | |
| 1627 | 1687 | if (pi->lowest_valid > pi->highest_valid) { |
| 1628 | 1688 | if ((new_ps->levels[0].sclk - |
| @@ -1724,6 +1784,14 @@ int kv_dpm_set_power_state(struct radeon_device *rdev) · 95 unmodified lines | ||
| 1724 | 1784 | RADEON_CG_BLOCK_BIF | |
| 1725 | 1785 | RADEON_CG_BLOCK_HDP), false); |
| 1726 | 1786 | |
| 1787 | + if (pi->bapm_enable) { | |
| 1788 | + ret = kv_smc_bapm_enable(rdev, rdev->pm.dpm.ac_power); | |
| 1789 | + if (ret) { | |
| 1790 | + DRM_ERROR("kv_smc_bapm_enable failed\n"); | |
| 1791 | + return ret; | |
| 1792 | + } | |
| 1793 | + } | |
| 1794 | + | |
| 1727 | 1795 | if (rdev->family == CHIP_KABINI) { |
| 1728 | 1796 | if (pi->enable_dpm) { |
| 1729 | 1797 | kv_set_valid_clock_range(rdev, new_ps); |
| @@ -1775,6 +1843,7 @@ int kv_dpm_set_power_state(struct radeon_device *rdev) · 45 unmodified lines | ||
| 1775 | 1843 | return ret; |
| 1776 | 1844 | } |
| 1777 | 1845 | #endif |
| 1846 | + kv_update_acp_boot_level(rdev); | |
| 1778 | 1847 | kv_update_sclk_t(rdev); |
| 1779 | 1848 | kv_enable_nb_dpm(rdev); |
| 1780 | 1849 | } |
| @@ -1785,7 +1854,6 @@ int kv_dpm_set_power_state(struct radeon_device *rdev) · 4 unmodified lines | ||
| 1785 | 1854 | RADEON_CG_BLOCK_BIF | |
| 1786 | 1855 | RADEON_CG_BLOCK_HDP), true); |
| 1787 | 1856 | |
| 1788 | − rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO; | |
| 1789 | 1857 | return 0; |
| 1790 | 1858 | } |
| 1791 | 1859 | |
| @@ -1806,12 +1874,23 @@ void kv_dpm_setup_asic(struct radeon_device *rdev) · 14 unmodified lines | ||
| 1806 | 1874 | |
| 1807 | 1875 | void kv_dpm_reset_asic(struct radeon_device *rdev) |
| 1808 | 1876 | { |
| 1809 | − kv_force_lowest_valid(rdev); | |
| 1810 | − kv_init_graphics_levels(rdev); | |
| 1811 | − kv_program_bootup_state(rdev); | |
| 1812 | − kv_upload_dpm_settings(rdev); | |
| 1813 | − kv_force_lowest_valid(rdev); | |
| 1814 | − kv_unforce_levels(rdev); | |
| 1877 | + struct kv_power_info *pi = kv_get_pi(rdev); | |
| 1878 | + | |
| 1879 | + if (rdev->family == CHIP_KABINI) { | |
| 1880 | + kv_force_lowest_valid(rdev); | |
| 1881 | + kv_init_graphics_levels(rdev); | |
| 1882 | + kv_program_bootup_state(rdev); | |
| 1883 | + kv_upload_dpm_settings(rdev); | |
| 1884 | + kv_force_lowest_valid(rdev); | |
| 1885 | + kv_unforce_levels(rdev); | |
| 1886 | + } else { | |
| 1887 | + kv_init_graphics_levels(rdev); | |
| 1888 | + kv_program_bootup_state(rdev); | |
| 1889 | + kv_freeze_sclk_dpm(rdev, true); | |
| 1890 | + kv_upload_dpm_settings(rdev); | |
| 1891 | + kv_freeze_sclk_dpm(rdev, false); | |
| 1892 | + kv_set_enabled_level(rdev, pi->graphics_boot_level); | |
| 1893 | + } | |
| 1815 | 1894 | } |
| 1816 | 1895 | |
| 1817 | 1896 | //XXX use sumo_dpm_display_configuration_changed |
| @@ -1871,12 +1950,15 @@ static int kv_force_dpm_highest(struct radeon_device *rdev) · 53 unmodified lines | ||
| 1871 | 1950 | if (ret) |
| 1872 | 1951 | return ret; |
| 1873 | 1952 | |
| 1874 | − for (i = SMU7_MAX_LEVELS_GRAPHICS - 1; i >= 0; i--) { | |
| 1953 | + for (i = SMU7_MAX_LEVELS_GRAPHICS - 1; i > 0; i--) { | |
| 1875 | 1954 | if (enable_mask & (1 << i)) |
| 1876 | 1955 | break; |
| 1877 | 1956 | } |
| 1878 | 1957 | |
| 1879 | − return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); | |
| 1958 | + if (rdev->family == CHIP_KABINI) | |
| 1959 | + return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); | |
| 1960 | + else | |
| 1961 | + return kv_set_enabled_level(rdev, i); | |
| 1880 | 1962 | } |
| 1881 | 1963 | |
| 1882 | 1964 | static int kv_force_dpm_lowest(struct radeon_device *rdev) |
| @@ -1893,7 +1975,10 @@ static int kv_force_dpm_lowest(struct radeon_device *rdev) · 10 unmodified lines | ||
| 1893 | 1975 | break; |
| 1894 | 1976 | } |
| 1895 | 1977 | |
| 1896 | − return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); | |
| 1978 | + if (rdev->family == CHIP_KABINI) | |
| 1979 | + return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); | |
| 1980 | + else | |
| 1981 | + return kv_set_enabled_level(rdev, i); | |
| 1897 | 1982 | } |
| 1898 | 1983 | |
| 1899 | 1984 | static u8 kv_get_sleep_divider_id_from_clock(struct radeon_device *rdev, |
| @@ -1911,9 +1996,9 @@ static u8 kv_get_sleep_divider_id_from_clock(struct radeon_device *rdev, · 11 unmodified lines | ||
| 1911 | 1996 | if (!pi->caps_sclk_ds) |
| 1912 | 1997 | return 0; |
| 1913 | 1998 | |
| 1914 | − for (i = KV_MAX_DEEPSLEEP_DIVIDER_ID; i <= 0; i--) { | |
| 1999 | + for (i = KV_MAX_DEEPSLEEP_DIVIDER_ID; i > 0; i--) { | |
| 1915 | 2000 | temp = sclk / sumo_get_sleep_divider_from_id(i); |
| 1916 | − if ((temp >= min) || (i == 0)) | |
| 2001 | + if (temp >= min) | |
| 1917 | 2002 | break; |
| 1918 | 2003 | } |
| 1919 | 2004 | |
| @@ -2039,12 +2124,12 @@ static void kv_apply_state_adjust_rules(struct radeon_device *rdev, · 119 unmodified lines | ||
| 2039 | 2124 | ps->dpmx_nb_ps_lo = 0x1; |
| 2040 | 2125 | ps->dpmx_nb_ps_hi = 0x0; |
| 2041 | 2126 | } else { |
| 2042 | − ps->dpm0_pg_nb_ps_lo = 0x1; | |
| 2127 | + ps->dpm0_pg_nb_ps_lo = 0x3; | |
| 2043 | 2128 | ps->dpm0_pg_nb_ps_hi = 0x0; |
| 2044 | − ps->dpmx_nb_ps_lo = 0x2; | |
| 2045 | − ps->dpmx_nb_ps_hi = 0x1; | |
| 2129 | + ps->dpmx_nb_ps_lo = 0x3; | |
| 2130 | + ps->dpmx_nb_ps_hi = 0x0; | |
| 2046 | 2131 | |
| 2047 | − if (pi->sys_info.nb_dpm_enable && pi->battery_state) { | |
| 2132 | + if (pi->sys_info.nb_dpm_enable) { | |
| 2048 | 2133 | force_high = (mclk >= pi->sys_info.nbp_memory_clock[3]) || |
| 2049 | 2134 | pi->video_start || (rdev->pm.dpm.new_active_crtc_count >= 3) || |
| 2050 | 2135 | pi->disable_nb_ps3_in_battery; |
| @@ -2210,6 +2295,15 @@ static void kv_enable_new_levels(struct radeon_device *rdev) · 159 unmodified lines | ||
| 2210 | 2295 | } |
| 2211 | 2296 | } |
| 2212 | 2297 | |
| 2298 | +static int kv_set_enabled_level(struct radeon_device *rdev, u32 level) | |
| 2299 | +{ | |
| 2300 | + u32 new_mask = (1 << level); | |
| 2301 | + | |
| 2302 | + return kv_send_msg_to_smc_with_parameter(rdev, | |
| 2303 | + PPSMC_MSG_SCLKDPM_SetEnabledMask, | |
| 2304 | + new_mask); | |
| 2305 | +} | |
| 2306 | + | |
| 2213 | 2307 | static int kv_set_enabled_levels(struct radeon_device *rdev) |
| 2214 | 2308 | { |
| 2215 | 2309 | struct kv_power_info *pi = kv_get_pi(rdev); |
| @@ -192,6 +192,7 @@ int kv_send_msg_to_smc_with_parameter(struct radeon_device *rdev, · 191 unmodified lines | ||
| 192 | 192 | int kv_read_smc_sram_dword(struct radeon_device *rdev, u32 smc_address, |
| 193 | 193 | u32 *value, u32 limit); |
| 194 | 194 | int kv_smc_dpm_enable(struct radeon_device *rdev, bool enable); |
| 195 | +int kv_smc_bapm_enable(struct radeon_device *rdev, bool enable); | |
| 195 | 196 | int kv_copy_bytes_to_smc(struct radeon_device *rdev, |
| 196 | 197 | u32 smc_start_address, |
| 197 | 198 | const u8 *src, u32 byte_count, u32 limit); |
| @@ -107,6 +107,14 @@ int kv_smc_dpm_enable(struct radeon_device *rdev, bool enable) · 106 unmodified lines | ||
| 107 | 107 | return kv_notify_message_to_smu(rdev, PPSMC_MSG_DPM_Disable); |
| 108 | 108 | } |
| 109 | 109 | |
| 110 | +int kv_smc_bapm_enable(struct radeon_device *rdev, bool enable) | |
| 111 | +{ | |
| 112 | + if (enable) | |
| 113 | + return kv_notify_message_to_smu(rdev, PPSMC_MSG_EnableBAPM); | |
| 114 | + else | |
| 115 | + return kv_notify_message_to_smu(rdev, PPSMC_MSG_DisableBAPM); | |
| 116 | +} | |
| 117 | + | |
| 110 | 118 | int kv_copy_bytes_to_smc(struct radeon_device *rdev, |
| 111 | 119 | u32 smc_start_address, |
| 112 | 120 | const u8 *src, u32 byte_count, u32 limit) |
| @@ -787,6 +787,7 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev, · 786 unmodified lines | ||
| 787 | 787 | bool disable_mclk_switching; |
| 788 | 788 | u32 mclk, sclk; |
| 789 | 789 | u16 vddc, vddci; |
| 790 | + u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc; | |
| 790 | 791 | int i; |
| 791 | 792 | |
| 792 | 793 | if ((rdev->pm.dpm.new_active_crtc_count > 1) || |
| @@ -813,6 +814,29 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev, · 20 unmodified lines | ||
| 813 | 814 | } |
| 814 | 815 | } |
| 815 | 816 | |
| 817 | + /* limit clocks to max supported clocks based on voltage dependency tables */ | |
| 818 | + btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, | |
| 819 | + &max_sclk_vddc); | |
| 820 | + btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, | |
| 821 | + &max_mclk_vddci); | |
| 822 | + btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, | |
| 823 | + &max_mclk_vddc); | |
| 824 | + | |
| 825 | + for (i = 0; i < ps->performance_level_count; i++) { | |
| 826 | + if (max_sclk_vddc) { | |
| 827 | + if (ps->performance_levels[i].sclk > max_sclk_vddc) | |
| 828 | + ps->performance_levels[i].sclk = max_sclk_vddc; | |
| 829 | + } | |
| 830 | + if (max_mclk_vddci) { | |
| 831 | + if (ps->performance_levels[i].mclk > max_mclk_vddci) | |
| 832 | + ps->performance_levels[i].mclk = max_mclk_vddci; | |
| 833 | + } | |
| 834 | + if (max_mclk_vddc) { | |
| 835 | + if (ps->performance_levels[i].mclk > max_mclk_vddc) | |
| 836 | + ps->performance_levels[i].mclk = max_mclk_vddc; | |
| 837 | + } | |
| 838 | + } | |
| 839 | + | |
| 816 | 840 | /* XXX validate the min clocks required for display */ |
| 817 | 841 | |
| 818 | 842 | if (disable_mclk_switching) { |
| @@ -3865,12 +3889,6 @@ int ni_dpm_set_power_state(struct radeon_device *rdev) · 3046 unmodified lines | ||
| 3865 | 3889 | return ret; |
| 3866 | 3890 | } |
| 3867 | 3891 | |
| 3868 | − ret = ni_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO); | |
| 3869 | − if (ret) { | |
| 3870 | − DRM_ERROR("ni_dpm_force_performance_level failed\n"); | |
| 3871 | − return ret; | |
| 3872 | − } | |
| 3873 | − | |
| 3874 | 3892 | return 0; |
| 3875 | 3893 | } |
| 3876 | 3894 | |
| @@ -163,6 +163,8 @@ typedef uint8_t PPSMC_Result; · 162 unmodified lines | ||
| 163 | 163 | #define PPSMC_MSG_VCEPowerON ((uint32_t) 0x10f) |
| 164 | 164 | #define PPSMC_MSG_DCE_RemoveVoltageAdjustment ((uint32_t) 0x11d) |
| 165 | 165 | #define PPSMC_MSG_DCE_AllowVoltageAdjustment ((uint32_t) 0x11e) |
| 166 | +#define PPSMC_MSG_EnableBAPM ((uint32_t) 0x120) | |
| 167 | +#define PPSMC_MSG_DisableBAPM ((uint32_t) 0x121) | |
| 166 | 168 | #define PPSMC_MSG_UVD_DPM_Config ((uint32_t) 0x124) |
| 167 | 169 | |
| 168 | 170 | |
| @@ -2853,21 +2853,28 @@ static void r100_pll_errata_after_data(struct radeon_device *rdev) · 2852 unmodified lines | ||
| 2853 | 2853 | |
| 2854 | 2854 | uint32_t r100_pll_rreg(struct radeon_device *rdev, uint32_t reg) |
| 2855 | 2855 | { |
| 2856 | + unsigned long flags; | |
| 2856 | 2857 | uint32_t data; |
| 2857 | 2858 | |
| 2859 | + spin_lock_irqsave(&rdev->pll_idx_lock, flags); | |
| 2858 | 2860 | WREG8(RADEON_CLOCK_CNTL_INDEX, reg & 0x3f); |
| 2859 | 2861 | r100_pll_errata_after_index(rdev); |
| 2860 | 2862 | data = RREG32(RADEON_CLOCK_CNTL_DATA); |
| 2861 | 2863 | r100_pll_errata_after_data(rdev); |
| 2864 | + spin_unlock_irqrestore(&rdev->pll_idx_lock, flags); | |
| 2862 | 2865 | return data; |
| 2863 | 2866 | } |
| 2864 | 2867 | |
| 2865 | 2868 | void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) |
| 2866 | 2869 | { |
| 2870 | + unsigned long flags; | |
| 2871 | + | |
| 2872 | + spin_lock_irqsave(&rdev->pll_idx_lock, flags); | |
| 2867 | 2873 | WREG8(RADEON_CLOCK_CNTL_INDEX, ((reg & 0x3f) | RADEON_PLL_WR_EN)); |
| 2868 | 2874 | r100_pll_errata_after_index(rdev); |
| 2869 | 2875 | WREG32(RADEON_CLOCK_CNTL_DATA, v); |
| 2870 | 2876 | r100_pll_errata_after_data(rdev); |
| 2877 | + spin_unlock_irqrestore(&rdev->pll_idx_lock, flags); | |
| 2871 | 2878 | } |
| 2872 | 2879 | |
| 2873 | 2880 | static void r100_set_safe_registers(struct radeon_device *rdev) |
| @@ -2926,9 +2933,11 @@ static int r100_debugfs_cp_ring_info(struct seq_file *m, void *data) · 52 unmodified lines | ||
| 2926 | 2933 | seq_printf(m, "CP_RB_RPTR 0x%08x\n", rdp); |
| 2927 | 2934 | seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw); |
| 2928 | 2935 | seq_printf(m, "%u dwords in ring\n", count); |
| 2929 | − for (j = 0; j <= count; j++) { | |
| 2930 | − i = (rdp + j) & ring->ptr_mask; | |
| 2931 | − seq_printf(m, "r[%04d]=0x%08x\n", i, ring->ring[i]); | |
| 2936 | + if (ring->ready) { | |
| 2937 | + for (j = 0; j <= count; j++) { | |
| 2938 | + i = (rdp + j) & ring->ptr_mask; | |
| 2939 | + seq_printf(m, "r[%04d]=0x%08x\n", i, ring->ring[i]); | |
| 2940 | + } | |
| 2932 | 2941 | } |
| 2933 | 2942 | return 0; |
| 2934 | 2943 | } |
| @@ -160,18 +160,25 @@ void r420_pipes_init(struct radeon_device *rdev) · 159 unmodified lines | ||
| 160 | 160 | |
| 161 | 161 | u32 r420_mc_rreg(struct radeon_device *rdev, u32 reg) |
| 162 | 162 | { |
| 163 | + unsigned long flags; | |
| 163 | 164 | u32 r; |
| 164 | 165 | |
| 166 | + spin_lock_irqsave(&rdev->mc_idx_lock, flags); | |
| 165 | 167 | WREG32(R_0001F8_MC_IND_INDEX, S_0001F8_MC_IND_ADDR(reg)); |
| 166 | 168 | r = RREG32(R_0001FC_MC_IND_DATA); |
| 169 | + spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); | |
| 167 | 170 | return r; |
| 168 | 171 | } |
| 169 | 172 | |
| 170 | 173 | void r420_mc_wreg(struct radeon_device *rdev, u32 reg, u32 v) |
| 171 | 174 | { |
| 175 | + unsigned long flags; | |
| 176 | + | |
| 177 | + spin_lock_irqsave(&rdev->mc_idx_lock, flags); | |
| 172 | 178 | WREG32(R_0001F8_MC_IND_INDEX, S_0001F8_MC_IND_ADDR(reg) | |
| 173 | 179 | S_0001F8_MC_IND_WR_EN(1)); |
| 174 | 180 | WREG32(R_0001FC_MC_IND_DATA, v); |
| 181 | + spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); | |
| 175 | 182 | } |
| 176 | 183 | |
| 177 | 184 | static void r420_debugfs(struct radeon_device *rdev) |
| @@ -119,6 +119,11 @@ u32 r600_get_xclk(struct radeon_device *rdev) · 118 unmodified lines | ||
| 119 | 119 | return rdev->clock.spll.reference_freq; |
| 120 | 120 | } |
| 121 | 121 | |
| 122 | +int r600_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk) | |
| 123 | +{ | |
| 124 | + return 0; | |
| 125 | +} | |
| 126 | + | |
| 122 | 127 | /* get temperature in millidegrees */ |
| 123 | 128 | int rv6xx_get_temp(struct radeon_device *rdev) |
| 124 | 129 | { |
| @@ -1045,20 +1050,27 @@ int r600_mc_wait_for_idle(struct radeon_device *rdev) · 920 unmodified lines | ||
| 1045 | 1050 | |
| 1046 | 1051 | uint32_t rs780_mc_rreg(struct radeon_device *rdev, uint32_t reg) |
| 1047 | 1052 | { |
| 1053 | + unsigned long flags; | |
| 1048 | 1054 | uint32_t r; |
| 1049 | 1055 | |
| 1056 | + spin_lock_irqsave(&rdev->mc_idx_lock, flags); | |
| 1050 | 1057 | WREG32(R_0028F8_MC_INDEX, S_0028F8_MC_IND_ADDR(reg)); |
| 1051 | 1058 | r = RREG32(R_0028FC_MC_DATA); |
| 1052 | 1059 | WREG32(R_0028F8_MC_INDEX, ~C_0028F8_MC_IND_ADDR); |
| 1060 | + spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); | |
| 1053 | 1061 | return r; |
| 1054 | 1062 | } |
| 1055 | 1063 | |
| 1056 | 1064 | void rs780_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) |
| 1057 | 1065 | { |
| 1066 | + unsigned long flags; | |
| 1067 | + | |
| 1068 | + spin_lock_irqsave(&rdev->mc_idx_lock, flags); | |
| 1058 | 1069 | WREG32(R_0028F8_MC_INDEX, S_0028F8_MC_IND_ADDR(reg) | |
| 1059 | 1070 | S_0028F8_MC_IND_WR_EN(1)); |
| 1060 | 1071 | WREG32(R_0028FC_MC_DATA, v); |
| 1061 | 1072 | WREG32(R_0028F8_MC_INDEX, 0x7F); |
| 1073 | + spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); | |
| 1062 | 1074 | } |
| 1063 | 1075 | |
| 1064 | 1076 | static void r600_mc_program(struct radeon_device *rdev) |
| @@ -2092,20 +2104,27 @@ static void r600_gpu_init(struct radeon_device *rdev) · 1027 unmodified lines | ||
| 2092 | 2104 | */ |
| 2093 | 2105 | u32 r600_pciep_rreg(struct radeon_device *rdev, u32 reg) |
| 2094 | 2106 | { |
| 2107 | + unsigned long flags; | |
| 2095 | 2108 | u32 r; |
| 2096 | 2109 | |
| 2110 | + spin_lock_irqsave(&rdev->pciep_idx_lock, flags); | |
| 2097 | 2111 | WREG32(PCIE_PORT_INDEX, ((reg) & 0xff)); |
| 2098 | 2112 | (void)RREG32(PCIE_PORT_INDEX); |
| 2099 | 2113 | r = RREG32(PCIE_PORT_DATA); |
| 2114 | + spin_unlock_irqrestore(&rdev->pciep_idx_lock, flags); | |
| 2100 | 2115 | return r; |
| 2101 | 2116 | } |
| 2102 | 2117 | |
| 2103 | 2118 | void r600_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v) |
| 2104 | 2119 | { |
| 2120 | + unsigned long flags; | |
| 2121 | + | |
| 2122 | + spin_lock_irqsave(&rdev->pciep_idx_lock, flags); | |
| 2105 | 2123 | WREG32(PCIE_PORT_INDEX, ((reg) & 0xff)); |
| 2106 | 2124 | (void)RREG32(PCIE_PORT_INDEX); |
| 2107 | 2125 | WREG32(PCIE_PORT_DATA, (v)); |
| 2108 | 2126 | (void)RREG32(PCIE_PORT_DATA); |
| 2127 | + spin_unlock_irqrestore(&rdev->pciep_idx_lock, flags); | |
| 2109 | 2128 | } |
| 2110 | 2129 | |
| 2111 | 2130 | /* |
| @@ -1084,7 +1084,7 @@ int r600_parse_extended_power_table(struct radeon_device *rdev) · 1083 unmodified lines | ||
| 1084 | 1084 | rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].dclk = |
| 1085 | 1085 | le16_to_cpu(uvd_clk->usDClkLow) | (uvd_clk->ucDClkHigh << 16); |
| 1086 | 1086 | rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v = |
| 1087 | − le16_to_cpu(limits->entries[i].usVoltage); | |
| 1087 | + le16_to_cpu(entry->usVoltage); | |
| 1088 | 1088 | entry = (ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record *) |
| 1089 | 1089 | ((u8 *)entry + sizeof(ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record)); |
| 1090 | 1090 | } |
| @@ -1219,30 +1219,20 @@ int r600_parse_extended_power_table(struct radeon_device *rdev) · 128 unmodified lines | ||
| 1219 | 1219 | |
| 1220 | 1220 | void r600_free_extended_power_table(struct radeon_device *rdev) |
| 1221 | 1221 | { |
| 1222 | − if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries) | |
| 1223 | − kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); | |
| 1224 | − if (rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries) | |
| 1225 | − kfree(rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries); | |
| 1226 | − if (rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.entries) | |
| 1227 | − kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.entries); | |
| 1228 | − if (rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.entries) | |
| 1229 | − kfree(rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.entries); | |
| 1230 | − if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries) | |
| 1231 | − kfree(rdev->pm.dpm.dyn_state.cac_leakage_table.entries); | |
| 1232 | − if (rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries) | |
| 1233 | − kfree(rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries); | |
| 1234 | − if (rdev->pm.dpm.dyn_state.ppm_table) | |
| 1235 | − kfree(rdev->pm.dpm.dyn_state.ppm_table); | |
| 1236 | − if (rdev->pm.dpm.dyn_state.cac_tdp_table) | |
| 1237 | − kfree(rdev->pm.dpm.dyn_state.cac_tdp_table); | |
| 1238 | − if (rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries) | |
| 1239 | − kfree(rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries); | |
| 1240 | − if (rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries) | |
| 1241 | − kfree(rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries); | |
| 1242 | − if (rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries) | |
| 1243 | − kfree(rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries); | |
| 1244 | − if (rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries) | |
| 1245 | − kfree(rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries); | |
| 1222 | + struct radeon_dpm_dynamic_state *dyn_state = &rdev->pm.dpm.dyn_state; | |
| 1223 | + | |
| 1224 | + kfree(dyn_state->vddc_dependency_on_sclk.entries); | |
| 1225 | + kfree(dyn_state->vddci_dependency_on_mclk.entries); | |
| 1226 | + kfree(dyn_state->vddc_dependency_on_mclk.entries); | |
| 1227 | + kfree(dyn_state->mvdd_dependency_on_mclk.entries); | |
| 1228 | + kfree(dyn_state->cac_leakage_table.entries); | |
| 1229 | + kfree(dyn_state->phase_shedding_limits_table.entries); | |
| 1230 | + kfree(dyn_state->ppm_table); | |
| 1231 | + kfree(dyn_state->cac_tdp_table); | |
| 1232 | + kfree(dyn_state->vce_clock_voltage_dependency_table.entries); | |
| 1233 | + kfree(dyn_state->uvd_clock_voltage_dependency_table.entries); | |
| 1234 | + kfree(dyn_state->samu_clock_voltage_dependency_table.entries); | |
| 1235 | + kfree(dyn_state->acp_clock_voltage_dependency_table.entries); | |
| 1246 | 1236 | } |
| 1247 | 1237 | |
| 1248 | 1238 | enum radeon_pcie_gen r600_get_pcie_gen_support(struct radeon_device *rdev, |
| @@ -257,10 +257,7 @@ void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock) · 256 unmodified lines | ||
| 257 | 257 | * number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE |
| 258 | 258 | * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator |
| 259 | 259 | */ |
| 260 | − if (ASIC_IS_DCE3(rdev)) { | |
| 261 | − /* according to the reg specs, this should DCE3.2 only, but in | |
| 262 | − * practice it seems to cover DCE3.0 as well. | |
| 263 | − */ | |
| 260 | + if (ASIC_IS_DCE32(rdev)) { | |
| 264 | 261 | if (dig->dig_encoder == 0) { |
| 265 | 262 | dto_cntl = RREG32(DCCG_AUDIO_DTO0_CNTL) & ~DCCG_AUDIO_DTO_WALLCLOCK_RATIO_MASK; |
| 266 | 263 | dto_cntl |= DCCG_AUDIO_DTO_WALLCLOCK_RATIO(wallclock_ratio); |
| @@ -276,8 +273,21 @@ void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock) · 9 unmodified lines | ||
| 276 | 273 | WREG32(DCCG_AUDIO_DTO1_MODULE, dto_modulo); |
| 277 | 274 | WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */ |
| 278 | 275 | } |
| 276 | + } else if (ASIC_IS_DCE3(rdev)) { | |
| 277 | + /* according to the reg specs, this should DCE3.2 only, but in | |
| 278 | + * practice it seems to cover DCE3.0/3.1 as well. | |
| 279 | + */ | |
| 280 | + if (dig->dig_encoder == 0) { | |
| 281 | + WREG32(DCCG_AUDIO_DTO0_PHASE, base_rate * 100); | |
| 282 | + WREG32(DCCG_AUDIO_DTO0_MODULE, clock * 100); | |
| 283 | + WREG32(DCCG_AUDIO_DTO_SELECT, 0); /* select DTO0 */ | |
| 284 | + } else { | |
| 285 | + WREG32(DCCG_AUDIO_DTO1_PHASE, base_rate * 100); | |
| 286 | + WREG32(DCCG_AUDIO_DTO1_MODULE, clock * 100); | |
| 287 | + WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */ | |
| 288 | + } | |
| 279 | 289 | } else { |
| 280 | − /* according to the reg specs, this should be DCE2.0 and DCE3.0 */ | |
| 290 | + /* according to the reg specs, this should be DCE2.0 and DCE3.0/3.1 */ | |
| 281 | 291 | WREG32(AUDIO_DTO, AUDIO_DTO_PHASE(base_rate / 10) | |
| 282 | 292 | AUDIO_DTO_MODULE(clock / 10)); |
| 283 | 293 | } |
| @@ -1040,7 +1040,7 @@ · 1039 unmodified lines | ||
| 1040 | 1040 | # define HDMI0_AVI_INFO_CONT (1 << 1) |
| 1041 | 1041 | # define HDMI0_AUDIO_INFO_SEND (1 << 4) |
| 1042 | 1042 | # define HDMI0_AUDIO_INFO_CONT (1 << 5) |
| 1043 | −# define HDMI0_AUDIO_INFO_SOURCE (1 << 6) /* 0 - sound block; 1 - hmdi regs */ | |
| 1043 | +# define HDMI0_AUDIO_INFO_SOURCE (1 << 6) /* 0 - sound block; 1 - hdmi regs */ | |
| 1044 | 1044 | # define HDMI0_AUDIO_INFO_UPDATE (1 << 7) |
| 1045 | 1045 | # define HDMI0_MPEG_INFO_SEND (1 << 8) |
| 1046 | 1046 | # define HDMI0_MPEG_INFO_CONT (1 << 9) |
| @@ -181,7 +181,7 @@ extern int radeon_aspm; · 180 unmodified lines | ||
| 181 | 181 | #define RADEON_CG_SUPPORT_HDP_MGCG (1 << 16) |
| 182 | 182 | |
| 183 | 183 | /* PG flags */ |
| 184 | −#define RADEON_PG_SUPPORT_GFX_CG (1 << 0) | |
| 184 | +#define RADEON_PG_SUPPORT_GFX_PG (1 << 0) | |
| 185 | 185 | #define RADEON_PG_SUPPORT_GFX_SMG (1 << 1) |
| 186 | 186 | #define RADEON_PG_SUPPORT_GFX_DMG (1 << 2) |
| 187 | 187 | #define RADEON_PG_SUPPORT_UVD (1 << 3) |
| @@ -1778,6 +1778,7 @@ struct radeon_asic { · 1590 unmodified lines | ||
| 1778 | 1778 | int (*force_performance_level)(struct radeon_device *rdev, enum radeon_dpm_forced_level level); |
| 1779 | 1779 | bool (*vblank_too_short)(struct radeon_device *rdev); |
| 1780 | 1780 | void (*powergate_uvd)(struct radeon_device *rdev, bool gate); |
| 1781 | + void (*enable_bapm)(struct radeon_device *rdev, bool enable); | |
| 1781 | 1782 | } dpm; |
| 1782 | 1783 | /* pageflipping */ |
| 1783 | 1784 | struct { |
| @@ -2110,6 +2111,28 @@ struct radeon_device { · 326 unmodified lines | ||
| 2110 | 2111 | resource_size_t rmmio_size; |
| 2111 | 2112 | /* protects concurrent MM_INDEX/DATA based register access */ |
| 2112 | 2113 | spinlock_t mmio_idx_lock; |
| 2114 | + /* protects concurrent SMC based register access */ | |
| 2115 | + spinlock_t smc_idx_lock; | |
| 2116 | + /* protects concurrent PLL register access */ | |
| 2117 | + spinlock_t pll_idx_lock; | |
| 2118 | + /* protects concurrent MC register access */ | |
| 2119 | + spinlock_t mc_idx_lock; | |
| 2120 | + /* protects concurrent PCIE register access */ | |
| 2121 | + spinlock_t pcie_idx_lock; | |
| 2122 | + /* protects concurrent PCIE_PORT register access */ | |
| 2123 | + spinlock_t pciep_idx_lock; | |
| 2124 | + /* protects concurrent PIF register access */ | |
| 2125 | + spinlock_t pif_idx_lock; | |
| 2126 | + /* protects concurrent CG register access */ | |
| 2127 | + spinlock_t cg_idx_lock; | |
| 2128 | + /* protects concurrent UVD register access */ | |
| 2129 | + spinlock_t uvd_idx_lock; | |
| 2130 | + /* protects concurrent RCU register access */ | |
| 2131 | + spinlock_t rcu_idx_lock; | |
| 2132 | + /* protects concurrent DIDT register access */ | |
| 2133 | + spinlock_t didt_idx_lock; | |
| 2134 | + /* protects concurrent ENDPOINT (audio) register access */ | |
| 2135 | + spinlock_t end_idx_lock; | |
| 2113 | 2136 | void __iomem *rmmio; |
| 2114 | 2137 | radeon_rreg_t mc_rreg; |
| 2115 | 2138 | radeon_wreg_t mc_wreg; |
| @@ -2277,123 +2300,179 @@ void cik_mm_wdoorbell(struct radeon_device *rdev, u32 offset, u32 v); · 161 unmodified lines | ||
| 2277 | 2300 | */ |
| 2278 | 2301 | static inline uint32_t rv370_pcie_rreg(struct radeon_device *rdev, uint32_t reg) |
| 2279 | 2302 | { |
| 2303 | + unsigned long flags; | |
| 2280 | 2304 | uint32_t r; |
| 2281 | 2305 | |
| 2306 | + spin_lock_irqsave(&rdev->pcie_idx_lock, flags); | |
| 2282 | 2307 | WREG32(RADEON_PCIE_INDEX, ((reg) & rdev->pcie_reg_mask)); |
| 2283 | 2308 | r = RREG32(RADEON_PCIE_DATA); |
| 2309 | + spin_unlock_irqrestore(&rdev->pcie_idx_lock, flags); | |
| 2284 | 2310 | return r; |
| 2285 | 2311 | } |
| 2286 | 2312 | |
| 2287 | 2313 | static inline void rv370_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) |
| 2288 | 2314 | { |
| 2315 | + unsigned long flags; | |
| 2316 | + | |
| 2317 | + spin_lock_irqsave(&rdev->pcie_idx_lock, flags); | |
| 2289 | 2318 | WREG32(RADEON_PCIE_INDEX, ((reg) & rdev->pcie_reg_mask)); |
| 2290 | 2319 | WREG32(RADEON_PCIE_DATA, (v)); |
| 2320 | + spin_unlock_irqrestore(&rdev->pcie_idx_lock, flags); | |
| 2291 | 2321 | } |
| 2292 | 2322 | |
| 2293 | 2323 | static inline u32 tn_smc_rreg(struct radeon_device *rdev, u32 reg) |
| 2294 | 2324 | { |
| 2325 | + unsigned long flags; | |
| 2295 | 2326 | u32 r; |
| 2296 | 2327 | |
| 2328 | + spin_lock_irqsave(&rdev->smc_idx_lock, flags); | |
| 2297 | 2329 | WREG32(TN_SMC_IND_INDEX_0, (reg)); |
| 2298 | 2330 | r = RREG32(TN_SMC_IND_DATA_0); |
| 2331 | + spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); | |
| 2299 | 2332 | return r; |
| 2300 | 2333 | } |
| 2301 | 2334 | |
| 2302 | 2335 | static inline void tn_smc_wreg(struct radeon_device *rdev, u32 reg, u32 v) |
| 2303 | 2336 | { |
| 2337 | + unsigned long flags; | |
| 2338 | + | |
| 2339 | + spin_lock_irqsave(&rdev->smc_idx_lock, flags); | |
| 2304 | 2340 | WREG32(TN_SMC_IND_INDEX_0, (reg)); |
| 2305 | 2341 | WREG32(TN_SMC_IND_DATA_0, (v)); |
| 2342 | + spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); | |
| 2306 | 2343 | } |
| 2307 | 2344 | |
| 2308 | 2345 | static inline u32 r600_rcu_rreg(struct radeon_device *rdev, u32 reg) |
| 2309 | 2346 | { |
| 2347 | + unsigned long flags; | |
| 2310 | 2348 | u32 r; |
| 2311 | 2349 | |
| 2350 | + spin_lock_irqsave(&rdev->rcu_idx_lock, flags); | |
| 2312 | 2351 | WREG32(R600_RCU_INDEX, ((reg) & 0x1fff)); |
| 2313 | 2352 | r = RREG32(R600_RCU_DATA); |
| 2353 | + spin_unlock_irqrestore(&rdev->rcu_idx_lock, flags); | |
| 2314 | 2354 | return r; |
| 2315 | 2355 | } |
| 2316 | 2356 | |
| 2317 | 2357 | static inline void r600_rcu_wreg(struct radeon_device *rdev, u32 reg, u32 v) |
| 2318 | 2358 | { |
| 2359 | + unsigned long flags; | |
| 2360 | + | |
| 2361 | + spin_lock_irqsave(&rdev->rcu_idx_lock, flags); | |
| 2319 | 2362 | WREG32(R600_RCU_INDEX, ((reg) & 0x1fff)); |
| 2320 | 2363 | WREG32(R600_RCU_DATA, (v)); |
| 2364 | + spin_unlock_irqrestore(&rdev->rcu_idx_lock, flags); | |
| 2321 | 2365 | } |
| 2322 | 2366 | |
| 2323 | 2367 | static inline u32 eg_cg_rreg(struct radeon_device *rdev, u32 reg) |
| 2324 | 2368 | { |
| 2369 | + unsigned long flags; | |
| 2325 | 2370 | u32 r; |
| 2326 | 2371 | |
| 2372 | + spin_lock_irqsave(&rdev->cg_idx_lock, flags); | |
| 2327 | 2373 | WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff)); |
| 2328 | 2374 | r = RREG32(EVERGREEN_CG_IND_DATA); |
| 2375 | + spin_unlock_irqrestore(&rdev->cg_idx_lock, flags); | |
| 2329 | 2376 | return r; |
| 2330 | 2377 | } |
| 2331 | 2378 | |
| 2332 | 2379 | static inline void eg_cg_wreg(struct radeon_device *rdev, u32 reg, u32 v) |
| 2333 | 2380 | { |
| 2381 | + unsigned long flags; | |
| 2382 | + | |
| 2383 | + spin_lock_irqsave(&rdev->cg_idx_lock, flags); | |
| 2334 | 2384 | WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff)); |
| 2335 | 2385 | WREG32(EVERGREEN_CG_IND_DATA, (v)); |
| 2386 | + spin_unlock_irqrestore(&rdev->cg_idx_lock, flags); | |
| 2336 | 2387 | } |
| 2337 | 2388 | |
| 2338 | 2389 | static inline u32 eg_pif_phy0_rreg(struct radeon_device *rdev, u32 reg) |
| 2339 | 2390 | { |
| 2391 | + unsigned long flags; | |
| 2340 | 2392 | u32 r; |
| 2341 | 2393 | |
| 2394 | + spin_lock_irqsave(&rdev->pif_idx_lock, flags); | |
| 2342 | 2395 | WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff)); |
| 2343 | 2396 | r = RREG32(EVERGREEN_PIF_PHY0_DATA); |
| 2397 | + spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); | |
| 2344 | 2398 | return r; |
| 2345 | 2399 | } |
| 2346 | 2400 | |
| 2347 | 2401 | static inline void eg_pif_phy0_wreg(struct radeon_device *rdev, u32 reg, u32 v) |
| 2348 | 2402 | { |
| 2403 | + unsigned long flags; | |
| 2404 | + | |
| 2405 | + spin_lock_irqsave(&rdev->pif_idx_lock, flags); | |
| 2349 | 2406 | WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff)); |
| 2350 | 2407 | WREG32(EVERGREEN_PIF_PHY0_DATA, (v)); |
| 2408 | + spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); | |
| 2351 | 2409 | } |
| 2352 | 2410 | |
| 2353 | 2411 | static inline u32 eg_pif_phy1_rreg(struct radeon_device *rdev, u32 reg) |
| 2354 | 2412 | { |
| 2413 | + unsigned long flags; | |
| 2355 | 2414 | u32 r; |
| 2356 | 2415 | |
| 2416 | + spin_lock_irqsave(&rdev->pif_idx_lock, flags); | |
| 2357 | 2417 | WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff)); |
| 2358 | 2418 | r = RREG32(EVERGREEN_PIF_PHY1_DATA); |
| 2419 | + spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); | |
| 2359 | 2420 | return r; |
| 2360 | 2421 | } |
| 2361 | 2422 | |
| 2362 | 2423 | static inline void eg_pif_phy1_wreg(struct radeon_device *rdev, u32 reg, u32 v) |
| 2363 | 2424 | { |
| 2425 | + unsigned long flags; | |
| 2426 | + | |
| 2427 | + spin_lock_irqsave(&rdev->pif_idx_lock, flags); | |
| 2364 | 2428 | WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff)); |
| 2365 | 2429 | WREG32(EVERGREEN_PIF_PHY1_DATA, (v)); |
| 2430 | + spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); | |
| 2366 | 2431 | } |
| 2367 | 2432 | |
| 2368 | 2433 | static inline u32 r600_uvd_ctx_rreg(struct radeon_device *rdev, u32 reg) |
| 2369 | 2434 | { |
| 2435 | + unsigned long flags; | |
| 2370 | 2436 | u32 r; |
| 2371 | 2437 | |
| 2438 | + spin_lock_irqsave(&rdev->uvd_idx_lock, flags); | |
| 2372 | 2439 | WREG32(R600_UVD_CTX_INDEX, ((reg) & 0x1ff)); |
| 2373 | 2440 | r = RREG32(R600_UVD_CTX_DATA); |
| 2441 | + spin_unlock_irqrestore(&rdev->uvd_idx_lock, flags); | |
| 2374 | 2442 | return r; |
| 2375 | 2443 | } |
| 2376 | 2444 | |
| 2377 | 2445 | static inline void r600_uvd_ctx_wreg(struct radeon_device *rdev, u32 reg, u32 v) |
| 2378 | 2446 | { |
| 2447 | + unsigned long flags; | |
| 2448 | + | |
| 2449 | + spin_lock_irqsave(&rdev->uvd_idx_lock, flags); | |
| 2379 | 2450 | WREG32(R600_UVD_CTX_INDEX, ((reg) & 0x1ff)); |
| 2380 | 2451 | WREG32(R600_UVD_CTX_DATA, (v)); |
| 2452 | + spin_unlock_irqrestore(&rdev->uvd_idx_lock, flags); | |
| 2381 | 2453 | } |
| 2382 | 2454 | |
| 2383 | 2455 | |
| 2384 | 2456 | static inline u32 cik_didt_rreg(struct radeon_device *rdev, u32 reg) |
| 2385 | 2457 | { |
| 2458 | + unsigned long flags; | |
| 2386 | 2459 | u32 r; |
| 2387 | 2460 | |
| 2461 | + spin_lock_irqsave(&rdev->didt_idx_lock, flags); | |
| 2388 | 2462 | WREG32(CIK_DIDT_IND_INDEX, (reg)); |
| 2389 | 2463 | r = RREG32(CIK_DIDT_IND_DATA); |
| 2464 | + spin_unlock_irqrestore(&rdev->didt_idx_lock, flags); | |
| 2390 | 2465 | return r; |
| 2391 | 2466 | } |
| 2392 | 2467 | |
| 2393 | 2468 | static inline void cik_didt_wreg(struct radeon_device *rdev, u32 reg, u32 v) |
| 2394 | 2469 | { |
| 2470 | + unsigned long flags; | |
| 2471 | + | |
| 2472 | + spin_lock_irqsave(&rdev->didt_idx_lock, flags); | |
| 2395 | 2473 | WREG32(CIK_DIDT_IND_INDEX, (reg)); |
| 2396 | 2474 | WREG32(CIK_DIDT_IND_DATA, (v)); |
| 2475 | + spin_unlock_irqrestore(&rdev->didt_idx_lock, flags); | |
| 2397 | 2476 | } |
| 2398 | 2477 | |
| 2399 | 2478 | void r100_pll_errata_after_index(struct radeon_device *rdev); |
| @@ -2569,6 +2648,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v); · 169 unmodified lines | ||
| 2569 | 2648 | #define radeon_dpm_force_performance_level(rdev, l) rdev->asic->dpm.force_performance_level((rdev), (l)) |
| 2570 | 2649 | #define radeon_dpm_vblank_too_short(rdev) rdev->asic->dpm.vblank_too_short((rdev)) |
| 2571 | 2650 | #define radeon_dpm_powergate_uvd(rdev, g) rdev->asic->dpm.powergate_uvd((rdev), (g)) |
| 2651 | +#define radeon_dpm_enable_bapm(rdev, e) rdev->asic->dpm.enable_bapm((rdev), (e)) | |
| 2572 | 2652 | |
| 2573 | 2653 | /* Common functions */ |
| 2574 | 2654 | /* AGP */ |
| @@ -1004,6 +1004,8 @@ static struct radeon_asic rv6xx_asic = { · 1003 unmodified lines | ||
| 1004 | 1004 | .wait_for_vblank = &avivo_wait_for_vblank, |
| 1005 | 1005 | .set_backlight_level = &atombios_set_backlight_level, |
| 1006 | 1006 | .get_backlight_level = &atombios_get_backlight_level, |
| 1007 | + .hdmi_enable = &r600_hdmi_enable, | |
| 1008 | + .hdmi_setmode = &r600_hdmi_setmode, | |
| 1007 | 1009 | }, |
| 1008 | 1010 | .copy = { |
| 1009 | 1011 | .blit = &r600_copy_cpdma, |
| @@ -1037,6 +1039,7 @@ static struct radeon_asic rv6xx_asic = { · 27 unmodified lines | ||
| 1037 | 1039 | .set_pcie_lanes = &r600_set_pcie_lanes, |
| 1038 | 1040 | .set_clock_gating = NULL, |
| 1039 | 1041 | .get_temperature = &rv6xx_get_temp, |
| 1042 | + .set_uvd_clocks = &r600_set_uvd_clocks, | |
| 1040 | 1043 | }, |
| 1041 | 1044 | .dpm = { |
| 1042 | 1045 | .init = &rv6xx_dpm_init, |
| @@ -1126,6 +1129,7 @@ static struct radeon_asic rs780_asic = { · 83 unmodified lines | ||
| 1126 | 1129 | .set_pcie_lanes = NULL, |
| 1127 | 1130 | .set_clock_gating = NULL, |
| 1128 | 1131 | .get_temperature = &rv6xx_get_temp, |
| 1132 | + .set_uvd_clocks = &r600_set_uvd_clocks, | |
| 1129 | 1133 | }, |
| 1130 | 1134 | .dpm = { |
| 1131 | 1135 | .init = &rs780_dpm_init, |
| @@ -1141,6 +1145,7 @@ static struct radeon_asic rs780_asic = { · 9 unmodified lines | ||
| 1141 | 1145 | .get_mclk = &rs780_dpm_get_mclk, |
| 1142 | 1146 | .print_power_state = &rs780_dpm_print_power_state, |
| 1143 | 1147 | .debugfs_print_current_performance_level = &rs780_dpm_debugfs_print_current_performance_level, |
| 1148 | + .force_performance_level = &rs780_dpm_force_performance_level, | |
| 1144 | 1149 | }, |
| 1145 | 1150 | .pflip = { |
| 1146 | 1151 | .pre_page_flip = &rs600_pre_page_flip, |
| @@ -1791,6 +1796,7 @@ static struct radeon_asic trinity_asic = { · 644 unmodified lines | ||
| 1791 | 1796 | .print_power_state = &trinity_dpm_print_power_state, |
| 1792 | 1797 | .debugfs_print_current_performance_level = &trinity_dpm_debugfs_print_current_performance_level, |
| 1793 | 1798 | .force_performance_level = &trinity_dpm_force_performance_level, |
| 1799 | + .enable_bapm = &trinity_dpm_enable_bapm, | |
| 1794 | 1800 | }, |
| 1795 | 1801 | .pflip = { |
| 1796 | 1802 | .pre_page_flip = &evergreen_pre_page_flip, |
| @@ -2166,6 +2172,7 @@ static struct radeon_asic kv_asic = { · 369 unmodified lines | ||
| 2166 | 2172 | .debugfs_print_current_performance_level = &kv_dpm_debugfs_print_current_performance_level, |
| 2167 | 2173 | .force_performance_level = &kv_dpm_force_performance_level, |
| 2168 | 2174 | .powergate_uvd = &kv_dpm_powergate_uvd, |
| 2175 | + .enable_bapm = &kv_dpm_enable_bapm, | |
| 2169 | 2176 | }, |
| 2170 | 2177 | .pflip = { |
| 2171 | 2178 | .pre_page_flip = &evergreen_pre_page_flip, |
| @@ -2390,7 +2397,7 @@ int radeon_asic_init(struct radeon_device *rdev) · 218 unmodified lines | ||
| 2390 | 2397 | RADEON_CG_SUPPORT_HDP_LS | |
| 2391 | 2398 | RADEON_CG_SUPPORT_HDP_MGCG; |
| 2392 | 2399 | rdev->pg_flags = 0 | |
| 2393 | − /*RADEON_PG_SUPPORT_GFX_CG | */ | |
| 2400 | + /*RADEON_PG_SUPPORT_GFX_PG | */ | |
| 2394 | 2401 | RADEON_PG_SUPPORT_SDMA; |
| 2395 | 2402 | break; |
| 2396 | 2403 | case CHIP_OLAND: |
| @@ -2479,7 +2486,7 @@ int radeon_asic_init(struct radeon_device *rdev) · 82 unmodified lines | ||
| 2479 | 2486 | RADEON_CG_SUPPORT_HDP_LS | |
| 2480 | 2487 | RADEON_CG_SUPPORT_HDP_MGCG; |
| 2481 | 2488 | rdev->pg_flags = 0; |
| 2482 | − /*RADEON_PG_SUPPORT_GFX_CG | | |
| 2489 | + /*RADEON_PG_SUPPORT_GFX_PG | | |
| 2483 | 2490 | RADEON_PG_SUPPORT_GFX_SMG | |
| 2484 | 2491 | RADEON_PG_SUPPORT_GFX_DMG | |
| 2485 | 2492 | RADEON_PG_SUPPORT_UVD | |
| @@ -2507,7 +2514,7 @@ int radeon_asic_init(struct radeon_device *rdev) · 21 unmodified lines | ||
| 2507 | 2514 | RADEON_CG_SUPPORT_HDP_LS | |
| 2508 | 2515 | RADEON_CG_SUPPORT_HDP_MGCG; |
| 2509 | 2516 | rdev->pg_flags = 0; |
| 2510 | − /*RADEON_PG_SUPPORT_GFX_CG | | |
| 2517 | + /*RADEON_PG_SUPPORT_GFX_PG | | |
| 2511 | 2518 | RADEON_PG_SUPPORT_GFX_SMG | |
| 2512 | 2519 | RADEON_PG_SUPPORT_UVD | |
| 2513 | 2520 | RADEON_PG_SUPPORT_VCE | |
| @@ -389,6 +389,7 @@ int r600_mc_wait_for_idle(struct radeon_device *rdev); · 388 unmodified lines | ||
| 389 | 389 | u32 r600_get_xclk(struct radeon_device *rdev); |
| 390 | 390 | uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev); |
| 391 | 391 | int rv6xx_get_temp(struct radeon_device *rdev); |
| 392 | +int r600_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); | |
| 392 | 393 | int r600_dpm_pre_set_power_state(struct radeon_device *rdev); |
| 393 | 394 | void r600_dpm_post_set_power_state(struct radeon_device *rdev); |
| 394 | 395 | /* r600 dma */ |
| @@ -428,6 +429,8 @@ void rs780_dpm_print_power_state(struct radeon_device *rdev, · 33 unmodified lines | ||
| 428 | 429 | struct radeon_ps *ps); |
| 429 | 430 | void rs780_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
| 430 | 431 | struct seq_file *m); |
| 432 | +int rs780_dpm_force_performance_level(struct radeon_device *rdev, | |
| 433 | + enum radeon_dpm_forced_level level); | |
| 431 | 434 | |
| 432 | 435 | /* |
| 433 | 436 | * rv770,rv730,rv710,rv740 |
| @@ -625,6 +628,7 @@ void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *r · 191 unmodified lines | ||
| 625 | 628 | struct seq_file *m); |
| 626 | 629 | int trinity_dpm_force_performance_level(struct radeon_device *rdev, |
| 627 | 630 | enum radeon_dpm_forced_level level); |
| 631 | +void trinity_dpm_enable_bapm(struct radeon_device *rdev, bool enable); | |
| 628 | 632 | |
| 629 | 633 | /* DCE6 - SI */ |
| 630 | 634 | void dce6_bandwidth_update(struct radeon_device *rdev); |
| @@ -781,6 +785,7 @@ void kv_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, · 150 unmodified lines | ||
| 781 | 785 | int kv_dpm_force_performance_level(struct radeon_device *rdev, |
| 782 | 786 | enum radeon_dpm_forced_level level); |
| 783 | 787 | void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate); |
| 788 | +void kv_dpm_enable_bapm(struct radeon_device *rdev, bool enable); | |
| 784 | 789 | |
| 785 | 790 | /* uvd v1.0 */ |
| 786 | 791 | uint32_t uvd_v1_0_get_rptr(struct radeon_device *rdev, |
| @@ -1367,6 +1367,7 @@ bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev, · 1366 unmodified lines | ||
| 1367 | 1367 | int index = GetIndexIntoMasterTable(DATA, PPLL_SS_Info); |
| 1368 | 1368 | uint16_t data_offset, size; |
| 1369 | 1369 | struct _ATOM_SPREAD_SPECTRUM_INFO *ss_info; |
| 1370 | + struct _ATOM_SPREAD_SPECTRUM_ASSIGNMENT *ss_assign; | |
| 1370 | 1371 | uint8_t frev, crev; |
| 1371 | 1372 | int i, num_indices; |
| 1372 | 1373 | |
| @@ -1378,18 +1379,21 @@ bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev, · 5 unmodified lines | ||
| 1378 | 1379 | |
| 1379 | 1380 | num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) / |
| 1380 | 1381 | sizeof(ATOM_SPREAD_SPECTRUM_ASSIGNMENT); |
| 1381 | − | |
| 1382 | + ss_assign = (struct _ATOM_SPREAD_SPECTRUM_ASSIGNMENT*) | |
| 1383 | + ((u8 *)&ss_info->asSS_Info[0]); | |
| 1382 | 1384 | for (i = 0; i < num_indices; i++) { |
| 1383 | − if (ss_info->asSS_Info[i].ucSS_Id == id) { | |
| 1385 | + if (ss_assign->ucSS_Id == id) { | |
| 1384 | 1386 | ss->percentage = |
| 1385 | − le16_to_cpu(ss_info->asSS_Info[i].usSpreadSpectrumPercentage); | |
| 1386 | − ss->type = ss_info->asSS_Info[i].ucSpreadSpectrumType; | |
| 1387 | − ss->step = ss_info->asSS_Info[i].ucSS_Step; | |
| 1388 | − ss->delay = ss_info->asSS_Info[i].ucSS_Delay; | |
| 1389 | − ss->range = ss_info->asSS_Info[i].ucSS_Range; | |
| 1390 | − ss->refdiv = ss_info->asSS_Info[i].ucRecommendedRef_Div; | |
| 1387 | + le16_to_cpu(ss_assign->usSpreadSpectrumPercentage); | |
| 1388 | + ss->type = ss_assign->ucSpreadSpectrumType; | |
| 1389 | + ss->step = ss_assign->ucSS_Step; | |
| 1390 | + ss->delay = ss_assign->ucSS_Delay; | |
| 1391 | + ss->range = ss_assign->ucSS_Range; | |
| 1392 | + ss->refdiv = ss_assign->ucRecommendedRef_Div; | |
| 1391 | 1393 | return true; |
| 1392 | 1394 | } |
| 1395 | + ss_assign = (struct _ATOM_SPREAD_SPECTRUM_ASSIGNMENT*) | |
| 1396 | + ((u8 *)ss_assign + sizeof(struct _ATOM_SPREAD_SPECTRUM_ASSIGNMENT)); | |
| 1393 | 1397 | } |
| 1394 | 1398 | } |
| 1395 | 1399 | return false; |
| @@ -1477,6 +1481,12 @@ union asic_ss_info { · 81 unmodified lines | ||
| 1477 | 1481 | struct _ATOM_ASIC_INTERNAL_SS_INFO_V3 info_3; |
| 1478 | 1482 | }; |
| 1479 | 1483 | |
| 1484 | +union asic_ss_assignment { | |
| 1485 | + struct _ATOM_ASIC_SS_ASSIGNMENT v1; | |
| 1486 | + struct _ATOM_ASIC_SS_ASSIGNMENT_V2 v2; | |
| 1487 | + struct _ATOM_ASIC_SS_ASSIGNMENT_V3 v3; | |
| 1488 | +}; | |
| 1489 | + | |
| 1480 | 1490 | bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev, |
| 1481 | 1491 | struct radeon_atom_ss *ss, |
| 1482 | 1492 | int id, u32 clock) |
| @@ -1485,6 +1495,7 @@ bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev, · 2 unmodified lines | ||
| 1485 | 1495 | int index = GetIndexIntoMasterTable(DATA, ASIC_InternalSS_Info); |
| 1486 | 1496 | uint16_t data_offset, size; |
| 1487 | 1497 | union asic_ss_info *ss_info; |
| 1498 | + union asic_ss_assignment *ss_assign; | |
| 1488 | 1499 | uint8_t frev, crev; |
| 1489 | 1500 | int i, num_indices; |
| 1490 | 1501 | |
| @@ -1509,45 +1520,52 @@ bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev, · 18 unmodified lines | ||
| 1509 | 1520 | num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) / |
| 1510 | 1521 | sizeof(ATOM_ASIC_SS_ASSIGNMENT); |
| 1511 | 1522 | |
| 1523 | + ss_assign = (union asic_ss_assignment *)((u8 *)&ss_info->info.asSpreadSpectrum[0]); | |
| 1512 | 1524 | for (i = 0; i < num_indices; i++) { |
| 1513 | − if ((ss_info->info.asSpreadSpectrum[i].ucClockIndication == id) && | |
| 1514 | − (clock <= le32_to_cpu(ss_info->info.asSpreadSpectrum[i].ulTargetClockRange))) { | |
| 1525 | + if ((ss_assign->v1.ucClockIndication == id) && | |
| 1526 | + (clock <= le32_to_cpu(ss_assign->v1.ulTargetClockRange))) { | |
| 1515 | 1527 | ss->percentage = |
| 1516 | − le16_to_cpu(ss_info->info.asSpreadSpectrum[i].usSpreadSpectrumPercentage); | |
| 1517 | − ss->type = ss_info->info.asSpreadSpectrum[i].ucSpreadSpectrumMode; | |
| 1518 | − ss->rate = le16_to_cpu(ss_info->info.asSpreadSpectrum[i].usSpreadRateInKhz); | |
| 1528 | + le16_to_cpu(ss_assign->v1.usSpreadSpectrumPercentage); | |
| 1529 | + ss->type = ss_assign->v1.ucSpreadSpectrumMode; | |
| 1530 | + ss->rate = le16_to_cpu(ss_assign->v1.usSpreadRateInKhz); | |
| 1519 | 1531 | return true; |
| 1520 | 1532 | } |
| 1533 | + ss_assign = (union asic_ss_assignment *) | |
| 1534 | + ((u8 *)ss_assign + sizeof(ATOM_ASIC_SS_ASSIGNMENT)); | |
| 1521 | 1535 | } |
| 1522 | 1536 | break; |
| 1523 | 1537 | case 2: |
| 1524 | 1538 | num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) / |
| 1525 | 1539 | sizeof(ATOM_ASIC_SS_ASSIGNMENT_V2); |
| 1540 | + ss_assign = (union asic_ss_assignment *)((u8 *)&ss_info->info_2.asSpreadSpectrum[0]); | |
| 1526 | 1541 | for (i = 0; i < num_indices; i++) { |
| 1527 | − if ((ss_info->info_2.asSpreadSpectrum[i].ucClockIndication == id) && | |
| 1528 | − (clock <= le32_to_cpu(ss_info->info_2.asSpreadSpectrum[i].ulTargetClockRange))) { | |
| 1542 | + if ((ss_assign->v2.ucClockIndication == id) && | |
| 1543 | + (clock <= le32_to_cpu(ss_assign->v2.ulTargetClockRange))) { | |
| 1529 | 1544 | ss->percentage = |
| 1530 | − le16_to_cpu(ss_info->info_2.asSpreadSpectrum[i].usSpreadSpectrumPercentage); | |
| 1531 | − ss->type = ss_info->info_2.asSpreadSpectrum[i].ucSpreadSpectrumMode; | |
| 1532 | − ss->rate = le16_to_cpu(ss_info->info_2.asSpreadSpectrum[i].usSpreadRateIn10Hz); | |
| 1545 | + le16_to_cpu(ss_assign->v2.usSpreadSpectrumPercentage); | |
| 1546 | + ss->type = ss_assign->v2.ucSpreadSpectrumMode; | |
| 1547 | + ss->rate = le16_to_cpu(ss_assign->v2.usSpreadRateIn10Hz); | |
| 1533 | 1548 | if ((crev == 2) && |
| 1534 | 1549 | ((id == ASIC_INTERNAL_ENGINE_SS) || |
| 1535 | 1550 | (id == ASIC_INTERNAL_MEMORY_SS))) |
| 1536 | 1551 | ss->rate /= 100; |
| 1537 | 1552 | return true; |
| 1538 | 1553 | } |
| 1554 | + ss_assign = (union asic_ss_assignment *) | |
| 1555 | + ((u8 *)ss_assign + sizeof(ATOM_ASIC_SS_ASSIGNMENT_V2)); | |
| 1539 | 1556 | } |
| 1540 | 1557 | break; |
| 1541 | 1558 | case 3: |
| 1542 | 1559 | num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) / |
| 1543 | 1560 | sizeof(ATOM_ASIC_SS_ASSIGNMENT_V3); |
| 1561 | + ss_assign = (union asic_ss_assignment *)((u8 *)&ss_info->info_3.asSpreadSpectrum[0]); | |
| 1544 | 1562 | for (i = 0; i < num_indices; i++) { |
| 1545 | − if ((ss_info->info_3.asSpreadSpectrum[i].ucClockIndication == id) && | |
| 1546 | − (clock <= le32_to_cpu(ss_info->info_3.asSpreadSpectrum[i].ulTargetClockRange))) { | |
| 1563 | + if ((ss_assign->v3.ucClockIndication == id) && | |
| 1564 | + (clock <= le32_to_cpu(ss_assign->v3.ulTargetClockRange))) { | |
| 1547 | 1565 | ss->percentage = |
| 1548 | − le16_to_cpu(ss_info->info_3.asSpreadSpectrum[i].usSpreadSpectrumPercentage); | |
| 1549 | − ss->type = ss_info->info_3.asSpreadSpectrum[i].ucSpreadSpectrumMode; | |
| 1550 | − ss->rate = le16_to_cpu(ss_info->info_3.asSpreadSpectrum[i].usSpreadRateIn10Hz); | |
| 1566 | + le16_to_cpu(ss_assign->v3.usSpreadSpectrumPercentage); | |
| 1567 | + ss->type = ss_assign->v3.ucSpreadSpectrumMode; | |
| 1568 | + ss->rate = le16_to_cpu(ss_assign->v3.usSpreadRateIn10Hz); | |
| 1551 | 1569 | if ((id == ASIC_INTERNAL_ENGINE_SS) || |
| 1552 | 1570 | (id == ASIC_INTERNAL_MEMORY_SS)) |
| 1553 | 1571 | ss->rate /= 100; |
| @@ -1555,6 +1573,8 @@ bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev, · 1 unmodified line | ||
| 1555 | 1573 | radeon_atombios_get_igp_ss_overrides(rdev, ss, id); |
| 1556 | 1574 | return true; |
| 1557 | 1575 | } |
| 1576 | + ss_assign = (union asic_ss_assignment *) | |
| 1577 | + ((u8 *)ss_assign + sizeof(ATOM_ASIC_SS_ASSIGNMENT_V3)); | |
| 1558 | 1578 | } |
| 1559 | 1579 | break; |
| 1560 | 1580 | default: |
| @@ -396,6 +396,21 @@ static int radeon_connector_set_property(struct drm_connector *connector, struct · 395 unmodified lines | ||
| 396 | 396 | } |
| 397 | 397 | } |
| 398 | 398 | |
| 399 | + if (property == rdev->mode_info.audio_property) { | |
| 400 | + struct radeon_connector *radeon_connector = to_radeon_connector(connector); | |
| 401 | + /* need to find digital encoder on connector */ | |
| 402 | + encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | |
| 403 | + if (!encoder) | |
| 404 | + return 0; | |
| 405 | + | |
| 406 | + radeon_encoder = to_radeon_encoder(encoder); | |
| 407 | + | |
| 408 | + if (radeon_connector->audio != val) { | |
| 409 | + radeon_connector->audio = val; | |
| 410 | + radeon_property_change_mode(&radeon_encoder->base); | |
| 411 | + } | |
| 412 | + } | |
| 413 | + | |
| 399 | 414 | if (property == rdev->mode_info.underscan_property) { |
| 400 | 415 | /* need to find digital encoder on connector */ |
| 401 | 416 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); |
| @@ -1420,7 +1435,7 @@ radeon_dp_detect(struct drm_connector *connector, bool force) · 1018 unmodified lines | ||
| 1420 | 1435 | if (radeon_dp_getdpcd(radeon_connector)) |
| 1421 | 1436 | ret = connector_status_connected; |
| 1422 | 1437 | } else { |
| 1423 | − /* try non-aux ddc (DP to DVI/HMDI/etc. adapter) */ | |
| 1438 | + /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */ | |
| 1424 | 1439 | if (radeon_ddc_probe(radeon_connector, false)) |
| 1425 | 1440 | ret = connector_status_connected; |
| 1426 | 1441 | } |
| @@ -1489,6 +1504,24 @@ static const struct drm_connector_funcs radeon_dp_connector_funcs = { · 62 unmodified lines | ||
| 1489 | 1504 | .force = radeon_dvi_force, |
| 1490 | 1505 | }; |
| 1491 | 1506 | |
| 1507 | +static const struct drm_connector_funcs radeon_edp_connector_funcs = { | |
| 1508 | + .dpms = drm_helper_connector_dpms, | |
| 1509 | + .detect = radeon_dp_detect, | |
| 1510 | + .fill_modes = drm_helper_probe_single_connector_modes, | |
| 1511 | + .set_property = radeon_lvds_set_property, | |
| 1512 | + .destroy = radeon_dp_connector_destroy, | |
| 1513 | + .force = radeon_dvi_force, | |
| 1514 | +}; | |
| 1515 | + | |
| 1516 | +static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = { | |
| 1517 | + .dpms = drm_helper_connector_dpms, | |
| 1518 | + .detect = radeon_dp_detect, | |
| 1519 | + .fill_modes = drm_helper_probe_single_connector_modes, | |
| 1520 | + .set_property = radeon_lvds_set_property, | |
| 1521 | + .destroy = radeon_dp_connector_destroy, | |
| 1522 | + .force = radeon_dvi_force, | |
| 1523 | +}; | |
| 1524 | + | |
| 1492 | 1525 | void |
| 1493 | 1526 | radeon_add_atom_connector(struct drm_device *dev, |
| 1494 | 1527 | uint32_t connector_id, |
| @@ -1580,8 +1613,6 @@ radeon_add_atom_connector(struct drm_device *dev, · 85 unmodified lines | ||
| 1580 | 1613 | goto failed; |
| 1581 | 1614 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
| 1582 | 1615 | radeon_connector->con_priv = radeon_dig_connector; |
| 1583 | − drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | |
| 1584 | − drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); | |
| 1585 | 1616 | if (i2c_bus->valid) { |
| 1586 | 1617 | /* add DP i2c bus */ |
| 1587 | 1618 | if (connector_type == DRM_MODE_CONNECTOR_eDP) |
| @@ -1598,6 +1629,10 @@ radeon_add_atom_connector(struct drm_device *dev, · 10 unmodified lines | ||
| 1598 | 1629 | case DRM_MODE_CONNECTOR_VGA: |
| 1599 | 1630 | case DRM_MODE_CONNECTOR_DVIA: |
| 1600 | 1631 | default: |
| 1632 | + drm_connector_init(dev, &radeon_connector->base, | |
| 1633 | + &radeon_dp_connector_funcs, connector_type); | |
| 1634 | + drm_connector_helper_add(&radeon_connector->base, | |
| 1635 | + &radeon_dp_connector_helper_funcs); | |
| 1601 | 1636 | connector->interlace_allowed = true; |
| 1602 | 1637 | connector->doublescan_allowed = true; |
| 1603 | 1638 | radeon_connector->dac_load_detect = true; |
| @@ -1610,6 +1645,10 @@ radeon_add_atom_connector(struct drm_device *dev, · 6 unmodified lines | ||
| 1610 | 1645 | case DRM_MODE_CONNECTOR_HDMIA: |
| 1611 | 1646 | case DRM_MODE_CONNECTOR_HDMIB: |
| 1612 | 1647 | case DRM_MODE_CONNECTOR_DisplayPort: |
| 1648 | + drm_connector_init(dev, &radeon_connector->base, | |
| 1649 | + &radeon_dp_connector_funcs, connector_type); | |
| 1650 | + drm_connector_helper_add(&radeon_connector->base, | |
| 1651 | + &radeon_dp_connector_helper_funcs); | |
| 1613 | 1652 | drm_object_attach_property(&radeon_connector->base.base, |
| 1614 | 1653 | rdev->mode_info.underscan_property, |
| 1615 | 1654 | UNDERSCAN_OFF); |
| @@ -1619,6 +1658,9 @@ radeon_add_atom_connector(struct drm_device *dev, · 3 unmodified lines | ||
| 1619 | 1658 | drm_object_attach_property(&radeon_connector->base.base, |
| 1620 | 1659 | rdev->mode_info.underscan_vborder_property, |
| 1621 | 1660 | 0); |
| 1661 | + drm_object_attach_property(&radeon_connector->base.base, | |
| 1662 | + rdev->mode_info.audio_property, | |
| 1663 | + RADEON_AUDIO_DISABLE); | |
| 1622 | 1664 | subpixel_order = SubPixelHorizontalRGB; |
| 1623 | 1665 | connector->interlace_allowed = true; |
| 1624 | 1666 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) |
| @@ -1634,6 +1676,10 @@ radeon_add_atom_connector(struct drm_device *dev, · 9 unmodified lines | ||
| 1634 | 1676 | break; |
| 1635 | 1677 | case DRM_MODE_CONNECTOR_LVDS: |
| 1636 | 1678 | case DRM_MODE_CONNECTOR_eDP: |
| 1679 | + drm_connector_init(dev, &radeon_connector->base, | |
| 1680 | + &radeon_lvds_bridge_connector_funcs, connector_type); | |
| 1681 | + drm_connector_helper_add(&radeon_connector->base, | |
| 1682 | + &radeon_dp_connector_helper_funcs); | |
| 1637 | 1683 | drm_object_attach_property(&radeon_connector->base.base, |
| 1638 | 1684 | dev->mode_config.scaling_mode_property, |
| 1639 | 1685 | DRM_MODE_SCALE_FULLSCREEN); |
| @@ -1708,6 +1754,11 @@ radeon_add_atom_connector(struct drm_device *dev, · 68 unmodified lines | ||
| 1708 | 1754 | rdev->mode_info.underscan_vborder_property, |
| 1709 | 1755 | 0); |
| 1710 | 1756 | } |
| 1757 | + if (ASIC_IS_DCE2(rdev)) { | |
| 1758 | + drm_object_attach_property(&radeon_connector->base.base, | |
| 1759 | + rdev->mode_info.audio_property, | |
| 1760 | + RADEON_AUDIO_DISABLE); | |
| 1761 | + } | |
| 1711 | 1762 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { |
| 1712 | 1763 | radeon_connector->dac_load_detect = true; |
| 1713 | 1764 | drm_object_attach_property(&radeon_connector->base.base, |
| @@ -1748,6 +1799,11 @@ radeon_add_atom_connector(struct drm_device *dev, · 34 unmodified lines | ||
| 1748 | 1799 | rdev->mode_info.underscan_vborder_property, |
| 1749 | 1800 | 0); |
| 1750 | 1801 | } |
| 1802 | + if (ASIC_IS_DCE2(rdev)) { | |
| 1803 | + drm_object_attach_property(&radeon_connector->base.base, | |
| 1804 | + rdev->mode_info.audio_property, | |
| 1805 | + RADEON_AUDIO_DISABLE); | |
| 1806 | + } | |
| 1751 | 1807 | subpixel_order = SubPixelHorizontalRGB; |
| 1752 | 1808 | connector->interlace_allowed = true; |
| 1753 | 1809 | if (connector_type == DRM_MODE_CONNECTOR_HDMIB) |
| @@ -1787,6 +1843,11 @@ radeon_add_atom_connector(struct drm_device *dev, · 33 unmodified lines | ||
| 1787 | 1843 | rdev->mode_info.underscan_vborder_property, |
| 1788 | 1844 | 0); |
| 1789 | 1845 | } |
| 1846 | + if (ASIC_IS_DCE2(rdev)) { | |
| 1847 | + drm_object_attach_property(&radeon_connector->base.base, | |
| 1848 | + rdev->mode_info.audio_property, | |
| 1849 | + RADEON_AUDIO_DISABLE); | |
| 1850 | + } | |
| 1790 | 1851 | connector->interlace_allowed = true; |
| 1791 | 1852 | /* in theory with a DP to VGA converter... */ |
| 1792 | 1853 | connector->doublescan_allowed = false; |
| @@ -1797,7 +1858,7 @@ radeon_add_atom_connector(struct drm_device *dev, · 4 unmodified lines | ||
| 1797 | 1858 | goto failed; |
| 1798 | 1859 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
| 1799 | 1860 | radeon_connector->con_priv = radeon_dig_connector; |
| 1800 | − drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | |
| 1861 | + drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type); | |
| 1801 | 1862 | drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); |
| 1802 | 1863 | if (i2c_bus->valid) { |
| 1803 | 1864 | /* add DP i2c bus */ |
| @@ -28,6 +28,7 @@ · 27 unmodified lines | ||
| 28 | 28 | #include <drm/radeon_drm.h> |
| 29 | 29 | #include "radeon_reg.h" |
| 30 | 30 | #include "radeon.h" |
| 31 | +#include "radeon_trace.h" | |
| 31 | 32 | |
| 32 | 33 | static int radeon_cs_parser_relocs(struct radeon_cs_parser *p) |
| 33 | 34 | { |
| @@ -80,10 +81,13 @@ static int radeon_cs_parser_relocs(struct radeon_cs_parser *p) · 46 unmodified lines | ||
| 80 | 81 | p->relocs[i].lobj.bo = p->relocs[i].robj; |
| 81 | 82 | p->relocs[i].lobj.written = !!r->write_domain; |
| 82 | 83 | |
| 83 | − /* the first reloc of an UVD job is the | |
| 84 | − msg and that must be in VRAM */ | |
| 85 | − if (p->ring == R600_RING_TYPE_UVD_INDEX && i == 0) { | |
| 86 | − /* TODO: is this still needed for NI+ ? */ | |
| 84 | + /* the first reloc of an UVD job is the msg and that must be in | |
| 85 | + VRAM, also but everything into VRAM on AGP cards to avoid | |
| 86 | + image corruptions */ | |
| 87 | + if (p->ring == R600_RING_TYPE_UVD_INDEX && | |
| 88 | + p->rdev->family < CHIP_PALM && | |
| 89 | + (i == 0 || drm_pci_device_is_agp(p->rdev->ddev))) { | |
| 90 | + | |
| 87 | 91 | p->relocs[i].lobj.domain = |
| 88 | 92 | RADEON_GEM_DOMAIN_VRAM; |
| 89 | 93 | |
| @@ -559,6 +563,8 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) · 469 unmodified lines | ||
| 559 | 563 | return r; |
| 560 | 564 | } |
| 561 | 565 | |
| 566 | + trace_radeon_cs(&parser); | |
| 567 | + | |
| 562 | 568 | r = radeon_cs_ib_chunk(rdev, &parser); |
| 563 | 569 | if (r) { |
| 564 | 570 | goto out; |
| @@ -1249,6 +1249,17 @@ int radeon_device_init(struct radeon_device *rdev, · 1248 unmodified lines | ||
| 1249 | 1249 | /* Registers mapping */ |
| 1250 | 1250 | /* TODO: block userspace mapping of io register */ |
| 1251 | 1251 | spin_lock_init(&rdev->mmio_idx_lock); |
| 1252 | + spin_lock_init(&rdev->smc_idx_lock); | |
| 1253 | + spin_lock_init(&rdev->pll_idx_lock); | |
| 1254 | + spin_lock_init(&rdev->mc_idx_lock); | |
| 1255 | + spin_lock_init(&rdev->pcie_idx_lock); | |
| 1256 | + spin_lock_init(&rdev->pciep_idx_lock); | |
| 1257 | + spin_lock_init(&rdev->pif_idx_lock); | |
| 1258 | + spin_lock_init(&rdev->cg_idx_lock); | |
| 1259 | + spin_lock_init(&rdev->uvd_idx_lock); | |
| 1260 | + spin_lock_init(&rdev->rcu_idx_lock); | |
| 1261 | + spin_lock_init(&rdev->didt_idx_lock); | |
| 1262 | + spin_lock_init(&rdev->end_idx_lock); | |
| 1252 | 1263 | if (rdev->family >= CHIP_BONAIRE) { |
| 1253 | 1264 | rdev->rmmio_base = pci_resource_start(rdev->pdev, 5); |
| 1254 | 1265 | rdev->rmmio_size = pci_resource_len(rdev->pdev, 5); |
| @@ -1309,13 +1320,22 @@ int radeon_device_init(struct radeon_device *rdev, · 54 unmodified lines | ||
| 1309 | 1320 | return r; |
| 1310 | 1321 | } |
| 1311 | 1322 | if ((radeon_testing & 1)) { |
| 1312 | − radeon_test_moves(rdev); | |
| 1323 | + if (rdev->accel_working) | |
| 1324 | + radeon_test_moves(rdev); | |
| 1325 | + else | |
| 1326 | + DRM_INFO("radeon: acceleration disabled, skipping move tests\n"); | |
| 1313 | 1327 | } |
| 1314 | 1328 | if ((radeon_testing & 2)) { |
| 1315 | − radeon_test_syncing(rdev); | |
| 1329 | + if (rdev->accel_working) | |
| 1330 | + radeon_test_syncing(rdev); | |
| 1331 | + else | |
| 1332 | + DRM_INFO("radeon: acceleration disabled, skipping sync tests\n"); | |
| 1316 | 1333 | } |
| 1317 | 1334 | if (radeon_benchmarking) { |
| 1318 | − radeon_benchmark(rdev, radeon_benchmarking); | |
| 1335 | + if (rdev->accel_working) | |
| 1336 | + radeon_benchmark(rdev, radeon_benchmarking); | |
| 1337 | + else | |
| 1338 | + DRM_INFO("radeon: acceleration disabled, skipping benchmarks\n"); | |
| 1319 | 1339 | } |
| 1320 | 1340 | return 0; |
| 1321 | 1341 | } |
| @@ -1172,6 +1172,12 @@ static struct drm_prop_enum_list radeon_underscan_enum_list[] = · 1171 unmodified lines | ||
| 1172 | 1172 | { UNDERSCAN_AUTO, "auto" }, |
| 1173 | 1173 | }; |
| 1174 | 1174 | |
| 1175 | +static struct drm_prop_enum_list radeon_audio_enum_list[] = | |
| 1176 | +{ { RADEON_AUDIO_DISABLE, "off" }, | |
| 1177 | + { RADEON_AUDIO_ENABLE, "on" }, | |
| 1178 | + { RADEON_AUDIO_AUTO, "auto" }, | |
| 1179 | +}; | |
| 1180 | + | |
| 1175 | 1181 | static int radeon_modeset_create_props(struct radeon_device *rdev) |
| 1176 | 1182 | { |
| 1177 | 1183 | int sz; |
| @@ -1222,6 +1228,12 @@ static int radeon_modeset_create_props(struct radeon_device *rdev) · 44 unmodified lines | ||
| 1222 | 1228 | if (!rdev->mode_info.underscan_vborder_property) |
| 1223 | 1229 | return -ENOMEM; |
| 1224 | 1230 | |
| 1231 | + sz = ARRAY_SIZE(radeon_audio_enum_list); | |
| 1232 | + rdev->mode_info.audio_property = | |
| 1233 | + drm_property_create_enum(rdev->ddev, 0, | |
| 1234 | + "audio", | |
| 1235 | + radeon_audio_enum_list, sz); | |
| 1236 | + | |
| 1225 | 1237 | return 0; |
| 1226 | 1238 | } |
| 1227 | 1239 | |
| @@ -153,7 +153,7 @@ int radeon_benchmarking = 0; · 152 unmodified lines | ||
| 153 | 153 | int radeon_testing = 0; |
| 154 | 154 | int radeon_connector_table = 0; |
| 155 | 155 | int radeon_tv = 1; |
| 156 | −int radeon_audio = 0; | |
| 156 | +int radeon_audio = 1; | |
| 157 | 157 | int radeon_disp_priority = 0; |
| 158 | 158 | int radeon_hw_i2c = 0; |
| 159 | 159 | int radeon_pcie_gen2 = -1; |
| @@ -247,6 +247,8 @@ struct radeon_mode_info { · 246 unmodified lines | ||
| 247 | 247 | struct drm_property *underscan_property; |
| 248 | 248 | struct drm_property *underscan_hborder_property; |
| 249 | 249 | struct drm_property *underscan_vborder_property; |
| 250 | + /* audio */ | |
| 251 | + struct drm_property *audio_property; | |
| 250 | 252 | /* hardcoded DFP edid from BIOS */ |
| 251 | 253 | struct edid *bios_hardcoded_edid; |
| 252 | 254 | int bios_hardcoded_edid_size; |
| @@ -471,6 +473,12 @@ struct radeon_router { · 218 unmodified lines | ||
| 471 | 473 | u8 cd_mux_state; |
| 472 | 474 | }; |
| 473 | 475 | |
| 476 | +enum radeon_connector_audio { | |
| 477 | + RADEON_AUDIO_DISABLE = 0, | |
| 478 | + RADEON_AUDIO_ENABLE = 1, | |
| 479 | + RADEON_AUDIO_AUTO = 2 | |
| 480 | +}; | |
| 481 | + | |
| 474 | 482 | struct radeon_connector { |
| 475 | 483 | struct drm_connector base; |
| 476 | 484 | uint32_t connector_id; |
| @@ -489,6 +497,7 @@ struct radeon_connector { · 12 unmodified lines | ||
| 489 | 497 | struct radeon_hpd hpd; |
| 490 | 498 | struct radeon_router router; |
| 491 | 499 | struct radeon_i2c_chan *router_bus; |
| 500 | + enum radeon_connector_audio audio; | |
| 492 | 501 | }; |
| 493 | 502 | |
| 494 | 503 | struct radeon_framebuffer { |
| @@ -67,7 +67,16 @@ int radeon_pm_get_type_index(struct radeon_device *rdev, · 66 unmodified lines | ||
| 67 | 67 | |
| 68 | 68 | void radeon_pm_acpi_event_handler(struct radeon_device *rdev) |
| 69 | 69 | { |
| 70 | − if (rdev->pm.pm_method == PM_METHOD_PROFILE) { | |
| 70 | + if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { | |
| 71 | + mutex_lock(&rdev->pm.mutex); | |
| 72 | + if (power_supply_is_system_supplied() > 0) | |
| 73 | + rdev->pm.dpm.ac_power = true; | |
| 74 | + else | |
| 75 | + rdev->pm.dpm.ac_power = false; | |
| 76 | + if (rdev->asic->dpm.enable_bapm) | |
| 77 | + radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power); | |
| 78 | + mutex_unlock(&rdev->pm.mutex); | |
| 79 | + } else if (rdev->pm.pm_method == PM_METHOD_PROFILE) { | |
| 71 | 80 | if (rdev->pm.profile == PM_PROFILE_AUTO) { |
| 72 | 81 | mutex_lock(&rdev->pm.mutex); |
| 73 | 82 | radeon_pm_update_profile(rdev); |
| @@ -333,7 +342,7 @@ static ssize_t radeon_get_pm_profile(struct device *dev, · 259 unmodified lines | ||
| 333 | 342 | struct device_attribute *attr, |
| 334 | 343 | char *buf) |
| 335 | 344 | { |
| 336 | − struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); | |
| 345 | + struct drm_device *ddev = dev_get_drvdata(dev); | |
| 337 | 346 | struct radeon_device *rdev = ddev->dev_private; |
| 338 | 347 | int cp = rdev->pm.profile; |
| 339 | 348 | |
| @@ -349,7 +358,7 @@ static ssize_t radeon_set_pm_profile(struct device *dev, · 9 unmodified lines | ||
| 349 | 358 | const char *buf, |
| 350 | 359 | size_t count) |
| 351 | 360 | { |
| 352 | − struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); | |
| 361 | + struct drm_device *ddev = dev_get_drvdata(dev); | |
| 353 | 362 | struct radeon_device *rdev = ddev->dev_private; |
| 354 | 363 | |
| 355 | 364 | mutex_lock(&rdev->pm.mutex); |
| @@ -383,7 +392,7 @@ static ssize_t radeon_get_pm_method(struct device *dev, · 27 unmodified lines | ||
| 383 | 392 | struct device_attribute *attr, |
| 384 | 393 | char *buf) |
| 385 | 394 | { |
| 386 | − struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); | |
| 395 | + struct drm_device *ddev = dev_get_drvdata(dev); | |
| 387 | 396 | struct radeon_device *rdev = ddev->dev_private; |
| 388 | 397 | int pm = rdev->pm.pm_method; |
| 389 | 398 | |
| @@ -397,7 +406,7 @@ static ssize_t radeon_set_pm_method(struct device *dev, · 7 unmodified lines | ||
| 397 | 406 | const char *buf, |
| 398 | 407 | size_t count) |
| 399 | 408 | { |
| 400 | − struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); | |
| 409 | + struct drm_device *ddev = dev_get_drvdata(dev); | |
| 401 | 410 | struct radeon_device *rdev = ddev->dev_private; |
| 402 | 411 | |
| 403 | 412 | /* we don't support the legacy modes with dpm */ |
| @@ -433,7 +442,7 @@ static ssize_t radeon_get_dpm_state(struct device *dev, · 29 unmodified lines | ||
| 433 | 442 | struct device_attribute *attr, |
| 434 | 443 | char *buf) |
| 435 | 444 | { |
| 436 | − struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); | |
| 445 | + struct drm_device *ddev = dev_get_drvdata(dev); | |
| 437 | 446 | struct radeon_device *rdev = ddev->dev_private; |
| 438 | 447 | enum radeon_pm_state_type pm = rdev->pm.dpm.user_state; |
| 439 | 448 | |
| @@ -447,7 +456,7 @@ static ssize_t radeon_set_dpm_state(struct device *dev, · 7 unmodified lines | ||
| 447 | 456 | const char *buf, |
| 448 | 457 | size_t count) |
| 449 | 458 | { |
| 450 | − struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); | |
| 459 | + struct drm_device *ddev = dev_get_drvdata(dev); | |
| 451 | 460 | struct radeon_device *rdev = ddev->dev_private; |
| 452 | 461 | |
| 453 | 462 | mutex_lock(&rdev->pm.mutex); |
| @@ -472,7 +481,7 @@ static ssize_t radeon_get_dpm_forced_performance_level(struct device *dev, · 18 unmodified lines | ||
| 472 | 481 | struct device_attribute *attr, |
| 473 | 482 | char *buf) |
| 474 | 483 | { |
| 475 | − struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); | |
| 484 | + struct drm_device *ddev = dev_get_drvdata(dev); | |
| 476 | 485 | struct radeon_device *rdev = ddev->dev_private; |
| 477 | 486 | enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; |
| 478 | 487 | |
| @@ -486,7 +495,7 @@ static ssize_t radeon_set_dpm_forced_performance_level(struct device *dev, · 7 unmodified lines | ||
| 486 | 495 | const char *buf, |
| 487 | 496 | size_t count) |
| 488 | 497 | { |
| 489 | − struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); | |
| 498 | + struct drm_device *ddev = dev_get_drvdata(dev); | |
| 490 | 499 | struct radeon_device *rdev = ddev->dev_private; |
| 491 | 500 | enum radeon_dpm_forced_level level; |
| 492 | 501 | int ret = 0; |
| @@ -524,7 +533,7 @@ static ssize_t radeon_hwmon_show_temp(struct device *dev, · 31 unmodified lines | ||
| 524 | 533 | struct device_attribute *attr, |
| 525 | 534 | char *buf) |
| 526 | 535 | { |
| 527 | − struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); | |
| 536 | + struct drm_device *ddev = dev_get_drvdata(dev); | |
| 528 | 537 | struct radeon_device *rdev = ddev->dev_private; |
| 529 | 538 | int temp; |
| 530 | 539 | |
| @@ -536,6 +545,23 @@ static ssize_t radeon_hwmon_show_temp(struct device *dev, · 5 unmodified lines | ||
| 536 | 545 | return snprintf(buf, PAGE_SIZE, "%d\n", temp); |
| 537 | 546 | } |
| 538 | 547 | |
| 548 | +static ssize_t radeon_hwmon_show_temp_thresh(struct device *dev, | |
| 549 | + struct device_attribute *attr, | |
| 550 | + char *buf) | |
| 551 | +{ | |
| 552 | + struct drm_device *ddev = dev_get_drvdata(dev); | |
| 553 | + struct radeon_device *rdev = ddev->dev_private; | |
| 554 | + int hyst = to_sensor_dev_attr(attr)->index; | |
| 555 | + int temp; | |
| 556 | + | |
| 557 | + if (hyst) | |
| 558 | + temp = rdev->pm.dpm.thermal.min_temp; | |
| 559 | + else | |
| 560 | + temp = rdev->pm.dpm.thermal.max_temp; | |
| 561 | + | |
| 562 | + return snprintf(buf, PAGE_SIZE, "%d\n", temp); | |
| 563 | +} | |
| 564 | + | |
| 539 | 565 | static ssize_t radeon_hwmon_show_name(struct device *dev, |
| 540 | 566 | struct device_attribute *attr, |
| 541 | 567 | char *buf) |
| @@ -544,16 +570,37 @@ static ssize_t radeon_hwmon_show_name(struct device *dev, · 2 unmodified lines | ||
| 544 | 570 | } |
| 545 | 571 | |
| 546 | 572 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, radeon_hwmon_show_temp, NULL, 0); |
| 573 | +static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, radeon_hwmon_show_temp_thresh, NULL, 0); | |
| 574 | +static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, radeon_hwmon_show_temp_thresh, NULL, 1); | |
| 547 | 575 | static SENSOR_DEVICE_ATTR(name, S_IRUGO, radeon_hwmon_show_name, NULL, 0); |
| 548 | 576 | |
| 549 | 577 | static struct attribute *hwmon_attributes[] = { |
| 550 | 578 | &sensor_dev_attr_temp1_input.dev_attr.attr, |
| 579 | + &sensor_dev_attr_temp1_crit.dev_attr.attr, | |
| 580 | + &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, | |
| 551 | 581 | &sensor_dev_attr_name.dev_attr.attr, |
| 552 | 582 | NULL |
| 553 | 583 | }; |
| 554 | 584 | |
| 585 | +static umode_t hwmon_attributes_visible(struct kobject *kobj, | |
| 586 | + struct attribute *attr, int index) | |
| 587 | +{ | |
| 588 | + struct device *dev = container_of(kobj, struct device, kobj); | |
| 589 | + struct drm_device *ddev = dev_get_drvdata(dev); | |
| 590 | + struct radeon_device *rdev = ddev->dev_private; | |
| 591 | + | |
| 592 | + /* Skip limit attributes if DPM is not enabled */ | |
| 593 | + if (rdev->pm.pm_method != PM_METHOD_DPM && | |
| 594 | + (attr == &sensor_dev_attr_temp1_crit.dev_attr.attr || | |
| 595 | + attr == &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr)) | |
| 596 | + return 0; | |
| 597 | + | |
| 598 | + return attr->mode; | |
| 599 | +} | |
| 600 | + | |
| 555 | 601 | static const struct attribute_group hwmon_attrgroup = { |
| 556 | 602 | .attrs = hwmon_attributes, |
| 603 | + .is_visible = hwmon_attributes_visible, | |
| 557 | 604 | }; |
| 558 | 605 | |
| 559 | 606 | static int radeon_hwmon_init(struct radeon_device *rdev) |
| @@ -870,10 +917,13 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev) · 310 unmodified lines | ||
| 870 | 917 | |
| 871 | 918 | radeon_dpm_post_set_power_state(rdev); |
| 872 | 919 | |
| 873 | − /* force low perf level for thermal */ | |
| 874 | − if (rdev->pm.dpm.thermal_active && | |
| 875 | − rdev->asic->dpm.force_performance_level) { | |
| 876 | − radeon_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_LOW); | |
| 920 | + if (rdev->asic->dpm.force_performance_level) { | |
| 921 | + if (rdev->pm.dpm.thermal_active) | |
| 922 | + /* force low perf level for thermal */ | |
| 923 | + radeon_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_LOW); | |
| 924 | + else | |
| 925 | + /* otherwise, enable auto */ | |
| 926 | + radeon_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO); | |
| 877 | 927 | } |
| 878 | 928 | |
| 879 | 929 | done: |
| @@ -952,7 +1002,7 @@ static void radeon_pm_resume_old(struct radeon_device *rdev) · 72 unmodified lines | ||
| 952 | 1002 | { |
| 953 | 1003 | /* set up the default clocks if the MC ucode is loaded */ |
| 954 | 1004 | if ((rdev->family >= CHIP_BARTS) && |
| 955 | − (rdev->family <= CHIP_HAINAN) && | |
| 1005 | + (rdev->family <= CHIP_CAYMAN) && | |
| 956 | 1006 | rdev->mc_fw) { |
| 957 | 1007 | if (rdev->pm.default_vddc) |
| 958 | 1008 | radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, |
| @@ -996,7 +1046,7 @@ static void radeon_pm_resume_dpm(struct radeon_device *rdev) · 37 unmodified lines | ||
| 996 | 1046 | if (ret) { |
| 997 | 1047 | DRM_ERROR("radeon: dpm resume failed\n"); |
| 998 | 1048 | if ((rdev->family >= CHIP_BARTS) && |
| 999 | − (rdev->family <= CHIP_HAINAN) && | |
| 1049 | + (rdev->family <= CHIP_CAYMAN) && | |
| 1000 | 1050 | rdev->mc_fw) { |
| 1001 | 1051 | if (rdev->pm.default_vddc) |
| 1002 | 1052 | radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, |
| @@ -1047,7 +1097,7 @@ static int radeon_pm_init_old(struct radeon_device *rdev) · 44 unmodified lines | ||
| 1047 | 1097 | radeon_pm_init_profile(rdev); |
| 1048 | 1098 | /* set up the default clocks if the MC ucode is loaded */ |
| 1049 | 1099 | if ((rdev->family >= CHIP_BARTS) && |
| 1050 | − (rdev->family <= CHIP_HAINAN) && | |
| 1100 | + (rdev->family <= CHIP_CAYMAN) && | |
| 1051 | 1101 | rdev->mc_fw) { |
| 1052 | 1102 | if (rdev->pm.default_vddc) |
| 1053 | 1103 | radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, |
| @@ -1102,9 +1152,10 @@ static int radeon_pm_init_dpm(struct radeon_device *rdev) · 48 unmodified lines | ||
| 1102 | 1152 | { |
| 1103 | 1153 | int ret; |
| 1104 | 1154 | |
| 1105 | − /* default to performance state */ | |
| 1155 | + /* default to balanced state */ | |
| 1106 | 1156 | rdev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; |
| 1107 | 1157 | rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; |
| 1158 | + rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO; | |
| 1108 | 1159 | rdev->pm.default_sclk = rdev->clock.default_sclk; |
| 1109 | 1160 | rdev->pm.default_mclk = rdev->clock.default_mclk; |
| 1110 | 1161 | rdev->pm.current_sclk = rdev->clock.default_sclk; |
| @@ -1132,7 +1183,7 @@ static int radeon_pm_init_dpm(struct radeon_device *rdev) · 21 unmodified lines | ||
| 1132 | 1183 | if (ret) { |
| 1133 | 1184 | rdev->pm.dpm_enabled = false; |
| 1134 | 1185 | if ((rdev->family >= CHIP_BARTS) && |
| 1135 | − (rdev->family <= CHIP_HAINAN) && | |
| 1186 | + (rdev->family <= CHIP_CAYMAN) && | |
| 1136 | 1187 | rdev->mc_fw) { |
| 1137 | 1188 | if (rdev->pm.default_vddc) |
| 1138 | 1189 | radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, |
| @@ -839,9 +839,11 @@ static int radeon_debugfs_ring_info(struct seq_file *m, void *data) · 838 unmodified lines | ||
| 839 | 839 | * packet that is the root issue |
| 840 | 840 | */ |
| 841 | 841 | i = (ring->rptr + ring->ptr_mask + 1 - 32) & ring->ptr_mask; |
| 842 | − for (j = 0; j <= (count + 32); j++) { | |
| 843 | − seq_printf(m, "r[%5d]=0x%08x\n", i, ring->ring[i]); | |
| 844 | − i = (i + 1) & ring->ptr_mask; | |
| 842 | + if (ring->ready) { | |
| 843 | + for (j = 0; j <= (count + 32); j++) { | |
| 844 | + seq_printf(m, "r[%5d]=0x%08x\n", i, ring->ring[i]); | |
| 845 | + i = (i + 1) & ring->ptr_mask; | |
| 846 | + } | |
| 845 | 847 | } |
| 846 | 848 | return 0; |
| 847 | 849 | } |
| @@ -27,6 +27,26 @@ TRACE_EVENT(radeon_bo_create, · 26 unmodified lines | ||
| 27 | 27 | TP_printk("bo=%p, pages=%u", __entry->bo, __entry->pages) |
| 28 | 28 | ); |
| 29 | 29 | |
| 30 | +TRACE_EVENT(radeon_cs, | |
| 31 | + TP_PROTO(struct radeon_cs_parser *p), | |
| 32 | + TP_ARGS(p), | |
| 33 | + TP_STRUCT__entry( | |
| 34 | + __field(u32, ring) | |
| 35 | + __field(u32, dw) | |
| 36 | + __field(u32, fences) | |
| 37 | + ), | |
| 38 | + | |
| 39 | + TP_fast_assign( | |
| 40 | + __entry->ring = p->ring; | |
| 41 | + __entry->dw = p->chunks[p->chunk_ib_idx].length_dw; | |
| 42 | + __entry->fences = radeon_fence_count_emitted( | |
| 43 | + p->rdev, p->ring); | |
| 44 | + ), | |
| 45 | + TP_printk("ring=%u, dw=%u, fences=%u", | |
| 46 | + __entry->ring, __entry->dw, | |
| 47 | + __entry->fences) | |
| 48 | +); | |
| 49 | + | |
| 30 | 50 | DECLARE_EVENT_CLASS(radeon_fence_request, |
| 31 | 51 | |
| 32 | 52 | TP_PROTO(struct drm_device *dev, u32 seqno), |
| @@ -53,13 +73,6 @@ DEFINE_EVENT(radeon_fence_request, radeon_fence_emit, · 20 unmodified lines | ||
| 53 | 73 | TP_ARGS(dev, seqno) |
| 54 | 74 | ); |
| 55 | 75 | |
| 56 | −DEFINE_EVENT(radeon_fence_request, radeon_fence_retire, | |
| 57 | − | |
| 58 | − TP_PROTO(struct drm_device *dev, u32 seqno), | |
| 59 | − | |
| 60 | − TP_ARGS(dev, seqno) | |
| 61 | −); | |
| 62 | − | |
| 63 | 76 | DEFINE_EVENT(radeon_fence_request, radeon_fence_wait_begin, |
| 64 | 77 | |
| 65 | 78 | TP_PROTO(struct drm_device *dev, u32 seqno), |
| @@ -476,8 +476,7 @@ static int radeon_uvd_cs_reloc(struct radeon_cs_parser *p, · 475 unmodified lines | ||
| 476 | 476 | return -EINVAL; |
| 477 | 477 | } |
| 478 | 478 | |
| 479 | − /* TODO: is this still necessary on NI+ ? */ | |
| 480 | − if ((cmd == 0 || cmd == 0x3) && | |
| 479 | + if (p->rdev->family < CHIP_PALM && (cmd == 0 || cmd == 0x3) && | |
| 481 | 480 | (start >> 28) != (p->rdev->uvd.gpu_addr >> 28)) { |
| 482 | 481 | DRM_ERROR("msg/fb buffer %LX-%LX out of 256MB segment!\n", |
| 483 | 482 | start, end); |
| @@ -274,19 +274,26 @@ static void rs400_mc_init(struct radeon_device *rdev) · 273 unmodified lines | ||
| 274 | 274 | |
| 275 | 275 | uint32_t rs400_mc_rreg(struct radeon_device *rdev, uint32_t reg) |
| 276 | 276 | { |
| 277 | + unsigned long flags; | |
| 277 | 278 | uint32_t r; |
| 278 | 279 | |
| 280 | + spin_lock_irqsave(&rdev->mc_idx_lock, flags); | |
| 279 | 281 | WREG32(RS480_NB_MC_INDEX, reg & 0xff); |
| 280 | 282 | r = RREG32(RS480_NB_MC_DATA); |
| 281 | 283 | WREG32(RS480_NB_MC_INDEX, 0xff); |
| 284 | + spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); | |
| 282 | 285 | return r; |
| 283 | 286 | } |
| 284 | 287 | |
| 285 | 288 | void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) |
| 286 | 289 | { |
| 290 | + unsigned long flags; | |
| 291 | + | |
| 292 | + spin_lock_irqsave(&rdev->mc_idx_lock, flags); | |
| 287 | 293 | WREG32(RS480_NB_MC_INDEX, ((reg) & 0xff) | RS480_NB_MC_IND_WR_EN); |
| 288 | 294 | WREG32(RS480_NB_MC_DATA, (v)); |
| 289 | 295 | WREG32(RS480_NB_MC_INDEX, 0xff); |
| 296 | + spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); | |
| 290 | 297 | } |
| 291 | 298 | |
| 292 | 299 | #if defined(CONFIG_DEBUG_FS) |
| @@ -847,16 +847,26 @@ void rs600_bandwidth_update(struct radeon_device *rdev) · 846 unmodified lines | ||
| 847 | 847 | |
| 848 | 848 | uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg) |
| 849 | 849 | { |
| 850 | + unsigned long flags; | |
| 851 | + u32 r; | |
| 852 | + | |
| 853 | + spin_lock_irqsave(&rdev->mc_idx_lock, flags); | |
| 850 | 854 | WREG32(R_000070_MC_IND_INDEX, S_000070_MC_IND_ADDR(reg) | |
| 851 | 855 | S_000070_MC_IND_CITF_ARB0(1)); |
| 852 | − return RREG32(R_000074_MC_IND_DATA); | |
| 856 | + r = RREG32(R_000074_MC_IND_DATA); | |
| 857 | + spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); | |
| 858 | + return r; | |
| 853 | 859 | } |
| 854 | 860 | |
| 855 | 861 | void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) |
| 856 | 862 | { |
| 863 | + unsigned long flags; | |
| 864 | + | |
| 865 | + spin_lock_irqsave(&rdev->mc_idx_lock, flags); | |
| 857 | 866 | WREG32(R_000070_MC_IND_INDEX, S_000070_MC_IND_ADDR(reg) | |
| 858 | 867 | S_000070_MC_IND_CITF_ARB0(1) | S_000070_MC_IND_WR_EN(1)); |
| 859 | 868 | WREG32(R_000074_MC_IND_DATA, v); |
| 869 | + spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); | |
| 860 | 870 | } |
| 861 | 871 | |
| 862 | 872 | static void rs600_debugfs(struct radeon_device *rdev) |
| @@ -631,20 +631,27 @@ void rs690_bandwidth_update(struct radeon_device *rdev) · 630 unmodified lines | ||
| 631 | 631 | |
| 632 | 632 | uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg) |
| 633 | 633 | { |
| 634 | + unsigned long flags; | |
| 634 | 635 | uint32_t r; |
| 635 | 636 | |
| 637 | + spin_lock_irqsave(&rdev->mc_idx_lock, flags); | |
| 636 | 638 | WREG32(R_000078_MC_INDEX, S_000078_MC_IND_ADDR(reg)); |
| 637 | 639 | r = RREG32(R_00007C_MC_DATA); |
| 638 | 640 | WREG32(R_000078_MC_INDEX, ~C_000078_MC_IND_ADDR); |
| 641 | + spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); | |
| 639 | 642 | return r; |
| 640 | 643 | } |
| 641 | 644 | |
| 642 | 645 | void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) |
| 643 | 646 | { |
| 647 | + unsigned long flags; | |
| 648 | + | |
| 649 | + spin_lock_irqsave(&rdev->mc_idx_lock, flags); | |
| 644 | 650 | WREG32(R_000078_MC_INDEX, S_000078_MC_IND_ADDR(reg) | |
| 645 | 651 | S_000078_MC_IND_WR_EN(1)); |
| 646 | 652 | WREG32(R_00007C_MC_DATA, v); |
| 647 | 653 | WREG32(R_000078_MC_INDEX, 0x7F); |
| 654 | + spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); | |
| 648 | 655 | } |
| 649 | 656 | |
| 650 | 657 | static void rs690_mc_program(struct radeon_device *rdev) |
| @@ -62,9 +62,7 @@ static void rs780_get_pm_mode_parameters(struct radeon_device *rdev) · 61 unmodified lines | ||
| 62 | 62 | radeon_crtc = to_radeon_crtc(crtc); |
| 63 | 63 | pi->crtc_id = radeon_crtc->crtc_id; |
| 64 | 64 | if (crtc->mode.htotal && crtc->mode.vtotal) |
| 65 | − pi->refresh_rate = | |
| 66 | − (crtc->mode.clock * 1000) / | |
| 67 | − (crtc->mode.htotal * crtc->mode.vtotal); | |
| 65 | + pi->refresh_rate = drm_mode_vrefresh(&crtc->mode); | |
| 68 | 66 | break; |
| 69 | 67 | } |
| 70 | 68 | } |
| @@ -376,9 +374,8 @@ static void rs780_disable_vbios_powersaving(struct radeon_device *rdev) · 305 unmodified lines | ||
| 376 | 374 | WREG32_P(CG_INTGFX_MISC, 0, ~0xFFF00000); |
| 377 | 375 | } |
| 378 | 376 | |
| 379 | −static void rs780_force_voltage_to_high(struct radeon_device *rdev) | |
| 377 | +static void rs780_force_voltage(struct radeon_device *rdev, u16 voltage) | |
| 380 | 378 | { |
| 381 | − struct igp_power_info *pi = rs780_get_pi(rdev); | |
| 382 | 379 | struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); |
| 383 | 380 | |
| 384 | 381 | if ((current_state->max_voltage == RS780_VDDC_LEVEL_HIGH) && |
| @@ -390,7 +387,7 @@ static void rs780_force_voltage_to_high(struct radeon_device *rdev) · 5 unmodified lines | ||
| 390 | 387 | udelay(1); |
| 391 | 388 | |
| 392 | 389 | WREG32_P(FVTHROT_PWM_CTRL_REG0, |
| 393 | − STARTING_PWM_HIGHTIME(pi->max_voltage), | |
| 390 | + STARTING_PWM_HIGHTIME(voltage), | |
| 394 | 391 | ~STARTING_PWM_HIGHTIME_MASK); |
| 395 | 392 | |
| 396 | 393 | WREG32_P(FVTHROT_PWM_CTRL_REG0, |
| @@ -404,6 +401,26 @@ static void rs780_force_voltage_to_high(struct radeon_device *rdev) · 7 unmodified lines | ||
| 404 | 401 | WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~SPLL_BYPASS_CNTL); |
| 405 | 402 | } |
| 406 | 403 | |
| 404 | +static void rs780_force_fbdiv(struct radeon_device *rdev, u32 fb_div) | |
| 405 | +{ | |
| 406 | + struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); | |
| 407 | + | |
| 408 | + if (current_state->sclk_low == current_state->sclk_high) | |
| 409 | + return; | |
| 410 | + | |
| 411 | + WREG32_P(GFX_MACRO_BYPASS_CNTL, SPLL_BYPASS_CNTL, ~SPLL_BYPASS_CNTL); | |
| 412 | + | |
| 413 | + WREG32_P(FVTHROT_FBDIV_REG2, FORCED_FEEDBACK_DIV(fb_div), | |
| 414 | + ~FORCED_FEEDBACK_DIV_MASK); | |
| 415 | + WREG32_P(FVTHROT_FBDIV_REG1, STARTING_FEEDBACK_DIV(fb_div), | |
| 416 | + ~STARTING_FEEDBACK_DIV_MASK); | |
| 417 | + WREG32_P(FVTHROT_FBDIV_REG1, FORCE_FEEDBACK_DIV, ~FORCE_FEEDBACK_DIV); | |
| 418 | + | |
| 419 | + udelay(100); | |
| 420 | + | |
| 421 | + WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~SPLL_BYPASS_CNTL); | |
| 422 | +} | |
| 423 | + | |
| 407 | 424 | static int rs780_set_engine_clock_scaling(struct radeon_device *rdev, |
| 408 | 425 | struct radeon_ps *new_ps, |
| 409 | 426 | struct radeon_ps *old_ps) |
| @@ -432,17 +449,13 @@ static int rs780_set_engine_clock_scaling(struct radeon_device *rdev, · 22 unmodified lines | ||
| 432 | 449 | if (ret) |
| 433 | 450 | return ret; |
| 434 | 451 | |
| 435 | − WREG32_P(GFX_MACRO_BYPASS_CNTL, SPLL_BYPASS_CNTL, ~SPLL_BYPASS_CNTL); | |
| 436 | − | |
| 437 | − WREG32_P(FVTHROT_FBDIV_REG2, FORCED_FEEDBACK_DIV(max_dividers.fb_div), | |
| 438 | − ~FORCED_FEEDBACK_DIV_MASK); | |
| 439 | − WREG32_P(FVTHROT_FBDIV_REG1, STARTING_FEEDBACK_DIV(max_dividers.fb_div), | |
| 440 | − ~STARTING_FEEDBACK_DIV_MASK); | |
| 441 | − WREG32_P(FVTHROT_FBDIV_REG1, FORCE_FEEDBACK_DIV, ~FORCE_FEEDBACK_DIV); | |
| 442 | − | |
| 443 | − udelay(100); | |
| 452 | + if ((min_dividers.ref_div != max_dividers.ref_div) || | |
| 453 | + (min_dividers.post_div != max_dividers.post_div) || | |
| 454 | + (max_dividers.ref_div != current_max_dividers.ref_div) || | |
| 455 | + (max_dividers.post_div != current_max_dividers.post_div)) | |
| 456 | + return -EINVAL; | |
| 444 | 457 | |
| 445 | − WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~SPLL_BYPASS_CNTL); | |
| 458 | + rs780_force_fbdiv(rdev, max_dividers.fb_div); | |
| 446 | 459 | |
| 447 | 460 | if (max_dividers.fb_div > min_dividers.fb_div) { |
| 448 | 461 | WREG32_P(FVTHROT_FBDIV_REG0, |
| @@ -486,6 +499,9 @@ static void rs780_activate_engine_clk_scaling(struct radeon_device *rdev, · 37 unmodified lines | ||
| 486 | 499 | (new_state->sclk_low == old_state->sclk_low)) |
| 487 | 500 | return; |
| 488 | 501 | |
| 502 | + if (new_state->sclk_high == new_state->sclk_low) | |
| 503 | + return; | |
| 504 | + | |
| 489 | 505 | rs780_clk_scaling_enable(rdev, true); |
| 490 | 506 | } |
| 491 | 507 | |
| @@ -649,7 +665,7 @@ int rs780_dpm_set_power_state(struct radeon_device *rdev) · 157 unmodified lines | ||
| 649 | 665 | rs780_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); |
| 650 | 666 | |
| 651 | 667 | if (pi->voltage_control) { |
| 652 | − rs780_force_voltage_to_high(rdev); | |
| 668 | + rs780_force_voltage(rdev, pi->max_voltage); | |
| 653 | 669 | mdelay(5); |
| 654 | 670 | } |
| 655 | 671 | |
| @@ -717,14 +733,18 @@ static void rs780_parse_pplib_non_clock_info(struct radeon_device *rdev, · 61 unmodified lines | ||
| 717 | 733 | if (ATOM_PPLIB_NONCLOCKINFO_VER1 < table_rev) { |
| 718 | 734 | rps->vclk = le32_to_cpu(non_clock_info->ulVCLK); |
| 719 | 735 | rps->dclk = le32_to_cpu(non_clock_info->ulDCLK); |
| 720 | − } else if (r600_is_uvd_state(rps->class, rps->class2)) { | |
| 721 | − rps->vclk = RS780_DEFAULT_VCLK_FREQ; | |
| 722 | − rps->dclk = RS780_DEFAULT_DCLK_FREQ; | |
| 723 | 736 | } else { |
| 724 | 737 | rps->vclk = 0; |
| 725 | 738 | rps->dclk = 0; |
| 726 | 739 | } |
| 727 | 740 | |
| 741 | + if (r600_is_uvd_state(rps->class, rps->class2)) { | |
| 742 | + if ((rps->vclk == 0) || (rps->dclk == 0)) { | |
| 743 | + rps->vclk = RS780_DEFAULT_VCLK_FREQ; | |
| 744 | + rps->dclk = RS780_DEFAULT_DCLK_FREQ; | |
| 745 | + } | |
| 746 | + } | |
| 747 | + | |
| 728 | 748 | if (rps->class & ATOM_PPLIB_CLASSIFICATION_BOOT) |
| 729 | 749 | rdev->pm.dpm.boot_ps = rps; |
| 730 | 750 | if (rps->class & ATOM_PPLIB_CLASSIFICATION_UVDSTATE) |
| @@ -986,3 +1006,55 @@ void rs780_dpm_debugfs_print_current_performance_level(struct radeon_device *rde · 255 unmodified lines | ||
| 986 | 1006 | seq_printf(m, "power level 1 sclk: %u vddc_index: %d\n", |
| 987 | 1007 | ps->sclk_high, ps->max_voltage); |
| 988 | 1008 | } |
| 1009 | + | |
| 1010 | +int rs780_dpm_force_performance_level(struct radeon_device *rdev, | |
| 1011 | + enum radeon_dpm_forced_level level) | |
| 1012 | +{ | |
| 1013 | + struct igp_power_info *pi = rs780_get_pi(rdev); | |
| 1014 | + struct radeon_ps *rps = rdev->pm.dpm.current_ps; | |
| 1015 | + struct igp_ps *ps = rs780_get_ps(rps); | |
| 1016 | + struct atom_clock_dividers dividers; | |
| 1017 | + int ret; | |
| 1018 | + | |
| 1019 | + rs780_clk_scaling_enable(rdev, false); | |
| 1020 | + rs780_voltage_scaling_enable(rdev, false); | |
| 1021 | + | |
| 1022 | + if (level == RADEON_DPM_FORCED_LEVEL_HIGH) { | |
| 1023 | + if (pi->voltage_control) | |
| 1024 | + rs780_force_voltage(rdev, pi->max_voltage); | |
| 1025 | + | |
| 1026 | + ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, | |
| 1027 | + ps->sclk_high, false, ÷rs); | |
| 1028 | + if (ret) | |
| 1029 | + return ret; | |
| 1030 | + | |
| 1031 | + rs780_force_fbdiv(rdev, dividers.fb_div); | |
| 1032 | + } else if (level == RADEON_DPM_FORCED_LEVEL_LOW) { | |
| 1033 | + ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, | |
| 1034 | + ps->sclk_low, false, ÷rs); | |
| 1035 | + if (ret) | |
| 1036 | + return ret; | |
| 1037 | + | |
| 1038 | + rs780_force_fbdiv(rdev, dividers.fb_div); | |
| 1039 | + | |
| 1040 | + if (pi->voltage_control) | |
| 1041 | + rs780_force_voltage(rdev, pi->min_voltage); | |
| 1042 | + } else { | |
| 1043 | + if (pi->voltage_control) | |
| 1044 | + rs780_force_voltage(rdev, pi->max_voltage); | |
| 1045 | + | |
| 1046 | + if (ps->sclk_high != ps->sclk_low) { | |
| 1047 | + WREG32_P(FVTHROT_FBDIV_REG1, 0, ~FORCE_FEEDBACK_DIV); | |
| 1048 | + rs780_clk_scaling_enable(rdev, true); | |
| 1049 | + } | |
| 1050 | + | |
| 1051 | + if (pi->voltage_control) { | |
| 1052 | + rs780_voltage_scaling_enable(rdev, true); | |
| 1053 | + rs780_enable_voltage_scaling(rdev, rps); | |
| 1054 | + } | |
| 1055 | + } | |
| 1056 | + | |
| 1057 | + rdev->pm.dpm.forced_level = level; | |
| 1058 | + | |
| 1059 | + return 0; | |
| 1060 | +} | |
| @@ -209,19 +209,27 @@ static void rv515_mc_init(struct radeon_device *rdev) · 208 unmodified lines | ||
| 209 | 209 | |
| 210 | 210 | uint32_t rv515_mc_rreg(struct radeon_device *rdev, uint32_t reg) |
| 211 | 211 | { |
| 212 | + unsigned long flags; | |
| 212 | 213 | uint32_t r; |
| 213 | 214 | |
| 215 | + spin_lock_irqsave(&rdev->mc_idx_lock, flags); | |
| 214 | 216 | WREG32(MC_IND_INDEX, 0x7f0000 | (reg & 0xffff)); |
| 215 | 217 | r = RREG32(MC_IND_DATA); |
| 216 | 218 | WREG32(MC_IND_INDEX, 0); |
| 219 | + spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); | |
| 220 | + | |
| 217 | 221 | return r; |
| 218 | 222 | } |
| 219 | 223 | |
| 220 | 224 | void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) |
| 221 | 225 | { |
| 226 | + unsigned long flags; | |
| 227 | + | |
| 228 | + spin_lock_irqsave(&rdev->mc_idx_lock, flags); | |
| 222 | 229 | WREG32(MC_IND_INDEX, 0xff0000 | ((reg) & 0xffff)); |
| 223 | 230 | WREG32(MC_IND_DATA, (v)); |
| 224 | 231 | WREG32(MC_IND_INDEX, 0); |
| 232 | + spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); | |
| 225 | 233 | } |
| 226 | 234 | |
| 227 | 235 | #if defined(CONFIG_DEBUG_FS) |
| @@ -1758,8 +1758,6 @@ int rv6xx_dpm_set_power_state(struct radeon_device *rdev) · 1757 unmodified lines | ||
| 1758 | 1758 | |
| 1759 | 1759 | rv6xx_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); |
| 1760 | 1760 | |
| 1761 | − rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO; | |
| 1762 | − | |
| 1763 | 1761 | return 0; |
| 1764 | 1762 | } |
| 1765 | 1763 | |
| @@ -2064,12 +2064,6 @@ int rv770_dpm_set_power_state(struct radeon_device *rdev) · 2063 unmodified lines | ||
| 2064 | 2064 | rv770_program_dcodt_after_state_switch(rdev, new_ps, old_ps); |
| 2065 | 2065 | rv770_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); |
| 2066 | 2066 | |
| 2067 | − ret = rv770_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO); | |
| 2068 | − if (ret) { | |
| 2069 | − DRM_ERROR("rv770_dpm_force_performance_level failed\n"); | |
| 2070 | − return ret; | |
| 2071 | − } | |
| 2072 | − | |
| 2073 | 2067 | return 0; |
| 2074 | 2068 | } |
| 2075 | 2069 | |
| @@ -2147,14 +2141,18 @@ static void rv7xx_parse_pplib_non_clock_info(struct radeon_device *rdev, · 71 unmodified lines | ||
| 2147 | 2141 | if (ATOM_PPLIB_NONCLOCKINFO_VER1 < table_rev) { |
| 2148 | 2142 | rps->vclk = le32_to_cpu(non_clock_info->ulVCLK); |
| 2149 | 2143 | rps->dclk = le32_to_cpu(non_clock_info->ulDCLK); |
| 2150 | − } else if (r600_is_uvd_state(rps->class, rps->class2)) { | |
| 2151 | − rps->vclk = RV770_DEFAULT_VCLK_FREQ; | |
| 2152 | − rps->dclk = RV770_DEFAULT_DCLK_FREQ; | |
| 2153 | 2144 | } else { |
| 2154 | 2145 | rps->vclk = 0; |
| 2155 | 2146 | rps->dclk = 0; |
| 2156 | 2147 | } |
| 2157 | 2148 | |
| 2149 | + if (r600_is_uvd_state(rps->class, rps->class2)) { | |
| 2150 | + if ((rps->vclk == 0) || (rps->dclk == 0)) { | |
| 2151 | + rps->vclk = RV770_DEFAULT_VCLK_FREQ; | |
| 2152 | + rps->dclk = RV770_DEFAULT_DCLK_FREQ; | |
| 2153 | + } | |
| 2154 | + } | |
| 2155 | + | |
| 2158 | 2156 | if (rps->class & ATOM_PPLIB_CLASSIFICATION_BOOT) |
| 2159 | 2157 | rdev->pm.dpm.boot_ps = rps; |
| 2160 | 2158 | if (rps->class & ATOM_PPLIB_CLASSIFICATION_UVDSTATE) |
| @@ -274,8 +274,8 @@ static const u8 cayman_smc_int_vectors[] = · 273 unmodified lines | ||
| 274 | 274 | 0x08, 0x72, 0x08, 0x72 |
| 275 | 275 | }; |
| 276 | 276 | |
| 277 | −int rv770_set_smc_sram_address(struct radeon_device *rdev, | |
| 278 | − u16 smc_address, u16 limit) | |
| 277 | +static int rv770_set_smc_sram_address(struct radeon_device *rdev, | |
| 278 | + u16 smc_address, u16 limit) | |
| 279 | 279 | { |
| 280 | 280 | u32 addr; |
| 281 | 281 | |
| @@ -296,9 +296,10 @@ int rv770_copy_bytes_to_smc(struct radeon_device *rdev, · 14 unmodified lines | ||
| 296 | 296 | u16 smc_start_address, const u8 *src, |
| 297 | 297 | u16 byte_count, u16 limit) |
| 298 | 298 | { |
| 299 | + unsigned long flags; | |
| 299 | 300 | u32 data, original_data, extra_shift; |
| 300 | 301 | u16 addr; |
| 301 | − int ret; | |
| 302 | + int ret = 0; | |
| 302 | 303 | |
| 303 | 304 | if (smc_start_address & 3) |
| 304 | 305 | return -EINVAL; |
| @@ -307,13 +308,14 @@ int rv770_copy_bytes_to_smc(struct radeon_device *rdev, · 2 unmodified lines | ||
| 307 | 308 | |
| 308 | 309 | addr = smc_start_address; |
| 309 | 310 | |
| 311 | + spin_lock_irqsave(&rdev->smc_idx_lock, flags); | |
| 310 | 312 | while (byte_count >= 4) { |
| 311 | 313 | /* SMC address space is BE */ |
| 312 | 314 | data = (src[0] << 24) | (src[1] << 16) | (src[2] << 8) | src[3]; |
| 313 | 315 | |
| 314 | 316 | ret = rv770_set_smc_sram_address(rdev, addr, limit); |
| 315 | 317 | if (ret) |
| 316 | − return ret; | |
| 318 | + goto done; | |
| 317 | 319 | |
| 318 | 320 | WREG32(SMC_SRAM_DATA, data); |
| 319 | 321 | |
| @@ -328,7 +330,7 @@ int rv770_copy_bytes_to_smc(struct radeon_device *rdev, · 8 unmodified lines | ||
| 328 | 330 | |
| 329 | 331 | ret = rv770_set_smc_sram_address(rdev, addr, limit); |
| 330 | 332 | if (ret) |
| 331 | − return ret; | |
| 333 | + goto done; | |
| 332 | 334 | |
| 333 | 335 | original_data = RREG32(SMC_SRAM_DATA); |
| 334 | 336 | |
| @@ -346,12 +348,15 @@ int rv770_copy_bytes_to_smc(struct radeon_device *rdev, · 11 unmodified lines | ||
| 346 | 348 | |
| 347 | 349 | ret = rv770_set_smc_sram_address(rdev, addr, limit); |
| 348 | 350 | if (ret) |
| 349 | − return ret; | |
| 351 | + goto done; | |
| 350 | 352 | |
| 351 | 353 | WREG32(SMC_SRAM_DATA, data); |
| 352 | 354 | } |
| 353 | 355 | |
| 354 | − return 0; | |
| 356 | +done: | |
| 357 | + spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); | |
| 358 | + | |
| 359 | + return ret; | |
| 355 | 360 | } |
| 356 | 361 | |
| 357 | 362 | static int rv770_program_interrupt_vectors(struct radeon_device *rdev, |
| @@ -461,12 +466,15 @@ PPSMC_Result rv770_wait_for_smc_inactive(struct radeon_device *rdev) · 103 unmodified lines | ||
| 461 | 466 | |
| 462 | 467 | static void rv770_clear_smc_sram(struct radeon_device *rdev, u16 limit) |
| 463 | 468 | { |
| 469 | + unsigned long flags; | |
| 464 | 470 | u16 i; |
| 465 | 471 | |
| 472 | + spin_lock_irqsave(&rdev->smc_idx_lock, flags); | |
| 466 | 473 | for (i = 0; i < limit; i += 4) { |
| 467 | 474 | rv770_set_smc_sram_address(rdev, i, limit); |
| 468 | 475 | WREG32(SMC_SRAM_DATA, 0); |
| 469 | 476 | } |
| 477 | + spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); | |
| 470 | 478 | } |
| 471 | 479 | |
| 472 | 480 | int rv770_load_smc_ucode(struct radeon_device *rdev, |
| @@ -595,27 +603,29 @@ int rv770_load_smc_ucode(struct radeon_device *rdev, · 122 unmodified lines | ||
| 595 | 603 | int rv770_read_smc_sram_dword(struct radeon_device *rdev, |
| 596 | 604 | u16 smc_address, u32 *value, u16 limit) |
| 597 | 605 | { |
| 606 | + unsigned long flags; | |
| 598 | 607 | int ret; |
| 599 | 608 | |
| 609 | + spin_lock_irqsave(&rdev->smc_idx_lock, flags); | |
| 600 | 610 | ret = rv770_set_smc_sram_address(rdev, smc_address, limit); |
| 601 | − if (ret) | |
| 602 | − return ret; | |
| 603 | − | |
| 604 | − *value = RREG32(SMC_SRAM_DATA); | |
| 611 | + if (ret == 0) | |
| 612 | + *value = RREG32(SMC_SRAM_DATA); | |
| 613 | + spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); | |
| 605 | 614 | |
| 606 | − return 0; | |
| 615 | + return ret; | |
| 607 | 616 | } |
| 608 | 617 | |
| 609 | 618 | int rv770_write_smc_sram_dword(struct radeon_device *rdev, |
| 610 | 619 | u16 smc_address, u32 value, u16 limit) |
| 611 | 620 | { |
| 621 | + unsigned long flags; | |
| 612 | 622 | int ret; |
| 613 | 623 | |
| 624 | + spin_lock_irqsave(&rdev->smc_idx_lock, flags); | |
| 614 | 625 | ret = rv770_set_smc_sram_address(rdev, smc_address, limit); |
| 615 | − if (ret) | |
| 616 | − return ret; | |
| 626 | + if (ret == 0) | |
| 627 | + WREG32(SMC_SRAM_DATA, value); | |
| 628 | + spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); | |
| 617 | 629 | |
| 618 | − WREG32(SMC_SRAM_DATA, value); | |
| 619 | − | |
| 620 | − return 0; | |
| 630 | + return ret; | |
| 621 | 631 | } |
| @@ -187,8 +187,6 @@ typedef struct RV770_SMC_STATETABLE RV770_SMC_STATETABLE; · 186 unmodified lines | ||
| 187 | 187 | #define RV770_SMC_SOFT_REGISTER_uvd_enabled 0x9C |
| 188 | 188 | #define RV770_SMC_SOFT_REGISTER_is_asic_lombok 0xA0 |
| 189 | 189 | |
| 190 | −int rv770_set_smc_sram_address(struct radeon_device *rdev, | |
| 191 | − u16 smc_address, u16 limit); | |
| 192 | 190 | int rv770_copy_bytes_to_smc(struct radeon_device *rdev, |
| 193 | 191 | u16 smc_start_address, const u8 *src, |
| 194 | 192 | u16 byte_count, u16 limit); |
| @@ -852,7 +852,7 @@ · 851 unmodified lines | ||
| 852 | 852 | #define AFMT_VBI_PACKET_CONTROL 0x7608 |
| 853 | 853 | # define AFMT_GENERIC0_UPDATE (1 << 2) |
| 854 | 854 | #define AFMT_INFOFRAME_CONTROL0 0x760c |
| 855 | −# define AFMT_AUDIO_INFO_SOURCE (1 << 6) /* 0 - sound block; 1 - hmdi regs */ | |
| 855 | +# define AFMT_AUDIO_INFO_SOURCE (1 << 6) /* 0 - sound block; 1 - hdmi regs */ | |
| 856 | 856 | # define AFMT_AUDIO_INFO_UPDATE (1 << 7) |
| 857 | 857 | # define AFMT_MPEG_INFO_UPDATE (1 << 10) |
| 858 | 858 | #define AFMT_GENERIC0_7 0x7610 |
| @@ -83,6 +83,8 @@ extern void si_dma_vm_set_page(struct radeon_device *rdev, · 82 unmodified lines | ||
| 83 | 83 | uint64_t pe, |
| 84 | 84 | uint64_t addr, unsigned count, |
| 85 | 85 | uint32_t incr, uint32_t flags); |
| 86 | +static void si_enable_gui_idle_interrupt(struct radeon_device *rdev, | |
| 87 | + bool enable); | |
| 86 | 88 | |
| 87 | 89 | static const u32 verde_rlc_save_restore_register_list[] = |
| 88 | 90 | { |
| @@ -3386,6 +3388,8 @@ static int si_cp_resume(struct radeon_device *rdev) · 3297 unmodified lines | ||
| 3386 | 3388 | u32 rb_bufsz; |
| 3387 | 3389 | int r; |
| 3388 | 3390 | |
| 3391 | + si_enable_gui_idle_interrupt(rdev, false); | |
| 3392 | + | |
| 3389 | 3393 | WREG32(CP_SEM_WAIT_TIMER, 0x0); |
| 3390 | 3394 | WREG32(CP_SEM_INCOMPLETE_TIMER_CNTL, 0x0); |
| 3391 | 3395 | |
| @@ -3501,6 +3505,8 @@ static int si_cp_resume(struct radeon_device *rdev) · 109 unmodified lines | ||
| 3501 | 3505 | rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = false; |
| 3502 | 3506 | } |
| 3503 | 3507 | |
| 3508 | + si_enable_gui_idle_interrupt(rdev, true); | |
| 3509 | + | |
| 3504 | 3510 | return 0; |
| 3505 | 3511 | } |
| 3506 | 3512 | |
| @@ -4888,7 +4894,7 @@ static void si_enable_gfx_cgpg(struct radeon_device *rdev, · 1381 unmodified lines | ||
| 4888 | 4894 | { |
| 4889 | 4895 | u32 tmp; |
| 4890 | 4896 | |
| 4891 | − if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_CG)) { | |
| 4897 | + if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG)) { | |
| 4892 | 4898 | tmp = RLC_PUD(0x10) | RLC_PDD(0x10) | RLC_TTPD(0x10) | RLC_MSD(0x10); |
| 4893 | 4899 | WREG32(RLC_TTOP_D, tmp); |
| 4894 | 4900 | |
| @@ -5250,6 +5256,7 @@ void si_update_cg(struct radeon_device *rdev, · 355 unmodified lines | ||
| 5250 | 5256 | u32 block, bool enable) |
| 5251 | 5257 | { |
| 5252 | 5258 | if (block & RADEON_CG_BLOCK_GFX) { |
| 5259 | + si_enable_gui_idle_interrupt(rdev, false); | |
| 5253 | 5260 | /* order matters! */ |
| 5254 | 5261 | if (enable) { |
| 5255 | 5262 | si_enable_mgcg(rdev, true); |
| @@ -5258,6 +5265,7 @@ void si_update_cg(struct radeon_device *rdev, · 2 unmodified lines | ||
| 5258 | 5265 | si_enable_cgcg(rdev, false); |
| 5259 | 5266 | si_enable_mgcg(rdev, false); |
| 5260 | 5267 | } |
| 5268 | + si_enable_gui_idle_interrupt(rdev, true); | |
| 5261 | 5269 | } |
| 5262 | 5270 | |
| 5263 | 5271 | if (block & RADEON_CG_BLOCK_MC) { |
| @@ -5408,7 +5416,7 @@ static void si_init_pg(struct radeon_device *rdev) · 144 unmodified lines | ||
| 5408 | 5416 | si_init_dma_pg(rdev); |
| 5409 | 5417 | } |
| 5410 | 5418 | si_init_ao_cu_mask(rdev); |
| 5411 | − if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_CG) { | |
| 5419 | + if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG) { | |
| 5412 | 5420 | si_init_gfx_cgpg(rdev); |
| 5413 | 5421 | } |
| 5414 | 5422 | si_enable_dma_pg(rdev, true); |
| @@ -5560,7 +5568,9 @@ static void si_disable_interrupt_state(struct radeon_device *rdev) · 145 unmodified lines | ||
| 5560 | 5568 | { |
| 5561 | 5569 | u32 tmp; |
| 5562 | 5570 | |
| 5563 | − WREG32(CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); | |
| 5571 | + tmp = RREG32(CP_INT_CNTL_RING0) & | |
| 5572 | + (CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); | |
| 5573 | + WREG32(CP_INT_CNTL_RING0, tmp); | |
| 5564 | 5574 | WREG32(CP_INT_CNTL_RING1, 0); |
| 5565 | 5575 | WREG32(CP_INT_CNTL_RING2, 0); |
| 5566 | 5576 | tmp = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; |
| @@ -5685,7 +5695,7 @@ static int si_irq_init(struct radeon_device *rdev) · 118 unmodified lines | ||
| 5685 | 5695 | |
| 5686 | 5696 | int si_irq_set(struct radeon_device *rdev) |
| 5687 | 5697 | { |
| 5688 | − u32 cp_int_cntl = CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE; | |
| 5698 | + u32 cp_int_cntl; | |
| 5689 | 5699 | u32 cp_int_cntl1 = 0, cp_int_cntl2 = 0; |
| 5690 | 5700 | u32 crtc1 = 0, crtc2 = 0, crtc3 = 0, crtc4 = 0, crtc5 = 0, crtc6 = 0; |
| 5691 | 5701 | u32 hpd1 = 0, hpd2 = 0, hpd3 = 0, hpd4 = 0, hpd5 = 0, hpd6 = 0; |
| @@ -5706,6 +5716,9 @@ int si_irq_set(struct radeon_device *rdev) · 14 unmodified lines | ||
| 5706 | 5716 | return 0; |
| 5707 | 5717 | } |
| 5708 | 5718 | |
| 5719 | + cp_int_cntl = RREG32(CP_INT_CNTL_RING0) & | |
| 5720 | + (CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); | |
| 5721 | + | |
| 5709 | 5722 | if (!ASIC_IS_NODCE(rdev)) { |
| 5710 | 5723 | hpd1 = RREG32(DC_HPD1_INT_CONTROL) & ~DC_HPDx_INT_EN; |
| 5711 | 5724 | hpd2 = RREG32(DC_HPD2_INT_CONTROL) & ~DC_HPDx_INT_EN; |
| @@ -2910,6 +2910,7 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev, · 2909 unmodified lines | ||
| 2910 | 2910 | bool disable_sclk_switching = false; |
| 2911 | 2911 | u32 mclk, sclk; |
| 2912 | 2912 | u16 vddc, vddci; |
| 2913 | + u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc; | |
| 2913 | 2914 | int i; |
| 2914 | 2915 | |
| 2915 | 2916 | if ((rdev->pm.dpm.new_active_crtc_count > 1) || |
| @@ -2943,6 +2944,29 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev, · 27 unmodified lines | ||
| 2943 | 2944 | } |
| 2944 | 2945 | } |
| 2945 | 2946 | |
| 2947 | + /* limit clocks to max supported clocks based on voltage dependency tables */ | |
| 2948 | + btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, | |
| 2949 | + &max_sclk_vddc); | |
| 2950 | + btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, | |
| 2951 | + &max_mclk_vddci); | |
| 2952 | + btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, | |
| 2953 | + &max_mclk_vddc); | |
| 2954 | + | |
| 2955 | + for (i = 0; i < ps->performance_level_count; i++) { | |
| 2956 | + if (max_sclk_vddc) { | |
| 2957 | + if (ps->performance_levels[i].sclk > max_sclk_vddc) | |
| 2958 | + ps->performance_levels[i].sclk = max_sclk_vddc; | |
| 2959 | + } | |
| 2960 | + if (max_mclk_vddci) { | |
| 2961 | + if (ps->performance_levels[i].mclk > max_mclk_vddci) | |
| 2962 | + ps->performance_levels[i].mclk = max_mclk_vddci; | |
| 2963 | + } | |
| 2964 | + if (max_mclk_vddc) { | |
| 2965 | + if (ps->performance_levels[i].mclk > max_mclk_vddc) | |
| 2966 | + ps->performance_levels[i].mclk = max_mclk_vddc; | |
| 2967 | + } | |
| 2968 | + } | |
| 2969 | + | |
| 2946 | 2970 | /* XXX validate the min clocks required for display */ |
| 2947 | 2971 | |
| 2948 | 2972 | if (disable_mclk_switching) { |
| @@ -6075,12 +6099,6 @@ int si_dpm_set_power_state(struct radeon_device *rdev) · 3126 unmodified lines | ||
| 6075 | 6099 | return ret; |
| 6076 | 6100 | } |
| 6077 | 6101 | |
| 6078 | − ret = si_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO); | |
| 6079 | − if (ret) { | |
| 6080 | − DRM_ERROR("si_dpm_force_performance_level failed\n"); | |
| 6081 | − return ret; | |
| 6082 | − } | |
| 6083 | − | |
| 6084 | 6102 | si_update_cg(rdev, (RADEON_CG_BLOCK_GFX | |
| 6085 | 6103 | RADEON_CG_BLOCK_MC | |
| 6086 | 6104 | RADEON_CG_BLOCK_SDMA | |
| @@ -29,8 +29,8 @@ · 28 unmodified lines | ||
| 29 | 29 | #include "ppsmc.h" |
| 30 | 30 | #include "radeon_ucode.h" |
| 31 | 31 | |
| 32 | −int si_set_smc_sram_address(struct radeon_device *rdev, | |
| 33 | − u32 smc_address, u32 limit) | |
| 32 | +static int si_set_smc_sram_address(struct radeon_device *rdev, | |
| 33 | + u32 smc_address, u32 limit) | |
| 34 | 34 | { |
| 35 | 35 | if (smc_address & 3) |
| 36 | 36 | return -EINVAL; |
| @@ -47,7 +47,8 @@ int si_copy_bytes_to_smc(struct radeon_device *rdev, · 10 unmodified lines | ||
| 47 | 47 | u32 smc_start_address, |
| 48 | 48 | const u8 *src, u32 byte_count, u32 limit) |
| 49 | 49 | { |
| 50 | − int ret; | |
| 50 | + unsigned long flags; | |
| 51 | + int ret = 0; | |
| 51 | 52 | u32 data, original_data, addr, extra_shift; |
| 52 | 53 | |
| 53 | 54 | if (smc_start_address & 3) |
| @@ -57,13 +58,14 @@ int si_copy_bytes_to_smc(struct radeon_device *rdev, · 3 unmodified lines | ||
| 57 | 58 | |
| 58 | 59 | addr = smc_start_address; |
| 59 | 60 | |
| 61 | + spin_lock_irqsave(&rdev->smc_idx_lock, flags); | |
| 60 | 62 | while (byte_count >= 4) { |
| 61 | 63 | /* SMC address space is BE */ |
| 62 | 64 | data = (src[0] << 24) | (src[1] << 16) | (src[2] << 8) | src[3]; |
| 63 | 65 | |
| 64 | 66 | ret = si_set_smc_sram_address(rdev, addr, limit); |
| 65 | 67 | if (ret) |
| 66 | − return ret; | |
| 68 | + goto done; | |
| 67 | 69 | |
| 68 | 70 | WREG32(SMC_IND_DATA_0, data); |
| 69 | 71 | |
| @@ -78,7 +80,7 @@ int si_copy_bytes_to_smc(struct radeon_device *rdev, · 8 unmodified lines | ||
| 78 | 80 | |
| 79 | 81 | ret = si_set_smc_sram_address(rdev, addr, limit); |
| 80 | 82 | if (ret) |
| 81 | − return ret; | |
| 83 | + goto done; | |
| 82 | 84 | |
| 83 | 85 | original_data = RREG32(SMC_IND_DATA_0); |
| 84 | 86 | |
| @@ -96,11 +98,15 @@ int si_copy_bytes_to_smc(struct radeon_device *rdev, · 11 unmodified lines | ||
| 96 | 98 | |
| 97 | 99 | ret = si_set_smc_sram_address(rdev, addr, limit); |
| 98 | 100 | if (ret) |
| 99 | − return ret; | |
| 101 | + goto done; | |
| 100 | 102 | |
| 101 | 103 | WREG32(SMC_IND_DATA_0, data); |
| 102 | 104 | } |
| 103 | − return 0; | |
| 105 | + | |
| 106 | +done: | |
| 107 | + spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); | |
| 108 | + | |
| 109 | + return ret; | |
| 104 | 110 | } |
| 105 | 111 | |
| 106 | 112 | void si_start_smc(struct radeon_device *rdev) |
| @@ -203,6 +209,7 @@ PPSMC_Result si_wait_for_smc_inactive(struct radeon_device *rdev) · 96 unmodified lines | ||
| 203 | 209 | |
| 204 | 210 | int si_load_smc_ucode(struct radeon_device *rdev, u32 limit) |
| 205 | 211 | { |
| 212 | + unsigned long flags; | |
| 206 | 213 | u32 ucode_start_address; |
| 207 | 214 | u32 ucode_size; |
| 208 | 215 | const u8 *src; |
| @@ -241,6 +248,7 @@ int si_load_smc_ucode(struct radeon_device *rdev, u32 limit) · 32 unmodified lines | ||
| 241 | 248 | return -EINVAL; |
| 242 | 249 | |
| 243 | 250 | src = (const u8 *)rdev->smc_fw->data; |
| 251 | + spin_lock_irqsave(&rdev->smc_idx_lock, flags); | |
| 244 | 252 | WREG32(SMC_IND_INDEX_0, ucode_start_address); |
| 245 | 253 | WREG32_P(SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, ~AUTO_INCREMENT_IND_0); |
| 246 | 254 | while (ucode_size >= 4) { |
| @@ -253,6 +261,7 @@ int si_load_smc_ucode(struct radeon_device *rdev, u32 limit) · 6 unmodified lines | ||
| 253 | 261 | ucode_size -= 4; |
| 254 | 262 | } |
| 255 | 263 | WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); |
| 264 | + spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); | |
| 256 | 265 | |
| 257 | 266 | return 0; |
| 258 | 267 | } |
| @@ -260,25 +269,29 @@ int si_load_smc_ucode(struct radeon_device *rdev, u32 limit) · 1 unmodified line | ||
| 260 | 269 | int si_read_smc_sram_dword(struct radeon_device *rdev, u32 smc_address, |
| 261 | 270 | u32 *value, u32 limit) |
| 262 | 271 | { |
| 272 | + unsigned long flags; | |
| 263 | 273 | int ret; |
| 264 | 274 | |
| 275 | + spin_lock_irqsave(&rdev->smc_idx_lock, flags); | |
| 265 | 276 | ret = si_set_smc_sram_address(rdev, smc_address, limit); |
| 266 | − if (ret) | |
| 267 | − return ret; | |
| 277 | + if (ret == 0) | |
| 278 | + *value = RREG32(SMC_IND_DATA_0); | |
| 279 | + spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); | |
| 268 | 280 | |
| 269 | − *value = RREG32(SMC_IND_DATA_0); | |
| 270 | − return 0; | |
| 281 | + return ret; | |
| 271 | 282 | } |
| 272 | 283 | |
| 273 | 284 | int si_write_smc_sram_dword(struct radeon_device *rdev, u32 smc_address, |
| 274 | 285 | u32 value, u32 limit) |
| 275 | 286 | { |
| 287 | + unsigned long flags; | |
| 276 | 288 | int ret; |
| 277 | 289 | |
| 290 | + spin_lock_irqsave(&rdev->smc_idx_lock, flags); | |
| 278 | 291 | ret = si_set_smc_sram_address(rdev, smc_address, limit); |
| 279 | − if (ret) | |
| 280 | − return ret; | |
| 292 | + if (ret == 0) | |
| 293 | + WREG32(SMC_IND_DATA_0, value); | |
| 294 | + spin_unlock_irqrestore(&rdev->smc_idx_lock, flags); | |
| 281 | 295 | |
| 282 | − WREG32(SMC_IND_DATA_0, value); | |
| 283 | − return 0; | |
| 296 | + return ret; | |
| 284 | 297 | } |
| @@ -1319,8 +1319,6 @@ int sumo_dpm_set_power_state(struct radeon_device *rdev) · 1318 unmodified lines | ||
| 1319 | 1319 | if (pi->enable_dpm) |
| 1320 | 1320 | sumo_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); |
| 1321 | 1321 | |
| 1322 | − rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO; | |
| 1323 | − | |
| 1324 | 1322 | return 0; |
| 1325 | 1323 | } |
| 1326 | 1324 | |
| @@ -1068,6 +1068,17 @@ static void trinity_update_requested_ps(struct radeon_device *rdev, · 1067 unmodified lines | ||
| 1068 | 1068 | pi->requested_rps.ps_priv = &pi->requested_ps; |
| 1069 | 1069 | } |
| 1070 | 1070 | |
| 1071 | +void trinity_dpm_enable_bapm(struct radeon_device *rdev, bool enable) | |
| 1072 | +{ | |
| 1073 | + struct trinity_power_info *pi = trinity_get_pi(rdev); | |
| 1074 | + | |
| 1075 | + if (pi->enable_bapm) { | |
| 1076 | + trinity_acquire_mutex(rdev); | |
| 1077 | + trinity_dpm_bapm_enable(rdev, enable); | |
| 1078 | + trinity_release_mutex(rdev); | |
| 1079 | + } | |
| 1080 | +} | |
| 1081 | + | |
| 1071 | 1082 | int trinity_dpm_enable(struct radeon_device *rdev) |
| 1072 | 1083 | { |
| 1073 | 1084 | struct trinity_power_info *pi = trinity_get_pi(rdev); |
| @@ -1091,6 +1102,7 @@ int trinity_dpm_enable(struct radeon_device *rdev) · 17 unmodified lines | ||
| 1091 | 1102 | trinity_program_sclk_dpm(rdev); |
| 1092 | 1103 | trinity_start_dpm(rdev); |
| 1093 | 1104 | trinity_wait_for_dpm_enabled(rdev); |
| 1105 | + trinity_dpm_bapm_enable(rdev, false); | |
| 1094 | 1106 | trinity_release_mutex(rdev); |
| 1095 | 1107 | |
| 1096 | 1108 | if (rdev->irq.installed && |
| @@ -1116,6 +1128,7 @@ void trinity_dpm_disable(struct radeon_device *rdev) · 19 unmodified lines | ||
| 1116 | 1128 | trinity_release_mutex(rdev); |
| 1117 | 1129 | return; |
| 1118 | 1130 | } |
| 1131 | + trinity_dpm_bapm_enable(rdev, false); | |
| 1119 | 1132 | trinity_disable_clock_power_gating(rdev); |
| 1120 | 1133 | sumo_clear_vc(rdev); |
| 1121 | 1134 | trinity_wait_for_level_0(rdev); |
| @@ -1212,6 +1225,8 @@ int trinity_dpm_set_power_state(struct radeon_device *rdev) · 90 unmodified lines | ||
| 1212 | 1225 | |
| 1213 | 1226 | trinity_acquire_mutex(rdev); |
| 1214 | 1227 | if (pi->enable_dpm) { |
| 1228 | + if (pi->enable_bapm) | |
| 1229 | + trinity_dpm_bapm_enable(rdev, rdev->pm.dpm.ac_power); | |
| 1215 | 1230 | trinity_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); |
| 1216 | 1231 | trinity_enable_power_level_0(rdev); |
| 1217 | 1232 | trinity_force_level_0(rdev); |
| @@ -1221,7 +1236,6 @@ int trinity_dpm_set_power_state(struct radeon_device *rdev) · 3 unmodified lines | ||
| 1221 | 1236 | trinity_force_level_0(rdev); |
| 1222 | 1237 | trinity_unforce_levels(rdev); |
| 1223 | 1238 | trinity_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); |
| 1224 | − rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO; | |
| 1225 | 1239 | } |
| 1226 | 1240 | trinity_release_mutex(rdev); |
| 1227 | 1241 | |
| @@ -1854,6 +1868,7 @@ int trinity_dpm_init(struct radeon_device *rdev) · 626 unmodified lines | ||
| 1854 | 1868 | for (i = 0; i < SUMO_MAX_HARDWARE_POWERLEVELS; i++) |
| 1855 | 1869 | pi->at[i] = TRINITY_AT_DFLT; |
| 1856 | 1870 | |
| 1871 | + pi->enable_bapm = true; | |
| 1857 | 1872 | pi->enable_nbps_policy = true; |
| 1858 | 1873 | pi->enable_sclk_ds = true; |
| 1859 | 1874 | pi->enable_gfx_power_gating = true; |
| @@ -108,6 +108,7 @@ struct trinity_power_info { · 107 unmodified lines | ||
| 108 | 108 | bool enable_auto_thermal_throttling; |
| 109 | 109 | bool enable_dpm; |
| 110 | 110 | bool enable_sclk_ds; |
| 111 | + bool enable_bapm; | |
| 111 | 112 | bool uvd_dpm; |
| 112 | 113 | struct radeon_ps current_rps; |
| 113 | 114 | struct trinity_ps current_ps; |
| @@ -118,6 +119,7 @@ struct trinity_power_info { · 4 unmodified lines | ||
| 118 | 119 | #define TRINITY_AT_DFLT 30 |
| 119 | 120 | |
| 120 | 121 | /* trinity_smc.c */ |
| 122 | +int trinity_dpm_bapm_enable(struct radeon_device *rdev, bool enable); | |
| 121 | 123 | int trinity_dpm_config(struct radeon_device *rdev, bool enable); |
| 122 | 124 | int trinity_uvd_dpm_config(struct radeon_device *rdev); |
| 123 | 125 | int trinity_dpm_force_state(struct radeon_device *rdev, u32 n); |
| @@ -56,6 +56,14 @@ static int trinity_notify_message_to_smu(struct radeon_device *rdev, u32 id) · 55 unmodified lines | ||
| 56 | 56 | return 0; |
| 57 | 57 | } |
| 58 | 58 | |
| 59 | +int trinity_dpm_bapm_enable(struct radeon_device *rdev, bool enable) | |
| 60 | +{ | |
| 61 | + if (enable) | |
| 62 | + return trinity_notify_message_to_smu(rdev, PPSMC_MSG_EnableBAPM); | |
| 63 | + else | |
| 64 | + return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DisableBAPM); | |
| 65 | +} | |
| 66 | + | |
| 59 | 67 | int trinity_dpm_config(struct radeon_device *rdev, bool enable) |
| 60 | 68 | { |
| 61 | 69 | if (enable) |
| @@ -212,8 +212,8 @@ int uvd_v1_0_start(struct radeon_device *rdev) · 211 unmodified lines | ||
| 212 | 212 | /* enable VCPU clock */ |
| 213 | 213 | WREG32(UVD_VCPU_CNTL, 1 << 9); |
| 214 | 214 | |
| 215 | − /* enable UMC */ | |
| 216 | − WREG32_P(UVD_LMI_CTRL2, 0, ~(1 << 8)); | |
| 215 | + /* enable UMC and NC0 */ | |
| 216 | + WREG32_P(UVD_LMI_CTRL2, 1 << 13, ~((1 << 8) | (1 << 13))); | |
| 217 | 217 | |
| 218 | 218 | /* boot up the VCPU */ |
| 219 | 219 | WREG32(UVD_SOFT_RESET, 0); |
| @@ -218,7 +218,7 @@ struct ttm_base_object *ttm_base_object_lookup(struct ttm_object_file *tfile, · 217 unmodified lines | ||
| 218 | 218 | uint32_t key) |
| 219 | 219 | { |
| 220 | 220 | struct ttm_object_device *tdev = tfile->tdev; |
| 221 | − struct ttm_base_object *base; | |
| 221 | + struct ttm_base_object *uninitialized_var(base); | |
| 222 | 222 | struct drm_hash_item *hash; |
| 223 | 223 | int ret; |
| 224 | 224 | |
| @@ -170,7 +170,7 @@ void ttm_tt_destroy(struct ttm_tt *ttm) · 169 unmodified lines | ||
| 170 | 170 | ttm_tt_unbind(ttm); |
| 171 | 171 | } |
| 172 | 172 | |
| 173 | − if (likely(ttm->pages != NULL)) { | |
| 173 | + if (ttm->state == tt_unbound) { | |
| 174 | 174 | ttm->bdev->driver->ttm_tt_unpopulate(ttm); |
| 175 | 175 | } |
| 176 | 176 | |
| @@ -97,7 +97,6 @@ int udl_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf) · 96 unmodified lines | ||
| 97 | 97 | ret = vm_insert_page(vma, (unsigned long)vmf->virtual_address, page); |
| 98 | 98 | switch (ret) { |
| 99 | 99 | case -EAGAIN: |
| 100 | − set_need_resched(); | |
| 101 | 100 | case 0: |
| 102 | 101 | case -ERESTARTSYS: |
| 103 | 102 | return VM_FAULT_NOPAGE; |
| @@ -195,7 +195,7 @@ int vmbus_connect(void) · 194 unmodified lines | ||
| 195 | 195 | |
| 196 | 196 | do { |
| 197 | 197 | ret = vmbus_negotiate_version(msginfo, version); |
| 198 | − if (ret) | |
| 198 | + if (ret == -ETIMEDOUT) | |
| 199 | 199 | goto cleanup; |
| 200 | 200 | |
| 201 | 201 | if (vmbus_connection.conn_state == CONNECTED) |
| @@ -32,13 +32,17 @@ · 31 unmodified lines | ||
| 32 | 32 | /* |
| 33 | 33 | * Pre win8 version numbers used in ws2008 and ws 2008 r2 (win7) |
| 34 | 34 | */ |
| 35 | +#define WS2008_SRV_MAJOR 1 | |
| 36 | +#define WS2008_SRV_MINOR 0 | |
| 37 | +#define WS2008_SRV_VERSION (WS2008_SRV_MAJOR << 16 | WS2008_SRV_MINOR) | |
| 38 | + | |
| 35 | 39 | #define WIN7_SRV_MAJOR 3 |
| 36 | 40 | #define WIN7_SRV_MINOR 0 |
| 37 | −#define WIN7_SRV_MAJOR_MINOR (WIN7_SRV_MAJOR << 16 | WIN7_SRV_MINOR) | |
| 41 | +#define WIN7_SRV_VERSION (WIN7_SRV_MAJOR << 16 | WIN7_SRV_MINOR) | |
| 38 | 42 | |
| 39 | 43 | #define WIN8_SRV_MAJOR 4 |
| 40 | 44 | #define WIN8_SRV_MINOR 0 |
| 41 | −#define WIN8_SRV_MAJOR_MINOR (WIN8_SRV_MAJOR << 16 | WIN8_SRV_MINOR) | |
| 45 | +#define WIN8_SRV_VERSION (WIN8_SRV_MAJOR << 16 | WIN8_SRV_MINOR) | |
| 42 | 46 | |
| 43 | 47 | /* |
| 44 | 48 | * Global state maintained for transaction that is being processed. |
| @@ -587,6 +591,8 @@ void hv_kvp_onchannelcallback(void *context) · 542 unmodified lines | ||
| 587 | 591 | |
| 588 | 592 | struct icmsg_hdr *icmsghdrp; |
| 589 | 593 | struct icmsg_negotiate *negop = NULL; |
| 594 | + int util_fw_version; | |
| 595 | + int kvp_srv_version; | |
| 590 | 596 | |
| 591 | 597 | if (kvp_transaction.active) { |
| 592 | 598 | /* |
| @@ -606,17 +612,26 @@ void hv_kvp_onchannelcallback(void *context) · 13 unmodified lines | ||
| 606 | 612 | |
| 607 | 613 | if (icmsghdrp->icmsgtype == ICMSGTYPE_NEGOTIATE) { |
| 608 | 614 | /* |
| 609 | − * We start with win8 version and if the host cannot | |
| 610 | − * support that we use the previous version. | |
| 615 | + * Based on the host, select appropriate | |
| 616 | + * framework and service versions we will | |
| 617 | + * negotiate. | |
| 611 | 618 | */ |
| 612 | − if (vmbus_prep_negotiate_resp(icmsghdrp, negop, | |
| 613 | − recv_buffer, UTIL_FW_MAJOR_MINOR, | |
| 614 | − WIN8_SRV_MAJOR_MINOR)) | |
| 615 | − goto done; | |
| 616 | − | |
| 619 | + switch (vmbus_proto_version) { | |
| 620 | + case (VERSION_WS2008): | |
| 621 | + util_fw_version = UTIL_WS2K8_FW_VERSION; | |
| 622 | + kvp_srv_version = WS2008_SRV_VERSION; | |
| 623 | + break; | |
| 624 | + case (VERSION_WIN7): | |
| 625 | + util_fw_version = UTIL_FW_VERSION; | |
| 626 | + kvp_srv_version = WIN7_SRV_VERSION; | |
| 627 | + break; | |
| 628 | + default: | |
| 629 | + util_fw_version = UTIL_FW_VERSION; | |
| 630 | + kvp_srv_version = WIN8_SRV_VERSION; | |
| 631 | + } | |
| 617 | 632 | vmbus_prep_negotiate_resp(icmsghdrp, negop, |
| 618 | − recv_buffer, UTIL_FW_MAJOR_MINOR, | |
| 619 | − WIN7_SRV_MAJOR_MINOR); | |
| 633 | + recv_buffer, util_fw_version, | |
| 634 | + kvp_srv_version); | |
| 620 | 635 | |
| 621 | 636 | } else { |
| 622 | 637 | kvp_msg = (struct hv_kvp_msg *)&recv_buffer[ |
| @@ -649,7 +664,6 @@ void hv_kvp_onchannelcallback(void *context) · 26 unmodified lines | ||
| 649 | 664 | return; |
| 650 | 665 | |
| 651 | 666 | } |
| 652 | −done: | |
| 653 | 667 | |
| 654 | 668 | icmsghdrp->icflags = ICMSGHDRFLAG_TRANSACTION |
| 655 | 669 | | ICMSGHDRFLAG_RESPONSE; |
| @@ -26,7 +26,7 @@ · 25 unmodified lines | ||
| 26 | 26 | |
| 27 | 27 | #define VSS_MAJOR 5 |
| 28 | 28 | #define VSS_MINOR 0 |
| 29 | −#define VSS_MAJOR_MINOR (VSS_MAJOR << 16 | VSS_MINOR) | |
| 29 | +#define VSS_VERSION (VSS_MAJOR << 16 | VSS_MINOR) | |
| 30 | 30 | |
| 31 | 31 | |
| 32 | 32 | |
| @@ -190,8 +190,8 @@ void hv_vss_onchannelcallback(void *context) · 157 unmodified lines | ||
| 190 | 190 | |
| 191 | 191 | if (icmsghdrp->icmsgtype == ICMSGTYPE_NEGOTIATE) { |
| 192 | 192 | vmbus_prep_negotiate_resp(icmsghdrp, negop, |
| 193 | − recv_buffer, UTIL_FW_MAJOR_MINOR, | |
| 194 | − VSS_MAJOR_MINOR); | |
| 193 | + recv_buffer, UTIL_FW_VERSION, | |
| 194 | + VSS_VERSION); | |
| 195 | 195 | } else { |
| 196 | 196 | vss_msg = (struct hv_vss_msg *)&recv_buffer[ |
| 197 | 197 | sizeof(struct vmbuspipe_hdr) + |
| @@ -28,17 +28,32 @@ · 27 unmodified lines | ||
| 28 | 28 | #include <linux/reboot.h> |
| 29 | 29 | #include <linux/hyperv.h> |
| 30 | 30 | |
| 31 | −#define SHUTDOWN_MAJOR 3 | |
| 32 | −#define SHUTDOWN_MINOR 0 | |
| 33 | −#define SHUTDOWN_MAJOR_MINOR (SHUTDOWN_MAJOR << 16 | SHUTDOWN_MINOR) | |
| 34 | 31 | |
| 35 | −#define TIMESYNCH_MAJOR 3 | |
| 36 | −#define TIMESYNCH_MINOR 0 | |
| 37 | −#define TIMESYNCH_MAJOR_MINOR (TIMESYNCH_MAJOR << 16 | TIMESYNCH_MINOR) | |
| 32 | +#define SD_MAJOR 3 | |
| 33 | +#define SD_MINOR 0 | |
| 34 | +#define SD_VERSION (SD_MAJOR << 16 | SD_MINOR) | |
| 38 | 35 | |
| 39 | −#define HEARTBEAT_MAJOR 3 | |
| 40 | −#define HEARTBEAT_MINOR 0 | |
| 41 | −#define HEARTBEAT_MAJOR_MINOR (HEARTBEAT_MAJOR << 16 | HEARTBEAT_MINOR) | |
| 36 | +#define SD_WS2008_MAJOR 1 | |
| 37 | +#define SD_WS2008_VERSION (SD_WS2008_MAJOR << 16 | SD_MINOR) | |
| 38 | + | |
| 39 | +#define TS_MAJOR 3 | |
| 40 | +#define TS_MINOR 0 | |
| 41 | +#define TS_VERSION (TS_MAJOR << 16 | TS_MINOR) | |
| 42 | + | |
| 43 | +#define TS_WS2008_MAJOR 1 | |
| 44 | +#define TS_WS2008_VERSION (TS_WS2008_MAJOR << 16 | TS_MINOR) | |
| 45 | + | |
| 46 | +#define HB_MAJOR 3 | |
| 47 | +#define HB_MINOR 0 | |
| 48 | +#define HB_VERSION (HB_MAJOR << 16 | HB_MINOR) | |
| 49 | + | |
| 50 | +#define HB_WS2008_MAJOR 1 | |
| 51 | +#define HB_WS2008_VERSION (HB_WS2008_MAJOR << 16 | HB_MINOR) | |
| 52 | + | |
| 53 | +static int sd_srv_version; | |
| 54 | +static int ts_srv_version; | |
| 55 | +static int hb_srv_version; | |
| 56 | +static int util_fw_version; | |
| 42 | 57 | |
| 43 | 58 | static void shutdown_onchannelcallback(void *context); |
| 44 | 59 | static struct hv_util_service util_shutdown = { |
| @@ -99,8 +114,8 @@ static void shutdown_onchannelcallback(void *context) · 54 unmodified lines | ||
| 99 | 114 | |
| 100 | 115 | if (icmsghdrp->icmsgtype == ICMSGTYPE_NEGOTIATE) { |
| 101 | 116 | vmbus_prep_negotiate_resp(icmsghdrp, negop, |
| 102 | − shut_txf_buf, UTIL_FW_MAJOR_MINOR, | |
| 103 | − SHUTDOWN_MAJOR_MINOR); | |
| 117 | + shut_txf_buf, util_fw_version, | |
| 118 | + sd_srv_version); | |
| 104 | 119 | } else { |
| 105 | 120 | shutdown_msg = |
| 106 | 121 | (struct shutdown_msg_data *)&shut_txf_buf[ |
| @@ -216,6 +231,7 @@ static void timesync_onchannelcallback(void *context) · 109 unmodified lines | ||
| 216 | 231 | struct icmsg_hdr *icmsghdrp; |
| 217 | 232 | struct ictimesync_data *timedatap; |
| 218 | 233 | u8 *time_txf_buf = util_timesynch.recv_buffer; |
| 234 | + struct icmsg_negotiate *negop = NULL; | |
| 219 | 235 | |
| 220 | 236 | vmbus_recvpacket(channel, time_txf_buf, |
| 221 | 237 | PAGE_SIZE, &recvlen, &requestid); |
| @@ -225,9 +241,10 @@ static void timesync_onchannelcallback(void *context) · 3 unmodified lines | ||
| 225 | 241 | sizeof(struct vmbuspipe_hdr)]; |
| 226 | 242 | |
| 227 | 243 | if (icmsghdrp->icmsgtype == ICMSGTYPE_NEGOTIATE) { |
| 228 | − vmbus_prep_negotiate_resp(icmsghdrp, NULL, time_txf_buf, | |
| 229 | − UTIL_FW_MAJOR_MINOR, | |
| 230 | − TIMESYNCH_MAJOR_MINOR); | |
| 244 | + vmbus_prep_negotiate_resp(icmsghdrp, negop, | |
| 245 | + time_txf_buf, | |
| 246 | + util_fw_version, | |
| 247 | + ts_srv_version); | |
| 231 | 248 | } else { |
| 232 | 249 | timedatap = (struct ictimesync_data *)&time_txf_buf[ |
| 233 | 250 | sizeof(struct vmbuspipe_hdr) + |
| @@ -257,6 +274,7 @@ static void heartbeat_onchannelcallback(void *context) · 23 unmodified lines | ||
| 257 | 274 | struct icmsg_hdr *icmsghdrp; |
| 258 | 275 | struct heartbeat_msg_data *heartbeat_msg; |
| 259 | 276 | u8 *hbeat_txf_buf = util_heartbeat.recv_buffer; |
| 277 | + struct icmsg_negotiate *negop = NULL; | |
| 260 | 278 | |
| 261 | 279 | vmbus_recvpacket(channel, hbeat_txf_buf, |
| 262 | 280 | PAGE_SIZE, &recvlen, &requestid); |
| @@ -266,9 +284,9 @@ static void heartbeat_onchannelcallback(void *context) · 3 unmodified lines | ||
| 266 | 284 | sizeof(struct vmbuspipe_hdr)]; |
| 267 | 285 | |
| 268 | 286 | if (icmsghdrp->icmsgtype == ICMSGTYPE_NEGOTIATE) { |
| 269 | − vmbus_prep_negotiate_resp(icmsghdrp, NULL, | |
| 270 | − hbeat_txf_buf, UTIL_FW_MAJOR_MINOR, | |
| 271 | − HEARTBEAT_MAJOR_MINOR); | |
| 287 | + vmbus_prep_negotiate_resp(icmsghdrp, negop, | |
| 288 | + hbeat_txf_buf, util_fw_version, | |
| 289 | + hb_srv_version); | |
| 272 | 290 | } else { |
| 273 | 291 | heartbeat_msg = |
| 274 | 292 | (struct heartbeat_msg_data *)&hbeat_txf_buf[ |
| @@ -321,6 +339,25 @@ static int util_probe(struct hv_device *dev, · 46 unmodified lines | ||
| 321 | 339 | goto error; |
| 322 | 340 | |
| 323 | 341 | hv_set_drvdata(dev, srv); |
| 342 | + /* | |
| 343 | + * Based on the host; initialize the framework and | |
| 344 | + * service version numbers we will negotiate. | |
| 345 | + */ | |
| 346 | + switch (vmbus_proto_version) { | |
| 347 | + case (VERSION_WS2008): | |
| 348 | + util_fw_version = UTIL_WS2K8_FW_VERSION; | |
| 349 | + sd_srv_version = SD_WS2008_VERSION; | |
| 350 | + ts_srv_version = TS_WS2008_VERSION; | |
| 351 | + hb_srv_version = HB_WS2008_VERSION; | |
| 352 | + break; | |
| 353 | + | |
| 354 | + default: | |
| 355 | + util_fw_version = UTIL_FW_VERSION; | |
| 356 | + sd_srv_version = SD_VERSION; | |
| 357 | + ts_srv_version = TS_VERSION; | |
| 358 | + hb_srv_version = HB_VERSION; | |
| 359 | + } | |
| 360 | + | |
| 324 | 361 | return 0; |
| 325 | 362 | |
| 326 | 363 | error: |
| @@ -525,16 +525,25 @@ static int applesmc_init_smcreg_try(void) · 524 unmodified lines | ||
| 525 | 525 | { |
| 526 | 526 | struct applesmc_registers *s = &smcreg; |
| 527 | 527 | bool left_light_sensor, right_light_sensor; |
| 528 | + unsigned int count; | |
| 528 | 529 | u8 tmp[1]; |
| 529 | 530 | int ret; |
| 530 | 531 | |
| 531 | 532 | if (s->init_complete) |
| 532 | 533 | return 0; |
| 533 | 534 | |
| 534 | − ret = read_register_count(&s->key_count); | |
| 535 | + ret = read_register_count(&count); | |
| 535 | 536 | if (ret) |
| 536 | 537 | return ret; |
| 537 | 538 | |
| 539 | + if (s->cache && s->key_count != count) { | |
| 540 | + pr_warn("key count changed from %d to %d\n", | |
| 541 | + s->key_count, count); | |
| 542 | + kfree(s->cache); | |
| 543 | + s->cache = NULL; | |
| 544 | + } | |
| 545 | + s->key_count = count; | |
| 546 | + | |
| 538 | 547 | if (!s->cache) |
| 539 | 548 | s->cache = kcalloc(s->key_count, sizeof(*s->cache), GFP_KERNEL); |
| 540 | 549 | if (!s->cache) |
| @@ -98,6 +98,8 @@ · 97 unmodified lines | ||
| 98 | 98 | |
| 99 | 99 | #define DW_IC_ERR_TX_ABRT 0x1 |
| 100 | 100 | |
| 101 | +#define DW_IC_TAR_10BITADDR_MASTER BIT(12) | |
| 102 | + | |
| 101 | 103 | /* |
| 102 | 104 | * status codes |
| 103 | 105 | */ |
| @@ -388,22 +390,34 @@ static int i2c_dw_wait_bus_not_busy(struct dw_i2c_dev *dev) · 284 unmodified lines | ||
| 388 | 390 | static void i2c_dw_xfer_init(struct dw_i2c_dev *dev) |
| 389 | 391 | { |
| 390 | 392 | struct i2c_msg *msgs = dev->msgs; |
| 391 | − u32 ic_con; | |
| 393 | + u32 ic_con, ic_tar = 0; | |
| 392 | 394 | |
| 393 | 395 | /* Disable the adapter */ |
| 394 | 396 | __i2c_dw_enable(dev, false); |
| 395 | 397 | |
| 396 | − /* set the slave (target) address */ | |
| 397 | − dw_writel(dev, msgs[dev->msg_write_idx].addr, DW_IC_TAR); | |
| 398 | − | |
| 399 | 398 | /* if the slave address is ten bit address, enable 10BITADDR */ |
| 400 | 399 | ic_con = dw_readl(dev, DW_IC_CON); |
| 401 | − if (msgs[dev->msg_write_idx].flags & I2C_M_TEN) | |
| 400 | + if (msgs[dev->msg_write_idx].flags & I2C_M_TEN) { | |
| 402 | 401 | ic_con |= DW_IC_CON_10BITADDR_MASTER; |
| 403 | − else | |
| 402 | + /* | |
| 403 | + * If I2C_DYNAMIC_TAR_UPDATE is set, the 10-bit addressing | |
| 404 | + * mode has to be enabled via bit 12 of IC_TAR register. | |
| 405 | + * We set it always as I2C_DYNAMIC_TAR_UPDATE can't be | |
| 406 | + * detected from registers. | |
| 407 | + */ | |
| 408 | + ic_tar = DW_IC_TAR_10BITADDR_MASTER; | |
| 409 | + } else { | |
| 404 | 410 | ic_con &= ~DW_IC_CON_10BITADDR_MASTER; |
| 411 | + } | |
| 412 | + | |
| 405 | 413 | dw_writel(dev, ic_con, DW_IC_CON); |
| 406 | 414 | |
| 415 | + /* | |
| 416 | + * Set the slave (target) address and enable 10-bit addressing mode | |
| 417 | + * if applicable. | |
| 418 | + */ | |
| 419 | + dw_writel(dev, msgs[dev->msg_write_idx].addr | ic_tar, DW_IC_TAR); | |
| 420 | + | |
| 407 | 421 | /* Enable the adapter */ |
| 408 | 422 | __i2c_dw_enable(dev, true); |
| 409 | 423 | |
| @@ -393,6 +393,9 @@ static int ismt_access(struct i2c_adapter *adap, u16 addr, · 392 unmodified lines | ||
| 393 | 393 | |
| 394 | 394 | desc = &priv->hw[priv->head]; |
| 395 | 395 | |
| 396 | + /* Initialize the DMA buffer */ | |
| 397 | + memset(priv->dma_buffer, 0, sizeof(priv->dma_buffer)); | |
| 398 | + | |
| 396 | 399 | /* Initialize the descriptor */ |
| 397 | 400 | memset(desc, 0, sizeof(struct ismt_desc)); |
| 398 | 401 | desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, read_write); |
| @@ -234,9 +234,9 @@ static int mv64xxx_i2c_offload_msg(struct mv64xxx_i2c_data *drv_data) · 233 unmodified lines | ||
| 234 | 234 | ctrl_reg |= MV64XXX_I2C_BRIDGE_CONTROL_WR | |
| 235 | 235 | (msg->len - 1) << MV64XXX_I2C_BRIDGE_CONTROL_TX_SIZE_SHIFT; |
| 236 | 236 | |
| 237 | − writel_relaxed(data_reg_lo, | |
| 237 | + writel(data_reg_lo, | |
| 238 | 238 | drv_data->reg_base + MV64XXX_I2C_REG_TX_DATA_LO); |
| 239 | − writel_relaxed(data_reg_hi, | |
| 239 | + writel(data_reg_hi, | |
| 240 | 240 | drv_data->reg_base + MV64XXX_I2C_REG_TX_DATA_HI); |
| 241 | 241 | |
| 242 | 242 | } else { |
| @@ -697,6 +697,7 @@ static const struct of_device_id mv64xxx_i2c_of_match_table[] = { · 454 unmodified lines | ||
| 697 | 697 | MODULE_DEVICE_TABLE(of, mv64xxx_i2c_of_match_table); |
| 698 | 698 | |
| 699 | 699 | #ifdef CONFIG_OF |
| 700 | +#ifdef CONFIG_HAVE_CLK | |
| 700 | 701 | static int |
| 701 | 702 | mv64xxx_calc_freq(const int tclk, const int n, const int m) |
| 702 | 703 | { |
| @@ -726,16 +727,12 @@ mv64xxx_find_baud_factors(const u32 req_freq, const u32 tclk, u32 *best_n, · 23 unmodified lines | ||
| 726 | 727 | return false; |
| 727 | 728 | return true; |
| 728 | 729 | } |
| 730 | +#endif /* CONFIG_HAVE_CLK */ | |
| 729 | 731 | |
| 730 | 732 | static int |
| 731 | 733 | mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data, |
| 732 | 734 | struct device *dev) |
| 733 | 735 | { |
| 734 | − const struct of_device_id *device; | |
| 735 | − struct device_node *np = dev->of_node; | |
| 736 | − u32 bus_freq, tclk; | |
| 737 | − int rc = 0; | |
| 738 | − | |
| 739 | 736 | /* CLK is mandatory when using DT to describe the i2c bus. We |
| 740 | 737 | * need to know tclk in order to calculate bus clock |
| 741 | 738 | * factors. |
| @@ -744,6 +741,11 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data, · 2 unmodified lines | ||
| 744 | 741 | /* Have OF but no CLK */ |
| 745 | 742 | return -ENODEV; |
| 746 | 743 | #else |
| 744 | + const struct of_device_id *device; | |
| 745 | + struct device_node *np = dev->of_node; | |
| 746 | + u32 bus_freq, tclk; | |
| 747 | + int rc = 0; | |
| 748 | + | |
| 747 | 749 | if (IS_ERR(drv_data->clk)) { |
| 748 | 750 | rc = -ENODEV; |
| 749 | 751 | goto out; |
| @@ -1178,8 +1178,6 @@ static int s3c24xx_i2c_remove(struct platform_device *pdev) · 1177 unmodified lines | ||
| 1178 | 1178 | |
| 1179 | 1179 | i2c_del_adapter(&i2c->adap); |
| 1180 | 1180 | |
| 1181 | − clk_disable_unprepare(i2c->clk); | |
| 1182 | − | |
| 1183 | 1181 | if (pdev->dev.of_node && IS_ERR(i2c->pctrl)) |
| 1184 | 1182 | s3c24xx_i2c_dt_gpio_free(i2c); |
| 1185 | 1183 | |
| @@ -620,7 +620,7 @@ static int bma180_remove(struct i2c_client *client) · 619 unmodified lines | ||
| 620 | 620 | #ifdef CONFIG_PM_SLEEP |
| 621 | 621 | static int bma180_suspend(struct device *dev) |
| 622 | 622 | { |
| 623 | − struct iio_dev *indio_dev = dev_to_iio_dev(dev); | |
| 623 | + struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); | |
| 624 | 624 | struct bma180_data *data = iio_priv(indio_dev); |
| 625 | 625 | int ret; |
| 626 | 626 | |
| @@ -633,7 +633,7 @@ static int bma180_suspend(struct device *dev) · 6 unmodified lines | ||
| 633 | 633 | |
| 634 | 634 | static int bma180_resume(struct device *dev) |
| 635 | 635 | { |
| 636 | − struct iio_dev *indio_dev = dev_to_iio_dev(dev); | |
| 636 | + struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); | |
| 637 | 637 | struct bma180_data *data = iio_priv(indio_dev); |
| 638 | 638 | int ret; |
| 639 | 639 | |
| @@ -556,7 +556,7 @@ static const struct iio_info at91_adc_info = { · 555 unmodified lines | ||
| 556 | 556 | |
| 557 | 557 | static int at91_adc_probe(struct platform_device *pdev) |
| 558 | 558 | { |
| 559 | − unsigned int prsc, mstrclk, ticks, adc_clk, shtim; | |
| 559 | + unsigned int prsc, mstrclk, ticks, adc_clk, adc_clk_khz, shtim; | |
| 560 | 560 | int ret; |
| 561 | 561 | struct iio_dev *idev; |
| 562 | 562 | struct at91_adc_state *st; |
| @@ -649,6 +649,7 @@ static int at91_adc_probe(struct platform_device *pdev) · 86 unmodified lines | ||
| 649 | 649 | */ |
| 650 | 650 | mstrclk = clk_get_rate(st->clk); |
| 651 | 651 | adc_clk = clk_get_rate(st->adc_clk); |
| 652 | + adc_clk_khz = adc_clk / 1000; | |
| 652 | 653 | prsc = (mstrclk / (2 * adc_clk)) - 1; |
| 653 | 654 | |
| 654 | 655 | if (!st->startup_time) { |
| @@ -662,15 +663,15 @@ static int at91_adc_probe(struct platform_device *pdev) · 7 unmodified lines | ||
| 662 | 663 | * defined in the electrical characteristics of the board, divided by 8. |
| 663 | 664 | * The formula thus is : Startup Time = (ticks + 1) * 8 / ADC Clock |
| 664 | 665 | */ |
| 665 | − ticks = round_up((st->startup_time * adc_clk / | |
| 666 | − 1000000) - 1, 8) / 8; | |
| 666 | + ticks = round_up((st->startup_time * adc_clk_khz / | |
| 667 | + 1000) - 1, 8) / 8; | |
| 667 | 668 | /* |
| 668 | 669 | * a minimal Sample and Hold Time is necessary for the ADC to guarantee |
| 669 | 670 | * the best converted final value between two channels selection |
| 670 | 671 | * The formula thus is : Sample and Hold Time = (shtim + 1) / ADCClock |
| 671 | 672 | */ |
| 672 | − shtim = round_up((st->sample_hold_time * adc_clk / | |
| 673 | − 1000000) - 1, 1); | |
| 673 | + shtim = round_up((st->sample_hold_time * adc_clk_khz / | |
| 674 | + 1000) - 1, 1); | |
| 674 | 675 | |
| 675 | 676 | reg = AT91_ADC_PRESCAL_(prsc) & st->registers->mr_prescal_mask; |
| 676 | 677 | reg |= AT91_ADC_STARTUP_(ticks) & st->registers->mr_startup_mask; |
| @@ -185,10 +185,8 @@ static int ad8366_remove(struct spi_device *spi) · 184 unmodified lines | ||
| 185 | 185 | |
| 186 | 186 | iio_device_unregister(indio_dev); |
| 187 | 187 | |
| 188 | − if (!IS_ERR(reg)) { | |
| 188 | + if (!IS_ERR(reg)) | |
| 189 | 189 | regulator_disable(reg); |
| 190 | − regulator_put(reg); | |
| 191 | − } | |
| 192 | 190 | |
| 193 | 191 | return 0; |
| 194 | 192 | } |
| @@ -41,6 +41,8 @@ struct iio_cb_buffer *iio_channel_get_all_cb(struct device *dev, · 40 unmodified lines | ||
| 41 | 41 | goto error_ret; |
| 42 | 42 | } |
| 43 | 43 | |
| 44 | + iio_buffer_init(&cb_buff->buffer); | |
| 45 | + | |
| 44 | 46 | cb_buff->private = private; |
| 45 | 47 | cb_buff->cb = cb; |
| 46 | 48 | cb_buff->buffer.access = &iio_cb_access; |
| @@ -37,21 +37,21 @@ struct mcp4725_data { · 36 unmodified lines | ||
| 37 | 37 | |
| 38 | 38 | static int mcp4725_suspend(struct device *dev) |
| 39 | 39 | { |
| 40 | − struct iio_dev *indio_dev = dev_to_iio_dev(dev); | |
| 41 | − struct mcp4725_data *data = iio_priv(indio_dev); | |
| 40 | + struct mcp4725_data *data = iio_priv(i2c_get_clientdata( | |
| 41 | + to_i2c_client(dev))); | |
| 42 | 42 | u8 outbuf[2]; |
| 43 | 43 | |
| 44 | 44 | outbuf[0] = (data->powerdown_mode + 1) << 4; |
| 45 | 45 | outbuf[1] = 0; |
| 46 | 46 | data->powerdown = true; |
| 47 | 47 | |
| 48 | − return i2c_master_send(to_i2c_client(dev), outbuf, 2); | |
| 48 | + return i2c_master_send(data->client, outbuf, 2); | |
| 49 | 49 | } |
| 50 | 50 | |
| 51 | 51 | static int mcp4725_resume(struct device *dev) |
| 52 | 52 | { |
| 53 | − struct iio_dev *indio_dev = dev_to_iio_dev(dev); | |
| 54 | − struct mcp4725_data *data = iio_priv(indio_dev); | |
| 53 | + struct mcp4725_data *data = iio_priv(i2c_get_clientdata( | |
| 54 | + to_i2c_client(dev))); | |
| 55 | 55 | u8 outbuf[2]; |
| 56 | 56 | |
| 57 | 57 | /* restore previous DAC value */ |
| @@ -59,7 +59,7 @@ static int mcp4725_resume(struct device *dev) · 1 unmodified line | ||
| 59 | 59 | outbuf[1] = data->dac_value & 0xff; |
| 60 | 60 | data->powerdown = false; |
| 61 | 61 | |
| 62 | − return i2c_master_send(to_i2c_client(dev), outbuf, 2); | |
| 62 | + return i2c_master_send(data->client, outbuf, 2); | |
| 63 | 63 | } |
| 64 | 64 | |
| 65 | 65 | #ifdef CONFIG_PM_SLEEP |
| @@ -49,11 +49,15 @@ ssize_t iio_buffer_read_first_n_outer(struct file *filp, char __user *buf, · 48 unmodified lines | ||
| 49 | 49 | #define iio_buffer_poll_addr (&iio_buffer_poll) |
| 50 | 50 | #define iio_buffer_read_first_n_outer_addr (&iio_buffer_read_first_n_outer) |
| 51 | 51 | |
| 52 | +void iio_disable_all_buffers(struct iio_dev *indio_dev); | |
| 53 | + | |
| 52 | 54 | #else |
| 53 | 55 | |
| 54 | 56 | #define iio_buffer_poll_addr NULL |
| 55 | 57 | #define iio_buffer_read_first_n_outer_addr NULL |
| 56 | 58 | |
| 59 | +static inline void iio_disable_all_buffers(struct iio_dev *indio_dev) {} | |
| 60 | + | |
| 57 | 61 | #endif |
| 58 | 62 | |
| 59 | 63 | int iio_device_register_eventset(struct iio_dev *indio_dev); |
| @@ -460,6 +460,25 @@ static int iio_compute_scan_bytes(struct iio_dev *indio_dev, const long *mask, · 459 unmodified lines | ||
| 460 | 460 | return bytes; |
| 461 | 461 | } |
| 462 | 462 | |
| 463 | +void iio_disable_all_buffers(struct iio_dev *indio_dev) | |
| 464 | +{ | |
| 465 | + struct iio_buffer *buffer, *_buffer; | |
| 466 | + | |
| 467 | + if (list_empty(&indio_dev->buffer_list)) | |
| 468 | + return; | |
| 469 | + | |
| 470 | + if (indio_dev->setup_ops->predisable) | |
| 471 | + indio_dev->setup_ops->predisable(indio_dev); | |
| 472 | + | |
| 473 | + list_for_each_entry_safe(buffer, _buffer, | |
| 474 | + &indio_dev->buffer_list, buffer_list) | |
| 475 | + list_del_init(&buffer->buffer_list); | |
| 476 | + | |
| 477 | + indio_dev->currentmode = INDIO_DIRECT_MODE; | |
| 478 | + if (indio_dev->setup_ops->postdisable) | |
| 479 | + indio_dev->setup_ops->postdisable(indio_dev); | |
| 480 | +} | |
| 481 | + | |
| 463 | 482 | int iio_update_buffers(struct iio_dev *indio_dev, |
| 464 | 483 | struct iio_buffer *insert_buffer, |
| 465 | 484 | struct iio_buffer *remove_buffer) |
| @@ -528,8 +547,15 @@ int iio_update_buffers(struct iio_dev *indio_dev, · 62 unmodified lines | ||
| 528 | 547 | * Note can only occur when adding a buffer. |
| 529 | 548 | */ |
| 530 | 549 | list_del(&insert_buffer->buffer_list); |
| 531 | − indio_dev->active_scan_mask = old_mask; | |
| 532 | − success = -EINVAL; | |
| 550 | + if (old_mask) { | |
| 551 | + indio_dev->active_scan_mask = old_mask; | |
| 552 | + success = -EINVAL; | |
| 553 | + } | |
| 554 | + else { | |
| 555 | + kfree(compound_mask); | |
| 556 | + ret = -EINVAL; | |
| 557 | + goto error_ret; | |
| 558 | + } | |
| 533 | 559 | } |
| 534 | 560 | } else { |
| 535 | 561 | indio_dev->active_scan_mask = compound_mask; |
| @@ -848,13 +848,10 @@ static void iio_device_unregister_sysfs(struct iio_dev *indio_dev) · 847 unmodified lines | ||
| 848 | 848 | static void iio_dev_release(struct device *device) |
| 849 | 849 | { |
| 850 | 850 | struct iio_dev *indio_dev = dev_to_iio_dev(device); |
| 851 | − if (indio_dev->chrdev.dev) | |
| 852 | − cdev_del(&indio_dev->chrdev); | |
| 853 | 851 | if (indio_dev->modes & INDIO_BUFFER_TRIGGERED) |
| 854 | 852 | iio_device_unregister_trigger_consumer(indio_dev); |
| 855 | 853 | iio_device_unregister_eventset(indio_dev); |
| 856 | 854 | iio_device_unregister_sysfs(indio_dev); |
| 857 | − iio_device_unregister_debugfs(indio_dev); | |
| 858 | 855 | |
| 859 | 856 | ida_simple_remove(&iio_ida, indio_dev->id); |
| 860 | 857 | kfree(indio_dev); |
| @@ -970,6 +967,8 @@ static int iio_chrdev_open(struct inode *inode, struct file *filp) · 109 unmodified lines | ||
| 970 | 967 | if (test_and_set_bit(IIO_BUSY_BIT_POS, &indio_dev->flags)) |
| 971 | 968 | return -EBUSY; |
| 972 | 969 | |
| 970 | + iio_device_get(indio_dev); | |
| 971 | + | |
| 973 | 972 | filp->private_data = indio_dev; |
| 974 | 973 | |
| 975 | 974 | return 0; |
| @@ -983,6 +982,8 @@ static int iio_chrdev_release(struct inode *inode, struct file *filp) · 7 unmodified lines | ||
| 983 | 982 | struct iio_dev *indio_dev = container_of(inode->i_cdev, |
| 984 | 983 | struct iio_dev, chrdev); |
| 985 | 984 | clear_bit(IIO_BUSY_BIT_POS, &indio_dev->flags); |
| 985 | + iio_device_put(indio_dev); | |
| 986 | + | |
| 986 | 987 | return 0; |
| 987 | 988 | } |
| 988 | 989 | |
| @@ -1052,18 +1053,20 @@ int iio_device_register(struct iio_dev *indio_dev) · 63 unmodified lines | ||
| 1052 | 1053 | indio_dev->setup_ops == NULL) |
| 1053 | 1054 | indio_dev->setup_ops = &noop_ring_setup_ops; |
| 1054 | 1055 | |
| 1055 | − ret = device_add(&indio_dev->dev); | |
| 1056 | − if (ret < 0) | |
| 1057 | − goto error_unreg_eventset; | |
| 1058 | 1056 | cdev_init(&indio_dev->chrdev, &iio_buffer_fileops); |
| 1059 | 1057 | indio_dev->chrdev.owner = indio_dev->info->driver_module; |
| 1058 | + indio_dev->chrdev.kobj.parent = &indio_dev->dev.kobj; | |
| 1060 | 1059 | ret = cdev_add(&indio_dev->chrdev, indio_dev->dev.devt, 1); |
| 1061 | 1060 | if (ret < 0) |
| 1062 | − goto error_del_device; | |
| 1063 | − return 0; | |
| 1061 | + goto error_unreg_eventset; | |
| 1064 | 1062 | |
| 1065 | −error_del_device: | |
| 1066 | − device_del(&indio_dev->dev); | |
| 1063 | + ret = device_add(&indio_dev->dev); | |
| 1064 | + if (ret < 0) | |
| 1065 | + goto error_cdev_del; | |
| 1066 | + | |
| 1067 | + return 0; | |
| 1068 | +error_cdev_del: | |
| 1069 | + cdev_del(&indio_dev->chrdev); | |
| 1067 | 1070 | error_unreg_eventset: |
| 1068 | 1071 | iio_device_unregister_eventset(indio_dev); |
| 1069 | 1072 | error_free_sysfs: |
| @@ -1078,9 +1081,17 @@ EXPORT_SYMBOL(iio_device_register); · 8 unmodified lines | ||
| 1078 | 1081 | void iio_device_unregister(struct iio_dev *indio_dev) |
| 1079 | 1082 | { |
| 1080 | 1083 | mutex_lock(&indio_dev->info_exist_lock); |
| 1084 | + | |
| 1085 | + device_del(&indio_dev->dev); | |
| 1086 | + | |
| 1087 | + if (indio_dev->chrdev.dev) | |
| 1088 | + cdev_del(&indio_dev->chrdev); | |
| 1089 | + iio_device_unregister_debugfs(indio_dev); | |
| 1090 | + | |
| 1091 | + iio_disable_all_buffers(indio_dev); | |
| 1092 | + | |
| 1081 | 1093 | indio_dev->info = NULL; |
| 1082 | 1094 | mutex_unlock(&indio_dev->info_exist_lock); |
| 1083 | − device_del(&indio_dev->dev); | |
| 1084 | 1095 | } |
| 1085 | 1096 | EXPORT_SYMBOL(iio_device_unregister); |
| 1086 | 1097 | subsys_initcall(iio_init); |
| @@ -72,7 +72,8 @@ EXPORT_SYMBOL(iio_push_event); · 71 unmodified lines | ||
| 72 | 72 | static unsigned int iio_event_poll(struct file *filep, |
| 73 | 73 | struct poll_table_struct *wait) |
| 74 | 74 | { |
| 75 | − struct iio_event_interface *ev_int = filep->private_data; | |
| 75 | + struct iio_dev *indio_dev = filep->private_data; | |
| 76 | + struct iio_event_interface *ev_int = indio_dev->event_interface; | |
| 76 | 77 | unsigned int events = 0; |
| 77 | 78 | |
| 78 | 79 | poll_wait(filep, &ev_int->wait, wait); |
| @@ -90,7 +91,8 @@ static ssize_t iio_event_chrdev_read(struct file *filep, · 11 unmodified lines | ||
| 90 | 91 | size_t count, |
| 91 | 92 | loff_t *f_ps) |
| 92 | 93 | { |
| 93 | − struct iio_event_interface *ev_int = filep->private_data; | |
| 94 | + struct iio_dev *indio_dev = filep->private_data; | |
| 95 | + struct iio_event_interface *ev_int = indio_dev->event_interface; | |
| 94 | 96 | unsigned int copied; |
| 95 | 97 | int ret; |
| 96 | 98 | |
| @@ -121,7 +123,8 @@ error_unlock: · 24 unmodified lines | ||
| 121 | 123 | |
| 122 | 124 | static int iio_event_chrdev_release(struct inode *inode, struct file *filep) |
| 123 | 125 | { |
| 124 | − struct iio_event_interface *ev_int = filep->private_data; | |
| 126 | + struct iio_dev *indio_dev = filep->private_data; | |
| 127 | + struct iio_event_interface *ev_int = indio_dev->event_interface; | |
| 125 | 128 | |
| 126 | 129 | spin_lock_irq(&ev_int->wait.lock); |
| 127 | 130 | __clear_bit(IIO_BUSY_BIT_POS, &ev_int->flags); |
| @@ -133,6 +136,8 @@ static int iio_event_chrdev_release(struct inode *inode, struct file *filep) · 5 unmodified lines | ||
| 133 | 136 | kfifo_reset_out(&ev_int->det_events); |
| 134 | 137 | spin_unlock_irq(&ev_int->wait.lock); |
| 135 | 138 | |
| 139 | + iio_device_put(indio_dev); | |
| 140 | + | |
| 136 | 141 | return 0; |
| 137 | 142 | } |
| 138 | 143 | |
| @@ -158,12 +163,15 @@ int iio_event_getfd(struct iio_dev *indio_dev) · 19 unmodified lines | ||
| 158 | 163 | return -EBUSY; |
| 159 | 164 | } |
| 160 | 165 | spin_unlock_irq(&ev_int->wait.lock); |
| 161 | − fd = anon_inode_getfd("iio:event", | |
| 162 | − &iio_event_chrdev_fileops, ev_int, O_RDONLY); | |
| 166 | + iio_device_get(indio_dev); | |
| 167 | + | |
| 168 | + fd = anon_inode_getfd("iio:event", &iio_event_chrdev_fileops, | |
| 169 | + indio_dev, O_RDONLY); | |
| 163 | 170 | if (fd < 0) { |
| 164 | 171 | spin_lock_irq(&ev_int->wait.lock); |
| 165 | 172 | __clear_bit(IIO_BUSY_BIT_POS, &ev_int->flags); |
| 166 | 173 | spin_unlock_irq(&ev_int->wait.lock); |
| 174 | + iio_device_put(indio_dev); | |
| 167 | 175 | } |
| 168 | 176 | return fd; |
| 169 | 177 | } |
| @@ -276,7 +284,7 @@ static int iio_device_add_event_sysfs(struct iio_dev *indio_dev, · 106 unmodified lines | ||
| 276 | 284 | goto error_ret; |
| 277 | 285 | } |
| 278 | 286 | if (chan->modified) |
| 279 | − mask = IIO_MOD_EVENT_CODE(chan->type, 0, chan->channel, | |
| 287 | + mask = IIO_MOD_EVENT_CODE(chan->type, 0, chan->channel2, | |
| 280 | 288 | i/IIO_EV_DIR_MAX, |
| 281 | 289 | i%IIO_EV_DIR_MAX); |
| 282 | 290 | else if (chan->differential) |
| @@ -29,9 +29,9 @@ · 28 unmodified lines | ||
| 29 | 29 | #define ST_MAGN_NUMBER_DATA_CHANNELS 3 |
| 30 | 30 | |
| 31 | 31 | /* DEFAULT VALUE FOR SENSORS */ |
| 32 | −#define ST_MAGN_DEFAULT_OUT_X_L_ADDR 0X04 | |
| 33 | −#define ST_MAGN_DEFAULT_OUT_Y_L_ADDR 0X08 | |
| 34 | −#define ST_MAGN_DEFAULT_OUT_Z_L_ADDR 0X06 | |
| 32 | +#define ST_MAGN_DEFAULT_OUT_X_H_ADDR 0X03 | |
| 33 | +#define ST_MAGN_DEFAULT_OUT_Y_H_ADDR 0X07 | |
| 34 | +#define ST_MAGN_DEFAULT_OUT_Z_H_ADDR 0X05 | |
| 35 | 35 | |
| 36 | 36 | /* FULLSCALE */ |
| 37 | 37 | #define ST_MAGN_FS_AVL_1300MG 1300 |
| @@ -117,16 +117,16 @@ · 79 unmodified lines | ||
| 117 | 117 | static const struct iio_chan_spec st_magn_16bit_channels[] = { |
| 118 | 118 | ST_SENSORS_LSM_CHANNELS(IIO_MAGN, |
| 119 | 119 | BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), |
| 120 | − ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 16, 16, | |
| 121 | − ST_MAGN_DEFAULT_OUT_X_L_ADDR), | |
| 120 | + ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_BE, 16, 16, | |
| 121 | + ST_MAGN_DEFAULT_OUT_X_H_ADDR), | |
| 122 | 122 | ST_SENSORS_LSM_CHANNELS(IIO_MAGN, |
| 123 | 123 | BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), |
| 124 | − ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 16, 16, | |
| 125 | − ST_MAGN_DEFAULT_OUT_Y_L_ADDR), | |
| 124 | + ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_BE, 16, 16, | |
| 125 | + ST_MAGN_DEFAULT_OUT_Y_H_ADDR), | |
| 126 | 126 | ST_SENSORS_LSM_CHANNELS(IIO_MAGN, |
| 127 | 127 | BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), |
| 128 | − ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 16, 16, | |
| 129 | − ST_MAGN_DEFAULT_OUT_Z_L_ADDR), | |
| 128 | + ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_BE, 16, 16, | |
| 129 | + ST_MAGN_DEFAULT_OUT_Z_H_ADDR), | |
| 130 | 130 | IIO_CHAN_SOFT_TIMESTAMP(3) |
| 131 | 131 | }; |
| 132 | 132 | |
| @@ -255,12 +255,14 @@ static int tmp006_remove(struct i2c_client *client) · 254 unmodified lines | ||
| 255 | 255 | #ifdef CONFIG_PM_SLEEP |
| 256 | 256 | static int tmp006_suspend(struct device *dev) |
| 257 | 257 | { |
| 258 | − return tmp006_powerdown(iio_priv(dev_to_iio_dev(dev))); | |
| 258 | + struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); | |
| 259 | + return tmp006_powerdown(iio_priv(indio_dev)); | |
| 259 | 260 | } |
| 260 | 261 | |
| 261 | 262 | static int tmp006_resume(struct device *dev) |
| 262 | 263 | { |
| 263 | − struct tmp006_data *data = iio_priv(dev_to_iio_dev(dev)); | |
| 264 | + struct tmp006_data *data = iio_priv(i2c_get_clientdata( | |
| 265 | + to_i2c_client(dev))); | |
| 264 | 266 | return i2c_smbus_write_word_swapped(data->client, TMP006_CONFIG, |
| 265 | 267 | data->config | TMP006_CONFIG_MOD_MASK); |
| 266 | 268 | } |
| @@ -1588,7 +1588,7 @@ static int srpt_build_tskmgmt_rsp(struct srpt_rdma_ch *ch, · 1587 unmodified lines | ||
| 1588 | 1588 | int resp_data_len; |
| 1589 | 1589 | int resp_len; |
| 1590 | 1590 | |
| 1591 | − resp_data_len = (rsp_code == SRP_TSK_MGMT_SUCCESS) ? 0 : 4; | |
| 1591 | + resp_data_len = 4; | |
| 1592 | 1592 | resp_len = sizeof(*srp_rsp) + resp_data_len; |
| 1593 | 1593 | |
| 1594 | 1594 | srp_rsp = ioctx->ioctx.buf; |
| @@ -1600,11 +1600,9 @@ static int srpt_build_tskmgmt_rsp(struct srpt_rdma_ch *ch, · 5 unmodified lines | ||
| 1600 | 1600 | + atomic_xchg(&ch->req_lim_delta, 0)); |
| 1601 | 1601 | srp_rsp->tag = tag; |
| 1602 | 1602 | |
| 1603 | − if (rsp_code != SRP_TSK_MGMT_SUCCESS) { | |
| 1604 | − srp_rsp->flags |= SRP_RSP_FLAG_RSPVALID; | |
| 1605 | − srp_rsp->resp_data_len = cpu_to_be32(resp_data_len); | |
| 1606 | − srp_rsp->data[3] = rsp_code; | |
| 1607 | − } | |
| 1603 | + srp_rsp->flags |= SRP_RSP_FLAG_RSPVALID; | |
| 1604 | + srp_rsp->resp_data_len = cpu_to_be32(resp_data_len); | |
| 1605 | + srp_rsp->data[3] = rsp_code; | |
| 1608 | 1606 | |
| 1609 | 1607 | return resp_len; |
| 1610 | 1608 | } |
| @@ -2358,6 +2356,8 @@ static void srpt_release_channel_work(struct work_struct *w) · 747 unmodified lines | ||
| 2358 | 2356 | transport_deregister_session(se_sess); |
| 2359 | 2357 | ch->sess = NULL; |
| 2360 | 2358 | |
| 2359 | + ib_destroy_cm_id(ch->cm_id); | |
| 2360 | + | |
| 2361 | 2361 | srpt_destroy_ch_ib(ch); |
| 2362 | 2362 | |
| 2363 | 2363 | srpt_free_ioctx_ring((struct srpt_ioctx **)ch->ioctx_ring, |
| @@ -2368,8 +2368,6 @@ static void srpt_release_channel_work(struct work_struct *w) · 4 unmodified lines | ||
| 2368 | 2368 | list_del(&ch->list); |
| 2369 | 2369 | spin_unlock_irq(&sdev->spinlock); |
| 2370 | 2370 | |
| 2371 | − ib_destroy_cm_id(ch->cm_id); | |
| 2372 | − | |
| 2373 | 2371 | if (ch->release_done) |
| 2374 | 2372 | complete(ch->release_done); |
| 2375 | 2373 | |
| @@ -377,6 +377,7 @@ struct arm_smmu_cfg { · 376 unmodified lines | ||
| 377 | 377 | u32 cbar; |
| 378 | 378 | pgd_t *pgd; |
| 379 | 379 | }; |
| 380 | +#define INVALID_IRPTNDX 0xff | |
| 380 | 381 | |
| 381 | 382 | #define ARM_SMMU_CB_ASID(cfg) ((cfg)->cbndx) |
| 382 | 383 | #define ARM_SMMU_CB_VMID(cfg) ((cfg)->cbndx + 1) |
| @@ -840,7 +841,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, · 457 unmodified lines | ||
| 840 | 841 | if (IS_ERR_VALUE(ret)) { |
| 841 | 842 | dev_err(smmu->dev, "failed to request context IRQ %d (%u)\n", |
| 842 | 843 | root_cfg->irptndx, irq); |
| 843 | − root_cfg->irptndx = -1; | |
| 844 | + root_cfg->irptndx = INVALID_IRPTNDX; | |
| 844 | 845 | goto out_free_context; |
| 845 | 846 | } |
| 846 | 847 | |
| @@ -869,7 +870,7 @@ static void arm_smmu_destroy_domain_context(struct iommu_domain *domain) · 22 unmodified lines | ||
| 869 | 870 | writel_relaxed(0, cb_base + ARM_SMMU_CB_SCTLR); |
| 870 | 871 | arm_smmu_tlb_inv_context(root_cfg); |
| 871 | 872 | |
| 872 | − if (root_cfg->irptndx != -1) { | |
| 873 | + if (root_cfg->irptndx != INVALID_IRPTNDX) { | |
| 873 | 874 | irq = smmu->irqs[smmu->num_global_irqs + root_cfg->irptndx]; |
| 874 | 875 | free_irq(irq, domain); |
| 875 | 876 | } |
| @@ -1857,8 +1858,6 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev) · 981 unmodified lines | ||
| 1857 | 1858 | goto out_put_parent; |
| 1858 | 1859 | } |
| 1859 | 1860 | |
| 1860 | − arm_smmu_device_reset(smmu); | |
| 1861 | − | |
| 1862 | 1861 | for (i = 0; i < smmu->num_global_irqs; ++i) { |
| 1863 | 1862 | err = request_irq(smmu->irqs[i], |
| 1864 | 1863 | arm_smmu_global_fault, |
| @@ -1876,6 +1875,8 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev) · 11 unmodified lines | ||
| 1876 | 1875 | spin_lock(&arm_smmu_devices_lock); |
| 1877 | 1876 | list_add(&smmu->list, &arm_smmu_devices); |
| 1878 | 1877 | spin_unlock(&arm_smmu_devices_lock); |
| 1878 | + | |
| 1879 | + arm_smmu_device_reset(smmu); | |
| 1879 | 1880 | return 0; |
| 1880 | 1881 | |
| 1881 | 1882 | out_free_irqs: |
| @@ -1966,10 +1967,10 @@ static int __init arm_smmu_init(void) · 84 unmodified lines | ||
| 1966 | 1967 | return ret; |
| 1967 | 1968 | |
| 1968 | 1969 | /* Oh, for a proper bus abstraction */ |
| 1969 | − if (!iommu_present(&platform_bus_type)); | |
| 1970 | + if (!iommu_present(&platform_bus_type)) | |
| 1970 | 1971 | bus_set_iommu(&platform_bus_type, &arm_smmu_ops); |
| 1971 | 1972 | |
| 1972 | − if (!iommu_present(&amba_bustype)); | |
| 1973 | + if (!iommu_present(&amba_bustype)) | |
| 1973 | 1974 | bus_set_iommu(&amba_bustype, &arm_smmu_ops); |
| 1974 | 1975 | |
| 1975 | 1976 | return 0; |
| @@ -2295,8 +2295,8 @@ _hfcpci_softirq(struct device *dev, void *arg) · 2294 unmodified lines | ||
| 2295 | 2295 | static void |
| 2296 | 2296 | hfcpci_softirq(void *arg) |
| 2297 | 2297 | { |
| 2298 | − (void) driver_for_each_device(&hfc_driver.driver, NULL, arg, | |
| 2299 | − _hfcpci_softirq); | |
| 2298 | + WARN_ON_ONCE(driver_for_each_device(&hfc_driver.driver, NULL, arg, | |
| 2299 | + _hfcpci_softirq) != 0); | |
| 2300 | 2300 | |
| 2301 | 2301 | /* if next event would be in the past ... */ |
| 2302 | 2302 | if ((s32)(hfc_jiffies + tics - jiffies) <= 0) |
| @@ -314,7 +314,7 @@ Amd7930_empty_Dfifo(struct IsdnCardState *cs, int flag) · 313 unmodified lines | ||
| 314 | 314 | |
| 315 | 315 | t += sprintf(t, "Amd7930: empty_Dfifo cnt: %d |", cs->rcvidx); |
| 316 | 316 | QuickHex(t, cs->rcvbuf, cs->rcvidx); |
| 317 | − debugl1(cs, cs->dlog); | |
| 317 | + debugl1(cs, "%s", cs->dlog); | |
| 318 | 318 | } |
| 319 | 319 | /* moves received data in sk-buffer */ |
| 320 | 320 | memcpy(skb_put(skb, cs->rcvidx), cs->rcvbuf, cs->rcvidx); |
| @@ -406,7 +406,7 @@ Amd7930_fill_Dfifo(struct IsdnCardState *cs) · 85 unmodified lines | ||
| 406 | 406 | |
| 407 | 407 | t += sprintf(t, "Amd7930: fill_Dfifo cnt: %d |", count); |
| 408 | 408 | QuickHex(t, deb_ptr, count); |
| 409 | − debugl1(cs, cs->dlog); | |
| 409 | + debugl1(cs, "%s", cs->dlog); | |
| 410 | 410 | } |
| 411 | 411 | /* AMD interrupts on */ |
| 412 | 412 | AmdIrqOn(cs); |
| @@ -285,7 +285,7 @@ hdlc_empty_fifo(struct BCState *bcs, int count) · 284 unmodified lines | ||
| 285 | 285 | t += sprintf(t, "hdlc_empty_fifo %c cnt %d", |
| 286 | 286 | bcs->channel ? 'B' : 'A', count); |
| 287 | 287 | QuickHex(t, p, count); |
| 288 | − debugl1(cs, bcs->blog); | |
| 288 | + debugl1(cs, "%s", bcs->blog); | |
| 289 | 289 | } |
| 290 | 290 | } |
| 291 | 291 | |
| @@ -345,7 +345,7 @@ hdlc_fill_fifo(struct BCState *bcs) · 53 unmodified lines | ||
| 345 | 345 | t += sprintf(t, "hdlc_fill_fifo %c cnt %d", |
| 346 | 346 | bcs->channel ? 'B' : 'A', count); |
| 347 | 347 | QuickHex(t, p, count); |
| 348 | − debugl1(cs, bcs->blog); | |
| 348 | + debugl1(cs, "%s", bcs->blog); | |
| 349 | 349 | } |
| 350 | 350 | } |
| 351 | 351 | |
| @@ -1896,7 +1896,7 @@ static void EChannel_proc_rcv(struct hisax_d_if *d_if) · 1895 unmodified lines | ||
| 1896 | 1896 | ptr--; |
| 1897 | 1897 | *ptr++ = '\n'; |
| 1898 | 1898 | *ptr = 0; |
| 1899 | − HiSax_putstatus(cs, NULL, cs->dlog); | |
| 1899 | + HiSax_putstatus(cs, NULL, "%s", cs->dlog); | |
| 1900 | 1900 | } else |
| 1901 | 1901 | HiSax_putstatus(cs, "LogEcho: ", |
| 1902 | 1902 | "warning Frame too big (%d)", |
| @@ -427,7 +427,7 @@ Memhscx_empty_fifo(struct BCState *bcs, int count) · 426 unmodified lines | ||
| 427 | 427 | t += sprintf(t, "hscx_empty_fifo %c cnt %d", |
| 428 | 428 | bcs->hw.hscx.hscx ? 'B' : 'A', count); |
| 429 | 429 | QuickHex(t, ptr, count); |
| 430 | − debugl1(cs, bcs->blog); | |
| 430 | + debugl1(cs, "%s", bcs->blog); | |
| 431 | 431 | } |
| 432 | 432 | } |
| 433 | 433 | |
| @@ -469,7 +469,7 @@ Memhscx_fill_fifo(struct BCState *bcs) · 35 unmodified lines | ||
| 469 | 469 | t += sprintf(t, "hscx_fill_fifo %c cnt %d", |
| 470 | 470 | bcs->hw.hscx.hscx ? 'B' : 'A', count); |
| 471 | 471 | QuickHex(t, ptr, count); |
| 472 | − debugl1(cs, bcs->blog); | |
| 472 | + debugl1(cs, "%s", bcs->blog); | |
| 473 | 473 | } |
| 474 | 474 | } |
| 475 | 475 | |
| @@ -535,7 +535,7 @@ check_arcofi(struct IsdnCardState *cs) · 534 unmodified lines | ||
| 535 | 535 | t = tmp; |
| 536 | 536 | t += sprintf(tmp, "Arcofi data"); |
| 537 | 537 | QuickHex(t, p, cs->dc.isac.mon_rxp); |
| 538 | − debugl1(cs, tmp); | |
| 538 | + debugl1(cs, "%s", tmp); | |
| 539 | 539 | if ((cs->dc.isac.mon_rxp == 2) && (cs->dc.isac.mon_rx[0] == 0xa0)) { |
| 540 | 540 | switch (cs->dc.isac.mon_rx[1]) { |
| 541 | 541 | case 0x80: |
| @@ -344,7 +344,7 @@ static inline void receive_chars(struct IsdnCardState *cs, · 343 unmodified lines | ||
| 344 | 344 | |
| 345 | 345 | t += sprintf(t, "modem read cnt %d", cs->hw.elsa.rcvcnt); |
| 346 | 346 | QuickHex(t, cs->hw.elsa.rcvbuf, cs->hw.elsa.rcvcnt); |
| 347 | − debugl1(cs, tmp); | |
| 347 | + debugl1(cs, "%s", tmp); | |
| 348 | 348 | } |
| 349 | 349 | cs->hw.elsa.rcvcnt = 0; |
| 350 | 350 | } |
| @@ -901,7 +901,7 @@ Begin: · 900 unmodified lines | ||
| 901 | 901 | ptr--; |
| 902 | 902 | *ptr++ = '\n'; |
| 903 | 903 | *ptr = 0; |
| 904 | − HiSax_putstatus(cs, NULL, cs->dlog); | |
| 904 | + HiSax_putstatus(cs, NULL, "%s", cs->dlog); | |
| 905 | 905 | } else |
| 906 | 906 | HiSax_putstatus(cs, "LogEcho: ", "warning Frame too big (%d)", total - 3); |
| 907 | 907 | } |
| @@ -674,7 +674,7 @@ receive_emsg(struct IsdnCardState *cs) · 673 unmodified lines | ||
| 674 | 674 | ptr--; |
| 675 | 675 | *ptr++ = '\n'; |
| 676 | 676 | *ptr = 0; |
| 677 | − HiSax_putstatus(cs, NULL, cs->dlog); | |
| 677 | + HiSax_putstatus(cs, NULL, "%s", cs->dlog); | |
| 678 | 678 | } else |
| 679 | 679 | HiSax_putstatus(cs, "LogEcho: ", "warning Frame too big (%d)", skb->len); |
| 680 | 680 | } |
| @@ -75,7 +75,7 @@ hscx_empty_fifo(struct BCState *bcs, int count) · 74 unmodified lines | ||
| 75 | 75 | t += sprintf(t, "hscx_empty_fifo %c cnt %d", |
| 76 | 76 | bcs->hw.hscx.hscx ? 'B' : 'A', count); |
| 77 | 77 | QuickHex(t, ptr, count); |
| 78 | − debugl1(cs, bcs->blog); | |
| 78 | + debugl1(cs, "%s", bcs->blog); | |
| 79 | 79 | } |
| 80 | 80 | } |
| 81 | 81 | |
| @@ -115,7 +115,7 @@ hscx_fill_fifo(struct BCState *bcs) · 33 unmodified lines | ||
| 115 | 115 | t += sprintf(t, "hscx_fill_fifo %c cnt %d", |
| 116 | 116 | bcs->hw.hscx.hscx ? 'B' : 'A', count); |
| 117 | 117 | QuickHex(t, ptr, count); |
| 118 | − debugl1(cs, bcs->blog); | |
| 118 | + debugl1(cs, "%s", bcs->blog); | |
| 119 | 119 | } |
| 120 | 120 | } |
| 121 | 121 | |
| @@ -134,7 +134,7 @@ icc_empty_fifo(struct IsdnCardState *cs, int count) · 133 unmodified lines | ||
| 134 | 134 | |
| 135 | 135 | t += sprintf(t, "icc_empty_fifo cnt %d", count); |
| 136 | 136 | QuickHex(t, ptr, count); |
| 137 | − debugl1(cs, cs->dlog); | |
| 137 | + debugl1(cs, "%s", cs->dlog); | |
| 138 | 138 | } |
| 139 | 139 | } |
| 140 | 140 | |
| @@ -176,7 +176,7 @@ icc_fill_fifo(struct IsdnCardState *cs) · 35 unmodified lines | ||
| 176 | 176 | |
| 177 | 177 | t += sprintf(t, "icc_fill_fifo cnt %d", count); |
| 178 | 178 | QuickHex(t, ptr, count); |
| 179 | − debugl1(cs, cs->dlog); | |
| 179 | + debugl1(cs, "%s", cs->dlog); | |
| 180 | 180 | } |
| 181 | 181 | } |
| 182 | 182 | |
| @@ -260,7 +260,7 @@ dch_empty_fifo(struct IsdnCardState *cs, int count) · 259 unmodified lines | ||
| 260 | 260 | |
| 261 | 261 | t += sprintf(t, "dch_empty_fifo() cnt %d", count); |
| 262 | 262 | QuickHex(t, ptr, count); |
| 263 | − debugl1(cs, cs->dlog); | |
| 263 | + debugl1(cs, "%s", cs->dlog); | |
| 264 | 264 | } |
| 265 | 265 | } |
| 266 | 266 | |
| @@ -307,7 +307,7 @@ dch_fill_fifo(struct IsdnCardState *cs) · 40 unmodified lines | ||
| 307 | 307 | |
| 308 | 308 | t += sprintf(t, "dch_fill_fifo() cnt %d", count); |
| 309 | 309 | QuickHex(t, ptr, count); |
| 310 | − debugl1(cs, cs->dlog); | |
| 310 | + debugl1(cs, "%s", cs->dlog); | |
| 311 | 311 | } |
| 312 | 312 | } |
| 313 | 313 | |
| @@ -539,7 +539,7 @@ bch_empty_fifo(struct BCState *bcs, int count) · 225 unmodified lines | ||
| 539 | 539 | |
| 540 | 540 | t += sprintf(t, "bch_empty_fifo() B-%d cnt %d", hscx, count); |
| 541 | 541 | QuickHex(t, ptr, count); |
| 542 | − debugl1(cs, bcs->blog); | |
| 542 | + debugl1(cs, "%s", bcs->blog); | |
| 543 | 543 | } |
| 544 | 544 | } |
| 545 | 545 | |
| @@ -582,7 +582,7 @@ bch_fill_fifo(struct BCState *bcs) · 36 unmodified lines | ||
| 582 | 582 | |
| 583 | 583 | t += sprintf(t, "chb_fill_fifo() B-%d cnt %d", hscx, count); |
| 584 | 584 | QuickHex(t, ptr, count); |
| 585 | − debugl1(cs, bcs->blog); | |
| 585 | + debugl1(cs, "%s", bcs->blog); | |
| 586 | 586 | } |
| 587 | 587 | } |
| 588 | 588 | |
| @@ -137,7 +137,7 @@ isac_empty_fifo(struct IsdnCardState *cs, int count) · 136 unmodified lines | ||
| 137 | 137 | |
| 138 | 138 | t += sprintf(t, "isac_empty_fifo cnt %d", count); |
| 139 | 139 | QuickHex(t, ptr, count); |
| 140 | − debugl1(cs, cs->dlog); | |
| 140 | + debugl1(cs, "%s", cs->dlog); | |
| 141 | 141 | } |
| 142 | 142 | } |
| 143 | 143 | |
| @@ -179,7 +179,7 @@ isac_fill_fifo(struct IsdnCardState *cs) · 35 unmodified lines | ||
| 179 | 179 | |
| 180 | 180 | t += sprintf(t, "isac_fill_fifo cnt %d", count); |
| 181 | 181 | QuickHex(t, ptr, count); |
| 182 | − debugl1(cs, cs->dlog); | |
| 182 | + debugl1(cs, "%s", cs->dlog); | |
| 183 | 183 | } |
| 184 | 184 | } |
| 185 | 185 | |
| @@ -74,7 +74,7 @@ sendmsg(struct IsdnCardState *cs, u_char his, u_char creg, u_char len, · 73 unmodified lines | ||
| 74 | 74 | t = tmp; |
| 75 | 75 | t += sprintf(t, "sendmbox cnt %d", len); |
| 76 | 76 | QuickHex(t, &msg[len-i], (i > 64) ? 64 : i); |
| 77 | − debugl1(cs, tmp); | |
| 77 | + debugl1(cs, "%s", tmp); | |
| 78 | 78 | i -= 64; |
| 79 | 79 | } |
| 80 | 80 | } |
| @@ -105,7 +105,7 @@ rcv_mbox(struct IsdnCardState *cs, struct isar_reg *ireg, u_char *msg) · 24 unmodified lines | ||
| 105 | 105 | t = tmp; |
| 106 | 106 | t += sprintf(t, "rcv_mbox cnt %d", ireg->clsb); |
| 107 | 107 | QuickHex(t, &msg[ireg->clsb - i], (i > 64) ? 64 : i); |
| 108 | − debugl1(cs, tmp); | |
| 108 | + debugl1(cs, "%s", tmp); | |
| 109 | 109 | i -= 64; |
| 110 | 110 | } |
| 111 | 111 | } |
| @@ -1248,7 +1248,7 @@ isar_int_main(struct IsdnCardState *cs) · 1136 unmodified lines | ||
| 1248 | 1248 | tp += sprintf(debbuf, "msg iis(%x) msb(%x)", |
| 1249 | 1249 | ireg->iis, ireg->cmsb); |
| 1250 | 1250 | QuickHex(tp, (u_char *)ireg->par, ireg->clsb); |
| 1251 | − debugl1(cs, debbuf); | |
| 1251 | + debugl1(cs, "%s", debbuf); | |
| 1252 | 1252 | } |
| 1253 | 1253 | break; |
| 1254 | 1254 | case ISAR_IIS_INVMSG: |
| @@ -81,10 +81,7 @@ modejade(struct BCState *bcs, int mode, int bc) · 80 unmodified lines | ||
| 81 | 81 | int jade = bcs->hw.hscx.hscx; |
| 82 | 82 | |
| 83 | 83 | if (cs->debug & L1_DEB_HSCX) { |
| 84 | − char tmp[40]; | |
| 85 | − sprintf(tmp, "jade %c mode %d ichan %d", | |
| 86 | − 'A' + jade, mode, bc); | |
| 87 | − debugl1(cs, tmp); | |
| 84 | + debugl1(cs, "jade %c mode %d ichan %d", 'A' + jade, mode, bc); | |
| 88 | 85 | } |
| 89 | 86 | bcs->mode = mode; |
| 90 | 87 | bcs->channel = bc; |
| @@ -257,23 +254,18 @@ void · 166 unmodified lines | ||
| 257 | 254 | clear_pending_jade_ints(struct IsdnCardState *cs) |
| 258 | 255 | { |
| 259 | 256 | int val; |
| 260 | − char tmp[64]; | |
| 261 | 257 | |
| 262 | 258 | cs->BC_Write_Reg(cs, 0, jade_HDLC_IMR, 0x00); |
| 263 | 259 | cs->BC_Write_Reg(cs, 1, jade_HDLC_IMR, 0x00); |
| 264 | 260 | |
| 265 | 261 | val = cs->BC_Read_Reg(cs, 1, jade_HDLC_ISR); |
| 266 | − sprintf(tmp, "jade B ISTA %x", val); | |
| 267 | − debugl1(cs, tmp); | |
| 262 | + debugl1(cs, "jade B ISTA %x", val); | |
| 268 | 263 | val = cs->BC_Read_Reg(cs, 0, jade_HDLC_ISR); |
| 269 | − sprintf(tmp, "jade A ISTA %x", val); | |
| 270 | − debugl1(cs, tmp); | |
| 264 | + debugl1(cs, "jade A ISTA %x", val); | |
| 271 | 265 | val = cs->BC_Read_Reg(cs, 1, jade_HDLC_STAR); |
| 272 | − sprintf(tmp, "jade B STAR %x", val); | |
| 273 | − debugl1(cs, tmp); | |
| 266 | + debugl1(cs, "jade B STAR %x", val); | |
| 274 | 267 | val = cs->BC_Read_Reg(cs, 0, jade_HDLC_STAR); |
| 275 | − sprintf(tmp, "jade A STAR %x", val); | |
| 276 | − debugl1(cs, tmp); | |
| 268 | + debugl1(cs, "jade A STAR %x", val); | |
| 277 | 269 | /* Unmask ints */ |
| 278 | 270 | cs->BC_Write_Reg(cs, 0, jade_HDLC_IMR, 0xF8); |
| 279 | 271 | cs->BC_Write_Reg(cs, 1, jade_HDLC_IMR, 0xF8); |
| @@ -65,7 +65,7 @@ jade_empty_fifo(struct BCState *bcs, int count) · 64 unmodified lines | ||
| 65 | 65 | t += sprintf(t, "jade_empty_fifo %c cnt %d", |
| 66 | 66 | bcs->hw.hscx.hscx ? 'B' : 'A', count); |
| 67 | 67 | QuickHex(t, ptr, count); |
| 68 | − debugl1(cs, bcs->blog); | |
| 68 | + debugl1(cs, "%s", bcs->blog); | |
| 69 | 69 | } |
| 70 | 70 | } |
| 71 | 71 | |
| @@ -105,7 +105,7 @@ jade_fill_fifo(struct BCState *bcs) · 33 unmodified lines | ||
| 105 | 105 | t += sprintf(t, "jade_fill_fifo %c cnt %d", |
| 106 | 106 | bcs->hw.hscx.hscx ? 'B' : 'A', count); |
| 107 | 107 | QuickHex(t, ptr, count); |
| 108 | − debugl1(cs, bcs->blog); | |
| 108 | + debugl1(cs, "%s", bcs->blog); | |
| 109 | 109 | } |
| 110 | 110 | } |
| 111 | 111 | |
| @@ -63,7 +63,7 @@ l3_1tr6_error(struct l3_process *pc, u_char *msg, struct sk_buff *skb) · 62 unmodified lines | ||
| 63 | 63 | { |
| 64 | 64 | dev_kfree_skb(skb); |
| 65 | 65 | if (pc->st->l3.debug & L3_DEB_WARN) |
| 66 | − l3_debug(pc->st, msg); | |
| 66 | + l3_debug(pc->st, "%s", msg); | |
| 67 | 67 | l3_1tr6_release_req(pc, 0, NULL); |
| 68 | 68 | } |
| 69 | 69 | |
| @@ -161,7 +161,6 @@ l3_1tr6_setup(struct l3_process *pc, u_char pr, void *arg) · 91 unmodified lines | ||
| 161 | 161 | { |
| 162 | 162 | u_char *p; |
| 163 | 163 | int bcfound = 0; |
| 164 | − char tmp[80]; | |
| 165 | 164 | struct sk_buff *skb = arg; |
| 166 | 165 | |
| 167 | 166 | /* Channel Identification */ |
| @@ -214,10 +213,9 @@ l3_1tr6_setup(struct l3_process *pc, u_char pr, void *arg) · 46 unmodified lines | ||
| 214 | 213 | /* Signal all services, linklevel takes care of Service-Indicator */ |
| 215 | 214 | if (bcfound) { |
| 216 | 215 | if ((pc->para.setup.si1 != 7) && (pc->st->l3.debug & L3_DEB_WARN)) { |
| 217 | − sprintf(tmp, "non-digital call: %s -> %s", | |
| 216 | + l3_debug(pc->st, "non-digital call: %s -> %s", | |
| 218 | 217 | pc->para.setup.phone, |
| 219 | 218 | pc->para.setup.eazmsn); |
| 220 | − l3_debug(pc->st, tmp); | |
| 221 | 219 | } |
| 222 | 220 | newl3state(pc, 6); |
| 223 | 221 | pc->st->l3.l3l4(pc->st, CC_SETUP | INDICATION, pc); |
| @@ -301,7 +299,7 @@ l3_1tr6_info(struct l3_process *pc, u_char pr, void *arg) · 77 unmodified lines | ||
| 301 | 299 | { |
| 302 | 300 | u_char *p; |
| 303 | 301 | int i, tmpcharge = 0; |
| 304 | − char a_charge[8], tmp[32]; | |
| 302 | + char a_charge[8]; | |
| 305 | 303 | struct sk_buff *skb = arg; |
| 306 | 304 | |
| 307 | 305 | p = skb->data; |
| @@ -316,8 +314,8 @@ l3_1tr6_info(struct l3_process *pc, u_char pr, void *arg) · 8 unmodified lines | ||
| 316 | 314 | pc->st->l3.l3l4(pc->st, CC_CHARGE | INDICATION, pc); |
| 317 | 315 | } |
| 318 | 316 | if (pc->st->l3.debug & L3_DEB_CHARGE) { |
| 319 | − sprintf(tmp, "charging info %d", pc->para.chargeinfo); | |
| 320 | − l3_debug(pc->st, tmp); | |
| 317 | + l3_debug(pc->st, "charging info %d", | |
| 318 | + pc->para.chargeinfo); | |
| 321 | 319 | } |
| 322 | 320 | } else if (pc->st->l3.debug & L3_DEB_CHARGE) |
| 323 | 321 | l3_debug(pc->st, "charging info not found"); |
| @@ -399,7 +397,7 @@ l3_1tr6_disc(struct l3_process *pc, u_char pr, void *arg) · 75 unmodified lines | ||
| 399 | 397 | struct sk_buff *skb = arg; |
| 400 | 398 | u_char *p; |
| 401 | 399 | int i, tmpcharge = 0; |
| 402 | − char a_charge[8], tmp[32]; | |
| 400 | + char a_charge[8]; | |
| 403 | 401 | |
| 404 | 402 | StopAllL3Timer(pc); |
| 405 | 403 | p = skb->data; |
| @@ -414,8 +412,8 @@ l3_1tr6_disc(struct l3_process *pc, u_char pr, void *arg) · 8 unmodified lines | ||
| 414 | 412 | pc->st->l3.l3l4(pc->st, CC_CHARGE | INDICATION, pc); |
| 415 | 413 | } |
| 416 | 414 | if (pc->st->l3.debug & L3_DEB_CHARGE) { |
| 417 | − sprintf(tmp, "charging info %d", pc->para.chargeinfo); | |
| 418 | − l3_debug(pc->st, tmp); | |
| 415 | + l3_debug(pc->st, "charging info %d", | |
| 416 | + pc->para.chargeinfo); | |
| 419 | 417 | } |
| 420 | 418 | } else if (pc->st->l3.debug & L3_DEB_CHARGE) |
| 421 | 419 | l3_debug(pc->st, "charging info not found"); |
| @@ -746,7 +744,6 @@ up1tr6(struct PStack *st, int pr, void *arg) · 324 unmodified lines | ||
| 746 | 744 | int i, mt, cr; |
| 747 | 745 | struct l3_process *proc; |
| 748 | 746 | struct sk_buff *skb = arg; |
| 749 | − char tmp[80]; | |
| 750 | 747 | |
| 751 | 748 | switch (pr) { |
| 752 | 749 | case (DL_DATA | INDICATION): |
| @@ -762,26 +759,23 @@ up1tr6(struct PStack *st, int pr, void *arg) · 9 unmodified lines | ||
| 762 | 759 | } |
| 763 | 760 | if (skb->len < 4) { |
| 764 | 761 | if (st->l3.debug & L3_DEB_PROTERR) { |
| 765 | − sprintf(tmp, "up1tr6 len only %d", skb->len); | |
| 766 | − l3_debug(st, tmp); | |
| 762 | + l3_debug(st, "up1tr6 len only %d", skb->len); | |
| 767 | 763 | } |
| 768 | 764 | dev_kfree_skb(skb); |
| 769 | 765 | return; |
| 770 | 766 | } |
| 771 | 767 | if ((skb->data[0] & 0xfe) != PROTO_DIS_N0) { |
| 772 | 768 | if (st->l3.debug & L3_DEB_PROTERR) { |
| 773 | − sprintf(tmp, "up1tr6%sunexpected discriminator %x message len %d", | |
| 769 | + l3_debug(st, "up1tr6%sunexpected discriminator %x message len %d", | |
| 774 | 770 | (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ", |
| 775 | 771 | skb->data[0], skb->len); |
| 776 | − l3_debug(st, tmp); | |
| 777 | 772 | } |
| 778 | 773 | dev_kfree_skb(skb); |
| 779 | 774 | return; |
| 780 | 775 | } |
| 781 | 776 | if (skb->data[1] != 1) { |
| 782 | 777 | if (st->l3.debug & L3_DEB_PROTERR) { |
| 783 | − sprintf(tmp, "up1tr6 CR len not 1"); | |
| 784 | − l3_debug(st, tmp); | |
| 778 | + l3_debug(st, "up1tr6 CR len not 1"); | |
| 785 | 779 | } |
| 786 | 780 | dev_kfree_skb(skb); |
| 787 | 781 | return; |
| @@ -791,9 +785,8 @@ up1tr6(struct PStack *st, int pr, void *arg) · 3 unmodified lines | ||
| 791 | 785 | if (skb->data[0] == PROTO_DIS_N0) { |
| 792 | 786 | dev_kfree_skb(skb); |
| 793 | 787 | if (st->l3.debug & L3_DEB_STATE) { |
| 794 | − sprintf(tmp, "up1tr6%s N0 mt %x unhandled", | |
| 788 | + l3_debug(st, "up1tr6%s N0 mt %x unhandled", | |
| 795 | 789 | (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ", mt); |
| 796 | − l3_debug(st, tmp); | |
| 797 | 790 | } |
| 798 | 791 | } else if (skb->data[0] == PROTO_DIS_N1) { |
| 799 | 792 | if (!(proc = getl3proc(st, cr))) { |
| @@ -801,8 +794,7 @@ up1tr6(struct PStack *st, int pr, void *arg) · 1 unmodified line | ||
| 801 | 794 | if (cr < 128) { |
| 802 | 795 | if (!(proc = new_l3_process(st, cr))) { |
| 803 | 796 | if (st->l3.debug & L3_DEB_PROTERR) { |
| 804 | − sprintf(tmp, "up1tr6 no roc mem"); | |
| 805 | − l3_debug(st, tmp); | |
| 797 | + l3_debug(st, "up1tr6 no roc mem"); | |
| 806 | 798 | } |
| 807 | 799 | dev_kfree_skb(skb); |
| 808 | 800 | return; |
| @@ -821,8 +813,7 @@ up1tr6(struct PStack *st, int pr, void *arg) · 12 unmodified lines | ||
| 821 | 813 | } else { |
| 822 | 814 | if (!(proc = new_l3_process(st, cr))) { |
| 823 | 815 | if (st->l3.debug & L3_DEB_PROTERR) { |
| 824 | − sprintf(tmp, "up1tr6 no roc mem"); | |
| 825 | − l3_debug(st, tmp); | |
| 816 | + l3_debug(st, "up1tr6 no roc mem"); | |
| 826 | 817 | } |
| 827 | 818 | dev_kfree_skb(skb); |
| 828 | 819 | return; |
| @@ -837,18 +828,16 @@ up1tr6(struct PStack *st, int pr, void *arg) · 8 unmodified lines | ||
| 837 | 828 | if (i == ARRAY_SIZE(datastln1)) { |
| 838 | 829 | dev_kfree_skb(skb); |
| 839 | 830 | if (st->l3.debug & L3_DEB_STATE) { |
| 840 | − sprintf(tmp, "up1tr6%sstate %d mt %x unhandled", | |
| 831 | + l3_debug(st, "up1tr6%sstate %d mt %x unhandled", | |
| 841 | 832 | (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ", |
| 842 | 833 | proc->state, mt); |
| 843 | − l3_debug(st, tmp); | |
| 844 | 834 | } |
| 845 | 835 | return; |
| 846 | 836 | } else { |
| 847 | 837 | if (st->l3.debug & L3_DEB_STATE) { |
| 848 | − sprintf(tmp, "up1tr6%sstate %d mt %x", | |
| 838 | + l3_debug(st, "up1tr6%sstate %d mt %x", | |
| 849 | 839 | (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ", |
| 850 | 840 | proc->state, mt); |
| 851 | − l3_debug(st, tmp); | |
| 852 | 841 | } |
| 853 | 842 | datastln1[i].rout(proc, pr, skb); |
| 854 | 843 | } |
| @@ -861,7 +850,6 @@ down1tr6(struct PStack *st, int pr, void *arg) · 6 unmodified lines | ||
| 861 | 850 | int i, cr; |
| 862 | 851 | struct l3_process *proc; |
| 863 | 852 | struct Channel *chan; |
| 864 | − char tmp[80]; | |
| 865 | 853 | |
| 866 | 854 | if ((DL_ESTABLISH | REQUEST) == pr) { |
| 867 | 855 | l3_msg(st, pr, NULL); |
| @@ -888,15 +876,13 @@ down1tr6(struct PStack *st, int pr, void *arg) · 20 unmodified lines | ||
| 888 | 876 | break; |
| 889 | 877 | if (i == ARRAY_SIZE(downstl)) { |
| 890 | 878 | if (st->l3.debug & L3_DEB_STATE) { |
| 891 | − sprintf(tmp, "down1tr6 state %d prim %d unhandled", | |
| 879 | + l3_debug(st, "down1tr6 state %d prim %d unhandled", | |
| 892 | 880 | proc->state, pr); |
| 893 | − l3_debug(st, tmp); | |
| 894 | 881 | } |
| 895 | 882 | } else { |
| 896 | 883 | if (st->l3.debug & L3_DEB_STATE) { |
| 897 | − sprintf(tmp, "down1tr6 state %d prim %d", | |
| 884 | + l3_debug(st, "down1tr6 state %d prim %d", | |
| 898 | 885 | proc->state, pr); |
| 899 | − l3_debug(st, tmp); | |
| 900 | 886 | } |
| 901 | 887 | downstl[i].rout(proc, pr, arg); |
| 902 | 888 | } |
| @@ -176,7 +176,7 @@ static void printframe(struct IsdnCardState *cs, u_char *buf, int count, char *s · 175 unmodified lines | ||
| 176 | 176 | else |
| 177 | 177 | j = i; |
| 178 | 178 | QuickHex(t, p, j); |
| 179 | − debugl1(cs, tmp); | |
| 179 | + debugl1(cs, "%s", tmp); | |
| 180 | 180 | p += j; |
| 181 | 181 | i -= j; |
| 182 | 182 | t = tmp; |
| @@ -1179,7 +1179,7 @@ LogFrame(struct IsdnCardState *cs, u_char *buf, int size) · 1178 unmodified lines | ||
| 1179 | 1179 | dp--; |
| 1180 | 1180 | *dp++ = '\n'; |
| 1181 | 1181 | *dp = 0; |
| 1182 | − HiSax_putstatus(cs, NULL, cs->dlog); | |
| 1182 | + HiSax_putstatus(cs, NULL, "%s", cs->dlog); | |
| 1183 | 1183 | } else |
| 1184 | 1184 | HiSax_putstatus(cs, "LogFrame: ", "warning Frame too big (%d)", size); |
| 1185 | 1185 | } |
| @@ -1246,7 +1246,7 @@ dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir) · 60 unmodified lines | ||
| 1246 | 1246 | } |
| 1247 | 1247 | if (finish) { |
| 1248 | 1248 | *dp = 0; |
| 1249 | − HiSax_putstatus(cs, NULL, cs->dlog); | |
| 1249 | + HiSax_putstatus(cs, NULL, "%s", cs->dlog); | |
| 1250 | 1250 | return; |
| 1251 | 1251 | } |
| 1252 | 1252 | if ((0xfe & buf[0]) == PROTO_DIS_N0) { /* 1TR6 */ |
| @@ -1509,5 +1509,5 @@ dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir) · 256 unmodified lines | ||
| 1509 | 1509 | dp += sprintf(dp, "Unknown protocol %x!", buf[0]); |
| 1510 | 1510 | } |
| 1511 | 1511 | *dp = 0; |
| 1512 | − HiSax_putstatus(cs, NULL, cs->dlog); | |
| 1512 | + HiSax_putstatus(cs, NULL, "%s", cs->dlog); | |
| 1513 | 1513 | } |
| @@ -154,7 +154,7 @@ W6692_empty_fifo(struct IsdnCardState *cs, int count) · 153 unmodified lines | ||
| 154 | 154 | |
| 155 | 155 | t += sprintf(t, "W6692_empty_fifo cnt %d", count); |
| 156 | 156 | QuickHex(t, ptr, count); |
| 157 | − debugl1(cs, cs->dlog); | |
| 157 | + debugl1(cs, "%s", cs->dlog); | |
| 158 | 158 | } |
| 159 | 159 | } |
| 160 | 160 | |
| @@ -196,7 +196,7 @@ W6692_fill_fifo(struct IsdnCardState *cs) · 35 unmodified lines | ||
| 196 | 196 | |
| 197 | 197 | t += sprintf(t, "W6692_fill_fifo cnt %d", count); |
| 198 | 198 | QuickHex(t, ptr, count); |
| 199 | − debugl1(cs, cs->dlog); | |
| 199 | + debugl1(cs, "%s", cs->dlog); | |
| 200 | 200 | } |
| 201 | 201 | } |
| 202 | 202 | |
| @@ -226,7 +226,7 @@ W6692B_empty_fifo(struct BCState *bcs, int count) · 23 unmodified lines | ||
| 226 | 226 | t += sprintf(t, "W6692B_empty_fifo %c cnt %d", |
| 227 | 227 | bcs->channel + '1', count); |
| 228 | 228 | QuickHex(t, ptr, count); |
| 229 | − debugl1(cs, bcs->blog); | |
| 229 | + debugl1(cs, "%s", bcs->blog); | |
| 230 | 230 | } |
| 231 | 231 | } |
| 232 | 232 | |
| @@ -264,7 +264,7 @@ W6692B_fill_fifo(struct BCState *bcs) · 31 unmodified lines | ||
| 264 | 264 | t += sprintf(t, "W6692B_fill_fifo %c cnt %d", |
| 265 | 265 | bcs->channel + '1', count); |
| 266 | 266 | QuickHex(t, ptr, count); |
| 267 | − debugl1(cs, bcs->blog); | |
| 267 | + debugl1(cs, "%s", bcs->blog); | |
| 268 | 268 | } |
| 269 | 269 | } |
| 270 | 270 | |
| @@ -325,7 +325,6 @@ static int omap2_mbox_remove(struct platform_device *pdev) · 324 unmodified lines | ||
| 325 | 325 | kfree(privblk); |
| 326 | 326 | kfree(mboxblk); |
| 327 | 327 | kfree(list); |
| 328 | − platform_set_drvdata(pdev, NULL); | |
| 329 | 328 | |
| 330 | 329 | return 0; |
| 331 | 330 | } |
| @@ -498,7 +498,7 @@ struct cached_dev { · 497 unmodified lines | ||
| 498 | 498 | */ |
| 499 | 499 | atomic_t has_dirty; |
| 500 | 500 | |
| 501 | − struct ratelimit writeback_rate; | |
| 501 | + struct bch_ratelimit writeback_rate; | |
| 502 | 502 | struct delayed_work writeback_rate_update; |
| 503 | 503 | |
| 504 | 504 | /* |
| @@ -507,10 +507,9 @@ struct cached_dev { · 2 unmodified lines | ||
| 507 | 507 | */ |
| 508 | 508 | sector_t last_read; |
| 509 | 509 | |
| 510 | − /* Number of writeback bios in flight */ | |
| 511 | − atomic_t in_flight; | |
| 510 | + /* Limit number of writeback bios in flight */ | |
| 511 | + struct semaphore in_flight; | |
| 512 | 512 | struct closure_with_timer writeback; |
| 513 | − struct closure_waitlist writeback_wait; | |
| 514 | 513 | |
| 515 | 514 | struct keybuf writeback_keys; |
| 516 | 515 | |
| @@ -926,28 +926,45 @@ struct bkey *bch_next_recurse_key(struct btree *b, struct bkey *search) · 925 unmodified lines | ||
| 926 | 926 | |
| 927 | 927 | /* Mergesort */ |
| 928 | 928 | |
| 929 | +static void sort_key_next(struct btree_iter *iter, | |
| 930 | + struct btree_iter_set *i) | |
| 931 | +{ | |
| 932 | + i->k = bkey_next(i->k); | |
| 933 | + | |
| 934 | + if (i->k == i->end) | |
| 935 | + *i = iter->data[--iter->used]; | |
| 936 | +} | |
| 937 | + | |
| 929 | 938 | static void btree_sort_fixup(struct btree_iter *iter) |
| 930 | 939 | { |
| 931 | 940 | while (iter->used > 1) { |
| 932 | 941 | struct btree_iter_set *top = iter->data, *i = top + 1; |
| 933 | − struct bkey *k; | |
| 934 | 942 | |
| 935 | 943 | if (iter->used > 2 && |
| 936 | 944 | btree_iter_cmp(i[0], i[1])) |
| 937 | 945 | i++; |
| 938 | 946 | |
| 939 | − for (k = i->k; | |
| 940 | − k != i->end && bkey_cmp(top->k, &START_KEY(k)) > 0; | |
| 941 | − k = bkey_next(k)) | |
| 942 | − if (top->k > i->k) | |
| 943 | − __bch_cut_front(top->k, k); | |
| 944 | − else if (KEY_SIZE(k)) | |
| 945 | − bch_cut_back(&START_KEY(k), top->k); | |
| 946 | − | |
| 947 | − if (top->k < i->k || k == i->k) | |
| 947 | + if (bkey_cmp(top->k, &START_KEY(i->k)) <= 0) | |
| 948 | 948 | break; |
| 949 | 949 | |
| 950 | − heap_sift(iter, i - top, btree_iter_cmp); | |
| 950 | + if (!KEY_SIZE(i->k)) { | |
| 951 | + sort_key_next(iter, i); | |
| 952 | + heap_sift(iter, i - top, btree_iter_cmp); | |
| 953 | + continue; | |
| 954 | + } | |
| 955 | + | |
| 956 | + if (top->k > i->k) { | |
| 957 | + if (bkey_cmp(top->k, i->k) >= 0) | |
| 958 | + sort_key_next(iter, i); | |
| 959 | + else | |
| 960 | + bch_cut_front(top->k, i->k); | |
| 961 | + | |
| 962 | + heap_sift(iter, i - top, btree_iter_cmp); | |
| 963 | + } else { | |
| 964 | + /* can't happen because of comparison func */ | |
| 965 | + BUG_ON(!bkey_cmp(&START_KEY(top->k), &START_KEY(i->k))); | |
| 966 | + bch_cut_back(&START_KEY(i->k), top->k); | |
| 967 | + } | |
| 951 | 968 | } |
| 952 | 969 | } |
| 953 | 970 | |
| @@ -255,7 +255,7 @@ void bch_btree_node_read(struct btree *b) · 254 unmodified lines | ||
| 255 | 255 | |
| 256 | 256 | return; |
| 257 | 257 | err: |
| 258 | − bch_cache_set_error(b->c, "io error reading bucket %lu", | |
| 258 | + bch_cache_set_error(b->c, "io error reading bucket %zu", | |
| 259 | 259 | PTR_BUCKET_NR(b->c, &b->key, 0)); |
| 260 | 260 | } |
| 261 | 261 | |
| @@ -612,7 +612,7 @@ static unsigned long bch_mca_scan(struct shrinker *shrink, · 350 unmodified lines | ||
| 612 | 612 | return SHRINK_STOP; |
| 613 | 613 | |
| 614 | 614 | /* Return -1 if we can't do anything right now */ |
| 615 | − if (sc->gfp_mask & __GFP_WAIT) | |
| 615 | + if (sc->gfp_mask & __GFP_IO) | |
| 616 | 616 | mutex_lock(&c->bucket_lock); |
| 617 | 617 | else if (!mutex_trylock(&c->bucket_lock)) |
| 618 | 618 | return -1; |
| @@ -153,7 +153,8 @@ int bch_journal_read(struct cache_set *c, struct list_head *list, · 152 unmodified lines | ||
| 153 | 153 | bitmap_zero(bitmap, SB_JOURNAL_BUCKETS); |
| 154 | 154 | pr_debug("%u journal buckets", ca->sb.njournal_buckets); |
| 155 | 155 | |
| 156 | − /* Read journal buckets ordered by golden ratio hash to quickly | |
| 156 | + /* | |
| 157 | + * Read journal buckets ordered by golden ratio hash to quickly | |
| 157 | 158 | * find a sequence of buckets with valid journal entries |
| 158 | 159 | */ |
| 159 | 160 | for (i = 0; i < ca->sb.njournal_buckets; i++) { |
| @@ -166,18 +167,20 @@ int bch_journal_read(struct cache_set *c, struct list_head *list, · 6 unmodified lines | ||
| 166 | 167 | goto bsearch; |
| 167 | 168 | } |
| 168 | 169 | |
| 169 | − /* If that fails, check all the buckets we haven't checked | |
| 170 | + /* | |
| 171 | + * If that fails, check all the buckets we haven't checked | |
| 170 | 172 | * already |
| 171 | 173 | */ |
| 172 | 174 | pr_debug("falling back to linear search"); |
| 173 | 175 | |
| 174 | − for (l = 0; l < ca->sb.njournal_buckets; l++) { | |
| 175 | − if (test_bit(l, bitmap)) | |
| 176 | − continue; | |
| 177 | − | |
| 176 | + for (l = find_first_zero_bit(bitmap, ca->sb.njournal_buckets); | |
| 177 | + l < ca->sb.njournal_buckets; | |
| 178 | + l = find_next_zero_bit(bitmap, ca->sb.njournal_buckets, l + 1)) | |
| 178 | 179 | if (read_bucket(l)) |
| 179 | 180 | goto bsearch; |
| 180 | − } | |
| 181 | + | |
| 182 | + if (list_empty(list)) | |
| 183 | + continue; | |
| 181 | 184 | bsearch: |
| 182 | 185 | /* Binary search */ |
| 183 | 186 | m = r = find_next_bit(bitmap, ca->sb.njournal_buckets, l + 1); |
| @@ -197,10 +200,12 @@ bsearch: · 13 unmodified lines | ||
| 197 | 200 | r = m; |
| 198 | 201 | } |
| 199 | 202 | |
| 200 | − /* Read buckets in reverse order until we stop finding more | |
| 203 | + /* | |
| 204 | + * Read buckets in reverse order until we stop finding more | |
| 201 | 205 | * journal entries |
| 202 | 206 | */ |
| 203 | − pr_debug("finishing up"); | |
| 207 | + pr_debug("finishing up: m %u njournal_buckets %u", | |
| 208 | + m, ca->sb.njournal_buckets); | |
| 204 | 209 | l = m; |
| 205 | 210 | |
| 206 | 211 | while (1) { |
| @@ -228,9 +233,10 @@ bsearch: · 21 unmodified lines | ||
| 228 | 233 | } |
| 229 | 234 | } |
| 230 | 235 | |
| 231 | − c->journal.seq = list_entry(list->prev, | |
| 232 | − struct journal_replay, | |
| 233 | − list)->j.seq; | |
| 236 | + if (!list_empty(list)) | |
| 237 | + c->journal.seq = list_entry(list->prev, | |
| 238 | + struct journal_replay, | |
| 239 | + list)->j.seq; | |
| 234 | 240 | |
| 235 | 241 | return 0; |
| 236 | 242 | #undef read_bucket |
| @@ -428,7 +434,7 @@ static void do_journal_discard(struct cache *ca) · 191 unmodified lines | ||
| 428 | 434 | return; |
| 429 | 435 | } |
| 430 | 436 | |
| 431 | − switch (atomic_read(&ja->discard_in_flight) == DISCARD_IN_FLIGHT) { | |
| 437 | + switch (atomic_read(&ja->discard_in_flight)) { | |
| 432 | 438 | case DISCARD_IN_FLIGHT: |
| 433 | 439 | return; |
| 434 | 440 | |
| @@ -689,6 +695,7 @@ void bch_journal_meta(struct cache_set *c, struct closure *cl) · 254 unmodified lines | ||
| 689 | 695 | if (cl) |
| 690 | 696 | BUG_ON(!closure_wait(&w->wait, cl)); |
| 691 | 697 | |
| 698 | + closure_flush(&c->journal.io); | |
| 692 | 699 | __journal_try_write(c, true); |
| 693 | 700 | } |
| 694 | 701 | } |
| @@ -997,14 +997,17 @@ static void request_write(struct cached_dev *dc, struct search *s) · 996 unmodified lines | ||
| 997 | 997 | } else { |
| 998 | 998 | bch_writeback_add(dc); |
| 999 | 999 | |
| 1000 | − if (s->op.flush_journal) { | |
| 1000 | + if (bio->bi_rw & REQ_FLUSH) { | |
| 1001 | 1001 | /* Also need to send a flush to the backing device */ |
| 1002 | − s->op.cache_bio = bio_clone_bioset(bio, GFP_NOIO, | |
| 1003 | − dc->disk.bio_split); | |
| 1002 | + struct bio *flush = bio_alloc_bioset(0, GFP_NOIO, | |
| 1003 | + dc->disk.bio_split); | |
| 1004 | 1004 | |
| 1005 | − bio->bi_size = 0; | |
| 1006 | − bio->bi_vcnt = 0; | |
| 1007 | − closure_bio_submit(bio, cl, s->d); | |
| 1005 | + flush->bi_rw = WRITE_FLUSH; | |
| 1006 | + flush->bi_bdev = bio->bi_bdev; | |
| 1007 | + flush->bi_end_io = request_endio; | |
| 1008 | + flush->bi_private = cl; | |
| 1009 | + | |
| 1010 | + closure_bio_submit(flush, cl, s->d); | |
| 1008 | 1011 | } else { |
| 1009 | 1012 | s->op.cache_bio = bio; |
| 1010 | 1013 | } |
| @@ -223,8 +223,13 @@ STORE(__cached_dev) · 222 unmodified lines | ||
| 223 | 223 | } |
| 224 | 224 | |
| 225 | 225 | if (attr == &sysfs_label) { |
| 226 | − /* note: endlines are preserved */ | |
| 227 | − memcpy(dc->sb.label, buf, SB_LABEL_SIZE); | |
| 226 | + if (size > SB_LABEL_SIZE) | |
| 227 | + return -EINVAL; | |
| 228 | + memcpy(dc->sb.label, buf, size); | |
| 229 | + if (size < SB_LABEL_SIZE) | |
| 230 | + dc->sb.label[size] = '\0'; | |
| 231 | + if (size && dc->sb.label[size - 1] == '\n') | |
| 232 | + dc->sb.label[size - 1] = '\0'; | |
| 228 | 233 | bch_write_bdev_super(dc, NULL); |
| 229 | 234 | if (dc->disk.c) { |
| 230 | 235 | memcpy(dc->disk.c->uuids[dc->disk.id].label, |
| @@ -190,7 +190,16 @@ void bch_time_stats_update(struct time_stats *stats, uint64_t start_time) · 189 unmodified lines | ||
| 190 | 190 | stats->last = now ?: 1; |
| 191 | 191 | } |
| 192 | 192 | |
| 193 | −unsigned bch_next_delay(struct ratelimit *d, uint64_t done) | |
| 193 | +/** | |
| 194 | + * bch_next_delay() - increment @d by the amount of work done, and return how | |
| 195 | + * long to delay until the next time to do some work. | |
| 196 | + * | |
| 197 | + * @d - the struct bch_ratelimit to update | |
| 198 | + * @done - the amount of work done, in arbitrary units | |
| 199 | + * | |
| 200 | + * Returns the amount of time to delay by, in jiffies | |
| 201 | + */ | |
| 202 | +uint64_t bch_next_delay(struct bch_ratelimit *d, uint64_t done) | |
| 194 | 203 | { |
| 195 | 204 | uint64_t now = local_clock(); |
| 196 | 205 | |
| @@ -450,17 +450,23 @@ read_attribute(name ## _last_ ## frequency_units) · 449 unmodified lines | ||
| 450 | 450 | (ewma) >> factor; \ |
| 451 | 451 | }) |
| 452 | 452 | |
| 453 | −struct ratelimit { | |
| 453 | +struct bch_ratelimit { | |
| 454 | + /* Next time we want to do some work, in nanoseconds */ | |
| 454 | 455 | uint64_t next; |
| 456 | + | |
| 457 | + /* | |
| 458 | + * Rate at which we want to do work, in units per nanosecond | |
| 459 | + * The units here correspond to the units passed to bch_next_delay() | |
| 460 | + */ | |
| 455 | 461 | unsigned rate; |
| 456 | 462 | }; |
| 457 | 463 | |
| 458 | −static inline void ratelimit_reset(struct ratelimit *d) | |
| 464 | +static inline void bch_ratelimit_reset(struct bch_ratelimit *d) | |
| 459 | 465 | { |
| 460 | 466 | d->next = local_clock(); |
| 461 | 467 | } |
| 462 | 468 | |
| 463 | −unsigned bch_next_delay(struct ratelimit *d, uint64_t done); | |
| 469 | +uint64_t bch_next_delay(struct bch_ratelimit *d, uint64_t done); | |
| 464 | 470 | |
| 465 | 471 | #define __DIV_SAFE(n, d, zero) \ |
| 466 | 472 | ({ \ |
| @@ -94,11 +94,15 @@ static void update_writeback_rate(struct work_struct *work) · 93 unmodified lines | ||
| 94 | 94 | |
| 95 | 95 | static unsigned writeback_delay(struct cached_dev *dc, unsigned sectors) |
| 96 | 96 | { |
| 97 | + uint64_t ret; | |
| 98 | + | |
| 97 | 99 | if (atomic_read(&dc->disk.detaching) || |
| 98 | 100 | !dc->writeback_percent) |
| 99 | 101 | return 0; |
| 100 | 102 | |
| 101 | − return bch_next_delay(&dc->writeback_rate, sectors * 10000000ULL); | |
| 103 | + ret = bch_next_delay(&dc->writeback_rate, sectors * 10000000ULL); | |
| 104 | + | |
| 105 | + return min_t(uint64_t, ret, HZ); | |
| 102 | 106 | } |
| 103 | 107 | |
| 104 | 108 | /* Background writeback */ |
| @@ -208,7 +212,7 @@ normal_refill: · 103 unmodified lines | ||
| 208 | 212 | |
| 209 | 213 | up_write(&dc->writeback_lock); |
| 210 | 214 | |
| 211 | − ratelimit_reset(&dc->writeback_rate); | |
| 215 | + bch_ratelimit_reset(&dc->writeback_rate); | |
| 212 | 216 | |
| 213 | 217 | /* Punt to workqueue only so we don't recurse and blow the stack */ |
| 214 | 218 | continue_at(cl, read_dirty, dirty_wq); |
| @@ -318,9 +322,7 @@ static void write_dirty_finish(struct closure *cl) · 103 unmodified lines | ||
| 318 | 322 | } |
| 319 | 323 | |
| 320 | 324 | bch_keybuf_del(&dc->writeback_keys, w); |
| 321 | − atomic_dec_bug(&dc->in_flight); | |
| 322 | − | |
| 323 | − closure_wake_up(&dc->writeback_wait); | |
| 325 | + up(&dc->in_flight); | |
| 324 | 326 | |
| 325 | 327 | closure_return_with_destructor(cl, dirty_io_destructor); |
| 326 | 328 | } |
| @@ -349,7 +351,7 @@ static void write_dirty(struct closure *cl) · 22 unmodified lines | ||
| 349 | 351 | |
| 350 | 352 | closure_bio_submit(&io->bio, cl, &io->dc->disk); |
| 351 | 353 | |
| 352 | − continue_at(cl, write_dirty_finish, dirty_wq); | |
| 354 | + continue_at(cl, write_dirty_finish, system_wq); | |
| 353 | 355 | } |
| 354 | 356 | |
| 355 | 357 | static void read_dirty_endio(struct bio *bio, int error) |
| @@ -369,7 +371,7 @@ static void read_dirty_submit(struct closure *cl) · 13 unmodified lines | ||
| 369 | 371 | |
| 370 | 372 | closure_bio_submit(&io->bio, cl, &io->dc->disk); |
| 371 | 373 | |
| 372 | − continue_at(cl, write_dirty, dirty_wq); | |
| 374 | + continue_at(cl, write_dirty, system_wq); | |
| 373 | 375 | } |
| 374 | 376 | |
| 375 | 377 | static void read_dirty(struct closure *cl) |
| @@ -394,12 +396,8 @@ static void read_dirty(struct closure *cl) · 18 unmodified lines | ||
| 394 | 396 | |
| 395 | 397 | if (delay > 0 && |
| 396 | 398 | (KEY_START(&w->key) != dc->last_read || |
| 397 | − jiffies_to_msecs(delay) > 50)) { | |
| 398 | − w->private = NULL; | |
| 399 | − | |
| 400 | − closure_delay(&dc->writeback, delay); | |
| 401 | − continue_at(cl, read_dirty, dirty_wq); | |
| 402 | − } | |
| 399 | + jiffies_to_msecs(delay) > 50)) | |
| 400 | + delay = schedule_timeout_uninterruptible(delay); | |
| 403 | 401 | |
| 404 | 402 | dc->last_read = KEY_OFFSET(&w->key); |
| 405 | 403 | |
| @@ -424,15 +422,10 @@ static void read_dirty(struct closure *cl) · 18 unmodified lines | ||
| 424 | 422 | |
| 425 | 423 | trace_bcache_writeback(&w->key); |
| 426 | 424 | |
| 427 | − closure_call(&io->cl, read_dirty_submit, NULL, &dc->disk.cl); | |
| 425 | + down(&dc->in_flight); | |
| 426 | + closure_call(&io->cl, read_dirty_submit, NULL, cl); | |
| 428 | 427 | |
| 429 | 428 | delay = writeback_delay(dc, KEY_SIZE(&w->key)); |
| 430 | − | |
| 431 | − atomic_inc(&dc->in_flight); | |
| 432 | − | |
| 433 | − if (!closure_wait_event(&dc->writeback_wait, cl, | |
| 434 | − atomic_read(&dc->in_flight) < 64)) | |
| 435 | − continue_at(cl, read_dirty, dirty_wq); | |
| 436 | 429 | } |
| 437 | 430 | |
| 438 | 431 | if (0) { |
| @@ -442,7 +435,11 @@ err: · 3 unmodified lines | ||
| 442 | 435 | bch_keybuf_del(&dc->writeback_keys, w); |
| 443 | 436 | } |
| 444 | 437 | |
| 445 | − refill_dirty(cl); | |
| 438 | + /* | |
| 439 | + * Wait for outstanding writeback IOs to finish (and keybuf slots to be | |
| 440 | + * freed) before refilling again | |
| 441 | + */ | |
| 442 | + continue_at(cl, refill_dirty, dirty_wq); | |
| 446 | 443 | } |
| 447 | 444 | |
| 448 | 445 | /* Init */ |
| @@ -484,6 +481,7 @@ void bch_sectors_dirty_init(struct cached_dev *dc) · 35 unmodified lines | ||
| 484 | 481 | |
| 485 | 482 | void bch_cached_dev_writeback_init(struct cached_dev *dc) |
| 486 | 483 | { |
| 484 | + sema_init(&dc->in_flight, 64); | |
| 487 | 485 | closure_init_unlocked(&dc->writeback); |
| 488 | 486 | init_rwsem(&dc->writeback_lock); |
| 489 | 487 | |
| @@ -513,7 +511,7 @@ void bch_writeback_exit(void) · 23 unmodified lines | ||
| 513 | 511 | |
| 514 | 512 | int __init bch_writeback_init(void) |
| 515 | 513 | { |
| 516 | − dirty_wq = create_singlethread_workqueue("bcache_writeback"); | |
| 514 | + dirty_wq = create_workqueue("bcache_writeback"); | |
| 517 | 515 | if (!dirty_wq) |
| 518 | 516 | return -ENOMEM; |
| 519 | 517 | |
| @@ -19,8 +19,6 @@ · 18 unmodified lines | ||
| 19 | 19 | #define DM_MSG_PREFIX "io" |
| 20 | 20 | |
| 21 | 21 | #define DM_IO_MAX_REGIONS BITS_PER_LONG |
| 22 | −#define MIN_IOS 16 | |
| 23 | −#define MIN_BIOS 16 | |
| 24 | 22 | |
| 25 | 23 | struct dm_io_client { |
| 26 | 24 | mempool_t *pool; |
| @@ -50,16 +48,17 @@ static struct kmem_cache *_dm_io_cache; · 23 unmodified lines | ||
| 50 | 48 | struct dm_io_client *dm_io_client_create(void) |
| 51 | 49 | { |
| 52 | 50 | struct dm_io_client *client; |
| 51 | + unsigned min_ios = dm_get_reserved_bio_based_ios(); | |
| 53 | 52 | |
| 54 | 53 | client = kmalloc(sizeof(*client), GFP_KERNEL); |
| 55 | 54 | if (!client) |
| 56 | 55 | return ERR_PTR(-ENOMEM); |
| 57 | 56 | |
| 58 | − client->pool = mempool_create_slab_pool(MIN_IOS, _dm_io_cache); | |
| 57 | + client->pool = mempool_create_slab_pool(min_ios, _dm_io_cache); | |
| 59 | 58 | if (!client->pool) |
| 60 | 59 | goto bad; |
| 61 | 60 | |
| 62 | − client->bios = bioset_create(MIN_BIOS, 0); | |
| 61 | + client->bios = bioset_create(min_ios, 0); | |
| 63 | 62 | if (!client->bios) |
| 64 | 63 | goto bad; |
| 65 | 64 | |
| @@ -7,6 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | |
| 8 | 8 | #include <linux/device-mapper.h> |
| 9 | 9 | |
| 10 | +#include "dm.h" | |
| 10 | 11 | #include "dm-path-selector.h" |
| 11 | 12 | #include "dm-uevent.h" |
| 12 | 13 | |
| @@ -116,8 +117,6 @@ struct dm_mpath_io { · 103 unmodified lines | ||
| 116 | 117 | |
| 117 | 118 | typedef int (*action_fn) (struct pgpath *pgpath); |
| 118 | 119 | |
| 119 | −#define MIN_IOS 256 /* Mempool size */ | |
| 120 | − | |
| 121 | 120 | static struct kmem_cache *_mpio_cache; |
| 122 | 121 | |
| 123 | 122 | static struct workqueue_struct *kmultipathd, *kmpath_handlerd; |
| @@ -190,6 +189,7 @@ static void free_priority_group(struct priority_group *pg, · 66 unmodified lines | ||
| 190 | 189 | static struct multipath *alloc_multipath(struct dm_target *ti) |
| 191 | 190 | { |
| 192 | 191 | struct multipath *m; |
| 192 | + unsigned min_ios = dm_get_reserved_rq_based_ios(); | |
| 193 | 193 | |
| 194 | 194 | m = kzalloc(sizeof(*m), GFP_KERNEL); |
| 195 | 195 | if (m) { |
| @@ -202,7 +202,7 @@ static struct multipath *alloc_multipath(struct dm_target *ti) · 6 unmodified lines | ||
| 202 | 202 | INIT_WORK(&m->trigger_event, trigger_event); |
| 203 | 203 | init_waitqueue_head(&m->pg_init_wait); |
| 204 | 204 | mutex_init(&m->work_mutex); |
| 205 | − m->mpio_pool = mempool_create_slab_pool(MIN_IOS, _mpio_cache); | |
| 205 | + m->mpio_pool = mempool_create_slab_pool(min_ios, _mpio_cache); | |
| 206 | 206 | if (!m->mpio_pool) { |
| 207 | 207 | kfree(m); |
| 208 | 208 | return NULL; |
| @@ -1268,6 +1268,7 @@ static int noretry_error(int error) · 1059 unmodified lines | ||
| 1268 | 1268 | case -EREMOTEIO: |
| 1269 | 1269 | case -EILSEQ: |
| 1270 | 1270 | case -ENODATA: |
| 1271 | + case -ENOSPC: | |
| 1271 | 1272 | return 1; |
| 1272 | 1273 | } |
| 1273 | 1274 | |
| @@ -1298,8 +1299,17 @@ static int do_end_io(struct multipath *m, struct request *clone, · 24 unmodified lines | ||
| 1298 | 1299 | if (!error && !clone->errors) |
| 1299 | 1300 | return 0; /* I/O complete */ |
| 1300 | 1301 | |
| 1301 | − if (noretry_error(error)) | |
| 1302 | + if (noretry_error(error)) { | |
| 1303 | + if ((clone->cmd_flags & REQ_WRITE_SAME) && | |
| 1304 | + !clone->q->limits.max_write_same_sectors) { | |
| 1305 | + struct queue_limits *limits; | |
| 1306 | + | |
| 1307 | + /* device doesn't really support WRITE SAME, disable it */ | |
| 1308 | + limits = dm_get_queue_limits(dm_table_get_md(m->ti->table)); | |
| 1309 | + limits->max_write_same_sectors = 0; | |
| 1310 | + } | |
| 1302 | 1311 | return error; |
| 1312 | + } | |
| 1303 | 1313 | |
| 1304 | 1314 | if (mpio->pgpath) |
| 1305 | 1315 | fail_path(mpio->pgpath); |
| @@ -256,7 +256,7 @@ static int chunk_io(struct pstore *ps, void *area, chunk_t chunk, int rw, · 255 unmodified lines | ||
| 256 | 256 | */ |
| 257 | 257 | INIT_WORK_ONSTACK(&req.work, do_metadata); |
| 258 | 258 | queue_work(ps->metadata_wq, &req.work); |
| 259 | − flush_work(&req.work); | |
| 259 | + flush_workqueue(ps->metadata_wq); | |
| 260 | 260 | |
| 261 | 261 | return req.result; |
| 262 | 262 | } |
| @@ -725,17 +725,16 @@ static int calc_max_buckets(void) · 724 unmodified lines | ||
| 725 | 725 | */ |
| 726 | 726 | static int init_hash_tables(struct dm_snapshot *s) |
| 727 | 727 | { |
| 728 | − sector_t hash_size, cow_dev_size, origin_dev_size, max_buckets; | |
| 728 | + sector_t hash_size, cow_dev_size, max_buckets; | |
| 729 | 729 | |
| 730 | 730 | /* |
| 731 | 731 | * Calculate based on the size of the original volume or |
| 732 | 732 | * the COW volume... |
| 733 | 733 | */ |
| 734 | 734 | cow_dev_size = get_dev_size(s->cow->bdev); |
| 735 | − origin_dev_size = get_dev_size(s->origin->bdev); | |
| 736 | 735 | max_buckets = calc_max_buckets(); |
| 737 | 736 | |
| 738 | − hash_size = min(origin_dev_size, cow_dev_size) >> s->store->chunk_shift; | |
| 737 | + hash_size = cow_dev_size >> s->store->chunk_shift; | |
| 739 | 738 | hash_size = min(hash_size, max_buckets); |
| 740 | 739 | |
| 741 | 740 | if (hash_size < 64) |
| @@ -451,19 +451,26 @@ static void dm_stat_for_entry(struct dm_stat *s, size_t entry, · 450 unmodified lines | ||
| 451 | 451 | struct dm_stat_percpu *p; |
| 452 | 452 | |
| 453 | 453 | /* |
| 454 | − * For strict correctness we should use local_irq_disable/enable | |
| 454 | + * For strict correctness we should use local_irq_save/restore | |
| 455 | 455 | * instead of preempt_disable/enable. |
| 456 | 456 | * |
| 457 | − * This is racy if the driver finishes bios from non-interrupt | |
| 458 | − * context as well as from interrupt context or from more different | |
| 459 | − * interrupts. | |
| 457 | + * preempt_disable/enable is racy if the driver finishes bios | |
| 458 | + * from non-interrupt context as well as from interrupt context | |
| 459 | + * or from more different interrupts. | |
| 460 | 460 | * |
| 461 | − * However, the race only results in not counting some events, | |
| 462 | − * so it is acceptable. | |
| 461 | + * On 64-bit architectures the race only results in not counting some | |
| 462 | + * events, so it is acceptable. On 32-bit architectures the race could | |
| 463 | + * cause the counter going off by 2^32, so we need to do proper locking | |
| 464 | + * there. | |
| 463 | 465 | * |
| 464 | 466 | * part_stat_lock()/part_stat_unlock() have this race too. |
| 465 | 467 | */ |
| 468 | +#if BITS_PER_LONG == 32 | |
| 469 | + unsigned long flags; | |
| 470 | + local_irq_save(flags); | |
| 471 | +#else | |
| 466 | 472 | preempt_disable(); |
| 473 | +#endif | |
| 467 | 474 | p = &s->stat_percpu[smp_processor_id()][entry]; |
| 468 | 475 | |
| 469 | 476 | if (!end) { |
| @@ -478,7 +485,11 @@ static void dm_stat_for_entry(struct dm_stat *s, size_t entry, · 8 unmodified lines | ||
| 478 | 485 | p->ticks[idx] += duration; |
| 479 | 486 | } |
| 480 | 487 | |
| 488 | +#if BITS_PER_LONG == 32 | |
| 489 | + local_irq_restore(flags); | |
| 490 | +#else | |
| 481 | 491 | preempt_enable(); |
| 492 | +#endif | |
| 482 | 493 | } |
| 483 | 494 | |
| 484 | 495 | static void __dm_stat_bio(struct dm_stat *s, unsigned long bi_rw, |
| @@ -2095,6 +2095,7 @@ static int pool_ctr(struct dm_target *ti, unsigned argc, char **argv) · 2094 unmodified lines | ||
| 2095 | 2095 | * them down to the data device. The thin device's discard |
| 2096 | 2096 | * processing will cause mappings to be removed from the btree. |
| 2097 | 2097 | */ |
| 2098 | + ti->discard_zeroes_data_unsupported = true; | |
| 2098 | 2099 | if (pf.discard_enabled && pf.discard_passdown) { |
| 2099 | 2100 | ti->num_discard_bios = 1; |
| 2100 | 2101 | |
| @@ -2104,7 +2105,6 @@ static int pool_ctr(struct dm_target *ti, unsigned argc, char **argv) · 3 unmodified lines | ||
| 2104 | 2105 | * thin devices' discard limits consistent). |
| 2105 | 2106 | */ |
| 2106 | 2107 | ti->discards_supported = true; |
| 2107 | − ti->discard_zeroes_data_unsupported = true; | |
| 2108 | 2108 | } |
| 2109 | 2109 | ti->private = pt; |
| 2110 | 2110 | |
| @@ -2689,8 +2689,16 @@ static void pool_io_hints(struct dm_target *ti, struct queue_limits *limits) · 578 unmodified lines | ||
| 2689 | 2689 | * They get transferred to the live pool in bind_control_target() |
| 2690 | 2690 | * called from pool_preresume(). |
| 2691 | 2691 | */ |
| 2692 | − if (!pt->adjusted_pf.discard_enabled) | |
| 2692 | + if (!pt->adjusted_pf.discard_enabled) { | |
| 2693 | + /* | |
| 2694 | + * Must explicitly disallow stacking discard limits otherwise the | |
| 2695 | + * block layer will stack them if pool's data device has support. | |
| 2696 | + * QUEUE_FLAG_DISCARD wouldn't be set but there is no way for the | |
| 2697 | + * user to see that, so make sure to set all discard limits to 0. | |
| 2698 | + */ | |
| 2699 | + limits->discard_granularity = 0; | |
| 2693 | 2700 | return; |
| 2701 | + } | |
| 2694 | 2702 | |
| 2695 | 2703 | disable_passdown_if_not_supported(pt); |
| 2696 | 2704 | |
| @@ -2826,10 +2834,10 @@ static int thin_ctr(struct dm_target *ti, unsigned argc, char **argv) · 129 unmodified lines | ||
| 2826 | 2834 | ti->per_bio_data_size = sizeof(struct dm_thin_endio_hook); |
| 2827 | 2835 | |
| 2828 | 2836 | /* In case the pool supports discards, pass them on. */ |
| 2837 | + ti->discard_zeroes_data_unsupported = true; | |
| 2829 | 2838 | if (tc->pool->pf.discard_enabled) { |
| 2830 | 2839 | ti->discards_supported = true; |
| 2831 | 2840 | ti->num_discard_bios = 1; |
| 2832 | − ti->discard_zeroes_data_unsupported = true; | |
| 2833 | 2841 | /* Discard bios must be split on a block boundary */ |
| 2834 | 2842 | ti->split_discard_bios = true; |
| 2835 | 2843 | } |
| @@ -211,10 +211,55 @@ struct dm_md_mempools { · 210 unmodified lines | ||
| 211 | 211 | struct bio_set *bs; |
| 212 | 212 | }; |
| 213 | 213 | |
| 214 | −#define MIN_IOS 256 | |
| 214 | +#define RESERVED_BIO_BASED_IOS 16 | |
| 215 | +#define RESERVED_REQUEST_BASED_IOS 256 | |
| 216 | +#define RESERVED_MAX_IOS 1024 | |
| 215 | 217 | static struct kmem_cache *_io_cache; |
| 216 | 218 | static struct kmem_cache *_rq_tio_cache; |
| 217 | 219 | |
| 220 | +/* | |
| 221 | + * Bio-based DM's mempools' reserved IOs set by the user. | |
| 222 | + */ | |
| 223 | +static unsigned reserved_bio_based_ios = RESERVED_BIO_BASED_IOS; | |
| 224 | + | |
| 225 | +/* | |
| 226 | + * Request-based DM's mempools' reserved IOs set by the user. | |
| 227 | + */ | |
| 228 | +static unsigned reserved_rq_based_ios = RESERVED_REQUEST_BASED_IOS; | |
| 229 | + | |
| 230 | +static unsigned __dm_get_reserved_ios(unsigned *reserved_ios, | |
| 231 | + unsigned def, unsigned max) | |
| 232 | +{ | |
| 233 | + unsigned ios = ACCESS_ONCE(*reserved_ios); | |
| 234 | + unsigned modified_ios = 0; | |
| 235 | + | |
| 236 | + if (!ios) | |
| 237 | + modified_ios = def; | |
| 238 | + else if (ios > max) | |
| 239 | + modified_ios = max; | |
| 240 | + | |
| 241 | + if (modified_ios) { | |
| 242 | + (void)cmpxchg(reserved_ios, ios, modified_ios); | |
| 243 | + ios = modified_ios; | |
| 244 | + } | |
| 245 | + | |
| 246 | + return ios; | |
| 247 | +} | |
| 248 | + | |
| 249 | +unsigned dm_get_reserved_bio_based_ios(void) | |
| 250 | +{ | |
| 251 | + return __dm_get_reserved_ios(&reserved_bio_based_ios, | |
| 252 | + RESERVED_BIO_BASED_IOS, RESERVED_MAX_IOS); | |
| 253 | +} | |
| 254 | +EXPORT_SYMBOL_GPL(dm_get_reserved_bio_based_ios); | |
| 255 | + | |
| 256 | +unsigned dm_get_reserved_rq_based_ios(void) | |
| 257 | +{ | |
| 258 | + return __dm_get_reserved_ios(&reserved_rq_based_ios, | |
| 259 | + RESERVED_REQUEST_BASED_IOS, RESERVED_MAX_IOS); | |
| 260 | +} | |
| 261 | +EXPORT_SYMBOL_GPL(dm_get_reserved_rq_based_ios); | |
| 262 | + | |
| 218 | 263 | static int __init local_init(void) |
| 219 | 264 | { |
| 220 | 265 | int r = -ENOMEM; |
| @@ -2277,6 +2322,17 @@ struct target_type *dm_get_immutable_target_type(struct mapped_device *md) · 2056 unmodified lines | ||
| 2277 | 2322 | return md->immutable_target_type; |
| 2278 | 2323 | } |
| 2279 | 2324 | |
| 2325 | +/* | |
| 2326 | + * The queue_limits are only valid as long as you have a reference | |
| 2327 | + * count on 'md'. | |
| 2328 | + */ | |
| 2329 | +struct queue_limits *dm_get_queue_limits(struct mapped_device *md) | |
| 2330 | +{ | |
| 2331 | + BUG_ON(!atomic_read(&md->holders)); | |
| 2332 | + return &md->queue->limits; | |
| 2333 | +} | |
| 2334 | +EXPORT_SYMBOL_GPL(dm_get_queue_limits); | |
| 2335 | + | |
| 2280 | 2336 | /* |
| 2281 | 2337 | * Fully initialize a request-based queue (->elevator, ->request_fn, etc). |
| 2282 | 2338 | */ |
| @@ -2862,18 +2918,18 @@ struct dm_md_mempools *dm_alloc_md_mempools(unsigned type, unsigned integrity, u · 579 unmodified lines | ||
| 2862 | 2918 | |
| 2863 | 2919 | if (type == DM_TYPE_BIO_BASED) { |
| 2864 | 2920 | cachep = _io_cache; |
| 2865 | − pool_size = 16; | |
| 2921 | + pool_size = dm_get_reserved_bio_based_ios(); | |
| 2866 | 2922 | front_pad = roundup(per_bio_data_size, __alignof__(struct dm_target_io)) + offsetof(struct dm_target_io, clone); |
| 2867 | 2923 | } else if (type == DM_TYPE_REQUEST_BASED) { |
| 2868 | 2924 | cachep = _rq_tio_cache; |
| 2869 | − pool_size = MIN_IOS; | |
| 2925 | + pool_size = dm_get_reserved_rq_based_ios(); | |
| 2870 | 2926 | front_pad = offsetof(struct dm_rq_clone_bio_info, clone); |
| 2871 | 2927 | /* per_bio_data_size is not used. See __bind_mempools(). */ |
| 2872 | 2928 | WARN_ON(per_bio_data_size != 0); |
| 2873 | 2929 | } else |
| 2874 | 2930 | goto out; |
| 2875 | 2931 | |
| 2876 | − pools->io_pool = mempool_create_slab_pool(MIN_IOS, cachep); | |
| 2932 | + pools->io_pool = mempool_create_slab_pool(pool_size, cachep); | |
| 2877 | 2933 | if (!pools->io_pool) |
| 2878 | 2934 | goto out; |
| 2879 | 2935 | |
| @@ -2924,6 +2980,13 @@ module_exit(dm_exit); · 44 unmodified lines | ||
| 2924 | 2980 | |
| 2925 | 2981 | module_param(major, uint, 0); |
| 2926 | 2982 | MODULE_PARM_DESC(major, "The major number of the device mapper"); |
| 2983 | + | |
| 2984 | +module_param(reserved_bio_based_ios, uint, S_IRUGO | S_IWUSR); | |
| 2985 | +MODULE_PARM_DESC(reserved_bio_based_ios, "Reserved IOs in bio-based mempools"); | |
| 2986 | + | |
| 2987 | +module_param(reserved_rq_based_ios, uint, S_IRUGO | S_IWUSR); | |
| 2988 | +MODULE_PARM_DESC(reserved_rq_based_ios, "Reserved IOs in request-based mempools"); | |
| 2989 | + | |
| 2927 | 2990 | MODULE_DESCRIPTION(DM_NAME " driver"); |
| 2928 | 2991 | MODULE_AUTHOR("Joe Thornber <dm-devel@redhat.com>"); |
| 2929 | 2992 | MODULE_LICENSE("GPL"); |
| @@ -184,6 +184,9 @@ void dm_free_md_mempools(struct dm_md_mempools *pools); · 183 unmodified lines | ||
| 184 | 184 | /* |
| 185 | 185 | * Helpers that are used by DM core |
| 186 | 186 | */ |
| 187 | +unsigned dm_get_reserved_bio_based_ios(void); | |
| 188 | +unsigned dm_get_reserved_rq_based_ios(void); | |
| 189 | + | |
| 187 | 190 | static inline bool dm_message_test_buffer_overflow(char *result, unsigned maxlen) |
| 188 | 191 | { |
| 189 | 192 | return !maxlen || strlen(result) + 1 >= maxlen; |
| @@ -57,6 +57,7 @@ void mei_amthif_reset_params(struct mei_device *dev) · 56 unmodified lines | ||
| 57 | 57 | dev->iamthif_ioctl = false; |
| 58 | 58 | dev->iamthif_state = MEI_IAMTHIF_IDLE; |
| 59 | 59 | dev->iamthif_timer = 0; |
| 60 | + dev->iamthif_stall_timer = 0; | |
| 60 | 61 | } |
| 61 | 62 | |
| 62 | 63 | /** |
| @@ -297,10 +297,13 @@ int __mei_cl_recv(struct mei_cl *cl, u8 *buf, size_t length) · 296 unmodified lines | ||
| 297 | 297 | |
| 298 | 298 | if (cl->reading_state != MEI_READ_COMPLETE && |
| 299 | 299 | !waitqueue_active(&cl->rx_wait)) { |
| 300 | + | |
| 300 | 301 | mutex_unlock(&dev->device_lock); |
| 301 | 302 | |
| 302 | 303 | if (wait_event_interruptible(cl->rx_wait, |
| 303 | − (MEI_READ_COMPLETE == cl->reading_state))) { | |
| 304 | + cl->reading_state == MEI_READ_COMPLETE || | |
| 305 | + mei_cl_is_transitioning(cl))) { | |
| 306 | + | |
| 304 | 307 | if (signal_pending(current)) |
| 305 | 308 | return -EINTR; |
| 306 | 309 | return -ERESTARTSYS; |
| @@ -90,6 +90,12 @@ static inline bool mei_cl_is_connected(struct mei_cl *cl) · 89 unmodified lines | ||
| 90 | 90 | cl->dev->dev_state == MEI_DEV_ENABLED && |
| 91 | 91 | cl->state == MEI_FILE_CONNECTED); |
| 92 | 92 | } |
| 93 | +static inline bool mei_cl_is_transitioning(struct mei_cl *cl) | |
| 94 | +{ | |
| 95 | + return (MEI_FILE_INITIALIZING == cl->state || | |
| 96 | + MEI_FILE_DISCONNECTED == cl->state || | |
| 97 | + MEI_FILE_DISCONNECTING == cl->state); | |
| 98 | +} | |
| 93 | 99 | |
| 94 | 100 | bool mei_cl_is_other_connecting(struct mei_cl *cl); |
| 95 | 101 | int mei_cl_disconnect(struct mei_cl *cl); |
| @@ -35,11 +35,15 @@ static void mei_hbm_me_cl_allocate(struct mei_device *dev) · 34 unmodified lines | ||
| 35 | 35 | struct mei_me_client *clients; |
| 36 | 36 | int b; |
| 37 | 37 | |
| 38 | + dev->me_clients_num = 0; | |
| 39 | + dev->me_client_presentation_num = 0; | |
| 40 | + dev->me_client_index = 0; | |
| 41 | + | |
| 38 | 42 | /* count how many ME clients we have */ |
| 39 | 43 | for_each_set_bit(b, dev->me_clients_map, MEI_CLIENTS_MAX) |
| 40 | 44 | dev->me_clients_num++; |
| 41 | 45 | |
| 42 | − if (dev->me_clients_num <= 0) | |
| 46 | + if (dev->me_clients_num == 0) | |
| 43 | 47 | return; |
| 44 | 48 | |
| 45 | 49 | kfree(dev->me_clients); |
| @@ -221,7 +225,7 @@ static int mei_hbm_prop_req(struct mei_device *dev) · 175 unmodified lines | ||
| 221 | 225 | struct hbm_props_request *prop_req; |
| 222 | 226 | const size_t len = sizeof(struct hbm_props_request); |
| 223 | 227 | unsigned long next_client_index; |
| 224 | − u8 client_num; | |
| 228 | + unsigned long client_num; | |
| 225 | 229 | |
| 226 | 230 | |
| 227 | 231 | client_num = dev->me_client_presentation_num; |
| @@ -677,8 +681,6 @@ void mei_hbm_dispatch(struct mei_device *dev, struct mei_msg_hdr *hdr) · 449 unmodified lines | ||
| 677 | 681 | if (dev->dev_state == MEI_DEV_INIT_CLIENTS && |
| 678 | 682 | dev->hbm_state == MEI_HBM_ENUM_CLIENTS) { |
| 679 | 683 | dev->init_clients_timer = 0; |
| 680 | − dev->me_client_presentation_num = 0; | |
| 681 | − dev->me_client_index = 0; | |
| 682 | 684 | mei_hbm_me_cl_allocate(dev); |
| 683 | 685 | dev->hbm_state = MEI_HBM_CLIENT_PROPERTIES; |
| 684 | 686 | |
| @@ -175,6 +175,9 @@ void mei_reset(struct mei_device *dev, int interrupts_enabled) · 174 unmodified lines | ||
| 175 | 175 | memset(&dev->wr_ext_msg, 0, sizeof(dev->wr_ext_msg)); |
| 176 | 176 | } |
| 177 | 177 | |
| 178 | + /* we're already in reset, cancel the init timer */ | |
| 179 | + dev->init_clients_timer = 0; | |
| 180 | + | |
| 178 | 181 | dev->me_clients_num = 0; |
| 179 | 182 | dev->rd_msg_hdr = 0; |
| 180 | 183 | dev->wd_pending = false; |
| @@ -249,19 +249,16 @@ static ssize_t mei_read(struct file *file, char __user *ubuf, · 248 unmodified lines | ||
| 249 | 249 | mutex_unlock(&dev->device_lock); |
| 250 | 250 | |
| 251 | 251 | if (wait_event_interruptible(cl->rx_wait, |
| 252 | − (MEI_READ_COMPLETE == cl->reading_state || | |
| 253 | − MEI_FILE_INITIALIZING == cl->state || | |
| 254 | − MEI_FILE_DISCONNECTED == cl->state || | |
| 255 | − MEI_FILE_DISCONNECTING == cl->state))) { | |
| 252 | + MEI_READ_COMPLETE == cl->reading_state || | |
| 253 | + mei_cl_is_transitioning(cl))) { | |
| 254 | + | |
| 256 | 255 | if (signal_pending(current)) |
| 257 | 256 | return -EINTR; |
| 258 | 257 | return -ERESTARTSYS; |
| 259 | 258 | } |
| 260 | 259 | |
| 261 | 260 | mutex_lock(&dev->device_lock); |
| 262 | − if (MEI_FILE_INITIALIZING == cl->state || | |
| 263 | − MEI_FILE_DISCONNECTED == cl->state || | |
| 264 | − MEI_FILE_DISCONNECTING == cl->state) { | |
| 261 | + if (mei_cl_is_transitioning(cl)) { | |
| 265 | 262 | rets = -EBUSY; |
| 266 | 263 | goto out; |
| 267 | 264 | } |
| @@ -396,9 +396,9 @@ struct mei_device { · 395 unmodified lines | ||
| 396 | 396 | struct mei_me_client *me_clients; /* Note: memory has to be allocated */ |
| 397 | 397 | DECLARE_BITMAP(me_clients_map, MEI_CLIENTS_MAX); |
| 398 | 398 | DECLARE_BITMAP(host_clients_map, MEI_CLIENTS_MAX); |
| 399 | − u8 me_clients_num; | |
| 400 | − u8 me_client_presentation_num; | |
| 401 | − u8 me_client_index; | |
| 399 | + unsigned long me_clients_num; | |
| 400 | + unsigned long me_client_presentation_num; | |
| 401 | + unsigned long me_client_index; | |
| 402 | 402 | |
| 403 | 403 | struct mei_cl wd_cl; |
| 404 | 404 | enum mei_wd_states wd_state; |
| @@ -113,14 +113,14 @@ static const struct sh_mobile_sdhi_ops sdhi_ops = { · 112 unmodified lines | ||
| 113 | 113 | }; |
| 114 | 114 | |
| 115 | 115 | static const struct of_device_id sh_mobile_sdhi_of_match[] = { |
| 116 | − { .compatible = "renesas,shmobile-sdhi" }, | |
| 117 | − { .compatible = "renesas,sh7372-sdhi" }, | |
| 118 | − { .compatible = "renesas,sh73a0-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], }, | |
| 119 | − { .compatible = "renesas,r8a73a4-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], }, | |
| 120 | − { .compatible = "renesas,r8a7740-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], }, | |
| 121 | − { .compatible = "renesas,r8a7778-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], }, | |
| 122 | − { .compatible = "renesas,r8a7779-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], }, | |
| 123 | − { .compatible = "renesas,r8a7790-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], }, | |
| 116 | + { .compatible = "renesas,sdhi-shmobile" }, | |
| 117 | + { .compatible = "renesas,sdhi-sh7372" }, | |
| 118 | + { .compatible = "renesas,sdhi-sh73a0", .data = &sh_mobile_sdhi_of_cfg[0], }, | |
| 119 | + { .compatible = "renesas,sdhi-r8a73a4", .data = &sh_mobile_sdhi_of_cfg[0], }, | |
| 120 | + { .compatible = "renesas,sdhi-r8a7740", .data = &sh_mobile_sdhi_of_cfg[0], }, | |
| 121 | + { .compatible = "renesas,sdhi-r8a7778", .data = &sh_mobile_sdhi_of_cfg[0], }, | |
| 122 | + { .compatible = "renesas,sdhi-r8a7779", .data = &sh_mobile_sdhi_of_cfg[0], }, | |
| 123 | + { .compatible = "renesas,sdhi-r8a7790", .data = &sh_mobile_sdhi_of_cfg[0], }, | |
| 124 | 124 | {}, |
| 125 | 125 | }; |
| 126 | 126 | MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match); |
| @@ -1236,7 +1236,6 @@ static int pxa3xx_nand_remove(struct platform_device *pdev) · 1235 unmodified lines | ||
| 1236 | 1236 | return 0; |
| 1237 | 1237 | } |
| 1238 | 1238 | |
| 1239 | −#ifdef CONFIG_OF | |
| 1240 | 1239 | static struct of_device_id pxa3xx_nand_dt_ids[] = { |
| 1241 | 1240 | { |
| 1242 | 1241 | .compatible = "marvell,pxa3xx-nand", |
| @@ -1284,12 +1283,6 @@ static int pxa3xx_nand_probe_dt(struct platform_device *pdev) · 41 unmodified lines | ||
| 1284 | 1283 | |
| 1285 | 1284 | return 0; |
| 1286 | 1285 | } |
| 1287 | −#else | |
| 1288 | −static inline int pxa3xx_nand_probe_dt(struct platform_device *pdev) | |
| 1289 | −{ | |
| 1290 | − return 0; | |
| 1291 | −} | |
| 1292 | −#endif | |
| 1293 | 1286 | |
| 1294 | 1287 | static int pxa3xx_nand_probe(struct platform_device *pdev) |
| 1295 | 1288 | { |
| @@ -1472,7 +1472,7 @@ void bond_alb_monitor(struct work_struct *work) · 1471 unmodified lines | ||
| 1472 | 1472 | bond_info->lp_counter++; |
| 1473 | 1473 | |
| 1474 | 1474 | /* send learning packets */ |
| 1475 | − if (bond_info->lp_counter >= BOND_ALB_LP_TICKS) { | |
| 1475 | + if (bond_info->lp_counter >= BOND_ALB_LP_TICKS(bond)) { | |
| 1476 | 1476 | /* change of curr_active_slave involves swapping of mac addresses. |
| 1477 | 1477 | * in order to avoid this swapping from happening while |
| 1478 | 1478 | * sending the learning packets, the curr_slave_lock must be held for |
| @@ -36,14 +36,15 @@ struct slave; · 35 unmodified lines | ||
| 36 | 36 | * Used for division - never set |
| 37 | 37 | * to zero !!! |
| 38 | 38 | */ |
| 39 | −#define BOND_ALB_LP_INTERVAL 1 /* In seconds, periodic send of | |
| 40 | − * learning packets to the switch | |
| 41 | − */ | |
| 39 | +#define BOND_ALB_DEFAULT_LP_INTERVAL 1 | |
| 40 | +#define BOND_ALB_LP_INTERVAL(bond) (bond->params.lp_interval) /* In seconds, periodic send of | |
| 41 | + * learning packets to the switch | |
| 42 | + */ | |
| 42 | 43 | |
| 43 | 44 | #define BOND_TLB_REBALANCE_TICKS (BOND_TLB_REBALANCE_INTERVAL \ |
| 44 | 45 | * ALB_TIMER_TICKS_PER_SEC) |
| 45 | 46 | |
| 46 | −#define BOND_ALB_LP_TICKS (BOND_ALB_LP_INTERVAL \ | |
| 47 | +#define BOND_ALB_LP_TICKS(bond) (BOND_ALB_LP_INTERVAL(bond) \ | |
| 47 | 48 | * ALB_TIMER_TICKS_PER_SEC) |
| 48 | 49 | |
| 49 | 50 | #define TLB_HASH_TABLE_SIZE 256 /* The size of the clients hash table. |
| @@ -1724,6 +1724,7 @@ static int __bond_release_one(struct net_device *bond_dev, · 1723 unmodified lines | ||
| 1724 | 1724 | struct bonding *bond = netdev_priv(bond_dev); |
| 1725 | 1725 | struct slave *slave, *oldcurrent; |
| 1726 | 1726 | struct sockaddr addr; |
| 1727 | + int old_flags = bond_dev->flags; | |
| 1727 | 1728 | netdev_features_t old_features = bond_dev->features; |
| 1728 | 1729 | |
| 1729 | 1730 | /* slave is not a slave or master is not master of this slave */ |
| @@ -1855,12 +1856,18 @@ static int __bond_release_one(struct net_device *bond_dev, · 125 unmodified lines | ||
| 1855 | 1856 | * bond_change_active_slave(..., NULL) |
| 1856 | 1857 | */ |
| 1857 | 1858 | if (!USES_PRIMARY(bond->params.mode)) { |
| 1858 | − /* unset promiscuity level from slave */ | |
| 1859 | − if (bond_dev->flags & IFF_PROMISC) | |
| 1859 | + /* unset promiscuity level from slave | |
| 1860 | + * NOTE: The NETDEV_CHANGEADDR call above may change the value | |
| 1861 | + * of the IFF_PROMISC flag in the bond_dev, but we need the | |
| 1862 | + * value of that flag before that change, as that was the value | |
| 1863 | + * when this slave was attached, so we cache at the start of the | |
| 1864 | + * function and use it here. Same goes for ALLMULTI below | |
| 1865 | + */ | |
| 1866 | + if (old_flags & IFF_PROMISC) | |
| 1860 | 1867 | dev_set_promiscuity(slave_dev, -1); |
| 1861 | 1868 | |
| 1862 | 1869 | /* unset allmulti level from slave */ |
| 1863 | − if (bond_dev->flags & IFF_ALLMULTI) | |
| 1870 | + if (old_flags & IFF_ALLMULTI) | |
| 1864 | 1871 | dev_set_allmulti(slave_dev, -1); |
| 1865 | 1872 | |
| 1866 | 1873 | bond_hw_addr_flush(bond_dev, slave_dev); |
| @@ -4416,6 +4423,7 @@ static int bond_check_params(struct bond_params *params) · 2549 unmodified lines | ||
| 4416 | 4423 | params->all_slaves_active = all_slaves_active; |
| 4417 | 4424 | params->resend_igmp = resend_igmp; |
| 4418 | 4425 | params->min_links = min_links; |
| 4426 | + params->lp_interval = BOND_ALB_DEFAULT_LP_INTERVAL; | |
| 4419 | 4427 | |
| 4420 | 4428 | if (primary) { |
| 4421 | 4429 | strncpy(params->primary, primary, IFNAMSIZ); |
| @@ -1699,6 +1699,44 @@ out: · 1698 unmodified lines | ||
| 1699 | 1699 | static DEVICE_ATTR(resend_igmp, S_IRUGO | S_IWUSR, |
| 1700 | 1700 | bonding_show_resend_igmp, bonding_store_resend_igmp); |
| 1701 | 1701 | |
| 1702 | + | |
| 1703 | +static ssize_t bonding_show_lp_interval(struct device *d, | |
| 1704 | + struct device_attribute *attr, | |
| 1705 | + char *buf) | |
| 1706 | +{ | |
| 1707 | + struct bonding *bond = to_bond(d); | |
| 1708 | + return sprintf(buf, "%d\n", bond->params.lp_interval); | |
| 1709 | +} | |
| 1710 | + | |
| 1711 | +static ssize_t bonding_store_lp_interval(struct device *d, | |
| 1712 | + struct device_attribute *attr, | |
| 1713 | + const char *buf, size_t count) | |
| 1714 | +{ | |
| 1715 | + struct bonding *bond = to_bond(d); | |
| 1716 | + int new_value, ret = count; | |
| 1717 | + | |
| 1718 | + if (sscanf(buf, "%d", &new_value) != 1) { | |
| 1719 | + pr_err("%s: no lp interval value specified.\n", | |
| 1720 | + bond->dev->name); | |
| 1721 | + ret = -EINVAL; | |
| 1722 | + goto out; | |
| 1723 | + } | |
| 1724 | + | |
| 1725 | + if (new_value <= 0) { | |
| 1726 | + pr_err ("%s: lp_interval must be between 1 and %d\n", | |
| 1727 | + bond->dev->name, INT_MAX); | |
| 1728 | + ret = -EINVAL; | |
| 1729 | + goto out; | |
| 1730 | + } | |
| 1731 | + | |
| 1732 | + bond->params.lp_interval = new_value; | |
| 1733 | +out: | |
| 1734 | + return ret; | |
| 1735 | +} | |
| 1736 | + | |
| 1737 | +static DEVICE_ATTR(lp_interval, S_IRUGO | S_IWUSR, | |
| 1738 | + bonding_show_lp_interval, bonding_store_lp_interval); | |
| 1739 | + | |
| 1702 | 1740 | static struct attribute *per_bond_attrs[] = { |
| 1703 | 1741 | &dev_attr_slaves.attr, |
| 1704 | 1742 | &dev_attr_mode.attr, |
| @@ -1729,6 +1767,7 @@ static struct attribute *per_bond_attrs[] = { · 24 unmodified lines | ||
| 1729 | 1767 | &dev_attr_all_slaves_active.attr, |
| 1730 | 1768 | &dev_attr_resend_igmp.attr, |
| 1731 | 1769 | &dev_attr_min_links.attr, |
| 1770 | + &dev_attr_lp_interval.attr, | |
| 1732 | 1771 | NULL, |
| 1733 | 1772 | }; |
| 1734 | 1773 | |
| @@ -176,6 +176,7 @@ struct bond_params { · 175 unmodified lines | ||
| 176 | 176 | int tx_queues; |
| 177 | 177 | int all_slaves_active; |
| 178 | 178 | int resend_igmp; |
| 179 | + int lp_interval; | |
| 179 | 180 | }; |
| 180 | 181 | |
| 181 | 182 | struct bond_parm_tbl { |
| @@ -702,7 +702,6 @@ static int flexcan_chip_start(struct net_device *dev) · 701 unmodified lines | ||
| 702 | 702 | { |
| 703 | 703 | struct flexcan_priv *priv = netdev_priv(dev); |
| 704 | 704 | struct flexcan_regs __iomem *regs = priv->base; |
| 705 | − unsigned int i; | |
| 706 | 705 | int err; |
| 707 | 706 | u32 reg_mcr, reg_ctrl; |
| 708 | 707 | |
| @@ -772,17 +771,6 @@ static int flexcan_chip_start(struct net_device *dev) · 63 unmodified lines | ||
| 772 | 771 | netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl); |
| 773 | 772 | flexcan_write(reg_ctrl, ®s->ctrl); |
| 774 | 773 | |
| 775 | − for (i = 0; i < ARRAY_SIZE(regs->cantxfg); i++) { | |
| 776 | − flexcan_write(0, ®s->cantxfg[i].can_ctrl); | |
| 777 | − flexcan_write(0, ®s->cantxfg[i].can_id); | |
| 778 | − flexcan_write(0, ®s->cantxfg[i].data[0]); | |
| 779 | − flexcan_write(0, ®s->cantxfg[i].data[1]); | |
| 780 | − | |
| 781 | − /* put MB into rx queue */ | |
| 782 | − flexcan_write(FLEXCAN_MB_CNT_CODE(0x4), | |
| 783 | − ®s->cantxfg[i].can_ctrl); | |
| 784 | − } | |
| 785 | − | |
| 786 | 774 | /* acceptance mask/acceptance code (accept everything) */ |
| 787 | 775 | flexcan_write(0x0, ®s->rxgmask); |
| 788 | 776 | flexcan_write(0x0, ®s->rx14mask); |
| @@ -76,6 +76,10 @@ MODULE_PARM_DESC(maxdev, "Maximum number of slcan interfaces"); · 75 unmodified lines | ||
| 76 | 76 | /* maximum rx buffer len: extended CAN frame with timestamp */ |
| 77 | 77 | #define SLC_MTU (sizeof("T1111222281122334455667788EA5F\r")+1) |
| 78 | 78 | |
| 79 | +#define SLC_CMD_LEN 1 | |
| 80 | +#define SLC_SFF_ID_LEN 3 | |
| 81 | +#define SLC_EFF_ID_LEN 8 | |
| 82 | + | |
| 79 | 83 | struct slcan { |
| 80 | 84 | int magic; |
| 81 | 85 | |
| @@ -142,47 +146,63 @@ static void slc_bump(struct slcan *sl) · 60 unmodified lines | ||
| 142 | 146 | { |
| 143 | 147 | struct sk_buff *skb; |
| 144 | 148 | struct can_frame cf; |
| 145 | − int i, dlc_pos, tmp; | |
| 146 | − unsigned long ultmp; | |
| 147 | − char cmd = sl->rbuff[0]; | |
| 148 | − | |
| 149 | − if ((cmd != 't') && (cmd != 'T') && (cmd != 'r') && (cmd != 'R')) | |
| 149 | + int i, tmp; | |
| 150 | + u32 tmpid; | |
| 151 | + char *cmd = sl->rbuff; | |
| 152 | + | |
| 153 | + cf.can_id = 0; | |
| 154 | + | |
| 155 | + switch (*cmd) { | |
| 156 | + case 'r': | |
| 157 | + cf.can_id = CAN_RTR_FLAG; | |
| 158 | + /* fallthrough */ | |
| 159 | + case 't': | |
| 160 | + /* store dlc ASCII value and terminate SFF CAN ID string */ | |
| 161 | + cf.can_dlc = sl->rbuff[SLC_CMD_LEN + SLC_SFF_ID_LEN]; | |
| 162 | + sl->rbuff[SLC_CMD_LEN + SLC_SFF_ID_LEN] = 0; | |
| 163 | + /* point to payload data behind the dlc */ | |
| 164 | + cmd += SLC_CMD_LEN + SLC_SFF_ID_LEN + 1; | |
| 165 | + break; | |
| 166 | + case 'R': | |
| 167 | + cf.can_id = CAN_RTR_FLAG; | |
| 168 | + /* fallthrough */ | |
| 169 | + case 'T': | |
| 170 | + cf.can_id |= CAN_EFF_FLAG; | |
| 171 | + /* store dlc ASCII value and terminate EFF CAN ID string */ | |
| 172 | + cf.can_dlc = sl->rbuff[SLC_CMD_LEN + SLC_EFF_ID_LEN]; | |
| 173 | + sl->rbuff[SLC_CMD_LEN + SLC_EFF_ID_LEN] = 0; | |
| 174 | + /* point to payload data behind the dlc */ | |
| 175 | + cmd += SLC_CMD_LEN + SLC_EFF_ID_LEN + 1; | |
| 176 | + break; | |
| 177 | + default: | |
| 150 | 178 | return; |
| 179 | + } | |
| 151 | 180 | |
| 152 | − if (cmd & 0x20) /* tiny chars 'r' 't' => standard frame format */ | |
| 153 | − dlc_pos = 4; /* dlc position tiiid */ | |
| 154 | − else | |
| 155 | − dlc_pos = 9; /* dlc position Tiiiiiiiid */ | |
| 156 | − | |
| 157 | − if (!((sl->rbuff[dlc_pos] >= '0') && (sl->rbuff[dlc_pos] < '9'))) | |
| 181 | + if (kstrtou32(sl->rbuff + SLC_CMD_LEN, 16, &tmpid)) | |
| 158 | 182 | return; |
| 159 | 183 | |
| 160 | − cf.can_dlc = sl->rbuff[dlc_pos] - '0'; /* get can_dlc from ASCII val */ | |
| 184 | + cf.can_id |= tmpid; | |
| 161 | 185 | |
| 162 | − sl->rbuff[dlc_pos] = 0; /* terminate can_id string */ | |
| 163 | − | |
| 164 | − if (kstrtoul(sl->rbuff+1, 16, &ultmp)) | |
| 186 | + /* get can_dlc from sanitized ASCII value */ | |
| 187 | + if (cf.can_dlc >= '0' && cf.can_dlc < '9') | |
| 188 | + cf.can_dlc -= '0'; | |
| 189 | + else | |
| 165 | 190 | return; |
| 166 | 191 | |
| 167 | − cf.can_id = ultmp; | |
| 168 | − | |
| 169 | − if (!(cmd & 0x20)) /* NO tiny chars => extended frame format */ | |
| 170 | − cf.can_id |= CAN_EFF_FLAG; | |
| 171 | − | |
| 172 | − if ((cmd | 0x20) == 'r') /* RTR frame */ | |
| 173 | − cf.can_id |= CAN_RTR_FLAG; | |
| 174 | − | |
| 175 | 192 | *(u64 *) (&cf.data) = 0; /* clear payload */ |
| 176 | 193 | |
| 177 | − for (i = 0, dlc_pos++; i < cf.can_dlc; i++) { | |
| 178 | − tmp = hex_to_bin(sl->rbuff[dlc_pos++]); | |
| 179 | − if (tmp < 0) | |
| 180 | − return; | |
| 181 | − cf.data[i] = (tmp << 4); | |
| 182 | − tmp = hex_to_bin(sl->rbuff[dlc_pos++]); | |
| 183 | − if (tmp < 0) | |
| 184 | − return; | |
| 185 | − cf.data[i] |= tmp; | |
| 194 | + /* RTR frames may have a dlc > 0 but they never have any data bytes */ | |
| 195 | + if (!(cf.can_id & CAN_RTR_FLAG)) { | |
| 196 | + for (i = 0; i < cf.can_dlc; i++) { | |
| 197 | + tmp = hex_to_bin(*cmd++); | |
| 198 | + if (tmp < 0) | |
| 199 | + return; | |
| 200 | + cf.data[i] = (tmp << 4); | |
| 201 | + tmp = hex_to_bin(*cmd++); | |
| 202 | + if (tmp < 0) | |
| 203 | + return; | |
| 204 | + cf.data[i] |= tmp; | |
| 205 | + } | |
| 186 | 206 | } |
| 187 | 207 | |
| 188 | 208 | skb = dev_alloc_skb(sizeof(struct can_frame) + |
| @@ -209,7 +229,6 @@ static void slc_bump(struct slcan *sl) · 20 unmodified lines | ||
| 209 | 229 | /* parse tty input stream */ |
| 210 | 230 | static void slcan_unesc(struct slcan *sl, unsigned char s) |
| 211 | 231 | { |
| 212 | − | |
| 213 | 232 | if ((s == '\r') || (s == '\a')) { /* CR or BEL ends the pdu */ |
| 214 | 233 | if (!test_and_clear_bit(SLF_ERROR, &sl->flags) && |
| 215 | 234 | (sl->rcount > 4)) { |
| @@ -236,27 +255,46 @@ static void slcan_unesc(struct slcan *sl, unsigned char s) · 20 unmodified lines | ||
| 236 | 255 | /* Encapsulate one can_frame and stuff into a TTY queue. */ |
| 237 | 256 | static void slc_encaps(struct slcan *sl, struct can_frame *cf) |
| 238 | 257 | { |
| 239 | − int actual, idx, i; | |
| 240 | − char cmd; | |
| 258 | + int actual, i; | |
| 259 | + unsigned char *pos; | |
| 260 | + unsigned char *endpos; | |
| 261 | + canid_t id = cf->can_id; | |
| 262 | + | |
| 263 | + pos = sl->xbuff; | |
| 241 | 264 | |
| 242 | 265 | if (cf->can_id & CAN_RTR_FLAG) |
| 243 | − cmd = 'R'; /* becomes 'r' in standard frame format */ | |
| 266 | + *pos = 'R'; /* becomes 'r' in standard frame format (SFF) */ | |
| 244 | 267 | else |
| 245 | − cmd = 'T'; /* becomes 't' in standard frame format */ | |
| 268 | + *pos = 'T'; /* becomes 't' in standard frame format (SSF) */ | |
| 246 | 269 | |
| 247 | − if (cf->can_id & CAN_EFF_FLAG) | |
| 248 | − sprintf(sl->xbuff, "%c%08X%d", cmd, | |
| 249 | − cf->can_id & CAN_EFF_MASK, cf->can_dlc); | |
| 250 | − else | |
| 251 | − sprintf(sl->xbuff, "%c%03X%d", cmd | 0x20, | |
| 252 | − cf->can_id & CAN_SFF_MASK, cf->can_dlc); | |
| 270 | + /* determine number of chars for the CAN-identifier */ | |
| 271 | + if (cf->can_id & CAN_EFF_FLAG) { | |
| 272 | + id &= CAN_EFF_MASK; | |
| 273 | + endpos = pos + SLC_EFF_ID_LEN; | |
| 274 | + } else { | |
| 275 | + *pos |= 0x20; /* convert R/T to lower case for SFF */ | |
| 276 | + id &= CAN_SFF_MASK; | |
| 277 | + endpos = pos + SLC_SFF_ID_LEN; | |
| 278 | + } | |
| 253 | 279 | |
| 254 | − idx = strlen(sl->xbuff); | |
| 280 | + /* build 3 (SFF) or 8 (EFF) digit CAN identifier */ | |
| 281 | + pos++; | |
| 282 | + while (endpos >= pos) { | |
| 283 | + *endpos-- = hex_asc_upper[id & 0xf]; | |
| 284 | + id >>= 4; | |
| 285 | + } | |
| 286 | + | |
| 287 | + pos += (cf->can_id & CAN_EFF_FLAG) ? SLC_EFF_ID_LEN : SLC_SFF_ID_LEN; | |
| 255 | 288 | |
| 256 | − for (i = 0; i < cf->can_dlc; i++) | |
| 257 | − sprintf(&sl->xbuff[idx + 2*i], "%02X", cf->data[i]); | |
| 289 | + *pos++ = cf->can_dlc + '0'; | |
| 290 | + | |
| 291 | + /* RTR frames may have a dlc > 0 but they never have any data bytes */ | |
| 292 | + if (!(cf->can_id & CAN_RTR_FLAG)) { | |
| 293 | + for (i = 0; i < cf->can_dlc; i++) | |
| 294 | + pos = hex_byte_pack_upper(pos, cf->data[i]); | |
| 295 | + } | |
| 258 | 296 | |
| 259 | − strcat(sl->xbuff, "\r"); /* add terminating character */ | |
| 297 | + *pos++ = '\r'; | |
| 260 | 298 | |
| 261 | 299 | /* Order of next two lines is *very* important. |
| 262 | 300 | * When we are sending a little amount of data, |
| @@ -267,8 +305,8 @@ static void slc_encaps(struct slcan *sl, struct can_frame *cf) · 4 unmodified lines | ||
| 267 | 305 | * 14 Oct 1994 Dmitry Gorodchanin. |
| 268 | 306 | */ |
| 269 | 307 | set_bit(TTY_DO_WRITE_WAKEUP, &sl->tty->flags); |
| 270 | − actual = sl->tty->ops->write(sl->tty, sl->xbuff, strlen(sl->xbuff)); | |
| 271 | − sl->xleft = strlen(sl->xbuff) - actual; | |
| 308 | + actual = sl->tty->ops->write(sl->tty, sl->xbuff, pos - sl->xbuff); | |
| 309 | + sl->xleft = (pos - sl->xbuff) - actual; | |
| 272 | 310 | sl->xhead = sl->xbuff + actual; |
| 273 | 311 | sl->dev->stats.tx_bytes += cf->can_dlc; |
| 274 | 312 | } |
| @@ -286,11 +324,13 @@ static void slcan_write_wakeup(struct tty_struct *tty) · 11 unmodified lines | ||
| 286 | 324 | if (!sl || sl->magic != SLCAN_MAGIC || !netif_running(sl->dev)) |
| 287 | 325 | return; |
| 288 | 326 | |
| 327 | + spin_lock(&sl->lock); | |
| 289 | 328 | if (sl->xleft <= 0) { |
| 290 | 329 | /* Now serial buffer is almost free & we can start |
| 291 | 330 | * transmission of another packet */ |
| 292 | 331 | sl->dev->stats.tx_packets++; |
| 293 | 332 | clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags); |
| 333 | + spin_unlock(&sl->lock); | |
| 294 | 334 | netif_wake_queue(sl->dev); |
| 295 | 335 | return; |
| 296 | 336 | } |
| @@ -298,6 +338,7 @@ static void slcan_write_wakeup(struct tty_struct *tty) · 1 unmodified line | ||
| 298 | 338 | actual = tty->ops->write(tty, sl->xhead, sl->xleft); |
| 299 | 339 | sl->xleft -= actual; |
| 300 | 340 | sl->xhead += actual; |
| 341 | + spin_unlock(&sl->lock); | |
| 301 | 342 | } |
| 302 | 343 | |
| 303 | 344 | /* Send a can_frame to a TTY queue. */ |
| @@ -463,7 +463,7 @@ static int peak_usb_start(struct peak_usb_device *dev) · 462 unmodified lines | ||
| 463 | 463 | if (i < PCAN_USB_MAX_TX_URBS) { |
| 464 | 464 | if (i == 0) { |
| 465 | 465 | netdev_err(netdev, "couldn't setup any tx URB\n"); |
| 466 | − return err; | |
| 466 | + goto err_tx; | |
| 467 | 467 | } |
| 468 | 468 | |
| 469 | 469 | netdev_warn(netdev, "tx performance may be slow\n"); |
| @@ -472,7 +472,7 @@ static int peak_usb_start(struct peak_usb_device *dev) · 2 unmodified lines | ||
| 472 | 472 | if (dev->adapter->dev_start) { |
| 473 | 473 | err = dev->adapter->dev_start(dev); |
| 474 | 474 | if (err) |
| 475 | − goto failed; | |
| 475 | + goto err_adapter; | |
| 476 | 476 | } |
| 477 | 477 | |
| 478 | 478 | dev->state |= PCAN_USB_STATE_STARTED; |
| @@ -481,19 +481,26 @@ static int peak_usb_start(struct peak_usb_device *dev) · 2 unmodified lines | ||
| 481 | 481 | if (dev->adapter->dev_set_bus) { |
| 482 | 482 | err = dev->adapter->dev_set_bus(dev, 1); |
| 483 | 483 | if (err) |
| 484 | − goto failed; | |
| 484 | + goto err_adapter; | |
| 485 | 485 | } |
| 486 | 486 | |
| 487 | 487 | dev->can.state = CAN_STATE_ERROR_ACTIVE; |
| 488 | 488 | |
| 489 | 489 | return 0; |
| 490 | 490 | |
| 491 | −failed: | |
| 491 | +err_adapter: | |
| 492 | 492 | if (err == -ENODEV) |
| 493 | 493 | netif_device_detach(dev->netdev); |
| 494 | 494 | |
| 495 | 495 | netdev_warn(netdev, "couldn't submit control: %d\n", err); |
| 496 | 496 | |
| 497 | + for (i = 0; i < PCAN_USB_MAX_TX_URBS; i++) { | |
| 498 | + usb_free_urb(dev->tx_contexts[i].urb); | |
| 499 | + dev->tx_contexts[i].urb = NULL; | |
| 500 | + } | |
| 501 | +err_tx: | |
| 502 | + usb_kill_anchored_urbs(&dev->rx_submitted); | |
| 503 | + | |
| 497 | 504 | return err; |
| 498 | 505 | } |
| 499 | 506 | |
| @@ -530,7 +530,7 @@ static int bfin_mac_ethtool_setwol(struct net_device *dev, · 529 unmodified lines | ||
| 530 | 530 | if (lp->wol && !lp->irq_wake_requested) { |
| 531 | 531 | /* register wake irq handler */ |
| 532 | 532 | rc = request_irq(IRQ_MAC_WAKEDET, bfin_mac_wake_interrupt, |
| 533 | − IRQF_DISABLED, "EMAC_WAKE", dev); | |
| 533 | + 0, "EMAC_WAKE", dev); | |
| 534 | 534 | if (rc) |
| 535 | 535 | return rc; |
| 536 | 536 | lp->irq_wake_requested = true; |
| @@ -1686,7 +1686,7 @@ static int bfin_mac_probe(struct platform_device *pdev) · 1149 unmodified lines | ||
| 1686 | 1686 | /* now, enable interrupts */ |
| 1687 | 1687 | /* register irq handler */ |
| 1688 | 1688 | rc = request_irq(IRQ_MAC_RX, bfin_mac_interrupt, |
| 1689 | − IRQF_DISABLED, "EMAC_RX", ndev); | |
| 1689 | + 0, "EMAC_RX", ndev); | |
| 1690 | 1690 | if (rc) { |
| 1691 | 1691 | dev_err(&pdev->dev, "Cannot request Blackfin MAC RX IRQ!\n"); |
| 1692 | 1692 | rc = -EBUSY; |
| @@ -358,7 +358,7 @@ static int __init lance_probe( struct net_device *dev) · 357 unmodified lines | ||
| 358 | 358 | |
| 359 | 359 | REGA(CSR0) = CSR0_STOP; |
| 360 | 360 | |
| 361 | − if (request_irq(LANCE_IRQ, lance_interrupt, IRQF_DISABLED, "SUN3 Lance", dev) < 0) { | |
| 361 | + if (request_irq(LANCE_IRQ, lance_interrupt, 0, "SUN3 Lance", dev) < 0) { | |
| 362 | 362 | #ifdef CONFIG_SUN3 |
| 363 | 363 | iounmap((void __iomem *)ioaddr); |
| 364 | 364 | #endif |
| @@ -1188,7 +1188,7 @@ static int alx_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 1187 unmodified lines | ||
| 1188 | 1188 | struct alx_priv *alx; |
| 1189 | 1189 | struct alx_hw *hw; |
| 1190 | 1190 | bool phy_configured; |
| 1191 | − int bars, pm_cap, err; | |
| 1191 | + int bars, err; | |
| 1192 | 1192 | |
| 1193 | 1193 | err = pci_enable_device_mem(pdev); |
| 1194 | 1194 | if (err) |
| @@ -1225,18 +1225,13 @@ static int alx_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 30 unmodified lines | ||
| 1225 | 1225 | pci_enable_pcie_error_reporting(pdev); |
| 1226 | 1226 | pci_set_master(pdev); |
| 1227 | 1227 | |
| 1228 | − pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM); | |
| 1229 | − if (pm_cap == 0) { | |
| 1228 | + if (!pdev->pm_cap) { | |
| 1230 | 1229 | dev_err(&pdev->dev, |
| 1231 | 1230 | "Can't find power management capability, aborting\n"); |
| 1232 | 1231 | err = -EIO; |
| 1233 | 1232 | goto out_pci_release; |
| 1234 | 1233 | } |
| 1235 | 1234 | |
| 1236 | − err = pci_set_power_state(pdev, PCI_D0); | |
| 1237 | − if (err) | |
| 1238 | − goto out_pci_release; | |
| 1239 | − | |
| 1240 | 1235 | netdev = alloc_etherdev(sizeof(*alx)); |
| 1241 | 1236 | if (!netdev) { |
| 1242 | 1237 | err = -ENOMEM; |
| @@ -157,6 +157,7 @@ static netdev_tx_t bgmac_dma_tx_add(struct bgmac *bgmac, · 156 unmodified lines | ||
| 157 | 157 | if (++ring->end >= BGMAC_TX_RING_SLOTS) |
| 158 | 158 | ring->end = 0; |
| 159 | 159 | bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_INDEX, |
| 160 | + ring->index_base + | |
| 160 | 161 | ring->end * sizeof(struct bgmac_dma_desc)); |
| 161 | 162 | |
| 162 | 163 | /* Always keep one slot free to allow detecting bugged calls. */ |
| @@ -181,6 +182,8 @@ static void bgmac_dma_tx_free(struct bgmac *bgmac, struct bgmac_dma_ring *ring) · 18 unmodified lines | ||
| 181 | 182 | /* The last slot that hardware didn't consume yet */ |
| 182 | 183 | empty_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS); |
| 183 | 184 | empty_slot &= BGMAC_DMA_TX_STATDPTR; |
| 185 | + empty_slot -= ring->index_base; | |
| 186 | + empty_slot &= BGMAC_DMA_TX_STATDPTR; | |
| 184 | 187 | empty_slot /= sizeof(struct bgmac_dma_desc); |
| 185 | 188 | |
| 186 | 189 | while (ring->start != empty_slot) { |
| @@ -274,6 +277,8 @@ static int bgmac_dma_rx_read(struct bgmac *bgmac, struct bgmac_dma_ring *ring, · 87 unmodified lines | ||
| 274 | 277 | |
| 275 | 278 | end_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_STATUS); |
| 276 | 279 | end_slot &= BGMAC_DMA_RX_STATDPTR; |
| 280 | + end_slot -= ring->index_base; | |
| 281 | + end_slot &= BGMAC_DMA_RX_STATDPTR; | |
| 277 | 282 | end_slot /= sizeof(struct bgmac_dma_desc); |
| 278 | 283 | |
| 279 | 284 | ring->end = end_slot; |
| @@ -418,9 +423,6 @@ static int bgmac_dma_alloc(struct bgmac *bgmac) · 138 unmodified lines | ||
| 418 | 423 | ring = &bgmac->tx_ring[i]; |
| 419 | 424 | ring->num_slots = BGMAC_TX_RING_SLOTS; |
| 420 | 425 | ring->mmio_base = ring_base[i]; |
| 421 | − if (bgmac_dma_unaligned(bgmac, ring, BGMAC_DMA_RING_TX)) | |
| 422 | − bgmac_warn(bgmac, "TX on ring 0x%X supports unaligned addressing but this feature is not implemented\n", | |
| 423 | − ring->mmio_base); | |
| 424 | 426 | |
| 425 | 427 | /* Alloc ring of descriptors */ |
| 426 | 428 | size = ring->num_slots * sizeof(struct bgmac_dma_desc); |
| @@ -435,6 +437,13 @@ static int bgmac_dma_alloc(struct bgmac *bgmac) · 8 unmodified lines | ||
| 435 | 437 | if (ring->dma_base & 0xC0000000) |
| 436 | 438 | bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n"); |
| 437 | 439 | |
| 440 | + ring->unaligned = bgmac_dma_unaligned(bgmac, ring, | |
| 441 | + BGMAC_DMA_RING_TX); | |
| 442 | + if (ring->unaligned) | |
| 443 | + ring->index_base = lower_32_bits(ring->dma_base); | |
| 444 | + else | |
| 445 | + ring->index_base = 0; | |
| 446 | + | |
| 438 | 447 | /* No need to alloc TX slots yet */ |
| 439 | 448 | } |
| 440 | 449 | |
| @@ -444,9 +453,6 @@ static int bgmac_dma_alloc(struct bgmac *bgmac) · 3 unmodified lines | ||
| 444 | 453 | ring = &bgmac->rx_ring[i]; |
| 445 | 454 | ring->num_slots = BGMAC_RX_RING_SLOTS; |
| 446 | 455 | ring->mmio_base = ring_base[i]; |
| 447 | − if (bgmac_dma_unaligned(bgmac, ring, BGMAC_DMA_RING_RX)) | |
| 448 | − bgmac_warn(bgmac, "RX on ring 0x%X supports unaligned addressing but this feature is not implemented\n", | |
| 449 | − ring->mmio_base); | |
| 450 | 456 | |
| 451 | 457 | /* Alloc ring of descriptors */ |
| 452 | 458 | size = ring->num_slots * sizeof(struct bgmac_dma_desc); |
| @@ -462,6 +468,13 @@ static int bgmac_dma_alloc(struct bgmac *bgmac) · 9 unmodified lines | ||
| 462 | 468 | if (ring->dma_base & 0xC0000000) |
| 463 | 469 | bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n"); |
| 464 | 470 | |
| 471 | + ring->unaligned = bgmac_dma_unaligned(bgmac, ring, | |
| 472 | + BGMAC_DMA_RING_RX); | |
| 473 | + if (ring->unaligned) | |
| 474 | + ring->index_base = lower_32_bits(ring->dma_base); | |
| 475 | + else | |
| 476 | + ring->index_base = 0; | |
| 477 | + | |
| 465 | 478 | /* Alloc RX slots */ |
| 466 | 479 | for (j = 0; j < ring->num_slots; j++) { |
| 467 | 480 | err = bgmac_dma_rx_skb_for_slot(bgmac, &ring->slots[j]); |
| @@ -489,12 +502,14 @@ static void bgmac_dma_init(struct bgmac *bgmac) · 21 unmodified lines | ||
| 489 | 502 | for (i = 0; i < BGMAC_MAX_TX_RINGS; i++) { |
| 490 | 503 | ring = &bgmac->tx_ring[i]; |
| 491 | 504 | |
| 492 | − /* We don't implement unaligned addressing, so enable first */ | |
| 493 | − bgmac_dma_tx_enable(bgmac, ring); | |
| 505 | + if (!ring->unaligned) | |
| 506 | + bgmac_dma_tx_enable(bgmac, ring); | |
| 494 | 507 | bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGLO, |
| 495 | 508 | lower_32_bits(ring->dma_base)); |
| 496 | 509 | bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGHI, |
| 497 | 510 | upper_32_bits(ring->dma_base)); |
| 511 | + if (ring->unaligned) | |
| 512 | + bgmac_dma_tx_enable(bgmac, ring); | |
| 498 | 513 | |
| 499 | 514 | ring->start = 0; |
| 500 | 515 | ring->end = 0; /* Points the slot that should *not* be read */ |
| @@ -505,12 +520,14 @@ static void bgmac_dma_init(struct bgmac *bgmac) · 4 unmodified lines | ||
| 505 | 520 | |
| 506 | 521 | ring = &bgmac->rx_ring[i]; |
| 507 | 522 | |
| 508 | − /* We don't implement unaligned addressing, so enable first */ | |
| 509 | − bgmac_dma_rx_enable(bgmac, ring); | |
| 523 | + if (!ring->unaligned) | |
| 524 | + bgmac_dma_rx_enable(bgmac, ring); | |
| 510 | 525 | bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGLO, |
| 511 | 526 | lower_32_bits(ring->dma_base)); |
| 512 | 527 | bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGHI, |
| 513 | 528 | upper_32_bits(ring->dma_base)); |
| 529 | + if (ring->unaligned) | |
| 530 | + bgmac_dma_rx_enable(bgmac, ring); | |
| 514 | 531 | |
| 515 | 532 | for (j = 0, dma_desc = ring->cpu_base; j < ring->num_slots; |
| 516 | 533 | j++, dma_desc++) { |
| @@ -531,6 +548,7 @@ static void bgmac_dma_init(struct bgmac *bgmac) · 14 unmodified lines | ||
| 531 | 548 | } |
| 532 | 549 | |
| 533 | 550 | bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_INDEX, |
| 551 | + ring->index_base + | |
| 534 | 552 | ring->num_slots * sizeof(struct bgmac_dma_desc)); |
| 535 | 553 | |
| 536 | 554 | ring->start = 0; |
| @@ -908,10 +926,10 @@ static void bgmac_chip_reset(struct bgmac *bgmac) · 371 unmodified lines | ||
| 908 | 926 | struct bcma_drv_cc *cc = &bgmac->core->bus->drv_cc; |
| 909 | 927 | u8 et_swtype = 0; |
| 910 | 928 | u8 sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHY | |
| 911 | − BGMAC_CHIPCTL_1_IF_TYPE_RMII; | |
| 912 | − char buf[2]; | |
| 929 | + BGMAC_CHIPCTL_1_IF_TYPE_MII; | |
| 930 | + char buf[4]; | |
| 913 | 931 | |
| 914 | − if (bcm47xx_nvram_getenv("et_swtype", buf, 1) > 0) { | |
| 932 | + if (bcm47xx_nvram_getenv("et_swtype", buf, sizeof(buf)) > 0) { | |
| 915 | 933 | if (kstrtou8(buf, 0, &et_swtype)) |
| 916 | 934 | bgmac_err(bgmac, "Failed to parse et_swtype (%s)\n", |
| 917 | 935 | buf); |
| @@ -333,7 +333,7 @@ · 332 unmodified lines | ||
| 333 | 333 | |
| 334 | 334 | #define BGMAC_CHIPCTL_1_IF_TYPE_MASK 0x00000030 |
| 335 | 335 | #define BGMAC_CHIPCTL_1_IF_TYPE_RMII 0x00000000 |
| 336 | −#define BGMAC_CHIPCTL_1_IF_TYPE_MI 0x00000010 | |
| 336 | +#define BGMAC_CHIPCTL_1_IF_TYPE_MII 0x00000010 | |
| 337 | 337 | #define BGMAC_CHIPCTL_1_IF_TYPE_RGMII 0x00000020 |
| 338 | 338 | #define BGMAC_CHIPCTL_1_SW_TYPE_MASK 0x000000C0 |
| 339 | 339 | #define BGMAC_CHIPCTL_1_SW_TYPE_EPHY 0x00000000 |
| @@ -384,6 +384,8 @@ struct bgmac_dma_ring { · 44 unmodified lines | ||
| 384 | 384 | u16 mmio_base; |
| 385 | 385 | struct bgmac_dma_desc *cpu_base; |
| 386 | 386 | dma_addr_t dma_base; |
| 387 | + u32 index_base; /* Used for unaligned rings only, otherwise 0 */ | |
| 388 | + bool unaligned; | |
| 387 | 389 | |
| 388 | 390 | struct bgmac_slot_info slots[BGMAC_RX_RING_SLOTS]; |
| 389 | 391 | }; |
| @@ -246,8 +246,37 @@ enum { · 245 unmodified lines | ||
| 246 | 246 | BNX2X_MAX_CNIC_ETH_CL_ID_IDX, |
| 247 | 247 | }; |
| 248 | 248 | |
| 249 | −#define BNX2X_CNIC_START_ETH_CID(bp) (BNX2X_NUM_NON_CNIC_QUEUES(bp) *\ | |
| 249 | +/* use a value high enough to be above all the PFs, which has least significant | |
| 250 | + * nibble as 8, so when cnic needs to come up with a CID for UIO to use to | |
| 251 | + * calculate doorbell address according to old doorbell configuration scheme | |
| 252 | + * (db_msg_sz 1 << 7 * cid + 0x40 DPM offset) it can come up with a valid number | |
| 253 | + * We must avoid coming up with cid 8 for iscsi since according to this method | |
| 254 | + * the designated UIO cid will come out 0 and it has a special handling for that | |
| 255 | + * case which doesn't suit us. Therefore will will cieling to closes cid which | |
| 256 | + * has least signigifcant nibble 8 and if it is 8 we will move forward to 0x18. | |
| 257 | + */ | |
| 258 | + | |
| 259 | +#define BNX2X_1st_NON_L2_ETH_CID(bp) (BNX2X_NUM_NON_CNIC_QUEUES(bp) * \ | |
| 250 | 260 | (bp)->max_cos) |
| 261 | +/* amount of cids traversed by UIO's DPM addition to doorbell */ | |
| 262 | +#define UIO_DPM 8 | |
| 263 | +/* roundup to DPM offset */ | |
| 264 | +#define UIO_ROUNDUP(bp) (roundup(BNX2X_1st_NON_L2_ETH_CID(bp), \ | |
| 265 | + UIO_DPM)) | |
| 266 | +/* offset to nearest value which has lsb nibble matching DPM */ | |
| 267 | +#define UIO_CID_OFFSET(bp) ((UIO_ROUNDUP(bp) + UIO_DPM) % \ | |
| 268 | + (UIO_DPM * 2)) | |
| 269 | +/* add offset to rounded-up cid to get a value which could be used with UIO */ | |
| 270 | +#define UIO_DPM_ALIGN(bp) (UIO_ROUNDUP(bp) + UIO_CID_OFFSET(bp)) | |
| 271 | +/* but wait - avoid UIO special case for cid 0 */ | |
| 272 | +#define UIO_DPM_CID0_OFFSET(bp) ((UIO_DPM * 2) * \ | |
| 273 | + (UIO_DPM_ALIGN(bp) == UIO_DPM)) | |
| 274 | +/* Properly DPM aligned CID dajusted to cid 0 secal case */ | |
| 275 | +#define BNX2X_CNIC_START_ETH_CID(bp) (UIO_DPM_ALIGN(bp) + \ | |
| 276 | + (UIO_DPM_CID0_OFFSET(bp))) | |
| 277 | +/* how many cids were wasted - need this value for cid allocation */ | |
| 278 | +#define UIO_CID_PAD(bp) (BNX2X_CNIC_START_ETH_CID(bp) - \ | |
| 279 | + BNX2X_1st_NON_L2_ETH_CID(bp)) | |
| 251 | 280 | /* iSCSI L2 */ |
| 252 | 281 | #define BNX2X_ISCSI_ETH_CID(bp) (BNX2X_CNIC_START_ETH_CID(bp)) |
| 253 | 282 | /* FCoE L2 */ |
| @@ -1542,7 +1571,6 @@ struct bnx2x { · 1288 unmodified lines | ||
| 1542 | 1571 | */ |
| 1543 | 1572 | bool fcoe_init; |
| 1544 | 1573 | |
| 1545 | − int pm_cap; | |
| 1546 | 1574 | int mrrs; |
| 1547 | 1575 | |
| 1548 | 1576 | struct delayed_work sp_task; |
| @@ -1681,10 +1709,11 @@ struct bnx2x { · 132 unmodified lines | ||
| 1681 | 1709 | * Maximum CID count that might be required by the bnx2x: |
| 1682 | 1710 | * Max RSS * Max_Tx_Multi_Cos + FCoE + iSCSI |
| 1683 | 1711 | */ |
| 1712 | + | |
| 1684 | 1713 | #define BNX2X_L2_CID_COUNT(bp) (BNX2X_NUM_ETH_QUEUES(bp) * BNX2X_MULTI_TX_COS \ |
| 1685 | − + 2 * CNIC_SUPPORT(bp)) | |
| 1714 | + + CNIC_SUPPORT(bp) * (2 + UIO_CID_PAD(bp))) | |
| 1686 | 1715 | #define BNX2X_L2_MAX_CID(bp) (BNX2X_MAX_RSS_COUNT(bp) * BNX2X_MULTI_TX_COS \ |
| 1687 | − + 2 * CNIC_SUPPORT(bp)) | |
| 1716 | + + CNIC_SUPPORT(bp) * (2 + UIO_CID_PAD(bp))) | |
| 1688 | 1717 | #define L2_ILT_LINES(bp) (DIV_ROUND_UP(BNX2X_L2_CID_COUNT(bp),\ |
| 1689 | 1718 | ILT_PAGE_CIDS)) |
| 1690 | 1719 | |
| @@ -2481,8 +2481,7 @@ load_error_cnic2: · 2480 unmodified lines | ||
| 2481 | 2481 | load_error_cnic1: |
| 2482 | 2482 | bnx2x_napi_disable_cnic(bp); |
| 2483 | 2483 | /* Update the number of queues without the cnic queues */ |
| 2484 | − rc = bnx2x_set_real_num_queues(bp, 0); | |
| 2485 | − if (rc) | |
| 2484 | + if (bnx2x_set_real_num_queues(bp, 0)) | |
| 2486 | 2485 | BNX2X_ERR("Unable to set real_num_queues not including cnic\n"); |
| 2487 | 2486 | load_error_cnic0: |
| 2488 | 2487 | BNX2X_ERR("CNIC-related load failed\n"); |
| @@ -3008,16 +3007,16 @@ int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state) · 519 unmodified lines | ||
| 3008 | 3007 | u16 pmcsr; |
| 3009 | 3008 | |
| 3010 | 3009 | /* If there is no power capability, silently succeed */ |
| 3011 | − if (!bp->pm_cap) { | |
| 3010 | + if (!bp->pdev->pm_cap) { | |
| 3012 | 3011 | BNX2X_DEV_INFO("No power capability. Breaking.\n"); |
| 3013 | 3012 | return 0; |
| 3014 | 3013 | } |
| 3015 | 3014 | |
| 3016 | − pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmcsr); | |
| 3015 | + pci_read_config_word(bp->pdev, bp->pdev->pm_cap + PCI_PM_CTRL, &pmcsr); | |
| 3017 | 3016 | |
| 3018 | 3017 | switch (state) { |
| 3019 | 3018 | case PCI_D0: |
| 3020 | − pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, | |
| 3019 | + pci_write_config_word(bp->pdev, bp->pdev->pm_cap + PCI_PM_CTRL, | |
| 3021 | 3020 | ((pmcsr & ~PCI_PM_CTRL_STATE_MASK) | |
| 3022 | 3021 | PCI_PM_CTRL_PME_STATUS)); |
| 3023 | 3022 | |
| @@ -3041,7 +3040,7 @@ int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state) · 17 unmodified lines | ||
| 3041 | 3040 | if (bp->wol) |
| 3042 | 3041 | pmcsr |= PCI_PM_CTRL_PME_ENABLE; |
| 3043 | 3042 | |
| 3044 | − pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, | |
| 3043 | + pci_write_config_word(bp->pdev, bp->pdev->pm_cap + PCI_PM_CTRL, | |
| 3045 | 3044 | pmcsr); |
| 3046 | 3045 | |
| 3047 | 3046 | /* No more memory access after this point until |
| @@ -1387,9 +1387,9 @@ static bool bnx2x_is_nvm_accessible(struct bnx2x *bp) · 1386 unmodified lines | ||
| 1387 | 1387 | u16 pm = 0; |
| 1388 | 1388 | struct net_device *dev = pci_get_drvdata(bp->pdev); |
| 1389 | 1389 | |
| 1390 | − if (bp->pm_cap) | |
| 1390 | + if (bp->pdev->pm_cap) | |
| 1391 | 1391 | rc = pci_read_config_word(bp->pdev, |
| 1392 | − bp->pm_cap + PCI_PM_CTRL, &pm); | |
| 1392 | + bp->pdev->pm_cap + PCI_PM_CTRL, &pm); | |
| 1393 | 1393 | |
| 1394 | 1394 | if ((rc && !netif_running(dev)) || |
| 1395 | 1395 | (!rc && ((pm & PCI_PM_CTRL_STATE_MASK) != (__force u16)PCI_D0))) |
| @@ -175,6 +175,7 @@ typedef int (*read_sfp_module_eeprom_func_p)(struct bnx2x_phy *phy, · 174 unmodified lines | ||
| 175 | 175 | #define EDC_MODE_LINEAR 0x0022 |
| 176 | 176 | #define EDC_MODE_LIMITING 0x0044 |
| 177 | 177 | #define EDC_MODE_PASSIVE_DAC 0x0055 |
| 178 | +#define EDC_MODE_ACTIVE_DAC 0x0066 | |
| 178 | 179 | |
| 179 | 180 | /* ETS defines*/ |
| 180 | 181 | #define DCBX_INVALID_COS (0xFF) |
| @@ -3684,6 +3685,41 @@ static void bnx2x_warpcore_enable_AN_KR2(struct bnx2x_phy *phy, · 3503 unmodified lines | ||
| 3684 | 3685 | bnx2x_update_link_attr(params, vars->link_attr_sync); |
| 3685 | 3686 | } |
| 3686 | 3687 | |
| 3688 | +static void bnx2x_disable_kr2(struct link_params *params, | |
| 3689 | + struct link_vars *vars, | |
| 3690 | + struct bnx2x_phy *phy) | |
| 3691 | +{ | |
| 3692 | + struct bnx2x *bp = params->bp; | |
| 3693 | + int i; | |
| 3694 | + static struct bnx2x_reg_set reg_set[] = { | |
| 3695 | + /* Step 1 - Program the TX/RX alignment markers */ | |
| 3696 | + {MDIO_WC_DEVAD, MDIO_WC_REG_CL82_USERB1_TX_CTRL5, 0x7690}, | |
| 3697 | + {MDIO_WC_DEVAD, MDIO_WC_REG_CL82_USERB1_TX_CTRL7, 0xe647}, | |
| 3698 | + {MDIO_WC_DEVAD, MDIO_WC_REG_CL82_USERB1_TX_CTRL6, 0xc4f0}, | |
| 3699 | + {MDIO_WC_DEVAD, MDIO_WC_REG_CL82_USERB1_TX_CTRL9, 0x7690}, | |
| 3700 | + {MDIO_WC_DEVAD, MDIO_WC_REG_CL82_USERB1_RX_CTRL11, 0xe647}, | |
| 3701 | + {MDIO_WC_DEVAD, MDIO_WC_REG_CL82_USERB1_RX_CTRL10, 0xc4f0}, | |
| 3702 | + {MDIO_WC_DEVAD, MDIO_WC_REG_CL73_USERB0_CTRL, 0x000c}, | |
| 3703 | + {MDIO_WC_DEVAD, MDIO_WC_REG_CL73_BAM_CTRL1, 0x6000}, | |
| 3704 | + {MDIO_WC_DEVAD, MDIO_WC_REG_CL73_BAM_CTRL3, 0x0000}, | |
| 3705 | + {MDIO_WC_DEVAD, MDIO_WC_REG_CL73_BAM_CODE_FIELD, 0x0002}, | |
| 3706 | + {MDIO_WC_DEVAD, MDIO_WC_REG_ETA_CL73_OUI1, 0x0000}, | |
| 3707 | + {MDIO_WC_DEVAD, MDIO_WC_REG_ETA_CL73_OUI2, 0x0af7}, | |
| 3708 | + {MDIO_WC_DEVAD, MDIO_WC_REG_ETA_CL73_OUI3, 0x0af7}, | |
| 3709 | + {MDIO_WC_DEVAD, MDIO_WC_REG_ETA_CL73_LD_BAM_CODE, 0x0002}, | |
| 3710 | + {MDIO_WC_DEVAD, MDIO_WC_REG_ETA_CL73_LD_UD_CODE, 0x0000} | |
| 3711 | + }; | |
| 3712 | + DP(NETIF_MSG_LINK, "Disabling 20G-KR2\n"); | |
| 3713 | + | |
| 3714 | + for (i = 0; i < ARRAY_SIZE(reg_set); i++) | |
| 3715 | + bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, | |
| 3716 | + reg_set[i].val); | |
| 3717 | + vars->link_attr_sync &= ~LINK_ATTR_SYNC_KR2_ENABLE; | |
| 3718 | + bnx2x_update_link_attr(params, vars->link_attr_sync); | |
| 3719 | + | |
| 3720 | + vars->check_kr2_recovery_cnt = CHECK_KR2_RECOVERY_CNT; | |
| 3721 | +} | |
| 3722 | + | |
| 3687 | 3723 | static void bnx2x_warpcore_set_lpi_passthrough(struct bnx2x_phy *phy, |
| 3688 | 3724 | struct link_params *params) |
| 3689 | 3725 | { |
| @@ -3715,7 +3751,6 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, · 25 unmodified lines | ||
| 3715 | 3751 | struct link_params *params, |
| 3716 | 3752 | struct link_vars *vars) { |
| 3717 | 3753 | u16 lane, i, cl72_ctrl, an_adv = 0; |
| 3718 | − u16 ucode_ver; | |
| 3719 | 3754 | struct bnx2x *bp = params->bp; |
| 3720 | 3755 | static struct bnx2x_reg_set reg_set[] = { |
| 3721 | 3756 | {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, 0x7}, |
| @@ -3806,15 +3841,7 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, · 84 unmodified lines | ||
| 3806 | 3841 | |
| 3807 | 3842 | /* Advertise pause */ |
| 3808 | 3843 | bnx2x_ext_phy_set_pause(params, phy, vars); |
| 3809 | − /* Set KR Autoneg Work-Around flag for Warpcore version older than D108 | |
| 3810 | − */ | |
| 3811 | − bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, | |
| 3812 | − MDIO_WC_REG_UC_INFO_B1_VERSION, &ucode_ver); | |
| 3813 | − if (ucode_ver < 0xd108) { | |
| 3814 | − DP(NETIF_MSG_LINK, "Enable AN KR work-around. WC ver:0x%x\n", | |
| 3815 | − ucode_ver); | |
| 3816 | − vars->rx_tx_asic_rst = MAX_KR_LINK_RETRY; | |
| 3817 | − } | |
| 3844 | + vars->rx_tx_asic_rst = MAX_KR_LINK_RETRY; | |
| 3818 | 3845 | bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD, |
| 3819 | 3846 | MDIO_WC_REG_DIGITAL5_MISC7, 0x100); |
| 3820 | 3847 | |
| @@ -3838,6 +3865,8 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, · 17 unmodified lines | ||
| 3838 | 3865 | bnx2x_set_aer_mmd(params, phy); |
| 3839 | 3866 | |
| 3840 | 3867 | bnx2x_warpcore_enable_AN_KR2(phy, params, vars); |
| 3868 | + } else { | |
| 3869 | + bnx2x_disable_kr2(params, vars, phy); | |
| 3841 | 3870 | } |
| 3842 | 3871 | |
| 3843 | 3872 | /* Enable Autoneg: only on the main lane */ |
| @@ -4347,20 +4376,14 @@ static void bnx2x_warpcore_config_runtime(struct bnx2x_phy *phy, · 503 unmodified lines | ||
| 4347 | 4376 | struct bnx2x *bp = params->bp; |
| 4348 | 4377 | u32 serdes_net_if; |
| 4349 | 4378 | u16 gp_status1 = 0, lnkup = 0, lnkup_kr = 0; |
| 4350 | − u16 lane = bnx2x_get_warpcore_lane(phy, params); | |
| 4351 | 4379 | |
| 4352 | 4380 | vars->turn_to_run_wc_rt = vars->turn_to_run_wc_rt ? 0 : 1; |
| 4353 | 4381 | |
| 4354 | 4382 | if (!vars->turn_to_run_wc_rt) |
| 4355 | 4383 | return; |
| 4356 | 4384 | |
| 4357 | − /* Return if there is no link partner */ | |
| 4358 | − if (!(bnx2x_warpcore_get_sigdet(phy, params))) { | |
| 4359 | − DP(NETIF_MSG_LINK, "bnx2x_warpcore_get_sigdet false\n"); | |
| 4360 | − return; | |
| 4361 | − } | |
| 4362 | − | |
| 4363 | 4385 | if (vars->rx_tx_asic_rst) { |
| 4386 | + u16 lane = bnx2x_get_warpcore_lane(phy, params); | |
| 4364 | 4387 | serdes_net_if = (REG_RD(bp, params->shmem_base + |
| 4365 | 4388 | offsetof(struct shmem_region, dev_info. |
| 4366 | 4389 | port_hw_config[params->port].default_cfg)) & |
| @@ -4375,14 +4398,8 @@ static void bnx2x_warpcore_config_runtime(struct bnx2x_phy *phy, · 8 unmodified lines | ||
| 4375 | 4398 | /*10G KR*/ |
| 4376 | 4399 | lnkup_kr = (gp_status1 >> (12+lane)) & 0x1; |
| 4377 | 4400 | |
| 4378 | − DP(NETIF_MSG_LINK, | |
| 4379 | − "gp_status1 0x%x\n", gp_status1); | |
| 4380 | − | |
| 4381 | 4401 | if (lnkup_kr || lnkup) { |
| 4382 | − vars->rx_tx_asic_rst = 0; | |
| 4383 | − DP(NETIF_MSG_LINK, | |
| 4384 | − "link up, rx_tx_asic_rst 0x%x\n", | |
| 4385 | − vars->rx_tx_asic_rst); | |
| 4402 | + vars->rx_tx_asic_rst = 0; | |
| 4386 | 4403 | } else { |
| 4387 | 4404 | /* Reset the lane to see if link comes up.*/ |
| 4388 | 4405 | bnx2x_warpcore_reset_lane(bp, phy, 1); |
| @@ -4507,10 +4524,14 @@ static void bnx2x_warpcore_config_init(struct bnx2x_phy *phy, · 118 unmodified lines | ||
| 4507 | 4524 | * enabled transmitter to avoid current leakage in case |
| 4508 | 4525 | * no module is connected |
| 4509 | 4526 | */ |
| 4510 | − if (bnx2x_is_sfp_module_plugged(phy, params)) | |
| 4511 | − bnx2x_sfp_module_detection(phy, params); | |
| 4512 | − else | |
| 4513 | − bnx2x_sfp_e3_set_transmitter(params, phy, 1); | |
| 4527 | + if ((params->loopback_mode == LOOPBACK_NONE) || | |
| 4528 | + (params->loopback_mode == LOOPBACK_EXT)) { | |
| 4529 | + if (bnx2x_is_sfp_module_plugged(phy, params)) | |
| 4530 | + bnx2x_sfp_module_detection(phy, params); | |
| 4531 | + else | |
| 4532 | + bnx2x_sfp_e3_set_transmitter(params, | |
| 4533 | + phy, 1); | |
| 4534 | + } | |
| 4514 | 4535 | |
| 4515 | 4536 | bnx2x_warpcore_config_sfi(phy, params); |
| 4516 | 4537 | break; |
| @@ -5757,6 +5778,11 @@ static int bnx2x_warpcore_read_status(struct bnx2x_phy *phy, · 1240 unmodified lines | ||
| 5757 | 5778 | rc = bnx2x_get_link_speed_duplex(phy, params, vars, link_up, gp_speed, |
| 5758 | 5779 | duplex); |
| 5759 | 5780 | |
| 5781 | + /* In case of KR link down, start up the recovering procedure */ | |
| 5782 | + if ((!link_up) && (phy->media_type == ETH_PHY_KR) && | |
| 5783 | + (!(phy->flags & FLAGS_WC_DUAL_MODE))) | |
| 5784 | + vars->rx_tx_asic_rst = MAX_KR_LINK_RETRY; | |
| 5785 | + | |
| 5760 | 5786 | DP(NETIF_MSG_LINK, "duplex %x flow_ctrl 0x%x link_status 0x%x\n", |
| 5761 | 5787 | vars->duplex, vars->flow_ctrl, vars->link_status); |
| 5762 | 5788 | return rc; |
| @@ -6507,6 +6533,11 @@ static int bnx2x_link_initialize(struct link_params *params, · 744 unmodified lines | ||
| 6507 | 6533 | params->phy[INT_PHY].config_init(phy, params, vars); |
| 6508 | 6534 | } |
| 6509 | 6535 | |
| 6536 | + /* Re-read this value in case it was changed inside config_init due to | |
| 6537 | + * limitations of optic module | |
| 6538 | + */ | |
| 6539 | + vars->line_speed = params->phy[INT_PHY].req_line_speed; | |
| 6540 | + | |
| 6510 | 6541 | /* Init external phy*/ |
| 6511 | 6542 | if (non_ext_phy) { |
| 6512 | 6543 | if (params->phy[INT_PHY].supported & |
| @@ -8080,7 +8111,10 @@ static int bnx2x_get_edc_mode(struct bnx2x_phy *phy, · 1567 unmodified lines | ||
| 8080 | 8111 | if (copper_module_type & |
| 8081 | 8112 | SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_ACTIVE) { |
| 8082 | 8113 | DP(NETIF_MSG_LINK, "Active Copper cable detected\n"); |
| 8083 | − check_limiting_mode = 1; | |
| 8114 | + if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) | |
| 8115 | + *edc_mode = EDC_MODE_ACTIVE_DAC; | |
| 8116 | + else | |
| 8117 | + check_limiting_mode = 1; | |
| 8084 | 8118 | } else if (copper_module_type & |
| 8085 | 8119 | SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_PASSIVE) { |
| 8086 | 8120 | DP(NETIF_MSG_LINK, |
| @@ -8555,6 +8589,7 @@ static void bnx2x_warpcore_set_limiting_mode(struct link_params *params, · 468 unmodified lines | ||
| 8555 | 8589 | mode = MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_DEFAULT; |
| 8556 | 8590 | break; |
| 8557 | 8591 | case EDC_MODE_PASSIVE_DAC: |
| 8592 | + case EDC_MODE_ACTIVE_DAC: | |
| 8558 | 8593 | mode = MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE_SFP_DAC; |
| 8559 | 8594 | break; |
| 8560 | 8595 | default: |
| @@ -9730,32 +9765,41 @@ static int bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy, · 1169 unmodified lines | ||
| 9730 | 9765 | MDIO_AN_DEVAD, MDIO_AN_REG_8481_1000T_CTRL, |
| 9731 | 9766 | an_1000_val); |
| 9732 | 9767 | |
| 9733 | − /* set 100 speed advertisement */ | |
| 9734 | − if ((phy->req_line_speed == SPEED_AUTO_NEG) && | |
| 9735 | − (phy->speed_cap_mask & | |
| 9736 | − (PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_FULL | | |
| 9737 | − PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_HALF))) { | |
| 9738 | − an_10_100_val |= (1<<7); | |
| 9739 | − /* Enable autoneg and restart autoneg for legacy speeds */ | |
| 9740 | − autoneg_val |= (1<<9 | 1<<12); | |
| 9741 | − | |
| 9742 | − if (phy->req_duplex == DUPLEX_FULL) | |
| 9768 | + /* Set 10/100 speed advertisement */ | |
| 9769 | + if (phy->req_line_speed == SPEED_AUTO_NEG) { | |
| 9770 | + if (phy->speed_cap_mask & | |
| 9771 | + PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_FULL) { | |
| 9772 | + /* Enable autoneg and restart autoneg for legacy speeds | |
| 9773 | + */ | |
| 9774 | + autoneg_val |= (1<<9 | 1<<12); | |
| 9743 | 9775 | an_10_100_val |= (1<<8); |
| 9744 | − DP(NETIF_MSG_LINK, "Advertising 100M\n"); | |
| 9745 | − } | |
| 9746 | − /* set 10 speed advertisement */ | |
| 9747 | − if (((phy->req_line_speed == SPEED_AUTO_NEG) && | |
| 9748 | − (phy->speed_cap_mask & | |
| 9749 | − (PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_FULL | | |
| 9750 | − PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_HALF)) && | |
| 9751 | − (phy->supported & | |
| 9752 | − (SUPPORTED_10baseT_Half | | |
| 9753 | − SUPPORTED_10baseT_Full)))) { | |
| 9754 | − an_10_100_val |= (1<<5); | |
| 9755 | − autoneg_val |= (1<<9 | 1<<12); | |
| 9756 | − if (phy->req_duplex == DUPLEX_FULL) | |
| 9776 | + DP(NETIF_MSG_LINK, "Advertising 100M-FD\n"); | |
| 9777 | + } | |
| 9778 | + | |
| 9779 | + if (phy->speed_cap_mask & | |
| 9780 | + PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_HALF) { | |
| 9781 | + /* Enable autoneg and restart autoneg for legacy speeds | |
| 9782 | + */ | |
| 9783 | + autoneg_val |= (1<<9 | 1<<12); | |
| 9784 | + an_10_100_val |= (1<<7); | |
| 9785 | + DP(NETIF_MSG_LINK, "Advertising 100M-HD\n"); | |
| 9786 | + } | |
| 9787 | + | |
| 9788 | + if ((phy->speed_cap_mask & | |
| 9789 | + PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_FULL) && | |
| 9790 | + (phy->supported & SUPPORTED_10baseT_Full)) { | |
| 9757 | 9791 | an_10_100_val |= (1<<6); |
| 9758 | − DP(NETIF_MSG_LINK, "Advertising 10M\n"); | |
| 9792 | + autoneg_val |= (1<<9 | 1<<12); | |
| 9793 | + DP(NETIF_MSG_LINK, "Advertising 10M-FD\n"); | |
| 9794 | + } | |
| 9795 | + | |
| 9796 | + if ((phy->speed_cap_mask & | |
| 9797 | + PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_HALF) && | |
| 9798 | + (phy->supported & SUPPORTED_10baseT_Half)) { | |
| 9799 | + an_10_100_val |= (1<<5); | |
| 9800 | + autoneg_val |= (1<<9 | 1<<12); | |
| 9801 | + DP(NETIF_MSG_LINK, "Advertising 10M-HD\n"); | |
| 9802 | + } | |
| 9759 | 9803 | } |
| 9760 | 9804 | |
| 9761 | 9805 | /* Only 10/100 are allowed to work in FORCE mode */ |
| @@ -13432,43 +13476,6 @@ static void bnx2x_sfp_tx_fault_detection(struct bnx2x_phy *phy, · 3670 unmodified lines | ||
| 13432 | 13476 | } |
| 13433 | 13477 | } |
| 13434 | 13478 | } |
| 13435 | −static void bnx2x_disable_kr2(struct link_params *params, | |
| 13436 | − struct link_vars *vars, | |
| 13437 | − struct bnx2x_phy *phy) | |
| 13438 | −{ | |
| 13439 | − struct bnx2x *bp = params->bp; | |
| 13440 | − int i; | |
| 13441 | − static struct bnx2x_reg_set reg_set[] = { | |
| 13442 | − /* Step 1 - Program the TX/RX alignment markers */ | |
| 13443 | − {MDIO_WC_DEVAD, MDIO_WC_REG_CL82_USERB1_TX_CTRL5, 0x7690}, | |
| 13444 | − {MDIO_WC_DEVAD, MDIO_WC_REG_CL82_USERB1_TX_CTRL7, 0xe647}, | |
| 13445 | − {MDIO_WC_DEVAD, MDIO_WC_REG_CL82_USERB1_TX_CTRL6, 0xc4f0}, | |
| 13446 | − {MDIO_WC_DEVAD, MDIO_WC_REG_CL82_USERB1_TX_CTRL9, 0x7690}, | |
| 13447 | − {MDIO_WC_DEVAD, MDIO_WC_REG_CL82_USERB1_RX_CTRL11, 0xe647}, | |
| 13448 | − {MDIO_WC_DEVAD, MDIO_WC_REG_CL82_USERB1_RX_CTRL10, 0xc4f0}, | |
| 13449 | − {MDIO_WC_DEVAD, MDIO_WC_REG_CL73_USERB0_CTRL, 0x000c}, | |
| 13450 | − {MDIO_WC_DEVAD, MDIO_WC_REG_CL73_BAM_CTRL1, 0x6000}, | |
| 13451 | − {MDIO_WC_DEVAD, MDIO_WC_REG_CL73_BAM_CTRL3, 0x0000}, | |
| 13452 | − {MDIO_WC_DEVAD, MDIO_WC_REG_CL73_BAM_CODE_FIELD, 0x0002}, | |
| 13453 | − {MDIO_WC_DEVAD, MDIO_WC_REG_ETA_CL73_OUI1, 0x0000}, | |
| 13454 | − {MDIO_WC_DEVAD, MDIO_WC_REG_ETA_CL73_OUI2, 0x0af7}, | |
| 13455 | − {MDIO_WC_DEVAD, MDIO_WC_REG_ETA_CL73_OUI3, 0x0af7}, | |
| 13456 | − {MDIO_WC_DEVAD, MDIO_WC_REG_ETA_CL73_LD_BAM_CODE, 0x0002}, | |
| 13457 | − {MDIO_WC_DEVAD, MDIO_WC_REG_ETA_CL73_LD_UD_CODE, 0x0000} | |
| 13458 | − }; | |
| 13459 | − DP(NETIF_MSG_LINK, "Disabling 20G-KR2\n"); | |
| 13460 | − | |
| 13461 | − for (i = 0; i < ARRAY_SIZE(reg_set); i++) | |
| 13462 | − bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, | |
| 13463 | − reg_set[i].val); | |
| 13464 | − vars->link_attr_sync &= ~LINK_ATTR_SYNC_KR2_ENABLE; | |
| 13465 | − bnx2x_update_link_attr(params, vars->link_attr_sync); | |
| 13466 | − | |
| 13467 | − vars->check_kr2_recovery_cnt = CHECK_KR2_RECOVERY_CNT; | |
| 13468 | − /* Restart AN on leading lane */ | |
| 13469 | − bnx2x_warpcore_restart_AN_KR(phy, params); | |
| 13470 | −} | |
| 13471 | − | |
| 13472 | 13479 | static void bnx2x_kr2_recovery(struct link_params *params, |
| 13473 | 13480 | struct link_vars *vars, |
| 13474 | 13481 | struct bnx2x_phy *phy) |
| @@ -13546,6 +13553,8 @@ static void bnx2x_check_kr2_wa(struct link_params *params, · 71 unmodified lines | ||
| 13546 | 13553 | /* Disable KR2 on both lanes */ |
| 13547 | 13554 | DP(NETIF_MSG_LINK, "BP=0x%x, NP=0x%x\n", base_page, next_page); |
| 13548 | 13555 | bnx2x_disable_kr2(params, vars, phy); |
| 13556 | + /* Restart AN on leading lane */ | |
| 13557 | + bnx2x_warpcore_restart_AN_KR(phy, params); | |
| 13549 | 13558 | return; |
| 13550 | 13559 | } |
| 13551 | 13560 | } |
| @@ -4703,6 +4703,14 @@ bool bnx2x_chk_parity_attn(struct bnx2x *bp, bool *global, bool print) · 4702 unmodified lines | ||
| 4703 | 4703 | attn.sig[3] = REG_RD(bp, |
| 4704 | 4704 | MISC_REG_AEU_AFTER_INVERT_4_FUNC_0 + |
| 4705 | 4705 | port*4); |
| 4706 | + /* Since MCP attentions can't be disabled inside the block, we need to | |
| 4707 | + * read AEU registers to see whether they're currently disabled | |
| 4708 | + */ | |
| 4709 | + attn.sig[3] &= ((REG_RD(bp, | |
| 4710 | + !port ? MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0 | |
| 4711 | + : MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0) & | |
| 4712 | + MISC_AEU_ENABLE_MCP_PRTY_BITS) | | |
| 4713 | + ~MISC_AEU_ENABLE_MCP_PRTY_BITS); | |
| 4706 | 4714 | |
| 4707 | 4715 | if (!CHIP_IS_E1x(bp)) |
| 4708 | 4716 | attn.sig[4] = REG_RD(bp, |
| @@ -5447,26 +5455,24 @@ static void bnx2x_timer(unsigned long data) · 738 unmodified lines | ||
| 5447 | 5455 | if (IS_PF(bp) && |
| 5448 | 5456 | !BP_NOMCP(bp)) { |
| 5449 | 5457 | int mb_idx = BP_FW_MB_IDX(bp); |
| 5450 | − u32 drv_pulse; | |
| 5451 | − u32 mcp_pulse; | |
| 5458 | + u16 drv_pulse; | |
| 5459 | + u16 mcp_pulse; | |
| 5452 | 5460 | |
| 5453 | 5461 | ++bp->fw_drv_pulse_wr_seq; |
| 5454 | 5462 | bp->fw_drv_pulse_wr_seq &= DRV_PULSE_SEQ_MASK; |
| 5455 | − /* TBD - add SYSTEM_TIME */ | |
| 5456 | 5463 | drv_pulse = bp->fw_drv_pulse_wr_seq; |
| 5457 | 5464 | bnx2x_drv_pulse(bp); |
| 5458 | 5465 | |
| 5459 | 5466 | mcp_pulse = (SHMEM_RD(bp, func_mb[mb_idx].mcp_pulse_mb) & |
| 5460 | 5467 | MCP_PULSE_SEQ_MASK); |
| 5461 | 5468 | /* The delta between driver pulse and mcp response |
| 5462 | − * should be 1 (before mcp response) or 0 (after mcp response) | |
| 5469 | + * should not get too big. If the MFW is more than 5 pulses | |
| 5470 | + * behind, we should worry about it enough to generate an error | |
| 5471 | + * log. | |
| 5463 | 5472 | */ |
| 5464 | − if ((drv_pulse != mcp_pulse) && | |
| 5465 | − (drv_pulse != ((mcp_pulse + 1) & MCP_PULSE_SEQ_MASK))) { | |
| 5466 | − /* someone lost a heartbeat... */ | |
| 5467 | − BNX2X_ERR("drv_pulse (0x%x) != mcp_pulse (0x%x)\n", | |
| 5473 | + if (((drv_pulse - mcp_pulse) & MCP_PULSE_SEQ_MASK) > 5) | |
| 5474 | + BNX2X_ERR("MFW seems hanged: drv_pulse (0x%x) != mcp_pulse (0x%x)\n", | |
| 5468 | 5475 | drv_pulse, mcp_pulse); |
| 5469 | − } | |
| 5470 | 5476 | } |
| 5471 | 5477 | |
| 5472 | 5478 | if (bp->state == BNX2X_STATE_OPEN) |
| @@ -8652,6 +8658,7 @@ u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode) · 3179 unmodified lines | ||
| 8652 | 8658 | else if (bp->wol) { |
| 8653 | 8659 | u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; |
| 8654 | 8660 | u8 *mac_addr = bp->dev->dev_addr; |
| 8661 | + struct pci_dev *pdev = bp->pdev; | |
| 8655 | 8662 | u32 val; |
| 8656 | 8663 | u16 pmc; |
| 8657 | 8664 | |
| @@ -8668,9 +8675,9 @@ u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode) · 10 unmodified lines | ||
| 8668 | 8675 | EMAC_WR(bp, EMAC_REG_EMAC_MAC_MATCH + entry + 4, val); |
| 8669 | 8676 | |
| 8670 | 8677 | /* Enable the PME and clear the status */ |
| 8671 | − pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmc); | |
| 8678 | + pci_read_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, &pmc); | |
| 8672 | 8679 | pmc |= PCI_PM_CTRL_PME_ENABLE | PCI_PM_CTRL_PME_STATUS; |
| 8673 | − pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, pmc); | |
| 8680 | + pci_write_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, pmc); | |
| 8674 | 8681 | |
| 8675 | 8682 | reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_EN; |
| 8676 | 8683 | |
| @@ -10399,7 +10406,7 @@ static void bnx2x_get_common_hwinfo(struct bnx2x *bp) · 1722 unmodified lines | ||
| 10399 | 10406 | break; |
| 10400 | 10407 | } |
| 10401 | 10408 | |
| 10402 | − pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_PMC, &pmc); | |
| 10409 | + pci_read_config_word(bp->pdev, bp->pdev->pm_cap + PCI_PM_PMC, &pmc); | |
| 10403 | 10410 | bp->flags |= (pmc & PCI_PM_CAP_PME_D3cold) ? 0 : NO_WOL_FLAG; |
| 10404 | 10411 | |
| 10405 | 10412 | BNX2X_DEV_INFO("%sWoL capable\n", |
| @@ -12141,8 +12148,7 @@ static int bnx2x_init_dev(struct bnx2x *bp, struct pci_dev *pdev, · 1735 unmodified lines | ||
| 12141 | 12148 | } |
| 12142 | 12149 | |
| 12143 | 12150 | if (IS_PF(bp)) { |
| 12144 | − bp->pm_cap = pdev->pm_cap; | |
| 12145 | − if (bp->pm_cap == 0) { | |
| 12151 | + if (!pdev->pm_cap) { | |
| 12146 | 12152 | dev_err(&bp->pdev->dev, |
| 12147 | 12153 | "Cannot find power management capability, aborting\n"); |
| 12148 | 12154 | rc = -EIO; |
| @@ -13632,6 +13638,10 @@ void bnx2x_setup_cnic_info(struct bnx2x *bp) · 1483 unmodified lines | ||
| 13632 | 13638 | cp->fcoe_init_cid = BNX2X_FCOE_ETH_CID(bp); |
| 13633 | 13639 | cp->iscsi_l2_cid = BNX2X_ISCSI_ETH_CID(bp); |
| 13634 | 13640 | |
| 13641 | + DP(NETIF_MSG_IFUP, "BNX2X_1st_NON_L2_ETH_CID(bp) %x, cp->starting_cid %x, cp->fcoe_init_cid %x, cp->iscsi_l2_cid %x\n", | |
| 13642 | + BNX2X_1st_NON_L2_ETH_CID(bp), cp->starting_cid, cp->fcoe_init_cid, | |
| 13643 | + cp->iscsi_l2_cid); | |
| 13644 | + | |
| 13635 | 13645 | if (NO_ISCSI_OOO(bp)) |
| 13636 | 13646 | cp->drv_state |= CNIC_DRV_STATE_NO_ISCSI_OOO; |
| 13637 | 13647 | } |
| @@ -1819,7 +1819,7 @@ bnx2x_get_vf_igu_cam_info(struct bnx2x *bp) · 1818 unmodified lines | ||
| 1819 | 1819 | fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID); |
| 1820 | 1820 | if (fid & IGU_FID_ENCODE_IS_PF) |
| 1821 | 1821 | current_pf = fid & IGU_FID_PF_NUM_MASK; |
| 1822 | − else if (current_pf == BP_ABS_FUNC(bp)) | |
| 1822 | + else if (current_pf == BP_FUNC(bp)) | |
| 1823 | 1823 | bnx2x_vf_set_igu_info(bp, sb_id, |
| 1824 | 1824 | (fid & IGU_FID_VF_NUM_MASK)); |
| 1825 | 1825 | DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n", |
| @@ -3180,6 +3180,7 @@ int bnx2x_enable_sriov(struct bnx2x *bp) · 1354 unmodified lines | ||
| 3180 | 3180 | /* set local queue arrays */ |
| 3181 | 3181 | vf->vfqs = &bp->vfdb->vfqs[qcount]; |
| 3182 | 3182 | qcount += vf_sb_count(vf); |
| 3183 | + bnx2x_iov_static_resc(bp, vf); | |
| 3183 | 3184 | } |
| 3184 | 3185 | |
| 3185 | 3186 | /* prepare msix vectors in VF configuration space */ |
| @@ -3187,6 +3188,8 @@ int bnx2x_enable_sriov(struct bnx2x *bp) · 1 unmodified line | ||
| 3187 | 3188 | bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf_idx)); |
| 3188 | 3189 | REG_WR(bp, PCICFG_OFFSET + GRC_CONFIG_REG_VF_MSIX_CONTROL, |
| 3189 | 3190 | num_vf_queues); |
| 3191 | + DP(BNX2X_MSG_IOV, "set msix vec num in VF %d cfg space to %d\n", | |
| 3192 | + vf_idx, num_vf_queues); | |
| 3190 | 3193 | } |
| 3191 | 3194 | bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); |
| 3192 | 3195 | |
| @@ -1765,28 +1765,28 @@ static void bnx2x_vf_mbx_request(struct bnx2x *bp, struct bnx2x_virtf *vf, · 1764 unmodified lines | ||
| 1765 | 1765 | switch (mbx->first_tlv.tl.type) { |
| 1766 | 1766 | case CHANNEL_TLV_ACQUIRE: |
| 1767 | 1767 | bnx2x_vf_mbx_acquire(bp, vf, mbx); |
| 1768 | − break; | |
| 1768 | + return; | |
| 1769 | 1769 | case CHANNEL_TLV_INIT: |
| 1770 | 1770 | bnx2x_vf_mbx_init_vf(bp, vf, mbx); |
| 1771 | − break; | |
| 1771 | + return; | |
| 1772 | 1772 | case CHANNEL_TLV_SETUP_Q: |
| 1773 | 1773 | bnx2x_vf_mbx_setup_q(bp, vf, mbx); |
| 1774 | − break; | |
| 1774 | + return; | |
| 1775 | 1775 | case CHANNEL_TLV_SET_Q_FILTERS: |
| 1776 | 1776 | bnx2x_vf_mbx_set_q_filters(bp, vf, mbx); |
| 1777 | − break; | |
| 1777 | + return; | |
| 1778 | 1778 | case CHANNEL_TLV_TEARDOWN_Q: |
| 1779 | 1779 | bnx2x_vf_mbx_teardown_q(bp, vf, mbx); |
| 1780 | − break; | |
| 1780 | + return; | |
| 1781 | 1781 | case CHANNEL_TLV_CLOSE: |
| 1782 | 1782 | bnx2x_vf_mbx_close_vf(bp, vf, mbx); |
| 1783 | − break; | |
| 1783 | + return; | |
| 1784 | 1784 | case CHANNEL_TLV_RELEASE: |
| 1785 | 1785 | bnx2x_vf_mbx_release_vf(bp, vf, mbx); |
| 1786 | − break; | |
| 1786 | + return; | |
| 1787 | 1787 | case CHANNEL_TLV_UPDATE_RSS: |
| 1788 | 1788 | bnx2x_vf_mbx_update_rss(bp, vf, mbx); |
| 1789 | − break; | |
| 1789 | + return; | |
| 1790 | 1790 | } |
| 1791 | 1791 | |
| 1792 | 1792 | } else { |
| @@ -1802,26 +1802,24 @@ static void bnx2x_vf_mbx_request(struct bnx2x *bp, struct bnx2x_virtf *vf, · 9 unmodified lines | ||
| 1802 | 1802 | for (i = 0; i < 20; i++) |
| 1803 | 1803 | DP_CONT(BNX2X_MSG_IOV, "%x ", |
| 1804 | 1804 | mbx->msg->req.tlv_buf_size.tlv_buffer[i]); |
| 1805 | + } | |
| 1805 | 1806 | |
| 1806 | − /* test whether we can respond to the VF (do we have an address | |
| 1807 | − * for it?) | |
| 1808 | − */ | |
| 1809 | − if (vf->state == VF_ACQUIRED || vf->state == VF_ENABLED) { | |
| 1810 | − /* mbx_resp uses the op_rc of the VF */ | |
| 1811 | − vf->op_rc = PFVF_STATUS_NOT_SUPPORTED; | |
| 1807 | + /* can we respond to VF (do we have an address for it?) */ | |
| 1808 | + if (vf->state == VF_ACQUIRED || vf->state == VF_ENABLED) { | |
| 1809 | + /* mbx_resp uses the op_rc of the VF */ | |
| 1810 | + vf->op_rc = PFVF_STATUS_NOT_SUPPORTED; | |
| 1812 | 1811 | |
| 1813 | − /* notify the VF that we do not support this request */ | |
| 1814 | − bnx2x_vf_mbx_resp(bp, vf); | |
| 1815 | − } else { | |
| 1816 | − /* can't send a response since this VF is unknown to us | |
| 1817 | − * just ack the FW to release the mailbox and unlock | |
| 1818 | − * the channel. | |
| 1819 | − */ | |
| 1820 | − storm_memset_vf_mbx_ack(bp, vf->abs_vfid); | |
| 1821 | − mmiowb(); | |
| 1822 | − bnx2x_unlock_vf_pf_channel(bp, vf, | |
| 1823 | − mbx->first_tlv.tl.type); | |
| 1824 | − } | |
| 1812 | + /* notify the VF that we do not support this request */ | |
| 1813 | + bnx2x_vf_mbx_resp(bp, vf); | |
| 1814 | + } else { | |
| 1815 | + /* can't send a response since this VF is unknown to us | |
| 1816 | + * just ack the FW to release the mailbox and unlock | |
| 1817 | + * the channel. | |
| 1818 | + */ | |
| 1819 | + storm_memset_vf_mbx_ack(bp, vf->abs_vfid); | |
| 1820 | + /* Firmware ack should be written before unlocking channel */ | |
| 1821 | + mmiowb(); | |
| 1822 | + bnx2x_unlock_vf_pf_channel(bp, vf, mbx->first_tlv.tl.type); | |
| 1825 | 1823 | } |
| 1826 | 1824 | } |
| 1827 | 1825 | |
| @@ -3135,6 +3135,7 @@ static void cnic_service_bnx2x_bh(unsigned long data) · 3134 unmodified lines | ||
| 3135 | 3135 | { |
| 3136 | 3136 | struct cnic_dev *dev = (struct cnic_dev *) data; |
| 3137 | 3137 | struct cnic_local *cp = dev->cnic_priv; |
| 3138 | + struct bnx2x *bp = netdev_priv(dev->netdev); | |
| 3138 | 3139 | u32 status_idx, new_status_idx; |
| 3139 | 3140 | |
| 3140 | 3141 | if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) |
| @@ -3146,7 +3147,7 @@ static void cnic_service_bnx2x_bh(unsigned long data) · 5 unmodified lines | ||
| 3146 | 3147 | CNIC_WR16(dev, cp->kcq1.io_addr, |
| 3147 | 3148 | cp->kcq1.sw_prod_idx + MAX_KCQ_IDX); |
| 3148 | 3149 | |
| 3149 | − if (cp->ethdev->drv_state & CNIC_DRV_STATE_NO_FCOE) { | |
| 3150 | + if (!CNIC_SUPPORTS_FCOE(bp)) { | |
| 3150 | 3151 | cp->arm_int(dev, status_idx); |
| 3151 | 3152 | break; |
| 3152 | 3153 | } |
| @@ -5217,7 +5218,8 @@ static void cnic_init_rings(struct cnic_dev *dev) · 2064 unmodified lines | ||
| 5217 | 5218 | "iSCSI CLIENT_SETUP did not complete\n"); |
| 5218 | 5219 | cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1); |
| 5219 | 5220 | cnic_ring_ctl(dev, cid, cli, 1); |
| 5220 | − *cid_ptr = cid; | |
| 5221 | + *cid_ptr = cid >> 4; | |
| 5222 | + *(cid_ptr + 1) = cid * bp->db_size; | |
| 5221 | 5223 | } |
| 5222 | 5224 | } |
| 5223 | 5225 | |
| @@ -3034,6 +3034,7 @@ static bool tg3_phy_led_bug(struct tg3 *tp) · 3033 unmodified lines | ||
| 3034 | 3034 | { |
| 3035 | 3035 | switch (tg3_asic_rev(tp)) { |
| 3036 | 3036 | case ASIC_REV_5719: |
| 3037 | + case ASIC_REV_5720: | |
| 3037 | 3038 | if ((tp->phy_flags & TG3_PHYFLG_MII_SERDES) && |
| 3038 | 3039 | !tp->pci_fn) |
| 3039 | 3040 | return true; |
| @@ -16192,12 +16193,12 @@ static int tg3_get_invariants(struct tg3 *tp, const struct pci_device_id *ent) · 13152 unmodified lines | ||
| 16192 | 16193 | * So explicitly force the chip into D0 here. |
| 16193 | 16194 | */ |
| 16194 | 16195 | pci_read_config_dword(tp->pdev, |
| 16195 | − tp->pm_cap + PCI_PM_CTRL, | |
| 16196 | + tp->pdev->pm_cap + PCI_PM_CTRL, | |
| 16196 | 16197 | &pm_reg); |
| 16197 | 16198 | pm_reg &= ~PCI_PM_CTRL_STATE_MASK; |
| 16198 | 16199 | pm_reg |= PCI_PM_CTRL_PME_ENABLE | 0 /* D0 */; |
| 16199 | 16200 | pci_write_config_dword(tp->pdev, |
| 16200 | − tp->pm_cap + PCI_PM_CTRL, | |
| 16201 | + tp->pdev->pm_cap + PCI_PM_CTRL, | |
| 16201 | 16202 | pm_reg); |
| 16202 | 16203 | |
| 16203 | 16204 | /* Also, force SERR#/PERR# in PCI command. */ |
| @@ -17346,7 +17347,6 @@ static int tg3_init_one(struct pci_dev *pdev, · 1142 unmodified lines | ||
| 17346 | 17347 | tp = netdev_priv(dev); |
| 17347 | 17348 | tp->pdev = pdev; |
| 17348 | 17349 | tp->dev = dev; |
| 17349 | − tp->pm_cap = pdev->pm_cap; | |
| 17350 | 17350 | tp->rx_mode = TG3_DEF_RX_MODE; |
| 17351 | 17351 | tp->tx_mode = TG3_DEF_TX_MODE; |
| 17352 | 17352 | tp->irq_sync = 1; |
| @@ -3234,7 +3234,6 @@ struct tg3 { · 3233 unmodified lines | ||
| 3234 | 3234 | u8 pci_lat_timer; |
| 3235 | 3235 | |
| 3236 | 3236 | int pci_fn; |
| 3237 | − int pm_cap; | |
| 3238 | 3237 | int msi_cap; |
| 3239 | 3238 | int pcix_cap; |
| 3240 | 3239 | int pcie_readrq; |
| @@ -6149,8 +6149,10 @@ static int __init cxgb4_init_module(void) · 6148 unmodified lines | ||
| 6149 | 6149 | pr_warn("could not create debugfs entry, continuing\n"); |
| 6150 | 6150 | |
| 6151 | 6151 | ret = pci_register_driver(&cxgb4_driver); |
| 6152 | − if (ret < 0) | |
| 6152 | + if (ret < 0) { | |
| 6153 | 6153 | debugfs_remove(cxgb4_debugfs_root); |
| 6154 | + destroy_workqueue(workq); | |
| 6155 | + } | |
| 6154 | 6156 | |
| 6155 | 6157 | register_inet6addr_notifier(&cxgb4_inet6addr_notifier); |
| 6156 | 6158 | |
| @@ -1321,7 +1321,7 @@ de4x5_open(struct net_device *dev) · 1320 unmodified lines | ||
| 1321 | 1321 | if (request_irq(dev->irq, de4x5_interrupt, IRQF_SHARED, |
| 1322 | 1322 | lp->adapter_name, dev)) { |
| 1323 | 1323 | printk("de4x5_open(): Requested IRQ%d is busy - attemping FAST/SHARE...", dev->irq); |
| 1324 | − if (request_irq(dev->irq, de4x5_interrupt, IRQF_DISABLED | IRQF_SHARED, | |
| 1324 | + if (request_irq(dev->irq, de4x5_interrupt, IRQF_SHARED, | |
| 1325 | 1325 | lp->adapter_name, dev)) { |
| 1326 | 1326 | printk("\n Cannot get IRQ- reconfigure your hardware.\n"); |
| 1327 | 1327 | disable_ast(dev); |
| @@ -88,6 +88,7 @@ static inline char *nic_name(struct pci_dev *pdev) · 87 unmodified lines | ||
| 88 | 88 | #define BE_MIN_MTU 256 |
| 89 | 89 | |
| 90 | 90 | #define BE_NUM_VLANS_SUPPORTED 64 |
| 91 | +#define BE_UMC_NUM_VLANS_SUPPORTED 15 | |
| 91 | 92 | #define BE_MAX_EQD 96u |
| 92 | 93 | #define BE_MAX_TX_FRAG_COUNT 30 |
| 93 | 94 | |
| @@ -333,6 +334,7 @@ enum vf_state { · 239 unmodified lines | ||
| 333 | 334 | |
| 334 | 335 | #define BE_FLAGS_LINK_STATUS_INIT 1 |
| 335 | 336 | #define BE_FLAGS_WORKER_SCHEDULED (1 << 3) |
| 337 | +#define BE_FLAGS_VLAN_PROMISC (1 << 4) | |
| 336 | 338 | #define BE_FLAGS_NAPI_ENABLED (1 << 9) |
| 337 | 339 | #define BE_UC_PMAC_COUNT 30 |
| 338 | 340 | #define BE_VF_UC_PMAC_COUNT 2 |
| @@ -180,6 +180,9 @@ static int be_mcc_compl_process(struct be_adapter *adapter, · 179 unmodified lines | ||
| 180 | 180 | dev_err(&adapter->pdev->dev, |
| 181 | 181 | "opcode %d-%d failed:status %d-%d\n", |
| 182 | 182 | opcode, subsystem, compl_status, extd_status); |
| 183 | + | |
| 184 | + if (extd_status == MCC_ADDL_STS_INSUFFICIENT_RESOURCES) | |
| 185 | + return extd_status; | |
| 183 | 186 | } |
| 184 | 187 | } |
| 185 | 188 | done: |
| @@ -1812,6 +1815,12 @@ int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) · 1626 unmodified lines | ||
| 1812 | 1815 | } else if (flags & IFF_ALLMULTI) { |
| 1813 | 1816 | req->if_flags_mask = req->if_flags = |
| 1814 | 1817 | cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS); |
| 1818 | + } else if (flags & BE_FLAGS_VLAN_PROMISC) { | |
| 1819 | + req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS); | |
| 1820 | + | |
| 1821 | + if (value == ON) | |
| 1822 | + req->if_flags = | |
| 1823 | + cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS); | |
| 1815 | 1824 | } else { |
| 1816 | 1825 | struct netdev_hw_addr *ha; |
| 1817 | 1826 | int i = 0; |
| @@ -60,6 +60,8 @@ enum { · 59 unmodified lines | ||
| 60 | 60 | MCC_STATUS_NOT_SUPPORTED = 66 |
| 61 | 61 | }; |
| 62 | 62 | |
| 63 | +#define MCC_ADDL_STS_INSUFFICIENT_RESOURCES 0x16 | |
| 64 | + | |
| 63 | 65 | #define CQE_STATUS_COMPL_MASK 0xFFFF |
| 64 | 66 | #define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */ |
| 65 | 67 | #define CQE_STATUS_EXTD_MASK 0xFFFF |
| @@ -1791,7 +1793,7 @@ struct be_nic_res_desc { · 1725 unmodified lines | ||
| 1791 | 1793 | u8 acpi_params; |
| 1792 | 1794 | u8 wol_param; |
| 1793 | 1795 | u16 rsvd7; |
| 1794 | − u32 rsvd8[3]; | |
| 1796 | + u32 rsvd8[7]; | |
| 1795 | 1797 | } __packed; |
| 1796 | 1798 | |
| 1797 | 1799 | struct be_cmd_req_get_func_config { |
| @@ -855,11 +855,11 @@ static struct sk_buff *be_xmit_workarounds(struct be_adapter *adapter, · 854 unmodified lines | ||
| 855 | 855 | unsigned int eth_hdr_len; |
| 856 | 856 | struct iphdr *ip; |
| 857 | 857 | |
| 858 | − /* Lancer ASIC has a bug wherein packets that are 32 bytes or less | |
| 858 | + /* Lancer, SH-R ASICs have a bug wherein Packets that are 32 bytes or less | |
| 859 | 859 | * may cause a transmit stall on that port. So the work-around is to |
| 860 | − * pad such packets to a 36-byte length. | |
| 860 | + * pad short packets (<= 32 bytes) to a 36-byte length. | |
| 861 | 861 | */ |
| 862 | − if (unlikely(lancer_chip(adapter) && skb->len <= 32)) { | |
| 862 | + if (unlikely(!BEx_chip(adapter) && skb->len <= 32)) { | |
| 863 | 863 | if (skb_padto(skb, 36)) |
| 864 | 864 | goto tx_drop; |
| 865 | 865 | skb->len = 36; |
| @@ -1013,18 +1013,40 @@ static int be_vid_config(struct be_adapter *adapter) · 147 unmodified lines | ||
| 1013 | 1013 | status = be_cmd_vlan_config(adapter, adapter->if_handle, |
| 1014 | 1014 | vids, num, 1, 0); |
| 1015 | 1015 | |
| 1016 | − /* Set to VLAN promisc mode as setting VLAN filter failed */ | |
| 1017 | 1016 | if (status) { |
| 1018 | − dev_info(&adapter->pdev->dev, "Exhausted VLAN HW filters.\n"); | |
| 1019 | − dev_info(&adapter->pdev->dev, "Disabling HW VLAN filtering.\n"); | |
| 1020 | − goto set_vlan_promisc; | |
| 1017 | + /* Set to VLAN promisc mode as setting VLAN filter failed */ | |
| 1018 | + if (status == MCC_ADDL_STS_INSUFFICIENT_RESOURCES) | |
| 1019 | + goto set_vlan_promisc; | |
| 1020 | + dev_err(&adapter->pdev->dev, | |
| 1021 | + "Setting HW VLAN filtering failed.\n"); | |
| 1022 | + } else { | |
| 1023 | + if (adapter->flags & BE_FLAGS_VLAN_PROMISC) { | |
| 1024 | + /* hw VLAN filtering re-enabled. */ | |
| 1025 | + status = be_cmd_rx_filter(adapter, | |
| 1026 | + BE_FLAGS_VLAN_PROMISC, OFF); | |
| 1027 | + if (!status) { | |
| 1028 | + dev_info(&adapter->pdev->dev, | |
| 1029 | + "Disabling VLAN Promiscuous mode.\n"); | |
| 1030 | + adapter->flags &= ~BE_FLAGS_VLAN_PROMISC; | |
| 1031 | + dev_info(&adapter->pdev->dev, | |
| 1032 | + "Re-Enabling HW VLAN filtering\n"); | |
| 1033 | + } | |
| 1034 | + } | |
| 1021 | 1035 | } |
| 1022 | 1036 | |
| 1023 | 1037 | return status; |
| 1024 | 1038 | |
| 1025 | 1039 | set_vlan_promisc: |
| 1026 | − status = be_cmd_vlan_config(adapter, adapter->if_handle, | |
| 1027 | − NULL, 0, 1, 1); | |
| 1040 | + dev_warn(&adapter->pdev->dev, "Exhausted VLAN HW filters.\n"); | |
| 1041 | + | |
| 1042 | + status = be_cmd_rx_filter(adapter, BE_FLAGS_VLAN_PROMISC, ON); | |
| 1043 | + if (!status) { | |
| 1044 | + dev_info(&adapter->pdev->dev, "Enable VLAN Promiscuous mode\n"); | |
| 1045 | + dev_info(&adapter->pdev->dev, "Disabling HW VLAN filtering\n"); | |
| 1046 | + adapter->flags |= BE_FLAGS_VLAN_PROMISC; | |
| 1047 | + } else | |
| 1048 | + dev_err(&adapter->pdev->dev, | |
| 1049 | + "Failed to enable VLAN Promiscuous mode.\n"); | |
| 1028 | 1050 | return status; |
| 1029 | 1051 | } |
| 1030 | 1052 | |
| @@ -1033,10 +1055,6 @@ static int be_vlan_add_vid(struct net_device *netdev, __be16 proto, u16 vid) · 2 unmodified lines | ||
| 1033 | 1055 | struct be_adapter *adapter = netdev_priv(netdev); |
| 1034 | 1056 | int status = 0; |
| 1035 | 1057 | |
| 1036 | − if (!lancer_chip(adapter) && !be_physfn(adapter)) { | |
| 1037 | − status = -EINVAL; | |
| 1038 | − goto ret; | |
| 1039 | − } | |
| 1040 | 1058 | |
| 1041 | 1059 | /* Packets with VID 0 are always received by Lancer by default */ |
| 1042 | 1060 | if (lancer_chip(adapter) && vid == 0) |
| @@ -1059,11 +1077,6 @@ static int be_vlan_rem_vid(struct net_device *netdev, __be16 proto, u16 vid) · 16 unmodified lines | ||
| 1059 | 1077 | struct be_adapter *adapter = netdev_priv(netdev); |
| 1060 | 1078 | int status = 0; |
| 1061 | 1079 | |
| 1062 | − if (!lancer_chip(adapter) && !be_physfn(adapter)) { | |
| 1063 | − status = -EINVAL; | |
| 1064 | − goto ret; | |
| 1065 | − } | |
| 1066 | − | |
| 1067 | 1080 | /* Packets with VID 0 are always received by Lancer by default */ |
| 1068 | 1081 | if (lancer_chip(adapter) && vid == 0) |
| 1069 | 1082 | goto ret; |
| @@ -1188,8 +1201,8 @@ static int be_get_vf_config(struct net_device *netdev, int vf, · 118 unmodified lines | ||
| 1188 | 1201 | |
| 1189 | 1202 | vi->vf = vf; |
| 1190 | 1203 | vi->tx_rate = vf_cfg->tx_rate; |
| 1191 | − vi->vlan = vf_cfg->vlan_tag; | |
| 1192 | − vi->qos = 0; | |
| 1204 | + vi->vlan = vf_cfg->vlan_tag & VLAN_VID_MASK; | |
| 1205 | + vi->qos = vf_cfg->vlan_tag >> VLAN_PRIO_SHIFT; | |
| 1193 | 1206 | memcpy(&vi->mac, vf_cfg->mac_addr, ETH_ALEN); |
| 1194 | 1207 | |
| 1195 | 1208 | return 0; |
| @@ -1199,28 +1212,29 @@ static int be_set_vf_vlan(struct net_device *netdev, · 3 unmodified lines | ||
| 1199 | 1212 | int vf, u16 vlan, u8 qos) |
| 1200 | 1213 | { |
| 1201 | 1214 | struct be_adapter *adapter = netdev_priv(netdev); |
| 1215 | + struct be_vf_cfg *vf_cfg = &adapter->vf_cfg[vf]; | |
| 1202 | 1216 | int status = 0; |
| 1203 | 1217 | |
| 1204 | 1218 | if (!sriov_enabled(adapter)) |
| 1205 | 1219 | return -EPERM; |
| 1206 | 1220 | |
| 1207 | − if (vf >= adapter->num_vfs || vlan > 4095) | |
| 1221 | + if (vf >= adapter->num_vfs || vlan > 4095 || qos > 7) | |
| 1208 | 1222 | return -EINVAL; |
| 1209 | 1223 | |
| 1210 | − if (vlan) { | |
| 1211 | − if (adapter->vf_cfg[vf].vlan_tag != vlan) { | |
| 1224 | + if (vlan || qos) { | |
| 1225 | + vlan |= qos << VLAN_PRIO_SHIFT; | |
| 1226 | + if (vf_cfg->vlan_tag != vlan) { | |
| 1212 | 1227 | /* If this is new value, program it. Else skip. */ |
| 1213 | − adapter->vf_cfg[vf].vlan_tag = vlan; | |
| 1214 | − | |
| 1215 | − status = be_cmd_set_hsw_config(adapter, vlan, | |
| 1216 | − vf + 1, adapter->vf_cfg[vf].if_handle, 0); | |
| 1228 | + vf_cfg->vlan_tag = vlan; | |
| 1229 | + status = be_cmd_set_hsw_config(adapter, vlan, vf + 1, | |
| 1230 | + vf_cfg->if_handle, 0); | |
| 1217 | 1231 | } |
| 1218 | 1232 | } else { |
| 1219 | 1233 | /* Reset Transparent Vlan Tagging. */ |
| 1220 | − adapter->vf_cfg[vf].vlan_tag = 0; | |
| 1221 | − vlan = adapter->vf_cfg[vf].def_vid; | |
| 1234 | + vf_cfg->vlan_tag = 0; | |
| 1235 | + vlan = vf_cfg->def_vid; | |
| 1222 | 1236 | status = be_cmd_set_hsw_config(adapter, vlan, vf + 1, |
| 1223 | − adapter->vf_cfg[vf].if_handle, 0); | |
| 1237 | + vf_cfg->if_handle, 0); | |
| 1224 | 1238 | } |
| 1225 | 1239 | |
| 1226 | 1240 | |
| @@ -2802,7 +2816,7 @@ static int be_vfs_if_create(struct be_adapter *adapter) · 1575 unmodified lines | ||
| 2802 | 2816 | struct be_resources res = {0}; |
| 2803 | 2817 | struct be_vf_cfg *vf_cfg; |
| 2804 | 2818 | u32 cap_flags, en_flags, vf; |
| 2805 | − int status; | |
| 2819 | + int status = 0; | |
| 2806 | 2820 | |
| 2807 | 2821 | cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST | |
| 2808 | 2822 | BE_IF_FLAGS_MULTICAST; |
| @@ -2963,6 +2977,8 @@ static void BEx_get_resources(struct be_adapter *adapter, · 154 unmodified lines | ||
| 2963 | 2977 | |
| 2964 | 2978 | if (adapter->function_mode & FLEX10_MODE) |
| 2965 | 2979 | res->max_vlans = BE_NUM_VLANS_SUPPORTED/8; |
| 2980 | + else if (adapter->function_mode & UMC_ENABLED) | |
| 2981 | + res->max_vlans = BE_UMC_NUM_VLANS_SUPPORTED; | |
| 2966 | 2982 | else |
| 2967 | 2983 | res->max_vlans = BE_NUM_VLANS_SUPPORTED; |
| 2968 | 2984 | res->max_mcast_mac = BE_MAX_MC; |
| @@ -2199,7 +2199,7 @@ fec_probe(struct platform_device *pdev) · 2198 unmodified lines | ||
| 2199 | 2199 | goto failed_irq; |
| 2200 | 2200 | } |
| 2201 | 2201 | ret = devm_request_irq(&pdev->dev, irq, fec_enet_interrupt, |
| 2202 | − IRQF_DISABLED, pdev->name, ndev); | |
| 2202 | + 0, pdev->name, ndev); | |
| 2203 | 2203 | if (ret) |
| 2204 | 2204 | goto failed_irq; |
| 2205 | 2205 | } |
| @@ -452,7 +452,9 @@ static int gianfar_ptp_probe(struct platform_device *dev) · 451 unmodified lines | ||
| 452 | 452 | err = -ENODEV; |
| 453 | 453 | |
| 454 | 454 | etsects->caps = ptp_gianfar_caps; |
| 455 | − etsects->cksel = DEFAULT_CKSEL; | |
| 455 | + | |
| 456 | + if (get_of_u32(node, "fsl,cksel", &etsects->cksel)) | |
| 457 | + etsects->cksel = DEFAULT_CKSEL; | |
| 456 | 458 | |
| 457 | 459 | if (get_of_u32(node, "fsl,tclk-period", &etsects->tclk_period) || |
| 458 | 460 | get_of_u32(node, "fsl,tmr-prsc", &etsects->tmr_prsc) || |
| @@ -1097,7 +1097,7 @@ static int hp100_open(struct net_device *dev) · 1096 unmodified lines | ||
| 1097 | 1097 | /* New: if bus is PCI or EISA, interrupts might be shared interrupts */ |
| 1098 | 1098 | if (request_irq(dev->irq, hp100_interrupt, |
| 1099 | 1099 | lp->bus == HP100_BUS_PCI || lp->bus == |
| 1100 | − HP100_BUS_EISA ? IRQF_SHARED : IRQF_DISABLED, | |
| 1100 | + HP100_BUS_EISA ? IRQF_SHARED : 0, | |
| 1101 | 1101 | "hp100", dev)) { |
| 1102 | 1102 | printk("hp100: %s: unable to get IRQ %d\n", dev->name, dev->irq); |
| 1103 | 1103 | return -EAGAIN; |
| @@ -102,6 +102,19 @@ static int ehea_probe_adapter(struct platform_device *dev); · 101 unmodified lines | ||
| 102 | 102 | |
| 103 | 103 | static int ehea_remove(struct platform_device *dev); |
| 104 | 104 | |
| 105 | +static struct of_device_id ehea_module_device_table[] = { | |
| 106 | + { | |
| 107 | + .name = "lhea", | |
| 108 | + .compatible = "IBM,lhea", | |
| 109 | + }, | |
| 110 | + { | |
| 111 | + .type = "network", | |
| 112 | + .compatible = "IBM,lhea-ethernet", | |
| 113 | + }, | |
| 114 | + {}, | |
| 115 | +}; | |
| 116 | +MODULE_DEVICE_TABLE(of, ehea_module_device_table); | |
| 117 | + | |
| 105 | 118 | static struct of_device_id ehea_device_table[] = { |
| 106 | 119 | { |
| 107 | 120 | .name = "lhea", |
| @@ -109,7 +122,6 @@ static struct of_device_id ehea_device_table[] = { · 1 unmodified line | ||
| 109 | 122 | }, |
| 110 | 123 | {}, |
| 111 | 124 | }; |
| 112 | −MODULE_DEVICE_TABLE(of, ehea_device_table); | |
| 113 | 125 | |
| 114 | 126 | static struct platform_driver ehea_driver = { |
| 115 | 127 | .driver = { |
| @@ -1285,7 +1297,7 @@ static int ehea_reg_interrupts(struct net_device *dev) · 1169 unmodified lines | ||
| 1285 | 1297 | |
| 1286 | 1298 | ret = ibmebus_request_irq(port->qp_eq->attr.ist1, |
| 1287 | 1299 | ehea_qp_aff_irq_handler, |
| 1288 | − IRQF_DISABLED, port->int_aff_name, port); | |
| 1300 | + 0, port->int_aff_name, port); | |
| 1289 | 1301 | if (ret) { |
| 1290 | 1302 | netdev_err(dev, "failed registering irq for qp_aff_irq_handler:ist=%X\n", |
| 1291 | 1303 | port->qp_eq->attr.ist1); |
| @@ -1303,8 +1315,7 @@ static int ehea_reg_interrupts(struct net_device *dev) · 11 unmodified lines | ||
| 1303 | 1315 | "%s-queue%d", dev->name, i); |
| 1304 | 1316 | ret = ibmebus_request_irq(pr->eq->attr.ist1, |
| 1305 | 1317 | ehea_recv_irq_handler, |
| 1306 | − IRQF_DISABLED, pr->int_send_name, | |
| 1307 | − pr); | |
| 1318 | + 0, pr->int_send_name, pr); | |
| 1308 | 1319 | if (ret) { |
| 1309 | 1320 | netdev_err(dev, "failed registering irq for ehea_queue port_res_nr:%d, ist=%X\n", |
| 1310 | 1321 | i, pr->eq->attr.ist1); |
| @@ -3320,7 +3331,7 @@ static int ehea_probe_adapter(struct platform_device *dev) · 2009 unmodified lines | ||
| 3320 | 3331 | } |
| 3321 | 3332 | |
| 3322 | 3333 | ret = ibmebus_request_irq(adapter->neq->attr.ist1, |
| 3323 | − ehea_interrupt_neq, IRQF_DISABLED, | |
| 3334 | + ehea_interrupt_neq, 0, | |
| 3324 | 3335 | "ehea_neq", adapter); |
| 3325 | 3336 | if (ret) { |
| 3326 | 3337 | dev_err(&dev->dev, "requesting NEQ IRQ failed\n"); |
| @@ -922,6 +922,14 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data) · 921 unmodified lines | ||
| 922 | 922 | else |
| 923 | 923 | mask &= ~(1 << 30); |
| 924 | 924 | } |
| 925 | + if (mac->type == e1000_pch2lan) { | |
| 926 | + /* SHRAH[0,1,2] different than previous */ | |
| 927 | + if (i == 7) | |
| 928 | + mask &= 0xFFF4FFFF; | |
| 929 | + /* SHRAH[3] different than SHRAH[0,1,2] */ | |
| 930 | + if (i == 10) | |
| 931 | + mask |= (1 << 30); | |
| 932 | + } | |
| 925 | 933 | |
| 926 | 934 | REG_PATTERN_TEST_ARRAY(E1000_RA, ((i << 1) + 1), mask, |
| 927 | 935 | 0xFFFFFFFF); |
| @@ -1371,7 +1371,10 @@ static void e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index) · 1370 unmodified lines | ||
| 1371 | 1371 | return; |
| 1372 | 1372 | } |
| 1373 | 1373 | |
| 1374 | − if (index < hw->mac.rar_entry_count) { | |
| 1374 | + /* RAR[1-6] are owned by manageability. Skip those and program the | |
| 1375 | + * next address into the SHRA register array. | |
| 1376 | + */ | |
| 1377 | + if (index < (u32)(hw->mac.rar_entry_count - 6)) { | |
| 1375 | 1378 | s32 ret_val; |
| 1376 | 1379 | |
| 1377 | 1380 | ret_val = e1000_acquire_swflag_ich8lan(hw); |
| @@ -1962,8 +1965,8 @@ void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw) · 584 unmodified lines | ||
| 1962 | 1965 | if (ret_val) |
| 1963 | 1966 | goto release; |
| 1964 | 1967 | |
| 1965 | − /* Copy both RAL/H (rar_entry_count) and SHRAL/H (+4) to PHY */ | |
| 1966 | − for (i = 0; i < (hw->mac.rar_entry_count + 4); i++) { | |
| 1968 | + /* Copy both RAL/H (rar_entry_count) and SHRAL/H to PHY */ | |
| 1969 | + for (i = 0; i < (hw->mac.rar_entry_count); i++) { | |
| 1967 | 1970 | mac_reg = er32(RAL(i)); |
| 1968 | 1971 | hw->phy.ops.write_reg_page(hw, BM_RAR_L(i), |
| 1969 | 1972 | (u16)(mac_reg & 0xFFFF)); |
| @@ -2007,10 +2010,10 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable) · 37 unmodified lines | ||
| 2007 | 2010 | return ret_val; |
| 2008 | 2011 | |
| 2009 | 2012 | if (enable) { |
| 2010 | − /* Write Rx addresses (rar_entry_count for RAL/H, +4 for | |
| 2013 | + /* Write Rx addresses (rar_entry_count for RAL/H, and | |
| 2011 | 2014 | * SHRAL/H) and initial CRC values to the MAC |
| 2012 | 2015 | */ |
| 2013 | − for (i = 0; i < (hw->mac.rar_entry_count + 4); i++) { | |
| 2016 | + for (i = 0; i < hw->mac.rar_entry_count; i++) { | |
| 2014 | 2017 | u8 mac_addr[ETH_ALEN] = { 0 }; |
| 2015 | 2018 | u32 addr_high, addr_low; |
| 2016 | 2019 | |
| @@ -98,7 +98,7 @@ · 97 unmodified lines | ||
| 98 | 98 | #define PCIE_ICH8_SNOOP_ALL PCIE_NO_SNOOP_ALL |
| 99 | 99 | |
| 100 | 100 | #define E1000_ICH_RAR_ENTRIES 7 |
| 101 | −#define E1000_PCH2_RAR_ENTRIES 5 /* RAR[0], SHRA[0-3] */ | |
| 101 | +#define E1000_PCH2_RAR_ENTRIES 11 /* RAR[0-6], SHRA[0-3] */ | |
| 102 | 102 | #define E1000_PCH_LPT_RAR_ENTRIES 12 /* RAR[0], SHRA[0-10] */ |
| 103 | 103 | |
| 104 | 104 | #define PHY_PAGE_SHIFT 5 |
| @@ -4868,7 +4868,7 @@ static void e1000_watchdog_task(struct work_struct *work) · 4867 unmodified lines | ||
| 4868 | 4868 | */ |
| 4869 | 4869 | if ((hw->phy.type == e1000_phy_igp_3 || |
| 4870 | 4870 | hw->phy.type == e1000_phy_bm) && |
| 4871 | − (hw->mac.autoneg == true) && | |
| 4871 | + hw->mac.autoneg && | |
| 4872 | 4872 | (adapter->link_speed == SPEED_10 || |
| 4873 | 4873 | adapter->link_speed == SPEED_100) && |
| 4874 | 4874 | (adapter->link_duplex == HALF_DUPLEX)) { |
| @@ -701,8 +701,7 @@ i40e_status i40e_asq_send_command(struct i40e_hw *hw, · 700 unmodified lines | ||
| 701 | 701 | |
| 702 | 702 | details = I40E_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use); |
| 703 | 703 | if (cmd_details) { |
| 704 | − memcpy(details, cmd_details, | |
| 705 | − sizeof(struct i40e_asq_cmd_details)); | |
| 704 | + *details = *cmd_details; | |
| 706 | 705 | |
| 707 | 706 | /* If the cmd_details are defined copy the cookie. The |
| 708 | 707 | * cpu_to_le32 is not needed here because the data is ignored |
| @@ -760,7 +759,7 @@ i40e_status i40e_asq_send_command(struct i40e_hw *hw, · 51 unmodified lines | ||
| 760 | 759 | desc_on_ring = I40E_ADMINQ_DESC(hw->aq.asq, hw->aq.asq.next_to_use); |
| 761 | 760 | |
| 762 | 761 | /* if the desc is available copy the temp desc to the right place */ |
| 763 | − memcpy(desc_on_ring, desc, sizeof(struct i40e_aq_desc)); | |
| 762 | + *desc_on_ring = *desc; | |
| 764 | 763 | |
| 765 | 764 | /* if buff is not NULL assume indirect command */ |
| 766 | 765 | if (buff != NULL) { |
| @@ -807,7 +806,7 @@ i40e_status i40e_asq_send_command(struct i40e_hw *hw, · 40 unmodified lines | ||
| 807 | 806 | |
| 808 | 807 | /* if ready, copy the desc back to temp */ |
| 809 | 808 | if (i40e_asq_done(hw)) { |
| 810 | − memcpy(desc, desc_on_ring, sizeof(struct i40e_aq_desc)); | |
| 809 | + *desc = *desc_on_ring; | |
| 811 | 810 | if (buff != NULL) |
| 812 | 811 | memcpy(buff, dma_buff->va, buff_size); |
| 813 | 812 | retval = le16_to_cpu(desc->retval); |
| @@ -507,7 +507,7 @@ i40e_status i40e_aq_get_link_info(struct i40e_hw *hw, · 506 unmodified lines | ||
| 507 | 507 | |
| 508 | 508 | /* save link status information */ |
| 509 | 509 | if (link) |
| 510 | − memcpy(link, hw_link_info, sizeof(struct i40e_link_status)); | |
| 510 | + *link = *hw_link_info; | |
| 511 | 511 | |
| 512 | 512 | /* flag cleared so helper functions don't call AQ again */ |
| 513 | 513 | hw->phy.get_link_info = false; |
| @@ -101,10 +101,10 @@ int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem, · 100 unmodified lines | ||
| 101 | 101 | mem->size = ALIGN(size, alignment); |
| 102 | 102 | mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size, |
| 103 | 103 | &mem->pa, GFP_KERNEL); |
| 104 | − if (mem->va) | |
| 105 | − return 0; | |
| 104 | + if (!mem->va) | |
| 105 | + return -ENOMEM; | |
| 106 | 106 | |
| 107 | − return -ENOMEM; | |
| 107 | + return 0; | |
| 108 | 108 | } |
| 109 | 109 | |
| 110 | 110 | /** |
| @@ -136,10 +136,10 @@ int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem, · 25 unmodified lines | ||
| 136 | 136 | mem->size = size; |
| 137 | 137 | mem->va = kzalloc(size, GFP_KERNEL); |
| 138 | 138 | |
| 139 | − if (mem->va) | |
| 140 | − return 0; | |
| 139 | + if (!mem->va) | |
| 140 | + return -ENOMEM; | |
| 141 | 141 | |
| 142 | − return -ENOMEM; | |
| 142 | + return 0; | |
| 143 | 143 | } |
| 144 | 144 | |
| 145 | 145 | /** |
| @@ -174,8 +174,7 @@ static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, · 28 unmodified lines | ||
| 174 | 174 | u16 needed, u16 id) |
| 175 | 175 | { |
| 176 | 176 | int ret = -ENOMEM; |
| 177 | − int i = 0; | |
| 178 | − int j = 0; | |
| 177 | + int i, j; | |
| 179 | 178 | |
| 180 | 179 | if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) { |
| 181 | 180 | dev_info(&pf->pdev->dev, |
| @@ -186,7 +185,7 @@ static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, · 4 unmodified lines | ||
| 186 | 185 | |
| 187 | 186 | /* start the linear search with an imperfect hint */ |
| 188 | 187 | i = pile->search_hint; |
| 189 | − while (i < pile->num_entries && ret < 0) { | |
| 188 | + while (i < pile->num_entries) { | |
| 190 | 189 | /* skip already allocated entries */ |
| 191 | 190 | if (pile->list[i] & I40E_PILE_VALID_BIT) { |
| 192 | 191 | i++; |
| @@ -205,6 +204,7 @@ static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, · 12 unmodified lines | ||
| 205 | 204 | pile->list[i+j] = id | I40E_PILE_VALID_BIT; |
| 206 | 205 | ret = i; |
| 207 | 206 | pile->search_hint = i + j; |
| 207 | + break; | |
| 208 | 208 | } else { |
| 209 | 209 | /* not enough, so skip over it and continue looking */ |
| 210 | 210 | i += j; |
| @@ -1388,7 +1388,7 @@ int i40e_sync_vsi_filters(struct i40e_vsi *vsi) · 1177 unmodified lines | ||
| 1388 | 1388 | bool add_happened = false; |
| 1389 | 1389 | int filter_list_len = 0; |
| 1390 | 1390 | u32 changed_flags = 0; |
| 1391 | − i40e_status ret = 0; | |
| 1391 | + i40e_status aq_ret = 0; | |
| 1392 | 1392 | struct i40e_pf *pf; |
| 1393 | 1393 | int num_add = 0; |
| 1394 | 1394 | int num_del = 0; |
| @@ -1449,28 +1449,28 @@ int i40e_sync_vsi_filters(struct i40e_vsi *vsi) · 54 unmodified lines | ||
| 1449 | 1449 | |
| 1450 | 1450 | /* flush a full buffer */ |
| 1451 | 1451 | if (num_del == filter_list_len) { |
| 1452 | − ret = i40e_aq_remove_macvlan(&pf->hw, | |
| 1452 | + aq_ret = i40e_aq_remove_macvlan(&pf->hw, | |
| 1453 | 1453 | vsi->seid, del_list, num_del, |
| 1454 | 1454 | NULL); |
| 1455 | 1455 | num_del = 0; |
| 1456 | 1456 | memset(del_list, 0, sizeof(*del_list)); |
| 1457 | 1457 | |
| 1458 | − if (ret) | |
| 1458 | + if (aq_ret) | |
| 1459 | 1459 | dev_info(&pf->pdev->dev, |
| 1460 | 1460 | "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n", |
| 1461 | − ret, | |
| 1461 | + aq_ret, | |
| 1462 | 1462 | pf->hw.aq.asq_last_status); |
| 1463 | 1463 | } |
| 1464 | 1464 | } |
| 1465 | 1465 | if (num_del) { |
| 1466 | − ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, | |
| 1466 | + aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, | |
| 1467 | 1467 | del_list, num_del, NULL); |
| 1468 | 1468 | num_del = 0; |
| 1469 | 1469 | |
| 1470 | − if (ret) | |
| 1470 | + if (aq_ret) | |
| 1471 | 1471 | dev_info(&pf->pdev->dev, |
| 1472 | 1472 | "ignoring delete macvlan error, err %d, aq_err %d\n", |
| 1473 | − ret, pf->hw.aq.asq_last_status); | |
| 1473 | + aq_ret, pf->hw.aq.asq_last_status); | |
| 1474 | 1474 | } |
| 1475 | 1475 | |
| 1476 | 1476 | kfree(del_list); |
| @@ -1515,32 +1515,30 @@ int i40e_sync_vsi_filters(struct i40e_vsi *vsi) · 38 unmodified lines | ||
| 1515 | 1515 | |
| 1516 | 1516 | /* flush a full buffer */ |
| 1517 | 1517 | if (num_add == filter_list_len) { |
| 1518 | − ret = i40e_aq_add_macvlan(&pf->hw, | |
| 1519 | − vsi->seid, | |
| 1520 | − add_list, | |
| 1521 | − num_add, | |
| 1522 | − NULL); | |
| 1518 | + aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, | |
| 1519 | + add_list, num_add, | |
| 1520 | + NULL); | |
| 1523 | 1521 | num_add = 0; |
| 1524 | 1522 | |
| 1525 | − if (ret) | |
| 1523 | + if (aq_ret) | |
| 1526 | 1524 | break; |
| 1527 | 1525 | memset(add_list, 0, sizeof(*add_list)); |
| 1528 | 1526 | } |
| 1529 | 1527 | } |
| 1530 | 1528 | if (num_add) { |
| 1531 | − ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, | |
| 1532 | − add_list, num_add, NULL); | |
| 1529 | + aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, | |
| 1530 | + add_list, num_add, NULL); | |
| 1533 | 1531 | num_add = 0; |
| 1534 | 1532 | } |
| 1535 | 1533 | kfree(add_list); |
| 1536 | 1534 | add_list = NULL; |
| 1537 | 1535 | |
| 1538 | − if (add_happened && (!ret)) { | |
| 1536 | + if (add_happened && (!aq_ret)) { | |
| 1539 | 1537 | /* do nothing */; |
| 1540 | − } else if (add_happened && (ret)) { | |
| 1538 | + } else if (add_happened && (aq_ret)) { | |
| 1541 | 1539 | dev_info(&pf->pdev->dev, |
| 1542 | 1540 | "add filter failed, err %d, aq_err %d\n", |
| 1543 | − ret, pf->hw.aq.asq_last_status); | |
| 1541 | + aq_ret, pf->hw.aq.asq_last_status); | |
| 1544 | 1542 | if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) && |
| 1545 | 1543 | !test_bit(__I40E_FILTER_OVERFLOW_PROMISC, |
| 1546 | 1544 | &vsi->state)) { |
| @@ -1556,28 +1554,27 @@ int i40e_sync_vsi_filters(struct i40e_vsi *vsi) · 9 unmodified lines | ||
| 1556 | 1554 | if (changed_flags & IFF_ALLMULTI) { |
| 1557 | 1555 | bool cur_multipromisc; |
| 1558 | 1556 | cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI); |
| 1559 | − ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw, | |
| 1560 | − vsi->seid, | |
| 1561 | − cur_multipromisc, | |
| 1562 | − NULL); | |
| 1563 | − if (ret) | |
| 1557 | + aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw, | |
| 1558 | + vsi->seid, | |
| 1559 | + cur_multipromisc, | |
| 1560 | + NULL); | |
| 1561 | + if (aq_ret) | |
| 1564 | 1562 | dev_info(&pf->pdev->dev, |
| 1565 | 1563 | "set multi promisc failed, err %d, aq_err %d\n", |
| 1566 | − ret, pf->hw.aq.asq_last_status); | |
| 1564 | + aq_ret, pf->hw.aq.asq_last_status); | |
| 1567 | 1565 | } |
| 1568 | 1566 | if ((changed_flags & IFF_PROMISC) || promisc_forced_on) { |
| 1569 | 1567 | bool cur_promisc; |
| 1570 | 1568 | cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) || |
| 1571 | 1569 | test_bit(__I40E_FILTER_OVERFLOW_PROMISC, |
| 1572 | 1570 | &vsi->state)); |
| 1573 | − ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw, | |
| 1574 | − vsi->seid, | |
| 1575 | − cur_promisc, | |
| 1576 | − NULL); | |
| 1577 | − if (ret) | |
| 1571 | + aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw, | |
| 1572 | + vsi->seid, | |
| 1573 | + cur_promisc, NULL); | |
| 1574 | + if (aq_ret) | |
| 1578 | 1575 | dev_info(&pf->pdev->dev, |
| 1579 | 1576 | "set uni promisc failed, err %d, aq_err %d\n", |
| 1580 | − ret, pf->hw.aq.asq_last_status); | |
| 1577 | + aq_ret, pf->hw.aq.asq_last_status); | |
| 1581 | 1578 | } |
| 1582 | 1579 | |
| 1583 | 1580 | clear_bit(__I40E_CONFIG_BUSY, &vsi->state); |
| @@ -1790,6 +1787,8 @@ int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid) · 206 unmodified lines | ||
| 1790 | 1787 | * i40e_vsi_kill_vlan - Remove vsi membership for given vlan |
| 1791 | 1788 | * @vsi: the vsi being configured |
| 1792 | 1789 | * @vid: vlan id to be removed (0 = untagged only , -1 = any) |
| 1790 | + * | |
| 1791 | + * Return: 0 on success or negative otherwise | |
| 1793 | 1792 | **/ |
| 1794 | 1793 | int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid) |
| 1795 | 1794 | { |
| @@ -1863,37 +1862,39 @@ int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid) · 67 unmodified lines | ||
| 1863 | 1862 | * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload |
| 1864 | 1863 | * @netdev: network interface to be adjusted |
| 1865 | 1864 | * @vid: vlan id to be added |
| 1865 | + * | |
| 1866 | + * net_device_ops implementation for adding vlan ids | |
| 1866 | 1867 | **/ |
| 1867 | 1868 | static int i40e_vlan_rx_add_vid(struct net_device *netdev, |
| 1868 | 1869 | __always_unused __be16 proto, u16 vid) |
| 1869 | 1870 | { |
| 1870 | 1871 | struct i40e_netdev_priv *np = netdev_priv(netdev); |
| 1871 | 1872 | struct i40e_vsi *vsi = np->vsi; |
| 1872 | − int ret; | |
| 1873 | + int ret = 0; | |
| 1873 | 1874 | |
| 1874 | 1875 | if (vid > 4095) |
| 1875 | − return 0; | |
| 1876 | + return -EINVAL; | |
| 1877 | + | |
| 1878 | + netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid); | |
| 1876 | 1879 | |
| 1877 | − netdev_info(vsi->netdev, "adding %pM vid=%d\n", | |
| 1878 | − netdev->dev_addr, vid); | |
| 1879 | 1880 | /* If the network stack called us with vid = 0, we should |
| 1880 | 1881 | * indicate to i40e_vsi_add_vlan() that we want to receive |
| 1881 | 1882 | * any traffic (i.e. with any vlan tag, or untagged) |
| 1882 | 1883 | */ |
| 1883 | 1884 | ret = i40e_vsi_add_vlan(vsi, vid ? vid : I40E_VLAN_ANY); |
| 1884 | 1885 | |
| 1885 | − if (!ret) { | |
| 1886 | − if (vid < VLAN_N_VID) | |
| 1887 | − set_bit(vid, vsi->active_vlans); | |
| 1888 | − } | |
| 1886 | + if (!ret && (vid < VLAN_N_VID)) | |
| 1887 | + set_bit(vid, vsi->active_vlans); | |
| 1889 | 1888 | |
| 1890 | − return 0; | |
| 1889 | + return ret; | |
| 1891 | 1890 | } |
| 1892 | 1891 | |
| 1893 | 1892 | /** |
| 1894 | 1893 | * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload |
| 1895 | 1894 | * @netdev: network interface to be adjusted |
| 1896 | 1895 | * @vid: vlan id to be removed |
| 1896 | + * | |
| 1897 | + * net_device_ops implementation for adding vlan ids | |
| 1897 | 1898 | **/ |
| 1898 | 1899 | static int i40e_vlan_rx_kill_vid(struct net_device *netdev, |
| 1899 | 1900 | __always_unused __be16 proto, u16 vid) |
| @@ -1901,15 +1902,16 @@ static int i40e_vlan_rx_kill_vid(struct net_device *netdev, · 1 unmodified line | ||
| 1901 | 1902 | struct i40e_netdev_priv *np = netdev_priv(netdev); |
| 1902 | 1903 | struct i40e_vsi *vsi = np->vsi; |
| 1903 | 1904 | |
| 1904 | − netdev_info(vsi->netdev, "removing %pM vid=%d\n", | |
| 1905 | − netdev->dev_addr, vid); | |
| 1905 | + netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid); | |
| 1906 | + | |
| 1906 | 1907 | /* return code is ignored as there is nothing a user |
| 1907 | 1908 | * can do about failure to remove and a log message was |
| 1908 | − * already printed from another function | |
| 1909 | + * already printed from the other function | |
| 1909 | 1910 | */ |
| 1910 | 1911 | i40e_vsi_kill_vlan(vsi, vid); |
| 1911 | 1912 | |
| 1912 | 1913 | clear_bit(vid, vsi->active_vlans); |
| 1914 | + | |
| 1913 | 1915 | return 0; |
| 1914 | 1916 | } |
| 1915 | 1917 | |
| @@ -1936,10 +1938,10 @@ static void i40e_restore_vlan(struct i40e_vsi *vsi) · 20 unmodified lines | ||
| 1936 | 1938 | * @vsi: the vsi being adjusted |
| 1937 | 1939 | * @vid: the vlan id to set as a PVID |
| 1938 | 1940 | **/ |
| 1939 | −i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid) | |
| 1941 | +int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid) | |
| 1940 | 1942 | { |
| 1941 | 1943 | struct i40e_vsi_context ctxt; |
| 1942 | − i40e_status ret; | |
| 1944 | + i40e_status aq_ret; | |
| 1943 | 1945 | |
| 1944 | 1946 | vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); |
| 1945 | 1947 | vsi->info.pvid = cpu_to_le16(vid); |
| @@ -1948,14 +1950,15 @@ i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid) · 2 unmodified lines | ||
| 1948 | 1950 | |
| 1949 | 1951 | ctxt.seid = vsi->seid; |
| 1950 | 1952 | memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); |
| 1951 | − ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); | |
| 1952 | − if (ret) { | |
| 1953 | + aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); | |
| 1954 | + if (aq_ret) { | |
| 1953 | 1955 | dev_info(&vsi->back->pdev->dev, |
| 1954 | 1956 | "%s: update vsi failed, aq_err=%d\n", |
| 1955 | 1957 | __func__, vsi->back->hw.aq.asq_last_status); |
| 1958 | + return -ENOENT; | |
| 1956 | 1959 | } |
| 1957 | 1960 | |
| 1958 | − return ret; | |
| 1961 | + return 0; | |
| 1959 | 1962 | } |
| 1960 | 1963 | |
| 1961 | 1964 | /** |
| @@ -3326,7 +3329,8 @@ static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf) · 1364 unmodified lines | ||
| 3326 | 3329 | **/ |
| 3327 | 3330 | static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg) |
| 3328 | 3331 | { |
| 3329 | − int num_tc = 0, i; | |
| 3332 | + u8 num_tc = 0; | |
| 3333 | + int i; | |
| 3330 | 3334 | |
| 3331 | 3335 | /* Scan the ETS Config Priority Table to find |
| 3332 | 3336 | * traffic class enabled for a given priority |
| @@ -3341,9 +3345,7 @@ static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg) · 8 unmodified lines | ||
| 3341 | 3345 | /* Traffic class index starts from zero so |
| 3342 | 3346 | * increment to return the actual count |
| 3343 | 3347 | */ |
| 3344 | − num_tc++; | |
| 3345 | − | |
| 3346 | − return num_tc; | |
| 3348 | + return num_tc + 1; | |
| 3347 | 3349 | } |
| 3348 | 3350 | |
| 3349 | 3351 | /** |
| @@ -3451,28 +3453,27 @@ static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi) · 101 unmodified lines | ||
| 3451 | 3453 | struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0}; |
| 3452 | 3454 | struct i40e_pf *pf = vsi->back; |
| 3453 | 3455 | struct i40e_hw *hw = &pf->hw; |
| 3456 | + i40e_status aq_ret; | |
| 3454 | 3457 | u32 tc_bw_max; |
| 3455 | − int ret; | |
| 3456 | 3458 | int i; |
| 3457 | 3459 | |
| 3458 | 3460 | /* Get the VSI level BW configuration */ |
| 3459 | − ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL); | |
| 3460 | − if (ret) { | |
| 3461 | + aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL); | |
| 3462 | + if (aq_ret) { | |
| 3461 | 3463 | dev_info(&pf->pdev->dev, |
| 3462 | 3464 | "couldn't get pf vsi bw config, err %d, aq_err %d\n", |
| 3463 | − ret, pf->hw.aq.asq_last_status); | |
| 3464 | − return ret; | |
| 3465 | + aq_ret, pf->hw.aq.asq_last_status); | |
| 3466 | + return -EINVAL; | |
| 3465 | 3467 | } |
| 3466 | 3468 | |
| 3467 | 3469 | /* Get the VSI level BW configuration per TC */ |
| 3468 | − ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, | |
| 3469 | − &bw_ets_config, | |
| 3470 | − NULL); | |
| 3471 | − if (ret) { | |
| 3470 | + aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config, | |
| 3471 | + NULL); | |
| 3472 | + if (aq_ret) { | |
| 3472 | 3473 | dev_info(&pf->pdev->dev, |
| 3473 | 3474 | "couldn't get pf vsi ets bw config, err %d, aq_err %d\n", |
| 3474 | − ret, pf->hw.aq.asq_last_status); | |
| 3475 | − return ret; | |
| 3475 | + aq_ret, pf->hw.aq.asq_last_status); | |
| 3476 | + return -EINVAL; | |
| 3476 | 3477 | } |
| 3477 | 3478 | |
| 3478 | 3479 | if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) { |
| @@ -3494,7 +3495,8 @@ static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi) · 15 unmodified lines | ||
| 3494 | 3495 | /* 3 bits out of 4 for each TC */ |
| 3495 | 3496 | vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7); |
| 3496 | 3497 | } |
| 3497 | − return ret; | |
| 3498 | + | |
| 3499 | + return 0; | |
| 3498 | 3500 | } |
| 3499 | 3501 | |
| 3500 | 3502 | /** |
| @@ -3505,30 +3507,30 @@ static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi) · 4 unmodified lines | ||
| 3505 | 3507 | * |
| 3506 | 3508 | * Returns 0 on success, negative value on failure |
| 3507 | 3509 | **/ |
| 3508 | −static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, | |
| 3509 | − u8 enabled_tc, | |
| 3510 | +static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc, | |
| 3510 | 3511 | u8 *bw_share) |
| 3511 | 3512 | { |
| 3512 | 3513 | struct i40e_aqc_configure_vsi_tc_bw_data bw_data; |
| 3513 | − int i, ret = 0; | |
| 3514 | + i40e_status aq_ret; | |
| 3515 | + int i; | |
| 3514 | 3516 | |
| 3515 | 3517 | bw_data.tc_valid_bits = enabled_tc; |
| 3516 | 3518 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) |
| 3517 | 3519 | bw_data.tc_bw_credits[i] = bw_share[i]; |
| 3518 | 3520 | |
| 3519 | − ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, | |
| 3520 | − &bw_data, NULL); | |
| 3521 | − if (ret) { | |
| 3521 | + aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data, | |
| 3522 | + NULL); | |
| 3523 | + if (aq_ret) { | |
| 3522 | 3524 | dev_info(&vsi->back->pdev->dev, |
| 3523 | 3525 | "%s: AQ command Config VSI BW allocation per TC failed = %d\n", |
| 3524 | 3526 | __func__, vsi->back->hw.aq.asq_last_status); |
| 3525 | − return ret; | |
| 3527 | + return -EINVAL; | |
| 3526 | 3528 | } |
| 3527 | 3529 | |
| 3528 | 3530 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) |
| 3529 | 3531 | vsi->info.qs_handle[i] = bw_data.qs_handles[i]; |
| 3530 | 3532 | |
| 3531 | − return ret; | |
| 3533 | + return 0; | |
| 3532 | 3534 | } |
| 3533 | 3535 | |
| 3534 | 3536 | /** |
| @@ -719,6 +719,10 @@ static s32 igb_get_phy_id_82575(struct e1000_hw *hw) · 718 unmodified lines | ||
| 719 | 719 | u32 ctrl_ext; |
| 720 | 720 | u32 mdic; |
| 721 | 721 | |
| 722 | + /* Extra read required for some PHY's on i354 */ | |
| 723 | + if (hw->mac.type == e1000_i354) | |
| 724 | + igb_get_phy_id(hw); | |
| 725 | + | |
| 722 | 726 | /* For SGMII PHYs, we try the list of possible addresses until |
| 723 | 727 | * we find one that works. For non-SGMII PHYs |
| 724 | 728 | * (e.g. integrated copper PHYs), an address of 1 should |
| @@ -712,6 +712,7 @@ static s32 igb_set_fc_watermarks(struct e1000_hw *hw) · 711 unmodified lines | ||
| 712 | 712 | static s32 igb_set_default_fc(struct e1000_hw *hw) |
| 713 | 713 | { |
| 714 | 714 | s32 ret_val = 0; |
| 715 | + u16 lan_offset; | |
| 715 | 716 | u16 nvm_data; |
| 716 | 717 | |
| 717 | 718 | /* Read and store word 0x0F of the EEPROM. This word contains bits |
| @@ -722,7 +723,14 @@ static s32 igb_set_default_fc(struct e1000_hw *hw) · 4 unmodified lines | ||
| 722 | 723 | * control setting, then the variable hw->fc will |
| 723 | 724 | * be initialized based on a value in the EEPROM. |
| 724 | 725 | */ |
| 725 | − ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &nvm_data); | |
| 726 | + if (hw->mac.type == e1000_i350) { | |
| 727 | + lan_offset = NVM_82580_LAN_FUNC_OFFSET(hw->bus.func); | |
| 728 | + ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG | |
| 729 | + + lan_offset, 1, &nvm_data); | |
| 730 | + } else { | |
| 731 | + ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, | |
| 732 | + 1, &nvm_data); | |
| 733 | + } | |
| 726 | 734 | |
| 727 | 735 | if (ret_val) { |
| 728 | 736 | hw_dbg("NVM Read Error\n"); |
| @@ -1607,6 +1607,9 @@ static int igb_integrated_phy_loopback(struct igb_adapter *adapter) · 1606 unmodified lines | ||
| 1607 | 1607 | igb_write_phy_reg(hw, I347AT4_PAGE_SELECT, 0); |
| 1608 | 1608 | igb_write_phy_reg(hw, PHY_CONTROL, 0x4140); |
| 1609 | 1609 | } |
| 1610 | + } else if (hw->phy.type == e1000_phy_82580) { | |
| 1611 | + /* enable MII loopback */ | |
| 1612 | + igb_write_phy_reg(hw, I82580_PHY_LBK_CTRL, 0x8041); | |
| 1610 | 1613 | } |
| 1611 | 1614 | |
| 1612 | 1615 | /* add small delay to avoid loopback test failure */ |
| @@ -160,6 +160,13 @@ static int ixgbe_get_settings(struct net_device *netdev, · 159 unmodified lines | ||
| 160 | 160 | bool autoneg = false; |
| 161 | 161 | bool link_up; |
| 162 | 162 | |
| 163 | + /* SFP type is needed for get_link_capabilities */ | |
| 164 | + if (hw->phy.media_type & (ixgbe_media_type_fiber | | |
| 165 | + ixgbe_media_type_fiber_qsfp)) { | |
| 166 | + if (hw->phy.sfp_type == ixgbe_sfp_type_not_present) | |
| 167 | + hw->phy.ops.identify_sfp(hw); | |
| 168 | + } | |
| 169 | + | |
| 163 | 170 | hw->mac.ops.get_link_capabilities(hw, &supported_link, &autoneg); |
| 164 | 171 | |
| 165 | 172 | /* set the supported link speeds */ |
| @@ -186,6 +193,11 @@ static int ixgbe_get_settings(struct net_device *netdev, · 20 unmodified lines | ||
| 186 | 193 | ecmd->advertising |= ADVERTISED_1000baseT_Full; |
| 187 | 194 | if (supported_link & IXGBE_LINK_SPEED_100_FULL) |
| 188 | 195 | ecmd->advertising |= ADVERTISED_100baseT_Full; |
| 196 | + | |
| 197 | + if (hw->phy.multispeed_fiber && !autoneg) { | |
| 198 | + if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) | |
| 199 | + ecmd->advertising = ADVERTISED_10000baseT_Full; | |
| 200 | + } | |
| 189 | 201 | } |
| 190 | 202 | |
| 191 | 203 | if (autoneg) { |
| @@ -314,6 +326,14 @@ static int ixgbe_set_settings(struct net_device *netdev, · 122 unmodified lines | ||
| 314 | 326 | if (ecmd->advertising & ~ecmd->supported) |
| 315 | 327 | return -EINVAL; |
| 316 | 328 | |
| 329 | + /* only allow one speed at a time if no autoneg */ | |
| 330 | + if (!ecmd->autoneg && hw->phy.multispeed_fiber) { | |
| 331 | + if (ecmd->advertising == | |
| 332 | + (ADVERTISED_10000baseT_Full | | |
| 333 | + ADVERTISED_1000baseT_Full)) | |
| 334 | + return -EINVAL; | |
| 335 | + } | |
| 336 | + | |
| 317 | 337 | old = hw->phy.autoneg_advertised; |
| 318 | 338 | advertised = 0; |
| 319 | 339 | if (ecmd->advertising & ADVERTISED_10000baseT_Full) |
| @@ -1805,6 +1825,10 @@ static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter) · 1485 unmodified lines | ||
| 1805 | 1825 | unsigned int size = 1024; |
| 1806 | 1826 | netdev_tx_t tx_ret_val; |
| 1807 | 1827 | struct sk_buff *skb; |
| 1828 | + u32 flags_orig = adapter->flags; | |
| 1829 | + | |
| 1830 | + /* DCB can modify the frames on Tx */ | |
| 1831 | + adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; | |
| 1808 | 1832 | |
| 1809 | 1833 | /* allocate test skb */ |
| 1810 | 1834 | skb = alloc_skb(size, GFP_KERNEL); |
| @@ -1857,6 +1881,7 @@ static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter) · 46 unmodified lines | ||
| 1857 | 1881 | |
| 1858 | 1882 | /* free the original skb */ |
| 1859 | 1883 | kfree_skb(skb); |
| 1884 | + adapter->flags = flags_orig; | |
| 1860 | 1885 | |
| 1861 | 1886 | return ret_val; |
| 1862 | 1887 | } |
| @@ -3571,7 +3571,7 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter) · 3570 unmodified lines | ||
| 3571 | 3571 | { |
| 3572 | 3572 | struct ixgbe_hw *hw = &adapter->hw; |
| 3573 | 3573 | int i; |
| 3574 | − u32 rxctrl; | |
| 3574 | + u32 rxctrl, rfctl; | |
| 3575 | 3575 | |
| 3576 | 3576 | /* disable receives while setting up the descriptors */ |
| 3577 | 3577 | rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); |
| @@ -3580,6 +3580,13 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter) · 2 unmodified lines | ||
| 3580 | 3580 | ixgbe_setup_psrtype(adapter); |
| 3581 | 3581 | ixgbe_setup_rdrxctl(adapter); |
| 3582 | 3582 | |
| 3583 | + /* RSC Setup */ | |
| 3584 | + rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL); | |
| 3585 | + rfctl &= ~IXGBE_RFCTL_RSC_DIS; | |
| 3586 | + if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) | |
| 3587 | + rfctl |= IXGBE_RFCTL_RSC_DIS; | |
| 3588 | + IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl); | |
| 3589 | + | |
| 3583 | 3590 | /* Program registers for the distribution of queues */ |
| 3584 | 3591 | ixgbe_setup_mrqc(adapter); |
| 3585 | 3592 | |
| @@ -5993,8 +6000,16 @@ static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter) · 2407 unmodified lines | ||
| 5993 | 6000 | adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG; |
| 5994 | 6001 | |
| 5995 | 6002 | speed = hw->phy.autoneg_advertised; |
| 5996 | − if ((!speed) && (hw->mac.ops.get_link_capabilities)) | |
| 6003 | + if ((!speed) && (hw->mac.ops.get_link_capabilities)) { | |
| 5997 | 6004 | hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg); |
| 6005 | + | |
| 6006 | + /* setup the highest link when no autoneg */ | |
| 6007 | + if (!autoneg) { | |
| 6008 | + if (speed & IXGBE_LINK_SPEED_10GB_FULL) | |
| 6009 | + speed = IXGBE_LINK_SPEED_10GB_FULL; | |
| 6010 | + } | |
| 6011 | + } | |
| 6012 | + | |
| 5998 | 6013 | if (hw->mac.ops.setup_link) |
| 5999 | 6014 | hw->mac.ops.setup_link(hw, speed, true); |
| 6000 | 6015 | |
| @@ -1861,6 +1861,7 @@ enum { · 1860 unmodified lines | ||
| 1861 | 1861 | #define IXGBE_RFCTL_ISCSI_DIS 0x00000001 |
| 1862 | 1862 | #define IXGBE_RFCTL_ISCSI_DWC_MASK 0x0000003E |
| 1863 | 1863 | #define IXGBE_RFCTL_ISCSI_DWC_SHIFT 1 |
| 1864 | +#define IXGBE_RFCTL_RSC_DIS 0x00000020 | |
| 1864 | 1865 | #define IXGBE_RFCTL_NFSW_DIS 0x00000040 |
| 1865 | 1866 | #define IXGBE_RFCTL_NFSR_DIS 0x00000080 |
| 1866 | 1867 | #define IXGBE_RFCTL_NFS_VER_MASK 0x00000300 |
| @@ -282,8 +282,7 @@ ltq_etop_hw_init(struct net_device *dev) · 281 unmodified lines | ||
| 282 | 282 | |
| 283 | 283 | if (IS_TX(i)) { |
| 284 | 284 | ltq_dma_alloc_tx(&ch->dma); |
| 285 | − request_irq(irq, ltq_etop_dma_irq, IRQF_DISABLED, | |
| 286 | − "etop_tx", priv); | |
| 285 | + request_irq(irq, ltq_etop_dma_irq, 0, "etop_tx", priv); | |
| 287 | 286 | } else if (IS_RX(i)) { |
| 288 | 287 | ltq_dma_alloc_rx(&ch->dma); |
| 289 | 288 | for (ch->dma.desc = 0; ch->dma.desc < LTQ_DESC_NUM; |
| @@ -291,8 +290,7 @@ ltq_etop_hw_init(struct net_device *dev) · 1 unmodified line | ||
| 291 | 290 | if (ltq_etop_alloc_skb(ch)) |
| 292 | 291 | return -ENOMEM; |
| 293 | 292 | ch->dma.desc = 0; |
| 294 | − request_irq(irq, ltq_etop_dma_irq, IRQF_DISABLED, | |
| 295 | − "etop_rx", priv); | |
| 293 | + request_irq(irq, ltq_etop_dma_irq, 0, "etop_rx", priv); | |
| 296 | 294 | } |
| 297 | 295 | ch->dma.irq = irq; |
| 298 | 296 | } |
| @@ -1123,8 +1123,7 @@ static int pxa168_eth_open(struct net_device *dev) · 1122 unmodified lines | ||
| 1123 | 1123 | struct pxa168_eth_private *pep = netdev_priv(dev); |
| 1124 | 1124 | int err; |
| 1125 | 1125 | |
| 1126 | − err = request_irq(dev->irq, pxa168_eth_int_handler, | |
| 1127 | − IRQF_DISABLED, dev->name, dev); | |
| 1126 | + err = request_irq(dev->irq, pxa168_eth_int_handler, 0, dev->name, dev); | |
| 1128 | 1127 | if (err) { |
| 1129 | 1128 | dev_err(&dev->dev, "can't assign irq\n"); |
| 1130 | 1129 | return -EAGAIN; |
| @@ -3086,23 +3086,27 @@ static struct sk_buff *skge_rx_get(struct net_device *dev, · 3085 unmodified lines | ||
| 3086 | 3086 | PCI_DMA_FROMDEVICE); |
| 3087 | 3087 | skge_rx_reuse(e, skge->rx_buf_size); |
| 3088 | 3088 | } else { |
| 3089 | + struct skge_element ee; | |
| 3089 | 3090 | struct sk_buff *nskb; |
| 3090 | 3091 | |
| 3091 | 3092 | nskb = netdev_alloc_skb_ip_align(dev, skge->rx_buf_size); |
| 3092 | 3093 | if (!nskb) |
| 3093 | 3094 | goto resubmit; |
| 3094 | 3095 | |
| 3096 | + ee = *e; | |
| 3097 | + | |
| 3098 | + skb = ee.skb; | |
| 3099 | + prefetch(skb->data); | |
| 3100 | + | |
| 3095 | 3101 | if (skge_rx_setup(skge, e, nskb, skge->rx_buf_size) < 0) { |
| 3096 | 3102 | dev_kfree_skb(nskb); |
| 3097 | 3103 | goto resubmit; |
| 3098 | 3104 | } |
| 3099 | 3105 | |
| 3100 | 3106 | pci_unmap_single(skge->hw->pdev, |
| 3101 | − dma_unmap_addr(e, mapaddr), | |
| 3102 | − dma_unmap_len(e, maplen), | |
| 3107 | + dma_unmap_addr(&ee, mapaddr), | |
| 3108 | + dma_unmap_len(&ee, maplen), | |
| 3103 | 3109 | PCI_DMA_FROMDEVICE); |
| 3104 | − skb = e->skb; | |
| 3105 | − prefetch(skb->data); | |
| 3106 | 3110 | } |
| 3107 | 3111 | |
| 3108 | 3112 | skb_put(skb, len); |
| @@ -53,9 +53,11 @@ static int mlx4_en_moderation_update(struct mlx4_en_priv *priv) · 52 unmodified lines | ||
| 53 | 53 | for (i = 0; i < priv->tx_ring_num; i++) { |
| 54 | 54 | priv->tx_cq[i].moder_cnt = priv->tx_frames; |
| 55 | 55 | priv->tx_cq[i].moder_time = priv->tx_usecs; |
| 56 | − err = mlx4_en_set_cq_moder(priv, &priv->tx_cq[i]); | |
| 57 | − if (err) | |
| 58 | − return err; | |
| 56 | + if (priv->port_up) { | |
| 57 | + err = mlx4_en_set_cq_moder(priv, &priv->tx_cq[i]); | |
| 58 | + if (err) | |
| 59 | + return err; | |
| 60 | + } | |
| 59 | 61 | } |
| 60 | 62 | |
| 61 | 63 | if (priv->adaptive_rx_coal) |
| @@ -65,9 +67,11 @@ static int mlx4_en_moderation_update(struct mlx4_en_priv *priv) · 3 unmodified lines | ||
| 65 | 67 | priv->rx_cq[i].moder_cnt = priv->rx_frames; |
| 66 | 68 | priv->rx_cq[i].moder_time = priv->rx_usecs; |
| 67 | 69 | priv->last_moder_time[i] = MLX4_EN_AUTO_CONF; |
| 68 | − err = mlx4_en_set_cq_moder(priv, &priv->rx_cq[i]); | |
| 69 | − if (err) | |
| 70 | − return err; | |
| 70 | + if (priv->port_up) { | |
| 71 | + err = mlx4_en_set_cq_moder(priv, &priv->rx_cq[i]); | |
| 72 | + if (err) | |
| 73 | + return err; | |
| 74 | + } | |
| 71 | 75 | } |
| 72 | 76 | |
| 73 | 77 | return err; |
| @@ -915,7 +915,7 @@ static int ks_net_open(struct net_device *netdev) · 914 unmodified lines | ||
| 915 | 915 | struct ks_net *ks = netdev_priv(netdev); |
| 916 | 916 | int err; |
| 917 | 917 | |
| 918 | −#define KS_INT_FLAGS (IRQF_DISABLED|IRQF_TRIGGER_LOW) | |
| 918 | +#define KS_INT_FLAGS IRQF_TRIGGER_LOW | |
| 919 | 919 | /* lock the card, even if we may not actually do anything |
| 920 | 920 | * else at the moment. |
| 921 | 921 | */ |
| @@ -543,7 +543,7 @@ static const struct of_device_id moxart_mac_match[] = { · 542 unmodified lines | ||
| 543 | 543 | { } |
| 544 | 544 | }; |
| 545 | 545 | |
| 546 | −struct __initdata platform_driver moxart_mac_driver = { | |
| 546 | +static struct platform_driver moxart_mac_driver = { | |
| 547 | 547 | .probe = moxart_mac_probe, |
| 548 | 548 | .remove = moxart_remove, |
| 549 | 549 | .driver = { |
| @@ -83,8 +83,7 @@ static int jazzsonic_open(struct net_device* dev) · 82 unmodified lines | ||
| 83 | 83 | { |
| 84 | 84 | int retval; |
| 85 | 85 | |
| 86 | − retval = request_irq(dev->irq, sonic_interrupt, IRQF_DISABLED, | |
| 87 | − "sonic", dev); | |
| 86 | + retval = request_irq(dev->irq, sonic_interrupt, 0, "sonic", dev); | |
| 88 | 87 | if (retval) { |
| 89 | 88 | printk(KERN_ERR "%s: unable to get IRQ %d.\n", |
| 90 | 89 | dev->name, dev->irq); |
| @@ -95,8 +95,7 @@ static int xtsonic_open(struct net_device *dev) · 94 unmodified lines | ||
| 95 | 95 | { |
| 96 | 96 | int retval; |
| 97 | 97 | |
| 98 | − retval = request_irq(dev->irq, sonic_interrupt, IRQF_DISABLED, | |
| 99 | − "sonic", dev); | |
| 98 | + retval = request_irq(dev->irq, sonic_interrupt, 0, "sonic", dev); | |
| 100 | 99 | if (retval) { |
| 101 | 100 | printk(KERN_ERR "%s: unable to get IRQ %d.\n", |
| 102 | 101 | dev->name, dev->irq); |
| @@ -1219,7 +1219,7 @@ static int pasemi_mac_open(struct net_device *dev) · 1218 unmodified lines | ||
| 1219 | 1219 | snprintf(mac->tx_irq_name, sizeof(mac->tx_irq_name), "%s tx", |
| 1220 | 1220 | dev->name); |
| 1221 | 1221 | |
| 1222 | − ret = request_irq(mac->tx->chan.irq, pasemi_mac_tx_intr, IRQF_DISABLED, | |
| 1222 | + ret = request_irq(mac->tx->chan.irq, pasemi_mac_tx_intr, 0, | |
| 1223 | 1223 | mac->tx_irq_name, mac->tx); |
| 1224 | 1224 | if (ret) { |
| 1225 | 1225 | dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n", |
| @@ -1230,7 +1230,7 @@ static int pasemi_mac_open(struct net_device *dev) · 4 unmodified lines | ||
| 1230 | 1230 | snprintf(mac->rx_irq_name, sizeof(mac->rx_irq_name), "%s rx", |
| 1231 | 1231 | dev->name); |
| 1232 | 1232 | |
| 1233 | − ret = request_irq(mac->rx->chan.irq, pasemi_mac_rx_intr, IRQF_DISABLED, | |
| 1233 | + ret = request_irq(mac->rx->chan.irq, pasemi_mac_rx_intr, 0, | |
| 1234 | 1234 | mac->rx_irq_name, mac->rx); |
| 1235 | 1235 | if (ret) { |
| 1236 | 1236 | dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n", |
| @@ -1794,3 +1794,11 @@ const struct ethtool_ops qlcnic_sriov_vf_ethtool_ops = { · 1793 unmodified lines | ||
| 1794 | 1794 | .set_msglevel = qlcnic_set_msglevel, |
| 1795 | 1795 | .get_msglevel = qlcnic_get_msglevel, |
| 1796 | 1796 | }; |
| 1797 | + | |
| 1798 | +const struct ethtool_ops qlcnic_ethtool_failed_ops = { | |
| 1799 | + .get_settings = qlcnic_get_settings, | |
| 1800 | + .get_drvinfo = qlcnic_get_drvinfo, | |
| 1801 | + .set_msglevel = qlcnic_set_msglevel, | |
| 1802 | + .get_msglevel = qlcnic_get_msglevel, | |
| 1803 | + .set_dump = qlcnic_set_dump, | |
| 1804 | +}; | |
| @@ -431,6 +431,9 @@ static void qlcnic_82xx_cancel_idc_work(struct qlcnic_adapter *adapter) · 430 unmodified lines | ||
| 431 | 431 | while (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state)) |
| 432 | 432 | usleep_range(10000, 11000); |
| 433 | 433 | |
| 434 | + if (!adapter->fw_work.work.func) | |
| 435 | + return; | |
| 436 | + | |
| 434 | 437 | cancel_delayed_work_sync(&adapter->fw_work); |
| 435 | 438 | } |
| 436 | 439 | |
| @@ -2275,8 +2278,9 @@ qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 1838 unmodified lines | ||
| 2275 | 2278 | adapter->portnum = adapter->ahw->pci_func; |
| 2276 | 2279 | err = qlcnic_start_firmware(adapter); |
| 2277 | 2280 | if (err) { |
| 2278 | − dev_err(&pdev->dev, "Loading fw failed.Please Reboot\n"); | |
| 2279 | − goto err_out_free_hw; | |
| 2281 | + dev_err(&pdev->dev, "Loading fw failed.Please Reboot\n" | |
| 2282 | + "\t\tIf reboot doesn't help, try flashing the card\n"); | |
| 2283 | + goto err_out_maintenance_mode; | |
| 2280 | 2284 | } |
| 2281 | 2285 | |
| 2282 | 2286 | qlcnic_get_multiq_capability(adapter); |
| @@ -2408,6 +2412,22 @@ err_out_disable_pdev: · 125 unmodified lines | ||
| 2408 | 2412 | pci_set_drvdata(pdev, NULL); |
| 2409 | 2413 | pci_disable_device(pdev); |
| 2410 | 2414 | return err; |
| 2415 | + | |
| 2416 | +err_out_maintenance_mode: | |
| 2417 | + netdev->netdev_ops = &qlcnic_netdev_failed_ops; | |
| 2418 | + SET_ETHTOOL_OPS(netdev, &qlcnic_ethtool_failed_ops); | |
| 2419 | + err = register_netdev(netdev); | |
| 2420 | + | |
| 2421 | + if (err) { | |
| 2422 | + dev_err(&pdev->dev, "Failed to register net device\n"); | |
| 2423 | + qlcnic_clr_all_drv_state(adapter, 0); | |
| 2424 | + goto err_out_free_hw; | |
| 2425 | + } | |
| 2426 | + | |
| 2427 | + pci_set_drvdata(pdev, adapter); | |
| 2428 | + qlcnic_add_sysfs(adapter); | |
| 2429 | + | |
| 2430 | + return 0; | |
| 2411 | 2431 | } |
| 2412 | 2432 | |
| 2413 | 2433 | static void qlcnic_remove(struct pci_dev *pdev) |
| @@ -2518,8 +2538,16 @@ static int qlcnic_resume(struct pci_dev *pdev) · 104 unmodified lines | ||
| 2518 | 2538 | static int qlcnic_open(struct net_device *netdev) |
| 2519 | 2539 | { |
| 2520 | 2540 | struct qlcnic_adapter *adapter = netdev_priv(netdev); |
| 2541 | + u32 state; | |
| 2521 | 2542 | int err; |
| 2522 | 2543 | |
| 2544 | + state = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_STATE); | |
| 2545 | + if (state == QLCNIC_DEV_FAILED || state == QLCNIC_DEV_BADBAD) { | |
| 2546 | + netdev_err(netdev, "%s: Device is in FAILED state\n", __func__); | |
| 2547 | + | |
| 2548 | + return -EIO; | |
| 2549 | + } | |
| 2550 | + | |
| 2523 | 2551 | netif_carrier_off(netdev); |
| 2524 | 2552 | |
| 2525 | 2553 | err = qlcnic_attach(adapter); |
| @@ -3228,6 +3256,13 @@ void qlcnic_82xx_dev_request_reset(struct qlcnic_adapter *adapter, u32 key) · 702 unmodified lines | ||
| 3228 | 3256 | return; |
| 3229 | 3257 | |
| 3230 | 3258 | state = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_STATE); |
| 3259 | + if (state == QLCNIC_DEV_FAILED || state == QLCNIC_DEV_BADBAD) { | |
| 3260 | + netdev_err(adapter->netdev, "%s: Device is in FAILED state\n", | |
| 3261 | + __func__); | |
| 3262 | + qlcnic_api_unlock(adapter); | |
| 3263 | + | |
| 3264 | + return; | |
| 3265 | + } | |
| 3231 | 3266 | |
| 3232 | 3267 | if (state == QLCNIC_DEV_READY) { |
| 3233 | 3268 | QLC_SHARED_REG_WR32(adapter, QLCNIC_CRB_DEV_STATE, |
| @@ -1561,6 +1561,7 @@ static int qlcnic_sriov_vf_reinit_driver(struct qlcnic_adapter *adapter) · 1560 unmodified lines | ||
| 1561 | 1561 | { |
| 1562 | 1562 | int err; |
| 1563 | 1563 | |
| 1564 | + adapter->need_fw_reset = 0; | |
| 1564 | 1565 | qlcnic_83xx_reinit_mbx_work(adapter->ahw->mailbox); |
| 1565 | 1566 | qlcnic_83xx_enable_mbx_interrupt(adapter); |
| 1566 | 1567 | |
| @@ -397,6 +397,7 @@ static int qlcnic_pci_sriov_disable(struct qlcnic_adapter *adapter) · 396 unmodified lines | ||
| 397 | 397 | { |
| 398 | 398 | struct net_device *netdev = adapter->netdev; |
| 399 | 399 | |
| 400 | + rtnl_lock(); | |
| 400 | 401 | if (netif_running(netdev)) |
| 401 | 402 | __qlcnic_down(adapter, netdev); |
| 402 | 403 | |
| @@ -407,12 +408,15 @@ static int qlcnic_pci_sriov_disable(struct qlcnic_adapter *adapter) · 4 unmodified lines | ||
| 407 | 408 | /* After disabling SRIOV re-init the driver in default mode |
| 408 | 409 | configure opmode based on op_mode of function |
| 409 | 410 | */ |
| 410 | − if (qlcnic_83xx_configure_opmode(adapter)) | |
| 411 | + if (qlcnic_83xx_configure_opmode(adapter)) { | |
| 412 | + rtnl_unlock(); | |
| 411 | 413 | return -EIO; |
| 414 | + } | |
| 412 | 415 | |
| 413 | 416 | if (netif_running(netdev)) |
| 414 | 417 | __qlcnic_up(adapter, netdev); |
| 415 | 418 | |
| 419 | + rtnl_unlock(); | |
| 416 | 420 | return 0; |
| 417 | 421 | } |
| 418 | 422 | |
| @@ -533,6 +537,7 @@ static int qlcnic_pci_sriov_enable(struct qlcnic_adapter *adapter, int num_vfs) · 114 unmodified lines | ||
| 533 | 537 | return -EIO; |
| 534 | 538 | } |
| 535 | 539 | |
| 540 | + rtnl_lock(); | |
| 536 | 541 | if (netif_running(netdev)) |
| 537 | 542 | __qlcnic_down(adapter, netdev); |
| 538 | 543 | |
| @@ -555,6 +560,7 @@ static int qlcnic_pci_sriov_enable(struct qlcnic_adapter *adapter, int num_vfs) · 16 unmodified lines | ||
| 555 | 560 | __qlcnic_up(adapter, netdev); |
| 556 | 561 | |
| 557 | 562 | error: |
| 563 | + rtnl_unlock(); | |
| 558 | 564 | return err; |
| 559 | 565 | } |
| 560 | 566 | |
| @@ -1272,6 +1272,7 @@ void qlcnic_remove_sysfs_entries(struct qlcnic_adapter *adapter) · 1271 unmodified lines | ||
| 1272 | 1272 | void qlcnic_create_diag_entries(struct qlcnic_adapter *adapter) |
| 1273 | 1273 | { |
| 1274 | 1274 | struct device *dev = &adapter->pdev->dev; |
| 1275 | + u32 state; | |
| 1275 | 1276 | |
| 1276 | 1277 | if (device_create_bin_file(dev, &bin_attr_port_stats)) |
| 1277 | 1278 | dev_info(dev, "failed to create port stats sysfs entry"); |
| @@ -1285,8 +1286,13 @@ void qlcnic_create_diag_entries(struct qlcnic_adapter *adapter) · 7 unmodified lines | ||
| 1285 | 1286 | if (device_create_bin_file(dev, &bin_attr_mem)) |
| 1286 | 1287 | dev_info(dev, "failed to create mem sysfs entry\n"); |
| 1287 | 1288 | |
| 1289 | + state = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_STATE); | |
| 1290 | + if (state == QLCNIC_DEV_FAILED || state == QLCNIC_DEV_BADBAD) | |
| 1291 | + return; | |
| 1292 | + | |
| 1288 | 1293 | if (device_create_bin_file(dev, &bin_attr_pci_config)) |
| 1289 | 1294 | dev_info(dev, "failed to create pci config sysfs entry"); |
| 1295 | + | |
| 1290 | 1296 | if (device_create_file(dev, &dev_attr_beacon)) |
| 1291 | 1297 | dev_info(dev, "failed to create beacon sysfs entry"); |
| 1292 | 1298 | |
| @@ -1307,6 +1313,7 @@ void qlcnic_create_diag_entries(struct qlcnic_adapter *adapter) · 14 unmodified lines | ||
| 1307 | 1313 | void qlcnic_remove_diag_entries(struct qlcnic_adapter *adapter) |
| 1308 | 1314 | { |
| 1309 | 1315 | struct device *dev = &adapter->pdev->dev; |
| 1316 | + u32 state; | |
| 1310 | 1317 | |
| 1311 | 1318 | device_remove_bin_file(dev, &bin_attr_port_stats); |
| 1312 | 1319 | |
| @@ -1315,6 +1322,11 @@ void qlcnic_remove_diag_entries(struct qlcnic_adapter *adapter) · 2 unmodified lines | ||
| 1315 | 1322 | device_remove_file(dev, &dev_attr_diag_mode); |
| 1316 | 1323 | device_remove_bin_file(dev, &bin_attr_crb); |
| 1317 | 1324 | device_remove_bin_file(dev, &bin_attr_mem); |
| 1325 | + | |
| 1326 | + state = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_STATE); | |
| 1327 | + if (state == QLCNIC_DEV_FAILED || state == QLCNIC_DEV_BADBAD) | |
| 1328 | + return; | |
| 1329 | + | |
| 1318 | 1330 | device_remove_bin_file(dev, &bin_attr_pci_config); |
| 1319 | 1331 | device_remove_file(dev, &dev_attr_beacon); |
| 1320 | 1332 | if (!(adapter->flags & QLCNIC_ESWITCH_ENABLED)) |
| @@ -740,8 +740,8 @@ int ql_core_dump(struct ql_adapter *qdev, struct ql_mpi_coredump *mpi_coredump) · 739 unmodified lines | ||
| 740 | 740 | int i; |
| 741 | 741 | |
| 742 | 742 | if (!mpi_coredump) { |
| 743 | − netif_err(qdev, drv, qdev->ndev, "No memory available\n"); | |
| 744 | − return -ENOMEM; | |
| 743 | + netif_err(qdev, drv, qdev->ndev, "No memory allocated\n"); | |
| 744 | + return -EINVAL; | |
| 745 | 745 | } |
| 746 | 746 | |
| 747 | 747 | /* Try to get the spinlock, but dont worry if |
| @@ -1274,7 +1274,7 @@ void ql_mpi_reset_work(struct work_struct *work) · 1273 unmodified lines | ||
| 1274 | 1274 | return; |
| 1275 | 1275 | } |
| 1276 | 1276 | |
| 1277 | − if (!ql_core_dump(qdev, qdev->mpi_coredump)) { | |
| 1277 | + if (qdev->mpi_coredump && !ql_core_dump(qdev, qdev->mpi_coredump)) { | |
| 1278 | 1278 | netif_err(qdev, drv, qdev->ndev, "Core is dumped!\n"); |
| 1279 | 1279 | qdev->core_is_dumped = 1; |
| 1280 | 1280 | queue_delayed_work(qdev->workqueue, |
| @@ -4231,6 +4231,7 @@ static void rtl_init_rxcfg(struct rtl8169_private *tp) · 4230 unmodified lines | ||
| 4231 | 4231 | case RTL_GIGA_MAC_VER_23: |
| 4232 | 4232 | case RTL_GIGA_MAC_VER_24: |
| 4233 | 4233 | case RTL_GIGA_MAC_VER_34: |
| 4234 | + case RTL_GIGA_MAC_VER_35: | |
| 4234 | 4235 | RTL_W32(RxConfig, RX128_INT_EN | RX_MULTI_EN | RX_DMA_BURST); |
| 4235 | 4236 | break; |
| 4236 | 4237 | case RTL_GIGA_MAC_VER_40: |
| @@ -7,7 +7,7 @@ config SFC · 6 unmodified lines | ||
| 7 | 7 | select I2C_ALGOBIT |
| 8 | 8 | select PTP_1588_CLOCK |
| 9 | 9 | ---help--- |
| 10 | − This driver supports 10-gigabit Ethernet cards based on | |
| 10 | + This driver supports 10/40-gigabit Ethernet cards based on | |
| 11 | 11 | the Solarflare SFC4000, SFC9000-family and SFC9100-family |
| 12 | 12 | controllers. |
| 13 | 13 | |
| @@ -94,7 +94,7 @@ static unsigned int efx_ef10_mem_map_size(struct efx_nic *efx) · 93 unmodified lines | ||
| 94 | 94 | return resource_size(&efx->pci_dev->resource[EFX_MEM_BAR]); |
| 95 | 95 | } |
| 96 | 96 | |
| 97 | −static int efx_ef10_init_capabilities(struct efx_nic *efx) | |
| 97 | +static int efx_ef10_init_datapath_caps(struct efx_nic *efx) | |
| 98 | 98 | { |
| 99 | 99 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_CAPABILITIES_OUT_LEN); |
| 100 | 100 | struct efx_ef10_nic_data *nic_data = efx->nic_data; |
| @@ -107,16 +107,27 @@ static int efx_ef10_init_capabilities(struct efx_nic *efx) · 6 unmodified lines | ||
| 107 | 107 | outbuf, sizeof(outbuf), &outlen); |
| 108 | 108 | if (rc) |
| 109 | 109 | return rc; |
| 110 | + if (outlen < sizeof(outbuf)) { | |
| 111 | + netif_err(efx, drv, efx->net_dev, | |
| 112 | + "unable to read datapath firmware capabilities\n"); | |
| 113 | + return -EIO; | |
| 114 | + } | |
| 110 | 115 | |
| 111 | − if (outlen >= sizeof(outbuf)) { | |
| 112 | − nic_data->datapath_caps = | |
| 113 | − MCDI_DWORD(outbuf, GET_CAPABILITIES_OUT_FLAGS1); | |
| 114 | − if (!(nic_data->datapath_caps & | |
| 115 | − (1 << MC_CMD_GET_CAPABILITIES_OUT_TX_TSO_LBN))) { | |
| 116 | − netif_err(efx, drv, efx->net_dev, | |
| 117 | − "Capabilities don't indicate TSO support.\n"); | |
| 118 | − return -ENODEV; | |
| 119 | − } | |
| 116 | + nic_data->datapath_caps = | |
| 117 | + MCDI_DWORD(outbuf, GET_CAPABILITIES_OUT_FLAGS1); | |
| 118 | + | |
| 119 | + if (!(nic_data->datapath_caps & | |
| 120 | + (1 << MC_CMD_GET_CAPABILITIES_OUT_TX_TSO_LBN))) { | |
| 121 | + netif_err(efx, drv, efx->net_dev, | |
| 122 | + "current firmware does not support TSO\n"); | |
| 123 | + return -ENODEV; | |
| 124 | + } | |
| 125 | + | |
| 126 | + if (!(nic_data->datapath_caps & | |
| 127 | + (1 << MC_CMD_GET_CAPABILITIES_OUT_RX_PREFIX_LEN_14_LBN))) { | |
| 128 | + netif_err(efx, probe, efx->net_dev, | |
| 129 | + "current firmware does not support an RX prefix\n"); | |
| 130 | + return -ENODEV; | |
| 120 | 131 | } |
| 121 | 132 | |
| 122 | 133 | return 0; |
| @@ -217,21 +228,13 @@ static int efx_ef10_probe(struct efx_nic *efx) · 94 unmodified lines | ||
| 217 | 228 | if (rc) |
| 218 | 229 | goto fail3; |
| 219 | 230 | |
| 220 | − rc = efx_ef10_init_capabilities(efx); | |
| 231 | + rc = efx_ef10_init_datapath_caps(efx); | |
| 221 | 232 | if (rc < 0) |
| 222 | 233 | goto fail3; |
| 223 | 234 | |
| 224 | 235 | efx->rx_packet_len_offset = |
| 225 | 236 | ES_DZ_RX_PREFIX_PKTLEN_OFST - ES_DZ_RX_PREFIX_SIZE; |
| 226 | 237 | |
| 227 | − if (!(nic_data->datapath_caps & | |
| 228 | − (1 << MC_CMD_GET_CAPABILITIES_OUT_RX_PREFIX_LEN_14_LBN))) { | |
| 229 | − netif_err(efx, probe, efx->net_dev, | |
| 230 | − "current firmware does not support an RX prefix\n"); | |
| 231 | − rc = -ENODEV; | |
| 232 | − goto fail3; | |
| 233 | − } | |
| 234 | − | |
| 235 | 238 | rc = efx_mcdi_port_get_number(efx); |
| 236 | 239 | if (rc < 0) |
| 237 | 240 | goto fail3; |
| @@ -260,8 +263,6 @@ static int efx_ef10_probe(struct efx_nic *efx) · 22 unmodified lines | ||
| 260 | 263 | if (rc) |
| 261 | 264 | goto fail3; |
| 262 | 265 | |
| 263 | − efx_ptp_probe(efx); | |
| 264 | − | |
| 265 | 266 | return 0; |
| 266 | 267 | |
| 267 | 268 | fail3: |
| @@ -342,6 +343,13 @@ static int efx_ef10_init_nic(struct efx_nic *efx) · 74 unmodified lines | ||
| 342 | 343 | struct efx_ef10_nic_data *nic_data = efx->nic_data; |
| 343 | 344 | int rc; |
| 344 | 345 | |
| 346 | + if (nic_data->must_check_datapath_caps) { | |
| 347 | + rc = efx_ef10_init_datapath_caps(efx); | |
| 348 | + if (rc) | |
| 349 | + return rc; | |
| 350 | + nic_data->must_check_datapath_caps = false; | |
| 351 | + } | |
| 352 | + | |
| 345 | 353 | if (nic_data->must_realloc_vis) { |
| 346 | 354 | /* We cannot let the number of VIs change now */ |
| 347 | 355 | rc = efx_ef10_alloc_vis(efx, nic_data->n_allocated_vis, |
| @@ -710,6 +718,14 @@ static int efx_ef10_mcdi_poll_reboot(struct efx_nic *efx) · 362 unmodified lines | ||
| 710 | 718 | nic_data->must_restore_filters = true; |
| 711 | 719 | nic_data->rx_rss_context = EFX_EF10_RSS_CONTEXT_INVALID; |
| 712 | 720 | |
| 721 | + /* The datapath firmware might have been changed */ | |
| 722 | + nic_data->must_check_datapath_caps = true; | |
| 723 | + | |
| 724 | + /* MAC statistics have been cleared on the NIC; clear the local | |
| 725 | + * statistic that we update with efx_update_diff_stat(). | |
| 726 | + */ | |
| 727 | + nic_data->stats[EF10_STAT_rx_bad_bytes] = 0; | |
| 728 | + | |
| 713 | 729 | return -EIO; |
| 714 | 730 | } |
| 715 | 731 | |
| @@ -27,10 +27,10 @@ · 26 unmodified lines | ||
| 27 | 27 | |
| 28 | 28 | /* A reboot/assertion causes the MCDI status word to be set after the |
| 29 | 29 | * command word is set or a REBOOT event is sent. If we notice a reboot |
| 30 | − * via these mechanisms then wait 20ms for the status word to be set. | |
| 30 | + * via these mechanisms then wait 250ms for the status word to be set. | |
| 31 | 31 | */ |
| 32 | 32 | #define MCDI_STATUS_DELAY_US 100 |
| 33 | −#define MCDI_STATUS_DELAY_COUNT 200 | |
| 33 | +#define MCDI_STATUS_DELAY_COUNT 2500 | |
| 34 | 34 | #define MCDI_STATUS_SLEEP_MS \ |
| 35 | 35 | (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000) |
| 36 | 36 | |
| @@ -800,9 +800,6 @@ static void efx_mcdi_ev_death(struct efx_nic *efx, int rc) · 763 unmodified lines | ||
| 800 | 800 | } else { |
| 801 | 801 | int count; |
| 802 | 802 | |
| 803 | − /* Nobody was waiting for an MCDI request, so trigger a reset */ | |
| 804 | − efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); | |
| 805 | − | |
| 806 | 803 | /* Consume the status word since efx_mcdi_rpc_finish() won't */ |
| 807 | 804 | for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) { |
| 808 | 805 | if (efx_mcdi_poll_reboot(efx)) |
| @@ -810,6 +807,9 @@ static void efx_mcdi_ev_death(struct efx_nic *efx, int rc) · 1 unmodified line | ||
| 810 | 807 | udelay(MCDI_STATUS_DELAY_US); |
| 811 | 808 | } |
| 812 | 809 | mcdi->new_epoch = true; |
| 810 | + | |
| 811 | + /* Nobody was waiting for an MCDI request, so trigger a reset */ | |
| 812 | + efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); | |
| 813 | 813 | } |
| 814 | 814 | |
| 815 | 815 | spin_unlock(&mcdi->iface_lock); |
| @@ -556,6 +556,7 @@ static int efx_mcdi_phy_set_settings(struct efx_nic *efx, struct ethtool_cmd *ec · 555 unmodified lines | ||
| 556 | 556 | case 100: caps = 1 << MC_CMD_PHY_CAP_100FDX_LBN; break; |
| 557 | 557 | case 1000: caps = 1 << MC_CMD_PHY_CAP_1000FDX_LBN; break; |
| 558 | 558 | case 10000: caps = 1 << MC_CMD_PHY_CAP_10000FDX_LBN; break; |
| 559 | + case 40000: caps = 1 << MC_CMD_PHY_CAP_40000FDX_LBN; break; | |
| 559 | 560 | default: return -EINVAL; |
| 560 | 561 | } |
| 561 | 562 | } else { |
| @@ -841,6 +842,7 @@ static unsigned int efx_mcdi_event_link_speed[] = { · 279 unmodified lines | ||
| 841 | 842 | [MCDI_EVENT_LINKCHANGE_SPEED_100M] = 100, |
| 842 | 843 | [MCDI_EVENT_LINKCHANGE_SPEED_1G] = 1000, |
| 843 | 844 | [MCDI_EVENT_LINKCHANGE_SPEED_10G] = 10000, |
| 845 | + [MCDI_EVENT_LINKCHANGE_SPEED_40G] = 40000, | |
| 844 | 846 | }; |
| 845 | 847 | |
| 846 | 848 | void efx_mcdi_process_link_change(struct efx_nic *efx, efx_qword_t *ev) |
| @@ -400,6 +400,8 @@ enum { · 399 unmodified lines | ||
| 400 | 400 | * @rx_rss_context: Firmware handle for our RSS context |
| 401 | 401 | * @stats: Hardware statistics |
| 402 | 402 | * @workaround_35388: Flag: firmware supports workaround for bug 35388 |
| 403 | + * @must_check_datapath_caps: Flag: @datapath_caps needs to be revalidated | |
| 404 | + * after MC reboot | |
| 403 | 405 | * @datapath_caps: Capabilities of datapath firmware (FLAGS1 field of |
| 404 | 406 | * %MC_CMD_GET_CAPABILITIES response) |
| 405 | 407 | */ |
| @@ -413,6 +415,7 @@ struct efx_ef10_nic_data { · 7 unmodified lines | ||
| 413 | 415 | u32 rx_rss_context; |
| 414 | 416 | u64 stats[EF10_STAT_COUNT]; |
| 415 | 417 | bool workaround_35388; |
| 418 | + bool must_check_datapath_caps; | |
| 416 | 419 | u32 datapath_caps; |
| 417 | 420 | }; |
| 418 | 421 | |
| @@ -271,7 +271,7 @@ static inline void mcf_outsw(void *a, unsigned char *p, int l) · 270 unmodified lines | ||
| 271 | 271 | #define SMC_insw(a, r, p, l) mcf_insw(a + r, p, l) |
| 272 | 272 | #define SMC_outsw(a, r, p, l) mcf_outsw(a + r, p, l) |
| 273 | 273 | |
| 274 | −#define SMC_IRQ_FLAGS (IRQF_DISABLED) | |
| 274 | +#define SMC_IRQ_FLAGS 0 | |
| 275 | 275 | |
| 276 | 276 | #else |
| 277 | 277 | |
| @@ -1356,8 +1356,7 @@ static int smsc9420_open(struct net_device *dev) · 1355 unmodified lines | ||
| 1356 | 1356 | smsc9420_reg_write(pd, INT_STAT, 0xFFFFFFFF); |
| 1357 | 1357 | smsc9420_pci_flush_write(pd); |
| 1358 | 1358 | |
| 1359 | − result = request_irq(irq, smsc9420_isr, IRQF_SHARED | IRQF_DISABLED, | |
| 1360 | − DRV_NAME, pd); | |
| 1359 | + result = request_irq(irq, smsc9420_isr, IRQF_SHARED, DRV_NAME, pd); | |
| 1361 | 1360 | if (result) { |
| 1362 | 1361 | smsc_warn(IFUP, "Unable to use IRQ = %d", irq); |
| 1363 | 1362 | result = -ENODEV; |
| @@ -1726,7 +1726,7 @@ static int ps3_gelic_driver_probe(struct ps3_system_bus_device *dev) · 1725 unmodified lines | ||
| 1726 | 1726 | goto fail_alloc_irq; |
| 1727 | 1727 | } |
| 1728 | 1728 | result = request_irq(card->irq, gelic_card_interrupt, |
| 1729 | − IRQF_DISABLED, netdev->name, card); | |
| 1729 | + 0, netdev->name, card); | |
| 1730 | 1730 | |
| 1731 | 1731 | if (result) { |
| 1732 | 1732 | dev_info(ctodev(card), "%s:request_irq failed (%d)\n", |
| @@ -32,7 +32,7 @@ · 31 unmodified lines | ||
| 32 | 32 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 33 | 33 | |
| 34 | 34 | #define DRV_NAME "via-rhine" |
| 35 | −#define DRV_VERSION "1.5.0" | |
| 35 | +#define DRV_VERSION "1.5.1" | |
| 36 | 36 | #define DRV_RELDATE "2010-10-09" |
| 37 | 37 | |
| 38 | 38 | #include <linux/types.h> |
| @@ -1704,7 +1704,12 @@ static netdev_tx_t rhine_start_tx(struct sk_buff *skb, · 1665 unmodified lines | ||
| 1704 | 1704 | cpu_to_le32(TXDESC | (skb->len >= ETH_ZLEN ? skb->len : ETH_ZLEN)); |
| 1705 | 1705 | |
| 1706 | 1706 | if (unlikely(vlan_tx_tag_present(skb))) { |
| 1707 | − rp->tx_ring[entry].tx_status = cpu_to_le32((vlan_tx_tag_get(skb)) << 16); | |
| 1707 | + u16 vid_pcp = vlan_tx_tag_get(skb); | |
| 1708 | + | |
| 1709 | + /* drop CFI/DEI bit, register needs VID and PCP */ | |
| 1710 | + vid_pcp = (vid_pcp & VLAN_VID_MASK) | | |
| 1711 | + ((vid_pcp & VLAN_PRIO_MASK) >> 1); | |
| 1712 | + rp->tx_ring[entry].tx_status = cpu_to_le32((vid_pcp) << 16); | |
| 1708 | 1713 | /* request tagging */ |
| 1709 | 1714 | rp->tx_ring[entry].desc_length |= cpu_to_le32(0x020000); |
| 1710 | 1715 | } |
| @@ -297,6 +297,12 @@ static int temac_dma_bd_init(struct net_device *ndev) · 296 unmodified lines | ||
| 297 | 297 | lp->rx_bd_p + (sizeof(*lp->rx_bd_v) * (RX_BD_NUM - 1))); |
| 298 | 298 | lp->dma_out(lp, TX_CURDESC_PTR, lp->tx_bd_p); |
| 299 | 299 | |
| 300 | + /* Init descriptor indexes */ | |
| 301 | + lp->tx_bd_ci = 0; | |
| 302 | + lp->tx_bd_next = 0; | |
| 303 | + lp->tx_bd_tail = 0; | |
| 304 | + lp->rx_bd_ci = 0; | |
| 305 | + | |
| 300 | 306 | return 0; |
| 301 | 307 | |
| 302 | 308 | out: |
| @@ -191,8 +191,8 @@ static inline int mcs_setup_transceiver_vishay(struct mcs_cb *mcs) · 190 unmodified lines | ||
| 191 | 191 | goto error; |
| 192 | 192 | |
| 193 | 193 | ret = 0; |
| 194 | − error: | |
| 195 | − return ret; | |
| 194 | +error: | |
| 195 | + return ret; | |
| 196 | 196 | } |
| 197 | 197 | |
| 198 | 198 | /* Setup a communication between mcs7780 and agilent chip. */ |
| @@ -501,8 +501,11 @@ static inline int mcs_setup_urbs(struct mcs_cb *mcs) · 302 unmodified lines | ||
| 501 | 501 | return 0; |
| 502 | 502 | |
| 503 | 503 | mcs->rx_urb = usb_alloc_urb(0, GFP_KERNEL); |
| 504 | − if (!mcs->rx_urb) | |
| 504 | + if (!mcs->rx_urb) { | |
| 505 | + usb_free_urb(mcs->tx_urb); | |
| 506 | + mcs->tx_urb = NULL; | |
| 505 | 507 | return 0; |
| 508 | + } | |
| 506 | 509 | |
| 507 | 510 | return 1; |
| 508 | 511 | } |
| @@ -643,9 +646,9 @@ static int mcs_speed_change(struct mcs_cb *mcs) · 134 unmodified lines | ||
| 643 | 646 | ret = mcs_set_reg(mcs, MCS_MODE_REG, rval); |
| 644 | 647 | |
| 645 | 648 | mcs->speed = mcs->new_speed; |
| 646 | − error: | |
| 647 | − mcs->new_speed = 0; | |
| 648 | − return ret; | |
| 649 | +error: | |
| 650 | + mcs->new_speed = 0; | |
| 651 | + return ret; | |
| 649 | 652 | } |
| 650 | 653 | |
| 651 | 654 | /* Ioctl calls not supported at this time. Can be an area of future work. */ |
| @@ -738,17 +741,20 @@ static int mcs_net_open(struct net_device *netdev) · 86 unmodified lines | ||
| 738 | 741 | |
| 739 | 742 | ret = mcs_receive_start(mcs); |
| 740 | 743 | if (ret) |
| 741 | − goto error3; | |
| 744 | + goto error4; | |
| 742 | 745 | |
| 743 | 746 | netif_start_queue(netdev); |
| 744 | 747 | return 0; |
| 745 | 748 | |
| 746 | − error3: | |
| 747 | − irlap_close(mcs->irlap); | |
| 748 | − error2: | |
| 749 | − kfree_skb(mcs->rx_buff.skb); | |
| 750 | − error1: | |
| 751 | − return ret; | |
| 749 | +error4: | |
| 750 | + usb_free_urb(mcs->rx_urb); | |
| 751 | + usb_free_urb(mcs->tx_urb); | |
| 752 | +error3: | |
| 753 | + irlap_close(mcs->irlap); | |
| 754 | +error2: | |
| 755 | + kfree_skb(mcs->rx_buff.skb); | |
| 756 | +error1: | |
| 757 | + return ret; | |
| 752 | 758 | } |
| 753 | 759 | |
| 754 | 760 | /* Receive callback function. */ |
| @@ -946,11 +952,11 @@ static int mcs_probe(struct usb_interface *intf, · 191 unmodified lines | ||
| 946 | 952 | usb_set_intfdata(intf, mcs); |
| 947 | 953 | return 0; |
| 948 | 954 | |
| 949 | − error2: | |
| 950 | − free_netdev(ndev); | |
| 955 | +error2: | |
| 956 | + free_netdev(ndev); | |
| 951 | 957 | |
| 952 | − error1: | |
| 953 | − return ret; | |
| 958 | +error1: | |
| 959 | + return ret; | |
| 954 | 960 | } |
| 955 | 961 | |
| 956 | 962 | /* The current device is removed, the USB layer tells us to shut down. */ |
| @@ -146,6 +146,7 @@ static int loopback_dev_init(struct net_device *dev) · 145 unmodified lines | ||
| 146 | 146 | |
| 147 | 147 | static void loopback_dev_free(struct net_device *dev) |
| 148 | 148 | { |
| 149 | + dev_net(dev)->loopback_dev = NULL; | |
| 149 | 150 | free_percpu(dev->lstats); |
| 150 | 151 | free_netdev(dev); |
| 151 | 152 | } |
| @@ -684,15 +684,12 @@ restart: · 683 unmodified lines | ||
| 684 | 684 | case NETDEV_RELEASE: |
| 685 | 685 | case NETDEV_JOIN: |
| 686 | 686 | case NETDEV_UNREGISTER: |
| 687 | − /* | |
| 688 | − * rtnl_lock already held | |
| 687 | + /* rtnl_lock already held | |
| 689 | 688 | * we might sleep in __netpoll_cleanup() |
| 690 | 689 | */ |
| 691 | 690 | spin_unlock_irqrestore(&target_list_lock, flags); |
| 692 | 691 | |
| 693 | − mutex_lock(&nt->mutex); | |
| 694 | 692 | __netpoll_cleanup(&nt->np); |
| 695 | − mutex_unlock(&nt->mutex); | |
| 696 | 693 | |
| 697 | 694 | spin_lock_irqsave(&target_list_lock, flags); |
| 698 | 695 | dev_put(nt->np.dev); |
| @@ -30,9 +30,9 @@ · 29 unmodified lines | ||
| 30 | 30 | #include <linux/ethtool.h> |
| 31 | 31 | #include <linux/phy.h> |
| 32 | 32 | |
| 33 | −#include <asm/io.h> | |
| 33 | +#include <linux/io.h> | |
| 34 | 34 | #include <asm/irq.h> |
| 35 | −#include <asm/uaccess.h> | |
| 35 | +#include <linux/uaccess.h> | |
| 36 | 36 | |
| 37 | 37 | /* Cicada Extended Control Register 1 */ |
| 38 | 38 | #define MII_CIS8201_EXT_CON1 0x17 |
| @@ -281,7 +281,7 @@ static int pptp_xmit(struct ppp_channel *chan, struct sk_buff *skb) · 280 unmodified lines | ||
| 281 | 281 | nf_reset(skb); |
| 282 | 282 | |
| 283 | 283 | skb->ip_summed = CHECKSUM_NONE; |
| 284 | − ip_select_ident(iph, &rt->dst, NULL); | |
| 284 | + ip_select_ident(skb, &rt->dst, NULL); | |
| 285 | 285 | ip_send_check(iph); |
| 286 | 286 | |
| 287 | 287 | ip_local_out(skb); |
| @@ -429,11 +429,13 @@ static void slip_write_wakeup(struct tty_struct *tty) · 428 unmodified lines | ||
| 429 | 429 | if (!sl || sl->magic != SLIP_MAGIC || !netif_running(sl->dev)) |
| 430 | 430 | return; |
| 431 | 431 | |
| 432 | + spin_lock(&sl->lock); | |
| 432 | 433 | if (sl->xleft <= 0) { |
| 433 | 434 | /* Now serial buffer is almost free & we can start |
| 434 | 435 | * transmission of another packet */ |
| 435 | 436 | sl->dev->stats.tx_packets++; |
| 436 | 437 | clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags); |
| 438 | + spin_unlock(&sl->lock); | |
| 437 | 439 | sl_unlock(sl); |
| 438 | 440 | return; |
| 439 | 441 | } |
| @@ -441,6 +443,7 @@ static void slip_write_wakeup(struct tty_struct *tty) · 1 unmodified line | ||
| 441 | 443 | actual = tty->ops->write(tty, sl->xhead, sl->xleft); |
| 442 | 444 | sl->xleft -= actual; |
| 443 | 445 | sl->xhead += actual; |
| 446 | + spin_unlock(&sl->lock); | |
| 444 | 447 | } |
| 445 | 448 | |
| 446 | 449 | static void sl_tx_timeout(struct net_device *dev) |
| @@ -1641,11 +1641,11 @@ static int tun_set_iff(struct net *net, struct file *file, struct ifreq *ifr) · 1640 unmodified lines | ||
| 1641 | 1641 | INIT_LIST_HEAD(&tun->disabled); |
| 1642 | 1642 | err = tun_attach(tun, file, false); |
| 1643 | 1643 | if (err < 0) |
| 1644 | − goto err_free_dev; | |
| 1644 | + goto err_free_flow; | |
| 1645 | 1645 | |
| 1646 | 1646 | err = register_netdevice(tun->dev); |
| 1647 | 1647 | if (err < 0) |
| 1648 | − goto err_free_dev; | |
| 1648 | + goto err_detach; | |
| 1649 | 1649 | |
| 1650 | 1650 | if (device_create_file(&tun->dev->dev, &dev_attr_tun_flags) || |
| 1651 | 1651 | device_create_file(&tun->dev->dev, &dev_attr_owner) || |
| @@ -1689,7 +1689,12 @@ static int tun_set_iff(struct net *net, struct file *file, struct ifreq *ifr) · 37 unmodified lines | ||
| 1689 | 1689 | strcpy(ifr->ifr_name, tun->dev->name); |
| 1690 | 1690 | return 0; |
| 1691 | 1691 | |
| 1692 | − err_free_dev: | |
| 1692 | +err_detach: | |
| 1693 | + tun_detach_all(dev); | |
| 1694 | +err_free_flow: | |
| 1695 | + tun_flow_uninit(tun); | |
| 1696 | + security_tun_dev_free_security(tun->security); | |
| 1697 | +err_free_dev: | |
| 1693 | 1698 | free_netdev(dev); |
| 1694 | 1699 | return err; |
| 1695 | 1700 | } |
| @@ -33,7 +33,7 @@ · 32 unmodified lines | ||
| 33 | 33 | #include <linux/usb/usbnet.h> |
| 34 | 34 | |
| 35 | 35 | |
| 36 | −#if defined(CONFIG_USB_NET_RNDIS_HOST) || defined(CONFIG_USB_NET_RNDIS_HOST_MODULE) | |
| 36 | +#if IS_ENABLED(CONFIG_USB_NET_RNDIS_HOST) | |
| 37 | 37 | |
| 38 | 38 | static int is_rndis(struct usb_interface_descriptor *desc) |
| 39 | 39 | { |
| @@ -69,8 +69,7 @@ static const u8 mbm_guid[16] = { · 29 unmodified lines | ||
| 69 | 69 | 0xa6, 0x07, 0xc0, 0xff, 0xcb, 0x7e, 0x39, 0x2a, |
| 70 | 70 | }; |
| 71 | 71 | |
| 72 | −/* | |
| 73 | − * probes control interface, claims data interface, collects the bulk | |
| 72 | +/* probes control interface, claims data interface, collects the bulk | |
| 74 | 73 | * endpoints, activates data interface (if needed), maybe sets MTU. |
| 75 | 74 | * all pure cdc, except for certain firmware workarounds, and knowing |
| 76 | 75 | * that rndis uses one different rule. |
| @@ -88,7 +87,7 @@ int usbnet_generic_cdc_bind(struct usbnet *dev, struct usb_interface *intf) · 11 unmodified lines | ||
| 88 | 87 | struct usb_cdc_mdlm_desc *desc = NULL; |
| 89 | 88 | struct usb_cdc_mdlm_detail_desc *detail = NULL; |
| 90 | 89 | |
| 91 | − if (sizeof dev->data < sizeof *info) | |
| 90 | + if (sizeof(dev->data) < sizeof(*info)) | |
| 92 | 91 | return -EDOM; |
| 93 | 92 | |
| 94 | 93 | /* expect strict spec conformance for the descriptors, but |
| @@ -126,10 +125,10 @@ int usbnet_generic_cdc_bind(struct usbnet *dev, struct usb_interface *intf) · 31 unmodified lines | ||
| 126 | 125 | is_activesync(&intf->cur_altsetting->desc) || |
| 127 | 126 | is_wireless_rndis(&intf->cur_altsetting->desc)); |
| 128 | 127 | |
| 129 | − memset(info, 0, sizeof *info); | |
| 128 | + memset(info, 0, sizeof(*info)); | |
| 130 | 129 | info->control = intf; |
| 131 | 130 | while (len > 3) { |
| 132 | − if (buf [1] != USB_DT_CS_INTERFACE) | |
| 131 | + if (buf[1] != USB_DT_CS_INTERFACE) | |
| 133 | 132 | goto next_desc; |
| 134 | 133 | |
| 135 | 134 | /* use bDescriptorSubType to identify the CDC descriptors. |
| @@ -139,14 +138,14 @@ int usbnet_generic_cdc_bind(struct usbnet *dev, struct usb_interface *intf) · 3 unmodified lines | ||
| 139 | 138 | * in favor of a complicated OID-based RPC scheme doing what |
| 140 | 139 | * CDC Ethernet achieves with a simple descriptor. |
| 141 | 140 | */ |
| 142 | − switch (buf [2]) { | |
| 141 | + switch (buf[2]) { | |
| 143 | 142 | case USB_CDC_HEADER_TYPE: |
| 144 | 143 | if (info->header) { |
| 145 | 144 | dev_dbg(&intf->dev, "extra CDC header\n"); |
| 146 | 145 | goto bad_desc; |
| 147 | 146 | } |
| 148 | 147 | info->header = (void *) buf; |
| 149 | − if (info->header->bLength != sizeof *info->header) { | |
| 148 | + if (info->header->bLength != sizeof(*info->header)) { | |
| 150 | 149 | dev_dbg(&intf->dev, "CDC header len %u\n", |
| 151 | 150 | info->header->bLength); |
| 152 | 151 | goto bad_desc; |
| @@ -175,7 +174,7 @@ int usbnet_generic_cdc_bind(struct usbnet *dev, struct usb_interface *intf) · 22 unmodified lines | ||
| 175 | 174 | goto bad_desc; |
| 176 | 175 | } |
| 177 | 176 | info->u = (void *) buf; |
| 178 | − if (info->u->bLength != sizeof *info->u) { | |
| 177 | + if (info->u->bLength != sizeof(*info->u)) { | |
| 179 | 178 | dev_dbg(&intf->dev, "CDC union len %u\n", |
| 180 | 179 | info->u->bLength); |
| 181 | 180 | goto bad_desc; |
| @@ -233,7 +232,7 @@ int usbnet_generic_cdc_bind(struct usbnet *dev, struct usb_interface *intf) · 51 unmodified lines | ||
| 233 | 232 | goto bad_desc; |
| 234 | 233 | } |
| 235 | 234 | info->ether = (void *) buf; |
| 236 | − if (info->ether->bLength != sizeof *info->ether) { | |
| 235 | + if (info->ether->bLength != sizeof(*info->ether)) { | |
| 237 | 236 | dev_dbg(&intf->dev, "CDC ether len %u\n", |
| 238 | 237 | info->ether->bLength); |
| 239 | 238 | goto bad_desc; |
| @@ -274,8 +273,8 @@ int usbnet_generic_cdc_bind(struct usbnet *dev, struct usb_interface *intf) · 34 unmodified lines | ||
| 274 | 273 | break; |
| 275 | 274 | } |
| 276 | 275 | next_desc: |
| 277 | − len -= buf [0]; /* bLength */ | |
| 278 | − buf += buf [0]; | |
| 276 | + len -= buf[0]; /* bLength */ | |
| 277 | + buf += buf[0]; | |
| 279 | 278 | } |
| 280 | 279 | |
| 281 | 280 | /* Microsoft ActiveSync based and some regular RNDIS devices lack the |
| @@ -379,9 +378,7 @@ void usbnet_cdc_unbind(struct usbnet *dev, struct usb_interface *intf) · 97 unmodified lines | ||
| 379 | 378 | } |
| 380 | 379 | EXPORT_SYMBOL_GPL(usbnet_cdc_unbind); |
| 381 | 380 | |
| 382 | −/*------------------------------------------------------------------------- | |
| 383 | − * | |
| 384 | − * Communications Device Class, Ethernet Control model | |
| 381 | +/* Communications Device Class, Ethernet Control model | |
| 385 | 382 | * |
| 386 | 383 | * Takes two interfaces. The DATA interface is inactive till an altsetting |
| 387 | 384 | * is selected. Configuration data includes class descriptors. There's |
| @@ -389,8 +386,7 @@ EXPORT_SYMBOL_GPL(usbnet_cdc_unbind); · 1 unmodified line | ||
| 389 | 386 | * |
| 390 | 387 | * This should interop with whatever the 2.4 "CDCEther.c" driver |
| 391 | 388 | * (by Brad Hards) talked with, with more functionality. |
| 392 | − * | |
| 393 | − *-------------------------------------------------------------------------*/ | |
| 389 | + */ | |
| 394 | 390 | |
| 395 | 391 | static void dumpspeed(struct usbnet *dev, __le32 *speeds) |
| 396 | 392 | { |
| @@ -404,7 +400,7 @@ void usbnet_cdc_status(struct usbnet *dev, struct urb *urb) · 7 unmodified lines | ||
| 404 | 400 | { |
| 405 | 401 | struct usb_cdc_notification *event; |
| 406 | 402 | |
| 407 | − if (urb->actual_length < sizeof *event) | |
| 403 | + if (urb->actual_length < sizeof(*event)) | |
| 408 | 404 | return; |
| 409 | 405 | |
| 410 | 406 | /* SPEED_CHANGE can get split into two 8-byte packets */ |
| @@ -423,7 +419,7 @@ void usbnet_cdc_status(struct usbnet *dev, struct urb *urb) · 12 unmodified lines | ||
| 423 | 419 | case USB_CDC_NOTIFY_SPEED_CHANGE: /* tx/rx rates */ |
| 424 | 420 | netif_dbg(dev, timer, dev->net, "CDC: speed change (len %d)\n", |
| 425 | 421 | urb->actual_length); |
| 426 | − if (urb->actual_length != (sizeof *event + 8)) | |
| 422 | + if (urb->actual_length != (sizeof(*event) + 8)) | |
| 427 | 423 | set_bit(EVENT_STS_SPLIT, &dev->flags); |
| 428 | 424 | else |
| 429 | 425 | dumpspeed(dev, (__le32 *) &event[1]); |
| @@ -469,7 +465,6 @@ EXPORT_SYMBOL_GPL(usbnet_cdc_bind); · 39 unmodified lines | ||
| 469 | 465 | static const struct driver_info cdc_info = { |
| 470 | 466 | .description = "CDC Ethernet Device", |
| 471 | 467 | .flags = FLAG_ETHER | FLAG_POINTTOPOINT, |
| 472 | − // .check_connect = cdc_check_connect, | |
| 473 | 468 | .bind = usbnet_cdc_bind, |
| 474 | 469 | .unbind = usbnet_cdc_unbind, |
| 475 | 470 | .status = usbnet_cdc_status, |
| @@ -493,9 +488,8 @@ static const struct driver_info wwan_info = { · 17 unmodified lines | ||
| 493 | 488 | #define DELL_VENDOR_ID 0x413C |
| 494 | 489 | #define REALTEK_VENDOR_ID 0x0bda |
| 495 | 490 | |
| 496 | −static const struct usb_device_id products [] = { | |
| 497 | −/* | |
| 498 | − * BLACKLIST !! | |
| 491 | +static const struct usb_device_id products[] = { | |
| 492 | +/* BLACKLIST !! | |
| 499 | 493 | * |
| 500 | 494 | * First blacklist any products that are egregiously nonconformant |
| 501 | 495 | * with the CDC Ethernet specs. Minor braindamage we cope with; when |
| @@ -542,7 +536,7 @@ static const struct usb_device_id products [] = { · 40 unmodified lines | ||
| 542 | 536 | .driver_info = 0, |
| 543 | 537 | }, { |
| 544 | 538 | .match_flags = USB_DEVICE_ID_MATCH_INT_INFO |
| 545 | − | USB_DEVICE_ID_MATCH_DEVICE, | |
| 539 | + | USB_DEVICE_ID_MATCH_DEVICE, | |
| 546 | 540 | .idVendor = 0x04DD, |
| 547 | 541 | .idProduct = 0x8007, /* C-700 */ |
| 548 | 542 | ZAURUS_MASTER_INTERFACE, |
| @@ -659,8 +653,7 @@ static const struct usb_device_id products [] = { · 110 unmodified lines | ||
| 659 | 653 | .driver_info = 0, |
| 660 | 654 | }, |
| 661 | 655 | |
| 662 | −/* | |
| 663 | − * WHITELIST!!! | |
| 656 | +/* WHITELIST!!! | |
| 664 | 657 | * |
| 665 | 658 | * CDC Ether uses two interfaces, not necessarily consecutive. |
| 666 | 659 | * We match the main interface, ignoring the optional device |
| @@ -672,59 +665,39 @@ static const struct usb_device_id products [] = { · 5 unmodified lines | ||
| 672 | 665 | */ |
| 673 | 666 | { |
| 674 | 667 | /* ZTE (Vodafone) K3805-Z */ |
| 675 | − .match_flags = USB_DEVICE_ID_MATCH_VENDOR | |
| 676 | − | USB_DEVICE_ID_MATCH_PRODUCT | |
| 677 | − | USB_DEVICE_ID_MATCH_INT_INFO, | |
| 678 | − .idVendor = ZTE_VENDOR_ID, | |
| 679 | − .idProduct = 0x1003, | |
| 680 | − .bInterfaceClass = USB_CLASS_COMM, | |
| 681 | − .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, | |
| 682 | − .bInterfaceProtocol = USB_CDC_PROTO_NONE, | |
| 668 | + USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1003, USB_CLASS_COMM, | |
| 669 | + USB_CDC_SUBCLASS_ETHERNET, | |
| 670 | + USB_CDC_PROTO_NONE), | |
| 683 | 671 | .driver_info = (unsigned long)&wwan_info, |
| 684 | 672 | }, { |
| 685 | 673 | /* ZTE (Vodafone) K3806-Z */ |
| 686 | − .match_flags = USB_DEVICE_ID_MATCH_VENDOR | |
| 687 | − | USB_DEVICE_ID_MATCH_PRODUCT | |
| 688 | − | USB_DEVICE_ID_MATCH_INT_INFO, | |
| 689 | − .idVendor = ZTE_VENDOR_ID, | |
| 690 | − .idProduct = 0x1015, | |
| 691 | − .bInterfaceClass = USB_CLASS_COMM, | |
| 692 | − .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, | |
| 693 | − .bInterfaceProtocol = USB_CDC_PROTO_NONE, | |
| 674 | + USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1015, USB_CLASS_COMM, | |
| 675 | + USB_CDC_SUBCLASS_ETHERNET, | |
| 676 | + USB_CDC_PROTO_NONE), | |
| 694 | 677 | .driver_info = (unsigned long)&wwan_info, |
| 695 | 678 | }, { |
| 696 | 679 | /* ZTE (Vodafone) K4510-Z */ |
| 697 | − .match_flags = USB_DEVICE_ID_MATCH_VENDOR | |
| 698 | − | USB_DEVICE_ID_MATCH_PRODUCT | |
| 699 | − | USB_DEVICE_ID_MATCH_INT_INFO, | |
| 700 | − .idVendor = ZTE_VENDOR_ID, | |
| 701 | − .idProduct = 0x1173, | |
| 702 | − .bInterfaceClass = USB_CLASS_COMM, | |
| 703 | − .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, | |
| 704 | − .bInterfaceProtocol = USB_CDC_PROTO_NONE, | |
| 680 | + USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1173, USB_CLASS_COMM, | |
| 681 | + USB_CDC_SUBCLASS_ETHERNET, | |
| 682 | + USB_CDC_PROTO_NONE), | |
| 705 | 683 | .driver_info = (unsigned long)&wwan_info, |
| 706 | 684 | }, { |
| 707 | 685 | /* ZTE (Vodafone) K3770-Z */ |
| 708 | − .match_flags = USB_DEVICE_ID_MATCH_VENDOR | |
| 709 | − | USB_DEVICE_ID_MATCH_PRODUCT | |
| 710 | − | USB_DEVICE_ID_MATCH_INT_INFO, | |
| 711 | − .idVendor = ZTE_VENDOR_ID, | |
| 712 | − .idProduct = 0x1177, | |
| 713 | − .bInterfaceClass = USB_CLASS_COMM, | |
| 714 | − .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, | |
| 715 | − .bInterfaceProtocol = USB_CDC_PROTO_NONE, | |
| 686 | + USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1177, USB_CLASS_COMM, | |
| 687 | + USB_CDC_SUBCLASS_ETHERNET, | |
| 688 | + USB_CDC_PROTO_NONE), | |
| 716 | 689 | .driver_info = (unsigned long)&wwan_info, |
| 717 | 690 | }, { |
| 718 | 691 | /* ZTE (Vodafone) K3772-Z */ |
| 719 | − .match_flags = USB_DEVICE_ID_MATCH_VENDOR | |
| 720 | − | USB_DEVICE_ID_MATCH_PRODUCT | |
| 721 | − | USB_DEVICE_ID_MATCH_INT_INFO, | |
| 722 | − .idVendor = ZTE_VENDOR_ID, | |
| 723 | − .idProduct = 0x1181, | |
| 724 | − .bInterfaceClass = USB_CLASS_COMM, | |
| 725 | − .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, | |
| 726 | − .bInterfaceProtocol = USB_CDC_PROTO_NONE, | |
| 692 | + USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1181, USB_CLASS_COMM, | |
| 693 | + USB_CDC_SUBCLASS_ETHERNET, | |
| 694 | + USB_CDC_PROTO_NONE), | |
| 727 | 695 | .driver_info = (unsigned long)&wwan_info, |
| 696 | +}, { | |
| 697 | + /* Telit modules */ | |
| 698 | + USB_VENDOR_AND_INTERFACE_INFO(0x1bc7, USB_CLASS_COMM, | |
| 699 | + USB_CDC_SUBCLASS_ETHERNET, USB_CDC_PROTO_NONE), | |
| 700 | + .driver_info = (kernel_ulong_t) &wwan_info, | |
| 728 | 701 | }, { |
| 729 | 702 | USB_INTERFACE_INFO(USB_CLASS_COMM, USB_CDC_SUBCLASS_ETHERNET, |
| 730 | 703 | USB_CDC_PROTO_NONE), |
| @@ -736,15 +709,11 @@ static const struct usb_device_id products [] = { · 5 unmodified lines | ||
| 736 | 709 | |
| 737 | 710 | }, { |
| 738 | 711 | /* Various Huawei modems with a network port like the UMG1831 */ |
| 739 | − .match_flags = USB_DEVICE_ID_MATCH_VENDOR | |
| 740 | − | USB_DEVICE_ID_MATCH_INT_INFO, | |
| 741 | − .idVendor = HUAWEI_VENDOR_ID, | |
| 742 | − .bInterfaceClass = USB_CLASS_COMM, | |
| 743 | − .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, | |
| 744 | − .bInterfaceProtocol = 255, | |
| 712 | + USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, USB_CLASS_COMM, | |
| 713 | + USB_CDC_SUBCLASS_ETHERNET, 255), | |
| 745 | 714 | .driver_info = (unsigned long)&wwan_info, |
| 746 | 715 | }, |
| 747 | − { }, // END | |
| 716 | + { }, /* END */ | |
| 748 | 717 | }; |
| 749 | 718 | MODULE_DEVICE_TABLE(usb, products); |
| 750 | 719 | |
| @@ -303,7 +303,7 @@ static void dm9601_set_multicast(struct net_device *net) · 302 unmodified lines | ||
| 303 | 303 | rx_ctl |= 0x02; |
| 304 | 304 | } else if (net->flags & IFF_ALLMULTI || |
| 305 | 305 | netdev_mc_count(net) > DM_MAX_MCAST) { |
| 306 | − rx_ctl |= 0x04; | |
| 306 | + rx_ctl |= 0x08; | |
| 307 | 307 | } else if (!netdev_mc_empty(net)) { |
| 308 | 308 | struct netdev_hw_addr *ha; |
| 309 | 309 | |
| @@ -714,7 +714,7 @@ static const struct usb_device_id products[] = { · 713 unmodified lines | ||
| 714 | 714 | {QMI_FIXED_INTF(0x2357, 0x0201, 4)}, /* TP-LINK HSUPA Modem MA180 */ |
| 715 | 715 | {QMI_FIXED_INTF(0x2357, 0x9000, 4)}, /* TP-LINK MA260 */ |
| 716 | 716 | {QMI_FIXED_INTF(0x1bc7, 0x1200, 5)}, /* Telit LE920 */ |
| 717 | − {QMI_FIXED_INTF(0x1e2d, 0x12d1, 4)}, /* Cinterion PLxx */ | |
| 717 | + {QMI_FIXED_INTF(0x1e2d, 0x0060, 4)}, /* Cinterion PLxx */ | |
| 718 | 718 | |
| 719 | 719 | /* 4. Gobi 1000 devices */ |
| 720 | 720 | {QMI_GOBI1K_DEVICE(0x05c6, 0x9212)}, /* Acer Gobi Modem Device */ |
| @@ -1241,7 +1241,9 @@ static int build_dma_sg(const struct sk_buff *skb, struct urb *urb) · 1240 unmodified lines | ||
| 1241 | 1241 | if (num_sgs == 1) |
| 1242 | 1242 | return 0; |
| 1243 | 1243 | |
| 1244 | − urb->sg = kmalloc(num_sgs * sizeof(struct scatterlist), GFP_ATOMIC); | |
| 1244 | + /* reserve one for zero packet */ | |
| 1245 | + urb->sg = kmalloc((num_sgs + 1) * sizeof(struct scatterlist), | |
| 1246 | + GFP_ATOMIC); | |
| 1245 | 1247 | if (!urb->sg) |
| 1246 | 1248 | return -ENOMEM; |
| 1247 | 1249 | |
| @@ -1305,7 +1307,7 @@ netdev_tx_t usbnet_start_xmit (struct sk_buff *skb, · 57 unmodified lines | ||
| 1305 | 1307 | if (build_dma_sg(skb, urb) < 0) |
| 1306 | 1308 | goto drop; |
| 1307 | 1309 | } |
| 1308 | − entry->length = length = urb->transfer_buffer_length; | |
| 1310 | + length = urb->transfer_buffer_length; | |
| 1309 | 1311 | |
| 1310 | 1312 | /* don't assume the hardware handles USB_ZERO_PACKET |
| 1311 | 1313 | * NOTE: strictly conforming cdc-ether devices should expect |
| @@ -1317,15 +1319,18 @@ netdev_tx_t usbnet_start_xmit (struct sk_buff *skb, · 5 unmodified lines | ||
| 1317 | 1319 | if (length % dev->maxpacket == 0) { |
| 1318 | 1320 | if (!(info->flags & FLAG_SEND_ZLP)) { |
| 1319 | 1321 | if (!(info->flags & FLAG_MULTI_PACKET)) { |
| 1320 | − urb->transfer_buffer_length++; | |
| 1321 | − if (skb_tailroom(skb)) { | |
| 1322 | + length++; | |
| 1323 | + if (skb_tailroom(skb) && !urb->num_sgs) { | |
| 1322 | 1324 | skb->data[skb->len] = 0; |
| 1323 | 1325 | __skb_put(skb, 1); |
| 1324 | − } | |
| 1326 | + } else if (urb->num_sgs) | |
| 1327 | + sg_set_buf(&urb->sg[urb->num_sgs++], | |
| 1328 | + dev->padding_pkt, 1); | |
| 1325 | 1329 | } |
| 1326 | 1330 | } else |
| 1327 | 1331 | urb->transfer_flags |= URB_ZERO_PACKET; |
| 1328 | 1332 | } |
| 1333 | + entry->length = urb->transfer_buffer_length = length; | |
| 1329 | 1334 | |
| 1330 | 1335 | spin_lock_irqsave(&dev->txq.lock, flags); |
| 1331 | 1336 | retval = usb_autopm_get_interface_async(dev->intf); |
| @@ -1509,6 +1514,7 @@ void usbnet_disconnect (struct usb_interface *intf) · 177 unmodified lines | ||
| 1509 | 1514 | |
| 1510 | 1515 | usb_kill_urb(dev->interrupt); |
| 1511 | 1516 | usb_free_urb(dev->interrupt); |
| 1517 | + kfree(dev->padding_pkt); | |
| 1512 | 1518 | |
| 1513 | 1519 | free_netdev(net); |
| 1514 | 1520 | } |
| @@ -1679,9 +1685,16 @@ usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod) · 164 unmodified lines | ||
| 1679 | 1685 | /* initialize max rx_qlen and tx_qlen */ |
| 1680 | 1686 | usbnet_update_max_qlen(dev); |
| 1681 | 1687 | |
| 1688 | + if (dev->can_dma_sg && !(info->flags & FLAG_SEND_ZLP) && | |
| 1689 | + !(info->flags & FLAG_MULTI_PACKET)) { | |
| 1690 | + dev->padding_pkt = kzalloc(1, GFP_KERNEL); | |
| 1691 | + if (!dev->padding_pkt) | |
| 1692 | + goto out4; | |
| 1693 | + } | |
| 1694 | + | |
| 1682 | 1695 | status = register_netdev (net); |
| 1683 | 1696 | if (status) |
| 1684 | − goto out4; | |
| 1697 | + goto out5; | |
| 1685 | 1698 | netif_info(dev, probe, dev->net, |
| 1686 | 1699 | "register '%s' at usb-%s-%s, %s, %pM\n", |
| 1687 | 1700 | udev->dev.driver->name, |
| @@ -1699,6 +1712,8 @@ usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod) · 11 unmodified lines | ||
| 1699 | 1712 | |
| 1700 | 1713 | return 0; |
| 1701 | 1714 | |
| 1715 | +out5: | |
| 1716 | + kfree(dev->padding_pkt); | |
| 1702 | 1717 | out4: |
| 1703 | 1718 | usb_free_urb(dev->interrupt); |
| 1704 | 1719 | out3: |
| @@ -564,7 +564,7 @@ static void vxlan_notify_add_rx_port(struct sock *sk) · 563 unmodified lines | ||
| 564 | 564 | struct net_device *dev; |
| 565 | 565 | struct net *net = sock_net(sk); |
| 566 | 566 | sa_family_t sa_family = sk->sk_family; |
| 567 | − u16 port = htons(inet_sk(sk)->inet_sport); | |
| 567 | + __be16 port = inet_sk(sk)->inet_sport; | |
| 568 | 568 | |
| 569 | 569 | rcu_read_lock(); |
| 570 | 570 | for_each_netdev_rcu(net, dev) { |
| @@ -581,7 +581,7 @@ static void vxlan_notify_del_rx_port(struct sock *sk) · 10 unmodified lines | ||
| 581 | 581 | struct net_device *dev; |
| 582 | 582 | struct net *net = sock_net(sk); |
| 583 | 583 | sa_family_t sa_family = sk->sk_family; |
| 584 | − u16 port = htons(inet_sk(sk)->inet_sport); | |
| 584 | + __be16 port = inet_sk(sk)->inet_sport; | |
| 585 | 585 | |
| 586 | 586 | rcu_read_lock(); |
| 587 | 587 | for_each_netdev_rcu(net, dev) { |
| @@ -952,8 +952,7 @@ void vxlan_sock_release(struct vxlan_sock *vs) · 364 unmodified lines | ||
| 952 | 952 | |
| 953 | 953 | spin_lock(&vn->sock_lock); |
| 954 | 954 | hlist_del_rcu(&vs->hlist); |
| 955 | − smp_wmb(); | |
| 956 | − vs->sock->sk->sk_user_data = NULL; | |
| 955 | + rcu_assign_sk_user_data(vs->sock->sk, NULL); | |
| 957 | 956 | vxlan_notify_del_rx_port(sk); |
| 958 | 957 | spin_unlock(&vn->sock_lock); |
| 959 | 958 | |
| @@ -1048,8 +1047,7 @@ static int vxlan_udp_encap_recv(struct sock *sk, struct sk_buff *skb) · 88 unmodified lines | ||
| 1048 | 1047 | |
| 1049 | 1048 | port = inet_sk(sk)->inet_sport; |
| 1050 | 1049 | |
| 1051 | − smp_read_barrier_depends(); | |
| 1052 | − vs = (struct vxlan_sock *)sk->sk_user_data; | |
| 1050 | + vs = rcu_dereference_sk_user_data(sk); | |
| 1053 | 1051 | if (!vs) |
| 1054 | 1052 | goto drop; |
| 1055 | 1053 | |
| @@ -2021,7 +2019,8 @@ static struct device_type vxlan_type = { · 965 unmodified lines | ||
| 2021 | 2019 | }; |
| 2022 | 2020 | |
| 2023 | 2021 | /* Calls the ndo_add_vxlan_port of the caller in order to |
| 2024 | − * supply the listening VXLAN udp ports. | |
| 2022 | + * supply the listening VXLAN udp ports. Callers are expected | |
| 2023 | + * to implement the ndo_add_vxlan_port. | |
| 2025 | 2024 | */ |
| 2026 | 2025 | void vxlan_get_rx_port(struct net_device *dev) |
| 2027 | 2026 | { |
| @@ -2029,16 +2028,13 @@ void vxlan_get_rx_port(struct net_device *dev) · 1 unmodified line | ||
| 2029 | 2028 | struct net *net = dev_net(dev); |
| 2030 | 2029 | struct vxlan_net *vn = net_generic(net, vxlan_net_id); |
| 2031 | 2030 | sa_family_t sa_family; |
| 2032 | − u16 port; | |
| 2033 | − int i; | |
| 2034 | − | |
| 2035 | − if (!dev || !dev->netdev_ops || !dev->netdev_ops->ndo_add_vxlan_port) | |
| 2036 | − return; | |
| 2031 | + __be16 port; | |
| 2032 | + unsigned int i; | |
| 2037 | 2033 | |
| 2038 | 2034 | spin_lock(&vn->sock_lock); |
| 2039 | 2035 | for (i = 0; i < PORT_HASH_SIZE; ++i) { |
| 2040 | − hlist_for_each_entry_rcu(vs, vs_head(net, i), hlist) { | |
| 2041 | − port = htons(inet_sk(vs->sock->sk)->inet_sport); | |
| 2036 | + hlist_for_each_entry_rcu(vs, &vn->sock_list[i], hlist) { | |
| 2037 | + port = inet_sk(vs->sock->sk)->inet_sport; | |
| 2042 | 2038 | sa_family = vs->sock->sk->sk_family; |
| 2043 | 2039 | dev->netdev_ops->ndo_add_vxlan_port(dev, sa_family, |
| 2044 | 2040 | port); |
| @@ -2304,8 +2300,7 @@ static struct vxlan_sock *vxlan_socket_create(struct net *net, __be16 port, · 259 unmodified lines | ||
| 2304 | 2300 | atomic_set(&vs->refcnt, 1); |
| 2305 | 2301 | vs->rcv = rcv; |
| 2306 | 2302 | vs->data = data; |
| 2307 | − smp_wmb(); | |
| 2308 | − vs->sock->sk->sk_user_data = vs; | |
| 2303 | + rcu_assign_sk_user_data(vs->sock->sk, vs); | |
| 2309 | 2304 | |
| 2310 | 2305 | spin_lock(&vn->sock_lock); |
| 2311 | 2306 | hlist_add_head_rcu(&vs->hlist, vs_head(net, port)); |
| @@ -2492,15 +2487,19 @@ static int vxlan_newlink(struct net *net, struct net_device *dev, · 180 unmodified lines | ||
| 2492 | 2487 | |
| 2493 | 2488 | SET_ETHTOOL_OPS(dev, &vxlan_ethtool_ops); |
| 2494 | 2489 | |
| 2495 | − /* create an fdb entry for default destination */ | |
| 2496 | − err = vxlan_fdb_create(vxlan, all_zeros_mac, | |
| 2497 | − &vxlan->default_dst.remote_ip, | |
| 2498 | − NUD_REACHABLE|NUD_PERMANENT, | |
| 2499 | − NLM_F_EXCL|NLM_F_CREATE, | |
| 2500 | − vxlan->dst_port, vxlan->default_dst.remote_vni, | |
| 2501 | − vxlan->default_dst.remote_ifindex, NTF_SELF); | |
| 2502 | − if (err) | |
| 2503 | − return err; | |
| 2490 | + /* create an fdb entry for a valid default destination */ | |
| 2491 | + if (!vxlan_addr_any(&vxlan->default_dst.remote_ip)) { | |
| 2492 | + err = vxlan_fdb_create(vxlan, all_zeros_mac, | |
| 2493 | + &vxlan->default_dst.remote_ip, | |
| 2494 | + NUD_REACHABLE|NUD_PERMANENT, | |
| 2495 | + NLM_F_EXCL|NLM_F_CREATE, | |
| 2496 | + vxlan->dst_port, | |
| 2497 | + vxlan->default_dst.remote_vni, | |
| 2498 | + vxlan->default_dst.remote_ifindex, | |
| 2499 | + NTF_SELF); | |
| 2500 | + if (err) | |
| 2501 | + return err; | |
| 2502 | + } | |
| 2504 | 2503 | |
| 2505 | 2504 | err = register_netdevice(dev); |
| 2506 | 2505 | if (err) { |
| @@ -1269,13 +1269,6 @@ static void ath9k_antenna_check(struct ath_softc *sc, · 1268 unmodified lines | ||
| 1269 | 1269 | if (!(ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)) |
| 1270 | 1270 | return; |
| 1271 | 1271 | |
| 1272 | − /* | |
| 1273 | − * All MPDUs in an aggregate will use the same LNA | |
| 1274 | − * as the first MPDU. | |
| 1275 | − */ | |
| 1276 | − if (rs->rs_isaggr && !rs->rs_firstaggr) | |
| 1277 | − return; | |
| 1278 | − | |
| 1279 | 1272 | /* |
| 1280 | 1273 | * Change the default rx antenna if rx diversity |
| 1281 | 1274 | * chooses the other antenna 3 times in a row. |
| @@ -399,6 +399,7 @@ static struct ath_buf* ath_clone_txbuf(struct ath_softc *sc, struct ath_buf *bf) · 398 unmodified lines | ||
| 399 | 399 | tbf->bf_buf_addr = bf->bf_buf_addr; |
| 400 | 400 | memcpy(tbf->bf_desc, bf->bf_desc, sc->sc_ah->caps.tx_desc_len); |
| 401 | 401 | tbf->bf_state = bf->bf_state; |
| 402 | + tbf->bf_state.stale = false; | |
| 402 | 403 | |
| 403 | 404 | return tbf; |
| 404 | 405 | } |
| @@ -1389,11 +1390,15 @@ int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta, · 984 unmodified lines | ||
| 1389 | 1390 | u16 tid, u16 *ssn) |
| 1390 | 1391 | { |
| 1391 | 1392 | struct ath_atx_tid *txtid; |
| 1393 | + struct ath_txq *txq; | |
| 1392 | 1394 | struct ath_node *an; |
| 1393 | 1395 | u8 density; |
| 1394 | 1396 | |
| 1395 | 1397 | an = (struct ath_node *)sta->drv_priv; |
| 1396 | 1398 | txtid = ATH_AN_2_TID(an, tid); |
| 1399 | + txq = txtid->ac->txq; | |
| 1400 | + | |
| 1401 | + ath_txq_lock(sc, txq); | |
| 1397 | 1402 | |
| 1398 | 1403 | /* update ampdu factor/density, they may have changed. This may happen |
| 1399 | 1404 | * in HT IBSS when a beacon with HT-info is received after the station |
| @@ -1417,6 +1422,8 @@ int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta, · 17 unmodified lines | ||
| 1417 | 1422 | memset(txtid->tx_buf, 0, sizeof(txtid->tx_buf)); |
| 1418 | 1423 | txtid->baw_head = txtid->baw_tail = 0; |
| 1419 | 1424 | |
| 1425 | + ath_txq_unlock_complete(sc, txq); | |
| 1426 | + | |
| 1420 | 1427 | return 0; |
| 1421 | 1428 | } |
| 1422 | 1429 | |
| @@ -1555,8 +1562,10 @@ void ath9k_release_buffered_frames(struct ieee80211_hw *hw, · 132 unmodified lines | ||
| 1555 | 1562 | __skb_unlink(bf->bf_mpdu, tid_q); |
| 1556 | 1563 | list_add_tail(&bf->list, &bf_q); |
| 1557 | 1564 | ath_set_rates(tid->an->vif, tid->an->sta, bf); |
| 1558 | − ath_tx_addto_baw(sc, tid, bf); | |
| 1559 | − bf->bf_state.bf_type &= ~BUF_AGGR; | |
| 1565 | + if (bf_isampdu(bf)) { | |
| 1566 | + ath_tx_addto_baw(sc, tid, bf); | |
| 1567 | + bf->bf_state.bf_type &= ~BUF_AGGR; | |
| 1568 | + } | |
| 1560 | 1569 | if (bf_tail) |
| 1561 | 1570 | bf_tail->bf_next = bf; |
| 1562 | 1571 | |
| @@ -1950,7 +1959,9 @@ static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq, · 387 unmodified lines | ||
| 1950 | 1959 | if (bf_is_ampdu_not_probing(bf)) |
| 1951 | 1960 | txq->axq_ampdu_depth++; |
| 1952 | 1961 | |
| 1953 | − bf = bf->bf_lastbf->bf_next; | |
| 1962 | + bf_last = bf->bf_lastbf; | |
| 1963 | + bf = bf_last->bf_next; | |
| 1964 | + bf_last->bf_next = NULL; | |
| 1954 | 1965 | } |
| 1955 | 1966 | } |
| 1956 | 1967 | } |
| @@ -28,7 +28,7 @@ config BRCMFMAC · 27 unmodified lines | ||
| 28 | 28 | |
| 29 | 29 | config BRCMFMAC_SDIO |
| 30 | 30 | bool "SDIO bus interface support for FullMAC driver" |
| 31 | − depends on MMC | |
| 31 | + depends on (MMC = y || MMC = BRCMFMAC) | |
| 32 | 32 | depends on BRCMFMAC |
| 33 | 33 | select FW_LOADER |
| 34 | 34 | default y |
| @@ -39,7 +39,7 @@ config BRCMFMAC_SDIO · 4 unmodified lines | ||
| 39 | 39 | |
| 40 | 40 | config BRCMFMAC_USB |
| 41 | 41 | bool "USB bus interface support for FullMAC driver" |
| 42 | − depends on USB | |
| 42 | + depends on (USB = y || USB = BRCMFMAC) | |
| 43 | 43 | depends on BRCMFMAC |
| 44 | 44 | select FW_LOADER |
| 45 | 45 | ---help--- |
| @@ -464,8 +464,6 @@ static struct sdio_driver brcmf_sdmmc_driver = { · 463 unmodified lines | ||
| 464 | 464 | |
| 465 | 465 | static int brcmf_sdio_pd_probe(struct platform_device *pdev) |
| 466 | 466 | { |
| 467 | − int ret; | |
| 468 | − | |
| 469 | 467 | brcmf_dbg(SDIO, "Enter\n"); |
| 470 | 468 | |
| 471 | 469 | brcmfmac_sdio_pdata = pdev->dev.platform_data; |
| @@ -473,11 +471,7 @@ static int brcmf_sdio_pd_probe(struct platform_device *pdev) · 1 unmodified line | ||
| 473 | 471 | if (brcmfmac_sdio_pdata->power_on) |
| 474 | 472 | brcmfmac_sdio_pdata->power_on(); |
| 475 | 473 | |
| 476 | − ret = sdio_register_driver(&brcmf_sdmmc_driver); | |
| 477 | − if (ret) | |
| 478 | − brcmf_err("sdio_register_driver failed: %d\n", ret); | |
| 479 | − | |
| 480 | − return ret; | |
| 474 | + return 0; | |
| 481 | 475 | } |
| 482 | 476 | |
| 483 | 477 | static int brcmf_sdio_pd_remove(struct platform_device *pdev) |
| @@ -500,6 +494,15 @@ static struct platform_driver brcmf_sdio_pd = { · 16 unmodified lines | ||
| 500 | 494 | } |
| 501 | 495 | }; |
| 502 | 496 | |
| 497 | +void brcmf_sdio_register(void) | |
| 498 | +{ | |
| 499 | + int ret; | |
| 500 | + | |
| 501 | + ret = sdio_register_driver(&brcmf_sdmmc_driver); | |
| 502 | + if (ret) | |
| 503 | + brcmf_err("sdio_register_driver failed: %d\n", ret); | |
| 504 | +} | |
| 505 | + | |
| 503 | 506 | void brcmf_sdio_exit(void) |
| 504 | 507 | { |
| 505 | 508 | brcmf_dbg(SDIO, "Enter\n"); |
| @@ -510,18 +513,13 @@ void brcmf_sdio_exit(void) · 4 unmodified lines | ||
| 510 | 513 | sdio_unregister_driver(&brcmf_sdmmc_driver); |
| 511 | 514 | } |
| 512 | 515 | |
| 513 | −void brcmf_sdio_init(void) | |
| 516 | +void __init brcmf_sdio_init(void) | |
| 514 | 517 | { |
| 515 | 518 | int ret; |
| 516 | 519 | |
| 517 | 520 | brcmf_dbg(SDIO, "Enter\n"); |
| 518 | 521 | |
| 519 | 522 | ret = platform_driver_probe(&brcmf_sdio_pd, brcmf_sdio_pd_probe); |
| 520 | − if (ret == -ENODEV) { | |
| 521 | − brcmf_dbg(SDIO, "No platform data available, registering without.\n"); | |
| 522 | − ret = sdio_register_driver(&brcmf_sdmmc_driver); | |
| 523 | − } | |
| 524 | − | |
| 525 | − if (ret) | |
| 526 | − brcmf_err("driver registration failed: %d\n", ret); | |
| 523 | + if (ret == -ENODEV) | |
| 524 | + brcmf_dbg(SDIO, "No platform data available.\n"); | |
| 527 | 525 | } |
| @@ -156,10 +156,11 @@ extern int brcmf_bus_start(struct device *dev); · 155 unmodified lines | ||
| 156 | 156 | #ifdef CONFIG_BRCMFMAC_SDIO |
| 157 | 157 | extern void brcmf_sdio_exit(void); |
| 158 | 158 | extern void brcmf_sdio_init(void); |
| 159 | +extern void brcmf_sdio_register(void); | |
| 159 | 160 | #endif |
| 160 | 161 | #ifdef CONFIG_BRCMFMAC_USB |
| 161 | 162 | extern void brcmf_usb_exit(void); |
| 162 | −extern void brcmf_usb_init(void); | |
| 163 | +extern void brcmf_usb_register(void); | |
| 163 | 164 | #endif |
| 164 | 165 | |
| 165 | 166 | #endif /* _BRCMF_BUS_H_ */ |
| @@ -1231,21 +1231,23 @@ u32 brcmf_get_chip_info(struct brcmf_if *ifp) · 1230 unmodified lines | ||
| 1231 | 1231 | return bus->chip << 4 | bus->chiprev; |
| 1232 | 1232 | } |
| 1233 | 1233 | |
| 1234 | −static void brcmf_driver_init(struct work_struct *work) | |
| 1234 | +static void brcmf_driver_register(struct work_struct *work) | |
| 1235 | 1235 | { |
| 1236 | − brcmf_debugfs_init(); | |
| 1237 | − | |
| 1238 | 1236 | #ifdef CONFIG_BRCMFMAC_SDIO |
| 1239 | − brcmf_sdio_init(); | |
| 1237 | + brcmf_sdio_register(); | |
| 1240 | 1238 | #endif |
| 1241 | 1239 | #ifdef CONFIG_BRCMFMAC_USB |
| 1242 | − brcmf_usb_init(); | |
| 1240 | + brcmf_usb_register(); | |
| 1243 | 1241 | #endif |
| 1244 | 1242 | } |
| 1245 | −static DECLARE_WORK(brcmf_driver_work, brcmf_driver_init); | |
| 1243 | +static DECLARE_WORK(brcmf_driver_work, brcmf_driver_register); | |
| 1246 | 1244 | |
| 1247 | 1245 | static int __init brcmfmac_module_init(void) |
| 1248 | 1246 | { |
| 1247 | + brcmf_debugfs_init(); | |
| 1248 | +#ifdef CONFIG_BRCMFMAC_SDIO | |
| 1249 | + brcmf_sdio_init(); | |
| 1250 | +#endif | |
| 1249 | 1251 | if (!schedule_work(&brcmf_driver_work)) |
| 1250 | 1252 | return -EBUSY; |
| 1251 | 1253 | |
| @@ -1539,7 +1539,7 @@ void brcmf_usb_exit(void) · 1538 unmodified lines | ||
| 1539 | 1539 | brcmf_release_fw(&fw_image_list); |
| 1540 | 1540 | } |
| 1541 | 1541 | |
| 1542 | −void brcmf_usb_init(void) | |
| 1542 | +void brcmf_usb_register(void) | |
| 1543 | 1543 | { |
| 1544 | 1544 | brcmf_dbg(USB, "Enter\n"); |
| 1545 | 1545 | INIT_LIST_HEAD(&fw_image_list); |
| @@ -457,6 +457,8 @@ static int brcms_ops_start(struct ieee80211_hw *hw) · 456 unmodified lines | ||
| 457 | 457 | if (err != 0) |
| 458 | 458 | brcms_err(wl->wlc->hw->d11core, "%s: brcms_up() returned %d\n", |
| 459 | 459 | __func__, err); |
| 460 | + | |
| 461 | + bcma_core_pci_power_save(wl->wlc->hw->d11core->bus, true); | |
| 460 | 462 | return err; |
| 461 | 463 | } |
| 462 | 464 | |
| @@ -479,6 +481,8 @@ static void brcms_ops_stop(struct ieee80211_hw *hw) · 16 unmodified lines | ||
| 479 | 481 | return; |
| 480 | 482 | } |
| 481 | 483 | |
| 484 | + bcma_core_pci_power_save(wl->wlc->hw->d11core->bus, false); | |
| 485 | + | |
| 482 | 486 | /* put driver in down state */ |
| 483 | 487 | spin_lock_bh(&wl->lock); |
| 484 | 488 | brcms_down(wl); |
| @@ -40,6 +40,7 @@ struct hwbus_priv { · 39 unmodified lines | ||
| 40 | 40 | struct cw1200_common *core; |
| 41 | 41 | const struct cw1200_platform_data_spi *pdata; |
| 42 | 42 | spinlock_t lock; /* Serialize all bus operations */ |
| 43 | + wait_queue_head_t wq; | |
| 43 | 44 | int claimed; |
| 44 | 45 | }; |
| 45 | 46 | |
| @@ -197,8 +198,11 @@ static void cw1200_spi_lock(struct hwbus_priv *self) · 151 unmodified lines | ||
| 197 | 198 | { |
| 198 | 199 | unsigned long flags; |
| 199 | 200 | |
| 201 | + DECLARE_WAITQUEUE(wait, current); | |
| 202 | + | |
| 200 | 203 | might_sleep(); |
| 201 | 204 | |
| 205 | + add_wait_queue(&self->wq, &wait); | |
| 202 | 206 | spin_lock_irqsave(&self->lock, flags); |
| 203 | 207 | while (1) { |
| 204 | 208 | set_current_state(TASK_UNINTERRUPTIBLE); |
| @@ -211,6 +215,7 @@ static void cw1200_spi_lock(struct hwbus_priv *self) · 6 unmodified lines | ||
| 211 | 215 | set_current_state(TASK_RUNNING); |
| 212 | 216 | self->claimed = 1; |
| 213 | 217 | spin_unlock_irqrestore(&self->lock, flags); |
| 218 | + remove_wait_queue(&self->wq, &wait); | |
| 214 | 219 | |
| 215 | 220 | return; |
| 216 | 221 | } |
| @@ -222,6 +227,8 @@ static void cw1200_spi_unlock(struct hwbus_priv *self) · 5 unmodified lines | ||
| 222 | 227 | spin_lock_irqsave(&self->lock, flags); |
| 223 | 228 | self->claimed = 0; |
| 224 | 229 | spin_unlock_irqrestore(&self->lock, flags); |
| 230 | + wake_up(&self->wq); | |
| 231 | + | |
| 225 | 232 | return; |
| 226 | 233 | } |
| 227 | 234 | |
| @@ -243,9 +250,10 @@ static int cw1200_spi_irq_subscribe(struct hwbus_priv *self) · 15 unmodified lines | ||
| 243 | 250 | |
| 244 | 251 | pr_debug("SW IRQ subscribe\n"); |
| 245 | 252 | |
| 246 | − ret = request_any_context_irq(self->func->irq, cw1200_spi_irq_handler, | |
| 247 | − IRQF_TRIGGER_HIGH, | |
| 248 | − "cw1200_wlan_irq", self); | |
| 253 | + ret = request_threaded_irq(self->func->irq, NULL, | |
| 254 | + cw1200_spi_irq_handler, | |
| 255 | + IRQF_TRIGGER_HIGH | IRQF_ONESHOT, | |
| 256 | + "cw1200_wlan_irq", self); | |
| 249 | 257 | if (WARN_ON(ret < 0)) |
| 250 | 258 | goto exit; |
| 251 | 259 | |
| @@ -400,6 +408,8 @@ static int cw1200_spi_probe(struct spi_device *func) · 148 unmodified lines | ||
| 400 | 408 | |
| 401 | 409 | spi_set_drvdata(func, self); |
| 402 | 410 | |
| 411 | + init_waitqueue_head(&self->wq); | |
| 412 | + | |
| 403 | 413 | status = cw1200_spi_irq_subscribe(self); |
| 404 | 414 | |
| 405 | 415 | status = cw1200_core_probe(&cw1200_spi_hwbus_ops, |
| @@ -150,7 +150,7 @@ mwifiex_11n_form_amsdu_txpd(struct mwifiex_private *priv, · 149 unmodified lines | ||
| 150 | 150 | */ |
| 151 | 151 | int |
| 152 | 152 | mwifiex_11n_aggregate_pkt(struct mwifiex_private *priv, |
| 153 | − struct mwifiex_ra_list_tbl *pra_list, int headroom, | |
| 153 | + struct mwifiex_ra_list_tbl *pra_list, | |
| 154 | 154 | int ptrindex, unsigned long ra_list_flags) |
| 155 | 155 | __releases(&priv->wmm.ra_list_spinlock) |
| 156 | 156 | { |
| @@ -160,6 +160,7 @@ mwifiex_11n_aggregate_pkt(struct mwifiex_private *priv, · 3 unmodified lines | ||
| 160 | 160 | int pad = 0, ret; |
| 161 | 161 | struct mwifiex_tx_param tx_param; |
| 162 | 162 | struct txpd *ptx_pd = NULL; |
| 163 | + int headroom = adapter->iface_type == MWIFIEX_USB ? 0 : INTF_HEADER_LEN; | |
| 163 | 164 | |
| 164 | 165 | skb_src = skb_peek(&pra_list->skb_head); |
| 165 | 166 | if (!skb_src) { |
| @@ -26,7 +26,7 @@ · 25 unmodified lines | ||
| 26 | 26 | int mwifiex_11n_deaggregate_pkt(struct mwifiex_private *priv, |
| 27 | 27 | struct sk_buff *skb); |
| 28 | 28 | int mwifiex_11n_aggregate_pkt(struct mwifiex_private *priv, |
| 29 | − struct mwifiex_ra_list_tbl *ptr, int headroom, | |
| 29 | + struct mwifiex_ra_list_tbl *ptr, | |
| 30 | 30 | int ptr_index, unsigned long flags) |
| 31 | 31 | __releases(&priv->wmm.ra_list_spinlock); |
| 32 | 32 | |
| @@ -1155,7 +1155,7 @@ int mwifiex_ret_802_11_hs_cfg(struct mwifiex_private *priv, · 1154 unmodified lines | ||
| 1155 | 1155 | uint32_t conditions = le32_to_cpu(phs_cfg->params.hs_config.conditions); |
| 1156 | 1156 | |
| 1157 | 1157 | if (phs_cfg->action == cpu_to_le16(HS_ACTIVATE) && |
| 1158 | − adapter->iface_type == MWIFIEX_SDIO) { | |
| 1158 | + adapter->iface_type != MWIFIEX_USB) { | |
| 1159 | 1159 | mwifiex_hs_activated_event(priv, true); |
| 1160 | 1160 | return 0; |
| 1161 | 1161 | } else { |
| @@ -1167,8 +1167,7 @@ int mwifiex_ret_802_11_hs_cfg(struct mwifiex_private *priv, · 5 unmodified lines | ||
| 1167 | 1167 | } |
| 1168 | 1168 | if (conditions != HS_CFG_CANCEL) { |
| 1169 | 1169 | adapter->is_hs_configured = true; |
| 1170 | − if (adapter->iface_type == MWIFIEX_USB || | |
| 1171 | − adapter->iface_type == MWIFIEX_PCIE) | |
| 1170 | + if (adapter->iface_type == MWIFIEX_USB) | |
| 1172 | 1171 | mwifiex_hs_activated_event(priv, true); |
| 1173 | 1172 | } else { |
| 1174 | 1173 | adapter->is_hs_configured = false; |
| @@ -447,9 +447,6 @@ static int mwifiex_usb_suspend(struct usb_interface *intf, pm_message_t message) · 446 unmodified lines | ||
| 447 | 447 | */ |
| 448 | 448 | adapter->is_suspended = true; |
| 449 | 449 | |
| 450 | − for (i = 0; i < adapter->priv_num; i++) | |
| 451 | − netif_carrier_off(adapter->priv[i]->netdev); | |
| 452 | − | |
| 453 | 450 | if (atomic_read(&card->rx_cmd_urb_pending) && card->rx_cmd.urb) |
| 454 | 451 | usb_kill_urb(card->rx_cmd.urb); |
| 455 | 452 | |
| @@ -509,10 +506,6 @@ static int mwifiex_usb_resume(struct usb_interface *intf) · 53 unmodified lines | ||
| 509 | 506 | MWIFIEX_RX_CMD_BUF_SIZE); |
| 510 | 507 | } |
| 511 | 508 | |
| 512 | − for (i = 0; i < adapter->priv_num; i++) | |
| 513 | − if (adapter->priv[i]->media_connected) | |
| 514 | − netif_carrier_on(adapter->priv[i]->netdev); | |
| 515 | − | |
| 516 | 509 | /* Disable Host Sleep */ |
| 517 | 510 | if (adapter->hs_activated) |
| 518 | 511 | mwifiex_cancel_hs(mwifiex_get_priv(adapter, |
| @@ -1239,8 +1239,7 @@ mwifiex_dequeue_tx_packet(struct mwifiex_adapter *adapter) · 1238 unmodified lines | ||
| 1239 | 1239 | if (enable_tx_amsdu && mwifiex_is_amsdu_allowed(priv, tid) && |
| 1240 | 1240 | mwifiex_is_11n_aggragation_possible(priv, ptr, |
| 1241 | 1241 | adapter->tx_buf_size)) |
| 1242 | − mwifiex_11n_aggregate_pkt(priv, ptr, INTF_HEADER_LEN, | |
| 1243 | − ptr_index, flags); | |
| 1242 | + mwifiex_11n_aggregate_pkt(priv, ptr, ptr_index, flags); | |
| 1244 | 1243 | /* ra_list_spinlock has been freed in |
| 1245 | 1244 | mwifiex_11n_aggregate_pkt() */ |
| 1246 | 1245 | else |
| @@ -83,6 +83,7 @@ static struct usb_device_id p54u_table[] = { · 82 unmodified lines | ||
| 83 | 83 | {USB_DEVICE(0x06a9, 0x000e)}, /* Westell 802.11g USB (A90-211WG-01) */ |
| 84 | 84 | {USB_DEVICE(0x06b9, 0x0121)}, /* Thomson SpeedTouch 121g */ |
| 85 | 85 | {USB_DEVICE(0x0707, 0xee13)}, /* SMC 2862W-G version 2 */ |
| 86 | + {USB_DEVICE(0x07aa, 0x0020)}, /* Corega WLUSB2GTST USB */ | |
| 86 | 87 | {USB_DEVICE(0x0803, 0x4310)}, /* Zoom 4410a */ |
| 87 | 88 | {USB_DEVICE(0x083a, 0x4521)}, /* Siemens Gigaset USB Adapter 54 version 2 */ |
| 88 | 89 | {USB_DEVICE(0x083a, 0x4531)}, /* T-Com Sinus 154 data II */ |
| @@ -979,6 +980,7 @@ static int p54u_load_firmware(struct ieee80211_hw *dev, · 890 unmodified lines | ||
| 979 | 980 | if (err) { |
| 980 | 981 | dev_err(&priv->udev->dev, "(p54usb) cannot load firmware %s " |
| 981 | 982 | "(%d)!\n", p54u_fwlist[i].fw, err); |
| 983 | + usb_put_dev(udev); | |
| 982 | 984 | } |
| 983 | 985 | |
| 984 | 986 | return err; |
| @@ -6659,19 +6659,20 @@ int rt2800_enable_radio(struct rt2x00_dev *rt2x00dev) · 6658 unmodified lines | ||
| 6659 | 6659 | rt2800_init_registers(rt2x00dev))) |
| 6660 | 6660 | return -EIO; |
| 6661 | 6661 | |
| 6662 | + if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev))) | |
| 6663 | + return -EIO; | |
| 6664 | + | |
| 6662 | 6665 | /* |
| 6663 | 6666 | * Send signal to firmware during boot time. |
| 6664 | 6667 | */ |
| 6665 | 6668 | rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0); |
| 6666 | 6669 | rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0); |
| 6667 | − if (rt2x00_is_usb(rt2x00dev)) { | |
| 6670 | + if (rt2x00_is_usb(rt2x00dev)) | |
| 6668 | 6671 | rt2800_register_write(rt2x00dev, H2M_INT_SRC, 0); |
| 6669 | − rt2800_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0, 0, 0); | |
| 6670 | − } | |
| 6672 | + rt2800_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0, 0, 0); | |
| 6671 | 6673 | msleep(1); |
| 6672 | 6674 | |
| 6673 | − if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev) || | |
| 6674 | − rt2800_wait_bbp_ready(rt2x00dev))) | |
| 6675 | + if (unlikely(rt2800_wait_bbp_ready(rt2x00dev))) | |
| 6675 | 6676 | return -EIO; |
| 6676 | 6677 | |
| 6677 | 6678 | rt2800_init_bbp(rt2x00dev); |
| @@ -438,17 +438,16 @@ static int rtl8187_init_urbs(struct ieee80211_hw *dev) · 437 unmodified lines | ||
| 438 | 438 | skb_queue_tail(&priv->rx_queue, skb); |
| 439 | 439 | usb_anchor_urb(entry, &priv->anchored); |
| 440 | 440 | ret = usb_submit_urb(entry, GFP_KERNEL); |
| 441 | + usb_put_urb(entry); | |
| 441 | 442 | if (ret) { |
| 442 | 443 | skb_unlink(skb, &priv->rx_queue); |
| 443 | 444 | usb_unanchor_urb(entry); |
| 444 | 445 | goto err; |
| 445 | 446 | } |
| 446 | − usb_free_urb(entry); | |
| 447 | 447 | } |
| 448 | 448 | return ret; |
| 449 | 449 | |
| 450 | 450 | err: |
| 451 | − usb_free_urb(entry); | |
| 452 | 451 | kfree_skb(skb); |
| 453 | 452 | usb_kill_anchored_urbs(&priv->anchored); |
| 454 | 453 | return ret; |
| @@ -956,8 +955,12 @@ static int rtl8187_start(struct ieee80211_hw *dev) · 501 unmodified lines | ||
| 956 | 955 | (RETRY_COUNT << 8 /* short retry limit */) | |
| 957 | 956 | (RETRY_COUNT << 0 /* long retry limit */) | |
| 958 | 957 | (7 << 21 /* MAX TX DMA */)); |
| 959 | − rtl8187_init_urbs(dev); | |
| 960 | − rtl8187b_init_status_urb(dev); | |
| 958 | + ret = rtl8187_init_urbs(dev); | |
| 959 | + if (ret) | |
| 960 | + goto rtl8187_start_exit; | |
| 961 | + ret = rtl8187b_init_status_urb(dev); | |
| 962 | + if (ret) | |
| 963 | + usb_kill_anchored_urbs(&priv->anchored); | |
| 961 | 964 | goto rtl8187_start_exit; |
| 962 | 965 | } |
| 963 | 966 | |
| @@ -966,7 +969,9 @@ static int rtl8187_start(struct ieee80211_hw *dev) · 2 unmodified lines | ||
| 966 | 969 | rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0); |
| 967 | 970 | rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0); |
| 968 | 971 | |
| 969 | − rtl8187_init_urbs(dev); | |
| 972 | + ret = rtl8187_init_urbs(dev); | |
| 973 | + if (ret) | |
| 974 | + goto rtl8187_start_exit; | |
| 970 | 975 | |
| 971 | 976 | reg = RTL818X_RX_CONF_ONLYERLPKT | |
| 972 | 977 | RTL818X_RX_CONF_RX_AUTORESETPHY | |
| @@ -2057,7 +2057,7 @@ struct rtl_priv { · 2056 unmodified lines | ||
| 2057 | 2057 | that it points to the data allocated |
| 2058 | 2058 | beyond this structure like: |
| 2059 | 2059 | rtl_pci_priv or rtl_usb_priv */ |
| 2060 | − u8 priv[0]; | |
| 2060 | + u8 priv[0] __aligned(sizeof(void *)); | |
| 2061 | 2061 | }; |
| 2062 | 2062 | |
| 2063 | 2063 | #define rtl_priv(hw) (((struct rtl_priv *)(hw)->priv)) |
| @@ -184,6 +184,7 @@ int xenvif_connect(struct xenvif *vif, unsigned long tx_ring_ref, · 183 unmodified lines | ||
| 184 | 184 | unsigned long rx_ring_ref, unsigned int tx_evtchn, |
| 185 | 185 | unsigned int rx_evtchn); |
| 186 | 186 | void xenvif_disconnect(struct xenvif *vif); |
| 187 | +void xenvif_free(struct xenvif *vif); | |
| 187 | 188 | |
| 188 | 189 | int xenvif_xenbus_init(void); |
| 189 | 190 | void xenvif_xenbus_fini(void); |
| @@ -353,6 +353,9 @@ struct xenvif *xenvif_alloc(struct device *parent, domid_t domid, · 352 unmodified lines | ||
| 353 | 353 | } |
| 354 | 354 | |
| 355 | 355 | netdev_dbg(dev, "Successfully created xenvif\n"); |
| 356 | + | |
| 357 | + __module_get(THIS_MODULE); | |
| 358 | + | |
| 356 | 359 | return vif; |
| 357 | 360 | } |
| 358 | 361 | |
| @@ -366,8 +369,6 @@ int xenvif_connect(struct xenvif *vif, unsigned long tx_ring_ref, · 7 unmodified lines | ||
| 366 | 369 | if (vif->tx_irq) |
| 367 | 370 | return 0; |
| 368 | 371 | |
| 369 | − __module_get(THIS_MODULE); | |
| 370 | − | |
| 371 | 372 | err = xenvif_map_frontend_rings(vif, tx_ring_ref, rx_ring_ref); |
| 372 | 373 | if (err < 0) |
| 373 | 374 | goto err; |
| @@ -406,7 +407,7 @@ int xenvif_connect(struct xenvif *vif, unsigned long tx_ring_ref, · 32 unmodified lines | ||
| 406 | 407 | |
| 407 | 408 | init_waitqueue_head(&vif->wq); |
| 408 | 409 | vif->task = kthread_create(xenvif_kthread, |
| 409 | − (void *)vif, vif->dev->name); | |
| 410 | + (void *)vif, "%s", vif->dev->name); | |
| 410 | 411 | if (IS_ERR(vif->task)) { |
| 411 | 412 | pr_warn("Could not allocate kthread for %s\n", vif->dev->name); |
| 412 | 413 | err = PTR_ERR(vif->task); |
| @@ -452,12 +453,6 @@ void xenvif_carrier_off(struct xenvif *vif) · 39 unmodified lines | ||
| 452 | 453 | |
| 453 | 454 | void xenvif_disconnect(struct xenvif *vif) |
| 454 | 455 | { |
| 455 | − /* Disconnect funtion might get called by generic framework | |
| 456 | − * even before vif connects, so we need to check if we really | |
| 457 | − * need to do a module_put. | |
| 458 | − */ | |
| 459 | − int need_module_put = 0; | |
| 460 | − | |
| 461 | 456 | if (netif_carrier_ok(vif->dev)) |
| 462 | 457 | xenvif_carrier_off(vif); |
| 463 | 458 | |
| @@ -468,23 +463,22 @@ void xenvif_disconnect(struct xenvif *vif) · 4 unmodified lines | ||
| 468 | 463 | unbind_from_irqhandler(vif->tx_irq, vif); |
| 469 | 464 | unbind_from_irqhandler(vif->rx_irq, vif); |
| 470 | 465 | } |
| 471 | − /* vif->irq is valid, we had a module_get in | |
| 472 | − * xenvif_connect. | |
| 473 | − */ | |
| 474 | − need_module_put = 1; | |
| 466 | + vif->tx_irq = 0; | |
| 475 | 467 | } |
| 476 | 468 | |
| 477 | 469 | if (vif->task) |
| 478 | 470 | kthread_stop(vif->task); |
| 479 | 471 | |
| 472 | + xenvif_unmap_frontend_rings(vif); | |
| 473 | +} | |
| 474 | + | |
| 475 | +void xenvif_free(struct xenvif *vif) | |
| 476 | +{ | |
| 480 | 477 | netif_napi_del(&vif->napi); |
| 481 | 478 | |
| 482 | 479 | unregister_netdev(vif->dev); |
| 483 | 480 | |
| 484 | − xenvif_unmap_frontend_rings(vif); | |
| 485 | − | |
| 486 | 481 | free_netdev(vif->dev); |
| 487 | 482 | |
| 488 | − if (need_module_put) | |
| 489 | − module_put(THIS_MODULE); | |
| 483 | + module_put(THIS_MODULE); | |
| 490 | 484 | } |
| @@ -212,6 +212,49 @@ static bool start_new_rx_buffer(int offset, unsigned long size, int head) · 211 unmodified lines | ||
| 212 | 212 | return false; |
| 213 | 213 | } |
| 214 | 214 | |
| 215 | +struct xenvif_count_slot_state { | |
| 216 | + unsigned long copy_off; | |
| 217 | + bool head; | |
| 218 | +}; | |
| 219 | + | |
| 220 | +unsigned int xenvif_count_frag_slots(struct xenvif *vif, | |
| 221 | + unsigned long offset, unsigned long size, | |
| 222 | + struct xenvif_count_slot_state *state) | |
| 223 | +{ | |
| 224 | + unsigned count = 0; | |
| 225 | + | |
| 226 | + offset &= ~PAGE_MASK; | |
| 227 | + | |
| 228 | + while (size > 0) { | |
| 229 | + unsigned long bytes; | |
| 230 | + | |
| 231 | + bytes = PAGE_SIZE - offset; | |
| 232 | + | |
| 233 | + if (bytes > size) | |
| 234 | + bytes = size; | |
| 235 | + | |
| 236 | + if (start_new_rx_buffer(state->copy_off, bytes, state->head)) { | |
| 237 | + count++; | |
| 238 | + state->copy_off = 0; | |
| 239 | + } | |
| 240 | + | |
| 241 | + if (state->copy_off + bytes > MAX_BUFFER_OFFSET) | |
| 242 | + bytes = MAX_BUFFER_OFFSET - state->copy_off; | |
| 243 | + | |
| 244 | + state->copy_off += bytes; | |
| 245 | + | |
| 246 | + offset += bytes; | |
| 247 | + size -= bytes; | |
| 248 | + | |
| 249 | + if (offset == PAGE_SIZE) | |
| 250 | + offset = 0; | |
| 251 | + | |
| 252 | + state->head = false; | |
| 253 | + } | |
| 254 | + | |
| 255 | + return count; | |
| 256 | +} | |
| 257 | + | |
| 215 | 258 | /* |
| 216 | 259 | * Figure out how many ring slots we're going to need to send @skb to |
| 217 | 260 | * the guest. This function is essentially a dry run of |
| @@ -219,48 +262,39 @@ static bool start_new_rx_buffer(int offset, unsigned long size, int head) · 1 unmodified line | ||
| 219 | 262 | */ |
| 220 | 263 | unsigned int xenvif_count_skb_slots(struct xenvif *vif, struct sk_buff *skb) |
| 221 | 264 | { |
| 265 | + struct xenvif_count_slot_state state; | |
| 222 | 266 | unsigned int count; |
| 223 | − int i, copy_off; | |
| 267 | + unsigned char *data; | |
| 268 | + unsigned i; | |
| 224 | 269 | |
| 225 | − count = DIV_ROUND_UP(skb_headlen(skb), PAGE_SIZE); | |
| 270 | + state.head = true; | |
| 271 | + state.copy_off = 0; | |
| 226 | 272 | |
| 227 | − copy_off = skb_headlen(skb) % PAGE_SIZE; | |
| 273 | + /* Slot for the first (partial) page of data. */ | |
| 274 | + count = 1; | |
| 228 | 275 | |
| 276 | + /* Need a slot for the GSO prefix for GSO extra data? */ | |
| 229 | 277 | if (skb_shinfo(skb)->gso_size) |
| 230 | 278 | count++; |
| 231 | 279 | |
| 232 | − for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { | |
| 233 | − unsigned long size = skb_frag_size(&skb_shinfo(skb)->frags[i]); | |
| 234 | − unsigned long offset = skb_shinfo(skb)->frags[i].page_offset; | |
| 235 | − unsigned long bytes; | |
| 236 | − | |
| 237 | − offset &= ~PAGE_MASK; | |
| 238 | − | |
| 239 | − while (size > 0) { | |
| 240 | − BUG_ON(offset >= PAGE_SIZE); | |
| 241 | − BUG_ON(copy_off > MAX_BUFFER_OFFSET); | |
| 242 | − | |
| 243 | − bytes = PAGE_SIZE - offset; | |
| 244 | − | |
| 245 | − if (bytes > size) | |
| 246 | − bytes = size; | |
| 280 | + data = skb->data; | |
| 281 | + while (data < skb_tail_pointer(skb)) { | |
| 282 | + unsigned long offset = offset_in_page(data); | |
| 283 | + unsigned long size = PAGE_SIZE - offset; | |
| 247 | 284 | |
| 248 | − if (start_new_rx_buffer(copy_off, bytes, 0)) { | |
| 249 | − count++; | |
| 250 | − copy_off = 0; | |
| 251 | − } | |
| 285 | + if (data + size > skb_tail_pointer(skb)) | |
| 286 | + size = skb_tail_pointer(skb) - data; | |
| 252 | 287 | |
| 253 | − if (copy_off + bytes > MAX_BUFFER_OFFSET) | |
| 254 | − bytes = MAX_BUFFER_OFFSET - copy_off; | |
| 288 | + count += xenvif_count_frag_slots(vif, offset, size, &state); | |
| 255 | 289 | |
| 256 | − copy_off += bytes; | |
| 290 | + data += size; | |
| 291 | + } | |
| 257 | 292 | |
| 258 | − offset += bytes; | |
| 259 | − size -= bytes; | |
| 293 | + for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { | |
| 294 | + unsigned long size = skb_frag_size(&skb_shinfo(skb)->frags[i]); | |
| 295 | + unsigned long offset = skb_shinfo(skb)->frags[i].page_offset; | |
| 260 | 296 | |
| 261 | − if (offset == PAGE_SIZE) | |
| 262 | − offset = 0; | |
| 263 | − } | |
| 297 | + count += xenvif_count_frag_slots(vif, offset, size, &state); | |
| 264 | 298 | } |
| 265 | 299 | return count; |
| 266 | 300 | } |
| @@ -24,6 +24,12 @@ · 23 unmodified lines | ||
| 24 | 24 | struct backend_info { |
| 25 | 25 | struct xenbus_device *dev; |
| 26 | 26 | struct xenvif *vif; |
| 27 | + | |
| 28 | + /* This is the state that will be reflected in xenstore when any | |
| 29 | + * active hotplug script completes. | |
| 30 | + */ | |
| 31 | + enum xenbus_state state; | |
| 32 | + | |
| 27 | 33 | enum xenbus_state frontend_state; |
| 28 | 34 | struct xenbus_watch hotplug_status_watch; |
| 29 | 35 | u8 have_hotplug_status_watch:1; |
| @@ -42,7 +48,7 @@ static int netback_remove(struct xenbus_device *dev) · 12 unmodified lines | ||
| 42 | 48 | if (be->vif) { |
| 43 | 49 | kobject_uevent(&dev->dev.kobj, KOBJ_OFFLINE); |
| 44 | 50 | xenbus_rm(XBT_NIL, dev->nodename, "hotplug-status"); |
| 45 | − xenvif_disconnect(be->vif); | |
| 51 | + xenvif_free(be->vif); | |
| 46 | 52 | be->vif = NULL; |
| 47 | 53 | } |
| 48 | 54 | kfree(be); |
| @@ -136,6 +142,8 @@ static int netback_probe(struct xenbus_device *dev, · 87 unmodified lines | ||
| 136 | 142 | if (err) |
| 137 | 143 | goto fail; |
| 138 | 144 | |
| 145 | + be->state = XenbusStateInitWait; | |
| 146 | + | |
| 139 | 147 | /* This kicks hotplug scripts, so do it immediately. */ |
| 140 | 148 | backend_create_xenvif(be); |
| 141 | 149 | |
| @@ -208,15 +216,113 @@ static void backend_create_xenvif(struct backend_info *be) · 66 unmodified lines | ||
| 208 | 216 | kobject_uevent(&dev->dev.kobj, KOBJ_ONLINE); |
| 209 | 217 | } |
| 210 | 218 | |
| 219 | +static void backend_disconnect(struct backend_info *be) | |
| 220 | +{ | |
| 221 | + if (be->vif) | |
| 222 | + xenvif_disconnect(be->vif); | |
| 223 | +} | |
| 211 | 224 | |
| 212 | −static void disconnect_backend(struct xenbus_device *dev) | |
| 225 | +static void backend_connect(struct backend_info *be) | |
| 213 | 226 | { |
| 214 | − struct backend_info *be = dev_get_drvdata(&dev->dev); | |
| 227 | + if (be->vif) | |
| 228 | + connect(be); | |
| 229 | +} | |
| 215 | 230 | |
| 216 | − if (be->vif) { | |
| 217 | − xenbus_rm(XBT_NIL, dev->nodename, "hotplug-status"); | |
| 218 | − xenvif_disconnect(be->vif); | |
| 219 | − be->vif = NULL; | |
| 231 | +static inline void backend_switch_state(struct backend_info *be, | |
| 232 | + enum xenbus_state state) | |
| 233 | +{ | |
| 234 | + struct xenbus_device *dev = be->dev; | |
| 235 | + | |
| 236 | + pr_debug("%s -> %s\n", dev->nodename, xenbus_strstate(state)); | |
| 237 | + be->state = state; | |
| 238 | + | |
| 239 | + /* If we are waiting for a hotplug script then defer the | |
| 240 | + * actual xenbus state change. | |
| 241 | + */ | |
| 242 | + if (!be->have_hotplug_status_watch) | |
| 243 | + xenbus_switch_state(dev, state); | |
| 244 | +} | |
| 245 | + | |
| 246 | +/* Handle backend state transitions: | |
| 247 | + * | |
| 248 | + * The backend state starts in InitWait and the following transitions are | |
| 249 | + * allowed. | |
| 250 | + * | |
| 251 | + * InitWait -> Connected | |
| 252 | + * | |
| 253 | + * ^ \ | | |
| 254 | + * | \ | | |
| 255 | + * | \ | | |
| 256 | + * | \ | | |
| 257 | + * | \ | | |
| 258 | + * | \ | | |
| 259 | + * | V V | |
| 260 | + * | |
| 261 | + * Closed <-> Closing | |
| 262 | + * | |
| 263 | + * The state argument specifies the eventual state of the backend and the | |
| 264 | + * function transitions to that state via the shortest path. | |
| 265 | + */ | |
| 266 | +static void set_backend_state(struct backend_info *be, | |
| 267 | + enum xenbus_state state) | |
| 268 | +{ | |
| 269 | + while (be->state != state) { | |
| 270 | + switch (be->state) { | |
| 271 | + case XenbusStateClosed: | |
| 272 | + switch (state) { | |
| 273 | + case XenbusStateInitWait: | |
| 274 | + case XenbusStateConnected: | |
| 275 | + pr_info("%s: prepare for reconnect\n", | |
| 276 | + be->dev->nodename); | |
| 277 | + backend_switch_state(be, XenbusStateInitWait); | |
| 278 | + break; | |
| 279 | + case XenbusStateClosing: | |
| 280 | + backend_switch_state(be, XenbusStateClosing); | |
| 281 | + break; | |
| 282 | + default: | |
| 283 | + BUG(); | |
| 284 | + } | |
| 285 | + break; | |
| 286 | + case XenbusStateInitWait: | |
| 287 | + switch (state) { | |
| 288 | + case XenbusStateConnected: | |
| 289 | + backend_connect(be); | |
| 290 | + backend_switch_state(be, XenbusStateConnected); | |
| 291 | + break; | |
| 292 | + case XenbusStateClosing: | |
| 293 | + case XenbusStateClosed: | |
| 294 | + backend_switch_state(be, XenbusStateClosing); | |
| 295 | + break; | |
| 296 | + default: | |
| 297 | + BUG(); | |
| 298 | + } | |
| 299 | + break; | |
| 300 | + case XenbusStateConnected: | |
| 301 | + switch (state) { | |
| 302 | + case XenbusStateInitWait: | |
| 303 | + case XenbusStateClosing: | |
| 304 | + case XenbusStateClosed: | |
| 305 | + backend_disconnect(be); | |
| 306 | + backend_switch_state(be, XenbusStateClosing); | |
| 307 | + break; | |
| 308 | + default: | |
| 309 | + BUG(); | |
| 310 | + } | |
| 311 | + break; | |
| 312 | + case XenbusStateClosing: | |
| 313 | + switch (state) { | |
| 314 | + case XenbusStateInitWait: | |
| 315 | + case XenbusStateConnected: | |
| 316 | + case XenbusStateClosed: | |
| 317 | + backend_switch_state(be, XenbusStateClosed); | |
| 318 | + break; | |
| 319 | + default: | |
| 320 | + BUG(); | |
| 321 | + } | |
| 322 | + break; | |
| 323 | + default: | |
| 324 | + BUG(); | |
| 325 | + } | |
| 220 | 326 | } |
| 221 | 327 | } |
| 222 | 328 | |
| @@ -228,42 +334,33 @@ static void frontend_changed(struct xenbus_device *dev, · 5 unmodified lines | ||
| 228 | 334 | { |
| 229 | 335 | struct backend_info *be = dev_get_drvdata(&dev->dev); |
| 230 | 336 | |
| 231 | − pr_debug("frontend state %s\n", xenbus_strstate(frontend_state)); | |
| 337 | + pr_debug("%s -> %s\n", dev->otherend, xenbus_strstate(frontend_state)); | |
| 232 | 338 | |
| 233 | 339 | be->frontend_state = frontend_state; |
| 234 | 340 | |
| 235 | 341 | switch (frontend_state) { |
| 236 | 342 | case XenbusStateInitialising: |
| 237 | − if (dev->state == XenbusStateClosed) { | |
| 238 | − pr_info("%s: prepare for reconnect\n", dev->nodename); | |
| 239 | − xenbus_switch_state(dev, XenbusStateInitWait); | |
| 240 | − } | |
| 343 | + set_backend_state(be, XenbusStateInitWait); | |
| 241 | 344 | break; |
| 242 | 345 | |
| 243 | 346 | case XenbusStateInitialised: |
| 244 | 347 | break; |
| 245 | 348 | |
| 246 | 349 | case XenbusStateConnected: |
| 247 | − if (dev->state == XenbusStateConnected) | |
| 248 | − break; | |
| 249 | − backend_create_xenvif(be); | |
| 250 | − if (be->vif) | |
| 251 | − connect(be); | |
| 350 | + set_backend_state(be, XenbusStateConnected); | |
| 252 | 351 | break; |
| 253 | 352 | |
| 254 | 353 | case XenbusStateClosing: |
| 255 | − if (be->vif) | |
| 256 | − kobject_uevent(&dev->dev.kobj, KOBJ_OFFLINE); | |
| 257 | − disconnect_backend(dev); | |
| 258 | − xenbus_switch_state(dev, XenbusStateClosing); | |
| 354 | + set_backend_state(be, XenbusStateClosing); | |
| 259 | 355 | break; |
| 260 | 356 | |
| 261 | 357 | case XenbusStateClosed: |
| 262 | − xenbus_switch_state(dev, XenbusStateClosed); | |
| 358 | + set_backend_state(be, XenbusStateClosed); | |
| 263 | 359 | if (xenbus_dev_is_online(dev)) |
| 264 | 360 | break; |
| 265 | 361 | /* fall through if not online */ |
| 266 | 362 | case XenbusStateUnknown: |
| 363 | + set_backend_state(be, XenbusStateClosed); | |
| 267 | 364 | device_unregister(&dev->dev); |
| 268 | 365 | break; |
| 269 | 366 | |
| @@ -356,7 +453,9 @@ static void hotplug_status_changed(struct xenbus_watch *watch, · 86 unmodified lines | ||
| 356 | 453 | if (IS_ERR(str)) |
| 357 | 454 | return; |
| 358 | 455 | if (len == sizeof("connected")-1 && !memcmp(str, "connected", len)) { |
| 359 | − xenbus_switch_state(be->dev, XenbusStateConnected); | |
| 456 | + /* Complete any pending state change */ | |
| 457 | + xenbus_switch_state(be->dev, be->state); | |
| 458 | + | |
| 360 | 459 | /* Not interested in this watch anymore. */ |
| 361 | 460 | unregister_hotplug_status_watch(be); |
| 362 | 461 | } |
| @@ -386,12 +485,8 @@ static void connect(struct backend_info *be) · 23 unmodified lines | ||
| 386 | 485 | err = xenbus_watch_pathfmt(dev, &be->hotplug_status_watch, |
| 387 | 486 | hotplug_status_changed, |
| 388 | 487 | "%s/%s", dev->nodename, "hotplug-status"); |
| 389 | − if (err) { | |
| 390 | − /* Switch now, since we can't do a watch. */ | |
| 391 | − xenbus_switch_state(dev, XenbusStateConnected); | |
| 392 | − } else { | |
| 488 | + if (!err) | |
| 393 | 489 | be->have_hotplug_status_watch = 1; |
| 394 | − } | |
| 395 | 490 | |
| 396 | 491 | netif_wake_queue(be->vif->dev); |
| 397 | 492 | } |
| @@ -47,6 +47,9 @@ static void pci_acpi_wake_dev(acpi_handle handle, u32 event, void *context) · 46 unmodified lines | ||
| 47 | 47 | if (event != ACPI_NOTIFY_DEVICE_WAKE || !pci_dev) |
| 48 | 48 | return; |
| 49 | 49 | |
| 50 | + if (pci_dev->pme_poll) | |
| 51 | + pci_dev->pme_poll = false; | |
| 52 | + | |
| 50 | 53 | if (pci_dev->current_state == PCI_D3cold) { |
| 51 | 54 | pci_wakeup_event(pci_dev); |
| 52 | 55 | pm_runtime_resume(&pci_dev->dev); |
| @@ -57,9 +60,6 @@ static void pci_acpi_wake_dev(acpi_handle handle, u32 event, void *context) · 4 unmodified lines | ||
| 57 | 60 | if (pci_dev->pme_support) |
| 58 | 61 | pci_check_pme_status(pci_dev); |
| 59 | 62 | |
| 60 | − if (pci_dev->pme_poll) | |
| 61 | − pci_dev->pme_poll = false; | |
| 62 | − | |
| 63 | 63 | pci_wakeup_event(pci_dev); |
| 64 | 64 | pm_runtime_resume(&pci_dev->dev); |
| 65 | 65 | |
| @@ -1155,8 +1155,14 @@ static void pci_enable_bridge(struct pci_dev *dev) · 1154 unmodified lines | ||
| 1155 | 1155 | |
| 1156 | 1156 | pci_enable_bridge(dev->bus->self); |
| 1157 | 1157 | |
| 1158 | − if (pci_is_enabled(dev)) | |
| 1158 | + if (pci_is_enabled(dev)) { | |
| 1159 | + if (!dev->is_busmaster) { | |
| 1160 | + dev_warn(&dev->dev, "driver skip pci_set_master, fix it!\n"); | |
| 1161 | + pci_set_master(dev); | |
| 1162 | + } | |
| 1159 | 1163 | return; |
| 1164 | + } | |
| 1165 | + | |
| 1160 | 1166 | retval = pci_enable_device(dev); |
| 1161 | 1167 | if (retval) |
| 1162 | 1168 | dev_err(&dev->dev, "Error enabling bridge (%d), continuing\n", |
| @@ -490,7 +490,7 @@ exit: · 489 unmodified lines | ||
| 490 | 490 | * <devicename> <state> <pinname> are values that should match the pinctrl-maps |
| 491 | 491 | * <newvalue> reflects the new config and is driver dependant |
| 492 | 492 | */ |
| 493 | −static int pinconf_dbg_config_write(struct file *file, | |
| 493 | +static ssize_t pinconf_dbg_config_write(struct file *file, | |
| 494 | 494 | const char __user *user_buf, size_t count, loff_t *ppos) |
| 495 | 495 | { |
| 496 | 496 | struct pinctrl_maps *maps_node; |
| @@ -508,7 +508,7 @@ static int pinconf_dbg_config_write(struct file *file, · 11 unmodified lines | ||
| 508 | 508 | int i; |
| 509 | 509 | |
| 510 | 510 | /* Get userspace string and assure termination */ |
| 511 | − buf_size = min(count, (size_t)(sizeof(buf)-1)); | |
| 511 | + buf_size = min(count, sizeof(buf) - 1); | |
| 512 | 512 | if (copy_from_user(buf, user_buf, buf_size)) |
| 513 | 513 | return -EFAULT; |
| 514 | 514 | buf[buf_size] = 0; |
| @@ -663,18 +663,18 @@ static void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata) · 662 unmodified lines | ||
| 663 | 663 | /* pin banks of s5pv210 pin-controller */ |
| 664 | 664 | static struct samsung_pin_bank s5pv210_pin_bank[] = { |
| 665 | 665 | EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00), |
| 666 | − EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04), | |
| 666 | + EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpa1", 0x04), | |
| 667 | 667 | EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08), |
| 668 | 668 | EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpc0", 0x0c), |
| 669 | 669 | EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpc1", 0x10), |
| 670 | 670 | EXYNOS_PIN_BANK_EINTG(4, 0x0a0, "gpd0", 0x14), |
| 671 | − EXYNOS_PIN_BANK_EINTG(4, 0x0c0, "gpd1", 0x18), | |
| 672 | − EXYNOS_PIN_BANK_EINTG(5, 0x0e0, "gpe0", 0x1c), | |
| 673 | − EXYNOS_PIN_BANK_EINTG(8, 0x100, "gpe1", 0x20), | |
| 674 | − EXYNOS_PIN_BANK_EINTG(6, 0x120, "gpf0", 0x24), | |
| 671 | + EXYNOS_PIN_BANK_EINTG(6, 0x0c0, "gpd1", 0x18), | |
| 672 | + EXYNOS_PIN_BANK_EINTG(8, 0x0e0, "gpe0", 0x1c), | |
| 673 | + EXYNOS_PIN_BANK_EINTG(5, 0x100, "gpe1", 0x20), | |
| 674 | + EXYNOS_PIN_BANK_EINTG(8, 0x120, "gpf0", 0x24), | |
| 675 | 675 | EXYNOS_PIN_BANK_EINTG(8, 0x140, "gpf1", 0x28), |
| 676 | 676 | EXYNOS_PIN_BANK_EINTG(8, 0x160, "gpf2", 0x2c), |
| 677 | − EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpf3", 0x30), | |
| 677 | + EXYNOS_PIN_BANK_EINTG(6, 0x180, "gpf3", 0x30), | |
| 678 | 678 | EXYNOS_PIN_BANK_EINTG(7, 0x1a0, "gpg0", 0x34), |
| 679 | 679 | EXYNOS_PIN_BANK_EINTG(7, 0x1c0, "gpg1", 0x38), |
| 680 | 680 | EXYNOS_PIN_BANK_EINTG(7, 0x1e0, "gpg2", 0x3c), |
| @@ -891,9 +891,10 @@ static int palmas_pinconf_set(struct pinctrl_dev *pctldev, · 890 unmodified lines | ||
| 891 | 891 | param = pinconf_to_config_param(configs[i]); |
| 892 | 892 | param_val = pinconf_to_config_argument(configs[i]); |
| 893 | 893 | |
| 894 | + if (param == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT) | |
| 895 | + continue; | |
| 896 | + | |
| 894 | 897 | switch (param) { |
| 895 | − case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: | |
| 896 | − return 0; | |
| 897 | 898 | case PIN_CONFIG_BIAS_DISABLE: |
| 898 | 899 | case PIN_CONFIG_BIAS_PULL_UP: |
| 899 | 900 | case PIN_CONFIG_BIAS_PULL_DOWN: |
| @@ -3,7 +3,7 @@ · 2 unmodified lines | ||
| 3 | 3 | * |
| 4 | 4 | * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved. |
| 5 | 5 | * |
| 6 | − * Arthur: Pritesh Raithatha <praithatha@nvidia.com> | |
| 6 | + * Author: Pritesh Raithatha <praithatha@nvidia.com> | |
| 7 | 7 | * |
| 8 | 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | 9 | * under the terms and conditions of the GNU General Public License, |
| @@ -2763,7 +2763,6 @@ static struct platform_driver tegra114_pinctrl_driver = { · 2753 unmodified lines | ||
| 2763 | 2763 | }; |
| 2764 | 2764 | module_platform_driver(tegra114_pinctrl_driver); |
| 2765 | 2765 | |
| 2766 | −MODULE_ALIAS("platform:tegra114-pinctrl"); | |
| 2767 | 2766 | MODULE_AUTHOR("Pritesh Raithatha <praithatha@nvidia.com>"); |
| 2768 | −MODULE_DESCRIPTION("NVIDIA Tegra114 pincontrol driver"); | |
| 2767 | +MODULE_DESCRIPTION("NVIDIA Tegra114 pinctrl driver"); | |
| 2769 | 2768 | MODULE_LICENSE("GPL v2"); |
| @@ -709,7 +709,7 @@ static struct da9063_regulators_pdata *da9063_parse_regulators_dt( · 708 unmodified lines | ||
| 709 | 709 | struct of_regulator_match **da9063_reg_matches) |
| 710 | 710 | { |
| 711 | 711 | da9063_reg_matches = NULL; |
| 712 | − return PTR_ERR(-ENODEV); | |
| 712 | + return ERR_PTR(-ENODEV); | |
| 713 | 713 | } |
| 714 | 714 | #endif |
| 715 | 715 | |
| @@ -201,13 +201,7 @@ static unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500}; · 200 unmodified lines | ||
| 201 | 201 | #define SMPS_CTRL_MODE_ECO 0x02 |
| 202 | 202 | #define SMPS_CTRL_MODE_PWM 0x03 |
| 203 | 203 | |
| 204 | −/* These values are derived from the data sheet. And are the number of steps | |
| 205 | − * where there is a voltage change, the ranges at beginning and end of register | |
| 206 | − * max/min values where there are no change are ommitted. | |
| 207 | − * | |
| 208 | − * So they are basically (maxV-minV)/stepV | |
| 209 | − */ | |
| 210 | −#define PALMAS_SMPS_NUM_VOLTAGES 117 | |
| 204 | +#define PALMAS_SMPS_NUM_VOLTAGES 122 | |
| 211 | 205 | #define PALMAS_SMPS10_NUM_VOLTAGES 2 |
| 212 | 206 | #define PALMAS_LDO_NUM_VOLTAGES 50 |
| 213 | 207 | |
| @@ -979,6 +973,7 @@ static int palmas_regulators_probe(struct platform_device *pdev) · 765 unmodified lines | ||
| 979 | 973 | pmic->desc[id].min_uV = 900000; |
| 980 | 974 | pmic->desc[id].uV_step = 50000; |
| 981 | 975 | pmic->desc[id].linear_min_sel = 1; |
| 976 | + pmic->desc[id].enable_time = 500; | |
| 982 | 977 | pmic->desc[id].vsel_reg = |
| 983 | 978 | PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, |
| 984 | 979 | palmas_regs_info[id].vsel_addr); |
| @@ -997,6 +992,11 @@ static int palmas_regulators_probe(struct platform_device *pdev) · 12 unmodified lines | ||
| 997 | 992 | pmic->desc[id].min_uV = 450000; |
| 998 | 993 | pmic->desc[id].uV_step = 25000; |
| 999 | 994 | } |
| 995 | + | |
| 996 | + /* LOD6 in vibrator mode will have enable time 2000us */ | |
| 997 | + if (pdata && pdata->ldo6_vibrator && | |
| 998 | + (id == PALMAS_REG_LDO6)) | |
| 999 | + pmic->desc[id].enable_time = 2000; | |
| 1000 | 1000 | } else { |
| 1001 | 1001 | pmic->desc[id].n_voltages = 1; |
| 1002 | 1002 | pmic->desc[id].ops = &palmas_ops_extreg; |
| @@ -279,8 +279,12 @@ static int ti_abb_set_opp(struct regulator_dev *rdev, struct ti_abb *abb, · 278 unmodified lines | ||
| 279 | 279 | ti_abb_rmw(regs->opp_sel_mask, info->opp_sel, regs->control_reg, |
| 280 | 280 | abb->base); |
| 281 | 281 | |
| 282 | − /* program LDO VBB vset override if needed */ | |
| 283 | − if (abb->ldo_base) | |
| 282 | + /* | |
| 283 | + * program LDO VBB vset override if needed for !bypass mode | |
| 284 | + * XXX: Do not switch sequence - for !bypass, LDO override reset *must* | |
| 285 | + * be performed *before* switch to bias mode else VBB glitches. | |
| 286 | + */ | |
| 287 | + if (abb->ldo_base && info->opp_sel != TI_ABB_NOMINAL_OPP) | |
| 284 | 288 | ti_abb_program_ldovbb(dev, abb, info); |
| 285 | 289 | |
| 286 | 290 | /* Initiate ABB ldo change */ |
| @@ -295,6 +299,14 @@ static int ti_abb_set_opp(struct regulator_dev *rdev, struct ti_abb *abb, · 8 unmodified lines | ||
| 295 | 299 | if (ret) |
| 296 | 300 | goto out; |
| 297 | 301 | |
| 302 | + /* | |
| 303 | + * Reset LDO VBB vset override bypass mode | |
| 304 | + * XXX: Do not switch sequence - for bypass, LDO override reset *must* | |
| 305 | + * be performed *after* switch to bypass else VBB glitches. | |
| 306 | + */ | |
| 307 | + if (abb->ldo_base && info->opp_sel == TI_ABB_NOMINAL_OPP) | |
| 308 | + ti_abb_program_ldovbb(dev, abb, info); | |
| 309 | + | |
| 298 | 310 | out: |
| 299 | 311 | return ret; |
| 300 | 312 | } |
| @@ -63,7 +63,7 @@ static irqreturn_t wm831x_ldo_uv_irq(int irq, void *data) · 62 unmodified lines | ||
| 63 | 63 | */ |
| 64 | 64 | |
| 65 | 65 | static const struct regulator_linear_range wm831x_gp_ldo_ranges[] = { |
| 66 | − { .min_uV = 900000, .max_uV = 1650000, .min_sel = 0, .max_sel = 14, | |
| 66 | + { .min_uV = 900000, .max_uV = 1600000, .min_sel = 0, .max_sel = 14, | |
| 67 | 67 | .uV_step = 50000 }, |
| 68 | 68 | { .min_uV = 1700000, .max_uV = 3300000, .min_sel = 15, .max_sel = 31, |
| 69 | 69 | .uV_step = 100000 }, |
| @@ -332,7 +332,7 @@ static struct platform_driver wm831x_gp_ldo_driver = { · 262 unmodified lines | ||
| 332 | 332 | */ |
| 333 | 333 | |
| 334 | 334 | static const struct regulator_linear_range wm831x_aldo_ranges[] = { |
| 335 | − { .min_uV = 1000000, .max_uV = 1650000, .min_sel = 0, .max_sel = 12, | |
| 335 | + { .min_uV = 1000000, .max_uV = 1600000, .min_sel = 0, .max_sel = 12, | |
| 336 | 336 | .uV_step = 50000 }, |
| 337 | 337 | { .min_uV = 1700000, .max_uV = 3500000, .min_sel = 13, .max_sel = 31, |
| 338 | 338 | .uV_step = 100000 }, |
| @@ -543,7 +543,7 @@ static int wm8350_dcdc_set_suspend_mode(struct regulator_dev *rdev, · 542 unmodified lines | ||
| 543 | 543 | } |
| 544 | 544 | |
| 545 | 545 | static const struct regulator_linear_range wm8350_ldo_ranges[] = { |
| 546 | − { .min_uV = 900000, .max_uV = 1750000, .min_sel = 0, .max_sel = 15, | |
| 546 | + { .min_uV = 900000, .max_uV = 1650000, .min_sel = 0, .max_sel = 15, | |
| 547 | 547 | .uV_step = 50000 }, |
| 548 | 548 | { .min_uV = 1800000, .max_uV = 3300000, .min_sel = 16, .max_sel = 31, |
| 549 | 549 | .uV_step = 100000 }, |
| @@ -105,7 +105,7 @@ · 104 unmodified lines | ||
| 105 | 105 | #define BNX2FC_RQ_WQE_SIZE (BNX2FC_RQ_BUF_SZ) |
| 106 | 106 | #define BNX2FC_XFERQ_WQE_SIZE (sizeof(struct fcoe_xfrqe)) |
| 107 | 107 | #define BNX2FC_CONFQ_WQE_SIZE (sizeof(struct fcoe_confqe)) |
| 108 | −#define BNX2FC_5771X_DB_PAGE_SIZE 128 | |
| 108 | +#define BNX2X_DB_SHIFT 3 | |
| 109 | 109 | |
| 110 | 110 | #define BNX2FC_TASK_SIZE 128 |
| 111 | 111 | #define BNX2FC_TASKS_PER_PAGE (PAGE_SIZE/BNX2FC_TASK_SIZE) |
| @@ -1421,8 +1421,7 @@ int bnx2fc_map_doorbell(struct bnx2fc_rport *tgt) · 1420 unmodified lines | ||
| 1421 | 1421 | |
| 1422 | 1422 | reg_base = pci_resource_start(hba->pcidev, |
| 1423 | 1423 | BNX2X_DOORBELL_PCI_BAR); |
| 1424 | − reg_off = BNX2FC_5771X_DB_PAGE_SIZE * | |
| 1425 | − (context_id & 0x1FFFF) + DPM_TRIGER_TYPE; | |
| 1424 | + reg_off = (1 << BNX2X_DB_SHIFT) * (context_id & 0x1FFFF); | |
| 1426 | 1425 | tgt->ctx_base = ioremap_nocache(reg_base + reg_off, 4); |
| 1427 | 1426 | if (!tgt->ctx_base) |
| 1428 | 1427 | return -ENOMEM; |
| @@ -64,7 +64,7 @@ · 63 unmodified lines | ||
| 64 | 64 | #define MAX_PAGES_PER_CTRL_STRUCT_POOL 8 |
| 65 | 65 | #define BNX2I_RESERVED_SLOW_PATH_CMD_SLOTS 4 |
| 66 | 66 | |
| 67 | −#define BNX2I_5771X_DBELL_PAGE_SIZE 128 | |
| 67 | +#define BNX2X_DB_SHIFT 3 | |
| 68 | 68 | |
| 69 | 69 | /* 5706/08 hardware has limit on maximum buffer size per BD it can handle */ |
| 70 | 70 | #define MAX_BD_LENGTH 65535 |
| @@ -2738,8 +2738,7 @@ int bnx2i_map_ep_dbell_regs(struct bnx2i_endpoint *ep) · 2737 unmodified lines | ||
| 2738 | 2738 | if (test_bit(BNX2I_NX2_DEV_57710, &ep->hba->cnic_dev_type)) { |
| 2739 | 2739 | reg_base = pci_resource_start(ep->hba->pcidev, |
| 2740 | 2740 | BNX2X_DOORBELL_PCI_BAR); |
| 2741 | − reg_off = BNX2I_5771X_DBELL_PAGE_SIZE * (cid_num & 0x1FFFF) + | |
| 2742 | − DPM_TRIGER_TYPE; | |
| 2741 | + reg_off = (1 << BNX2X_DB_SHIFT) * (cid_num & 0x1FFFF); | |
| 2743 | 2742 | ep->qp.ctx_base = ioremap_nocache(reg_base + reg_off, 4); |
| 2744 | 2743 | goto arm_cq; |
| 2745 | 2744 | } |
| @@ -96,6 +96,15 @@ config COMEDI_SKEL · 95 unmodified lines | ||
| 96 | 96 | To compile this driver as a module, choose M here: the module will be |
| 97 | 97 | called skel. |
| 98 | 98 | |
| 99 | +config COMEDI_SSV_DNP | |
| 100 | + tristate "SSV Embedded Systems DIL/Net-PC support" | |
| 101 | + depends on X86_32 || COMPILE_TEST | |
| 102 | + ---help--- | |
| 103 | + Enable support for SSV Embedded Systems DIL/Net-PC | |
| 104 | + | |
| 105 | + To compile this driver as a module, choose M here: the module will be | |
| 106 | + called ssv_dnp. | |
| 107 | + | |
| 99 | 108 | endif # COMEDI_MISC_DRIVERS |
| 100 | 109 | |
| 101 | 110 | menuconfig COMEDI_ISA_DRIVERS |
| @@ -386,6 +395,14 @@ config COMEDI_DMM32AT · 284 unmodified lines | ||
| 386 | 395 | To compile this driver as a module, choose M here: the module will be |
| 387 | 396 | called dmm32at. |
| 388 | 397 | |
| 398 | +config COMEDI_UNIOXX5 | |
| 399 | + tristate "Fastwel UNIOxx-5 analog and digital io board support" | |
| 400 | + ---help--- | |
| 401 | + Enable support for Fastwel UNIOxx-5 (analog and digital i/o) boards | |
| 402 | + | |
| 403 | + To compile this driver as a module, choose M here: the module will be | |
| 404 | + called unioxx5. | |
| 405 | + | |
| 389 | 406 | config COMEDI_FL512 |
| 390 | 407 | tristate "FL512 ISA card support" |
| 391 | 408 | ---help--- |
| @@ -855,14 +872,6 @@ config COMEDI_DYNA_PCI10XX · 463 unmodified lines | ||
| 855 | 872 | To compile this driver as a module, choose M here: the module will be |
| 856 | 873 | called dyna_pci10xx. |
| 857 | 874 | |
| 858 | −config COMEDI_UNIOXX5 | |
| 859 | − tristate "Fastwel UNIOxx-5 analog and digital io board support" | |
| 860 | − ---help--- | |
| 861 | − Enable support for Fastwel UNIOxx-5 (analog and digital i/o) boards | |
| 862 | − | |
| 863 | − To compile this driver as a module, choose M here: the module will be | |
| 864 | − called unioxx5. | |
| 865 | − | |
| 866 | 875 | config COMEDI_GSC_HPDI |
| 867 | 876 | tristate "General Standards PCI-HPDI32 / PMC-HPDI32 support" |
| 868 | 877 | select COMEDI_FC |
| @@ -1085,14 +1094,6 @@ config COMEDI_S626 · 216 unmodified lines | ||
| 1085 | 1094 | To compile this driver as a module, choose M here: the module will be |
| 1086 | 1095 | called s626. |
| 1087 | 1096 | |
| 1088 | −config COMEDI_SSV_DNP | |
| 1089 | − tristate "SSV Embedded Systems DIL/Net-PC support" | |
| 1090 | − ---help--- | |
| 1091 | − Enable support for SSV Embedded Systems DIL/Net-PC | |
| 1092 | − | |
| 1093 | − To compile this driver as a module, choose M here: the module will be | |
| 1094 | − called ssv_dnp. | |
| 1095 | − | |
| 1096 | 1097 | config COMEDI_MITE |
| 1097 | 1098 | depends on HAS_DMA |
| 1098 | 1099 | tristate |
| @@ -369,28 +369,23 @@ static int ni_65xx_dio_insn_bits(struct comedi_device *dev, · 368 unmodified lines | ||
| 369 | 369 | { |
| 370 | 370 | const struct ni_65xx_board *board = comedi_board(dev); |
| 371 | 371 | struct ni_65xx_private *devpriv = dev->private; |
| 372 | − unsigned base_bitfield_channel; | |
| 373 | − const unsigned max_ports_per_bitfield = 5; | |
| 372 | + int base_bitfield_channel; | |
| 374 | 373 | unsigned read_bits = 0; |
| 375 | − unsigned j; | |
| 374 | + int last_port_offset = ni_65xx_port_by_channel(s->n_chan - 1); | |
| 375 | + int port_offset; | |
| 376 | 376 | |
| 377 | 377 | base_bitfield_channel = CR_CHAN(insn->chanspec); |
| 378 | − for (j = 0; j < max_ports_per_bitfield; ++j) { | |
| 379 | − const unsigned port_offset = | |
| 380 | − ni_65xx_port_by_channel(base_bitfield_channel) + j; | |
| 381 | − const unsigned port = | |
| 382 | − sprivate(s)->base_port + port_offset; | |
| 383 | − unsigned base_port_channel; | |
| 378 | + for (port_offset = ni_65xx_port_by_channel(base_bitfield_channel); | |
| 379 | + port_offset <= last_port_offset; port_offset++) { | |
| 380 | + unsigned port = sprivate(s)->base_port + port_offset; | |
| 381 | + int base_port_channel = port_offset * ni_65xx_channels_per_port; | |
| 384 | 382 | unsigned port_mask, port_data, port_read_bits; |
| 385 | − int bitshift; | |
| 386 | − if (port >= ni_65xx_total_num_ports(board)) | |
| 383 | + int bitshift = base_port_channel - base_bitfield_channel; | |
| 384 | + | |
| 385 | + if (bitshift >= 32) | |
| 387 | 386 | break; |
| 388 | − base_port_channel = port_offset * ni_65xx_channels_per_port; | |
| 389 | 387 | port_mask = data[0]; |
| 390 | 388 | port_data = data[1]; |
| 391 | − bitshift = base_port_channel - base_bitfield_channel; | |
| 392 | − if (bitshift >= 32 || bitshift <= -32) | |
| 393 | − break; | |
| 394 | 389 | if (bitshift > 0) { |
| 395 | 390 | port_mask >>= bitshift; |
| 396 | 391 | port_data >>= bitshift; |
| @@ -474,7 +474,7 @@ static void dgap_cleanup_board(struct board_t *brd) · 473 unmodified lines | ||
| 474 | 474 | |
| 475 | 475 | DGAP_LOCK(dgap_global_lock, flags); |
| 476 | 476 | brd->msgbuf = NULL; |
| 477 | − printk(brd->msgbuf_head); | |
| 477 | + printk("%s", brd->msgbuf_head); | |
| 478 | 478 | kfree(brd->msgbuf_head); |
| 479 | 479 | brd->msgbuf_head = NULL; |
| 480 | 480 | DGAP_UNLOCK(dgap_global_lock, flags); |
| @@ -628,7 +628,7 @@ static int dgap_found_board(struct pci_dev *pdev, int id) · 147 unmodified lines | ||
| 628 | 628 | DPR_INIT(("dgap_scan(%d) - printing out the msgbuf\n", i)); |
| 629 | 629 | DGAP_LOCK(dgap_global_lock, flags); |
| 630 | 630 | brd->msgbuf = NULL; |
| 631 | − printk(brd->msgbuf_head); | |
| 631 | + printk("%s", brd->msgbuf_head); | |
| 632 | 632 | kfree(brd->msgbuf_head); |
| 633 | 633 | brd->msgbuf_head = NULL; |
| 634 | 634 | DGAP_UNLOCK(dgap_global_lock, flags); |
| @@ -955,25 +955,28 @@ static void dgap_mbuf(struct board_t *brd, const char *fmt, ...) { · 320 unmodified lines | ||
| 955 | 955 | char buf[1024]; |
| 956 | 956 | int i; |
| 957 | 957 | unsigned long flags; |
| 958 | + size_t length; | |
| 958 | 959 | |
| 959 | 960 | DGAP_LOCK(dgap_global_lock, flags); |
| 960 | 961 | |
| 961 | 962 | /* Format buf using fmt and arguments contained in ap. */ |
| 962 | 963 | va_start(ap, fmt); |
| 963 | − i = vsprintf(buf, fmt, ap); | |
| 964 | + i = vsnprintf(buf, sizeof(buf), fmt, ap); | |
| 964 | 965 | va_end(ap); |
| 965 | 966 | |
| 966 | 967 | DPR((buf)); |
| 967 | 968 | |
| 968 | 969 | if (!brd || !brd->msgbuf) { |
| 969 | − printk(buf); | |
| 970 | + printk("%s", buf); | |
| 970 | 971 | DGAP_UNLOCK(dgap_global_lock, flags); |
| 971 | 972 | return; |
| 972 | 973 | } |
| 973 | 974 | |
| 974 | − memcpy(brd->msgbuf, buf, strlen(buf)); | |
| 975 | − brd->msgbuf += strlen(buf); | |
| 976 | − *brd->msgbuf = 0; | |
| 975 | + length = strlen(buf) + 1; | |
| 976 | + if (brd->msgbuf - brd->msgbuf_head < length) | |
| 977 | + length = brd->msgbuf - brd->msgbuf_head; | |
| 978 | + memcpy(brd->msgbuf, buf, length); | |
| 979 | + brd->msgbuf += length; | |
| 977 | 980 | |
| 978 | 981 | DGAP_UNLOCK(dgap_global_lock, flags); |
| 979 | 982 | } |
| @@ -454,7 +454,7 @@ static void dgnc_cleanup_board(struct board_t *brd) · 453 unmodified lines | ||
| 454 | 454 | |
| 455 | 455 | DGNC_LOCK(dgnc_global_lock, flags); |
| 456 | 456 | brd->msgbuf = NULL; |
| 457 | − printk(brd->msgbuf_head); | |
| 457 | + printk("%s", brd->msgbuf_head); | |
| 458 | 458 | kfree(brd->msgbuf_head); |
| 459 | 459 | brd->msgbuf_head = NULL; |
| 460 | 460 | DGNC_UNLOCK(dgnc_global_lock, flags); |
| @@ -710,7 +710,7 @@ static int dgnc_found_board(struct pci_dev *pdev, int id) · 249 unmodified lines | ||
| 710 | 710 | DPR_INIT(("dgnc_scan(%d) - printing out the msgbuf\n", i)); |
| 711 | 711 | DGNC_LOCK(dgnc_global_lock, flags); |
| 712 | 712 | brd->msgbuf = NULL; |
| 713 | − printk(brd->msgbuf_head); | |
| 713 | + printk("%s", brd->msgbuf_head); | |
| 714 | 714 | kfree(brd->msgbuf_head); |
| 715 | 715 | brd->msgbuf_head = NULL; |
| 716 | 716 | DGNC_UNLOCK(dgnc_global_lock, flags); |
| @@ -37,7 +37,7 @@ config IIO_SIMPLE_DUMMY_EVENTS · 36 unmodified lines | ||
| 37 | 37 | |
| 38 | 38 | config IIO_SIMPLE_DUMMY_BUFFER |
| 39 | 39 | boolean "Buffered capture support" |
| 40 | − depends on IIO_KFIFO_BUF | |
| 40 | + select IIO_KFIFO_BUF | |
| 41 | 41 | help |
| 42 | 42 | Add buffered data capture to the simple dummy driver. |
| 43 | 43 | |
| @@ -563,6 +563,7 @@ static int isl29018_probe(struct i2c_client *client, · 562 unmodified lines | ||
| 563 | 563 | mutex_init(&chip->lock); |
| 564 | 564 | |
| 565 | 565 | chip->lux_scale = 1; |
| 566 | + chip->lux_uscale = 0; | |
| 566 | 567 | chip->range = 1000; |
| 567 | 568 | chip->adc_bit = 16; |
| 568 | 569 | chip->suspended = false; |
| @@ -229,7 +229,7 @@ static int hmc5843_read_measurement(struct iio_dev *indio_dev, · 228 unmodified lines | ||
| 229 | 229 | if (result < 0) |
| 230 | 230 | return -EINVAL; |
| 231 | 231 | |
| 232 | − *val = result; | |
| 232 | + *val = sign_extend32(result, 15); | |
| 233 | 233 | return IIO_VAL_INT; |
| 234 | 234 | } |
| 235 | 235 | |
| @@ -299,7 +299,7 @@ static int ade7854_spi_probe(struct spi_device *spi) · 298 unmodified lines | ||
| 299 | 299 | if (ret) |
| 300 | 300 | iio_device_free(indio_dev); |
| 301 | 301 | |
| 302 | − return 0; | |
| 302 | + return ret; | |
| 303 | 303 | } |
| 304 | 304 | |
| 305 | 305 | static int ade7854_spi_remove(struct spi_device *spi) |
| @@ -41,7 +41,6 @@ struct imx_drm_device { · 40 unmodified lines | ||
| 41 | 41 | struct list_head encoder_list; |
| 42 | 42 | struct list_head connector_list; |
| 43 | 43 | struct mutex mutex; |
| 44 | − int references; | |
| 45 | 44 | int pipes; |
| 46 | 45 | struct drm_fbdev_cma *fbhelper; |
| 47 | 46 | }; |
| @@ -241,8 +240,6 @@ struct drm_device *imx_drm_device_get(void) · 193 unmodified lines | ||
| 241 | 240 | } |
| 242 | 241 | } |
| 243 | 242 | |
| 244 | − imxdrm->references++; | |
| 245 | − | |
| 246 | 243 | return imxdrm->drm; |
| 247 | 244 | |
| 248 | 245 | unwind_crtc: |
| @@ -280,8 +277,6 @@ void imx_drm_device_put(void) · 31 unmodified lines | ||
| 280 | 277 | list_for_each_entry(enc, &imxdrm->encoder_list, list) |
| 281 | 278 | module_put(enc->owner); |
| 282 | 279 | |
| 283 | − imxdrm->references--; | |
| 284 | − | |
| 285 | 280 | mutex_unlock(&imxdrm->mutex); |
| 286 | 281 | } |
| 287 | 282 | EXPORT_SYMBOL_GPL(imx_drm_device_put); |
| @@ -485,7 +480,7 @@ int imx_drm_add_crtc(struct drm_crtc *crtc, · 197 unmodified lines | ||
| 485 | 480 | |
| 486 | 481 | mutex_lock(&imxdrm->mutex); |
| 487 | 482 | |
| 488 | − if (imxdrm->references) { | |
| 483 | + if (imxdrm->drm->open_count) { | |
| 489 | 484 | ret = -EBUSY; |
| 490 | 485 | goto err_busy; |
| 491 | 486 | } |
| @@ -564,7 +559,7 @@ int imx_drm_add_encoder(struct drm_encoder *encoder, · 72 unmodified lines | ||
| 564 | 559 | |
| 565 | 560 | mutex_lock(&imxdrm->mutex); |
| 566 | 561 | |
| 567 | − if (imxdrm->references) { | |
| 562 | + if (imxdrm->drm->open_count) { | |
| 568 | 563 | ret = -EBUSY; |
| 569 | 564 | goto err_busy; |
| 570 | 565 | } |
| @@ -709,7 +704,7 @@ int imx_drm_add_connector(struct drm_connector *connector, · 138 unmodified lines | ||
| 709 | 704 | |
| 710 | 705 | mutex_lock(&imxdrm->mutex); |
| 711 | 706 | |
| 712 | − if (imxdrm->references) { | |
| 707 | + if (imxdrm->drm->open_count) { | |
| 713 | 708 | ret = -EBUSY; |
| 714 | 709 | goto err_busy; |
| 715 | 710 | } |
| @@ -244,13 +244,17 @@ static int snd_toneport_source_put(struct snd_kcontrol *kcontrol, · 243 unmodified lines | ||
| 244 | 244 | struct snd_line6_pcm *line6pcm = snd_kcontrol_chip(kcontrol); |
| 245 | 245 | struct usb_line6_toneport *toneport = |
| 246 | 246 | (struct usb_line6_toneport *)line6pcm->line6; |
| 247 | + unsigned int source; | |
| 247 | 248 | |
| 248 | − if (ucontrol->value.enumerated.item[0] == toneport->source) | |
| 249 | + source = ucontrol->value.enumerated.item[0]; | |
| 250 | + if (source >= ARRAY_SIZE(toneport_source_info)) | |
| 251 | + return -EINVAL; | |
| 252 | + if (source == toneport->source) | |
| 249 | 253 | return 0; |
| 250 | 254 | |
| 251 | − toneport->source = ucontrol->value.enumerated.item[0]; | |
| 255 | + toneport->source = source; | |
| 252 | 256 | toneport_send_cmd(toneport->line6.usbdev, |
| 253 | − toneport_source_info[toneport->source].code, 0x0000); | |
| 257 | + toneport_source_info[source].code, 0x0000); | |
| 254 | 258 | return 1; |
| 255 | 259 | } |
| 256 | 260 | |
| @@ -1802,7 +1802,7 @@ kiblnd_recv (lnet_ni_t *ni, void *private, lnet_msg_t *lntmsg, int delayed, · 1801 unmodified lines | ||
| 1802 | 1802 | int |
| 1803 | 1803 | kiblnd_thread_start(int (*fn)(void *arg), void *arg, char *name) |
| 1804 | 1804 | { |
| 1805 | − struct task_struct *task = kthread_run(fn, arg, name); | |
| 1805 | + struct task_struct *task = kthread_run(fn, arg, "%s", name); | |
| 1806 | 1806 | |
| 1807 | 1807 | if (IS_ERR(task)) |
| 1808 | 1808 | return PTR_ERR(task); |
| @@ -1005,7 +1005,7 @@ ksocknal_send(lnet_ni_t *ni, void *private, lnet_msg_t *lntmsg) · 1004 unmodified lines | ||
| 1005 | 1005 | int |
| 1006 | 1006 | ksocknal_thread_start(int (*fn)(void *arg), void *arg, char *name) |
| 1007 | 1007 | { |
| 1008 | − struct task_struct *task = kthread_run(fn, arg, name); | |
| 1008 | + struct task_struct *task = kthread_run(fn, arg, "%s", name); | |
| 1009 | 1009 | |
| 1010 | 1010 | if (IS_ERR(task)) |
| 1011 | 1011 | return PTR_ERR(task); |
| @@ -1,6 +1,6 @@ | ||
| 1 | 1 | config LUSTRE_FS |
| 2 | 2 | tristate "Lustre file system client support" |
| 3 | − depends on INET && m | |
| 3 | + depends on INET && m && !MIPS && !XTENSA && !SUPERH | |
| 4 | 4 | select LNET |
| 5 | 5 | select CRYPTO |
| 6 | 6 | select CRYPTO_CRC32 |
| @@ -52,7 +52,7 @@ config LUSTRE_DEBUG_EXPENSIVE_CHECK · 45 unmodified lines | ||
| 52 | 52 | config LUSTRE_TRANSLATE_ERRNOS |
| 53 | 53 | bool |
| 54 | 54 | depends on LUSTRE_FS && !X86 |
| 55 | − default true | |
| 55 | + default y | |
| 56 | 56 | |
| 57 | 57 | config LUSTRE_LLITE_LLOOP |
| 58 | 58 | bool "Lustre virtual block device" |
| @@ -800,9 +800,9 @@ static int ldlm_bl_thread_start(struct ldlm_bl_pool *blp) · 799 unmodified lines | ||
| 800 | 800 | |
| 801 | 801 | init_completion(&bltd.bltd_comp); |
| 802 | 802 | bltd.bltd_num = atomic_read(&blp->blp_num_threads); |
| 803 | − snprintf(bltd.bltd_name, sizeof(bltd.bltd_name) - 1, | |
| 803 | + snprintf(bltd.bltd_name, sizeof(bltd.bltd_name), | |
| 804 | 804 | "ldlm_bl_%02d", bltd.bltd_num); |
| 805 | − task = kthread_run(ldlm_bl_thread_main, &bltd, bltd.bltd_name); | |
| 805 | + task = kthread_run(ldlm_bl_thread_main, &bltd, "%s", bltd.bltd_name); | |
| 806 | 806 | if (IS_ERR(task)) { |
| 807 | 807 | CERROR("cannot start LDLM thread ldlm_bl_%02d: rc %ld\n", |
| 808 | 808 | atomic_read(&blp->blp_num_threads), PTR_ERR(task)); |
| @@ -397,7 +397,7 @@ cfs_wi_sched_create(char *name, struct cfs_cpt_table *cptab, · 396 unmodified lines | ||
| 397 | 397 | sched->ws_name, sched->ws_nthreads); |
| 398 | 398 | } |
| 399 | 399 | |
| 400 | − task = kthread_run(cfs_wi_scheduler, sched, name); | |
| 400 | + task = kthread_run(cfs_wi_scheduler, sched, "%s", name); | |
| 401 | 401 | if (!IS_ERR(task)) { |
| 402 | 402 | nthrs--; |
| 403 | 403 | continue; |
| @@ -1387,7 +1387,7 @@ echo_copyout_lsm (struct lov_stripe_md *lsm, void *_ulsm, int ulsm_nob) · 1386 unmodified lines | ||
| 1387 | 1387 | if (nob > ulsm_nob) |
| 1388 | 1388 | return (-EINVAL); |
| 1389 | 1389 | |
| 1390 | − if (copy_to_user (ulsm, lsm, sizeof(ulsm))) | |
| 1390 | + if (copy_to_user (ulsm, lsm, sizeof(*ulsm))) | |
| 1391 | 1391 | return (-EFAULT); |
| 1392 | 1392 | |
| 1393 | 1393 | for (i = 0; i < lsm->lsm_stripe_count; i++) { |
| @@ -383,8 +383,8 @@ int ptlrpc_start_pinger(void) · 382 unmodified lines | ||
| 383 | 383 | |
| 384 | 384 | /* CLONE_VM and CLONE_FILES just avoid a needless copy, because we |
| 385 | 385 | * just drop the VM and FILES in cfs_daemonize_ctxt() right away. */ |
| 386 | − rc = PTR_ERR(kthread_run(ptlrpc_pinger_main, | |
| 387 | − &pinger_thread, pinger_thread.t_name)); | |
| 386 | + rc = PTR_ERR(kthread_run(ptlrpc_pinger_main, &pinger_thread, | |
| 387 | + "%s", pinger_thread.t_name)); | |
| 388 | 388 | if (IS_ERR_VALUE(rc)) { |
| 389 | 389 | CERROR("cannot start thread: %d\n", rc); |
| 390 | 390 | return rc; |
| @@ -615,7 +615,7 @@ int ptlrpcd_start(int index, int max, const char *name, struct ptlrpcd_ctl *pc) · 614 unmodified lines | ||
| 615 | 615 | init_completion(&pc->pc_starting); |
| 616 | 616 | init_completion(&pc->pc_finishing); |
| 617 | 617 | spin_lock_init(&pc->pc_lock); |
| 618 | − strncpy(pc->pc_name, name, sizeof(pc->pc_name) - 1); | |
| 618 | + strlcpy(pc->pc_name, name, sizeof(pc->pc_name)); | |
| 619 | 619 | pc->pc_set = ptlrpc_prep_set(); |
| 620 | 620 | if (pc->pc_set == NULL) |
| 621 | 621 | GOTO(out, rc = -ENOMEM); |
| @@ -638,7 +638,7 @@ int ptlrpcd_start(int index, int max, const char *name, struct ptlrpcd_ctl *pc) · 16 unmodified lines | ||
| 638 | 638 | GOTO(out, rc); |
| 639 | 639 | } |
| 640 | 640 | |
| 641 | − task = kthread_run(ptlrpcd, pc, pc->pc_name); | |
| 641 | + task = kthread_run(ptlrpcd, pc, "%s", pc->pc_name); | |
| 642 | 642 | if (IS_ERR(task)) |
| 643 | 643 | GOTO(out, rc = PTR_ERR(task)); |
| 644 | 644 | |
| @@ -745,7 +745,7 @@ static int ptlrpcd_init(void) · 100 unmodified lines | ||
| 745 | 745 | if (ptlrpcds == NULL) |
| 746 | 746 | GOTO(out, rc = -ENOMEM); |
| 747 | 747 | |
| 748 | − snprintf(name, 15, "ptlrpcd_rcv"); | |
| 748 | + snprintf(name, sizeof(name), "ptlrpcd_rcv"); | |
| 749 | 749 | set_bit(LIOD_RECOVERY, &ptlrpcds->pd_thread_rcv.pc_flags); |
| 750 | 750 | rc = ptlrpcd_start(-1, nthreads, name, &ptlrpcds->pd_thread_rcv); |
| 751 | 751 | if (rc < 0) |
| @@ -764,7 +764,7 @@ static int ptlrpcd_init(void) · 12 unmodified lines | ||
| 764 | 764 | * unnecessary dependency. But how to distribute async RPCs load |
| 765 | 765 | * among all the ptlrpc daemons becomes another trouble. */ |
| 766 | 766 | for (i = 0; i < nthreads; i++) { |
| 767 | − snprintf(name, 15, "ptlrpcd_%d", i); | |
| 767 | + snprintf(name, sizeof(name), "ptlrpcd_%d", i); | |
| 768 | 768 | rc = ptlrpcd_start(i, nthreads, name, &ptlrpcds->pd_threads[i]); |
| 769 | 769 | if (rc < 0) |
| 770 | 770 | GOTO(out, rc); |
| @@ -59,8 +59,8 @@ · 58 unmodified lines | ||
| 59 | 59 | ****************************************/ |
| 60 | 60 | |
| 61 | 61 | |
| 62 | −#define PTRS_PER_PAGE (PAGE_CACHE_SIZE / sizeof(void *)) | |
| 63 | −#define PAGES_PER_POOL (PTRS_PER_PAGE) | |
| 62 | +#define POINTERS_PER_PAGE (PAGE_CACHE_SIZE / sizeof(void *)) | |
| 63 | +#define PAGES_PER_POOL (POINTERS_PER_PAGE) | |
| 64 | 64 | |
| 65 | 65 | #define IDLE_IDX_MAX (100) |
| 66 | 66 | #define IDLE_IDX_WEIGHT (3) |
| @@ -2718,15 +2718,15 @@ int ptlrpc_start_thread(struct ptlrpc_service_part *svcpt, int wait) · 2717 unmodified lines | ||
| 2718 | 2718 | spin_unlock(&svcpt->scp_lock); |
| 2719 | 2719 | |
| 2720 | 2720 | if (svcpt->scp_cpt >= 0) { |
| 2721 | − snprintf(thread->t_name, PTLRPC_THR_NAME_LEN, "%s%02d_%03d", | |
| 2721 | + snprintf(thread->t_name, sizeof(thread->t_name), "%s%02d_%03d", | |
| 2722 | 2722 | svc->srv_thread_name, svcpt->scp_cpt, thread->t_id); |
| 2723 | 2723 | } else { |
| 2724 | − snprintf(thread->t_name, PTLRPC_THR_NAME_LEN, "%s_%04d", | |
| 2724 | + snprintf(thread->t_name, sizeof(thread->t_name), "%s_%04d", | |
| 2725 | 2725 | svc->srv_thread_name, thread->t_id); |
| 2726 | 2726 | } |
| 2727 | 2727 | |
| 2728 | 2728 | CDEBUG(D_RPCTRACE, "starting thread '%s'\n", thread->t_name); |
| 2729 | − rc = PTR_ERR(kthread_run(ptlrpc_main, thread, thread->t_name)); | |
| 2729 | + rc = PTR_ERR(kthread_run(ptlrpc_main, thread, "%s", thread->t_name)); | |
| 2730 | 2730 | if (IS_ERR_VALUE(rc)) { |
| 2731 | 2731 | CERROR("cannot start thread '%s': rc %d\n", |
| 2732 | 2732 | thread->t_name, rc); |
| @@ -604,7 +604,7 @@ int cvmx_usb_initialize(struct cvmx_usb_state *state, int usb_port_number, · 603 unmodified lines | ||
| 604 | 604 | } |
| 605 | 605 | } |
| 606 | 606 | |
| 607 | − memset(usb, 0, sizeof(usb)); | |
| 607 | + memset(usb, 0, sizeof(*usb)); | |
| 608 | 608 | usb->init_flags = flags; |
| 609 | 609 | |
| 610 | 610 | /* Initialize the USB state structure */ |
| @@ -48,13 +48,8 @@ static int cvm_oct_fill_hw_skbuff(int pool, int size, int elements) · 47 unmodified lines | ||
| 48 | 48 | while (freed) { |
| 49 | 49 | |
| 50 | 50 | struct sk_buff *skb = dev_alloc_skb(size + 256); |
| 51 | − if (unlikely(skb == NULL)) { | |
| 52 | − pr_warning | |
| 53 | − ("Failed to allocate skb for hardware pool %d\n", | |
| 54 | − pool); | |
| 51 | + if (unlikely(skb == NULL)) | |
| 55 | 52 | break; |
| 56 | − } | |
| 57 | − | |
| 58 | 53 | skb_reserve(skb, 256 - (((unsigned long)skb->data) & 0x7f)); |
| 59 | 54 | *(struct sk_buff **)(skb->data - sizeof(void *)) = skb; |
| 60 | 55 | cvmx_fpa_free(skb->data, pool, DONT_WRITEBACK(size / 128)); |
| @@ -373,9 +373,7 @@ int cvm_oct_rgmii_init(struct net_device *dev) · 372 unmodified lines | ||
| 373 | 373 | * Enable interrupts on inband status changes |
| 374 | 374 | * for this port. |
| 375 | 375 | */ |
| 376 | − gmx_rx_int_en.u64 = | |
| 377 | − cvmx_read_csr(CVMX_GMXX_RXX_INT_EN | |
| 378 | − (index, interface)); | |
| 376 | + gmx_rx_int_en.u64 = 0; | |
| 379 | 377 | gmx_rx_int_en.s.phy_dupx = 1; |
| 380 | 378 | gmx_rx_int_en.s.phy_link = 1; |
| 381 | 379 | gmx_rx_int_en.s.phy_spd = 1; |
| @@ -303,6 +303,7 @@ static int cvm_oct_napi_poll(struct napi_struct *napi, int budget) · 302 unmodified lines | ||
| 303 | 303 | if (backlog > budget * cores_in_use && napi != NULL) |
| 304 | 304 | cvm_oct_enable_one_cpu(); |
| 305 | 305 | } |
| 306 | + rx_count++; | |
| 306 | 307 | |
| 307 | 308 | skb_in_hw = USE_SKBUFFS_IN_HW && work->word2.s.bufs == 1; |
| 308 | 309 | if (likely(skb_in_hw)) { |
| @@ -336,9 +337,6 @@ static int cvm_oct_napi_poll(struct napi_struct *napi, int budget) · 27 unmodified lines | ||
| 336 | 337 | */ |
| 337 | 338 | skb = dev_alloc_skb(work->len); |
| 338 | 339 | if (!skb) { |
| 339 | − printk_ratelimited("Port %d failed to allocate " | |
| 340 | − "skbuff, packet dropped\n", | |
| 341 | − work->ipprt); | |
| 342 | 340 | cvm_oct_free_work(work); |
| 343 | 341 | continue; |
| 344 | 342 | } |
| @@ -429,7 +427,6 @@ static int cvm_oct_napi_poll(struct napi_struct *napi, int budget) · 84 unmodified lines | ||
| 429 | 427 | #endif |
| 430 | 428 | } |
| 431 | 429 | netif_receive_skb(skb); |
| 432 | − rx_count++; | |
| 433 | 430 | } else { |
| 434 | 431 | /* Drop any packet received for a device that isn't up */ |
| 435 | 432 | /* |
| @@ -157,8 +157,8 @@ _func_enter_; · 156 unmodified lines | ||
| 157 | 157 | |
| 158 | 158 | *frlen = *frlen + (len + 2); |
| 159 | 159 | |
| 160 | − return pbuf + len + 2; | |
| 161 | 160 | _func_exit_; |
| 161 | + return pbuf + len + 2; | |
| 162 | 162 | } |
| 163 | 163 | |
| 164 | 164 | inline u8 *rtw_set_ie_ch_switch (u8 *buf, u32 *buf_len, u8 ch_switch_mode, |
| @@ -1827,13 +1827,13 @@ unsigned int OnAction_back(struct adapter *padapter, union recv_frame *precv_fra · 1826 unmodified lines | ||
| 1827 | 1827 | |
| 1828 | 1828 | #ifdef CONFIG_88EU_P2P |
| 1829 | 1829 | |
| 1830 | −static int get_reg_classes_full_count(struct p2p_channels channel_list) | |
| 1830 | +static int get_reg_classes_full_count(struct p2p_channels *channel_list) | |
| 1831 | 1831 | { |
| 1832 | 1832 | int cnt = 0; |
| 1833 | 1833 | int i; |
| 1834 | 1834 | |
| 1835 | − for (i = 0; i < channel_list.reg_classes; i++) { | |
| 1836 | − cnt += channel_list.reg_class[i].channels; | |
| 1835 | + for (i = 0; i < channel_list->reg_classes; i++) { | |
| 1836 | + cnt += channel_list->reg_class[i].channels; | |
| 1837 | 1837 | } |
| 1838 | 1838 | |
| 1839 | 1839 | return cnt; |
| @@ -2065,7 +2065,7 @@ void issue_p2p_GO_request(struct adapter *padapter, u8 *raddr) · 225 unmodified lines | ||
| 2065 | 2065 | /* + number of channels in all classes */ |
| 2066 | 2066 | len_channellist_attr = 3 |
| 2067 | 2067 | + (1 + 1) * (u16)(pmlmeext->channel_list.reg_classes) |
| 2068 | − + get_reg_classes_full_count(pmlmeext->channel_list); | |
| 2068 | + + get_reg_classes_full_count(&pmlmeext->channel_list); | |
| 2069 | 2069 | |
| 2070 | 2070 | *(__le16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr); |
| 2071 | 2071 | p2pielen += 2; |
| @@ -2437,7 +2437,7 @@ static void issue_p2p_GO_response(struct adapter *padapter, u8 *raddr, u8 *frame · 365 unmodified lines | ||
| 2437 | 2437 | /* + number of channels in all classes */ |
| 2438 | 2438 | len_channellist_attr = 3 |
| 2439 | 2439 | + (1 + 1) * (u16)pmlmeext->channel_list.reg_classes |
| 2440 | − + get_reg_classes_full_count(pmlmeext->channel_list); | |
| 2440 | + + get_reg_classes_full_count(&pmlmeext->channel_list); | |
| 2441 | 2441 | |
| 2442 | 2442 | *(__le16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr); |
| 2443 | 2443 | |
| @@ -2859,7 +2859,7 @@ void issue_p2p_invitation_request(struct adapter *padapter, u8 *raddr) · 415 unmodified lines | ||
| 2859 | 2859 | /* + number of channels in all classes */ |
| 2860 | 2860 | len_channellist_attr = 3 |
| 2861 | 2861 | + (1 + 1) * (u16)pmlmeext->channel_list.reg_classes |
| 2862 | − + get_reg_classes_full_count(pmlmeext->channel_list); | |
| 2862 | + + get_reg_classes_full_count(&pmlmeext->channel_list); | |
| 2863 | 2863 | |
| 2864 | 2864 | *(__le16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr); |
| 2865 | 2865 | |
| @@ -3120,7 +3120,7 @@ void issue_p2p_invitation_response(struct adapter *padapter, u8 *raddr, u8 dialo · 254 unmodified lines | ||
| 3120 | 3120 | /* + number of channels in all classes */ |
| 3121 | 3121 | len_channellist_attr = 3 |
| 3122 | 3122 | + (1 + 1) * (u16)pmlmeext->channel_list.reg_classes |
| 3123 | − + get_reg_classes_full_count(pmlmeext->channel_list); | |
| 3123 | + + get_reg_classes_full_count(&pmlmeext->channel_list); | |
| 3124 | 3124 | |
| 3125 | 3125 | *(__le16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr); |
| 3126 | 3126 | p2pielen += 2; |
| @@ -907,7 +907,7 @@ u32 mp_query_psd(struct adapter *pAdapter, u8 *data) · 906 unmodified lines | ||
| 907 | 907 | sscanf(data, "pts =%d, start =%d, stop =%d", &psd_pts, &psd_start, &psd_stop); |
| 908 | 908 | } |
| 909 | 909 | |
| 910 | − _rtw_memset(data, '\0', sizeof(data)); | |
| 910 | + _rtw_memset(data, '\0', sizeof(*data)); | |
| 911 | 911 | |
| 912 | 912 | i = psd_start; |
| 913 | 913 | while (i < psd_stop) { |
| @@ -631,7 +631,7 @@ void WMMOnAssocRsp(struct adapter *padapter) · 630 unmodified lines | ||
| 631 | 631 | inx[0] = 0; inx[1] = 1; inx[2] = 2; inx[3] = 3; |
| 632 | 632 | |
| 633 | 633 | if (pregpriv->wifi_spec == 1) { |
| 634 | − u32 j, tmp, change_inx; | |
| 634 | + u32 j, tmp, change_inx = false; | |
| 635 | 635 | |
| 636 | 636 | /* entry indx: 0->vo, 1->vi, 2->be, 3->bk. */ |
| 637 | 637 | for (i = 0; i < 4; i++) { |
| @@ -57,7 +57,7 @@ static void Init_ODM_ComInfo_88E(struct adapter *Adapter) · 56 unmodified lines | ||
| 57 | 57 | u8 cut_ver, fab_ver; |
| 58 | 58 | |
| 59 | 59 | /* Init Value */ |
| 60 | − _rtw_memset(dm_odm, 0, sizeof(dm_odm)); | |
| 60 | + _rtw_memset(dm_odm, 0, sizeof(*dm_odm)); | |
| 61 | 61 | |
| 62 | 62 | dm_odm->Adapter = Adapter; |
| 63 | 63 | |
| @@ -1010,7 +1010,7 @@ enum dm_dig_op { · 1009 unmodified lines | ||
| 1010 | 1010 | #define DM_false_ALARM_THRESH_LOW 400 |
| 1011 | 1011 | #define DM_false_ALARM_THRESH_HIGH 1000 |
| 1012 | 1012 | |
| 1013 | −#define DM_DIG_MAX_NIC 0x3e | |
| 1013 | +#define DM_DIG_MAX_NIC 0x4e | |
| 1014 | 1014 | #define DM_DIG_MIN_NIC 0x1e /* 0x22/0x1c */ |
| 1015 | 1015 | |
| 1016 | 1016 | #define DM_DIG_MAX_AP 0x32 |
| @@ -188,7 +188,7 @@ enum ChannelPlan { · 187 unmodified lines | ||
| 188 | 188 | |
| 189 | 189 | struct txpowerinfo24g { |
| 190 | 190 | u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; |
| 191 | − u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G-1]; | |
| 191 | + u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; | |
| 192 | 192 | /* If only one tx, only BW20 and OFDM are used. */ |
| 193 | 193 | s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT]; |
| 194 | 194 | s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; |
| @@ -870,6 +870,7 @@ static struct fwevent wlanevents[] = { · 869 unmodified lines | ||
| 870 | 870 | {0, NULL}, |
| 871 | 871 | {0, NULL}, |
| 872 | 872 | {0, &rtw_cpwm_event_callback}, |
| 873 | + {0, NULL}, | |
| 873 | 874 | }; |
| 874 | 875 | |
| 875 | 876 | #endif/* _RTL_MLME_EXT_C_ */ |
| @@ -6973,7 +6973,7 @@ static int rtw_mp_ctx(struct net_device *dev, · 6972 unmodified lines | ||
| 6973 | 6973 | stop = strncmp(extra, "stop", 4); |
| 6974 | 6974 | sscanf(extra, "count =%d, pkt", &count); |
| 6975 | 6975 | |
| 6976 | − _rtw_memset(extra, '\0', sizeof(extra)); | |
| 6976 | + _rtw_memset(extra, '\0', sizeof(*extra)); | |
| 6977 | 6977 | |
| 6978 | 6978 | if (stop == 0) { |
| 6979 | 6979 | bStartTest = 0; /* To set Stop */ |
| @@ -54,6 +54,7 @@ static struct usb_device_id rtw_usb_id_tbl[] = { · 53 unmodified lines | ||
| 54 | 54 | /*=== Customer ID ===*/ |
| 55 | 55 | /****** 8188EUS ********/ |
| 56 | 56 | {USB_DEVICE(0x8179, 0x07B8)}, /* Abocom - Abocom */ |
| 57 | + {USB_DEVICE(0x2001, 0x330F)}, /* DLink DWA-125 REV D1 */ | |
| 57 | 58 | {} /* Terminating entry */ |
| 58 | 59 | }; |
| 59 | 60 | |
| @@ -37,6 +37,8 @@ rt_status SendTxCommandPacket(struct net_device *dev, void *pData, u32 DataLen) · 36 unmodified lines | ||
| 37 | 37 | /* Get TCB and local buffer from common pool. |
| 38 | 38 | (It is shared by CmdQ, MgntQ, and USB coalesce DataQ) */ |
| 39 | 39 | skb = dev_alloc_skb(USB_HWDESC_HEADER_LEN + DataLen + 4); |
| 40 | + if (!skb) | |
| 41 | + return RT_STATUS_FAILURE; | |
| 40 | 42 | memcpy((unsigned char *)(skb->cb), &dev, sizeof(dev)); |
| 41 | 43 | tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); |
| 42 | 44 | tcb_desc->queue_index = TXCMD_QUEUE; |
| @@ -172,8 +172,8 @@ static u16 swGetOFDMControlRate(struct vnt_private *pDevice, u16 wRateIdx) · 171 unmodified lines | ||
| 172 | 172 | if (!CARDbIsOFDMinBasicRate(pDevice)) { |
| 173 | 173 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO |
| 174 | 174 | "swGetOFDMControlRate:(NO OFDM) %d\n", wRateIdx); |
| 175 | − if (wRateIdx > RATE_24M) | |
| 176 | − wRateIdx = RATE_24M; | |
| 175 | + if (wRateIdx > RATE_24M) | |
| 176 | + wRateIdx = RATE_24M; | |
| 177 | 177 | return wRateIdx; |
| 178 | 178 | } |
| 179 | 179 | |
| @@ -1634,6 +1634,9 @@ int iwctl_siwencodeext(struct net_device *dev, struct iw_request_info *info, · 1633 unmodified lines | ||
| 1634 | 1634 | if (pMgmt == NULL) |
| 1635 | 1635 | return -EFAULT; |
| 1636 | 1636 | |
| 1637 | + if (!(pDevice->flags & DEVICE_FLAGS_OPENED)) | |
| 1638 | + return -ENODEV; | |
| 1639 | + | |
| 1637 | 1640 | buf = kzalloc(sizeof(struct viawget_wpa_param), GFP_KERNEL); |
| 1638 | 1641 | if (buf == NULL) |
| 1639 | 1642 | return -ENOMEM; |
| @@ -1098,6 +1098,8 @@ static int device_close(struct net_device *dev) · 1097 unmodified lines | ||
| 1098 | 1098 | memset(pMgmt->abyCurrBSSID, 0, 6); |
| 1099 | 1099 | pMgmt->eCurrState = WMAC_STATE_IDLE; |
| 1100 | 1100 | |
| 1101 | + pDevice->flags &= ~DEVICE_FLAGS_OPENED; | |
| 1102 | + | |
| 1101 | 1103 | device_free_tx_bufs(pDevice); |
| 1102 | 1104 | device_free_rx_bufs(pDevice); |
| 1103 | 1105 | device_free_int_bufs(pDevice); |
| @@ -1109,7 +1111,6 @@ static int device_close(struct net_device *dev) · 5 unmodified lines | ||
| 1109 | 1111 | usb_free_urb(pDevice->pInterruptURB); |
| 1110 | 1112 | |
| 1111 | 1113 | BSSvClearNodeDBTable(pDevice, 0); |
| 1112 | − pDevice->flags &=(~DEVICE_FLAGS_OPENED); | |
| 1113 | 1114 | |
| 1114 | 1115 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "device_close2 \n"); |
| 1115 | 1116 | |
| @@ -148,6 +148,8 @@ static void *s_vGetFreeContext(struct vnt_private *pDevice) · 147 unmodified lines | ||
| 148 | 148 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"GetFreeContext()\n"); |
| 149 | 149 | |
| 150 | 150 | for (ii = 0; ii < pDevice->cbTD; ii++) { |
| 151 | + if (!pDevice->apTD[ii]) | |
| 152 | + return NULL; | |
| 151 | 153 | pContext = pDevice->apTD[ii]; |
| 152 | 154 | if (pContext->bBoolInUse == false) { |
| 153 | 155 | pContext->bBoolInUse = true; |
| @@ -2054,7 +2054,7 @@ static int xillybus_init_chrdev(struct xilly_endpoint *endpoint, · 2053 unmodified lines | ||
| 2054 | 2054 | NULL, |
| 2055 | 2055 | MKDEV(major, i), |
| 2056 | 2056 | NULL, |
| 2057 | − devname); | |
| 2057 | + "%s", devname); | |
| 2058 | 2058 | |
| 2059 | 2059 | if (IS_ERR(device)) { |
| 2060 | 2060 | pr_warn("xillybus: Failed to create %s " |
| @@ -981,4 +981,3 @@ MODULE_PARM_DESC(num_devices, "Number of zram devices"); · 980 unmodified lines | ||
| 981 | 981 | MODULE_LICENSE("Dual BSD/GPL"); |
| 982 | 982 | MODULE_AUTHOR("Nitin Gupta <ngupta@vflare.org>"); |
| 983 | 983 | MODULE_DESCRIPTION("Compressed RAM Block Device"); |
| 984 | −MODULE_ALIAS("devname:zram"); | |
| @@ -753,7 +753,8 @@ static void iscsit_unmap_iovec(struct iscsi_cmd *cmd) · 752 unmodified lines | ||
| 753 | 753 | |
| 754 | 754 | static void iscsit_ack_from_expstatsn(struct iscsi_conn *conn, u32 exp_statsn) |
| 755 | 755 | { |
| 756 | − struct iscsi_cmd *cmd; | |
| 756 | + LIST_HEAD(ack_list); | |
| 757 | + struct iscsi_cmd *cmd, *cmd_p; | |
| 757 | 758 | |
| 758 | 759 | conn->exp_statsn = exp_statsn; |
| 759 | 760 | |
| @@ -761,19 +762,23 @@ static void iscsit_ack_from_expstatsn(struct iscsi_conn *conn, u32 exp_statsn) · 1 unmodified line | ||
| 761 | 762 | return; |
| 762 | 763 | |
| 763 | 764 | spin_lock_bh(&conn->cmd_lock); |
| 764 | − list_for_each_entry(cmd, &conn->conn_cmd_list, i_conn_node) { | |
| 765 | + list_for_each_entry_safe(cmd, cmd_p, &conn->conn_cmd_list, i_conn_node) { | |
| 765 | 766 | spin_lock(&cmd->istate_lock); |
| 766 | 767 | if ((cmd->i_state == ISTATE_SENT_STATUS) && |
| 767 | 768 | iscsi_sna_lt(cmd->stat_sn, exp_statsn)) { |
| 768 | 769 | cmd->i_state = ISTATE_REMOVE; |
| 769 | 770 | spin_unlock(&cmd->istate_lock); |
| 770 | − iscsit_add_cmd_to_immediate_queue(cmd, conn, | |
| 771 | − cmd->i_state); | |
| 771 | + list_move_tail(&cmd->i_conn_node, &ack_list); | |
| 772 | 772 | continue; |
| 773 | 773 | } |
| 774 | 774 | spin_unlock(&cmd->istate_lock); |
| 775 | 775 | } |
| 776 | 776 | spin_unlock_bh(&conn->cmd_lock); |
| 777 | + | |
| 778 | + list_for_each_entry_safe(cmd, cmd_p, &ack_list, i_conn_node) { | |
| 779 | + list_del(&cmd->i_conn_node); | |
| 780 | + iscsit_free_cmd(cmd, false); | |
| 781 | + } | |
| 777 | 782 | } |
| 778 | 783 | |
| 779 | 784 | static int iscsit_allocate_iovecs(struct iscsi_cmd *cmd) |
| @@ -1192,7 +1192,7 @@ get_target: · 1191 unmodified lines | ||
| 1192 | 1192 | */ |
| 1193 | 1193 | alloc_tags: |
| 1194 | 1194 | tag_num = max_t(u32, ISCSIT_MIN_TAGS, queue_depth); |
| 1195 | − tag_num += ISCSIT_EXTRA_TAGS; | |
| 1195 | + tag_num += (tag_num / 2) + ISCSIT_EXTRA_TAGS; | |
| 1196 | 1196 | tag_size = sizeof(struct iscsi_cmd) + conn->conn_transport->priv_size; |
| 1197 | 1197 | |
| 1198 | 1198 | ret = transport_alloc_session_tags(sess->se_sess, tag_num, tag_size); |
| @@ -736,7 +736,7 @@ void iscsit_free_cmd(struct iscsi_cmd *cmd, bool shutdown) · 735 unmodified lines | ||
| 736 | 736 | * Fallthrough |
| 737 | 737 | */ |
| 738 | 738 | case ISCSI_OP_SCSI_TMFUNC: |
| 739 | − rc = transport_generic_free_cmd(&cmd->se_cmd, 1); | |
| 739 | + rc = transport_generic_free_cmd(&cmd->se_cmd, shutdown); | |
| 740 | 740 | if (!rc && shutdown && se_cmd && se_cmd->se_sess) { |
| 741 | 741 | __iscsit_free_cmd(cmd, true, shutdown); |
| 742 | 742 | target_put_sess_cmd(se_cmd->se_sess, se_cmd); |
| @@ -752,7 +752,7 @@ void iscsit_free_cmd(struct iscsi_cmd *cmd, bool shutdown) · 9 unmodified lines | ||
| 752 | 752 | se_cmd = &cmd->se_cmd; |
| 753 | 753 | __iscsit_free_cmd(cmd, true, shutdown); |
| 754 | 754 | |
| 755 | − rc = transport_generic_free_cmd(&cmd->se_cmd, 1); | |
| 755 | + rc = transport_generic_free_cmd(&cmd->se_cmd, shutdown); | |
| 756 | 756 | if (!rc && shutdown && se_cmd->se_sess) { |
| 757 | 757 | __iscsit_free_cmd(cmd, true, shutdown); |
| 758 | 758 | target_put_sess_cmd(se_cmd->se_sess, se_cmd); |
| @@ -349,7 +349,16 @@ static sense_reason_t compare_and_write_post(struct se_cmd *cmd) · 348 unmodified lines | ||
| 349 | 349 | { |
| 350 | 350 | struct se_device *dev = cmd->se_dev; |
| 351 | 351 | |
| 352 | − cmd->se_cmd_flags |= SCF_COMPARE_AND_WRITE_POST; | |
| 352 | + /* | |
| 353 | + * Only set SCF_COMPARE_AND_WRITE_POST to force a response fall-through | |
| 354 | + * within target_complete_ok_work() if the command was successfully | |
| 355 | + * sent to the backend driver. | |
| 356 | + */ | |
| 357 | + spin_lock_irq(&cmd->t_state_lock); | |
| 358 | + if ((cmd->transport_state & CMD_T_SENT) && !cmd->scsi_status) | |
| 359 | + cmd->se_cmd_flags |= SCF_COMPARE_AND_WRITE_POST; | |
| 360 | + spin_unlock_irq(&cmd->t_state_lock); | |
| 361 | + | |
| 353 | 362 | /* |
| 354 | 363 | * Unlock ->caw_sem originally obtained during sbc_compare_and_write() |
| 355 | 364 | * before the original READ I/O submission. |
| @@ -363,7 +372,7 @@ static sense_reason_t compare_and_write_callback(struct se_cmd *cmd) · 7 unmodified lines | ||
| 363 | 372 | { |
| 364 | 373 | struct se_device *dev = cmd->se_dev; |
| 365 | 374 | struct scatterlist *write_sg = NULL, *sg; |
| 366 | − unsigned char *buf, *addr; | |
| 375 | + unsigned char *buf = NULL, *addr; | |
| 367 | 376 | struct sg_mapping_iter m; |
| 368 | 377 | unsigned int offset = 0, len; |
| 369 | 378 | unsigned int nlbas = cmd->t_task_nolb; |
| @@ -378,6 +387,15 @@ static sense_reason_t compare_and_write_callback(struct se_cmd *cmd) · 8 unmodified lines | ||
| 378 | 387 | */ |
| 379 | 388 | if (!cmd->t_data_sg || !cmd->t_bidi_data_sg) |
| 380 | 389 | return TCM_NO_SENSE; |
| 390 | + /* | |
| 391 | + * Immediately exit + release dev->caw_sem if command has already | |
| 392 | + * been failed with a non-zero SCSI status. | |
| 393 | + */ | |
| 394 | + if (cmd->scsi_status) { | |
| 395 | + pr_err("compare_and_write_callback: non zero scsi_status:" | |
| 396 | + " 0x%02x\n", cmd->scsi_status); | |
| 397 | + goto out; | |
| 398 | + } | |
| 381 | 399 | |
| 382 | 400 | buf = kzalloc(cmd->data_length, GFP_KERNEL); |
| 383 | 401 | if (!buf) { |
| @@ -508,6 +526,12 @@ sbc_compare_and_write(struct se_cmd *cmd) · 124 unmodified lines | ||
| 508 | 526 | cmd->transport_complete_callback = NULL; |
| 509 | 527 | return TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE; |
| 510 | 528 | } |
| 529 | + /* | |
| 530 | + * Reset cmd->data_length to individual block_size in order to not | |
| 531 | + * confuse backend drivers that depend on this value matching the | |
| 532 | + * size of the I/O being submitted. | |
| 533 | + */ | |
| 534 | + cmd->data_length = cmd->t_task_nolb * dev->dev_attrib.block_size; | |
| 511 | 535 | |
| 512 | 536 | ret = cmd->execute_rw(cmd, cmd->t_bidi_data_sg, cmd->t_bidi_data_nents, |
| 513 | 537 | DMA_FROM_DEVICE); |
| @@ -236,17 +236,24 @@ int transport_alloc_session_tags(struct se_session *se_sess, · 235 unmodified lines | ||
| 236 | 236 | { |
| 237 | 237 | int rc; |
| 238 | 238 | |
| 239 | − se_sess->sess_cmd_map = kzalloc(tag_num * tag_size, GFP_KERNEL); | |
| 239 | + se_sess->sess_cmd_map = kzalloc(tag_num * tag_size, | |
| 240 | + GFP_KERNEL | __GFP_NOWARN | __GFP_REPEAT); | |
| 240 | 241 | if (!se_sess->sess_cmd_map) { |
| 241 | − pr_err("Unable to allocate se_sess->sess_cmd_map\n"); | |
| 242 | − return -ENOMEM; | |
| 242 | + se_sess->sess_cmd_map = vzalloc(tag_num * tag_size); | |
| 243 | + if (!se_sess->sess_cmd_map) { | |
| 244 | + pr_err("Unable to allocate se_sess->sess_cmd_map\n"); | |
| 245 | + return -ENOMEM; | |
| 246 | + } | |
| 243 | 247 | } |
| 244 | 248 | |
| 245 | 249 | rc = percpu_ida_init(&se_sess->sess_tag_pool, tag_num); |
| 246 | 250 | if (rc < 0) { |
| 247 | 251 | pr_err("Unable to init se_sess->sess_tag_pool," |
| 248 | 252 | " tag_num: %u\n", tag_num); |
| 249 | − kfree(se_sess->sess_cmd_map); | |
| 253 | + if (is_vmalloc_addr(se_sess->sess_cmd_map)) | |
| 254 | + vfree(se_sess->sess_cmd_map); | |
| 255 | + else | |
| 256 | + kfree(se_sess->sess_cmd_map); | |
| 250 | 257 | se_sess->sess_cmd_map = NULL; |
| 251 | 258 | return -ENOMEM; |
| 252 | 259 | } |
| @@ -412,7 +419,10 @@ void transport_free_session(struct se_session *se_sess) · 159 unmodified lines | ||
| 412 | 419 | { |
| 413 | 420 | if (se_sess->sess_cmd_map) { |
| 414 | 421 | percpu_ida_destroy(&se_sess->sess_tag_pool); |
| 415 | − kfree(se_sess->sess_cmd_map); | |
| 422 | + if (is_vmalloc_addr(se_sess->sess_cmd_map)) | |
| 423 | + vfree(se_sess->sess_cmd_map); | |
| 424 | + else | |
| 425 | + kfree(se_sess->sess_cmd_map); | |
| 416 | 426 | } |
| 417 | 427 | kmem_cache_free(se_sess_cache, se_sess); |
| 418 | 428 | } |
| @@ -298,8 +298,8 @@ static int target_xcopy_parse_segdesc_02(struct se_cmd *se_cmd, struct xcopy_op · 297 unmodified lines | ||
| 298 | 298 | (unsigned long long)xop->dst_lba); |
| 299 | 299 | |
| 300 | 300 | if (dc != 0) { |
| 301 | − xop->dbl = (desc[29] << 16) & 0xff; | |
| 302 | − xop->dbl |= (desc[30] << 8) & 0xff; | |
| 301 | + xop->dbl = (desc[29] & 0xff) << 16; | |
| 302 | + xop->dbl |= (desc[30] & 0xff) << 8; | |
| 303 | 303 | xop->dbl |= desc[31] & 0xff; |
| 304 | 304 | |
| 305 | 305 | pr_debug("XCOPY seg desc 0x02: DC=1 w/ dbl: %u\n", xop->dbl); |
| @@ -636,6 +636,7 @@ struct console xenboot_console = { · 635 unmodified lines | ||
| 636 | 636 | .name = "xenboot", |
| 637 | 637 | .write = xenboot_write_console, |
| 638 | 638 | .flags = CON_PRINTBUFFER | CON_BOOT | CON_ANYTIME, |
| 639 | + .index = -1, | |
| 639 | 640 | }; |
| 640 | 641 | #endif /* CONFIG_EARLY_PRINTK */ |
| 641 | 642 | |
| @@ -1758,8 +1758,7 @@ static void n_tty_set_termios(struct tty_struct *tty, struct ktermios *old) · 1757 unmodified lines | ||
| 1758 | 1758 | canon_change = (old->c_lflag ^ tty->termios.c_lflag) & ICANON; |
| 1759 | 1759 | if (canon_change) { |
| 1760 | 1760 | bitmap_zero(ldata->read_flags, N_TTY_BUF_SIZE); |
| 1761 | − ldata->line_start = 0; | |
| 1762 | − ldata->canon_head = ldata->read_tail; | |
| 1761 | + ldata->line_start = ldata->canon_head = ldata->read_tail; | |
| 1763 | 1762 | ldata->erasing = 0; |
| 1764 | 1763 | ldata->lnext = 0; |
| 1765 | 1764 | } |
| @@ -2184,28 +2183,34 @@ static ssize_t n_tty_read(struct tty_struct *tty, struct file *file, · 418 unmodified lines | ||
| 2184 | 2183 | |
| 2185 | 2184 | if (!input_available_p(tty, 0)) { |
| 2186 | 2185 | if (test_bit(TTY_OTHER_CLOSED, &tty->flags)) { |
| 2187 | − retval = -EIO; | |
| 2188 | − break; | |
| 2189 | − } | |
| 2190 | − if (tty_hung_up_p(file)) | |
| 2191 | − break; | |
| 2192 | − if (!timeout) | |
| 2193 | − break; | |
| 2194 | − if (file->f_flags & O_NONBLOCK) { | |
| 2195 | − retval = -EAGAIN; | |
| 2196 | − break; | |
| 2197 | − } | |
| 2198 | − if (signal_pending(current)) { | |
| 2199 | − retval = -ERESTARTSYS; | |
| 2200 | − break; | |
| 2201 | − } | |
| 2202 | − n_tty_set_room(tty); | |
| 2203 | − up_read(&tty->termios_rwsem); | |
| 2186 | + up_read(&tty->termios_rwsem); | |
| 2187 | + tty_flush_to_ldisc(tty); | |
| 2188 | + down_read(&tty->termios_rwsem); | |
| 2189 | + if (!input_available_p(tty, 0)) { | |
| 2190 | + retval = -EIO; | |
| 2191 | + break; | |
| 2192 | + } | |
| 2193 | + } else { | |
| 2194 | + if (tty_hung_up_p(file)) | |
| 2195 | + break; | |
| 2196 | + if (!timeout) | |
| 2197 | + break; | |
| 2198 | + if (file->f_flags & O_NONBLOCK) { | |
| 2199 | + retval = -EAGAIN; | |
| 2200 | + break; | |
| 2201 | + } | |
| 2202 | + if (signal_pending(current)) { | |
| 2203 | + retval = -ERESTARTSYS; | |
| 2204 | + break; | |
| 2205 | + } | |
| 2206 | + n_tty_set_room(tty); | |
| 2207 | + up_read(&tty->termios_rwsem); | |
| 2204 | 2208 | |
| 2205 | − timeout = schedule_timeout(timeout); | |
| 2209 | + timeout = schedule_timeout(timeout); | |
| 2206 | 2210 | |
| 2207 | − down_read(&tty->termios_rwsem); | |
| 2208 | − continue; | |
| 2211 | + down_read(&tty->termios_rwsem); | |
| 2212 | + continue; | |
| 2213 | + } | |
| 2209 | 2214 | } |
| 2210 | 2215 | __set_current_state(TASK_RUNNING); |
| 2211 | 2216 | |
| @@ -667,30 +667,21 @@ static int pop_tx_x(struct eg20t_port *priv, unsigned char *buf) · 666 unmodified lines | ||
| 667 | 667 | |
| 668 | 668 | static int dma_push_rx(struct eg20t_port *priv, int size) |
| 669 | 669 | { |
| 670 | − struct tty_struct *tty; | |
| 671 | 670 | int room; |
| 672 | 671 | struct uart_port *port = &priv->port; |
| 673 | 672 | struct tty_port *tport = &port->state->port; |
| 674 | 673 | |
| 675 | − port = &priv->port; | |
| 676 | − tty = tty_port_tty_get(tport); | |
| 677 | − if (!tty) { | |
| 678 | − dev_dbg(priv->port.dev, "%s:tty is busy now", __func__); | |
| 679 | − return 0; | |
| 680 | − } | |
| 681 | − | |
| 682 | 674 | room = tty_buffer_request_room(tport, size); |
| 683 | 675 | |
| 684 | 676 | if (room < size) |
| 685 | 677 | dev_warn(port->dev, "Rx overrun: dropping %u bytes\n", |
| 686 | 678 | size - room); |
| 687 | 679 | if (!room) |
| 688 | − return room; | |
| 680 | + return 0; | |
| 689 | 681 | |
| 690 | 682 | tty_insert_flip_string(tport, sg_virt(&priv->sg_rx), size); |
| 691 | 683 | |
| 692 | 684 | port->icount.rx += room; |
| 693 | − tty_kref_put(tty); | |
| 694 | 685 | |
| 695 | 686 | return room; |
| 696 | 687 | } |
| @@ -1098,6 +1089,8 @@ static void pch_uart_err_ir(struct eg20t_port *priv, unsigned int lsr) · 401 unmodified lines | ||
| 1098 | 1089 | if (tty == NULL) { |
| 1099 | 1090 | for (i = 0; error_msg[i] != NULL; i++) |
| 1100 | 1091 | dev_err(&priv->pdev->dev, error_msg[i]); |
| 1092 | + } else { | |
| 1093 | + tty_kref_put(tty); | |
| 1101 | 1094 | } |
| 1102 | 1095 | } |
| 1103 | 1096 | |
| @@ -732,7 +732,7 @@ static irqreturn_t tegra_uart_isr(int irq, void *data) · 731 unmodified lines | ||
| 732 | 732 | static void tegra_uart_stop_rx(struct uart_port *u) |
| 733 | 733 | { |
| 734 | 734 | struct tegra_uart_port *tup = to_tegra_uport(u); |
| 735 | − struct tty_struct *tty = tty_port_tty_get(&tup->uport.state->port); | |
| 735 | + struct tty_struct *tty; | |
| 736 | 736 | struct tty_port *port = &u->state->port; |
| 737 | 737 | struct dma_tx_state state; |
| 738 | 738 | unsigned long ier; |
| @@ -744,6 +744,8 @@ static void tegra_uart_stop_rx(struct uart_port *u) · 5 unmodified lines | ||
| 744 | 744 | if (!tup->rx_in_progress) |
| 745 | 745 | return; |
| 746 | 746 | |
| 747 | + tty = tty_port_tty_get(&tup->uport.state->port); | |
| 748 | + | |
| 747 | 749 | tegra_uart_wait_sym_time(tup, 1); /* wait a character interval */ |
| 748 | 750 | |
| 749 | 751 | ier = tup->ier_shadow; |
| @@ -1201,6 +1201,9 @@ int n_tty_ioctl_helper(struct tty_struct *tty, struct file *file, · 1200 unmodified lines | ||
| 1201 | 1201 | } |
| 1202 | 1202 | return 0; |
| 1203 | 1203 | case TCFLSH: |
| 1204 | + retval = tty_check_change(tty); | |
| 1205 | + if (retval) | |
| 1206 | + return retval; | |
| 1204 | 1207 | return __tty_perform_flush(tty, arg); |
| 1205 | 1208 | default: |
| 1206 | 1209 | /* Try the mode commands */ |
| @@ -1,6 +1,6 @@ | ||
| 1 | 1 | config USB_CHIPIDEA |
| 2 | 2 | tristate "ChipIdea Highspeed Dual Role Controller" |
| 3 | − depends on (USB_EHCI_HCD && USB_GADGET) || (USB_EHCI_HCD && !USB_GADGET) || (!USB_EHCI_HCD && USB_GADGET) | |
| 3 | + depends on ((USB_EHCI_HCD && USB_GADGET) || (USB_EHCI_HCD && !USB_GADGET) || (!USB_EHCI_HCD && USB_GADGET)) && HAS_DMA | |
| 4 | 4 | help |
| 5 | 5 | Say Y here if your system has a dual role high speed USB |
| 6 | 6 | controller based on ChipIdea silicon IP. Currently, only the |
| @@ -131,7 +131,7 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev) · 130 unmodified lines | ||
| 131 | 131 | if (ret) { |
| 132 | 132 | dev_err(&pdev->dev, "usbmisc init failed, ret=%d\n", |
| 133 | 133 | ret); |
| 134 | − goto err_clk; | |
| 134 | + goto err_phy; | |
| 135 | 135 | } |
| 136 | 136 | } |
| 137 | 137 | |
| @@ -143,7 +143,7 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev) · 5 unmodified lines | ||
| 143 | 143 | dev_err(&pdev->dev, |
| 144 | 144 | "Can't register ci_hdrc platform device, err=%d\n", |
| 145 | 145 | ret); |
| 146 | − goto err_clk; | |
| 146 | + goto err_phy; | |
| 147 | 147 | } |
| 148 | 148 | |
| 149 | 149 | if (data->usbmisc_data) { |
| @@ -164,6 +164,9 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev) · 14 unmodified lines | ||
| 164 | 164 | |
| 165 | 165 | disable_device: |
| 166 | 166 | ci_hdrc_remove_device(data->ci_pdev); |
| 167 | +err_phy: | |
| 168 | + if (data->phy) | |
| 169 | + usb_phy_shutdown(data->phy); | |
| 167 | 170 | err_clk: |
| 168 | 171 | clk_disable_unprepare(data->clk); |
| 169 | 172 | return ret; |
| @@ -129,7 +129,12 @@ static DEFINE_PCI_DEVICE_TABLE(ci_hdrc_pci_id_table) = { · 128 unmodified lines | ||
| 129 | 129 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0829), |
| 130 | 130 | .driver_data = (kernel_ulong_t)&penwell_pci_platdata, |
| 131 | 131 | }, |
| 132 | − { 0, 0, 0, 0, 0, 0, 0 /* end: all zeroes */ } | |
| 132 | + { | |
| 133 | + /* Intel Clovertrail */ | |
| 134 | + PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xe006), | |
| 135 | + .driver_data = (kernel_ulong_t)&penwell_pci_platdata, | |
| 136 | + }, | |
| 137 | + { 0 } /* end: all zeroes */ | |
| 133 | 138 | }; |
| 134 | 139 | MODULE_DEVICE_TABLE(pci, ci_hdrc_pci_id_table); |
| 135 | 140 | |
| @@ -605,6 +605,7 @@ static int ci_hdrc_remove(struct platform_device *pdev) · 604 unmodified lines | ||
| 605 | 605 | dbg_remove_files(ci); |
| 606 | 606 | free_irq(ci->irq, ci); |
| 607 | 607 | ci_role_destroy(ci); |
| 608 | + kfree(ci->hw_bank.regmap); | |
| 608 | 609 | |
| 609 | 610 | return 0; |
| 610 | 611 | } |
| @@ -1600,6 +1600,8 @@ static void destroy_eps(struct ci_hdrc *ci) · 1599 unmodified lines | ||
| 1600 | 1600 | for (i = 0; i < ci->hw_ep_max; i++) { |
| 1601 | 1601 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; |
| 1602 | 1602 | |
| 1603 | + if (hwep->pending_td) | |
| 1604 | + free_pending_td(hwep); | |
| 1603 | 1605 | dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma); |
| 1604 | 1606 | } |
| 1605 | 1607 | } |
| @@ -1667,13 +1669,13 @@ static int ci_udc_stop(struct usb_gadget *gadget, · 61 unmodified lines | ||
| 1667 | 1669 | if (ci->platdata->notify_event) |
| 1668 | 1670 | ci->platdata->notify_event(ci, |
| 1669 | 1671 | CI_HDRC_CONTROLLER_STOPPED_EVENT); |
| 1670 | − ci->driver = NULL; | |
| 1671 | 1672 | spin_unlock_irqrestore(&ci->lock, flags); |
| 1672 | 1673 | _gadget_stop_activity(&ci->gadget); |
| 1673 | 1674 | spin_lock_irqsave(&ci->lock, flags); |
| 1674 | 1675 | pm_runtime_put(&ci->gadget.dev); |
| 1675 | 1676 | } |
| 1676 | 1677 | |
| 1678 | + ci->driver = NULL; | |
| 1677 | 1679 | spin_unlock_irqrestore(&ci->lock, flags); |
| 1678 | 1680 | |
| 1679 | 1681 | return 0; |
| @@ -742,6 +742,22 @@ static int check_ctrlrecip(struct dev_state *ps, unsigned int requesttype, · 741 unmodified lines | ||
| 742 | 742 | if ((index & ~USB_DIR_IN) == 0) |
| 743 | 743 | return 0; |
| 744 | 744 | ret = findintfep(ps->dev, index); |
| 745 | + if (ret < 0) { | |
| 746 | + /* | |
| 747 | + * Some not fully compliant Win apps seem to get | |
| 748 | + * index wrong and have the endpoint number here | |
| 749 | + * rather than the endpoint address (with the | |
| 750 | + * correct direction). Win does let this through, | |
| 751 | + * so we'll not reject it here but leave it to | |
| 752 | + * the device to not break KVM. But we warn. | |
| 753 | + */ | |
| 754 | + ret = findintfep(ps->dev, index ^ 0x80); | |
| 755 | + if (ret >= 0) | |
| 756 | + dev_info(&ps->dev->dev, | |
| 757 | + "%s: process %i (%s) requesting ep %02x but needs %02x\n", | |
| 758 | + __func__, task_pid_nr(current), | |
| 759 | + current->comm, index, index ^ 0x80); | |
| 760 | + } | |
| 745 | 761 | if (ret >= 0) |
| 746 | 762 | ret = checkintf(ps, ret); |
| 747 | 763 | break; |
| @@ -3426,6 +3426,9 @@ static int usb_req_set_sel(struct usb_device *udev, enum usb3_link_state state) · 3425 unmodified lines | ||
| 3426 | 3426 | unsigned long long u2_pel; |
| 3427 | 3427 | int ret; |
| 3428 | 3428 | |
| 3429 | + if (udev->state != USB_STATE_CONFIGURED) | |
| 3430 | + return 0; | |
| 3431 | + | |
| 3429 | 3432 | /* Convert SEL and PEL stored in ns to us */ |
| 3430 | 3433 | u1_sel = DIV_ROUND_UP(udev->u1_params.sel, 1000); |
| 3431 | 3434 | u1_pel = DIV_ROUND_UP(udev->u1_params.pel, 1000); |
| @@ -1,7 +1,6 @@ | ||
| 1 | 1 | config USB_DWC3 |
| 2 | 2 | tristate "DesignWare USB3 DRD Core Support" |
| 3 | 3 | depends on (USB || USB_GADGET) && HAS_DMA |
| 4 | − depends on EXTCON | |
| 5 | 4 | select USB_XHCI_PLATFORM if USB_SUPPORT && USB_XHCI_HCD |
| 6 | 5 | help |
| 7 | 6 | Say Y or M here if your system has a Dual Role SuperSpeed |
| @@ -28,6 +28,8 @@ · 27 unmodified lines | ||
| 28 | 28 | /* FIXME define these in <linux/pci_ids.h> */ |
| 29 | 29 | #define PCI_VENDOR_ID_SYNOPSYS 0x16c3 |
| 30 | 30 | #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd |
| 31 | +#define PCI_DEVICE_ID_INTEL_BYT 0x0f37 | |
| 32 | +#define PCI_DEVICE_ID_INTEL_MRFLD 0x119e | |
| 31 | 33 | |
| 32 | 34 | struct dwc3_pci { |
| 33 | 35 | struct device *dev; |
| @@ -187,6 +189,8 @@ static DEFINE_PCI_DEVICE_TABLE(dwc3_pci_id_table) = { · 153 unmodified lines | ||
| 187 | 189 | PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, |
| 188 | 190 | PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3), |
| 189 | 191 | }, |
| 192 | + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), }, | |
| 193 | + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), }, | |
| 190 | 194 | { } /* Terminating Entry */ |
| 191 | 195 | }; |
| 192 | 196 | MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table); |
| @@ -2611,15 +2611,13 @@ int dwc3_gadget_init(struct dwc3 *dwc) · 2610 unmodified lines | ||
| 2611 | 2611 | ret = usb_add_gadget_udc(dwc->dev, &dwc->gadget); |
| 2612 | 2612 | if (ret) { |
| 2613 | 2613 | dev_err(dwc->dev, "failed to register udc\n"); |
| 2614 | − goto err5; | |
| 2614 | + goto err4; | |
| 2615 | 2615 | } |
| 2616 | 2616 | |
| 2617 | 2617 | return 0; |
| 2618 | 2618 | |
| 2619 | −err5: | |
| 2620 | − dwc3_gadget_free_endpoints(dwc); | |
| 2621 | − | |
| 2622 | 2619 | err4: |
| 2620 | + dwc3_gadget_free_endpoints(dwc); | |
| 2623 | 2621 | dma_free_coherent(dwc->dev, DWC3_EP0_BOUNCE_SIZE, |
| 2624 | 2622 | dwc->ep0_bounce, dwc->ep0_bounce_addr); |
| 2625 | 2623 | |
| @@ -113,12 +113,6 @@ static int __init cdc_do_config(struct usb_configuration *c) · 112 unmodified lines | ||
| 113 | 113 | c->bmAttributes |= USB_CONFIG_ATT_WAKEUP; |
| 114 | 114 | } |
| 115 | 115 | |
| 116 | − fi_ecm = usb_get_function_instance("ecm"); | |
| 117 | − if (IS_ERR(fi_ecm)) { | |
| 118 | − status = PTR_ERR(fi_ecm); | |
| 119 | − goto err_func_ecm; | |
| 120 | − } | |
| 121 | − | |
| 122 | 116 | f_ecm = usb_get_function(fi_ecm); |
| 123 | 117 | if (IS_ERR(f_ecm)) { |
| 124 | 118 | status = PTR_ERR(f_ecm); |
| @@ -129,35 +123,24 @@ static int __init cdc_do_config(struct usb_configuration *c) · 4 unmodified lines | ||
| 129 | 123 | if (status) |
| 130 | 124 | goto err_add_ecm; |
| 131 | 125 | |
| 132 | − fi_serial = usb_get_function_instance("acm"); | |
| 133 | − if (IS_ERR(fi_serial)) { | |
| 134 | − status = PTR_ERR(fi_serial); | |
| 135 | − goto err_get_acm; | |
| 136 | − } | |
| 137 | − | |
| 138 | 126 | f_acm = usb_get_function(fi_serial); |
| 139 | 127 | if (IS_ERR(f_acm)) { |
| 140 | 128 | status = PTR_ERR(f_acm); |
| 141 | − goto err_func_acm; | |
| 129 | + goto err_get_acm; | |
| 142 | 130 | } |
| 143 | 131 | |
| 144 | 132 | status = usb_add_function(c, f_acm); |
| 145 | 133 | if (status) |
| 146 | 134 | goto err_add_acm; |
| 147 | − | |
| 148 | 135 | return 0; |
| 149 | 136 | |
| 150 | 137 | err_add_acm: |
| 151 | 138 | usb_put_function(f_acm); |
| 152 | −err_func_acm: | |
| 153 | − usb_put_function_instance(fi_serial); | |
| 154 | 139 | err_get_acm: |
| 155 | 140 | usb_remove_function(c, f_ecm); |
| 156 | 141 | err_add_ecm: |
| 157 | 142 | usb_put_function(f_ecm); |
| 158 | 143 | err_get_ecm: |
| 159 | − usb_put_function_instance(fi_ecm); | |
| 160 | −err_func_ecm: | |
| 161 | 144 | return status; |
| 162 | 145 | } |
| 163 | 146 | |
| @@ -923,8 +923,9 @@ static int dummy_udc_stop(struct usb_gadget *g, · 922 unmodified lines | ||
| 923 | 923 | struct dummy_hcd *dum_hcd = gadget_to_dummy_hcd(g); |
| 924 | 924 | struct dummy *dum = dum_hcd->dum; |
| 925 | 925 | |
| 926 | − dev_dbg(udc_dev(dum), "unregister gadget driver '%s'\n", | |
| 927 | − driver->driver.name); | |
| 926 | + if (driver) | |
| 927 | + dev_dbg(udc_dev(dum), "unregister gadget driver '%s'\n", | |
| 928 | + driver->driver.name); | |
| 928 | 929 | |
| 929 | 930 | dum->driver = NULL; |
| 930 | 931 | |
| @@ -1000,8 +1001,8 @@ static int dummy_udc_remove(struct platform_device *pdev) · 69 unmodified lines | ||
| 1000 | 1001 | { |
| 1001 | 1002 | struct dummy *dum = platform_get_drvdata(pdev); |
| 1002 | 1003 | |
| 1003 | − usb_del_gadget_udc(&dum->gadget); | |
| 1004 | 1004 | device_remove_file(&dum->gadget.dev, &dev_attr_function); |
| 1005 | + usb_del_gadget_udc(&dum->gadget); | |
| 1005 | 1006 | return 0; |
| 1006 | 1007 | } |
| 1007 | 1008 | |
| @@ -995,7 +995,7 @@ static void ecm_unbind(struct usb_configuration *c, struct usb_function *f) · 994 unmodified lines | ||
| 995 | 995 | usb_ep_free_request(ecm->notify, ecm->notify_req); |
| 996 | 996 | } |
| 997 | 997 | |
| 998 | −struct usb_function *ecm_alloc(struct usb_function_instance *fi) | |
| 998 | +static struct usb_function *ecm_alloc(struct usb_function_instance *fi) | |
| 999 | 999 | { |
| 1000 | 1000 | struct f_ecm *ecm; |
| 1001 | 1001 | struct f_ecm_opts *opts; |
| @@ -624,7 +624,7 @@ static void eem_unbind(struct usb_configuration *c, struct usb_function *f) · 623 unmodified lines | ||
| 624 | 624 | usb_free_all_descriptors(f); |
| 625 | 625 | } |
| 626 | 626 | |
| 627 | −struct usb_function *eem_alloc(struct usb_function_instance *fi) | |
| 627 | +static struct usb_function *eem_alloc(struct usb_function_instance *fi) | |
| 628 | 628 | { |
| 629 | 629 | struct f_eem *eem; |
| 630 | 630 | struct f_eem_opts *opts; |
| @@ -1034,37 +1034,19 @@ struct ffs_sb_fill_data { · 1033 unmodified lines | ||
| 1034 | 1034 | struct ffs_file_perms perms; |
| 1035 | 1035 | umode_t root_mode; |
| 1036 | 1036 | const char *dev_name; |
| 1037 | − union { | |
| 1038 | − /* set by ffs_fs_mount(), read by ffs_sb_fill() */ | |
| 1039 | − void *private_data; | |
| 1040 | − /* set by ffs_sb_fill(), read by ffs_fs_mount */ | |
| 1041 | − struct ffs_data *ffs_data; | |
| 1042 | − }; | |
| 1037 | + struct ffs_data *ffs_data; | |
| 1043 | 1038 | }; |
| 1044 | 1039 | |
| 1045 | 1040 | static int ffs_sb_fill(struct super_block *sb, void *_data, int silent) |
| 1046 | 1041 | { |
| 1047 | 1042 | struct ffs_sb_fill_data *data = _data; |
| 1048 | 1043 | struct inode *inode; |
| 1049 | − struct ffs_data *ffs; | |
| 1044 | + struct ffs_data *ffs = data->ffs_data; | |
| 1050 | 1045 | |
| 1051 | 1046 | ENTER(); |
| 1052 | 1047 | |
| 1053 | − /* Initialise data */ | |
| 1054 | − ffs = ffs_data_new(); | |
| 1055 | − if (unlikely(!ffs)) | |
| 1056 | − goto Enomem; | |
| 1057 | − | |
| 1058 | 1048 | ffs->sb = sb; |
| 1059 | − ffs->dev_name = kstrdup(data->dev_name, GFP_KERNEL); | |
| 1060 | − if (unlikely(!ffs->dev_name)) | |
| 1061 | − goto Enomem; | |
| 1062 | − ffs->file_perms = data->perms; | |
| 1063 | − ffs->private_data = data->private_data; | |
| 1064 | − | |
| 1065 | − /* used by the caller of this function */ | |
| 1066 | − data->ffs_data = ffs; | |
| 1067 | − | |
| 1049 | + data->ffs_data = NULL; | |
| 1068 | 1050 | sb->s_fs_info = ffs; |
| 1069 | 1051 | sb->s_blocksize = PAGE_CACHE_SIZE; |
| 1070 | 1052 | sb->s_blocksize_bits = PAGE_CACHE_SHIFT; |
| @@ -1080,17 +1062,14 @@ static int ffs_sb_fill(struct super_block *sb, void *_data, int silent) · 9 unmodified lines | ||
| 1080 | 1062 | &data->perms); |
| 1081 | 1063 | sb->s_root = d_make_root(inode); |
| 1082 | 1064 | if (unlikely(!sb->s_root)) |
| 1083 | − goto Enomem; | |
| 1065 | + return -ENOMEM; | |
| 1084 | 1066 | |
| 1085 | 1067 | /* EP0 file */ |
| 1086 | 1068 | if (unlikely(!ffs_sb_create_file(sb, "ep0", ffs, |
| 1087 | 1069 | &ffs_ep0_operations, NULL))) |
| 1088 | − goto Enomem; | |
| 1070 | + return -ENOMEM; | |
| 1089 | 1071 | |
| 1090 | 1072 | return 0; |
| 1091 | − | |
| 1092 | −Enomem: | |
| 1093 | − return -ENOMEM; | |
| 1094 | 1073 | } |
| 1095 | 1074 | |
| 1096 | 1075 | static int ffs_fs_parse_opts(struct ffs_sb_fill_data *data, char *opts) |
| @@ -1193,6 +1172,7 @@ ffs_fs_mount(struct file_system_type *t, int flags, · 96 unmodified lines | ||
| 1193 | 1172 | struct dentry *rv; |
| 1194 | 1173 | int ret; |
| 1195 | 1174 | void *ffs_dev; |
| 1175 | + struct ffs_data *ffs; | |
| 1196 | 1176 | |
| 1197 | 1177 | ENTER(); |
| 1198 | 1178 | |
| @@ -1200,18 +1180,30 @@ ffs_fs_mount(struct file_system_type *t, int flags, · 1 unmodified line | ||
| 1200 | 1180 | if (unlikely(ret < 0)) |
| 1201 | 1181 | return ERR_PTR(ret); |
| 1202 | 1182 | |
| 1183 | + ffs = ffs_data_new(); | |
| 1184 | + if (unlikely(!ffs)) | |
| 1185 | + return ERR_PTR(-ENOMEM); | |
| 1186 | + ffs->file_perms = data.perms; | |
| 1187 | + | |
| 1188 | + ffs->dev_name = kstrdup(dev_name, GFP_KERNEL); | |
| 1189 | + if (unlikely(!ffs->dev_name)) { | |
| 1190 | + ffs_data_put(ffs); | |
| 1191 | + return ERR_PTR(-ENOMEM); | |
| 1192 | + } | |
| 1193 | + | |
| 1203 | 1194 | ffs_dev = functionfs_acquire_dev_callback(dev_name); |
| 1204 | − if (IS_ERR(ffs_dev)) | |
| 1205 | − return ffs_dev; | |
| 1195 | + if (IS_ERR(ffs_dev)) { | |
| 1196 | + ffs_data_put(ffs); | |
| 1197 | + return ERR_CAST(ffs_dev); | |
| 1198 | + } | |
| 1199 | + ffs->private_data = ffs_dev; | |
| 1200 | + data.ffs_data = ffs; | |
| 1206 | 1201 | |
| 1207 | − data.dev_name = dev_name; | |
| 1208 | − data.private_data = ffs_dev; | |
| 1209 | 1202 | rv = mount_nodev(t, flags, &data, ffs_sb_fill); |
| 1210 | − | |
| 1211 | − /* data.ffs_data is set by ffs_sb_fill */ | |
| 1212 | − if (IS_ERR(rv)) | |
| 1203 | + if (IS_ERR(rv) && data.ffs_data) { | |
| 1213 | 1204 | functionfs_release_dev_callback(data.ffs_data); |
| 1214 | − | |
| 1205 | + ffs_data_put(data.ffs_data); | |
| 1206 | + } | |
| 1215 | 1207 | return rv; |
| 1216 | 1208 | } |
| 1217 | 1209 | |
| @@ -2264,6 +2256,8 @@ static int ffs_func_bind(struct usb_configuration *c, · 1046 unmodified lines | ||
| 2264 | 2256 | data->raw_descs + ret, |
| 2265 | 2257 | (sizeof data->raw_descs) - ret, |
| 2266 | 2258 | __ffs_func_bind_do_descs, func); |
| 2259 | + if (unlikely(ret < 0)) | |
| 2260 | + goto error; | |
| 2267 | 2261 | } |
| 2268 | 2262 | |
| 2269 | 2263 | /* |
| @@ -2260,10 +2260,12 @@ reset: · 2259 unmodified lines | ||
| 2260 | 2260 | /* Disable the endpoints */ |
| 2261 | 2261 | if (fsg->bulk_in_enabled) { |
| 2262 | 2262 | usb_ep_disable(fsg->bulk_in); |
| 2263 | + fsg->bulk_in->driver_data = NULL; | |
| 2263 | 2264 | fsg->bulk_in_enabled = 0; |
| 2264 | 2265 | } |
| 2265 | 2266 | if (fsg->bulk_out_enabled) { |
| 2266 | 2267 | usb_ep_disable(fsg->bulk_out); |
| 2268 | + fsg->bulk_out->driver_data = NULL; | |
| 2267 | 2269 | fsg->bulk_out_enabled = 0; |
| 2268 | 2270 | } |
| 2269 | 2271 | |
| @@ -1214,6 +1214,6 @@ static struct platform_driver fotg210_driver = { · 1213 unmodified lines | ||
| 1214 | 1214 | |
| 1215 | 1215 | module_platform_driver(fotg210_driver); |
| 1216 | 1216 | |
| 1217 | −MODULE_AUTHOR("Yuan-Hsin Chen <yhchen@faraday-tech.com>"); | |
| 1217 | +MODULE_AUTHOR("Yuan-Hsin Chen, Feng-Hsin Chiang <john453@faraday-tech.com>"); | |
| 1218 | 1218 | MODULE_LICENSE("GPL"); |
| 1219 | 1219 | MODULE_DESCRIPTION(DRIVER_DESC); |
| @@ -22,7 +22,7 @@ · 21 unmodified lines | ||
| 22 | 22 | |
| 23 | 23 | MODULE_DESCRIPTION("FUSB300 USB gadget driver"); |
| 24 | 24 | MODULE_LICENSE("GPL"); |
| 25 | −MODULE_AUTHOR("Yuan Hsin Chen <yhchen@faraday-tech.com>"); | |
| 25 | +MODULE_AUTHOR("Yuan-Hsin Chen, Feng-Hsin Chiang <john453@faraday-tech.com>"); | |
| 26 | 26 | MODULE_ALIAS("platform:fusb300_udc"); |
| 27 | 27 | |
| 28 | 28 | #define DRIVER_VERSION "20 October 2010" |
| @@ -179,7 +179,7 @@ err_conf: · 178 unmodified lines | ||
| 179 | 179 | return ret; |
| 180 | 180 | } |
| 181 | 181 | |
| 182 | −static int rndis_config_register(struct usb_composite_dev *cdev) | |
| 182 | +static __ref int rndis_config_register(struct usb_composite_dev *cdev) | |
| 183 | 183 | { |
| 184 | 184 | static struct usb_configuration config = { |
| 185 | 185 | .bConfigurationValue = MULTI_RNDIS_CONFIG_NUM, |
| @@ -194,7 +194,7 @@ static int rndis_config_register(struct usb_composite_dev *cdev) · 8 unmodified lines | ||
| 194 | 194 | |
| 195 | 195 | #else |
| 196 | 196 | |
| 197 | −static int rndis_config_register(struct usb_composite_dev *cdev) | |
| 197 | +static __ref int rndis_config_register(struct usb_composite_dev *cdev) | |
| 198 | 198 | { |
| 199 | 199 | return 0; |
| 200 | 200 | } |
| @@ -241,7 +241,7 @@ err_conf: · 40 unmodified lines | ||
| 241 | 241 | return ret; |
| 242 | 242 | } |
| 243 | 243 | |
| 244 | −static int cdc_config_register(struct usb_composite_dev *cdev) | |
| 244 | +static __ref int cdc_config_register(struct usb_composite_dev *cdev) | |
| 245 | 245 | { |
| 246 | 246 | static struct usb_configuration config = { |
| 247 | 247 | .bConfigurationValue = MULTI_CDC_CONFIG_NUM, |
| @@ -256,7 +256,7 @@ static int cdc_config_register(struct usb_composite_dev *cdev) · 8 unmodified lines | ||
| 256 | 256 | |
| 257 | 257 | #else |
| 258 | 258 | |
| 259 | −static int cdc_config_register(struct usb_composite_dev *cdev) | |
| 259 | +static __ref int cdc_config_register(struct usb_composite_dev *cdev) | |
| 260 | 260 | { |
| 261 | 261 | return 0; |
| 262 | 262 | } |
| @@ -645,6 +645,7 @@ static int mv_u3d_ep_disable(struct usb_ep *_ep) · 644 unmodified lines | ||
| 645 | 645 | struct mv_u3d_ep *ep; |
| 646 | 646 | struct mv_u3d_ep_context *ep_context; |
| 647 | 647 | u32 epxcr, direction; |
| 648 | + unsigned long flags; | |
| 648 | 649 | |
| 649 | 650 | if (!_ep) |
| 650 | 651 | return -EINVAL; |
| @@ -661,7 +662,9 @@ static int mv_u3d_ep_disable(struct usb_ep *_ep) · 10 unmodified lines | ||
| 661 | 662 | direction = mv_u3d_ep_dir(ep); |
| 662 | 663 | |
| 663 | 664 | /* nuke all pending requests (does flush) */ |
| 665 | + spin_lock_irqsave(&u3d->lock, flags); | |
| 664 | 666 | mv_u3d_nuke(ep, -ESHUTDOWN); |
| 667 | + spin_unlock_irqrestore(&u3d->lock, flags); | |
| 665 | 668 | |
| 666 | 669 | /* Disable the endpoint for Rx or Tx and reset the endpoint type */ |
| 667 | 670 | if (direction == MV_U3D_EP_DIR_OUT) { |
| @@ -2054,7 +2054,7 @@ static struct pxa25x_udc memory = { · 2053 unmodified lines | ||
| 2054 | 2054 | /* |
| 2055 | 2055 | * probe - binds to the platform device |
| 2056 | 2056 | */ |
| 2057 | −static int __init pxa25x_udc_probe(struct platform_device *pdev) | |
| 2057 | +static int pxa25x_udc_probe(struct platform_device *pdev) | |
| 2058 | 2058 | { |
| 2059 | 2059 | struct pxa25x_udc *dev = &memory; |
| 2060 | 2060 | int retval, irq; |
| @@ -2203,7 +2203,7 @@ static void pxa25x_udc_shutdown(struct platform_device *_dev) · 142 unmodified lines | ||
| 2203 | 2203 | pullup_off(); |
| 2204 | 2204 | } |
| 2205 | 2205 | |
| 2206 | −static int __exit pxa25x_udc_remove(struct platform_device *pdev) | |
| 2206 | +static int pxa25x_udc_remove(struct platform_device *pdev) | |
| 2207 | 2207 | { |
| 2208 | 2208 | struct pxa25x_udc *dev = platform_get_drvdata(pdev); |
| 2209 | 2209 | |
| @@ -2294,7 +2294,8 @@ static int pxa25x_udc_resume(struct platform_device *dev) · 84 unmodified lines | ||
| 2294 | 2294 | |
| 2295 | 2295 | static struct platform_driver udc_driver = { |
| 2296 | 2296 | .shutdown = pxa25x_udc_shutdown, |
| 2297 | − .remove = __exit_p(pxa25x_udc_remove), | |
| 2297 | + .probe = pxa25x_udc_probe, | |
| 2298 | + .remove = pxa25x_udc_remove, | |
| 2298 | 2299 | .suspend = pxa25x_udc_suspend, |
| 2299 | 2300 | .resume = pxa25x_udc_resume, |
| 2300 | 2301 | .driver = { |
| @@ -2303,7 +2304,7 @@ static struct platform_driver udc_driver = { · 2 unmodified lines | ||
| 2303 | 2304 | }, |
| 2304 | 2305 | }; |
| 2305 | 2306 | |
| 2306 | −module_platform_driver_probe(udc_driver, pxa25x_udc_probe); | |
| 2307 | +module_platform_driver(udc_driver); | |
| 2307 | 2308 | |
| 2308 | 2309 | MODULE_DESCRIPTION(DRIVER_DESC); |
| 2309 | 2310 | MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell"); |
| @@ -543,7 +543,7 @@ static int s3c_hsotg_write_fifo(struct s3c_hsotg *hsotg, · 542 unmodified lines | ||
| 543 | 543 | * FIFO, requests of >512 cause the endpoint to get stuck with a |
| 544 | 544 | * fragment of the end of the transfer in it. |
| 545 | 545 | */ |
| 546 | − if (can_write > 512) | |
| 546 | + if (can_write > 512 && !periodic) | |
| 547 | 547 | can_write = 512; |
| 548 | 548 | |
| 549 | 549 | /* |
| @@ -2475,8 +2475,6 @@ irq_retry: · 1925 unmodified lines | ||
| 2475 | 2475 | if (gintsts & GINTSTS_ErlySusp) { |
| 2476 | 2476 | dev_dbg(hsotg->dev, "GINTSTS_ErlySusp\n"); |
| 2477 | 2477 | writel(GINTSTS_ErlySusp, hsotg->regs + GINTSTS); |
| 2478 | − | |
| 2479 | − s3c_hsotg_disconnect(hsotg); | |
| 2480 | 2478 | } |
| 2481 | 2479 | |
| 2482 | 2480 | /* |
| @@ -2962,9 +2960,6 @@ static int s3c_hsotg_udc_stop(struct usb_gadget *gadget, · 479 unmodified lines | ||
| 2962 | 2960 | if (!hsotg) |
| 2963 | 2961 | return -ENODEV; |
| 2964 | 2962 | |
| 2965 | − if (!driver || driver != hsotg->driver || !driver->unbind) | |
| 2966 | − return -EINVAL; | |
| 2967 | − | |
| 2968 | 2963 | /* all endpoints should be shutdown */ |
| 2969 | 2964 | for (ep = 0; ep < hsotg->num_of_eps; ep++) |
| 2970 | 2965 | s3c_hsotg_ep_disable(&hsotg->eps[ep].ep); |
| @@ -2972,15 +2967,15 @@ static int s3c_hsotg_udc_stop(struct usb_gadget *gadget, · 1 unmodified line | ||
| 2972 | 2967 | spin_lock_irqsave(&hsotg->lock, flags); |
| 2973 | 2968 | |
| 2974 | 2969 | s3c_hsotg_phy_disable(hsotg); |
| 2975 | − regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies); | |
| 2976 | 2970 | |
| 2977 | − hsotg->driver = NULL; | |
| 2971 | + if (!driver) | |
| 2972 | + hsotg->driver = NULL; | |
| 2973 | + | |
| 2978 | 2974 | hsotg->gadget.speed = USB_SPEED_UNKNOWN; |
| 2979 | 2975 | |
| 2980 | 2976 | spin_unlock_irqrestore(&hsotg->lock, flags); |
| 2981 | 2977 | |
| 2982 | − dev_info(hsotg->dev, "unregistered gadget driver '%s'\n", | |
| 2983 | − driver->driver.name); | |
| 2978 | + regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies); | |
| 2984 | 2979 | |
| 2985 | 2980 | return 0; |
| 2986 | 2981 | } |
| @@ -130,7 +130,7 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver, · 129 unmodified lines | ||
| 130 | 130 | } |
| 131 | 131 | |
| 132 | 132 | /* Enable USB controller, 83xx or 8536 */ |
| 133 | − if (pdata->have_sysif_regs) | |
| 133 | + if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6) | |
| 134 | 134 | setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4); |
| 135 | 135 | |
| 136 | 136 | /* Don't need to set host mode here. It will be done by tdi_reset() */ |
| @@ -232,15 +232,9 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, · 95 unmodified lines | ||
| 232 | 232 | case FSL_USB2_PHY_ULPI: |
| 233 | 233 | if (pdata->have_sysif_regs && pdata->controller_ver) { |
| 234 | 234 | /* controller version 1.6 or above */ |
| 235 | + clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN); | |
| 235 | 236 | setbits32(non_ehci + FSL_SOC_USB_CTRL, |
| 236 | − ULPI_PHY_CLK_SEL); | |
| 237 | − /* | |
| 238 | − * Due to controller issue of PHY_CLK_VALID in ULPI | |
| 239 | − * mode, we set USB_CTRL_USB_EN before checking | |
| 240 | − * PHY_CLK_VALID, otherwise PHY_CLK_VALID doesn't work. | |
| 241 | − */ | |
| 242 | − clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL, | |
| 243 | − UTMI_PHY_EN, USB_CTRL_USB_EN); | |
| 237 | + ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN); | |
| 244 | 238 | } |
| 245 | 239 | portsc |= PORT_PTS_ULPI; |
| 246 | 240 | break; |
| @@ -270,8 +264,9 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, · 23 unmodified lines | ||
| 270 | 264 | if (pdata->have_sysif_regs && pdata->controller_ver && |
| 271 | 265 | (phy_mode == FSL_USB2_PHY_ULPI)) { |
| 272 | 266 | /* check PHY_CLK_VALID to get phy clk valid */ |
| 273 | − if (!spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) & | |
| 274 | − PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0)) { | |
| 267 | + if (!(spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) & | |
| 268 | + PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0) || | |
| 269 | + in_be32(non_ehci + FSL_SOC_USB_PRICTRL))) { | |
| 275 | 270 | printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n"); |
| 276 | 271 | return -EINVAL; |
| 277 | 272 | } |
| @@ -669,7 +664,7 @@ static const struct hc_driver ehci_fsl_hc_driver = { · 391 unmodified lines | ||
| 669 | 664 | * generic hardware linkage |
| 670 | 665 | */ |
| 671 | 666 | .irq = ehci_irq, |
| 672 | − .flags = HCD_USB2 | HCD_MEMORY | HCD_BH, | |
| 667 | + .flags = HCD_USB2 | HCD_MEMORY, | |
| 673 | 668 | |
| 674 | 669 | /* |
| 675 | 670 | * basic lifecycle operations |
| @@ -43,7 +43,7 @@ static const struct hc_driver ehci_grlib_hc_driver = { · 42 unmodified lines | ||
| 43 | 43 | * generic hardware linkage |
| 44 | 44 | */ |
| 45 | 45 | .irq = ehci_irq, |
| 46 | − .flags = HCD_MEMORY | HCD_USB2 | HCD_BH, | |
| 46 | + .flags = HCD_MEMORY | HCD_USB2, | |
| 47 | 47 | |
| 48 | 48 | /* |
| 49 | 49 | * basic lifecycle operations |
| @@ -1158,7 +1158,7 @@ static const struct hc_driver ehci_hc_driver = { · 1157 unmodified lines | ||
| 1158 | 1158 | * generic hardware linkage |
| 1159 | 1159 | */ |
| 1160 | 1160 | .irq = ehci_irq, |
| 1161 | − .flags = HCD_MEMORY | HCD_USB2 | HCD_BH, | |
| 1161 | + .flags = HCD_MEMORY | HCD_USB2, | |
| 1162 | 1162 | |
| 1163 | 1163 | /* |
| 1164 | 1164 | * basic lifecycle operations |
| @@ -96,7 +96,7 @@ static const struct hc_driver mv_ehci_hc_driver = { · 95 unmodified lines | ||
| 96 | 96 | * generic hardware linkage |
| 97 | 97 | */ |
| 98 | 98 | .irq = ehci_irq, |
| 99 | − .flags = HCD_MEMORY | HCD_USB2 | HCD_BH, | |
| 99 | + .flags = HCD_MEMORY | HCD_USB2, | |
| 100 | 100 | |
| 101 | 101 | /* |
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