Pull powerpc fixes from Michael Ellerman: "Fixes marked for stable: - Set missing wakeup bit in LPCR on POWER9 - Fix the early OPAL console wrappers - Fixup kernel read only mapping Fixes for code merged this cycle: - Fix missing CRCs, add more asm-prototypes.h declarations" * tag 'powerpc-4.9-6' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc/mm: Fixup kernel read only mapping powerpc/boot: Fix the early OPAL console wrappers powerpc: Fix missing CRCs, add more asm-prototypes.h declarations powerpc: Set missing wakeup bit in LPCR on POWER9
Unified · Split
| @@ -232,8 +232,12 @@ void start(void) · 231 unmodified lines | ||
| 232 | 232 | console_ops.close(); |
| 233 | 233 | |
| 234 | 234 | kentry = (kernel_entry_t) vmlinux.addr; |
| 235 | − if (ft_addr) | |
| 236 | − kentry(ft_addr, 0, NULL); | |
| 235 | + if (ft_addr) { | |
| 236 | + if(platform_ops.kentry) | |
| 237 | + platform_ops.kentry(ft_addr, vmlinux.addr); | |
| 238 | + else | |
| 239 | + kentry(ft_addr, 0, NULL); | |
| 240 | + } | |
| 237 | 241 | else |
| 238 | 242 | kentry((unsigned long)initrd.addr, initrd.size, |
| 239 | 243 | loader_info.promptr); |
| @@ -12,6 +12,19 @@ · 11 unmodified lines | ||
| 12 | 12 | |
| 13 | 13 | .text |
| 14 | 14 | |
| 15 | + .globl opal_kentry | |
| 16 | +opal_kentry: | |
| 17 | + /* r3 is the fdt ptr */ | |
| 18 | + mtctr r4 | |
| 19 | + li r4, 0 | |
| 20 | + li r5, 0 | |
| 21 | + li r6, 0 | |
| 22 | + li r7, 0 | |
| 23 | + ld r11,opal@got(r2) | |
| 24 | + ld r8,0(r11) | |
| 25 | + ld r9,8(r11) | |
| 26 | + bctr | |
| 27 | + | |
| 15 | 28 | #define OPAL_CALL(name, token) \ |
| 16 | 29 | .globl name; \ |
| 17 | 30 | name: \ |
| @@ -23,14 +23,25 @@ struct opal { · 22 unmodified lines | ||
| 23 | 23 | |
| 24 | 24 | static u32 opal_con_id; |
| 25 | 25 | |
| 26 | +/* see opal-wrappers.S */ | |
| 26 | 27 | int64_t opal_console_write(int64_t term_number, u64 *length, const u8 *buffer); |
| 27 | 28 | int64_t opal_console_read(int64_t term_number, uint64_t *length, u8 *buffer); |
| 28 | 29 | int64_t opal_console_write_buffer_space(uint64_t term_number, uint64_t *length); |
| 29 | 30 | int64_t opal_console_flush(uint64_t term_number); |
| 30 | 31 | int64_t opal_poll_events(uint64_t *outstanding_event_mask); |
| 31 | 32 | |
| 33 | +void opal_kentry(unsigned long fdt_addr, void *vmlinux_addr); | |
| 34 | + | |
| 32 | 35 | static int opal_con_open(void) |
| 33 | 36 | { |
| 37 | + /* | |
| 38 | + * When OPAL loads the boot kernel it stashes the OPAL base and entry | |
| 39 | + * address in r8 and r9 so the kernel can use the OPAL console | |
| 40 | + * before unflattening the devicetree. While executing the wrapper will | |
| 41 | + * probably trash r8 and r9 so this kentry hook restores them before | |
| 42 | + * entering the decompressed kernel. | |
| 43 | + */ | |
| 44 | + platform_ops.kentry = opal_kentry; | |
| 34 | 45 | return 0; |
| 35 | 46 | } |
| 36 | 47 | |
| @@ -30,6 +30,7 @@ struct platform_ops { · 29 unmodified lines | ||
| 30 | 30 | void * (*realloc)(void *ptr, unsigned long size); |
| 31 | 31 | void (*exit)(void); |
| 32 | 32 | void * (*vmlinux_alloc)(unsigned long size); |
| 33 | + void (*kentry)(unsigned long fdt_addr, void *vmlinux_addr); | |
| 33 | 34 | }; |
| 34 | 35 | extern struct platform_ops platform_ops; |
| 35 | 36 | |
| @@ -14,6 +14,10 @@ · 13 unmodified lines | ||
| 14 | 14 | |
| 15 | 15 | #include <linux/threads.h> |
| 16 | 16 | #include <linux/kprobes.h> |
| 17 | +#include <asm/cacheflush.h> | |
| 18 | +#include <asm/checksum.h> | |
| 19 | +#include <asm/uaccess.h> | |
| 20 | +#include <asm/epapr_hcalls.h> | |
| 17 | 21 | |
| 18 | 22 | #include <uapi/asm/ucontext.h> |
| 19 | 23 | |
| @@ -109,4 +113,12 @@ void early_setup_secondary(void); · 89 unmodified lines | ||
| 109 | 113 | /* time */ |
| 110 | 114 | void accumulate_stolen_time(void); |
| 111 | 115 | |
| 116 | +/* misc runtime */ | |
| 117 | +extern u64 __bswapdi2(u64); | |
| 118 | +extern s64 __lshrdi3(s64, int); | |
| 119 | +extern s64 __ashldi3(s64, int); | |
| 120 | +extern s64 __ashrdi3(s64, int); | |
| 121 | +extern int __cmpdi2(s64, s64); | |
| 122 | +extern int __ucmpdi2(u64, u64); | |
| 123 | + | |
| 112 | 124 | #endif /* _ASM_POWERPC_ASM_PROTOTYPES_H */ |
| @@ -28,6 +28,12 @@ · 27 unmodified lines | ||
| 28 | 28 | * Individual features below. |
| 29 | 29 | */ |
| 30 | 30 | |
| 31 | +/* | |
| 32 | + * Kernel read only support. | |
| 33 | + * We added the ppp value 0b110 in ISA 2.04. | |
| 34 | + */ | |
| 35 | +#define MMU_FTR_KERNEL_RO ASM_CONST(0x00004000) | |
| 36 | + | |
| 31 | 37 | /* |
| 32 | 38 | * We need to clear top 16bits of va (from the remaining 64 bits )in |
| 33 | 39 | * tlbie* instructions |
| @@ -103,10 +109,10 @@ · 69 unmodified lines | ||
| 103 | 109 | #define MMU_FTRS_POWER4 MMU_FTRS_DEFAULT_HPTE_ARCH_V2 |
| 104 | 110 | #define MMU_FTRS_PPC970 MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA |
| 105 | 111 | #define MMU_FTRS_POWER5 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE |
| 106 | −#define MMU_FTRS_POWER6 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | |
| 107 | −#define MMU_FTRS_POWER7 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | |
| 108 | −#define MMU_FTRS_POWER8 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | |
| 109 | −#define MMU_FTRS_POWER9 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | |
| 112 | +#define MMU_FTRS_POWER6 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO | |
| 113 | +#define MMU_FTRS_POWER7 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO | |
| 114 | +#define MMU_FTRS_POWER8 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO | |
| 115 | +#define MMU_FTRS_POWER9 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO | |
| 110 | 116 | #define MMU_FTRS_CELL MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \ |
| 111 | 117 | MMU_FTR_CI_LARGE_PAGE |
| 112 | 118 | #define MMU_FTRS_PA6T MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \ |
| @@ -355,6 +355,7 @@ · 354 unmodified lines | ||
| 355 | 355 | #define LPCR_PECE0 ASM_CONST(0x0000000000004000) /* ext. exceptions can cause exit */ |
| 356 | 356 | #define LPCR_PECE1 ASM_CONST(0x0000000000002000) /* decrementer can cause exit */ |
| 357 | 357 | #define LPCR_PECE2 ASM_CONST(0x0000000000001000) /* machine check etc can cause exit */ |
| 358 | +#define LPCR_PECE_HVEE ASM_CONST(0x0000400000000000) /* P9 Wakeup on HV interrupts */ | |
| 358 | 359 | #define LPCR_MER ASM_CONST(0x0000000000000800) /* Mediated External Exception */ |
| 359 | 360 | #define LPCR_MER_SH 11 |
| 360 | 361 | #define LPCR_TC ASM_CONST(0x0000000000000200) /* Translation control */ |
| @@ -98,8 +98,8 @@ _GLOBAL(__setup_cpu_power9) · 97 unmodified lines | ||
| 98 | 98 | li r0,0 |
| 99 | 99 | mtspr SPRN_LPID,r0 |
| 100 | 100 | mfspr r3,SPRN_LPCR |
| 101 | − ori r3, r3, LPCR_PECEDH | |
| 102 | − ori r3, r3, LPCR_HVICE | |
| 101 | + LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE) | |
| 102 | + or r3, r3, r4 | |
| 103 | 103 | bl __init_LPCR |
| 104 | 104 | bl __init_HFSCR |
| 105 | 105 | bl __init_tlb_power9 |
| @@ -118,8 +118,8 @@ _GLOBAL(__restore_cpu_power9) · 12 unmodified lines | ||
| 118 | 118 | li r0,0 |
| 119 | 119 | mtspr SPRN_LPID,r0 |
| 120 | 120 | mfspr r3,SPRN_LPCR |
| 121 | − ori r3, r3, LPCR_PECEDH | |
| 122 | − ori r3, r3, LPCR_HVICE | |
| 121 | + LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE) | |
| 122 | + or r3, r3, r4 | |
| 123 | 123 | bl __init_LPCR |
| 124 | 124 | bl __init_HFSCR |
| 125 | 125 | bl __init_tlb_power9 |
| @@ -193,8 +193,12 @@ unsigned long htab_convert_pte_flags(unsigned long pteflags) · 192 unmodified lines | ||
| 193 | 193 | /* |
| 194 | 194 | * Kernel read only mapped with ppp bits 0b110 |
| 195 | 195 | */ |
| 196 | − if (!(pteflags & _PAGE_WRITE)) | |
| 197 | − rflags |= (HPTE_R_PP0 | 0x2); | |
| 196 | + if (!(pteflags & _PAGE_WRITE)) { | |
| 197 | + if (mmu_has_feature(MMU_FTR_KERNEL_RO)) | |
| 198 | + rflags |= (HPTE_R_PP0 | 0x2); | |
| 199 | + else | |
| 200 | + rflags |= 0x3; | |
| 201 | + } | |
| 198 | 202 | } else { |
| 199 | 203 | if (pteflags & _PAGE_RWX) |
| 200 | 204 | rflags |= 0x2; |