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NTB: Add parameters for Intel SNB B2B addresses

Add module parameters for the addresses to be used in B2B topology.

Allen Hubbe committed 11 years ago

Commit 42fefc81 parent 2849b5d2 files · +68 −19Browse files

Unified · Split

2 files
  1. Documentation/ntb.txt +10 −0
  2. drivers/ntb/hw/intel/ntb_hw_intel.c +58 −19
Documentation/ntb.txt+10−0
@@ -56,3 +56,13 @@ Module Parameters: · 55 unmodified lines
5656 * b2b\_mw\_share - If the peer ntb is to be accessed via a memory window, and if
5757 the memory window is large enough, still allow the client to use the
5858 second half of the memory window for address translation to the peer.
59+* snb\_b2b\_usd\_bar2\_addr64 - If using B2B topology on Xeon hardware, use this
60+ 64 bit address on the bus between the NTB devices for the window at
61+ BAR2, on the upstream side of the link.
62+* snb\_b2b\_usd\_bar4\_addr64 - See *snb\_b2b\_bar2\_addr64*.
63+* snb\_b2b\_usd\_bar4\_addr32 - See *snb\_b2b\_bar2\_addr64*.
64+* snb\_b2b\_usd\_bar5\_addr32 - See *snb\_b2b\_bar2\_addr64*.
65+* snb\_b2b\_dsd\_bar2\_addr64 - See *snb\_b2b\_bar2\_addr64*.
66+* snb\_b2b\_dsd\_bar4\_addr64 - See *snb\_b2b\_bar2\_addr64*.
67+* snb\_b2b\_dsd\_bar4\_addr32 - See *snb\_b2b\_bar2\_addr64*.
68+* snb\_b2b\_dsd\_bar5\_addr32 - See *snb\_b2b\_bar2\_addr64*.
drivers/ntb/hw/intel/ntb_hw_intel.c+58−19
@@ -72,20 +72,6 @@ MODULE_AUTHOR("Intel Corporation"); · 71 unmodified lines
7272 #define bar0_off(base, bar) ((base) + ((bar) << 2))
7373 #define bar2_off(base, bar) bar0_off(base, (bar) - 2)
7474
75−static int b2b_mw_idx = -1;
76−module_param(b2b_mw_idx, int, 0644);
77−MODULE_PARM_DESC(b2b_mw_idx, "Use this mw idx to access the peer ntb. A "
78− "value of zero or positive starts from first mw idx, and a "
79− "negative value starts from last mw idx. Both sides MUST "
80− "set the same value here!");
81−
82−static unsigned int b2b_mw_share;
83−module_param(b2b_mw_share, uint, 0644);
84−MODULE_PARM_DESC(b2b_mw_share, "If the b2b mw is large enough, configure the "
85− "ntb so that the peer ntb only occupies the first half of "
86− "the mw, so the second half can still be used as a mw. Both "
87− "sides MUST set the same value here!");
88−
8975 static const struct intel_ntb_reg bwd_reg;
9076 static const struct intel_ntb_alt_reg bwd_pri_reg;
9177 static const struct intel_ntb_alt_reg bwd_sec_reg;
@@ -98,14 +84,67 @@ static const struct intel_ntb_alt_reg snb_sec_reg; · 6 unmodified lines
9884 static const struct intel_ntb_alt_reg snb_b2b_reg;
9985 static const struct intel_ntb_xlat_reg snb_pri_xlat;
10086 static const struct intel_ntb_xlat_reg snb_sec_xlat;
101−static const struct intel_b2b_addr snb_b2b_usd_addr;
102−static const struct intel_b2b_addr snb_b2b_dsd_addr;
103−
87+static struct intel_b2b_addr snb_b2b_usd_addr;
88+static struct intel_b2b_addr snb_b2b_dsd_addr;
10489 static const struct ntb_dev_ops intel_ntb_ops;
10590
10691 static const struct file_operations intel_ntb_debugfs_info;
10792 static struct dentry *debugfs_dir;
10893
94+static int b2b_mw_idx = -1;
95+module_param(b2b_mw_idx, int, 0644);
96+MODULE_PARM_DESC(b2b_mw_idx, "Use this mw idx to access the peer ntb. A "
97+ "value of zero or positive starts from first mw idx, and a "
98+ "negative value starts from last mw idx. Both sides MUST "
99+ "set the same value here!");
100+
101+static unsigned int b2b_mw_share;
102+module_param(b2b_mw_share, uint, 0644);
103+MODULE_PARM_DESC(b2b_mw_share, "If the b2b mw is large enough, configure the "
104+ "ntb so that the peer ntb only occupies the first half of "
105+ "the mw, so the second half can still be used as a mw. Both "
106+ "sides MUST set the same value here!");
107+
108+module_param_named(snb_b2b_usd_bar2_addr64,
109+ snb_b2b_usd_addr.bar2_addr64, ullong, 0644);
110+MODULE_PARM_DESC(snb_b2b_usd_bar2_addr64,
111+ "SNB B2B USD BAR 2 64-bit address");
112+
113+module_param_named(snb_b2b_usd_bar4_addr64,
114+ snb_b2b_usd_addr.bar4_addr64, ullong, 0644);
115+MODULE_PARM_DESC(snb_b2b_usd_bar2_addr64,
116+ "SNB B2B USD BAR 4 64-bit address");
117+
118+module_param_named(snb_b2b_usd_bar4_addr32,
119+ snb_b2b_usd_addr.bar4_addr32, ullong, 0644);
120+MODULE_PARM_DESC(snb_b2b_usd_bar2_addr64,
121+ "SNB B2B USD split-BAR 4 32-bit address");
122+
123+module_param_named(snb_b2b_usd_bar5_addr32,
124+ snb_b2b_usd_addr.bar5_addr32, ullong, 0644);
125+MODULE_PARM_DESC(snb_b2b_usd_bar2_addr64,
126+ "SNB B2B USD split-BAR 5 32-bit address");
127+
128+module_param_named(snb_b2b_dsd_bar2_addr64,
129+ snb_b2b_dsd_addr.bar2_addr64, ullong, 0644);
130+MODULE_PARM_DESC(snb_b2b_dsd_bar2_addr64,
131+ "SNB B2B DSD BAR 2 64-bit address");
132+
133+module_param_named(snb_b2b_dsd_bar4_addr64,
134+ snb_b2b_dsd_addr.bar4_addr64, ullong, 0644);
135+MODULE_PARM_DESC(snb_b2b_dsd_bar2_addr64,
136+ "SNB B2B DSD BAR 4 64-bit address");
137+
138+module_param_named(snb_b2b_dsd_bar4_addr32,
139+ snb_b2b_dsd_addr.bar4_addr32, ullong, 0644);
140+MODULE_PARM_DESC(snb_b2b_dsd_bar2_addr64,
141+ "SNB B2B DSD split-BAR 4 32-bit address");
142+
143+module_param_named(snb_b2b_dsd_bar5_addr32,
144+ snb_b2b_dsd_addr.bar5_addr32, ullong, 0644);
145+MODULE_PARM_DESC(snb_b2b_dsd_bar2_addr64,
146+ "SNB B2B DSD split-BAR 5 32-bit address");
147+
109148 #ifndef ioread64
110149 #ifdef readq
111150 #define ioread64 readq
@@ -2073,14 +2112,14 @@ static const struct intel_ntb_xlat_reg snb_sec_xlat = { · 1961 unmodified lines
20732112 .bar2_xlat = SNB_SBAR23XLAT_OFFSET,
20742113 };
20752114
2076−static const struct intel_b2b_addr snb_b2b_usd_addr = {
2115+static struct intel_b2b_addr snb_b2b_usd_addr = {
20772116 .bar2_addr64 = SNB_B2B_BAR2_USD_ADDR64,
20782117 .bar4_addr64 = SNB_B2B_BAR4_USD_ADDR64,
20792118 .bar4_addr32 = SNB_B2B_BAR4_USD_ADDR32,
20802119 .bar5_addr32 = SNB_B2B_BAR5_USD_ADDR32,
20812120 };
20822121
2083−static const struct intel_b2b_addr snb_b2b_dsd_addr = {
2122+static struct intel_b2b_addr snb_b2b_dsd_addr = {
20842123 .bar2_addr64 = SNB_B2B_BAR2_DSD_ADDR64,
20852124 .bar4_addr64 = SNB_B2B_BAR4_DSD_ADDR64,
20862125 .bar4_addr32 = SNB_B2B_BAR4_DSD_ADDR32,